title: Command line arguments for a program run in a makefile
body: <p>I want to specify some command line parameters in a makefile. I normally run my program like<br>
  this:</p>
  
  <pre><code> gcc -o prog prog2.c prog.c
  
   ./prog text1.txt text2.txt
  </code></pre>
  
  <p>Makefile:</p>
  
  <pre><code>prog: prog2.o prog.o
      gcc -o prog prog2.o prog.o 
  
  
  prog2.o: prog2.c prog2.h
      gcc -c prog2.c
  
  clean :
      rm prog2.o
  </code></pre>
  
  <p>How do I include the txt files here?    </p>
  
  <p>Also how do I give executions in a single make file. Say if I also want to run</p>
  
  <pre><code>  gcc -o prog prog3.c prog.c
  
    ./prog text1.txt text2.txt
  </code></pre>