title: GNU Make: Using the filter function in prerequisites
body: <p>I want to compile some C++ files and I absolutely have to put all object files in a separate build directory, but stored completely flat, i.e., without any further subdirectories. I know the common solution using VPATH, which goes something like this:</p>
  
  <pre><code>SOURCES = foo/one.cpp \
      foo/bar/two.cpp \
      foo/bar/sub/three.cpp
  
  OBJDIR = obj
  
  VPATH=$(dir $(SOURCES))
  
  OBJECTS = $(addprefix $(OBJDIR)/, $(notdir $(SOURCES:%.cpp=%.o)))
  
  $(OBJDIR)/%.o : %.cpp
      @echo Should compile: $(filter %/$*.cpp, $(SOURCES))
      @echo Compiling $&lt;
  
  all: $(OBJECTS)
  </code></pre>
  
  <p>This example pretty much works: I get three object files one.o, two.o, three.o in the 'obj' subdirectory (you can assume it just exists). </p>
  
  <p>Now here's the catch when using VPATH: If there happens to be a file 'foo/three.cpp', then <em>this</em> will be compiled instead of the 'foo/bar/sub/three.cpp' which is named in the SOURCES variable. And no, I cannot rename either file; this name clash simply exists and I cannot do anything about that.</p>
  
  <p>So my question is: How can I tell Make to <em>only</em> use '.cpp' files which appear in the SOURCES variable? I think the best solution would be to use that 'filter' statement in the target's prerequisite. I think this should be possible using secondary expansion, but I don't know what to do with the '%'. For example, I tried</p>
  
  <pre><code> .SECONDEXPANSION:
  $(OBJDIR)/%.o : $$(filter %/$$*.cpp, $(SOURCES))
  </code></pre>
  
  <p>but that doesn't work.</p>
  
  <hr>
  
  <p><strong>UPDATE</strong>: With the help of tripleee, I managed to get this working using the following:</p>
  
  <pre><code>define make-deps
  $(OBJDIR)/$(notdir $(1:%.cpp=%.o)): $1
  endef
  
  $(foreach d, $(SOURCES), $(eval $(call make-deps,$d)))
  
  %.o : 
      @echo Should compile $^ into $@
      @echo Compiling $^
  </code></pre>