title: How to include a makefile into an other makefile?
body: <p>I have some C++ classes, every one into his own folder with a makefile, test.cpp for testing purpose, etc.</p>
  
  <pre><code>Main folder
   |-&gt; Class1 folder
   |-&gt; Class2 folder
        |-&gt; Class2.1 folder
   |-&gt; Class2 folder
  </code></pre>
  
  <p>I have a main project, that must include these classes. I am trying to include all sub-makefiles into the main makefile.</p>
  
  <p>I have tried with "INCLUDE POO/makefile", but this solution has 2 problems:</p>
  
  <ul>
  <li>The path of the sub-makefiles is incorrect, so files are not found ("There is not rule to build the target 'Vector3D.cpp'").</li>
  <li>The "test.cpp" file is overrided, probably because of the path problem.("warning: overriding recipe for target ...")</li>
  </ul>
  
  <p>I would like all makefile independent, so I can copy/paste the class folder into a new project and it still working, or I may exec the makefile alone without changes on it.</p>
  
  <p>So the question is: How to include (correctly) a makefile into another makefile?</p>
  
  <p><strong>Example, just for test purpose.</strong></p>
  
  <p>Main makefile (simplified)</p>
  
  <pre><code>include Vector3D/makefile
  include Color/makefile
  
  CPP      = g++
  CXXFLAGS = $(CXXINCS) -Wall -O0
  
  all: main
  
  main: main.o Vector3D.o Color.o
      $(CPP) main.o Vector3D.o Color.o -o main
  
  main.o: main.cpp
      $(CPP) -c main.cpp -o main.o $(CXXFLAGS)
  </code></pre>
  
  <p>Sub-makefile example (simplified)</p>
  
  <pre><code>#Vector3D
  CPP      = g++
  CXXFLAGS = $(CXXINCS) -Wall -O0
  
  
  all: test
  
  test: Vector3D.o test.o
      $(CPP) Vector3D.o test.o -o test
  
  Vector3D/test.o: test.cpp
      $(CPP) -c test.cpp -o test.o $(CXXFLAGS)
  
  Vector3D.o: Vector3D.cpp Vector3D.hpp
      $(CPP) -c Vector3D.cpp -o Vector3D.o $(CXXFLAGS)
  </code></pre>
  
  <p>Similar for Color/makefile than Vector3D.</p>