title: Why isn't MIPS BLT instruction implemented in hardware?
body: <p>I'd like to ask why the <code>BLT</code> instruction is not a part of MIPS ISA. Instead they actually make it a pseudo-instruction for assembly programmers. I just couldn't recognize the difference between <code>BLT</code> and <code>BLTZ</code> (which is a part of MIPS ISA) from hardware implementation point of view.</p>
  
  <p>By the way the book <em>"Computer Organization and Design"</em> says :</p>
  
  <blockquote>
    <p>Heeding von Neumann's warning about the simplicity of the "equipment" the MIPS architecture doesn't include branch on less than because it's too complicated either it would stretch the clock cycle time or it would take extra clock cycles per instruction, the two faster instructions are more useful.</p>
  </blockquote>
  
  <p>But I still have no idea why those might happen.</p>