title: Converting logic gates to a purely NAND implementation, how come this is valid?
body: <p>So Im doing some exercises with answers provided on conversion to a purely NAND gate implementation.</p>
  <p><img src="https://i.stack.imgur.com/3RIrO.jpg" alt="enter image description here" /></p>
  <p>I understand how the 2 AND gates and the OR gate connecting them were converted, by double negation but <strong>how come the OR gate connecting <em>b</em> and <em>c</em> can be converted to a NAND gate? (how can you just put a negation on b and c without double negating it?)</strong> i dont understand how it could still be equal to the previous implementation.</p>