title: Vivado, Add Interrupts to Custom AXI Perh
body: <p>I am migrating to using Vivado and want to add interupt generation to my custom AXI perph. In ISE I have previously done this by using one of the templates given in the AR records (<a href="http://www.xilinx.com/support/answers/51138.htm" rel="nofollow">http://www.xilinx.com/support/answers/51138.htm</a>). What is the best way to achieve this in Vivado?, do I need to add the interupt signal port and controller IP into the AXI perph in a similar manner?</p>
  
  <p>Just to clarify with a simple example of what I want to acheive:
  1) Send two numbers to the AXI perph
  2) Does some operation (i.e. add) and puts the result in the result register
  3) An interupt is generated in the perh to tell the CPU the result is ready.</p>
  
  <p>The documentation is very sparse on this topic</p>
  
  <p>So far I have enabled the Core0-nIRQ port on the Zynq system, I just don't know the intermediate steps to interface with this port, from the custom AXI perh. </p>
  
  <p>Sam</p>