title: Some confused regarding to Rust memory order
body: <p>I have some questions regarding to Rust memory barrier, let's have a look about this <a href="https://riptutorial.com/rust/example/21259/atomics-and-memory-ordering" rel="nofollow noreferrer">example</a>, based on the example, I made some changes:</p>
  <pre class="lang-rust prettyprint-override"><code>use std::cell::UnsafeCell;
  use std::sync::atomic::{AtomicUsize, Ordering};
  use std::sync::{Arc, Barrier};
  use std::thread;
  
  struct UsizePair {
      atom: AtomicUsize,
      norm: UnsafeCell&lt;usize&gt;,
  }
  
  // UnsafeCell is not thread-safe. So manually mark our UsizePair to be Sync.
  // (Effectively telling the compiler &quot;I'll take care of it!&quot;)
  unsafe impl Sync for UsizePair {}
  
  static NTHREADS: usize = 8;
  static NITERS: usize = 1000000;
  
  fn main() {
      let upair = Arc::new(UsizePair::new(0));
  
      // Barrier is a counter-like synchronization structure (not to be confused
      // with a memory barrier). It blocks on a `wait` call until a fixed number
      // of `wait` calls are made from various threads (like waiting for all
      // players to get to the starting line before firing the starter pistol).
      let barrier = Arc::new(Barrier::new(NTHREADS + 1));
  
      let mut children = vec![];
  
      for _ in 0..NTHREADS {
          let upair = upair.clone();
          let barrier = barrier.clone();
          children.push(thread::spawn(move || {
              barrier.wait();
  
              let mut v = 0;
              while v &lt; NITERS - 1 {
                  // Read both members `atom` and `norm`, and check whether `atom`
                  // contains a newer value than `norm`. See `UsizePair` impl for
                  // details.
                  let (atom, norm) = upair.get();
                  if atom != norm {
                      // If `Acquire`-`Release` ordering is used in `get` and
                      // `set`, then this statement will never be reached.
                      println!(&quot;Reordered! {} != {}&quot;, atom, norm);
                  }
                  v = atom;
              }
          }));
      }
  
      barrier.wait();
  
      for v in 1..NITERS {
          // Update both members `atom` and `norm` to value `v`. See the impl for
          // details.
          upair.set(v);
      }
  
      for child in children {
          let _ = child.join();
      }
  }
  
  impl UsizePair {
      pub fn new(v: usize) -&gt; UsizePair {
          UsizePair {
              atom: AtomicUsize::new(v),
              norm: UnsafeCell::new(v),
          }
      }
  
      pub fn get(&amp;self) -&gt; (usize, usize) {
          let atom = self.atom.load(Ordering::Acquire); //Ordering::Acquire
  
          // If the above load operation is performed with `Acquire` ordering,
          // then all writes before the corresponding `Release` store is
          // guaranteed to be visible below.
  
          let norm = unsafe { *self.norm.get() };
          (atom, norm)
      }
  
      pub fn set(&amp;self, v: usize) {
          unsafe { *self.norm.get() = v };
  
          // If the below store operation is performed with `Release` ordering,
          // then the write to `norm` above is guaranteed to be visible to all
          // threads that &quot;loads `atom` with `Acquire` ordering and sees the same
          // value that was stored below&quot;. However, no guarantees are provided as
          // to when other readers will witness the below store, and consequently
          // the above write. On the other hand, there is also no guarantee that
          // these two values will be in sync for readers. Even if another thread
          // sees the same value that was stored below, it may actually see a
          // &quot;later&quot; value in `norm` than what was written above. That is, there
          // is no restriction on visibility into the future.
  
          self.atom.store(v, Ordering::Release); //Ordering::Release
      }
  }
  </code></pre>
  <p>Basically, I just changed the judge condition into <code>if atom != norm</code> and the memory order in <code>get</code> and <code>set</code> method.</p>
  <p>According to what I have learned so far, all the memory operations(1. doesn't require that these memory operations are operating on the same memory location, 2. no matter it is an atomic operation or normal memory operation) happens before a <code>store Release</code>, will be visible to the memory operation after a <code>load Acquire</code>.</p>
  <p>I don't get why <code>if atom != norm</code> is not always true? Actually, from the comments in the <a href="https://riptutorial.com/rust/example/21259/atomics-and-memory-ordering" rel="nofollow noreferrer">example</a>, it does point out that:</p>
  <blockquote>
  <p>However, no guarantees are provided as to when other readers will witness the below store, and consequently the above write. On the other hand, there is also no guarantee that these two values will be in sync for readers. Even if another thread sees the same value that was stored below, it may actually see a &quot;later&quot; value in <code>norm</code> than what was written above. That is, there is no restriction on visibility into the future.</p>
  </blockquote>
  <p>Can someone explain to me why <code>norm</code> can see some &quot;future value&quot;?</p>
  <p>Also in <a href="https://en.cppreference.com/w/cpp/atomic/atomic_thread_fence" rel="nofollow noreferrer">this c++ example</a>, is it the same reason that causes these statements in code?</p>
  <blockquote>
  <p>v0, v1, v2 might turn out to be -1, some, or all of them.</p>
  </blockquote>