title: How to define a custom cell for netlist synthesis?
body: <p>I am currently working on a CPU design in which I want to compare different microarchitectures in means of power, speed and area. These microarchitectures differ only by instantiation of different components, e.g. differently implemented ALUs or register files. Some of these components are rather complex and not available to me in form of HDL code. So the idea is to instantiate them as blackboxes in the HDL code and let the synthesis tool (Synopsys Design Compiler) map these to self-defined cells to attain the netlist.</p>
  
  <p>Now, the question is: How do I self-define cells to use in the synthesis? Of course, I have a standard cell library available, so I only need to "add" those few extra cells to the link library. I could not find a way to define them inside the DC shell. So I suppose that I have to write an extra liberty file to load and link to.</p>
  
  <p>Is there a way to define a liberty file where I do not have to worry about header stuff, such as as process parameters, and only need to define the desired cells and "add" those to the existing library so that it automatically presumes all the process parameters as specified in the standard cell library?</p>
  
  <p>I assume this is not too uncommon to want to do for simulation purposes when no tapeout is planned. I just couldn't find any useful information online or in the user guide. I would be glad if someone could point me to the right direction.</p>