title: About struct in system-verilog?
body: <p>I got vcs compile error when adding function in declaration of struct. The IEEE doc does not mention if function in struct is allowed.</p>
  
  <p>I also got vcs compile error when trying to assign a default value to a field. But it is allowed in <a href="http://standards.ieee.org/getieee/1800/download/1800-2012.pd" rel="nofollow">IEEE-1800-2012</a> 7.2.2.</p>
  
  <pre><code>typedef struct {
          int a = 1; //compile error here
          int b;
          function void func();
                   b = a;
          endfunction
   } a_struct;
  </code></pre>
  
  <p>So I add the command line and error info as suggested:</p>
  
  <pre><code>vcs -sverilog a.sv
  
  Error-[V2KIIAD] Invalid initialization at declaration
  ....
  Struct or union member field 'a' cannot be initialized at declaration.
  
  Error-[SE] Syntax error
    Following verilog source has syntax error :
    "a.sv", 4: token is 'function'
       function void func();
               ^
  </code></pre>
  
  <p>And my vcs version is 2013.06-SP1-10</p>