title: How can I undefine variable in a Makefile via command line
body: <p>I want to undefine a variable from a Makefile via passing a command to make. Is this possible? Man make didn't help that much.</p>
  
  <p>What I want to do the following:</p>
  
  <p>I want to compile a port with FreeBSD. This port is marked as <code>broken</code>. Though I don't have the permissions to change the Makefile I am looking for possibility to undefine the <code>broken</code>? variable.</p>
  
  <p>Edit:
  In the Makefile is:</p>
  
  <pre><code>BROKEN=                 does not link
  </code></pre>
  
  <p>And I want to unset/undefine broken. Because the Makefile is not executed further. This is not related to compiler flags so far.</p>