title: Error: "(vlog-2110) Illegal reference to net"
body: <p>I have a simple fifo code in System Verilog.  I get several <code>vlog-2110 illegal reference to net</code> error messages.  I looked at the previous stackoverflow guidelines and did not see anything wrong with what I am doing.  Please help!!!</p>
  
  <p>I am giving below my error messages followed by my code. I will be much obliged. Thank you for your time.</p>
  
  <p>Error messages:</p>
  
  <blockquote>
    <p>vlog -work work -sv -stats=none C:/Users/Single_FIFO.sv
    Model Technology ModelSim DE vlog 10.4 Compiler 2014.12 Dec  3 2014
    -- Compiling module fifo_core_and_cntl
    <br>Error: C:/Users/Single_FIFO.sv(24): (vlog-2110) Illegal reference to net "occucy".
    <br>Error: C:/Users/Single_FIFO.sv(26): (vlog-2110) Illegal reference to net "empty".
    <br>Error: C:/Users/Single_FIFO.sv(28): (vlog-2110) Illegal reference to net "empty".
    <br>Error: C:/Users/Single_FIFO.sv(30): (vlog-2110) Illegal reference to net "full".
    <br>Error: C:/Users/Single_FIFO.sv(32): (vlog-2110) Illegal reference to net "full".
    ......
    ......</p>
  </blockquote>
  
  <p>My simple fifo code: the small offending portion of it, is shown below.</p>
  
  <pre><code>module fifo_core_and_cntl (data_in, data_put, data_get, clk, reset_n, data_out, occucy, empty, full); 
    input [7:0]data_in;
    input data_put, data_get, clk, reset_n;
    output [7:0]data_out;
    output empty, full;
    output [4:0]occucy;
    logic [4:0]current_readptr, current_writeptr, next_readptr, next_writeptr;
    logic [15:0][7:0]data_fifo;   // This is data Fifo: 2D packed array of vectors: sixteen 8 bit vectors.
  
    always_ff @ (posedge clk, negedge reset_n) // For the Current counter updates.
      if (!reset_n)
      begin   
        current_writeptr &lt;= 0;
        current_readptr &lt;= 0;
      end
      else
      begin
        current_writeptr &lt;= next_writeptr;    
        current_readptr &lt;= next_readptr;
      end
    end
  
    always_comb begin  // Combo logic for fifo status outputs and also for internal fifo rd/wr pointer updates.
      occucy = current_writeptr - current_readptr;     // fifo occupancy indication
      if (current_writeptr == current_readptr)
        empty = 1'b1;
      else
        empty = 1'b0;
    end
  endmodule
  </code></pre>