title: clock implementation using forever in verilog
body: <p>I am implementing a sequential circuit in verilog . I want a clock of time period 10 . For implementing that I have done something like </p>
  
  <pre><code> initial begin
         forever begin
              clk=0;
              #5
              clk=1;
              #5
              clk=0;
         end
     end 
  </code></pre>
  
  <p>But when I run the code , it keeps on running without showing any output. Is there any error in above implementation?</p>