title: Holding an action in VHDL
body: <p>I want to create a project with Quartus II and its function is to enable three different leds deppending on a code. When you are entering the code, the first led will be ON. Depending on the code entered, the second or the third will be ON. My problem is, when the code is correct I want the second led to be ON 3 seconds, and if it's incorrect, the third led will be ON during 2 seconds. It would be great if you help me.</p>
  
  <p>Thank you!</p>
  
  <p>Notes: leds are declared as a Logic Vector and the numbers of the code are declared as interrup from 0 to 7.</p>
  
  <p>Code:</p>
  
  <pre><code>library IEEE;
  use IEEE.STD_LOGIC_1164.ALL;
  ENTITY programa IS
  PORT
  (
  interrup : in Std_Logic_Vector (7 downto 0);
  clk, rst: in Std_Logic;
  led : out Std_Logic_Vector (2 downto 0)
  );
  END programa;
  ARCHITECTURE arch_programa OF programa IS
      type state is (zero, one, two, three, four, five, six);
      signal pr_state, nx_state : state;
      signal A : Std_Logic_Vector (3 downto 0);
  BEGIN
      process(interrup, pr_state)
      begin
          case pr_state is
              when zero =&gt;
                  led &lt;= "100";
                  A(0) &lt;= interrup(7);
                  nx_state &lt;= one;
              when one =&gt;
                  led &lt;= "100";
                  A(1) &lt;= interrup(6);
                  nx_state &lt;= two;
              when two =&gt;
                  led &lt;= "100";
                  A(2) &lt;= interrup(5);
                  nx_state &lt;= three;
              when three =&gt;
                  led &lt;= "100";
                  A(3) &lt;= interrup(3);
                  nx_state &lt;= four;
              when four =&gt;
                  led &lt;= "100";
                  if(A = "1111") then nx_state &lt;= five;
                  else nx_state &lt;= six;
                  end if;
              when five =&gt;
                  led &lt;= "010";
                  nx_state &lt;=zero;
              when six =&gt;
                  led &lt;= "001";
                  nx_state &lt;=zero;
              end case;
      end process;
  
      process(rst,clk)
      begin
          if(rst='1') then
              pr_state &lt;= zero;
          elsif (clk'event and clk = '1') then
              pr_state &lt;= nx_state;
          end if;         
      end process;
  
  end arch_programa;
  </code></pre>