title: GNU make: Multiple targets in a single rule
body: <blockquote>
    <p><strong>Possible Duplicate:</strong><br>
    <a href="https://stackoverflow.com/questions/2973445/gnu-makefile-rule-generating-a-few-targets-from-a-single-source-file">GNU Makefile rule generating a few targets from a single source file</a>  </p>
  </blockquote>
  
  
  
  <p>If I have a Makefile rule like this:</p>
  
  <pre><code>a b c:
      echo "Creating a b c"
      touch a b c
  
  output: a b c
      cat a b c &gt; output
  </code></pre>
  
  <p>and I run <strong>make -j9 output</strong></p>
  
  <p>make sees the 3 dependencies (a,b,c), looks for how to produce them: (the "a b c" rule above), but what happens next? Should it not realize that the "a b c" rule only needs to be run once to create all 3 targets?</p>
  
  <p>This is what make actually does:</p>
  
  <pre><code>[pavel@orianna test]$ make -j9 output -n
  echo "Creating a b c"
  touch a b c
  echo "Creating a b c"
  touch a b c
  echo "Creating a b c"
  touch a b c                                                                                                                                                                                                                                                                    
  cat a b c &gt; output                                                                                                                                                                                                                                                             
  [pavel@orianna test]$
  </code></pre>
  
  <p>The same recipe is run <strong>3 times</strong>, once for each dependency to rule "output"!</p>
  
  <p>Does anyone know why it behaves this way?</p>