title: How to Embed Systemverilog Interpreter using DPI-C?
body: <p><strong>Problem Description</strong>:</p>
  
  <p>I design in SystemVerilog and write the testbenches in the same language. I want to be able to compile my design and test different functions during simulation in the way you would using an interpreter with e. Ideally, I would have a terminal pop-up upon simulation when the simulator hit some line.</p>
  
  <p><strong>Potential Ideas</strong>:</p>
  
  <p>I've looked at the DPI-C and it seems like I would have to "export" all tasks in my project in order to run them from the interpreter. However, I'm not sure how to do this automatically or if there's a better way. Furthermore, I have no idea how I would get C to open up a second shell for me to type the SystemVerilog tasks in (that I would want to run).</p>
  
  <p>This is a problem echoes by my colleagues and it would make life a lot less painful to not have to wait 10 minutes between compiling just a testbench.</p>