title: Rotate left verilog case
body: <p>My task is to write a 16 bit ALU in verilog.  I found difficulties when I do the part that needs to rotate the operand and doing the 2's complement addition and subtraction.  I know how to work that out by paper and pencil but i cant figure out ways to do it in Verilog.
  for example:
  A is denoted as a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0
  if i am going to rotate 4 bits,
  the answer would be 
  a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 a15 a14 a13 a12</p>
  
  <p>i tried concatenation but it turns out to be incorrect.
  need you all help...</p>