title: Verilog Calculator w/ 16 bit signed inputs
body: <p>I need to build a calculator that takes 2 signed 16 bit numbers (in1, in2) and preforms functions on them depending on the opCode (a 4 bit input). The outputs should be a signed 16 bit number named 'result' and one bit 'overflow'</p>
  
  <p>I really need help fixing my code. It's not working and I'm not sure what I'm doing wrong. </p>
  
  <p>opCode</p>
  
  <ol>
  <li>0000.....Add in1 and in2</li>
  <li>0001.....subtract in1-in2</li>
  <li>0010.....divide in1 by ten with remainder of 1 or zero (use modulus operator)</li>
  <li>0011.....bitwise AND in1 in2</li>
  <li>0100.....bitwise xOR in1 |in2</li>
  <li>0101.....complement in1</li>
  <li>0110.....bitwise OR in1 in2</li>
  <li>0111.....complement in1</li>
  <li>1000.....increment in1 by 1</li>
  <li><p>1001....decrement in1 by 1</p>
  
  <pre><code>module calculator(
      input [15:0] in1,
      input [15:0] in2,
      input [3:0] opCode,
      output [15:0]
      );
      reg [3:0] opCode;
      reg [15:0] in1;
      reg [15:0] in2;
      reg [15:0] result;   
      reg overflow;
  
  
  always @ (opcode) begin 
      if (opCode == 0000) begin // add in1+in2
          result=in1+in2; 
                        $display("opCode(%b),in1(%d),in2(%d),result(%d),overflow(%b)", opCode, in1, in2, result, overflow);
              $monitor("opCode(%b),in1(%d),in2(%d),result(%d),overflow(%b)", opCode, in1, in2, result, overflow);
       end
      if (opCode == 0001) begin   //subtract in1-in3
       result=in1-in2; 
              $display("opCode(%b),in1(%d),in2(%d),result(%d),overflow(%b)", opCode, in1, in2, result, overflow);
              $monitor("opCode(%b),in1(%d),in2(%d),result(%d),overflow(%b)", opCode, in1, in2, result, overflow);
               end
  
  
      if (opCode == 0011) begin   //divide int1 by 10 w/ remainder as overflow
       result=in1%10; 
              $display("opCode(%b),in1(%d),result(%d),overflow(%b)", opCode, in1, result, overflow);
              $monitor("opCode(%b),in1(%d),result(%d),overflow(%b)", opCode, in1, result, overflow);
               end
  
  
      if (opCode == 0100) begin   //preforms AND operation in1 in2
       result=in1&amp;int2; 
              $display("opCode(%b),in1(%d),in2(%d),result(%d),overflow(%b)", opCode, in1,in2, result, overflow);
              $monitor("opCode(%b),in1(%d),in2(%d),result(%d),overflow(%b)", opCode, in1,in2, result, overflow);
               end
  
  
      if (opCode == 0101) begin   //preforms XOR operation in1 in2
       result=in1^int2; 
              $display("opCode(%b),in1(%d),in2(%d),result(%d),overflow(%b)", opCode, in1,in2, result, overflow);
              $monitor("opCode(%b),in1(%d),in2(%d),result(%d),overflow(%b)", opCode, in1,in2, result, overflow);
               end
  
  
      if (opCode == 0110) begin   //preforms OR op on in1 in 2
       result=in1|int2; 
              $display("opCode(%b),in1(%d),in2(%d),result(%d),overflow(%b)", opCode, in1,in2, result, overflow);
              $monitor("opCode(%b),in1(%d),in2(%d),result(%d),overflow(%b)", opCode, in1,in2, result, overflow);
               end
  
  
      if (opCode == 0111) begin   //complement of in1
       result=!in1; 
              $display("opCode(%b),in1(%d),result(%d),overflow(%b)", opCode, in1, result, overflow);
              $monitor("opCode(%b),in1(%d),result(%d),overflow(%b)", opCode, in1, result, overflow);
               end
  
  
      if (opCode == 1001) begin   //increase in1 by 1
       result=in1+1; 
              $display("opCode(%b),in1(%d),result(%d),overflow(%b)", opCode, in1, result, overflow);
              $monitor("opCode(%b),in1(%d),result(%d),overflow(%b)", opCode, in1, result, overflow);
               end
  
  
      if (opCode == 1000) begin   //decrease in2 by 1
       result=in2-1; 
              $display("opCode(%b),in2(%d),result(%d),overflow(%b)", opCode, in2, result, overflow);
              $monitor("opCode(%b),in2(%d),result(%d),overflow(%b)", opCode, in2, result, overflow);
               end
  
  
  end
   end
   endmodule
  
  
   endmodule
  </code></pre></li>
  </ol>