title: systemverilog comparing two ways to wait signal; 1) @( clock iff condition), 2) while( ! condition) @(clock);
body: <p>I am looking for some intuitive understanding of systemverilog method of waiting for certain signal on the interface for 1) capturing transaction in a monitor, or 2) driving a transaction in response to some signal from DUT. Let's assume that DUT is asserting ready signal and driver has to drive two data beats (values of 1 and 2) back to back while asserting valid signal so that DUT would know when to capture data. </p>
  
  <p>There are two methods of waiting for  the ready single from the DUT that I know of; 1) one is iff conditioned clock event, and the other is 2) consuming clock while some signal is not true (e.g., ready is low). The testbench code can be found <a href="https://www.edaplayground.com/x/39DD" rel="nofollow noreferrer">EDA playground (line 37 of my_driver.sv)</a>.</p>
  
  <p>The first method is using <code>@(posedge dut_vif.clock iff(dut_vif.ready ==  1));</code> 
  and the second method is using <code>while( ! dut_vif.ready) @(posedge dut_vif.clock);</code> and there is single clock difference between two methods as shown in the waveform. My best understanding is -- </p>
  
  <p><code>@(posedge dut_vif.clock iff(dut_vif.ready ==  1));</code></p>
  
  <p>This method is waiting for the clock rise event 'on the condition' of ready == 1. Therefore, data and valid are driven high on 25ns. </p>
  
  <p><code>while( ! dut_vif.ready) @(posedge dut_vif.clock);</code></p>
  
  <p>On the other hand, this statement means that simulation should consume clock while ready is low. However this interpretation and the actual behavior of systemverilog is very different. At 15ns, ready signal goes high and the valid and data are driven at the same cycle. My understanding is that at 15ns, the ready should be still captured as low by the testbench, and simulation should consume one clock. Therefore, the second method should behave just like the first method.</p>
  
  <p>Can I get some interpretation on how to make sense of this difference? </p>
  
  <p>I am  attaching waveform here. </p>
  
  <p><a href="https://i.stack.imgur.com/VLd6k.png" rel="nofollow noreferrer"><img src="https://i.stack.imgur.com/VLd6k.png" alt="waveform comparison of two methods"></a></p>