title: Out of tree kernel modules: Multiple module, single Makefile, same source file, different build options
body: <p>I am building a set of Linux kernel modules using shared source code. From what I understand, the Makefile has to be named "Makefile" so I have to use the same Makefile to build two different modules. How can I build two different modules, within the same Makefile, with the same source code, but with two different build options?</p>
  
  <p>For example, my modules are called module1 and module2. So I have the following line to define them:</p>
  
  <pre><code>obj-m := module1.o module2.o
  </code></pre>
  
  <p>Among other files, both module1 and module2 need to use the same source file <code>code.c</code>, but built with different build options. So say for example, the Makefile contains the following lines:</p>
  
  <pre><code>module1-objs = module1_code.o other_code.o
  module2-objs = module2_code.o other_code.o
  </code></pre>
  
  <p>I want <code>module1_code.o</code> and <code>module2_code.o</code> to be built from code.c, but with different options. Specifically, I want one <code>module1_code.o</code> with a macro defined <code>-DPREPROCEFFOR_FLAG=1</code>, and <code>module2_code.o</code> built without the macro.</p>
  
  <p>From what I understand, the system of Makefiles used in Linux implicitly infers that for an object file called "code.o", the source file is called "code.c", so how would I achieve this? Is is possible? Is there a better way to do this?</p>