title: Can Verilog testbenches work with a real clock?
body: <p>I wrote a counter in Verilog, and then a testbench to test it. My testbench gives the correct results, so my code is OK. But is it gives the result of a long time instantly. </p>
  
  <p>Is it possible to take the result with real time. I mean in every one second my testbench will produce a new line of result?? (and if it is possible how?)</p>