title: VHDL _ TO_INTEGER
body: <p>I'm confused about a problem I have in VHDL.</p>
  
  <p>I make one <code>VGA_display_ characters</code>, so I wanna convert some <code>std_logic_vectors</code> into integer by <code>to_integer</code> unsigned, then I wanna recuperate, 
  in this way I can't use those libraries in the same time.</p>
  
  <p><code>ieee.std_logic_arith.all</code> and <code>ieee.numeric_std.all</code>
  The error given by quartus:</p>
  
  <blockquote>
    <p>(Error (10621): VHDL Use Clause error at interface.vhd(34): more than one Use Clause imports a declaration of simple name "unsigned" -- none of the declarations are directly visible
    Error (10784): HDL error at syn_arit.vhd(26): see declaration for object "unsigned"
    bellow my code : </p>
  </blockquote>
  
  <p><a href="https://i.stack.imgur.com/tGf4h.png" rel="nofollow noreferrer">to_integer</a></p>
  
  <p><a href="https://i.stack.imgur.com/aeC8g.png" rel="nofollow noreferrer">conv_std_logic_vector</a></p>