title: any cpu implement instruction prefetch both branch of a branch instruction
body: <p>As mainstream cpu use instruction prefetch to enhance their performance,</p>
  <p>what I wonder is can any cpu prefetch both branch of an branch-instruction</p>
  <p>so that if the predication failure, we can ensure the instruction already in iCache.</p>
  <p>as a example:</p>
  <pre><code>L_main:
    ...
    add 10, %rax
    cmp %rax, %rbx
    je  L10
    add 20, %rbx
    ...
  L10:
    add 20, %rcx
    ...
  </code></pre>
  <p>instruction-prefetcher can prefetch both instruction at <strong>L10</strong> and after <strong>je L10</strong>.</p>