title: CPU and Data alignment
body: <p>Pardon me if you feel this has been answered numerous times, but I need answers to the following queries!</p>
  
  <ol>
  <li><p>Why data has to be aligned (on 2-byte / 4-byte / 8-byte boundaries)? Here my doubt is when the CPU has address lines Ax Ax-1 Ax-2 ... A2 A1 A0 then it is quite possible to address the memory locations sequentially. So why there is the need to align the data at specific boundaries?</p></li>
  <li><p>How to find the alignment requirements when I am compiling my code and generating the executable?</p></li>
  <li><p>If for e.g the data alignment is 4-byte boundary, does that mean each consecutive byte is located at modulo 4 offsets? My doubt is if data is 4-byte aligned does that mean that if a byte is at 1004 then the next byte is at 1008 (or at 1005)?</p></li>
  </ol>