title: What are the "long" and "short" scoreboards w.r.t. MIO/L1TEX?
body: <p>With recent NVIDIA micro-architectures, there's a new (?) <a href="https://docs.nvidia.com/nsight-compute/ProfilingGuide/index.html#statistical-sampler" rel="noreferrer">taxonomy</a> of warp stall reasons / warp scheduler states.</p>
  <p>Two of the items in this taxonomy are:</p>
  <ul>
  <li><strong>Short scoreboard</strong> - scoreboard dependency on an MIO queue operation.</li>
  <li><strong>Long scoreboard</strong> - scoreboard dependency on an L1TEX operation.</li>
  </ul>
  <p>where, I presume, &quot;scoreboard&quot; is used the sense of out-of-order execution data dependency tracking (see e.g. <a href="https://en.wikipedia.org/wiki/Scoreboarding" rel="noreferrer">here</a>).</p>
  <p>My questions:</p>
  <ul>
  <li>What do the adjectives &quot;short&quot; or &quot;long&quot; describe? Is it the length of a single scoreboard? Two different scoreboards for the two different kinds of operations?</li>
  <li>What's the meaning of this somewhat non-intuitive dichotomy between MIO - some, but not all of which are memory operations; and L1TEX operations, which are all memory operations? Is it a dichotomy w.r.t. stall reasons only or is it about actual hardware?</li>
  </ul>