title: Makefile: Adding a single *.h dependency for multiple executables
body: <p>There are many "Makefile" examples for multiple executables. 
  After a lot of trials and errors, I found this is following as the simplest one.</p>
  
  <pre><code>CC      = gcc
  SOURCES = $(wildcard *.c)
  EXECS   = $(SOURCES:%.c=%)
  
  .PHONY: all clean
  
  all: $(EXECS)
  
  clean:
      rm -f $(EXECS)
  
  </code></pre>
  
  <p>However, I could not find any simple example for including one "include.h" dependency for all those programs.  Please, could anybody show me?</p>
  
  <p>JW.</p>
  
  <p>PS:</p>
  
  <ul>
  <li><p>I have no idea about this <a href="https://stackoverflow.com/questions/40832230/generic-makefile-with-automatic-make-dependencies-for-multiple-executables">example</a>.</p></li>
  <li><p>Thanks to @MadScientist, the answer is:</p></li>
  </ul>
  
  <pre><code>CC      = gcc
  SOURCES = $(wildcard *.c)
  EXECS   = $(SOURCES:%.c=%)
  
  .PHONY: all clean
  
  all: $(EXECS)
  
  $(EXECS): include.h
  
  clean:
      rm -f $(EXECS)
  </code></pre>