title: for-loops in function
body: <p>I have some questions about timing in verilog when using a for-loop in a function. </p>
  
  <ol>
  <li><p>How do I estimate the clock cycles needed to execute a function in which a for-loop is operating?</p></li>
  <li><p>And how can I estimate the clock time needed for one for-loop iteration.</p></li>
  <li><p>Does a function works something like an interrupt. For example: If I call a function in sequential logic, than everything is halted until the function finishes?</p></li>
  </ol>
  
  <p>[Update]
  Here is some more information about for what I'm using the for-loops exactly.</p>
  
  <pre><code>integer n;
  
   always@(posedge CLK)
       if(IN)              // some input wire IN   
         begin
           n = n + 1;
           Result[31:0] &lt;= Approx(n); //put Result from Approx into output reg Result
         end
  
   function [31:0] Approx
      input n;
       integer n;
       real fp;  //some real number to store the approximation result
      begin
        for(integer i=0; i &lt; 2**16; i=i+1) 
           begin
         ... // do Approximation within fixed iteration steps
         ... // Result is a floating point number
           end
       Approx[31:0] = convert_fp_to_bin(fp); //another function with for-loop to convert decimal number into binary number
      end
       ....
  </code></pre>