title: Can you directly access the cache using assembly?
body: <p>Caching is a core thing when it comes to efficiency.</p>
  <p>I know that caching usually happens automatically.</p>
  <p>However, I'd like to control cache usage myself, because I think that I can do better than some heuristics that don't know the exact program.</p>
  <p>Therefore I would need assembly instructions to directly move to or from cache memory cells.</p>
  <p>like:</p>
  <pre><code>movL1 address content
  </code></pre>
  <p>I know that there are some instructions that give the &quot;caching system&quot; hints, but I'm not sure if that's enough because the hints could be ignored or they maybe aren't sufficient to express anything expressable by such a move to/from cache order.</p>
  <p>Are there any assemblers that allow for complete cache control?</p>
  <p>Side note: why I'd like to improve caching:</p>
  <p>consider a hypothetical CPU with 1 register and a cache containing 2 cells.</p>
  <p>consider the following two programs:</p>
  <p>(where x,y,z,a are memory cells)</p>
  <pre><code>&quot;START&quot;
  &quot;move 1 to x&quot;
  &quot;move 2 to y&quot;
  &quot;move 3 to z&quot;
  &quot;move 4 to a&quot;
  &quot;move z to x&quot;
  &quot;move y to x&quot;
  &quot;END&quot;
  
  &quot;START&quot;
  &quot;move 1 to x&quot;
  &quot;move 2 to y&quot;
  &quot;move 3 to z&quot;
  &quot;move 4 to a&quot;
  &quot;move a to x&quot;
  &quot;move y to x&quot;
  &quot;END&quot;
  </code></pre>
  <p>In the first case, you'd use the register and the cache for x,y,z (a is only written to once)
  In the second case, you'd use the register and the cache for a,x,y (z is only written to once)</p>
  <p>If the CPU does the caching, it simply can't decide ahead of time which of the two above cases it's facing.</p>
  <p>It has to decide for each of the memory cells x,y,z if its contents should be cached before it knows if the program executed, is no. 1 or no. 2, because both programs start out the same.</p>
  <p>The programmer on the other hand knows ahead of time which memory cells are reused, and when they are reused.</p>