title: How to achieve opencl kernel pipeline
body: <p>I am working on my project using OpenCl. In order to improve the performance of my algorithm, is it possible to pipeline a single kernel? If a kernel consists of many steps, lets say A,B,C, I want A accept new data as soon as it finish its part and pass it to B.  I can create channels between them, but I dont know how to do it in detail. </p>
  
  <p>Can I write A,B,C(3 kernels) in a .cl file ? but how to enqueueNDRange?
  I am using Altera SDK for FPGA HPC development.
  Thanks.</p>