title: GNU Make. Variables with a scope limited to a single Makefile
body: <p>I try to implement a non-recursive make build system in my current project. What I struggle with is variables scopes. Target specific variables don't fit my needs as often variables define targets and not prerequisites. 
  What I need is:</p>
  
  <p>Makefile1:</p>
  
  <pre><code>SOMEVAR := original_value
  include Makefile2
  $(warning $(SOMEVAR))
  </code></pre>
  
  <p>Makefile2:</p>
  
  <pre><code>#some magic here to do what I want and make me happy
  SOMEVAR := included_value
  #and maybe here
  </code></pre>
  
  <p>And the output I want is 'original_value'.</p>
  
  <p>Are there any strategies to make it real?</p>
  
  <p>EDIT: The only solution I came for the moment is to force and organize myself to place all inlcudes in the end of each particular Makefile and use immediate variable assignment :=</p>