title: sequentially-consistent atomic load on x86
body: <p>I'm interested in sequentially-consistent load operation on x86.</p>
  
  <p>As far as I see from assembler listing, generated by compiler it is implemented as a plain load on x86, however plain loads as far as I know guaranteed to have acquire semantics, while plain stores are guaranteed to have release.</p>
  
  <p>Sequentially-consistent store is implemented as locked xchg, while load as plain load. That sounds strange to me, could you please explain this in details?</p>
  
  <p><strong>added</strong></p>
  
  <p>Just found in internet, that sequentially-consistent atomic load could be done as simple mov as long as store is done with locked xchg, but there was no proof and no links to documentation.</p>