title: How to properly clean in a Makefile?
body: <p>For small C/C++ projects I am used to write my clean target as follow:</p>
  
  <pre><code>clean:
      $(RM) *.o *~
  </code></pre>
  
  <p>For slightly bigger projects, when sources are dispatched in subdirectories, say <code>src1</code> and <code>src2</code>, I would write</p>
  
  <pre><code>clean:
      $(RM) src1/*.o src1/*~ src2/*.o src2/*~
  </code></pre>
  
  <p>With even more subdirectories, it quickly becomes messy… So I realized I could use the <code>find</code> command like this:</p>
  
  <pre><code>clean:
      find . -name "*.o" -exec $(RM) {} \;
      find . -name "*~"  -exec $(RM) {} \;
  </code></pre>
  
  <p>However I saw that people often use <code>find</code> in conjunction with <code>xargs</code> instead of using <code>-exec</code> and I wonder why since it seems to work fine…</p>
  
  <p><strong>What do you use and why?</strong></p>
  
  <p>I know that for big projects, or for better compatibility, I should probably use cmake or autotools but I like the simplicity of a Makefile for small projects.</p>