title: How to make a multiple-read/single-write lock from more basic synchronization primitives?
body: <p>We have found that we have several spots in our code where concurrent reads of data protected by a mutex are rather common, while writes are rare. Our measurements seem to say that using a simple mutex seriously hinders the performance of the code reading that data. So what we would need is a multiple-read/single-write mutex. I know that this can be built atop of simpler primitives, but before I try myself at this, I'd rather ask for existing knowledge: </p>
  
  <p><strong><em>What is an approved way to build a multiple-read/single-write lock out of simpler synchronization primitives?</em></strong></p>
  
  <p>I do have an idea how to make it, but I'd rather have answers unbiased by what I (probably wrongly) came up with. (Note: What I expect is an explanation how to do it, probably in pseudo code, not a full-fledged implementation. I can certainly write the code myself.) </p>
  
  <p><em>Caveats:</em>  </p>
  
  <ul>
  <li><p>This needs to have reasonable performance. (What I have in mind would require two lock/unlock operations per access. Now that might not be good enough, but needing many of them instead seems unreasonable.)  </p></li>
  <li><p>Commonly, reads are more numerous, but writes are more important and performance-sensitive than reads. Readers must not starve writers. </p></li>
  <li><p>We are stuck on a rather old embedded platform (proprietary variant of VxWorks 5.5), with a rather old compiler (GCC 4.1.2), and boost 1.52 – except for most of boost's parts relying on POSIX, because POSIX isn't fully implemented on that platform. The locking primitives available basically are several kind of semaphores (binary, counting etc.), on top of which we have already created mutexes, conditions variables, and monitors. </p></li>
  <li><p>This is IA32, single-core. </p></li>
  </ul>