title: What the role of a target in a Makefile?
body: <p>I was under an impression that the left hand side of the colon <code>:</code> represent <code>target</code> i.e. the executable file, and the right hand side represents 'dependencies', i.e. the files needed to produce the said target. </p>
  
  <pre><code>hello : hello.c
      gcc hello.c -Wall -o hello
  </code></pre>
  
  <p>So, I thought the target 'hello' is the name of the final executable file.</p>
  
  <pre><code>executableHelloWorldFile : hello.c
      gcc hello.c -Wall -o hello
  </code></pre>
  
  <p>but, when I changed 'hello' to 'executableHelloWorldFile', nothing changed in the output.</p>
  
  <p>I know how to create the target, <strong>but here I wish to understand that in what matters does a <code>target</code> help a Makefile?</strong></p>