title: How to avoid re-link in Makefile
body: <p>I wrote a simple makefile, and not able to avoid unnecessary re-linking </p>
  
  <pre><code>Target: foo1.o foo2.o
      LINK COMMAND
  
  .c.o:
      COMPILE command
  </code></pre>
  
  <p>Each time I try to <strong>make TARGET</strong>, even if no source files have been updated, the <strong>LINK</strong> command is always run.</p>
  
  <p>How can I avoid this unnecessary re-link ?</p>
  
  <p>Thanks,</p>