title: acquire/release memory ordering example
body: <p>I don't understand this sample from <a href="http://gcc.gnu.org/wiki/Atomic/GCCMM/AtomicSync" rel="nofollow">here</a> :</p>
  
  <p>" Assuming 'x' and 'y' are initially 0:</p>
  
  <pre><code>-Thread 1-
   y.store (20, memory_order_release);
  
   -Thread 2-
   x.store (10, memory_order_release);
  
   -Thread 3-
   assert (y.load (memory_order_acquire) == 20 &amp;&amp; x.load (memory_order_acquire) == 0)
  
   -Thread 4-
   assert (y.load (memory_order_acquire) == 0 &amp;&amp; x.load (memory_order_acquire) == 10)
  </code></pre>
  
  <p>Both of these asserts can pass since there is no ordering imposed between the stores in thread 1 and thread 2.</p>
  
  <p>If this example were written using the sequentially consistent model, then one of the stores must happen-before the other (although the order isn't determined until run-time), the values are synchronized between threads, and if one assert passes, the other assert must therefore fail. "</p>
  
  <p>Why in <code>acquire/release</code> two assert can pass?</p>