title: Interrupt handling (Linux/General)
body: <p>On the mainbord we have an interrupt controller (IRC) which acts as a multiplexer between the devices which can raise an interrupt and the CPU:</p>
  
  <pre><code>                             |--------|
            |-----------|      |        |
  -(0)------| IRC  _____|______| CPU    |
  -(...)----| ____/     |      |        |
  -(15)-----|/          |      |--------|
            |-----------|
  </code></pre>
  
  <p>Every device is associated with an IRQ (the number on the left). After every execution the CPU senses the interrupt-request line. If a signal is detected a state save will be performed and the CPU loads an Interrupt Handler Routine which can be found in the Interrupt Vector which is located on a fixed address in memory. As far as I can see the Number of the IRQ and the Vector number in the Interrupt Vector are not the same because I have for example my network card registered to IRQ 8. On an Intel Pentium processor this would point to a routine which is used to signal one error condition so there must be a mapping somewhere which points to the correct handler.</p>
  
  <p>Questions:</p>
  
  <p>1) If I write an device driver and register an IRQ X for it. From where does the system know which device should be handled? I can for example use request_irq() with IRQ number 10 but how does the system know that the handler should be used for the mouse or keyboard or for whatever i write the driver?</p>
  
  <p>2) How is the Interrupt Vector looking then? I mean if I use the IRQ 10 for my device this would overwrite an standard handler which is for error handling in the table (the first usable one is 32 according to Silberschatz (Operating System Concepts)).</p>
  
  <p>3) Who initialy sets the IRQs? The Bios? The OS?</p>
  
  <p>4) Who is responsible for the matching of the IRQ and the offset in the Interrupt Vector?</p>
  
  <p>5) It is possible to share IRQS. How is that possible? There are hardware lanes on the Mainboard which connect devices to the Interrupt Controller. How can to lanes be configured to the same Interrupt? There must be a table which says lane 2 and 3 handle IRQ15 e.g. Where does this table reside and how is it called?</p>