title: How to add an all rule to this Makefile?
body: <p>I want to just type 'make all' and have the following Makefile do everything it's supposed to do:</p>
  
  <pre><code>LEX = lex
  YACC = yacc
  CC = gcc
  
  calcu: y.tab.o lex.yy.o
      $(CC) -o calcu y.tab.o lex.yy.o -ly -lfl
  
  y.tab.c y.tab.h: parser.y
      $(YACC) -d parser.y
  
  y.tab.o: y.tab.c parser.h
      $(CC) -c y.tab.c
  
  lex.yy.o: y.tab.h lex.yy.c 
      $(CC) -c lex.yy.c
  
  lex.yy.c: calclexer.l parser.h
      $(LEX) calclexer.l
  
  clean:
      rm *.o
      rm *.c
      rm calcu
  </code></pre>