title: Initializing an array of records in VHDL
body: <p>I have an record defined as follows</p>
  
  <pre><code>type ifx_t is
  record
    data                        : std_logic_vector(127 downto 0);
    address                     : std_logic_vector (19 downto 0); 
    WrReq                       : std_logic;-- 
    RdReq                       : std_logic; --
  end record;
  type Array_ifx_t is array (0 to 2) of ifx_t;
  </code></pre>
  
  <p>And I have to initialize an instance of this array of records and I have tried the following way and it doesn't work</p>
  
  <pre><code>signal pair_in       : Array_ifx_t:= (others =&gt;((others =&gt;'0'),(others=&gt;'0'),'0','0')); 
  </code></pre>
  
  <p>Kindly help.  </p>