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<p>This thesis is concerned with the development of a model to analyze a Digital Image Synthesizer (DIS) integrated circuit designed to create false target images to deceive Inverse Synthetic Aperture Radar (ISAR). The DIS is able to recreate the scattering effect of a moving target by using appropriate phase and gain modulations on an intercepted ISAR chirp signal before retransmitting it with the proper time delay. The DIS signal processing and the ISAR compression of the modulated return are modeled to examine the range-Doppler profile of a synthesized false target image. The image is representative of the image that would appear on an ISAR display. ISAR image quality is used to evaluate different DIS architectures and bit formats. Evaluation of the image quality is based on the deviation from an infinite resolution false target image. The results obtained from evaluating different DIS architectures indicate that the design is tolerant of significant quantization errors. The model is used to validate the architecture of the integrated circuit being fabricated. Finally, various different ISAR integration times and pulse repetition frequencies are used to confirm the integrity of the model.
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<br>Subjects: Computer graphics; Synthetic aperture radar; Digital image synthesizer; DIS; Inverse synthetic aperture radar; ISAR; SAR; False targets</div>
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Le Dantec, Fernando A.</div>
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