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<p>The rapid pace of change in the electronics industry and the significant reduction in military budgets over the past decade has forced many military aircraft to extend their service lifetimes. This has led to aircraft with outdated avionics systems being required to accomplish new and more complex missions. This thesis examines the process of reengineering an outdated avionics system to economically upgrade its capabilities through the FPGA implementation of a binary compatible replacement. The system targeted is the AN/AYK-14(V) Navy Standard Airborne Computer, specifically the XN-8 chassis used as the mission computer onboard the F/A-18 C/D aircraft. This thesis is also intended to provide a resource document on the AYK-14 for a study being conducted by the Naval Air Systems Command (NAVAIR) Advanced Weapons Laboratory (AWL). The design of the Input / Output module of the VHSIC Processor Module was recovered through research of documentation and hardware testing. The recovered design was modeled using VHDL, synthesized and implemented using computer-aided (CAD) design tools. This thesis shows that replacement of legacy systems through use of FPGA technology is a viable option, however, expansion of the design is recommended to create a truly binary compatible replacement.
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<br>Subjects: Avionics; Software reengineering; Airplanes, Military; United States; Electronic equipment; Modification; Obsolescence; Legacy; FPGA; VDHL; VHSIC; Xilinx; SDRAM; AYK-14; Mil-Std-1553; State machine; AVNET; Bus controller; Data bus; Software interrupts; Reengineering; Design recovery</div>
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Fetter, Bryan J.</div>
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