<Ol> <Li> Fetch the instruction : The next instruction is fetched from the memory address that is currently stored in the program counter and stored into the instruction register . At the end of the fetch operation , the PC points to the next instruction that will be read at the next cycle . </Li> <Li> Decode the instruction : During this cycle the encoded instruction present in the instruction register is interpreted by the decoder . </Li> <Li> Read the effective address : In the case of a memory instruction ( direct or indirect ) the execution phase will be during the next clock pulse . If the instruction has an indirect address , the effective address is read from main memory , and any required data is fetched from main memory to be processed and then placed into data registers ( clock pulse : T ) . If the instruction is direct , nothing is done during this clock pulse . If this is an I / O instruction or a register instruction , the operation is performed during the clock pulse . </Li> <Li> Execute the instruction : The control unit of the CPU passes the decoded information as a sequence of control signals to the relevant function units of the CPU to perform the actions required by the instruction such as reading values from registers , passing them to the ALU to perform mathematical or logic functions on them , and writing the result back to a register . If the ALU is involved , it sends a condition signal back to the CU . The result generated by the operation is stored in the main memory or sent to an output device . Based on the feedback from the ALU , the PC may be updated to a different address from which the next instruction will be fetched . </Li> </Ol>
<Ol> <Li> Fetch the instruction : The next instruction is fetched from the memory address that is currently stored in the program counter and stored into the instruction register . At the end of the fetch operation , the PC points to the next instruction that will be read at the next cycle . </Li> <Li> Decode the instruction : During this cycle the encoded instruction present in the instruction register is interpreted by the decoder . </Li> <Li> Read the effective address : In the case of a memory instruction ( direct or indirect ) the execution phase will be during the next clock pulse . If the instruction has an indirect address , the effective address is read from main memory , and any required data is fetched from main memory to be processed and then placed into data registers ( clock pulse : T ) . If the instruction is direct , nothing is done during this clock pulse . If this is an I / O instruction or a register instruction , the operation is performed during the clock pulse . </Li> <Li> Execute the instruction : The control unit of the CPU passes the decoded information as a sequence of control signals to the relevant function units of the CPU to perform the actions required by the instruction such as reading values from registers , passing them to the ALU to perform mathematical or logic functions on them , and writing the result back to a register . If the ALU is involved , it sends a condition signal back to the CU . The result generated by the operation is stored in the main memory or sent to an output device . Based on the feedback from the ALU , the PC may be updated to a different address from which the next instruction will be fetched . </Li> </Ol>
what are the steps to execute an instruction
what are the steps to execute an instruction
Fetch the instruction Decode the instruction Read the effective address Execute the instruction :
Fetch the instruction Decode the instruction Read the effective address Execute the instruction :