Note: For those of you who do not know VHDL do not worry, I will explain the problem with an example.MotivationI have a VHDL file which is a big mess of buses. I have declared many signals and I think I have some unused signals. I want to delete unnecessary declarations.ExampleImagine I have the following signal declarationssignal exmem_wb_we_in : std_logic;signal exmem_const_in : std_logic_vector(15 downto 0);signal exmem_data_in : std_logic_vector(15 downto 0);signal exmem_addr_in : std_logic_vector(15 downto 0);signal exmem_foo_in : std_logic;signal exmem_mem_en_in : std_logic;signal exmem_bar_in : std_logic_vector(15 downto 0);signal exmem_jump_cond_in : std_logic_vector(3 downto 0);Say the signals in bold (exmem_foo_in and exmem_bar_in) are never used. Then those words occur only once in the file. I want the lines where they appear to be deleted.The questionIs it possible to get Vim to delete all lines which hold a single occurrence of a word in a file? The solution should use Vim commands that are 'always available', rather than OS dependent commands. A single command would be preferred. But multiple commands are also welcome.Some assumptionsassume only one signal is declared per line;there are no occurrences of numbers who appear only once in the file and could get us a line deleted when we in fact want that line;there are no comments which introduce a single word occurrence.Bonus points if you can make it still work without some of those assumptions.Clarifications:I don't know which words I want to delete beforehand.A VHDL file might look like this.
Delete all lines which contain any word not used anywhere else in the buffer
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