How does one determine what memory cells (addresses) are being read into a cache?For example if we read at adress C000EAFCH, which memory cells will be read into the cache if the cache is 64 byte and each cacheline is 8 byte?If we use direct mapping, would one say that there are the 4 previous bytes and the 4 next bytes from the address that are being read?In that case I would say that addresses C00EAF8H to C00EAFFH are being read. That would mean 4 bytes before the address, then the byte on the address and 3 more addresses are read.However the one who asked this question wrote that the correct answer is C00EAF8 to C00EAFFH. I don't know why the 'H' disappeared in C00EAF8 but maybe it's a typo. To be honest I don't even know what the 'H' stands for, as it is not a hexadecimal character. Maybe someone can clarify this?I also wonder, why doesn't one read the byte on the address, and then the next 7 bytes? Does this reading 4 bytes before and 3 bytes after have to do with direct mapping?
Memory cells (addresses) read into a cache
cpu cache
Cache lines are aligned.  That means that the bottom-most bits of the start address of the cache line are always 0s.If you have 8-byte cache lines they will always be read in address ranges $[8i, 8(i+1) - 1]$.  For example, if you read address 117 (decimal) = 1110101 (binary) then the 8 byte cache block that gets read in is the set of bytes in the range 112 (decimal) = 1110000 (binary) through 119 (decimal) = 1110111 (binary).