code: def test_inception_structure():
      target = Target("c")
      global_ws_pool = WorkspacePoolInfo(
          pool_name="global_workspace",
          targets=[target],
      )
      tir_mod = InceptionStructure
      tir_mod = _assign_targets_to_primfuncs_irmodule(tir_mod, target)
      tir_mod = _assign_poolinfos_to_allocates_in_irmodule(
          tir_mod, [global_ws_pool]
      )
      main_func = tir_mod["run_model"]
      buffer_info_analysis = tvm.tir.usmp.analysis.extract_buffer_info(
          main_func, tir_mod
      )
      assert buffer_info_analysis.memory_pressure == 1117718
      buffer_info_map = _replace_stmt_with_buf_var_names(
          buffer_info_analysis.buffer_info_stmts
      )
  
      # check conflicts
      _verify_conflicts(
          "sid_3",
          [
              "sid_4",
              "PaddedInput_2",
              "sid_2",
              "Conv2dOutput_2",
              "PaddedInput_1",
              "Conv2dOutput_1",
              "sid_20",
              "PaddedInput_6",
              "Conv2dOutput_6",
              "sid_19",
              "PaddedInput_4",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "Conv2dOutput",
          [
              "sid_6",
              "PaddedInput",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "Conv2dOutput_7",
          [
              "PaddedInput_7",
              "sid_8",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "sid_4",
          [
              "sid_5",
              "sid_3",
              "PaddedInput_2",
              "sid_2",
              "Conv2dOutput_2",
              "PaddedInput_1",
              "Conv2dOutput_1",
              "sid_20",
              "PaddedInput_6",
              "Conv2dOutput_6",
              "sid_19",
              "PaddedInput_4",
              "Conv2dOutput_4",
              "sid_26",
              "PaddedInput_5",
              "Conv2dOutput_5",
              "sid_25",
              "tensor_3",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "sid_2",
          [
              "PaddedInput_2",
              "sid_3",
              "sid_4",
              "Conv2dOutput_2",
              "PaddedInput_1",
              "Conv2dOutput_1",
              "sid_20",
              "PaddedInput_6",
              "Conv2dOutput_6",
              "sid_19",
              "PaddedInput_4",
              "Conv2dOutput_4",
              "sid_26",
              "PaddedInput_5",
              "Conv2dOutput_5",
              "sid_25",
              "tensor_3",
              "sid_32",
              "PaddedInput_3",
              "Conv2dOutput_3",
              "sid_31",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "sid_19",
          [
              "Conv2dOutput_6",
              "sid_2",
              "PaddedInput_6",
              "sid_3",
              "sid_4",
              "PaddedInput_4",
              "Conv2dOutput_4",
              "sid_26",
              "PaddedInput_5",
              "Conv2dOutput_5",
              "sid_25",
              "tensor_3",
              "sid_32",
              "PaddedInput_3",
              "Conv2dOutput_3",
              "sid_31",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "PaddedInput_2",
          [
              "sid_3",
              "sid_4",
              "sid_2",
              "Conv2dOutput_2",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "Conv2dOutput_6",
          [
              "sid_2",
              "PaddedInput_6",
              "sid_3",
              "sid_4",
              "sid_19",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "sid_9",
          [
              "PaddedInput_7",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "sid_7",
          [
              "tensor_2",
              "PaddedInput",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "PaddedInput_4",
          [
              "sid_2",
              "sid_19",
              "sid_3",
              "sid_4",
              "Conv2dOutput_4",
              "sid_26",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "PaddedInput_3",
          [
              "sid_2",
              "sid_32",
              "sid_25",
              "sid_19",
              "Conv2dOutput_3",
              "sid_31",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "sid_5",
          [
              "PaddedInput_8",
              "Conv2dOutput_8",
              "sid_4",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "sid_31",
          [
              "Conv2dOutput_3",
              "PaddedInput_3",
              "sid_2",
              "sid_25",
              "sid_19",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "PaddedInput",
          [
              "sid_7",
              "sid_6",
              "Conv2dOutput",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "Conv2dOutput_2",
          [
              "sid_2",
              "PaddedInput_2",
              "sid_3",
              "sid_4",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "sid_32",
          [
              "tensor_3",
              "sid_2",
              "sid_25",
              "sid_19",
              "PaddedInput_3",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "tensor_2",
          [
              "sid_8",
              "sid_7",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "sid_26",
          [
              "Conv2dOutput_4",
              "PaddedInput_4",
              "sid_2",
              "sid_19",
              "sid_4",
              "PaddedInput_5",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "Conv2dOutput_3",
          [
              "PaddedInput_3",
              "sid_2",
              "sid_25",
              "sid_19",
              "sid_31",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "PaddedInput_6",
          [
              "sid_2",
              "sid_3",
              "sid_20",
              "sid_4",
              "Conv2dOutput_6",
              "sid_19",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "sid_6",
          [
              "PaddedInput",
              "Conv2dOutput",
              "PaddedInput_8",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "PaddedInput_8",
          [
              "sid_6",
              "sid_5",
              "Conv2dOutput_8",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "Conv2dOutput_5",
          [
              "PaddedInput_5",
              "sid_2",
              "sid_19",
              "sid_4",
              "sid_25",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "Conv2dOutput_1",
          [
              "PaddedInput_1",
              "sid_2",
              "sid_3",
              "sid_4",
              "sid_20",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "tensor_3",
          [
              "sid_2",
              "sid_25",
              "sid_19",
              "sid_4",
              "sid_32",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "sid_8",
          [
              "Conv2dOutput_7",
              "PaddedInput_7",
              "tensor_2",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "sid_20",
          [
              "Conv2dOutput_1",
              "PaddedInput_1",
              "sid_2",
              "sid_3",
              "sid_4",
              "PaddedInput_6",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "Conv2dOutput_8",
          [
              "sid_5",
              "PaddedInput_8",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "PaddedInput_1",
          [
              "sid_2",
              "sid_3",
              "sid_4",
              "Conv2dOutput_1",
              "sid_20",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "Conv2dOutput_4",
          [
              "PaddedInput_4",
              "sid_2",
              "sid_19",
              "sid_4",
              "sid_26",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "sid_25",
          [
              "PaddedInput_5",
              "Conv2dOutput_5",
              "sid_2",
              "sid_19",
              "sid_4",
              "tensor_3",
              "sid_32",
              "PaddedInput_3",
              "Conv2dOutput_3",
              "sid_31",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "PaddedInput_7",
          [
              "sid_9",
              "Conv2dOutput_7",
              "sid_8",
          ],
          buffer_info_map,
      )
      _verify_conflicts(
          "PaddedInput_5",
          [
              "sid_2",
              "sid_19",
              "sid_26",
              "sid_4",
              "Conv2dOutput_5",
              "sid_25",
          ],
          buffer_info_map,
      )
  
      # check sizes
      assert buffer_info_map["sid_20"].size_bytes == 150528
      assert buffer_info_map["tensor_2"].size_bytes == 200704
      assert buffer_info_map["sid_5"].size_bytes == 602112
      assert buffer_info_map["sid_9"].size_bytes == 301056
      assert buffer_info_map["Conv2dOutput_3"].size_bytes == 4
      assert buffer_info_map["sid_26"].size_bytes == 25088
      assert buffer_info_map["Conv2dOutput_2"].size_bytes == 256
      assert buffer_info_map["PaddedInput_5"].size_bytes == 28800
      assert buffer_info_map["sid_8"].size_bytes == 802816
      assert buffer_info_map["Conv2dOutput_5"].size_bytes == 4
      assert buffer_info_map["sid_3"].size_bytes == 301056
      assert buffer_info_map["Conv2dOutput"].size_bytes == 256
      assert buffer_info_map["PaddedInput_3"].size_bytes == 301056
      assert buffer_info_map["sid_32"].size_bytes == 301056
      assert buffer_info_map["PaddedInput_8"].size_bytes == 430592
      assert buffer_info_map["sid_4"].size_bytes == 150528
      assert buffer_info_map["PaddedInput_7"].size_bytes == 314646
      assert buffer_info_map["sid_6"].size_bytes == 401408
      assert buffer_info_map["Conv2dOutput_8"].size_bytes == 256
      assert buffer_info_map["sid_25"].size_bytes == 25088
      assert buffer_info_map["PaddedInput"].size_bytes == 401408
      assert buffer_info_map["sid_7"].size_bytes == 401408
      assert buffer_info_map["Conv2dOutput_1"].size_bytes == 4
      assert buffer_info_map["Conv2dOutput_4"].size_bytes == 4
      assert buffer_info_map["PaddedInput_2"].size_bytes == 301056
      assert buffer_info_map["sid_31"].size_bytes == 25088
      assert buffer_info_map["PaddedInput_1"].size_bytes == 301056
      assert buffer_info_map["Conv2dOutput_6"].size_bytes == 256
      assert buffer_info_map["PaddedInput_4"].size_bytes == 301056
      assert buffer_info_map["sid_2"].size_bytes == 50176
      assert buffer_info_map["tensor_3"].size_bytes == 150528
      assert buffer_info_map["Conv2dOutput_7"].size_bytes == 256
      assert buffer_info_map["sid_19"].size_bytes == 100352
      assert buffer_info_map["PaddedInput_6"].size_bytes == 172800
  
imports: import pytest
  import sys
  import tvm
  from tvm import tir, script
  from tvm.ir import Range
  from tvm.script import tir
  from tvm.tir import stmt_functor
  from tvm.tir import PrimFunc
  from tvm.tir.usmp import utils
  from tvm.target import Target
  from tvm import WorkspacePoolInfo, ConstantPoolInfo
label_desc: Use image node_id 9 for calling a global function with example usage: test_inception_structure() without return types