code: def conv2d_strategy_arm_cpu(attrs, inputs, out_type, target):
      """conv2d arm cpu strategy"""
      strategy = _op.OpStrategy()
      data, kernel = inputs
      dilation_h, dilation_w = attrs.get_int_tuple("dilation")
      stride_h, stride_w = attrs.get_int_tuple("strides")
      padding = attrs.get_int_tuple("padding")
      groups = attrs.groups
      layout = attrs.data_layout
      kernel_layout = attrs.kernel_layout
      if dilation_h < 1 or dilation_w < 1:
          raise ValueError("dilation should be positive value")
  
      if groups == 1:
          if layout == "NCHW":
              if kernel_layout == "OIHW":
                  if (
                      topi.arm_cpu.is_int8_hw_support(
                          data.dtype, kernel.dtype
                      )
                      and kernel.shape[1] >= 64
                  ):
                      strategy.add_implementation(
                          wrap_compute_conv2d(
                              topi.arm_cpu.conv2d_nchw_int8
                          ),
                          wrap_topi_schedule(
                              topi.arm_cpu.schedule_conv2d_nchw_int8
                          ),
                          name="conv2d_nchw_int8.arm_cpu",
                          plevel=15,
                      )
                  else:
                      # ARM conv2d spatial pack schedule.
                      strategy.add_implementation(
                          wrap_compute_conv2d(
                              topi.arm_cpu.conv2d_nchw_spatial_pack
                          ),
                          wrap_topi_schedule(
                              topi.arm_cpu.schedule_conv2d_nchw_spatial_pack
                          ),
                          name="conv2d_nchw_spatial_pack.arm_cpu",
                          plevel=10,
                      )
  
                      strategy.add_implementation(
                          wrap_compute_conv2d(topi.x86.conv2d_nchw),
                          wrap_topi_schedule(
                              topi.x86.schedule_conv2d_nchw
                          ),
                          name="conv2d_nchw.x86",
                      )
  
                  # check if winograd algorithm is applicable
                  _, _, kh, kw = get_const_tuple(kernel.shape)
                  pt, pl, pb, pr = topi.nn.get_pad_tuple(
                      padding, (kh, kw)
                  )
                  is_winograd_applicable = (
                      "float" in data.dtype
                      and "float" in kernel.dtype
                      and kh == 3
                      and kw == 3
                      and stride_h == 1
                      and stride_w == 1
                      and dilation_h == 1
                      and dilation_w == 1
                  )
                  if is_winograd_applicable:
                      strategy.add_implementation(
                          wrap_compute_conv2d(
                              topi.arm_cpu.conv2d_nchw_winograd
                          ),
                          wrap_topi_schedule(
                              topi.arm_cpu.schedule_conv2d_nchw_winograd
                          ),
                          name="conv2d_nchw_winograd.arm_cpu",
                          plevel=5,
                      )
                      if (
                          "nnpack" in target.libs
                          and pt == 1
                          and pb == 1
                          and pl == 1
                          and pr == 1
                      ):
                          strategy.add_implementation(
                              wrap_compute_conv2d(
                                  topi.arm_cpu.conv2d_nchw_winograd_nnpack
                              ),
                              wrap_topi_schedule(
                                  topi.arm_cpu.schedule_conv2d_nchw_winograd_nnpack
                              ),
                              name="conv2d_nchw_winograd_nnpack.arm_cpu",
                              plevel=15,
                          )
              elif re.match(r"OIHW\d*o", kernel_layout):
                  strategy.add_implementation(
                      wrap_compute_conv2d(
                          topi.arm_cpu.conv2d_nchw_spatial_pack
                      ),
                      wrap_topi_schedule(
                          topi.arm_cpu.schedule_conv2d_nchw_spatial_pack
                      ),
                      name="conv2d_nchw_spatial_pack.arm_cpu",
                  )
              else:
                  raise RuntimeError(
                      f"Unsupported weight layout {kernel_layout} for conv2d NCHW"
                  )
          elif layout == "HWCN":
              assert kernel_layout == "HWIO"
              logger.warning(
                  "conv2d_hwcn is not optimized for arm cpu."
              )
              strategy.add_implementation(
                  wrap_compute_conv2d(topi.nn.conv2d_hwcn),
                  wrap_topi_schedule(topi.generic.schedule_conv2d_hwcn),
                  name="conv2d_hwcn.generic",
              )
          elif layout == "NHWC":
              data_width_padding = _get_padding_width(padding)
              if (
                  target.features.has_dsp
                  and dilation_w == dilation_h == 1
                  and kernel_layout == "OHWI"
                  # Check SIMD alignment
                  and _is_simd_aligned(
                      data.dtype,
                      data.shape[2:],
                      padding=(data_width_padding, 0),
                  )
                  and _is_simd_aligned(kernel.dtype, kernel.shape[2:])
              ):
                  strategy.add_implementation(
                      wrap_compute_conv2d(
                          topi.arm_cpu.conv2d_nhwc_ohwi_dsp,
                          need_out_layout=True,
                      ),
                      wrap_topi_schedule(
                          topi.arm_cpu.schedule_conv2d_nhwc_ohwi_dsp
                      ),
                      name="conv2d_nhwc_ohwi_dsp.arm_cpu",
                  )
              elif target.features.has_dsp and kernel_layout == "HWOI":
                  strategy.add_implementation(
                      wrap_compute_conv2d(topi.arm_cpu.conv2d_nhwc_dsp),
                      wrap_topi_schedule(
                          topi.arm_cpu.schedule_conv2d_nhwc_dsp
                      ),
                      name="conv2d_nhwc_dsp.arm_cpu",
                  )
              elif kernel_layout == "HWIO":
                  is_aarch64 = target.features.is_aarch64
                  has_dot_prod = target.features.has_dotprod
                  has_matmul_i8 = target.features.has_matmul_i8
                  interleaved_compute = (
                      topi.arm_cpu.compute_conv2d_NHWC_quantized_interleaved
                  )
                  interleaved_schedule = (
                      topi.arm_cpu.schedule_conv2d_NHWC_quantized_interleaved
                  )
                  native_compute = (
                      topi.arm_cpu.compute_conv2d_NHWC_quantized_native
                  )
                  native_schedule = (
                      topi.arm_cpu.schedule_conv2d_NHWC_quantized_native
                  )
                  # Quantized cases
                  if is_aarch64 and data.dtype in ["int8", "uint8"]:
                      if has_matmul_i8 and has_dot_prod:
                          strategy.add_implementation(
                              wrap_compute_conv2d(interleaved_compute),
                              wrap_topi_schedule(interleaved_schedule),
                              name="conv2d_NHWC_quantized_interleaved.arm_cpu",
                          )
                          strategy.add_implementation(
                              wrap_compute_conv2d(native_compute),
                              wrap_topi_schedule(native_schedule),
                              name="conv2d_NHWC_quantized_native.arm_cpu",
                          )
                      elif has_matmul_i8:
                          strategy.add_implementation(
                              wrap_compute_conv2d(interleaved_compute),
                              wrap_topi_schedule(interleaved_schedule),
                              name="conv2d_NHWC_quantized_interleaved.arm_cpu",
                          )
                      elif has_dot_prod:
                          strategy.add_implementation(
                              wrap_compute_conv2d(native_compute),
                              wrap_topi_schedule(native_schedule),
                              name="conv2d_NHWC_quantized_native.arm_cpu",
                          )
                      else:
                          strategy.add_implementation(
                              wrap_compute_conv2d(interleaved_compute),
                              wrap_topi_schedule(interleaved_schedule),
                              name="conv2d_NHWC_quantized_interleaved.arm_cpu",
                          )
                  # Non-quantized cases
                  if is_aarch64 and data.dtype in [
                      "float32",
                      "float16",
                  ]:
                      strategy.add_implementation(
                          wrap_compute_conv2d(
                              topi.arm_cpu.compute_conv2d_NHWC_hybrid
                          ),
                          wrap_topi_schedule(
                              topi.arm_cpu.schedule_conv2d_NHWC_hybrid
                          ),
                          name="conv2d_NHWC_hybrid.arm_cpu",
                      )
                  if (not is_aarch64) or (
                      data.dtype not in ["int8", "uint8"]
                  ):
                      # TODO(@giuseros)
                      # This strategy errors out for quantized data types when tuning.
                      # Let's use this only for non-aarch64 or non-quantized cases
                      strategy.add_implementation(
                          wrap_compute_conv2d(
                              topi.arm_cpu.conv2d_nhwc_spatial_pack
                          ),
                          wrap_topi_schedule(
                              topi.arm_cpu.schedule_conv2d_nhwc_spatial_pack
                          ),
                          name="conv2d_nhwc_spatial_pack.arm_cpu",
                          plevel=5,
                      )
              else:
                  raise RuntimeError(
                      f"Unsupported kernel layout {kernel_layout} for conv2d NHWC"
                  )
  
          else:
              raise RuntimeError(
                  f"Unsupported conv2d layout {layout} for arm cpu"
              )
      elif is_depthwise_conv2d(
          data.shape, layout, kernel.shape, kernel_layout, groups
      ):
          if layout == "NCHW":
              assert kernel_layout == "OIHW" or re.match(
                  r"OIHW\d*o", kernel_layout
              )
              if kernel_layout == "OIHW":
                  data_width_padding = _get_padding_width(padding)
                  if (
                      target.features.has_dsp
                      and dilation_w == dilation_h == 1
                      and _is_simd_aligned(
                          data.dtype,
                          data.shape[3:],
                          padding=(data_width_padding,),
                      )
                      and _is_simd_aligned(
                          kernel.dtype, kernel.shape[3:]
                      )
                  ):
                      strategy.add_implementation(
                          wrap_compute_conv2d(
                              topi.arm_cpu.depthwise_conv2d_nchw_oihw_dsp,
                              need_out_layout=True,
                          ),
                          wrap_topi_schedule(
                              topi.arm_cpu.schedule_depthwise_conv2d_nchw_oihw_dsp
                          ),
                          name="depthwise_conv2d_nchw_oihw_dsp.arm_cpu",
                      )
                  else:
                      strategy.add_implementation(
                          wrap_compute_conv2d(
                              topi.arm_cpu.depthwise_conv2d_nchw
                          ),
                          wrap_topi_schedule(
                              topi.arm_cpu.schedule_depthwise_conv2d_nchw
                          ),
                          name="depthwise_conv2d_nchw.arm_cpu",
                      )
  
              # TODO:
              # This schedule has incorrect result on some hardware platforms (like NV Jetson TX2)
              # Let us comment it out but not remove.
              # see discussion:
              # https://discuss.tvm.apache.org/t/autotuner-incorrect-result-after-tuning-mobilenetv2-on-arm-cpu/6088
              # strategy.add_implementation(
              #     wrap_compute_conv2d(topi.arm_cpu.depthwise_conv2d_nchw_spatial_pack),
              #     wrap_topi_schedule(topi.arm_cpu.schedule_depthwise_conv2d_nchw_spatial_pack),
              #     name="depthwise_conv2d_nchw_spatial_pack.arm_cpu",
              #     plevel=15)
  
              # Intel x86 depthwise conv2d schedule.
              channel_multiplier = get_const_tuple(inputs[1].shape)[1]
              if (
                  channel_multiplier == 1
                  and dilation_h == 1
                  and dilation_w == 1
              ):
                  strategy.add_implementation(
                      wrap_compute_conv2d(
                          topi.x86.depthwise_conv2d_nchw
                      ),
                      wrap_topi_schedule(
                          topi.x86.schedule_depthwise_conv2d_nchw
                      ),
                      name="depthwise_conv2d_nchw.x86",
                  )
          elif layout == "NHWC":
              assert kernel_layout == "HWOI"
              if (
                  target.features.is_aarch64
                  and target.features.has_asimd
              ):
                  strategy.add_implementation(
                      wrap_compute_conv2d(
                          topi.arm_cpu.compute_depthwise_conv2d_nhwc
                      ),
                      wrap_topi_schedule(
                          topi.arm_cpu.schedule_depthwise_conv2d_nhwc
                      ),
                      name="depthwise_conv2d_nhwc.arm_cpu",
                  )
  
              # Optimized special case depthwiseConv2D operation. Requires NHWC layout,
              # a HWOI kernel layout (which we rearrange to a custom layout) no dilation,
              # int8/16 inputs, int32 output, and the same number of input and output channels.
              # The int8 implementation DOES need the DSP unit (for SXTB16), but it is not
              # possible to use the DSP unit to speed up a NHWC depthwise convolution (though
              # an NCHW convolution would benefit).
              elif (
                  dilation_w == dilation_h == 1
                  and kernel.shape[3] == 1  # channel_multiplier == 1
                  and out_type.dtype == "int32"
                  and (
                      (
                          data.shape[3] % 4 == 0
                          and data.dtype == "int8"
                          and target.features.has_dsp
                      )
                      or (
                          data.shape[3] % 2 == 0
                          and data.dtype == "int16"
                      )
                  )
                  and (
                      padding != "SAME"
                      or data.shape[1] % stride_h
                      == data.shape[2] % stride_w
                      == 0
                  )
                  and target.kind.name == "c"
                  # Ideally we should check that kernel is a Relay constant, but strategy functions
                  # don't have access to the data needed to check this.
              ):
                  strategy.add_implementation(
                      wrap_compute_conv2d(
                          topi.arm_cpu.depthwise_conv2d_nhwc_dsp
                      ),
                      wrap_topi_schedule(
                          topi.arm_cpu.schedule_depthwise_conv2d_nhwc_dsp
                      ),
                      name="depthwise_conv2d_nhwc_dsp.arm_cpu",
                  )
  
              else:
                  logger.warning(
                      "depthwise_conv2d with layout NHWC is not optimized for arm cpu."
                  )
                  strategy.add_implementation(
                      wrap_compute_conv2d(
                          topi.nn.depthwise_conv2d_nhwc,
                          need_kernel_layout=True,
                      ),
                      wrap_topi_schedule(
                          conv2d_generic.schedule_depthwise_conv2d_nhwc
                      ),
                      name="depthwise_conv2d_nhwc.generic",
                  )
          else:
              raise RuntimeError(
                  f"Unsupported depthwise_conv2d layout {layout} for arm cpu"
              )
      else:  # group_conv2d
          if layout == "NCHW":
              assert kernel_layout == "OIHW"
              strategy.add_implementation(
                  wrap_compute_conv2d(
                      topi.arm_cpu.group_conv2d_nchw, has_groups=True
                  ),
                  wrap_topi_schedule(
                      topi.arm_cpu.schedule_group_conv2d_nchw
                  ),
                  name="group_conv2d_nchw.arm_cpu",
              )
          elif layout == "NHWC":
              assert kernel_layout == "HWIO"
              logger.warning(
                  "group_conv2d with layout NHWC is not optimized for arm cpu."
              )
              strategy.add_implementation(
                  wrap_compute_conv2d(
                      topi.nn.group_conv2d_nhwc, has_groups=True
                  ),
                  wrap_topi_schedule(
                      topi.generic.schedule_group_conv2d_nhwc
                  ),
                  name="group_conv2d_nhwc.generic",
              )
          else:
              raise RuntimeError(
                  f"Unsupported group_conv2d layout {layout} for arm cpu"
              )
      return strategy
  
imports: from functools import reduce
  import logging
  import re
  from tvm import relay, topi, tir
  from ....auto_scheduler import is_auto_scheduler_enabled
  from ....meta_schedule import is_meta_schedule_enabled
  from ....topi.generic import conv2d
  from ..None import op
  from .generic import *
label_desc: Use image node_id 7 for calling a global function with example usage: conv2d_strategy_arm_cpu(attrs, inputs, out_type, target) and returns: strategy