code: def schedule_conv2d_NCHWc_int8(cfg, outs):
      """Create schedule for tensors"""
      s = te.create_schedule([x.op for x in outs])
      scheduled_ops = []
  
      def _callback(op):
          if "conv2d_NCHWc_int8" in op.tag:
              conv_out = op.output(0)
              kernel_vec = conv_out.op.input_tensors[1]
              data_vec = conv_out.op.input_tensors[0]
              data = (
                  data_vec.op.input_tensors[0]
                  if isinstance(data_vec.op, te.tensor.ComputeOp)
                  and "pad" not in data_vec.op.tag
                  else data_vec
              )
              if (
                  isinstance(data.op, te.tensor.ComputeOp)
                  and "pad" in data.op.tag
              ):
                  data_pad = data
                  data = data_pad.op.input_tensors[0]
  
              args = [s, cfg, data_vec, kernel_vec, conv_out, outs[0]]
              # int8 conv kernel is 7-dim
              _, _, kh, kw, _, _, n_elems = get_const_tuple(
                  kernel_vec.shape
              )
              assert n_elems == 4
              dtype = "uint" if data.dtype == "uint8" else "int"
              current_target = target.Target.current(allow_none=False)
              if current_target.features.has_dotprod:
                  intrin = dot_int8_int8_int32_neon_82(
                      int32_lanes=4, dtype=dtype
                  )
              elif current_target.features.has_asimd:
                  assert (
                      dtype == "int"
                  ), "uint8 not supported if dot product is not available"
                  intrin = dot_int8_int8_int32_neon()
              else:
                  raise RuntimeError(
                      "Cannot schedule schedule_NCHWc_int8 without neon or arm v8.2 neon support"
                  )
              # On raspberry pi 4s, we see poor performance when the fused
              # operations are inlined into the main computation body. These
              # fused ops dominated the runtime on small convolutions repeatedly
              # blow the cache. Using workloads from resnet50, inceptionv3, and
              # mobilenetv3, we empirically determine the size at which inline is
              # not worth it to be kernel heigh * kernel width < 500. These tests
              # were only run on raspberry pi 4, other arm cpus may have larger
              # caches where inlining has good performance.
              if (
                  target.Target.current().mcpu == "cortex-a72"
                  and kh * kw < 500
              ):
                  inline_fused = False
              else:
                  inline_fused = True
              if kh == 1 and kw == 1:
                  conv2d_generic.schedule_conv_NCHWc_cpu_1x1_int8(
                      *args,
                      int32_lanes=4,
                      int8_elems=4,
                      intrin=intrin,
                      inline_fused=inline_fused,
                  )
              else:
                  conv2d_generic.schedule_conv_NCHWc_cpu_common_int8(
                      *args,
                      int32_lanes=4,
                      int8_elems=4,
                      intrin=intrin,
                      inline_fused=inline_fused,
                  )
  
      traverse_inline(s, outs[0].op, _callback)
      return s
  
imports: from tvm import te, target, autotvm
  from ..utils import traverse_inline, get_const_tuple
  from ..generic import conv2d
  from ..None import nn
  from ...target import codegen
  from ..nn.conv2d import _get_workload, unpack_NCHWc_to_nchw
  from ..x86.conv2d_int8 import _pack_data
  from ..nn.utils import get_pad_tuple
  from .tensor_intrin import dot_int8_int8_int32_neon_82, dot_int8_int8_int32_neon
  from .conv2d import compute_conv2d_NHWC, compute_conv2d_NHWC_without_transform, schedule_conv2d_NHWC
label_desc: Use image node_id 4 for calling a global function with example usage: schedule_conv2d_NCHWc_int8(cfg, outs) and returns: s