title: Cache and Memory Hierarchy Design: A Performance Directed Approach (The Morgan Kaufmann Series in Computer Architecture and Design)
author:  Steven A. Przybylski 
description: A widely read and authoritative book for hardware and software designers. Caches are by far the simplest and most effective mechanism for improving computer performance. This innovative book exposes the characteristics of performance-optimal single and multi-level cache hierarchies by approaching the cache design process through the novel perspective of minimizing execution times. It presents useful data on the relative performance of a wide spectrum of machines and offers empirical and analytical evaluations of the underlying phenomena. This book will help computer professionals appreciate the impact of caches and enable designers to maximize performance given particular implementation constraints. -- <i>Book Description</i>
zlib_text: What Every Programmer Should Know About Memory
  Ulrich Drepper
  Red Hat, Inc.
  drepper@redhat.com
  November 21, 2007
  Abstract
  As CPU cores become both faster and more numerous, the limiting factor for most programs is
  now, and will be for some time, memory access. Hardware designers have come up with ever
  more sophisticated memory handling and acceleration techniques–such as CPU caches–but
  these cannot work optimally without some help from the programmer. Unfortunately, neither
  the structure nor the cost of using the memory subsystem of a computer or the caches on CPUs
  is well understood by most programmers. This paper explains the structure of memory subsys-
  tems in use on modern commodity hardware, illustrating why CPU caches were developed, how
  they work, and what programs should do to achieve optimal performance by utilizing them.
  1
  Introduction
  In the early days computers were much simpler. The var-
  ious components of a system, such as the CPU, memory,
  mass storage, and network interf