anchor.diff:  import GetPut::*;
   import ClientServer::*;
   import CtrlMux::*;
  +import Gearbox::*;
  +import Clocks::*;
   
   import MIFO::*;
   import Pipe::*;
  
positive.code: endmodule
  
  module mkSharedMemoryIndicationPortal#(PipePortal#(numRequests, numIndications, 32) portal,
  				    MemreadServer#(64) readEngine,
  				    MemwriteServer#(64) writeEngine,
  				    Reg#(Bit#(32)) sglIdReg,
  				    Reg#(Bool)     readyReg)(SharedMemoryPortal#(64));
        // read the head and tail pointers, if they are different, then read a request
        Reg#(Bit#(32)) indLimitReg <- mkReg(0);
        Reg#(Bit#(32)) indHeadReg <- mkReg(0);
        Reg#(Bit#(32)) indTailReg <- mkReg(0);
        Reg#(Bit#(16)) wordCountReg <- mkReg(0);
        Reg#(Bit#(16)) messageWordsReg <- mkReg(0);
        Reg#(Bit#(16)) methodIdReg <- mkReg(0);
        Reg#(SharedMemoryPortalState) indState <- mkReg(Idle);
  
     let verbose = True;
  
        rule updateIndHeadTail if (indState == Idle && readyReg);
  	 readEngine.cmdServer.request.put(MemengineCmd { sglId: sglIdReg,
  
negative.code:    MessageRequested,
     Drain,
     UpdateTail,
     UpdateHead,
     UpdateHead2,
     Waiting,
     SendHeader,
     SendMessage,
     Stop
     } SharedMemoryPortalState deriving (Bits,Eq);
  
  