anchor.diff:      method Bit#(1)            sof_rx();
       method Bit#(1)            sof_tx();
   endinterface
  +interface I2c;
  +    interface Bidir#(1)       scl;
  +    interface Bidir#(1)       sda;
  +endinterface
   interface Sdio;
       method Bit#(1)            buspow();
       method Bit#(3)            busvolt();
  
positive.code:     method Action             vbus_pwrfault(Bit#(1) v);
      method Bit#(1)            vbus_pwrselect();
  endinterface
  interface I2c;
      interface Bidir#(1)       scl;
      interface Bidir#(1)       sda;
  endinterface
  interface Can;
      method Action             phy_rx(Bit#(1) v);
      method Bit#(1)            phy_tx();
  endinterface
  interface Core;
      method Action             n_fiq(Bit#(1) v);
      method Action             n_irq(Bit#(1) v);
  endinterface
  
  interface PS7#(numeric type data_width, numeric type id_width, numeric type gpio_width, numeric type mio_width);
      //interface Vector#(2, Can) can;
      //interface Vector#(2, Core)core;
      interface Ddr#(10,1,1)    ddr;
      //interface Vector#(4, Dma) dma;
      //interface Vector#(2, Enet)enet;
      method Action             event_eventi(Bit#(1) v);
      method Bit#(1)            event_evento();
      method Bit#(2)            event_standbywfe();
  
negative.code: import Clocks::*;
  import DefaultValue::*;
  import XilinxCells::*;
  import GetPut::*;
  
  typedef struct {
  