anchor.diff:     Reg#(Bit#(32))    rdBuffer <- mkReg(32);
      Reg#(Bit#(32))    wrBuffer <- mkReg(0); 
      
  +   Bool verbose = True;
  +
      rule start_read(rdIterCnt > 0 && rdBuffer >= burstLen);
  -      //$display("start_read %d", rdCnt);
  +      if (verbose) $display("start_read %d", rdCnt);
         re.readServers[0].request.put(MemengineCmd{sglId:rdPointer, base:extend(rdCnt*4), len:(burstLen*4), burstLen:truncate(burstLen*4)});
         rdBuffer <= rdBuffer-burstLen;
         if(rdCnt+burstLen >= numWords) begin
  
positive.code: // SOFTWARE.
  
  import Vector::*;
  import FIFOF::*;
  import FIFO::*;
  import BRAMFIFO::*;
  
negative.code:    endrule
  
     rule start_write(wrIterCnt > 0 && wrBuffer >= burstLen);
        if (verbose) $display("                    start_write %d", wrCnt);
        we.writeServers[0].request.put(MemengineCmd{sglId:wrPointer, base:extend(wrCnt*4), len:burstLen*4, burstLen:truncate(burstLen*4)});
        wrBuffer <= wrBuffer-burstLen;
        if(wrCnt+burstLen >= numWords) begin
  