anchor.diff:  import DefaultValue::*;
   import XilinxCells::*;
   import GetPut::*;
  +import Vector::*;
   import AxiBits::*;
  +import AxiStream::*;
   
   interface AxiEthBufferClocks;
      interface Clock axi_str_rxd_aclk;
  
positive.code:     interface AxiethbufferPhy     phy;
          output_reset rst_n(PHY_RST_N);
      endinterface
      output_reset reset2pcspma(RESET2PCSPMA);
      output_reset reset2temacn(RESET2TEMACn);
      interface AxiethbufferRx     rx;
          method axis_mac_tdata(rx_axis_mac_tdata) clocked_by (rx_mac_aclk) reset_by (rx_reset) enable((*inhigh*) EN_rx_axis_mac_tdata);
          method axis_mac_tlast(rx_axis_mac_tlast) clocked_by (rx_mac_aclk) reset_by (rx_reset) enable((*inhigh*) EN_rx_axis_mac_tlast);
          method axis_mac_tuser(rx_axis_mac_tuser) clocked_by (rx_mac_aclk) reset_by (rx_reset) enable((*inhigh*) EN_rx_axis_mac_tuser);
          method axis_mac_tvalid(rx_axis_mac_tvalid) clocked_by (rx_mac_aclk) reset_by (rx_reset) enable((*inhigh*) EN_rx_axis_mac_tvalid);
          method clk_enable_in(rx_CLK_ENABLE_IN) clocked_by (rx_mac_aclk) reset_by (rx_reset) enable((*inhigh*) EN_rx_CLK_ENABLE_IN);
          method statistics_valid(rx_statistics_valid) clocked_by (rx_mac_aclk) reset_by (rx_reset) enable((*inhigh*) EN_rx_statistics_valid);
          method statistics_vector(rx_statistics_vector) clocked_by (rx_mac_aclk) reset_by (rx_reset) enable((*inhigh*) EN_rx_statistics_vector);
      endinterface
  
negative.code:         method tx_axis_mac_tvalid axis_mac_tvalid() clocked_by (tx_mac_aclk) reset_by (tx_reset);
          method tx_ifg_delay ifg_delay() clocked_by (tx_mac_aclk) reset_by (tx_reset);
      endinterface
      schedule (axi_str_rxd.tdata, axi_str_rxd.tkeep, axi_str_rxd.tlast, axi_str_rxd.tready, axi_str_rxd.tvalid, axi_str_rxs.tdata, axi_str_rxs.tkeep, axi_str_rxs.tlast, axi_str_rxs.tready, axi_str_rxs.tvalid, axi_str_txc.tdata, axi_str_txc.tkeep, axi_str_txc.tlast, axi_str_txc.tready, axi_str_txc.tvalid, axi_str_txd.tdata, axi_str_txd.tkeep, axi_str_txd.tlast, axi_str_txd.tready, axi_str_txd.tvalid, emac.client_autoneg_int, emac.reset_done_int, emac.rx_dcm_locked_int, interrupt, mdc.temac, mdc.top, mdio.i_temac, mdio.i_top, mdio.o_pcspma, mdio.o_temac, mdio.o_top, mdio.t_pcspma, mdio.t_temac, mdio.t_top, pause.req, pause.val, pcspma.status_vector, rx.axis_mac_tdata, rx.axis_mac_tlast, rx.axis_mac_tuser, rx.axis_mac_tvalid, rx.clk_enable_in, rx.statistics_valid, rx.statistics_vector, s_axi_2temac.araddr, s_axi_2temac.arready, s_axi_2temac.arvalid, s_axi_2temac.awaddr, s_axi_2temac.awready, s_axi_2temac.awvalid, s_axi_2temac.bready, s_axi_2temac.bresp, s_axi_2temac.bvalid, s_axi_2temac.rdata, s_axi_2temac.rready, s_axi_2temac.rresp, s_axi_2temac.rvalid, s_axi_2temac.wdata, s_axi_2temac.wready, s_axi_2temac.wvalid, s_axi.araddr, s_axi.arready, s_axi.arvalid, s_axi.awaddr, s_axi.awready, s_axi.awvalid, s_axi.bready, s_axi.bresp, s_axi.bvalid, s_axi.rdata, s_axi.rready, s_axi.rresp, s_axi.rvalid, s_axi.wdata, s_axi.wready, s_axi.wstrb, s_axi.wvalid, speed_is_10_100, tx.axis_mac_tdata, tx.axis_mac_tlast, tx.axis_mac_tready, tx.axis_mac_tuser, tx.axis_mac_tvalid, tx.ifg_delay, reset2pcspma, reset2temacn) CF (axi_str_rxd.tdata, axi_str_rxd.tkeep, axi_str_rxd.tlast, axi_str_rxd.tready, axi_str_rxd.tvalid, axi_str_rxs.tdata, axi_str_rxs.tkeep, axi_str_rxs.tlast, axi_str_rxs.tready, axi_str_rxs.tvalid, axi_str_txc.tdata, axi_str_txc.tkeep, axi_str_txc.tlast, axi_str_txc.tready, axi_str_txc.tvalid, axi_str_txd.tdata, axi_str_txd.tkeep, axi_str_txd.tlast, axi_str_txd.tready, axi_str_txd.tvalid, emac.client_autoneg_int, emac.reset_done_int, emac.rx_dcm_locked_int, interrupt, mdc.temac, mdc.top, mdio.i_temac, mdio.i_top, mdio.o_pcspma, mdio.o_temac, mdio.o_top, mdio.t_pcspma, mdio.t_temac, mdio.t_top, pause.req, pause.val, pcspma.status_vector, rx.axis_mac_tdata, rx.axis_mac_tlast, rx.axis_mac_tuser, rx.axis_mac_tvalid, rx.clk_enable_in, rx.statistics_valid, rx.statistics_vector, s_axi_2temac.araddr, s_axi_2temac.arready, s_axi_2temac.arvalid, s_axi_2temac.awaddr, s_axi_2temac.awready, s_axi_2temac.awvalid, s_axi_2temac.bready, s_axi_2temac.bresp, s_axi_2temac.bvalid, s_axi_2temac.rdata, s_axi_2temac.rready, s_axi_2temac.rresp, s_axi_2temac.rvalid, s_axi_2temac.wdata, s_axi_2temac.wready, s_axi_2temac.wvalid, s_axi.araddr, s_axi.arready, s_axi.arvalid, s_axi.awaddr, s_axi.awready, s_axi.awvalid, s_axi.bready, s_axi.bresp, s_axi.bvalid, s_axi.rdata, s_axi.rready, s_axi.rresp, s_axi.rvalid, s_axi.wdata, s_axi.wready, s_axi.wstrb, s_axi.wvalid, speed_is_10_100, tx.axis_mac_tdata, tx.axis_mac_tlast, tx.axis_mac_tready, tx.axis_mac_tuser, tx.axis_mac_tvalid, tx.ifg_delay, reset2pcspma, reset2temacn);
  endmodule
  
  instance ToAxi4SlaveBits#(Axi4SlaveLiteBits#(12,32), AxiethbufferS_axi);
     function Axi4SlaveLiteBits#(12,32) toAxi4SlaveBits(AxiethbufferS_axi s);
        return (interface Axi4SlaveLiteBits#(12,32);
  	 method araddr = compose(s.araddr, extend);
  	 method arready = s.arready;
  	 method arvalid = s.arvalid;
  	 method awaddr = compose(s.awaddr, extend);
  	 method awready = s.awready;
  	 method awvalid = s.awvalid;
  	 method bready = s.bready;
  	 method bresp = s.bresp;
  	 method bvalid = s.bvalid;
  	 method rdata = s.rdata;
  	 method rready = s.rready;
  	 method rresp = s.rresp;
  	 method rvalid = s.rvalid;
  	 method wdata = s.wdata;
  	 method wready = s.wready;
  	 method Action      wvalid(Bit#(1) v);
  	    s.wvalid(v);
  	    s.wstrb(pack(replicate(v)));
  	 endmethod
  	 endinterface);
     endfunction
  endinstance
  