anchor.diff:              end
       endrule
       rule afsmresetman_rule if (bvi_resets_reg.read() != 0 && astate == AResetman);
  -        end_handshake.deq();
  +        serdes_end.deq();
           if (gencounter >= 'h8000)
               astate <= AStart;
           else
  
positive.code:         master_data.shiftin2(0);
          master_data.oclk(0);
          master_data.oclkb(0);
          master_data.reset(iodelay_reset_inc_ce[2]);
          slave_data.d(0);
          slave_data.bitslip(sync_bitslip);
          slave_data.ce1(1);
  
negative.code:     Reg#(Bit#(3)) ctrl_samplein_i <- mkReg(0);
      Reg#(Bit#(16)) retrycounter <- mkReg(0);
      Reg#(Bit#(16)) gencounter <- mkReg(0);
      FIFO#(Bit#(1)) start_alignment_fsm <- mkFIFO();
      Reg#(Bit#(3)) ctrl_reset_inc_ce <- mkReg(0);
      Vector#(3, SyncBitIfc#(Bit#(1))) serdes_reset_inc_ce <- replicateM(mkSyncBit(defaultClock, defaultReset, serdes_clock));
      SyncBitIfc#(Bit#(1)) serdes_bitslip <- mkSyncBit(defaultClock, defaultReset, serdes_clock);
  