anchor.diff:  	 let rb <- bReady.deq();
   	 $display("Splice B Ready");
         endaction
  -      if (aLenReg > bLenReg)
  -	 rLenReg <= aLenReg;
  -      else
  -	 rLenReg <= bLenReg;
  -      for (ii <= 0; ii < rLenReg; ii <= ii + 1)
  +      for (ii<= 0; ii < aLenReg; ii <= ii + 1)
   	 seq
  -	    $display("Splice ii %d ", ii);
  -	    strA.portA.request.put(BRAMRequest{write: False, responseOnWrite: False, address: truncate(ii), datain: 0});
  -	    strB.portA.request.put(BRAMRequest{write: False, responseOnWrite: False, address: truncate(ii), datain: 0});
  -	    action
  -	       let left <- strA.portA.response.get();
  -	       let right <- strB.portA.response.get();
  -	       aData <= left;
  -	       bData <= right;
  -	    endaction
  -	    $display("aData %h bData %h", aData, bData);
  -	    matL.portA.request.put(BRAMRequest{write: True, responseOnWrite: False, address: truncate(ii), datain: {aData, bData}});
  +	    matL.portA.request.put(BRAMRequest{write: True, responseOnWrite: False, address: {ii,0}, datain: 0});
  +	    endseq
  +      for (ii<= 0; ii < aLenReg; ii <= ii + 1)
  +	 seq
  +	    matL.portA.request.put(BRAMRequest{write: True, responseOnWrite: False, address: {0,ii}, datain: 0});
   	 endseq
  -      indication.searchResult(unpack(rLenReg));
  +      for (ii<= 1; ii <= aLenReg; ii <= ii + 1)
  +	 for (jj<= 1; jj <= bLenReg; jj <= jj + 1)
  +	    seq
  +	       strA.portA.request.put(BRAMRequest{write: False, responseOnWrite: False, address: ii-1, datain: 0});
  +	       strB.portA.request.put(BRAMRequest{write: False, responseOnWrite: False, address: jj-1, datain: 0});
  +	       action
  +		  let ta <- strA.portA.response.get();
  +		  let tb <- strB.portA.response.get();
  +		  aData <= ta;
  +		  bData <= tb;
  +	       endaction
  +	       if (aData == bData)
  +		  seq
  +		     matL.portA.request.put(BRAMRequest{write: False, responseOnWrite: False, address: {ii-1,jj-1}, datain: 0});
  +		     action
  +			let temp <- matL.portA.response.get();
  +			lim1jm1 <= temp;
  +		     endaction
  +		     matL.portA.request.put(BRAMRequest{write: True, responseOnWrite: False, address: {ii,jj}, datain: lim1jm1+1});
  +		     
  +		  endseq
  +	       else
  +		  seq
  +		     matL.portA.request.put(BRAMRequest{write: False, responseOnWrite: False, address: {ii,jj-1}, datain: 0});
  +		     action
  +			let tlijm1 <- matL.portA.response.get();
  +			lijm1 <= tlijm1;
  +		     endaction
  +		     matL.portA.request.put(BRAMRequest{write: False, responseOnWrite: False, address: {ii-1,jj}, datain: 0});
  +		     action
  +			let tlim1j <- matL.portA.response.get();
  +			lim1j <= tlim1j;
  +		     endaction
  +			matL.portA.request.put(BRAMRequest{write: True, responseOnWrite: False, address: {ii,jj}, datain: max(lijm1,lim1j)});
  +		  endseq
  +	    endseq
  +      matL.portA.request.put(BRAMRequest{write: False, responseOnWrite: False, address: {aLenReg, bLenReg}, datain: 0});
  +      action
  +	 let result <- matL.portA.response.get();
  +	 indication.searchResult(zeroExtend(unpack(result)));
  +      endaction
      endseq
      endseq;
  +   
  +   
      
      // create BRAM Write client for matL
   
  
positive.code: interface MaxcommonsubseqRequest;
     method Action setupA(Bit#(32) strPointer, Bit#(32) strLen);
     method Action setupB(Bit#(32) strPointer, Bit#(32) strLen);
     method Action fetch(Bit#(32) strPointer, Bit#(32) strLen);
     method Action start();
  endinterface
  
  
negative.code:    FIFOF#(void) aReady <- mkFIFOF;
     FIFOF#(void) bReady <- mkFIFOF;
     FIFOF#(void) mReady <- mkFIFOF;
  
     Stmt maxQuadratic =
     seq while(True)
     seq
        action
  