anchor.diff:  	    ioCommand <= command;
   
   	    requestSlotAvailable <= False;
  +	    ioResponseSourceFifo.enq(source);
   	 endaction
   
   	 while (!requestSlotAvailable) seq // wait for open request slot
  
positive.code: 	       let command = v.ctxt;
  	       if (v.last) begin
  		  command.numBlocks = command.numBlocks - v.value; //fixme
  	       end
  	       else begin
  		  command.numBlocks = `BlocksPerRequest;
  	       end
  	       command.startBlock = command.startBlock + extend(v.value);
  	       ioSegmentFifo.enq(command);
  
  	       segmentStartProbe <= truncate(command.startBlock) + v.value;
  	       segmentNumBlocksProbe <= command.numBlocks;
  
negative.code:    FIFOF#(NvmeIoCommand) ioCommandFifo <- mkFIFOF();
     FIFOF#(NvmeIoCommand) ioSegmentFifo <- mkFIFOF(); // max request size 32
  `ifdef NVME_ACCELERATOR_INTERFACE
     FIFOF#(NvmeIoCommand) ioCommandFifoAccel <- mkFIFOF();
     FIFOF#(NvmeIoResponse) ioResponseFifoAccel <- mkFIFOF();
  `endif
  
     FIFOF#(Bit#(1)) ioCommandSourceFifo <- mkFIFOF();
     FIFOF#(Bit#(1)) ioSegmentSourceFifo <- mkFIFOF();
     FIFOF#(Bit#(1)) ioResponseSourceFifo <- mkSizedFIFOF(8);
  
     Reg#(Bit#(32)) cycles <- mkReg(0);
     rule rl_cycles;
  