anchor.diff:     Reg#(Bit#(BurstLenSize)) burstReg <- mkReg(0);
      Reg#(Bool)               firstReg <- mkReg(True);
      Reg#(Bool)               lastReg <- mkReg(False);
  -   Reg#(Bit#(64))           beatCount <- mkReg(0);
  +   Reg#(Bit#(BeatCountSize)) beatCount <- mkReg(0);
      let beat_shift = fromInteger(valueOf(beatShift));
   
      Reg#(Bit#(64)) cycle_cnt <- mkReg(0);
  
positive.code: import ConnectalClocks::*;
  import MMU::*;
  import ConnectalCompletionBuffer::*;
  
  typedef 9 MMU_PIPELINE_DEPTH;
  
  
negative.code:    Reg#(Bool)               firstReg <- mkReg(True);
     Reg#(Bool)                lastReg <- mkReg(False);
           
     Reg#(Bit#(32))  beatCount <- mkReg(0);
     let beat_shift = fromInteger(valueOf(beatShift));
     TagGen#(numTags) tag_gen <- mkTagGen;
  
  