anchor.diff:  
   `include "ConnectalProjectConfig.bsv"
   
  +typedef 2 MemReadFunnelBPC;
  +
   module mkMemReadEngine(MemReadEngine#(busWidth, userWidth, cmdQDepth, numServers))
      provisos( Mul#(TDiv#(busWidth, 8), 8, busWidth)
   	    ,Add#(1, a__, numServers)
   	    ,Add#(busWidth, 0, userWidth)
  -	    ,FunnelPipesPipelined#(1, numServers, MemTypes::MemData#(userWidth), 2)
  -	    ,Pipe::FunnelPipesPipelined#(1, numServers, MemTypes::MemRequest, 2)
  -	    ,Add#(b__, TLog#(numServers), 6)
  +//	     ,Min#(MemReadFunnelBPC, TLog#(numServers), bpc)
  +	     ,Add#(0,MemReadFunnelBPC,bpc)
  +	    ,FunnelPipesPipelined#(1, numServers, MemTypes::MemData#(userWidth), bpc)
  +	    ,Pipe::FunnelPipesPipelined#(1, numServers, MemTypes::MemRequest, bpc)
  +	    ,Add#(b__, TLog#(numServers), MemTagSize)
         	    );
      let rv <- mkMemReadEngineBuff(valueOf(cmdQDepth) * valueOf(TExp#(BurstLenSize)));
      return rv;
  
positive.code:    return v;
  endfunction
  
  typedef struct {
     Bit#(indexSize)    idx;
     SGLId              sglId;
     Bit#(32)           base;
     Bit#(MemTagSize)   tag;
     Bool               last;
     Bit#(BurstLenSize) burstLen;
  } ServerRequest#(numeric type indexSize) deriving (Bits, Eq);
  
  interface MemReadChannel#(numeric type busWidth, numeric type userWidth, numeric type cmdQDepth);
     interface PipeOut#(MemRequest)        readReq;
     interface PipeIn#(MemData#(busWidth)) readData;
  
negative.code: 	     Mul#(busWidthBytes,8,busWidth),
  	     Log#(busWidthBytes,beatShift),
  	     Log#(cmdQDepth,logCmdQDepth),
  	     Add#(busWidth, 0, userWidth),
  	     Add#(1,logCmdQDepth, outCntSz));
     let verbose = False;
     let beatShift = fromInteger(valueOf(beatShift));
  
  