anchor.diff:          wrongSpec_hit_conflict.wset(?); // TODO remove, seems useless
           return (case(t) matches
               tagged Ld .tag: (LSQHitInfo {
  -                waitWPResp: ld_waitWPResp[tag],
  +                waitWPResp: ld_waitWPResp_hit[tag],
                   dst: ld_dst[tag]
               });
               tagged St .tag: (LSQHitInfo {
  
positive.code:                                                 genWith(fromInteger));
      Vector#(StQSize, StQVirTag) stVirTags = map(getStVirTag,
                                                  genWith(fromInteger));
      // virtual tag for st verify ptr. XXX NOTE that this ptr may point to
      // invalid entry, so need to check entry valid first.
      StQVirTag stVerifyVirTag = getStVirTag(st_verifyP);
  
      // find oldest LQ entry that satisfy a constraint (i.e. smallest tag)
      function Maybe#(LdQTag) findOldestLd(Vector#(LdQSize, Bool) pred);
  
negative.code:         return issueQ.first.data;
      endmethod
  
      method ActionValue#(LSQKillLdInfo) getLdKilledByLdSt;
          killByLdStQ.deq;
          let tag = killByLdStQ.first.data;
          doAssert(
              ld_valid_getKill[tag] &&
              ld_computed_getKill[tag] &&
              ld_killed_getKill[tag] &&
              (ld_executing_getKill[tag] || ld_done_getKill[tag]) &&
              ld_memFunc[tag] == Ld,
              "killed load must be valid, computed, killed and done/executing"
          );
          return LSQKillLdInfo {
              instTag: ld_instTag[tag],
              specTag: ld_specTag_getKill[tag]
          };
      endmethod
  
      method ActionValue#(LSQRespLdResult) respLd(LdQTag t, Data alignedData);
          let res = LSQRespLdResult {
              wrongPath: False,
              dst: Invalid,
              data: ?
          };
          if(ld_waitWPResp_resp[t]) begin
              ld_waitWPResp_resp[t] <= False;
              res.wrongPath = True;
              res.dst = Invalid; // drop wrong path resp
          end
          else begin
              doAssert(ld_valid_resp[t] && ld_memFunc[t] == Ld,
                       "valid resp must come for Ld");
              doAssert(ld_computed_resp[t] &&
                       ld_executing_resp[t] &&
                       !ld_done_resp[t],
                       "must be computed, executing, not done");
              // we may load into x0 reg, then dst is Invalid, so don't assert
              // that dst is valid
              // mark load as done, and shift resp
              ld_done_resp[t] <= True;
              res.wrongPath = False;
              res.dst = dst[t];
              res.data = gatherLoad(ld_paddr_resp[t], ld_byteEn[t],
                                    ld_unsigned[t], alignedData);
          end
          // make conflict with incorrect spec
          wrongSpec_respLd_conflict.wset(?);
  