anchor.diff:     method Action writePacketData(Vector#(2, Bit#(64)) data, Bit#(1) sop, Bit#(1) eop);
      method Action readPacketBuffer(Bit#(16) addr);
      method Action writePacketBuffer(Bit#(16) addr, Bit#(64) data);
  +`ifdef DEBUG_BCAM
      method Action camInsert(Bit#(32) addr, Bit#(32) data);
      method Action camSearch(Bit#(32) data);
  +`endif
      method Action writeSetRam(Bit#(32) addr, Bit#(64) data);
      method Action readSetRam(Bit#(32) addr);
   `ifdef MTABLE
  
positive.code:          //FIXME: BcamReadRequest
           bcam.readServer.request.put(truncate(data));
        endmethod
  
  `ifdef DEBUG_SETRAM
        method Action writeSetRam(Bit#(32) addr, Bit#(64) data);
  
negative.code:    MMUIndicationOutput mmuIndication <- mkMMUIndicationOutput;
  //   SharedBuffer#(12, 128, 1) buff <- mkSharedBuffer(vec(dmaClient), vec(dmaWriteClient), memServerIndication.ifc, mmuIndication.ifc);
  
  `ifdef DEBUG_BCAM
     BinaryCam#(1024, 9) bcam <- mkBinaryCam();
  `endif
  
     Reg#(Bit#(EtherLen)) pktLen <- mkReg(0);
     Reg#(Bit#(9)) rAddr_wires <- mkReg(0);
  