anchor.diff:          axiw.writeResponse(response, 0);
       endrule
   endmodule
  +
  +module mkAxi3Master#(Axi3Client#(busWidth,busWidthBytes,idWidth) client)(Axi3Master#(busWidth,busWidthBytes,idWidth))
  +	 provisos(Div#(busWidth,8,busWidthBytes),Add#(1,a,busWidth));
  +
  +    Wire#(Axi3ReadRequest#(idWidth))                      wReadRequest <- mkDWire(unpack(0));
  +    Wire#(Axi3WriteRequest#(idWidth))                     wWriteRequest <- mkDWire(unpack(0));
  +    Wire#(Axi3WriteData#(busWidth,busWidthBytes,idWidth)) wWriteData <- mkDWire(unpack(0));
  +
  +    interface Axi3MasterWrite write;
  +	method ActionValue#(Bit#(32)) writeAddr() if (False);
  +	    let r <- client.write.address();
  +	    wWriteRequest <= r;
  +	    return r.address;
  +	endmethod
  +	method Bit#(4) writeBurstLen();
  +	    return wWriteRequest.burstLen;
  +	endmethod
  +	method Bit#(3) writeBurstWidth();
  +	    if (valueOf(busWidth) == 32)
  +		return 3'b010; // 3'b010: 32bit, 3'b011: 64bit, 3'b100: 128bit
  +	    else if (valueOf(busWidth) == 64)
  +		return 3'b011;
  +	    else
  +		return 3'b100;
  +	endmethod
  +	method Bit#(2) writeBurstType();  // drive with 2'b01 increment address
  +	    return 2'b01; // increment address
  +	endmethod
  +	method Bit#(2) writeBurstProt(); // drive with 3'b000
  +	    return 2'b000;
  +	endmethod
  +	method Bit#(3) writeBurstCache(); // drive with 4'b0011
  +	    return 3'b0011;
  +	endmethod
  +	method Bit#(idWidth) writeId();
  +	    return wWriteRequest.id;
  +	endmethod
  +
  +	method ActionValue#(Bit#(busWidth)) writeData();
  +	    let d <- client.write.data();
  +	    wWriteData <= d;
  +	    return d.data;
  +	endmethod
  +	method Bit#(busWidthBytes) writeDataByteEnable();
  +	    return maxBound;
  +	endmethod
  +	method Bit#(1) writeLastDataBeat(); // last data beat
  +	    return wWriteData.last;
  +	endmethod
  +
  +	method Action writeResponse(Bit#(2) responseCode, Bit#(idWidth) id);
  +	    client.write.response(Axi3WriteResponse { response: responseCode, id: id});
  +	endmethod
  +    endinterface
  +
  +    interface Axi3MasterRead read;
  +	method ActionValue#(Bit#(32)) readAddr();
  +	    let r <- client.read.address();
  +	    wReadRequest <= r;
  +	    return r.address;
  +	endmethod
  +	method Bit#(4) readBurstLen();
  +	    return wReadRequest.burstLen;
  +	endmethod
  +	method Bit#(3) readBurstWidth();
  +	    if (valueOf(busWidth) == 32)
  +		return 3'b010; // 3'b010: 32bit, 3'b011: 64bit, 3'b100: 128bit
  +	    else if (valueOf(busWidth) == 64)
  +		return 3'b011;
  +	    else
  +		return 3'b100;
  +	endmethod
  +	method Bit#(2) readBurstType();  // drive with 2'b01
  +	    return 2'b01;
  +	endmethod
  +	method Bit#(2) readBurstProt(); // drive with 3'b000
  +	    return 2'b000;
  +	endmethod
  +	method Bit#(3) readBurstCache(); // drive with 4'b0011
  +	    return 3'b0011;
  +	endmethod
  +	method Bit#(idWidth) readId();
  +	    return wReadRequest.id;
  +	endmethod
  +	method Action readData(Bit#(busWidth) data, Bit#(2) resp, Bit#(1) last, Bit#(idWidth) id);
  +	    client.read.data(Axi3ReadResponse { data: data, resp: resp, last: last, id: id});
  +	endmethod
  +   endinterface
  +endmodule
  
positive.code:        method Bit#(3) readBurstCache(); // drive with 4'b0011
             return 3'b011;
         endmethod
         method Bit#(1) readId();
             return 0;
         endmethod
         method Action readData(Bit#(busWidth) data, Bit#(2) resp, Bit#(1) last, Bit#(1) id);
         endmethod
     endinterface
  endmodule
  
negative.code:    endinterface
  endmodule
  
  module mkNullAxi3Master(Axi3Master#(busWidth,busWidthBytes,idWidth)) provisos(Div#(busWidth,8,busWidthBytes),Add#(1,a,busWidth));
     interface Axi3MasterWrite write;
         method ActionValue#(Bit#(32)) writeAddr() if (False);
             return 0;
  