anchor.diff:        Bool stageF_full = (stageF.out.ostatus != OSTATUS_EMPTY);
   
         // ----------------
  +      // Signal from Stage1 back to StageF. Valid (e, pc2) says:
  +      //  - re-start fetching from pc2, with new epoch e.
  +
  +      Maybe #(Tuple2 #(Epoch, WordXL)) redirect = tagged Invalid;
  +
  +      // ----------------
         // Stage3 sink (does regfile writebacks)
   
         if (stage3.out.ostatus == OSTATUS_PIPE) begin
  
positive.code: 	    else if ((! stage1.out.redirect) || (stageF.out.ostatus != OSTATUS_BUSY)) begin
  	       stage2.enq (stage1.out.data_to_stage2);  stage2_full = True;
  	       stage1.deq;                              stage1_full = False;
  	    end
  	 end
  	  
  
negative.code: 	    WordXL  next_pc  = stageF.out.data_to_stageD.pred_pc;
  
  	    // Override, if stage1 is redirecting
  	    if (redirect matches tagged Valid { .e, .pc2 }) begin
  	       epoch   = e;
  	       next_pc = pc2;
  	    end
  
  	    CF_Info cf_info = cf_info_none;
  	    if (   (stage1.out.ostatus == OSTATUS_PIPE)
  		&& (stage1.out.control != CONTROL_DISCARD))
  