anchor.diff:      rule qfsmall;
           fifo_reset_sync.send(pack(qstate != QIdle));
           astate_idle.send(pack(astate == ADelay || astate == AManual));
  +        astate_bitslip.send(pack(astate == AAlign));
       endrule
   
       //*************************** alignment operation FSM *****************
       rule afsminit_rule if (bvi_resets_reg.read() == 0);
  -        serdes_bitslip.send(0);
           ctrl_samplein_i <= 0;
           edge_init <= 0;
           data_init <= 0;
  
positive.code:     Reg#(Bit#(16)) retrycounter <- mkReg(0);
      Reg#(Bit#(16)) gencounter <- mkReg(0);
      FIFO#(Bit#(1)) start_alignment_fsm <- mkFIFO();
      SyncBitIfc#(Bit#(1)) serdes_bitslip <- mkSyncBit(defaultClock, defaultReset, serdes_clock);
  
      //*************************** top align FSM *****************
      rule qfsmreset_rule if (bvi_resets_reg.read() == 0);
  
negative.code:             begin
              gencounter <= 8;
              as = AAlign;
              serdes_start.enq(0);
              end
          astate <= as;
  