anchor.diff:     Reg #(Bit #(1))  rg_sstatus_SUM <- mkRegU;
      Reg #(Bit #(1))  rg_mstatus_MXR <- mkRegU;
      Reg #(WordXL)    rg_satp        <- mkRegU;
  +
  +   // Holds the faulting address
  +   Reg #(WordXL) rg_tval <- mkRegU;
   
      // ----------------------------------------------------------------
   
  
positive.code:       Addr next_word_addr = rg_pc + 2;
        imem32.req (rg_f3, next_word_addr, rg_priv, rg_sstatus_SUM, rg_mstatus_MXR, rg_satp);
        rg_instr_15_0 <= imem32.instr [31:16];
        if (verbosity != 0)
  	 $display ("CPU_Fetch_C.rl_fetch_next_32b:  imem32.pc 0x%0h  next_word_addr 0x%0h",
  		   imem32.pc, next_word_addr);
  
negative.code:    method Instr    instr    = instr_out;
     method Bool     exc      = imem32.exc;
     method Exc_Code exc_code = imem32.exc_code;
     method WordXL   tval     = rg_tval;        // Can be different from rg_pc
  
  endmodule
  
  