anchor.diff:  
      interface Put rgb888;
         method Action put(VideoData#(Rgb888) v);
  -	 rgb888StageReg <= v;
  +	 stage0Reg <= v;
         endmethod
      endinterface
      interface Get yyuv;
         method ActionValue#(VideoData#(Yyuv)) get();
  -	 return yuv422StageReg;
  +	 return stage4Reg;
         endmethod
      endinterface
   endmodule
  
positive.code: 
  (* synthesize *)
  module mkRgb888ToYyuv(Rgb888ToYyuv);
      Reg#(VideoData#(Rgb888)) rgb888StageReg <- mkReg(unpack(0));
      Reg#(VideoData#(Yuv444Intermediates)) yuv444IntermediatesStageReg <- mkReg(unpack(0));
      Reg#(VideoData#(Yuv444)) yuv444StageReg <- mkReg(unpack(0));
      Reg#(VideoData#(Yyuv)) yuv422StageReg <- mkReg(unpack(0));
      Reg#(Bool) evenOddPixelReg <- mkReg(False);
     
      rule yuv444int_rule;
          let previous = rgb888StageReg;
          let pixel = previous.pixel;
          yuv444IntermediatesStageReg <= VideoData {
              vsync: previous.vsync, hsync: previous.hsync, de: previous.de,
              pixel: (previous.de != 0) ? rgbToYuvIntermediates(pixel) : unpack(0)
          };
      endrule
  
      rule yuv444_rule;
          let previous = yuv444IntermediatesStageReg;
          yuv444StageReg <= VideoData {
              vsync: previous.vsync, hsync: previous.hsync, de: previous.de,
  	    pixel: (previous.de != 0) ? yuvIntermediatesToYuv444(previous.pixel) : unpack(0)
          };
      endrule
  
      rule yuv422_rule;
          let previous = yuv444StageReg;
          if (previous.de != 0)
              evenOddPixelReg <= !evenOddPixelReg;
          Yyuv data = Yyuv { uv: evenOddPixelReg ? previous.pixel.u : previous.pixel.v,
                             yy: previous.pixel.y };
          yuv422StageReg <= VideoData {
              vsync: previous.vsync, hsync: previous.hsync, de: previous.de,
              pixel: data
          };
  
negative.code: import GetPut::*;
  import SyncBits::*;
  import YUV::*;
  import Arith::*;
  
  `ifdef ZC706
  typedef 24 HdmiBits;
  