anchor.diff:        Bool is_config_read    =  tlp.sof
                                && (tlp.hit == 7'h01)
                                && (hdr_3dw.format == MEM_READ_3DW_NO_DATA)
  -                             && !in_axi_addr_range
  +                             && (!axiEnabledReg || !in_axi_addr_range)
                                ;
         Bool is_config_write   =  tlp.sof
                                && (tlp.hit == 7'h01)
                                && (hdr_3dw.format == MEM_WRITE_3DW_DATA)
                                && (hdr_3dw.pkttype != COMPLETION)
                                && !in_dma_command_addr_range
  -                             && !in_axi_addr_range
  +                             && (!axiEnabledReg || !in_axi_addr_range)
                                ;
         Bool is_axi_read       =  tlp.sof
                                && (tlp.hit == 7'h01)
                                && (hdr_3dw.format == MEM_READ_3DW_NO_DATA)
                                && in_axi_addr_range
  +			     && axiEnabledReg
                                ;
         Bool is_axi_write      =  tlp.sof
                                && (tlp.hit == 7'h01)
                                && (hdr_3dw.format == MEM_WRITE_3DW_DATA)
                                && (hdr_3dw.pkttype != COMPLETION)
                                && in_axi_addr_range
  +			     && axiEnabledReg
                                ;
         Bool is_dma_command    =  tlp.sof
                                && (tlp.hit == 7'h01)
  
positive.code:    endmethod
  
     interface Reg tlpTracing = tlpTracingReg;
     interface Reg tlpDataBramWrAddr = tlpDataBramWrAddrReg;
     interface Reg tlpSeqno = tlpSeqnoReg;
     interface Reg tlpOutCount = tlpOutCountReg;
     interface Reg axiReadCount = axiReadCountReg;
     interface Reg axiWriteCount = axiWriteCountReg;
     interface Reg axiTlpCount = axiTlpCountReg;
  
negative.code:          // indicate activity type
           if (is_config_read)                     is_read.send();
           if (is_config_write || is_dma_command)  is_write.send();
           if (is_dma_completion)                  is_completion.send();
        end
        else begin
  