anchor.diff:  		     k0jm1 <= k0j;  /* pipeline from previous cycle */
   		     k1jm1 <= k1j;
   		     /* start read of k0j */
  -		     k0.portA.request.put(BRAMRequest{write: False, responseOnWrite: False, address: zeroExtend(jj), datain: 0});
  +		     matL.request.put(BRAMRequest{write: False, responseOnWrite: False, address: zeroExtend(jj), datain: 0});
   		  endaction
   		  action
   		     let ta <- strA.response.get();
   		     let tb <- strB.response.get();
  -		     let tk <- k0.portA.response.get();
  +		     let tk <- matL.response.get();
   		     aData <= ta;
   		     bData <= tb;
   		     k0j <= tk;
  
positive.code:    Reg#(Bit#(16)) k0jm1 <- mkReg(0);
     BRAM1Port#(Bit#(lIndexWidth), Bit#(16)) k0  <- mkBRAM1Server(defaultValue);
  
  
    Stmt hirschB =
     seq
        $display("hirschB running ");
  
negative.code: 		     k1j <= tmp;
  		  endaction
  		     //$display("     L[%d][%d] = %d ", ii, jj, k1j);
  	       endseq
  	 endseq
     endseq;
  