anchor.diff:  	    let client = reqFifo.first.client;
   	    let rename_tag = reqFifo.first.rename_tag;
   	    reqFifo.deq;
  -	    mwDreqFifo.enq(DRec{req:req, client:client, rename_tag:rename_tag, last: False });
  +	    mwDreqFifo.enq(DRec{req:req, client:client, rename_tag:rename_tag, last: (req.burstLen == fromInteger(valueOf(dataWidthBytes))) });
   	    //$display("writeReq: client=%d, rename_tag=%d", client,rename_tag);
   	    return MemRequest{addr:physAddr, burstLen:req.burstLen, tag:extend(rename_tag)};
   	 endmethod
  
positive.code:       let rename_tag = mwDreqFifo.first.rename_tag;
        ObjectData#(dataWidth) tagdata <- writeClients[client].writeData.get();
        let burstLen = burstReg;
        if (burstLen == 0) begin
  	 burstLen = req.burstLen >> beat_shift;
  	 respFifos[rename_tag].enq(RResp{orig_tag:req.tag, client:client});
        end
        burstReg <= burstLen-1;
        beatCount <= beatCount+1;
        if (burstLen == 1)
  	 mwDreqFifo.deq();
        //$display("writeData: client=%d, rename_tag=%d", client, rename_tag);
        memDataFifo.enq(MemData { data: tagdata.data,  tag:extend(rename_tag), last: False });
  
negative.code:    FIFO#(Tuple2#(RResp#(numClients,addrWidth),Bit#(6))) writeDonePipelineFifo <- mkFIFO;
  
     Reg#(Bit#(8)) burstReg <- mkReg(0);   
     Reg#(Bool)    firstReg <- mkReg(True);
     Reg#(Bool)     lastReg <- mkReg(False);
     Reg#(Bit#(64)) beatCount <- mkReg(0);
     let beat_shift = fromInteger(valueOf(beatShift));
  
  