anchor.diff:  
      interface Reg#(Bool) tlpTracing;
      interface Reg#(Bool) axiEnabled;
  -   interface Reg#(Bool) pipeliningEnabled;
      interface Reg#(Bool) byteSwap;
      interface Reg#(Bool) use4dw;
      interface Reg#(Bit#(4)) numPortals;
  
positive.code: 
     Reg#(Bool) tlpTracingReg <- mkReg(False);
     Reg#(Bool) axiEnabledReg <- mkReg(False);
     Reg#(Bool) pipeliningEnabledReg <- mkReg(False);
     Reg#(Bool) byteSwapReg <- mkReg(False);
     Reg#(Bool) use4dwReg <- mkReg(True);
     Reg#(Bit#(4)) numPortalsReg <- mkReg(1);
  
negative.code: 
     interface Reg tlpTracing = tlpTracingReg;
     interface Reg axiEnabled = axiEnabledReg;
     interface Reg byteSwap = byteSwapReg;
     interface Reg use4dw = use4dwReg;
     interface Reg numPortals = numPortalsReg;
  