anchor.diff:     FIFOF#(XYIteratorConfig#(Bit#(10))) convRequestFifo <- mkFIFOF();
      XYIteratorIfc#(Bit#(10)) convIterator <- mkXYIteratorOut();
      XYIteratorIfc#(Bit#(10)) ipIterator <- mkXYIteratorOut();
  -   FIFOF#(XYIteratorConfig#(Bit#(10))) rpMutex <- mkFIFOF1();
   
      IteratorIfc#(Bit#(16)) rowIterator <- mkIteratorOut();
      IteratorIfc#(Bit#(16)) colIterator <- mkIteratorOut();
  
positive.code: 			       };
        ipIterator.start(req);
        $display("range startRule row=%d col=%d", rowNumber, colNumber);
        rpMutex.enq(req);
     endrule
  
     rule issueBramReadRequest;
  
negative.code:       let addr = (x << kernelColAddrBits) | y;
        bramRequestFifo.enq(BRAMRequest{write: False, responseOnWrite: False, address: addr, datain: 0});
        lastFifo.enq(tuple4(ipIterator.isFirst(), ipIterator.isLast(), x, y));
        $display("issueBramReadRequest x=%d y=%d first=%d last=%d", x, y, ipIterator.isFirst(), ipIterator.isLast());
     endrule
     rule issueInnerProdRequest;
  