anchor.diff:                STATE_FETCH,
                 STATE_EXEC,
                 STATE_WRITE_BACK,
  -              STATE_FINISH,
                 STATE_HALT
      } CPU_STATE
   deriving(Eq, Bits, FShow);
  
positive.code: 
           Decoded_Instr decoded = fv_decode(pc, instr);
           fa_exec(decoded);
        end
     endrule
  
  
negative.code: 
        // NOTE: DOES NOT check register x0 because set value to Zero when read
        regfile.upd(rd, rd_value);
        cpu_state <= STATE_FETCH;
     endrule
  
  
  
     // ---------------- Increment csr_cycle according to external oracles
  
  