anchor.diff:           // Main body of fa_exec(), dispatching to the sub functions
            // based on major OPCODE
   
  -         if      (decoded.opcode == op_LUI)      fa_exec_LUI();
  -         else if (decoded.opcode == op_AUIPC)    fa_exec_AUIPC();
  -         else if (decoded.opcode == op_JAL)      fa_exec_JAL();
  -         else if (decoded.opcode == op_JALR)     fa_exec_JALR();
  -         else if (decoded.opcode == op_BRANCH)   fa_exec_BRANCH();
  -         else if (decoded.opcode == op_LOAD)     fa_exec_LD_Req();
  -         else if (decoded.opcode == op_STORE)    fa_exec_ST_Req();
  -         else if (decoded.opcode == op_OP_IMM)   fa_exec_OP_IMM();
  -         else if (decoded.opcode == op_OP)       fa_exec_OP();
  -         else if (decoded.opcode == op_MISC_MEM) fa_exec_MISC_MEM();
  -         else if (decoded.opcode == op_SYSTEM)   fa_exec_SYSTEM();
  -         else fa_finish_with_exception(pc, exc_code_ILLEGAL_INSTRUCTION, ?);
  +         case(decoded.instr)
  +            OP_LUI      :  fa_exec_LUI();
  +            OP_AUIPC    :  fa_exec_AUIPC();
  +            OP_JAL      :  fa_exec_JAL();
  +            OP_JALR     :  fa_exec_JALR();
  +
  +            OP_BEQ      ,
  +            OP_BNE      ,
  +            OP_BLT      ,
  +            OP_BGE      ,
  +            OP_BLTU     ,
  +            OP_BGEU     :  fa_exec_BRANCH();
  +
  +            OP_LB       ,
  +            OP_LBU      ,
  +            OP_LH       ,
  +            OP_LHU      ,
  +            OP_LW       :  fa_exec_LD_Req();
  +
  +            OP_SB       ,
  +            OP_SH       ,
  +            OP_SW       :  fa_exec_ST_Req();
  +
  +            OP_ADDI     ,
  +            OP_SLTI     ,
  +            OP_SLTIU    ,
  +            OP_XORI     ,
  +            OP_ORI      ,
  +            OP_ANDI     ,
  +            OP_SLLI     ,
  +            OP_SRLI     ,
  +            OP_SRAI     :  fa_exec_OP_IMM();
  +
  +            OP_ADD      ,
  +            OP_SUB      ,
  +            OP_SLL      ,
  +            OP_SLT      ,
  +            OP_SLTU     ,
  +            OP_XOR      ,
  +            OP_SRL      ,
  +            OP_SRA      ,
  +            OP_OR       ,
  +            OP_AND      :  fa_exec_OP();
  +
  +            OP_FENCE    ,
  +            OP_FENCE_I  :  fa_exec_MISC_MEM();
  +
  +            OP_CSRRW    ,
  +            OP_CSRRS    ,
  +            OP_CSRRC    :  fa_exec_SYSTEM();
  +
  +            default     :  fa_finish_with_exception(pc, exc_code_ILLEGAL_INSTRUCTION, ?);
  +         endcase
         endaction
      endfunction: fa_exec
   
  
positive.code: 
                 rg_mem_addr <= mem_addr;
  
                 if      (decoded.funct3 == f3_LB)      fa_LD_Req(BITS8);
                 else if (decoded.funct3 == f3_LBU)     fa_LD_Req(BITS8);
                 else if (decoded.funct3 == f3_LH)      fa_LD_Req(BITS16);
                 else if (decoded.funct3 == f3_LHU)     fa_LD_Req(BITS16);
                 else if (decoded.funct3 == f3_LW)      fa_LD_Req(BITS32);
                 else fa_finish_with_exception(pc, exc_code_ILLEGAL_INSTRUCTION, ?);
  
                 if (cfg_verbose > 2) begin
                    $display("[%7d] Decoded: PC = %h, %s %s, %s, %1d", csr_cycle, decoded.pc,
                                case(decoded.funct3)
                                   f3_LB  : "lb";
                                   f3_LBU : "lbu";
                                   f3_LH  : "lh";
                                   f3_LHU : "lhu";
                                   f3_LW  : "lw";
                                endcase,
                                regNameABI[decoded.rd],
                                regNameABI[decoded.rs1],
  
negative.code: 
           function Action fa_exec_MISC_MEM();
              action
                 case(decoded.instr)
                    OP_FENCE :  fa_finish_with_no_output;
                    /*OP_FENCE_I*/
                    default  :  fa_finish_with_no_output;
                 endcase
  
                 if (cfg_verbose > 2) $display("[%7d] Decoded: PC = %h, %s (ignore)", csr_cycle, decoded.pc, decoded.funct3 == f3_FENCE ? "fence" : "fence.i");
              endaction
  