anchor.diff:        phy10g.tx.parallel_data0(pack(tx_data0));
      endrule
   
  -`ifndef NUMBER_OF_10G_PORTS
  +`ifndef NUMBER_OF_ALTERA_PORTS
      Wire#(Bit#(66)) tx_data1 <- mkDWire(0, clocked_by clk_156_25, reset_by noReset);
      rule getTxFifo1;
         let v <- toGet(txFifo[1]).get;
  
positive.code:           return phy10g.rx.is_lockedtoref0;
         endmethod
     endinterface;
  `ifndef NUMBER_OF_10G_PORTS
     status_ifcs[1] = interface Status;
         method Bit#(1) pll_locked;
            return phy10g.pll.locked1;
  
negative.code:    rule receive0;
        rxFifo[0].enq(phy10g.rx.parallel_data0);
     endrule
  `ifndef NUMBER_OF_ALTERA_PORTS
     rule receive1;
        rxFifo[1].enq(phy10g.rx.parallel_data1);
     endrule
  