anchor.diff:  
      rule complete_burst0;
         let tag <- tag_gen.complete;
  -      dreqBram.portB.request.put(BRAMRequest{write:False, address:tag, datain: ?, responseOnWrite: ?});
  -      compFifo1.enq(tag);
  -      if(debug) $display("mkMemReadInternal::complete_burst0 %h", tag);
  +      serverProcessing.portB.request.put(BRAMRequest{write:False, address:tag, datain: ?, responseOnWrite: ?});
  +      serverTag.enq(tag);
  +      if(verbose) $display("mkMemReadInternal::complete_burst0 %h", tag);
      endrule
      
      rule complete_burst1a if (compCountReg==0);
  -      let drq <- dreqBram.portB.response.get;
  +      let drq <- serverProcessing.portB.response.get;
         let req_burstLen = drq.req_burstLen;
         let client = drq.client;
         let cnt = req_burstLen >> beat_shift;
  -      let tag <- toGet(compFifo1).get;
  +      let tag <- toGet(serverTag).get;
         if(killv[drq.req_tag[5:4]] == False) begin
  -	 compFifo0.enq(extend(client));
  -	 readBufferBram.portB.request.put(BRAMRequest{write:False, address:{tag,truncate(cnt)}, datain: ?, responseOnWrite: ?});
  +	 clientSelect.enq(extend(client));
  +	 clientData.portB.request.put(BRAMRequest{write:False, address:{tag,truncate(cnt)}, datain: ?, responseOnWrite: ?});
         end
         compCountReg <= cnt-1;
         compTagReg <= tag;
         compClientReg <= client;
         compTileReg <= drq.req_tag[5:4];
  -      if(debug) $display("mkMemReadInternal::complete_burst1a %h", client);
  +      if(verbose) $display("mkMemReadInternal::complete_burst1a %h", client);
      endrule
   
      rule complete_burst1b if (compCountReg > 0);
         let cnt = compCountReg;
         let tag = compTagReg;
  -      let cli = compClientReg;
  +      let client = compClientReg;
         if(killv[compTileReg] == False) begin
  -	 compFifo0.enq(extend(cli));
  -	 readBufferBram.portB.request.put(BRAMRequest{write:False, address:{tag,truncate(cnt)}, datain: ?, responseOnWrite: ?});
  +	 clientSelect.enq(extend(client));
  +	 clientData.portB.request.put(BRAMRequest{write:False, address:{tag,truncate(cnt)}, datain: ?, responseOnWrite: ?});
         end
         compCountReg <= cnt-1;
  -      if(debug) $display("mkMemReadInternal::complete_burst1b count %h", compCountReg);
  +      if(verbose) $display("mkMemReadInternal::complete_burst1b count %h", compCountReg);
      endrule
            
      rule checkMmuResp;
  -      let req = lreqFifo.first.req;
  -      let client = lreqFifo.first.client;
  +      let req = clientRequest.first.req;
  +      let client = clientRequest.first.client;
         let physAddr <- mmus[req.sglId[31:16]].response.get;
         let rename_tag <- tag_gen.getTag;
  -      lreqFifo.deq();
  -      reqFifo.enq(RRec{req:req, pa:physAddr, client:client, rename_tag:extend(rename_tag)});
  -      if (debug) $display("mkMemReadInternal::checkMmuResp: client=%d, rename_tag=%d", client,rename_tag);
  -      if (debug) $display("mkMemReadInternal::mmuResp %d %d", client, cycle_cnt-last_mmuResp);
  +      clientRequest.deq();
  +      serverRequest.enq(RRec{req:req, pa:physAddr, client:client, rename_tag:extend(rename_tag)});
  +      if (verbose) $display("mkMemReadInternal::checkMmuResp: client=%d, rename_tag=%d", client,rename_tag);
  +      if (verbose) $display("mkMemReadInternal::mmuResp %d %d", client, cycle_cnt-last_mmuResp);
         last_mmuResp <= cycle_cnt;
      endrule
      
      rule read_data;
  -      let response <- toGet(readDataPipelineFifo).get();
  +      let response <- toGet(serverData).get();
         Bit#(MemTagSize) response_tag = response.tag;
  -      let drq <- dreqBram.portA.response.get;
  +      let drq <- serverProcessing.portA.response.get;
         let otag = drq.req_tag;
         let burstLen = burstReg;
         let first =    firstReg;
  
positive.code:    interface PhysMemReadClient client;
        interface Get readReq;
  	 method ActionValue#(PhysMemRequest#(addrWidth)) get();
  	    reqFifo.deq;
  	    let req = reqFifo.first.req;
  	    let physAddr = reqFifo.first.pa;
  	    let client = reqFifo.first.client;
  	    let rename_tag = reqFifo.first.rename_tag;
  	    if (False && physAddr[31:24] != 0)
  	       $display("mkMemReadInternal::req_ar: funny physAddr req.sglId=%d req.offset=%h physAddr=%h", req.sglId, req.offset, physAddr);
  	    dreqBram.portB.request.put(BRAMRequest{write:True, responseOnWrite:False, address:truncate(rename_tag),
  						   datain:DRec{req_tag:req.tag, req_burstLen: req.burstLen, client:client, rename_tag:rename_tag, last:(req.burstLen == fromInteger(valueOf(dataWidthBytes)))}});
  	    //$display("mkMemReadInternal::readReq: client=%d, rename_tag=%d, physAddr=%h req.burstLen=%d beat_shift=%d last=%d", client,rename_tag,physAddr, req.burstLen, beat_shift, req.burstLen == beat_shift);
  	    if (debug) $display("mkMemReadInternal::read_client.readReq %d", cycle_cnt-last_readReq);
  	    last_readReq <= cycle_cnt;
  	    return PhysMemRequest{addr:physAddr, burstLen:req.burstLen, tag:rename_tag};
  	 endmethod
        endinterface
        interface Put readData;
  	 method Action put(MemData#(dataWidth) response);
  	    readDataPipelineFifo.enq(response);
  	    dreqBram.portA.request.put(BRAMRequest{write:False, address:truncate(response.tag), datain: ?, responseOnWrite: ?});
  	    beatCount <= beatCount+1;
  	 endmethod
        endinterface
  
negative.code: 		     method Action put(MemRequest req);
  			last_loadClient <= cycle_cnt;
  			let mmusel = req.sglId[31:16];
        			if (verbose) $display("mkMemReadInternal::loadClient server %d mmusel %d cycle %d", i, mmusel, cycle_cnt-last_loadClient);
  			if (mmusel >= fromInteger(valueOf(numMMUs)))
  			   dmaErrorFifo.enq(DmaError { errorType: DmaErrorMMUOutOfRange_r, pref: req.sglId });
     			else if (sglid_outofrange(req.sglId))
  			   dmaErrorFifo.enq(DmaError { errorType: DmaErrorSGLIdOutOfRange_r, pref: req.sglId });
     			else if (stopv[req.tag[5:4]] == False) begin
     			   clientRequest.enq(LRec{req:req, client:fromInteger(i)});
     			   mmus[mmusel].request.put(ReqTup{id:truncate(req.sglId),off:req.offset});
     			end
  		     endmethod
  		  endinterface
  		  interface Get readData;
  		     method ActionValue#(MemData#(dataWidth)) get if (clientSelect.first == fromInteger(i));
  			clientSelect.deq;
  			let data <- clientData.portB.response.get;
  			if (verbose) $display("mkMemReadInternal::comp server %d data %x cycle %d", i, data.data, cycle_cnt-last_comp);
  			last_comp <= cycle_cnt;
  			return data;
  		     endmethod
  