anchor.diff:  import Clocks::*;
   import DefaultValue::*;
   import XilinxCells::*;
  -import Vector::*;
   import GetPut::*;
   
   typedef struct {
  
positive.code:     //interface m_axi_gp1;
      //endinterface
      method pjtag_tck(PJTAG_TCK)  enable((*inhigh*) en08);
      //interface pjtag_td;
      //endinterface
      method pjtag_tms(PJTAG_TMS)  enable((*inhigh*) en07);
      method ps_clk(PS_CLK)  enable((*inhigh*) en06);
      method ps_porb(PS_PORB)  enable((*inhigh*) en05);
      method ps_srstb(PS_SRTSB)  enable((*inhigh*) en04);
      //interface sdio;
      //endinterface
      //interface spi;
      //endinterface
      method sram_intin(SRAM_INTIN)  enable((*inhigh*) en03);
      method trace_clk(TRACE_CLK)  enable((*inhigh*) en02);
      method   TRACE_CTL trace_ctl();
      method   TRACE_DATA trace_data();
      //interface ttc;
      //endinterface
      //interface uart;
      //endinterface
      //interface usb;
  //    Vector#(2, Usb) usbif;
  //    usbif[0] = interface Usb;
  //        method PORT_INDCTL port_indctl();
  //            return ?;
  //        endmethod
  //        //method vbus_pwrfault(VBUS_PWRFAULT) enable((*inhigh*) en00);
  //        //endmethod
  //        method VBUS_PWRSELECT vbus_pwrselect();
  //            return ?;
  //        endmethod
  //        //method Bit#(2)            port_indctl();
  //        method Action             vbus_pwrfault(Bit#(1) v);
  //        endmethod
  //        //method Bit#(1)            vbus_pwrselect();
  //        //endmethod
  //        endinterface;
  //    usbif[1] = interface Usb;
  //        method PORT_INDCTL1 port_indctl();
  //            return ?;
  //        endmethod
  //        //method vbus_pwrfault(VBUS_PWRFAULT1) enable((*inhigh*) en00);
  //        //endmethod
  //        method VBUS_PWRSELECT1 vbus_pwrselect();
  //            return ?;
  //        endmethod
  //        //method Bit#(2)            port_indctl();
  //        method Action             vbus_pwrfault(Bit#(1) v);
  //        endmethod
  //        //method Bit#(1)            vbus_pwrselect();
  //        //endmethod
  //        endinterface;
  //    //interface Vector#(2, Usb) usb = usbif;
      //interface Vector usb;
          //method VBUS_PWRSELECT1 vbus_pwrselect[0]();
      //endinterface
      method wdt_clk_in(WDT_CLK_IN)  enable((*inhigh*) en01);
      method WDT_RST_OUT wdt_rst_out();
      //schedule (datain, idatain, inc, ce) CF (datain, idatain, inc, ce);
  
negative.code:     method DDR_VRP      vrp();
      method DDR_WEB      web();
      endinterface
      interface Dma dma0;
      method aclk(DMA0_ACLK) enable((*inhigh*) en105);
      method daready(DMA0_DAREADY) enable((*inhigh*) en106);
      method DMA0_DATYPE datype();
      method DMA0_DAVALID davalid();
      method drlast(DMA0_DRLAST) enable((*inhigh*) en107);
      method DMA0_DRREADY drready();
      method drtype(DMA0_DRTYPE) enable((*inhigh*) en108);
      method drvalid(DMA0_DRVALID) enable((*inhigh*) en109);
      method DMA0_RSTN rstn();
      endinterface
      interface Dma dma1;
      method aclk(DMA1_ACLK) enable((*inhigh*) en110);
      method daready(DMA1_DAREADY) enable((*inhigh*) en111);
      method DMA1_DATYPE datype();
      method DMA1_DAVALID davalid();
      method drlast(DMA1_DRLAST) enable((*inhigh*) en112);
      method DMA1_DRREADY drready();
      method drtype(DMA1_DRTYPE) enable((*inhigh*) en113);
      method drvalid(DMA1_DRVALID) enable((*inhigh*) en114);
      method DMA1_RSTN rstn();
      endinterface
      interface Dma dma2;
      method aclk(DMA2_ACLK) enable((*inhigh*) en115);
      method daready(DMA2_DAREADY) enable((*inhigh*) en116);
      method DMA2_DATYPE datype();
      method DMA2_DAVALID davalid();
      method drlast(DMA2_DRLAST) enable((*inhigh*) en117);
      method DMA2_DRREADY drready();
      method drtype(DMA2_DRTYPE) enable((*inhigh*) en118);
      method drvalid(DMA2_DRVALID) enable((*inhigh*) en119);
      method DMA2_RSTN rstn();
      endinterface
      interface Dma dma3;
      method aclk(DMA3_ACLK) enable((*inhigh*) en120);
      method daready(DMA3_DAREADY) enable((*inhigh*) en121);
      method DMA3_DATYPE datype();
      method DMA3_DAVALID davalid();
      method drlast(DMA3_DRLAST) enable((*inhigh*) en122);
      method DMA3_DRREADY drready();
      method drtype(DMA3_DRTYPE) enable((*inhigh*) en123);
      method drvalid(DMA3_DRVALID) enable((*inhigh*) en124);
      method DMA3_RSTN rstn();
      endinterface
      interface Enet enet0;
      method ext_intin(ENET0_EXT_INTIN) enable((*inhigh*) en125);
      method gmii_col(ENET0_GMII_COL) enable((*inhigh*) en126);
      method gmii_crs(ENET0_GMII_CRS) enable((*inhigh*) en127);
      method gmii_rxd(ENET0_GMII_RXD) enable((*inhigh*) en128);
      method gmii_rx_clk(ENET0_GMII_RX_CLK) enable((*inhigh*) en129);
      method gmii_rx_dv(ENET0_GMII_RX_DV) enable((*inhigh*) en130);
      method gmii_rx_er(ENET0_GMII_RX_ER) enable((*inhigh*) en131);
      method ENET0_GMII_TXD gmii_txd();
      method gmii_tx_clk(ENET0_GMII_TX_CLK) enable((*inhigh*) en132);
      method ENET0_GMII_TX_EN gmii_tx_en();
      method ENET0_GMII_TX_ER gmii_tx_er();
      method ENET0_MDIO_MDC mdio_mdc();
      interface Bidir       mdio;
          method i(ENET0_MDIO_I) enable((*inhigh*) en170);
          method ENET0_MDIO_O o();
          method ENET0_MDIO_T t();
      endinterface
      method ENET0_PTP_DELAY_REQ_RX ptp_delay_req_rx();
      method ENET0_PTP_DELAY_REQ_TX ptp_delay_req_tx();
      method ENET0_PTP_PDELAY_REQ_RX ptp_pdelay_req_rx();
      method ENET0_PTP_PDELAY_REQ_TX ptp_pdelay_req_tx();
      method ENET0_PTP_PDELAY_RESP_RX ptp_pdelay_resp_rx();
      method ENET0_PTP_PDELAY_RESP_TX ptp_pdelay_resp_tx();
      method ENET0_PTP_SYNC_FRAME_RX ptp_sync_frame_rx();
      method ENET0_PTP_SYNC_FRAME_TX ptp_sync_frame_tx();
      method ENET0_SOF_RX sof_rx();
      method ENET0_SOF_TX sof_tx();
      endinterface
      interface Enet enet1;
      method ext_intin(ENET1_EXT_INTIN) enable((*inhigh*) en133);
      method gmii_col(ENET1_GMII_COL) enable((*inhigh*) en134);
      method gmii_crs(ENET1_GMII_CRS) enable((*inhigh*) en135);
      method gmii_rxd(ENET1_GMII_RXD) enable((*inhigh*) en136);
      method gmii_rx_clk(ENET1_GMII_RX_CLK) enable((*inhigh*) en137);
      method gmii_rx_dv(ENET1_GMII_RX_DV) enable((*inhigh*) en138);
      method gmii_rx_er(ENET1_GMII_RX_ER) enable((*inhigh*) en139);
      method ENET1_GMII_TXD gmii_txd();
      method gmii_tx_clk(ENET1_GMII_TX_CLK) enable((*inhigh*) en140);
      method ENET1_GMII_TX_EN gmii_tx_en();
      method ENET1_GMII_TX_ER gmii_tx_er();
      method ENET1_MDIO_MDC mdio_mdc();
      interface Bidir       mdio;
          method i(ENET1_MDIO_I) enable((*inhigh*) en171);
          method ENET1_MDIO_O o();
          method ENET1_MDIO_T t();
      endinterface
      method ENET1_PTP_DELAY_REQ_RX ptp_delay_req_rx();
      method ENET1_PTP_DELAY_REQ_TX ptp_delay_req_tx();
      method ENET1_PTP_PDELAY_REQ_RX ptp_pdelay_req_rx();
      method ENET1_PTP_PDELAY_REQ_TX ptp_pdelay_req_tx();
      method ENET1_PTP_PDELAY_RESP_RX ptp_pdelay_resp_rx();
      method ENET1_PTP_PDELAY_RESP_TX ptp_pdelay_resp_tx();
      method ENET1_PTP_SYNC_FRAME_RX ptp_sync_frame_rx();
      method ENET1_PTP_SYNC_FRAME_TX ptp_sync_frame_tx();
      method ENET1_SOF_RX sof_rx();
      method ENET1_SOF_TX sof_tx();
      endinterface
      method event_eventi(EVENT_EVENTI)  enable((*inhigh*) en24);
      method EVENT_EVENTO event_evento();
      method EVENT_STANDBYWFE event_standbywfe();
      method EVENT_STANDBYWFI event_standbywfi();
      method FCLK_CLK0 fclk_clk0();
      method FCLK_CLK1 fclk_clk1();
      method FCLK_CLK2 fclk_clk2();
      method FCLK_CLK3 fclk_clk3();
      method fclk_clktrig0_n(FCLK_CLKTRIG0_N)  enable((*inhigh*) en23);
      method fclk_clktrig1_n(FCLK_CLKTRIG1_N)  enable((*inhigh*) en22);
      method fclk_clktrig2_n(FCLK_CLKTRIG2_N)  enable((*inhigh*) en21);
      method fclk_clktrig3_n(FCLK_CLKTRIG3_N)  enable((*inhigh*) en20);
      method FCLK_RESET0_N fclk_reset0_n();
      method FCLK_RESET1_N fclk_reset1_n();
      method FCLK_RESET2_N fclk_reset2_n();
      method FCLK_RESET3_N fclk_reset3_n();
      method fpga_idle_n(FPGA_IDLE_N)  enable((*inhigh*) en19);
      method ftmd_tracein_atid(FTMD_TRACEIN_ATID)  enable((*inhigh*) en18);
      method ftmd_tracein_clk(FTMD_TRACEIN_CLK)  enable((*inhigh*) en17);
  