anchor.diff:  	 to.tvalid(pack(asgetfifo.notEmpty));
         endrule
         rule rl_deq if (to.tready == 1);
  +`ifdef GET_PUT_WITH_CLOCKS_USE_XILINX_FIFO
  +	 putProbe <= asgetfifo.first();
  +`endif
   	 asgetfifo.deq();
         endrule
      endmodule
  
positive.code:    provisos (Bits#(dtype, dataWidth));
     module mkConnection#(AxiStreamMaster#(dataWidth) from, Put#(dtype) to)(Empty);
        FIFOF#(Bit#(dataWidth)) asputfifo <- mkFIFOF();
        rule rl_ready;
  	 from.tready(pack(asputfifo.notFull));
        endrule
        rule rl_enq if (from.tvalid == 1);
  	 asputfifo.enq(from.tdata);
        endrule
        rule rl_put;
  	 let v <- toGet(asputfifo).get();
  	 to.put(unpack(v));
        endrule
     endmodule
  
negative.code: 
  instance Connectable#(AxiStreamMaster#(dataWidth), AxiStreamSlave#(dataWidth));
     module mkConnection#(AxiStreamMaster#(dataWidth) from, AxiStreamSlave#(dataWidth) to)(Empty);
  `ifdef GET_PUT_WITH_CLOCKS_USE_XILINX_FIFO
        cnxProbe <- mkProbe;
        rule rl_probe if (from.tvalid() == 1 and to.tready() == 1);;
  	 cnxProbe <= from.tdata();
        endrule
  `endif
        rule rl_axi_stream;
  	 to.tdata(from.tdata());
  	 to.tkeep(from.tkeep());
  