anchor.diff:      method Action PS_CLK(Bit#(1) v);
       method Action PS_PORB(Bit#(1) v);
       method Action PS_SRSTB(Bit#(1) v);
  -    method Bit#(1) SDIO0_BUSPOW();
  -    method Bit#(3) SDIO0_BUSVOLT();
  -    method Action SDIO0_CDN(Bit#(1) v);
  -    method Bit#(1) SDIO0_CLK();
  -    method Action SDIO0_CLK_FB(Bit#(1) v);
  -    method Action SDIO0_CMD_I(Bit#(1) v);
  -    method Bit#(1) SDIO0_CMD_O();
  -    method Bit#(1) SDIO0_CMD_T();
  -    method Action SDIO0_DATA_I(Bit#(4) v);
  -    method Bit#(4) SDIO0_DATA_O();
  -    method Bit#(4) SDIO0_DATA_T();
  -    method Bit#(1) SDIO0_LED();
  -    method Action SDIO0_WP(Bit#(1) v);
  -    method Bit#(1) SDIO1_BUSPOW();
  -    method Bit#(3) SDIO1_BUSVOLT();
  -    method Action SDIO1_CDN(Bit#(1) v);
  -    method Bit#(1) SDIO1_CLK();
  -    method Action SDIO1_CLK_FB(Bit#(1) v);
  -    method Action SDIO1_CMD_I(Bit#(1) v);
  -    method Bit#(1) SDIO1_CMD_O();
  -    method Bit#(1) SDIO1_CMD_T();
  -    method Action SDIO1_DATA_I(Bit#(4) v);
  -    method Bit#(4) SDIO1_DATA_O();
  -    method Bit#(4) SDIO1_DATA_T();
  -    method Bit#(1) SDIO1_LED();
  -    method Action SDIO1_WP(Bit#(1) v);
  -    method Action SPI0_MISO_I(Bit#(1) v);
  -    method Bit#(1) SPI0_MISO_O();
  -    method Bit#(1) SPI0_MISO_T();
  -    method Action SPI0_MOSI_I(Bit#(1) v);
  -    method Bit#(1) SPI0_MOSI_O();
  -    method Bit#(1) SPI0_MOSI_T();
  -    method Action SPI0_SCLK_I(Bit#(1) v);
  -    method Bit#(1) SPI0_SCLK_O();
  -    method Bit#(1) SPI0_SCLK_T();
  -    method Bit#(1) SPI0_SS1_O();
  -    method Bit#(1) SPI0_SS2_O();
  -    method Action SPI0_SS_I(Bit#(1) v);
  -    method Bit#(1) SPI0_SS_O();
  -    method Bit#(1) SPI0_SS_T();
  -    method Action SPI1_MISO_I(Bit#(1) v);
  -    method Bit#(1) SPI1_MISO_O();
  -    method Bit#(1) SPI1_MISO_T();
  -    method Action SPI1_MOSI_I(Bit#(1) v);
  -    method Bit#(1) SPI1_MOSI_O();
  -    method Bit#(1) SPI1_MOSI_T();
  -    method Action SPI1_SCLK_I(Bit#(1) v);
  -    method Bit#(1) SPI1_SCLK_O();
  -    method Bit#(1) SPI1_SCLK_T();
  -    method Bit#(1) SPI1_SS1_O();
  -    method Bit#(1) SPI1_SS2_O();
  -    method Action SPI1_SS_I(Bit#(1) v);
  -    method Bit#(1) SPI1_SS_O();
  -    method Bit#(1) SPI1_SS_T();
  +    interface Sdio SDIO0;
  +    interface Sdio SDIO1;
  +    interface Spi SPI0;
  +    interface Spi SPI1;
       method Action SRAM_INTIN(Bit#(1) v);
       method Action TRACE_CLK(Bit#(1) v);
       method Bit#(1) TRACE_CTL();
       method Bit#(32) TRACE_DATA();
  -    method Action TTC0_CLK0_IN(Bit#(1) v);
  -    method Action TTC0_CLK1_IN(Bit#(1) v);
  -    method Action TTC0_CLK2_IN(Bit#(1) v);
  -    method Bit#(1) TTC0_WAVE0_OUT();
  -    method Bit#(1) TTC0_WAVE1_OUT();
  -    method Bit#(1) TTC0_WAVE2_OUT();
  -    method Action TTC1_CLK0_IN(Bit#(1) v);
  -    method Action TTC1_CLK1_IN(Bit#(1) v);
  -    method Action TTC1_CLK2_IN(Bit#(1) v);
  -    method Bit#(1) TTC1_WAVE0_OUT();
  -    method Bit#(1) TTC1_WAVE1_OUT();
  -    method Bit#(1) TTC1_WAVE2_OUT();
  -    method Action UART0_CTSN(Bit#(1) v);
  -    method Action UART0_DCDN(Bit#(1) v);
  -    method Action UART0_DSRN(Bit#(1) v);
  -    method Bit#(1) UART0_DTRN();
  -    method Action UART0_RIN(Bit#(1) v);
  -    method Bit#(1) UART0_RTSN();
  -    method Action UART0_RX(Bit#(1) v);
  -    method Bit#(1) UART0_TX();
  -    method Action UART1_CTSN(Bit#(1) v);
  -    method Action UART1_DCDN(Bit#(1) v);
  -    method Action UART1_DSRN(Bit#(1) v);
  -    method Bit#(1) UART1_DTRN();
  -    method Action UART1_RIN(Bit#(1) v);
  -    method Bit#(1) UART1_RTSN();
  -    method Action UART1_RX(Bit#(1) v);
  -    method Bit#(1) UART1_TX();
  -    method Bit#(2) USB0_PORT_INDCTL();
  -    method Action USB0_VBUS_PWRFAULT(Bit#(1) v);
  -    method Bit#(1) USB0_VBUS_PWRSELECT();
  -    method Bit#(2) USB1_PORT_INDCTL();
  -    method Action USB1_VBUS_PWRFAULT(Bit#(1) v);
  -    method Bit#(1) USB1_VBUS_PWRSELECT();
  +    interface Ttc TTC0;
  +    interface Ttc TTC1;
  +    interface Uart UART0;
  +    interface Uart UART1;
  +    interface Usb USB0;
  +    interface Usb USB1;
       method Action WDT_CLK_IN(Bit#(1) v);
       method Bit#(1) WDT_RST_OUT();
  -    method Action S_AXI_HP3_ACLK(Bit#(1) v);
  -    method Action TRACE_CLK(Bit#(1) v);
  -    method Bit#(1) TRACE_CTL();
  -    method Bit#(32) TRACE_DATA();
  -    method Action TTC0_CLK0_IN(Bit#(1) v);
  -    method Action TTC0_CLK1_IN(Bit#(1) v);
  -    method Action TTC0_CLK2_IN(Bit#(1) v);
  -    method Bit#(1) TTC0_WAVE0_OUT();
  -    method Bit#(1) TTC0_WAVE1_OUT();
  -    method Bit#(1) TTC0_WAVE2_OUT();
  -    method Action TTC1_CLK0_IN(Bit#(1) v);
  -    method Action TTC1_CLK1_IN(Bit#(1) v);
  -    method Action TTC1_CLK2_IN(Bit#(1) v);
  -    method Bit#(1) TTC1_WAVE0_OUT();
  -    method Bit#(1) TTC1_WAVE1_OUT();
  -    method Bit#(1) TTC1_WAVE2_OUT();
  -    method Action UART0_CTSN(Bit#(1) v);
  -    method Action UART0_DCDN(Bit#(1) v);
  -    method Action UART0_DSRN(Bit#(1) v);
  -    method Bit#(1) UART0_DTRN();
  -    method Action UART0_RIN(Bit#(1) v);
  -    method Bit#(1) UART0_RTSN();
  -    method Action UART0_RX(Bit#(1) v);
  -    method Bit#(1) UART0_TX();
  -    method Action UART1_CTSN(Bit#(1) v);
  -    method Action UART1_DCDN(Bit#(1) v);
  -    method Action UART1_DSRN(Bit#(1) v);
  -    method Bit#(1) UART1_DTRN();
  -    method Action UART1_RIN(Bit#(1) v);
  -    method Bit#(1) UART1_RTSN();
  -    method Action UART1_RX(Bit#(1) v);
  -    method Bit#(1) UART1_TX();
  -    method Bit#(2) USB0_PORT_INDCTL();
  -    method Action USB0_VBUS_PWRFAULT(Bit#(1) v);
  -    method Bit#(1) USB0_VBUS_PWRSELECT();
  -    method Bit#(2) USB1_PORT_INDCTL();
  -    method Action USB1_VBUS_PWRFAULT(Bit#(1) v);
  -    method Bit#(1) USB1_VBUS_PWRSELECT();
  -    method Action WDT_CLK_IN(Bit#(1) v);
  -    method Bit#(1) WDT_RST_OUT();
   
      schedule (datain, idatain, inc, ce) CF (datain, idatain, inc, ce);
   endmodule
  
positive.code:     AxiMOSI#(numeric type C_DATA_WIDTH, numeric type C_ID_WIDTH);
      AxiMISO#(numeric type C_DATA_WIDTH, numeric type C_ID_WIDTH);
      method Action ARADDR(Bit#(32) v);
      method Action ARBURST(Bit#(2) v);
      method Action ARCACHE(Bit#(4) v);
      method Action ARID(Bit#(C_ID_WIDTH) v);
      method Action ARLEN(Bit#(4) v);
      method Action ARLOCK(Bit#(2) v);
      method Action ARPROT(Bit#(3) v);
      method Action ARQOS(Bit#(4) v);
      method Bit#(1) ARREADY();
      method Action ARSIZE(Bit#(3) v);
      method Action ARVALID(Bit#(1) v);
      method Action AWADDR(Bit#(32) v);
      method Action AWBURST(Bit#(2) v);
      method Action AWCACHE(Bit#(4) v);
      method Action AWID(Bit#(C_ID_WIDTH) v);
      method Action AWLEN(Bit#(4) v);
      method Action AWLOCK(Bit#(2) v);
      method Action AWPROT(Bit#(3) v);
      method Action AWQOS(Bit#(4) v);
      method Bit#(1) AWREADY();
      method Action AWSIZE(Bit#(3) v);
      method Action AWVALID(Bit#(1) v);
      method Bit#(C_ID_WIDTH) BID();
      method Action BREADY(Bit#(1) v);
      method Bit#(2) BRESP();
      method Bit#(1) BVALID();
      method Bit#(C_DATA_WIDTH) RDATA();
      method Bit#(C_ID_WIDTH) RID();
      method Bit#(1) RLAST();
      method Action RREADY(Bit#(1) v);
      method Bit#(2) RRESP();
      method Bit#(1) RVALID();
      method Action WDATA(Bit#(C_DATA_WIDTH) v);
      method Action WID(Bit#(C_ID_WIDTH) v);
      method Action WLAST(Bit#(1) v);
      method Bit#(1) WREADY();
      method Action WSTRB(Bit#(C_DATA_WIDTH/8) v);
      method Action WVALID(Bit#(1) v);
  endinterface
  
  interface AxiMasterHighSpeed#(numeric type C_DATA_WIDTH, numeric type C_ID_WIDTH);
  
negative.code:     method Bit#(8) WCOUNT();
      method Action WRISSUECAP1_EN(Bit#(1) v);
  endinterface
  interface Ddr;
      method Bit#(15) DDR_Addr();
      method Bit#(3) DDR_BankAddr();
      method Bit#(1) DDR_CAS_n();
  