anchor.diff:              referenceReg <= tagged Valid truncate(pack(base));
   	    hdmiGen.control.setTestPattern(0);
   	endmethod
  +       method Action getTransferStats();
  +          hdmiDisplayIndication.transferStats(transferCount, transferCycles, extend(transferSumOfCycles));
  +       endmethod
       endinterface: displayRequest
   
       interface ObjectReadClient dmaClient = memreadEngine.dmaClient;
  
positive.code: import YUV::*;
  
  interface HdmiDisplayRequest;
      method Action startFrameBuffer0(Int#(32) base);
  endinterface
  interface HdmiDisplayIndication;
     method Action transferStarted(Bit#(32) count);
  endinterface
  
  interface HdmiDisplay;
  
negative.code:     HdmiGenerator hdmiGen <- mkHdmiGenerator(defaultClock, defaultReset,
  					     vsyncPulse, hdmiInternalIndication, clocked_by hdmi_clock, reset_by hdmi_reset);
     
     SyncFIFOIfc#(Bit#(64)) synchronizer <- mkSyncFIFO(32, defaultClock, defaultReset, hdmi_clock);
     rule doGet;
        let v = mrFifo.first();
        mrFifo.deq();
        synchronizer.enq(v);
     endrule
     rule doPut;
        let v = synchronizer.first;
        synchronizer.deq;
        hdmiGen.request.put(v);
     endrule
  
     FIFOF#(Bool) vsyncFifo <- mkFIFOF();
     rule vsyncrule if (vsyncPulse.pulse());
  