anchor.diff:      FIFOF#(TLPData#(TlpDataBytes)) tlpOutFifo <- mkFIFOF;
       FIFOF#(TLPData#(TlpDataBytes)) tlpInFifo <- mkFIFOF;
       FIFOF#(TlpWriteHeaderInfo) tlpWriteHeaderFifo <- mkFIFOF;
  +   FIFOF#(Bool) writeReadyFifo <- mkFIFOF();
   
       Reg#(Bit#(7)) hitReg <- mkReg(0);
       Reg#(Bool) use4dwReg <- mkReg(True);
  
positive.code:    Wire#(Bool) writeHeaderTlpWire <- mkDWire(False);
     Wire#(Bool) writeDataMimoEnqWire <- mkDWire(False);
  
     Reg#(Bool) writeDataCntAboveThreshold <- mkReg(False);
     Reg#(Bool) writeDataMimoHasRoom <- mkReg(False);
     rule updateWriteDataMimoHasRoom;
        writeDataMimoHasRoom <= (writeDataCnt.read <= fromInteger(valueOf(WriteDataMimoSize) - valueOf(busWidthWords)));
     endrule
     rule noheader if (!tlpWriteHeaderFifo.notEmpty());
        writeDataCntAboveThreshold <= False;
     endrule
     rule updateWriteDataCntAboveThreshold if (writeInProgress || !writeDataCntAboveThreshold);
        writeDataCntAboveThreshold <= (writeDataCnt.read >= truncate(unpack(tlpWriteHeaderFifo.first.dwCount)));
     endrule
     (* descending_urgency = "writeHeaderTlp,updateWriteDataCntAboveThreshold" *)
     rule writeHeaderTlp if (!writeInProgress && writeDataCntAboveThreshold);
        // update for next cycle
        writeDataCntAboveThreshold <= (writeDataCnt.read >= truncate(unpack(tlpWriteHeaderFifo.first.dwCount)));
  
        writeHeaderTlpWire <= True;
        let info <- toGet(tlpWriteHeaderFifo).get();
  
negative.code:          v = writeDataMimo.first();
  	 writeDataMimo.deq(1);
  	 hdr_3dw.data = byteSwap(v[0]);
  	 //FIXME: assert deqReadyN here
           tlp.eof = (dwCount == 1) ? True : False;
           dwCount = dwCount - 1;
           writeDataCnt.decrement(1);
  