anchor.diff:     // Inputs
      // clkin_100, saxi.aclk, maxi.aclk, reset, 
      saxi.aresetn,
  -   maxi.aresetn, csysreq, rxi.data_p, rxi.data_n, rxi.frame_p,
  +   maxi.aresetn, misc.csysreq, rxi.data_p, rxi.data_n, rxi.frame_p,
      rxi.frame_n, rxi.lclk_p, rxi.lclk_n, txi.wr_wait_p, txi.wr_wait_n,
      txi.rd_wait_p, txi.rd_wait_n, maxi.awready, saxi.awid,
      saxi.awaddr, saxi.awlen, saxi.awsize, saxi.awburst,
  
positive.code:    method Bit#(1) rd_wait_n();
  endinterface
  
  interface Par_rxi;
     method Bit#(8) data_p();
     method Bit#(8) data_n();
  
negative.code:    // Inputs
     // clkin_100, saxi.aclk, maxi.aclk, reset, 
     saxi.aresetn,
     maxi.aresetn, misc.csysreq, rxi.data_p, rxi.data_n, rxi.frame_p,
     rxi.frame_n, rxi.lclk_p, rxi.lclk_n, txi.wr_wait_p, txi.wr_wait_n,
     txi.rd_wait_p, txi.rd_wait_n, maxi.awready, saxi.awid,
     saxi.awaddr, saxi.awlen, saxi.awsize, saxi.awburst,
  