anchor.diff:  
   `ifdef ISA_F
      else if (   (inputs.decoded_instr.opcode == op_LOAD_FP))
  -      alu_outputs = fv_LD (inputs);
  +      alu_outputs = fv_LOAD (inputs);
   
      else if (   (inputs.decoded_instr.opcode == op_STORE_FP))
         alu_outputs = fv_ST (inputs);
  
positive.code: 
     let funct3 = inputs.decoded_instr.funct3;
  
     Bool legal_LD = (   (funct3 == f3_LB) || (funct3 == f3_LBU)
  		    || (funct3 == f3_LH) || (funct3 == f3_LHU)
  		    || (funct3 == f3_LW)
  `ifdef RV64
  		    || (funct3 == f3_LWU)
  		    || (funct3 == f3_LD)
  `endif
  `ifdef ISA_F
  		    || (funct3 == f3_FLW)
  `endif
  `ifdef ISA_D
  		    || (funct3 == f3_FLD)
  `endif
  		    );
  
     // FP loads are not legal unless the MSTATUS.FS bit is set
     Bool legal_FP_LD = True;
  `ifdef ISA_F
     if (opcode == op_LOAD_FP)
        legal_FP_LD = (fv_mstatus_fs (inputs.mstatus) != fs_xs_off);
  `endif
  
     let alu_outputs = alu_outputs_base;
  
     alu_outputs.control   = ((legal_LD && legal_FP_LD) ? CONTROL_STRAIGHT
                                                        : CONTROL_TRAP);
     alu_outputs.op_stage2 = OP_Stage2_LD;
     alu_outputs.rd        = inputs.decoded_instr.rd;
     alu_outputs.addr      = eaddr;
  
negative.code: endfunction
  
  // ----------------------------------------------------------------
  // LOAD (LB/LH/LW/LD, LBU/LHU/LWU, FLW, FLD
  
  function ALU_Outputs fv_LOAD (ALU_Inputs inputs);
     // Signed versions of rs1_val and rs2_val
     let opcode = inputs.decoded_instr.opcode;
     IntXL s_rs1_val = unpack (inputs.rs1_val);
  