anchor.diff:      Reg#(Bool) quadAlignedTlpHandled <- mkReg(True);
   
      Wire#(Bool) writeHeaderTlpWire <- mkDWire(False);
  -   Probe#(Bool) writeHeaderAvailableProbe <- mkProbe;
      Wire#(Bool) writeDataMimoEnqWire <- mkDWire(False);
  -   Probe#(Bool) writeDataMimoEnqProbe <- mkProbe;
  -   let    writeDataMimoCountProbe <- mkProbe;
  -   let writeDataMimoEnqReadyProbe <- mkProbe;
  -   Probe#(Bool) writeInProgressProbe <- mkProbe;
  -   Probe#(Bit#(10)) writeBurstCountProbe <- mkProbe;
  -   rule updateProbe0;
  -      writeDataMimoCountProbe    <= writeDataMimo.count();
  -      writeDataMimoEnqReadyProbe <= writeDataMimo.enqReadyN(fromInteger(valueOf(busWidthWords)));
  -   endrule
  -   rule updateProbe2;
  -      writeHeaderAvailableProbe <= writeHeaderTlpWire;
  -      writeDataMimoEnqProbe <= writeDataMimoEnqWire;
  -   endrule
   
      Reg#(Bool) writeDataCntAboveThreshold <- mkReg(False);
      Reg#(Bool) writeDataMimoHasRoom <- mkReg(False);
  
positive.code:       tlp.eof = lastTlp;
        if (lastTlp) begin
  	 writeInProgress <= False;
  	 writeInProgressProbe <= False;
  	 doneTag.enq(writeTag.first());
  	 writeTag.deq();
  	 $display("writeDwCount=%d will be zero", writeDwCount);
  
negative.code:       tlpDwCount <= truncate(min(4,unpack(dwCount)));
        lastTlp <= (dwCount <= 4);
        writeInProgress <= (dwCount != 0);
        if (isHeaderOnly) begin
  	 doneTag.enq(writeTag.first());
  	 writeTag.deq();
  