anchor.diff:  typeclass SimplifyMemServerPort#(type inMemServerT, type outMemServerT);
       function outMemServerT simplifyMemServerPort(inMemServerT mem);
   endtypeclass
  +
  +instance SimplifyMemServerPort#(MMIOServerPort#(addrSz, logNumBytes), AtomicMemServerPort#(addrSz, logNumBytes));
  +    function AtomicMemServerPort#(addrSz, logNumBytes) simplifyMemServerPort(MMIOServerPort#(addrSz, logNumBytes) mem);
  +        return (interface AtomicMemServerPort;
  +                interface InputPort request;
  +                    method Action enq(AtomicMemReq#(addrSz, logNumBytes) req);
  +                        mem.request.enq( MMIOReq {
  +                                            write: req.write_en != 0,
  +                                            byte_en: ((req.write_en != 0) ? req.write_en : '1),
  +                                            atomic_op: req.atomic_op,
  +                                            addr: req.addr,
  +                                            data: req.data } );
  +                    endmethod
  +                    method Bool canEnq;
  +                        return mem.request.canEnq;
  +                    endmethod
  +                endinterface
  +                interface OutputPort response = mem.response;
  +            endinterface);
  +    endfunction
  +endinstance
  +
  +instance SimplifyMemServerPort#(MMIOServerPort#(addrSz, logNumBytes), ByteEnMemServerPort#(addrSz, logNumBytes));
  +    function ByteEnMemServerPort#(addrSz, logNumBytes) simplifyMemServerPort(MMIOServerPort#(addrSz, logNumBytes) mem);
  +        return (interface ByteEnMemServerPort;
  +                interface InputPort request;
  +                    method Action enq(ByteEnMemReq#(addrSz, logNumBytes) req);
  +                        mem.request.enq( MMIOReq {
  +                                            write: req.write_en != 0,
  +                                            byte_en: ((req.write_en != 0) ? req.write_en : '1),
  +                                            atomic_op: None,
  +                                            addr: req.addr,
  +                                            data: req.data } );
  +                    endmethod
  +                    method Bool canEnq;
  +                        return mem.request.canEnq;
  +                    endmethod
  +                endinterface
  +                interface OutputPort response = mem.response;
  +            endinterface);
  +    endfunction
  +endinstance
  +
  +instance SimplifyMemServerPort#(MMIOServerPort#(addrSz, logNumBytes), CoarseMemServerPort#(addrSz, logNumBytes));
  +    function CoarseMemServerPort#(addrSz, logNumBytes) simplifyMemServerPort(MMIOServerPort#(addrSz, logNumBytes) mem);
  +        return (interface CoarseMemServerPort;
  +                interface InputPort request;
  +                    method Action enq(CoarseMemReq#(addrSz, logNumBytes) req);
  +                        mem.request.enq( MMIOReq {
  +                                            write: req.write,
  +                                            byte_en: '1,
  +                                            atomic_op: None,
  +                                            addr: req.addr,
  +                                            data: req.data } );
  +                    endmethod
  +                    method Bool canEnq;
  +                        return mem.request.canEnq;
  +                    endmethod
  +                endinterface
  +                interface OutputPort response = mem.response;
  +            endinterface);
  +    endfunction
  +endinstance
  +
  +instance SimplifyMemServerPort#(MMIOServerPort#(addrSz, logNumBytes), ReadOnlyMemServerPort#(addrSz, logNumBytes));
  +    function ReadOnlyMemServerPort#(addrSz, logNumBytes) simplifyMemServerPort(MMIOServerPort#(addrSz, logNumBytes) mem);
  +        return (interface ReadOnlyMemServerPort;
  +                interface InputPort request;
  +                    method Action enq(ReadOnlyMemReq#(addrSz, logNumBytes) req);
  +                        mem.request.enq( MMIOReq {
  +                                            write: False,
  +                                            byte_en: '1,
  +                                            atomic_op: None,
  +                                            addr: req.addr,
  +                                            data: 0 } );
  +                    endmethod
  +                    method Bool canEnq;
  +                        return mem.request.canEnq;
  +                    endmethod
  +                endinterface
  +                interface OutputPort response;
  +                    method ReadOnlyMemResp#(logNumBytes) first;
  +                        return ReadOnlyMemResp { data: mem.response.first.data };
  +                    endmethod
  +                    method Action deq;
  +                        mem.response.deq;
  +                    endmethod
  +                    method Bool canDeq;
  +                        return mem.response.canDeq;
  +                    endmethod
  +                endinterface
  +            endinterface);
  +    endfunction
  +endinstance
   
   instance SimplifyMemServerPort#(AtomicMemServerPort#(addrSz, logNumBytes), ByteEnMemServerPort#(addrSz, logNumBytes));
       function ByteEnMemServerPort#(addrSz, logNumBytes) simplifyMemServerPort(AtomicMemServerPort#(addrSz, logNumBytes) mem);
  
positive.code: 
  typedef CoarseMemResp#(logNumBytes) AtomicMemResp#(numeric type logNumBytes);
  
  ////////////////////////////////////////////////////////////////////////////////
  
  // Port interfaces
  
negative.code: typedef AtomicMemServerPort#(addrSz, 2) AtomicMem32ServerPort#(numeric type addrSz);
  typedef AtomicMemClientPort#(addrSz, 2) AtomicMem32ClientPort#(numeric type addrSz);
  
  typedef MMIOReq#(addrSz, 2)        MMIO32Req#(numeric type addrSz);
  typedef MMIOResp#(2)               MMIO32Resp;
  typedef MMIOServerPort#(addrSz, 2) MMIO32ServerPort#(numeric type addrSz);
  typedef MMIOClientPort#(addrSz, 2) MMIO32ClientPort#(numeric type addrSz);
  
  // 64-bit memory interfaces
  
  typedef ReadOnlyMemReq#(addrSz, 3)        ReadOnlyMem64Req#(numeric type addrSz);
  