anchor.diff:  
      FIFOF#(void) aReady <- mkFIFOF;
      FIFOF#(void) bReady <- mkFIFOF;
  +   FIFOF#(void) mReady <- mkFIFOF;
      Stmt splice =
  +   seq while(True)
      seq
         action
   	 let ra <- aReady.deq();
   	 $display("Splice A Ready");
         endaction
         action
  -	 let rb <- aReady.deq();
  +	 let rb <- bReady.deq();
   	 $display("Splice B Ready");
         endaction
         if (aLenReg > bLenReg)
   	 rLenReg <= aLenReg;
         else
   	 rLenReg <= bLenReg;
  +      for (ii <= 0; ii < rLenReg; ii <= ii + 1)
  +	 seq
  +	    $display("Splice ii %d ", ii);
  +	    strA.portA.request.put(BRAMRequest{write: False, responseOnWrite: False, address: truncate(ii), datain: 0});
  +	    strB.portA.request.put(BRAMRequest{write: False, responseOnWrite: False, address: truncate(ii), datain: 0});
  +	    action
  +	       let left <- strA.portA.response.get();
  +	       let right <- strA.portB.response.get();
  +	    matL.portA.request.put(BRAMRequest{write: True, responseOnWrite: False, address: truncate(ii), datain: {left, right}});
  +	    endaction
  +	 endseq
  +      indication.searchResult(0);
  +   endseq
      endseq;
  -	 
      
      // create BRAM Write client for matL
   
  
positive.code:    endmethod
  
     method Action start();
        indication.searchResult(0);
     endmethod
  
  endmodule
  
negative.code:   Reg#(Bit#(32)) aLenReg <- mkReg(0);
    Reg#(Bit#(32)) bLenReg <- mkReg(0);
    Reg#(Bit#(32)) rLenReg <- mkReg(0);
    Reg#(Bit#(32)) ii <- mkReg(0);
    
     BRAM2Port#(StringIdx, Char) strA  <- mkBRAM2Server(defaultValue);
     BRAM2Port#(StringIdx, Char) strB <- mkBRAM2Server(defaultValue);
     BRAM2Port#(LIdx, Bit#(16)) matL <- mkBRAM2Server(defaultValue);
  
     BRAMReadClient#(StringIdx,busWidth) n2a <- mkBRAMReadClient(strA.portB);
  