anchor.diff:          return dfifo.dataout()[9:0];
       endmethod
   endmodule: mkIserdesDatadeser
  + 
   (* always_enabled *)
   interface ImageonSerdesPins;
  
positive.code:     method          wren(WREN) enable((*inhigh*) en3) clocked_by (clock);
      method DO       dataout() clocked_by(clock);
      method EMPTY    empty() clocked_by(clock);
     schedule (reset, di, rden, wren, dataout, empty) CF (reset, di, rden, wren, dataout, empty);
  endmodule: mkFIFO18
  
  module mkIserdesDatadeser#(Clock serdes_clock, Reset serdes_reset, Clock serdest, Bit#(1) align_start,
      Bit#(1) autoalign, Bit#(10) training, Bit#(10) manual_tap, Bit#(1) rden)(IserdesDatadeser);
  
negative.code: import XbsvXilinxCells::*;
  
  interface Iserdesbvi;
      method Action           align_start(Bit#(1) v);
      method Bit#(1)          align_busy();
      method Bit#(1)          aligned();
      method Bit#(3)          samplein();
      method Bit#(3)          iodelay_reset_inc_ce();
      method Bit#(1)          bitslip();
      method Action           autoalign(Bit#(1) v);
      method Action           training(Bit#(10) v);
      method Action           manual_tap(Bit#(10) v);
      method Action           delay_wren(Bit#(1) v);
      method Action           fifo_wren(Bit#(1) v);
      method Action           reset(Bit#(1) v);
      method Bit#(1)          fifo_wren_sync();
      method Action           dataout(Bit#(10) v);
  endinterface: Iserdesbvi
  
  import "BVI" iserdes_datadeser = 
  module mkIserdesbvi#(Clock clkdiv)(Iserdesbvi);
      input_clock clkdiv (CLKDIV) = clkdiv;
      default_clock clock(CLOCK);
      method                  align_start(ALIGN_START) enable((*inhigh*) en1) clocked_by (clock);
      method ALIGN_BUSY       align_busy() clocked_by (clock);
      method ALIGNED          aligned() clocked_by (clock);
      method ISERDES_BITSLIP  bitslip() clocked_by (clkdiv);
      method SAMPLEIN samplein() clocked_by (clock);
      method IODELAY_RESET_INC_CE iodelay_reset_inc_ce() clocked_by (clkdiv);
      method                  autoalign(AUTOALIGN) enable((*inhigh*) en7) clocked_by (clock);
      method                  training(TRAINING) enable((*inhigh*) en8) clocked_by (clock);
      method                  manual_tap(MANUAL_TAP) enable((*inhigh*) en9) clocked_by (clock);
      method                  fifo_wren(FIFO_WREN) enable((*inhigh*) en10) clocked_by (clkdiv);
      method FIFO_WREN_SYNC   fifo_wren_sync() clocked_by (clock);
      method                  delay_wren(DELAY_WREN) enable((*inhigh*) en11) clocked_by (clkdiv);
      method                  reset(RESET) enable((*inhigh*) en17) clocked_by (clkdiv);
      method                  dataout(ISERDES_DATA) enable((*inhigh*) en18) clocked_by(clkdiv);
      schedule (fifo_wren, reset, delay_wren, dataout, iodelay_reset_inc_ce, bitslip, align_busy, aligned, samplein, fifo_wren_sync, align_start, autoalign, training, manual_tap, bitslip)
           CF (fifo_wren, reset, delay_wren, dataout, iodelay_reset_inc_ce, bitslip, align_busy, aligned, samplein, fifo_wren_sync, align_start, autoalign, training, manual_tap, bitslip);
  endmodule: mkIserdesbvi
  
  interface IserdesDatadeser;
      method Action           ibufdso(Bit#(1) v);
      method Bit#(1)          align_busy();
      method Bit#(1)          aligned();
      method Bit#(1)          sampleinfirstbit();
      method Bit#(1)          sampleinlastbit();
      method Bit#(1)          sampleinotherbit();
      method Action           delay_wren(Bit#(1) v);
      method Action           fifo_wren(Bit#(1) v);
      method Action           reset(Bit#(1) v);
      method Bit#(1)          empty();
      method Bit#(10)         dataout();
  endinterface: IserdesDatadeser
  
  interface FIFO18;
     method Action            di(Bit#(16) v);
     method Action            rden(Bit#(1) v);
     method Action            wren(Bit#(1) v);
     method Action            reset(Bit#(1) v);
     method Bit#(16)          dataout();
     method Bit#(1)           empty();
  endinterface: FIFO18
  
  import "BVI" FIFO18 = 
  