anchor.diff:      endrule
   
       rule serdesdata_rule;
  -        let dout = 10'b0;
           master_data.d(0);
           master_data.bitslip(iserdes_bitslip);
           master_data.ce1(1);
  
positive.code:         slave_data.dynclksel(0);
          slave_data.shiftin1(master_data.shiftout1());
          slave_data.shiftin2(master_data.shiftout2());
          dout = {slave_data.q4(), slave_data.q3(), master_data.q8(),
             master_data.q7(), master_data.q6(), master_data.q5(),
             master_data.q4(), master_data.q3(), master_data.q2(), master_data.q1()};
          slave_data.oclk(0);
          slave_data.oclkb(0);
          slave_data.reset(iodelay_reset_inc_ce[2]);
          iserdes_data <= dout;
          dfifo.di({6'b0,dout});
      endrule
  
      rule dackint_rule;
          serbvi.dataout(iserdes_data);
          serbvi.dackint(dackint);
      endrule
  
      rule serdesrule;
  
negative.code:             fwsync = dfifo_wren_r;
          else
              fwsync = bvi_fifo_wren_wire;
          fifo_wren_sync.send(fwsync);
          iodelay_reset_inc_ce <= sync_reset_inc_ce;
      endrule
      rule wren_dfifo_rule;
          dfifo.wren(fifo_wren_sync.read());
      endrule
  
      rule clkdiv_rule if (bvi_reset_reg != 0);
  