anchor.diff:  import MemWriteEngine::*;
   import MemServerIndication::*;
   import MMUIndication::*;
  -
  -`ifdef DEBUG_MATCH_TABLE
  +`ifdef MTABLE
   import MatchTable::*;
   import MatchTableTypes::*;
   `endif
  
positive.code:    method Action camSearch(Bit#(32) data);
     method Action writeSetRam(Bit#(32) addr, Bit#(64) data);
     method Action readSetRam(Bit#(32) addr);
  `ifdef DEBUG_MATCH_TABLE
     method Action matchTableInsert(Bit#(32) key, Bit#(32) ops);
     method Action matchTableRequest(Bit#(32) key, Bit#(32) value, Bit#(32) op);
  `endif
  
     method Action port_mapping_add_entry(Bit#(32) table_name, MatchInput_port_mapping match_key);
     method Action port_mapping_set_default_action(Bit#(32) table_name);
     method Action port_mapping_delete_entry(Bit#(32) table_name, Bit#(32) id);
  
negative.code:    Parser parser <- mkParser();
     Pipeline_port_mapping ingress_port_mapping <- mkIngressPipeline_port_mapping();
  
  `ifdef MTABLE
     /* Match Table Functionalities */
     function RequestType makeRequest(Bit#(32) key, Bit#(32) value, Operation op);
         return RequestType {
  