anchor.diff:     Reset reset_chip, Reset reset_fpga)(PParallellaLib);
      default_clock clk();
      default_reset rst();
  -   input_clock axiclk(AXICLK) = axiclk;
  -   input_reset axiclk_reset() = axiclk_reset; /* from clock*/
  +   input_clock maxiclk(emaxi_aclk) = maxiclk;  // assigns the verilog emaxi_aclk
  +   input_clock saxiclk(esaxi_aclk) = saxiclk;  // assigns the verilog esaxi_aclk
  +   input_reset maxiclk_reset() = maxiclk_reset; /* from clock*/
  +   input_reset saxiclk_reset() = saxiclk_reset; /* from clock*/
  +   
  +   interface Par_misc;
  +   method cactive(cactive);
  +   method csysack(csysack);
  +   method reset_chip(reset_chip) enable((*inhigh*) EN_reset_chip);
  +   method reset_fpga(reset_fpga) enable((*inhigh*) EN_reset_fpga);
  +   endinterface
      
      interface Par_txo;
         method data_p(txo_data_p) enable((*inhigh*) EN_txo_data_p);
         method data_n(txo_data_n) enable((*inhigh*) EN_txo_data_n);
         method frame_p(txo_frame_p) enable((*inhigh*) EN_txo_frame_p);
         method frame_n(txo_frame_n) enable((*inhigh*) EN_txo_frame_n);
  +   endinterface
  +
  +   interface Par_txi;
         method txo_wr_wait_p wr_wait_p();
         method txo_wr_wait_n wr_wait_n();
         method txo_rd_wait_p rd_wait_p();
  
positive.code:    method Bit#(8) data_n();
     method Bit#(1) frame_p();
     method Bit#(1) frame_n();
     method Action wr_wait_p(Bit#(1) v);
     method Action wr_wait_n(Bit#(1) v);
     method Action rd_wait_p(Bit#(1) v);
     method Action rd_wait_n(Bit#(1) v);
     method Action cclk_p(Bit#(1));
     method Action cclk_n(Bit#(1));
  endinterface
  
  //
  
  module mkPParallellaLIB#(Clock maxiclk, Clock saxiclk, 
     Reset maxiclk_reset, Reset saxiclk_reset,\
  
negative.code:    
     
     interface Par_saxi;
        method araddr(esaxi_araddr) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_araddr);
        method arburst(esaxi_arburst) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_arburst);
        method arcache(esaxi_arcache) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_arcache);
        method esaxi_aresetn aresetn() clocked_by(saxiclk) reset_by(saxireset);
        method arid(esaxi_arid) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_arid);
        method arlen(esaxi_arlen) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_arlen);
        method arlock(esaxi_arlock) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_arlock);
        method arprot(esaxi_arprot) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_arprot);
        method arqos(esaxi_arqos) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_arqos);
        method esaxi_arready arready() clocked_by(saxiclk) reset_by(saxireset);
        method arsize(esaxi_arsize) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_arsize);
        method arvalid(esaxi_arvalid) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_arvalid);
        method awaddr(esaxi_awaddr) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_awaddr);
        method awburst(esaxi_awburst) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_awburst);
        method awcache(esaxi_awcache) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_awcache);
        method awid(esaxi_awid) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_awid);
        method awlen(esaxi_awlen) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_awlen);
        method awlock(esaxi_awlock) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_awlock);
        method awprot(esaxi_awprot) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_awprot);
        method awqos(esaxi_awqos) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_awqos);
        method esaxi_awready awready() clocked_by(saxiclk) reset_by(saxireset);
        method awsize(esaxi_awsize) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_awsize);
        method awvalid(esaxi_awvalid) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_awvalid);
        method esaxi_bid bid() clocked_by(saxiclk) reset_by(saxireset);
        method bready(esaxi_bready) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_bready);
        method esaxi_bresp bresp() clocked_by(saxiclk) reset_by(saxireset);
        method esaxi_bvalid bvalid() clocked_by(saxiclk) reset_by(saxireset);
        method esaxi_rdata rdata() clocked_by(saxiclk) reset_by(saxireset);
        method esaxi_rlast rlast() clocked_by(saxiclk) reset_by(saxireset);
        method rready(esaxi_rready) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_rready);
        method esaxi_rresp rresp() clocked_by(saxiclk) reset_by(saxireset);
        method esaxi_rvalid rvalid() clocked_by(saxiclk) reset_by(saxireset);
        method wdata(esaxi_wdata) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_wdata);
        method wid(esaxi_wid) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_wid);
        method wlast(esaxi_wlast) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_wlast);
        method esaxi_wready wready() clocked_by(saxiclk) reset_by(saxireset);
        method wstrb(esaxi_wstrb) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_wstrb);
        method wvalid(esaxi_wvalid) clocked_by(saxiclk) reset_by(saxireset) enable((*inhigh*) EN_esaxi_wvalid);
        method esaxi_rid rid() clocked_by(saxiclk) reset_by(saxireset);
        interface extraType   extra;
     endinterface
     
     
  schedule (
     misc.csysack, misc.cactive, misc.reset_chip, misc.reset_fpga, txo.data_p, txo.data_n,
     txo.frame_p, txo.frame_n, txo.lclk_p, txo.lclk_n, rxo.wr_wait_p,
     rxo.wr_wait_n, rxo.rd_wait_p, rxo.rd_wait_n, rxi.cclk_p,
     rxi.cclk_n, maxi.awid, maxi.awaddr, maxi.awlen, maxi.awsize,
     maxi.awburst, maxi.awlock, maxi.awcache, maxi.awprot,
     maxi.awvalid, saxi.awready, maxi.wid, maxi.wdata, maxi.wstrb,
     maxi.wlast, maxi.wvalid, saxi.wready, maxi.bready, saxi.bid,
     saxi.bresp, saxi.bvalid, maxi.arid, maxi.araddr, maxi.arlen,
     maxi.arsize, maxi.arburst, maxi.arlock, maxi.arcache,
     maxi.arprot, maxi.arvalid, saxi.arready, maxi.rready,
     saxi.rid, saxi.rdata, saxi.rresp, saxi.rlast, saxi.rvalid,
     maxi.awqos, maxi.arqos,
     // Inputs
     // clkin_100, saxi.aclk, maxi.aclk, reset, 
     saxi.aresetn,
     maxi.aresetn, csysreq, rxi.data_p, rxi.data_n, rxi.frame_p,
     rxi.frame_n, rxi.lclk_p, rxi.lclk_n, txi.wr_wait_p, txi.wr_wait_n,
     txi.rd_wait_p, txi.rd_wait_n, maxi.awready, saxi.awid,
     saxi.awaddr, saxi.awlen, saxi.awsize, saxi.awburst,
     saxi.awlock, saxi.awcache, saxi.awprot, saxi.awvalid,
     maxi.wready, saxi.wid, saxi.wdata, saxi.wstrb, saxi.wlast,
     saxi.wvalid, maxi.bid, maxi.bresp, maxi.bvalid, saxi.bready,
     maxi.arready, saxi.arid, saxi.araddr, saxi.arlen, saxi.arsize,
     saxi.arburst, saxi.arlock, saxi.arcache, saxi.arprot,
     saxi.arvalid, maxi.rid, maxi.rdata, maxi.rresp, maxi.rlast,
     maxi.rvalid, saxi.rready, saxi.awqos, saxi.arqos
  ) CF (
     misc.csysack, misc.cactive, misc.reset_chip, misc.reset_fpga, txo.data_p, txo.data_n,
     txo.frame_p, txo.frame_n, txo.lclk_p, txo.lclk_n, rxo.wr_wait_p,
     rxo.wr_wait_n, rxo.rd_wait_p, rxo.rd_wait_n, rxi.cclk_p,
     rxi.cclk_n, maxi.awid, maxi.awaddr, maxi.awlen, maxi.awsize,
     maxi.awburst, maxi.awlock, maxi.awcache, maxi.awprot,
     maxi.awvalid, saxi.awready, maxi.wid, maxi.wdata, maxi.wstrb,
     maxi.wlast, maxi.wvalid, saxi.wready, maxi.bready, saxi.bid,
     saxi.bresp, saxi.bvalid, maxi.arid, maxi.araddr, maxi.arlen,
     maxi.arsize, maxi.arburst, maxi.arlock, maxi.arcache,
     maxi.arprot, maxi.arvalid, saxi.arready, maxi.rready,
     saxi.rid, saxi.rdata, saxi.rresp, saxi.rlast, saxi.rvalid,
     maxi.awqos, maxi.arqos,
     // Inputs
     // clkin_100, saxi.aclk, maxi.aclk, reset, 
     saxi.aresetn,
     maxi.aresetn, csysreq, rxi.data_p, rxi.data_n, rxi.frame_p,
     rxi.frame_n, rxi.lclk_p, rxi.lclk_n, txi.wr_wait_p, txi.wr_wait_n,
     txi.rd_wait_p, txi.rd_wait_n, maxi.awready, saxi.awid,
     saxi.awaddr, saxi.awlen, saxi.awsize, saxi.awburst,
     saxi.awlock, saxi.awcache, saxi.awprot, saxi.awvalid,
     maxi.wready, saxi.wid, saxi.wdata, saxi.wstrb, saxi.wlast,
     saxi.wvalid, maxi.bid, maxi.bresp, maxi.bvalid, saxi.bready,
     maxi.arready, saxi.arid, saxi.araddr, saxi.arlen, saxi.arsize,
     saxi.arburst, saxi.arlock, saxi.arcache, saxi.arprot,
     saxi.arvalid, maxi.rid, maxi.rdata, maxi.rresp, maxi.rlast,
     maxi.rvalid, saxi.rready, saxi.awqos, saxi.arqos
     
     );
  
  endmodule