anchor.diff:  
      // These regs save info on a trap in Stage1 or Stage2
      Reg #(Trap_Info)  rg_trap_info       <- mkRegU;
  +   Reg #(Bool)       rg_trap_interrupt  <- mkRegU;
      Reg #(Instr)      rg_trap_instr      <- mkRegU;
   `ifdef INCLUDE_TANDEM_VERIF
      Reg #(Trace_Data) rg_trap_trace_data <- mkRegU;
  
positive.code: 
        // Just save relevant info and handle in next clock
        rg_trap_info       <= stage1.out.trap_info;
        rg_trap_instr      <= stage1.out.data_to_stage2.instr;
  `ifdef INCLUDE_TANDEM_VERIF
        rg_trap_trace_data <= stage1.out.data_to_stage2.trace_data;
  
negative.code: 
        // Just save relevant info and handle in next clock
        rg_trap_info       <= stage2.out.trap_info;
        rg_trap_interrupt  <= False;
        rg_trap_instr      <= stage2.out.data_to_stage3.instr;
  `ifdef INCLUDE_TANDEM_VERIF
        rg_trap_trace_data <= stage2.out.trace_data;
  