anchor.diff:      rule afsmsecond_rule if (bvi_resets_reg.read() != 0 && astate == ASecond);
           serdes_end.deq();
           let as = astate;
  -        let cric = 3'b001;
  +        let cric = 2'b01;
           if (ctrl_data == rotateBitsBy(data_init, 10-2))
               begin
               gencounter <= {7'b0, windowcount[9:1]} - 16'b10;
  
positive.code:     SyncBitIfc#(Bit#(1)) fifo_reset_sync <- mkSyncBit(defaultClock, defaultReset, serdes_clock);
      SyncBitIfc#(Bit#(1)) astate_idle <- mkSyncBit(defaultClock, defaultReset, serdes_clock);
      Reg#(Bit#(1)) sync_bitslip <- mkReg(0, clocked_by serdes_clock, reset_by serdes_reset);
      Reg#(Bit#(3)) sync_reset_inc_ce <- mkReg(0, clocked_by serdes_clock, reset_by serdes_reset);
      Reg#(Bit#(3)) ctrl_sample <- mkReg(0);
  
      SyncBitIfc#(Bit#(1)) fifo_wren_sync <- mkSyncBit(serdes_clock, serdes_reset, serdes_clock);
  
negative.code:     //*************************** alignment operation FSM *****************
      rule afsminit_rule if (bvi_resets_reg.read() == 0);
          serdes_bitslip.send(0);
          ctrl_samplein_i <= 0;
          edge_init <= 0;
          data_init <= 0;
          data_init1 <= 0;
  