anchor.diff:  	 $display("writeDwCount=%d will be zero", writeDwCount);
         end
   
  -      for (Integer i = 0; i < 4; i = i + 1) begin
  -`ifdef AXI
  -	 tlp.data[(i+1)*32-1:i*32] = byteSwap(v[3-i]);
  -`elsif AVALON
  -	 tlp.data[(i+1)*32-1:i*32] = v[3-i];
  -`endif
  -      end
  +      for (Integer i = 0; i < currDwCount; i = i + 1) begin
  +	 tlp.data[(i+1)*32-1:i*32] = v[(currDwCount-1)-i];
  +      end
  +
         tlpOutFifo.enq(tlp);
      endrule
   
  
positive.code:     Reg#(Bool)    writeInProgress <- mkReg(False);
      FIFOF#(TLPTag) writeTag <- mkSizedFIFOF(16);
      FIFOF#(TLPTag) doneTag <- mkSizedFIFOF(16);
  
     Wire#(Bool) writeHeaderTlpWire <- mkDWire(False);
     Probe#(Bool) writeHeaderAvailableProbe <- mkProbe;
  
negative.code:       TLPData#(16) tlp = defaultValue;
        tlp.sof = False;
        Vector#(4, Bit#(32)) v = unpack(0);
        Integer currDwCount = 4;
  
  `ifdef AVALON
        if (!quadAlignedTlpHandled) begin
           currDwCount = 3; // 3 Data Dwords in this cycle.
           quadAlignedTlpHandled <= True;
        end
  `endif
  
        // The MIMO implicit guard only checks for availability of 1 element
        // so we explicitly check for the number of elements required
  