anchor.diff:              actionvalue
                  Word_S  imm_s    = extend(unpack(fields.imm12_S));
                  Word    mem_addr = pack(s_v1 + imm_s) - dmemSt;
  -               Vector#(8, Addr) bankAddr = f_getBankAddr(mem_addr);
  +               Vector#(8, Addr) bankAddr = f_getBankAddr(mem_addr, 4);
   
                  function Action fa_ST_req(Mem_Data_Size sz);
                     action
  
positive.code:          // LD and ST instructions.
           // Issue request here; will be completed in STATE_EXEC_LD/ST_RESPONSE
  
           function Vector#(8, Addr) f_getBankAddr(Addr mem_addr);
              Bit#(3) bank = truncate(mem_addr >> 2);
              Addr sub_addr = (mem_addr >> (2+3));
              Vector#(8, Addr) ret = ?;
  
              // Example: bank=2
              // 0 1 2 3 4 5 6 7
              //     * * * * * *
              // * *
              for(Integer i = 0; i < 8; i = i + 1)
                 ret[i] = sub_addr + (fromInteger(i) < bank ? 1 : 0);
              return ret;
           endfunction
  
  
negative.code:                Word_S  imm_s    = extend(unpack(fields.imm12_I));
                 Word    mem_addr = pack(s_v1 + imm_s) - dmemSt;
                 Bit#(5) lsb5     = truncate(mem_addr);
                 Vector#(8, Addr) bankAddr = f_getBankAddr(mem_addr, 4);
  
                 function Action fa_LD_Req(Mem_Data_Size sz);
                    action
  