anchor.diff:  
                  rg_mem_addr <= mem_addr;
   
  -               if      (decoded.funct3 == f3_LB)      fa_LD_Req(BITS8);
  -               else if (decoded.funct3 == f3_LBU)     fa_LD_Req(BITS8);
  -               else if (decoded.funct3 == f3_LH)      fa_LD_Req(BITS16);
  -               else if (decoded.funct3 == f3_LHU)     fa_LD_Req(BITS16);
  -               else if (decoded.funct3 == f3_LW)      fa_LD_Req(BITS32);
  -               else fa_finish_with_exception(pc, exc_code_ILLEGAL_INSTRUCTION, ?);
  +               case(decoded.instr)
  +                  OP_LB    :  fa_LD_Req(BITS8);
  +                  OP_LBU   :  fa_LD_Req(BITS8);
  +                  OP_LH    :  fa_LD_Req(BITS16);
  +                  OP_LHU   :  fa_LD_Req(BITS16);
  +                  /*OP_LW*/
  +                  default  :  fa_LD_Req(BITS32);
  +               endcase
   
                  if (cfg_verbose > 2) begin
                     $display("[%7d] Decoded: PC = %h, %s %s, %s, %1d", csr_cycle, decoded.pc,
  -                              case(decoded.funct3)
  -                                 f3_LB  : "lb";
  -                                 f3_LBU : "lbu";
  -                                 f3_LH  : "lh";
  -                                 f3_LHU : "lhu";
  -                                 f3_LW  : "lw";
  +                              case(decoded.instr)
  +                                 OP_LB  : "lb";
  +                                 OP_LBU : "lbu";
  +                                 OP_LH  : "lh";
  +                                 OP_LHU : "lhu";
  +                                 OP_LW  : "lw";
                                 endcase,
                                 regNameABI[decoded.rd],
                                 regNameABI[decoded.rs1],
  
positive.code: 
           function Action fa_exec_MISC_MEM();
              action
                 // FENCE
                 if (   (decoded.funct3 == f3_FENCE)
                     && (decoded.rd == 0)
                     && (decoded.rs1 == 0)
                     && (truncateLSB(decoded.imm12_I) == 4'b0)) begin   // same as instr[31:28] on Spec v 2.2
                                                                   fa_finish_with_no_output;
                                                                end
  
                 // FENCE.I
                 else if (   (decoded.funct3 == f3_FENCE_I)
                          && (decoded.rd == 0)
                          && (decoded.rs1 == 0)
                          && (decoded.imm12_I == 12'b0)) begin
                                                            fa_finish_with_no_output;
                                                         end
  
                 else begin
                    fa_finish_with_exception(pc, exc_code_ILLEGAL_INSTRUCTION, ?);
                 end
  
                 if (cfg_verbose > 2) $display("[%7d] Decoded: PC = %h, %s (ignore)", csr_cycle, decoded.pc, decoded.funct3 == f3_FENCE ? "fence" : "fence.i");
              endaction
  
negative.code:          // Main body of fa_exec(), dispatching to the sub functions
           // based on major OPCODE
  
           case(decoded.instr)
              OP_LUI      :  fa_exec_LUI();
              OP_AUIPC    :  fa_exec_AUIPC();
              OP_JAL      :  fa_exec_JAL();
              OP_JALR     :  fa_exec_JALR();
  
              OP_BEQ      ,
              OP_BNE      ,
              OP_BLT      ,
              OP_BGE      ,
              OP_BLTU     ,
              OP_BGEU     :  fa_exec_BRANCH();
  
              OP_LB       ,
              OP_LBU      ,
              OP_LH       ,
              OP_LHU      ,
              OP_LW       :  fa_exec_LD_Req();
  
              OP_SB       ,
              OP_SH       ,
              OP_SW       :  fa_exec_ST_Req();
  
              OP_ADDI     ,
              OP_SLTI     ,
              OP_SLTIU    ,
              OP_XORI     ,
              OP_ORI      ,
              OP_ANDI     ,
              OP_SLLI     ,
              OP_SRLI     ,
              OP_SRAI     :  fa_exec_OP_IMM();
  
              OP_ADD      ,
              OP_SUB      ,
              OP_SLL      ,
              OP_SLT      ,
              OP_SLTU     ,
              OP_XOR      ,
              OP_SRL      ,
              OP_SRA      ,
              OP_OR       ,
              OP_AND      :  fa_exec_OP();
  
              OP_FENCE    ,
              OP_FENCE_I  :  fa_exec_MISC_MEM();
  
              OP_CSRRW    ,
              OP_CSRRS    ,
              OP_CSRRC    :  fa_exec_SYSTEM();
  
              default     :  fa_finish_with_exception(pc, exc_code_ILLEGAL_INSTRUCTION, ?);
           endcase
        endaction
     endfunction: fa_exec
  
  