anchor.diff:          st_can_enq_wire <= !st_valid[st_enqP][0];
       endrule
   
  +    // deqLd guard (see comments at the method declaration)
  +    function Bool deqLdGuard;
  +        LdQTag deqP = ld_deqP_deq;
  +        Bool valid_not_killed = ld_valid_deq[deqP] && !ld_killed_deq[deqP];
  +        // Now figure out access type specific requirement
  +        Bool no_older_st = !isValid(ld_olderSt_deq[deqP];
  +        if(ld_memFunc[deqP] == Ld && !ld_isMMIO_deq[deqP]) begin
  +            // normal non-MMIO Ld (cannot have .rl)
  +            return valid_not_killed && ld_done_deq[deqP] &&
  +                   (no_older_st || ld_olderStVerfied_deq[deqP]);
  +        end
  +        else begin
  +            // Lr or MMIO
  +            return valid_not_killed && ld_computed_deq[deqP] && no_older_st;
  +        end
  +    endfunction
  +
  +    // deqSt guard (see comments at the method declaration)
  +    function Bool deqStGuard;
  +        StQTag deqP = st_deqP_deq;
  +        Bool valid = st_valid_deq[deqP];
  +        Bool computed = st_computed_deq[deqP];
  +        LdQTag ldDeqP = ld_deqP_deq;
  +        Bool no_older_ld = !ld_valid_deq[ldDeqP] ||
  +                           isValid(ld_olderSt_deq[ldDeqP]);
  +        return valid && computed && no_older_ld;
  +    endfunction
  +
       method ByteEn getOrigBE(LdStQTag t);
           return (case(t) matches
               tagged Ld .tag: (ld_byteEn[tag]);
  
positive.code:         return res;
      endmethod
  
      method LSQDeqEntry first if(valid[deqP[deqP_deq_port]][valid_deq_port]);
          LdStQTag curDeqP = deqP[deqP_deq_port];
          return LSQDeqEntry {
              ldstq_tag: deqP[deqP_deq_port],
              inst_tag: instTag[curDeqP],
              mem_inst: memInst[curDeqP],
              dst: dst[curDeqP],
              paddr: paddr[curDeqP][paddr_deq_port],
              isMMIO: isMMIO[curDeqP][mmio_deq_port],
              shiftedBE: shiftedBE[curDeqP][shBE_deq_port],
              shiftedData: shiftedData[curDeqP][shData_deq_port],
              state: state[curDeqP][state_deq_port],
              computed: computed[curDeqP][comp_deq_port],
              ldKilled: ldKilled[curDeqP][killed_deq_port],
              specTag: specTag[curDeqP][specTag_deq_port],
              spec_bits: specBits[curDeqP][sb_deq_port],
              waitWPResp: waitWPResp[curDeqP]
          };
      endmethod
  
      method Action deq if(valid[deqP[deqP_deq_port]][valid_deq_port]);
          Reg#(LdStQTag) curDeqP = deqP[deqP_deq_port];
          // sanity check
          doAssert(checkAddrAlign(paddr[curDeqP][paddr_deq_port], memInst[curDeqP].byteEn),
              "addr BE not naturally aligned"
          );
          if(memInst[curDeqP].mem_func == Ld || isMMIO[curDeqP][mmio_deq_port]) begin
              doAssert(isValid(specTag[curDeqP][specTag_deq_port]), "Ld or MMIO must have spec tag");
              doAssert(specBits[curDeqP][sb_deq_port] == (1 << validValue(specTag[curDeqP][specTag_deq_port])),
                  "Ld or MMIO must be spec under itself"
              );
          end
          else begin
              doAssert(!isValid(specTag[curDeqP][specTag_deq_port]), "non Ld cannot have spec tag");
              doAssert(specBits[curDeqP][sb_deq_port] == 0, "non Ld cannot under speculation");
          end
          case(memInst[curDeqP].mem_func)
              Ld: begin
                  doAssert(!waitWPResp[curDeqP] && !ldKilled[curDeqP][killed_deq_port] &&
                           state[curDeqP][state_deq_port] == (isMMIO[curDeqP][mmio_deq_port] ? Idle : Done),
                           "Ld cannot wait for wrong path resp, cannot be killed; MMIO Ld is idle; non-MMIO Ld is done");
              end
              St: begin
                  doAssert(state[curDeqP][state_deq_port] == Idle && computed[curDeqP][comp_deq_port],
                      "St must be Idle and computed"
                  );
              end
              Lr, Sc, Amo: begin
                  doAssert(state[curDeqP][state_deq_port] == Idle && computed[curDeqP][comp_deq_port] && !waitWPResp[curDeqP],
                      "Lr/Sc/Amo is issued by outside after computing, but cannot wait for wong path resp"
                  );
              end
              //Fence: begin
              //    doAssert(False, "Fence is not in LSQ for now");
              //end
              default: doAssert(False, "unknown mem_func");
          endcase
          // remove the entry
          valid[curDeqP][valid_deq_port] <= False;
          curDeqP <= getNextPtr(curDeqP);
          // wakeup loads stalled by this entry
          function Action setReady(Integer i);
          action
              // no need to check valid here, we can write anything to invalid entry
              if(ldDepLSQDeq[i][depLSQDeq_deq_port] == Valid (curDeqP)) begin
                  ldDepLSQDeq[i][depLSQDeq_deq_port] <= Invalid;
              end
          endaction
          endfunction
          Vector#(LdStQSize, Integer) idxVec = genVector;
          joinActions(map(setReady, idxVec));
          // make conflict with incorrect spec
          wrongSpec_deq_conflict.wset(?);
      endmethod
  
      method Action wakeupLdStalledBySB(SBIndex sbIdx);
          function Action setReady(Integer i);
          action
  
negative.code:     Vector#(LdQSize, Ehr#(3, ByteEn))          st_shiftedBE <- replicateM(mkEhr(?));
      Vector#(LdQSize, Ehr#(3, Data))            st_stData    <- replicateM(mkEhr(?));
      Vector#(LdQSize, Ehr#(3, Bool))            st_computed  <- replicateM(mkEhr(?));
      Vector#(LdQSize, Ehr#(3, Bool))            st_verified  <- replicateM(mkEhr(?));
      Vector#(LdQSize, Ehr#(3, Maybe#(SpecTag))) st_specTag   <- replicateM(mkEhr(?));
      Vector#(LdQSize, Ehr#(3, SpecBits))        st_specBits  <- replicateM(mkEhr(?));
      // enq/deq ptr
      Reg#(StQTag)    st_enqP <- mkReg(0);
      Ehr#(2, StQTag) st_deqP <- mkEhr(0);
      Ehr#(2, StQTag) st_verifyP <- mkEhr(0);
  
      // FIFO of LSQ tags that try to issue, there should be no replication in it
      LSQIssueLdQ issueLdQ <- mkLSQIssueLdQ;
  