anchor.diff:  			       };
         ipIterator.start(req);
         $display("range startRule row=%d col=%d", rowNumber, colNumber);
  -      rpMutex.enq(req);
      endrule
   
      rule issueBramReadRequest;
  
positive.code:       let addr = (x << kernelColAddrBits) | y;
        bramRequestFifo.enq(BRAMRequest{write: False, responseOnWrite: False, address: addr, datain: 0});
        lastFifo.enq(tuple4(ipIterator.isFirst(), ipIterator.isLast(), x, y));
        if (ipIterator.isLast && !rpMutex.notEmpty()) begin
  	 $display("range finished but rpMutex empty");
        end
        if (ipIterator.isLast && rpMutex.notEmpty()) begin
  	 let req <- toGet(rpMutex).get();
  	 $display("range finished x=%d y=%d", req.xbase, req.ybase);
        end
        $display("issueBramReadRequest x=%d y=%d first=%d last=%d", x, y, ipIterator.isFirst(), ipIterator.isLast());
     endrule
     rule issueInnerProdRequest;
  
negative.code:    FIFOF#(XYIteratorConfig#(Bit#(10))) convRequestFifo <- mkFIFOF();
     XYIteratorIfc#(Bit#(10)) convIterator <- mkXYIteratorOut();
     XYIteratorIfc#(Bit#(10)) ipIterator <- mkXYIteratorOut();
  
     IteratorIfc#(Bit#(16)) rowIterator <- mkIteratorOut();
     IteratorIfc#(Bit#(16)) colIterator <- mkIteratorOut();
  