anchor.diff:     // Inputs
      // clkin_100, saxi.aclk, maxi.aclk, reset, 
      saxi.aresetn,
  -   maxi.aresetn, misc.csysreq, rx.data_p, rx.data_n, rx.frame_p,
  -   rx.frame_n, rx.lclk_p, rx.lclk_n, tx.wr_wait_p, tx.wr_wait_n,
  -   tx.rd_wait_p, tx.rd_wait_n, maxi.awready, saxi.awid,
  +   maxi.aresetn, misc.csysreq, rxi.data_p, rxi.data_n, rxi.frame_p,
  +   rxi.frame_n, rxi.lclk_p, rxi.lclk_n, txi.wr_wait_p, txi.wr_wait_n,
  +   txi.rd_wait_p, txi.rd_wait_n, maxi.awready, saxi.awid,
      saxi.awaddr, saxi.awlen, saxi.awsize, saxi.awburst,
      saxi.awlock, saxi.awcache, saxi.awprot, saxi.awvalid,
      maxi.wready, saxi.wid, saxi.wdata, saxi.wstrb, saxi.wlast,
  
positive.code:    method Bit#(1) lclk_n();
  endinterface
  
  interface Par_Rxo
     method Action wr_wait_p(Bit#(1) v);
     method Action wr_wait_n(Bit#(1) v);
     method Action rd_wait_p(Bit#(1) v);
  
negative.code:    // Inputs
     // clkin_100, saxi.aclk, maxi.aclk, reset, 
     saxi.aresetn,
     maxi.aresetn, misc.csysreq, rxi.data_p, rxi.data_n, rxi.frame_p,
     rxi.frame_n, rxi.lclk_p, rxi.lclk_n, txi.wr_wait_p, txi.wr_wait_n,
     txi.rd_wait_p, txi.rd_wait_n, maxi.awready, saxi.awid,
     saxi.awaddr, saxi.awlen, saxi.awsize, saxi.awburst,
     saxi.awlock, saxi.awcache, saxi.awprot, saxi.awvalid,
     maxi.wready, saxi.wid, saxi.wdata, saxi.wstrb, saxi.wlast,
  