anchor.diff:                      vs_axi_gp[i].arprot(v.prot);
                       vs_axi_gp[i].arqos(v.qos);
                       vs_axi_gp[i].arsize(v.size);
  +
  +	            vtopsw_axi_gp[i].arvalid <= 1;
                   endmethod
               endinterface
               interface Put req_aw;
  -                method Action put(AxiREQ#(id_width) v);
  +                method Action put(AxiREQ#(id_width) v) if (vs_axi_gp[i].awready());
                       vs_axi_gp[i].awaddr(v.addr);
                       vs_axi_gp[i].awburst(v.burst);
                       vs_axi_gp[i].awcache(v.cache);
  
positive.code:     method Action             wrissuecap1_en(Bit#(1) v);
  endinterface
  
  (* always_ready, always_enabled *)
  interface Bidir#(numeric type data_width);
      method Action             i(Bit#(data_width) v);
  
negative.code:     Vector#(2, Pps7Uart#(c_dm_width, c_dq_width, c_dqs_width, data_width, gpio_width, id_width, mio_width))     vuart;
      Vector#(2, Pps7Usb#(c_dm_width, c_dq_width, c_dqs_width, data_width, gpio_width, id_width, mio_width))     vusb;
      Vector#(2, AxiMasterCommon#(32, id_width)) vtopm_axi_gp;
      Vector#(2, AxiMasterWires) vtopmw_axi_gp <- replicateM(mkAxiMasterWires());
      Vector#(2, AxiSlaveCommon#(32, id_width)) vtops_axi_gp;
      Vector#(2, AxiSlaveWires) vtopsw_axi_gp <- replicateM(mkAxiSlaveWires());
      Vector#(4, AxiSlaveHighSpeed#(data_width, id_width)) vtops_axi_hp;
      Vector#(2, AxiSlaveWires) vtopsw_axi_hp <- replicateM(mkAxiSlaveWires());
  
      vcan[0] = foo.can0;
      vcan[1] = foo.can1;
  