anchor.diff:      // connect the processor to the simRam
       mkConnection(proc.ram, simRam);
   
  +`ifdef CONFIG_SPI
       rule tieOff;
           proc.pins.spi.miso(0);
       endrule
  +`endif
   
  +`ifdef CONFIG_RS232
       Reg#(Bit#(16)) uartDivisor <- mkReg(17);
       UART#(16) simUart <- mkUART(8, NONE, STOP_1, uartDivisor);
       let uartSimToFPGABridge <- mkConnection(toPut(proc.pins.uart.sin), toGet(simUart.rs232.sout));
  
positive.code:         let x <- simUart.tx.get;
          return x;
      endmethod
  endmodule
  
negative.code:         let x <- simUart.tx.get();
          $write("%c", x);
      endrule
  `endif
  
      // Processor Control
      method Action start;
          proc.start;
      endmethod
      method Action stop();
          proc.stop;
  