anchor.diff:              astate <= AStart;
           else
               begin
  -            start_handshake.enq(1);
  +            serdes_setting.enq(1);
               ctrl_reset_inc_ce <= 3'b001;
               gencounter <= gencounter - 1;
               end
  
positive.code:         astate <= AWDelay;
      endrule
      rule afsmwdelay_rule if (bvi_resets_reg.read() != 0 && astate == AWDelay);
          start_handshake.enq(1);
          ctrl_reset_inc_ce <= 3'b000;
          astate <= AEdge;
      endrule
  
negative.code:             astate <= AStart;
          else
              begin
              serdes_setting.enq(1);
              ctrl_reset_inc_ce <= 3'b011;
              gencounter <= gencounter - 1;
              end
  