anchor.diff:        vTxPipeOut[i] = toPipeOut(txFifo[i]);
   
         // Gearbox Level Loopback FIFO
  -      lpbkSyncFifo[i] <- mkSyncFIFO(10, clk_156_25, rst_156_25_n, pma4.rx_clkout[i]);//, pma4.rx_reset[i]);
  +      lpbkSyncFifo[i] <- mkSyncFIFO(10, clk_156_25, rst_156_25_n, rxClock);//, pma4.rx_reset[i]);
         lpbkSyncPipeOut[i] = toPipeOut(lpbkSyncFifo[i]);
         lpbkSyncPipeIn[i] = toPipeIn(lpbkSyncFifo[i]);
   
  -      pcs_rx[i]    <- mkEthPcsRxTop(clocked_by pma4.rx_clkout[i], reset_by pma4.rx_reset[i]);
  +      pcs_rx[i]    <- mkEthPcsRxTop(clocked_by rxClock, reset_by rxReset);
         pcs_tx[i]    <- mkEthPcsTxTop(clocked_by clk_156_25, reset_by rst_156_25_n);
  -      dtp_rx[i]    <- mkDtpRxTop(clocked_by pma4.rx_clkout[i], reset_by pma4.rx_reset[i]);
  +      dtp_rx[i]    <- mkDtpRxTop(clocked_by rxClock, reset_by rxReset);
         dtp_tx[i]    <- mkDtpTxTop(clocked_by clk_156_25, reset_by rst_156_25_n);
   
  -      dtpEventFifo[i] <- mkSyncFIFO(10, pma4.rx_clkout[i], pma4.rx_reset[i], clk_156_25);//, rst_156_25_n);
  +      dtpEventFifo[i] <- mkSyncFIFO(10, rxClock, rxReset, clk_156_25);//, rst_156_25_n);
         //dtpEventFifo[i] <- mkDtpDCFifo(pma4.rx_clkout[i], pma4.rx_reset[i], clk_156_25);//, rst_156_25_n);
         dtpEventOut[i] = toPipeOut(dtpEventFifo[i]);
         dtpEventIn[i]  = toPipeIn(dtpEventFifo[i]);
   
  -      dtpErrCntFifo[i] <- mkSyncFIFO(10, pma4.rx_clkout[i], pma4.rx_reset[i], clk_156_25);//, rst_156_25_n);
  +      dtpErrCntFifo[i] <- mkSyncFIFO(10, rxClock, rxReset, clk_156_25);//, rst_156_25_n);
         dtpErrCntOut[i] = toPipeOut(dtpErrCntFifo[i]);
         dtpErrCntIn[i]  = toPipeIn(dtpErrCntFifo[i]);
   
  
positive.code:       endmethod
     endinterface);
  
     interface rx_clkout = pma4.rx_clkout;
     interface tx_clkout = pma4.tx_clkout;
     method serial_tx = pma4.serial_tx;
     method serial_rx = pma4.serial_rx;
     interface rx = vRxPipeOut;
     interface tx = vTxPipeIn;
     interface led_rx_ready = pma4.rx_ready;
  
     interface api = vapi;
     interface switchMode = toPipeIn(switchModeFifo);
  
negative.code: 
     Reg#(Bit#(32)) cycle <- mkReg(0);
     Reset defaultReset <- exposeCurrentReset;
     Reset rst_50_n <- mkSyncReset(0, defaultReset, mgmt_clk);
     Reset rst_156_25_n <- mkSyncReset(0, defaultReset, clk_156_25);
     //let rst_156_25_n = defaultReset;
  
     Reg#(Bool) loopback_en <- mkReg(False);
  