anchor.diff:     Bit#(20) masterV = 20'h8baeb;
   
      SPI#(Bit#(20)) spi <- mkSPI(4);
  -   Reg#(Bit#(20)) slaveCount <- mkReg(20, clocked_by spi.pins.invertedClock, reset_by spi.pins.reset);
  -   Reg#(Bit#(20)) slaveValue <- mkReg(slaveV, clocked_by spi.pins.invertedClock, reset_by spi.pins.reset);
  -   Reg#(Bit#(20)) responseValue <- mkReg(0, clocked_by spi.pins.invertedClock, reset_by spi.pins.reset);
  -
  -   Probe#(Bit#(20)) slaveProbe <- mkProbe(clocked_by spi.pins.invertedClock, reset_by spi.pins.reset);
  -
  -   Probe#(Bit#(1)) misoProbe <-  mkProbe(clocked_by spi.pins.invertedClock, reset_by spi.pins.reset);
  -   Probe#(Bit#(1)) mosiProbe <-  mkProbe(clocked_by spi.pins.invertedClock, reset_by spi.pins.reset);
  -   Probe#(Bit#(1)) selProbe <-  mkProbe(clocked_by spi.pins.invertedClock, reset_by spi.pins.reset);
  -
  -   Probe#(Bit#(20)) responseProbe <- mkProbe();
  -
  -   rule probe;
  -       misoProbe <= slaveValue[19];
  -       mosiProbe <= spi.pins.mosi;
  -       selProbe <= spi.pins.sel_n;
  -   endrule
  +   Reg#(Bit#(20)) slaveCount <- mkReg(20, clocked_by spi.pins.clock, reset_by spi.pins.reset);
  +   Reg#(Bit#(20)) slaveValue <- mkReg(slaveV, clocked_by spi.pins.clock, reset_by spi.pins.reset);
  +   Reg#(Bit#(20)) responseValue <- mkReg(0, clocked_by spi.pins.clock, reset_by spi.pins.reset);
   
      rule slaveIn if (spi.pins.sel_n == 0);
         slaveCount <= slaveCount - 1;
         slaveValue <= (slaveValue << 1);
  -      slaveProbe <= (slaveValue << 1);
      endrule
   
      rule miso if (spi.pins.sel_n == 0);
  
positive.code:       method Action put(a v) if (countreg == 0);
  	 selreg <= 0;
  	 shiftreg <= pack(v);
  	 shiftprobe <= pack(v);
  	 countreg <= fromInteger(valueOf(awidth));
        endmethod
     endinterface: request
  
negative.code:    Reg#(Bit#(logawidth)) countreg <- mkReg(0);
     FIFOF#(a) resultFifo <- mkFIFOF;
  
     Wire#(Bit#(1)) misoWire <- mkDWire(0);
  
     rule running if (countreg > 0);
        countreg <= countreg - 1;
        Bit#(awidth) newshiftreg = { shiftreg[valueOf(awidth)-2:0], misoWire };
        $display("newshiftreg = %08h", newshiftreg);
        shiftreg <= newshiftreg;
        if (countreg == 1 && resultFifo.notFull) begin
  	 resultFifo.enq(unpack(newshiftreg));
  	 selreg <= 1;
  