anchor.diff:     (* fire_when_enabled *)
      rule rl_fetch(cpu_enabled);
         let next_pc = fromMaybe(fromMaybe(rg_FetchPC, rw_nxtPC.wget), rw_jmpPC.wget);
  -      if (cfg_verbose > 1) $display("[%7d] rl_fetch : Read instruction pc = 0x%08h", csr_cycle, next_pc);
  +      if (cfg_verbose > 1) $display("[%7d] ( |F   ) : Read instruction pc = 0x%08h", csr_cycle, next_pc);
         memory.imem_req(next_pc);
         rg_f2d      <= tagged Valid next_pc;
         rg_FetchPC  <= next_pc;
  
positive.code:                default  :  fa_finish_cond_branch(v1  >= v2,    next_pc);
                 endcase
  
                 if (cfg_verbose > 2) begin
                    let msg =  $format("[%7d] fa_exec  : pc = 0x%h, *** B", csr_cycle, decoded.pc)
                             + fshow(op)
                             + $format(" %s, %s, 0x%h", regNameABI[fields.rd], regNameABI[fields.rs1], next_pc);
                    $display(msg);
                 end
              endaction
           endfunction: fa_exec_BRANCH
  
           // ----------------------------------------------------------------
           // LD and ST instructions.
           // Issue request here; will be completed in STATE_EXEC_LD/ST_RESPONSE
  
           function Action fa_exec_LD_Req(LdFunc op);
              action
                 Word_S  imm_s    = extend(unpack(fields.imm12_I));
                 Word    mem_addr = pack(s_v1 + imm_s);
  
  
negative.code:    // This function encapsulates ALL the opcodes.
     // It has internal functions that group related sub-opcodes.
  
     function ActionValue#(Fmt) fa_exec(Decoded_Instr decoded, Decoded_Fields fields);
        actionvalue
  
           // Values of Rs1 and Rs2 fields of the instr, unsigned
           //Word v1 = decoded.v1;
  