anchor.diff:  	    syncgen_vbporch_reg <= v;
   	endmethod
       endinterface
  -endmodule+endmodule
  
positive.code: 		spi_txfifo_din_wire <= v;
  	    endmethod
  	endinterface
  	interface Get rxfifo;
  	    method ActionValue#(Bit#(32)) get() if (spi_rxfifo_empty_wire == 0);
  		spi_rxfifo_ren_wire <= 1;
  		return spi_rxfifo_dout_wire;
  	    endmethod
  	endinterface
  	method Action set_serdes_reset(Bit#(1) v);
  	    serdes_reset_reg <= v;
  	endmethod
  
negative.code: 
      method Action set_spi_reset(Bit#(1) v);
      method Action set_spi_timing(Bit#(16) v);
      method Bit#(96) get_spi_debug();
  
      interface Put#(Bit#(32)) txfifo;
      interface Put#(Bit#(32)) rxfifo_request;
      interface Get#(Bit#(32)) rxfifo_response;
  
      method Action set_serdes_reset(Bit#(1) v);
      method Action set_serdes_auto_align(Bit#(1) v);
  