anchor.diff:        endrule
   
         Action logEnq   = aLog.enq(aReg);
  -      Action logDeq   = aLog.deq;
         Action logRot   = action aLog.deq; aLog.enq(aLog.first); endaction;
         Action logClear = aLog.clear;
   
         addToCollection(tagged RandomGenItem (tuple2(!init, genRandom)));
  -      addToCollection(tagged LogItem (tuple4
  -        (logEnq, logDeq, logRot, logClear)));
  +      addToCollection(tagged LogItem (tuple3(logEnq, logRot, logClear)));
   
         pr(List::append(app, Cons(fshow(aReg), Nil)), fr, f(aReg));
       endmodule
  
positive.code:   FIFOF#(Bit#(64)) timeLog <- mkSizedFIFOF(logSize);
    Wire#(Bool) replayWire <- mkDWire(False);
    Wire#(Bool) logEnqWire <- mkDWire(False);
    Wire#(Bool) logDeqWire <- mkDWire(False);
    Wire#(Bool) logRotWire <- mkDWire(False);
    Wire#(Bool) logClearWire <- mkDWire(False);
    Reg#(Bit#(32)) counterExampleLength <- mkReg(0);
  
negative.code:                         end
                      end
                  endaction
                postStmt; // Execute user-defined post-statement
                // If a failure has still not been observed then reset
                // circuit in preparation for a new test sequence.
                action
  