anchor.diff:    let rx_info_prev_control_state = rx_prev_control_state.u;
     let tx_info_prev_control_state = tx_prev_control_state.u;
     FIFOF#(PacketInstance) curr_packet_ff <- mkFIFOF;
  -  TX #(RegRequest#(32, 16)) tx_rounds_register <- mkTX;
  +  TX #(RegRequest#(16, 16)) tx_rounds_register <- mkTX;
     RX #(RegResponse#(16)) rx_rounds_register <- mkRX;
     let tx_info_rounds_register = tx_rounds_register.u;
     let rx_info_rounds_register = rx_rounds_register.u;
  
positive.code:     cr_verbosity[1] <= x;
    endrule
  
    FIFOF#(EtherData) data_in_ff <- mkFIFOF;
    FIFOF#(MetadataT) meta_in_ff <- mkFIFOF;
    PulseWire parse_done <- mkPulseWire();
    PulseWire w_parse_header_done <- mkPulseWireOR();
    PulseWire w_load_header <- mkPulseWireOR();
    Reg#(Bit#(32)) rg_next_header_len[3] <- mkCReg(3, 0);
    Reg#(Bit#(32)) rg_buffered[3] <- mkCReg(3, 0);
    Reg#(Bit#(32)) rg_shift_amt[3] <- mkCReg(3, 0);
    Reg#(Bit#(512)) rg_tmp[2] <- mkCReg(2, 0);
    Reg#(Bool) rg_dequeue_data[3] <- mkCReg(3, False);
    function Action dbg3(Fmt msg);
      action
        if (cr_verbosity[0] > 3) begin
  
negative.code:         rg_paxos$rnd <= paxos$rnd;
          let vrounds_register_req = RegRequest { addr: truncate(paxos$inst), data: paxos$rnd, write: True };
          tx_info_vrounds_register.enq(vrounds_register_req);
          let values_register_req = RegRequest { addr: truncate(paxos$inst), data: paxos$paxosval, write: True };
          tx_info_values_register.enq(values_register_req);
          rg_paxos$paxosval <= paxos$paxosval;
  