anchor.diff:      Reg#(Bit#(10)) data_init2 <- mkReg(0);
       Reg#(Bit#(10)) edge_init <- mkReg(0);
       Reg#(Bit#(10)) edge_int <- mkSyncReg(0, serdes_clock, serdes_reset, defaultClock);
  -    SyncFIFOIfc#(Bit#(2)) serdes_setting <- mkSyncFIFO(2, defaultClock, defaultReset, serdes_clock);
  +    SyncFIFOIfc#(Bit#(2)) serdes_start <- mkSyncFIFO(2, defaultClock, defaultReset, serdes_clock);
  +    SyncFIFOIfc#(Bit#(1)) serdes_end <- mkSyncFIFO(2, serdes_clock, serdes_reset, defaultClock);
       Reg#(Bit#(1)) unaligned_reg <- mkReg(0);
       Reg#(Bit#(16)) top_align_counter <- mkReg(0);
       Reg#(QState)  qstate <- mkReg(QIdle);
  
positive.code:             else
                  begin
                  retrycounter <= retrycounter - 1;
                  cric = 2'b11;
                  mc = mc - 1;
                  gc = 14;
                  as = AEdge;
                  end
              maxcount <= mc;
              serdes_setting.enq(cric);
              end
          else
              begin
  
negative.code:     Reg#(Bit#(1)) serdes_aligned_reg <- mkSyncReg(0, defaultClock, defaultReset, axi_clock);
      Wire#(Bit#(1)) new_raw_empty_wire <- mkDWire(0);
      TrainRotate trainrot <- replicateM(mkReg(0));
      Vector#(5, IserdesDatadeser) pin_v <- replicateM(mkIserdesDatadeser(serdes_clock, serdes_reset, serdest_clk.gen_clk,
  	  serdes_align_start_reg, serdes_auto_align_reg, serdes_training_reg,
  	  serdes_manual_tap_reg, trainrot));
  
  