anchor.diff:  `endif
   
   	       // Machine mode
  -	       csr_addr_mvendorid:  noAction;
  -	       csr_addr_marchid:    noAction;
  -	       csr_addr_mimpid:     noAction;
  -	       csr_addr_mhartid:    noAction;
  +	       csr_addr_mvendorid:  result = mvendorid;    // hardwired
  +	       csr_addr_marchid:    result = marchid;      // hardwired
  +	       csr_addr_mimpid:     result = mimpid;       // hardwired
  +	       csr_addr_mhartid:    result = mhartid;      // hardwired
   	       csr_addr_mstatus:    begin
   				      result <- csr_mstatus.fav_write (misa, wordxl);
   				    end
  -	       csr_addr_misa:       noAction;
  +	       csr_addr_misa:       begin
  +				       result = misa_to_word (misa);
  +				    end
   	       csr_addr_mie:        begin
   				       result <- csr_mie.fav_write (misa, wordxl);
   				    end
  
positive.code: 
     // ----------------------------------------------------------------
     // CSR writes
  
     function ActionValue #(WordXL) fav_csr_write (CSR_Addr csr_addr, WordXL wordxl);
        actionvalue
  	 Bool    success = True;
  	 WordXL  result  = 0;
  
  	 if ((csr_addr_mhpmcounter3 <= csr_addr) && (csr_addr <= csr_addr_mhpmcounter31))
  	    noAction;
  `ifdef RV32
  	 else if ((csr_addr_mhpmcounter3h <= csr_addr) && (csr_addr <= csr_addr_mhpmcounter31h))
  	    noAction;
  `endif
  	 else if ((csr_addr_mhpmevent3 <= csr_addr) && (csr_addr <= csr_addr_mhpmevent31))
  	    noAction;
  	 else
  	    case (csr_addr)
  	       // User mode csrs
  
negative.code: 	       csr_addr_sstatus:    begin
  				       result <- csr_mstatus.fav_sstatus_write (misa, wordxl);
  				    end
  	       csr_addr_sedeleg:    begin
  				       result = 0;               // Hardwired to 0 (no delegation)
  				    end
  	       csr_addr_sideleg:    begin
  				       result = 0;               // Hardwired to 0 (no delegation)
  				    end
  	       csr_addr_sie:        begin
  				       result <- csr_mie.fav_sie_write (misa, wordxl);
  				    end
  