anchor.diff:  
   module mkRVUart_RV32#(Bit#(16) divisor)(RVUart#(1))
       provisos (NumAlias#(internalAddrSize, 8));
  +  Bool verbose = False;
  +
     // Layout of memory interface (mostly derived by SiFive Freedom E300)
     // Address   Name     Description
     // 0x0000    txData   Transmit data register
  
positive.code:         Bool write = tpl_1(reqTuple);
          Bit#(internalAddrSize) addr = tpl_2(reqTuple);
          Bit#(32) retVal = 0;
          $display("memory read: %h", addr);
          case (truncate(addr))
            txDataAddr: begin
                          retVal = 0;
  
negative.code:     interface Put request;
        method Action put(UncachedMemReq req) if (!isValid(pendingReq[1]));
          if (req.write) begin
            if (verbose) $display("memory write: %h, data: %h", req.addr, req.data);
            case (truncate(req.addr))
              txDataAddr: begin
                            txDataReg <= tagged Valid(truncate(req.data));
  