anchor.diff:  	  if (oneHotDecode774[781-774] == 1) data = tlpTraceBramResponseSlice(pcieTraceBramResponse, 5);
   	  if (oneHotDecode774[792-774] == 1) data = extend(tlpTraceBramWrAddrReg);
   	  if (oneHotDecode774[794-774] == 1) data = extend(tlpTraceLimitReg);
  +	  if (oneHotDecode774[795-774] == 1) data = tlpTraceBramResponseSlice(pcieTraceBramResponse, 6);
  +	  if (oneHotDecode774[796-774] == 1) data = tlpTraceBramResponseSlice(pcieTraceBramResponse, 7);
  +	  if (oneHotDecode774[797-774] == 1) data = tlpTraceBramResponseSlice(pcieTraceBramResponse, 8);
  +	  if (oneHotDecode774[798-774] == 1) data = tlpTraceBramResponseSlice(pcieTraceBramResponse, 9);
  +	  if (oneHotDecode774[799-774] == 1) data = tlpTraceBramResponseSlice(pcieTraceBramResponse, 10);
  +	  if (oneHotDecode774[790-774] == 1) data = tlpTraceBramResponseSlice(pcieTraceBramResponse, 11);
   
            //******************************** msix_base has to match CONFIG.MXIx_PBA_Offset in scripts/connectal-synth-pcie.tcl
   	  // 4-bit MSIx pending bit field
  
positive.code:       csrIsMsixAddrFifo.enq(msixaddr >= 0 && msixaddr <= 63);
        Bit#(1024) onehot = (1 << addr[9:0]);
        csrOneHotFifo000.enq(onehot[1:0]);
        csrOneHotFifo774.enq(onehot[794:774]);
        csrOneHotFifo992.enq(onehot[993:992]);
     endrule
     rule readDataRule2;
  
negative.code:    Reg#(TimestampedTlpData) pcieTraceBramResponse <- mkReg(unpack(0));
  
     // Function to return a one-word slice of the tlpTraceBramResponse
     function Bit#(32) tlpTraceBramResponseSlice(Reg#(TimestampedTlpData) data, Integer i);
         Bit#(8) i8 = fromInteger(i);
         begin
             Bit#(TMul#(12,32)) v = extend(pack(data));
             return v[31 + (i8*32) : 0 + (i8*32)];
         end
     endfunction
  