anchor.diff:     
      endinterface;
      
  +   interface PipeOut adc;
  +   
  +      method IQ first();
  +	 return(unpack(pack(infifo.first)));
  +      endmethod
  +      
  +      method Action deq() = infifo.deq;
  +   
  +      method Bool notEmpty() = infifo.notEmpty;
  +      
  +   endinterface
   
   
   endmodule
positive.code: // CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  // SOFTWARE.
  
  
  (* always_enabled *)
  interface FMComms1ADCPins;
  
negative.code:    method Bit#(1) in_or();
  endinterface
  
  typedef struct {
     Bit#(14) data_i;
     Bit#(1) z_i;
     Bit#(1) or_i;
     Bit#(14) data_q;
     Bit#(1) z_q;
     Bit#(1) or_q;
     } IQ driving (Bits);
  
  interface FMComms1ADC;
     interface FMComms1ADCPins pins;
     interface PipeOut#(IQ) adc;
  endinterface
  
  /* This module accepts inputs from an Analog Devices FMComms1
   * evaluation board Analog to Digital Converter, and delivers
   * the data as a PipeOut type on the default clock.
   * 
   * Input is double data rate, with clock supplied by the FMComms1
   * Input data is 14 bits twos-complement or offset binary, plus
   * an overrange signal
   * 
   * Differential inputs are converted to single ended by using Xilinx IBUFDS
   * cells. The clock is converted to single ended by an IBUFGDS cell
   * 
   * DDR data is convered to SDR using IDDR cells
   * At this point, the data is a 14 bit in-phase data signal, plus in-phase
   * overrange, but a 14 bit quadrature signal, plus overrange.
   * 
   * The data is packed into a 64-bit IQ datatype, with overrange as the LSB
   * 
   * The 32-bit data is converted to 64-bits by a Gearbox
   * 
   * Clock conversion happens 64-bits wide using a SyncBRAMFIFO, which
   * presents a PipeOut channel to the rest of the logic.
   */
  
  
  module mkFMComms1ADC(FMComms1ADC);
     
     Clock def_clock = exposeCurrentClock;
     Reset def_reset <- exposeurrentReset;
     
     Vector#(14, Wire#(Bit#(1))) adc_data_p <- replicateM(mkDWire(0));
     Vector#(14, Wire#(Bit#(1))) adc_data_n <- replicateM(mkDWire(0));
  