anchor.diff:        return TxThruDbgRec {goodputCount: goodputCount, idleCount: idleCount};
      endmethod
      method ThruDbgRec sdbg;
  -      return ThruDbgRec {data_bytes: data_bytes, sops: sopCount, eops: eopCount, idle_cycles: idle_cycles, total_cycles: cycle_cnt};
  +      return ThruDbgRec {data_bytes: data_bytes, sops: sopCount, eops: eopCount, idle_cycles: idle_cycles, total_cycles: total_cycles};
      endmethod
   endmodule
   
  
positive.code:    endinterface
     interface Put macRx = toPut(readMacFifo);
     method ThruDbgRec sdbg;
        return ThruDbgRec {data_bytes: data_bytes, sops: sopCount, eops: eopCount, idle_cycles: idle_cycles, total_cycles: cycle_cnt};
     endmethod
  endmodule
  
negative.code:    FIFO#(PacketDataT#(64)) readMacFifo <- mkFIFO(clocked_by rxClock, reset_by rxReset);
     SyncFIFOIfc#(EtherData) rx_fifo <- mkSyncFIFO(5, rxClock, rxReset, defaultClock);
  
     rule total_cycle;
        total_cycles <= total_cycles + 1;
     endrule
  
     function EtherData combine(Vector#(2, PacketDataT#(64)) v);
  