anchor.diff:  module mkAxiEthBuffer#(AxiEthBufferClocks clks)(AxiEthBuffer);
       default_clock clk();
       default_reset rst();
  -    input_clock axi_str_rxd_aclk(AXI_STR_RXD_ACLK) = clks.axi_str_rxd_aclk;
  -    input_reset axi_str_rxd_aresetn(AXI_STR_RXD_ARESETN) = clks.axi_str_rxd_aresetn;
  -    input_clock axi_str_rxs_aclk(AXI_STR_RXS_ACLK) = clks.axi_str_rxs_aclk;
  -    input_reset axi_str_rxs_aresetn(AXI_STR_RXS_ARESETN) = clks.axi_str_rxs_aresetn;
  -    input_clock axi_str_txc_aclk(AXI_STR_TXC_ACLK) = clks.axi_str_txc_aclk;
  -    input_reset axi_str_txc_aresetn(AXI_STR_TXC_ARESETN) = clks.axi_str_txc_aresetn;
  -    input_clock axi_str_txd_aclk(AXI_STR_TXD_ACLK) = clks.axi_str_txd_aclk;
  -    input_reset axi_str_txd_aresetn(AXI_STR_TXD_ARESETN) = clks.axi_str_txd_aresetn;
  -    input_clock gtx_clk(GTX_CLK) = clks.gtx_clk;
  -    input_clock rx_mac_aclk(rx_mac_aclk) = clks.rx_mac_aclk;
  -    input_reset rx_reset(rx_reset) = clks.rx_reset;
  -    input_clock s_axi_aclk(S_AXI_ACLK) = clks.s_axi_aclk;
  -    input_reset s_axi_aresetn(S_AXI_ARESETN) = clks.s_axi_aresetn;
  -    input_clock tx_mac_aclk(tx_mac_aclk) = clks.tx_mac_aclk;
  -    input_reset tx_reset(tx_reset) = clks.tx_reset;
  -    interface AxiethbufferAxi     axi;
  -        method AXI_STR_RXD_DATA str_rxd_data() clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn);
  -        method AXI_STR_RXD_KEEP str_rxd_keep() clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn);
  -        method AXI_STR_RXD_LAST str_rxd_last() clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn);
  -        method str_rxd_ready(AXI_STR_RXD_READY) clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn) enable((*inhigh*) EN_AXI_STR_RXD_READY);
  -        method AXI_STR_RXD_VALID str_rxd_valid() clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn);
  -        method AXI_STR_RXS_DATA str_rxs_data() clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn);
  -        method AXI_STR_RXS_KEEP str_rxs_keep() clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn);
  -        method AXI_STR_RXS_LAST str_rxs_last() clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn);
  -        method str_rxs_ready(AXI_STR_RXS_READY) clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn) enable((*inhigh*) EN_AXI_STR_RXS_READY);
  -        method AXI_STR_RXS_VALID str_rxs_valid() clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn);
  -        method str_txc_tdata(AXI_STR_TXC_TDATA) clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn) enable((*inhigh*) EN_AXI_STR_TXC_TDATA);
  -        method str_txc_tkeep(AXI_STR_TXC_TKEEP) clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn) enable((*inhigh*) EN_AXI_STR_TXC_TKEEP);
  -        method str_txc_tlast(AXI_STR_TXC_TLAST) clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn) enable((*inhigh*) EN_AXI_STR_TXC_TLAST);
  -        method AXI_STR_TXC_TREADY str_txc_tready() clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn);
  -        method str_txc_tvalid(AXI_STR_TXC_TVALID) clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn) enable((*inhigh*) EN_AXI_STR_TXC_TVALID);
  -        method str_txd_tdata(AXI_STR_TXD_TDATA) clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn) enable((*inhigh*) EN_AXI_STR_TXD_TDATA);
  -        method str_txd_tkeep(AXI_STR_TXD_TKEEP) clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn) enable((*inhigh*) EN_AXI_STR_TXD_TKEEP);
  -        method str_txd_tlast(AXI_STR_TXD_TLAST) clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn) enable((*inhigh*) EN_AXI_STR_TXD_TLAST);
  -        method AXI_STR_TXD_TREADY str_txd_tready() clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn);
  -        method str_txd_tvalid(AXI_STR_TXD_TVALID) clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn) enable((*inhigh*) EN_AXI_STR_TXD_TVALID);
  +        input_clock axi_str_rxd_aclk(AXI_STR_RXD_ACLK) = clks.axi_str_rxd_aclk;
  +        input_reset axi_str_rxd_aresetn(AXI_STR_RXD_ARESETN) = clks.axi_str_rxd_aresetn;
  +        input_clock axi_str_rxs_aclk(AXI_STR_RXS_ACLK) = clks.axi_str_rxs_aclk;
  +        input_reset axi_str_rxs_aresetn(AXI_STR_RXS_ARESETN) = clks.axi_str_rxs_aresetn;
  +        input_clock axi_str_txc_aclk(AXI_STR_TXC_ACLK) = clks.axi_str_txc_aclk;
  +        input_reset axi_str_txc_aresetn(AXI_STR_TXC_ARESETN) = clks.axi_str_txc_aresetn;
  +        input_clock axi_str_txd_aclk(AXI_STR_TXD_ACLK) = clks.axi_str_txd_aclk;
  +        input_reset axi_str_txd_aresetn(AXI_STR_TXD_ARESETN) = clks.axi_str_txd_aresetn;
  +        input_clock gtx_clk(GTX_CLK) = clks.gtx_clk;
  +        input_clock rx_mac_aclk(rx_mac_aclk) = clks.rx_mac_aclk;
  +        input_reset rx_reset(rx_reset) clocked_by (rx_mac_aclk) = clks.rx_reset;
  +        input_clock s_axi_aclk(S_AXI_ACLK) = clks.s_axi_aclk;
  +        input_reset s_axi_aresetn(S_AXI_ARESETN) clocked_by (s_axi_aclk) = clks.s_axi_aresetn;
  +        input_clock tx_mac_aclk(tx_mac_aclk) = clks.tx_mac_aclk;
  +        input_reset tx_reset(tx_reset) clocked_by (tx_mac_aclk) = clks.tx_reset;
  +    interface AxiStreamMaster     axi_str_rxd;
  +        method AXI_STR_RXD_DATA tdata() clocked_by (axi_str_rxd_aclk) reset_by (axi_str_rxd_aresetn);
  +        method AXI_STR_RXD_KEEP tkeep() clocked_by (axi_str_rxd_aclk) reset_by (axi_str_rxd_aresetn);
  +        method AXI_STR_RXD_LAST tlast() clocked_by (axi_str_rxd_aclk) reset_by (axi_str_rxd_aresetn);
  +        method tready(AXI_STR_RXD_READY) clocked_by (axi_str_rxd_aclk) reset_by (axi_str_rxd_aresetn) enable((*inhigh*) EN_AXI_STR_RXD_READY);
  +        method AXI_STR_RXD_VALID tvalid() clocked_by (axi_str_rxd_aclk) reset_by (axi_str_rxd_aresetn);
  +    endinterface
  +    interface AxiStreamMaster     axi_str_rxs;
  +        method AXI_STR_RXS_DATA tdata() clocked_by (axi_str_rxs_aclk) reset_by (axi_str_rxs_aresetn);
  +        method AXI_STR_RXS_KEEP tkeep() clocked_by (axi_str_rxs_aclk) reset_by (axi_str_rxs_aresetn);
  +        method AXI_STR_RXS_LAST tlast() clocked_by (axi_str_rxs_aclk) reset_by (axi_str_rxs_aresetn);
  +        method tready(AXI_STR_RXS_READY) clocked_by (axi_str_rxs_aclk) reset_by (axi_str_rxs_aresetn) enable((*inhigh*) EN_AXI_STR_RXS_READY);
  +        method AXI_STR_RXS_VALID tvalid() clocked_by (axi_str_rxs_aclk) reset_by (axi_str_rxs_aresetn);
  +    endinterface
  +    interface AxiStreamSlave     axi_str_txc;
  +        method tdata(AXI_STR_TXC_TDATA) clocked_by (axi_str_txc_aclk) reset_by (axi_str_txc_aresetn) enable((*inhigh*) EN_AXI_STR_TXC_TDATA);
  +        method tkeep(AXI_STR_TXC_TKEEP) clocked_by (axi_str_txc_aclk) reset_by (axi_str_txc_aresetn) enable((*inhigh*) EN_AXI_STR_TXC_TKEEP);
  +        method tlast(AXI_STR_TXC_TLAST) clocked_by (axi_str_txc_aclk) reset_by (axi_str_txc_aresetn) enable((*inhigh*) EN_AXI_STR_TXC_TLAST);
  +        method AXI_STR_TXC_TREADY tready() clocked_by (axi_str_txc_aclk) reset_by (axi_str_txc_aresetn);
  +        method tvalid(AXI_STR_TXC_TVALID) clocked_by (axi_str_txc_aclk) reset_by (axi_str_txc_aresetn) enable((*inhigh*) EN_AXI_STR_TXC_TVALID);
  +    endinterface
  +    interface AxiStreamSlave     axi_str_txd;
  +        method tdata(AXI_STR_TXD_TDATA) clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn) enable((*inhigh*) EN_AXI_STR_TXD_TDATA);
  +        method tkeep(AXI_STR_TXD_TKEEP) clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn) enable((*inhigh*) EN_AXI_STR_TXD_TKEEP);
  +        method tlast(AXI_STR_TXD_TLAST) clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn) enable((*inhigh*) EN_AXI_STR_TXD_TLAST);
  +        method AXI_STR_TXD_TREADY tready() clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn);
  +        method tvalid(AXI_STR_TXD_TVALID) clocked_by (axi_str_txd_aclk) reset_by (axi_str_txd_aresetn) enable((*inhigh*) EN_AXI_STR_TXD_TVALID);
       endinterface
       interface AxiethbufferEmac     emac;
           method client_autoneg_int(EMAC_CLIENT_AUTONEG_INT) enable((*inhigh*) EN_EMAC_CLIENT_AUTONEG_INT);
  
positive.code: endinterface
  
  (* always_ready, always_enabled *)
  interface AxiethbufferAxi;
      method Bit#(32)     str_rxd_data();
      method Bit#(4)     str_rxd_keep();
      method Bit#(1)     str_rxd_last();
      method Action      str_rxd_ready(Bit#(1) v);
      method Bit#(1)     str_rxd_valid();
      method Bit#(32)     str_rxs_data();
      method Bit#(4)     str_rxs_keep();
      method Bit#(1)     str_rxs_last();
      method Action      str_rxs_ready(Bit#(1) v);
      method Bit#(1)     str_rxs_valid();
      method Action      str_txc_tdata(Bit#(32) v);
      method Action      str_txc_tkeep(Bit#(4) v);
      method Action      str_txc_tlast(Bit#(1) v);
      method Bit#(1)     str_txc_tready();
      method Action      str_txc_tvalid(Bit#(1) v);
      method Action      str_txd_tdata(Bit#(32) v);
      method Action      str_txd_tkeep(Bit#(4) v);
      method Action      str_txd_tlast(Bit#(1) v);
      method Bit#(1)     str_txd_tready();
      method Action      str_txd_tvalid(Bit#(1) v);
  endinterface
  (* always_ready, always_enabled *)
  interface AxiethbufferEmac;
  
negative.code: import DefaultValue::*;
  import XilinxCells::*;
  import GetPut::*;
  import Vector::*;
  import AxiBits::*;
  import AxiStream::*;
  
  interface AxiEthBufferClocks;
     interface Clock axi_str_rxd_aclk;
  