anchor.diff:          delaye2.datain(0);
           delaye2.inc(iodelay_reset_inc_ce[1] == 1);
           delaye2.ce(iodelay_reset_inc_ce[0]);
  -    endrule
  -
  -    rule serdesdata_rule;
           master_data.d(0);
  -        master_data.bitslip(iserdes_bitslip);
  +        master_data.bitslip(sync_bitslip);
           master_data.ce1(1);
           master_data.ce2(1);
           master_data.ddly(delaye2.dataout());
  
positive.code:         astate <= AWDelay;
      endrule
      rule afsmwdelay_rule if (bvi_resets_reg.read() != 0 && astate == AWDelay);
          start_handshake.enq(1);
          ctrl_reset_inc_ce <= 3'b000;
          astate <= AEdge;
      endrule
  
negative.code:         this_start_align_reg.deq();
          windowcount <= 0;
          retrycounter <= 32765;
          serdes_setting.enq(1);
          ctrl_reset_inc_ce <= 3'b100;
          maxcount <= 31;
          ctrl_samplein_i <= 3'b000;
  