anchor.diff:  endinterface
   
   (* always_ready, always_enabled *)
  -interface Par_rxi;
  +interface Par_rx;
      method Bit#(8) data_p();
      method Bit#(8) data_n();
      method Bit#(1) frame_p();
      method Bit#(1) frame_n();
      method Bit#(1) lclk_p();
      method Bit#(1) lclk_n();
  -   method Action cclk_p(Bit#(1) v);
  -   method Action cclk_n(Bit#(1) v);
  -endinterface
  -
  -(* always_ready, always_enabled *)
  -interface Par_rxo;
      method Action wr_wait_p(Bit#(1) v);
      method Action wr_wait_n(Bit#(1) v);
      method Action rd_wait_p(Bit#(1) v);
  
positive.code:       method reset_chip reset_chip();
        method reset_fpga reset_fpga();
        method csysreq(csysreq) enable((*inhigh*) EN_csysreq);
     endinterface
     
     interface Par_txo txo;
  
negative.code:       method rxi_frame_n frame_n();
        method rxi_lclk_p lclk_p();
        method rxi_lclk_n lclk_n();
     endinterface
   
     interface Par_rxo rxo;
  