anchor.diff:  
         // Source priority 
         else if (addr_offset < 'h1000) begin
  -	 Bit #(10) source_id = addr_offset [11:2];
  -	 if ((0 < source_id) && (source_id < fromInteger (n_sources)))
  +	 Bit #(T_wd_source_id)  source_id = truncate (addr_offset [11:2]);
  +	 if ((0 < source_id) && (source_id <= fromInteger (n_sources - 1)))
   	    vrg_source_prio [source_id] <= changeWidth (wdata32);
         end
   
         // Source IPs (interrupt pending).
         // Read-only, so ignore write; just check that addr ok.
         else if (('h1000 <= addr_offset) && (addr_offset < 'h2000)) begin
  -	 Bit #(15) source_id_base = { addr_offset [11:0], 3'h0 };
  -
  -	 if (source_id_base >= fromInteger (n_sources))
  +	 Bit #(T_wd_source_id)  source_id_base = truncate ({ addr_offset [11:0], 5'h0 });
  +
  +	 if (! (source_id_base <= fromInteger (n_sources - 1)))
   	    bresp = axi4_resp_decerr;
         end
   
  
positive.code: endfunction
  
  // ================================================================
  // Interfaces
  
  // ----------------
  
negative.code:       // Write 32 consecutive IE bits starting with addr.
        // Target 0 addrs: 2000-207F, Target 1 addrs: 2080-20FF, ...
        else if (('h2000 <= addr_offset) && (addr_offset < 'h3000)) begin
  	 Bit #(T_wd_target_id)  target_id      = truncate (addr_offset [11:7]);
  	 Bit #(T_wd_source_id)  source_id_base = truncate ({ addr_offset [6:0], 5'h0 });
  
  	 if (   (source_id_base <= fromInteger (n_sources - 1))
  	     && (target_id      <= fromInteger (n_targets - 1))) begin
  	    for (Bit #(T_wd_source_id)  k = 0; k < 32; k = k + 1) begin
  	       Bit #(T_wd_source_id)  source_id = source_id_base + k;
  	       if (source_id <= fromInteger (n_sources - 1))
  		  vvrg_ie [target_id][source_id] <= unpack (wdata32 [k]);
  	    end
  	 end
  	 else
  	    bresp = axi4_resp_decerr;
        end
  
        // Target threshold
        else if ((addr_offset [31:0] & 32'hFFFF_0FFF) == 32'h0020_0000) begin
  	 Bit #(T_wd_target_id)  target_id = truncate (addr_offset [20:12]);
  	 if (target_id <= fromInteger (n_targets - 1))
  	    vrg_target_threshold [target_id] <= changeWidth (wdata32);
  	 else
  	    bresp = axi4_resp_decerr;
        end
  
        // Interrupt service completion by target
        // Actual memory-write-data is irrelevant.
        else if ((addr_offset [31:0] & 32'hFFFF_0FFF) == 32'h0020_0004) begin
  	 Bit #(T_wd_target_id)  target_id = truncate (addr_offset [20:12]);
  	 Bit #(T_wd_source_id)  source_id = zeroExtend (vrg_servicing_source [target_id]);
  
  	 if (target_id <= fromInteger (n_targets - 1)) begin
  	    if (vrg_source_busy [source_id]) begin
  	       vrg_source_busy [source_id] <= False;
  	       vrg_servicing_source [target_id] <= 0;
  