anchor.diff:     return bram.portA;
   endmodule
   
  -function MemReadClient#(dataWidth) traceReadClient(PipeIn#(Tuple3#(DmaChannel,Bool,MemRequest)) tracePipe,
  -						   PipeIn#(Tuple3#(DmaChannel,Bool,MemData#(dataWidth))) traceDataPipe,
  -						   DmaChannel chan,
  -						   MemReadClient#(dataWidth) m);
  -   return (interface MemReadClient;
  -      interface Get readReq;
  -	 method ActionValue#(MemRequest) get();
  -	   let mr <- m.readReq.get();
  -	   tracePipe.enq(tuple3(chan, False, mr));
  -	   return mr;
  -	 endmethod
  -      endinterface: readReq
  -      interface Put readData;
  -	 method Action put(MemData#(dataWidth) md);
  -	   traceDataPipe.enq(tuple3(chan, False, md));
  -	   m.readData.put(md);
  -	 endmethod
  -   endinterface
  -   endinterface);   
  -endfunction
  -
  -function MemWriteClient#(dataWidth) traceWriteClient(PipeIn#(Tuple3#(DmaChannel,Bool,MemRequest)) tracePipe,
  -						     PipeIn#(Tuple3#(DmaChannel,Bool,MemData#(dataWidth))) traceDataPipe,
  -						     DmaChannel chan, MemWriteClient#(dataWidth) m);
  -   return (interface MemWriteClient;
  -   interface Get writeReq;
  -      method ActionValue#(MemRequest) get();
  -	 let mr <- m.writeReq.get();
  -	 tracePipe.enq(tuple3(chan, True, mr));
  -	 return mr;
  -      endmethod
  -   endinterface
  -   interface Get writeData;
  -      method ActionValue#(MemData#(dataWidth)) get();
  -	 let md <- m.writeData.get();
  -	 traceDataPipe.enq(tuple3(chan, True, md));
  -	 return md;
  -      endmethod
  -   endinterface: writeData
  +module mkTraceReadClient#(PipeIn#(Tuple3#(DmaChannel,Bool,MemRequest)) tracePipe,
  +			  PipeIn#(Tuple3#(DmaChannel,Bool,MemData#(dataWidth))) traceDataPipe,
  +			  DmaChannel chan,
  +			  MemReadClient#(dataWidth) m)
  +   (MemReadClient#(dataWidth));
  +
  +   let reqFifo  <- mkFIFOF();
  +   let dataFifo <- mkFIFOF();
  +
  +   rule rl_req;
  +      let mr <- m.readReq.get();
  +      tracePipe.enq(tuple3(chan, False, mr));
  +      reqFifo.enq(mr);
  +   endrule
  +
  +   rule rl_data;
  +      let md <- toGet(dataFifo).get();
  +      traceDataPipe.enq(tuple3(chan, False, md));
  +      m.readData.put(md);
  +   endrule
  +
  +   interface Get readReq = toGet(reqFifo);
  +   interface Put readData = toPut(dataFifo);
  +endmodule
  +
  +module mkTraceWriteClient#(PipeIn#(Tuple3#(DmaChannel,Bool,MemRequest)) tracePipe,
  +			   PipeIn#(Tuple3#(DmaChannel,Bool,MemData#(dataWidth))) traceDataPipe,
  +			   DmaChannel chan, MemWriteClient#(dataWidth) m)
  +   (MemWriteClient#(dataWidth));
  +
  +   let reqFifo <- mkFIFOF();
  +   let dataFifo <- mkFIFOF();
  +
  +   rule rl_req;
  +      let mr <- m.writeReq.get();
  +      tracePipe.enq(tuple3(chan, True, mr));
  +      reqFifo.enq(mr);
  +   endrule
  +
  +   rule rl_data;
  +      let md <- m.writeData.get();
  +      traceDataPipe.enq(tuple3(chan, True, md));
  +      dataFifo.enq(md);
  +   endrule
  +
  +   interface Get writeReq = toGet(reqFifo);
  +   interface Get writeData = toGet(dataFifo);
      interface Put writeDone = m.writeDone;
  -   endinterface);
  -endfunction
  +endmodule
   
   module mkSpikeHw#(HostInterface host, SpikeHwIndication ind)(SpikeHw);
   
  
positive.code: `endif
     endinterface
  
     interface Vector dmaReadClient = map(uncurry(traceReadClient(tracePipe,traceDataPipe)),
  					zip(vec(DMA_TX, DMA_SG),
  					    map(toMemReadClient(objId), vec(m_axi_mm2s, m_axi_sg))));
     interface Vector dmaWriteClient = map(uncurry(traceWriteClient(tracePipe,traceDataPipe)),
  					 zip(vec(DMA_RX, DMA_SG),
  					    map(toMemWriteClient(objId), vec(m_axi_s2mm, m_axi_sg))));
  endmodule
  
negative.code:    PhysMemSlave#(20,32) bootRomMemSlave      <- mkPhysMemToBram(bootRom);
     PhysMemSlave#(21,32) memSlaveMux          <- mkPhysMemSlaveMux(vec(bootRomMemSlave, deviceSlaveMux));
  
     let memReadClients  <- mapM(mkMemReadClient(objId), vec(m_axi_mm2s, m_axi_sg));
     let memWriteClients <- mapM(mkMemWriteClient(objId), vec(m_axi_s2mm, m_axi_sg));
  
  `ifdef IncludeFlash
     PhysMemSlave#(26,16) bpiFlashSlave <- mkPhysMemToBram(bpiFlash.server);
  `endif
     FIFOF#(Bit#(32)) dfifo <- mkFIFOF();
     FIFOF#(Bit#(32)) flashdfifo <- mkFIFOF();
  
  