anchor.diff:         ps7.interrupt(interrupt_bit);
      endrule
   
  -   rule b2c_rule;
  -       mainclock.inputclock(ps7.fclkclk()[0]);
  -       mainclock.inputreset(ps7.fclkresetn()[0]);
  -   endrule
  -
      interface zynq = ps7.pins;
      interface leds = top.leds;
      interface XADC xadc;
  
positive.code:        endmethod
     endinterface
     interface pins = top.pins;
     interface unused_clock = mainclock.c;
     interface unused_reset = mainclock.r;
  endmodule
  
  module mkZynqTop(ZynqTop#(Empty));
  
negative.code:    mkConnection(ps7.m_axi_gp[0].client, top.ctrl);
  `else
     
     Vector#(5, FIFOF#(Bit#(64))) bscan_fifos <- replicateM(mkFIFOF(clocked_by mainclock, reset_by mainreset));
  
     rule write_bscanBram;
        Bit#(64) data = ?;
  