   flag_set(FLAG_Z, false);
 }
 
-// TODO: [10] STOP
+// [10] STOP
+def op_10() {
+  cpu_stop = true;
+}
 
 // [11] LD DE, nn
 def op_11() {

  }

  // STEP -> Interrupts
  let irq = IF & IE;
  if IME and irq > 0 {
    om_push16(&PC);

  } else if address <= 0x7FFF {
    // This area may contain any of the further 16KByte banks of the ROM,
    // allowing to address up to 125 ROM Banks (almost 2MByte).
    *ptr = *(rom + (uint64(mmu_mbc1_rom_bank) * 0x4000) + (uint64(address) - 0x4000));
  } else if address >= 0xA000 and address <= 0xBFFF {
    // External RAM
    let eram_size = rom_get_ext_ram_size();
    let offset = address - 0xA000;
    if mmu_mbc1_ram_enable and offset < eram_size {
      *ptr = *((eram + (uint64(mmu_mbc1_ram_bank) * 0x2000)) + offset);
    } else {
      // External RAM is not enabled
      *ptr = 0xFF;
