     {
       stage_count = 8;
     }
-
     seq_values.stage_count = stage_count;
+
     seq_values.diradd_mode = (bool)diradd_mode;
-    seq_values.slew_rate = (float)slew_rate / 255.0;
-    seq_values.gate_time = (float)gate_time / 255.0;
+    
+    if(slew_rate < 0 || slew_rate > 16)
+    {
+      slew_rate = 8;
+    }
+    seq_values.slew_rate = (float)slew_rate / 16.0;
+
+    if(gate_time < 0 || gate_time > 16)
+    {
+      gate_time = 8;
+    }
+    seq_values.gate_time = (float)gate_time / 16.0;
     
     if(clock_bpm < 0 || clock_bpm > 30)
     {

              display->draw_char(47, 2, diradd_mode ? 'A' : 'D', DUINO_SSD1306::Black);
              break;
            case 2: // slew
              // TODO: slew
              display->fill_rect(55, 1, 20, 9, DUINO_SSD1306::White);
              break;
            case 3: // gate
              // TODO: gate
              display->fill_rect(77, 1, 20, 9, DUINO_SSD1306::White);
              break;
            case 4: // clock
              clock_bpm += v;

  float bpm_to_ms(uint8_t bpm)
  {
    return 600000.0 / (float)bpm;
  }

  void display_slew_rate(int16_t x, int16_t y, uint8_t rate, DUINO_SSD1306::SSD1306Color color)
  {
    display->draw_vline(x + rate - 1, y, 5, color);
  }

  void display_gate_time(int16_t x, int16_t y, uint8_t time, DUINO_SSD1306::SSD1306Color color)
  {
    if(time > 1)
    {
      display->draw_hline(x, y + 1, time - 1, color);
    }
    display->draw_vline(x + time - 1, y + 1, 3, color);
    if(time < 16)
    {
      display->draw_hline(x + time, y + 3, 16 - time, color);
    }
  }

  void display_clock(int16_t x, int16_t y, uint8_t bpm, DUINO_SSD1306::SSD1306Color color)
