     last_stage = 0;
     last_diradd_mode = false;
     last_reverse = false;
+    ext_clock_received = false;
 
     // draw top line
     display->draw_du_logo_sm(0, 0, DUINO_SSD1306::White);

  
  virtual void setup()
  {
    // TODO: attach GT3 to hardware clock isr that sets clock to EXT
    gt_attach_interrupt(GT3, clock_isr, CHANGE);
    gt_attach_interrupt(GT4, reset_isr, RISING);
  }


    {
      display->display(0, 127, display_changed[4] ? 6 : 7, 7);
    }
  }

  void set_clock_ext()
  {
    params.vals.clock_bpm = 0;
    seq_values.clock_ext = true;
    ext_clock_received = true;
    update_clock();
  }

 private:
