   delay(5);  // 1.5ms minimum recommended to allow chip LDO to stabilize
   
   
-  write(CONFIG2, 0x81);  // was 0x83 Cal2 is 20 clocks, 1 meas cycle, 1 stop
+  write(CONFIG2, 0x81);  // SHOULD BE 0x80 for Cal2 (20 clocks, 1 meas cycle, 1 stop) but that doesn't work
  // write(INT_MASK, 0x01);  // was 0x01 disable clock overflow interrupts, allow only measurement interrupt
   
   

void tdc7200Channel::ready_next() {
    // needs to set the enable bit (START_MEAS in CONFIG1)
    // clears interrupt bits
    delayMicroseconds(1000);  // was 10ms  
    write(CONFIG1, 0x83);  // was 0x83 Measurement mode 2 - force cal
}



 // write(COARSE_CNTR_OVF_H, 0xFF);  //was 0xF0 
 // write(COARSE_CNTR_OVF_L, 0xFF);

 write(CLOCK_CNTR_OVF_H, 0xF0);   // was 0xF0
 write(CLOCK_CNTR_OVF_L, 0x00);  // was 0x00
  
}

