   bool diradd_mode;
   float slew_rate;
   float gate_time;
-  float clock_period;
+  uint16_t clock_period;
   bool clock_ext;
 };
 
-DU_SEQ_Values seq_values;
+volatile DU_SEQ_Values seq_values;
+
+volatile uint8_t stage;
+volatile uint8_t step;
+volatile bool clock_gate, retrigger;
 
 void clock_isr();
 void reset_isr();


  virtual void loop()
  {
  }
};

class DU_SEQ_Interface : public DUINO_Interface {


void clock_isr()
{
  clock_gate = function->gt_read(GT3);
  if(clock_gate)
  {
    step++;
    step %= seq_values.stage_steps[stage];
    if(!step)
    {
      stage++;
      stage %= seq_values.stage_count;
    }
    retrigger = true;
  }
}

void reset_isr()
{
  stage = step = 0;
  retrigger = true;
}

void timer_isr()
