anchor.diff:  Usage legend: R=Required, O=Optional, OR=Optional but Recommended, SD=See Definition
   Note: All other standard properties (section 2.3) are allowed but are optional.
   
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  -3.7.3 Internal (L1) Cache Properties
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  +==== Internal (L1) Cache Properties
   The following properties of a cpu node describe the processor’s internal (L1) cache.
   Table 3-8 Cache properties
   Property Name
  
positive.code: 
  The node-name shall start with a lower or uppercase character and should describe the general class of
  device.
  The unit-address component of the name is specific to the bus type on which the node sits. It consists
  of one or more ASCII characters from the set of characters in Table 2-1. The unit-address must
  match the first address specified in the reg property of the node. If the node has no reg property, the
  @ and unit-address must be omitted and the node-name alone differentiates the node from other nodes
  at the same level in the tree. The binding for a particular bus may specify additional, more specific
  requirements for the format of reg and the unit-address.
  The root node does not have a node-name or unit-address. It is identified by a forward slash (/).
  
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  Example
  See the node names examples in Figure 2-2.
  
  /
  cpus
  cpu@0
  
negative.code: 
  r11
  
  
  
  hcall-token
  
  EV_IDLE
  
  Return values:
  r3
  
  status
  