anchor.diff:  compatible interrupt controllers. An open PIC interrupt controller
   implements the open PIC architecture (developed jointly by AMD and
   Cyrix) and specified in The Open Programmable Interrupt Controller (PIC)
  -Register Interface Specification Revision 1.2 <<18>>.
  +Register Interface Specification Revision 1.2 <<b18>>.
   
   Interrupt specifiers in an open PIC interrupt domain are encoded with
   two cells. The first cell defines the interrupt number. The second cell
  
positive.code: 
  === Variable Address Image Format
  This {spec} image format is a constrained form of ELF (Executable and
  Linking Format, see <<17>>) executable. That is, an {spec} client image
  shall be a valid ELF file, but also has additional requirements
  described in the next sections.
  
  
negative.code: === Relationship to IEEE(TM) 1275
  The {spec} is loosely related to the IEEE 1275 Open Firmware
  standard—_IEEE Standard for Boot (Initialization Configuration)
  Firmware: Core Requirements and Practices_ <<b1>>.
  
  The original IEEE 1275 specification and its derivatives such as CHRP
  <<b10>> and PAPR <<b16>> address problems of general purpose
  computers, such as how a single version of an operating system can work
  on several different computers within the same family and the problem of
  loading an operating system from user-installed I/O devices.
  