anchor.diff:  b: (Boolean) No Parameters.
   
   u: (Unsigned) 
  -(float, r/w) hm2_XiXX.N.ssi.MM.<name>.scalemax. The scaling factor for the
  - channel.
  +(float, r/w) hm2_XiXX.N.ssi.MM.<name>.scalemax
  +
  +[indent=4]
  +====
  +The scaling factor for the channel.
  +====
   
   s: (Signed)
  -(float, r/w) hm2_XiXX.N.ssi.MM.<name>.scalemax. The scaling factor for the
  -channel.
  +
  +[indent=4]
  +====
  +(float, r/w) hm2_XiXX.N.ssi.MM.<name>.scalemax
  +
  +The scaling factor for the channel.
  +====
   
   f: (bitField): No parameters.
   
  -e: (Encoder): 
  - (float, r/w) hm2_XiXX.N.ssi.MM.<name>.scale: (float, r.w) The encoder scale in
  -counts per machine unit.
  - (u32, r/w) hm2_XiXX.N.ssi.MM.<name>.counts-per-rev (u32, r/w) Used to emulate
  +e: (Encoder):
  +
  +[indent=4]
  +====
  +(float, r/w) hm2_XiXX.N.ssi.MM.<name>.scale: (float, r.w)
  +
  +The encoder scale in counts per machine unit.
  +
  +(u32, r/w) hm2_XiXX.N.ssi.MM.<name>.counts-per-rev (u32, r/w)
  +
  +Used to emulate
   the index behaviour of an incemental+index encoder. This would normally be set
   to the actual counts per rev of the encoder, but can be any whole number of
   revs. Integer divisors or multimpilers of the true PPR might be useful for 
   index-homing. Non-integer factors might be appropriate where there is a 
   synchronous drive ratio between the encoder and the spindle or ballscrew. 
  -
  -
  -
  +====
   
   == BiSS
   BiSS is a bidirectional variant of SSI. Currently only a single direction is
  
positive.code: The three phase duty-cycles are individually controllable from -Scale to +Scale.
  Note that 0 corresponds to a 50% duty cycle and this is the inialization value.
  
  Pins:
  
  (float input) A-value, B-value, C-value: The PWM command value for each phase,
  limited to +/- "scale". Defaults to zero which is 50% duty cycle on high-side and
  low-sidepins (but see the "deadtime" parameter)
  
  
  (bit input) enable
  When high the PWM is enabled as long as the fault bit is not
  set by the external fault input pin. When low the PWM is disabled, with both high-
  side and low-side drivers low. This is not the same as 0 output (50% duty cycle on
  both sets of pins) or negative full scale (where the low side drivers are "on"
  100% of the time)
  
  
  (bit output) fault
  Indicates the status of the fault bit. This output latches high
  once set by the physical fault pin until the "enable" pin is set to high.
  
  Parameters:
  
  
  (u32 rw) deadtime
  Sets the dead-time between the high-side driver turning off and
  the low-side driver turning on and vice-versa. Deadtime is subtracted from on time
  and added to off time symmetrically. For example with 20 kHz PWM (50 uSec period),
  
negative.code: 
  The valid format characters and the pins they create are:
  
  p: (Pad)
  
  [indent=4]
  ====
  Does not create any pins, used to ignore sections of the bit stream that are not required. 
  ====
  
  b: (Boolean)
  
  [indent=4]
  ====
  (bit, out) hm2_XiXX.N.ssi.MM.<name>
  
  If any bits in the designated field width 
  are non-zero then the HAL pin will be "true".
  
  (bit, out) hm2_XiXX.N.ssi.MM.<name>-not
  
  An inverted version of the above, the
  HAL pin will be "true" if all bits in the field are zero. 
  ====
  
  
  u: (Unsigned)
  
  [indent=4]
  ====
  (float, out) hm2_XiXX.N.ssi.MM.<name>.
  
  The value of the bits interpeted as an
  unsigned integer then scaled such that the pin value will equal the scalemax 
  parameter value when all bits are high. (for example if the field is 8 bits 
  wide and the scalmax parameter was 20 then a value of 255 would return 20, and
  0 would return 0. 
  ====
  
  s: (Signed)
  
  [indent=4]
  ====
  (float, out) hm2_XiXX.N.ssi.MM.<name>.
  
  The value of the bits interpreted as a
  2s complement signed number then scaled similarly to the unsigned variant,
  except symmetrical around zero. 
  ====
  
  f: (bitField)
  
  [indent=4]
  ====
  (bit, out) hm2_XiXX.N.ssi.MM.<name>-NN.
  
  The value of each individual bit in the
  data field. NN starts at 00 up to the number of bits in the field. 
  
  (bit, out) hm2_XiXX.N.ssi.MM.<name>-NN-not.
  
  An inverted version of the individual
  bit values. 
  ====
  
  e: (Encoder)
  
  [indent=4]
  ====
  (s32, out) hm2_XiXX.N.ssi.MM.<name>.count
  
  The lower 32 bits of the 
  total encoder counts. This value is reset both by the ...reset and the ...index-
  enable pins.
  
  (s32, out) hm2_XiXX.N.ssi.MM.<name>.rawcounts
  
  The lower 32 bits of 
  the total encoder counts. The pin is not affected by reset and index. 
  
  (float, out) hm2_XiXX.N.ssi.MM.<name>.position
  
  The encoder position
  in machine units. This is calculated from the full 64-bit buffers so will show
  a true value even after the counts pins have wrapped. It is zeroed by reset and
  index enable.
  
  (bit, IO) hm2_XiXX.N.ssi.MM.<name>.index-enable
  
  When this pin is set "true" the module will wait until the raw encoder
  counts next passes through an 
  integer multiple of the number of counts specified by counts-per-rev parameter
  and then it will zero the counts and position pins, and set the index-enable
  pin back to "false" as a signal to the system that "index" has been passed. 
  this pin is used for spindle-synchronised motion and index-homing. 
  
  (bit, in) (bit, out) hm2_XiXX.N.ssi.MM.<name>.reset
  
  When this pin is set high the counts and position pins are zeroed. 
  ====
  
  h: (Split encoder, high-order bits)
  
  [indent=4]
  ====
  Some encoders (Including Fanuc) place the encoder part-turn counts and full-turn
  counts in separate, non-contiguous fields. This tag defines the high-order bits
  of such an encoder module. There can be only one h and one l tag per channel, 
  the behaviour with multiple such channels will be undefined. 
  ====
  
  l: (Split encoder, low-order bits)
  
  [indent=4]
  ====
  Low order bits (see "h")
  ====
  
  g: (Gray-code).
  
  [indent=4]
  ====
  This is a modifier that indicates that the following
  format string is gray-code encoded. This is only valid for encoders (e, h l) and 
  unsigned (u) data types.
  ==== 
  
  === Parameters:
  Two parameters is universally created for all SSI instances
  
  (float r/w) hm2_XiXX.N.ssi.MM.frequency-khz
  
  [indent=4]
  ====
  This parameter sets the SSI clock frequency. The units are kHz, so 500 will give
  a clock frequency of 500,000 Hz. 
  ====
  
  (u32 r/w) hm2_XiXX.N.ssi.MM.timer-num
  
  [indent=4]
  ====
  This parameter allocates the SSI module to a specific hm2dpll timer instance.
  This pin is only of use in firmwares which contain a hm2dpll function and will
  default to 1 in cases where there is such a function, and 0 if there is not. 
  The pin can be used to disable reads of the encoder, by setting to a
  nonexistent timer number, or to 0. 
  ====
  
  Other parameters depend on the data types specified in the config string.
  
  