anchor.diff:  : SBREAK	( -- )			0 1 0 00000073 I, ;
   
   \ Convenient aliases.
  -: RDCYCLE	( rd -- )		>R 0 0C00 R> CSRRS ;
  -: RDCYCLEH	( rd -- )		>R 0 0C80 R> CSRRS ;
  -: RDTIME	( rd -- )		>R 0 0C01 R> CSRRS ;
  -: RDTIMEH	( rd -- )		>R 0 0C81 R> CSRRS ;
  -: RDINSTRET	( rd -- )		>R 0 0C02 R> CSRRS ;
  -: RDINSTRETH	( rd -- )		>R 0 0C82 R> CSRRS ;
  +: RDCYCLE	( rd -- )		0 0C00 ROT CSRRS ;
  +: RDCYCLEH	( rd -- )		0 0C80 ROT CSRRS ;
  +: RDTIME	( rd -- )		0 0C01 ROT CSRRS ;
  +: RDTIMEH	( rd -- )		0 0C81 ROT CSRRS ;
  +: RDINSTRET	( rd -- )		0 0C02 ROT CSRRS ;
  +: RDINSTRETH	( rd -- )		0 0C82 ROT CSRRS ;
   DECIMAL
   
  
positive.code: : (d,) ( d -- )		dwcomponents (w,) (w,) ;
  : D, ( d -- )		8 room (d,) ;
  
  : ALIGN ( n -- )	DUP 1- bc @ + SWAP NEGATE AND bc ! ;
  
  : (rs1)			SWAP 15 LSHIFT OR ;
  : (rs2)			SWAP 20 LSHIFT OR ;
  : (rd)			SWAP 7 LSHIFT OR ;
  
  : R, ( rs1 rs2 rd opmask -- )
  	(rd) (rs2) (rs1) W, ;
  
  : I, ( rs1 imm rd opmask -- )
  	(rd) (rs2) (rs1) W, ;
  
  : S, ( rs1 rs2 imm opmask -- )
  	OVER 31 AND 7 LSHIFT OR
  	SWAP 5 RSHIFT 25 LSHIFT OR
  	(rs2) (rs1) W, ;
  
  : SB, ( rs1 rs2 disp opmask -- )
  	OVER $01E AND 7 LSHIFT OR	( bits 4..1 )
  	OVER $800 AND 4 RSHIFT OR	( bits 4..1,11 )
  	OVER $7E0 AND 20 LSHIFT OR	( bits 10..5, 4..1, 11 )
  
negative.code: RESET
  
  : room ( n -- )		bc @ + /image U> ABORT" Image overflow" ;
  
  \ B, H, W, and D, place a byte, half-word, word, or double-word (8, 16, 32,
  \ or 64 bit, respectively) values verbatim into the image buffer.
  \ 
  \ Note that double-word values are awkward to use with 32-bit Forth systems,
  \ requiring double-sized values on the data stack.  E.g.,
  \ $DEADBEEF.0BADC0DE D, versus $DEADBEEF0BADC0DE for a proper 64-bit system.
  \ 
  \ Observe that the RISC-V architecture is a LITTLE-ENDIAN instruction set
  \ architecture.
  
  : (b,) ( c -- )		bc @ image + C!  1 bc +! ;
  : B, ( c -- )		1 room (b,) ;
  