anchor.diff:  CPU,Intel Core i7
   CPU,Intel Nehalem
   PRESET,PAPI_L1_DCA,NOT_DERIVED,L1D_ALL_REF:ANY
  +PRESET,PAPI_L1_DCH,DERIVED_SUB,L1D_ALL_REF:ANY,L1D:REPL
  +PRESET,PAPI_L1_TCA,DERIVED_ADD,L1D_ALL_REF:ANY,L1I:READS
   #
   CPU,Intel Core2
   CPU,Intel Core
  
positive.code: PRESET,PAPI_L1_ICA,NOT_DERIVED,L1I:READS
  PRESET,PAPI_L1_ICH,NOT_DERIVED,L1I:HITS
  PRESET,PAPI_L1_DCM,NOT_DERIVED,L1D:REPL
  #PRESET,PAPI_L1_DCH,DERIVED_SUB,L1D_ALL_REF,L1D_REPL
  #PRESET,PAPI_L1_TCM,NOT_DERIVED,L2_RQSTS:SELF:MESI
  #PRESET,PAPI_L1_LDM,NOT_DERIVED,L2_LD:SELF:ANY:MESI
  #PRESET,PAPI_L1_STM,NOT_DERIVED,L2_ST:SELF:MESI
  #PRESET,PAPI_L1_TCA,DERIVED_ADD,L1D_ALL_REF,L1I_READS
  PRESET,PAPI_L2_DCM,DERIVED_SUB,L2_RQSTS:MISS, L2_RQSTS:IFETCH_MISS
  PRESET,PAPI_L2_ICM,NOT_DERIVED,L2_RQSTS:IFETCH_MISS
  PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_RQSTS:MISS
  #PRESET,PAPI_L2_LDM,DERIVED_SUB,L2_LINES_IN:SELF:ANY,L2_M_LINES_IN:SELF
  #PRESET,PAPI_L2_STM,NOT_DERIVED,L2_M_LINES_IN:SELF
  PRESET,PAPI_L2_DCA,NOT_DERIVED,L2_DATA_RQSTS:ANY
  PRESET,PAPI_L2_DCR,DERIVED_SUB,L2_RQSTS:LOADS, L2_RQSTS:IFETCHES
  
negative.code: PRESET,PAPI_L2_TCA,NOT_DERIVED,L2_RQSTS:SELF:ANY:MESI
  PRESET,PAPI_L2_TCR,DERIVED_ADD,L2_LD:SELF:ANY:MESI,L2_IFETCH:SELF:MESI
  PRESET,PAPI_L2_TCW,NOT_DERIVED,L2_ST:SELF:MESI
  #
  PRESET,PAPI_LD_INS,NOT_DERIVED,INST_RETIRED:LOADS
  PRESET,PAPI_SR_INS,NOT_DERIVED,INST_RETIRED:STORES
  #
  PRESET,PAPI_CA_SHR,NOT_DERIVED,L2_RQSTS:SELF:ANY:S_STATE
  PRESET,PAPI_CA_CLN,NOT_DERIVED,BUS_TRANS_RFO:SELF
  