anchor.diff:  PRESET,PAPI_BR_MSP,DERIVED_ADD,BRANCH_FLUSH_TH0,BRANCH_FLUSH_TH1
   PRESET,PAPI_BR_INS,DERIVED_ADD,BRANCH_COMMIT_TH0,BRANCH_COMMIT_TH1
   #
  -
   CPU,arm_ac8
  +#
   PRESET,PAPI_TOT_INS,NOT_DERIVED,INSTR_EXECUTED
   PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CYCLES
   PRESET,PAPI_BR_INS,NOT_DERIVED,PC_WRITE
  
positive.code: PRESET,PAPI_L1_DCA,NOT_DERIVED,DCACHE_ACCESS
  PRESET,PAPI_L1_DCM,NOT_DERIVED,DCACHE_REFILL
  PRESET,PAPI_L1_ICM,NOT_DERIVED,IFETCH_MISS
  
negative.code: PRESET,PAPI_L2_TCM,NOT_DERIVED,L2_CACHE_MISS
  PRESET,PAPI_BR_TKN,NOT_DERIVED,PC_BRANCH_EXECUTED
  PRESET,PAPI_STL_ICY,NOT_DERIVED,CYCLES_INST_STALL
  #
  CPU,arm_ac9
  #
  PRESET,PAPI_TOT_INS,NOT_DERIVED,INST_OUT_OF_RENAME_STAGE
  PRESET,PAPI_TOT_IIS,NOT_DERIVED,MAIN_UNIT_EXECUTED_INST
  PRESET,PAPI_TOT_CYC,NOT_DERIVED,CPU_CYCLES
  