anchor.diff:  (define-instruction stmxcsr (area)
     (when (consp area)
       (modrm-single :gpr-32 area '(#x0F #xAE) 3)))
  +
  +
  +        `(define-instruction ,(intern (format nil "~ASD" name)) (lhs rhs)
  +           (emit #xF2)
  +           (modrm :xmm rhs lhs '(#x0F ,opcode)))
  +        `(define-instruction ,(intern (format nil "~APS" name)) (lhs rhs)
  +           (modrm :xmm rhs lhs '(#x0F ,opcode)))
  +        `(define-instruction ,(intern (format nil "~APD" name)) (lhs rhs)
  +           (emit #x66)
  +           (modrm :xmm rhs lhs '(#x0F ,opcode)))))
  +
  +(defmacro mmx-integer-op (lhs rhs opcode)
  +  `(when (eql (reg-class ,lhs) :mm)
  +     (modrm :mm ,rhs ,lhs ',opcode)))
  +
  +(defmacro xmm-integer-op (lhs rhs opcode)
  +  `(when (eql (reg-class ,lhs) :xmm)
  +     (emit #x66)
  +     (modrm :xmm ,rhs ,lhs ',opcode)))
  +
  +(defmacro define-simd-integer-op (name opcode)
  +  `(define-instruction ,name (lhs rhs)
  +     (mmx-integer-op lhs rhs ,opcode)
  +     (xmm-integer-op lhs rhs ,opcode)))
  +
  +(define-simd-integer-op pxor (#x0F #xEF))
  +(define-simd-integer-op pshufb (#x0F #x38 #x00))
  +(define-simd-integer-op psubb (#x0F #xF8))
  +(define-simd-integer-op punpcklbw (#x0F #x60))
  +(define-simd-integer-op pmulhuw (#x0F #xE4))
  +(define-simd-integer-op pmullw (#x0F #xD5))
  +(define-simd-integer-op pmuludq (#x0F #xF4))
  +(define-simd-integer-op paddw (#x0F #xFD))
  +(define-simd-integer-op packsswb (#x0F #x63))
  +(define-simd-integer-op packuswb (#x0F #x67))
  +
  +(define-instruction psrlw (lhs rhs)
  +  (when (eql (reg-class lhs) :mm)
  +    (imm :mm lhs rhs '(#x0F #x71) 2)
  +    (modrm :mm rhs lhs '(#x0F #xD1)))
  +  (when (eql (reg-class lhs) :xmm)
  +    (emit #x66)
  +    (imm :xmm lhs rhs '(#x0F #x71) 2)
  +    (modrm :xmm rhs lhs '(#x0F #xD1))))
  +
  +(define-instruction psrld (lhs rhs)
  +  (when (eql (reg-class lhs) :mm)
  +    (imm :mm lhs rhs '(#x0F #x72) 2)
  +    (modrm :mm rhs lhs '(#x0F #xD2)))
  +  (when (eql (reg-class lhs) :xmm)
  +    (emit #x66)
  +    (imm :xmm lhs rhs '(#x0F #x72) 2)
  +    (modrm :xmm rhs lhs '(#x0F #xD2))))
  +
  +(defmacro modrm-imm8 (class r/m reg imm8 opc)
  +  `(when (and (eql ,class (reg-class ,reg))
  +	      (or (eql (reg-class ,r/m) ,class)
  +		  (consp ,r/m))
  +	      ,(if (eql class :gpr-64) '(= *cpu-mode* 64) 't)
  +              (immediatep ,imm8))
  +     (let ((value (resolve-immediate ,imm8)))
  +       (when value
  +         (generate-modrm ,class ,r/m ,reg ,opc)
  +         (emit-imm 1 value))
  +       (return-from instruction t))))
  
positive.code:     (setf width (ecase width
  		  ((:gpr-64 :gpr-32) 4)
  		  (:gpr-16 2)
  		  (:gpr-8 1))))
    (when (and (= width 4) signedp (eql imm :fixup))
      (note-fixup *fixup-target*)
      (emit #xFF #xFF #xFF #xFF)
  
negative.code:     (multiple-value-bind (reg-nr rex-r)
  	(encode-register reg)
        (ecase class
          ((:xmm :mm))
  	(:gpr-64 (setf rex-w t))
  	(:gpr-32 nil)
  	(:gpr-16 (setf operand-size-override t))
  