anchor.diff:         (let ((instant-avoid-registers '()))
            ;; If this instruction supports having inputs & outputs allocated to the same register,
            ;; then expire inputs ending here to make their registers available before output allocation.
  -         (when (instruction-inputs-read-before-outputs-written-p inst (allocator-architecture allocator))
  +         (when (instruction-inputs-read-before-outputs-written-p inst arch)
              (dolist (input (ir::instruction-inputs inst))
                (when (typep input 'ir:virtual-register)
                  (let ((interval (interval-at allocator input instruction-index)))
  
positive.code: ;;;; This code is licensed under the MIT license.
  
  (in-package :mezzano.compiler.backend.register-allocator)
  
  (defgeneric target-argument-registers (target))
  (defgeneric target-return-register (target))
  
negative.code:                    (let ((reg (gethash interval (allocator-range-allocations allocator))))
                       (when (not ir::*shut-up*)
                         (format t "Return interval ~S (reg ~S) early.~%" interval reg))
                       (deactivate-interval allocator interval)
                       (push reg (allocator-free-registers allocator))
                       (push reg instant-avoid-registers)))))))
           (update-active-intervals allocator inst instruction-index)
  