anchor.diff:    (incf (register :sp) 2)
     (read-word-from-ram (- (register :sp) 2) *stack*))
   
  -; Instruction loader
  -
  -(defun next-instruction ()
  -  (incf (register :ip))
  -  (elt *ram* (1- (register :ip))))
  -
  -(defun load-instructions (instrs)
  -  (setf (register :ip) 0)
  -  (setf (subseq *ram* 0 #x7fff) instrs))
  -
  -; Operations
  +;;; Flag effects
  +
  +(defun set-cf-on-add (value is-word)
  +  (setf (flag :cf) (if is-word (max (floor (/ value #x10000)) 1) (max (floor (/ value #x100)))))
  +  value)
  +
  +(defun set-cf-on-sub (value1 value2)
  +  (setf (flag-p :cf) (> value2 value1))
  +  value1)
  +
  +(defun set-sf-on-op (value is-word)
  +  (setf (flag :sf) (if is-word (max (floor (/ value #x8000)) 1) (max (floor (/ value #x80)))))
  +  value)
  +
  +(defun set-zf-on-op (value)
  +  (setf (flag-p :zf) (= value 0))
  +  value)
  +
  +;;; Operations
  +
  +(defmacro disasm-instr (on-disasm &body body)
  +  `(if *disasm*
  +       ,on-disasm
  +       (progn ,@body)))
   
   (defun clear-carry-flag ()
  -  (setf (flag :cf) nil))
  +  (disasm-instr (list "clc")
  +    (setf (flag-p :cf) nil)))
   
   (defun set-carry-flag ()
  -  (setf (flag :cf) t))
  +  (disasm-instr (list "stc")
  +    (setf (flag-p :cf) t)))
   
   (defun mov-byte-to-register (opcode)
     (let ((reg (bits->byte-reg (mod opcode #x08))))
  -    (setf (byte-register reg) (next-instruction))
  -    (list "mov" :src (byte-register reg) :dest reg)))
  +    (disasm-instr (list "mov" :src (next-instruction) :dest reg)
  +      (setf (byte-register reg) (next-instruction)))))
   
   (defun mov-word-to-register (reg)
  -  (setf (register reg) (reverse-little-endian (next-instruction) (next-instruction)))
  -  (list "mov" :src (register reg) :dest reg))
  +  (disasm-instr (list "mov" :src (reverse-little-endian (next-instruction) (next-instruction)) :dest reg)
  +    (setf (register reg) (reverse-little-endian (next-instruction) (next-instruction)))))
   
   (defmacro with-one-byte-opcode-register (opcode &body body)
     `(let ((reg (bits->word-reg (mod ,opcode #x08))))
        ,@body))
   
   (defun push-register (reg)
  -  (push-to-stack (register reg))
  -  (list "push" :src reg))
  +  (disasm-instr (list "push" :src reg)
  +    (push-to-stack (register reg))))
   
   (defun pop-to-register (reg)
  -  (setf (register reg) (pop-from-stack))
  -  (list "pop" :dest reg))
  +  (disasm-instr (list "pop" :dest reg)
  +    (setf (register reg) (pop-from-stack))))
   
   (defun inc-register (reg)
  -  (incf (register reg))
  -  (list "inc" :op1 reg))
  +  (disasm-instr (list "inc" :op1 reg)
  +    (set-sf-on-op (set-zf-on-op (incf (register reg))) t)))
   
   (defun dec-register (reg)
  -  (decf (register reg))
  -  (list "dec" :op1 reg))
  +  (disasm-instr (list "dec" :op1 reg)
  +    (set-sf-on-op (set-zf-on-op (decf (register reg))) t)))
   
   (defun xchg-register (reg)
  -  (if (eql reg :ax)
  -      (list "nop")
  -      (progn
  -	(rotatef (register :ax) (register reg))
  -	(list "xchg" :op1 :ax :op2 reg))))
  -
  -; Opcode parsing
  +  (disasm-instr (if (eql reg :ax) '("nop") (list "xchg" :op1 :ax :op2 reg))
  +    (rotatef (register :ax) (register reg))))
  +
  +;;; Opcode parsing
   
   (defun in-8-byte-block-p (opcode block)
     (= (truncate (/ opcode 8)) (/ block 8)))
  
positive.code: 
  (defsetf byte-register set-byte-reg)
  
  (defun flag (flag-name)
    (getf *flags* flag-name))
  
  (defun set-flag (flag-name is-set)
    (setf (getf *flags* flag-name) is-set))
  
  (defsetf flag set-flag)
  
  ; Convenience functions
  
  (defun reverse-little-endian (low high)
    "Reverse a little-endian number."
    (+ low (ash high 8)))
  
  ; RAM access
  
  (defun read-word-from-ram (loc &optional (segment *ram*))
    "Read a word from a RAM segment."
  
negative.code: 
  (defun loop-instructions (&optional (return-disasm nil))
    "Loop through loaded instructions."
    (setf *disasm* return-disasm)
    (loop
       for ret = (parse-opcode (next-instruction))
       collecting ret into disasm
  