anchor.diff:      ;;1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
       "| cond  |0 1 0|1|U|0|0|1|  Rn   |  Rt   |         imm12         |"
       ;; Additional condition.
  -    (not (or (equal Rn #*1111)
  -	     (and (equal Rn #*1101)
  -		  (equal U #*1)
  -		  (equal imm12 #*000000000100))))
  +    (not (equal Rn #*1111))
     ;; Disassembler
     (format stream
   	  "LDR~a ~a, [~a~a]"
  
positive.code: 		unpredictable)
  	    (setf (reg tt) data))))))
  
  ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ;; ;;;
  ;; ;;; Instruction: LDR (literal)
  ;; ;;;
  ;; ;;; Load Register (literal) calculates an address from the PC value
  ;; ;;; and an immediate offset, loads a word from memory, and writes it
  ;; ;;; to a register.
  ;; (define-instruction
  ;;     ;;3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 
  ;;     ;;1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
  ;;     "| cond  |0 1 0|1|U|0|0|1|1 1 1 1|  Rt   |         imm12         |"
  ;;     t
  ;;     (LDR{<c>} <Rt> (PC +/-<imm>))
  ;;   ())
  
negative.code:    (load-memory-unaligned (memory *machine*) address number-of-bytes)
     (* number-of-bytes 8)))
  
  (defun (setf mem-u) (value address number-of-bytes)
    (store-memory-unaligned
     (memory *machine*) address (u-int value) number-of-bytes))
  
  ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  ;;;
  ;;; Instruction info.
  