anchor.diff:                                         (ash (register-number base) +rn-shift+)
                                          (ash (register-number reg) +rt-shift+)))
                (return-from instruction t))))))))
  +
  +(define-instruction ldrb (reg value)
  +  (check-register-class reg :gpr-32)
  +  (multiple-value-bind (mode base offset)
  +      (parse-address value)
  +    (ecase mode
  +      (:base-plus-immediate
  +       (let ((imm-value (or (resolve-immediate offset) 0)))
  +         (cond ((and (<= 0 imm-value 16380)
  +                     (zerop (logand imm-value #b11)))
  +                ;; LDR (immediate, unsigned offset).
  +                (emit-instruction (logior #x39400000
  +                                          (ash (ash imm-value -2) 12)
  +                                          (ash (register-number base) +rn-shift+)
  +                                          (ash (register-number reg) +rt-shift+)))
  +                (return-from instruction t))
  +               ((<= -256 imm-value 255)
  +                ;; LDUR.
  +                (emit-instruction (logior #x38400000
  +                                          (ash (ldb (byte 9 0) imm-value) 12)
  +                                          (ash (register-number base) +rn-shift+)
  +                                          (ash (register-number reg) +rt-shift+)))
  +                (return-from instruction t)))))
  +      ((:base-plus-index64
  +        :base-plus-scaled-index64)
  +       (emit-instruction (logior #x38600800
  +                                 (ash (register-number offset) +rm-shift+)
  +                                 (encode-index-option mode)
  +                                 (ash (register-number base) +rn-shift+)
  +                                 (ash (register-number reg) +rt-shift+)))
  +       (return-from instruction t))
  +      (:pre
  +       (let ((imm-value (or (resolve-immediate offset) 0)))
  +         (when (<= -256 imm-value 255)
  +           ;; LDR (immediate, pre-index).
  +           (emit-instruction (logior #x38400C00
  +                                     (ash (ldb (byte 9 0) imm-value) 12)
  +                                     (ash (register-number base) +rn-shift+)
  +                                     (ash (register-number reg) +rt-shift+)))
  +           (return-from instruction t))))
  +      (:post
  +       (let ((imm-value (or (resolve-immediate offset) 0)))
  +         (when (<= -256 imm-value 255)
  +           ;; LDR (immediate, post-index).
  +           (emit-instruction (logior #x38400400
  +                                     (ash (ldb (byte 9 0) imm-value) 12)
  +                                     (ash (register-number base) +rn-shift+)
  +                                     (ash (register-number reg) +rt-shift+)))
  +           (return-from instruction t)))))))
  +
  +(define-instruction strb (reg value)
  +  (check-register-class reg :gpr-32 :wzr)
  +  (multiple-value-bind (mode base offset)
  +      (parse-address value)
  +    (ecase mode
  +      (:base-plus-immediate
  +       (let ((imm-value (or (resolve-immediate offset) 0)))
  +         (cond ((and (<= 0 imm-value 16380)
  +                     (zerop (logand imm-value #b11)))
  +                ;; STR (immediate, unsigned offset).
  +                (emit-instruction (logior #x39000000
  +                                          (ash (ash imm-value -2) 12)
  +                                          (ash (register-number base) +rn-shift+)
  +                                          (ash (register-number reg) +rt-shift+)))
  +                (return-from instruction t))
  +               ((<= -256 imm-value 255)
  +                ;; STUR.
  +                (emit-instruction (logior #x38000000
  +                                          (ash (ldb (byte 9 0) imm-value) 12)
  +                                          (ash (register-number base) +rn-shift+)
  +                                          (ash (register-number reg) +rt-shift+)))
  +                (return-from instruction t)))))
  +      ((:base-plus-index64
  +        :base-plus-scaled-index64)
  +       (emit-instruction (logior #x38200800
  +                                 (ash (register-number offset) +rm-shift+)
  +                                 (encode-index-option mode)
  +                                 (ash (register-number base) +rn-shift+)
  +                                 (ash (register-number reg) +rt-shift+)))
  +       (return-from instruction t))
  +      (:pre
  +       (let ((imm-value (or (resolve-immediate offset) 0)))
  +         (when (<= -256 imm-value 255)
  +           ;; STR (immediate, pre-index).
  +           (emit-instruction (logior #x38000C00
  +                                     (ash (ldb (byte 9 0) imm-value) 12)
  +                                     (ash (register-number base) +rn-shift+)
  +                                     (ash (register-number reg) +rt-shift+)))
  +           (return-from instruction t))))
  +      (:post
  +       (let ((imm-value (or (resolve-immediate offset) 0)))
  +         (when (<= -256 imm-value 255)
  +           ;; STR (immediate, pre-index).
  +           (emit-instruction (logior #x38000400
  +                                     (ash (ldb (byte 9 0) imm-value) 12)
  +                                     (ash (register-number base) +rn-shift+)
  +                                     (ash (register-number reg) +rt-shift+)))
  +           (return-from instruction t)))))))
  +
  +(define-instruction ldrh (reg value)
  +  (check-register-class reg :gpr-32)
  +  (multiple-value-bind (mode base offset)
  +      (parse-address value)
  +    (ecase mode
  +      (:base-plus-immediate
  +       (let ((imm-value (or (resolve-immediate offset) 0)))
  +         (cond ((and (<= 0 imm-value 16380)
  +                     (zerop (logand imm-value #b11)))
  +                ;; LDR (immediate, unsigned offset).
  +                (emit-instruction (logior #x79400000
  +                                          (ash (ash imm-value -2) 12)
  +                                          (ash (register-number base) +rn-shift+)
  +                                          (ash (register-number reg) +rt-shift+)))
  +                (return-from instruction t))
  +               ((<= -256 imm-value 255)
  +                ;; LDUR.
  +                (emit-instruction (logior #x78400000
  +                                          (ash (ldb (byte 9 0) imm-value) 12)
  +                                          (ash (register-number base) +rn-shift+)
  +                                          (ash (register-number reg) +rt-shift+)))
  +                (return-from instruction t)))))
  +      ((:base-plus-index64
  +        :base-plus-scaled-index64)
  +       (emit-instruction (logior #x78600800
  +                                 (ash (register-number offset) +rm-shift+)
  +                                 (encode-index-option mode)
  +                                 (ash (register-number base) +rn-shift+)
  +                                 (ash (register-number reg) +rt-shift+)))
  +       (return-from instruction t))
  +      (:pre
  +       (let ((imm-value (or (resolve-immediate offset) 0)))
  +         (when (<= -256 imm-value 255)
  +           ;; LDR (immediate, pre-index).
  +           (emit-instruction (logior #x78400C00
  +                                     (ash (ldb (byte 9 0) imm-value) 12)
  +                                     (ash (register-number base) +rn-shift+)
  +                                     (ash (register-number reg) +rt-shift+)))
  +           (return-from instruction t))))
  +      (:post
  +       (let ((imm-value (or (resolve-immediate offset) 0)))
  +         (when (<= -256 imm-value 255)
  +           ;; LDR (immediate, post-index).
  +           (emit-instruction (logior #x78400400
  +                                     (ash (ldb (byte 9 0) imm-value) 12)
  +                                     (ash (register-number base) +rn-shift+)
  +                                     (ash (register-number reg) +rt-shift+)))
  +           (return-from instruction t)))))))
  +
  +(define-instruction strh (reg value)
  +  (check-register-class reg :gpr-32 :wzr)
  +  (multiple-value-bind (mode base offset)
  +      (parse-address value)
  +    (ecase mode
  +      (:base-plus-immediate
  +       (let ((imm-value (or (resolve-immediate offset) 0)))
  +         (cond ((and (<= 0 imm-value 16380)
  +                     (zerop (logand imm-value #b11)))
  +                ;; STR (immediate, unsigned offset).
  +                (emit-instruction (logior #x79000000
  +                                          (ash (ash imm-value -2) 12)
  +                                          (ash (register-number base) +rn-shift+)
  +                                          (ash (register-number reg) +rt-shift+)))
  +                (return-from instruction t))
  +               ((<= -256 imm-value 255)
  +                ;; STUR.
  +                (emit-instruction (logior #x78000000
  +                                          (ash (ldb (byte 9 0) imm-value) 12)
  +                                          (ash (register-number base) +rn-shift+)
  +                                          (ash (register-number reg) +rt-shift+)))
  +                (return-from instruction t)))))
  +      ((:base-plus-index64
  +        :base-plus-scaled-index64)
  +       (emit-instruction (logior #x78200800
  +                                 (ash (register-number offset) +rm-shift+)
  +                                 (encode-index-option mode)
  +                                 (ash (register-number base) +rn-shift+)
  +                                 (ash (register-number reg) +rt-shift+)))
  +       (return-from instruction t))
  +      (:pre
  +       (let ((imm-value (or (resolve-immediate offset) 0)))
  +         (when (<= -256 imm-value 255)
  +           ;; STR (immediate, pre-index).
  +           (emit-instruction (logior #x78000C00
  +                                     (ash (ldb (byte 9 0) imm-value) 12)
  +                                     (ash (register-number base) +rn-shift+)
  +                                     (ash (register-number reg) +rt-shift+)))
  +           (return-from instruction t))))
  +      (:post
  +       (let ((imm-value (or (resolve-immediate offset) 0)))
  +         (when (<= -256 imm-value 255)
  +           ;; STR (immediate, pre-index).
  +           (emit-instruction (logior #x78000400
  +                                     (ash (ldb (byte 9 0) imm-value) 12)
  +                                     (ash (register-number base) +rn-shift+)
  +                                     (ash (register-number reg) +rt-shift+)))
  +           (return-from instruction t)))))))
   
   (define-instruction adr (reg address)
     (let ((imm-value (- (or (resolve-immediate address) (current-address))
  
positive.code:                                   #x80000000
                                    #x00000000)
                                (ash condition 12)
                                (ash false +rm-shift+)
                                (ash true +rn-shift+)
                                (ash dst +rd-shift+))))
    t)
  
  (defmacro define-conditional-select (name condition)
  
negative.code:                 (null (register-class rhs))
                  (null shift)
                  (null amount)
                  (or (eql opcode #b11) ; ANDS
                      (not (member dst-class '(:xzr :wzr)))))
             ;; Orr (immediate)
             (let* ((imm-value (or (resolve-immediate rhs) 0))
                    (encoded-bitmask (encode-bit-mask imm-value (if is-64-bit 64 32))))
               (emit-instruction (logior #x12000000
                                         (ash opcode 29)
                                         sf
                                         (ash encoded-bitmask 10)
  