         { { +vector+ -> +vector+ } A-v->v-op }
         { { +vector+ -> +scalar+ } A-v->n-op }
         { { +vector+ -> +nonnegative+ } A-v->n-op }
-    } >>wrappers
+    } >>schema-wrappers
 (define-simd-128)
 
 PRIVATE>

A-rep        [ A/2 name>> "-rep" append "cpu.architecture" lookup ]
A-vv->v-op   DEFINES-PRIVATE ${A}-vv->v-op
A-vn->v-op   DEFINES-PRIVATE ${A}-vn->v-op
A-vv->n-op   DEFINES-PRIVATE ${A}-vv->n-op
A-v->v-op    DEFINES-PRIVATE ${A}-v->v-op
A-v->n-op    DEFINES-PRIVATE ${A}-v->n-op

WHERE


    [ [ [ underlying2>> ] dip A-rep ] dip call ] 3bi
    \ A boa ; inline

: A-v->v-op ( v1 combine-quot -- v2 )
    [ [ underlying1>> A-rep ] dip call ]
    [ [ underlying2>> A-rep ] dip call ] 2bi
    \ A boa ; inline

: A-v.-op ( v1 v2 quot -- n )
    [ [ [ underlying1>> ] bi@ A-rep ] dip call ]
    [ [ [ underlying2>> ] bi@ A-rep ] dip call ] 3bi
    + ; inline

: (A-v->n-op) ( v1 quot reduce-quot -- n )
    '[ [ underlying1>> ] [ underlying2>> ] bi A-rep @ A-rep ] dip call ; inline

: A-sum-op ( v1 quot -- n )
    [ (simd-v+) ] (A-v->n-op) ; inline

: A-vany-op ( v1 quot -- n )
    [ (simd-vbitor) ] (A-v->n-op) ; inline
: A-vall-op ( v1 quot -- n )
    [ (simd-vbitand) ] (A-v->n-op) ; inline

simd new
    \ A >>class
    \ A-with >>ctor
    \ A-rep >>rep
    {
        { v.     A-v.-op   }
        { sum    A-sum-op  }
        { vnone? A-vany-op }
        { vany?  A-vany-op }
        { vall?  A-vall-op }
    } >>special-wrappers
    {
        { { +vector+ +vector+ -> +vector+ } A-vv->v-op }
        { { +vector+ +scalar+ -> +vector+ } A-vn->v-op }
        { { +vector+ +literal+ -> +vector+ } A-vn->v-op }
        { { +vector+ -> +vector+ } A-v->v-op }
    } >>schema-wrappers
(define-simd-256)

;FUNCTOR
