     rs-reg 3 rs-reg SUBF
 ] \ drop-locals define-sub-primitive
 
-! Inline cache miss entry points
-: jit-load-return-address ( -- ) 6 MFLR ;
-
-! These are always in tail position with an existing stack
-! frame, and the stack. The frame setup takes this into account.
-: jit-inline-cache-miss ( -- )
-    jit-save-context
-    3 6 MR
-    4 vm-reg MR
-    0 5 LOAD32 "inline_cache_miss" f rc-absolute-ppc-2/2 jit-dlsym
-    5 MTLR
-    BLRL ;
-
-[ jit-load-return-address jit-inline-cache-miss ]
-[ 3 MTLR BLRL ]
-[ 3 MTCTR BCTR ]
-\ inline-cache-miss define-sub-primitive*
-
-[ jit-inline-cache-miss ]
-[ 3 MTLR BLRL ]
-[ 3 MTCTR BCTR ]
-\ inline-cache-miss-tail define-sub-primitive*
-
 ! Overflowing fixnum arithmetic
 :: jit-overflow ( insn func -- )
+    ds-reg ds-reg 4 SUBI
     jit-save-context
-    3 ds-reg -4 LWZ
-    4 ds-reg 0 LWZ
-    ds-reg ds-reg 4 SUBI
+    3 ds-reg 0 LWZ
+    4 ds-reg 4 LWZ
     0 0 LI
     0 MTXER
     6 4 3 insn call( d a s -- )

    0 4 LOAD32 rc-absolute-ppc-2/2 rt-primitive jit-rel
    4 MTLR
    BLRL
    jit-load-context
] jit-primitive jit-define

[ 0 BL rc-relative-ppc-3 rt-xt-pic jit-rel ] jit-word-call jit-define

: jit-save-context ( -- )
    4 vm-reg 0 LWZ
    1 4 0 STW
    ds-reg 4 8 STW
    rs-reg 4 12 STW ;

: jit-restore-context ( -- )
    4 vm-reg 0 LWZ
    ds-reg 4 8 LWZ
    rs-reg 4 12 LWZ ;

[
    0 3 LOAD32 rc-absolute-ppc-2/2 rt-literal jit-rel
