     dst class store-tagged ;
 
 : load-cards-offset ( dst -- )
-    [ "cards_offset" %load-vm-field-addr ] [ dup 0 LWZ ] bi ;
+    0 swap LOAD32 rc-absolute-ppc-2/2 rel-cards-offset ;
 
 : load-decks-offset ( dst -- )
-    [ "decks_offset" %load-vm-field-addr ] [ dup 0 LWZ ] bi  ;
-
-M:: ppc %write-barrier ( src card# table -- )
+    0 swap LOAD32 rc-absolute-ppc-2/2 rel-decks-offset
+
+:: (%write-barrier) ( temp1 temp2 -- )
     card-mark scratch-reg LI
 
     ! Mark the card
-    table load-cards-offset
-    src card# card-bits SRWI
-    table scratch-reg card# STBX
+    temp1 temp1 card-bits SRWI
+    temp2 load-cards-offset
+    temp1 scratch-reg temp2 STBX
 
     ! Mark the card deck
-    table load-decks-offset
-    src card# deck-bits SRWI
-    table scratch-reg card# STBX ;
+    temp1 temp1 deck-bits SRWI
+    temp2 load-decks-offset
+    temp1 scratch-reg temp2 STBX ;
+
+M:: ppc %write-barrier ( src slot temp1 temp2 -- )
+    temp1 src slot ADD
+    temp1 temp2 (%write-barrier) ;
+
+M:: ppc %write-barrier-imm ( src slot temp1 temp2 -- )
+    temp1 src slot ADDI
+    temp1 temp2 (%write-barrier) ;
 
 M:: ppc %check-nursery ( label size temp1 temp2 -- )
     temp2 load-zone-ptr
-    temp1 temp2 cell LWZ
-    temp2 temp2 3 cells LWZ
+    temp1 temp2 0 LWZ
+    temp2 temp2 2 cells LWZ
     temp1 temp1 size ADDI
     ! is here >= end?
     temp1 0 temp2 CMP

    temp MTCTR
    BCTR ;

: (%slot-imm) ( obj slot tag -- reg offset )
    [ cells ] dip - ; inline

M: ppc %slot ( dst obj slot -- ) swapd LWZX ;
M: ppc %slot-imm ( dst obj slot tag -- ) (%slot-imm) LWZ ;
M: ppc %set-slot ( src obj slot -- ) swapd STWX ;
M: ppc %set-slot-imm ( src obj slot tag -- ) (%slot-imm) STW ;

M:: ppc %string-nth ( dst src index temp -- )
    [

>>

: %load-vm-addr ( reg -- )
    0 swap LOAD32 0 rc-absolute-ppc-2/2 rel-vm ;

: %load-vm-field-addr ( reg symbol -- )
    [ 0 swap LOAD32 ] dip
    vm-field-offset rc-absolute-ppc-2/2 rel-vm ;

M: ppc %vm-field-ptr ( dst field -- ) %load-vm-field-addr ;

