 : <ROR> ( Rm shift-imm/Rs -- shifter-op ) 0b11 <shifter> ;
 : <RRX> ( Rm -- shifter-op ) 0 <ROR> ;
 
-M: register shifter-op 0 <LSL> shifter-op ;
+M: register-class shifter-op 0 <LSL> shifter-op ;
 M: integer shifter-op 0 <IMM> shifter-op ;
 
 <PRIVATE


GENERIC# (BX) 1 ( Rm l -- )

M: register (BX) ( Rm l -- )
    {
        { 1 24 }
        { 1 21 }

M: integer shift-imm/reg ( shift-imm Rm shift -- n )
    { { 0 4 } 5 { register 0 } 7 } bitfield ;

M: register-class shift-imm/reg ( Rs Rm shift -- n )
    {
        { 1 4 }
        { 0 7 }
