anchor.diff:    ];
   
     checkInputs = [ cocotb-bus pytestCheckHook swig verilog ];
  +  preCheck = ''
  +    export PATH=$out/bin:$PATH
  +    mv cocotb cocotb.hidden
  +  '';
   
  -  checkPhase = ''
  -    export PATH=$out/bin:$PATH
  -  '';
  +  pythonImportsCheck = [ "cocotb" ];
   
     meta = with lib; {
       description = "Coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python";
  
positive.code: { lib
  , stdenv
  , buildPythonPackage
  , fetchPypi
  , setuptools
  , setuptools-scm
  , cocotb-bus
  
negative.code:   pname = "cocotb";
    version = "1.7.1";
  
    # pypi source doesn't include tests
    src = fetchFromGitHub {
      owner = "cocotb";
      repo = "cocotb";
      rev = "v${version}";
      sha256 = "sha256-wACgT5r0YmSYvLhTsuFhTcJqeCtGGLifOmr7/Lz2Vug=";
    };
  
    nativeBuildInputs = [ setuptools-scm ];
  