anchor.diff:  7  bit constant i2c-SR1-TxE
   10 bit constant i2c-SR1-AF
   
  + 0 bit constant i2c-SR2-MSL
  +
   \ Medium level actions, no or limited status checking
   
   : i2c-start ( -- ) \ set start bit and wait for start condition
     i2c-start! i2c-SR1-SB i2c-SR1-wait ;
   
  -: i2c-stop  ( -- )  i2c-stop! begin i2c-MSL? 0= until ; \ stop and wait
  +: i2c-stop  ( -- )  i2c-stop! i2c-SR2-MSL i2c-SR2-!wait ; \ stop and wait
   
   : i2c-probe ( c -- nak ) \ Sets address and waits for ACK or NAK
     i2c-start
  
positive.code:   10 bit I2C1-CR1 hbis!    \ ACK enable
  
    \ Wait for bus to initialize
    begin i2c-busy? 0= until
  ;
  
  \ debugging
  
negative.code:      0 variable i2c.cnt
       0 variable i2c.addr
       0 variable i2c.needstop
   $ffff variable i2c.timeout
  
  \ Checks I2C1 busy bit
  : i2c-busy?   ( -- b) I2C1-SR2 h@ 1 bit and 0<> ;
  