anchor.diff:  ;
   
   : i2c-half ( -- )  \ half-cycle timing delay for I2C
  -  I2C.DELAY 0 do loop ;
  +  [ifdef] I2C.DELAY  I2C.DELAY 0 do loop  [then] inline ;
   
   : i2c-start ( -- )  \ with SCL high, change SDA from 1 to 0
  -  1 SDA io! i2c-half SCL ios! i2c-half 0 SDA io! i2c-half SCL ioc! ;
  +  SDA ios! i2c-half SCL ios! i2c-half SDA ioc! i2c-half SCL ioc! ;
   : i2c-stop  ( -- )  \ with SCL high, change SDA from 0 to 1
  -  0 SDA io! i2c-half SCL ios! i2c-half 1 SDA io! i2c-half ;
  +  SDA ioc! i2c-half SCL ios! i2c-half SDA ios! i2c-half ;
   
   : b>i2c ( f -- )  \ send one I2C bit
     0<> SDA io! i2c-half SCL ios! i2c-half SCL ioc! ;
  
positive.code: 
  [ifndef] SCL  PB6 constant SCL  [then]
  [ifndef] SDA  PB7 constant SDA  [then]
  
  [ifndef] I2C.DELAY  10 constant i2c.DELAY  [then]  \ can't be less than 1
  
  0 variable i2c.adr
  0 variable i2c.nak
  
negative.code: : i2c-xfer ( u -- nak )
    i2c-flush
    dup i2c.cnt !  if
      i2c-start i2c.adr @ 1+ i2c.prv ! i2c-flush
    else
      SCL ios!  \ i2c-stop
    then
    i2c.nak @
    dup if i2c-stop 0 i2c.cnt ! then  \ ignore reads if we had a nak
  