Interactive theorem provers have been used extensively to reason about various software hardware systems and mathematical theorems. The key challenge when using an interactive prover is finding a suitable sequence of proof steps that will lead to a successful proof requires a significant amount of human intervention. This paper presents an automated technique that takes as input examples of successful proofs and infers an Extended Finite State Machine as output. This can in turn be used to generate proofs of new conjectures. Our preliminary experiments show that the inferred models are generally accurate (contain few false-positive sequences) and that representing existing proofs in such a way can be very useful when guiding new ones.
@cite_30: We present a method of automatic generation of functional vectors for sequential circuits. A high-level description of the circuit, in VHDL or C, is assumed available. Our method automatically transforms the high-level description, in VHDL or C, of a circuit into an extended finite state machine (EFSM) model using which functional vectors are generated. The EFSM model is a generalization of the traditional state machine model. It can be considered as a compact representation of the machine that preserves many nice properties of a traditional state machine. Theoretical background of the EFSM model will be addressed. Our method guarantees that the generated vectors cover every statement in the high-level description at least once. Experimental results show that a set of comprehensive functional vectors for sequential circuits with more than a hundred flip-flops can be generated automatically in a few minutes of CPU time using our prototype system.
To combat this problem, this paper explores the use of the Extended Finite State Machines @cite_30 as a means of modelling examples of successful proofs. EFSMs extend the traditional FSM. Transitions are labelled with guards on an underlying data store (although the update functions on the store are not explicitly modelled).