A rail-to-rail operational amplifier is designed with minimum variation in the input stage transconductance (g(m)) in standard 0.18 mu m CMOS technology. In this design, transconductance is maintained approximately constant independent of the operation region of the input transistors (i.e., saturation or weak inversion regions). Unlike conventional methods in rail-to-rail designs in which two complementary differential pairs are used, in this work, by using a single input pair, the sensitivity to mismatches between PMOS and NMOS input transistors is eliminated. A Monte-Carlo simulation with n=300 was run to ensure mismatch insensitivity. Simulation results show that the input stage transconductance deviation as the input common-mode voltage varies from rail-to-rail is less than +/- 0.81%, in typical conditions and at 27 degrees C. When the temperature varies from -20 degrees C to 120 degrees C, the variation does not exceed +/- 1.28%. Furthermore, the variations of g(m) two long-channel (L=1 mu m) and short-channel (L=0.18 mu m) cases are +/- 0.85% and +/- 0.9%, respectively. This proves that the introduced circuit works properly regardless of the channel length of the input pair. (C) 2015 Elsevier Ltd. All rights reserved.