Modular exponentiation and modular multiplications are two fundamental operations in various cryptographic applications, and hence the performance of public-key cryptographic algorithms is strongly influenced by the efficient implementation of these operations. Reducing the frequency of modular multiplications and the time requirements for modular multiplication will help in developing efficient modular exponential algorithms. This work proposes an energy efficient modular exponential algorithm based on bit forwarding techniques. In particular, two algorithms, Bit Forwarding 1-bit (BFW1) and Bit Forwarding 2-bits (BFW2), which are modifications of the existing binary exponential algorithm, have been developed. Hardware realizations of the proposed algorithms have been evaluated in terms of throughput, power and energy. Results show increased throughput of the order of 11.02% and 15.13%, reduction in power to 1.93% and 6.35% and energy saving of the order of 1.9% and 6.35% for BFW1 and BFW2 algorithms respectively. Xilinx ISE-14.2 on Virtex-5 evaluation board and ICARUS verilog simulation and synthesis tool are used for hardware realization for FPGA and synthesized using Cadence for ASIC. (C) 2016 Elsevier B.V. All rights reserved.