We describe implementations for nonadaptive beamforming. Such problems are interesting because they cannot be solved fast using general-purpose processors or Field Programmable Gate Arrays. The XPU128-ES is a configurable massively parallel data flow architecture based on automatic data flow synchronization and designed for data and task level parallelism. We briefly introduce the prototype device and summarize recent architectural changes. We emphasize practical programnung aspects. In particular, we consider the I/O problem, which is often overlooked. Frequently in the literature, an algorithm is presented which is fast but which solves only part of the problem.