Neural encoder is one of the key components in neuromorphic computing systems, whereby sensory information is transformed into spike coded trains. The design of temporal encoder has attracted a widespread attention in the field of neuromorphic computing in the past few years. The information in the temporal encoding scheme with inter-spike intervals can arise from correlations between spike times, which could not be incorporated in the traditional rate encoding scheme. In this paper, we propose a robust and energy efficient analog implementation of the spiking temporal encoder. We pattern the neural activities across multiple timescales and encode the sensory information using time dependent temporal scales. The concept of iteration structure is introduced to construct a neural encoder that greatly increases the information process ability of the proposed temporal encoder. Integrated with iteration technique and operational-amplifier- free design, the error rate of the output temporal codes is reduced to an extremely low level. A lower sampling rate accompanied by additional verification spikes is introduced in the schemes, which significantly reduces the power consumption of the encoding system. To the best of our knowledge, our proposed neuron circuit is the first analog hardware implementation of the neural encoder that could present the sensory data using inter-spike interval temporal encoding scheme. The simulation and measurement results show the proposed temporal encoder exhibits not only energy efficiency but also high accuracy.