This study proposes a novel method to eliminate the limit cycle caused by low resolution analogue-to-digital converter (ADC) in digitally controlled DC-DC converter. The reduced state Kalman filter is proposed to get the optimum estimate of the output voltage from the noisy measurement provided by the low resolution ADC. The proposed scheme is simulated with 6 bit resolution of ADC and the validation is performed with different resolutions using a prototype model which is implemented in16 bit digital signal processor. The results show that the proposed scheme eliminates limit cycle oscillation completely and is computationally more efficient.