Mixed-signal integrated circuit design and simulation highly rely on behavioral models of circuit blocks. Such models are used for the validation of design specification, optimization of system topology, and behavioral synthesis using a description language, etc. However, automatic behavioral model generation is still in its early stages; in most scenarios designers are responsible for creating behavioral models manually, which is time-consuming and error prone. In this paper an automatic behavioral model generation method for switched-capacitor (SC) integrator is proposed. This technique is based on symbolic circuit modeling with approximation, by which parametric behavioral integrator model can be generated. Such parametric models can be used in circuit design subject to severe process variational. It is demonstrated that the automatically generated integrator models can accurately capture process variation effects on arbitrarily selected circuit elements; furthermore, they can be applied to behavioral simulation of SC Sigma-Delta modulators (SDMs) with acceptable accuracy and speedup. The generated models are compared to a recently proposed manually generated behavioral integrator model in several simulation settings.