This paper presents the synthesis procedure of using the signal flow graph (SFG) technique to realize general nth-order allpole voltage transfer function employing voltage differencing buffered amplifiers (VDBAs) and grounded capacitors. The proposed methodology, in general, contains at most n VDBAs and n grounded capacitors, without needing external passive resistors. It has been also show that the design procedure given here is simple structure, convenient tenability, and suitable for integration. Furthermore, the circuit has low sensitivity and also provides high-input and low-output impedances suitable for voltage-mode operation. PSPICE simulation results which agree very well with the theoretical analysis are also included.