An amplifier and capacitor sharing technique with applications in a multiplying digital-to-analog converter (MDAC) of CMOS pipelined ACDC is presented. The amplifier used in this implementation is a recycling amplifier based on the folded cascode operational amplifier with gain improved using positive feedback. The operational amplifier designed in 0.35um CMOS process show a simulated gain of 75 dB, frequency bandwidth of 95 MHz, phase margin of 75 degree and power consumption of 0.75 mW on a 1.8V power supply. The simulation results in MDAC of 1.5 bits show that this configuration can be used in a implementation of a 10 bits 10 MSample/s CMOS pipelined ADC with 2.8 mW power consumption (analog part) on a 1.8V supply.