Discrete-time signal processing receivers combine gain, down-conversion, anti-aliasing, down-sampling, filtering and dc-offset compensation in one analog block to reduce the size of the solution. This paper presents an analog front-end (AFE) of a single-chip GSM/GPRS/EDGE (GGE) radio in 90nm digital CMOS which based on discrete-time analog signal processing. At the heart of the AFE is the passive switched-capacitor stages providing gain-boosting by impedance transformation while providing a 3(rd) order RC filter response. The AFE achieves 1.8dB NF with -19dBm IIP3. The filter occupies 0.2mm(boolean AND)2 and consumes only 7mA.