This study describes the analysis and design of an improved recycling folded cascode using a new input path and positive feedback which simultaneously increases transconductance considerably. The proposed amplifier with bias circuits and CMFB circuit was simulated with the TSMC 90 nm and HSPICE circuit simulator @ 1.2 V. According to the simulation results, the proposed circuit shows 75 dB, 357 MHz and 359 A mu W as DC gain, GBW and power dissipation respectively. This demonstrates 22 dB gain enhancement and 207 MHz GBW improvement, in comparison to recycling the folded cascode (for same capacitor load and power dissipation). Finally, corners and Monte-Carlo simulations were performed to verify the robustness of the proposed circuit versus process, temperature, supply voltage and device dimension mismatch variations.