The boundary scan technology can make virtual probing, which could improve the overall testability of product and provide an effective approach for PCB's automatic testing based on the bus. In this paper, a new boundary scan cell insertion algorithm is put forward. Grounded on the simplified test signal flow graph st-SFG for modeling the board, the algorithm uses a testability measure based on controllability and observability to evaluate the every node, which is defined according the distance of nodes and primary I/O. At last, an example is given to verify the algorithm. In conclusion, the algorithm in this paper solve the placement problem of boundary scan cell during the PCB automatic testing using the boundary scan buses, which has very important application value.