A new current-mode squaring circuit that can be used as a basic building block in analog signal processing systems is proposed. The design is based on MOS operating in the subthreshold region to assure low voltage and low power consumption. The performance of the design was confirmed by HSPICE simulation in 0.18 m CMOS process. The circuit is operated by 0.7V supply voltage and consumes 0.2 W and maximum linearity error of 1.4%.