Flash-based FPGAs are frequently used in space applications and it is now common for such designs to include a small microcontroller. In this paper, we present the results of a detailed study of two implementations of an ARM (R) Cortex (R)-M0+ processor. The first implementation uses a standard design flow while the second implementation is protected with RHBD techniques including TMR flip-flops. Both designs were tested using a heavy-ion micro-beam using a methodology which enables individual ions to be localized both in space and time. The rate of silent data corruption (SDC) was only reduced by 5x in the protected version. Many, but not all, of the error scenarios were reproduced using simulation based fault injection. Overall, the results suggest that the contribution of single event transients (SETs) can not be neglected and the results show the limitations of flip-flop based TMR.