This paper presents design of an active building block for analog signal processing, named as current-controlled differential difference current conveyor (CCDDCC). Its parasitic resistances at X-terminal can be controlled by an input bias current. The proposed element is realized in a CMOS technology. It displays usability of the new active element, where the maximum bandwidth of voltage and current followers are around 1GHz, 100MHz, respectively. The THD is obtained around 0.8% within 0.6Vpp input range. The power dissipation of a CCDDCC at 10 mu A biased current is obtained around 1.35mW with +/- 1.25V power supplies. In addition, current-mode multiple-input single output (MISO) second-order universal analog filter is included as the applications. The filter offers the realization of simultaneous five type standard filter responses. The quality factor and the frequency response parameters can be independently tuned. SPICE simulation results of proposed CCDDCC and its applications are also presented.