pub fn read(&mut self, offset: u8) -> u8 {
        match offset {
            DLAB_LOW_OFFSET if self.is_dlab_set() => self.baud_divisor_low,
            DLAB_HIGH_OFFSET if self.is_dlab_set() => self.baud_divisor_high,
            DATA_OFFSET => {
                // Here we emulate the reset method for when RDA interrupt
                // was raised (i.e. read the receive buffer and clear the
                // interrupt identification register and RDA bit when no
                // more data is available).
                self.del_interrupt(IIR_RDA_BIT);
                if self.in_buffer.len() <= 1 {
                    self.clear_lsr_rda_bit();
                }
                self.in_buffer.pop_front().unwrap_or_default()
            }
            IER_OFFSET => self.interrupt_enable,
            IIR_OFFSET => {
                // We're enabling FIFO capability by setting the serial port to 16550A:
                // https://elixir.bootlin.com/linux/latest/source/drivers/tty/serial/8250/8250_port.c#L1299.
                let iir = self.interrupt_identification | IIR_FIFO_BITS;
                self.reset_iir();
                iir
            }
            LCR_OFFSET => self.line_control,
            MCR_OFFSET => self.modem_control,
            LSR_OFFSET => self.line_status,
            MSR_OFFSET => {
                if self.is_in_loop_mode() {
                    // In loopback mode, the four modem control inputs (CTS, DSR, RI, DCD) are
                    // internally connected to the four modem control outputs (RTS, DTR, OUT1, OUT2).
                    // This way CTS is controlled by RTS, DSR by DTR, RI by OUT1 and DCD by OUT2.
                    // (so they will basically contain the same value).
                    let mut msr =
                        self.modem_status & !(MSR_DSR_BIT | MSR_CTS_BIT | MSR_RI_BIT | MSR_DCD_BIT);
                    if (self.modem_control & MCR_DTR_BIT) != 0 {
                        msr |= MSR_DSR_BIT;
                    }
                    if (self.modem_control & MCR_RTS_BIT) != 0 {
                        msr |= MSR_CTS_BIT;
                    }
                    if (self.modem_control & MCR_OUT1_BIT) != 0 {
                        msr |= MSR_RI_BIT;
                    }
                    if (self.modem_control & MCR_OUT2_BIT) != 0 {
                        msr |= MSR_DCD_BIT;
                    }
                    msr
                } else {
                    self.modem_status
                }
            }
            SCR_OFFSET => self.scratch,
            _ => 0,
        }
    }
/// Handles a read request from the driver at `offset` offset from the
/// base Port I/O address.
///
/// Returns the read value.
///
/// # Arguments
/// * `offset` - The offset that will be added to the base PIO address
///              for reading from a specific register.
///
/// # Example
///
/// You can see an example of how to use this function in the
/// [`Example` section from `Serial`](struct.Serial.html#example).
Handles a read request from the driver at `offset` offset from the
base Port I/O address.

Returns the read value.
Handles a read request from the driver at ` offset ` offset from the base Port I / O address . Returns the read value .
pub fn read(&mut self, offset: u8) -> u8 {
        match offset {
            DLAB_LOW_OFFSET if self.is_dlab_set() => self.baud_divisor_low,
            DLAB_HIGH_OFFSET if self.is_dlab_set() => self.baud_divisor_high,
            DATA_OFFSET => {
                // Here we emulate the reset method for when RDA interrupt
                // was raised (i.e. read the receive buffer and clear the
                // interrupt identification register and RDA bit when no
                // more data is available).
                self.del_interrupt(IIR_RDA_BIT);
                if self.in_buffer.len() <= 1 {
                    self.clear_lsr_rda_bit();
                }
                self.in_buffer.pop_front().unwrap_or_default()
            }
            IER_OFFSET => self.interrupt_enable,
            IIR_OFFSET => {
                // We're enabling FIFO capability by setting the serial port to 16550A:
                // https://elixir.bootlin.com/linux/latest/source/drivers/tty/serial/8250/8250_port.c#L1299.
                let iir = self.interrupt_identification | IIR_FIFO_BITS;
                self.reset_iir();
                iir
            }
            LCR_OFFSET => self.line_control,
            MCR_OFFSET => self.modem_control,
            LSR_OFFSET => self.line_status,
            MSR_OFFSET => {
                if self.is_in_loop_mode() {
                    // In loopback mode, the four modem control inputs (CTS, DSR, RI, DCD) are
                    // internally connected to the four modem control outputs (RTS, DTR, OUT1, OUT2).
                    // This way CTS is controlled by RTS, DSR by DTR, RI by OUT1 and DCD by OUT2.
                    // (so they will basically contain the same value).
                    let mut msr =
                        self.modem_status & !(MSR_DSR_BIT | MSR_CTS_BIT | MSR_RI_BIT | MSR_DCD_BIT);
                    if (self.modem_control & MCR_DTR_BIT) != 0 {
                        msr |= MSR_DSR_BIT;
                    }
                    if (self.modem_control & MCR_RTS_BIT) != 0 {
                        msr |= MSR_CTS_BIT;
                    }
                    if (self.modem_control & MCR_OUT1_BIT) != 0 {
                        msr |= MSR_RI_BIT;
                    }
                    if (self.modem_control & MCR_OUT2_BIT) != 0 {
                        msr |= MSR_DCD_BIT;
                    }
                    msr
                } else {
                    self.modem_status
                }
            }
            SCR_OFFSET => self.scratch,
            _ => 0,
        }
    }
pub fn read ( & mut self , offset : u8 ) -> u8 { match offset { DLAB_LOW_OFFSET if self . is_dlab_set ( ) => self . baud_divisor_low , DLAB_HIGH_OFFSET if self . is_dlab_set ( ) => self . baud_divisor_high , DATA_OFFSET => { // Here we emulate the reset method for when RDA interrupt // was raised (i.e. read the receive buffer and clear the // interrupt identification register and RDA bit when no // more data is available). self . del_interrupt ( IIR_RDA_BIT ) ; if self . in_buffer . len ( ) <= 1 { self . clear_lsr_rda_bit ( ) ; } self . in_buffer . pop_front ( ) . unwrap_or_default ( ) } IER_OFFSET => self . interrupt_enable , IIR_OFFSET => { // We're enabling FIFO capability by setting the serial port to 16550A: // https://elixir.bootlin.com/linux/latest/source/drivers/tty/serial/8250/8250_port.c#L1299. let iir = self . interrupt_identification | IIR_FIFO_BITS ; self . reset_iir ( ) ; iir } LCR_OFFSET => self . line_control , MCR_OFFSET => self . modem_control , LSR_OFFSET => self . line_status , MSR_OFFSET => { if self . is_in_loop_mode ( ) { // In loopback mode, the four modem control inputs (CTS, DSR, RI, DCD) are // internally connected to the four modem control outputs (RTS, DTR, OUT1, OUT2). // This way CTS is controlled by RTS, DSR by DTR, RI by OUT1 and DCD by OUT2. // (so they will basically contain the same value). let mut msr = self . modem_status & ! ( MSR_DSR_BIT | MSR_CTS_BIT | MSR_RI_BIT | MSR_DCD_BIT ) ; if ( self . modem_control & MCR_DTR_BIT ) != 0 { msr |= MSR_DSR_BIT ; } if ( self . modem_control & MCR_RTS_BIT ) != 0 { msr |= MSR_CTS_BIT ; } if ( self . modem_control & MCR_OUT1_BIT ) != 0 { msr |= MSR_RI_BIT ; } if ( self . modem_control & MCR_OUT2_BIT ) != 0 { msr |= MSR_DCD_BIT ; } msr } else { self . modem_status } } SCR_OFFSET => self . scratch , _ => 0 , } }
Handles a read request from the driver at `offset` offset from the
base Port I/O address.
Handles a read request from the driver at ` offset ` offset from the base Port I / O address .
&mut self
offset
u8
&mut self
offset
u8
example
You can see an example of how to use this function in the
[`Example` section from `Serial`](struct.Serial.html#example).
You can see an example of how to use this function in the [ ` Example ` section from ` Serial ` ] ( struct . Serial . html#example ) .