func (p *Parser) registerShift(name string, prefix rune) int64 {
	if prefix != 0 {
		p.errorf("prefix %c not allowed for shifted register: $%s", prefix, name)
	}
	// R1 op R2 or r1 op constant.
	// op is:
	//	"<<" == 0
	//	">>" == 1
	//	"->" == 2
	//	"@>" == 3
	r1, ok := p.registerReference(name)
	if !ok {
		return 0
	}
	var op int16
	switch p.next().ScanToken {
	case lex.LSH:
		op = 0
	case lex.RSH:
		op = 1
	case lex.ARR:
		op = 2
	case lex.ROT:
		// following instructions on ARM64 support rotate right
		// AND, ANDS, TST, BIC, BICS, EON, EOR, ORR, MVN, ORN
		op = 3
	}
	tok := p.next()
	str := tok.String()
	var count int16
	switch tok.ScanToken {
	case scanner.Ident:
		if p.arch.Family == sys.ARM64 {
			p.errorf("rhs of shift must be integer: %s", str)
		} else {
			r2, ok := p.registerReference(str)
			if !ok {
				p.errorf("rhs of shift must be register or integer: %s", str)
			}
			count = (r2&15)<<8 | 1<<4
		}
	case scanner.Int, '(':
		p.back()
		x := int64(p.expr())
		if p.arch.Family == sys.ARM64 {
			if x >= 64 {
				p.errorf("register shift count too large: %s", str)
			}
			count = int16((x & 63) << 10)
		} else {
			if x >= 32 {
				p.errorf("register shift count too large: %s", str)
			}
			count = int16((x & 31) << 7)
		}
	default:
		p.errorf("unexpected %s in register shift", tok.String())
	}
	if p.arch.Family == sys.ARM64 {
		off, err := arch.ARM64RegisterShift(r1, op, count)
		if err != nil {
			p.errorf(err.Error())
		}
		return off
	} else {
		return int64((r1 & 15) | op<<5 | count)
	}
}
// registerShift parses an ARM/ARM64 shifted register reference and returns the encoded representation.
// There is known to be a register (current token) and a shift operator (peeked token).
registerShift parses an ARM/ARM64 shifted register reference and returns the encoded representation.
There is known to be a register (current token) and a shift operator (peeked token).
// registerShift parses an ARM / ARM64 shifted register reference and returns the encoded representation . // There is known to be a register ( current token ) and a shift operator ( peeked token ) .
func (p *Parser) registerShift(name string, prefix rune) int64 {
	if prefix != 0 {
		p.errorf("prefix %c not allowed for shifted register: $%s", prefix, name)
	}
	r1, ok := p.registerReference(name)
	if !ok {
		return 0
	}
	var op int16
	switch p.next().ScanToken {
	case lex.LSH:
		op = 0
	case lex.RSH:
		op = 1
	case lex.ARR:
		op = 2
	case lex.ROT:
		op = 3
	}
	tok := p.next()
	str := tok.String()
	var count int16
	switch tok.ScanToken {
	case scanner.Ident:
		if p.arch.Family == sys.ARM64 {
			p.errorf("rhs of shift must be integer: %s", str)
		} else {
			r2, ok := p.registerReference(str)
			if !ok {
				p.errorf("rhs of shift must be register or integer: %s", str)
			}
			count = (r2&15)<<8 | 1<<4
		}
	case scanner.Int, '(':
		p.back()
		x := int64(p.expr())
		if p.arch.Family == sys.ARM64 {
			if x >= 64 {
				p.errorf("register shift count too large: %s", str)
			}
			count = int16((x & 63) << 10)
		} else {
			if x >= 32 {
				p.errorf("register shift count too large: %s", str)
			}
			count = int16((x & 31) << 7)
		}
	default:
		p.errorf("unexpected %s in register shift", tok.String())
	}
	if p.arch.Family == sys.ARM64 {
		off, err := arch.ARM64RegisterShift(r1, op, count)
		if err != nil {
			p.errorf(err.Error())
		}
		return off
	} else {
		return int64((r1 & 15) | op<<5 | count)
	}
}
func ( p * Parser ) registerShift ( name string , prefix rune ) int64 { if prefix != 0 { p . errorf ( " " , prefix , name ) } r1 , ok := p . registerReference ( name ) if ! ok { return 0 } var op int16 switch p . next ( ) . ScanToken { case lex . LSH : op = 0 case lex . RSH : op = 1 case lex . ARR : op = 2 case lex . ROT : op = 3 } tok := p . next ( ) str := tok . String ( ) var count int16 switch tok . ScanToken { case scanner . Ident : if p . arch . Family == sys . ARM64 { p . errorf ( " " , str ) } else { r2 , ok := p . registerReference ( str ) if ! ok { p . errorf ( " " , str ) } count = ( r2 & 15 ) << 8 | 1 << 4 } case scanner . Int , '(' : p . back ( ) x := int64 ( p . expr ( ) ) if p . arch . Family == sys . ARM64 { if x >= 64 { p . errorf ( " " , str ) } count = int16 ( ( x & 63 ) << 10 ) } else { if x >= 32 { p . errorf ( " " , str ) } count = int16 ( ( x & 31 ) << 7 ) } default : p . errorf ( " " , tok . String ( ) ) } if p . arch . Family == sys . ARM64 { off , err := arch . ARM64RegisterShift ( r1 , op , count ) if err != nil { p . errorf ( err . Error ( ) ) } return off } else { return int64 ( ( r1 & 15 ) | op << 5 | count ) } }
registerShift parses an ARM/ARM64 shifted register reference and returns the encoded representation.
registerShift parses an ARM / ARM64 shifted register reference and returns the encoded representation .
// R1 op R2 or r1 op constant. // op is: //	"<<" == 0 //	">>" == 1 //	"->" == 2 //	"@>" == 3 // following instructions on ARM64 support rotate right // AND, ANDS, TST, BIC, BICS, EON, EOR, ORR, MVN, ORN