fn load_bytes(&mut self, v_address: u64, width: u64) -> Result<u64, Trap> {
		debug_assert!(
			width == 1 || width == 2 || width == 4 || width == 8,
			"Width must be 1, 2, 4, or 8. {:X}",
			width
		);
		match (v_address & 0xfff) <= (0x1000 - width) {
			true => match self.translate_address(v_address, &MemoryAccessType::Read) {
				Ok(p_address) => {
					#[cfg(feature = "debug-cache")]
					println!("\nload {}bytes @ 0x{:x}", width, p_address);

					// pre-parse index
					let l1_index: u64 =
						(p_address >> L1_CACHE_OFFSET_BITS) & ((1 << L1_CACHE_INDEX_BITS) - 1);
					let _l1_tag: u64 = p_address >> (L1_CACHE_INDEX_BITS + L1_CACHE_OFFSET_BITS);
					let l1_offset = p_address & ((1 << L1_CACHE_OFFSET_BITS) - 1);

					let l1_way = match self.aquire_cache_line(p_address) {
						Ok(l1_way) => l1_way,
						Err(trap) => return Err(trap),
					};

					Ok(self.l1_cache.data[l1_index as usize].data[l1_way as usize]
						.get(l1_offset, width))
				}
				Err(()) => Err(Trap {
					trap_type: TrapType::LoadPageFault,
					value: v_address,
				}),
			},
			false => {
				let mut data = 0 as u64;
				for i in 0..width {
					match self.load(v_address.wrapping_add(i)) {
						Ok(byte) => data |= (byte as u64) << (i * 8),
						Err(e) => return Err(e),
					};
				}
				Ok(data)
			}
		}
	}
/// Loads multiple bytes. This method takes virtual address and translates
/// into physical address inside.
///
/// # Arguments
/// * `v_address` Virtual address
/// * `width` Must be 1, 2, 4, or 8
Loads multiple bytes. This method takes virtual address and translates
into physical address inside.
Loads multiple bytes . This method takes virtual address and translates into physical address inside .
fn load_bytes(&mut self, v_address: u64, width: u64) -> Result<u64, Trap> {
		debug_assert!(
			width == 1 || width == 2 || width == 4 || width == 8,
			"Width must be 1, 2, 4, or 8. {:X}",
			width
		);
		match (v_address & 0xfff) <= (0x1000 - width) {
			true => match self.translate_address(v_address, &MemoryAccessType::Read) {
				Ok(p_address) => {
					#[cfg(feature = "debug-cache")]
					println!("\nload {}bytes @ 0x{:x}", width, p_address);
					// pre-parse index
					let l1_index: u64 =
						(p_address >> L1_CACHE_OFFSET_BITS) & ((1 << L1_CACHE_INDEX_BITS) - 1);
					let _l1_tag: u64 = p_address >> (L1_CACHE_INDEX_BITS + L1_CACHE_OFFSET_BITS);
					let l1_offset = p_address & ((1 << L1_CACHE_OFFSET_BITS) - 1);
					let l1_way = match self.aquire_cache_line(p_address) {
						Ok(l1_way) => l1_way,
						Err(trap) => return Err(trap),
					};
					Ok(self.l1_cache.data[l1_index as usize].data[l1_way as usize]
						.get(l1_offset, width))
				}
				Err(()) => Err(Trap {
					trap_type: TrapType::LoadPageFault,
					value: v_address,
				}),
			},
			false => {
				let mut data = 0 as u64;
				for i in 0..width {
					match self.load(v_address.wrapping_add(i)) {
						Ok(byte) => data |= (byte as u64) << (i * 8),
						Err(e) => return Err(e),
					};
				}
				Ok(data)
			}
		}
	}
fn load_bytes ( & mut self , v_address : u64 , width : u64 ) -> Result < u64 , Trap > { debug_assert ! ( width 1 width 2 width 4 width 8 " " width ) ; match ( v_address & 0xfff ) <= ( 0x1000 - width ) { true => match self . translate_address ( v_address , & MemoryAccessType :: Read ) { Ok ( p_address ) => { # [ cfg ( feature " " ) ] println ! ( " \n " width p_address ) ; // pre-parse index let l1_index : u64 = ( p_address >> L1_CACHE_OFFSET_BITS ) & ( ( 1 << L1_CACHE_INDEX_BITS ) - 1 ) ; let _l1_tag : u64 = p_address >> ( L1_CACHE_INDEX_BITS + L1_CACHE_OFFSET_BITS ) ; let l1_offset = p_address & ( ( 1 << L1_CACHE_OFFSET_BITS ) - 1 ) ; let l1_way = match self . aquire_cache_line ( p_address ) { Ok ( l1_way ) => l1_way , Err ( trap ) => return Err ( trap ) , } ; Ok ( self . l1_cache . data [ l1_index as usize ] . data [ l1_way as usize ] . get ( l1_offset , width ) ) } Err ( ( ) ) => Err ( Trap { trap_type : TrapType :: LoadPageFault , value : v_address , } ) , } , false => { let mut data = 0 as u64 ; for i in 0 .. width { match self . load ( v_address . wrapping_add ( i ) ) { Ok ( byte ) => data |= ( byte as u64 ) << ( i * 8 ) , Err ( e ) => return Err ( e ) , } ; } Ok ( data ) } } }
Loads multiple bytes.
Loads multiple bytes .
&mut self
v_address
u64
width
u64