fn ld_i_into_v0_to_vx(&mut self, reg: u8)
	{
		let mut addr = self.i;

		for i in 0..reg+1
		{
			self.v[i as usize] = self.ram.lb(addr);
			addr = addr + 1;
		}
	}
/// Read registers V0 through Vreg from memory starting at location I.
/// The interpreter reads values from memory starting at location I into registers V0 through Vreg.
Read registers V0 through Vreg from memory starting at location I.
The interpreter reads values from memory starting at location I into registers V0 through Vreg.
Read registers V0 through Vreg from memory starting at location I . The interpreter reads values from memory starting at location I into registers V0 through Vreg .
fn ld_i_into_v0_to_vx(&mut self, reg: u8)
	{
		let mut addr = self.i;
		for i in 0..reg+1
		{
			self.v[i as usize] = self.ram.lb(addr);
			addr = addr + 1;
		}
	}
fn ld_i_into_v0_to_vx ( & mut self , reg : u8 ) { let mut addr = self . i ; for i in 0 .. reg + 1 { self . v [ i as usize ] = self . ram . lb ( addr ) ; addr = addr + 1 ; } }
Read registers V0 through Vreg from memory starting at location I.
Read registers V0 through Vreg from memory starting at location I .
&mut self
reg
u8