fn guard<'a>(expr: &GuardExpr, ctx: ParenCtx) -> D<'a> {
    use ParenCtx as P;
    match expr {
        GuardExpr::Atom(a) => atom(a),
        GuardExpr::Not(a) => {
            let ret = D::text(expr.op_str()).append(guard(a, P::Not));
            if ctx > P::Not {
                ret.parens()
            } else {
                ret
            }
        }
        GuardExpr::And(bs) => {
            let ret = D::intersperse(
                bs.iter().map(|b| guard(b, P::And)).collect::<Vec<_>>(),
                D::text(" & "),
            );
            if ctx > P::And {
                ret.parens()
            } else {
                ret
            }
        }
        GuardExpr::Or(bs) => {
            let ret = D::intersperse(
                bs.iter().map(|b| guard(b, P::Or)).collect::<Vec<_>>(),
                D::text(" | "),
            );
            if ctx > P::Or {
                ret.parens()
            } else {
                ret
            }
        }
        GuardExpr::Eq(a, b)
        | GuardExpr::Neq(a, b)
        | GuardExpr::Gt(a, b)
        | GuardExpr::Lt(a, b)
        | GuardExpr::Geq(a, b)
        | GuardExpr::Leq(a, b) => {
            let ret = D::nil().append(
                guard(a, P::Op)
                    .append(format!(" {} ", expr.op_str()))
                    .append(guard(b, P::Op)),
            );
            if ctx > P::Op {
                ret.parens()
            } else {
                ret
            }
        }
    }
}
/// Converts a guarded edge into a Verilog string
Converts a guarded edge into a Verilog string
Converts a guarded edge into a Verilog string
fn guard<'a>(expr: &GuardExpr, ctx: ParenCtx) -> D<'a> {
    use ParenCtx as P;
    match expr {
        GuardExpr::Atom(a) => atom(a),
        GuardExpr::Not(a) => {
            let ret = D::text(expr.op_str()).append(guard(a, P::Not));
            if ctx > P::Not {
                ret.parens()
            } else {
                ret
            }
        }
        GuardExpr::And(bs) => {
            let ret = D::intersperse(
                bs.iter().map(|b| guard(b, P::And)).collect::<Vec<_>>(),
                D::text(" & "),
            );
            if ctx > P::And {
                ret.parens()
            } else {
                ret
            }
        }
        GuardExpr::Or(bs) => {
            let ret = D::intersperse(
                bs.iter().map(|b| guard(b, P::Or)).collect::<Vec<_>>(),
                D::text(" | "),
            );
            if ctx > P::Or {
                ret.parens()
            } else {
                ret
            }
        }
        GuardExpr::Eq(a, b)
        | GuardExpr::Neq(a, b)
        | GuardExpr::Gt(a, b)
        | GuardExpr::Lt(a, b)
        | GuardExpr::Geq(a, b)
        | GuardExpr::Leq(a, b) => {
            let ret = D::nil().append(
                guard(a, P::Op)
                    .append(format!(" {} ", expr.op_str()))
                    .append(guard(b, P::Op)),
            );
            if ctx > P::Op {
                ret.parens()
            } else {
                ret
            }
        }
    }
}
fn guard < ' a > ( expr : & GuardExpr , ctx : ParenCtx ) -> D < ' a > { use ParenCtx as P ; match expr { GuardExpr :: Atom ( a ) => atom ( a ) , GuardExpr :: Not ( a ) => { let ret = D :: text ( expr . op_str ( ) ) . append ( guard ( a , P :: Not ) ) ; if ctx > P :: Not { ret . parens ( ) } else { ret } } GuardExpr :: And ( bs ) => { let ret = D :: intersperse ( bs . iter ( ) . map ( | b | guard ( b , P :: And ) ) . collect :: < Vec < _ > > ( ) , D :: text ( " " ) , ) ; if ctx > P :: And { ret . parens ( ) } else { ret } } GuardExpr :: Or ( bs ) => { let ret = D :: intersperse ( bs . iter ( ) . map ( | b | guard ( b , P :: Or ) ) . collect :: < Vec < _ > > ( ) , D :: text ( " " ) , ) ; if ctx > P :: Or { ret . parens ( ) } else { ret } } GuardExpr :: Eq ( a , b ) | GuardExpr :: Neq ( a , b ) | GuardExpr :: Gt ( a , b ) | GuardExpr :: Lt ( a , b ) | GuardExpr :: Geq ( a , b ) | GuardExpr :: Leq ( a , b ) => { let ret = D :: nil ( ) . append ( guard ( a , P :: Op ) . append ( format ! ( " " expr op_str ( ) ) ) . append ( guard ( b , P :: Op ) ) , ) ; if ctx > P :: Op { ret . parens ( ) } else { ret } } } }
Converts a guarded edge into a Verilog string
Converts a guarded edge into a Verilog string
expr
&GuardExpr
ctx
ParenCtx