pub fn enable_irq(&self, irq_index: u32, event_fds: Vec<&EventFd>) -> Result<()> {
        let irq = self
            .irqs
            .get(&irq_index)
            .ok_or(VfioError::VfioDeviceEnableIrq)?;
        if irq.count == 0 || (irq.count as usize) < event_fds.len() {
            return Err(VfioError::VfioDeviceEnableIrq);
        }

        let mut irq_set = vec_with_array_field::<vfio_irq_set, u32>(event_fds.len());
        irq_set[0].argsz = mem::size_of::<vfio_irq_set>() as u32
            + (event_fds.len() * mem::size_of::<u32>()) as u32;
        irq_set[0].flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
        irq_set[0].index = irq_index;
        irq_set[0].start = 0;
        irq_set[0].count = event_fds.len() as u32;

        {
            // irq_set.data could be none, bool or fd according to flags, so irq_set.data
            // is u8 default, here irq_set.data is a vector of fds as u32, so 4 default u8
            // are combined together as u32 for each fd.
            // It is safe as enough space is reserved through
            // vec_with_array_field(u32)<event_fds.len()>.
            let fds = unsafe {
                irq_set[0]
                    .data
                    .as_mut_slice(event_fds.len() * mem::size_of::<u32>())
            };
            for (index, event_fd) in event_fds.iter().enumerate() {
                let fds_offset = index * mem::size_of::<u32>();
                let fd = &mut fds[fds_offset..fds_offset + mem::size_of::<u32>()];
                LittleEndian::write_u32(fd, event_fd.as_raw_fd() as u32);
            }
        }

        vfio_syscall::set_device_irqs(self, irq_set.as_slice())
            .map_err(|_| VfioError::VfioDeviceEnableIrq)
    }
/// Enables a VFIO device IRQs.
/// This maps a vector of EventFds to all VFIO managed interrupts. In other words, this
/// tells VFIO which EventFd to write into whenever one of the device interrupt vector
/// is triggered.
///
/// # Arguments
/// * `irq_index` - The type (INTX, MSI or MSI-X) of interrupts to enable.
/// * `event_fds` - The EventFds vector that matches all the supported VFIO interrupts.
Enables a VFIO device IRQs.
This maps a vector of EventFds to all VFIO managed interrupts. In other words, this
tells VFIO which EventFd to write into whenever one of the device interrupt vector
is triggered.
Enables a VFIO device IRQs . This maps a vector of EventFds to all VFIO managed interrupts . In other words this tells VFIO which EventFd to write into whenever one of the device interrupt vector is triggered .
pub fn enable_irq(&self, irq_index: u32, event_fds: Vec<&EventFd>) -> Result<()> {
        let irq = self
            .irqs
            .get(&irq_index)
            .ok_or(VfioError::VfioDeviceEnableIrq)?;
        if irq.count == 0 || (irq.count as usize) < event_fds.len() {
            return Err(VfioError::VfioDeviceEnableIrq);
        }
        let mut irq_set = vec_with_array_field::<vfio_irq_set, u32>(event_fds.len());
        irq_set[0].argsz = mem::size_of::<vfio_irq_set>() as u32
            + (event_fds.len() * mem::size_of::<u32>()) as u32;
        irq_set[0].flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
        irq_set[0].index = irq_index;
        irq_set[0].start = 0;
        irq_set[0].count = event_fds.len() as u32;
        {
            // irq_set.data could be none, bool or fd according to flags, so irq_set.data
            // is u8 default, here irq_set.data is a vector of fds as u32, so 4 default u8
            // are combined together as u32 for each fd.
            // It is safe as enough space is reserved through
            // vec_with_array_field(u32)<event_fds.len()>.
            let fds = unsafe {
                irq_set[0]
                    .data
                    .as_mut_slice(event_fds.len() * mem::size_of::<u32>())
            };
            for (index, event_fd) in event_fds.iter().enumerate() {
                let fds_offset = index * mem::size_of::<u32>();
                let fd = &mut fds[fds_offset..fds_offset + mem::size_of::<u32>()];
                LittleEndian::write_u32(fd, event_fd.as_raw_fd() as u32);
            }
        }
        vfio_syscall::set_device_irqs(self, irq_set.as_slice())
            .map_err(|_| VfioError::VfioDeviceEnableIrq)
    }
pub fn enable_irq ( & self , irq_index : u32 , event_fds : Vec < & EventFd > ) -> Result < ( ) > { let irq = self . irqs . get ( & irq_index ) . ok_or ( VfioError :: VfioDeviceEnableIrq ) ? ; if irq . count == 0 || ( irq . count as usize ) < event_fds . len ( ) { return Err ( VfioError :: VfioDeviceEnableIrq ) ; } let mut irq_set = vec_with_array_field :: < vfio_irq_set , u32 > ( event_fds . len ( ) ) ; irq_set [ 0 ] . argsz = mem :: size_of :: < vfio_irq_set > ( ) as u32 + ( event_fds . len ( ) * mem :: size_of :: < u32 > ( ) ) as u32 ; irq_set [ 0 ] . flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER ; irq_set [ 0 ] . index = irq_index ; irq_set [ 0 ] . start = 0 ; irq_set [ 0 ] . count = event_fds . len ( ) as u32 ; { // irq_set.data could be none, bool or fd according to flags, so irq_set.data // is u8 default, here irq_set.data is a vector of fds as u32, so 4 default u8 // are combined together as u32 for each fd. // It is safe as enough space is reserved through // vec_with_array_field(u32)<event_fds.len()>. let fds = unsafe { irq_set [ 0 ] . data . as_mut_slice ( event_fds . len ( ) * mem :: size_of :: < u32 > ( ) ) } ; for ( index , event_fd ) in event_fds . iter ( ) . enumerate ( ) { let fds_offset = index * mem :: size_of :: < u32 > ( ) ; let fd = & mut fds [ fds_offset .. fds_offset + mem :: size_of :: < u32 > ( ) ] ; LittleEndian :: write_u32 ( fd , event_fd . as_raw_fd ( ) as u32 ) ; } } vfio_syscall :: set_device_irqs ( self , irq_set . as_slice ( ) ) . map_err ( | _ | VfioError :: VfioDeviceEnableIrq ) }
Enables a VFIO device IRQs.
Enables a VFIO device IRQs .
&self
irq_index
u32
event_fds
Vec<&EventFd>