fn configure_prescaler(&mut self, rcc: &mut pac::RCC) {
        let (a_pre, s_pre): (u8, u16) = match rcc.bdcr.read().rtcsel().variant() {
            RTCSEL_A::NOCLOCK => unreachable!(),
            // (127 + 1) × (255 + 1) = 32_768 Hz
            RTCSEL_A::LSE => (127, 255),
            RTCSEL_A::LSI => match rcc.csr.read().lsipre().variant() {
                // (99 + 1) × (319 + 1) = 32_000 Hz
                DIV1 => (99, 319),
                // (124 + 1) × (1 + 1) = 250 Hz
                DIV128 => (124, 1),
            },
            // (99 + 1) × (9_999 + 1) = 1_000_000 Hz
            RTCSEL_A::HSE32 => (99, 9_999),
        };

        // enter initialization mode
        self.rtc.icsr.modify(|_, w| w.init().init_mode());
        while self.rtc.icsr.read().initf().is_not_allowed() {}

        // enable shadow register bypass
        self.rtc.cr.modify(|_, w| w.bypshad().set_bit());

        self.rtc
            .prer
            .write(|w| w.prediv_s().bits(s_pre).prediv_a().bits(a_pre));

        // exit initialization mode
        self.rtc.icsr.modify(|_, w| w.init().free_running_mode())
    }
// configure prescaler for a 1Hz clock
//
// RM0453 Rev 2 page 996:
// When both prescalers are used, it is recommended to configure the
// asynchronous prescaler to a high value to minimize consumption.
//
// async is 7 bit (128 max)
// sync is 15-bit (32_768 max)
configure prescaler for a 1Hz clock
RM0453 Rev 2 page 996:
When both prescalers are used, it is recommended to configure the
asynchronous prescaler to a high value to minimize consumption.


configure prescaler for a 1Hz clock RM0453 Rev 2 page 996 : When both prescalers are used it is recommended to configure the asynchronous prescaler to a high value to minimize consumption .
fn configure_prescaler(&mut self, rcc: &mut pac::RCC) {
        let (a_pre, s_pre): (u8, u16) = match rcc.bdcr.read().rtcsel().variant() {
            RTCSEL_A::NOCLOCK => unreachable!(),
            // (127 + 1) × (255 + 1) = 32_768 Hz
            RTCSEL_A::LSE => (127, 255),
            RTCSEL_A::LSI => match rcc.csr.read().lsipre().variant() {
                // (99 + 1) × (319 + 1) = 32_000 Hz
                DIV1 => (99, 319),
                // (124 + 1) × (1 + 1) = 250 Hz
                DIV128 => (124, 1),
            },
            // (99 + 1) × (9_999 + 1) = 1_000_000 Hz
            RTCSEL_A::HSE32 => (99, 9_999),
        };
        // enter initialization mode
        self.rtc.icsr.modify(|_, w| w.init().init_mode());
        while self.rtc.icsr.read().initf().is_not_allowed() {}
        // enable shadow register bypass
        self.rtc.cr.modify(|_, w| w.bypshad().set_bit());
        self.rtc
            .prer
            .write(|w| w.prediv_s().bits(s_pre).prediv_a().bits(a_pre));
        // exit initialization mode
        self.rtc.icsr.modify(|_, w| w.init().free_running_mode())
    }
fn configure_prescaler ( & mut self , rcc : & mut pac :: RCC ) { let ( a_pre , s_pre ) : ( u8 , u16 ) = match rcc . bdcr . read ( ) . rtcsel ( ) . variant ( ) { RTCSEL_A :: NOCLOCK => unreachable ! ( ) , // (127 + 1) × (255 + 1) = 32_768 Hz RTCSEL_A :: LSE => ( 127 , 255 ) , RTCSEL_A :: LSI => match rcc . csr . read ( ) . lsipre ( ) . variant ( ) { // (99 + 1) × (319 + 1) = 32_000 Hz DIV1 => ( 99 , 319 ) , // (124 + 1) × (1 + 1) = 250 Hz DIV128 => ( 124 , 1 ) , } , // (99 + 1) × (9_999 + 1) = 1_000_000 Hz RTCSEL_A :: HSE32 => ( 99 , 9_999 ) , } ; // enter initialization mode self . rtc . icsr . modify ( | _ , w | w . init ( ) . init_mode ( ) ) ; while self . rtc . icsr . read ( ) . initf ( ) . is_not_allowed ( ) { } // enable shadow register bypass self . rtc . cr . modify ( | _ , w | w . bypshad ( ) . set_bit ( ) ) ; self . rtc . prer . write ( | w | w . prediv_s ( ) . bits ( s_pre ) . prediv_a ( ) . bits ( a_pre ) ) ; // exit initialization mode self . rtc . icsr . modify ( | _ , w | w . init ( ) . free_running_mode ( ) ) }
configure prescaler for a 1Hz clock
RM0453 Rev 2 page 996:
When both prescalers are used, it is recommended to configure the
asynchronous prescaler to a high value to minimize consumption.
configure prescaler for a 1Hz clock RM0453 Rev 2 page 996 : When both prescalers are used it is recommended to configure the asynchronous prescaler to a high value to minimize consumption .
&mut self
rcc
&mut pac::RCC