fn fmv_w_x(cpu: &mut Cpu, _addr: u64, word: u32) -> Result<(), Trap> {
    let o = parse_type_r(word);
    cpu.f[o.rd as usize] = f64::from_bits(cpu.x[o.rs1 as usize] as u32 as u64);
    Ok(())
}
/// [fmv.w.x rd,rs1]
/// FMV.W.X moves the single-precision value encoded in IEEE 754-2008 standard encoding
/// from the lower 32 bits of integer register rs1 to the floating-point register rd.
/// The bits are not modified in the transfer, and in particular, the payloads of
/// non-canonical NaNs are preserved.
[fmv.w.x rd,rs1]
FMV.W.X moves the single-precision value encoded in IEEE 754-2008 standard encoding
from the lower 32 bits of integer register rs1 to the floating-point register rd.
The bits are not modified in the transfer, and in particular, the payloads of
non-canonical NaNs are preserved.
[ fmv . w . x rd rs1 ] FMV . W . X moves the single - precision value encoded in IEEE 754 - 2008 standard encoding from the lower 32 bits of integer register rs1 to the floating - point register rd . The bits are not modified in the transfer and in particular the payloads of non - canonical NaNs are preserved .
fn fmv_w_x(cpu: &mut Cpu, _addr: u64, word: u32) -> Result<(), Trap> {
    let o = parse_type_r(word);
    cpu.f[o.rd as usize] = f64::from_bits(cpu.x[o.rs1 as usize] as u32 as u64);
    Ok(())
}
fn fmv_w_x ( cpu : & mut Cpu , _addr : u64 , word : u32 ) -> Result < ( ) , Trap > { let o = parse_type_r ( word ) ; cpu . f [ o . rd as usize ] = f64 :: from_bits ( cpu . x [ o . rs1 as usize ] as u32 as u64 ) ; Ok ( ( ) ) }
[fmv.w.x rd,rs1]
FMV.W.X moves the single-precision value encoded in IEEE 754-2008 standard encoding
from the lower 32 bits of integer register rs1 to the floating-point register rd.
[ fmv . w . x rd rs1 ] FMV . W . X moves the single - precision value encoded in IEEE 754 - 2008 standard encoding from the lower 32 bits of integer register rs1 to the floating - point register rd .
cpu
&mut Cpu
_addr
u64
word
u32