fn ld_v0_to_vx_into_i(&mut self, reg: u8)
	{
		let mut addr = self.i;

		for i in 0..reg+1
		{
			self.ram.sb(addr, self.v[i as usize]);
			addr = addr + 1;
		}
	}
/// Store registers V0 through Vreg in memory starting at location I.
/// The interpreter copies the values of registers V0 through Vreg into memory, starting at the address in I.
Store registers V0 through Vreg in memory starting at location I.
The interpreter copies the values of registers V0 through Vreg into memory, starting at the address in I.
Store registers V0 through Vreg in memory starting at location I . The interpreter copies the values of registers V0 through Vreg into memory starting at the address in I .
fn ld_v0_to_vx_into_i(&mut self, reg: u8)
	{
		let mut addr = self.i;
		for i in 0..reg+1
		{
			self.ram.sb(addr, self.v[i as usize]);
			addr = addr + 1;
		}
	}
fn ld_v0_to_vx_into_i ( & mut self , reg : u8 ) { let mut addr = self . i ; for i in 0 .. reg + 1 { self . ram . sb ( addr , self . v [ i as usize ] ) ; addr = addr + 1 ; } }
Store registers V0 through Vreg in memory starting at location I.
Store registers V0 through Vreg in memory starting at location I .
&mut self
reg
u8