fn read(&mut self, addr: u64) -> u32 {
        let e_addr = addr & 0x3f_fffc;
        if e_addr < PLIC_PENDING_BASE {
            let idx = e_addr >> 2;
            if idx < PLIC_INT_MAX as u64 {
                return self.priority[idx as usize];
            } else {
                panic!("Read to reserved area: {:x}", addr);
            }
        }
        if e_addr < PLIC_MENABLE_BASE {
            match e_addr {
                0x1000 => return self.pending,
                _ => panic!("Read to reserved area: {:x}", addr),
            }
        } else if e_addr < PLIC_MTHRESHOLD_BASE {
            if e_addr & 0x80 == 0 {
                if e_addr <= PLIC_MENABLE_BASE + 0x100 * PLIC_CORE_MAX as u64 {
                    let idx = ((e_addr - PLIC_MENABLE_BASE) / 0x100) as usize;
                    return self.menable[idx];
                } else {
                    panic!("Write to reserved area: {:x}", addr);
                }
            } else {
                if e_addr <= PLIC_SENABLE_BASE + 0x100 * PLIC_CORE_MAX as u64 {
                    let idx = ((e_addr - PLIC_SENABLE_BASE) / 0x100) as usize;
                    return self.senable[idx];
                } else {
                    panic!("Write to reserved area: {:x}", addr);
                }
            }
        } else {
            if e_addr & 0x1000 == 0 {
                if e_addr & 0x4 == 0 {
                    if e_addr <= PLIC_MTHRESHOLD_BASE + 0x2000 * PLIC_CORE_MAX as u64 {
                        let idx = ((e_addr - PLIC_MTHRESHOLD_BASE) / 0x2000) as usize;
                        return self.mthreshold[idx];
                    } else {
                        panic!("Write to reserved area: {:x}", addr);
                    }
                } else {
                    if e_addr <= PLIC_MCLAIM_BASE + 0x2000 * PLIC_CORE_MAX as u64 {
                        let idx = ((e_addr - PLIC_MCLAIM_BASE) / 0x2000) as usize;
                        return self.mclaim[idx];
                    } else {
                        panic!("Write to reserved area: {:x}", addr);
                    }
                }
            } else {
                if e_addr & 0x4 == 0 {
                    if e_addr <= PLIC_STHRESHOLD_BASE + 0x2000 * PLIC_CORE_MAX as u64 {
                        let idx = ((e_addr - PLIC_STHRESHOLD_BASE) / 0x2000) as usize;
                        return self.sthreshold[idx];
                    } else {
                        panic!("Write to reserved area: {:x}", addr);
                    }
                } else {
                    if e_addr <= PLIC_SCLAIM_BASE + 0x2000 * PLIC_CORE_MAX as u64 {
                        let idx = ((e_addr - PLIC_SCLAIM_BASE) / 0x2000) as usize;
                        return self.sclaim[idx];
                    } else {
                        panic!("Read to reserved area: {:x}", addr);
                    }
                }
            }
        }
    }
/// The PLIC memory map has been designed to only require naturally
/// aligned 32-bit memory accesses.
The PLIC memory map has been designed to only require naturally
aligned 32-bit memory accesses.
The PLIC memory map has been designed to only require naturally aligned 32 - bit memory accesses .
fn read(&mut self, addr: u64) -> u32 {
        let e_addr = addr & 0x3f_fffc;
        if e_addr < PLIC_PENDING_BASE {
            let idx = e_addr >> 2;
            if idx < PLIC_INT_MAX as u64 {
                return self.priority[idx as usize];
            } else {
                panic!("Read to reserved area: {:x}", addr);
            }
        }
        if e_addr < PLIC_MENABLE_BASE {
            match e_addr {
                0x1000 => return self.pending,
                _ => panic!("Read to reserved area: {:x}", addr),
            }
        } else if e_addr < PLIC_MTHRESHOLD_BASE {
            if e_addr & 0x80 == 0 {
                if e_addr <= PLIC_MENABLE_BASE + 0x100 * PLIC_CORE_MAX as u64 {
                    let idx = ((e_addr - PLIC_MENABLE_BASE) / 0x100) as usize;
                    return self.menable[idx];
                } else {
                    panic!("Write to reserved area: {:x}", addr);
                }
            } else {
                if e_addr <= PLIC_SENABLE_BASE + 0x100 * PLIC_CORE_MAX as u64 {
                    let idx = ((e_addr - PLIC_SENABLE_BASE) / 0x100) as usize;
                    return self.senable[idx];
                } else {
                    panic!("Write to reserved area: {:x}", addr);
                }
            }
        } else {
            if e_addr & 0x1000 == 0 {
                if e_addr & 0x4 == 0 {
                    if e_addr <= PLIC_MTHRESHOLD_BASE + 0x2000 * PLIC_CORE_MAX as u64 {
                        let idx = ((e_addr - PLIC_MTHRESHOLD_BASE) / 0x2000) as usize;
                        return self.mthreshold[idx];
                    } else {
                        panic!("Write to reserved area: {:x}", addr);
                    }
                } else {
                    if e_addr <= PLIC_MCLAIM_BASE + 0x2000 * PLIC_CORE_MAX as u64 {
                        let idx = ((e_addr - PLIC_MCLAIM_BASE) / 0x2000) as usize;
                        return self.mclaim[idx];
                    } else {
                        panic!("Write to reserved area: {:x}", addr);
                    }
                }
            } else {
                if e_addr & 0x4 == 0 {
                    if e_addr <= PLIC_STHRESHOLD_BASE + 0x2000 * PLIC_CORE_MAX as u64 {
                        let idx = ((e_addr - PLIC_STHRESHOLD_BASE) / 0x2000) as usize;
                        return self.sthreshold[idx];
                    } else {
                        panic!("Write to reserved area: {:x}", addr);
                    }
                } else {
                    if e_addr <= PLIC_SCLAIM_BASE + 0x2000 * PLIC_CORE_MAX as u64 {
                        let idx = ((e_addr - PLIC_SCLAIM_BASE) / 0x2000) as usize;
                        return self.sclaim[idx];
                    } else {
                        panic!("Read to reserved area: {:x}", addr);
                    }
                }
            }
        }
    }
fn read ( & mut self , addr : u64 ) -> u32 { let e_addr = addr & 0x3f_fffc ; if e_addr < PLIC_PENDING_BASE { let idx = e_addr >> 2 ; if idx < PLIC_INT_MAX as u64 { return self . priority [ idx as usize ] ; } else { panic ! ( " " addr ) ; } } if e_addr < PLIC_MENABLE_BASE { match e_addr { 0x1000 => return self . pending , _ => panic ! ( " " addr ) , } } else if e_addr < PLIC_MTHRESHOLD_BASE { if e_addr & 0x80 == 0 { if e_addr <= PLIC_MENABLE_BASE + 0x100 * PLIC_CORE_MAX as u64 { let idx = ( ( e_addr - PLIC_MENABLE_BASE ) / 0x100 ) as usize ; return self . menable [ idx ] ; } else { panic ! ( " " addr ) ; } } else { if e_addr <= PLIC_SENABLE_BASE + 0x100 * PLIC_CORE_MAX as u64 { let idx = ( ( e_addr - PLIC_SENABLE_BASE ) / 0x100 ) as usize ; return self . senable [ idx ] ; } else { panic ! ( " " addr ) ; } } } else { if e_addr & 0x1000 == 0 { if e_addr & 0x4 == 0 { if e_addr <= PLIC_MTHRESHOLD_BASE + 0x2000 * PLIC_CORE_MAX as u64 { let idx = ( ( e_addr - PLIC_MTHRESHOLD_BASE ) / 0x2000 ) as usize ; return self . mthreshold [ idx ] ; } else { panic ! ( " " addr ) ; } } else { if e_addr <= PLIC_MCLAIM_BASE + 0x2000 * PLIC_CORE_MAX as u64 { let idx = ( ( e_addr - PLIC_MCLAIM_BASE ) / 0x2000 ) as usize ; return self . mclaim [ idx ] ; } else { panic ! ( " " addr ) ; } } } else { if e_addr & 0x4 == 0 { if e_addr <= PLIC_STHRESHOLD_BASE + 0x2000 * PLIC_CORE_MAX as u64 { let idx = ( ( e_addr - PLIC_STHRESHOLD_BASE ) / 0x2000 ) as usize ; return self . sthreshold [ idx ] ; } else { panic ! ( " " addr ) ; } } else { if e_addr <= PLIC_SCLAIM_BASE + 0x2000 * PLIC_CORE_MAX as u64 { let idx = ( ( e_addr - PLIC_SCLAIM_BASE ) / 0x2000 ) as usize ; return self . sclaim [ idx ] ; } else { panic ! ( " " addr ) ; } } } } }
The PLIC memory map has been designed to only require naturally
aligned 32-bit memory accesses.
The PLIC memory map has been designed to only require naturally aligned 32 - bit memory accesses .
&mut self
addr
u64