fn update(&self) {
        unsafe {
            asm!(
                "mov cr3, {page_table}",
                page_table = in(reg) self.page_table
            )
        }
    }
/// in PAE paging mode, the PDPTE registers are reloaded on mov to cr3.
/// See *Intel Developer Manual Vol. 3A 4-13*
in PAE paging mode, the PDPTE registers are reloaded on mov to cr3.
See *Intel Developer Manual Vol.
in PAE paging mode the PDPTE registers are reloaded on mov to cr3 . See * Intel Developer Manual Vol .
fn update(&self) {
        unsafe {
            asm!(
                "mov cr3, {page_table}",
                page_table = in(reg) self.page_table
            )
        }
    }
fn update ( & self ) { unsafe { asm ! ( " " page_table in ( reg ) self page_table ) } }
in PAE paging mode, the PDPTE registers are reloaded on mov to cr3.
in PAE paging mode the PDPTE registers are reloaded on mov to cr3 .
&self