fn remap_the_kernel(dtb: usize) {
    let offset = -(KERNEL_OFFSET as isize - MEMORY_OFFSET as isize);
    let mut ms = MemorySet::new_bare();
    ms.push(stext as usize, etext as usize, MemoryAttr::default().execute().readonly(), Linear::new(offset), "text");
    ms.push(sdata as usize, edata as usize, MemoryAttr::default(), Linear::new(offset), "data");
    ms.push(srodata as usize, erodata as usize, MemoryAttr::default().readonly(), Linear::new(offset), "rodata");
    ms.push(bootstack as usize, bootstacktop as usize, MemoryAttr::default(), Linear::new(offset), "stack");
    ms.push(sbss as usize, ebss as usize, MemoryAttr::default(), Linear::new(offset), "bss");
    ms.push(dtb, dtb + super::consts::MAX_DTB_SIZE, MemoryAttr::default().readonly(), Linear::new(offset), "dts");
    // map PLIC for HiFiveU
    let offset = -(KERNEL_OFFSET as isize);
    ms.push(KERNEL_OFFSET + 0x0C00_2000, KERNEL_OFFSET + 0x0C00_2000 + PAGE_SIZE, MemoryAttr::default(), Linear::new(offset), "plic0");
    ms.push(KERNEL_OFFSET + 0x0C20_2000, KERNEL_OFFSET + 0x0C20_2000 + PAGE_SIZE, MemoryAttr::default(), Linear::new(offset), "plic1");
    unsafe { ms.activate(); }
    unsafe { SATP = ms.token(); }
    mem::forget(ms);
    info!("remap kernel end");
}
/// Remap the kernel memory address with 4K page recorded in p1 page table
Remap the kernel memory address with 4K page recorded in p1 page table
Remap the kernel memory address with 4K page recorded in p1 page table
fn remap_the_kernel(dtb: usize) {
    let offset = -(KERNEL_OFFSET as isize - MEMORY_OFFSET as isize);
    let mut ms = MemorySet::new_bare();
    ms.push(stext as usize, etext as usize, MemoryAttr::default().execute().readonly(), Linear::new(offset), "text");
    ms.push(sdata as usize, edata as usize, MemoryAttr::default(), Linear::new(offset), "data");
    ms.push(srodata as usize, erodata as usize, MemoryAttr::default().readonly(), Linear::new(offset), "rodata");
    ms.push(bootstack as usize, bootstacktop as usize, MemoryAttr::default(), Linear::new(offset), "stack");
    ms.push(sbss as usize, ebss as usize, MemoryAttr::default(), Linear::new(offset), "bss");
    ms.push(dtb, dtb + super::consts::MAX_DTB_SIZE, MemoryAttr::default().readonly(), Linear::new(offset), "dts");
    // map PLIC for HiFiveU
    let offset = -(KERNEL_OFFSET as isize);
    ms.push(KERNEL_OFFSET + 0x0C00_2000, KERNEL_OFFSET + 0x0C00_2000 + PAGE_SIZE, MemoryAttr::default(), Linear::new(offset), "plic0");
    ms.push(KERNEL_OFFSET + 0x0C20_2000, KERNEL_OFFSET + 0x0C20_2000 + PAGE_SIZE, MemoryAttr::default(), Linear::new(offset), "plic1");
    unsafe { ms.activate(); }
    unsafe { SATP = ms.token(); }
    mem::forget(ms);
    info!("remap kernel end");
}
fn remap_the_kernel ( dtb : usize ) { let offset = - ( KERNEL_OFFSET as isize - MEMORY_OFFSET as isize ) ; let mut ms = MemorySet :: new_bare ( ) ; ms . push ( stext as usize , etext as usize , MemoryAttr :: default ( ) . execute ( ) . readonly ( ) , Linear :: new ( offset ) , " " ) ; ms . push ( sdata as usize , edata as usize , MemoryAttr :: default ( ) , Linear :: new ( offset ) , " " ) ; ms . push ( srodata as usize , erodata as usize , MemoryAttr :: default ( ) . readonly ( ) , Linear :: new ( offset ) , " " ) ; ms . push ( bootstack as usize , bootstacktop as usize , MemoryAttr :: default ( ) , Linear :: new ( offset ) , " " ) ; ms . push ( sbss as usize , ebss as usize , MemoryAttr :: default ( ) , Linear :: new ( offset ) , " " ) ; ms . push ( dtb , dtb + super :: consts :: MAX_DTB_SIZE , MemoryAttr :: default ( ) . readonly ( ) , Linear :: new ( offset ) , " " ) ; // map PLIC for HiFiveU let offset = - ( KERNEL_OFFSET as isize ) ; ms . push ( KERNEL_OFFSET + 0x0C00_2000 , KERNEL_OFFSET + 0x0C00_2000 + PAGE_SIZE , MemoryAttr :: default ( ) , Linear :: new ( offset ) , " " ) ; ms . push ( KERNEL_OFFSET + 0x0C20_2000 , KERNEL_OFFSET + 0x0C20_2000 + PAGE_SIZE , MemoryAttr :: default ( ) , Linear :: new ( offset ) , " " ) ; unsafe { ms . activate ( ) ; } unsafe { SATP = ms . token ( ) ; } mem :: forget ( ms ) ; info ! ( " " ) ; }
Remap the kernel memory address with 4K page recorded in p1 page table
Remap the kernel memory address with 4K page recorded in p1 page table
dtb
usize
dtb
usize