pub fn unpend(&mut self, exti: &mut EXTI, event: Event) {
        // See the note in listen() about EXTI
        // unsafe: Only we can do anything with these bits
        let rcc = unsafe { &*RCC::ptr() };

        match event {
            Event::LseCss => {
                rcc.cicr.write(|w| w.lsecssc().clear());
                exti.unpend(ExtiEvent::RTC_OTHER);
            }
            Event::AlarmA => {
                self.reg.isr.modify(|_, w| w.alraf().clear_bit());
                exti.unpend(ExtiEvent::RTC_ALARM);
            }
            Event::AlarmB => {
                self.reg.isr.modify(|_, w| w.alrbf().clear_bit());
                exti.unpend(ExtiEvent::RTC_ALARM);
            }
            Event::Wakeup => {
                self.reg.isr.modify(|_, w| w.wutf().clear_bit());
                exti.unpend(ExtiEvent::RTC_WAKEUP);
            }
            Event::Timestamp => {
                self.reg.isr.modify(|_, w| w.tsf().clear_bit());
                exti.unpend(ExtiEvent::RTC_OTHER);
            }
        }
    }
/// Clears the interrupt flag for `event`
Clears the interrupt flag for `event`
Clears the interrupt flag for ` event `
pub fn unpend(&mut self, exti: &mut EXTI, event: Event) {
        // See the note in listen() about EXTI
        // unsafe: Only we can do anything with these bits
        let rcc = unsafe { &*RCC::ptr() };
        match event {
            Event::LseCss => {
                rcc.cicr.write(|w| w.lsecssc().clear());
                exti.unpend(ExtiEvent::RTC_OTHER);
            }
            Event::AlarmA => {
                self.reg.isr.modify(|_, w| w.alraf().clear_bit());
                exti.unpend(ExtiEvent::RTC_ALARM);
            }
            Event::AlarmB => {
                self.reg.isr.modify(|_, w| w.alrbf().clear_bit());
                exti.unpend(ExtiEvent::RTC_ALARM);
            }
            Event::Wakeup => {
                self.reg.isr.modify(|_, w| w.wutf().clear_bit());
                exti.unpend(ExtiEvent::RTC_WAKEUP);
            }
            Event::Timestamp => {
                self.reg.isr.modify(|_, w| w.tsf().clear_bit());
                exti.unpend(ExtiEvent::RTC_OTHER);
            }
        }
    }
pub fn unpend ( & mut self , exti : & mut EXTI , event : Event ) { // See the note in listen() about EXTI // unsafe: Only we can do anything with these bits let rcc = unsafe { & * RCC :: ptr ( ) } ; match event { Event :: LseCss => { rcc . cicr . write ( | w | w . lsecssc ( ) . clear ( ) ) ; exti . unpend ( ExtiEvent :: RTC_OTHER ) ; } Event :: AlarmA => { self . reg . isr . modify ( | _ , w | w . alraf ( ) . clear_bit ( ) ) ; exti . unpend ( ExtiEvent :: RTC_ALARM ) ; } Event :: AlarmB => { self . reg . isr . modify ( | _ , w | w . alrbf ( ) . clear_bit ( ) ) ; exti . unpend ( ExtiEvent :: RTC_ALARM ) ; } Event :: Wakeup => { self . reg . isr . modify ( | _ , w | w . wutf ( ) . clear_bit ( ) ) ; exti . unpend ( ExtiEvent :: RTC_WAKEUP ) ; } Event :: Timestamp => { self . reg . isr . modify ( | _ , w | w . tsf ( ) . clear_bit ( ) ) ; exti . unpend ( ExtiEvent :: RTC_OTHER ) ; } } }
Clears the interrupt flag for `event`
Clears the interrupt flag for ` event `
&mut self
exti
&mut EXTI
event
Event
&mut self
exti
&mut EXTI
event
Event