pub fn width(&self) -> Option<u8> {
        match self {
            Operand::Register(reg) => {
                Some(reg.width())
            }
            Operand::RegisterMaskMerge(reg, _, _) => {
                Some(reg.width())
            }
            Operand::ImmediateI8(_) |
            Operand::ImmediateU8(_) => {
                Some(1)
            }
            Operand::ImmediateI16(_) |
            Operand::ImmediateU16(_) => {
                Some(2)
            }
            Operand::ImmediateI32(_) |
            Operand::ImmediateU32(_) => {
                Some(4)
            }
            // memory operands or `Nothing`
            _ => {
                None
            }
        }
    }
/// return the width of this operand, in bytes. register widths are determined by the
/// register's class. the widths of memory operands are recorded on the instruction this
/// `Operand` came from; `None` here means the authoritative width is `instr.mem_size()`.
return the width of this operand, in bytes. register widths are determined by the
register's class.
return the width of this operand in bytes . register widths are determined by the register ' s class .
pub fn width(&self) -> Option<u8> {
        match self {
            Operand::Register(reg) => {
                Some(reg.width())
            }
            Operand::RegisterMaskMerge(reg, _, _) => {
                Some(reg.width())
            }
            Operand::ImmediateI8(_) |
            Operand::ImmediateU8(_) => {
                Some(1)
            }
            Operand::ImmediateI16(_) |
            Operand::ImmediateU16(_) => {
                Some(2)
            }
            Operand::ImmediateI32(_) |
            Operand::ImmediateU32(_) => {
                Some(4)
            }
            // memory operands or `Nothing`
            _ => {
                None
            }
        }
    }
pub fn width ( & self ) -> Option < u8 > { match self { Operand :: Register ( reg ) => { Some ( reg . width ( ) ) } Operand :: RegisterMaskMerge ( reg , _ , _ ) => { Some ( reg . width ( ) ) } Operand :: ImmediateI8 ( _ ) | Operand :: ImmediateU8 ( _ ) => { Some ( 1 ) } Operand :: ImmediateI16 ( _ ) | Operand :: ImmediateU16 ( _ ) => { Some ( 2 ) } Operand :: ImmediateI32 ( _ ) | Operand :: ImmediateU32 ( _ ) => { Some ( 4 ) } // memory operands or `Nothing` _ => { None } } }
return the width of this operand, in bytes.
return the width of this operand in bytes .
&self
&self