pub fn step(&mut self) -> u8 {
        // Run the CPU for one opcode and get its cycle duration for the PPU
        let cpu_duration = self.cpu.cycle();

        // Run the PPU for one cycle getting any updated interrupt flags back
        let int_flags = self.get_mmu().read8(0xFF0F);
        let ppu_int_flags = self.get_ppu().cycle(cpu_duration);
        self.get_mmu().write8(0xFF0F, int_flags | ppu_int_flags);

        self.debug.program_counter = self.cpu.registers.pc;

        if self.trace_count > 0 {
            self.trace_count -= 1;
            trace!(
                "A: {:02X} F: {:02X} B: {:02X} C: {:02X} D: {:02X} E: {:02X} H: {:02X} L: {:02X} SP: {:04X} PC: 00:{:04X}",
                self.cpu.registers.a,
                self.cpu.registers.f.bits(),
                self.cpu.registers.b,
                self.cpu.registers.c,
                self.cpu.registers.d,
                self.cpu.registers.e,
                self.cpu.registers.h,
                self.cpu.registers.l,
                self.cpu.registers.sp,
                self.cpu.registers.pc,
            );
        }

        cpu_duration
    }
// Let the CPU fetch, decode, and execute an opcode and update the PPU
Let the CPU fetch, decode, and execute an opcode and update the PPU
Let the CPU fetch decode and execute an opcode and update the PPU
pub fn step(&mut self) -> u8 {
        // Run the CPU for one opcode and get its cycle duration for the PPU
        let cpu_duration = self.cpu.cycle();
        // Run the PPU for one cycle getting any updated interrupt flags back
        let int_flags = self.get_mmu().read8(0xFF0F);
        let ppu_int_flags = self.get_ppu().cycle(cpu_duration);
        self.get_mmu().write8(0xFF0F, int_flags | ppu_int_flags);
        self.debug.program_counter = self.cpu.registers.pc;
        if self.trace_count > 0 {
            self.trace_count -= 1;
            trace!(
                "A: {:02X} F: {:02X} B: {:02X} C: {:02X} D: {:02X} E: {:02X} H: {:02X} L: {:02X} SP: {:04X} PC: 00:{:04X}",
                self.cpu.registers.a,
                self.cpu.registers.f.bits(),
                self.cpu.registers.b,
                self.cpu.registers.c,
                self.cpu.registers.d,
                self.cpu.registers.e,
                self.cpu.registers.h,
                self.cpu.registers.l,
                self.cpu.registers.sp,
                self.cpu.registers.pc,
            );
        }
        cpu_duration
    }
pub fn step ( & mut self ) -> u8 { // Run the CPU for one opcode and get its cycle duration for the PPU let cpu_duration = self . cpu . cycle ( ) ; // Run the PPU for one cycle getting any updated interrupt flags back let int_flags = self . get_mmu ( ) . read8 ( 0xFF0F ) ; let ppu_int_flags = self . get_ppu ( ) . cycle ( cpu_duration ) ; self . get_mmu ( ) . write8 ( 0xFF0F , int_flags | ppu_int_flags ) ; self . debug . program_counter = self . cpu . registers . pc ; if self . trace_count > 0 { self . trace_count -= 1 ; trace ! ( " " self cpu registers a self cpu registers f bits ( ) self cpu registers b self cpu registers c self cpu registers d self cpu registers e self cpu registers h self cpu registers l self cpu registers sp self cpu registers pc ) ; } cpu_duration }
Let the CPU fetch, decode, and execute an opcode and update the PPU
Let the CPU fetch decode and execute an opcode and update the PPU
&mut self
&mut self