pub(crate) fn and(ty: Type, from: RegMem, to: Writable<Reg>) -> Inst {
        match ty {
            types::F32X4 => Inst::xmm_rm_r(SseOpcode::Andps, from, to),
            types::F64X2 => Inst::xmm_rm_r(SseOpcode::Andpd, from, to),
            _ if ty.is_vector() && ty.bits() == 128 => Inst::xmm_rm_r(SseOpcode::Pand, from, to),
            _ => unimplemented!("unimplemented type for Inst::and: {}", ty),
        }
    }
/// Choose which instruction to use for computing a bitwise AND on two values.
Choose which instruction to use for computing a bitwise AND on two values.
Choose which instruction to use for computing a bitwise AND on two values .
pub(crate) fn and(ty: Type, from: RegMem, to: Writable<Reg>) -> Inst {
        match ty {
            types::F32X4 => Inst::xmm_rm_r(SseOpcode::Andps, from, to),
            types::F64X2 => Inst::xmm_rm_r(SseOpcode::Andpd, from, to),
            _ if ty.is_vector() && ty.bits() == 128 => Inst::xmm_rm_r(SseOpcode::Pand, from, to),
            _ => unimplemented!("unimplemented type for Inst::and: {}", ty),
        }
    }
pub ( crate ) fn and ( ty : Type , from : RegMem , to : Writable < Reg > ) -> Inst { match ty { types :: F32X4 => Inst :: xmm_rm_r ( SseOpcode :: Andps , from , to ) , types :: F64X2 => Inst :: xmm_rm_r ( SseOpcode :: Andpd , from , to ) , _ if ty . is_vector ( ) && ty . bits ( ) == 128 => Inst :: xmm_rm_r ( SseOpcode :: Pand , from , to ) , _ => unimplemented ! ( " " ty ) , } }
Choose which instruction to use for computing a bitwise AND on two values.
Choose which instruction to use for computing a bitwise AND on two values .
ty
Type
from
RegMem
to
Writable<Reg>
ty
Type
from
RegMem
to
Writable<Reg>