pub fn add_sp_d8(cpu: &mut CPU) -> u8 {
    // Read 8-bit value
    let unsigned_value = cpu.fetch8();
    let signed_value = unsigned_value as i8;

    let original_sp = cpu.registers.sp;

    cpu.registers.sp = original_sp.wrapping_add(signed_value as u16);

    cpu.registers.f.set(Flags::ZERO, false);
    cpu.registers.f.set(Flags::SUBTRACT, false);
    cpu.registers.f.set(
        Flags::HALF_CARRY,
        ((original_sp & 0x0F) + (unsigned_value as u16 & 0x0F)) > 0x0F,
    );
    cpu.registers.f.set(
        Flags::CARRY,
        ((original_sp & 0xFF) + (unsigned_value as u16 & 0xFF)) > 0xFF,
    );

    16
}
/// ADD 8-bit value with register SP, storing the result in HL.
///
/// Takes 16 cycles.
///
/// # Examples
///
/// ```asm
/// ADD SP, $DA ; SP <- SP + 0xDA
/// ```
ADD 8-bit value with register SP, storing the result in HL.
Takes 16 cycles.
ADD 8 - bit value with register SP storing the result in HL . Takes 16 cycles .
pub fn add_sp_d8(cpu: &mut CPU) -> u8 {
    // Read 8-bit value
    let unsigned_value = cpu.fetch8();
    let signed_value = unsigned_value as i8;
    let original_sp = cpu.registers.sp;
    cpu.registers.sp = original_sp.wrapping_add(signed_value as u16);
    cpu.registers.f.set(Flags::ZERO, false);
    cpu.registers.f.set(Flags::SUBTRACT, false);
    cpu.registers.f.set(
        Flags::HALF_CARRY,
        ((original_sp & 0x0F) + (unsigned_value as u16 & 0x0F)) > 0x0F,
    );
    cpu.registers.f.set(
        Flags::CARRY,
        ((original_sp & 0xFF) + (unsigned_value as u16 & 0xFF)) > 0xFF,
    );
    16
}
pub fn add_sp_d8 ( cpu : & mut CPU ) -> u8 { // Read 8-bit value let unsigned_value = cpu . fetch8 ( ) ; let signed_value = unsigned_value as i8 ; let original_sp = cpu . registers . sp ; cpu . registers . sp = original_sp . wrapping_add ( signed_value as u16 ) ; cpu . registers . f . set ( Flags :: ZERO , false ) ; cpu . registers . f . set ( Flags :: SUBTRACT , false ) ; cpu . registers . f . set ( Flags :: HALF_CARRY , ( ( original_sp & 0x0F ) + ( unsigned_value as u16 & 0x0F ) ) > 0x0F , ) ; cpu . registers . f . set ( Flags :: CARRY , ( ( original_sp & 0xFF ) + ( unsigned_value as u16 & 0xFF ) ) > 0xFF , ) ; 16 }
ADD 8-bit value with register SP, storing the result in HL.
ADD 8 - bit value with register SP storing the result in HL .
cpu
&mut CPU
cpu
&mut CPU
examples
None