pub fn new(_regs: I, prec: I::Rec) -> Self {
        prec.enable();
        Self(
            Stream0 { _dma: PhantomData },
            Stream1 { _dma: PhantomData },
            Stream2 { _dma: PhantomData },
            Stream3 { _dma: PhantomData },
            Stream4 { _dma: PhantomData },
            Stream5 { _dma: PhantomData },
            Stream6 { _dma: PhantomData },
            Stream7 { _dma: PhantomData },
        )
    }
/// Splits the DMA peripheral into streams.
///
/// This method enables the relevant DMA peripheral in AHB1ENR but does
/// *not* reset the peripheral. Resetting DMA1/2 actually seems to affect
/// the other DMA2/1 if is has transfers are enabled. See
/// <https://github.com/stm32-rs/stm32h7xx-hal/issues/228>
Splits the DMA peripheral into streams.
This method enables the relevant DMA peripheral in AHB1ENR but does
not* reset the peripheral. Resetting DMA1/2 actually seems to affect
the other DMA2/1 if is has transfers are enabled. See
Splits the DMA peripheral into streams . This method enables the relevant DMA peripheral in AHB1ENR but does not * reset the peripheral . Resetting DMA1 / 2 actually seems to affect the other DMA2 / 1 if is has transfers are enabled . See
pub fn new(_regs: I, prec: I::Rec) -> Self {
        prec.enable();
        Self(
            Stream0 { _dma: PhantomData },
            Stream1 { _dma: PhantomData },
            Stream2 { _dma: PhantomData },
            Stream3 { _dma: PhantomData },
            Stream4 { _dma: PhantomData },
            Stream5 { _dma: PhantomData },
            Stream6 { _dma: PhantomData },
            Stream7 { _dma: PhantomData },
        )
    }
pub fn new ( _regs : I , prec : I :: Rec ) -> Self { prec . enable ( ) ; Self ( Stream0 { _dma : PhantomData } , Stream1 { _dma : PhantomData } , Stream2 { _dma : PhantomData } , Stream3 { _dma : PhantomData } , Stream4 { _dma : PhantomData } , Stream5 { _dma : PhantomData } , Stream6 { _dma : PhantomData } , Stream7 { _dma : PhantomData } , ) }
Splits the DMA peripheral into streams.
Splits the DMA peripheral into streams .
_regs
I
prec
I::Rec
_regs
I
prec
I::Rec