fn write_arm_cp_reg(
        &self,
        coproc: u32,
        opc1: u32,
        cr_n: u32,
        cr_m: u32,
        opc2: u32,
        val: u32,
    ) -> Result<(), Error> {
        let opcode = 0xEE00_0000
            | (1 << 4)
            | ((opc1 & 7) << 21)
            | ((cr_n & 15) << 16)
            | ((coproc & 15) << 8)
            | ((opc2 & 7) << 5)
            | (cr_m & 15);
        let arm_code: [u32; 6] = [
            // ldr  r0, [pc, #12]
            0x_e5_9f_00_0c_u32.to_le(),
            // mcr  coproc, opc1, r0, cr_n, cr_m, opc2
            opcode.to_le(),
            // dsb  sy
            0x_f5_7f_f0_4f_u32.to_le(),
            // isb  sy
            0x_f5_7f_f0_6f_u32.to_le(),
            // bx   lr
            0x_e1_2f_ff_1e_u32.to_le(),
            val.to_le(),
        ];
        self.fel_write(self.soc_info.get_scratch_addr(), u32_as_u8(&arm_code))
            .context("could not write ARM code to write to register")?;
        self.fel_execute(self.soc_info.get_scratch_addr())
            .context("could not execute ARM code to write to register")?;
        Ok(())
    }
/// Writes the given value to the given ARM register.
Writes the given value to the given ARM register.
Writes the given value to the given ARM register .
fn write_arm_cp_reg(
        &self,
        coproc: u32,
        opc1: u32,
        cr_n: u32,
        cr_m: u32,
        opc2: u32,
        val: u32,
    ) -> Result<(), Error> {
        let opcode = 0xEE00_0000
            | (1 << 4)
            | ((opc1 & 7) << 21)
            | ((cr_n & 15) << 16)
            | ((coproc & 15) << 8)
            | ((opc2 & 7) << 5)
            | (cr_m & 15);
        let arm_code: [u32; 6] = [
            // ldr  r0, [pc, #12]
            0x_e5_9f_00_0c_u32.to_le(),
            // mcr  coproc, opc1, r0, cr_n, cr_m, opc2
            opcode.to_le(),
            // dsb  sy
            0x_f5_7f_f0_4f_u32.to_le(),
            // isb  sy
            0x_f5_7f_f0_6f_u32.to_le(),
            // bx   lr
            0x_e1_2f_ff_1e_u32.to_le(),
            val.to_le(),
        ];
        self.fel_write(self.soc_info.get_scratch_addr(), u32_as_u8(&arm_code))
            .context("could not write ARM code to write to register")?;
        self.fel_execute(self.soc_info.get_scratch_addr())
            .context("could not execute ARM code to write to register")?;
        Ok(())
    }
fn write_arm_cp_reg ( & self , coproc : u32 , opc1 : u32 , cr_n : u32 , cr_m : u32 , opc2 : u32 , val : u32 , ) -> Result < ( ) , Error > { let opcode = 0xEE00_0000 | ( 1 << 4 ) | ( ( opc1 & 7 ) << 21 ) | ( ( cr_n & 15 ) << 16 ) | ( ( coproc & 15 ) << 8 ) | ( ( opc2 & 7 ) << 5 ) | ( cr_m & 15 ) ; let arm_code : [ u32 ; 6 ] = [ // ldr  r0, [pc, #12] 0x_e5_9f_00_0c_u32 . to_le ( ) , // mcr  coproc, opc1, r0, cr_n, cr_m, opc2 opcode . to_le ( ) , // dsb  sy 0x_f5_7f_f0_4f_u32 . to_le ( ) , // isb  sy 0x_f5_7f_f0_6f_u32 . to_le ( ) , // bx   lr 0x_e1_2f_ff_1e_u32 . to_le ( ) , val . to_le ( ) , ] ; self . fel_write ( self . soc_info . get_scratch_addr ( ) , u32_as_u8 ( & arm_code ) ) . context ( " " ) ? ; self . fel_execute ( self . soc_info . get_scratch_addr ( ) ) . context ( " " ) ? ; Ok ( ( ) ) }
Writes the given value to the given ARM register.
Writes the given value to the given ARM register .
&self
coproc
u32
opc1
u32
cr_n
u32
cr_m
u32
opc2
u32
val
u32
&self
coproc
u32
opc1
u32
cr_n
u32
cr_m
u32
opc2
u32
val
u32