fn inc16(ctx: &mut impl CpuContext, operand: Operand16) {
    // 16 bit inc doesn't set any flags, and all actual operands are always registers, but it does
    // delay by 1 additional M cycle, probably because it has to operate on two bytes.
    let val = operand.read(ctx);
    let res = val.wrapping_add(1);
    trace!("Evaluating INC {} ({} => {})", operand, val, res);
    ctx.yield1m();
    operand.write(ctx, res);
}
/// Implements 16 bit increment instruction.
Implements 16 bit increment instruction.
Implements 16 bit increment instruction .
fn inc16(ctx: &mut impl CpuContext, operand: Operand16) {
    // 16 bit inc doesn't set any flags, and all actual operands are always registers, but it does
    // delay by 1 additional M cycle, probably because it has to operate on two bytes.
    let val = operand.read(ctx);
    let res = val.wrapping_add(1);
    trace!("Evaluating INC {} ({} => {})", operand, val, res);
    ctx.yield1m();
    operand.write(ctx, res);
}
fn inc16 ( ctx : & mut impl CpuContext , operand : Operand16 ) { // 16 bit inc doesn't set any flags, and all actual operands are always registers, but it does // delay by 1 additional M cycle, probably because it has to operate on two bytes. let val = operand . read ( ctx ) ; let res = val . wrapping_add ( 1 ) ; trace ! ( " " operand val res ) ; ctx . yield1m ( ) ; operand . write ( ctx , res ) ; }
Implements 16 bit increment instruction.
Implements 16 bit increment instruction .
ctx
&mut impl CpuContext
operand
Operand16
ctx
&mut impl CpuContext
operand
Operand16