pub fn load_reg_hl_reg_sp_d8(cpu: &mut CPU) -> u8 {
    // TODO - Could combine logic with add_sp_d8
    // Read 8-bit value
    let unsigned_value = cpu.fetch8();
    let signed_value = unsigned_value as i8;

    let combined = cpu.registers.sp.wrapping_add(signed_value as u16);

    cpu.registers.write16(&Reg16::HL, combined);

    cpu.registers.f.set(Flags::ZERO, false);
    cpu.registers.f.set(Flags::SUBTRACT, false);
    cpu.registers.f.set(
        Flags::HALF_CARRY,
        ((cpu.registers.sp & 0x0F) + (unsigned_value as u16 & 0x0F)) > 0x0F,
    );
    cpu.registers.f.set(
        Flags::CARRY,
        ((cpu.registers.sp & 0xFF) + (unsigned_value as u16 & 0xFF)) > 0xFF,
    );

    12
}
/// Load the HL register with the value of the SP register added to an 8-bit value.
///
/// Takes 12 cycles.
///
/// # Examples
///
/// ```asm
/// LD HL, SP+d8 ; HL <- SP + d8
/// ```
Load the HL register with the value of the SP register added to an 8-bit value.
Takes 12 cycles.
Load the HL register with the value of the SP register added to an 8 - bit value . Takes 12 cycles .
pub fn load_reg_hl_reg_sp_d8(cpu: &mut CPU) -> u8 {
    // TODO - Could combine logic with add_sp_d8
    // Read 8-bit value
    let unsigned_value = cpu.fetch8();
    let signed_value = unsigned_value as i8;
    let combined = cpu.registers.sp.wrapping_add(signed_value as u16);
    cpu.registers.write16(&Reg16::HL, combined);
    cpu.registers.f.set(Flags::ZERO, false);
    cpu.registers.f.set(Flags::SUBTRACT, false);
    cpu.registers.f.set(
        Flags::HALF_CARRY,
        ((cpu.registers.sp & 0x0F) + (unsigned_value as u16 & 0x0F)) > 0x0F,
    );
    cpu.registers.f.set(
        Flags::CARRY,
        ((cpu.registers.sp & 0xFF) + (unsigned_value as u16 & 0xFF)) > 0xFF,
    );
    12
}
pub fn load_reg_hl_reg_sp_d8 ( cpu : & mut CPU ) -> u8 { // TODO - Could combine logic with add_sp_d8 // Read 8-bit value let unsigned_value = cpu . fetch8 ( ) ; let signed_value = unsigned_value as i8 ; let combined = cpu . registers . sp . wrapping_add ( signed_value as u16 ) ; cpu . registers . write16 ( & Reg16 :: HL , combined ) ; cpu . registers . f . set ( Flags :: ZERO , false ) ; cpu . registers . f . set ( Flags :: SUBTRACT , false ) ; cpu . registers . f . set ( Flags :: HALF_CARRY , ( ( cpu . registers . sp & 0x0F ) + ( unsigned_value as u16 & 0x0F ) ) > 0x0F , ) ; cpu . registers . f . set ( Flags :: CARRY , ( ( cpu . registers . sp & 0xFF ) + ( unsigned_value as u16 & 0xFF ) ) > 0xFF , ) ; 12 }
Load the HL register with the value of the SP register added to an 8-bit value.
Load the HL register with the value of the SP register added to an 8 - bit value .
cpu
&mut CPU
cpu
&mut CPU
examples
None