fn end_of_interrupt(&mut self, vec: u8) {
        for i in 0..NUM_IOAPIC_PINS {
            let entry = &mut self.reg_entries[i];
            // Clear Remote IRR bit
            if vector(*entry) == vec && trigger_mode(*entry) == 1 {
                set_remote_irr(entry, 0);
            }
        }
    }
// The ioapic must be informed about EOIs in order to deassert interrupts
// already sent.
The ioapic must be informed about EOIs in order to deassert interrupts
already sent.
The ioapic must be informed about EOIs in order to deassert interrupts already sent .
fn end_of_interrupt(&mut self, vec: u8) {
        for i in 0..NUM_IOAPIC_PINS {
            let entry = &mut self.reg_entries[i];
            // Clear Remote IRR bit
            if vector(*entry) == vec && trigger_mode(*entry) == 1 {
                set_remote_irr(entry, 0);
            }
        }
    }
fn end_of_interrupt ( & mut self , vec : u8 ) { for i in 0 .. NUM_IOAPIC_PINS { let entry = & mut self . reg_entries [ i ] ; // Clear Remote IRR bit if vector ( * entry ) == vec && trigger_mode ( * entry ) == 1 { set_remote_irr ( entry , 0 ) ; } } }
The ioapic must be informed about EOIs in order to deassert interrupts
already sent.
The ioapic must be informed about EOIs in order to deassert interrupts already sent .
&mut self
vec
u8
&mut self
vec
u8