fn produces_const(&self) -> bool {
        match self {
            Self::AluRmiR { op, src, dst, .. } => {
                src.to_reg() == Some(dst.to_reg())
                    && (*op == AluRmiROpcode::Xor || *op == AluRmiROpcode::Sub)
            }

            Self::XmmRmR { op, src, dst, .. } => {
                src.to_reg() == Some(dst.to_reg())
                    && (*op == SseOpcode::Xorps
                        || *op == SseOpcode::Xorpd
                        || *op == SseOpcode::Pxor
                        || *op == SseOpcode::Pcmpeqb
                        || *op == SseOpcode::Pcmpeqw
                        || *op == SseOpcode::Pcmpeqd
                        || *op == SseOpcode::Pcmpeqq)
            }

            Self::XmmRmRImm {
                op, src, dst, imm, ..
            } => {
                src.to_reg() == Some(dst.to_reg())
                    && (*op == SseOpcode::Cmppd || *op == SseOpcode::Cmpps)
                    && *imm == FcmpImm::Equal.encode()
            }

            _ => false,
        }
    }
/// In certain cases, instructions of this format can act as a definition of an XMM register,
/// producing a value that is independent of its initial value.
///
/// For example, a vector equality comparison (`cmppd` or `cmpps`) that compares a register to
/// itself will generate all ones as a result, regardless of its value. From the register
/// allocator's point of view, we should (i) record the first register, which is normally a
/// mod, as a def instead; and (ii) not record the second register as a use, because it is the
/// same as the first register (already handled).
In certain cases, instructions of this format can act as a definition of an XMM register,
producing a value that is independent of its initial value.

For example, a vector equality comparison (`cmppd` or `cmpps`) that compares a register to
itself will generate all ones as a result, regardless of its value. From the register
allocator's point of view, we should (i) record the first register, which is normally a
mod, as a def instead; and (ii) not record the second register as a use, because it is the
same as the first register (already handled).
In certain cases instructions of this format can act as a definition of an XMM register producing a value that is independent of its initial value . For example a vector equality comparison ( ` cmppd ` or ` cmpps ` ) that compares a register to itself will generate all ones as a result regardless of its value . From the register allocator ' s point of view we should ( i ) record the first register which is normally a mod as a def instead ; and ( ii ) not record the second register as a use because it is the same as the first register ( already handled ) .
fn produces_const(&self) -> bool {
        match self {
            Self::AluRmiR { op, src, dst, .. } => {
                src.to_reg() == Some(dst.to_reg())
                    && (*op == AluRmiROpcode::Xor || *op == AluRmiROpcode::Sub)
            }
            Self::XmmRmR { op, src, dst, .. } => {
                src.to_reg() == Some(dst.to_reg())
                    && (*op == SseOpcode::Xorps
                        || *op == SseOpcode::Xorpd
                        || *op == SseOpcode::Pxor
                        || *op == SseOpcode::Pcmpeqb
                        || *op == SseOpcode::Pcmpeqw
                        || *op == SseOpcode::Pcmpeqd
                        || *op == SseOpcode::Pcmpeqq)
            }
            Self::XmmRmRImm {
                op, src, dst, imm, ..
            } => {
                src.to_reg() == Some(dst.to_reg())
                    && (*op == SseOpcode::Cmppd || *op == SseOpcode::Cmpps)
                    && *imm == FcmpImm::Equal.encode()
            }
            _ => false,
        }
    }
fn produces_const ( & self ) -> bool { match self { Self :: AluRmiR { op , src , dst , .. } => { src . to_reg ( ) == Some ( dst . to_reg ( ) ) && ( * op == AluRmiROpcode :: Xor || * op == AluRmiROpcode :: Sub ) } Self :: XmmRmR { op , src , dst , .. } => { src . to_reg ( ) == Some ( dst . to_reg ( ) ) && ( * op == SseOpcode :: Xorps || * op == SseOpcode :: Xorpd || * op == SseOpcode :: Pxor || * op == SseOpcode :: Pcmpeqb || * op == SseOpcode :: Pcmpeqw || * op == SseOpcode :: Pcmpeqd || * op == SseOpcode :: Pcmpeqq ) } Self :: XmmRmRImm { op , src , dst , imm , .. } => { src . to_reg ( ) == Some ( dst . to_reg ( ) ) && ( * op == SseOpcode :: Cmppd || * op == SseOpcode :: Cmpps ) && * imm == FcmpImm :: Equal . encode ( ) } _ => false , } }
In certain cases, instructions of this format can act as a definition of an XMM register,
producing a value that is independent of its initial value.
In certain cases instructions of this format can act as a definition of an XMM register producing a value that is independent of its initial value .
&self
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