pub fn _enable(&self, mode: Mode) {
        self.state.map(|state| {
            match *state {
                State::Reset => {
                    unsafe {
                        // Are the USBC clocks enabled at reset?
                        //   10.7.4 says no, but 17.5.3 says yes
                        // Also, "Being in Idle state does not require the USB clocks to
                        //   be activated" (17.6.2)
                        enable_clock(Clock::HSB(HSBClock::USBC));
                        enable_clock(Clock::PBB(PBBClock::USBC));

                        // If we got to this state via disable() instead of chip reset,
                        // the values USBCON.FRZCLK, USBCON.UIMOD, UDCON.LS have *not* been
                        // reset to their default values.

                        if let Mode::Device { speed, .. } = mode {
                            UDCON_LS.write(speed)
                        }

                        USBCON_UIMOD.write(mode); // see registers.rs: maybe wrong bit?
                        USBCON_FRZCLK.write(false);
                        USBCON_USBE.write(true);

                        UDESC.write(&self.descriptors as *const _ as u32);

                        // Device interrupts
                        let udints = // UDINT_SUSP |
                                     // UDINT_SOF |
                                     UDINT_EORST |
                                     UDINT_EORSM |
                                     UDINT_UPRSM;

                        // Clear pending device global interrupts
                        UDINTCLR.write(udints);

                        // Enable device global interrupts
                        UDINTESET.write(udints);

                        debug!("Enabled.");
                    }
                    *state = State::Idle(mode);
                }
                _ => client_err!("Already enabled"),
            }
        });
    }
/// Enable the controller's clocks and interrupt and transition to Idle state
/// (No effect if current state is not Reset)
Enable the controller's clocks and interrupt and transition to Idle state
(No effect if current state is not Reset)
Enable the controller ' s clocks and interrupt and transition to Idle state ( No effect if current state is not Reset )
pub fn _enable(&self, mode: Mode) {
        self.state.map(|state| {
            match *state {
                State::Reset => {
                    unsafe {
                        // Are the USBC clocks enabled at reset?
                        //   10.7.4 says no, but 17.5.3 says yes
                        // Also, "Being in Idle state does not require the USB clocks to
                        //   be activated" (17.6.2)
                        enable_clock(Clock::HSB(HSBClock::USBC));
                        enable_clock(Clock::PBB(PBBClock::USBC));
                        // If we got to this state via disable() instead of chip reset,
                        // the values USBCON.FRZCLK, USBCON.UIMOD, UDCON.LS have *not* been
                        // reset to their default values.
                        if let Mode::Device { speed, .. } = mode {
                            UDCON_LS.write(speed)
                        }
                        USBCON_UIMOD.write(mode); // see registers.rs: maybe wrong bit?
                        USBCON_FRZCLK.write(false);
                        USBCON_USBE.write(true);
                        UDESC.write(&self.descriptors as *const _ as u32);
                        // Device interrupts
                        let udints = // UDINT_SUSP |
                                     // UDINT_SOF |
                                     UDINT_EORST |
                                     UDINT_EORSM |
                                     UDINT_UPRSM;
                        // Clear pending device global interrupts
                        UDINTCLR.write(udints);
                        // Enable device global interrupts
                        UDINTESET.write(udints);
                        debug!("Enabled.");
                    }
                    *state = State::Idle(mode);
                }
                _ => client_err!("Already enabled"),
            }
        });
    }
pub fn _enable ( & self , mode : Mode ) { self . state . map ( | state | { match * state { State :: Reset => { unsafe { // Are the USBC clocks enabled at reset? //   10.7.4 says no, but 17.5.3 says yes // Also, "Being in Idle state does not require the USB clocks to //   be activated" (17.6.2) enable_clock ( Clock :: HSB ( HSBClock :: USBC ) ) ; enable_clock ( Clock :: PBB ( PBBClock :: USBC ) ) ; // If we got to this state via disable() instead of chip reset, // the values USBCON.FRZCLK, USBCON.UIMOD, UDCON.LS have *not* been // reset to their default values. if let Mode :: Device { speed , .. } = mode { UDCON_LS . write ( speed ) } USBCON_UIMOD . write ( mode ) ; // see registers.rs: maybe wrong bit? USBCON_FRZCLK . write ( false ) ; USBCON_USBE . write ( true ) ; UDESC . write ( & self . descriptors as * const _ as u32 ) ; // Device interrupts let udints = // UDINT_SUSP | // UDINT_SOF | UDINT_EORST | UDINT_EORSM | UDINT_UPRSM ; // Clear pending device global interrupts UDINTCLR . write ( udints ) ; // Enable device global interrupts UDINTESET . write ( udints ) ; debug ! ( " " ) ; } * state = State :: Idle ( mode ) ; } _ => client_err ! ( " " ) , } } ) ; }
Enable the controller's clocks and interrupt and transition to Idle state
(No effect if current state is not Reset)
Enable the controller ' s clocks and interrupt and transition to Idle state ( No effect if current state is not Reset )
&self
mode
Mode
&self
mode
Mode