fn execute(self, ctx: &mut impl CpuContext) {
        let arg = self.operand.read(ctx);
        match self.op {
            CBOperation::RotateLeft8 => {
                let res = arg.rotate_left(1);
                ctx.cpustate_mut().regs.flags =
                    Flags::check_zero(res) | Flags::check_carry(res & 1 != 0);
                self.operand.write(ctx, res);
            }
            CBOperation::RotateLeft9 => {
                let (res, flags) = rotate_left9(arg, ctx.cpustate().regs.flags);
                ctx.cpustate_mut().regs.flags = flags;
                self.operand.write(ctx, res);
            }
            CBOperation::RotateRight8 => {
                let res = arg.rotate_right(1);
                ctx.cpustate_mut().regs.flags =
                    Flags::check_zero(res) | Flags::check_carry(res & 0x80 != 0);
                self.operand.write(ctx, res);
            }
            CBOperation::RotateRight9 => {
                let (res, flags) = rotate_right9(arg, ctx.cpustate().regs.flags);
                ctx.cpustate_mut().regs.flags = flags;
                self.operand.write(ctx, res);
            }
            CBOperation::ShiftLeft => {
                let res = arg << 1;
                ctx.cpustate_mut().regs.flags =
                    Flags::check_zero(res) | Flags::check_carry(arg & 0x80 != 0);
                self.operand.write(ctx, res);
            }
            CBOperation::ShiftRightSignExt => {
                let res = ((arg as i8) >> 1) as u8;
                ctx.cpustate_mut().regs.flags =
                    Flags::check_zero(res) | Flags::check_carry(arg & 1 != 0);
                self.operand.write(ctx, res);
            }
            CBOperation::ShiftRight => {
                let res = arg >> 1;
                ctx.cpustate_mut().regs.flags =
                    Flags::check_zero(res) | Flags::check_carry(arg & 1 != 0);
                self.operand.write(ctx, res);
            }
            CBOperation::Swap => {
                let res = ((arg & 0x0f) << 4) | ((arg & 0xf0) >> 4);
                ctx.cpustate_mut().regs.flags = Flags::check_zero(res);
                self.operand.write(ctx, res);
            }
            CBOperation::TestBit(bit) => {
                // Doesn't affect the carry flag.
                const MASK: Flags = Flags::all().difference(Flags::CARRY);
                let flags = Flags::check_zero(arg & (1 << bit)) | Flags::HALFCARRY;
                ctx.cpustate_mut().regs.flags.merge(flags, MASK);
            }
            CBOperation::ResetBit(bit) => self.operand.write(ctx, arg & !(1 << bit)),
            CBOperation::SetBit(bit) => self.operand.write(ctx, arg | (1 << bit)),
        }
    }
/// Execute this opcode on the given context.
Execute this opcode on the given context.
Execute this opcode on the given context .
fn execute(self, ctx: &mut impl CpuContext) {
        let arg = self.operand.read(ctx);
        match self.op {
            CBOperation::RotateLeft8 => {
                let res = arg.rotate_left(1);
                ctx.cpustate_mut().regs.flags =
                    Flags::check_zero(res) | Flags::check_carry(res & 1 != 0);
                self.operand.write(ctx, res);
            }
            CBOperation::RotateLeft9 => {
                let (res, flags) = rotate_left9(arg, ctx.cpustate().regs.flags);
                ctx.cpustate_mut().regs.flags = flags;
                self.operand.write(ctx, res);
            }
            CBOperation::RotateRight8 => {
                let res = arg.rotate_right(1);
                ctx.cpustate_mut().regs.flags =
                    Flags::check_zero(res) | Flags::check_carry(res & 0x80 != 0);
                self.operand.write(ctx, res);
            }
            CBOperation::RotateRight9 => {
                let (res, flags) = rotate_right9(arg, ctx.cpustate().regs.flags);
                ctx.cpustate_mut().regs.flags = flags;
                self.operand.write(ctx, res);
            }
            CBOperation::ShiftLeft => {
                let res = arg << 1;
                ctx.cpustate_mut().regs.flags =
                    Flags::check_zero(res) | Flags::check_carry(arg & 0x80 != 0);
                self.operand.write(ctx, res);
            }
            CBOperation::ShiftRightSignExt => {
                let res = ((arg as i8) >> 1) as u8;
                ctx.cpustate_mut().regs.flags =
                    Flags::check_zero(res) | Flags::check_carry(arg & 1 != 0);
                self.operand.write(ctx, res);
            }
            CBOperation::ShiftRight => {
                let res = arg >> 1;
                ctx.cpustate_mut().regs.flags =
                    Flags::check_zero(res) | Flags::check_carry(arg & 1 != 0);
                self.operand.write(ctx, res);
            }
            CBOperation::Swap => {
                let res = ((arg & 0x0f) << 4) | ((arg & 0xf0) >> 4);
                ctx.cpustate_mut().regs.flags = Flags::check_zero(res);
                self.operand.write(ctx, res);
            }
            CBOperation::TestBit(bit) => {
                // Doesn't affect the carry flag.
                const MASK: Flags = Flags::all().difference(Flags::CARRY);
                let flags = Flags::check_zero(arg & (1 << bit)) | Flags::HALFCARRY;
                ctx.cpustate_mut().regs.flags.merge(flags, MASK);
            }
            CBOperation::ResetBit(bit) => self.operand.write(ctx, arg & !(1 << bit)),
            CBOperation::SetBit(bit) => self.operand.write(ctx, arg | (1 << bit)),
        }
    }
fn execute ( self , ctx : & mut impl CpuContext ) { let arg = self . operand . read ( ctx ) ; match self . op { CBOperation :: RotateLeft8 => { let res = arg . rotate_left ( 1 ) ; ctx . cpustate_mut ( ) . regs . flags = Flags :: check_zero ( res ) | Flags :: check_carry ( res & 1 != 0 ) ; self . operand . write ( ctx , res ) ; } CBOperation :: RotateLeft9 => { let ( res , flags ) = rotate_left9 ( arg , ctx . cpustate ( ) . regs . flags ) ; ctx . cpustate_mut ( ) . regs . flags = flags ; self . operand . write ( ctx , res ) ; } CBOperation :: RotateRight8 => { let res = arg . rotate_right ( 1 ) ; ctx . cpustate_mut ( ) . regs . flags = Flags :: check_zero ( res ) | Flags :: check_carry ( res & 0x80 != 0 ) ; self . operand . write ( ctx , res ) ; } CBOperation :: RotateRight9 => { let ( res , flags ) = rotate_right9 ( arg , ctx . cpustate ( ) . regs . flags ) ; ctx . cpustate_mut ( ) . regs . flags = flags ; self . operand . write ( ctx , res ) ; } CBOperation :: ShiftLeft => { let res = arg << 1 ; ctx . cpustate_mut ( ) . regs . flags = Flags :: check_zero ( res ) | Flags :: check_carry ( arg & 0x80 != 0 ) ; self . operand . write ( ctx , res ) ; } CBOperation :: ShiftRightSignExt => { let res = ( ( arg as i8 ) >> 1 ) as u8 ; ctx . cpustate_mut ( ) . regs . flags = Flags :: check_zero ( res ) | Flags :: check_carry ( arg & 1 != 0 ) ; self . operand . write ( ctx , res ) ; } CBOperation :: ShiftRight => { let res = arg >> 1 ; ctx . cpustate_mut ( ) . regs . flags = Flags :: check_zero ( res ) | Flags :: check_carry ( arg & 1 != 0 ) ; self . operand . write ( ctx , res ) ; } CBOperation :: Swap => { let res = ( ( arg & 0x0f ) << 4 ) | ( ( arg & 0xf0 ) >> 4 ) ; ctx . cpustate_mut ( ) . regs . flags = Flags :: check_zero ( res ) ; self . operand . write ( ctx , res ) ; } CBOperation :: TestBit ( bit ) => { // Doesn't affect the carry flag. const MASK : Flags = Flags :: all ( ) . difference ( Flags :: CARRY ) ; let flags = Flags :: check_zero ( arg & ( 1 << bit ) ) | Flags :: HALFCARRY ; ctx . cpustate_mut ( ) . regs . flags . merge ( flags , MASK ) ; } CBOperation :: ResetBit ( bit ) => self . operand . write ( ctx , arg & ! ( 1 << bit ) ) , CBOperation :: SetBit ( bit ) => self . operand . write ( ctx , arg | ( 1 << bit ) ) , } }
Execute this opcode on the given context.
Execute this opcode on the given context .
self
ctx
&mut impl CpuContext
self
ctx
&mut impl CpuContext