pub(crate) fn rmb<R: RMWable, AM: AddressingMode<Result = R>, S: System>(&mut self, system: &mut S, mask: u8) {
        let mut am = AM::get_operand(system, self);
        let data = am.read_locked(system, self);
        am.read_locked_spurious(system, self);
        let result = data & mask;
        self.check_irq_edge();
        am.write_locked(system, self, result);
    }
// note that unlike the other RMW instructions, RMBx/SMBx have THREE locked
// cycles, not two.
note that unlike the other RMW instructions, RMBx/SMBx have THREE locked
cycles, not two.
note that unlike the other RMW instructions RMBx / SMBx have THREE locked cycles not two .
pub(crate) fn rmb<R: RMWable, AM: AddressingMode<Result = R>, S: System>(&mut self, system: &mut S, mask: u8) {
        let mut am = AM::get_operand(system, self);
        let data = am.read_locked(system, self);
        am.read_locked_spurious(system, self);
        let result = data & mask;
        self.check_irq_edge();
        am.write_locked(system, self, result);
    }
pub ( crate ) fn rmb < R : RMWable , AM : AddressingMode < Result = R > , S : System > ( & mut self , system : & mut S , mask : u8 ) { let mut am = AM :: get_operand ( system , self ) ; let data = am . read_locked ( system , self ) ; am . read_locked_spurious ( system , self ) ; let result = data & mask ; self . check_irq_edge ( ) ; am . write_locked ( system , self , result ) ; }
note that unlike the other RMW instructions, RMBx/SMBx have THREE locked
cycles, not two.
note that unlike the other RMW instructions RMBx / SMBx have THREE locked cycles not two .
&mut self
system
&mut S
mask
u8
&mut self
system
&mut S
mask
u8