pub fn adc(adc: ADC, pm: &mut PM, clocks: &mut GenericClockController) -> Self {
        pm.apbcmask.modify(|_, w| w.adc_().set_bit());

        // set to 1 / (1 / (48000000 / 32) * 6) = 250000 SPS
        let gclk0 = clocks.gclk0();
        clocks.adc(&gclk0).expect("adc clock setup failed");
        while adc.status.read().syncbusy().bit_is_set() {}

        adc.ctrla.modify(|_, w| w.swrst().set_bit());
        while adc.status.read().syncbusy().bit_is_set() {}

        adc.ctrlb.modify(|_, w| {
            w.prescaler().div32();
            w.ressel()._12bit()
        });
        while adc.status.read().syncbusy().bit_is_set() {}

        adc.sampctrl.modify(|_, w| unsafe { w.samplen().bits(5) }); //sample length
        while adc.status.read().syncbusy().bit_is_set() {}

        adc.inputctrl.modify(|_, w| w.muxneg().gnd()); // No negative input (internal gnd)
        while adc.status.read().syncbusy().bit_is_set() {}

        let mut newadc = Self { adc };
        newadc.samples(adc::avgctrl::SAMPLENUM_A::_1);
        newadc.gain(adc::inputctrl::GAIN_A::DIV2);
        newadc.reference(adc::refctrl::REFSEL_A::INTVCC1);

        newadc
    }
/// Create a new `Adc` instance. The default configuration is:
/// * 1/32 prescaler
/// * 12 bit resolution
/// * 1 sample
/// * 1/2 gain
/// * 1/2 VDDANA reference voltage
Create a new `Adc` instance. The default configuration is:
1/32 prescaler
12 bit resolution
1 sample
1/2 gain
1/2 VDDANA reference voltage
Create a new ` Adc ` instance . The default configuration is : 1 / 32 prescaler 12 bit resolution 1 sample 1 / 2 gain 1 / 2 VDDANA reference voltage
pub fn adc(adc: ADC, pm: &mut PM, clocks: &mut GenericClockController) -> Self {
        pm.apbcmask.modify(|_, w| w.adc_().set_bit());
        // set to 1 / (1 / (48000000 / 32) * 6) = 250000 SPS
        let gclk0 = clocks.gclk0();
        clocks.adc(&gclk0).expect("adc clock setup failed");
        while adc.status.read().syncbusy().bit_is_set() {}
        adc.ctrla.modify(|_, w| w.swrst().set_bit());
        while adc.status.read().syncbusy().bit_is_set() {}
        adc.ctrlb.modify(|_, w| {
            w.prescaler().div32();
            w.ressel()._12bit()
        });
        while adc.status.read().syncbusy().bit_is_set() {}
        adc.sampctrl.modify(|_, w| unsafe { w.samplen().bits(5) }); //sample length
        while adc.status.read().syncbusy().bit_is_set() {}
        adc.inputctrl.modify(|_, w| w.muxneg().gnd()); // No negative input (internal gnd)
        while adc.status.read().syncbusy().bit_is_set() {}
        let mut newadc = Self { adc };
        newadc.samples(adc::avgctrl::SAMPLENUM_A::_1);
        newadc.gain(adc::inputctrl::GAIN_A::DIV2);
        newadc.reference(adc::refctrl::REFSEL_A::INTVCC1);
        newadc
    }
pub fn adc ( adc : ADC , pm : & mut PM , clocks : & mut GenericClockController ) -> Self { pm . apbcmask . modify ( | _ , w | w . adc_ ( ) . set_bit ( ) ) ; // set to 1 / (1 / (48000000 / 32) * 6) = 250000 SPS let gclk0 = clocks . gclk0 ( ) ; clocks . adc ( & gclk0 ) . expect ( " " ) ; while adc . status . read ( ) . syncbusy ( ) . bit_is_set ( ) { } adc . ctrla . modify ( | _ , w | w . swrst ( ) . set_bit ( ) ) ; while adc . status . read ( ) . syncbusy ( ) . bit_is_set ( ) { } adc . ctrlb . modify ( | _ , w | { w . prescaler ( ) . div32 ( ) ; w . ressel ( ) . _12bit ( ) } ) ; while adc . status . read ( ) . syncbusy ( ) . bit_is_set ( ) { } adc . sampctrl . modify ( | _ , w | unsafe { w . samplen ( ) . bits ( 5 ) } ) ; //sample length while adc . status . read ( ) . syncbusy ( ) . bit_is_set ( ) { } adc . inputctrl . modify ( | _ , w | w . muxneg ( ) . gnd ( ) ) ; // No negative input (internal gnd) while adc . status . read ( ) . syncbusy ( ) . bit_is_set ( ) { } let mut newadc = Self { adc } ; newadc . samples ( adc :: avgctrl :: SAMPLENUM_A :: _1 ) ; newadc . gain ( adc :: inputctrl :: GAIN_A :: DIV2 ) ; newadc . reference ( adc :: refctrl :: REFSEL_A :: INTVCC1 ) ; newadc }
Create a new `Adc` instance.
Create a new ` Adc ` instance .
adc
ADC
pm
&mut PM
clocks
&mut GenericClockController
adc
ADC
pm
&mut PM
clocks
&mut GenericClockController