pub fn is_ahb_port(address: usize) -> bool {
    // Up to 256kB ITCM can be allocated on RM0468 parts
    let is_itcm: bool = address < 0x0004_0000;
    // 128kB DTCM
    let is_dtcm: bool = (0x2000_0000..0x2002_0000).contains(&address);

    is_itcm || is_dtcm
}
/// Returns true if the MDMA master must access `address` via
/// the 32-bit AHB slave port on the Cortex-M7 crossbar, rather
/// than the AXI matrix.
///
/// This corresponds to the D0TCM, D1TCM and ITCM regions. These
/// regions are not relocatable.
Returns true if the MDMA master must access `address` via
the 32-bit AHB slave port on the Cortex-M7 crossbar, rather
than the AXI matrix.

This corresponds to the D0TCM, D1TCM and ITCM regions. These
regions are not relocatable.
Returns true if the MDMA master must access ` address ` via the 32 - bit AHB slave port on the Cortex - M7 crossbar rather than the AXI matrix . This corresponds to the D0TCM D1TCM and ITCM regions . These regions are not relocatable .
pub fn is_ahb_port(address: usize) -> bool {
    // Up to 256kB ITCM can be allocated on RM0468 parts
    let is_itcm: bool = address < 0x0004_0000;
    // 128kB DTCM
    let is_dtcm: bool = (0x2000_0000..0x2002_0000).contains(&address);
    is_itcm || is_dtcm
}
pub fn is_ahb_port ( address : usize ) -> bool { // Up to 256kB ITCM can be allocated on RM0468 parts let is_itcm : bool = address < 0x0004_0000 ; // 128kB DTCM let is_dtcm : bool = ( 0x2000_0000 .. 0x2002_0000 ) . contains ( & address ) ; is_itcm || is_dtcm }
Returns true if the MDMA master must access `address` via
the 32-bit AHB slave port on the Cortex-M7 crossbar, rather
than the AXI matrix.
Returns true if the MDMA master must access ` address ` via the 32 - bit AHB slave port on the Cortex - M7 crossbar rather than the AXI matrix .
address
usize
address
usize