pub fn allocatable_registers(
    arch: InlineAsmArch,
    has_feature: impl FnMut(&str) -> bool,
    target: &crate::spec::Target,
) -> FxHashMap<InlineAsmRegClass, FxHashSet<InlineAsmReg>> {
    match arch {
        InlineAsmArch::X86 | InlineAsmArch::X86_64 => {
            let mut map = x86::regclass_map();
            x86::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::Arm => {
            let mut map = arm::regclass_map();
            arm::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::AArch64 => {
            let mut map = aarch64::regclass_map();
            aarch64::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => {
            let mut map = riscv::regclass_map();
            riscv::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::Nvptx64 => {
            let mut map = nvptx::regclass_map();
            nvptx::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => {
            let mut map = powerpc::regclass_map();
            powerpc::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::Hexagon => {
            let mut map = hexagon::regclass_map();
            hexagon::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
            let mut map = mips::regclass_map();
            mips::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::SpirV => {
            let mut map = spirv::regclass_map();
            spirv::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::Wasm32 => {
            let mut map = wasm::regclass_map();
            wasm::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::Xtensa => {
            let mut map = xtensa::regclass_map();
            xtensa::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::Bpf => {
            let mut map = bpf::regclass_map();
            bpf::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
    }
}
/// Returns the full set of allocatable registers for a given architecture.
///
/// The registers are structured as a map containing the set of allocatable
/// registers in each register class. A particular register may be allocatable
/// from multiple register classes, in which case it will appear multiple times
/// in the map.
// NOTE: This function isn't used at the moment, but is needed to support
// falling back to an external assembler.
Returns the full set of allocatable registers for a given architecture.
The registers are structured as a map containing the set of allocatable
registers in each register class. A particular register may be allocatable
from multiple register classes, in which case it will appear multiple times
in the map.
NOTE: This function isn't used at the moment, but is needed to support
falling back to an external assembler.
Returns the full set of allocatable registers for a given architecture . The registers are structured as a map containing the set of allocatable registers in each register class . A particular register may be allocatable from multiple register classes in which case it will appear multiple times in the map . NOTE : This function isn ' t used at the moment but is needed to support falling back to an external assembler .
pub fn allocatable_registers(
    arch: InlineAsmArch,
    has_feature: impl FnMut(&str) -> bool,
    target: &crate::spec::Target,
) -> FxHashMap<InlineAsmRegClass, FxHashSet<InlineAsmReg>> {
    match arch {
        InlineAsmArch::X86 | InlineAsmArch::X86_64 => {
            let mut map = x86::regclass_map();
            x86::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::Arm => {
            let mut map = arm::regclass_map();
            arm::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::AArch64 => {
            let mut map = aarch64::regclass_map();
            aarch64::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => {
            let mut map = riscv::regclass_map();
            riscv::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::Nvptx64 => {
            let mut map = nvptx::regclass_map();
            nvptx::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => {
            let mut map = powerpc::regclass_map();
            powerpc::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::Hexagon => {
            let mut map = hexagon::regclass_map();
            hexagon::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
            let mut map = mips::regclass_map();
            mips::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::SpirV => {
            let mut map = spirv::regclass_map();
            spirv::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::Wasm32 => {
            let mut map = wasm::regclass_map();
            wasm::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::Xtensa => {
            let mut map = xtensa::regclass_map();
            xtensa::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
        InlineAsmArch::Bpf => {
            let mut map = bpf::regclass_map();
            bpf::fill_reg_map(arch, has_feature, target, &mut map);
            map
        }
    }
}
pub fn allocatable_registers ( arch : InlineAsmArch , has_feature : impl FnMut ( & str ) -> bool , target : & crate :: spec :: Target , ) -> FxHashMap < InlineAsmRegClass , FxHashSet < InlineAsmReg > > { match arch { InlineAsmArch :: X86 | InlineAsmArch :: X86_64 => { let mut map = x86 :: regclass_map ( ) ; x86 :: fill_reg_map ( arch , has_feature , target , & mut map ) ; map } InlineAsmArch :: Arm => { let mut map = arm :: regclass_map ( ) ; arm :: fill_reg_map ( arch , has_feature , target , & mut map ) ; map } InlineAsmArch :: AArch64 => { let mut map = aarch64 :: regclass_map ( ) ; aarch64 :: fill_reg_map ( arch , has_feature , target , & mut map ) ; map } InlineAsmArch :: RiscV32 | InlineAsmArch :: RiscV64 => { let mut map = riscv :: regclass_map ( ) ; riscv :: fill_reg_map ( arch , has_feature , target , & mut map ) ; map } InlineAsmArch :: Nvptx64 => { let mut map = nvptx :: regclass_map ( ) ; nvptx :: fill_reg_map ( arch , has_feature , target , & mut map ) ; map } InlineAsmArch :: PowerPC | InlineAsmArch :: PowerPC64 => { let mut map = powerpc :: regclass_map ( ) ; powerpc :: fill_reg_map ( arch , has_feature , target , & mut map ) ; map } InlineAsmArch :: Hexagon => { let mut map = hexagon :: regclass_map ( ) ; hexagon :: fill_reg_map ( arch , has_feature , target , & mut map ) ; map } InlineAsmArch :: Mips | InlineAsmArch :: Mips64 => { let mut map = mips :: regclass_map ( ) ; mips :: fill_reg_map ( arch , has_feature , target , & mut map ) ; map } InlineAsmArch :: SpirV => { let mut map = spirv :: regclass_map ( ) ; spirv :: fill_reg_map ( arch , has_feature , target , & mut map ) ; map } InlineAsmArch :: Wasm32 => { let mut map = wasm :: regclass_map ( ) ; wasm :: fill_reg_map ( arch , has_feature , target , & mut map ) ; map } InlineAsmArch :: Xtensa => { let mut map = xtensa :: regclass_map ( ) ; xtensa :: fill_reg_map ( arch , has_feature , target , & mut map ) ; map } InlineAsmArch :: Bpf => { let mut map = bpf :: regclass_map ( ) ; bpf :: fill_reg_map ( arch , has_feature , target , & mut map ) ; map } } }
Returns the full set of allocatable registers for a given architecture.
Returns the full set of allocatable registers for a given architecture .
arch
InlineAsmArch
has_feature
impl FnMut(&str) -> bool
target
&crate::spec::Target
arch
InlineAsmArch
has_feature
impl FnMut(&str) -> bool
target
&crate::spec::Target