ip_xact/vhdl_reg_map_generator.py
def create_addr_vect_decl(self, block, signDict):
		"""
		Create declaration of Address vector constant which is an input to
		Address decoder.
		"""
		signDict["addr_vect"] = LanDeclaration("addr_vect", value = None)
		signDict["addr_vect"].type = "std_logic"
		signDict["addr_vect"].specifier = "constant"
		signDict["addr_vect"].value = self.calc_addr_vect_value(block)

		# LSBs are cut
		addr_vect_size = self.calc_blk_wrd_count(block) * \
							self.calc_wrd_address_width(block)
		signDict["addr_vect"].bitWidth = addr_vect_size

		Create declaration of Address vector constant which is an input to
		Address decoder.
		
Create declaration of Address vector constant which is an input to
Address decoder.
Create declaration of Address vector constant which is an input to Address decoder .
def create_addr_vect_decl(self, block, signDict):
		signDict["addr_vect"] = LanDeclaration("addr_vect", value = None)
		signDict["addr_vect"].type = "std_logic"
		signDict["addr_vect"].specifier = "constant"
		signDict["addr_vect"].value = self.calc_addr_vect_value(block)
		addr_vect_size = self.calc_blk_wrd_count(block) * \
							self.calc_wrd_address_width(block)
		signDict["addr_vect"].bitWidth = addr_vect_size
def create_addr_vect_decl ( self , block , signDict ) : signDict [ "addr_vect" ] = LanDeclaration ( "addr_vect" , value = None ) signDict [ "addr_vect" ] . type = "std_logic" signDict [ "addr_vect" ] . specifier = "constant" signDict [ "addr_vect" ] . value = self . calc_addr_vect_value ( block ) addr_vect_size = self . calc_blk_wrd_count ( block ) * self . calc_wrd_address_width ( block ) signDict [ "addr_vect" ] . bitWidth = addr_vect_size
Create declaration of Address vector constant which is an input to
Address decoder.
Create declaration of Address vector constant which is an input to Address decoder .
"""
		Create declaration of Address vector constant which is an input to
		Address decoder.
		""" # LSBs are cut
self
block
signDict