languages/gen_vhdl.py
def create_includes(self, library, includeList):
		""" 
		Create VHDL include list from a library.
		Arguments:
			includeList		List of includes from given library
		"""
		if (includeList == None):
			return False

		self.__wr_line("Library {};\n".format(library))	
		for include in includeList:
			self.__wr_line("use {}.{};\n".format(library, include))
 
		Create VHDL include list from a library.
		Arguments:
			includeList		List of includes from given library
		
Create VHDL include list from a library.
Arguments:
includeList             List of includes from given library
Create VHDL include list from a library . Arguments : includeList List of includes from given library
def create_includes(self, library, includeList):
		if (includeList == None):
			return False
		self.__wr_line("Library {};\n".format(library))	
		for include in includeList:
			self.__wr_line("use {}.{};\n".format(library, include))
def create_includes ( self , library , includeList ) : if ( includeList == None ) : return False self . __wr_line ( "Library {};\n" . format ( library ) ) for include in includeList : self . __wr_line ( "use {}.{};\n" . format ( library , include ) )
Create VHDL include list from a library.
Create VHDL include list from a library .
""" 
		Create VHDL include list from a library.
		Arguments:
			includeList		List of includes from given library
		"""
self
library
includeList