pyOCD/coresight/cortex_m.py
def readCoreRegistersRaw(self, reg_list):
        """
        Read one or more core registers

        Read core registers in reg_list and return a list of values.
        If any register in reg_list is a string, find the number
        associated to this register in the lookup table CORE_REGISTER.
        """
        # convert to index only
        reg_list = [register_name_to_index(reg) for reg in reg_list]

        # Sanity check register values
        for reg in reg_list:
            if reg not in CORE_REGISTER.values():
                raise ValueError("unknown reg: %d" % reg)
            elif ((reg >= 0x40) or (reg == 33)) and (not self.has_fpu):
                raise ValueError("attempt to read FPU register without FPU")

        # Begin all reads and writes
        dhcsr_cb_list = []
        reg_cb_list = []
        for reg in reg_list:
            if (reg < 0) and (reg >= -4):
                reg = CORE_REGISTER['cfbp']

            # write id in DCRSR
            self.writeMemory(CortexM.DCRSR, reg)

            # Technically, we need to poll S_REGRDY in DHCSR here before reading DCRDR. But
            # we're running so slow compared to the target that it's not necessary.
            # Read it and assert that S_REGRDY is set

            dhcsr_cb = self.readMemory(CortexM.DHCSR, now=False)
            reg_cb = self.readMemory(CortexM.DCRDR, now=False)
            dhcsr_cb_list.append(dhcsr_cb)
            reg_cb_list.append(reg_cb)

        # Read all results
        reg_vals = []
        for reg, reg_cb, dhcsr_cb in zip(reg_list, reg_cb_list, dhcsr_cb_list):
            dhcsr_val = dhcsr_cb()
            assert dhcsr_val & CortexM.S_REGRDY
            val = reg_cb()

            # Special handling for registers that are combined into a single DCRSR number.
            if (reg < 0) and (reg >= -4):
                val = (val >> ((-reg - 1) * 8)) & 0xff

            reg_vals.append(val)

        return reg_vals

        Read one or more core registers

        Read core registers in reg_list and return a list of values.
        If any register in reg_list is a string, find the number
        associated to this register in the lookup table CORE_REGISTER.
        
Read one or more core registers
Read core registers in reg_list and return a list of values.
If any register in reg_list is a string, find the number
associated to this register in the lookup table CORE_REGISTER.
Read one or more core registers Read core registers in reg_list and return a list of values . If any register in reg_list is a string find the number associated to this register in the lookup table CORE_REGISTER .
def readCoreRegistersRaw(self, reg_list):
        reg_list = [register_name_to_index(reg) for reg in reg_list]
        for reg in reg_list:
            if reg not in CORE_REGISTER.values():
                raise ValueError("unknown reg: %d" % reg)
            elif ((reg >= 0x40) or (reg == 33)) and (not self.has_fpu):
                raise ValueError("attempt to read FPU register without FPU")
        dhcsr_cb_list = []
        reg_cb_list = []
        for reg in reg_list:
            if (reg < 0) and (reg >= -4):
                reg = CORE_REGISTER['cfbp']
            self.writeMemory(CortexM.DCRSR, reg)
            dhcsr_cb = self.readMemory(CortexM.DHCSR, now=False)
            reg_cb = self.readMemory(CortexM.DCRDR, now=False)
            dhcsr_cb_list.append(dhcsr_cb)
            reg_cb_list.append(reg_cb)
        reg_vals = []
        for reg, reg_cb, dhcsr_cb in zip(reg_list, reg_cb_list, dhcsr_cb_list):
            dhcsr_val = dhcsr_cb()
            assert dhcsr_val & CortexM.S_REGRDY
            val = reg_cb()
            if (reg < 0) and (reg >= -4):
                val = (val >> ((-reg - 1) * 8)) & 0xff
            reg_vals.append(val)
        return reg_vals
def readCoreRegistersRaw ( self , reg_list ) : reg_list = [ register_name_to_index ( reg ) for reg in reg_list ] for reg in reg_list : if reg not in CORE_REGISTER . values ( ) : raise ValueError ( "unknown reg: %d" % reg ) elif ( ( reg >= 0x40 ) or ( reg == 33 ) ) and ( not self . has_fpu ) : raise ValueError ( "attempt to read FPU register without FPU" ) dhcsr_cb_list = [ ] reg_cb_list = [ ] for reg in reg_list : if ( reg < 0 ) and ( reg >= - 4 ) : reg = CORE_REGISTER [ 'cfbp' ] self . writeMemory ( CortexM . DCRSR , reg ) dhcsr_cb = self . readMemory ( CortexM . DHCSR , now = False ) reg_cb = self . readMemory ( CortexM . DCRDR , now = False ) dhcsr_cb_list . append ( dhcsr_cb ) reg_cb_list . append ( reg_cb ) reg_vals = [ ] for reg , reg_cb , dhcsr_cb in zip ( reg_list , reg_cb_list , dhcsr_cb_list ) : dhcsr_val = dhcsr_cb ( ) assert dhcsr_val & CortexM . S_REGRDY val = reg_cb ( ) if ( reg < 0 ) and ( reg >= - 4 ) : val = ( val >> ( ( - reg - 1 ) * 8 ) ) & 0xff reg_vals . append ( val ) return reg_vals
Read one or more core registers
Read core registers in reg_list and return a list of values.
Read one or more core registers Read core registers in reg_list and return a list of values .
"""
        Read one or more core registers

        Read core registers in reg_list and return a list of values.
        If any register in reg_list is a string, find the number
        associated to this register in the lookup table CORE_REGISTER.
        """ # convert to index only # Sanity check register values # Begin all reads and writes # write id in DCRSR # Technically, we need to poll S_REGRDY in DHCSR here before reading DCRDR. But # we're running so slow compared to the target that it's not necessary. # Read it and assert that S_REGRDY is set # Read all results # Special handling for registers that are combined into a single DCRSR number.
self
reg_list