gb-emu-lib/CPU.cpp
unsigned long CPU::ANDr(const byte& opCode)
{
    byte* r = GetByteRegister(opCode);
    byte result = (*r) & GetHighByte(m_AF);
    SetHighByte(&m_AF, result);

    if (result == 0x00)
    {
        SetFlag(ZeroFlag);
    }
    else
    {
        ClearFlag(ZeroFlag);
    }

    ClearFlag(SubtractFlag);
    SetFlag(HalfCarryFlag);
    ClearFlag(CarryFlag);

    return 4;
}
/*
    AND r
    10100rrr

    The logical AND operation is performed between the register specified in the r
    operand and the byte contained in the accumulator. The result is stored in the accumulator.
    Register r can be A, B, C, D, E, H, or L.

    4 Cycles

    Flags affected(znhc): z010
*/


The logical AND operation is performed between the register specified in the r
operand and the byte contained in the accumulator. The result is stored in the accumulator.
Register r can be A, B, C, D, E, H, or L.

4 Cycles


The logical AND operation is performed between the register specified in the r operand and the byte contained in the accumulator . The result is stored in the accumulator . Register r can be A B C D E H or L . 4 Cycles
unsigned long CPU::ANDr(const byte& opCode)
{
    byte* r = GetByteRegister(opCode);
    byte result = (*r) & GetHighByte(m_AF);
    SetHighByte(&m_AF, result);
    if (result == 0x00)
    {
        SetFlag(ZeroFlag);
    }
    else
    {
        ClearFlag(ZeroFlag);
    }
    ClearFlag(SubtractFlag);
    SetFlag(HalfCarryFlag);
    ClearFlag(CarryFlag);
    return 4;
}
unsigned long CPU :: ANDr ( const byte & opCode ) { byte * r = GetByteRegister ( opCode ) ; byte result = ( * r ) & GetHighByte ( m_AF ) ; SetHighByte ( & m_AF , result ) ; if ( result == 0x00 ) { SetFlag ( ZeroFlag ) ; } else { ClearFlag ( ZeroFlag ) ; } ClearFlag ( SubtractFlag ) ; SetFlag ( HalfCarryFlag ) ; ClearFlag ( CarryFlag ) ; return 4 ; }
AND r
10100rrr
AND r 10100rrr