gb-emu-lib/MBC.cpp
MBC3_MBC::MBC3_MBC(byte* pROM, byte* pRAM) :
    MBC(pROM, pRAM),
    m_ROMBank(0x01),
    m_RAMBank(0x00)
{
    memset(m_RTCRegisters, 0x00, ARRAYSIZE(m_RTCRegisters));
}
/*
The Clock Counter Registers
08h  RTC S   Seconds   0-59 (0-3Bh)
09h  RTC M   Minutes   0-59 (0-3Bh)
0Ah  RTC H   Hours     0-23 (0-17h)
0Bh  RTC DL  Lower 8 bits of Day Counter (0-FFh)
0Ch  RTC DH  Upper 1 bit of Day Counter, Carry Bit, Halt Flag
Bit 0  Most significant bit of Day Counter (Bit 8)
Bit 6  Halt (0=Active, 1=Stop Timer)
Bit 7  Day Counter Carry Bit (1=Counter Overflow)
The Halt Flag is supposed to be set before <writing> to the RTC Registers.

The Day Counter
The total 9 bits of the Day Counter allow to count days in range from 0-511 (0-1FFh). The Day
Counter Carry Bit becomes set when this value overflows. In that case the Carry Bit remains set
until the program does reset it.
Note that you can store an offset to the Day Counter in battery RAM. For example, every time you
read a non-zero Day Counter, add this Counter to the offset in RAM, and reset the Counter to zero.
This method allows to count any number of days, making your program Year-10000-Proof, provided that
the cartridge gets used at least every 511 days.

Delays
When accessing the RTC Registers it is recommended to execute a 4ms delay (4 Cycles in Normal
Speed Mode) between the separate accesses.
*/


The Day Counter
The total 9 bits of the Day Counter allow to count days in range from 0-511 (0-1FFh). The Day
Counter Carry Bit becomes set when this value overflows. In that case the Carry Bit remains set
until the program does reset it.
Note that you can store an offset to the Day Counter in battery RAM. For example, every time you
read a non-zero Day Counter, add this Counter to the offset in RAM, and reset the Counter to zero.
This method allows to count any number of days, making your program Year-10000-Proof, provided that
the cartridge gets used at least every 511 days.

Delays
When accessing the RTC Registers it is recommended to execute a 4ms delay (4 Cycles in Normal
Speed Mode) between the separate accesses.
The Day Counter The total 9 bits of the Day Counter allow to count days in range from 0 - 511 ( 0 - 1FFh ) . The Day Counter Carry Bit becomes set when this value overflows . In that case the Carry Bit remains set until the program does reset it . Note that you can store an offset to the Day Counter in battery RAM . For example every time you read a non - zero Day Counter add this Counter to the offset in RAM and reset the Counter to zero . This method allows to count any number of days making your program Year - 10000 - Proof provided that the cartridge gets used at least every 511 days . Delays When accessing the RTC Registers it is recommended to execute a 4ms delay ( 4 Cycles in Normal Speed Mode ) between the separate accesses .
MBC3_MBC::MBC3_MBC(byte* pROM, byte* pRAM) :
    MBC(pROM, pRAM),
    m_ROMBank(0x01),
    m_RAMBank(0x00)
{
    memset(m_RTCRegisters, 0x00, ARRAYSIZE(m_RTCRegisters));
}
MBC3_MBC :: MBC3_MBC ( byte * pROM , byte * pRAM ) : MBC ( pROM , pRAM ) , m_ROMBank ( 0x01 ) , m_RAMBank ( 0x00 ) { memset ( m_RTCRegisters , 0x00 , ARRAYSIZE ( m_RTCRegisters ) ) ; }
The Clock Counter Registers
08h  RTC S   Seconds   0-59 (0-3Bh)
09h  RTC M   Minutes   0-59 (0-3Bh)
0Ah  RTC H   Hours     0-23 (0-17h)
0Bh  RTC DL  Lower 8 bits of Day Counter (0-FFh)
0Ch  RTC DH  Upper 1 bit of Day Counter, Carry Bit, Halt Flag
Bit 0  Most significant bit of Day Counter (Bit 8)
Bit 6  Halt (0=Active, 1=Stop Timer)
Bit 7  Day Counter Carry Bit (1=Counter Overflow)
The Halt Flag is supposed to be set before <writing> to the RTC Registers.
The Clock Counter Registers 08h RTC S Seconds 0 - 59 ( 0 - 3Bh ) 09h RTC M Minutes 0 - 59 ( 0 - 3Bh ) 0Ah RTC H Hours 0 - 23 ( 0 - 17h ) 0Bh RTC DL Lower 8 bits of Day Counter ( 0 - FFh ) 0Ch RTC DH Upper 1 bit of Day Counter Carry Bit Halt Flag Bit 0 Most significant bit of Day Counter ( Bit 8 ) Bit 6 Halt ( 0 = Active 1 = Stop Timer ) Bit 7 Day Counter Carry Bit ( 1 = Counter Overflow ) The Halt Flag is supposed to be set before <writing > to the RTC Registers .