src/dpdk/drivers/crypto/mvsam/rte_mrvl_pmd_ops.c
static int
mrvl_crypto_pmd_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
		const struct rte_cryptodev_qp_conf *qp_conf,
		int socket_id)
{
	struct mrvl_crypto_qp *qp = NULL;
	char match[RTE_CRYPTODEV_NAME_MAX_LEN];
	unsigned int n;

	/* Allocate the queue pair data structure. */
	qp = rte_zmalloc_socket("MRVL Crypto PMD Queue Pair", sizeof(*qp),
					RTE_CACHE_LINE_SIZE, socket_id);
	if (qp == NULL)
		return -ENOMEM;

	/* Free old qp prior setup if needed. */
	if (dev->data->queue_pairs[qp_id] != NULL)
		mrvl_crypto_pmd_qp_release(dev, qp_id);

	do { /* Error handling block */

		/*
		 * This extra check is necessary due to a bug in
		 * crypto library.
		 */
		int num = sam_get_num_inst();
		if (num == 0) {
			MRVL_LOG(ERR, "No crypto engines detected!");
			return -1;
		}

		/*
		 * In case two crypto engines are enabled qps will
		 * be evenly spread among them. Even and odd qps will
		 * be handled by cio-0 and cio-1 respectively. qp-cio mapping
		 * will look as follows:
		 *
		 * qp:      0        1        2        3
		 * cio-x:y: cio-0:0, cio-1:0, cio-0:1, cio-1:1
		 *
		 * qp:      4        5        6        7
		 * cio-x:y: cio-0:2, cio-1:2, cio-0:3, cio-1:3
		 *
		 * In case just one engine is enabled mapping will look as
		 * follows:
		 * qp:      0        1        2        3
		 * cio-x:y: cio-0:0, cio-0:1, cio-0:2, cio-0:3
		 */
		n = snprintf(match, sizeof(match), "cio-%u:%u",
				qp_id % num, qp_id / num);

		if (n >= sizeof(match))
			break;

		qp->cio_params.match = match;
		qp->cio_params.size = qp_conf->nb_descriptors;

		if (sam_cio_init(&qp->cio_params, &qp->cio) < 0)
			break;

		qp->sess_mp = qp_conf->mp_session;
		qp->sess_mp_priv = qp_conf->mp_session_private;

		memset(&qp->stats, 0, sizeof(qp->stats));
		dev->data->queue_pairs[qp_id] = qp;
		return 0;
	} while (0);

	rte_free(qp);
	return -1;
}
/**
 * Setup a queue pair (PMD ops callback).
 *
 * @param dev Pointer to the device structure.
 * @param qp_id ID of the Queue Pair.
 * @param qp_conf Queue pair configuration (nb of descriptors).
 * @param socket_id NUMA socket to allocate memory on.
 * @returns 0 upon success, negative value otherwise.
 */
Setup a queue pair (PMD ops callback).
@param dev Pointer to the device structure.
@param qp_id ID of the Queue Pair.
@param qp_conf Queue pair configuration (nb of descriptors).
@param socket_id NUMA socket to allocate memory on.
@returns 0 upon success, negative value otherwise.
Setup a queue pair ( PMD ops callback ) . @param dev Pointer to the device structure . @param qp_id ID of the Queue Pair . @param qp_conf Queue pair configuration ( nb of descriptors ) . @param socket_id NUMA socket to allocate memory on . @returns 0 upon success negative value otherwise .
static int
mrvl_crypto_pmd_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
		const struct rte_cryptodev_qp_conf *qp_conf,
		int socket_id)
{
	struct mrvl_crypto_qp *qp = NULL;
	char match[RTE_CRYPTODEV_NAME_MAX_LEN];
	unsigned int n;
	qp = rte_zmalloc_socket("MRVL Crypto PMD Queue Pair", sizeof(*qp),
					RTE_CACHE_LINE_SIZE, socket_id);
	if (qp == NULL)
		return -ENOMEM;
	if (dev->data->queue_pairs[qp_id] != NULL)
		mrvl_crypto_pmd_qp_release(dev, qp_id);
	do { 
		int num = sam_get_num_inst();
		if (num == 0) {
			MRVL_LOG(ERR, "No crypto engines detected!");
			return -1;
		}
		n = snprintf(match, sizeof(match), "cio-%u:%u",
				qp_id % num, qp_id / num);
		if (n >= sizeof(match))
			break;
		qp->cio_params.match = match;
		qp->cio_params.size = qp_conf->nb_descriptors;
		if (sam_cio_init(&qp->cio_params, &qp->cio) < 0)
			break;
		qp->sess_mp = qp_conf->mp_session;
		qp->sess_mp_priv = qp_conf->mp_session_private;
		memset(&qp->stats, 0, sizeof(qp->stats));
		dev->data->queue_pairs[qp_id] = qp;
		return 0;
	} while (0);
	rte_free(qp);
	return -1;
}
static int mrvl_crypto_pmd_qp_setup ( struct rte_cryptodev * dev , uint16_t qp_id , const struct rte_cryptodev_qp_conf * qp_conf , int socket_id ) { struct mrvl_crypto_qp * qp = NULL ; char match [ RTE_CRYPTODEV_NAME_MAX_LEN ] ; unsigned int n ; qp = rte_zmalloc_socket ( " " , sizeof ( * qp ) , RTE_CACHE_LINE_SIZE , socket_id ) ; if ( qp == NULL ) return - ENOMEM ; if ( dev -> data -> queue_pairs [ qp_id ] != NULL ) mrvl_crypto_pmd_qp_release ( dev , qp_id ) ; do { int num = sam_get_num_inst ( ) ; if ( num == 0 ) { MRVL_LOG ( ERR , " " ) ; return -1 ; } n = snprintf ( match , sizeof ( match ) , " " , qp_id % num , qp_id / num ) ; if ( n >= sizeof ( match ) ) break ; qp -> cio_params . match = match ; qp -> cio_params . size = qp_conf -> nb_descriptors ; if ( sam_cio_init ( & qp -> cio_params , & qp -> cio ) < 0 ) break ; qp -> sess_mp = qp_conf -> mp_session ; qp -> sess_mp_priv = qp_conf -> mp_session_private ; memset ( & qp -> stats , 0 , sizeof ( qp -> stats ) ) ; dev -> data -> queue_pairs [ qp_id ] = qp ; return 0 ; } while ( 0 ) ; rte_free ( qp ) ; return -1 ; }
Setup a queue pair (PMD ops callback).
Setup a queue pair ( PMD ops callback ) .
/* Allocate the queue pair data structure. */ /* Free old qp prior setup if needed. */ /* Error handling block */ /*
		 * This extra check is necessary due to a bug in
		 * crypto library.
		 */ /*
		 * In case two crypto engines are enabled qps will
		 * be evenly spread among them. Even and odd qps will
		 * be handled by cio-0 and cio-1 respectively. qp-cio mapping
		 * will look as follows:
		 *
		 * qp:      0        1        2        3
		 * cio-x:y: cio-0:0, cio-1:0, cio-0:1, cio-1:1
		 *
		 * qp:      4        5        6        7
		 * cio-x:y: cio-0:2, cio-1:2, cio-0:3, cio-1:3
		 *
		 * In case just one engine is enabled mapping will look as
		 * follows:
		 * qp:      0        1        2        3
		 * cio-x:y: cio-0:0, cio-0:1, cio-0:2, cio-0:3
		 */