XilinxProcessorIPLib/drivers/vphy/src/xvphy.c
void XVphy_Clkout1OBufTdsEnable(XVphy *InstancePtr, XVphy_DirectionType Dir,
		u8 Enable)
{
	u32 RegVal;
	u32 RegOffset;

	if (Dir == XVPHY_DIR_TX) {
		RegOffset = XVPHY_MISC_TXUSRCLK_REG;
	}
	else {
		RegOffset = XVPHY_MISC_RXUSRCLK_REG;
	}

	/* Read XXUSRCLK MISC register. */
	RegVal = XVphy_ReadReg(InstancePtr->Config.BaseAddr, RegOffset);

	/* Write new value to XXUSRCLK MISC register. */
	if (Enable) {
		RegVal |= XVPHY_MISC_XXUSRCLK_CKOUT1_OEN_MASK;
	}
	else {
		RegVal &= ~XVPHY_MISC_XXUSRCLK_CKOUT1_OEN_MASK;
	}
	XVphy_WriteReg(InstancePtr->Config.BaseAddr, RegOffset, RegVal);
}
/*****************************************************************************/
/**
* This function enables the TX or RX CLKOUT1 OBUFTDS peripheral.
*
* @param	InstancePtr is a pointer to the XVphy core instance.
* @param	Dir is an indicator for TX or RX.
* @param	Enable specifies TRUE/FALSE value to either enable or disable
*		the OBUFTDS, respectively.
*
* @return	None.
*
******************************************************************************/
This function enables the TX or RX CLKOUT1 OBUFTDS peripheral.
This function enables the TX or RX CLKOUT1 OBUFTDS peripheral .
void XVphy_Clkout1OBufTdsEnable(XVphy *InstancePtr, XVphy_DirectionType Dir,
		u8 Enable)
{
	u32 RegVal;
	u32 RegOffset;
	if (Dir == XVPHY_DIR_TX) {
		RegOffset = XVPHY_MISC_TXUSRCLK_REG;
	}
	else {
		RegOffset = XVPHY_MISC_RXUSRCLK_REG;
	}
	RegVal = XVphy_ReadReg(InstancePtr->Config.BaseAddr, RegOffset);
	if (Enable) {
		RegVal |= XVPHY_MISC_XXUSRCLK_CKOUT1_OEN_MASK;
	}
	else {
		RegVal &= ~XVPHY_MISC_XXUSRCLK_CKOUT1_OEN_MASK;
	}
	XVphy_WriteReg(InstancePtr->Config.BaseAddr, RegOffset, RegVal);
}
void XVphy_Clkout1OBufTdsEnable ( XVphy * InstancePtr , XVphy_DirectionType Dir , u8 Enable ) { u32 RegVal ; u32 RegOffset ; if ( Dir == XVPHY_DIR_TX ) { RegOffset = XVPHY_MISC_TXUSRCLK_REG ; } else { RegOffset = XVPHY_MISC_RXUSRCLK_REG ; } RegVal = XVphy_ReadReg ( InstancePtr -> Config . BaseAddr , RegOffset ) ; if ( Enable ) { RegVal |= XVPHY_MISC_XXUSRCLK_CKOUT1_OEN_MASK ; } else { RegVal &= ~ XVPHY_MISC_XXUSRCLK_CKOUT1_OEN_MASK ; } XVphy_WriteReg ( InstancePtr -> Config . BaseAddr , RegOffset , RegVal ) ; }
This function enables the TX or RX CLKOUT1 OBUFTDS peripheral.
This function enables the TX or RX CLKOUT1 OBUFTDS peripheral .
/* Read XXUSRCLK MISC register. */ /* Write new value to XXUSRCLK MISC register. */