src/dpdk/drivers/net/e1000/base/e1000_ich8lan.c
void e1000_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw)
{
	u32 reg;
	u16 data;
	u8  retry = 0;

	DEBUGFUNC("e1000_igp3_phy_powerdown_workaround_ich8lan");

	if (hw->phy.type != e1000_phy_igp_3)
		return;

	/* Try the workaround twice (if needed) */
	do {
		/* Disable link */
		reg = E1000_READ_REG(hw, E1000_PHY_CTRL);
		reg |= (E1000_PHY_CTRL_GBE_DISABLE |
			E1000_PHY_CTRL_NOND0A_GBE_DISABLE);
		E1000_WRITE_REG(hw, E1000_PHY_CTRL, reg);

		/* Call gig speed drop workaround on Gig disable before
		 * accessing any PHY registers
		 */
		if (hw->mac.type == e1000_ich8lan)
			e1000_gig_downshift_workaround_ich8lan(hw);

		/* Write VR power-down enable */
		hw->phy.ops.read_reg(hw, IGP3_VR_CTRL, &data);
		data &= ~IGP3_VR_CTRL_DEV_POWERDOWN_MODE_MASK;
		hw->phy.ops.write_reg(hw, IGP3_VR_CTRL,
				      data | IGP3_VR_CTRL_MODE_SHUTDOWN);

		/* Read it back and test */
		hw->phy.ops.read_reg(hw, IGP3_VR_CTRL, &data);
		data &= IGP3_VR_CTRL_DEV_POWERDOWN_MODE_MASK;
		if ((data == IGP3_VR_CTRL_MODE_SHUTDOWN) || retry)
			break;

		/* Issue PHY reset and repeat at most one more time */
		reg = E1000_READ_REG(hw, E1000_CTRL);
		E1000_WRITE_REG(hw, E1000_CTRL, reg | E1000_CTRL_PHY_RST);
		retry++;
	} while (retry);
}
/**
 *  e1000_ipg3_phy_powerdown_workaround_ich8lan - Power down workaround on D3
 *  @hw: pointer to the HW structure
 *
 *  Workaround for 82566 power-down on D3 entry:
 *    1) disable gigabit link
 *    2) write VR power-down enable
 *    3) read it back
 *  Continue if successful, else issue LCD reset and repeat
 **/
Power down workaround on D3
@hw: pointer to the HW structure

Workaround for 82566 power-down on D3 entry:
1) disable gigabit link
2) write VR power-down enable
3) read it back
Continue if successful, else issue LCD reset and repeat
Power down workaround on D3 @hw : pointer to the HW structure Workaround for 82566 power - down on D3 entry : 1 ) disable gigabit link 2 ) write VR power - down enable 3 ) read it back Continue if successful else issue LCD reset and repeat
void e1000_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw)
{
	u32 reg;
	u16 data;
	u8  retry = 0;
	DEBUGFUNC("e1000_igp3_phy_powerdown_workaround_ich8lan");
	if (hw->phy.type != e1000_phy_igp_3)
		return;
	do {
		reg = E1000_READ_REG(hw, E1000_PHY_CTRL);
		reg |= (E1000_PHY_CTRL_GBE_DISABLE |
			E1000_PHY_CTRL_NOND0A_GBE_DISABLE);
		E1000_WRITE_REG(hw, E1000_PHY_CTRL, reg);
		if (hw->mac.type == e1000_ich8lan)
			e1000_gig_downshift_workaround_ich8lan(hw);
		hw->phy.ops.read_reg(hw, IGP3_VR_CTRL, &data);
		data &= ~IGP3_VR_CTRL_DEV_POWERDOWN_MODE_MASK;
		hw->phy.ops.write_reg(hw, IGP3_VR_CTRL,
				      data | IGP3_VR_CTRL_MODE_SHUTDOWN);
		hw->phy.ops.read_reg(hw, IGP3_VR_CTRL, &data);
		data &= IGP3_VR_CTRL_DEV_POWERDOWN_MODE_MASK;
		if ((data == IGP3_VR_CTRL_MODE_SHUTDOWN) || retry)
			break;
		reg = E1000_READ_REG(hw, E1000_CTRL);
		E1000_WRITE_REG(hw, E1000_CTRL, reg | E1000_CTRL_PHY_RST);
		retry++;
	} while (retry);
}
void e1000_igp3_phy_powerdown_workaround_ich8lan ( struct e1000_hw * hw ) { u32 reg ; u16 data ; u8 retry = 0 ; DEBUGFUNC ( " " ) ; if ( hw -> phy . type != e1000_phy_igp_3 ) return ; do { reg = E1000_READ_REG ( hw , E1000_PHY_CTRL ) ; reg |= ( E1000_PHY_CTRL_GBE_DISABLE | E1000_PHY_CTRL_NOND0A_GBE_DISABLE ) ; E1000_WRITE_REG ( hw , E1000_PHY_CTRL , reg ) ; if ( hw -> mac . type == e1000_ich8lan ) e1000_gig_downshift_workaround_ich8lan ( hw ) ; hw -> phy . ops . read_reg ( hw , IGP3_VR_CTRL , & data ) ; data &= ~ IGP3_VR_CTRL_DEV_POWERDOWN_MODE_MASK ; hw -> phy . ops . write_reg ( hw , IGP3_VR_CTRL , data | IGP3_VR_CTRL_MODE_SHUTDOWN ) ; hw -> phy . ops . read_reg ( hw , IGP3_VR_CTRL , & data ) ; data &= IGP3_VR_CTRL_DEV_POWERDOWN_MODE_MASK ; if ( ( data == IGP3_VR_CTRL_MODE_SHUTDOWN ) || retry ) break ; reg = E1000_READ_REG ( hw , E1000_CTRL ) ; E1000_WRITE_REG ( hw , E1000_CTRL , reg | E1000_CTRL_PHY_RST ) ; retry ++ ; } while ( retry ) ; }
e1000_ipg3_phy_powerdown_workaround_ich8lan - Power down workaround on D3
  @hw: pointer to the HW structure
e1000_ipg3_phy_powerdown_workaround_ich8lan - Power down workaround on D3 @hw : pointer to the HW structure
/* Try the workaround twice (if needed) */ /* Disable link */ /* Call gig speed drop workaround on Gig disable before
		 * accessing any PHY registers
		 */ /* Write VR power-down enable */ /* Read it back and test */ /* Issue PHY reset and repeat at most one more time */