src/dpdk/drivers/net/cxgbe/base/t4_hw.c
void t4_intr_disable(struct adapter *adapter)
{
	u32 whoami = t4_read_reg(adapter, A_PL_WHOAMI);
	u32 pf = CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5 ?
		 G_SOURCEPF(whoami) : G_T6_SOURCEPF(whoami);

	t4_write_reg(adapter, MYPF_REG(A_PL_PF_INT_ENABLE), 0);
	t4_set_reg_field(adapter, A_PL_INT_MAP0, 1 << pf, 0);
}
/**
 * t4_intr_disable - disable interrupts
 * @adapter: the adapter whose interrupts should be disabled
 *
 * Disable interrupts.  We only disable the top-level interrupt
 * concentrators.  The caller must be a PCI function managing global
 * interrupts.
 */
disable interrupts
@adapter: the adapter whose interrupts should be disabled

Disable interrupts.  We only disable the top-level interrupt
concentrators.  The caller must be a PCI function managing global
interrupts.
disable interrupts @adapter : the adapter whose interrupts should be disabled Disable interrupts . We only disable the top - level interrupt concentrators . The caller must be a PCI function managing global interrupts .
void t4_intr_disable(struct adapter *adapter)
{
	u32 whoami = t4_read_reg(adapter, A_PL_WHOAMI);
	u32 pf = CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5 ?
		 G_SOURCEPF(whoami) : G_T6_SOURCEPF(whoami);
	t4_write_reg(adapter, MYPF_REG(A_PL_PF_INT_ENABLE), 0);
	t4_set_reg_field(adapter, A_PL_INT_MAP0, 1 << pf, 0);
}
void t4_intr_disable ( struct adapter * adapter ) { u32 whoami = t4_read_reg ( adapter , A_PL_WHOAMI ) ; u32 pf = CHELSIO_CHIP_VERSION ( adapter -> params . chip ) <= CHELSIO_T5 ? G_SOURCEPF ( whoami ) : G_T6_SOURCEPF ( whoami ) ; t4_write_reg ( adapter , MYPF_REG ( A_PL_PF_INT_ENABLE ) , 0 ) ; t4_set_reg_field ( adapter , A_PL_INT_MAP0 , 1 << pf , 0 ) ; }
t4_intr_disable - disable interrupts
 @adapter: the adapter whose interrupts should be disabled
t4_intr_disable - disable interrupts @adapter : the adapter whose interrupts should be disabled