libmaple/stm32f2-f4/dma.c
static int config_to_mem(dma_tube_reg_map *dummy, dma_tube_config *cfg) {
    uint32 dir = (_dma_addr_type(cfg->tube_src) == DMA_ATYPE_MEM ?
                  DMA_SCR_DIR_MEM_TO_MEM : DMA_SCR_DIR_PER_TO_MEM);

    if ((dir == DMA_SCR_DIR_MEM_TO_MEM) && (cfg->tube_flags & DMA_CFG_CIRC)) {
        return -DMA_TUBE_CFG_ECFG; /* Can't do DMA_CFG_CIRC and mem->mem. */
    }

    config_scr(dummy, cfg, 11, DMA_SCR_PINC, 13, DMA_SCR_MINC, dir);
    dummy->SPAR = (uint32)cfg->tube_src;
    dummy->SM0AR = (uint32)cfg->tube_dst;
    return DMA_TUBE_CFG_SUCCESS;
}
/* Helper for when cfg->tube_dst is memory */
Helper for when cfg->tube_dst is memory
Helper for when cfg - > tube_dst is memory
static int config_to_mem(dma_tube_reg_map *dummy, dma_tube_config *cfg) {
    uint32 dir = (_dma_addr_type(cfg->tube_src) == DMA_ATYPE_MEM ?
                  DMA_SCR_DIR_MEM_TO_MEM : DMA_SCR_DIR_PER_TO_MEM);
    if ((dir == DMA_SCR_DIR_MEM_TO_MEM) && (cfg->tube_flags & DMA_CFG_CIRC)) {
        return -DMA_TUBE_CFG_ECFG; 
    }
    config_scr(dummy, cfg, 11, DMA_SCR_PINC, 13, DMA_SCR_MINC, dir);
    dummy->SPAR = (uint32)cfg->tube_src;
    dummy->SM0AR = (uint32)cfg->tube_dst;
    return DMA_TUBE_CFG_SUCCESS;
}
static int config_to_mem ( dma_tube_reg_map * dummy , dma_tube_config * cfg ) { uint32 dir = ( _dma_addr_type ( cfg -> tube_src ) == DMA_ATYPE_MEM ? DMA_SCR_DIR_MEM_TO_MEM : DMA_SCR_DIR_PER_TO_MEM ) ; if ( ( dir == DMA_SCR_DIR_MEM_TO_MEM ) && ( cfg -> tube_flags & DMA_CFG_CIRC ) ) { return - DMA_TUBE_CFG_ECFG ; } config_scr ( dummy , cfg , 11 , DMA_SCR_PINC , 13 , DMA_SCR_MINC , dir ) ; dummy -> SPAR = ( uint32 ) cfg -> tube_src ; dummy -> SM0AR = ( uint32 ) cfg -> tube_dst ; return DMA_TUBE_CFG_SUCCESS ; }
Helper for when cfg->tube_dst is memory
Helper for when cfg - > tube_dst is memory
/* Can't do DMA_CFG_CIRC and mem->mem. */