XilinxProcessorIPLib/drivers/can/src/xcan.c
void XCan_AcceptFilterGet(XCan *InstancePtr, u32 FilterIndex,
			  u32 *MaskValue, u32 *IdValue)
{
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertVoid(InstancePtr->NumOfAcceptFilters > 0);
	Xil_AssertVoid((FilterIndex == XCAN_AFR_UAF4_MASK) ||
			(FilterIndex == XCAN_AFR_UAF3_MASK) ||
			(FilterIndex == XCAN_AFR_UAF2_MASK) ||
			(FilterIndex == XCAN_AFR_UAF1_MASK));

	switch (FilterIndex) {
	case XCAN_AFR_UAF1_MASK:	/* Acceptance Filter No. 1 */
		/* Read Mask Register */
		*MaskValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFMR1_OFFSET);
		/* Read ID Register */
		*IdValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFIR1_OFFSET);
		break;
	case XCAN_AFR_UAF2_MASK:	/* Acceptance Filter No. 2 */
		/* Read Mask Register */
		*MaskValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFMR2_OFFSET);
		/* Read ID Register */
		*IdValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFIR2_OFFSET);
		break;
	case XCAN_AFR_UAF3_MASK:	/* Acceptance Filter No. 3 */
		/* Read Mask Register */
		*MaskValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFMR3_OFFSET);
		/* Read ID Register */
		*IdValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFIR3_OFFSET);
		break;
	case XCAN_AFR_UAF4_MASK:	/* Acceptance Filter No. 4 */
		/* Read Mask Register */
		*MaskValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFMR4_OFFSET);
		/* Read ID Register */
		*IdValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFIR4_OFFSET);
		break;
	}
}
/*****************************************************************************/
/**
*
* This function reads the values of the Acceptance Filter Mask and ID Register
* for the specified Acceptance Filter. Use XCAN_IDR_* defined in xcan_l.h to
* interpret the values. Read xcan.h and device specification for details.
*
* @param	InstancePtr is a pointer to the XCan instance to be worked on.
* @param	FilterIndex defines which Acceptance Filter Mask Register to get
*		Mask and ID from. Use any single XCAN_FILTER_* value.
* @param	MaskValue will store the Mask value read from the chosen
*		Acceptance Filter Mask Register after this function returns.
* @param	IdValue will store the ID value read from the chosen Acceptance
*		Filter ID Register after this function returns.
*
* @return	None.
*
* @note
*
* Acceptance Filter Mask and ID Registers are optional registers in Xilinx CAN
* device. If they are NOT existing in the device, this function should NOT
* be used. Calling this function in this case will cause an assertion failure.
*
******************************************************************************/
This function reads the values of the Acceptance Filter Mask and ID Register
for the specified Acceptance Filter. Use XCAN_IDR_* defined in xcan_l.h to
interpret the values. Read xcan.h and device specification for details.
This function reads the values of the Acceptance Filter Mask and ID Register for the specified Acceptance Filter . Use XCAN_IDR_ * defined in xcan_l . h to interpret the values . Read xcan . h and device specification for details .
void XCan_AcceptFilterGet(XCan *InstancePtr, u32 FilterIndex,
			  u32 *MaskValue, u32 *IdValue)
{
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertVoid(InstancePtr->NumOfAcceptFilters > 0);
	Xil_AssertVoid((FilterIndex == XCAN_AFR_UAF4_MASK) ||
			(FilterIndex == XCAN_AFR_UAF3_MASK) ||
			(FilterIndex == XCAN_AFR_UAF2_MASK) ||
			(FilterIndex == XCAN_AFR_UAF1_MASK));
	switch (FilterIndex) {
	case XCAN_AFR_UAF1_MASK:	
		*MaskValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFMR1_OFFSET);
		*IdValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFIR1_OFFSET);
		break;
	case XCAN_AFR_UAF2_MASK:	
		*MaskValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFMR2_OFFSET);
		*IdValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFIR2_OFFSET);
		break;
	case XCAN_AFR_UAF3_MASK:	
		*MaskValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFMR3_OFFSET);
		*IdValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFIR3_OFFSET);
		break;
	case XCAN_AFR_UAF4_MASK:	
		*MaskValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFMR4_OFFSET);
		*IdValue =
			XCan_ReadReg(InstancePtr->BaseAddress,
					  XCAN_AFIR4_OFFSET);
		break;
	}
}
void XCan_AcceptFilterGet ( XCan * InstancePtr , u32 FilterIndex , u32 * MaskValue , u32 * IdValue ) { Xil_AssertVoid ( InstancePtr != NULL ) ; Xil_AssertVoid ( InstancePtr -> IsReady == XIL_COMPONENT_IS_READY ) ; Xil_AssertVoid ( InstancePtr -> NumOfAcceptFilters > 0 ) ; Xil_AssertVoid ( ( FilterIndex == XCAN_AFR_UAF4_MASK ) || ( FilterIndex == XCAN_AFR_UAF3_MASK ) || ( FilterIndex == XCAN_AFR_UAF2_MASK ) || ( FilterIndex == XCAN_AFR_UAF1_MASK ) ) ; switch ( FilterIndex ) { case XCAN_AFR_UAF1_MASK : * MaskValue = XCan_ReadReg ( InstancePtr -> BaseAddress , XCAN_AFMR1_OFFSET ) ; * IdValue = XCan_ReadReg ( InstancePtr -> BaseAddress , XCAN_AFIR1_OFFSET ) ; break ; case XCAN_AFR_UAF2_MASK : * MaskValue = XCan_ReadReg ( InstancePtr -> BaseAddress , XCAN_AFMR2_OFFSET ) ; * IdValue = XCan_ReadReg ( InstancePtr -> BaseAddress , XCAN_AFIR2_OFFSET ) ; break ; case XCAN_AFR_UAF3_MASK : * MaskValue = XCan_ReadReg ( InstancePtr -> BaseAddress , XCAN_AFMR3_OFFSET ) ; * IdValue = XCan_ReadReg ( InstancePtr -> BaseAddress , XCAN_AFIR3_OFFSET ) ; break ; case XCAN_AFR_UAF4_MASK : * MaskValue = XCan_ReadReg ( InstancePtr -> BaseAddress , XCAN_AFMR4_OFFSET ) ; * IdValue = XCan_ReadReg ( InstancePtr -> BaseAddress , XCAN_AFIR4_OFFSET ) ; break ; } }
This function reads the values of the Acceptance Filter Mask and ID Register
for the specified Acceptance Filter.
This function reads the values of the Acceptance Filter Mask and ID Register for the specified Acceptance Filter .
/* Acceptance Filter No. 1 */ /* Read Mask Register */ /* Read ID Register */ /* Acceptance Filter No. 2 */ /* Read Mask Register */ /* Read ID Register */ /* Acceptance Filter No. 3 */ /* Read Mask Register */ /* Read ID Register */ /* Acceptance Filter No. 4 */ /* Read Mask Register */ /* Read ID Register */