src/dpdk/drivers/net/mlx4/mlx4_txq.c
static int
txq_uar_init_secondary(struct txq *txq, int fd)
{
	struct mlx4_priv *priv = txq->priv;
	struct mlx4_proc_priv *ppriv = MLX4_PROC_PRIV(PORT_ID(priv));
	void *addr;
	uintptr_t uar_va;
	uintptr_t offset;
	const size_t page_size = sysconf(_SC_PAGESIZE);

	MLX4_ASSERT(ppriv);
	/*
	 * As rdma-core, UARs are mapped in size of OS page
	 * size. Ref to libmlx4 function: mlx4_init_context()
	 */
	uar_va = (uintptr_t)txq->msq.db;
	offset = uar_va & (page_size - 1); /* Offset in page. */
	addr = mmap(NULL, page_size, PROT_WRITE, MAP_SHARED, fd,
			txq->msq.uar_mmap_offset);
	if (addr == MAP_FAILED) {
		ERROR("port %u mmap failed for BF reg of txq %u",
		      txq->port_id, txq->stats.idx);
		rte_errno = ENXIO;
		return -rte_errno;
	}
	addr = RTE_PTR_ADD(addr, offset);
	ppriv->uar_table[txq->stats.idx] = addr;
	return 0;
}
/**
 * Remap UAR register of a Tx queue for secondary process.
 *
 * Remapped address is stored at the table in the process private structure of
 * the device, indexed by queue index.
 *
 * @param txq
 *   Pointer to Tx queue structure.
 * @param fd
 *   Verbs file descriptor to map UAR pages.
 *
 * @return
 *   0 on success, a negative errno value otherwise and rte_errno is set.
 */
Remap UAR register of a Tx queue for secondary process.
Remapped address is stored at the table in the process private structure of
the device, indexed by queue index.

@param txq
Pointer to Tx queue structure.
@param fd
Verbs file descriptor to map UAR pages.

@return
0 on success, a negative errno value otherwise and rte_errno is set.
Remap UAR register of a Tx queue for secondary process . Remapped address is stored at the table in the process private structure of the device indexed by queue index . @param txq Pointer to Tx queue structure . @param fd Verbs file descriptor to map UAR pages . @return 0 on success a negative errno value otherwise and rte_errno is set .
static int
txq_uar_init_secondary(struct txq *txq, int fd)
{
	struct mlx4_priv *priv = txq->priv;
	struct mlx4_proc_priv *ppriv = MLX4_PROC_PRIV(PORT_ID(priv));
	void *addr;
	uintptr_t uar_va;
	uintptr_t offset;
	const size_t page_size = sysconf(_SC_PAGESIZE);
	MLX4_ASSERT(ppriv);
	uar_va = (uintptr_t)txq->msq.db;
	offset = uar_va & (page_size - 1); 
	addr = mmap(NULL, page_size, PROT_WRITE, MAP_SHARED, fd,
			txq->msq.uar_mmap_offset);
	if (addr == MAP_FAILED) {
		ERROR("port %u mmap failed for BF reg of txq %u",
		      txq->port_id, txq->stats.idx);
		rte_errno = ENXIO;
		return -rte_errno;
	}
	addr = RTE_PTR_ADD(addr, offset);
	ppriv->uar_table[txq->stats.idx] = addr;
	return 0;
}
static int txq_uar_init_secondary ( struct txq * txq , int fd ) { struct mlx4_priv * priv = txq -> priv ; struct mlx4_proc_priv * ppriv = MLX4_PROC_PRIV ( PORT_ID ( priv ) ) ; void * addr ; uintptr_t uar_va ; uintptr_t offset ; const size_t page_size = sysconf ( _SC_PAGESIZE ) ; MLX4_ASSERT ( ppriv ) ; uar_va = ( uintptr_t ) txq -> msq . db ; offset = uar_va & ( page_size - 1 ) ; addr = mmap ( NULL , page_size , PROT_WRITE , MAP_SHARED , fd , txq -> msq . uar_mmap_offset ) ; if ( addr == MAP_FAILED ) { ERROR ( " " , txq -> port_id , txq -> stats . idx ) ; rte_errno = ENXIO ; return - rte_errno ; } addr = RTE_PTR_ADD ( addr , offset ) ; ppriv -> uar_table [ txq -> stats . idx ] = addr ; return 0 ; }
Remap UAR register of a Tx queue for secondary process.
Remap UAR register of a Tx queue for secondary process .
/*
	 * As rdma-core, UARs are mapped in size of OS page
	 * size. Ref to libmlx4 function: mlx4_init_context()
	 */ /* Offset in page. */