XilinxProcessorIPLib/drivers/resetps/src/xresetps.c
XStatus XResetPs_ResetPulse(XResetPs *InstancePtr, const XResetPs_RstId ResetID)
{
	/* Arguments validation */
	Xil_AssertNonvoid(InstancePtr != NULL);
	if (!((ResetID <= XRESETPS_RSTID_END) &&
		((ResetID > XRESETPS_RSTID_START)||
		(ResetID == XRESETPS_RSTID_START)))) {
		return XST_INVALID_PARAM;
	}

#if EL1_NONSECURE
	/* Pulse reset via PMUFW */
	u64 SmcArgs;
	XSmc_OutVar out;

	SmcArgs =  (u64)XRESETPS_RSTACT_PULSE << 32;
	SmcArgs |= ((u64)(ResetID + XRESETPS_RSTID_BASE));

	out = Xil_Smc(PM_ASSERT_SMC_FID, SmcArgs, 0, 0, 0, 0, 0, 0);

	return ((u32)out.Arg0);
#else
	u32 RegAddr;
	u32 RegBitmask;
	u32 RegValue;
	u32 TimeOut;

	/* Ignoring Nodes that donot support pulse reset */
	if (!XRESETPS_CHK_PULSE_SUPPORT(ResetMap[ResetID].SupportedActions)) {
			return XST_NO_FEATURE;
	}

	/* Handling specific pulse resets */
	switch (ResetID) {
		case XRESETPS_RSTID_FPD:
			return XResetPs_PulseResetFpd();
		case XRESETPS_RSTID_RPU_LS:
			return XResetPs_PulseResetRpuLs();
		case XRESETPS_RSTID_PS_ONLY:
			return XResetPs_PulseResetPsOnly();
		default:
			break;
	}

	RegAddr = ResetMap[ResetID].SlcrregAddr;
	RegBitmask = ResetMap[ResetID].SlcrregBitmask;

	/* Power state mask validation */
	if ((ResetMap[ResetID].PulseType == XRESETPS_PT_DLY_PSCHK) &&
		(ResetMap[ResetID].PwrStateBitmask != XRESETPS_BM_INVALID)) {
		RegValue = XResetPs_ReadReg(XRESETPS_PMU_GLB_PWR_STATUS);
		if (ResetMap[ResetID].PwrStateBitmask !=
			(RegValue && ResetMap[ResetID].PwrStateBitmask )) {
			return XST_REGISTER_ERROR;
		}
	}

	/* Enable bit to assert reset */
	RegValue = XResetPs_ReadReg(RegAddr);
	RegValue |= RegBitmask;
	XResetPs_WriteReg(RegAddr, RegValue);

	/* Wait for assert propagation */
	if (ResetMap[ResetID].PulseType != XRESETPS_PT_NO_DLY_NO_PSCHK) {
		TimeOut = XRESETPS_PULSE_PROP_DELAY;
		while (TimeOut > 0U) {
			TimeOut--;
		}
	}

	/* Disable bit to deassert reset */
	RegValue = XResetPs_ReadReg(RegAddr);
	RegValue &= (~RegBitmask);
	XResetPs_WriteReg(RegAddr, RegValue);

	/* Wait for release propagation */
	if (ResetMap[ResetID].PulseType != XRESETPS_PT_NO_DLY_NO_PSCHK) {
		TimeOut = XRESETPS_PULSE_PROP_DELAY;
		while (TimeOut > 0U) {
			TimeOut--;
		}
	}

	return XST_SUCCESS;
#endif
}
/****************************************************************************/
/**
*
* Pulse reset for specific peripheral based on reset ID.
*
* @param	InstancePtr is a pointer to the XResetPs instance.
* @param	ResetID is the ID of the peripheral.
*
* @return
*		- XST_SUCCESS if pulse reset was successful.
*		- Error Code otherwise.
*
* @note		None.
*
******************************************************************************/
Pulse reset for specific peripheral based on reset ID.
Pulse reset for specific peripheral based on reset ID .
XStatus XResetPs_ResetPulse(XResetPs *InstancePtr, const XResetPs_RstId ResetID)
{
	Xil_AssertNonvoid(InstancePtr != NULL);
	if (!((ResetID <= XRESETPS_RSTID_END) &&
		((ResetID > XRESETPS_RSTID_START)||
		(ResetID == XRESETPS_RSTID_START)))) {
		return XST_INVALID_PARAM;
	}
#if EL1_NONSECURE
	u64 SmcArgs;
	XSmc_OutVar out;
	SmcArgs =  (u64)XRESETPS_RSTACT_PULSE << 32;
	SmcArgs |= ((u64)(ResetID + XRESETPS_RSTID_BASE));
	out = Xil_Smc(PM_ASSERT_SMC_FID, SmcArgs, 0, 0, 0, 0, 0, 0);
	return ((u32)out.Arg0);
#else
	u32 RegAddr;
	u32 RegBitmask;
	u32 RegValue;
	u32 TimeOut;
	if (!XRESETPS_CHK_PULSE_SUPPORT(ResetMap[ResetID].SupportedActions)) {
			return XST_NO_FEATURE;
	}
	switch (ResetID) {
		case XRESETPS_RSTID_FPD:
			return XResetPs_PulseResetFpd();
		case XRESETPS_RSTID_RPU_LS:
			return XResetPs_PulseResetRpuLs();
		case XRESETPS_RSTID_PS_ONLY:
			return XResetPs_PulseResetPsOnly();
		default:
			break;
	}
	RegAddr = ResetMap[ResetID].SlcrregAddr;
	RegBitmask = ResetMap[ResetID].SlcrregBitmask;
	if ((ResetMap[ResetID].PulseType == XRESETPS_PT_DLY_PSCHK) &&
		(ResetMap[ResetID].PwrStateBitmask != XRESETPS_BM_INVALID)) {
		RegValue = XResetPs_ReadReg(XRESETPS_PMU_GLB_PWR_STATUS);
		if (ResetMap[ResetID].PwrStateBitmask !=
			(RegValue && ResetMap[ResetID].PwrStateBitmask )) {
			return XST_REGISTER_ERROR;
		}
	}
	RegValue = XResetPs_ReadReg(RegAddr);
	RegValue |= RegBitmask;
	XResetPs_WriteReg(RegAddr, RegValue);
	if (ResetMap[ResetID].PulseType != XRESETPS_PT_NO_DLY_NO_PSCHK) {
		TimeOut = XRESETPS_PULSE_PROP_DELAY;
		while (TimeOut > 0U) {
			TimeOut--;
		}
	}
	RegValue = XResetPs_ReadReg(RegAddr);
	RegValue &= (~RegBitmask);
	XResetPs_WriteReg(RegAddr, RegValue);
	if (ResetMap[ResetID].PulseType != XRESETPS_PT_NO_DLY_NO_PSCHK) {
		TimeOut = XRESETPS_PULSE_PROP_DELAY;
		while (TimeOut > 0U) {
			TimeOut--;
		}
	}
	return XST_SUCCESS;
#endif
}
XStatus XResetPs_ResetPulse ( XResetPs * InstancePtr , const XResetPs_RstId ResetID ) { Xil_AssertNonvoid ( InstancePtr != NULL ) ; if ( ! ( ( ResetID <= XRESETPS_RSTID_END ) && ( ( ResetID > XRESETPS_RSTID_START ) || ( ResetID == XRESETPS_RSTID_START ) ) ) ) { return XST_INVALID_PARAM ; } #if EL1_NONSECURE u64 SmcArgs ; XSmc_OutVar out ; SmcArgs = ( u64 ) XRESETPS_RSTACT_PULSE << 32 ; SmcArgs |= ( ( u64 ) ( ResetID + XRESETPS_RSTID_BASE ) ) ; out = Xil_Smc ( PM_ASSERT_SMC_FID , SmcArgs , 0 , 0 , 0 , 0 , 0 , 0 ) ; return ( ( u32 ) out . Arg0 ) ; #else u32 RegAddr ; u32 RegBitmask ; u32 RegValue ; u32 TimeOut ; if ( ! XRESETPS_CHK_PULSE_SUPPORT ( ResetMap [ ResetID ] . SupportedActions ) ) { return XST_NO_FEATURE ; } switch ( ResetID ) { case XRESETPS_RSTID_FPD : return XResetPs_PulseResetFpd ( ) ; case XRESETPS_RSTID_RPU_LS : return XResetPs_PulseResetRpuLs ( ) ; case XRESETPS_RSTID_PS_ONLY : return XResetPs_PulseResetPsOnly ( ) ; default : break ; } RegAddr = ResetMap [ ResetID ] . SlcrregAddr ; RegBitmask = ResetMap [ ResetID ] . SlcrregBitmask ; if ( ( ResetMap [ ResetID ] . PulseType == XRESETPS_PT_DLY_PSCHK ) && ( ResetMap [ ResetID ] . PwrStateBitmask != XRESETPS_BM_INVALID ) ) { RegValue = XResetPs_ReadReg ( XRESETPS_PMU_GLB_PWR_STATUS ) ; if ( ResetMap [ ResetID ] . PwrStateBitmask != ( RegValue && ResetMap [ ResetID ] . PwrStateBitmask ) ) { return XST_REGISTER_ERROR ; } } RegValue = XResetPs_ReadReg ( RegAddr ) ; RegValue |= RegBitmask ; XResetPs_WriteReg ( RegAddr , RegValue ) ; if ( ResetMap [ ResetID ] . PulseType != XRESETPS_PT_NO_DLY_NO_PSCHK ) { TimeOut = XRESETPS_PULSE_PROP_DELAY ; while ( TimeOut > 0U ) { TimeOut -- ; } } RegValue = XResetPs_ReadReg ( RegAddr ) ; RegValue &= ( ~ RegBitmask ) ; XResetPs_WriteReg ( RegAddr , RegValue ) ; if ( ResetMap [ ResetID ] . PulseType != XRESETPS_PT_NO_DLY_NO_PSCHK ) { TimeOut = XRESETPS_PULSE_PROP_DELAY ; while ( TimeOut > 0U ) { TimeOut -- ; } } return XST_SUCCESS ; #endif }
Pulse reset for specific peripheral based on reset ID.
Pulse reset for specific peripheral based on reset ID .
/* Arguments validation */ /* Pulse reset via PMUFW */ /* Ignoring Nodes that donot support pulse reset */ /* Handling specific pulse resets */ /* Power state mask validation */ /* Enable bit to assert reset */ /* Wait for assert propagation */ /* Disable bit to deassert reset */ /* Wait for release propagation */