XilinxProcessorIPLib/drivers/mcdma/src/xmcdma_bd.c
u32 XMcdma_SetChanCoalesceDelay(XMcdma_ChanCtrl *Chan, u32 IrqCoalesce, u32 IrqDelay)
{
	u32 Cr;
	u32 Offset;

	Offset = (Chan->Chan_id - 1) * XMCDMA_NXTCHAN_OFFSET;

	Cr = XMcdma_ReadReg(Chan->ChanBase, XMCDMA_CR_OFFSET + Offset);

	if (IrqCoalesce == 0 || IrqCoalesce > 0xFF) {
		xil_printf("Invalid IrqCoalesce Value\n\r");
		return XST_FAILURE;
	}

	Cr = (Cr & ~XMCDMA_COALESCE_MASK) |
		(IrqCoalesce << XMCDMA_COALESCE_SHIFT);

	if (IrqDelay == 0 || IrqDelay > 0xFF) {
		xil_printf("Invalid IrqDelay Value\n\r");
		return XST_FAILURE;
	}

	Cr = (Cr & ~XMCDMA_DELAY_MASK) |
		(IrqDelay << XMCDMA_DELAY_SHIFT);

	XMcdma_WriteReg(Chan->ChanBase, XMCDMA_CR_OFFSET + Offset, Cr);

	return XST_SUCCESS;
}
/*****************************************************************************/
/**
* Set interrupt coalescing parameters for a particular channel.
*
* @param	Chan is the MCDMA Channel to be worked on..
* @param	IrqCoalesce is the Irq Threshold value valid ranges are 1 to 255
* @param	IrqDelay is the Irq Delay value valid ranges are 1 to 255
*
* @return
*		- XST_SUCCESS if Interrupt Coalescing settings updated
*		- XST_FAILURE if IrqCoalesce and IrqDelay parameters are out of range
*
*****************************************************************************/
Set interrupt coalescing parameters for a particular channel.
Set interrupt coalescing parameters for a particular channel .
u32 XMcdma_SetChanCoalesceDelay(XMcdma_ChanCtrl *Chan, u32 IrqCoalesce, u32 IrqDelay)
{
	u32 Cr;
	u32 Offset;
	Offset = (Chan->Chan_id - 1) * XMCDMA_NXTCHAN_OFFSET;
	Cr = XMcdma_ReadReg(Chan->ChanBase, XMCDMA_CR_OFFSET + Offset);
	if (IrqCoalesce == 0 || IrqCoalesce > 0xFF) {
		xil_printf("Invalid IrqCoalesce Value\n\r");
		return XST_FAILURE;
	}
	Cr = (Cr & ~XMCDMA_COALESCE_MASK) |
		(IrqCoalesce << XMCDMA_COALESCE_SHIFT);
	if (IrqDelay == 0 || IrqDelay > 0xFF) {
		xil_printf("Invalid IrqDelay Value\n\r");
		return XST_FAILURE;
	}
	Cr = (Cr & ~XMCDMA_DELAY_MASK) |
		(IrqDelay << XMCDMA_DELAY_SHIFT);
	XMcdma_WriteReg(Chan->ChanBase, XMCDMA_CR_OFFSET + Offset, Cr);
	return XST_SUCCESS;
}
u32 XMcdma_SetChanCoalesceDelay ( XMcdma_ChanCtrl * Chan , u32 IrqCoalesce , u32 IrqDelay ) { u32 Cr ; u32 Offset ; Offset = ( Chan -> Chan_id - 1 ) * XMCDMA_NXTCHAN_OFFSET ; Cr = XMcdma_ReadReg ( Chan -> ChanBase , XMCDMA_CR_OFFSET + Offset ) ; if ( IrqCoalesce == 0 || IrqCoalesce > 0xFF ) { xil_printf ( " \n \r " ) ; return XST_FAILURE ; } Cr = ( Cr & ~ XMCDMA_COALESCE_MASK ) | ( IrqCoalesce << XMCDMA_COALESCE_SHIFT ) ; if ( IrqDelay == 0 || IrqDelay > 0xFF ) { xil_printf ( " \n \r " ) ; return XST_FAILURE ; } Cr = ( Cr & ~ XMCDMA_DELAY_MASK ) | ( IrqDelay << XMCDMA_DELAY_SHIFT ) ; XMcdma_WriteReg ( Chan -> ChanBase , XMCDMA_CR_OFFSET + Offset , Cr ) ; return XST_SUCCESS ; }
Set interrupt coalescing parameters for a particular channel.
Set interrupt coalescing parameters for a particular channel .