lib/sw_services/xilfpga/examples/xfpga_reg_readback_example.c
static int Xfpga_RegReadExample(XFpga *InstancePtr)
{
	u32 CfgReg;

	xil_printf("Value of the Configuration Registers. \r\n\n");

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, CRC) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" CRC -> \t %x \t\r\n", CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, FAR1) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" FAR -> \t %x \t\r\n", CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, FDRI) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" FDRI -> \t %x \t\r\n", CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, FDRO) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" FDRO -> \t %x \t\r\n",  CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, CMD) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" CMD -> \t %x \t\r\n",  CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, CTL0) !=	XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" CTL0 -> \t %x \t\r\n",  CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, MASK) !=	XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" MASK -> \t %x \t\r\n",  CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, STAT) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" STAT -> \t %x \t\r\n",  CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, LOUT) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" LOUT -> \t %x \t\r\n",  CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, COR0) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" COR0 -> \t %x \t\r\n",  CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, MFWR) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" MFWR -> \t %x \t\r\n",  CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, CBC) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" CBC -> \t %x \t\r\n",  CfgReg);


	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, IDCODE) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" IDCODE -> \t %x \t\r\n",  CfgReg & IDCODE_MASK);


	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, AXSS) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" AXSS -> \t %x \t\r\n",  CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, COR1) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" COR1 -> \t %x \t\r\n",  CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, WBSTAR) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" WBSTAR -> \t %x \t\r\n",  CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, TIMER) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" TIMER -> \t %x \t\r\n",  CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, BOOTSTS) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" BOOTSTS -> \t %x \t\r\n",  CfgReg);

	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, CTL1) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" CTL1 -> \t %x \t\r\n",  CfgReg);

	return XST_SUCCESS;
}
/*****************************************************************************/
/**
 *
 * This function reads the configuration registers inside the FPGA.
 *
 * @param	InstancePtr Pointer to the XFpga structure.
 *
 * @return
 *		- XST_SUCCESS if successful
 *		- XST_FAILURE if unsuccessful
 *
 * @note		None.
 *
 *****************************************************************************/
This function reads the configuration registers inside the FPGA.
@param       InstancePtr Pointer to the XFpga structure.

@return
- XST_SUCCESS if successful
- XST_FAILURE if unsuccessful

@note                None.
This function reads the configuration registers inside the FPGA . @param InstancePtr Pointer to the XFpga structure . @return - XST_SUCCESS if successful - XST_FAILURE if unsuccessful @note None .
static int Xfpga_RegReadExample(XFpga *InstancePtr)
{
	u32 CfgReg;
	xil_printf("Value of the Configuration Registers. \r\n\n");
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, CRC) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" CRC -> \t %x \t\r\n", CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, FAR1) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" FAR -> \t %x \t\r\n", CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, FDRI) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" FDRI -> \t %x \t\r\n", CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, FDRO) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" FDRO -> \t %x \t\r\n",  CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, CMD) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" CMD -> \t %x \t\r\n",  CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, CTL0) !=	XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" CTL0 -> \t %x \t\r\n",  CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, MASK) !=	XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" MASK -> \t %x \t\r\n",  CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, STAT) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" STAT -> \t %x \t\r\n",  CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, LOUT) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" LOUT -> \t %x \t\r\n",  CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, COR0) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" COR0 -> \t %x \t\r\n",  CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, MFWR) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" MFWR -> \t %x \t\r\n",  CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, CBC) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" CBC -> \t %x \t\r\n",  CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, IDCODE) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" IDCODE -> \t %x \t\r\n",  CfgReg & IDCODE_MASK);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, AXSS) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" AXSS -> \t %x \t\r\n",  CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, COR1) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" COR1 -> \t %x \t\r\n",  CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, WBSTAR) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" WBSTAR -> \t %x \t\r\n",  CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, TIMER) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" TIMER -> \t %x \t\r\n",  CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, BOOTSTS) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" BOOTSTS -> \t %x \t\r\n",  CfgReg);
	if (XFpga_GetPlConfigReg(InstancePtr, (UINTPTR)&CfgReg, CTL1) != XST_SUCCESS) {
		return XST_FAILURE;
	}
	xil_printf(" CTL1 -> \t %x \t\r\n",  CfgReg);
	return XST_SUCCESS;
}
static int Xfpga_RegReadExample ( XFpga * InstancePtr ) { u32 CfgReg ; xil_printf ( " \r \n \n " ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , CRC ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , FAR1 ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , FDRI ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , FDRO ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , CMD ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , CTL0 ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , MASK ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , STAT ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , LOUT ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , COR0 ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , MFWR ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , CBC ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , IDCODE ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg & IDCODE_MASK ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , AXSS ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , COR1 ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , WBSTAR ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , TIMER ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , BOOTSTS ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; if ( XFpga_GetPlConfigReg ( InstancePtr , ( UINTPTR ) & CfgReg , CTL1 ) != XST_SUCCESS ) { return XST_FAILURE ; } xil_printf ( " \t \t \r \n " , CfgReg ) ; return XST_SUCCESS ; }
This function reads the configuration registers inside the FPGA.
This function reads the configuration registers inside the FPGA .