XilinxProcessorIPLib/drivers/usbpsu/examples/xusb_composite_example.c
static s32 SetupInterruptSystem(struct XUsbPsu *InstancePtr, u16 IntcDeviceID,
		u16 UsbIntrId, void *IntcPtr)
{
	s32 Status;

	XScuGic_Config *IntcConfig; /* The configuration parameters of the
				       interrupt controller */

	XScuGic *IntcInstancePtr = (XScuGic *)IntcPtr;

	/* Initialize the interrupt controller driver */
	IntcConfig = XScuGic_LookupConfig(IntcDeviceID);
	if (NULL == IntcConfig)
		return XST_FAILURE;

	Status = XScuGic_CfgInitialize(IntcInstancePtr, IntcConfig,
			IntcConfig->CpuBaseAddress);
	if (Status != XST_SUCCESS)
		return XST_FAILURE;

	/* Connect to the interrupt controller */
	Status = XScuGic_Connect(IntcInstancePtr, UsbIntrId,
			(Xil_ExceptionHandler)XUsbPsu_IntrHandler,
			(void *)InstancePtr);
	if (Status != XST_SUCCESS)
		return XST_FAILURE;

#ifdef XUSBPSU_HIBERNATION_ENABLE
	Status = XScuGic_Connect(IntcInstancePtr, USB_WAKEUP_INTR_ID,
			(Xil_ExceptionHandler)XUsbPsu_WakeUpIntrHandler,
			(void *)InstancePtr);
	if (Status != XST_SUCCESS)
		return XST_FAILURE;
#endif

	/* Enable the interrupt for the USB */
	XScuGic_Enable(IntcInstancePtr, UsbIntrId);
#ifdef XUSBPSU_HIBERNATION_ENABLE
	XScuGic_Enable(IntcInstancePtr, USB_WAKEUP_INTR_ID);
#endif

	/*
	 * Enable interrupts for Reset, Disconnect, ConnectionDone, Link State
	 * Wakeup and Overflow events.
	 */
	XUsbPsu_EnableIntr(InstancePtr, XUSBPSU_DEVTEN_EVNTOVERFLOWEN |
			XUSBPSU_DEVTEN_WKUPEVTEN |
			XUSBPSU_DEVTEN_ULSTCNGEN |
			XUSBPSU_DEVTEN_CONNECTDONEEN |
			XUSBPSU_DEVTEN_USBRSTEN |
			XUSBPSU_DEVTEN_DISCONNEVTEN);

#ifdef XUSBPSU_HIBERNATION_ENABLE
	if (InstancePtr->HasHibernation)
		XUsbPsu_EnableIntr(InstancePtr,
				XUSBPSU_DEVTEN_HIBERNATIONREQEVTEN);
#endif

	/*
	 * Connect the interrupt controller interrupt handler to the hardware
	 * interrupt handling logic in the ARM processor.
	 */
	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
			(Xil_ExceptionHandler)XScuGic_InterruptHandler,
			IntcInstancePtr);

	/* Enable interrupts in the ARM */
	Xil_ExceptionEnable();

	return XST_SUCCESS;
}
/****************************************************************************/
/**
* This function setups the interrupt system such that interrupts can occur.
* This function is application specific since the actual system may or may not
* have an interrupt controller.  The USB controller could be
* directly connected to a processor without an interrupt controller.
* The user should modify this function to fit the application.
*
* @param	InstancePtr is a pointer to the XUsbPsu instance.
* @param	IntcDeviceID is the unique ID of the interrupt controller
* @param	USB_INTR_ID is the interrupt ID of the USB controller
* @param	IntcPtr is a pointer to the interrupt controller
*			instance.
*
* @return	XST_SUCCESS if successful, otherwise XST_FAILURE.
*
* @note		None.
*
*****************************************************************************/
This function setups the interrupt system such that interrupts can occur.
This function is application specific since the actual system may or may not
have an interrupt controller.  The USB controller could be
directly connected to a processor without an interrupt controller.
The user should modify this function to fit the application.
This function setups the interrupt system such that interrupts can occur . This function is application specific since the actual system may or may not have an interrupt controller . The USB controller could be directly connected to a processor without an interrupt controller . The user should modify this function to fit the application .
static s32 SetupInterruptSystem(struct XUsbPsu *InstancePtr, u16 IntcDeviceID,
		u16 UsbIntrId, void *IntcPtr)
{
	s32 Status;
	XScuGic_Config *IntcConfig; 
	XScuGic *IntcInstancePtr = (XScuGic *)IntcPtr;
	IntcConfig = XScuGic_LookupConfig(IntcDeviceID);
	if (NULL == IntcConfig)
		return XST_FAILURE;
	Status = XScuGic_CfgInitialize(IntcInstancePtr, IntcConfig,
			IntcConfig->CpuBaseAddress);
	if (Status != XST_SUCCESS)
		return XST_FAILURE;
	Status = XScuGic_Connect(IntcInstancePtr, UsbIntrId,
			(Xil_ExceptionHandler)XUsbPsu_IntrHandler,
			(void *)InstancePtr);
	if (Status != XST_SUCCESS)
		return XST_FAILURE;
#ifdef XUSBPSU_HIBERNATION_ENABLE
	Status = XScuGic_Connect(IntcInstancePtr, USB_WAKEUP_INTR_ID,
			(Xil_ExceptionHandler)XUsbPsu_WakeUpIntrHandler,
			(void *)InstancePtr);
	if (Status != XST_SUCCESS)
		return XST_FAILURE;
#endif
	XScuGic_Enable(IntcInstancePtr, UsbIntrId);
#ifdef XUSBPSU_HIBERNATION_ENABLE
	XScuGic_Enable(IntcInstancePtr, USB_WAKEUP_INTR_ID);
#endif
	XUsbPsu_EnableIntr(InstancePtr, XUSBPSU_DEVTEN_EVNTOVERFLOWEN |
			XUSBPSU_DEVTEN_WKUPEVTEN |
			XUSBPSU_DEVTEN_ULSTCNGEN |
			XUSBPSU_DEVTEN_CONNECTDONEEN |
			XUSBPSU_DEVTEN_USBRSTEN |
			XUSBPSU_DEVTEN_DISCONNEVTEN);
#ifdef XUSBPSU_HIBERNATION_ENABLE
	if (InstancePtr->HasHibernation)
		XUsbPsu_EnableIntr(InstancePtr,
				XUSBPSU_DEVTEN_HIBERNATIONREQEVTEN);
#endif
	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
			(Xil_ExceptionHandler)XScuGic_InterruptHandler,
			IntcInstancePtr);
	Xil_ExceptionEnable();
	return XST_SUCCESS;
}
static s32 SetupInterruptSystem ( struct XUsbPsu * InstancePtr , u16 IntcDeviceID , u16 UsbIntrId , void * IntcPtr ) { s32 Status ; XScuGic_Config * IntcConfig ; XScuGic * IntcInstancePtr = ( XScuGic * ) IntcPtr ; IntcConfig = XScuGic_LookupConfig ( IntcDeviceID ) ; if ( NULL == IntcConfig ) return XST_FAILURE ; Status = XScuGic_CfgInitialize ( IntcInstancePtr , IntcConfig , IntcConfig -> CpuBaseAddress ) ; if ( Status != XST_SUCCESS ) return XST_FAILURE ; Status = XScuGic_Connect ( IntcInstancePtr , UsbIntrId , ( Xil_ExceptionHandler ) XUsbPsu_IntrHandler , ( void * ) InstancePtr ) ; if ( Status != XST_SUCCESS ) return XST_FAILURE ; #ifdef XUSBPSU_HIBERNATION_ENABLE Status = XScuGic_Connect ( IntcInstancePtr , USB_WAKEUP_INTR_ID , ( Xil_ExceptionHandler ) XUsbPsu_WakeUpIntrHandler , ( void * ) InstancePtr ) ; if ( Status != XST_SUCCESS ) return XST_FAILURE ; #endif XScuGic_Enable ( IntcInstancePtr , UsbIntrId ) ; #ifdef XUSBPSU_HIBERNATION_ENABLE XScuGic_Enable ( IntcInstancePtr , USB_WAKEUP_INTR_ID ) ; #endif XUsbPsu_EnableIntr ( InstancePtr , XUSBPSU_DEVTEN_EVNTOVERFLOWEN | XUSBPSU_DEVTEN_WKUPEVTEN | XUSBPSU_DEVTEN_ULSTCNGEN | XUSBPSU_DEVTEN_CONNECTDONEEN | XUSBPSU_DEVTEN_USBRSTEN | XUSBPSU_DEVTEN_DISCONNEVTEN ) ; #ifdef XUSBPSU_HIBERNATION_ENABLE if ( InstancePtr -> HasHibernation ) XUsbPsu_EnableIntr ( InstancePtr , XUSBPSU_DEVTEN_HIBERNATIONREQEVTEN ) ; #endif Xil_ExceptionRegisterHandler ( XIL_EXCEPTION_ID_INT , ( Xil_ExceptionHandler ) XScuGic_InterruptHandler , IntcInstancePtr ) ; Xil_ExceptionEnable ( ) ; return XST_SUCCESS ; }
This function setups the interrupt system such that interrupts can occur.
This function setups the interrupt system such that interrupts can occur .
/* The configuration parameters of the
				       interrupt controller */ /* Initialize the interrupt controller driver */ /* Connect to the interrupt controller */ /* Enable the interrupt for the USB */ /*
	 * Enable interrupts for Reset, Disconnect, ConnectionDone, Link State
	 * Wakeup and Overflow events.
	 */ /*
	 * Connect the interrupt controller interrupt handler to the hardware
	 * interrupt handling logic in the ARM processor.
	 */ /* Enable interrupts in the ARM */