lib/sw_apps/zynqmp_fsbl/src/xfsbl_ddr_init.c
static void XFsbl_MrsFunc(u32 Addr, u32 Rank, u32 Mr07)
{
	u32 Val;
	u32 RegVal;

	Val =  ((Addr & 0x3FFFFU) << 0U);
	Xil_Out32(XFSBL_DDRC_BASE_ADDR + 0x14U, Val);

	RegVal = Xil_In32(XFSBL_DDRC_BASE_ADDR + 0x10U);
	RegVal |= (0x1U << 31U);

	RegVal &= ~(0x1U << 31U);
	RegVal |= (0x1U << 31U);

	if (Mr07 != 0U) {
		RegVal &= ~(0xFU << 12U);
		RegVal |= (Mr07 << 12U);
	}

	RegVal &= ~(0x3U << 4U);
	RegVal |= (Rank << 4U);

	RegVal &= ~(0x1U << 0U);

	Xil_Out32(XFSBL_DDRC_BASE_ADDR + 0x10U, RegVal);

	RegVal = Xil_In32(DDRC_MRSTAT_OFFSET);
	while ((RegVal & 0x1U) != 0x0U)
		RegVal = Xil_In32(DDRC_MRSTAT_OFFSET);

	for (u32 i = 0U; i < 10U; i++) {
		RegVal = Xil_In32(DDRC_MRSTAT_OFFSET);
	}
}
/*****************************************************************************/
/**
 * This function sets the Mode Register with specific rank of DDR
 *
 * @param	Addr is the Address of the MR Register
 * @param	Rank is the rank of the DDR
 * @param	Mr07 is the value to be set in MR Register
 *
 * @return	None
 *
 *****************************************************************************/
This function sets the Mode Register with specific rank of DDR
@param       Addr is the Address of the MR Register
@param       Rank is the rank of the DDR
@param       Mr07 is the value to be set in MR Register

@return      None
This function sets the Mode Register with specific rank of DDR @param Addr is the Address of the MR Register @param Rank is the rank of the DDR @param Mr07 is the value to be set in MR Register @return None
static void XFsbl_MrsFunc(u32 Addr, u32 Rank, u32 Mr07)
{
	u32 Val;
	u32 RegVal;
	Val =  ((Addr & 0x3FFFFU) << 0U);
	Xil_Out32(XFSBL_DDRC_BASE_ADDR + 0x14U, Val);
	RegVal = Xil_In32(XFSBL_DDRC_BASE_ADDR + 0x10U);
	RegVal |= (0x1U << 31U);
	RegVal &= ~(0x1U << 31U);
	RegVal |= (0x1U << 31U);
	if (Mr07 != 0U) {
		RegVal &= ~(0xFU << 12U);
		RegVal |= (Mr07 << 12U);
	}
	RegVal &= ~(0x3U << 4U);
	RegVal |= (Rank << 4U);
	RegVal &= ~(0x1U << 0U);
	Xil_Out32(XFSBL_DDRC_BASE_ADDR + 0x10U, RegVal);
	RegVal = Xil_In32(DDRC_MRSTAT_OFFSET);
	while ((RegVal & 0x1U) != 0x0U)
		RegVal = Xil_In32(DDRC_MRSTAT_OFFSET);
	for (u32 i = 0U; i < 10U; i++) {
		RegVal = Xil_In32(DDRC_MRSTAT_OFFSET);
	}
}
static void XFsbl_MrsFunc ( u32 Addr , u32 Rank , u32 Mr07 ) { u32 Val ; u32 RegVal ; Val = ( ( Addr & 0x3FFFFU ) << 0U ) ; Xil_Out32 ( XFSBL_DDRC_BASE_ADDR + 0x14U , Val ) ; RegVal = Xil_In32 ( XFSBL_DDRC_BASE_ADDR + 0x10U ) ; RegVal |= ( 0x1U << 31U ) ; RegVal &= ~ ( 0x1U << 31U ) ; RegVal |= ( 0x1U << 31U ) ; if ( Mr07 != 0U ) { RegVal &= ~ ( 0xFU << 12U ) ; RegVal |= ( Mr07 << 12U ) ; } RegVal &= ~ ( 0x3U << 4U ) ; RegVal |= ( Rank << 4U ) ; RegVal &= ~ ( 0x1U << 0U ) ; Xil_Out32 ( XFSBL_DDRC_BASE_ADDR + 0x10U , RegVal ) ; RegVal = Xil_In32 ( DDRC_MRSTAT_OFFSET ) ; while ( ( RegVal & 0x1U ) != 0x0U ) RegVal = Xil_In32 ( DDRC_MRSTAT_OFFSET ) ; for ( u32 i = 0U ; i < 10U ; i ++ ) { RegVal = Xil_In32 ( DDRC_MRSTAT_OFFSET ) ; } }
This function sets the Mode Register with specific rank of DDR
 @param       Addr is the Address of the MR Register
 @param       Rank is the rank of the DDR
 @param       Mr07 is the value to be set in MR Register
This function sets the Mode Register with specific rank of DDR @param Addr is the Address of the MR Register @param Rank is the rank of the DDR @param Mr07 is the value to be set in MR Register