XilinxProcessorIPLib/drivers/intc/src/xintc.c
void XIntc_Stop(XIntc * InstancePtr)
{
	/*
	 * Assert the arguments
	 */
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);

	/*
	 * Stop all interrupts from occurring through the interrupt controller by
	 * disabling all interrupts in the MER register
	 */
	XIntc_Out32(InstancePtr->BaseAddress + XIN_MER_OFFSET, 0);

	InstancePtr->IsStarted = 0;
}
/*****************************************************************************/
/**
*
* Stops the interrupt controller by disabling the output from the controller
* so that no interrupts will be caused by the interrupt controller.
*
* @param	InstancePtr is a pointer to the XIntc instance to be worked on.
*
* @return	None.
*
* @note		None.
*
******************************************************************************/
Stops the interrupt controller by disabling the output from the controller
so that no interrupts will be caused by the interrupt controller.
Stops the interrupt controller by disabling the output from the controller so that no interrupts will be caused by the interrupt controller .
void XIntc_Stop(XIntc * InstancePtr)
{
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	XIntc_Out32(InstancePtr->BaseAddress + XIN_MER_OFFSET, 0);
	InstancePtr->IsStarted = 0;
}
void XIntc_Stop ( XIntc * InstancePtr ) { Xil_AssertVoid ( InstancePtr != NULL ) ; Xil_AssertVoid ( InstancePtr -> IsReady == XIL_COMPONENT_IS_READY ) ; XIntc_Out32 ( InstancePtr -> BaseAddress + XIN_MER_OFFSET , 0 ) ; InstancePtr -> IsStarted = 0 ; }
Stops the interrupt controller by disabling the output from the controller
so that no interrupts will be caused by the interrupt controller.
Stops the interrupt controller by disabling the output from the controller so that no interrupts will be caused by the interrupt controller .
/*
	 * Assert the arguments
	 */ /*
	 * Stop all interrupts from occurring through the interrupt controller by
	 * disabling all interrupts in the MER register
	 */