src/dpdk/drivers/net/igc/base/igc_mac.c
s32 igc_force_mac_fc_generic(struct igc_hw *hw)
{
	u32 ctrl;

	DEBUGFUNC("igc_force_mac_fc_generic");

	ctrl = IGC_READ_REG(hw, IGC_CTRL);

	/* Because we didn't get link via the internal auto-negotiation
	 * mechanism (we either forced link or we got link via PHY
	 * auto-neg), we have to manually enable/disable transmit an
	 * receive flow control.
	 *
	 * The "Case" statement below enables/disable flow control
	 * according to the "hw->fc.current_mode" parameter.
	 *
	 * The possible values of the "fc" parameter are:
	 *      0:  Flow control is completely disabled
	 *      1:  Rx flow control is enabled (we can receive pause
	 *          frames but not send pause frames).
	 *      2:  Tx flow control is enabled (we can send pause frames
	 *          frames but we do not receive pause frames).
	 *      3:  Both Rx and Tx flow control (symmetric) is enabled.
	 *  other:  No other values should be possible at this point.
	 */
	DEBUGOUT1("hw->fc.current_mode = %u\n", hw->fc.current_mode);

	switch (hw->fc.current_mode) {
	case igc_fc_none:
		ctrl &= (~(IGC_CTRL_TFCE | IGC_CTRL_RFCE));
		break;
	case igc_fc_rx_pause:
		ctrl &= (~IGC_CTRL_TFCE);
		ctrl |= IGC_CTRL_RFCE;
		break;
	case igc_fc_tx_pause:
		ctrl &= (~IGC_CTRL_RFCE);
		ctrl |= IGC_CTRL_TFCE;
		break;
	case igc_fc_full:
		ctrl |= (IGC_CTRL_TFCE | IGC_CTRL_RFCE);
		break;
	default:
		DEBUGOUT("Flow control param set incorrectly\n");
		return -IGC_ERR_CONFIG;
	}

	IGC_WRITE_REG(hw, IGC_CTRL, ctrl);

	return IGC_SUCCESS;
}
/**
 *  igc_force_mac_fc_generic - Force the MAC's flow control settings
 *  @hw: pointer to the HW structure
 *
 *  Force the MAC's flow control settings.  Sets the TFCE and RFCE bits in the
 *  device control register to reflect the adapter settings.  TFCE and RFCE
 *  need to be explicitly set by software when a copper PHY is used because
 *  autonegotiation is managed by the PHY rather than the MAC.  Software must
 *  also configure these bits when link is forced on a fiber connection.
 **/
Force the MAC's flow control settings
@hw: pointer to the HW structure

Force the MAC's flow control settings.  Sets the TFCE and RFCE bits in the
device control register to reflect the adapter settings.  TFCE and RFCE
need to be explicitly set by software when a copper PHY is used because
autonegotiation is managed by the PHY rather than the MAC.  Software must
also configure these bits when link is forced on a fiber connection.
Force the MAC ' s flow control settings @hw : pointer to the HW structure Force the MAC ' s flow control settings . Sets the TFCE and RFCE bits in the device control register to reflect the adapter settings . TFCE and RFCE need to be explicitly set by software when a copper PHY is used because autonegotiation is managed by the PHY rather than the MAC . Software must also configure these bits when link is forced on a fiber connection .
s32 igc_force_mac_fc_generic(struct igc_hw *hw)
{
	u32 ctrl;
	DEBUGFUNC("igc_force_mac_fc_generic");
	ctrl = IGC_READ_REG(hw, IGC_CTRL);
	DEBUGOUT1("hw->fc.current_mode = %u\n", hw->fc.current_mode);
	switch (hw->fc.current_mode) {
	case igc_fc_none:
		ctrl &= (~(IGC_CTRL_TFCE | IGC_CTRL_RFCE));
		break;
	case igc_fc_rx_pause:
		ctrl &= (~IGC_CTRL_TFCE);
		ctrl |= IGC_CTRL_RFCE;
		break;
	case igc_fc_tx_pause:
		ctrl &= (~IGC_CTRL_RFCE);
		ctrl |= IGC_CTRL_TFCE;
		break;
	case igc_fc_full:
		ctrl |= (IGC_CTRL_TFCE | IGC_CTRL_RFCE);
		break;
	default:
		DEBUGOUT("Flow control param set incorrectly\n");
		return -IGC_ERR_CONFIG;
	}
	IGC_WRITE_REG(hw, IGC_CTRL, ctrl);
	return IGC_SUCCESS;
}
s32 igc_force_mac_fc_generic ( struct igc_hw * hw ) { u32 ctrl ; DEBUGFUNC ( " " ) ; ctrl = IGC_READ_REG ( hw , IGC_CTRL ) ; DEBUGOUT1 ( " \n " , hw -> fc . current_mode ) ; switch ( hw -> fc . current_mode ) { case igc_fc_none : ctrl &= ( ~ ( IGC_CTRL_TFCE | IGC_CTRL_RFCE ) ) ; break ; case igc_fc_rx_pause : ctrl &= ( ~ IGC_CTRL_TFCE ) ; ctrl |= IGC_CTRL_RFCE ; break ; case igc_fc_tx_pause : ctrl &= ( ~ IGC_CTRL_RFCE ) ; ctrl |= IGC_CTRL_TFCE ; break ; case igc_fc_full : ctrl |= ( IGC_CTRL_TFCE | IGC_CTRL_RFCE ) ; break ; default : DEBUGOUT ( " \n " ) ; return - IGC_ERR_CONFIG ; } IGC_WRITE_REG ( hw , IGC_CTRL , ctrl ) ; return IGC_SUCCESS ; }
igc_force_mac_fc_generic - Force the MAC's flow control settings
  @hw: pointer to the HW structure
igc_force_mac_fc_generic - Force the MAC ' s flow control settings @hw : pointer to the HW structure
/* Because we didn't get link via the internal auto-negotiation
	 * mechanism (we either forced link or we got link via PHY
	 * auto-neg), we have to manually enable/disable transmit an
	 * receive flow control.
	 *
	 * The "Case" statement below enables/disable flow control
	 * according to the "hw->fc.current_mode" parameter.
	 *
	 * The possible values of the "fc" parameter are:
	 *      0:  Flow control is completely disabled
	 *      1:  Rx flow control is enabled (we can receive pause
	 *          frames but not send pause frames).
	 *      2:  Tx flow control is enabled (we can send pause frames
	 *          frames but we do not receive pause frames).
	 *      3:  Both Rx and Tx flow control (symmetric) is enabled.
	 *  other:  No other values should be possible at this point.
	 */