XilinxProcessorIPLib/drivers/axicdma/examples/xaxicdma_example_sg_intr.c
static int SetupTransfer(XAxiCdma * InstancePtr)
{
	int Status;
	XAxiCdma_Bd BdTemplate;
	int BdCount;
	u8 *SrcBufferPtr;
	int Index;

	/* Disable all interrupts
	 */
	XAxiCdma_IntrDisable(InstancePtr, XAXICDMA_XR_IRQ_ALL_MASK);

	/* Setup BD ring */
	BdCount = XAxiCdma_BdRingCntCalc(XAXICDMA_BD_MINIMUM_ALIGNMENT,
				    BD_SPACE_HIGH - BD_SPACE_BASE + 1,
				    (UINTPTR)BD_SPACE_BASE);

	if (BdCount < 1) {
		xdbg_printf(XDBG_DEBUG_ERROR, "Invalid buffer %x\r\n",
			(unsigned int)BD_SPACE_BASE);
		return XST_FAILURE;
	}

	Status = XAxiCdma_BdRingCreate(InstancePtr, BD_SPACE_BASE,
		BD_SPACE_BASE, XAXICDMA_BD_MINIMUM_ALIGNMENT, BdCount);
	if (Status != XST_SUCCESS) {
		xdbg_printf(XDBG_DEBUG_ERROR, "Create BD ring failed %d\r\n",
		Status);

		return XST_FAILURE;
	}

	/*
	 * Setup a BD template to copy to every BD.
	 */
	XAxiCdma_BdClear(&BdTemplate);
	Status = XAxiCdma_BdRingClone(InstancePtr, &BdTemplate);
	if (Status != XST_SUCCESS) {
		xdbg_printf(XDBG_DEBUG_ERROR, "Clone BD ring failed %d\r\n",
		Status);

		return XST_FAILURE;
	}

	/* Initialize receive buffer to 0's and transmit buffer with pattern
	 */
	memset((void *)ReceiveBufferPtr, 0,
		MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER);

	SrcBufferPtr = (u8 *)TransmitBufferPtr;
	for(Index = 0; Index < MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER;
								Index++) {
		SrcBufferPtr[Index] = Index & 0xFF;
	}

	/* Flush the SrcBuffer before the DMA transfer, in case the Data Cache
	 * is enabled
	 */
	Xil_DCacheFlushRange((UINTPTR)TransmitBufferPtr,
		MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER);
	Xil_DCacheFlushRange((UINTPTR)ReceiveBufferPtr,
		MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER);

	Status = XAxiCdma_SetCoalesce(InstancePtr, COALESCING_COUNT,
		DELAY_COUNT);
	if (Status != XST_SUCCESS) {
		xdbg_printf(XDBG_DEBUG_ERROR,
		     "Set coalescing failed %d\r\n", Status);

		return XST_FAILURE;
	}

	return XST_SUCCESS;
}
/*****************************************************************************/
/**
*
* This function sets up the DMA engine to be ready for scatter gather transfer
*
* @param    InstancePtr is the pointer to the instance of the DMA engine.
*
* @return
* 		- XST_SUCCESS if the setup is successful
* 		- XST_FAILURE if following error occurs:
* 			BD buffer address is not aligned
* 			BD ring creation failed
* 			BD ring clone failed
* 			Set coalescing failed
*
* @note		None.
*
******************************************************************************/
This function sets up the DMA engine to be ready for scatter gather transfer
This function sets up the DMA engine to be ready for scatter gather transfer
static int SetupTransfer(XAxiCdma * InstancePtr)
{
	int Status;
	XAxiCdma_Bd BdTemplate;
	int BdCount;
	u8 *SrcBufferPtr;
	int Index;
	XAxiCdma_IntrDisable(InstancePtr, XAXICDMA_XR_IRQ_ALL_MASK);
	BdCount = XAxiCdma_BdRingCntCalc(XAXICDMA_BD_MINIMUM_ALIGNMENT,
				    BD_SPACE_HIGH - BD_SPACE_BASE + 1,
				    (UINTPTR)BD_SPACE_BASE);
	if (BdCount < 1) {
		xdbg_printf(XDBG_DEBUG_ERROR, "Invalid buffer %x\r\n",
			(unsigned int)BD_SPACE_BASE);
		return XST_FAILURE;
	}
	Status = XAxiCdma_BdRingCreate(InstancePtr, BD_SPACE_BASE,
		BD_SPACE_BASE, XAXICDMA_BD_MINIMUM_ALIGNMENT, BdCount);
	if (Status != XST_SUCCESS) {
		xdbg_printf(XDBG_DEBUG_ERROR, "Create BD ring failed %d\r\n",
		Status);
		return XST_FAILURE;
	}
	XAxiCdma_BdClear(&BdTemplate);
	Status = XAxiCdma_BdRingClone(InstancePtr, &BdTemplate);
	if (Status != XST_SUCCESS) {
		xdbg_printf(XDBG_DEBUG_ERROR, "Clone BD ring failed %d\r\n",
		Status);
		return XST_FAILURE;
	}
	memset((void *)ReceiveBufferPtr, 0,
		MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER);
	SrcBufferPtr = (u8 *)TransmitBufferPtr;
	for(Index = 0; Index < MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER;
								Index++) {
		SrcBufferPtr[Index] = Index & 0xFF;
	}
	Xil_DCacheFlushRange((UINTPTR)TransmitBufferPtr,
		MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER);
	Xil_DCacheFlushRange((UINTPTR)ReceiveBufferPtr,
		MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER);
	Status = XAxiCdma_SetCoalesce(InstancePtr, COALESCING_COUNT,
		DELAY_COUNT);
	if (Status != XST_SUCCESS) {
		xdbg_printf(XDBG_DEBUG_ERROR,
		     "Set coalescing failed %d\r\n", Status);
		return XST_FAILURE;
	}
	return XST_SUCCESS;
}
static int SetupTransfer ( XAxiCdma * InstancePtr ) { int Status ; XAxiCdma_Bd BdTemplate ; int BdCount ; u8 * SrcBufferPtr ; int Index ; XAxiCdma_IntrDisable ( InstancePtr , XAXICDMA_XR_IRQ_ALL_MASK ) ; BdCount = XAxiCdma_BdRingCntCalc ( XAXICDMA_BD_MINIMUM_ALIGNMENT , BD_SPACE_HIGH - BD_SPACE_BASE + 1 , ( UINTPTR ) BD_SPACE_BASE ) ; if ( BdCount < 1 ) { xdbg_printf ( XDBG_DEBUG_ERROR , " \r \n " , ( unsigned int ) BD_SPACE_BASE ) ; return XST_FAILURE ; } Status = XAxiCdma_BdRingCreate ( InstancePtr , BD_SPACE_BASE , BD_SPACE_BASE , XAXICDMA_BD_MINIMUM_ALIGNMENT , BdCount ) ; if ( Status != XST_SUCCESS ) { xdbg_printf ( XDBG_DEBUG_ERROR , " \r \n " , Status ) ; return XST_FAILURE ; } XAxiCdma_BdClear ( & BdTemplate ) ; Status = XAxiCdma_BdRingClone ( InstancePtr , & BdTemplate ) ; if ( Status != XST_SUCCESS ) { xdbg_printf ( XDBG_DEBUG_ERROR , " \r \n " , Status ) ; return XST_FAILURE ; } memset ( ( void * ) ReceiveBufferPtr , 0 , MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER ) ; SrcBufferPtr = ( u8 * ) TransmitBufferPtr ; for ( Index = 0 ; Index < MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER ; Index ++ ) { SrcBufferPtr [ Index ] = Index & 0xFF ; } Xil_DCacheFlushRange ( ( UINTPTR ) TransmitBufferPtr , MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER ) ; Xil_DCacheFlushRange ( ( UINTPTR ) ReceiveBufferPtr , MAX_PKT_LEN * NUMBER_OF_BDS_TO_TRANSFER ) ; Status = XAxiCdma_SetCoalesce ( InstancePtr , COALESCING_COUNT , DELAY_COUNT ) ; if ( Status != XST_SUCCESS ) { xdbg_printf ( XDBG_DEBUG_ERROR , " \r \n " , Status ) ; return XST_FAILURE ; } return XST_SUCCESS ; }
This function sets up the DMA engine to be ready for scatter gather transfer
This function sets up the DMA engine to be ready for scatter gather transfer
/* Disable all interrupts
	 */ /* Setup BD ring */ /*
	 * Setup a BD template to copy to every BD.
	 */ /* Initialize receive buffer to 0's and transmit buffer with pattern
	 */ /* Flush the SrcBuffer before the DMA transfer, in case the Data Cache
	 * is enabled
	 */