src/system_mt7687.c
void top_xtal_init(void)
{
    uint32_t  u4RegVal = 0;
    unsigned long reg = HAL_REG_32(TOP_AON_CM4_STRAP_STA);
    reg = (reg >> 13) & 0x00000007;

    u4RegVal = HAL_REG_32(TOP_AON_CM4_PWRCTLCR);
    u4RegVal &= (~(CM4_PWRCTLCR_CM4_XTAL_FREQ_MASK));

    switch (reg) {
        case 0:
            gXtalFreq = 20000000;  /* 20Mhz */
            u4RegVal |= BIT(CM4_PWRCTLCR_CM4_XTAL_FREQ_20M_OFFSET);
            break;
        case 1:
            gXtalFreq = 40000000;  /* 40Mhz */
            u4RegVal |= BIT(CM4_PWRCTLCR_CM4_XTAL_FREQ_40M_OFFSET);
            break;
        case 2:
            gXtalFreq = 26000000;  /* 26Mhz */
            u4RegVal |= BIT(CM4_PWRCTLCR_CM4_XTAL_FREQ_26M_OFFSET);
            break;
        case 3:
            gXtalFreq = 52000000;  /* 52Mhz */
            u4RegVal |= BIT(CM4_PWRCTLCR_CM4_XTAL_FREQ_52M_OFFSET);
            break;
        case 4:
        case 5:
        case 6:
        case 7:
            gXtalFreq = 40000000;  /* fall through */
            u4RegVal |= BIT(CM4_PWRCTLCR_CM4_XTAL_FREQ_40M_OFFSET);
            break;
    }

    HAL_REG_32(TOP_AON_CM4_PWRCTLCR) = u4RegVal;
    gCpuFrequency = gXtalFreq;
    SystemCoreClockUpdate();
    SysTick_Set(SystemCoreClock / 1000); /* 1ms trigger */
}
/**
  * @brief  This function is to initialize XTAL based on HW strap.
  * @param  None
  * @retval None
  */
@brief  This function is to initialize XTAL based on HW strap.
@param  None
@retval None
@brief This function is to initialize XTAL based on HW strap . @param None @retval None
void top_xtal_init(void)
{
    uint32_t  u4RegVal = 0;
    unsigned long reg = HAL_REG_32(TOP_AON_CM4_STRAP_STA);
    reg = (reg >> 13) & 0x00000007;
    u4RegVal = HAL_REG_32(TOP_AON_CM4_PWRCTLCR);
    u4RegVal &= (~(CM4_PWRCTLCR_CM4_XTAL_FREQ_MASK));
    switch (reg) {
        case 0:
            gXtalFreq = 20000000;  
            u4RegVal |= BIT(CM4_PWRCTLCR_CM4_XTAL_FREQ_20M_OFFSET);
            break;
        case 1:
            gXtalFreq = 40000000;  
            u4RegVal |= BIT(CM4_PWRCTLCR_CM4_XTAL_FREQ_40M_OFFSET);
            break;
        case 2:
            gXtalFreq = 26000000;  
            u4RegVal |= BIT(CM4_PWRCTLCR_CM4_XTAL_FREQ_26M_OFFSET);
            break;
        case 3:
            gXtalFreq = 52000000;  
            u4RegVal |= BIT(CM4_PWRCTLCR_CM4_XTAL_FREQ_52M_OFFSET);
            break;
        case 4:
        case 5:
        case 6:
        case 7:
            gXtalFreq = 40000000;  
            u4RegVal |= BIT(CM4_PWRCTLCR_CM4_XTAL_FREQ_40M_OFFSET);
            break;
    }
    HAL_REG_32(TOP_AON_CM4_PWRCTLCR) = u4RegVal;
    gCpuFrequency = gXtalFreq;
    SystemCoreClockUpdate();
    SysTick_Set(SystemCoreClock / 1000); 
}
void top_xtal_init ( void ) { uint32_t u4RegVal = 0 ; unsigned long reg = HAL_REG_32 ( TOP_AON_CM4_STRAP_STA ) ; reg = ( reg >> 13 ) & 0x00000007 ; u4RegVal = HAL_REG_32 ( TOP_AON_CM4_PWRCTLCR ) ; u4RegVal &= ( ~ ( CM4_PWRCTLCR_CM4_XTAL_FREQ_MASK ) ) ; switch ( reg ) { case 0 : gXtalFreq = 20000000 ; u4RegVal |= BIT ( CM4_PWRCTLCR_CM4_XTAL_FREQ_20M_OFFSET ) ; break ; case 1 : gXtalFreq = 40000000 ; u4RegVal |= BIT ( CM4_PWRCTLCR_CM4_XTAL_FREQ_40M_OFFSET ) ; break ; case 2 : gXtalFreq = 26000000 ; u4RegVal |= BIT ( CM4_PWRCTLCR_CM4_XTAL_FREQ_26M_OFFSET ) ; break ; case 3 : gXtalFreq = 52000000 ; u4RegVal |= BIT ( CM4_PWRCTLCR_CM4_XTAL_FREQ_52M_OFFSET ) ; break ; case 4 : case 5 : case 6 : case 7 : gXtalFreq = 40000000 ; u4RegVal |= BIT ( CM4_PWRCTLCR_CM4_XTAL_FREQ_40M_OFFSET ) ; break ; } HAL_REG_32 ( TOP_AON_CM4_PWRCTLCR ) = u4RegVal ; gCpuFrequency = gXtalFreq ; SystemCoreClockUpdate ( ) ; SysTick_Set ( SystemCoreClock / 1000 ) ; }
@brief  This function is to initialize XTAL based on HW strap.
@brief This function is to initialize XTAL based on HW strap .
/* 20Mhz */ /* 40Mhz */ /* 26Mhz */ /* 52Mhz */ /* fall through */ /* 1ms trigger */