XilinxProcessorIPLib/drivers/v_hdmirx/src/xv_hdmirx_intr.c
static void HdmiRx_PioIntrHandler(XV_HdmiRx *InstancePtr)
{
    u32 Event;
    u32 Data;

    /* Read PIO IN Event register.*/
    Event = XV_HdmiRx_ReadReg(InstancePtr->Config.BaseAddress, (XV_HDMIRX_PIO_IN_EVT_OFFSET));

    /* Clear event flags */
    XV_HdmiRx_WriteReg(InstancePtr->Config.BaseAddress, (XV_HDMIRX_PIO_IN_EVT_OFFSET), (Event));

    /* Read data */
    Data = XV_HdmiRx_ReadReg(InstancePtr->Config.BaseAddress, (XV_HDMIRX_PIO_IN_OFFSET));

    // Cable detect event has occurred
    if ((Event) & (XV_HDMIRX_PIO_IN_DET_MASK)) {

        // Cable is connected
        if ((Data) & (XV_HDMIRX_PIO_IN_DET_MASK)) {
            // Set connected flag
            InstancePtr->Stream.IsConnected = (TRUE);
        }

        // Cable is disconnected
        else {
            // Clear connected flag
            InstancePtr->Stream.IsConnected = (FALSE);

            // Clear SCDC variables
            XV_HdmiRx_DdcScdcClear(InstancePtr);
        }

        // Check if user callback has been registered
        if (InstancePtr->IsConnectCallbackSet) {
            InstancePtr->ConnectCallback(InstancePtr->ConnectRef);
        }
    }

    // Link ready event has occurred
    if ((Event) & (XV_HDMIRX_PIO_IN_LNK_RDY_MASK)) {

    // Set stream status to idle
        InstancePtr->Stream.State = XV_HDMIRX_STATE_STREAM_IDLE;            // The stream idle

        // Load timer
        XV_HdmiRx_TmrStart(InstancePtr,
			XV_HdmiRx_GetTime10Ms(InstancePtr)); // 10 ms
    }

    // Video ready event has occurred
    if ((Event) & (XV_HDMIRX_PIO_IN_VID_RDY_MASK)) {

        // Ready
        if ((Data) & (XV_HDMIRX_PIO_IN_VID_RDY_MASK)) {

            // Check the previous state
            // The link can only change to up when the previous state was init
            // Else there was a glitch on the video ready input
            if (InstancePtr->Stream.State == XV_HDMIRX_STATE_STREAM_INIT) {

				/* Toggle video reset for HDMI RX core */
				XV_HdmiRx_INT_VRST(InstancePtr, TRUE);
				XV_HdmiRx_INT_VRST(InstancePtr, FALSE);

				/* Toggle bridge reset */
				XV_HdmiRx_EXT_VRST(InstancePtr, TRUE);
				XV_HdmiRx_EXT_SYSRST(InstancePtr, TRUE);
				XV_HdmiRx_EXT_VRST(InstancePtr, FALSE);
				XV_HdmiRx_EXT_SYSRST(InstancePtr, FALSE);

            // Set stream status to arm
                InstancePtr->Stream.State = XV_HDMIRX_STATE_STREAM_ARM;         // The stream is armed

                // Load timer - 200 ms (one UHD frame is 40 ms, 5 frames)
                XV_HdmiRx_TmrStart(InstancePtr,
				XV_HdmiRx_GetTime200Ms(InstancePtr));
            }
        }

        // Stream down
        else {
			/* Assert HDMI RX core resets */
			XV_HdmiRx_INT_VRST(InstancePtr, TRUE);
			XV_HdmiRx_INT_LRST(InstancePtr, TRUE);

            /* Clear variables */
            XV_HdmiRx_Clear(InstancePtr);

            // Disable aux and audio peripheral
            // At this state the link clock is not stable.
            // Therefore these two peripheral are disabled to prevent any glitches.
            XV_HdmiRx_AuxDisable(InstancePtr);
            XV_HdmiRx_AudioDisable(InstancePtr);

            /* Disable VTD */
            XV_HdmiRx_VtdDisable(InstancePtr);

            // Disable link
            XV_HdmiRx_LinkEnable(InstancePtr, (FALSE));

            // Disable video
            // MH AI: Don't reset bridge when clock is not stable
            XV_HdmiRx_VideoEnable(InstancePtr, (TRUE));

            XV_HdmiRx_AxisEnable(InstancePtr, (FALSE));

            // Set stream status to down
            InstancePtr->Stream.State = XV_HDMIRX_STATE_STREAM_DOWN;

            // Disable sync loss
            XV_HdmiRx_WriteReg(InstancePtr->Config.BaseAddress,
                (XV_HDMIRX_VTD_CTRL_CLR_OFFSET), (XV_HDMIRX_VTD_CTRL_SYNC_LOSS_MASK));

            // Call stream down callback
            if (InstancePtr->IsStreamDownCallbackSet) {
                InstancePtr->StreamDownCallback(InstancePtr->StreamDownRef);
            }
        }
    }

    // SCDC Scrambler Enable
    if ((Event) & (XV_HDMIRX_PIO_IN_SCDC_SCRAMBLER_ENABLE_MASK)) {

        // Enable scrambler
        if ((Data) & (XV_HDMIRX_PIO_IN_SCDC_SCRAMBLER_ENABLE_MASK)) {
            XV_HdmiRx_SetScrambler(InstancePtr, (TRUE));
        }

        // Disable scrambler
        else {
            XV_HdmiRx_SetScrambler(InstancePtr, (FALSE));
        }
    }

    // Mode
    if ((Event) & (XV_HDMIRX_PIO_IN_MODE_MASK)) {

        // HDMI Mode
        if ((Data) & (XV_HDMIRX_PIO_IN_MODE_MASK)) {
            InstancePtr->Stream.IsHdmi = (TRUE);
        }

        // DVI Mode
        else {
            InstancePtr->Stream.IsHdmi = (FALSE);
        }

        if (InstancePtr->Stream.State == XV_HDMIRX_STATE_STREAM_UP) {

            /* Clear variables */
            XV_HdmiRx_Clear(InstancePtr);

        	// Set stream status to idle
            InstancePtr->Stream.State = XV_HDMIRX_STATE_STREAM_IDLE;

            // Load timer
            XV_HdmiRx_TmrStart(InstancePtr,
			XV_HdmiRx_GetTime10Ms(InstancePtr)); // 10 ms
        }

        // Call mode callback
        if (InstancePtr->IsModeCallbackSet) {
            InstancePtr->ModeCallback(InstancePtr->ModeRef);
        }
    }

    // TMDS clock ratio
    if ((Event) & (XV_HDMIRX_PIO_IN_SCDC_TMDS_CLOCK_RATIO_MASK)) {
        // Call TMDS Ratio callback
        if (InstancePtr->IsTmdsClkRatioCallbackSet) {
            InstancePtr->TmdsClkRatioCallback(InstancePtr->TmdsClkRatioRef);
        }
    }

    /* Bridge Overflow event has occurred */
    if ((Event) & (XV_HDMIRX_PIO_IN_BRDG_OVERFLOW_MASK)) {
        // Check if user callback has been registered
        if (InstancePtr->IsBrdgOverflowCallbackSet) {
            InstancePtr->BrdgOverflowCallback(InstancePtr->BrdgOverflowRef);
        }
    }

}
/*****************************************************************************/
/**
*
* This function is the interrupt handler for the HDMI RX PIO peripheral.
*
* @param    InstancePtr is a pointer to the XV_HdmiRx core instance.
*
* @return   None.
*
* @note     None.
*
******************************************************************************/
This function is the interrupt handler for the HDMI RX PIO peripheral.
This function is the interrupt handler for the HDMI RX PIO peripheral .
static void HdmiRx_PioIntrHandler(XV_HdmiRx *InstancePtr)
{
    u32 Event;
    u32 Data;
    Event = XV_HdmiRx_ReadReg(InstancePtr->Config.BaseAddress, (XV_HDMIRX_PIO_IN_EVT_OFFSET));
    XV_HdmiRx_WriteReg(InstancePtr->Config.BaseAddress, (XV_HDMIRX_PIO_IN_EVT_OFFSET), (Event));
    Data = XV_HdmiRx_ReadReg(InstancePtr->Config.BaseAddress, (XV_HDMIRX_PIO_IN_OFFSET));
    if ((Event) & (XV_HDMIRX_PIO_IN_DET_MASK)) {
        if ((Data) & (XV_HDMIRX_PIO_IN_DET_MASK)) {
            InstancePtr->Stream.IsConnected = (TRUE);
        }
        else {
            InstancePtr->Stream.IsConnected = (FALSE);
            XV_HdmiRx_DdcScdcClear(InstancePtr);
        }
        if (InstancePtr->IsConnectCallbackSet) {
            InstancePtr->ConnectCallback(InstancePtr->ConnectRef);
        }
    }
    if ((Event) & (XV_HDMIRX_PIO_IN_LNK_RDY_MASK)) {
        InstancePtr->Stream.State = XV_HDMIRX_STATE_STREAM_IDLE;            
        XV_HdmiRx_TmrStart(InstancePtr,
			XV_HdmiRx_GetTime10Ms(InstancePtr)); 
    }
    if ((Event) & (XV_HDMIRX_PIO_IN_VID_RDY_MASK)) {
        if ((Data) & (XV_HDMIRX_PIO_IN_VID_RDY_MASK)) {
            if (InstancePtr->Stream.State == XV_HDMIRX_STATE_STREAM_INIT) {
				XV_HdmiRx_INT_VRST(InstancePtr, TRUE);
				XV_HdmiRx_INT_VRST(InstancePtr, FALSE);
				XV_HdmiRx_EXT_VRST(InstancePtr, TRUE);
				XV_HdmiRx_EXT_SYSRST(InstancePtr, TRUE);
				XV_HdmiRx_EXT_VRST(InstancePtr, FALSE);
				XV_HdmiRx_EXT_SYSRST(InstancePtr, FALSE);
                InstancePtr->Stream.State = XV_HDMIRX_STATE_STREAM_ARM;         
                 - 200 ms (one UHD frame is 40 ms, 5 frames)
                XV_HdmiRx_TmrStart(InstancePtr,
				XV_HdmiRx_GetTime200Ms(InstancePtr));
            }
        }
        else {
			XV_HdmiRx_INT_VRST(InstancePtr, TRUE);
			XV_HdmiRx_INT_LRST(InstancePtr, TRUE);
            XV_HdmiRx_Clear(InstancePtr);
            XV_HdmiRx_AuxDisable(InstancePtr);
            XV_HdmiRx_AudioDisable(InstancePtr);
            XV_HdmiRx_VtdDisable(InstancePtr);
            XV_HdmiRx_LinkEnable(InstancePtr, (FALSE));
            XV_HdmiRx_VideoEnable(InstancePtr, (TRUE));
            XV_HdmiRx_AxisEnable(InstancePtr, (FALSE));
            InstancePtr->Stream.State = XV_HDMIRX_STATE_STREAM_DOWN;
            XV_HdmiRx_WriteReg(InstancePtr->Config.BaseAddress,
                (XV_HDMIRX_VTD_CTRL_CLR_OFFSET), (XV_HDMIRX_VTD_CTRL_SYNC_LOSS_MASK));
            if (InstancePtr->IsStreamDownCallbackSet) {
                InstancePtr->StreamDownCallback(InstancePtr->StreamDownRef);
            }
        }
    }
    if ((Event) & (XV_HDMIRX_PIO_IN_SCDC_SCRAMBLER_ENABLE_MASK)) {
        if ((Data) & (XV_HDMIRX_PIO_IN_SCDC_SCRAMBLER_ENABLE_MASK)) {
            XV_HdmiRx_SetScrambler(InstancePtr, (TRUE));
        }
        else {
            XV_HdmiRx_SetScrambler(InstancePtr, (FALSE));
        }
    }
    if ((Event) & (XV_HDMIRX_PIO_IN_MODE_MASK)) {
        if ((Data) & (XV_HDMIRX_PIO_IN_MODE_MASK)) {
            InstancePtr->Stream.IsHdmi = (TRUE);
        }
        else {
            InstancePtr->Stream.IsHdmi = (FALSE);
        }
        if (InstancePtr->Stream.State == XV_HDMIRX_STATE_STREAM_UP) {
            XV_HdmiRx_Clear(InstancePtr);
            InstancePtr->Stream.State = XV_HDMIRX_STATE_STREAM_IDLE;
            XV_HdmiRx_TmrStart(InstancePtr,
			XV_HdmiRx_GetTime10Ms(InstancePtr)); 
        }
        if (InstancePtr->IsModeCallbackSet) {
            InstancePtr->ModeCallback(InstancePtr->ModeRef);
        }
    }
    if ((Event) & (XV_HDMIRX_PIO_IN_SCDC_TMDS_CLOCK_RATIO_MASK)) {
        if (InstancePtr->IsTmdsClkRatioCallbackSet) {
            InstancePtr->TmdsClkRatioCallback(InstancePtr->TmdsClkRatioRef);
        }
    }
    if ((Event) & (XV_HDMIRX_PIO_IN_BRDG_OVERFLOW_MASK)) {
        if (InstancePtr->IsBrdgOverflowCallbackSet) {
            InstancePtr->BrdgOverflowCallback(InstancePtr->BrdgOverflowRef);
        }
    }
}
static void HdmiRx_PioIntrHandler ( XV_HdmiRx * InstancePtr ) { u32 Event ; u32 Data ; Event = XV_HdmiRx_ReadReg ( InstancePtr -> Config . BaseAddress , ( XV_HDMIRX_PIO_IN_EVT_OFFSET ) ) ; XV_HdmiRx_WriteReg ( InstancePtr -> Config . BaseAddress , ( XV_HDMIRX_PIO_IN_EVT_OFFSET ) , ( Event ) ) ; Data = XV_HdmiRx_ReadReg ( InstancePtr -> Config . BaseAddress , ( XV_HDMIRX_PIO_IN_OFFSET ) ) ; if ( ( Event ) & ( XV_HDMIRX_PIO_IN_DET_MASK ) ) { if ( ( Data ) & ( XV_HDMIRX_PIO_IN_DET_MASK ) ) { InstancePtr -> Stream . IsConnected = ( TRUE ) ; } else { InstancePtr -> Stream . IsConnected = ( FALSE ) ; XV_HdmiRx_DdcScdcClear ( InstancePtr ) ; } if ( InstancePtr -> IsConnectCallbackSet ) { InstancePtr -> ConnectCallback ( InstancePtr -> ConnectRef ) ; } } if ( ( Event ) & ( XV_HDMIRX_PIO_IN_LNK_RDY_MASK ) ) { InstancePtr -> Stream . State = XV_HDMIRX_STATE_STREAM_IDLE ; XV_HdmiRx_TmrStart ( InstancePtr , XV_HdmiRx_GetTime10Ms ( InstancePtr ) ) ; } if ( ( Event ) & ( XV_HDMIRX_PIO_IN_VID_RDY_MASK ) ) { if ( ( Data ) & ( XV_HDMIRX_PIO_IN_VID_RDY_MASK ) ) { if ( InstancePtr -> Stream . State == XV_HDMIRX_STATE_STREAM_INIT ) { XV_HdmiRx_INT_VRST ( InstancePtr , TRUE ) ; XV_HdmiRx_INT_VRST ( InstancePtr , FALSE ) ; XV_HdmiRx_EXT_VRST ( InstancePtr , TRUE ) ; XV_HdmiRx_EXT_SYSRST ( InstancePtr , TRUE ) ; XV_HdmiRx_EXT_VRST ( InstancePtr , FALSE ) ; XV_HdmiRx_EXT_SYSRST ( InstancePtr , FALSE ) ; InstancePtr -> Stream . State = XV_HDMIRX_STATE_STREAM_ARM ; XV_HdmiRx_TmrStart ( InstancePtr , XV_HdmiRx_GetTime200Ms ( InstancePtr ) ) ; } } else { XV_HdmiRx_INT_VRST ( InstancePtr , TRUE ) ; XV_HdmiRx_INT_LRST ( InstancePtr , TRUE ) ; XV_HdmiRx_Clear ( InstancePtr ) ; XV_HdmiRx_AuxDisable ( InstancePtr ) ; XV_HdmiRx_AudioDisable ( InstancePtr ) ; XV_HdmiRx_VtdDisable ( InstancePtr ) ; XV_HdmiRx_LinkEnable ( InstancePtr , ( FALSE ) ) ; XV_HdmiRx_VideoEnable ( InstancePtr , ( TRUE ) ) ; XV_HdmiRx_AxisEnable ( InstancePtr , ( FALSE ) ) ; InstancePtr -> Stream . State = XV_HDMIRX_STATE_STREAM_DOWN ; XV_HdmiRx_WriteReg ( InstancePtr -> Config . BaseAddress , ( XV_HDMIRX_VTD_CTRL_CLR_OFFSET ) , ( XV_HDMIRX_VTD_CTRL_SYNC_LOSS_MASK ) ) ; if ( InstancePtr -> IsStreamDownCallbackSet ) { InstancePtr -> StreamDownCallback ( InstancePtr -> StreamDownRef ) ; } } } if ( ( Event ) & ( XV_HDMIRX_PIO_IN_SCDC_SCRAMBLER_ENABLE_MASK ) ) { if ( ( Data ) & ( XV_HDMIRX_PIO_IN_SCDC_SCRAMBLER_ENABLE_MASK ) ) { XV_HdmiRx_SetScrambler ( InstancePtr , ( TRUE ) ) ; } else { XV_HdmiRx_SetScrambler ( InstancePtr , ( FALSE ) ) ; } } if ( ( Event ) & ( XV_HDMIRX_PIO_IN_MODE_MASK ) ) { if ( ( Data ) & ( XV_HDMIRX_PIO_IN_MODE_MASK ) ) { InstancePtr -> Stream . IsHdmi = ( TRUE ) ; } else { InstancePtr -> Stream . IsHdmi = ( FALSE ) ; } if ( InstancePtr -> Stream . State == XV_HDMIRX_STATE_STREAM_UP ) { XV_HdmiRx_Clear ( InstancePtr ) ; InstancePtr -> Stream . State = XV_HDMIRX_STATE_STREAM_IDLE ; XV_HdmiRx_TmrStart ( InstancePtr , XV_HdmiRx_GetTime10Ms ( InstancePtr ) ) ; } if ( InstancePtr -> IsModeCallbackSet ) { InstancePtr -> ModeCallback ( InstancePtr -> ModeRef ) ; } } if ( ( Event ) & ( XV_HDMIRX_PIO_IN_SCDC_TMDS_CLOCK_RATIO_MASK ) ) { if ( InstancePtr -> IsTmdsClkRatioCallbackSet ) { InstancePtr -> TmdsClkRatioCallback ( InstancePtr -> TmdsClkRatioRef ) ; } } if ( ( Event ) & ( XV_HDMIRX_PIO_IN_BRDG_OVERFLOW_MASK ) ) { if ( InstancePtr -> IsBrdgOverflowCallbackSet ) { InstancePtr -> BrdgOverflowCallback ( InstancePtr -> BrdgOverflowRef ) ; } } }
This function is the interrupt handler for the HDMI RX PIO peripheral.
This function is the interrupt handler for the HDMI RX PIO peripheral .
/* Read PIO IN Event register.*/ /* Clear event flags */ /* Read data */ // Cable detect event has occurred // Cable is connected // Set connected flag // Cable is disconnected // Clear connected flag // Clear SCDC variables // Check if user callback has been registered // Link ready event has occurred // Set stream status to idle // The stream idle // Load timer // 10 ms // Video ready event has occurred // Ready // Check the previous state // The link can only change to up when the previous state was init // Else there was a glitch on the video ready input /* Toggle video reset for HDMI RX core */ /* Toggle bridge reset */ // Set stream status to arm // The stream is armed // Load timer - 200 ms (one UHD frame is 40 ms, 5 frames) // Stream down /* Assert HDMI RX core resets */ /* Clear variables */ // Disable aux and audio peripheral // At this state the link clock is not stable. // Therefore these two peripheral are disabled to prevent any glitches. /* Disable VTD */ // Disable link // Disable video // MH AI: Don't reset bridge when clock is not stable // Set stream status to down // Disable sync loss // Call stream down callback // SCDC Scrambler Enable // Enable scrambler // Disable scrambler // Mode // HDMI Mode // DVI Mode /* Clear variables */ // Set stream status to idle // Load timer // 10 ms // Call mode callback // TMDS clock ratio // Call TMDS Ratio callback /* Bridge Overflow event has occurred */ // Check if user callback has been registered