XilinxProcessorIPLib/drivers/rfdc/examples/xrfdc_clk.c
void LMK04208ClockConfig(int XIicBus, unsigned int LMK04208_CKin[1][26])
{
#ifdef __BAREMETAL__
	XIicPs_Config *Config_iic;
	int Status;
	u8 tx_array[10];
	u8 rx_array[10];
	u32 ClkRate = 100000;
	int Index;

	Config_iic = XIicPs_LookupConfig(XIicBus);
	if (NULL == Config_iic) {
		return;
	}

	Status = XIicPs_CfgInitialize(&Iic, Config_iic, Config_iic->BaseAddress);
	if (Status != XST_SUCCESS) {
		return;
	}

	Status = XIicPs_SetSClk(&Iic, ClkRate);
	if (Status != XST_SUCCESS) {
		return;
	}

	/*
	 * 0x02-enable Super clock module 0x20- analog I2C power module slaves
	 */
	tx_array[0] = 0x20;
	XIicPs_MasterSendPolled(&Iic, tx_array, 0x01, 0x74);
	while (XIicPs_BusIsBusy(&Iic))
		;
	usleep(25000);

	/*
	 * Receive the Data.
	 */
	Status = XIicPs_MasterRecvPolled(&Iic, rx_array, 1, 0x74);
	if (Status != XST_SUCCESS) {
		return;
	}

	/*
	 * Wait until bus is idle to start another transfer.
	 */
	while (XIicPs_BusIsBusy(&Iic))
		;


	/*
	 * Function Id.
	 */
	tx_array[0] = 0xF0;
	tx_array[1] = 0x02;
	XIicPs_MasterSendPolled(&Iic, tx_array, 0x02, 0x2F);
	while (XIicPs_BusIsBusy(&Iic))
		;
	usleep(25000);

	/*
	 * Receive the Data.
	 */
	Status = XIicPs_MasterRecvPolled(&Iic, rx_array,
			2, 0x2F);
	if (Status != XST_SUCCESS) {
		return;
	}

	/*
	 * Wait until bus is idle to start another transfer.
	 */
	while (XIicPs_BusIsBusy(&Iic));


	for (Index = 0; Index < LMK04208_count; Index++) {
		tx_array[0] = 0x02;
		tx_array[4] = (u8) (LMK04208_CKin[0][Index]) & (0xFF);
		tx_array[3] = (u8) (LMK04208_CKin[0][Index] >> 8) & (0xFF);
		tx_array[2] = (u8) (LMK04208_CKin[0][Index] >> 16) & (0xFF);
		tx_array[1] = (u8) (LMK04208_CKin[0][Index] >> 24) & (0xFF);
		Status = XIicPs_MasterSendPolled(&Iic, tx_array, 0x05, 0x2F);
		usleep(25000);
		while (XIicPs_BusIsBusy(&Iic))
			;
	}

	sleep(2);

	xil_printf("LMK04208 configuration write done\r\n");

#else
	int XIicDevFile;
	char XIicDevFilename[20];

	sprintf(XIicDevFilename, "/dev/i2c-%d", XIicBus);
	XIicDevFile = open(XIicDevFilename, O_RDWR);

	if (ioctl(XIicDevFile, I2C_SLAVE_FORCE, 0x2f) < 0) {
		printf("Error: Could not set address \n");
		return ;
	}

	Lmk04208UpdateFreq( XIicDevFile, LMK04208_CKin);
	close(XIicDevFile);
#endif
}
/****************************************************************************/
/**
*
* This function is used to configure LMK04208
*
* @param	XIicBus is the Controller Id/Bus number.
*           - For Baremetal it is the I2C controller Id to which LMK04208
*             deviceis connected.
*           - For Linux it is the Bus Id to which LMK04208 device is connected.
* @param	LMK04208_CKin is the configuration array to configure the LMK04208.
*
* @return
*		- None
*
* @note   	None
*
****************************************************************************/
This function is used to configure LMK04208
This function is used to configure LMK04208
void LMK04208ClockConfig(int XIicBus, unsigned int LMK04208_CKin[1][26])
{
#ifdef __BAREMETAL__
	XIicPs_Config *Config_iic;
	int Status;
	u8 tx_array[10];
	u8 rx_array[10];
	u32 ClkRate = 100000;
	int Index;
	Config_iic = XIicPs_LookupConfig(XIicBus);
	if (NULL == Config_iic) {
		return;
	}
	Status = XIicPs_CfgInitialize(&Iic, Config_iic, Config_iic->BaseAddress);
	if (Status != XST_SUCCESS) {
		return;
	}
	Status = XIicPs_SetSClk(&Iic, ClkRate);
	if (Status != XST_SUCCESS) {
		return;
	}
	tx_array[0] = 0x20;
	XIicPs_MasterSendPolled(&Iic, tx_array, 0x01, 0x74);
	while (XIicPs_BusIsBusy(&Iic))
		;
	usleep(25000);
	Status = XIicPs_MasterRecvPolled(&Iic, rx_array, 1, 0x74);
	if (Status != XST_SUCCESS) {
		return;
	}
	while (XIicPs_BusIsBusy(&Iic))
		;
	tx_array[0] = 0xF0;
	tx_array[1] = 0x02;
	XIicPs_MasterSendPolled(&Iic, tx_array, 0x02, 0x2F);
	while (XIicPs_BusIsBusy(&Iic))
		;
	usleep(25000);
	Status = XIicPs_MasterRecvPolled(&Iic, rx_array,
			2, 0x2F);
	if (Status != XST_SUCCESS) {
		return;
	}
	while (XIicPs_BusIsBusy(&Iic));
	for (Index = 0; Index < LMK04208_count; Index++) {
		tx_array[0] = 0x02;
		tx_array[4] = (u8) (LMK04208_CKin[0][Index]) & (0xFF);
		tx_array[3] = (u8) (LMK04208_CKin[0][Index] >> 8) & (0xFF);
		tx_array[2] = (u8) (LMK04208_CKin[0][Index] >> 16) & (0xFF);
		tx_array[1] = (u8) (LMK04208_CKin[0][Index] >> 24) & (0xFF);
		Status = XIicPs_MasterSendPolled(&Iic, tx_array, 0x05, 0x2F);
		usleep(25000);
		while (XIicPs_BusIsBusy(&Iic))
			;
	}
	sleep(2);
	xil_printf("LMK04208 configuration write done\r\n");
#else
	int XIicDevFile;
	char XIicDevFilename[20];
	sprintf(XIicDevFilename, "/dev/i2c-%d", XIicBus);
	XIicDevFile = open(XIicDevFilename, O_RDWR);
	if (ioctl(XIicDevFile, I2C_SLAVE_FORCE, 0x2f) < 0) {
		printf("Error: Could not set address \n");
		return ;
	}
	Lmk04208UpdateFreq( XIicDevFile, LMK04208_CKin);
	close(XIicDevFile);
#endif
}
void LMK04208ClockConfig ( int XIicBus , unsigned int LMK04208_CKin [ 1 ] [ 26 ] ) { #ifdef __BAREMETAL__ XIicPs_Config * Config_iic ; int Status ; u8 tx_array [ 10 ] ; u8 rx_array [ 10 ] ; u32 ClkRate = 100000 ; int Index ; Config_iic = XIicPs_LookupConfig ( XIicBus ) ; if ( NULL == Config_iic ) { return ; } Status = XIicPs_CfgInitialize ( & Iic , Config_iic , Config_iic -> BaseAddress ) ; if ( Status != XST_SUCCESS ) { return ; } Status = XIicPs_SetSClk ( & Iic , ClkRate ) ; if ( Status != XST_SUCCESS ) { return ; } tx_array [ 0 ] = 0x20 ; XIicPs_MasterSendPolled ( & Iic , tx_array , 0x01 , 0x74 ) ; while ( XIicPs_BusIsBusy ( & Iic ) ) ; usleep ( 25000 ) ; Status = XIicPs_MasterRecvPolled ( & Iic , rx_array , 1 , 0x74 ) ; if ( Status != XST_SUCCESS ) { return ; } while ( XIicPs_BusIsBusy ( & Iic ) ) ; tx_array [ 0 ] = 0xF0 ; tx_array [ 1 ] = 0x02 ; XIicPs_MasterSendPolled ( & Iic , tx_array , 0x02 , 0x2F ) ; while ( XIicPs_BusIsBusy ( & Iic ) ) ; usleep ( 25000 ) ; Status = XIicPs_MasterRecvPolled ( & Iic , rx_array , 2 , 0x2F ) ; if ( Status != XST_SUCCESS ) { return ; } while ( XIicPs_BusIsBusy ( & Iic ) ) ; for ( Index = 0 ; Index < LMK04208_count ; Index ++ ) { tx_array [ 0 ] = 0x02 ; tx_array [ 4 ] = ( u8 ) ( LMK04208_CKin [ 0 ] [ Index ] ) & ( 0xFF ) ; tx_array [ 3 ] = ( u8 ) ( LMK04208_CKin [ 0 ] [ Index ] >> 8 ) & ( 0xFF ) ; tx_array [ 2 ] = ( u8 ) ( LMK04208_CKin [ 0 ] [ Index ] >> 16 ) & ( 0xFF ) ; tx_array [ 1 ] = ( u8 ) ( LMK04208_CKin [ 0 ] [ Index ] >> 24 ) & ( 0xFF ) ; Status = XIicPs_MasterSendPolled ( & Iic , tx_array , 0x05 , 0x2F ) ; usleep ( 25000 ) ; while ( XIicPs_BusIsBusy ( & Iic ) ) ; } sleep ( 2 ) ; xil_printf ( " \r \n " ) ; #else int XIicDevFile ; char XIicDevFilename [ 20 ] ; sprintf ( XIicDevFilename , " " , XIicBus ) ; XIicDevFile = open ( XIicDevFilename , O_RDWR ) ; if ( ioctl ( XIicDevFile , I2C_SLAVE_FORCE , 0x2f ) < 0 ) { printf ( " \n " ) ; return ; } Lmk04208UpdateFreq ( XIicDevFile , LMK04208_CKin ) ; close ( XIicDevFile ) ; #endif }
This function is used to configure LMK04208
This function is used to configure LMK04208
/*
	 * 0x02-enable Super clock module 0x20- analog I2C power module slaves
	 */ /*
	 * Receive the Data.
	 */ /*
	 * Wait until bus is idle to start another transfer.
	 */ /*
	 * Function Id.
	 */ /*
	 * Receive the Data.
	 */ /*
	 * Wait until bus is idle to start another transfer.
	 */