XilinxProcessorIPLib/drivers/aiengine/src/tile/xaietile_pl.c
u32 XAieTile_PlIntcL1StatusGet(XAieGbl_Tile *TileInstPtr, u8 SwitchAB)
{
	u64 RegAddr;
	u32 RegVal;

	XAie_AssertNonvoid(TileInstPtr != XAIE_NULL);
	XAie_AssertNonvoid(TileInstPtr->TileType != XAIEGBL_TILE_TYPE_AIETILE);
	XAie_AssertNonvoid(SwitchAB == XAIETILE_PL_BLOCK_SWITCHA ||
			   SwitchAB == XAIETILE_PL_BLOCK_SWITCHB);

	RegAddr = TileInstPtr->TileAddr + Shim_1stIrqCntr.StatusOff;
	RegAddr += SwitchAB * Shim_1stIrqCntr.SwitchOff;
	RegVal = XAieGbl_Read32(RegAddr);
	return XAie_GetField(RegVal, Shim_1stIrqCntr.IrqsMask.Lsb,
			     Shim_1stIrqCntr.IrqsMask.Mask);
}
/*****************************************************************************/
/**
*
* This API is used to read the 1st level status register of interrupt
* controller.
*
* @param	TileInstPtr - Pointer to the Tile instance.
* @param	SwitchAB - Flag to indicate if it's the A or B block.
*
* @return	Status - unsigned 32 bits indicating the Status of the
*		1st level interrupt controller.
*
* @note		None.
*
*******************************************************************************/
This API is used to read the 1st level status register of interrupt
controller.
This API is used to read the 1st level status register of interrupt controller .
u32 XAieTile_PlIntcL1StatusGet(XAieGbl_Tile *TileInstPtr, u8 SwitchAB)
{
	u64 RegAddr;
	u32 RegVal;
	XAie_AssertNonvoid(TileInstPtr != XAIE_NULL);
	XAie_AssertNonvoid(TileInstPtr->TileType != XAIEGBL_TILE_TYPE_AIETILE);
	XAie_AssertNonvoid(SwitchAB == XAIETILE_PL_BLOCK_SWITCHA ||
			   SwitchAB == XAIETILE_PL_BLOCK_SWITCHB);
	RegAddr = TileInstPtr->TileAddr + Shim_1stIrqCntr.StatusOff;
	RegAddr += SwitchAB * Shim_1stIrqCntr.SwitchOff;
	RegVal = XAieGbl_Read32(RegAddr);
	return XAie_GetField(RegVal, Shim_1stIrqCntr.IrqsMask.Lsb,
			     Shim_1stIrqCntr.IrqsMask.Mask);
}
u32 XAieTile_PlIntcL1StatusGet ( XAieGbl_Tile * TileInstPtr , u8 SwitchAB ) { u64 RegAddr ; u32 RegVal ; XAie_AssertNonvoid ( TileInstPtr != XAIE_NULL ) ; XAie_AssertNonvoid ( TileInstPtr -> TileType != XAIEGBL_TILE_TYPE_AIETILE ) ; XAie_AssertNonvoid ( SwitchAB == XAIETILE_PL_BLOCK_SWITCHA || SwitchAB == XAIETILE_PL_BLOCK_SWITCHB ) ; RegAddr = TileInstPtr -> TileAddr + Shim_1stIrqCntr . StatusOff ; RegAddr += SwitchAB * Shim_1stIrqCntr . SwitchOff ; RegVal = XAieGbl_Read32 ( RegAddr ) ; return XAie_GetField ( RegVal , Shim_1stIrqCntr . IrqsMask . Lsb , Shim_1stIrqCntr . IrqsMask . Mask ) ; }
This API is used to read the 1st level status register of interrupt
controller.
This API is used to read the 1st level status register of interrupt controller .