XilinxProcessorIPLib/drivers/vprocss/src/xvprocss.c
static int SetupModeDeintOnly(XVprocSs *XVprocSsPtr)
{
  XVprocSs_ContextData *CtxtPtr = &XVprocSsPtr->CtxtData;
  XVidC_VideoStream *pStrmIn = &XVprocSsPtr->VidIn;
  int status = XST_SUCCESS;

  if(!XVprocSsPtr->DeintPtr) {
    XVprocSs_LogWrite(XVprocSsPtr, XVPROCSS_EVT_CFG_DEINT, XVPROCSS_EDAT_IPABSENT);
    return(XST_FAILURE);
  }

  /* check if input/output stream configuration is supported */
  status = ValidateDeintOnlyConfig(XVprocSsPtr);

  if(status ==  XST_SUCCESS) {
    /* In the single-IP cases the reset has been done outside this routine */

    /* Save input resolution in the _ContextData structure */
    CtxtPtr->StrmCformat = XVprocSsPtr->VidIn.ColorFormatId;
    CtxtPtr->VidInWidth  = XVprocSsPtr->VidIn.Timing.HActive;
    // we know after validating this config that VidIn is interlaced
    // and VidOut is progressive: multiply height by 2 for downstream
    CtxtPtr->VidInHeight = XVprocSsPtr->VidIn.Timing.VActive * 2;

    XV_DeintSetFieldBuffers(XVprocSsPtr->DeintPtr,
	                        CtxtPtr->DeintBufAddr,
	                        XVprocSsPtr->VidIn.ColorFormatId);

    XV_deinterlacer_Set_width(&XVprocSsPtr->DeintPtr->Deint,
	                          CtxtPtr->VidInWidth);

    // VidIn.Timing.VActive is the field height
    XV_deinterlacer_Set_height(&XVprocSsPtr->DeintPtr->Deint,
	                           XVprocSsPtr->VidIn.Timing.VActive);

    // TBD (the deint field ID bit is fixed to zero)
    XV_deinterlacer_Set_invert_field_id(&XVprocSsPtr->DeintPtr->Deint, 0);

    if (!pStrmIn->IsInterlaced)
	XV_deinterlacer_Set_algo(&XVprocSsPtr->DeintPtr->Deint,
				 XV_DEINTERLACER_MEMORY_PASSTHROUGH);

    /* Start Deint sub-core */
    XV_DeintStart(XVprocSsPtr->DeintPtr);
    XVprocSs_LogWrite(XVprocSsPtr, XVPROCSS_EVT_CFG_DEINT, XVPROCSS_EDAT_SETUPOK);
  } else {
    XVprocSs_LogWrite(XVprocSsPtr, XVPROCSS_EVT_CFG_DEINT, XVPROCSS_EDAT_IGNORE);
  }
  return(status);
}
/*****************************************************************************/
/**
* This function configures the video subsystem pipeline for DeintOnly
* topology of the subsystem
*
* @param  XVprocSsPtr is a pointer to the Subsystem instance to be worked on.
*
* @return XST_SUCCESS if successful else XST_FAILURE
*
* @note If use case is possible the subsystem will configure the sub-cores
*       accordingly else will ignore the request
*
******************************************************************************/
This function configures the video subsystem pipeline for DeintOnly
topology of the subsystem
This function configures the video subsystem pipeline for DeintOnly topology of the subsystem
static int SetupModeDeintOnly(XVprocSs *XVprocSsPtr)
{
  XVprocSs_ContextData *CtxtPtr = &XVprocSsPtr->CtxtData;
  XVidC_VideoStream *pStrmIn = &XVprocSsPtr->VidIn;
  int status = XST_SUCCESS;
  if(!XVprocSsPtr->DeintPtr) {
    XVprocSs_LogWrite(XVprocSsPtr, XVPROCSS_EVT_CFG_DEINT, XVPROCSS_EDAT_IPABSENT);
    return(XST_FAILURE);
  }
  status = ValidateDeintOnlyConfig(XVprocSsPtr);
  if(status ==  XST_SUCCESS) {
    CtxtPtr->StrmCformat = XVprocSsPtr->VidIn.ColorFormatId;
    CtxtPtr->VidInWidth  = XVprocSsPtr->VidIn.Timing.HActive;
    CtxtPtr->VidInHeight = XVprocSsPtr->VidIn.Timing.VActive * 2;
    XV_DeintSetFieldBuffers(XVprocSsPtr->DeintPtr,
	                        CtxtPtr->DeintBufAddr,
	                        XVprocSsPtr->VidIn.ColorFormatId);
    XV_deinterlacer_Set_width(&XVprocSsPtr->DeintPtr->Deint,
	                          CtxtPtr->VidInWidth);
    XV_deinterlacer_Set_height(&XVprocSsPtr->DeintPtr->Deint,
	                           XVprocSsPtr->VidIn.Timing.VActive);
    XV_deinterlacer_Set_invert_field_id(&XVprocSsPtr->DeintPtr->Deint, 0);
    if (!pStrmIn->IsInterlaced)
	XV_deinterlacer_Set_algo(&XVprocSsPtr->DeintPtr->Deint,
				 XV_DEINTERLACER_MEMORY_PASSTHROUGH);
    XV_DeintStart(XVprocSsPtr->DeintPtr);
    XVprocSs_LogWrite(XVprocSsPtr, XVPROCSS_EVT_CFG_DEINT, XVPROCSS_EDAT_SETUPOK);
  } else {
    XVprocSs_LogWrite(XVprocSsPtr, XVPROCSS_EVT_CFG_DEINT, XVPROCSS_EDAT_IGNORE);
  }
  return(status);
}
static int SetupModeDeintOnly ( XVprocSs * XVprocSsPtr ) { XVprocSs_ContextData * CtxtPtr = & XVprocSsPtr -> CtxtData ; XVidC_VideoStream * pStrmIn = & XVprocSsPtr -> VidIn ; int status = XST_SUCCESS ; if ( ! XVprocSsPtr -> DeintPtr ) { XVprocSs_LogWrite ( XVprocSsPtr , XVPROCSS_EVT_CFG_DEINT , XVPROCSS_EDAT_IPABSENT ) ; return ( XST_FAILURE ) ; } status = ValidateDeintOnlyConfig ( XVprocSsPtr ) ; if ( status == XST_SUCCESS ) { CtxtPtr -> StrmCformat = XVprocSsPtr -> VidIn . ColorFormatId ; CtxtPtr -> VidInWidth = XVprocSsPtr -> VidIn . Timing . HActive ; CtxtPtr -> VidInHeight = XVprocSsPtr -> VidIn . Timing . VActive * 2 ; XV_DeintSetFieldBuffers ( XVprocSsPtr -> DeintPtr , CtxtPtr -> DeintBufAddr , XVprocSsPtr -> VidIn . ColorFormatId ) ; XV_deinterlacer_Set_width ( & XVprocSsPtr -> DeintPtr -> Deint , CtxtPtr -> VidInWidth ) ; XV_deinterlacer_Set_height ( & XVprocSsPtr -> DeintPtr -> Deint , XVprocSsPtr -> VidIn . Timing . VActive ) ; XV_deinterlacer_Set_invert_field_id ( & XVprocSsPtr -> DeintPtr -> Deint , 0 ) ; if ( ! pStrmIn -> IsInterlaced ) XV_deinterlacer_Set_algo ( & XVprocSsPtr -> DeintPtr -> Deint , XV_DEINTERLACER_MEMORY_PASSTHROUGH ) ; XV_DeintStart ( XVprocSsPtr -> DeintPtr ) ; XVprocSs_LogWrite ( XVprocSsPtr , XVPROCSS_EVT_CFG_DEINT , XVPROCSS_EDAT_SETUPOK ) ; } else { XVprocSs_LogWrite ( XVprocSsPtr , XVPROCSS_EVT_CFG_DEINT , XVPROCSS_EDAT_IGNORE ) ; } return ( status ) ; }
This function configures the video subsystem pipeline for DeintOnly
topology of the subsystem
This function configures the video subsystem pipeline for DeintOnly topology of the subsystem
/* check if input/output stream configuration is supported */ /* In the single-IP cases the reset has been done outside this routine */ /* Save input resolution in the _ContextData structure */ // we know after validating this config that VidIn is interlaced // and VidOut is progressive: multiply height by 2 for downstream // VidIn.Timing.VActive is the field height // TBD (the deint field ID bit is fixed to zero) /* Start Deint sub-core */