RobotCode/Generated_Source/PSoC4/Clock_Motores.c
void Clock_Motores_SetFractionalDividerRegister(uint16 clkDivider, uint8 clkFractional)
{
    uint32 maskVal;
    uint32 regVal;
    
#if defined (Clock_Motores__FRAC_MASK) || defined (CYREG_PERI_DIV_CMD)
    
	/* get all but divider bits */
    maskVal = Clock_Motores_DIV_REG & 
                    (uint32)(~(uint32)(Clock_Motores_DIV_INT_MASK | Clock_Motores_DIV_FRAC_MASK)); 
	/* combine mask and new divider vals into 32-bit value */
    regVal = maskVal |
        ((uint32)((uint32)clkDivider <<  Clock_Motores_DIV_INT_SHIFT) & Clock_Motores_DIV_INT_MASK) |
        ((uint32)((uint32)clkFractional << Clock_Motores_DIV_FRAC_SHIFT) & Clock_Motores_DIV_FRAC_MASK);
    
#else
    /* get all but integer divider bits */
    maskVal = Clock_Motores_DIV_REG & (uint32)(~(uint32)Clock_Motores__DIVIDER_MASK);
    /* combine mask and new divider val into 32-bit value */
    regVal = clkDivider | maskVal;
    
#endif /* Clock_Motores__FRAC_MASK || CYREG_PERI_DIV_CMD */

    Clock_Motores_DIV_REG = regVal;
}
/*******************************************************************************
* Function Name: Clock_Motores_SetFractionalDividerRegister
********************************************************************************
*
* Summary:
*  Modifies the clock divider and the fractional divider.
*
* Parameters:
*  clkDivider:  Divider register value (0-65535). This value is NOT the
*    divider; the clock hardware divides by clkDivider plus one. For example,
*    to divide the clock by 2, this parameter should be set to 1.
*  fracDivider:  Fractional Divider register value (0-31).
* Returns:
*  None
*
*******************************************************************************/
Function Name: Clock_Motores_SetFractionalDividerRegister
Summary:
Modifies the clock divider and the fractional divider.

Divider register value (0-65535). This value is NOT the
divider; the clock hardware divides by clkDivider plus one. For example,
to divide the clock by 2, this parameter should be set to 1.
fracDivider:  Fractional Divider register value (0-31).
Returns:
None
Function Name : Clock_Motores_SetFractionalDividerRegister Summary : Modifies the clock divider and the fractional divider . Divider register value ( 0 - 65535 ) . This value is NOT the divider ; the clock hardware divides by clkDivider plus one . For example to divide the clock by 2 this parameter should be set to 1 . fracDivider : Fractional Divider register value ( 0 - 31 ) . Returns : None
void Clock_Motores_SetFractionalDividerRegister(uint16 clkDivider, uint8 clkFractional)
{
    uint32 maskVal;
    uint32 regVal;
#if defined (Clock_Motores__FRAC_MASK) || defined (CYREG_PERI_DIV_CMD)
    maskVal = Clock_Motores_DIV_REG & 
                    (uint32)(~(uint32)(Clock_Motores_DIV_INT_MASK | Clock_Motores_DIV_FRAC_MASK)); 
    regVal = maskVal |
        ((uint32)((uint32)clkDivider <<  Clock_Motores_DIV_INT_SHIFT) & Clock_Motores_DIV_INT_MASK) |
        ((uint32)((uint32)clkFractional << Clock_Motores_DIV_FRAC_SHIFT) & Clock_Motores_DIV_FRAC_MASK);
#else
    maskVal = Clock_Motores_DIV_REG & (uint32)(~(uint32)Clock_Motores__DIVIDER_MASK);
    regVal = clkDivider | maskVal;
#endif 
    Clock_Motores_DIV_REG = regVal;
}
void Clock_Motores_SetFractionalDividerRegister ( uint16 clkDivider , uint8 clkFractional ) { uint32 maskVal ; uint32 regVal ; #if defined ( Clock_Motores__FRAC_MASK ) || defined ( CYREG_PERI_DIV_CMD ) maskVal = Clock_Motores_DIV_REG & ( uint32 ) ( ~ ( uint32 ) ( Clock_Motores_DIV_INT_MASK | Clock_Motores_DIV_FRAC_MASK ) ) ; regVal = maskVal | ( ( uint32 ) ( ( uint32 ) clkDivider << Clock_Motores_DIV_INT_SHIFT ) & Clock_Motores_DIV_INT_MASK ) | ( ( uint32 ) ( ( uint32 ) clkFractional << Clock_Motores_DIV_FRAC_SHIFT ) & Clock_Motores_DIV_FRAC_MASK ) ; #else maskVal = Clock_Motores_DIV_REG & ( uint32 ) ( ~ ( uint32 ) Clock_Motores__DIVIDER_MASK ) ; regVal = clkDivider | maskVal ; #endif Clock_Motores_DIV_REG = regVal ; }
Function Name: Clock_Motores_SetFractionalDividerRegister
Summary:
Modifies the clock divider and the fractional divider.
Function Name : Clock_Motores_SetFractionalDividerRegister Summary : Modifies the clock divider and the fractional divider .
/* get all but divider bits */ /* combine mask and new divider vals into 32-bit value */ /* get all but integer divider bits */ /* combine mask and new divider val into 32-bit value */ /* Clock_Motores__FRAC_MASK || CYREG_PERI_DIV_CMD */