XilinxProcessorIPLib/drivers/dp14txss/examples/src/dats_dp14/idt_8t49n24x.c
int IDT_8T49N24x_Init(u32 I2CBaseAddress, u8 I2CSlaveAddress)
{
	u32 ByteCount = 0;
	u8 Data = 0;
	u8 Buffer[10];

	// Set Offset address to 0x0002
	Buffer[0] = 0x00; // MSB RegAddr
	Buffer[1] = 0x02; // LSB RegAddr
	ByteCount = XIic_Send(I2CBaseAddress, I2CSlaveAddress, (u8*)Buffer, 2, XIIC_REPEATED_START);
	if (ByteCount != 2) {
		return XST_FAILURE;
	}
	ByteCount = XIic_Recv(I2CBaseAddress, I2CSlaveAddress, (u8*)Buffer, 4, XIIC_STOP);
	if (ByteCount != 4) {
		return XST_FAILURE;
	}

	//TODO
	// Check device ID and rev ID

	// Startup Control
	Buffer[0] = 0x00; // MSB RegAddr
	Buffer[1] = 0x00; // LSB RegAddr
	Buffer[2] = 0x09; //
	ByteCount = XIic_Send(I2CBaseAddress, I2CSlaveAddress, (u8*)Buffer, 3, XIIC_STOP);
	if (ByteCount != 3) {
		return XST_FAILURE;
	}

	// Configure the GPIO as General Purpose inputs/outputs
	Buffer[0] = 0x00; // MSB RegAddr
	Buffer[1] = 0x30; // LSB RegAddr
	Buffer[2] = 0x08; // GPIO_DIR -> GPIO3 is output, the rest is input
	Buffer[3] = 0x00; // GPIxSEL[2]
	Buffer[4] = 0x00; // GPIxSEL[1]
	Buffer[5] = 0x00; // GPIxSEL[0]
	Buffer[6] = 0x00; // GPOxSEL[2]
	Buffer[7] = 0x00; // GPOxSEL[1]
	Buffer[8] = 0x08; // GPOxSEL[0]
	Buffer[9] = 0x00; // RSVD
	Buffer[10] = 0x00; // GPO[3:0]
	ByteCount = XIic_Send(XPAR_IIC_0_BASEADDR, 0x7C, (u8*)Buffer, 11, XIIC_STOP);
	if (ByteCount != 11) {
		xil_printf("I2C write error: %d\n\r", ByteCount);
	}

	// Set the default output mode to LVDS
	Buffer[0] = 0x00; // MSB RegAddr
	Buffer[1] = 0x3D; // LSB RegAddr

	Data = 0;
	Data |= (0x2 << 5); // OUTMODE3 -> LVDS
	Data |= (0x2 << 1); // OUTMODE2 -> LVDS
	Buffer[2] = Data;

	Data = 0;
	Data |= (0x2 << 5); // OUTMODE1 -> LVDS
	Data |= (0x2 << 1); // OUTMODE0 -> LVDS
	Buffer[3] = Data;
	ByteCount = XIic_Send(I2CBaseAddress, I2CSlaveAddress, (u8*)Buffer, 4, XIIC_STOP);
	if (ByteCount != 4) {
		return XST_FAILURE;
	}

	// Enable all output buffers
	Buffer[0] = 0x00; // MSB RegAddr
	Buffer[1] = 0x39; // LSB RegAddr
	Buffer[2] = 0x0F; // OUTEN[3:0]
	ByteCount = XIic_Send(I2CBaseAddress, I2CSlaveAddress, (u8*)Buffer, 3, XIIC_STOP);
	if (ByteCount != 3) {
		return XST_FAILURE;
	}

	Buffer[0] = 0x00; // MSB RegAddr
	Buffer[1] = 0x6C; // LSB RegAddr
	Buffer[2] = 0x02; // LCKMODE = 1, rest is default
	ByteCount = XIic_Send(I2CBaseAddress, I2CSlaveAddress, (u8*)Buffer, 3, XIIC_STOP);
	if (ByteCount != 3) {
		return XST_FAILURE;
	}

	// Only Outputs Q2 and Q3 are used.
	// Set Q0 and Q1 in power down state.
	Buffer[0] = 0x00; // MSB RegAddr
	Buffer[1] = 0x6F; // LSB RegAddr
	Buffer[2] = 0x03; // Qx_DIS[3:0]
	ByteCount = XIic_Send(I2CBaseAddress, I2CSlaveAddress, (u8*)Buffer, 3, XIIC_STOP);
	if (ByteCount != 3) {
		return XST_FAILURE;
	}

	return XST_SUCCESS;
}
/*****************************************************************************/
/**
*
* This function initializes the IDT 8TN49N24x with default values
* for use with the Video FMC.
*
* @param I2CBaseAddress is the baseaddress of the I2C core.
* @param I2CSlaveAddress is the 7-bit I2C slave address.
*
* @return
*    - XST_SUCCESS Initialization was successful.
*    - XST_FAILURE I2C write error.
*
* @note None.
*
******************************************************************************/
This function initializes the IDT 8TN49N24x with default values
for use with the Video FMC.
This function initializes the IDT 8TN49N24x with default values for use with the Video FMC .
int IDT_8T49N24x_Init(u32 I2CBaseAddress, u8 I2CSlaveAddress)
{
	u32 ByteCount = 0;
	u8 Data = 0;
	u8 Buffer[10];
	Buffer[0] = 0x00; 
	Buffer[1] = 0x02; 
	ByteCount = XIic_Send(I2CBaseAddress, I2CSlaveAddress, (u8*)Buffer, 2, XIIC_REPEATED_START);
	if (ByteCount != 2) {
		return XST_FAILURE;
	}
	ByteCount = XIic_Recv(I2CBaseAddress, I2CSlaveAddress, (u8*)Buffer, 4, XIIC_STOP);
	if (ByteCount != 4) {
		return XST_FAILURE;
	}
	Buffer[0] = 0x00; 
	Buffer[1] = 0x00; 
	Buffer[2] = 0x09; 
	ByteCount = XIic_Send(I2CBaseAddress, I2CSlaveAddress, (u8*)Buffer, 3, XIIC_STOP);
	if (ByteCount != 3) {
		return XST_FAILURE;
	}
	 Configure the GPIO as General Purpose inputs/outputs
	Buffer[0] = 0x00; 
	Buffer[1] = 0x30; 
	Buffer[2] = 0x08;  GPIO_DIR -> GPIO3 is output, the rest is input
	Buffer[3] = 0x00;  GPIxSEL[2]
	Buffer[4] = 0x00;  GPIxSEL[1]
	Buffer[5] = 0x00;  GPIxSEL[0]
	Buffer[6] = 0x00;  GPOxSEL[2]
	Buffer[7] = 0x00;  GPOxSEL[1]
	Buffer[8] = 0x08;  GPOxSEL[0]
	Buffer[9] = 0x00;  RSVD
	Buffer[10] = 0x00;  GPO[3:0]
	ByteCount = XIic_Send(XPAR_IIC_0_BASEADDR, 0x7C, (u8*)Buffer, 11, XIIC_STOP);
	if (ByteCount != 11) {
		xil_printf("I2C write error: %d\n\r", ByteCount);
	}
	 Set the default output mode to LVDS
	Buffer[0] = 0x00; 
	Buffer[1] = 0x3D; 
	Data = 0;
	Data |= (0x2 << 5);  OUTMODE3 -> LVDS
	Data |= (0x2 << 1);  OUTMODE2 -> LVDS
	Buffer[2] = Data;
	Data = 0;
	Data |= (0x2 << 5);  OUTMODE1 -> LVDS
	Data |= (0x2 << 1);  OUTMODE0 -> LVDS
	Buffer[3] = Data;
	ByteCount = XIic_Send(I2CBaseAddress, I2CSlaveAddress, (u8*)Buffer, 4, XIIC_STOP);
	if (ByteCount != 4) {
		return XST_FAILURE;
	}
	 Enable all output buffers
	Buffer[0] = 0x00; 
	Buffer[1] = 0x39; 
	Buffer[2] = 0x0F;  OUTEN[3:0]
	ByteCount = XIic_Send(I2CBaseAddress, I2CSlaveAddress, (u8*)Buffer, 3, XIIC_STOP);
	if (ByteCount != 3) {
		return XST_FAILURE;
	}
	Buffer[0] = 0x00; 
	Buffer[1] = 0x6C; 
	Buffer[2] = 0x02;  LCKMODE = 1, rest is default
	ByteCount = XIic_Send(I2CBaseAddress, I2CSlaveAddress, (u8*)Buffer, 3, XIIC_STOP);
	if (ByteCount != 3) {
		return XST_FAILURE;
	}
	 Only Outputs Q2 and Q3 are used.
	 Set Q0 and Q1 in power down state.
	Buffer[0] = 0x00; 
	Buffer[1] = 0x6F; 
	Buffer[2] = 0x03;  Qx_DIS[3:0]
	ByteCount = XIic_Send(I2CBaseAddress, I2CSlaveAddress, (u8*)Buffer, 3, XIIC_STOP);
	if (ByteCount != 3) {
		return XST_FAILURE;
	}
	return XST_SUCCESS;
}
int IDT_8T49N24x_Init ( u32 I2CBaseAddress , u8 I2CSlaveAddress ) { u32 ByteCount = 0 ; u8 Data = 0 ; u8 Buffer [ 10 ] ; Buffer [ 0 ] = 0x00 ; Buffer [ 1 ] = 0x02 ; ByteCount = XIic_Send ( I2CBaseAddress , I2CSlaveAddress , ( u8 * ) Buffer , 2 , XIIC_REPEATED_START ) ; if ( ByteCount != 2 ) { return XST_FAILURE ; } ByteCount = XIic_Recv ( I2CBaseAddress , I2CSlaveAddress , ( u8 * ) Buffer , 4 , XIIC_STOP ) ; if ( ByteCount != 4 ) { return XST_FAILURE ; } Buffer [ 0 ] = 0x00 ; Buffer [ 1 ] = 0x00 ; Buffer [ 2 ] = 0x09 ; ByteCount = XIic_Send ( I2CBaseAddress , I2CSlaveAddress , ( u8 * ) Buffer , 3 , XIIC_STOP ) ; if ( ByteCount != 3 ) { return XST_FAILURE ; } Buffer [ 0 ] = 0x00 ; Buffer [ 1 ] = 0x30 ; Buffer [ 2 ] = 0x08 ; Buffer [ 3 ] = 0x00 ; Buffer [ 4 ] = 0x00 ; Buffer [ 5 ] = 0x00 ; Buffer [ 6 ] = 0x00 ; Buffer [ 7 ] = 0x00 ; Buffer [ 8 ] = 0x08 ; Buffer [ 9 ] = 0x00 ; Buffer [ 10 ] = 0x00 ; ByteCount = XIic_Send ( XPAR_IIC_0_BASEADDR , 0x7C , ( u8 * ) Buffer , 11 , XIIC_STOP ) ; if ( ByteCount != 11 ) { xil_printf ( " \n \r " , ByteCount ) ; } Buffer [ 0 ] = 0x00 ; Buffer [ 1 ] = 0x3D ; Data = 0 ; Data |= ( 0x2 << 5 ) ; Data |= ( 0x2 << 1 ) ; Buffer [ 2 ] = Data ; Data = 0 ; Data |= ( 0x2 << 5 ) ; Data |= ( 0x2 << 1 ) ; Buffer [ 3 ] = Data ; ByteCount = XIic_Send ( I2CBaseAddress , I2CSlaveAddress , ( u8 * ) Buffer , 4 , XIIC_STOP ) ; if ( ByteCount != 4 ) { return XST_FAILURE ; } Buffer [ 0 ] = 0x00 ; Buffer [ 1 ] = 0x39 ; Buffer [ 2 ] = 0x0F ; ByteCount = XIic_Send ( I2CBaseAddress , I2CSlaveAddress , ( u8 * ) Buffer , 3 , XIIC_STOP ) ; if ( ByteCount != 3 ) { return XST_FAILURE ; } Buffer [ 0 ] = 0x00 ; Buffer [ 1 ] = 0x6C ; Buffer [ 2 ] = 0x02 ; ByteCount = XIic_Send ( I2CBaseAddress , I2CSlaveAddress , ( u8 * ) Buffer , 3 , XIIC_STOP ) ; if ( ByteCount != 3 ) { return XST_FAILURE ; } Buffer [ 0 ] = 0x00 ; Buffer [ 1 ] = 0x6F ; Buffer [ 2 ] = 0x03 ; ByteCount = XIic_Send ( I2CBaseAddress , I2CSlaveAddress , ( u8 * ) Buffer , 3 , XIIC_STOP ) ; if ( ByteCount != 3 ) { return XST_FAILURE ; } return XST_SUCCESS ; }
This function initializes the IDT 8TN49N24x with default values
for use with the Video FMC.
This function initializes the IDT 8TN49N24x with default values for use with the Video FMC .
// Set Offset address to 0x0002 // MSB RegAddr // LSB RegAddr //TODO // Check device ID and rev ID // Startup Control // MSB RegAddr // LSB RegAddr // // Configure the GPIO as General Purpose inputs/outputs // MSB RegAddr // LSB RegAddr // GPIO_DIR -> GPIO3 is output, the rest is input // GPIxSEL[2] // GPIxSEL[1] // GPIxSEL[0] // GPOxSEL[2] // GPOxSEL[1] // GPOxSEL[0] // RSVD // GPO[3:0] // Set the default output mode to LVDS // MSB RegAddr // LSB RegAddr // OUTMODE3 -> LVDS // OUTMODE2 -> LVDS // OUTMODE1 -> LVDS // OUTMODE0 -> LVDS // Enable all output buffers // MSB RegAddr // LSB RegAddr // OUTEN[3:0] // MSB RegAddr // LSB RegAddr // LCKMODE = 1, rest is default // Only Outputs Q2 and Q3 are used. // Set Q0 and Q1 in power down state. // MSB RegAddr // LSB RegAddr // Qx_DIS[3:0]