lib/sw_apps/zynqmp_pmufw/src/pm_gic_proxy.c
static void PmWakeEventGicProxySet(PmWakeEvent* const wake, const u32 ipiMask,
				   const u32 enable)
{
	PmWakeEventGicProxy* gicWake = (PmWakeEventGicProxy*)wake->derived;
	u32 regVal;

	/* Only APU's interrupts are routed through GIC Proxy */
	if (ipiMask != pmMasterApu_g.ipiMask) {
		goto done;
	}

	if (0U == enable) {
		pmGicProxy.groups[gicWake->group].setMask &= ~gicWake->mask;
	} else {

		/* Keep FPD ON if USB is set as wakeup source in USB3 mode */
		if (pmSlaveUsb0_g.slv.wake->derived == gicWake) {

			/*
			 * Check USB3_0_FPD_PIPE_CLK[0] to identify USB mode
			 * 0 => USB3.0 enabled
			 * 1 => USB2.0 only enabled
			 */
			regVal = XPfw_Read32(USB3_0_FPD_PIPE_CLK);
			if (0U == (regVal & USB3_0_FPD_PIPE_CLK_OPTION_MASK)) {
				pmPowerDomainFpd_g.power.useCount++;
			}
		}

		u32 addr = GIC_PROXY_BASE_ADDR +
			   GIC_PROXY_GROUP_OFFSET((u32)gicWake->group) +
			   GIC_PROXY_IRQ_STATUS_OFFSET;

		/* Write 1 into status register to clear interrupt */
		XPfw_Write32(addr, gicWake->mask);

		/* Remember which interrupt in the group needs to be enabled */
		pmGicProxy.groups[gicWake->group].setMask |= gicWake->mask;
	}

done:
	return;
}
/**
 * PmWakeEventGicProxySet() - Set GIC Proxy wake event as the wake source
 * @wake	Wake event
 * @ipiMask	IPI mask of the master which sets the wake source
 * @enable	Flag: for enable non-zero value, for disable value zero
 */
Set GIC Proxy wake event as the wake source
@wake        Wake event
@ipiMask     IPI mask of the master which sets the wake source
@enable      Flag: for enable non-zero value, for disable value zero
Set GIC Proxy wake event as the wake source @wake Wake event @ipiMask IPI mask of the master which sets the wake source @enable Flag : for enable non - zero value for disable value zero
static void PmWakeEventGicProxySet(PmWakeEvent* const wake, const u32 ipiMask,
				   const u32 enable)
{
	PmWakeEventGicProxy* gicWake = (PmWakeEventGicProxy*)wake->derived;
	u32 regVal;
	if (ipiMask != pmMasterApu_g.ipiMask) {
		goto done;
	}
	if (0U == enable) {
		pmGicProxy.groups[gicWake->group].setMask &= ~gicWake->mask;
	} else {
		if (pmSlaveUsb0_g.slv.wake->derived == gicWake) {
			regVal = XPfw_Read32(USB3_0_FPD_PIPE_CLK);
			if (0U == (regVal & USB3_0_FPD_PIPE_CLK_OPTION_MASK)) {
				pmPowerDomainFpd_g.power.useCount++;
			}
		}
		u32 addr = GIC_PROXY_BASE_ADDR +
			   GIC_PROXY_GROUP_OFFSET((u32)gicWake->group) +
			   GIC_PROXY_IRQ_STATUS_OFFSET;
		XPfw_Write32(addr, gicWake->mask);
		pmGicProxy.groups[gicWake->group].setMask |= gicWake->mask;
	}
done:
	return;
}
static void PmWakeEventGicProxySet ( PmWakeEvent * const wake , const u32 ipiMask , const u32 enable ) { PmWakeEventGicProxy * gicWake = ( PmWakeEventGicProxy * ) wake -> derived ; u32 regVal ; if ( ipiMask != pmMasterApu_g . ipiMask ) { goto done ; } if ( 0U == enable ) { pmGicProxy . groups [ gicWake -> group ] . setMask &= ~ gicWake -> mask ; } else { if ( pmSlaveUsb0_g . slv . wake -> derived == gicWake ) { regVal = XPfw_Read32 ( USB3_0_FPD_PIPE_CLK ) ; if ( 0U == ( regVal & USB3_0_FPD_PIPE_CLK_OPTION_MASK ) ) { pmPowerDomainFpd_g . power . useCount ++ ; } } u32 addr = GIC_PROXY_BASE_ADDR + GIC_PROXY_GROUP_OFFSET ( ( u32 ) gicWake -> group ) + GIC_PROXY_IRQ_STATUS_OFFSET ; XPfw_Write32 ( addr , gicWake -> mask ) ; pmGicProxy . groups [ gicWake -> group ] . setMask |= gicWake -> mask ; } done : return ; }
PmWakeEventGicProxySet() - Set GIC Proxy wake event as the wake source
 @wake        Wake event
 @ipiMask     IPI mask of the master which sets the wake source
 @enable      Flag: for enable non-zero value, for disable value zero
PmWakeEventGicProxySet () - Set GIC Proxy wake event as the wake source @wake Wake event @ipiMask IPI mask of the master which sets the wake source @enable Flag : for enable non - zero value for disable value zero
/* Only APU's interrupts are routed through GIC Proxy */ /* Keep FPD ON if USB is set as wakeup source in USB3 mode */ /*
			 * Check USB3_0_FPD_PIPE_CLK[0] to identify USB mode
			 * 0 => USB3.0 enabled
			 * 1 => USB2.0 only enabled
			 */ /* Write 1 into status register to clear interrupt */ /* Remember which interrupt in the group needs to be enabled */