gen/genascon.c
static void substitute(int offset, int reg)
{
    int x0 = -1;
    int x1 = -1;
    int x2 = reg;
    int x3 = -1;
    int x4 = -1;
    int t0 = -1;
    int t1 = -1;
    int t2 = -1;
    int t3 = -1;
    int t4 = -1;

    // Allocate five temporary registers for the five words.
    // When processing the zero byte, we already have x2 loaded.
    alloc_low_reg(&x0);
    alloc_low_reg(&x1);
    if (reg == -1)
        alloc_low_reg(&x2);
    alloc_low_reg(&x3);
    alloc_low_reg(&x4);

    // Need five more registers for intermediate results.
    alloc_low_reg(&t0);
    alloc_low_reg(&t1);
    alloc_low_reg(&t2);
    alloc_low_reg(&t3);
    alloc_low_reg(&t4);

    // Read the five bytes from the state.
    if (offset != 0)
        insn_printf("ldd r%d,Z+%d", x0, offset);
    else
        insn_printf("ld r%d,Z", x0);
    insn_printf("ldd r%d,Z+%d", x1, 8 + offset);
    if (reg == -1)
        insn_printf("ldd r%d,Z+%d", x2, 16 + offset);
    insn_printf("ldd r%d,Z+%d", x3, 24 + offset);
    insn_printf("ldd r%d,Z+%d", x4, 32 + offset);

    // Mix the bytes together.
    // x0 ^= x4;   x4 ^= x3;   x2 ^= x1;
    // t0 = ~x0;   t1 = ~x1;   t2 = ~x2;   t3 = ~x3;   t4 = ~x4;
    // t0 &= x1;   t1 &= x2;   t2 &= x3;   t3 &= x4;   t4 &= x0;
    // x0 ^= t1;   x1 ^= t2;   x2 ^= t3;   x3 ^= t4;   x4 ^= t0;
    // x1 ^= x0;   x0 ^= x4;   x3 ^= x2;   x2 = ~x2;
    insn_printf("eor r%d,r%d", x0, x4);
    insn_printf("eor r%d,r%d", x4, x3);
    insn_printf("eor r%d,r%d", x2, x1);
    insn_printf("mov r%d,r%d", t0, x0);
    insn_printf("com r%d", t0);
    insn_printf("and r%d,r%d", t0, x1);
    insn_printf("mov r%d,r%d", t1, x1);
    insn_printf("com r%d", t1);
    insn_printf("and r%d,r%d", t1, x2);
    insn_printf("mov r%d,r%d", t2, x2);
    insn_printf("com r%d", t2);
    insn_printf("and r%d,r%d", t2, x3);
    insn_printf("mov r%d,r%d", t3, x3);
    insn_printf("com r%d", t3);
    insn_printf("and r%d,r%d", t3, x4);
    insn_printf("mov r%d,r%d", t4, x4);
    insn_printf("com r%d", t4);
    insn_printf("and r%d,r%d", t4, x0);
    insn_printf("eor r%d,r%d", x0, t1);
    insn_printf("eor r%d,r%d", x1, t2);
    insn_printf("eor r%d,r%d", x2, t3);
    insn_printf("eor r%d,r%d", x3, t4);
    insn_printf("eor r%d,r%d", x4, t0);
    insn_printf("eor r%d,r%d", x1, x0);
    insn_printf("eor r%d,r%d", x0, x4);
    insn_printf("eor r%d,r%d", x3, x2);
    insn_printf("com r%d", x2);

    // Write the five bytes back to the state.
    if (offset != 0)
        insn_printf("std Z+%d,r%d", offset, x0);
    else
        insn_printf("st Z,r%d", x0);
    insn_printf("std Z+%d,r%d", 8 + offset, x1);
    insn_printf("std Z+%d,r%d", 16 + offset, x2);
    insn_printf("std Z+%d,r%d", 24 + offset, x3);
    insn_printf("std Z+%d,r%d", 32 + offset, x4);

    // Release the temporary registers.
    release_reg(&x0);
    release_reg(&x1);
    if (reg == -1)
        release_reg(&x2);
    release_reg(&x3);
    release_reg(&x4);
    release_reg(&t0);
    release_reg(&t1);
    release_reg(&t2);
    release_reg(&t3);
    release_reg(&t4);
}
// Handle one byte within the substitution layer.
Handle one byte within the substitution layer.
Handle one byte within the substitution layer .
static void substitute(int offset, int reg)
{
    int x0 = -1;
    int x1 = -1;
    int x2 = reg;
    int x3 = -1;
    int x4 = -1;
    int t0 = -1;
    int t1 = -1;
    int t2 = -1;
    int t3 = -1;
    int t4 = -1;
    alloc_low_reg(&x0);
    alloc_low_reg(&x1);
    if (reg == -1)
        alloc_low_reg(&x2);
    alloc_low_reg(&x3);
    alloc_low_reg(&x4);
    alloc_low_reg(&t0);
    alloc_low_reg(&t1);
    alloc_low_reg(&t2);
    alloc_low_reg(&t3);
    alloc_low_reg(&t4);
    if (offset != 0)
        insn_printf("ldd r%d,Z+%d", x0, offset);
    else
        insn_printf("ld r%d,Z", x0);
    insn_printf("ldd r%d,Z+%d", x1, 8 + offset);
    if (reg == -1)
        insn_printf("ldd r%d,Z+%d", x2, 16 + offset);
    insn_printf("ldd r%d,Z+%d", x3, 24 + offset);
    insn_printf("ldd r%d,Z+%d", x4, 32 + offset);
    insn_printf("eor r%d,r%d", x0, x4);
    insn_printf("eor r%d,r%d", x4, x3);
    insn_printf("eor r%d,r%d", x2, x1);
    insn_printf("mov r%d,r%d", t0, x0);
    insn_printf("com r%d", t0);
    insn_printf("and r%d,r%d", t0, x1);
    insn_printf("mov r%d,r%d", t1, x1);
    insn_printf("com r%d", t1);
    insn_printf("and r%d,r%d", t1, x2);
    insn_printf("mov r%d,r%d", t2, x2);
    insn_printf("com r%d", t2);
    insn_printf("and r%d,r%d", t2, x3);
    insn_printf("mov r%d,r%d", t3, x3);
    insn_printf("com r%d", t3);
    insn_printf("and r%d,r%d", t3, x4);
    insn_printf("mov r%d,r%d", t4, x4);
    insn_printf("com r%d", t4);
    insn_printf("and r%d,r%d", t4, x0);
    insn_printf("eor r%d,r%d", x0, t1);
    insn_printf("eor r%d,r%d", x1, t2);
    insn_printf("eor r%d,r%d", x2, t3);
    insn_printf("eor r%d,r%d", x3, t4);
    insn_printf("eor r%d,r%d", x4, t0);
    insn_printf("eor r%d,r%d", x1, x0);
    insn_printf("eor r%d,r%d", x0, x4);
    insn_printf("eor r%d,r%d", x3, x2);
    insn_printf("com r%d", x2);
    if (offset != 0)
        insn_printf("std Z+%d,r%d", offset, x0);
    else
        insn_printf("st Z,r%d", x0);
    insn_printf("std Z+%d,r%d", 8 + offset, x1);
    insn_printf("std Z+%d,r%d", 16 + offset, x2);
    insn_printf("std Z+%d,r%d", 24 + offset, x3);
    insn_printf("std Z+%d,r%d", 32 + offset, x4);
    release_reg(&x0);
    release_reg(&x1);
    if (reg == -1)
        release_reg(&x2);
    release_reg(&x3);
    release_reg(&x4);
    release_reg(&t0);
    release_reg(&t1);
    release_reg(&t2);
    release_reg(&t3);
    release_reg(&t4);
}
static void substitute ( int offset , int reg ) { int x0 = -1 ; int x1 = -1 ; int x2 = reg ; int x3 = -1 ; int x4 = -1 ; int t0 = -1 ; int t1 = -1 ; int t2 = -1 ; int t3 = -1 ; int t4 = -1 ; alloc_low_reg ( & x0 ) ; alloc_low_reg ( & x1 ) ; if ( reg == -1 ) alloc_low_reg ( & x2 ) ; alloc_low_reg ( & x3 ) ; alloc_low_reg ( & x4 ) ; alloc_low_reg ( & t0 ) ; alloc_low_reg ( & t1 ) ; alloc_low_reg ( & t2 ) ; alloc_low_reg ( & t3 ) ; alloc_low_reg ( & t4 ) ; if ( offset != 0 ) insn_printf ( " " , x0 , offset ) ; else insn_printf ( " " , x0 ) ; insn_printf ( " " , x1 , 8 + offset ) ; if ( reg == -1 ) insn_printf ( " " , x2 , 16 + offset ) ; insn_printf ( " " , x3 , 24 + offset ) ; insn_printf ( " " , x4 , 32 + offset ) ; insn_printf ( " " , x0 , x4 ) ; insn_printf ( " " , x4 , x3 ) ; insn_printf ( " " , x2 , x1 ) ; insn_printf ( " " , t0 , x0 ) ; insn_printf ( " " , t0 ) ; insn_printf ( " " , t0 , x1 ) ; insn_printf ( " " , t1 , x1 ) ; insn_printf ( " " , t1 ) ; insn_printf ( " " , t1 , x2 ) ; insn_printf ( " " , t2 , x2 ) ; insn_printf ( " " , t2 ) ; insn_printf ( " " , t2 , x3 ) ; insn_printf ( " " , t3 , x3 ) ; insn_printf ( " " , t3 ) ; insn_printf ( " " , t3 , x4 ) ; insn_printf ( " " , t4 , x4 ) ; insn_printf ( " " , t4 ) ; insn_printf ( " " , t4 , x0 ) ; insn_printf ( " " , x0 , t1 ) ; insn_printf ( " " , x1 , t2 ) ; insn_printf ( " " , x2 , t3 ) ; insn_printf ( " " , x3 , t4 ) ; insn_printf ( " " , x4 , t0 ) ; insn_printf ( " " , x1 , x0 ) ; insn_printf ( " " , x0 , x4 ) ; insn_printf ( " " , x3 , x2 ) ; insn_printf ( " " , x2 ) ; if ( offset != 0 ) insn_printf ( " " , offset , x0 ) ; else insn_printf ( " " , x0 ) ; insn_printf ( " " , 8 + offset , x1 ) ; insn_printf ( " " , 16 + offset , x2 ) ; insn_printf ( " " , 24 + offset , x3 ) ; insn_printf ( " " , 32 + offset , x4 ) ; release_reg ( & x0 ) ; release_reg ( & x1 ) ; if ( reg == -1 ) release_reg ( & x2 ) ; release_reg ( & x3 ) ; release_reg ( & x4 ) ; release_reg ( & t0 ) ; release_reg ( & t1 ) ; release_reg ( & t2 ) ; release_reg ( & t3 ) ; release_reg ( & t4 ) ; }
Handle one byte within the substitution layer.
Handle one byte within the substitution layer .
// Allocate five temporary registers for the five words. // When processing the zero byte, we already have x2 loaded. // Need five more registers for intermediate results. // Read the five bytes from the state. // Mix the bytes together. // x0 ^= x4;   x4 ^= x3;   x2 ^= x1; // t0 = ~x0;   t1 = ~x1;   t2 = ~x2;   t3 = ~x3;   t4 = ~x4; // t0 &= x1;   t1 &= x2;   t2 &= x3;   t3 &= x4;   t4 &= x0; // x0 ^= t1;   x1 ^= t2;   x2 ^= t3;   x3 ^= t4;   x4 ^= t0; // x1 ^= x0;   x0 ^= x4;   x3 ^= x2;   x2 = ~x2; // Write the five bytes back to the state. // Release the temporary registers.