XilinxProcessorIPLib/drivers/v_hdmiphy1/src/xhdmiphy1_hdmi.c
u32 XHdmiphy1_DruGetRefClkFreqHz(XHdmiphy1 *InstancePtr)
{
	u32 DruFreqHz = XHdmiphy1_ReadReg(InstancePtr->Config.BaseAddr,
			XHDMIPHY1_CLKDET_FREQ_DRU_REG);



	/* Verify argument. */
	Xil_AssertNonvoid(InstancePtr != NULL);

	if (InstancePtr->Config.XcvrType == XHDMIPHY1_GT_TYPE_GTHE4) {
		if (DruFreqHz > XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK_MIN &&
				DruFreqHz < XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK_MAX){
			return XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK;
		}
		else if (DruFreqHz > XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK2_MIN &&
				DruFreqHz < XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK2_MAX){
			return XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK2;
		}
	}
	else if (InstancePtr->Config.XcvrType == XHDMIPHY1_GT_TYPE_GTYE4) {
		if (DruFreqHz > XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK_MIN &&
				DruFreqHz < XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK_MAX){
			return XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK;
		}
		else if (DruFreqHz > XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK2_MIN &&
				DruFreqHz < XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK2_MAX){
			return XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK2;
		}
	}
	else {
		if (DruFreqHz > XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK_MIN &&
				DruFreqHz < XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK_MAX){
			return XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK;
		}
		if (DruFreqHz > XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK1_MIN &&
				DruFreqHz < XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK1_MAX){
			return XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK1;
		}
		if (DruFreqHz > XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK2_MIN &&
				DruFreqHz < XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK2_MAX){
			return XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK2;
		}
	}

	/* Return Failure */
	return XST_FAILURE;
}
/*****************************************************************************/
/**
* This function returns the frequency of the DRU reference clock as measured by
* the clock detector peripheral.
*
* @param	InstancePtr is a pointer to the XHdmiphy1 core instance.
*
* @return	The measured frequency of the DRU reference clock.
*
* @note		The design must have a DRU for this function to return a valid
*		value.
*
******************************************************************************/
This function returns the frequency of the DRU reference clock as measured by
the clock detector peripheral.
This function returns the frequency of the DRU reference clock as measured by the clock detector peripheral .
u32 XHdmiphy1_DruGetRefClkFreqHz(XHdmiphy1 *InstancePtr)
{
	u32 DruFreqHz = XHdmiphy1_ReadReg(InstancePtr->Config.BaseAddr,
			XHDMIPHY1_CLKDET_FREQ_DRU_REG);
	Xil_AssertNonvoid(InstancePtr != NULL);
	if (InstancePtr->Config.XcvrType == XHDMIPHY1_GT_TYPE_GTHE4) {
		if (DruFreqHz > XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK_MIN &&
				DruFreqHz < XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK_MAX){
			return XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK;
		}
		else if (DruFreqHz > XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK2_MIN &&
				DruFreqHz < XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK2_MAX){
			return XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK2;
		}
	}
	else if (InstancePtr->Config.XcvrType == XHDMIPHY1_GT_TYPE_GTYE4) {
		if (DruFreqHz > XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK_MIN &&
				DruFreqHz < XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK_MAX){
			return XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK;
		}
		else if (DruFreqHz > XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK2_MIN &&
				DruFreqHz < XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK2_MAX){
			return XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK2;
		}
	}
	else {
		if (DruFreqHz > XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK_MIN &&
				DruFreqHz < XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK_MAX){
			return XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK;
		}
		if (DruFreqHz > XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK1_MIN &&
				DruFreqHz < XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK1_MAX){
			return XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK1;
		}
		if (DruFreqHz > XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK2_MIN &&
				DruFreqHz < XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK2_MAX){
			return XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK2;
		}
	}
	return XST_FAILURE;
}
u32 XHdmiphy1_DruGetRefClkFreqHz ( XHdmiphy1 * InstancePtr ) { u32 DruFreqHz = XHdmiphy1_ReadReg ( InstancePtr -> Config . BaseAddr , XHDMIPHY1_CLKDET_FREQ_DRU_REG ) ; Xil_AssertNonvoid ( InstancePtr != NULL ) ; if ( InstancePtr -> Config . XcvrType == XHDMIPHY1_GT_TYPE_GTHE4 ) { if ( DruFreqHz > XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK_MIN && DruFreqHz < XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK_MAX ) { return XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK ; } else if ( DruFreqHz > XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK2_MIN && DruFreqHz < XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK2_MAX ) { return XHDMIPHY1_HDMI_GTHE4_DRU_REFCLK2 ; } } else if ( InstancePtr -> Config . XcvrType == XHDMIPHY1_GT_TYPE_GTYE4 ) { if ( DruFreqHz > XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK_MIN && DruFreqHz < XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK_MAX ) { return XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK ; } else if ( DruFreqHz > XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK2_MIN && DruFreqHz < XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK2_MAX ) { return XHDMIPHY1_HDMI_GTYE4_DRU_REFCLK2 ; } } else { if ( DruFreqHz > XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK_MIN && DruFreqHz < XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK_MAX ) { return XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK ; } if ( DruFreqHz > XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK1_MIN && DruFreqHz < XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK1_MAX ) { return XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK1 ; } if ( DruFreqHz > XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK2_MIN && DruFreqHz < XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK2_MAX ) { return XHDMIPHY1_HDMI_GTYE5_DRU_REFCLK2 ; } } return XST_FAILURE ; }
This function returns the frequency of the DRU reference clock as measured by
the clock detector peripheral.
This function returns the frequency of the DRU reference clock as measured by the clock detector peripheral .
/* Verify argument. */ /* Return Failure */