src/dpdk/drivers/net/bnx2x/bnx2x.c
int bnx2x_intr_legacy(struct bnx2x_softc *sc)
{
	struct bnx2x_fastpath *fp;
	uint32_t status, mask;
	int i, rc = 0;

	/*
	 * 0 for ustorm, 1 for cstorm
	 * the bits returned from ack_int() are 0-15
	 * bit 0 = attention status block
	 * bit 1 = fast path status block
	 * a mask of 0x2 or more = tx/rx event
	 * a mask of 1 = slow path event
	 */

	status = bnx2x_ack_int(sc);

	/* the interrupt is not for us */
	if (unlikely(status == 0)) {
		return 0;
	}

	PMD_DEBUG_PERIODIC_LOG(DEBUG, sc, "Interrupt status 0x%04x", status);
	//bnx2x_dump_status_block(sc);

	FOR_EACH_ETH_QUEUE(sc, i) {
		fp = &sc->fp[i];
		mask = (0x2 << (fp->index + CNIC_SUPPORT(sc)));
		if (status & mask) {
		/* acknowledge and disable further fastpath interrupts */
			bnx2x_ack_sb(sc, fp->igu_sb_id, USTORM_ID,
				     0, IGU_INT_DISABLE, 0);
			bnx2x_handle_fp_tq(fp);
			status &= ~mask;
		}
	}

	if (unlikely(status & 0x1)) {
		/* acknowledge and disable further slowpath interrupts */
		bnx2x_ack_sb(sc, sc->igu_dsb_id, USTORM_ID,
			     0, IGU_INT_DISABLE, 0);
		rc = bnx2x_handle_sp_tq(sc);
		status &= ~0x1;
	}

	if (unlikely(status)) {
		PMD_DRV_LOG(WARNING, sc,
			    "Unexpected fastpath status (0x%08x)!", status);
	}

	return rc;
}
/*
 * Legacy interrupt entry point.
 *
 * Verifies that the controller generated the interrupt and
 * then calls a separate routine to handle the various
 * interrupt causes: link, RX, and TX.
 */
Legacy interrupt entry point.
Verifies that the controller generated the interrupt and
then calls a separate routine to handle the various
interrupt causes: link, RX, and TX.
Legacy interrupt entry point . Verifies that the controller generated the interrupt and then calls a separate routine to handle the various interrupt causes : link RX and TX .
int bnx2x_intr_legacy(struct bnx2x_softc *sc)
{
	struct bnx2x_fastpath *fp;
	uint32_t status, mask;
	int i, rc = 0;
	status = bnx2x_ack_int(sc);
	if (unlikely(status == 0)) {
		return 0;
	}
	PMD_DEBUG_PERIODIC_LOG(DEBUG, sc, "Interrupt status 0x%04x", status);
	FOR_EACH_ETH_QUEUE(sc, i) {
		fp = &sc->fp[i];
		mask = (0x2 << (fp->index + CNIC_SUPPORT(sc)));
		if (status & mask) {
			bnx2x_ack_sb(sc, fp->igu_sb_id, USTORM_ID,
				     0, IGU_INT_DISABLE, 0);
			bnx2x_handle_fp_tq(fp);
			status &= ~mask;
		}
	}
	if (unlikely(status & 0x1)) {
		bnx2x_ack_sb(sc, sc->igu_dsb_id, USTORM_ID,
			     0, IGU_INT_DISABLE, 0);
		rc = bnx2x_handle_sp_tq(sc);
		status &= ~0x1;
	}
	if (unlikely(status)) {
		PMD_DRV_LOG(WARNING, sc,
			    "Unexpected fastpath status (0x%08x)!", status);
	}
	return rc;
}
int bnx2x_intr_legacy ( struct bnx2x_softc * sc ) { struct bnx2x_fastpath * fp ; uint32_t status , mask ; int i , rc = 0 ; status = bnx2x_ack_int ( sc ) ; if ( unlikely ( status == 0 ) ) { return 0 ; } PMD_DEBUG_PERIODIC_LOG ( DEBUG , sc , " " , status ) ; FOR_EACH_ETH_QUEUE ( sc , i ) { fp = & sc -> fp [ i ] ; mask = ( 0x2 << ( fp -> index + CNIC_SUPPORT ( sc ) ) ) ; if ( status & mask ) { bnx2x_ack_sb ( sc , fp -> igu_sb_id , USTORM_ID , 0 , IGU_INT_DISABLE , 0 ) ; bnx2x_handle_fp_tq ( fp ) ; status &= ~ mask ; } } if ( unlikely ( status & 0x1 ) ) { bnx2x_ack_sb ( sc , sc -> igu_dsb_id , USTORM_ID , 0 , IGU_INT_DISABLE , 0 ) ; rc = bnx2x_handle_sp_tq ( sc ) ; status &= ~ 0x1 ; } if ( unlikely ( status ) ) { PMD_DRV_LOG ( WARNING , sc , " " , status ) ; } return rc ; }
Legacy interrupt entry point.
Legacy interrupt entry point .
/*
	 * 0 for ustorm, 1 for cstorm
	 * the bits returned from ack_int() are 0-15
	 * bit 0 = attention status block
	 * bit 1 = fast path status block
	 * a mask of 0x2 or more = tx/rx event
	 * a mask of 1 = slow path event
	 */ /* the interrupt is not for us */ //bnx2x_dump_status_block(sc); /* acknowledge and disable further fastpath interrupts */ /* acknowledge and disable further slowpath interrupts */