AzureMXChip/MXCHIPAZ3166/core/lib/threadx/ports/cortex_a5x/ac6/example_build/sample_threadx/gic400_gic.c
void enableIntID(unsigned int ID)
{
  unsigned int bank;

  bank = ID/32;        // There are 32 IDs per register, need to work out which register to access
  ID   = ID & 0x1f;    // ... and which bit within the register

  ID   = 1 << ID;      // Move a '1' into the correct bit position

  gic_dist->GICD_ISENABLER[bank] = ID;

  return;
}
// Enables the interrupt source number ID
Enables the interrupt source number ID
Enables the interrupt source number ID
void enableIntID(unsigned int ID)
{
  unsigned int bank;
  bank = ID/32;        
  ID   = ID & 0x1f;    
  ID   = 1 << ID;      
  gic_dist->GICD_ISENABLER[bank] = ID;
  return;
}
void enableIntID ( unsigned int ID ) { unsigned int bank ; bank = ID / 32 ; ID = ID & 0x1f ; ID = 1 << ID ; gic_dist -> GICD_ISENABLER [ bank ] = ID ; return ; }
Enables the interrupt source number ID
Enables the interrupt source number ID
// There are 32 IDs per register, need to work out which register to access // ... and which bit within the register // Move a '1' into the correct bit position