XilinxProcessorIPLib/drivers/axidma/src/xaxidma_bd.c
void XAxiDma_BdSetCtrl(XAxiDma_Bd* BdPtr, u32 Data)
{
	u32 RegValue = XAxiDma_BdRead(BdPtr, XAXIDMA_BD_CTRL_LEN_OFFSET);

	RegValue &= ~XAXIDMA_BD_CTRL_ALL_MASK;

	RegValue |= (Data & XAXIDMA_BD_CTRL_ALL_MASK);

	XAxiDma_BdWrite((BdPtr), XAXIDMA_BD_CTRL_LEN_OFFSET, RegValue);

	return;
}
/*****************************************************************************/
/**
 * Set the control bits for a BD.
 *
 * @param	BdPtr is the BD to operate on.
 * @param	Data is the bit value to set
 *
 * @return	None
 *
 * @note	This function can be used only when DMA is in SG mode
 *
 *****************************************************************************/
Set the control bits for a BD.
@param       BdPtr is the BD to operate on.
@param       Data is the bit value to set

@return      None

@note        This function can be used only when DMA is in SG mode
Set the control bits for a BD . @param BdPtr is the BD to operate on . @param Data is the bit value to set @return None @note This function can be used only when DMA is in SG mode
void XAxiDma_BdSetCtrl(XAxiDma_Bd* BdPtr, u32 Data)
{
	u32 RegValue = XAxiDma_BdRead(BdPtr, XAXIDMA_BD_CTRL_LEN_OFFSET);
	RegValue &= ~XAXIDMA_BD_CTRL_ALL_MASK;
	RegValue |= (Data & XAXIDMA_BD_CTRL_ALL_MASK);
	XAxiDma_BdWrite((BdPtr), XAXIDMA_BD_CTRL_LEN_OFFSET, RegValue);
	return;
}
void XAxiDma_BdSetCtrl ( XAxiDma_Bd * BdPtr , u32 Data ) { u32 RegValue = XAxiDma_BdRead ( BdPtr , XAXIDMA_BD_CTRL_LEN_OFFSET ) ; RegValue &= ~ XAXIDMA_BD_CTRL_ALL_MASK ; RegValue |= ( Data & XAXIDMA_BD_CTRL_ALL_MASK ) ; XAxiDma_BdWrite ( ( BdPtr ) , XAXIDMA_BD_CTRL_LEN_OFFSET , RegValue ) ; return ; }
Set the control bits for a BD.
Set the control bits for a BD .