XilinxProcessorIPLib/drivers/v_hdmiphy1/src/xhdmiphy1_gtye4.c
static u8 XHdmiphy1_DToDrpEncoding(XHdmiphy1 *InstancePtr, u8 QuadId,
        XHdmiphy1_ChannelId ChId, XHdmiphy1_DirectionType Dir)
{
    u8 OutDiv;
    u8 DrpEncode;

    OutDiv = InstancePtr->Quads[QuadId].Plls[XHDMIPHY1_CH2IDX(ChId)].
            OutDiv[Dir];

    DrpEncode = XHdmiphy1_DrpEncodeCpllTxRxD(OutDiv);

    return DrpEncode;
}
/*****************************************************************************/
/**
* This function will translate the configured D value to DRP encoding.
*
* @param    InstancePtr is a pointer to the XHdmiphy1 core instance.
* @param    QuadId is the GT quad ID to operate on.
* @param    ChId is the channel ID to operate on.
* @param    Dir is an indicator for RX or TX.
*
* @return   The DRP encoding for D.
*
* @note     None.
*
******************************************************************************/
This function will translate the configured D value to DRP encoding.
This function will translate the configured D value to DRP encoding .
static u8 XHdmiphy1_DToDrpEncoding(XHdmiphy1 *InstancePtr, u8 QuadId,
        XHdmiphy1_ChannelId ChId, XHdmiphy1_DirectionType Dir)
{
    u8 OutDiv;
    u8 DrpEncode;
    OutDiv = InstancePtr->Quads[QuadId].Plls[XHDMIPHY1_CH2IDX(ChId)].
            OutDiv[Dir];
    DrpEncode = XHdmiphy1_DrpEncodeCpllTxRxD(OutDiv);
    return DrpEncode;
}
static u8 XHdmiphy1_DToDrpEncoding ( XHdmiphy1 * InstancePtr , u8 QuadId , XHdmiphy1_ChannelId ChId , XHdmiphy1_DirectionType Dir ) { u8 OutDiv ; u8 DrpEncode ; OutDiv = InstancePtr -> Quads [ QuadId ] . Plls [ XHDMIPHY1_CH2IDX ( ChId ) ] . OutDiv [ Dir ] ; DrpEncode = XHdmiphy1_DrpEncodeCpllTxRxD ( OutDiv ) ; return DrpEncode ; }
This function will translate the configured D value to DRP encoding.
This function will translate the configured D value to DRP encoding .