third_party/cairo/src/drm/cairo-drm-intel-brw-eu-emit.c
struct brw_instruction *brw_IF(struct brw_compile *p, uint32_t execute_size)
{
    struct brw_instruction *insn;

    if (p->single_program_flow) {
	assert(execute_size == BRW_EXECUTE_1);

	insn = brw_next_instruction(p, BRW_OPCODE_ADD);
	insn->header.predicate_inverse = 1;
    } else {
	insn = brw_next_instruction(p, BRW_OPCODE_IF);
    }

    /* Override the defaults for this instruction:
    */
    brw_instruction_set_destination (insn, brw_ip_reg ());
    brw_instruction_set_source0 (insn, brw_ip_reg ());
    brw_set_src1 (insn, brw_imm_d (0));

    insn->header.execution_size = execute_size;
    insn->header.compression_control = BRW_COMPRESSION_NONE;
    insn->header.predicate_control = BRW_PREDICATE_NORMAL;
    insn->header.mask_control = BRW_MASK_ENABLE;
    if (!p->single_program_flow)
	insn->header.thread_control = BRW_THREAD_SWITCH;

    p->current->header.predicate_control = BRW_PREDICATE_NONE;

    return insn;
}
/* EU takes the value from the flag register and pushes it onto some
 * sort of a stack (presumably merging with any flag value already on
 * the stack).  Within an if block, the flags at the top of the stack
 * control execution on each channel of the unit, eg. on each of the
 * 16 pixel values in our wm programs.
 *
 * When the matching 'else' instruction is reached (presumably by
 * countdown of the instruction count patched in by our ELSE/ENDIF
 * functions), the relevant flags are inverted.
 *
 * When the matching 'endif' instruction is reached, the flags are
 * popped off.  If the stack is now empty, normal execution resumes.
 *
 * No attempt is made to deal with stack overflow (14 elements?).
 */
EU takes the value from the flag register and pushes it onto some
sort of a stack (presumably merging with any flag value already on
the stack).  Within an if block, the flags at the top of the stack
control execution on each channel of the unit, eg. on each of the
16 pixel values in our wm programs.

When the matching 'else' instruction is reached (presumably by
countdown of the instruction count patched in by our ELSE/ENDIF
functions), the relevant flags are inverted.

When the matching 'endif' instruction is reached, the flags are
popped off.  If the stack is now empty, normal execution resumes.

No attempt is made to deal with stack overflow (14 elements?).
EU takes the value from the flag register and pushes it onto some sort of a stack ( presumably merging with any flag value already on the stack ) . Within an if block the flags at the top of the stack control execution on each channel of the unit eg . on each of the 16 pixel values in our wm programs . When the matching ' else ' instruction is reached ( presumably by countdown of the instruction count patched in by our ELSE / ENDIF functions ) the relevant flags are inverted . When the matching ' endif ' instruction is reached the flags are popped off . If the stack is now empty normal execution resumes . No attempt is made to deal with stack overflow ( 14 elements? ) .
struct brw_instruction *brw_IF(struct brw_compile *p, uint32_t execute_size)
{
    struct brw_instruction *insn;
    if (p->single_program_flow) {
	assert(execute_size == BRW_EXECUTE_1);
	insn = brw_next_instruction(p, BRW_OPCODE_ADD);
	insn->header.predicate_inverse = 1;
    } else {
	insn = brw_next_instruction(p, BRW_OPCODE_IF);
    }
    brw_instruction_set_destination (insn, brw_ip_reg ());
    brw_instruction_set_source0 (insn, brw_ip_reg ());
    brw_set_src1 (insn, brw_imm_d (0));
    insn->header.execution_size = execute_size;
    insn->header.compression_control = BRW_COMPRESSION_NONE;
    insn->header.predicate_control = BRW_PREDICATE_NORMAL;
    insn->header.mask_control = BRW_MASK_ENABLE;
    if (!p->single_program_flow)
	insn->header.thread_control = BRW_THREAD_SWITCH;
    p->current->header.predicate_control = BRW_PREDICATE_NONE;
    return insn;
}
struct brw_instruction * brw_IF ( struct brw_compile * p , uint32_t execute_size ) { struct brw_instruction * insn ; if ( p -> single_program_flow ) { assert ( execute_size == BRW_EXECUTE_1 ) ; insn = brw_next_instruction ( p , BRW_OPCODE_ADD ) ; insn -> header . predicate_inverse = 1 ; } else { insn = brw_next_instruction ( p , BRW_OPCODE_IF ) ; } brw_instruction_set_destination ( insn , brw_ip_reg ( ) ) ; brw_instruction_set_source0 ( insn , brw_ip_reg ( ) ) ; brw_set_src1 ( insn , brw_imm_d ( 0 ) ) ; insn -> header . execution_size = execute_size ; insn -> header . compression_control = BRW_COMPRESSION_NONE ; insn -> header . predicate_control = BRW_PREDICATE_NORMAL ; insn -> header . mask_control = BRW_MASK_ENABLE ; if ( ! p -> single_program_flow ) insn -> header . thread_control = BRW_THREAD_SWITCH ; p -> current -> header . predicate_control = BRW_PREDICATE_NONE ; return insn ; }
EU takes the value from the flag register and pushes it onto some
 sort of a stack (presumably merging with any flag value already on
 the stack).
EU takes the value from the flag register and pushes it onto some sort of a stack ( presumably merging with any flag value already on the stack ) .
/* Override the defaults for this instruction:
    */