XilinxProcessorIPLib/drivers/vphy/src/xvphy_hdmi_intr.c
void XVphy_HdmiGtpPllLockHandler(XVphy *InstancePtr, u8 Pll)
{
	XVphy_PllType TxPllType;
	XVphy_PllType RxPllType;
	u8 Id, Id0, Id1;
	XVphy_ChannelId ChId;

	/* Determine PLL type. */
	TxPllType = XVphy_GetPllType(InstancePtr, 0, XVPHY_DIR_TX,
			XVPHY_CHANNEL_ID_CH1);
	RxPllType = XVphy_GetPllType(InstancePtr, 0, XVPHY_DIR_RX,
			XVPHY_CHANNEL_ID_CH1);

	/* RX is using QPLL. */
	if (((RxPllType == XVPHY_PLL_TYPE_PLL0) && (Pll == 0)) ||
	    ((RxPllType == XVPHY_PLL_TYPE_PLL1) && (Pll == 1))) {

		/* Determine which channel(s) to operate on. */
		ChId = XVphy_GetRcfgChId(InstancePtr, 0, XVPHY_DIR_RX, RxPllType);

		if (XVphy_IsPllLocked(InstancePtr, 0, ChId) == XST_SUCCESS) {
			/* Log, lock */
			XVphy_LogWrite(InstancePtr, (Pll == 0) ?
				XVPHY_LOG_EVT_PLL0_LOCK :
				XVPHY_LOG_EVT_PLL1_LOCK, 1);

			/* GT RX reset. */
			XVphy_ResetGtTxRx(InstancePtr, 0, XVPHY_CHANNEL_ID_CHA,
					XVPHY_DIR_RX, FALSE);

			XVphy_Ch2Ids(InstancePtr, XVPHY_CHANNEL_ID_CHA, &Id0,
					&Id1);
			for (Id = Id0; Id <= Id1; Id++) {
				InstancePtr->Quads[0].Plls[XVPHY_CH2IDX(Id)].
					RxState = XVPHY_GT_STATE_RESET;
			}

			/* If the GT TX and RX are coupled, then update the GT
			 * TX state as well. */
			if (XVphy_IsBonded(InstancePtr, 0,
						XVPHY_CHANNEL_ID_CH1)) {
				/* GT TX reset. */
				XVphy_ResetGtTxRx(InstancePtr, 0,
					XVPHY_CHANNEL_ID_CHA,
					XVPHY_DIR_TX, TRUE);

				XVphy_Ch2Ids(InstancePtr, XVPHY_CHANNEL_ID_CHA,
						&Id0, &Id1);
				for (Id = Id0; Id <= Id1; Id++) {
					InstancePtr->Quads[0].Plls[
						XVPHY_CH2IDX(Id)].TxState =
							XVPHY_GT_STATE_RESET;
				}
			}
		}
		else {
			/* Log, Lost lock */
			XVphy_LogWrite(InstancePtr, (Pll == 0) ?
					XVPHY_LOG_EVT_PLL0_LOCK :
					XVPHY_LOG_EVT_PLL1_LOCK, 0);
		}
	}
	/* TX is using QPLL. */
	else {
		/* Determine which channel(s) to operate on. */
		ChId = XVphy_GetRcfgChId(InstancePtr, 0, XVPHY_DIR_TX, TxPllType);

		if (XVphy_IsPllLocked(InstancePtr, 0, ChId) == XST_SUCCESS) {
			/* Log, lock */
			XVphy_LogWrite(InstancePtr, (Pll == 0) ?
					XVPHY_LOG_EVT_PLL0_LOCK :
					XVPHY_LOG_EVT_PLL1_LOCK, 1);

			/* GT TX reset. */
			XVphy_ResetGtTxRx(InstancePtr, 0, XVPHY_CHANNEL_ID_CHA,
					XVPHY_DIR_TX, FALSE);

			XVphy_Ch2Ids(InstancePtr, XVPHY_CHANNEL_ID_CHA, &Id0,
					&Id1);
			for (Id = Id0; Id <= Id1; Id++) {
				InstancePtr->Quads[0].Plls[XVPHY_CH2IDX(Id)].
					TxState = XVPHY_GT_STATE_RESET;
			}
		}
		else {
			/* Log, Lost lock */
			XVphy_LogWrite(InstancePtr, (Pll == 0) ?
					XVPHY_LOG_EVT_PLL0_LOCK :
					XVPHY_LOG_EVT_PLL1_LOCK, 0);
		}
	}
}
/*****************************************************************************/
/**
* This function is the handler for events triggered by GTP PLL0/1 lock done.
*
* @param	InstancePtr is a pointer to the VPHY instance.
*
* @return	None.
*
* @note		None.
*
******************************************************************************/
This function is the handler for events triggered by GTP PLL0/1 lock done.
This function is the handler for events triggered by GTP PLL0 / 1 lock done .
void XVphy_HdmiGtpPllLockHandler(XVphy *InstancePtr, u8 Pll)
{
	XVphy_PllType TxPllType;
	XVphy_PllType RxPllType;
	u8 Id, Id0, Id1;
	XVphy_ChannelId ChId;
	TxPllType = XVphy_GetPllType(InstancePtr, 0, XVPHY_DIR_TX,
			XVPHY_CHANNEL_ID_CH1);
	RxPllType = XVphy_GetPllType(InstancePtr, 0, XVPHY_DIR_RX,
			XVPHY_CHANNEL_ID_CH1);
	if (((RxPllType == XVPHY_PLL_TYPE_PLL0) && (Pll == 0)) ||
	    ((RxPllType == XVPHY_PLL_TYPE_PLL1) && (Pll == 1))) {
		ChId = XVphy_GetRcfgChId(InstancePtr, 0, XVPHY_DIR_RX, RxPllType);
		if (XVphy_IsPllLocked(InstancePtr, 0, ChId) == XST_SUCCESS) {
			XVphy_LogWrite(InstancePtr, (Pll == 0) ?
				XVPHY_LOG_EVT_PLL0_LOCK :
				XVPHY_LOG_EVT_PLL1_LOCK, 1);
			XVphy_ResetGtTxRx(InstancePtr, 0, XVPHY_CHANNEL_ID_CHA,
					XVPHY_DIR_RX, FALSE);
			XVphy_Ch2Ids(InstancePtr, XVPHY_CHANNEL_ID_CHA, &Id0,
					&Id1);
			for (Id = Id0; Id <= Id1; Id++) {
				InstancePtr->Quads[0].Plls[XVPHY_CH2IDX(Id)].
					RxState = XVPHY_GT_STATE_RESET;
			}
			if (XVphy_IsBonded(InstancePtr, 0,
						XVPHY_CHANNEL_ID_CH1)) {
				XVphy_ResetGtTxRx(InstancePtr, 0,
					XVPHY_CHANNEL_ID_CHA,
					XVPHY_DIR_TX, TRUE);
				XVphy_Ch2Ids(InstancePtr, XVPHY_CHANNEL_ID_CHA,
						&Id0, &Id1);
				for (Id = Id0; Id <= Id1; Id++) {
					InstancePtr->Quads[0].Plls[
						XVPHY_CH2IDX(Id)].TxState =
							XVPHY_GT_STATE_RESET;
				}
			}
		}
		else {
			XVphy_LogWrite(InstancePtr, (Pll == 0) ?
					XVPHY_LOG_EVT_PLL0_LOCK :
					XVPHY_LOG_EVT_PLL1_LOCK, 0);
		}
	}
	else {
		ChId = XVphy_GetRcfgChId(InstancePtr, 0, XVPHY_DIR_TX, TxPllType);
		if (XVphy_IsPllLocked(InstancePtr, 0, ChId) == XST_SUCCESS) {
			XVphy_LogWrite(InstancePtr, (Pll == 0) ?
					XVPHY_LOG_EVT_PLL0_LOCK :
					XVPHY_LOG_EVT_PLL1_LOCK, 1);
			XVphy_ResetGtTxRx(InstancePtr, 0, XVPHY_CHANNEL_ID_CHA,
					XVPHY_DIR_TX, FALSE);
			XVphy_Ch2Ids(InstancePtr, XVPHY_CHANNEL_ID_CHA, &Id0,
					&Id1);
			for (Id = Id0; Id <= Id1; Id++) {
				InstancePtr->Quads[0].Plls[XVPHY_CH2IDX(Id)].
					TxState = XVPHY_GT_STATE_RESET;
			}
		}
		else {
			XVphy_LogWrite(InstancePtr, (Pll == 0) ?
					XVPHY_LOG_EVT_PLL0_LOCK :
					XVPHY_LOG_EVT_PLL1_LOCK, 0);
		}
	}
}
void XVphy_HdmiGtpPllLockHandler ( XVphy * InstancePtr , u8 Pll ) { XVphy_PllType TxPllType ; XVphy_PllType RxPllType ; u8 Id , Id0 , Id1 ; XVphy_ChannelId ChId ; TxPllType = XVphy_GetPllType ( InstancePtr , 0 , XVPHY_DIR_TX , XVPHY_CHANNEL_ID_CH1 ) ; RxPllType = XVphy_GetPllType ( InstancePtr , 0 , XVPHY_DIR_RX , XVPHY_CHANNEL_ID_CH1 ) ; if ( ( ( RxPllType == XVPHY_PLL_TYPE_PLL0 ) && ( Pll == 0 ) ) || ( ( RxPllType == XVPHY_PLL_TYPE_PLL1 ) && ( Pll == 1 ) ) ) { ChId = XVphy_GetRcfgChId ( InstancePtr , 0 , XVPHY_DIR_RX , RxPllType ) ; if ( XVphy_IsPllLocked ( InstancePtr , 0 , ChId ) == XST_SUCCESS ) { XVphy_LogWrite ( InstancePtr , ( Pll == 0 ) ? XVPHY_LOG_EVT_PLL0_LOCK : XVPHY_LOG_EVT_PLL1_LOCK , 1 ) ; XVphy_ResetGtTxRx ( InstancePtr , 0 , XVPHY_CHANNEL_ID_CHA , XVPHY_DIR_RX , FALSE ) ; XVphy_Ch2Ids ( InstancePtr , XVPHY_CHANNEL_ID_CHA , & Id0 , & Id1 ) ; for ( Id = Id0 ; Id <= Id1 ; Id ++ ) { InstancePtr -> Quads [ 0 ] . Plls [ XVPHY_CH2IDX ( Id ) ] . RxState = XVPHY_GT_STATE_RESET ; } if ( XVphy_IsBonded ( InstancePtr , 0 , XVPHY_CHANNEL_ID_CH1 ) ) { XVphy_ResetGtTxRx ( InstancePtr , 0 , XVPHY_CHANNEL_ID_CHA , XVPHY_DIR_TX , TRUE ) ; XVphy_Ch2Ids ( InstancePtr , XVPHY_CHANNEL_ID_CHA , & Id0 , & Id1 ) ; for ( Id = Id0 ; Id <= Id1 ; Id ++ ) { InstancePtr -> Quads [ 0 ] . Plls [ XVPHY_CH2IDX ( Id ) ] . TxState = XVPHY_GT_STATE_RESET ; } } } else { XVphy_LogWrite ( InstancePtr , ( Pll == 0 ) ? XVPHY_LOG_EVT_PLL0_LOCK : XVPHY_LOG_EVT_PLL1_LOCK , 0 ) ; } } else { ChId = XVphy_GetRcfgChId ( InstancePtr , 0 , XVPHY_DIR_TX , TxPllType ) ; if ( XVphy_IsPllLocked ( InstancePtr , 0 , ChId ) == XST_SUCCESS ) { XVphy_LogWrite ( InstancePtr , ( Pll == 0 ) ? XVPHY_LOG_EVT_PLL0_LOCK : XVPHY_LOG_EVT_PLL1_LOCK , 1 ) ; XVphy_ResetGtTxRx ( InstancePtr , 0 , XVPHY_CHANNEL_ID_CHA , XVPHY_DIR_TX , FALSE ) ; XVphy_Ch2Ids ( InstancePtr , XVPHY_CHANNEL_ID_CHA , & Id0 , & Id1 ) ; for ( Id = Id0 ; Id <= Id1 ; Id ++ ) { InstancePtr -> Quads [ 0 ] . Plls [ XVPHY_CH2IDX ( Id ) ] . TxState = XVPHY_GT_STATE_RESET ; } } else { XVphy_LogWrite ( InstancePtr , ( Pll == 0 ) ? XVPHY_LOG_EVT_PLL0_LOCK : XVPHY_LOG_EVT_PLL1_LOCK , 0 ) ; } } }
This function is the handler for events triggered by GTP PLL0/1 lock done.
This function is the handler for events triggered by GTP PLL0 / 1 lock done .
/* Determine PLL type. */ /* RX is using QPLL. */ /* Determine which channel(s) to operate on. */ /* Log, lock */ /* GT RX reset. */ /* If the GT TX and RX are coupled, then update the GT
			 * TX state as well. */ /* GT TX reset. */ /* Log, Lost lock */ /* TX is using QPLL. */ /* Determine which channel(s) to operate on. */ /* Log, lock */ /* GT TX reset. */ /* Log, Lost lock */