src/dpdk/drivers/net/igc/base/igc_mac.c
s32 igc_setup_link_generic(struct igc_hw *hw)
{
	s32 ret_val;

	DEBUGFUNC("igc_setup_link_generic");

	/* In the case of the phy reset being blocked, we already have a link.
	 * We do not need to set it up again.
	 */
	if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
		return IGC_SUCCESS;

	/* If requested flow control is set to default, set flow control
	 * based on the EEPROM flow control settings.
	 */
	if (hw->fc.requested_mode == igc_fc_default)
		hw->fc.requested_mode = igc_fc_full;

	/* Save off the requested flow control mode for use later.  Depending
	 * on the link partner's capabilities, we may or may not use this mode.
	 */
	hw->fc.current_mode = hw->fc.requested_mode;

	DEBUGOUT1("After fix-ups FlowControl is now = %x\n",
		hw->fc.current_mode);

	/* Call the necessary media_type subroutine to configure the link. */
	ret_val = hw->mac.ops.setup_physical_interface(hw);
	if (ret_val)
		return ret_val;

	/* Initialize the flow control address, type, and PAUSE timer
	 * registers to their default values.  This is done even if flow
	 * control is disabled, because it does not hurt anything to
	 * initialize these registers.
	 */
	DEBUGOUT("Initializing the Flow Control address, type and timer regs\n");
	IGC_WRITE_REG(hw, IGC_FCT, FLOW_CONTROL_TYPE);
	IGC_WRITE_REG(hw, IGC_FCAH, FLOW_CONTROL_ADDRESS_HIGH);
	IGC_WRITE_REG(hw, IGC_FCAL, FLOW_CONTROL_ADDRESS_LOW);

	IGC_WRITE_REG(hw, IGC_FCTTV, hw->fc.pause_time);

	return igc_set_fc_watermarks_generic(hw);
}
/**
 *  igc_setup_link_generic - Setup flow control and link settings
 *  @hw: pointer to the HW structure
 *
 *  Determines which flow control settings to use, then configures flow
 *  control.  Calls the appropriate media-specific link configuration
 *  function.  Assuming the adapter has a valid link partner, a valid link
 *  should be established.  Assumes the hardware has previously been reset
 *  and the transmitter and receiver are not enabled.
 **/
Setup flow control and link settings
@hw: pointer to the HW structure

Determines which flow control settings to use, then configures flow
control.  Calls the appropriate media-specific link configuration
function.  Assuming the adapter has a valid link partner, a valid link
should be established.  Assumes the hardware has previously been reset
and the transmitter and receiver are not enabled.
Setup flow control and link settings @hw : pointer to the HW structure Determines which flow control settings to use then configures flow control . Calls the appropriate media - specific link configuration function . Assuming the adapter has a valid link partner a valid link should be established . Assumes the hardware has previously been reset and the transmitter and receiver are not enabled .
s32 igc_setup_link_generic(struct igc_hw *hw)
{
	s32 ret_val;
	DEBUGFUNC("igc_setup_link_generic");
	if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
		return IGC_SUCCESS;
	if (hw->fc.requested_mode == igc_fc_default)
		hw->fc.requested_mode = igc_fc_full;
	hw->fc.current_mode = hw->fc.requested_mode;
	DEBUGOUT1("After fix-ups FlowControl is now = %x\n",
		hw->fc.current_mode);
	ret_val = hw->mac.ops.setup_physical_interface(hw);
	if (ret_val)
		return ret_val;
	DEBUGOUT("Initializing the Flow Control address, type and timer regs\n");
	IGC_WRITE_REG(hw, IGC_FCT, FLOW_CONTROL_TYPE);
	IGC_WRITE_REG(hw, IGC_FCAH, FLOW_CONTROL_ADDRESS_HIGH);
	IGC_WRITE_REG(hw, IGC_FCAL, FLOW_CONTROL_ADDRESS_LOW);
	IGC_WRITE_REG(hw, IGC_FCTTV, hw->fc.pause_time);
	return igc_set_fc_watermarks_generic(hw);
}
s32 igc_setup_link_generic ( struct igc_hw * hw ) { s32 ret_val ; DEBUGFUNC ( " " ) ; if ( hw -> phy . ops . check_reset_block && hw -> phy . ops . check_reset_block ( hw ) ) return IGC_SUCCESS ; if ( hw -> fc . requested_mode == igc_fc_default ) hw -> fc . requested_mode = igc_fc_full ; hw -> fc . current_mode = hw -> fc . requested_mode ; DEBUGOUT1 ( " \n " , hw -> fc . current_mode ) ; ret_val = hw -> mac . ops . setup_physical_interface ( hw ) ; if ( ret_val ) return ret_val ; DEBUGOUT ( " \n " ) ; IGC_WRITE_REG ( hw , IGC_FCT , FLOW_CONTROL_TYPE ) ; IGC_WRITE_REG ( hw , IGC_FCAH , FLOW_CONTROL_ADDRESS_HIGH ) ; IGC_WRITE_REG ( hw , IGC_FCAL , FLOW_CONTROL_ADDRESS_LOW ) ; IGC_WRITE_REG ( hw , IGC_FCTTV , hw -> fc . pause_time ) ; return igc_set_fc_watermarks_generic ( hw ) ; }
igc_setup_link_generic - Setup flow control and link settings
  @hw: pointer to the HW structure
igc_setup_link_generic - Setup flow control and link settings @hw : pointer to the HW structure
/* In the case of the phy reset being blocked, we already have a link.
	 * We do not need to set it up again.
	 */ /* If requested flow control is set to default, set flow control
	 * based on the EEPROM flow control settings.
	 */ /* Save off the requested flow control mode for use later.  Depending
	 * on the link partner's capabilities, we may or may not use this mode.
	 */ /* Call the necessary media_type subroutine to configure the link. */ /* Initialize the flow control address, type, and PAUSE timer
	 * registers to their default values.  This is done even if flow
	 * control is disabled, because it does not hurt anything to
	 * initialize these registers.
	 */