XilinxProcessorIPLib/drivers/sysmonpsu/src/xsysmonpsu.c
u8 XSysMonPsu_GetAdcClkDivisor(XSysMonPsu *InstancePtr, u32 SysmonBlk)
{
	u16 Divisor;
	UINTPTR EffectiveBaseAddress;

	/* Assert the arguments. */
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));

	/* Calculate the effective baseaddress based on the Sysmon instance. */
	EffectiveBaseAddress =
			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
					SysmonBlk);

	/* Read the divisor value from the Configuration Register 2. */
	Divisor = (u16) XSysmonPsu_ReadReg(EffectiveBaseAddress +
							XSYSMONPSU_CFG_REG2_OFFSET);

	return (u8) (Divisor >> XSYSMONPSU_CFG_REG2_CLK_DVDR_SHIFT);
}
/****************************************************************************/
/**
*
* The function gets the ADCCLK divisor from the Configuration Register 2.
*
* @param	InstancePtr is a pointer to the XSysMon instance.
* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
*       block or PL Sysmon block register region.
*
* @return	The divisor read from the Configuration Register 2.
*
* @note		The ADCCLK is an internal clock used by the ADC and is
*		synchronized to the DCLK clock. The ADCCLK is equal to DCLK
*		divided by the user selection in the Configuration Register 2.
*
*****************************************************************************/
The function gets the ADCCLK divisor from the Configuration Register 2.
The function gets the ADCCLK divisor from the Configuration Register 2 .
u8 XSysMonPsu_GetAdcClkDivisor(XSysMonPsu *InstancePtr, u32 SysmonBlk)
{
	u16 Divisor;
	UINTPTR EffectiveBaseAddress;
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
	EffectiveBaseAddress =
			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
					SysmonBlk);
	Divisor = (u16) XSysmonPsu_ReadReg(EffectiveBaseAddress +
							XSYSMONPSU_CFG_REG2_OFFSET);
	return (u8) (Divisor >> XSYSMONPSU_CFG_REG2_CLK_DVDR_SHIFT);
}
u8 XSysMonPsu_GetAdcClkDivisor ( XSysMonPsu * InstancePtr , u32 SysmonBlk ) { u16 Divisor ; UINTPTR EffectiveBaseAddress ; Xil_AssertNonvoid ( InstancePtr != NULL ) ; Xil_AssertNonvoid ( InstancePtr -> IsReady == XIL_COMPONENT_IS_READY ) ; Xil_AssertNonvoid ( ( SysmonBlk == XSYSMON_PS ) || ( SysmonBlk == XSYSMON_PL ) ) ; EffectiveBaseAddress = XSysMonPsu_GetEffBaseAddress ( InstancePtr -> Config . BaseAddress , SysmonBlk ) ; Divisor = ( u16 ) XSysmonPsu_ReadReg ( EffectiveBaseAddress + XSYSMONPSU_CFG_REG2_OFFSET ) ; return ( u8 ) ( Divisor >> XSYSMONPSU_CFG_REG2_CLK_DVDR_SHIFT ) ; }
The function gets the ADCCLK divisor from the Configuration Register 2.
The function gets the ADCCLK divisor from the Configuration Register 2 .
/* Assert the arguments. */ /* Calculate the effective baseaddress based on the Sysmon instance. */ /* Read the divisor value from the Configuration Register 2. */