src/dpdk/drivers/net/e1000/base/e1000_82575.c
s32 e1000_reset_init_script_82575(struct e1000_hw *hw)
{
	DEBUGFUNC("e1000_reset_init_script_82575");

	if (hw->mac.type == e1000_82575) {
		DEBUGOUT("Running reset init script for 82575\n");
		/* SerDes configuration via SERDESCTRL */
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x00, 0x0C);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x01, 0x78);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x1B, 0x23);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x23, 0x15);

		/* CCM configuration via CCMCTL register */
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_CCMCTL, 0x14, 0x00);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_CCMCTL, 0x10, 0x00);

		/* PCIe lanes configuration */
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x00, 0xEC);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x61, 0xDF);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x34, 0x05);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x2F, 0x81);

		/* PCIe PLL Configuration */
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCCTL, 0x02, 0x47);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCCTL, 0x14, 0x00);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCCTL, 0x10, 0x00);
	}

	return E1000_SUCCESS;
}
/**
 *  e1000_reset_init_script_82575 - Inits HW defaults after reset
 *  @hw: pointer to the HW structure
 *
 *  Inits recommended HW defaults after a reset when there is no EEPROM
 *  detected. This is only for the 82575.
 **/
Inits HW defaults after reset
@hw: pointer to the HW structure

Inits recommended HW defaults after a reset when there is no EEPROM
detected. This is only for the 82575.
Inits HW defaults after reset @hw : pointer to the HW structure Inits recommended HW defaults after a reset when there is no EEPROM detected . This is only for the 82575 .
s32 e1000_reset_init_script_82575(struct e1000_hw *hw)
{
	DEBUGFUNC("e1000_reset_init_script_82575");
	if (hw->mac.type == e1000_82575) {
		DEBUGOUT("Running reset init script for 82575\n");
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x00, 0x0C);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x01, 0x78);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x1B, 0x23);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x23, 0x15);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_CCMCTL, 0x14, 0x00);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_CCMCTL, 0x10, 0x00);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x00, 0xEC);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x61, 0xDF);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x34, 0x05);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x2F, 0x81);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCCTL, 0x02, 0x47);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCCTL, 0x14, 0x00);
		e1000_write_8bit_ctrl_reg_generic(hw, E1000_SCCTL, 0x10, 0x00);
	}
	return E1000_SUCCESS;
}
s32 e1000_reset_init_script_82575 ( struct e1000_hw * hw ) { DEBUGFUNC ( " " ) ; if ( hw -> mac . type == e1000_82575 ) { DEBUGOUT ( " \n " ) ; e1000_write_8bit_ctrl_reg_generic ( hw , E1000_SCTL , 0x00 , 0x0C ) ; e1000_write_8bit_ctrl_reg_generic ( hw , E1000_SCTL , 0x01 , 0x78 ) ; e1000_write_8bit_ctrl_reg_generic ( hw , E1000_SCTL , 0x1B , 0x23 ) ; e1000_write_8bit_ctrl_reg_generic ( hw , E1000_SCTL , 0x23 , 0x15 ) ; e1000_write_8bit_ctrl_reg_generic ( hw , E1000_CCMCTL , 0x14 , 0x00 ) ; e1000_write_8bit_ctrl_reg_generic ( hw , E1000_CCMCTL , 0x10 , 0x00 ) ; e1000_write_8bit_ctrl_reg_generic ( hw , E1000_GIOCTL , 0x00 , 0xEC ) ; e1000_write_8bit_ctrl_reg_generic ( hw , E1000_GIOCTL , 0x61 , 0xDF ) ; e1000_write_8bit_ctrl_reg_generic ( hw , E1000_GIOCTL , 0x34 , 0x05 ) ; e1000_write_8bit_ctrl_reg_generic ( hw , E1000_GIOCTL , 0x2F , 0x81 ) ; e1000_write_8bit_ctrl_reg_generic ( hw , E1000_SCCTL , 0x02 , 0x47 ) ; e1000_write_8bit_ctrl_reg_generic ( hw , E1000_SCCTL , 0x14 , 0x00 ) ; e1000_write_8bit_ctrl_reg_generic ( hw , E1000_SCCTL , 0x10 , 0x00 ) ; } return E1000_SUCCESS ; }
e1000_reset_init_script_82575 - Inits HW defaults after reset
  @hw: pointer to the HW structure
e1000_reset_init_script_82575 - Inits HW defaults after reset @hw : pointer to the HW structure
/* SerDes configuration via SERDESCTRL */ /* CCM configuration via CCMCTL register */ /* PCIe lanes configuration */ /* PCIe PLL Configuration */