XilinxProcessorIPLib/drivers/iic/src/xiic_intr.c
void XIic_TransmitFifoFill(XIic *InstancePtr, int Role)
{
	u8 AvailBytes;
	int LoopCnt;
	int NumBytesToSend;

	/*
	 * Determine number of bytes to write to FIFO. Number of bytes that
	 * can be put into the FIFO is (FIFO depth) - (current occupancy + 1)
	 * When more room in FIFO than msg bytes put all of message in the FIFO.
	 */
	AvailBytes = IIC_TX_FIFO_DEPTH -
			(u8) (XIic_ReadReg(InstancePtr->BaseAddress,
					XIIC_TFO_REG_OFFSET) + 1);

	if (InstancePtr->SendByteCount > AvailBytes) {
		NumBytesToSend = AvailBytes;
	} else {
		/*
		 * More space in FIFO than bytes in message.
		 */
		if ((InstancePtr->Options & XII_REPEATED_START_OPTION) ||
			(Role == XIIC_SLAVE_ROLE)) {
			NumBytesToSend = InstancePtr->SendByteCount;
		} else {
			NumBytesToSend = InstancePtr->SendByteCount - 1;
		}
	}

	/*
	 * Fill FIFO with amount determined above.
	 */
	for (LoopCnt = 0; LoopCnt < NumBytesToSend; LoopCnt++) {
		XIic_WriteSendByte(InstancePtr);
	}
}
/******************************************************************************
*
* This function fills the FIFO using the occupancy register to determine the
* available space to be filled. When the repeated start option is on, the last
* byte is withheld to allow the control register to be properly set on the last
* byte.
*
* @param	InstancePtr is a pointer to the XIic instance to be worked on.
*
* @param	Role indicates the role of this IIC device, a slave or a master,
*		on the IIC bus (XIIC_SLAVE_ROLE or XIIC_MASTER_ROLE).
*
* @return	None.
*
* @note		None.
*
******************************************************************************/
This function fills the FIFO using the occupancy register to determine the
available space to be filled. When the repeated start option is on, the last
byte is withheld to allow the control register to be properly set on the last
byte.
This function fills the FIFO using the occupancy register to determine the available space to be filled . When the repeated start option is on the last byte is withheld to allow the control register to be properly set on the last byte .
void XIic_TransmitFifoFill(XIic *InstancePtr, int Role)
{
	u8 AvailBytes;
	int LoopCnt;
	int NumBytesToSend;
	AvailBytes = IIC_TX_FIFO_DEPTH -
			(u8) (XIic_ReadReg(InstancePtr->BaseAddress,
					XIIC_TFO_REG_OFFSET) + 1);
	if (InstancePtr->SendByteCount > AvailBytes) {
		NumBytesToSend = AvailBytes;
	} else {
		if ((InstancePtr->Options & XII_REPEATED_START_OPTION) ||
			(Role == XIIC_SLAVE_ROLE)) {
			NumBytesToSend = InstancePtr->SendByteCount;
		} else {
			NumBytesToSend = InstancePtr->SendByteCount - 1;
		}
	}
	for (LoopCnt = 0; LoopCnt < NumBytesToSend; LoopCnt++) {
		XIic_WriteSendByte(InstancePtr);
	}
}
void XIic_TransmitFifoFill ( XIic * InstancePtr , int Role ) { u8 AvailBytes ; int LoopCnt ; int NumBytesToSend ; AvailBytes = IIC_TX_FIFO_DEPTH - ( u8 ) ( XIic_ReadReg ( InstancePtr -> BaseAddress , XIIC_TFO_REG_OFFSET ) + 1 ) ; if ( InstancePtr -> SendByteCount > AvailBytes ) { NumBytesToSend = AvailBytes ; } else { if ( ( InstancePtr -> Options & XII_REPEATED_START_OPTION ) || ( Role == XIIC_SLAVE_ROLE ) ) { NumBytesToSend = InstancePtr -> SendByteCount ; } else { NumBytesToSend = InstancePtr -> SendByteCount - 1 ; } } for ( LoopCnt = 0 ; LoopCnt < NumBytesToSend ; LoopCnt ++ ) { XIic_WriteSendByte ( InstancePtr ) ; } }
This function fills the FIFO using the occupancy register to determine the
available space to be filled.
This function fills the FIFO using the occupancy register to determine the available space to be filled .
/*
	 * Determine number of bytes to write to FIFO. Number of bytes that
	 * can be put into the FIFO is (FIFO depth) - (current occupancy + 1)
	 * When more room in FIFO than msg bytes put all of message in the FIFO.
	 */ /*
		 * More space in FIFO than bytes in message.
		 */ /*
	 * Fill FIFO with amount determined above.
	 */