kernel/vm.c
pte_t *
walk(pagetable_t pagetable, uint64 va, int alloc)
{
  
  if(va >= MAXVA)
    panic("walk");

  for(int level = 2; level > 0; level--) {
    pte_t *pte = &pagetable[PX(level, va)];
    if(*pte & PTE_V) {
      pagetable = (pagetable_t)PTE2PA(*pte);
    } else {
      if(!alloc || (pagetable = (pde_t*)kalloc()) == NULL)
        return NULL;
      memset(pagetable, 0, PGSIZE);
      *pte = PA2PTE(pagetable) | PTE_V;
    }
  }
  return &pagetable[PX(0, va)];
}
// Return the address of the PTE in page table pagetable
// that corresponds to virtual address va.  If alloc!=0,
// create any required page-table pages.
//
// The risc-v Sv39 scheme has three levels of page-table
// pages. A page-table page contains 512 64-bit PTEs.
// A 64-bit virtual address is split into five fields:
//   39..63 -- must be zero.
//   30..38 -- 9 bits of level-2 index.
//   21..29 -- 9 bits of level-1 index.
//   12..20 -- 9 bits of level-0 index.
//    0..11 -- 12 bits of byte offset within the page.
Return the address of the PTE in page table pagetable
that corresponds to virtual address va.  If alloc!=0,
create any required page-table pages.

The risc-v Sv39 scheme has three levels of page-table
pages. A page-table page contains 512 64-bit PTEs.
A 64-bit virtual address is split into five fields:
39..63 -- must be zero.
Return the address of the PTE in page table pagetable that corresponds to virtual address va . If alloc! = 0 create any required page - table pages . The risc - v Sv39 scheme has three levels of page - table pages . A page - table page contains 512 64 - bit PTEs . A 64 - bit virtual address is split into five fields : 39 .. 63 -- must be zero .
pte_t *
walk(pagetable_t pagetable, uint64 va, int alloc)
{
  if(va >= MAXVA)
    panic("walk");
  for(int level = 2; level > 0; level--) {
    pte_t *pte = &pagetable[PX(level, va)];
    if(*pte & PTE_V) {
      pagetable = (pagetable_t)PTE2PA(*pte);
    } else {
      if(!alloc || (pagetable = (pde_t*)kalloc()) == NULL)
        return NULL;
      memset(pagetable, 0, PGSIZE);
      *pte = PA2PTE(pagetable) | PTE_V;
    }
  }
  return &pagetable[PX(0, va)];
}
pte_t * walk ( pagetable_t pagetable , uint64 va , int alloc ) { if ( va >= MAXVA ) panic ( " " ) ; for ( int level = 2 ; level > 0 ; level -- ) { pte_t * pte = & pagetable [ PX ( level , va ) ] ; if ( * pte & PTE_V ) { pagetable = ( pagetable_t ) PTE2PA ( * pte ) ; } else { if ( ! alloc || ( pagetable = ( pde_t * ) kalloc ( ) ) == NULL ) return NULL ; memset ( pagetable , 0 , PGSIZE ) ; * pte = PA2PTE ( pagetable ) | PTE_V ; } } return & pagetable [ PX ( 0 , va ) ] ; }
Return the address of the PTE in page table pagetable
that corresponds to virtual address va.
Return the address of the PTE in page table pagetable that corresponds to virtual address va .