XilinxProcessorIPLib/drivers/intc/src/xintc_l.c
void XIntc_RegisterFastHandler(UINTPTR BaseAddress, u8 Id,
					XFastInterruptHandler FastHandler)
{
	u32 CurrentIER;
	u32 Mask;
	u32 Imr;
	XIntc_Config *CfgPtr;


	if (Id > 31) {
		/* Enable user required Id in Slave controller */
		CfgPtr = XIntc_LookupConfig(Id/32);
		if (CfgPtr == NULL) {
			return;
		}

		/* Get the Enabled Interrupts */
		CurrentIER = XIntc_In32(CfgPtr->BaseAddress + XIN_IER_OFFSET);

		/* Convert from integer id to bit mask */
		Mask = XIntc_BitPosMask[(Id%32)];

		/* Disable the Interrupt if it was enabled before calling
		 * this function
		 */
		if (CurrentIER & Mask) {
			XIntc_Out32(CfgPtr->BaseAddress + XIN_IER_OFFSET,
							(CurrentIER & ~Mask));
		}
		if (CfgPtr->VectorAddrWidth >
			XINTC_STANDARD_VECTOR_ADDRESS_WIDTH) {
			XIntc_Out64(CfgPtr->BaseAddress + XIN_IVEAR_OFFSET +
				((Id%32) * 8), (UINTPTR) FastHandler);
		} else {
			XIntc_Out32(CfgPtr->BaseAddress + XIN_IVAR_OFFSET +
					((Id%32) * 4), (UINTPTR) FastHandler);
		}

		/* Slave controllers in Cascade Mode should have all as Fast
		 * interrupts or Normal interrupts, mixed interrupts are not
		 * supported
		 */
		XIntc_Out32(CfgPtr->BaseAddress + XIN_IMR_OFFSET, 0xFFFFFFFF);

		/* Enable the Interrupt if it was enabled before calling this
		 * function
		 */
		if (CurrentIER & Mask) {
			XIntc_Out32(CfgPtr->BaseAddress + XIN_IER_OFFSET,
						(CurrentIER | Mask));
		}
	}
	else {

		CurrentIER = XIntc_In32(BaseAddress + XIN_IER_OFFSET);

		/* Convert from integer id to bit mask */
		Mask = XIntc_BitPosMask[Id];

		if (CurrentIER & Mask) {
			/* Disable Interrupt if it was enabled */
			CurrentIER = XIntc_In32(BaseAddress + XIN_IER_OFFSET);
			XIntc_Out32(BaseAddress + XIN_IER_OFFSET,
							(CurrentIER & ~Mask));
		}

		CfgPtr = XIntc_LookupConfig(Id/32);
		if (CfgPtr == NULL) {
			return;
		}
		if (CfgPtr->VectorAddrWidth >
			XINTC_STANDARD_VECTOR_ADDRESS_WIDTH) {
			XIntc_Out64(BaseAddress + XIN_IVEAR_OFFSET +
				(Id * 8), (UINTPTR) FastHandler);
		} else {
			XIntc_Out32(BaseAddress + XIN_IVAR_OFFSET + (Id * 4),
						(UINTPTR) FastHandler);
		}

		Imr = XIntc_In32(BaseAddress + XIN_IMR_OFFSET);
		XIntc_Out32(BaseAddress + XIN_IMR_OFFSET, Imr | Mask);


		/* Enable Interrupt if it was enabled before calling
		 * this function
		 */
		if (CurrentIER & Mask) {
			CurrentIER = XIntc_In32(BaseAddress + XIN_IER_OFFSET);
			XIntc_Out32(BaseAddress + XIN_IER_OFFSET,
							(CurrentIER | Mask));
		}
	}
}
/*****************************************************************************/
/**
*
* Register a fast handler function for a specific interrupt ID. The handler
* function will be called when an interrupt occurs for the given interrupt ID.
* In Cascade mode Interrupt Id is used to set Handler for corresponding Slave
* Controller
*
* @param 	BaseAddress is the base address of the interrupt controller
*		whose vector table will be modified.
* @param 	InterruptId is the interrupt ID to be associated with the input
*		handler.
* @param 	FastHandler is the function pointer that will be called when
*   		interrupt occurs
*
* @return	None.
*
* @note
*
* Note that this function has no effect if the input base address is invalid.
*
******************************************************************************/
Register a fast handler function for a specific interrupt ID. The handler
function will be called when an interrupt occurs for the given interrupt ID.
In Cascade mode Interrupt Id is used to set Handler for corresponding Slave
Controller
Register a fast handler function for a specific interrupt ID . The handler function will be called when an interrupt occurs for the given interrupt ID . In Cascade mode Interrupt Id is used to set Handler for corresponding Slave Controller
void XIntc_RegisterFastHandler(UINTPTR BaseAddress, u8 Id,
					XFastInterruptHandler FastHandler)
{
	u32 CurrentIER;
	u32 Mask;
	u32 Imr;
	XIntc_Config *CfgPtr;
	if (Id > 31) {
		CfgPtr = XIntc_LookupConfig(Id/32);
		if (CfgPtr == NULL) {
			return;
		}
		CurrentIER = XIntc_In32(CfgPtr->BaseAddress + XIN_IER_OFFSET);
		Mask = XIntc_BitPosMask[(Id%32)];
		if (CurrentIER & Mask) {
			XIntc_Out32(CfgPtr->BaseAddress + XIN_IER_OFFSET,
							(CurrentIER & ~Mask));
		}
		if (CfgPtr->VectorAddrWidth >
			XINTC_STANDARD_VECTOR_ADDRESS_WIDTH) {
			XIntc_Out64(CfgPtr->BaseAddress + XIN_IVEAR_OFFSET +
				((Id%32) * 8), (UINTPTR) FastHandler);
		} else {
			XIntc_Out32(CfgPtr->BaseAddress + XIN_IVAR_OFFSET +
					((Id%32) * 4), (UINTPTR) FastHandler);
		}
		XIntc_Out32(CfgPtr->BaseAddress + XIN_IMR_OFFSET, 0xFFFFFFFF);
		if (CurrentIER & Mask) {
			XIntc_Out32(CfgPtr->BaseAddress + XIN_IER_OFFSET,
						(CurrentIER | Mask));
		}
	}
	else {
		CurrentIER = XIntc_In32(BaseAddress + XIN_IER_OFFSET);
		Mask = XIntc_BitPosMask[Id];
		if (CurrentIER & Mask) {
			CurrentIER = XIntc_In32(BaseAddress + XIN_IER_OFFSET);
			XIntc_Out32(BaseAddress + XIN_IER_OFFSET,
							(CurrentIER & ~Mask));
		}
		CfgPtr = XIntc_LookupConfig(Id/32);
		if (CfgPtr == NULL) {
			return;
		}
		if (CfgPtr->VectorAddrWidth >
			XINTC_STANDARD_VECTOR_ADDRESS_WIDTH) {
			XIntc_Out64(BaseAddress + XIN_IVEAR_OFFSET +
				(Id * 8), (UINTPTR) FastHandler);
		} else {
			XIntc_Out32(BaseAddress + XIN_IVAR_OFFSET + (Id * 4),
						(UINTPTR) FastHandler);
		}
		Imr = XIntc_In32(BaseAddress + XIN_IMR_OFFSET);
		XIntc_Out32(BaseAddress + XIN_IMR_OFFSET, Imr | Mask);
		if (CurrentIER & Mask) {
			CurrentIER = XIntc_In32(BaseAddress + XIN_IER_OFFSET);
			XIntc_Out32(BaseAddress + XIN_IER_OFFSET,
							(CurrentIER | Mask));
		}
	}
}
void XIntc_RegisterFastHandler ( UINTPTR BaseAddress , u8 Id , XFastInterruptHandler FastHandler ) { u32 CurrentIER ; u32 Mask ; u32 Imr ; XIntc_Config * CfgPtr ; if ( Id > 31 ) { CfgPtr = XIntc_LookupConfig ( Id / 32 ) ; if ( CfgPtr == NULL ) { return ; } CurrentIER = XIntc_In32 ( CfgPtr -> BaseAddress + XIN_IER_OFFSET ) ; Mask = XIntc_BitPosMask [ ( Id % 32 ) ] ; if ( CurrentIER & Mask ) { XIntc_Out32 ( CfgPtr -> BaseAddress + XIN_IER_OFFSET , ( CurrentIER & ~ Mask ) ) ; } if ( CfgPtr -> VectorAddrWidth > XINTC_STANDARD_VECTOR_ADDRESS_WIDTH ) { XIntc_Out64 ( CfgPtr -> BaseAddress + XIN_IVEAR_OFFSET + ( ( Id % 32 ) * 8 ) , ( UINTPTR ) FastHandler ) ; } else { XIntc_Out32 ( CfgPtr -> BaseAddress + XIN_IVAR_OFFSET + ( ( Id % 32 ) * 4 ) , ( UINTPTR ) FastHandler ) ; } XIntc_Out32 ( CfgPtr -> BaseAddress + XIN_IMR_OFFSET , 0xFFFFFFFF ) ; if ( CurrentIER & Mask ) { XIntc_Out32 ( CfgPtr -> BaseAddress + XIN_IER_OFFSET , ( CurrentIER | Mask ) ) ; } } else { CurrentIER = XIntc_In32 ( BaseAddress + XIN_IER_OFFSET ) ; Mask = XIntc_BitPosMask [ Id ] ; if ( CurrentIER & Mask ) { CurrentIER = XIntc_In32 ( BaseAddress + XIN_IER_OFFSET ) ; XIntc_Out32 ( BaseAddress + XIN_IER_OFFSET , ( CurrentIER & ~ Mask ) ) ; } CfgPtr = XIntc_LookupConfig ( Id / 32 ) ; if ( CfgPtr == NULL ) { return ; } if ( CfgPtr -> VectorAddrWidth > XINTC_STANDARD_VECTOR_ADDRESS_WIDTH ) { XIntc_Out64 ( BaseAddress + XIN_IVEAR_OFFSET + ( Id * 8 ) , ( UINTPTR ) FastHandler ) ; } else { XIntc_Out32 ( BaseAddress + XIN_IVAR_OFFSET + ( Id * 4 ) , ( UINTPTR ) FastHandler ) ; } Imr = XIntc_In32 ( BaseAddress + XIN_IMR_OFFSET ) ; XIntc_Out32 ( BaseAddress + XIN_IMR_OFFSET , Imr | Mask ) ; if ( CurrentIER & Mask ) { CurrentIER = XIntc_In32 ( BaseAddress + XIN_IER_OFFSET ) ; XIntc_Out32 ( BaseAddress + XIN_IER_OFFSET , ( CurrentIER | Mask ) ) ; } } }
Register a fast handler function for a specific interrupt ID.
Register a fast handler function for a specific interrupt ID .
/* Enable user required Id in Slave controller */ /* Get the Enabled Interrupts */ /* Convert from integer id to bit mask */ /* Disable the Interrupt if it was enabled before calling
		 * this function
		 */ /* Slave controllers in Cascade Mode should have all as Fast
		 * interrupts or Normal interrupts, mixed interrupts are not
		 * supported
		 */ /* Enable the Interrupt if it was enabled before calling this
		 * function
		 */ /* Convert from integer id to bit mask */ /* Disable Interrupt if it was enabled */ /* Enable Interrupt if it was enabled before calling
		 * this function
		 */