src/runtime_src/core/pcie/driver/linux/xocl/subdev/intc.c
irqreturn_t intc_csr_isr(int irq, void *arg)
{
	struct intr_metadata *data = arg;
	u32 pending;
	u32 index;

	/* EISR is clear on read */
	pending = ioread32(data->isr);

	/* Iterate all interrupt sources. If it is set, handle it */
	for (index = 0; pending != 0; index++) {
		struct intr_info *info;

		if (!(pending & (1 << index)))
			continue;

		info = data->info[index];
		/* If a bit is set but without handler, it probably is
		 * a bug on hardware or ERT firmware.
		 */
		if (info && info->enabled && info->handler)
			info->handler(info->intr_id, info->arg);

		pending ^= 1 << index;
	};

	return IRQ_HANDLED;
}
/**
 * intc_csr_isr() - Handler of ERT to host interrupts
 */
Handler of ERT to host interrupts
Handler of ERT to host interrupts
irqreturn_t intc_csr_isr(int irq, void *arg)
{
	struct intr_metadata *data = arg;
	u32 pending;
	u32 index;
	pending = ioread32(data->isr);
	for (index = 0; pending != 0; index++) {
		struct intr_info *info;
		if (!(pending & (1 << index)))
			continue;
		info = data->info[index];
		if (info && info->enabled && info->handler)
			info->handler(info->intr_id, info->arg);
		pending ^= 1 << index;
	};
	return IRQ_HANDLED;
}
irqreturn_t intc_csr_isr ( int irq , void * arg ) { struct intr_metadata * data = arg ; u32 pending ; u32 index ; pending = ioread32 ( data -> isr ) ; for ( index = 0 ; pending != 0 ; index ++ ) { struct intr_info * info ; if ( ! ( pending & ( 1 << index ) ) ) continue ; info = data -> info [ index ] ; if ( info && info -> enabled && info -> handler ) info -> handler ( info -> intr_id , info -> arg ) ; pending ^= 1 << index ; } ; return IRQ_HANDLED ; }
intc_csr_isr() - Handler of ERT to host interrupts
intc_csr_isr () - Handler of ERT to host interrupts
/* EISR is clear on read */ /* Iterate all interrupt sources. If it is set, handle it */ /* If a bit is set but without handler, it probably is
		 * a bug on hardware or ERT firmware.
		 */