src/dpdk/drivers/net/igc/base/igc_mac.c
s32 igc_set_default_fc_generic(struct igc_hw *hw)
{
	s32 ret_val;
	u16 nvm_data;
	u16 nvm_offset = 0;

	DEBUGFUNC("igc_set_default_fc_generic");

	/* Read and store word 0x0F of the EEPROM. This word contains bits
	 * that determine the hardware's default PAUSE (flow control) mode,
	 * a bit that determines whether the HW defaults to enabling or
	 * disabling auto-negotiation, and the direction of the
	 * SW defined pins. If there is no SW over-ride of the flow
	 * control setting, then the variable hw->fc will
	 * be initialized based on a value in the EEPROM.
	 */
	if (hw->mac.type == igc_i350) {
		nvm_offset = NVM_82580_LAN_FUNC_OFFSET(hw->bus.func);
		ret_val = hw->nvm.ops.read(hw,
					   NVM_INIT_CONTROL2_REG +
					   nvm_offset,
					   1, &nvm_data);
	} else {
		ret_val = hw->nvm.ops.read(hw,
					   NVM_INIT_CONTROL2_REG,
					   1, &nvm_data);
	}

	if (ret_val) {
		DEBUGOUT("NVM Read Error\n");
		return ret_val;
	}

	if (!(nvm_data & NVM_WORD0F_PAUSE_MASK))
		hw->fc.requested_mode = igc_fc_none;
	else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) ==
		 NVM_WORD0F_ASM_DIR)
		hw->fc.requested_mode = igc_fc_tx_pause;
	else
		hw->fc.requested_mode = igc_fc_full;

	return IGC_SUCCESS;
}
/**
 *  igc_set_default_fc_generic - Set flow control default values
 *  @hw: pointer to the HW structure
 *
 *  Read the EEPROM for the default values for flow control and store the
 *  values.
 **/
Set flow control default values
@hw: pointer to the HW structure

Read the EEPROM for the default values for flow control and store the
values.
Set flow control default values @hw : pointer to the HW structure Read the EEPROM for the default values for flow control and store the values .
s32 igc_set_default_fc_generic(struct igc_hw *hw)
{
	s32 ret_val;
	u16 nvm_data;
	u16 nvm_offset = 0;
	DEBUGFUNC("igc_set_default_fc_generic");
	if (hw->mac.type == igc_i350) {
		nvm_offset = NVM_82580_LAN_FUNC_OFFSET(hw->bus.func);
		ret_val = hw->nvm.ops.read(hw,
					   NVM_INIT_CONTROL2_REG +
					   nvm_offset,
					   1, &nvm_data);
	} else {
		ret_val = hw->nvm.ops.read(hw,
					   NVM_INIT_CONTROL2_REG,
					   1, &nvm_data);
	}
	if (ret_val) {
		DEBUGOUT("NVM Read Error\n");
		return ret_val;
	}
	if (!(nvm_data & NVM_WORD0F_PAUSE_MASK))
		hw->fc.requested_mode = igc_fc_none;
	else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) ==
		 NVM_WORD0F_ASM_DIR)
		hw->fc.requested_mode = igc_fc_tx_pause;
	else
		hw->fc.requested_mode = igc_fc_full;
	return IGC_SUCCESS;
}
s32 igc_set_default_fc_generic ( struct igc_hw * hw ) { s32 ret_val ; u16 nvm_data ; u16 nvm_offset = 0 ; DEBUGFUNC ( " " ) ; if ( hw -> mac . type == igc_i350 ) { nvm_offset = NVM_82580_LAN_FUNC_OFFSET ( hw -> bus . func ) ; ret_val = hw -> nvm . ops . read ( hw , NVM_INIT_CONTROL2_REG + nvm_offset , 1 , & nvm_data ) ; } else { ret_val = hw -> nvm . ops . read ( hw , NVM_INIT_CONTROL2_REG , 1 , & nvm_data ) ; } if ( ret_val ) { DEBUGOUT ( " \n " ) ; return ret_val ; } if ( ! ( nvm_data & NVM_WORD0F_PAUSE_MASK ) ) hw -> fc . requested_mode = igc_fc_none ; else if ( ( nvm_data & NVM_WORD0F_PAUSE_MASK ) == NVM_WORD0F_ASM_DIR ) hw -> fc . requested_mode = igc_fc_tx_pause ; else hw -> fc . requested_mode = igc_fc_full ; return IGC_SUCCESS ; }
igc_set_default_fc_generic - Set flow control default values
  @hw: pointer to the HW structure
igc_set_default_fc_generic - Set flow control default values @hw : pointer to the HW structure
/* Read and store word 0x0F of the EEPROM. This word contains bits
	 * that determine the hardware's default PAUSE (flow control) mode,
	 * a bit that determines whether the HW defaults to enabling or
	 * disabling auto-negotiation, and the direction of the
	 * SW defined pins. If there is no SW over-ride of the flow
	 * control setting, then the variable hw->fc will
	 * be initialized based on a value in the EEPROM.
	 */