example/FeatherM0/hpl/dsu/hpl_dsu.c
int32_t _crc_sync_crc32(struct _crc_sync_device *const device, uint32_t *const data, const uint32_t len, uint32_t *pcrc)
{
	int32_t  rc = ERR_NONE;
	uint32_t workaround_val;

	if (((uint32_t)data) & 0x00000003) {
		/* Address must be align with 4 bytes, refer to datasheet */
		return ERR_INVALID_ARG;
	}
	/* Workaround for DSU CRC32 computation is not functional */
	workaround_val = *((uint32_t *)0x41007058UL);
	(*((unsigned int *)0x41007058UL)) &= 0xFFFCFFFFUL;

	CRITICAL_SECTION_ENTER()
	/* Disable write-protected by PAC1->DSU before write DSU registers */
	_periph_unlock(device->hw);

	hri_dsu_write_ADDR_reg(device->hw, (uint32_t)data);
	hri_dsu_write_LENGTH_LENGTH_bf(device->hw, len);
	hri_dsu_write_DATA_reg(device->hw, *pcrc);
	hri_dsu_write_CTRL_reg(device->hw, DSU_CTRL_CRC);

	while (hri_dsu_get_STATUSA_DONE_bit(device->hw) == 0) {
	}

	if (hri_dsu_get_STATUSA_BERR_bit(device->hw)) {
		hri_dsu_clear_STATUSA_BERR_bit(device->hw);
		hri_dsu_clear_STATUSA_DONE_bit(device->hw);
		rc = ERR_IO;
	} else {
		*pcrc = (uint32_t)hri_dsu_read_DATA_reg(device->hw);
	}
	hri_dsu_clear_STATUSA_DONE_bit(device->hw);

	/* Restore write-protected of PAC->DSU */
	_periph_lock(device->hw);

	CRITICAL_SECTION_LEAVE()
	(*((unsigned int *)0x41007058UL)) = workaround_val;

	return rc;
}
/**
 * \brief Calculate CRC value of the buffer
 */
\brief Calculate CRC value of the buffer
\ brief Calculate CRC value of the buffer
int32_t _crc_sync_crc32(struct _crc_sync_device *const device, uint32_t *const data, const uint32_t len, uint32_t *pcrc)
{
	int32_t  rc = ERR_NONE;
	uint32_t workaround_val;
	if (((uint32_t)data) & 0x00000003) {
		return ERR_INVALID_ARG;
	}
	workaround_val = *((uint32_t *)0x41007058UL);
	(*((unsigned int *)0x41007058UL)) &= 0xFFFCFFFFUL;
	CRITICAL_SECTION_ENTER()
	_periph_unlock(device->hw);
	hri_dsu_write_ADDR_reg(device->hw, (uint32_t)data);
	hri_dsu_write_LENGTH_LENGTH_bf(device->hw, len);
	hri_dsu_write_DATA_reg(device->hw, *pcrc);
	hri_dsu_write_CTRL_reg(device->hw, DSU_CTRL_CRC);
	while (hri_dsu_get_STATUSA_DONE_bit(device->hw) == 0) {
	}
	if (hri_dsu_get_STATUSA_BERR_bit(device->hw)) {
		hri_dsu_clear_STATUSA_BERR_bit(device->hw);
		hri_dsu_clear_STATUSA_DONE_bit(device->hw);
		rc = ERR_IO;
	} else {
		*pcrc = (uint32_t)hri_dsu_read_DATA_reg(device->hw);
	}
	hri_dsu_clear_STATUSA_DONE_bit(device->hw);
	_periph_lock(device->hw);
	CRITICAL_SECTION_LEAVE()
	(*((unsigned int *)0x41007058UL)) = workaround_val;
	return rc;
}
int32_t _crc_sync_crc32 ( struct _crc_sync_device * const device , uint32_t * const data , const uint32_t len , uint32_t * pcrc ) { int32_t rc = ERR_NONE ; uint32_t workaround_val ; if ( ( ( uint32_t ) data ) & 0x00000003 ) { return ERR_INVALID_ARG ; } workaround_val = * ( ( uint32_t * ) 0x41007058UL ) ; ( * ( ( unsigned int * ) 0x41007058UL ) ) &= 0xFFFCFFFFUL ; CRITICAL_SECTION_ENTER ( ) _periph_unlock ( device -> hw ) ; hri_dsu_write_ADDR_reg ( device -> hw , ( uint32_t ) data ) ; hri_dsu_write_LENGTH_LENGTH_bf ( device -> hw , len ) ; hri_dsu_write_DATA_reg ( device -> hw , * pcrc ) ; hri_dsu_write_CTRL_reg ( device -> hw , DSU_CTRL_CRC ) ; while ( hri_dsu_get_STATUSA_DONE_bit ( device -> hw ) == 0 ) { } if ( hri_dsu_get_STATUSA_BERR_bit ( device -> hw ) ) { hri_dsu_clear_STATUSA_BERR_bit ( device -> hw ) ; hri_dsu_clear_STATUSA_DONE_bit ( device -> hw ) ; rc = ERR_IO ; } else { * pcrc = ( uint32_t ) hri_dsu_read_DATA_reg ( device -> hw ) ; } hri_dsu_clear_STATUSA_DONE_bit ( device -> hw ) ; _periph_lock ( device -> hw ) ; CRITICAL_SECTION_LEAVE ( ) ( * ( ( unsigned int * ) 0x41007058UL ) ) = workaround_val ; return rc ; }
\brief Calculate CRC value of the buffer
\ brief Calculate CRC value of the buffer
/* Address must be align with 4 bytes, refer to datasheet */ /* Workaround for DSU CRC32 computation is not functional */ /* Disable write-protected by PAC1->DSU before write DSU registers */ /* Restore write-protected of PAC->DSU */