XilinxProcessorIPLib/drivers/v_hdmitxss1/examples/xhdmi_example/idt_8t49n24x.c
static int IDT_8T49N24x_Configure(void *IicPtr, u8 I2CSlaveAddress)
{
	int Result;
	u32 Index;
	xil_printf("freerun\r\n");

	/* The configuration is started from address 0x08 */
	for (Index=8; Index<sizeof(IDT_8T49N24x_Config_Syn); Index++) {
		/* Skip address 0x70 */
		/* Address 0x70 enables the DPLL and APLL calibration */
		if (Index != 0x070) {
			Result = IDT_8T49N24x_SetRegister(IicPtr, I2CSlaveAddress,
							Index, IDT_8T49N24x_Config_Syn[Index]);
		}
	}
	return Result;
}
/*****************************************************************************/
/**
*
* This function the IDT 8TN49N24x device with the data from the
* configuration table.
*
* @param I2CBaseAddress is the baseaddress of the I2C core.
* @param I2CSlaveAddress is the 7-bit I2C slave address.
*
* @return None
*
* @note None.
*
******************************************************************************/
This function the IDT 8TN49N24x device with the data from the
configuration table.
This function the IDT 8TN49N24x device with the data from the configuration table .
static int IDT_8T49N24x_Configure(void *IicPtr, u8 I2CSlaveAddress)
{
	int Result;
	u32 Index;
	xil_printf("freerun\r\n");
	for (Index=8; Index<sizeof(IDT_8T49N24x_Config_Syn); Index++) {
		if (Index != 0x070) {
			Result = IDT_8T49N24x_SetRegister(IicPtr, I2CSlaveAddress,
							Index, IDT_8T49N24x_Config_Syn[Index]);
		}
	}
	return Result;
}
static int IDT_8T49N24x_Configure ( void * IicPtr , u8 I2CSlaveAddress ) { int Result ; u32 Index ; xil_printf ( " \r \n " ) ; for ( Index = 8 ; Index < sizeof ( IDT_8T49N24x_Config_Syn ) ; Index ++ ) { if ( Index != 0x070 ) { Result = IDT_8T49N24x_SetRegister ( IicPtr , I2CSlaveAddress , Index , IDT_8T49N24x_Config_Syn [ Index ] ) ; } } return Result ; }
This function the IDT 8TN49N24x device with the data from the
configuration table.
This function the IDT 8TN49N24x device with the data from the configuration table .
/* The configuration is started from address 0x08 */ /* Skip address 0x70 */ /* Address 0x70 enables the DPLL and APLL calibration */