src/dpdk/drivers/net/ixgbe/base/ixgbe_x550.c
s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw)
{
	ixgbe_link_speed link_speed;
	s32 status;
	u32 ctrl = 0;
	u32 i;
	bool link_up = false;
	u32 swfw_mask = hw->phy.phy_semaphore_mask;

	DEBUGFUNC("ixgbe_reset_hw_X550em");

	/* Call adapter stop to disable Tx/Rx and clear interrupts */
	status = hw->mac.ops.stop_adapter(hw);
	if (status != IXGBE_SUCCESS) {
		DEBUGOUT1("Failed to stop adapter, STATUS = %d\n", status);
		return status;
	}
	/* flush pending Tx transactions */
	ixgbe_clear_tx_pending(hw);

	ixgbe_set_mdio_speed(hw);

	/* PHY ops must be identified and initialized prior to reset */
	status = hw->phy.ops.init(hw);

	if (status)
		DEBUGOUT1("Failed to initialize PHY ops, STATUS = %d\n",
			  status);

	if (status == IXGBE_ERR_SFP_NOT_SUPPORTED ||
	    status == IXGBE_ERR_PHY_ADDR_INVALID) {
		DEBUGOUT("Returning from reset HW due to PHY init failure\n");
		return status;
	}

	/* start the external PHY */
	if (hw->phy.type == ixgbe_phy_x550em_ext_t) {
		status = ixgbe_init_ext_t_x550em(hw);
		if (status) {
			DEBUGOUT1("Failed to start the external PHY, STATUS = %d\n",
				  status);
			return status;
		}
	}

	/* Setup SFP module if there is one present. */
	if (hw->phy.sfp_setup_needed) {
		status = hw->mac.ops.setup_sfp(hw);
		hw->phy.sfp_setup_needed = false;
	}

	if (status == IXGBE_ERR_SFP_NOT_SUPPORTED)
		return status;

	/* Reset PHY */
	if (!hw->phy.reset_disable && hw->phy.ops.reset) {
		if (hw->phy.ops.reset(hw) == IXGBE_ERR_OVERTEMP)
			return IXGBE_ERR_OVERTEMP;
	}

mac_reset_top:
	/* Issue global reset to the MAC.  Needs to be SW reset if link is up.
	 * If link reset is used when link is up, it might reset the PHY when
	 * mng is using it.  If link is down or the flag to force full link
	 * reset is set, then perform link reset.
	 */
	ctrl = IXGBE_CTRL_LNK_RST;
	if (!hw->force_full_reset) {
		hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
		if (link_up)
			ctrl = IXGBE_CTRL_RST;
	}

	status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);
	if (status != IXGBE_SUCCESS) {
		ERROR_REPORT2(IXGBE_ERROR_CAUTION,
			"semaphore failed with %d", status);
		return IXGBE_ERR_SWFW_SYNC;
	}
	ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL);
	IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
	IXGBE_WRITE_FLUSH(hw);
	hw->mac.ops.release_swfw_sync(hw, swfw_mask);

	/* Poll for reset bit to self-clear meaning reset is complete */
	for (i = 0; i < 10; i++) {
		usec_delay(1);
		ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
		if (!(ctrl & IXGBE_CTRL_RST_MASK))
			break;
	}

	if (ctrl & IXGBE_CTRL_RST_MASK) {
		status = IXGBE_ERR_RESET_FAILED;
		DEBUGOUT("Reset polling failed to complete.\n");
	}

	msec_delay(50);

	/* Double resets are required for recovery from certain error
	 * conditions.  Between resets, it is necessary to stall to
	 * allow time for any pending HW events to complete.
	 */
	if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) {
		hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;
		goto mac_reset_top;
	}

	/* Store the permanent mac address */
	hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);

	/* Store MAC address from RAR0, clear receive address registers, and
	 * clear the multicast table.  Also reset num_rar_entries to 128,
	 * since we modify this value when programming the SAN MAC address.
	 */
	hw->mac.num_rar_entries = 128;
	hw->mac.ops.init_rx_addrs(hw);

	ixgbe_set_mdio_speed(hw);

	if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP)
		ixgbe_setup_mux_ctl(hw);

	if (status != IXGBE_SUCCESS)
		DEBUGOUT1("Reset HW failed, STATUS = %d\n", status);

	return status;
}
/**
 * ixgbe_reset_hw_X550em - Perform hardware reset
 * @hw: pointer to hardware structure
 *
 * Resets the hardware by resetting the transmit and receive units, masks
 * and clears all interrupts, perform a PHY reset, and perform a link (MAC)
 * reset.
 */
Perform hardware reset
@hw: pointer to hardware structure

Resets the hardware by resetting the transmit and receive units, masks
and clears all interrupts, perform a PHY reset, and perform a link (MAC)
reset.
Perform hardware reset @hw : pointer to hardware structure Resets the hardware by resetting the transmit and receive units masks and clears all interrupts perform a PHY reset and perform a link ( MAC ) reset .
s32 ixgbe_reset_hw_X550em(struct ixgbe_hw *hw)
{
	ixgbe_link_speed link_speed;
	s32 status;
	u32 ctrl = 0;
	u32 i;
	bool link_up = false;
	u32 swfw_mask = hw->phy.phy_semaphore_mask;
	DEBUGFUNC("ixgbe_reset_hw_X550em");
	status = hw->mac.ops.stop_adapter(hw);
	if (status != IXGBE_SUCCESS) {
		DEBUGOUT1("Failed to stop adapter, STATUS = %d\n", status);
		return status;
	}
	ixgbe_clear_tx_pending(hw);
	ixgbe_set_mdio_speed(hw);
	status = hw->phy.ops.init(hw);
	if (status)
		DEBUGOUT1("Failed to initialize PHY ops, STATUS = %d\n",
			  status);
	if (status == IXGBE_ERR_SFP_NOT_SUPPORTED ||
	    status == IXGBE_ERR_PHY_ADDR_INVALID) {
		DEBUGOUT("Returning from reset HW due to PHY init failure\n");
		return status;
	}
	if (hw->phy.type == ixgbe_phy_x550em_ext_t) {
		status = ixgbe_init_ext_t_x550em(hw);
		if (status) {
			DEBUGOUT1("Failed to start the external PHY, STATUS = %d\n",
				  status);
			return status;
		}
	}
	if (hw->phy.sfp_setup_needed) {
		status = hw->mac.ops.setup_sfp(hw);
		hw->phy.sfp_setup_needed = false;
	}
	if (status == IXGBE_ERR_SFP_NOT_SUPPORTED)
		return status;
	if (!hw->phy.reset_disable && hw->phy.ops.reset) {
		if (hw->phy.ops.reset(hw) == IXGBE_ERR_OVERTEMP)
			return IXGBE_ERR_OVERTEMP;
	}
mac_reset_top:
	ctrl = IXGBE_CTRL_LNK_RST;
	if (!hw->force_full_reset) {
		hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
		if (link_up)
			ctrl = IXGBE_CTRL_RST;
	}
	status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);
	if (status != IXGBE_SUCCESS) {
		ERROR_REPORT2(IXGBE_ERROR_CAUTION,
			"semaphore failed with %d", status);
		return IXGBE_ERR_SWFW_SYNC;
	}
	ctrl |= IXGBE_READ_REG(hw, IXGBE_CTRL);
	IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
	IXGBE_WRITE_FLUSH(hw);
	hw->mac.ops.release_swfw_sync(hw, swfw_mask);
	for (i = 0; i < 10; i++) {
		usec_delay(1);
		ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
		if (!(ctrl & IXGBE_CTRL_RST_MASK))
			break;
	}
	if (ctrl & IXGBE_CTRL_RST_MASK) {
		status = IXGBE_ERR_RESET_FAILED;
		DEBUGOUT("Reset polling failed to complete.\n");
	}
	msec_delay(50);
	if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) {
		hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;
		goto mac_reset_top;
	}
	hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);
	hw->mac.num_rar_entries = 128;
	hw->mac.ops.init_rx_addrs(hw);
	ixgbe_set_mdio_speed(hw);
	if (hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP)
		ixgbe_setup_mux_ctl(hw);
	if (status != IXGBE_SUCCESS)
		DEBUGOUT1("Reset HW failed, STATUS = %d\n", status);
	return status;
}
s32 ixgbe_reset_hw_X550em ( struct ixgbe_hw * hw ) { ixgbe_link_speed link_speed ; s32 status ; u32 ctrl = 0 ; u32 i ; bool link_up = false ; u32 swfw_mask = hw -> phy . phy_semaphore_mask ; DEBUGFUNC ( " " ) ; status = hw -> mac . ops . stop_adapter ( hw ) ; if ( status != IXGBE_SUCCESS ) { DEBUGOUT1 ( " \n " , status ) ; return status ; } ixgbe_clear_tx_pending ( hw ) ; ixgbe_set_mdio_speed ( hw ) ; status = hw -> phy . ops . init ( hw ) ; if ( status ) DEBUGOUT1 ( " \n " , status ) ; if ( status == IXGBE_ERR_SFP_NOT_SUPPORTED || status == IXGBE_ERR_PHY_ADDR_INVALID ) { DEBUGOUT ( " \n " ) ; return status ; } if ( hw -> phy . type == ixgbe_phy_x550em_ext_t ) { status = ixgbe_init_ext_t_x550em ( hw ) ; if ( status ) { DEBUGOUT1 ( " \n " , status ) ; return status ; } } if ( hw -> phy . sfp_setup_needed ) { status = hw -> mac . ops . setup_sfp ( hw ) ; hw -> phy . sfp_setup_needed = false ; } if ( status == IXGBE_ERR_SFP_NOT_SUPPORTED ) return status ; if ( ! hw -> phy . reset_disable && hw -> phy . ops . reset ) { if ( hw -> phy . ops . reset ( hw ) == IXGBE_ERR_OVERTEMP ) return IXGBE_ERR_OVERTEMP ; } mac_reset_top : ctrl = IXGBE_CTRL_LNK_RST ; if ( ! hw -> force_full_reset ) { hw -> mac . ops . check_link ( hw , & link_speed , & link_up , false ) ; if ( link_up ) ctrl = IXGBE_CTRL_RST ; } status = hw -> mac . ops . acquire_swfw_sync ( hw , swfw_mask ) ; if ( status != IXGBE_SUCCESS ) { ERROR_REPORT2 ( IXGBE_ERROR_CAUTION , " " , status ) ; return IXGBE_ERR_SWFW_SYNC ; } ctrl |= IXGBE_READ_REG ( hw , IXGBE_CTRL ) ; IXGBE_WRITE_REG ( hw , IXGBE_CTRL , ctrl ) ; IXGBE_WRITE_FLUSH ( hw ) ; hw -> mac . ops . release_swfw_sync ( hw , swfw_mask ) ; for ( i = 0 ; i < 10 ; i ++ ) { usec_delay ( 1 ) ; ctrl = IXGBE_READ_REG ( hw , IXGBE_CTRL ) ; if ( ! ( ctrl & IXGBE_CTRL_RST_MASK ) ) break ; } if ( ctrl & IXGBE_CTRL_RST_MASK ) { status = IXGBE_ERR_RESET_FAILED ; DEBUGOUT ( " \n " ) ; } msec_delay ( 50 ) ; if ( hw -> mac . flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED ) { hw -> mac . flags &= ~ IXGBE_FLAGS_DOUBLE_RESET_REQUIRED ; goto mac_reset_top ; } hw -> mac . ops . get_mac_addr ( hw , hw -> mac . perm_addr ) ; hw -> mac . num_rar_entries = 128 ; hw -> mac . ops . init_rx_addrs ( hw ) ; ixgbe_set_mdio_speed ( hw ) ; if ( hw -> device_id == IXGBE_DEV_ID_X550EM_X_SFP ) ixgbe_setup_mux_ctl ( hw ) ; if ( status != IXGBE_SUCCESS ) DEBUGOUT1 ( " \n " , status ) ; return status ; }
ixgbe_reset_hw_X550em - Perform hardware reset
 @hw: pointer to hardware structure
ixgbe_reset_hw_X550em - Perform hardware reset @hw : pointer to hardware structure
/* Call adapter stop to disable Tx/Rx and clear interrupts */ /* flush pending Tx transactions */ /* PHY ops must be identified and initialized prior to reset */ /* start the external PHY */ /* Setup SFP module if there is one present. */ /* Reset PHY */ /* Issue global reset to the MAC.  Needs to be SW reset if link is up.
	 * If link reset is used when link is up, it might reset the PHY when
	 * mng is using it.  If link is down or the flag to force full link
	 * reset is set, then perform link reset.
	 */ /* Poll for reset bit to self-clear meaning reset is complete */ /* Double resets are required for recovery from certain error
	 * conditions.  Between resets, it is necessary to stall to
	 * allow time for any pending HW events to complete.
	 */ /* Store the permanent mac address */ /* Store MAC address from RAR0, clear receive address registers, and
	 * clear the multicast table.  Also reset num_rar_entries to 128,
	 * since we modify this value when programming the SAN MAC address.
	 */