XilinxProcessorIPLib/drivers/canps/src/xcanps_intr.c
u32 XCanPs_IntrGetEnabled(XCanPs *InstancePtr)
{

	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);

	return XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
				XCANPS_IER_OFFSET);
}
/****************************************************************************/
/**
*
* This routine returns enabled interrupt(s). Use the XCANPS_IXR_* constants
* defined in xcanps_hw.h to interpret the returned value.
*
* @param	InstancePtr is a pointer to the XCanPs instance.
*
* @return	Enabled interrupt(s) in a 32-bit format.
*
* @note		None.
*
*****************************************************************************/
This routine returns enabled interrupt(s). Use the XCANPS_IXR_* constants
defined in xcanps_hw.h to interpret the returned value.
This routine returns enabled interrupt ( s ) . Use the XCANPS_IXR_ * constants defined in xcanps_hw . h to interpret the returned value .
u32 XCanPs_IntrGetEnabled(XCanPs *InstancePtr)
{
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	return XCanPs_ReadReg(InstancePtr->CanConfig.BaseAddr,
				XCANPS_IER_OFFSET);
}
u32 XCanPs_IntrGetEnabled ( XCanPs * InstancePtr ) { Xil_AssertNonvoid ( InstancePtr != NULL ) ; Xil_AssertNonvoid ( InstancePtr -> IsReady == XIL_COMPONENT_IS_READY ) ; return XCanPs_ReadReg ( InstancePtr -> CanConfig . BaseAddr , XCANPS_IER_OFFSET ) ; }
This routine returns enabled interrupt(s).
This routine returns enabled interrupt ( s ) .