XilinxProcessorIPLib/drivers/mcdma/src/xmcdma_bd.c
int XMcdma_UpdateChanTDesc(XMcdma_ChanCtrl *Chan)
{
	u32 RegBase;
	u32 Offset;
	u32 Chan_id = Chan->Chan_id;
	u32 Status;

	RegBase = Chan->ChanBase;
	Offset = (Chan->Chan_id - 1) * XMCDMA_NXTCHAN_OFFSET;

	if (!XMcdma_HwIsStarted(Chan)) {
		Status = XMcdma_Start(Chan);
		if (Status != XST_SUCCESS) {
			xil_printf("Failed to start the DMA\n\r");
			return XST_DMA_ERROR;
		}
	}

	if (!XMcdma_ChanHwIsStarted(Chan, Chan_id)) {
		XMcdma_WriteReg(RegBase, XMCDMA_CR_OFFSET + Offset,
				XMcdma_ReadReg(RegBase,
					       (XMCDMA_CR_OFFSET + Offset)) |
					       XMCDMA_CCR_RUNSTOP_MASK);
	}

	/* Note as started */
	Chan->ChanState = XMCDMA_CHAN_BUSY;

	if (Chan->BdPendingCnt > 0) {
		XMCDMA_CACHE_INVALIDATE(Chan->BdTail);
#if !defined (__MICROBLAZE__)
			dmb();
#endif
		XMcdma_WriteReg(Chan->ChanBase,
				(XMCDMA_TDESC_OFFSET + Offset),
				LOWER_32_BITS((UINTPTR)Chan->BdTail));
		if (Chan->ext_addr) {
			XMcdma_WriteReg(Chan->ChanBase,
				  (XMCDMA_TDESC_MSB_OFFSET + Offset),
				  UPPER_32_BITS((UINTPTR)Chan->BdTail));
		}
		Chan->BdSubmitCnt += Chan->BdPendingCnt;
		Chan->BdPendingCnt = 0;

		return XST_SUCCESS;
	}

	return XST_DMA_ERROR;
}
/*****************************************************************************/
/**
* Update Tail Desc for the Channel
*
* @param	Chan is the MCDMA Channel to be worked on.
*
* @return
*		- XST_SUCCESS upon success
*		- XST_DMA_ERROR if no valid BD available to put into current
*		BD register
*
*
*****************************************************************************/
Update Tail Desc for the Channel
Update Tail Desc for the Channel
int XMcdma_UpdateChanTDesc(XMcdma_ChanCtrl *Chan)
{
	u32 RegBase;
	u32 Offset;
	u32 Chan_id = Chan->Chan_id;
	u32 Status;
	RegBase = Chan->ChanBase;
	Offset = (Chan->Chan_id - 1) * XMCDMA_NXTCHAN_OFFSET;
	if (!XMcdma_HwIsStarted(Chan)) {
		Status = XMcdma_Start(Chan);
		if (Status != XST_SUCCESS) {
			xil_printf("Failed to start the DMA\n\r");
			return XST_DMA_ERROR;
		}
	}
	if (!XMcdma_ChanHwIsStarted(Chan, Chan_id)) {
		XMcdma_WriteReg(RegBase, XMCDMA_CR_OFFSET + Offset,
				XMcdma_ReadReg(RegBase,
					       (XMCDMA_CR_OFFSET + Offset)) |
					       XMCDMA_CCR_RUNSTOP_MASK);
	}
	Chan->ChanState = XMCDMA_CHAN_BUSY;
	if (Chan->BdPendingCnt > 0) {
		XMCDMA_CACHE_INVALIDATE(Chan->BdTail);
#if !defined (__MICROBLAZE__)
			dmb();
#endif
		XMcdma_WriteReg(Chan->ChanBase,
				(XMCDMA_TDESC_OFFSET + Offset),
				LOWER_32_BITS((UINTPTR)Chan->BdTail));
		if (Chan->ext_addr) {
			XMcdma_WriteReg(Chan->ChanBase,
				  (XMCDMA_TDESC_MSB_OFFSET + Offset),
				  UPPER_32_BITS((UINTPTR)Chan->BdTail));
		}
		Chan->BdSubmitCnt += Chan->BdPendingCnt;
		Chan->BdPendingCnt = 0;
		return XST_SUCCESS;
	}
	return XST_DMA_ERROR;
}
int XMcdma_UpdateChanTDesc ( XMcdma_ChanCtrl * Chan ) { u32 RegBase ; u32 Offset ; u32 Chan_id = Chan -> Chan_id ; u32 Status ; RegBase = Chan -> ChanBase ; Offset = ( Chan -> Chan_id - 1 ) * XMCDMA_NXTCHAN_OFFSET ; if ( ! XMcdma_HwIsStarted ( Chan ) ) { Status = XMcdma_Start ( Chan ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \n \r " ) ; return XST_DMA_ERROR ; } } if ( ! XMcdma_ChanHwIsStarted ( Chan , Chan_id ) ) { XMcdma_WriteReg ( RegBase , XMCDMA_CR_OFFSET + Offset , XMcdma_ReadReg ( RegBase , ( XMCDMA_CR_OFFSET + Offset ) ) | XMCDMA_CCR_RUNSTOP_MASK ) ; } Chan -> ChanState = XMCDMA_CHAN_BUSY ; if ( Chan -> BdPendingCnt > 0 ) { XMCDMA_CACHE_INVALIDATE ( Chan -> BdTail ) ; #if ! defined ( __MICROBLAZE__ ) dmb ( ) ; #endif XMcdma_WriteReg ( Chan -> ChanBase , ( XMCDMA_TDESC_OFFSET + Offset ) , LOWER_32_BITS ( ( UINTPTR ) Chan -> BdTail ) ) ; if ( Chan -> ext_addr ) { XMcdma_WriteReg ( Chan -> ChanBase , ( XMCDMA_TDESC_MSB_OFFSET + Offset ) , UPPER_32_BITS ( ( UINTPTR ) Chan -> BdTail ) ) ; } Chan -> BdSubmitCnt += Chan -> BdPendingCnt ; Chan -> BdPendingCnt = 0 ; return XST_SUCCESS ; } return XST_DMA_ERROR ; }
Update Tail Desc for the Channel
Update Tail Desc for the Channel
/* Note as started */