XilinxProcessorIPLib/drivers/intc/src/xintc.c
void XIntc_Enable(XIntc * InstancePtr, u8 Id)
{
	u32 CurrentIER;
	u32 Mask;
	XIntc_Config *CfgPtr;

	/*
	 * Assert the arguments
	 */
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(Id < XPAR_INTC_MAX_NUM_INTR_INPUTS);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);

	if (Id > 31) {

		/* Enable user required Id in Slave controller */
		CfgPtr = XIntc_LookupConfig(Id/32);
		if (CfgPtr == NULL) {
			return;
		}

		CurrentIER = XIntc_In32(CfgPtr->BaseAddress + XIN_IER_OFFSET);

		/* Convert from integer id to bit mask */
		Mask = XIntc_BitPosMask[(Id%32)];

		XIntc_Out32(CfgPtr->BaseAddress + XIN_IER_OFFSET,
						(CurrentIER | Mask));
	}
	else {
		/*
		 * The Id is used to create the appropriate mask for the
		 * desired bit position.
		 */
		Mask = XIntc_BitPosMask[Id];

		/*
		 * Enable the selected interrupt source by reading the
		 * interrupt enable register and then modifying only the
		 * specified interrupt id enable
		 */
		CurrentIER = XIntc_In32(InstancePtr->BaseAddress +
							XIN_IER_OFFSET);
		XIntc_Out32(InstancePtr->BaseAddress + XIN_IER_OFFSET,
		    (CurrentIER | Mask));
	}
}
/*****************************************************************************/
/**
*
* Enables the interrupt source provided as the argument Id. Any pending
* interrupt condition for the specified Id will occur after this function is
* called. In Cascade mode, enables corresponding interrupt of Slave controllers
* depending on the Id.
*
* @param	InstancePtr is a pointer to the XIntc instance to be worked on.
* @param	Id contains the ID of the interrupt source and should be in the
*		range of 0 to XPAR_INTC_MAX_NUM_INTR_INPUTS - 1 with 0 being
*		the highest priority interrupt.
*
* @return	None.
*
* @note		None.
*
****************************************************************************/
Enables the interrupt source provided as the argument Id. Any pending
interrupt condition for the specified Id will occur after this function is
called. In Cascade mode, enables corresponding interrupt of Slave controllers
depending on the Id.
Enables the interrupt source provided as the argument Id . Any pending interrupt condition for the specified Id will occur after this function is called . In Cascade mode enables corresponding interrupt of Slave controllers depending on the Id .
void XIntc_Enable(XIntc * InstancePtr, u8 Id)
{
	u32 CurrentIER;
	u32 Mask;
	XIntc_Config *CfgPtr;
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(Id < XPAR_INTC_MAX_NUM_INTR_INPUTS);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	if (Id > 31) {
		CfgPtr = XIntc_LookupConfig(Id/32);
		if (CfgPtr == NULL) {
			return;
		}
		CurrentIER = XIntc_In32(CfgPtr->BaseAddress + XIN_IER_OFFSET);
		Mask = XIntc_BitPosMask[(Id%32)];
		XIntc_Out32(CfgPtr->BaseAddress + XIN_IER_OFFSET,
						(CurrentIER | Mask));
	}
	else {
		Mask = XIntc_BitPosMask[Id];
		CurrentIER = XIntc_In32(InstancePtr->BaseAddress +
							XIN_IER_OFFSET);
		XIntc_Out32(InstancePtr->BaseAddress + XIN_IER_OFFSET,
		    (CurrentIER | Mask));
	}
}
void XIntc_Enable ( XIntc * InstancePtr , u8 Id ) { u32 CurrentIER ; u32 Mask ; XIntc_Config * CfgPtr ; Xil_AssertVoid ( InstancePtr != NULL ) ; Xil_AssertVoid ( Id < XPAR_INTC_MAX_NUM_INTR_INPUTS ) ; Xil_AssertVoid ( InstancePtr -> IsReady == XIL_COMPONENT_IS_READY ) ; if ( Id > 31 ) { CfgPtr = XIntc_LookupConfig ( Id / 32 ) ; if ( CfgPtr == NULL ) { return ; } CurrentIER = XIntc_In32 ( CfgPtr -> BaseAddress + XIN_IER_OFFSET ) ; Mask = XIntc_BitPosMask [ ( Id % 32 ) ] ; XIntc_Out32 ( CfgPtr -> BaseAddress + XIN_IER_OFFSET , ( CurrentIER | Mask ) ) ; } else { Mask = XIntc_BitPosMask [ Id ] ; CurrentIER = XIntc_In32 ( InstancePtr -> BaseAddress + XIN_IER_OFFSET ) ; XIntc_Out32 ( InstancePtr -> BaseAddress + XIN_IER_OFFSET , ( CurrentIER | Mask ) ) ; } }
Enables the interrupt source provided as the argument Id.
Enables the interrupt source provided as the argument Id .
/*
	 * Assert the arguments
	 */ /* Enable user required Id in Slave controller */ /* Convert from integer id to bit mask */ /*
		 * The Id is used to create the appropriate mask for the
		 * desired bit position.
		 */ /*
		 * Enable the selected interrupt source by reading the
		 * interrupt enable register and then modifying only the
		 * specified interrupt id enable
		 */