XilinxProcessorIPLib/drivers/hdcp22_tx_dp/src/xhdcp22_tx.c
u8 XHdcp22Tx_IsDwnstrmCapable (XHdcp22_Tx *InstancePtr)
{
	u8 DdcBuf[1];
	int Status = XST_FAILURE;

	if (InstancePtr->Config.Protocol == XHDCP22_TX_DP) {
		u8 RxCaps[3] = {0};
		Status = InstancePtr->TxDpAuxReadCallback(
				InstancePtr->TxDpAuxReadCallbackRef,
				XHDCP22_TX_DP_HDCPPORT_RX_CAPS_OFFSET,
				(void *)RxCaps,
				XHDCP22_TX_DP_HDCPPORT_RX_CAPS_SIZE);
		return ((RxCaps[0] >> 1) & 0x01);
	}

	if (InstancePtr->DdcHandlerRef) {
		/* Read HDCP2Version register */
		InstancePtr->IsReceiverHDCP2Capable = (FALSE);
		DdcBuf[0] = XHDCP22_TX_HDCPPORT_VERSION_OFFSET;
		Status = InstancePtr->DdcWrite(XHDCP22_TX_DDC_BASE_ADDRESS, 1, DdcBuf,
				(FALSE), InstancePtr->DdcHandlerRef);
		if (Status == (XST_SUCCESS)) {
			Status = InstancePtr->DdcRead(XHDCP22_TX_DDC_BASE_ADDRESS,
					sizeof(DdcBuf), DdcBuf, (TRUE),
					InstancePtr->DdcHandlerRef);
		}
	}

	/* Check expected value */
	if (Status == (XST_SUCCESS)) {
		if (DdcBuf[0]  == 0x04) {
			return TRUE;
		}
		else {
			return FALSE;
		}
	}
	else {
		return FALSE;
	}
}
/*****************************************************************************/
/**
*
* This function checks if the downstream device HDCP2Version register is set.
*
* @param  InstancePtr is a pointer to the XHdcp22Tx core instance.
*
* @return - TRUE if downstream device is HDCP 2.2 capable.
*         - FALSE if downstream device is not HDCP 2.2 capable.
*
* @note   None.
*
******************************************************************************/
This function checks if the downstream device HDCP2Version register is set.
This function checks if the downstream device HDCP2Version register is set .
u8 XHdcp22Tx_IsDwnstrmCapable (XHdcp22_Tx *InstancePtr)
{
	u8 DdcBuf[1];
	int Status = XST_FAILURE;
	if (InstancePtr->Config.Protocol == XHDCP22_TX_DP) {
		u8 RxCaps[3] = {0};
		Status = InstancePtr->TxDpAuxReadCallback(
				InstancePtr->TxDpAuxReadCallbackRef,
				XHDCP22_TX_DP_HDCPPORT_RX_CAPS_OFFSET,
				(void *)RxCaps,
				XHDCP22_TX_DP_HDCPPORT_RX_CAPS_SIZE);
		return ((RxCaps[0] >> 1) & 0x01);
	}
	if (InstancePtr->DdcHandlerRef) {
		InstancePtr->IsReceiverHDCP2Capable = (FALSE);
		DdcBuf[0] = XHDCP22_TX_HDCPPORT_VERSION_OFFSET;
		Status = InstancePtr->DdcWrite(XHDCP22_TX_DDC_BASE_ADDRESS, 1, DdcBuf,
				(FALSE), InstancePtr->DdcHandlerRef);
		if (Status == (XST_SUCCESS)) {
			Status = InstancePtr->DdcRead(XHDCP22_TX_DDC_BASE_ADDRESS,
					sizeof(DdcBuf), DdcBuf, (TRUE),
					InstancePtr->DdcHandlerRef);
		}
	}
	if (Status == (XST_SUCCESS)) {
		if (DdcBuf[0]  == 0x04) {
			return TRUE;
		}
		else {
			return FALSE;
		}
	}
	else {
		return FALSE;
	}
}
u8 XHdcp22Tx_IsDwnstrmCapable ( XHdcp22_Tx * InstancePtr ) { u8 DdcBuf [ 1 ] ; int Status = XST_FAILURE ; if ( InstancePtr -> Config . Protocol == XHDCP22_TX_DP ) { u8 RxCaps [ 3 ] = { 0 } ; Status = InstancePtr -> TxDpAuxReadCallback ( InstancePtr -> TxDpAuxReadCallbackRef , XHDCP22_TX_DP_HDCPPORT_RX_CAPS_OFFSET , ( void * ) RxCaps , XHDCP22_TX_DP_HDCPPORT_RX_CAPS_SIZE ) ; return ( ( RxCaps [ 0 ] >> 1 ) & 0x01 ) ; } if ( InstancePtr -> DdcHandlerRef ) { InstancePtr -> IsReceiverHDCP2Capable = ( FALSE ) ; DdcBuf [ 0 ] = XHDCP22_TX_HDCPPORT_VERSION_OFFSET ; Status = InstancePtr -> DdcWrite ( XHDCP22_TX_DDC_BASE_ADDRESS , 1 , DdcBuf , ( FALSE ) , InstancePtr -> DdcHandlerRef ) ; if ( Status == ( XST_SUCCESS ) ) { Status = InstancePtr -> DdcRead ( XHDCP22_TX_DDC_BASE_ADDRESS , sizeof ( DdcBuf ) , DdcBuf , ( TRUE ) , InstancePtr -> DdcHandlerRef ) ; } } if ( Status == ( XST_SUCCESS ) ) { if ( DdcBuf [ 0 ] == 0x04 ) { return TRUE ; } else { return FALSE ; } } else { return FALSE ; } }
This function checks if the downstream device HDCP2Version register is set.
This function checks if the downstream device HDCP2Version register is set .
/* Read HDCP2Version register */ /* Check expected value */