src/dpdk/drivers/net/i40e/i40e_ethdev.c
void
i40e_set_symmetric_hash_enable_per_port(struct i40e_hw *hw, uint8_t enable)
{
	uint32_t reg = i40e_read_rx_ctl(hw, I40E_PRTQF_CTL_0);

	if (enable > 0) {
		if (reg & I40E_PRTQF_CTL_0_HSYM_ENA_MASK)
			return;

		reg |= I40E_PRTQF_CTL_0_HSYM_ENA_MASK;
	} else {
		if (!(reg & I40E_PRTQF_CTL_0_HSYM_ENA_MASK))
			return;

		reg &= ~I40E_PRTQF_CTL_0_HSYM_ENA_MASK;
	}
	i40e_write_rx_ctl(hw, I40E_PRTQF_CTL_0, reg);
	I40E_WRITE_FLUSH(hw);
}
/* Set the symmetric hash enable configurations per port */
Set the symmetric hash enable configurations per port
Set the symmetric hash enable configurations per port
void
i40e_set_symmetric_hash_enable_per_port(struct i40e_hw *hw, uint8_t enable)
{
	uint32_t reg = i40e_read_rx_ctl(hw, I40E_PRTQF_CTL_0);
	if (enable > 0) {
		if (reg & I40E_PRTQF_CTL_0_HSYM_ENA_MASK)
			return;
		reg |= I40E_PRTQF_CTL_0_HSYM_ENA_MASK;
	} else {
		if (!(reg & I40E_PRTQF_CTL_0_HSYM_ENA_MASK))
			return;
		reg &= ~I40E_PRTQF_CTL_0_HSYM_ENA_MASK;
	}
	i40e_write_rx_ctl(hw, I40E_PRTQF_CTL_0, reg);
	I40E_WRITE_FLUSH(hw);
}
void i40e_set_symmetric_hash_enable_per_port ( struct i40e_hw * hw , uint8_t enable ) { uint32_t reg = i40e_read_rx_ctl ( hw , I40E_PRTQF_CTL_0 ) ; if ( enable > 0 ) { if ( reg & I40E_PRTQF_CTL_0_HSYM_ENA_MASK ) return ; reg |= I40E_PRTQF_CTL_0_HSYM_ENA_MASK ; } else { if ( ! ( reg & I40E_PRTQF_CTL_0_HSYM_ENA_MASK ) ) return ; reg &= ~ I40E_PRTQF_CTL_0_HSYM_ENA_MASK ; } i40e_write_rx_ctl ( hw , I40E_PRTQF_CTL_0 , reg ) ; I40E_WRITE_FLUSH ( hw ) ; }
Set the symmetric hash enable configurations per port
Set the symmetric hash enable configurations per port