src/dpdk/drivers/net/e1000/base/e1000_ich8lan.c
s32 e1000_set_eee_pchlan(struct e1000_hw *hw)
{
	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
	s32 ret_val;
	u16 lpa, pcs_status, adv, adv_addr, lpi_ctrl, data;

	DEBUGFUNC("e1000_set_eee_pchlan");

	switch (hw->phy.type) {
	case e1000_phy_82579:
		lpa = I82579_EEE_LP_ABILITY;
		pcs_status = I82579_EEE_PCS_STATUS;
		adv_addr = I82579_EEE_ADVERTISEMENT;
		break;
	case e1000_phy_i217:
		lpa = I217_EEE_LP_ABILITY;
		pcs_status = I217_EEE_PCS_STATUS;
		adv_addr = I217_EEE_ADVERTISEMENT;
		break;
	default:
		return E1000_SUCCESS;
	}

	ret_val = hw->phy.ops.acquire(hw);
	if (ret_val)
		return ret_val;

	ret_val = hw->phy.ops.read_reg_locked(hw, I82579_LPI_CTRL, &lpi_ctrl);
	if (ret_val)
		goto release;

	/* Clear bits that enable EEE in various speeds */
	lpi_ctrl &= ~I82579_LPI_CTRL_ENABLE_MASK;

	/* Enable EEE if not disabled by user */
	if (!dev_spec->eee_disable) {
		/* Save off link partner's EEE ability */
		ret_val = e1000_read_emi_reg_locked(hw, lpa,
						    &dev_spec->eee_lp_ability);
		if (ret_val)
			goto release;

		/* Read EEE advertisement */
		ret_val = e1000_read_emi_reg_locked(hw, adv_addr, &adv);
		if (ret_val)
			goto release;

		/* Enable EEE only for speeds in which the link partner is
		 * EEE capable and for which we advertise EEE.
		 */
		if (adv & dev_spec->eee_lp_ability & I82579_EEE_1000_SUPPORTED)
			lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;

		if (adv & dev_spec->eee_lp_ability & I82579_EEE_100_SUPPORTED) {
			hw->phy.ops.read_reg_locked(hw, PHY_LP_ABILITY, &data);
			if (data & NWAY_LPAR_100TX_FD_CAPS)
				lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
			else
				/* EEE is not supported in 100Half, so ignore
				 * partner's EEE in 100 ability if full-duplex
				 * is not advertised.
				 */
				dev_spec->eee_lp_ability &=
				    ~I82579_EEE_100_SUPPORTED;
		}
	}

	if (hw->phy.type == e1000_phy_82579) {
		ret_val = e1000_read_emi_reg_locked(hw, I82579_LPI_PLL_SHUT,
						    &data);
		if (ret_val)
			goto release;

		data &= ~I82579_LPI_100_PLL_SHUT;
		ret_val = e1000_write_emi_reg_locked(hw, I82579_LPI_PLL_SHUT,
						     data);
	}

	/* R/Clr IEEE MMD 3.1 bits 11:10 - Tx/Rx LPI Received */
	ret_val = e1000_read_emi_reg_locked(hw, pcs_status, &data);
	if (ret_val)
		goto release;

	ret_val = hw->phy.ops.write_reg_locked(hw, I82579_LPI_CTRL, lpi_ctrl);
release:
	hw->phy.ops.release(hw);

	return ret_val;
}
/**
 *  e1000_set_eee_pchlan - Enable/disable EEE support
 *  @hw: pointer to the HW structure
 *
 *  Enable/disable EEE based on setting in dev_spec structure, the duplex of
 *  the link and the EEE capabilities of the link partner.  The LPI Control
 *  register bits will remain set only if/when link is up.
 *
 *  EEE LPI must not be asserted earlier than one second after link is up.
 *  On 82579, EEE LPI should not be enabled until such time otherwise there
 *  can be link issues with some switches.  Other devices can have EEE LPI
 *  enabled immediately upon link up since they have a timer in hardware which
 *  prevents LPI from being asserted too early.
 **/
Enable/disable EEE support
@hw: pointer to the HW structure

Enable/disable EEE based on setting in dev_spec structure, the duplex of
the link and the EEE capabilities of the link partner.  The LPI Control
register bits will remain set only if/when link is up.

EEE LPI must not be asserted earlier than one second after link is up.
On 82579, EEE LPI should not be enabled until such time otherwise there
can be link issues with some switches.  Other devices can have EEE LPI
enabled immediately upon link up since they have a timer in hardware which
prevents LPI from being asserted too early.
Enable / disable EEE support @hw : pointer to the HW structure Enable / disable EEE based on setting in dev_spec structure the duplex of the link and the EEE capabilities of the link partner . The LPI Control register bits will remain set only if / when link is up . EEE LPI must not be asserted earlier than one second after link is up . On 82579 EEE LPI should not be enabled until such time otherwise there can be link issues with some switches . Other devices can have EEE LPI enabled immediately upon link up since they have a timer in hardware which prevents LPI from being asserted too early .
s32 e1000_set_eee_pchlan(struct e1000_hw *hw)
{
	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
	s32 ret_val;
	u16 lpa, pcs_status, adv, adv_addr, lpi_ctrl, data;
	DEBUGFUNC("e1000_set_eee_pchlan");
	switch (hw->phy.type) {
	case e1000_phy_82579:
		lpa = I82579_EEE_LP_ABILITY;
		pcs_status = I82579_EEE_PCS_STATUS;
		adv_addr = I82579_EEE_ADVERTISEMENT;
		break;
	case e1000_phy_i217:
		lpa = I217_EEE_LP_ABILITY;
		pcs_status = I217_EEE_PCS_STATUS;
		adv_addr = I217_EEE_ADVERTISEMENT;
		break;
	default:
		return E1000_SUCCESS;
	}
	ret_val = hw->phy.ops.acquire(hw);
	if (ret_val)
		return ret_val;
	ret_val = hw->phy.ops.read_reg_locked(hw, I82579_LPI_CTRL, &lpi_ctrl);
	if (ret_val)
		goto release;
	lpi_ctrl &= ~I82579_LPI_CTRL_ENABLE_MASK;
	if (!dev_spec->eee_disable) {
		ret_val = e1000_read_emi_reg_locked(hw, lpa,
						    &dev_spec->eee_lp_ability);
		if (ret_val)
			goto release;
		ret_val = e1000_read_emi_reg_locked(hw, adv_addr, &adv);
		if (ret_val)
			goto release;
		if (adv & dev_spec->eee_lp_ability & I82579_EEE_1000_SUPPORTED)
			lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
		if (adv & dev_spec->eee_lp_ability & I82579_EEE_100_SUPPORTED) {
			hw->phy.ops.read_reg_locked(hw, PHY_LP_ABILITY, &data);
			if (data & NWAY_LPAR_100TX_FD_CAPS)
				lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
			else
				dev_spec->eee_lp_ability &=
				    ~I82579_EEE_100_SUPPORTED;
		}
	}
	if (hw->phy.type == e1000_phy_82579) {
		ret_val = e1000_read_emi_reg_locked(hw, I82579_LPI_PLL_SHUT,
						    &data);
		if (ret_val)
			goto release;
		data &= ~I82579_LPI_100_PLL_SHUT;
		ret_val = e1000_write_emi_reg_locked(hw, I82579_LPI_PLL_SHUT,
						     data);
	}
	ret_val = e1000_read_emi_reg_locked(hw, pcs_status, &data);
	if (ret_val)
		goto release;
	ret_val = hw->phy.ops.write_reg_locked(hw, I82579_LPI_CTRL, lpi_ctrl);
release:
	hw->phy.ops.release(hw);
	return ret_val;
}
s32 e1000_set_eee_pchlan ( struct e1000_hw * hw ) { struct e1000_dev_spec_ich8lan * dev_spec = & hw -> dev_spec . ich8lan ; s32 ret_val ; u16 lpa , pcs_status , adv , adv_addr , lpi_ctrl , data ; DEBUGFUNC ( " " ) ; switch ( hw -> phy . type ) { case e1000_phy_82579 : lpa = I82579_EEE_LP_ABILITY ; pcs_status = I82579_EEE_PCS_STATUS ; adv_addr = I82579_EEE_ADVERTISEMENT ; break ; case e1000_phy_i217 : lpa = I217_EEE_LP_ABILITY ; pcs_status = I217_EEE_PCS_STATUS ; adv_addr = I217_EEE_ADVERTISEMENT ; break ; default : return E1000_SUCCESS ; } ret_val = hw -> phy . ops . acquire ( hw ) ; if ( ret_val ) return ret_val ; ret_val = hw -> phy . ops . read_reg_locked ( hw , I82579_LPI_CTRL , & lpi_ctrl ) ; if ( ret_val ) goto release ; lpi_ctrl &= ~ I82579_LPI_CTRL_ENABLE_MASK ; if ( ! dev_spec -> eee_disable ) { ret_val = e1000_read_emi_reg_locked ( hw , lpa , & dev_spec -> eee_lp_ability ) ; if ( ret_val ) goto release ; ret_val = e1000_read_emi_reg_locked ( hw , adv_addr , & adv ) ; if ( ret_val ) goto release ; if ( adv & dev_spec -> eee_lp_ability & I82579_EEE_1000_SUPPORTED ) lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE ; if ( adv & dev_spec -> eee_lp_ability & I82579_EEE_100_SUPPORTED ) { hw -> phy . ops . read_reg_locked ( hw , PHY_LP_ABILITY , & data ) ; if ( data & NWAY_LPAR_100TX_FD_CAPS ) lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE ; else dev_spec -> eee_lp_ability &= ~ I82579_EEE_100_SUPPORTED ; } } if ( hw -> phy . type == e1000_phy_82579 ) { ret_val = e1000_read_emi_reg_locked ( hw , I82579_LPI_PLL_SHUT , & data ) ; if ( ret_val ) goto release ; data &= ~ I82579_LPI_100_PLL_SHUT ; ret_val = e1000_write_emi_reg_locked ( hw , I82579_LPI_PLL_SHUT , data ) ; } ret_val = e1000_read_emi_reg_locked ( hw , pcs_status , & data ) ; if ( ret_val ) goto release ; ret_val = hw -> phy . ops . write_reg_locked ( hw , I82579_LPI_CTRL , lpi_ctrl ) ; release : hw -> phy . ops . release ( hw ) ; return ret_val ; }
e1000_set_eee_pchlan - Enable/disable EEE support
  @hw: pointer to the HW structure
e1000_set_eee_pchlan - Enable / disable EEE support @hw : pointer to the HW structure
/* Clear bits that enable EEE in various speeds */ /* Enable EEE if not disabled by user */ /* Save off link partner's EEE ability */ /* Read EEE advertisement */ /* Enable EEE only for speeds in which the link partner is
		 * EEE capable and for which we advertise EEE.
		 */ /* EEE is not supported in 100Half, so ignore
				 * partner's EEE in 100 ability if full-duplex
				 * is not advertised.
				 */ /* R/Clr IEEE MMD 3.1 bits 11:10 - Tx/Rx LPI Received */