XilinxProcessorIPLib/drivers/intc/src/xintc.c
void XIntc_Disable(XIntc * InstancePtr, u8 Id)
{
	u32 CurrentIER;
	u32 Mask;
	XIntc_Config *CfgPtr;

	/*
	 * Assert the arguments
	 */
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(Id < XPAR_INTC_MAX_NUM_INTR_INPUTS);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);

	if (Id > 31) {
		/* Enable user required Id in Slave controller */
		CfgPtr = XIntc_LookupConfig(Id/32);
		if (CfgPtr == NULL) {
			return;
		}

		CurrentIER = XIntc_In32(CfgPtr->BaseAddress + XIN_IER_OFFSET);

		/* Convert from integer id to bit mask */
		Mask = XIntc_BitPosMask[(Id%32)];

		XIntc_Out32(CfgPtr->BaseAddress + XIN_IER_OFFSET,
							(CurrentIER & ~Mask));
	} else {
		/*
		 * The Id is used to create the appropriate mask for the
		 * desired bit position. Id currently limited to 0 - 31
		 */
		Mask = XIntc_BitPosMask[Id];

		/*
		 * Disable the selected interrupt source by reading the
		 * interrupt enable register and then modifying only the
		 * specified interrupt id
		 */
		CurrentIER = XIntc_In32(InstancePtr->BaseAddress +
							XIN_IER_OFFSET);
		XIntc_Out32(InstancePtr->BaseAddress + XIN_IER_OFFSET,
							(CurrentIER & ~Mask));
	}
}
/*****************************************************************************/
/**
*
* Disables the interrupt source provided as the argument Id such that the
* interrupt controller will not cause interrupts for the specified Id. The
* interrupt controller will continue to hold an interrupt condition for the
* Id, but will not cause an interrupt.In Cascade mode, disables corresponding
* interrupt of Slave controllers depending on the Id.
*
* @param	InstancePtr is a pointer to the XIntc instance to be worked on.
* @param	Id contains the ID of the interrupt source and should be in the
*		range of 0 to XPAR_INTC_MAX_NUM_INTR_INPUTS - 1 with 0 being the
*		highest priority interrupt.
*
* @return	None.
*
* @note		None.
*
****************************************************************************/
Disables the interrupt source provided as the argument Id such that the
interrupt controller will not cause interrupts for the specified Id. The
interrupt controller will continue to hold an interrupt condition for the
Id, but will not cause an interrupt.In Cascade mode, disables corresponding
interrupt of Slave controllers depending on the Id.
Disables the interrupt source provided as the argument Id such that the interrupt controller will not cause interrupts for the specified Id . The interrupt controller will continue to hold an interrupt condition for the Id but will not cause an interrupt . In Cascade mode disables corresponding interrupt of Slave controllers depending on the Id .
void XIntc_Disable(XIntc * InstancePtr, u8 Id)
{
	u32 CurrentIER;
	u32 Mask;
	XIntc_Config *CfgPtr;
	Xil_AssertVoid(InstancePtr != NULL);
	Xil_AssertVoid(Id < XPAR_INTC_MAX_NUM_INTR_INPUTS);
	Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	if (Id > 31) {
		CfgPtr = XIntc_LookupConfig(Id/32);
		if (CfgPtr == NULL) {
			return;
		}
		CurrentIER = XIntc_In32(CfgPtr->BaseAddress + XIN_IER_OFFSET);
		Mask = XIntc_BitPosMask[(Id%32)];
		XIntc_Out32(CfgPtr->BaseAddress + XIN_IER_OFFSET,
							(CurrentIER & ~Mask));
	} else {
		Mask = XIntc_BitPosMask[Id];
		CurrentIER = XIntc_In32(InstancePtr->BaseAddress +
							XIN_IER_OFFSET);
		XIntc_Out32(InstancePtr->BaseAddress + XIN_IER_OFFSET,
							(CurrentIER & ~Mask));
	}
}
void XIntc_Disable ( XIntc * InstancePtr , u8 Id ) { u32 CurrentIER ; u32 Mask ; XIntc_Config * CfgPtr ; Xil_AssertVoid ( InstancePtr != NULL ) ; Xil_AssertVoid ( Id < XPAR_INTC_MAX_NUM_INTR_INPUTS ) ; Xil_AssertVoid ( InstancePtr -> IsReady == XIL_COMPONENT_IS_READY ) ; if ( Id > 31 ) { CfgPtr = XIntc_LookupConfig ( Id / 32 ) ; if ( CfgPtr == NULL ) { return ; } CurrentIER = XIntc_In32 ( CfgPtr -> BaseAddress + XIN_IER_OFFSET ) ; Mask = XIntc_BitPosMask [ ( Id % 32 ) ] ; XIntc_Out32 ( CfgPtr -> BaseAddress + XIN_IER_OFFSET , ( CurrentIER & ~ Mask ) ) ; } else { Mask = XIntc_BitPosMask [ Id ] ; CurrentIER = XIntc_In32 ( InstancePtr -> BaseAddress + XIN_IER_OFFSET ) ; XIntc_Out32 ( InstancePtr -> BaseAddress + XIN_IER_OFFSET , ( CurrentIER & ~ Mask ) ) ; } }
Disables the interrupt source provided as the argument Id such that the
interrupt controller will not cause interrupts for the specified Id.
Disables the interrupt source provided as the argument Id such that the interrupt controller will not cause interrupts for the specified Id .
/*
	 * Assert the arguments
	 */ /* Enable user required Id in Slave controller */ /* Convert from integer id to bit mask */ /*
		 * The Id is used to create the appropriate mask for the
		 * desired bit position. Id currently limited to 0 - 31
		 */ /*
		 * Disable the selected interrupt source by reading the
		 * interrupt enable register and then modifying only the
		 * specified interrupt id
		 */