XilinxProcessorIPLib/drivers/dp12rxss/examples/src/zcu_rx/xdprxss_zcu102_rxonly.c
void CalculateCRC(void)
{
    /*
     * Reset CRC Test Counter in DP DPCD Space
     */
    VidFrameCRC.TEST_CRC_CNT = 0;
    XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr, XDP_RX_CRC_CONFIG,
            VidFrameCRC.TEST_CRC_SUPPORTED<<5 | VidFrameCRC.TEST_CRC_CNT);

	/*Set pixel mode as per lane count - it is default behavior
	  User has to adjust this accordingly if there is change in pixel
	  width programming
	 */
    XVidFrameCrc_WriteReg(VIDEO_CRC_BASEADDR,VIDEO_FRAME_CRC_CONFIG,
                                    DpRxSsInst.UsrOpt.LaneCount);

    /*Set pixel mode as per lane count - it is default behavior
      Reset DTG
     */
    XDp_RxSetUserPixelWidth(DpRxSsInst.DpPtr, DpRxSsInst.UsrOpt.LaneCount);
    XDp_RxDtgDis(DpRxSsInst.DpPtr);
    XDp_RxDtgEn(DpRxSsInst.DpPtr);

    /* Add delay (~40 ms) for Frame CRC to compute on couple of frames
     */
    CustomWaitUs(DpRxSsInst.DpPtr, 400000);

    /*Read computed values from Frame CRC module and MISC0 for colorimetry
     */
    VidFrameCRC.Pixel_r  = XVidFrameCrc_ReadReg(VIDEO_CRC_BASEADDR,
                                        VIDEO_FRAME_CRC_VALUE_G_R)&0xFFFF;
    VidFrameCRC.Pixel_g  = XVidFrameCrc_ReadReg(VIDEO_CRC_BASEADDR,
                                        VIDEO_FRAME_CRC_VALUE_G_R)>>16;
    VidFrameCRC.Pixel_b  = XVidFrameCrc_ReadReg(VIDEO_CRC_BASEADDR,
                                        VIDEO_FRAME_CRC_VALUE_B)&0xFFFF;
    VidFrameCRC.Mode_422 =
		           (XVidFrameCrc_ReadReg(DpRxSsInst.DpPtr->Config.BaseAddr,
                                                   XDP_RX_MSA_MISC0)>>1) & 0x3;

    //Write CRC values to DPCD TEST CRC space
    XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr, XDP_RX_CRC_COMP0,
        (VidFrameCRC.Mode_422==0x1)?0:VidFrameCRC.Pixel_r);
    XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr, XDP_RX_CRC_COMP1,
        (VidFrameCRC.Mode_422==0x1)?VidFrameCRC.Pixel_b:VidFrameCRC.Pixel_g);
    //Check for 422 format and move CR/CB calculated CRC to G component
    //  place as tester needs this way
    XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr, XDP_RX_CRC_COMP2,
        (VidFrameCRC.Mode_422==0x1)?VidFrameCRC.Pixel_r:VidFrameCRC.Pixel_b);

    VidFrameCRC.TEST_CRC_CNT = 1;
    XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr, XDP_RX_CRC_CONFIG,
            VidFrameCRC.TEST_CRC_SUPPORTED<<5 | VidFrameCRC.TEST_CRC_CNT);

    xil_printf("[Video CRC] R/Cr: 0x%x, G/Y: 0x%x, B/Cb: 0x%x\r\n\n",
            VidFrameCRC.Pixel_r,VidFrameCRC.Pixel_g,VidFrameCRC.Pixel_b);

}
/*****************************************************************************/
/**
*
* This function Calculates CRC values of Video components
*
* @param    None.
*
* @return    None.
*
* @note        None.
*
******************************************************************************/
This function Calculates CRC values of Video components
This function Calculates CRC values of Video components
void CalculateCRC(void)
{
    VidFrameCRC.TEST_CRC_CNT = 0;
    XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr, XDP_RX_CRC_CONFIG,
            VidFrameCRC.TEST_CRC_SUPPORTED<<5 | VidFrameCRC.TEST_CRC_CNT);
    XVidFrameCrc_WriteReg(VIDEO_CRC_BASEADDR,VIDEO_FRAME_CRC_CONFIG,
                                    DpRxSsInst.UsrOpt.LaneCount);
    XDp_RxSetUserPixelWidth(DpRxSsInst.DpPtr, DpRxSsInst.UsrOpt.LaneCount);
    XDp_RxDtgDis(DpRxSsInst.DpPtr);
    XDp_RxDtgEn(DpRxSsInst.DpPtr);
    CustomWaitUs(DpRxSsInst.DpPtr, 400000);
    VidFrameCRC.Pixel_r  = XVidFrameCrc_ReadReg(VIDEO_CRC_BASEADDR,
                                        VIDEO_FRAME_CRC_VALUE_G_R)&0xFFFF;
    VidFrameCRC.Pixel_g  = XVidFrameCrc_ReadReg(VIDEO_CRC_BASEADDR,
                                        VIDEO_FRAME_CRC_VALUE_G_R)>>16;
    VidFrameCRC.Pixel_b  = XVidFrameCrc_ReadReg(VIDEO_CRC_BASEADDR,
                                        VIDEO_FRAME_CRC_VALUE_B)&0xFFFF;
    VidFrameCRC.Mode_422 =
		           (XVidFrameCrc_ReadReg(DpRxSsInst.DpPtr->Config.BaseAddr,
                                                   XDP_RX_MSA_MISC0)>>1) & 0x3;
    XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr, XDP_RX_CRC_COMP0,
        (VidFrameCRC.Mode_422==0x1)?0:VidFrameCRC.Pixel_r);
    XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr, XDP_RX_CRC_COMP1,
        (VidFrameCRC.Mode_422==0x1)?VidFrameCRC.Pixel_b:VidFrameCRC.Pixel_g);
    XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr, XDP_RX_CRC_COMP2,
        (VidFrameCRC.Mode_422==0x1)?VidFrameCRC.Pixel_r:VidFrameCRC.Pixel_b);
    VidFrameCRC.TEST_CRC_CNT = 1;
    XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr, XDP_RX_CRC_CONFIG,
            VidFrameCRC.TEST_CRC_SUPPORTED<<5 | VidFrameCRC.TEST_CRC_CNT);
    xil_printf("[Video CRC] R/Cr: 0x%x, G/Y: 0x%x, B/Cb: 0x%x\r\n\n",
            VidFrameCRC.Pixel_r,VidFrameCRC.Pixel_g,VidFrameCRC.Pixel_b);
}
void CalculateCRC ( void ) { VidFrameCRC . TEST_CRC_CNT = 0 ; XDp_WriteReg ( DpRxSsInst . DpPtr -> Config . BaseAddr , XDP_RX_CRC_CONFIG , VidFrameCRC . TEST_CRC_SUPPORTED << 5 | VidFrameCRC . TEST_CRC_CNT ) ; XVidFrameCrc_WriteReg ( VIDEO_CRC_BASEADDR , VIDEO_FRAME_CRC_CONFIG , DpRxSsInst . UsrOpt . LaneCount ) ; XDp_RxSetUserPixelWidth ( DpRxSsInst . DpPtr , DpRxSsInst . UsrOpt . LaneCount ) ; XDp_RxDtgDis ( DpRxSsInst . DpPtr ) ; XDp_RxDtgEn ( DpRxSsInst . DpPtr ) ; CustomWaitUs ( DpRxSsInst . DpPtr , 400000 ) ; VidFrameCRC . Pixel_r = XVidFrameCrc_ReadReg ( VIDEO_CRC_BASEADDR , VIDEO_FRAME_CRC_VALUE_G_R ) & 0xFFFF ; VidFrameCRC . Pixel_g = XVidFrameCrc_ReadReg ( VIDEO_CRC_BASEADDR , VIDEO_FRAME_CRC_VALUE_G_R ) >> 16 ; VidFrameCRC . Pixel_b = XVidFrameCrc_ReadReg ( VIDEO_CRC_BASEADDR , VIDEO_FRAME_CRC_VALUE_B ) & 0xFFFF ; VidFrameCRC . Mode_422 = ( XVidFrameCrc_ReadReg ( DpRxSsInst . DpPtr -> Config . BaseAddr , XDP_RX_MSA_MISC0 ) >> 1 ) & 0x3 ; XDp_WriteReg ( DpRxSsInst . DpPtr -> Config . BaseAddr , XDP_RX_CRC_COMP0 , ( VidFrameCRC . Mode_422 == 0x1 ) ? 0 : VidFrameCRC . Pixel_r ) ; XDp_WriteReg ( DpRxSsInst . DpPtr -> Config . BaseAddr , XDP_RX_CRC_COMP1 , ( VidFrameCRC . Mode_422 == 0x1 ) ? VidFrameCRC . Pixel_b : VidFrameCRC . Pixel_g ) ; XDp_WriteReg ( DpRxSsInst . DpPtr -> Config . BaseAddr , XDP_RX_CRC_COMP2 , ( VidFrameCRC . Mode_422 == 0x1 ) ? VidFrameCRC . Pixel_r : VidFrameCRC . Pixel_b ) ; VidFrameCRC . TEST_CRC_CNT = 1 ; XDp_WriteReg ( DpRxSsInst . DpPtr -> Config . BaseAddr , XDP_RX_CRC_CONFIG , VidFrameCRC . TEST_CRC_SUPPORTED << 5 | VidFrameCRC . TEST_CRC_CNT ) ; xil_printf ( " \r \n \n " , VidFrameCRC . Pixel_r , VidFrameCRC . Pixel_g , VidFrameCRC . Pixel_b ) ; }
This function Calculates CRC values of Video components
This function Calculates CRC values of Video components
/*
     * Reset CRC Test Counter in DP DPCD Space
     */ /*Set pixel mode as per lane count - it is default behavior
	  User has to adjust this accordingly if there is change in pixel
	  width programming
	 */ /*Set pixel mode as per lane count - it is default behavior
      Reset DTG
     */ /* Add delay (~40 ms) for Frame CRC to compute on couple of frames
     */ /*Read computed values from Frame CRC module and MISC0 for colorimetry
     */ //Write CRC values to DPCD TEST CRC space //Check for 422 format and move CR/CB calculated CRC to G component //  place as tester needs this way