src/arch/socs/stm32f439/C/soc-exti.c
uint8_t soc_exti_config(dev_gpio_info_t *gpio)
{
    volatile uint32_t *reg = 0;
    uint8_t pos = 0;
    uint8_t field = 0;

    /****************************************************
     * Initial input checks
     ***************************************************/

    /* If EXTI mask not set, just return */
    if (!(gpio->mask & GPIO_MASK_SET_EXTI)) {
        return 0;
    }

    /* Mask set but no EXTI use, just return */
    if (gpio->exti_trigger == GPIO_EXTI_TRIGGER_NONE) {
        return 0;
    }

    /* If EXTI line is not free, return with an error */
    if (!soc_exti_is_free(gpio->kref)) {
        return 2;
    }

    /****************************************************
     * Effective configuration
     ***************************************************/

    /* Get EXTICRx register addr */
    reg = soc_exti_get_SYSCFG_EXTICR(gpio->kref.pin);

    /* Invalid register ! input pin value incorrect */
    if (!reg) {
        return 1;
    }

    /* Get EXTICRx field position in register */
    pos = soc_exti_get_pos(gpio->kref.pin);

    /*
     * Switching on GPIO port, to generate the field value for EXTICRx register.
     * In the datasheet (STM-RM0090, it seems that port num (starting with 0)
     * == field value. See STM-RM0090 §9.3.3.
     *
     * i.e. port 0 (A) -> field = 0, port 1 (B) -> field = 0x1, etc.
     */
    field = gpio->kref.port;
    set_reg_bits(reg, field << pos);

    /*
     * Configure Rising Trigger for current GPIO (if needed)
     */
    if (gpio->exti_trigger == GPIO_EXTI_TRIGGER_RISE ||
        gpio->exti_trigger == GPIO_EXTI_TRIGGER_BOTH)
    {
        set_reg_bits(EXTI_RTSR, 0x1 << gpio->kref.pin);
    }

    /*
     * Configure Falling Trigger for current GPIO (if needed)
     */
    if (gpio->exti_trigger == GPIO_EXTI_TRIGGER_FALL ||
        gpio->exti_trigger == GPIO_EXTI_TRIGGER_BOTH)
    {
        set_reg_bits(EXTI_FTSR, 0x1 << gpio->kref.pin);
    }

    return 0;
}
/*
 * Configure an EXTI line for a given GPIO
 * if the EXTI line for this pin is already set, return 1, otherwhise
 * set it and return 0.
 * This function does not enable the corresponding NVIC line neither the
 * EXTI IMR bit (this is done using soc_exti_enable() function)
 *
 */
Configure an EXTI line for a given GPIO
if the EXTI line for this pin is already set, return 1, otherwhise
set it and return 0.
This function does not enable the corresponding NVIC line neither the
EXTI IMR bit (this is done using soc_exti_enable() function)
Configure an EXTI line for a given GPIO if the EXTI line for this pin is already set return 1 otherwhise set it and return 0 . This function does not enable the corresponding NVIC line neither the EXTI IMR bit ( this is done using soc_exti_enable () function )
uint8_t soc_exti_config(dev_gpio_info_t *gpio)
{
    volatile uint32_t *reg = 0;
    uint8_t pos = 0;
    uint8_t field = 0;
    if (!(gpio->mask & GPIO_MASK_SET_EXTI)) {
        return 0;
    }
    if (gpio->exti_trigger == GPIO_EXTI_TRIGGER_NONE) {
        return 0;
    }
    if (!soc_exti_is_free(gpio->kref)) {
        return 2;
    }
    reg = soc_exti_get_SYSCFG_EXTICR(gpio->kref.pin);
    if (!reg) {
        return 1;
    }
    pos = soc_exti_get_pos(gpio->kref.pin);
    field = gpio->kref.port;
    set_reg_bits(reg, field << pos);
    if (gpio->exti_trigger == GPIO_EXTI_TRIGGER_RISE ||
        gpio->exti_trigger == GPIO_EXTI_TRIGGER_BOTH)
    {
        set_reg_bits(EXTI_RTSR, 0x1 << gpio->kref.pin);
    }
    if (gpio->exti_trigger == GPIO_EXTI_TRIGGER_FALL ||
        gpio->exti_trigger == GPIO_EXTI_TRIGGER_BOTH)
    {
        set_reg_bits(EXTI_FTSR, 0x1 << gpio->kref.pin);
    }
    return 0;
}
uint8_t soc_exti_config ( dev_gpio_info_t * gpio ) { volatile uint32_t * reg = 0 ; uint8_t pos = 0 ; uint8_t field = 0 ; if ( ! ( gpio -> mask & GPIO_MASK_SET_EXTI ) ) { return 0 ; } if ( gpio -> exti_trigger == GPIO_EXTI_TRIGGER_NONE ) { return 0 ; } if ( ! soc_exti_is_free ( gpio -> kref ) ) { return 2 ; } reg = soc_exti_get_SYSCFG_EXTICR ( gpio -> kref . pin ) ; if ( ! reg ) { return 1 ; } pos = soc_exti_get_pos ( gpio -> kref . pin ) ; field = gpio -> kref . port ; set_reg_bits ( reg , field << pos ) ; if ( gpio -> exti_trigger == GPIO_EXTI_TRIGGER_RISE || gpio -> exti_trigger == GPIO_EXTI_TRIGGER_BOTH ) { set_reg_bits ( EXTI_RTSR , 0x1 << gpio -> kref . pin ) ; } if ( gpio -> exti_trigger == GPIO_EXTI_TRIGGER_FALL || gpio -> exti_trigger == GPIO_EXTI_TRIGGER_BOTH ) { set_reg_bits ( EXTI_FTSR , 0x1 << gpio -> kref . pin ) ; } return 0 ; }
Configure an EXTI line for a given GPIO
 if the EXTI line for this pin is already set, return 1, otherwhise
 set it and return 0.
Configure an EXTI line for a given GPIO if the EXTI line for this pin is already set return 1 otherwhise set it and return 0 .
/****************************************************
     * Initial input checks
     ***************************************************/ /* If EXTI mask not set, just return */ /* Mask set but no EXTI use, just return */ /* If EXTI line is not free, return with an error */ /****************************************************
     * Effective configuration
     ***************************************************/ /* Get EXTICRx register addr */ /* Invalid register ! input pin value incorrect */ /* Get EXTICRx field position in register */ /*
     * Switching on GPIO port, to generate the field value for EXTICRx register.
     * In the datasheet (STM-RM0090, it seems that port num (starting with 0)
     * == field value. See STM-RM0090 §9.3.3.
     *
     * i.e. port 0 (A) -> field = 0, port 1 (B) -> field = 0x1, etc.
     */ /*
     * Configure Rising Trigger for current GPIO (if needed)
     */ /*
     * Configure Falling Trigger for current GPIO (if needed)
     */