XilinxProcessorIPLib/drivers/v_hdmiphy1/src/xhdmiphy1_hdmi.c
static void XHdmiphy1_MmcmParam(XHdmiphy1 *InstancePtr, u8 QuadId,
		XHdmiphy1_DirectionType Dir)
{
	u8 MaxRate;
	u8 NumChannels;
	XHdmiphy1_Mmcm *MmcmPtr;

	if (Dir == XHDMIPHY1_DIR_RX) {
		MmcmPtr = &InstancePtr->Quads[QuadId].RxMmcm;
		MaxRate = InstancePtr->Config.RxMaxRate;
		NumChannels = InstancePtr->Config.RxChannels;
	}
	else {
		MmcmPtr = &InstancePtr->Quads[QuadId].TxMmcm;
		MaxRate = InstancePtr->Config.TxMaxRate;
		NumChannels = InstancePtr->Config.TxChannels;
	}

	switch (MaxRate) {
	case 3:
		MmcmPtr->ClkFbOutMult =
			XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT3x3;
		MmcmPtr->DivClkDivide =
			XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK3x3;
		MmcmPtr->ClkOut0Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV3x3;
		MmcmPtr->ClkOut1Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV3x3;
		MmcmPtr->ClkOut2Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV3x3;
		break;
	case 6:
		if (NumChannels == 3) {
			MmcmPtr->ClkFbOutMult =
				XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT6x3;
			MmcmPtr->DivClkDivide =
				XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK6x3;
			MmcmPtr->ClkOut0Div =
				XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV6x3;
			MmcmPtr->ClkOut1Div =
				XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV6x3;
			MmcmPtr->ClkOut2Div =
				XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV6x3;
		} else {
			MmcmPtr->ClkFbOutMult =
				XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT6;
			MmcmPtr->DivClkDivide =
				XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK6;
			MmcmPtr->ClkOut0Div =
				XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV6;
			MmcmPtr->ClkOut1Div =
				XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV6;
			MmcmPtr->ClkOut2Div =
				XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV6;
		}
		break;
	case 8:
		MmcmPtr->ClkFbOutMult =
			XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT8;
		MmcmPtr->DivClkDivide =
			XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK8;
		MmcmPtr->ClkOut0Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV8;
		MmcmPtr->ClkOut1Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV8;
		MmcmPtr->ClkOut2Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV8;
		break;
	case 10:
		MmcmPtr->ClkFbOutMult =
			XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT10;
		MmcmPtr->DivClkDivide =
			XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK10;
		MmcmPtr->ClkOut0Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV10;
		MmcmPtr->ClkOut1Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV10;
		MmcmPtr->ClkOut2Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV10;
		break;
	case 12:
		MmcmPtr->ClkFbOutMult =
			XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT;
		MmcmPtr->DivClkDivide =
			XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK;
		MmcmPtr->ClkOut0Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV;
		MmcmPtr->ClkOut1Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV;
		MmcmPtr->ClkOut2Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV;
		break;
	default:
		break;
	}
}
/*****************************************************************************/
/**
* This function sets the MMCM programming values based on Max Rate
*
* @param	InstancePtr is a pointer to the Hdmiphy core instance.
* @param	QuadId is the GT quad ID to operate on.
* @param	Dir is an indicator for RX or TX.
*
* @return       None
*
* @note         Based on the MAX Rate set in the GUI, the MMCM values are
*               selected.
*               3  -> Max Rate selected in GUI is 3G
*               6  -> Max Rate selected in GUI is 6G
*               8  -> Max Rate selected in GUI is 8G
*               10 -> Max Rate selected in GUI is 10G
*               12 -> Max Rate selected in GUI in 12G
*
******************************************************************************/
This function sets the MMCM programming values based on Max Rate
This function sets the MMCM programming values based on Max Rate
static void XHdmiphy1_MmcmParam(XHdmiphy1 *InstancePtr, u8 QuadId,
		XHdmiphy1_DirectionType Dir)
{
	u8 MaxRate;
	u8 NumChannels;
	XHdmiphy1_Mmcm *MmcmPtr;
	if (Dir == XHDMIPHY1_DIR_RX) {
		MmcmPtr = &InstancePtr->Quads[QuadId].RxMmcm;
		MaxRate = InstancePtr->Config.RxMaxRate;
		NumChannels = InstancePtr->Config.RxChannels;
	}
	else {
		MmcmPtr = &InstancePtr->Quads[QuadId].TxMmcm;
		MaxRate = InstancePtr->Config.TxMaxRate;
		NumChannels = InstancePtr->Config.TxChannels;
	}
	switch (MaxRate) {
	case 3:
		MmcmPtr->ClkFbOutMult =
			XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT3x3;
		MmcmPtr->DivClkDivide =
			XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK3x3;
		MmcmPtr->ClkOut0Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV3x3;
		MmcmPtr->ClkOut1Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV3x3;
		MmcmPtr->ClkOut2Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV3x3;
		break;
	case 6:
		if (NumChannels == 3) {
			MmcmPtr->ClkFbOutMult =
				XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT6x3;
			MmcmPtr->DivClkDivide =
				XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK6x3;
			MmcmPtr->ClkOut0Div =
				XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV6x3;
			MmcmPtr->ClkOut1Div =
				XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV6x3;
			MmcmPtr->ClkOut2Div =
				XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV6x3;
		} else {
			MmcmPtr->ClkFbOutMult =
				XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT6;
			MmcmPtr->DivClkDivide =
				XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK6;
			MmcmPtr->ClkOut0Div =
				XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV6;
			MmcmPtr->ClkOut1Div =
				XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV6;
			MmcmPtr->ClkOut2Div =
				XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV6;
		}
		break;
	case 8:
		MmcmPtr->ClkFbOutMult =
			XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT8;
		MmcmPtr->DivClkDivide =
			XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK8;
		MmcmPtr->ClkOut0Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV8;
		MmcmPtr->ClkOut1Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV8;
		MmcmPtr->ClkOut2Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV8;
		break;
	case 10:
		MmcmPtr->ClkFbOutMult =
			XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT10;
		MmcmPtr->DivClkDivide =
			XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK10;
		MmcmPtr->ClkOut0Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV10;
		MmcmPtr->ClkOut1Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV10;
		MmcmPtr->ClkOut2Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV10;
		break;
	case 12:
		MmcmPtr->ClkFbOutMult =
			XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT;
		MmcmPtr->DivClkDivide =
			XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK;
		MmcmPtr->ClkOut0Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV;
		MmcmPtr->ClkOut1Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV;
		MmcmPtr->ClkOut2Div =
			XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV;
		break;
	default:
		break;
	}
}
static void XHdmiphy1_MmcmParam ( XHdmiphy1 * InstancePtr , u8 QuadId , XHdmiphy1_DirectionType Dir ) { u8 MaxRate ; u8 NumChannels ; XHdmiphy1_Mmcm * MmcmPtr ; if ( Dir == XHDMIPHY1_DIR_RX ) { MmcmPtr = & InstancePtr -> Quads [ QuadId ] . RxMmcm ; MaxRate = InstancePtr -> Config . RxMaxRate ; NumChannels = InstancePtr -> Config . RxChannels ; } else { MmcmPtr = & InstancePtr -> Quads [ QuadId ] . TxMmcm ; MaxRate = InstancePtr -> Config . TxMaxRate ; NumChannels = InstancePtr -> Config . TxChannels ; } switch ( MaxRate ) { case 3 : MmcmPtr -> ClkFbOutMult = XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT3x3 ; MmcmPtr -> DivClkDivide = XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK3x3 ; MmcmPtr -> ClkOut0Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV3x3 ; MmcmPtr -> ClkOut1Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV3x3 ; MmcmPtr -> ClkOut2Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV3x3 ; break ; case 6 : if ( NumChannels == 3 ) { MmcmPtr -> ClkFbOutMult = XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT6x3 ; MmcmPtr -> DivClkDivide = XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK6x3 ; MmcmPtr -> ClkOut0Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV6x3 ; MmcmPtr -> ClkOut1Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV6x3 ; MmcmPtr -> ClkOut2Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV6x3 ; } else { MmcmPtr -> ClkFbOutMult = XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT6 ; MmcmPtr -> DivClkDivide = XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK6 ; MmcmPtr -> ClkOut0Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV6 ; MmcmPtr -> ClkOut1Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV6 ; MmcmPtr -> ClkOut2Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV6 ; } break ; case 8 : MmcmPtr -> ClkFbOutMult = XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT8 ; MmcmPtr -> DivClkDivide = XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK8 ; MmcmPtr -> ClkOut0Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV8 ; MmcmPtr -> ClkOut1Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV8 ; MmcmPtr -> ClkOut2Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV8 ; break ; case 10 : MmcmPtr -> ClkFbOutMult = XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT10 ; MmcmPtr -> DivClkDivide = XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK10 ; MmcmPtr -> ClkOut0Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV10 ; MmcmPtr -> ClkOut1Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV10 ; MmcmPtr -> ClkOut2Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV10 ; break ; case 12 : MmcmPtr -> ClkFbOutMult = XHDMIPHY1_FRL_VIDCLK_MMCM_FBOUTMULT ; MmcmPtr -> DivClkDivide = XHDMIPHY1_FRL_VIDCLK_MMCM_DIVCLK ; MmcmPtr -> ClkOut0Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT0DIV ; MmcmPtr -> ClkOut1Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT1DIV ; MmcmPtr -> ClkOut2Div = XHDMIPHY1_FRL_VIDCLK_MMCM_CLKOUT2DIV ; break ; default : break ; } }
This function sets the MMCM programming values based on Max Rate
This function sets the MMCM programming values based on Max Rate