lib/sw_apps/zynqmp_pmufw/src/pm_reset.c
static u32 PmResetPulseGpioBankIOs(const PmReset* const rstPtr)
{
	const PmResetGpioBankIOs *rstGpioPtr = (PmResetGpioBankIOs*)rstPtr->derived;
	u32 GpioRstLine = rstGpioPtr->rstLine;
	u32 GpioMaskDataReg = rstGpioPtr->rstMaskDataReg;
	u32 GpioDirReg = rstGpioPtr->rstDirectionReg;
	u32 RegVal = 0;
	u32 MaskVal = 0;
	u32 DirmShift = 0;

	/* Set MIO/EMIO Direction */
	if( rstGpioPtr->isMaskDataLsw == false ) {
		DirmShift = MAX_REG_BITS/2;
	}
	RegVal = Xil_In32(GpioDirReg) | ((u32)1 << (DirmShift + GpioRstLine));
	Xil_Out32(GpioDirReg, RegVal);

	/* Assert the MIO/EMIO with the required Mask */
	MaskVal = ((u32)1 << GpioRstLine) | GPIO_PIN_MASK_BITS;
	RegVal = MaskVal & (~((u32)1 << (((u32)MAX_REG_BITS/2U) + GpioRstLine)));
	Xil_Out32(GpioMaskDataReg, RegVal);
	usleep(1000);

	/* De-assert the MIO/EMIO with the required Mask */
	RegVal = (~((u32)1 << (((u32)MAX_REG_BITS/2U) + GpioRstLine))) & GPIO_PIN_MASK_BITS;
	Xil_Out32(GpioMaskDataReg, RegVal);
	usleep(1000);

	/* Assert the MIO/EMIO with the required Mask */
	MaskVal = ((u32)1 << GpioRstLine) | GPIO_PIN_MASK_BITS;
	RegVal = MaskVal & (~((u32)1 << (((u32)MAX_REG_BITS/2U) + GpioRstLine)));
	Xil_Out32(GpioMaskDataReg, RegVal);
	usleep(1000);

	return XST_SUCCESS;
}
/**
 * PmResetPulseGpioBankIOs() - Pulse handler for PmResetGpioBankIOs class
 * @rstPtr	Pointer to the reset that needs to be toggled
 *
 * @return	Operation success
 */
Pulse handler for PmResetGpioBankIOs class
@rstPtr      Pointer to the reset that needs to be toggled

@return      Operation success
Pulse handler for PmResetGpioBankIOs class @rstPtr Pointer to the reset that needs to be toggled @return Operation success
static u32 PmResetPulseGpioBankIOs(const PmReset* const rstPtr)
{
	const PmResetGpioBankIOs *rstGpioPtr = (PmResetGpioBankIOs*)rstPtr->derived;
	u32 GpioRstLine = rstGpioPtr->rstLine;
	u32 GpioMaskDataReg = rstGpioPtr->rstMaskDataReg;
	u32 GpioDirReg = rstGpioPtr->rstDirectionReg;
	u32 RegVal = 0;
	u32 MaskVal = 0;
	u32 DirmShift = 0;
	if( rstGpioPtr->isMaskDataLsw == false ) {
		DirmShift = MAX_REG_BITS/2;
	}
	RegVal = Xil_In32(GpioDirReg) | ((u32)1 << (DirmShift + GpioRstLine));
	Xil_Out32(GpioDirReg, RegVal);
	MaskVal = ((u32)1 << GpioRstLine) | GPIO_PIN_MASK_BITS;
	RegVal = MaskVal & (~((u32)1 << (((u32)MAX_REG_BITS/2U) + GpioRstLine)));
	Xil_Out32(GpioMaskDataReg, RegVal);
	usleep(1000);
	RegVal = (~((u32)1 << (((u32)MAX_REG_BITS/2U) + GpioRstLine))) & GPIO_PIN_MASK_BITS;
	Xil_Out32(GpioMaskDataReg, RegVal);
	usleep(1000);
	MaskVal = ((u32)1 << GpioRstLine) | GPIO_PIN_MASK_BITS;
	RegVal = MaskVal & (~((u32)1 << (((u32)MAX_REG_BITS/2U) + GpioRstLine)));
	Xil_Out32(GpioMaskDataReg, RegVal);
	usleep(1000);
	return XST_SUCCESS;
}
static u32 PmResetPulseGpioBankIOs ( const PmReset * const rstPtr ) { const PmResetGpioBankIOs * rstGpioPtr = ( PmResetGpioBankIOs * ) rstPtr -> derived ; u32 GpioRstLine = rstGpioPtr -> rstLine ; u32 GpioMaskDataReg = rstGpioPtr -> rstMaskDataReg ; u32 GpioDirReg = rstGpioPtr -> rstDirectionReg ; u32 RegVal = 0 ; u32 MaskVal = 0 ; u32 DirmShift = 0 ; if ( rstGpioPtr -> isMaskDataLsw == false ) { DirmShift = MAX_REG_BITS / 2 ; } RegVal = Xil_In32 ( GpioDirReg ) | ( ( u32 ) 1 << ( DirmShift + GpioRstLine ) ) ; Xil_Out32 ( GpioDirReg , RegVal ) ; MaskVal = ( ( u32 ) 1 << GpioRstLine ) | GPIO_PIN_MASK_BITS ; RegVal = MaskVal & ( ~ ( ( u32 ) 1 << ( ( ( u32 ) MAX_REG_BITS / 2U ) + GpioRstLine ) ) ) ; Xil_Out32 ( GpioMaskDataReg , RegVal ) ; usleep ( 1000 ) ; RegVal = ( ~ ( ( u32 ) 1 << ( ( ( u32 ) MAX_REG_BITS / 2U ) + GpioRstLine ) ) ) & GPIO_PIN_MASK_BITS ; Xil_Out32 ( GpioMaskDataReg , RegVal ) ; usleep ( 1000 ) ; MaskVal = ( ( u32 ) 1 << GpioRstLine ) | GPIO_PIN_MASK_BITS ; RegVal = MaskVal & ( ~ ( ( u32 ) 1 << ( ( ( u32 ) MAX_REG_BITS / 2U ) + GpioRstLine ) ) ) ; Xil_Out32 ( GpioMaskDataReg , RegVal ) ; usleep ( 1000 ) ; return XST_SUCCESS ; }
PmResetPulseGpioBankIOs() - Pulse handler for PmResetGpioBankIOs class
 @rstPtr      Pointer to the reset that needs to be toggled
PmResetPulseGpioBankIOs () - Pulse handler for PmResetGpioBankIOs class @rstPtr Pointer to the reset that needs to be toggled
/* Set MIO/EMIO Direction */ /* Assert the MIO/EMIO with the required Mask */ /* De-assert the MIO/EMIO with the required Mask */ /* Assert the MIO/EMIO with the required Mask */