AzureMXChip/MXCHIPAZ3166/core/lib/threadx/ports/cortex_a5x/ac6/example_build/sample_threadx/gic400_gic.c
void configureSPI(unsigned int ID, unsigned int conf)
{
  unsigned int bank, tmp;

  conf = conf & 0x3;            // Mask out unused bits

  bank = ID/16;                 // There are 16 IDs per register, need to work out which register to access
  ID   = ID & 0xF;              // ... and which field within the register
  ID   = ID * 2;                // Convert from which field to a bit offset (2-bits per field)

  conf = conf << ID;            // Move configuration value into correct bit position

  tmp = gic_dist->	GICD_ICFGR[bank]; // Read current vlase
  tmp = tmp & ~(0x3 << ID);         // Clear the bits for the specified field
  tmp = tmp | conf;                 // OR in new configuration
  gic_dist->	GICD_ICFGR[bank] = tmp; // Write updated value back

  return;
}
// Configures the specified ID as being level or edge triggered
Configures the specified ID as being level or edge triggered
Configures the specified ID as being level or edge triggered
void configureSPI(unsigned int ID, unsigned int conf)
{
  unsigned int bank, tmp;
  conf = conf & 0x3;            
  bank = ID/16;                 
  ID   = ID & 0xF;              
  ID   = ID * 2;                
  conf = conf << ID;            
  tmp = gic_dist->	GICD_ICFGR[bank]; 
  tmp = tmp & ~(0x3 << ID);         
  tmp = tmp | conf;                 
  gic_dist->	GICD_ICFGR[bank] = tmp; 
  return;
}
void configureSPI ( unsigned int ID , unsigned int conf ) { unsigned int bank , tmp ; conf = conf & 0x3 ; bank = ID / 16 ; ID = ID & 0xF ; ID = ID * 2 ; conf = conf << ID ; tmp = gic_dist -> GICD_ICFGR [ bank ] ; tmp = tmp & ~ ( 0x3 << ID ) ; tmp = tmp | conf ; gic_dist -> GICD_ICFGR [ bank ] = tmp ; return ; }
Configures the specified ID as being level or edge triggered
Configures the specified ID as being level or edge triggered
// Mask out unused bits // There are 16 IDs per register, need to work out which register to access // ... and which field within the register // Convert from which field to a bit offset (2-bits per field) // Move configuration value into correct bit position // Read current vlase // Clear the bits for the specified field // OR in new configuration // Write updated value back