XilinxProcessorIPLib/drivers/vphy/src/xvphy.c
u32 XVphy_TxPrbsForceError(XVphy *InstancePtr, u8 QuadId,
		XVphy_ChannelId ChId, u8 ForceErr)
{
	u32 RegVal;
	u32 MaskVal;

	/* Suppress Warning Messages */
	QuadId = QuadId;

	if (ChId == XVPHY_CHANNEL_ID_CHA) {
		MaskVal =  XVPHY_TX_CONTROL_TXPRBSFORCEERR_ALL_MASK;
	}
	else {
		MaskVal = XVPHY_TX_CONTROL_TXPRBSFORCEERR_MASK(ChId);
	}

	/* Read TX|RX Control Register */
	RegVal = XVphy_ReadReg(InstancePtr->Config.BaseAddr,
					XVPHY_TX_CONTROL_REG);

	/* Clear Polarity Register bits */
	RegVal &= ~MaskVal;

	if (ForceErr) {
		RegVal |= MaskVal;
	}
	XVphy_WriteReg(InstancePtr->Config.BaseAddr,
					XVPHY_TX_CONTROL_REG, RegVal);

	return XST_SUCCESS;
}
/*****************************************************************************/
/**
* This function will set the TX/RXPRBSEL of the GT
*
* @param	InstancePtr is a pointer to the XVphy core instance.
* @param	QuadId is the GT quad ID to operate on.
* @param	ChId is the channel ID which to operate on.
* @param	Dir is an indicator for TX or RX.
* @param	ForceErr 0-No Error 1-Force Error
*
* @return
*		- XST_SUCCESS.
*
* @note		None.
*
******************************************************************************/
This function will set the TX/RXPRBSEL of the GT
This function will set the TX / RXPRBSEL of the GT
u32 XVphy_TxPrbsForceError(XVphy *InstancePtr, u8 QuadId,
		XVphy_ChannelId ChId, u8 ForceErr)
{
	u32 RegVal;
	u32 MaskVal;
	QuadId = QuadId;
	if (ChId == XVPHY_CHANNEL_ID_CHA) {
		MaskVal =  XVPHY_TX_CONTROL_TXPRBSFORCEERR_ALL_MASK;
	}
	else {
		MaskVal = XVPHY_TX_CONTROL_TXPRBSFORCEERR_MASK(ChId);
	}
	RegVal = XVphy_ReadReg(InstancePtr->Config.BaseAddr,
					XVPHY_TX_CONTROL_REG);
	RegVal &= ~MaskVal;
	if (ForceErr) {
		RegVal |= MaskVal;
	}
	XVphy_WriteReg(InstancePtr->Config.BaseAddr,
					XVPHY_TX_CONTROL_REG, RegVal);
	return XST_SUCCESS;
}
u32 XVphy_TxPrbsForceError ( XVphy * InstancePtr , u8 QuadId , XVphy_ChannelId ChId , u8 ForceErr ) { u32 RegVal ; u32 MaskVal ; QuadId = QuadId ; if ( ChId == XVPHY_CHANNEL_ID_CHA ) { MaskVal = XVPHY_TX_CONTROL_TXPRBSFORCEERR_ALL_MASK ; } else { MaskVal = XVPHY_TX_CONTROL_TXPRBSFORCEERR_MASK ( ChId ) ; } RegVal = XVphy_ReadReg ( InstancePtr -> Config . BaseAddr , XVPHY_TX_CONTROL_REG ) ; RegVal &= ~ MaskVal ; if ( ForceErr ) { RegVal |= MaskVal ; } XVphy_WriteReg ( InstancePtr -> Config . BaseAddr , XVPHY_TX_CONTROL_REG , RegVal ) ; return XST_SUCCESS ; }
This function will set the TX/RXPRBSEL of the GT
This function will set the TX / RXPRBSEL of the GT
/* Suppress Warning Messages */ /* Read TX|RX Control Register */ /* Clear Polarity Register bits */