XilinxProcessorIPLib/drivers/v_hdmiphy1/src/xhdmiphy1_hdmi.c
static void XHdmiphy1_HdmiSetSystemClockSelection(XHdmiphy1 *InstancePtr,
                u8 QuadId)
{
	XHdmiphy1_PllType XHdmiphy1_QPllType;

     XHdmiphy1_QPllType = XHDMIPHY1_PLL_TYPE_QPLL0;

    /* Set system clock selections */
    if (InstancePtr->Config.TxSysPllClkSel ==
            InstancePtr->Config.RxSysPllClkSel) {
        if (InstancePtr->Config.RxSysPllClkSel ==
                XHDMIPHY1_SYSCLKSELDATA_TYPE_CPLL_OUTCLK) {
            XHdmiphy1_PllInitialize(InstancePtr, QuadId,
                    XHDMIPHY1_CHANNEL_ID_CHA,
                    InstancePtr->Config.RxRefClkSel,
                    InstancePtr->Config.RxRefClkSel,
                    XHDMIPHY1_PLL_TYPE_CPLL,
                    XHDMIPHY1_PLL_TYPE_CPLL);
        }
        else {
            XHdmiphy1_PllInitialize(InstancePtr, QuadId,
                    XHDMIPHY1_CHANNEL_ID_CMN0,
                    InstancePtr->Config.RxRefClkSel,
                    InstancePtr->Config.RxRefClkSel,
                    XHdmiphy1_QPllType,
                    XHdmiphy1_QPllType);
        }
    }
    else if (InstancePtr->Config.TxSysPllClkSel ==
            XHDMIPHY1_SYSCLKSELDATA_TYPE_CPLL_OUTCLK) {
        XHdmiphy1_PllInitialize(InstancePtr, QuadId,
                XHDMIPHY1_CHANNEL_ID_CHA,
                InstancePtr->Config.RxRefClkSel,
                InstancePtr->Config.TxRefClkSel,
                XHDMIPHY1_PLL_TYPE_CPLL,
                XHdmiphy1_QPllType);
    }
    else {
        XHdmiphy1_PllInitialize(InstancePtr, QuadId,
                XHDMIPHY1_CHANNEL_ID_CMN0,
                InstancePtr->Config.TxRefClkSel,
                InstancePtr->Config.RxRefClkSel,
                XHdmiphy1_QPllType,
                XHDMIPHY1_PLL_TYPE_CPLL);
    }
}
/*****************************************************************************/
/**
* This function Sets the System Clock Selection
*
* @param	InstancePtr is a pointer to the XHdmiphy1 core instance.
* @param	QuadId is the GT quad ID to operate on.
*
* @return	None.
*
* @note		None.
*
******************************************************************************/
This function Sets the System Clock Selection
This function Sets the System Clock Selection
static void XHdmiphy1_HdmiSetSystemClockSelection(XHdmiphy1 *InstancePtr,
                u8 QuadId)
{
	XHdmiphy1_PllType XHdmiphy1_QPllType;
     XHdmiphy1_QPllType = XHDMIPHY1_PLL_TYPE_QPLL0;
    if (InstancePtr->Config.TxSysPllClkSel ==
            InstancePtr->Config.RxSysPllClkSel) {
        if (InstancePtr->Config.RxSysPllClkSel ==
                XHDMIPHY1_SYSCLKSELDATA_TYPE_CPLL_OUTCLK) {
            XHdmiphy1_PllInitialize(InstancePtr, QuadId,
                    XHDMIPHY1_CHANNEL_ID_CHA,
                    InstancePtr->Config.RxRefClkSel,
                    InstancePtr->Config.RxRefClkSel,
                    XHDMIPHY1_PLL_TYPE_CPLL,
                    XHDMIPHY1_PLL_TYPE_CPLL);
        }
        else {
            XHdmiphy1_PllInitialize(InstancePtr, QuadId,
                    XHDMIPHY1_CHANNEL_ID_CMN0,
                    InstancePtr->Config.RxRefClkSel,
                    InstancePtr->Config.RxRefClkSel,
                    XHdmiphy1_QPllType,
                    XHdmiphy1_QPllType);
        }
    }
    else if (InstancePtr->Config.TxSysPllClkSel ==
            XHDMIPHY1_SYSCLKSELDATA_TYPE_CPLL_OUTCLK) {
        XHdmiphy1_PllInitialize(InstancePtr, QuadId,
                XHDMIPHY1_CHANNEL_ID_CHA,
                InstancePtr->Config.RxRefClkSel,
                InstancePtr->Config.TxRefClkSel,
                XHDMIPHY1_PLL_TYPE_CPLL,
                XHdmiphy1_QPllType);
    }
    else {
        XHdmiphy1_PllInitialize(InstancePtr, QuadId,
                XHDMIPHY1_CHANNEL_ID_CMN0,
                InstancePtr->Config.TxRefClkSel,
                InstancePtr->Config.RxRefClkSel,
                XHdmiphy1_QPllType,
                XHDMIPHY1_PLL_TYPE_CPLL);
    }
}
static void XHdmiphy1_HdmiSetSystemClockSelection ( XHdmiphy1 * InstancePtr , u8 QuadId ) { XHdmiphy1_PllType XHdmiphy1_QPllType ; XHdmiphy1_QPllType = XHDMIPHY1_PLL_TYPE_QPLL0 ; if ( InstancePtr -> Config . TxSysPllClkSel == InstancePtr -> Config . RxSysPllClkSel ) { if ( InstancePtr -> Config . RxSysPllClkSel == XHDMIPHY1_SYSCLKSELDATA_TYPE_CPLL_OUTCLK ) { XHdmiphy1_PllInitialize ( InstancePtr , QuadId , XHDMIPHY1_CHANNEL_ID_CHA , InstancePtr -> Config . RxRefClkSel , InstancePtr -> Config . RxRefClkSel , XHDMIPHY1_PLL_TYPE_CPLL , XHDMIPHY1_PLL_TYPE_CPLL ) ; } else { XHdmiphy1_PllInitialize ( InstancePtr , QuadId , XHDMIPHY1_CHANNEL_ID_CMN0 , InstancePtr -> Config . RxRefClkSel , InstancePtr -> Config . RxRefClkSel , XHdmiphy1_QPllType , XHdmiphy1_QPllType ) ; } } else if ( InstancePtr -> Config . TxSysPllClkSel == XHDMIPHY1_SYSCLKSELDATA_TYPE_CPLL_OUTCLK ) { XHdmiphy1_PllInitialize ( InstancePtr , QuadId , XHDMIPHY1_CHANNEL_ID_CHA , InstancePtr -> Config . RxRefClkSel , InstancePtr -> Config . TxRefClkSel , XHDMIPHY1_PLL_TYPE_CPLL , XHdmiphy1_QPllType ) ; } else { XHdmiphy1_PllInitialize ( InstancePtr , QuadId , XHDMIPHY1_CHANNEL_ID_CMN0 , InstancePtr -> Config . TxRefClkSel , InstancePtr -> Config . RxRefClkSel , XHdmiphy1_QPllType , XHDMIPHY1_PLL_TYPE_CPLL ) ; } }
This function Sets the System Clock Selection
This function Sets the System Clock Selection
/* Set system clock selections */