XilinxProcessorIPLib/drivers/dpdma/src/xdpdma.c
void XDpDma_SetQOS(XDpDma *InstancePtr, u8 QOS)
{
	u8 Index;
	u32 RegVal = 0;

	Xil_AssertVoid(QOS >= XDPDMA_QOS_MIN && QOS <= XDPDMA_QOS_MAX);

	RegVal = (((u32)QOS << XDPDMA_CH_CNTL_QOS_DATA_RD_SHIFT) |
		   ((u32)QOS << XDPDMA_CH_CNTL_QOS_DSCR_RD_SHIFT) |
		   ((u32)QOS << XDPDMA_CH_CNTL_QOS_DSCR_WR_SHIFT));

	u32 Mask = XDPDMA_CH_CNTL_QOS_DATA_RD_MASK |
		XDPDMA_CH_CNTL_QOS_DSCR_RD_MASK |
		XDPDMA_CH_CNTL_QOS_DSCR_WR_MASK;

	for(Index = 0; Index <= XDPDMA_AUDIO_CHANNEL1; Index++) {
		XDpDma_ReadModifyWrite(InstancePtr->Config.BaseAddr,
				XDPDMA_CH0_CNTL + (XDPDMA_CH_OFFSET *
				(u32)Index), RegVal, Mask);
	}

}
/*************************************************************************/
/**
 *
 * This function starts the operation on the a given channel
 *
 * @param    InstancePtr is a pointer to the driver instance.
 * @param    QOS is the Quality of Service value to be selected.
 *
 * @return   None.
 *
 * @note     .
 *
 * **************************************************************************/
This function starts the operation on the a given channel
@param    InstancePtr is a pointer to the driver instance.
@param    QOS is the Quality of Service value to be selected.

@return   None.

@note     .
This function starts the operation on the a given channel @param InstancePtr is a pointer to the driver instance . @param QOS is the Quality of Service value to be selected . @return None . @note .
void XDpDma_SetQOS(XDpDma *InstancePtr, u8 QOS)
{
	u8 Index;
	u32 RegVal = 0;
	Xil_AssertVoid(QOS >= XDPDMA_QOS_MIN && QOS <= XDPDMA_QOS_MAX);
	RegVal = (((u32)QOS << XDPDMA_CH_CNTL_QOS_DATA_RD_SHIFT) |
		   ((u32)QOS << XDPDMA_CH_CNTL_QOS_DSCR_RD_SHIFT) |
		   ((u32)QOS << XDPDMA_CH_CNTL_QOS_DSCR_WR_SHIFT));
	u32 Mask = XDPDMA_CH_CNTL_QOS_DATA_RD_MASK |
		XDPDMA_CH_CNTL_QOS_DSCR_RD_MASK |
		XDPDMA_CH_CNTL_QOS_DSCR_WR_MASK;
	for(Index = 0; Index <= XDPDMA_AUDIO_CHANNEL1; Index++) {
		XDpDma_ReadModifyWrite(InstancePtr->Config.BaseAddr,
				XDPDMA_CH0_CNTL + (XDPDMA_CH_OFFSET *
				(u32)Index), RegVal, Mask);
	}
}
void XDpDma_SetQOS ( XDpDma * InstancePtr , u8 QOS ) { u8 Index ; u32 RegVal = 0 ; Xil_AssertVoid ( QOS >= XDPDMA_QOS_MIN && QOS <= XDPDMA_QOS_MAX ) ; RegVal = ( ( ( u32 ) QOS << XDPDMA_CH_CNTL_QOS_DATA_RD_SHIFT ) | ( ( u32 ) QOS << XDPDMA_CH_CNTL_QOS_DSCR_RD_SHIFT ) | ( ( u32 ) QOS << XDPDMA_CH_CNTL_QOS_DSCR_WR_SHIFT ) ) ; u32 Mask = XDPDMA_CH_CNTL_QOS_DATA_RD_MASK | XDPDMA_CH_CNTL_QOS_DSCR_RD_MASK | XDPDMA_CH_CNTL_QOS_DSCR_WR_MASK ; for ( Index = 0 ; Index <= XDPDMA_AUDIO_CHANNEL1 ; Index ++ ) { XDpDma_ReadModifyWrite ( InstancePtr -> Config . BaseAddr , XDPDMA_CH0_CNTL + ( XDPDMA_CH_OFFSET * ( u32 ) Index ) , RegVal , Mask ) ; } }
This function starts the operation on the a given channel
 @param    InstancePtr is a pointer to the driver instance.
This function starts the operation on the a given channel @param InstancePtr is a pointer to the driver instance .