XilinxProcessorIPLib/drivers/nandps/src/xnandps.c
static void XNandPs_EccDisable(XNandPs *InstancePtr)
{
	u32 EccConfig = 0;
	/*
	 * Bypass the ECC block in the SMC controller
	 */
	EccConfig = XNandPs_ReadReg(InstancePtr->Config.SmcBase +
		(XNANDPS_ECC_MEMCFG_OFFSET(XNANDPS_IF1_ECC_OFFSET)));

	EccConfig &= ~XNANDPS_ECC_MEMCFG_ECC_MODE_MASK;
	XNandPs_EccSetCfg(InstancePtr, EccConfig);
}
/*****************************************************************************/
/**
*
* This function disables ECC block.
*
* @param	InstancePtr is a pointer to the XNandPs instance.
*
* @return	None
*
* @note		None
*
*****************************************************************************/
This function disables ECC block.
This function disables ECC block .
static void XNandPs_EccDisable(XNandPs *InstancePtr)
{
	u32 EccConfig = 0;
	EccConfig = XNandPs_ReadReg(InstancePtr->Config.SmcBase +
		(XNANDPS_ECC_MEMCFG_OFFSET(XNANDPS_IF1_ECC_OFFSET)));
	EccConfig &= ~XNANDPS_ECC_MEMCFG_ECC_MODE_MASK;
	XNandPs_EccSetCfg(InstancePtr, EccConfig);
}
static void XNandPs_EccDisable ( XNandPs * InstancePtr ) { u32 EccConfig = 0 ; EccConfig = XNandPs_ReadReg ( InstancePtr -> Config . SmcBase + ( XNANDPS_ECC_MEMCFG_OFFSET ( XNANDPS_IF1_ECC_OFFSET ) ) ) ; EccConfig &= ~ XNANDPS_ECC_MEMCFG_ECC_MODE_MASK ; XNandPs_EccSetCfg ( InstancePtr , EccConfig ) ; }
This function disables ECC block.
This function disables ECC block .
/*
	 * Bypass the ECC block in the SMC controller
	 */