sys/dev/netif/ath/hal/ath_hal/ar5416/ar5416_reset.c
HAL_BOOL
ar5416ChipReset(struct ath_hal *ah, const struct ieee80211_channel *chan)
{
	OS_MARK(ah, AH_MARK_CHIPRESET, chan ? chan->ic_freq : 0);
	/*
	 * Warm reset is optimistic.
	 */
	if (AR_SREV_MERLIN_20_OR_LATER(ah) &&
	    ath_hal_eepromGetFlag(ah, AR_EEP_OL_PWRCTRL)) {
		if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON))
			return AH_FALSE;
	} else {
		if (!ar5416SetResetReg(ah, HAL_RESET_WARM))
			return AH_FALSE;
	}

	/* Bring out of sleep mode (AGAIN) */
	if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE))
	       return AH_FALSE;

	ar5416InitPLL(ah, chan);

	/*
	 * Perform warm reset before the mode/PLL/turbo registers
	 * are changed in order to deactivate the radio.  Mode changes
	 * with an active radio can result in corrupted shifts to the
	 * radio device.
	 */
	if (chan != AH_NULL) { 
		uint32_t rfMode;

		/* treat channel B as channel G , no  B mode suport in owl */
		rfMode = IEEE80211_IS_CHAN_CCK(chan) ?
		    AR_PHY_MODE_DYNAMIC : AR_PHY_MODE_OFDM;
		if (AR_SREV_MERLIN_20(ah) && IS_5GHZ_FAST_CLOCK_EN(ah, chan)) {
			/* phy mode bits for 5GHz channels require Fast Clock */
			rfMode |= AR_PHY_MODE_DYNAMIC
			       |  AR_PHY_MODE_DYN_CCK_DISABLE;
		} else if (!AR_SREV_MERLIN_10_OR_LATER(ah)) {
			rfMode |= IEEE80211_IS_CHAN_5GHZ(chan) ?
				AR_PHY_MODE_RF5GHZ : AR_PHY_MODE_RF2GHZ;
		}
		OS_REG_WRITE(ah, AR_PHY_MODE, rfMode);
	}
	return AH_TRUE;	
}
/*
 * Places the hardware into reset and then pulls it out of reset
 */
Places the hardware into reset and then pulls it out of reset
Places the hardware into reset and then pulls it out of reset
HAL_BOOL
ar5416ChipReset(struct ath_hal *ah, const struct ieee80211_channel *chan)
{
	OS_MARK(ah, AH_MARK_CHIPRESET, chan ? chan->ic_freq : 0);
	if (AR_SREV_MERLIN_20_OR_LATER(ah) &&
	    ath_hal_eepromGetFlag(ah, AR_EEP_OL_PWRCTRL)) {
		if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON))
			return AH_FALSE;
	} else {
		if (!ar5416SetResetReg(ah, HAL_RESET_WARM))
			return AH_FALSE;
	}
	if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE))
	       return AH_FALSE;
	ar5416InitPLL(ah, chan);
	if (chan != AH_NULL) { 
		uint32_t rfMode;
		rfMode = IEEE80211_IS_CHAN_CCK(chan) ?
		    AR_PHY_MODE_DYNAMIC : AR_PHY_MODE_OFDM;
		if (AR_SREV_MERLIN_20(ah) && IS_5GHZ_FAST_CLOCK_EN(ah, chan)) {
			rfMode |= AR_PHY_MODE_DYNAMIC
			       |  AR_PHY_MODE_DYN_CCK_DISABLE;
		} else if (!AR_SREV_MERLIN_10_OR_LATER(ah)) {
			rfMode |= IEEE80211_IS_CHAN_5GHZ(chan) ?
				AR_PHY_MODE_RF5GHZ : AR_PHY_MODE_RF2GHZ;
		}
		OS_REG_WRITE(ah, AR_PHY_MODE, rfMode);
	}
	return AH_TRUE;	
}
HAL_BOOL ar5416ChipReset ( struct ath_hal * ah , const struct ieee80211_channel * chan ) { OS_MARK ( ah , AH_MARK_CHIPRESET , chan ? chan -> ic_freq : 0 ) ; if ( AR_SREV_MERLIN_20_OR_LATER ( ah ) && ath_hal_eepromGetFlag ( ah , AR_EEP_OL_PWRCTRL ) ) { if ( ! ar5416SetResetReg ( ah , HAL_RESET_POWER_ON ) ) return AH_FALSE ; } else { if ( ! ar5416SetResetReg ( ah , HAL_RESET_WARM ) ) return AH_FALSE ; } if ( ! ar5416SetPowerMode ( ah , HAL_PM_AWAKE , AH_TRUE ) ) return AH_FALSE ; ar5416InitPLL ( ah , chan ) ; if ( chan != AH_NULL ) { uint32_t rfMode ; rfMode = IEEE80211_IS_CHAN_CCK ( chan ) ? AR_PHY_MODE_DYNAMIC : AR_PHY_MODE_OFDM ; if ( AR_SREV_MERLIN_20 ( ah ) && IS_5GHZ_FAST_CLOCK_EN ( ah , chan ) ) { rfMode |= AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE ; } else if ( ! AR_SREV_MERLIN_10_OR_LATER ( ah ) ) { rfMode |= IEEE80211_IS_CHAN_5GHZ ( chan ) ? AR_PHY_MODE_RF5GHZ : AR_PHY_MODE_RF2GHZ ; } OS_REG_WRITE ( ah , AR_PHY_MODE , rfMode ) ; } return AH_TRUE ; }
Places the hardware into reset and then pulls it out of reset
Places the hardware into reset and then pulls it out of reset
/*
	 * Warm reset is optimistic.
	 */ /* Bring out of sleep mode (AGAIN) */ /*
	 * Perform warm reset before the mode/PLL/turbo registers
	 * are changed in order to deactivate the radio.  Mode changes
	 * with an active radio can result in corrupted shifts to the
	 * radio device.
	 */ /* treat channel B as channel G , no  B mode suport in owl */ /* phy mode bits for 5GHz channels require Fast Clock */