f103c8-timer-compare/Core/Src/stm32f1xx_it.c
void TIM2_IRQHandler(void)
{
  /* USER CODE BEGIN TIM2_IRQn 0 */
    if (LL_TIM_IsEnabledIT_CC1(TIM2) && LL_TIM_IsActiveFlag_CC1(TIM2))
    {
        LL_TIM_ClearFlag_CC1(TIM2);
        HAL_GPIO_TogglePin(GPIOC, GPIO_PIN_14);
        LL_TIM_OC_SetCompareCH1(TIM2, LL_TIM_GetCounter(TIM2) + 30);
    }

    if (LL_TIM_IsEnabledIT_CC2(TIM2) && LL_TIM_IsActiveFlag_CC2(TIM2))
    {
        LL_TIM_ClearFlag_CC2(TIM2);
        HAL_GPIO_TogglePin(GPIOC, GPIO_PIN_15);
        LL_TIM_OC_SetCompareCH2(TIM2, LL_TIM_GetCounter(TIM2) + 100);
    }

  /* USER CODE END TIM2_IRQn 0 */
  /* USER CODE BEGIN TIM2_IRQn 1 */

  /* USER CODE END TIM2_IRQn 1 */
}
/**
  * @brief This function handles TIM2 global interrupt.
  */
@brief This function handles TIM2 global interrupt.
@brief This function handles TIM2 global interrupt .
void TIM2_IRQHandler(void)
{
    if (LL_TIM_IsEnabledIT_CC1(TIM2) && LL_TIM_IsActiveFlag_CC1(TIM2))
    {
        LL_TIM_ClearFlag_CC1(TIM2);
        HAL_GPIO_TogglePin(GPIOC, GPIO_PIN_14);
        LL_TIM_OC_SetCompareCH1(TIM2, LL_TIM_GetCounter(TIM2) + 30);
    }
    if (LL_TIM_IsEnabledIT_CC2(TIM2) && LL_TIM_IsActiveFlag_CC2(TIM2))
    {
        LL_TIM_ClearFlag_CC2(TIM2);
        HAL_GPIO_TogglePin(GPIOC, GPIO_PIN_15);
        LL_TIM_OC_SetCompareCH2(TIM2, LL_TIM_GetCounter(TIM2) + 100);
    }
}
void TIM2_IRQHandler ( void ) { if ( LL_TIM_IsEnabledIT_CC1 ( TIM2 ) && LL_TIM_IsActiveFlag_CC1 ( TIM2 ) ) { LL_TIM_ClearFlag_CC1 ( TIM2 ) ; HAL_GPIO_TogglePin ( GPIOC , GPIO_PIN_14 ) ; LL_TIM_OC_SetCompareCH1 ( TIM2 , LL_TIM_GetCounter ( TIM2 ) + 30 ) ; } if ( LL_TIM_IsEnabledIT_CC2 ( TIM2 ) && LL_TIM_IsActiveFlag_CC2 ( TIM2 ) ) { LL_TIM_ClearFlag_CC2 ( TIM2 ) ; HAL_GPIO_TogglePin ( GPIOC , GPIO_PIN_15 ) ; LL_TIM_OC_SetCompareCH2 ( TIM2 , LL_TIM_GetCounter ( TIM2 ) + 100 ) ; } }
@brief This function handles TIM2 global interrupt.
@brief This function handles TIM2 global interrupt .
/* USER CODE BEGIN TIM2_IRQn 0 */ /* USER CODE END TIM2_IRQn 0 */ /* USER CODE BEGIN TIM2_IRQn 1 */ /* USER CODE END TIM2_IRQn 1 */