src/dpdk/drivers/net/qede/qede_debug.c
static u32 qed_idle_chk_dump_failure(struct ecore_hwfn *p_hwfn,
				     struct ecore_ptt *p_ptt,
				     u32 *
				     dump_buf,
				     bool dump,
				     u16 rule_id,
				     const struct dbg_idle_chk_rule *rule,
				     u16 fail_entry_id, u32 *cond_reg_values)
{
	struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
	const struct dbg_idle_chk_cond_reg *cond_regs;
	const struct dbg_idle_chk_info_reg *info_regs;
	u32 i, next_reg_offset = 0, offset = 0;
	struct dbg_idle_chk_result_hdr *hdr;
	const union dbg_idle_chk_reg *regs;
	u8 reg_id;

	hdr = (struct dbg_idle_chk_result_hdr *)dump_buf;
	regs = (const union dbg_idle_chk_reg *)
		p_hwfn->dbg_arrays[BIN_BUF_DBG_IDLE_CHK_REGS].ptr +
		rule->reg_offset;
	cond_regs = &regs[0].cond_reg;
	info_regs = &regs[rule->num_cond_regs].info_reg;

	/* Dump rule data */
	if (dump) {
		memset(hdr, 0, sizeof(*hdr));
		hdr->rule_id = rule_id;
		hdr->mem_entry_id = fail_entry_id;
		hdr->severity = rule->severity;
		hdr->num_dumped_cond_regs = rule->num_cond_regs;
	}

	offset += IDLE_CHK_RESULT_HDR_DWORDS;

	/* Dump condition register values */
	for (reg_id = 0; reg_id < rule->num_cond_regs; reg_id++) {
		const struct dbg_idle_chk_cond_reg *reg = &cond_regs[reg_id];
		struct dbg_idle_chk_result_reg_hdr *reg_hdr;

		reg_hdr =
		    (struct dbg_idle_chk_result_reg_hdr *)(dump_buf + offset);

		/* Write register header */
		if (!dump) {
			offset += IDLE_CHK_RESULT_REG_HDR_DWORDS +
			    reg->entry_size;
			continue;
		}

		offset += IDLE_CHK_RESULT_REG_HDR_DWORDS;
		memset(reg_hdr, 0, sizeof(*reg_hdr));
		reg_hdr->start_entry = reg->start_entry;
		reg_hdr->size = reg->entry_size;
		SET_FIELD(reg_hdr->data,
			  DBG_IDLE_CHK_RESULT_REG_HDR_IS_MEM,
			  reg->num_entries > 1 || reg->start_entry > 0 ? 1 : 0);
		SET_FIELD(reg_hdr->data,
			  DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID, reg_id);

		/* Write register values */
		for (i = 0; i < reg_hdr->size; i++, next_reg_offset++, offset++)
			dump_buf[offset] = cond_reg_values[next_reg_offset];
	}

	/* Dump info register values */
	for (reg_id = 0; reg_id < rule->num_info_regs; reg_id++) {
		const struct dbg_idle_chk_info_reg *reg = &info_regs[reg_id];
		u32 block_id;

		/* Check if register's block is in reset */
		if (!dump) {
			offset += IDLE_CHK_RESULT_REG_HDR_DWORDS + reg->size;
			continue;
		}

		block_id = GET_FIELD(reg->data, DBG_IDLE_CHK_INFO_REG_BLOCK_ID);
		if (block_id >= MAX_BLOCK_ID) {
			DP_NOTICE(p_hwfn, false, "Invalid block_id\n");
			return 0;
		}

		if (!dev_data->block_in_reset[block_id]) {
			struct dbg_idle_chk_result_reg_hdr *reg_hdr;
			bool wide_bus, eval_mode, mode_match = true;
			u16 modes_buf_offset;
			u32 addr;

			reg_hdr = (struct dbg_idle_chk_result_reg_hdr *)
				  (dump_buf + offset);

			/* Check mode */
			eval_mode = GET_FIELD(reg->mode.data,
					      DBG_MODE_HDR_EVAL_MODE) > 0;
			if (eval_mode) {
				modes_buf_offset =
				    GET_FIELD(reg->mode.data,
					      DBG_MODE_HDR_MODES_BUF_OFFSET);
				mode_match =
					qed_is_mode_match(p_hwfn,
							  &modes_buf_offset);
			}

			if (!mode_match)
				continue;

			addr = GET_FIELD(reg->data,
					 DBG_IDLE_CHK_INFO_REG_ADDRESS);
			wide_bus = GET_FIELD(reg->data,
					     DBG_IDLE_CHK_INFO_REG_WIDE_BUS);

			/* Write register header */
			offset += IDLE_CHK_RESULT_REG_HDR_DWORDS;
			hdr->num_dumped_info_regs++;
			memset(reg_hdr, 0, sizeof(*reg_hdr));
			reg_hdr->size = reg->size;
			SET_FIELD(reg_hdr->data,
				  DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID,
				  rule->num_cond_regs + reg_id);

			/* Write register values */
			offset += qed_grc_dump_addr_range(p_hwfn,
							  p_ptt,
							  dump_buf + offset,
							  dump,
							  addr,
							  reg->size, wide_bus,
							  SPLIT_TYPE_NONE, 0);
		}
	}

	return offset;
}
/* Writes the specified failing Idle Check rule to the specified buffer.
 * Returns the dumped size in dwords.
 */
Writes the specified failing Idle Check rule to the specified buffer.
Returns the dumped size in dwords.
Writes the specified failing Idle Check rule to the specified buffer . Returns the dumped size in dwords .
static u32 qed_idle_chk_dump_failure(struct ecore_hwfn *p_hwfn,
				     struct ecore_ptt *p_ptt,
				     u32 *
				     dump_buf,
				     bool dump,
				     u16 rule_id,
				     const struct dbg_idle_chk_rule *rule,
				     u16 fail_entry_id, u32 *cond_reg_values)
{
	struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
	const struct dbg_idle_chk_cond_reg *cond_regs;
	const struct dbg_idle_chk_info_reg *info_regs;
	u32 i, next_reg_offset = 0, offset = 0;
	struct dbg_idle_chk_result_hdr *hdr;
	const union dbg_idle_chk_reg *regs;
	u8 reg_id;
	hdr = (struct dbg_idle_chk_result_hdr *)dump_buf;
	regs = (const union dbg_idle_chk_reg *)
		p_hwfn->dbg_arrays[BIN_BUF_DBG_IDLE_CHK_REGS].ptr +
		rule->reg_offset;
	cond_regs = &regs[0].cond_reg;
	info_regs = &regs[rule->num_cond_regs].info_reg;
	if (dump) {
		memset(hdr, 0, sizeof(*hdr));
		hdr->rule_id = rule_id;
		hdr->mem_entry_id = fail_entry_id;
		hdr->severity = rule->severity;
		hdr->num_dumped_cond_regs = rule->num_cond_regs;
	}
	offset += IDLE_CHK_RESULT_HDR_DWORDS;
	for (reg_id = 0; reg_id < rule->num_cond_regs; reg_id++) {
		const struct dbg_idle_chk_cond_reg *reg = &cond_regs[reg_id];
		struct dbg_idle_chk_result_reg_hdr *reg_hdr;
		reg_hdr =
		    (struct dbg_idle_chk_result_reg_hdr *)(dump_buf + offset);
		if (!dump) {
			offset += IDLE_CHK_RESULT_REG_HDR_DWORDS +
			    reg->entry_size;
			continue;
		}
		offset += IDLE_CHK_RESULT_REG_HDR_DWORDS;
		memset(reg_hdr, 0, sizeof(*reg_hdr));
		reg_hdr->start_entry = reg->start_entry;
		reg_hdr->size = reg->entry_size;
		SET_FIELD(reg_hdr->data,
			  DBG_IDLE_CHK_RESULT_REG_HDR_IS_MEM,
			  reg->num_entries > 1 || reg->start_entry > 0 ? 1 : 0);
		SET_FIELD(reg_hdr->data,
			  DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID, reg_id);
		for (i = 0; i < reg_hdr->size; i++, next_reg_offset++, offset++)
			dump_buf[offset] = cond_reg_values[next_reg_offset];
	}
	for (reg_id = 0; reg_id < rule->num_info_regs; reg_id++) {
		const struct dbg_idle_chk_info_reg *reg = &info_regs[reg_id];
		u32 block_id;
		if (!dump) {
			offset += IDLE_CHK_RESULT_REG_HDR_DWORDS + reg->size;
			continue;
		}
		block_id = GET_FIELD(reg->data, DBG_IDLE_CHK_INFO_REG_BLOCK_ID);
		if (block_id >= MAX_BLOCK_ID) {
			DP_NOTICE(p_hwfn, false, "Invalid block_id\n");
			return 0;
		}
		if (!dev_data->block_in_reset[block_id]) {
			struct dbg_idle_chk_result_reg_hdr *reg_hdr;
			bool wide_bus, eval_mode, mode_match = true;
			u16 modes_buf_offset;
			u32 addr;
			reg_hdr = (struct dbg_idle_chk_result_reg_hdr *)
				  (dump_buf + offset);
			eval_mode = GET_FIELD(reg->mode.data,
					      DBG_MODE_HDR_EVAL_MODE) > 0;
			if (eval_mode) {
				modes_buf_offset =
				    GET_FIELD(reg->mode.data,
					      DBG_MODE_HDR_MODES_BUF_OFFSET);
				mode_match =
					qed_is_mode_match(p_hwfn,
							  &modes_buf_offset);
			}
			if (!mode_match)
				continue;
			addr = GET_FIELD(reg->data,
					 DBG_IDLE_CHK_INFO_REG_ADDRESS);
			wide_bus = GET_FIELD(reg->data,
					     DBG_IDLE_CHK_INFO_REG_WIDE_BUS);
			offset += IDLE_CHK_RESULT_REG_HDR_DWORDS;
			hdr->num_dumped_info_regs++;
			memset(reg_hdr, 0, sizeof(*reg_hdr));
			reg_hdr->size = reg->size;
			SET_FIELD(reg_hdr->data,
				  DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID,
				  rule->num_cond_regs + reg_id);
			offset += qed_grc_dump_addr_range(p_hwfn,
							  p_ptt,
							  dump_buf + offset,
							  dump,
							  addr,
							  reg->size, wide_bus,
							  SPLIT_TYPE_NONE, 0);
		}
	}
	return offset;
}
static u32 qed_idle_chk_dump_failure ( struct ecore_hwfn * p_hwfn , struct ecore_ptt * p_ptt , u32 * dump_buf , bool dump , u16 rule_id , const struct dbg_idle_chk_rule * rule , u16 fail_entry_id , u32 * cond_reg_values ) { struct dbg_tools_data * dev_data = & p_hwfn -> dbg_info ; const struct dbg_idle_chk_cond_reg * cond_regs ; const struct dbg_idle_chk_info_reg * info_regs ; u32 i , next_reg_offset = 0 , offset = 0 ; struct dbg_idle_chk_result_hdr * hdr ; const union dbg_idle_chk_reg * regs ; u8 reg_id ; hdr = ( struct dbg_idle_chk_result_hdr * ) dump_buf ; regs = ( const union dbg_idle_chk_reg * ) p_hwfn -> dbg_arrays [ BIN_BUF_DBG_IDLE_CHK_REGS ] . ptr + rule -> reg_offset ; cond_regs = & regs [ 0 ] . cond_reg ; info_regs = & regs [ rule -> num_cond_regs ] . info_reg ; if ( dump ) { memset ( hdr , 0 , sizeof ( * hdr ) ) ; hdr -> rule_id = rule_id ; hdr -> mem_entry_id = fail_entry_id ; hdr -> severity = rule -> severity ; hdr -> num_dumped_cond_regs = rule -> num_cond_regs ; } offset += IDLE_CHK_RESULT_HDR_DWORDS ; for ( reg_id = 0 ; reg_id < rule -> num_cond_regs ; reg_id ++ ) { const struct dbg_idle_chk_cond_reg * reg = & cond_regs [ reg_id ] ; struct dbg_idle_chk_result_reg_hdr * reg_hdr ; reg_hdr = ( struct dbg_idle_chk_result_reg_hdr * ) ( dump_buf + offset ) ; if ( ! dump ) { offset += IDLE_CHK_RESULT_REG_HDR_DWORDS + reg -> entry_size ; continue ; } offset += IDLE_CHK_RESULT_REG_HDR_DWORDS ; memset ( reg_hdr , 0 , sizeof ( * reg_hdr ) ) ; reg_hdr -> start_entry = reg -> start_entry ; reg_hdr -> size = reg -> entry_size ; SET_FIELD ( reg_hdr -> data , DBG_IDLE_CHK_RESULT_REG_HDR_IS_MEM , reg -> num_entries > 1 || reg -> start_entry > 0 ? 1 : 0 ) ; SET_FIELD ( reg_hdr -> data , DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID , reg_id ) ; for ( i = 0 ; i < reg_hdr -> size ; i ++ , next_reg_offset ++ , offset ++ ) dump_buf [ offset ] = cond_reg_values [ next_reg_offset ] ; } for ( reg_id = 0 ; reg_id < rule -> num_info_regs ; reg_id ++ ) { const struct dbg_idle_chk_info_reg * reg = & info_regs [ reg_id ] ; u32 block_id ; if ( ! dump ) { offset += IDLE_CHK_RESULT_REG_HDR_DWORDS + reg -> size ; continue ; } block_id = GET_FIELD ( reg -> data , DBG_IDLE_CHK_INFO_REG_BLOCK_ID ) ; if ( block_id >= MAX_BLOCK_ID ) { DP_NOTICE ( p_hwfn , false , " \n " ) ; return 0 ; } if ( ! dev_data -> block_in_reset [ block_id ] ) { struct dbg_idle_chk_result_reg_hdr * reg_hdr ; bool wide_bus , eval_mode , mode_match = true ; u16 modes_buf_offset ; u32 addr ; reg_hdr = ( struct dbg_idle_chk_result_reg_hdr * ) ( dump_buf + offset ) ; eval_mode = GET_FIELD ( reg -> mode . data , DBG_MODE_HDR_EVAL_MODE ) > 0 ; if ( eval_mode ) { modes_buf_offset = GET_FIELD ( reg -> mode . data , DBG_MODE_HDR_MODES_BUF_OFFSET ) ; mode_match = qed_is_mode_match ( p_hwfn , & modes_buf_offset ) ; } if ( ! mode_match ) continue ; addr = GET_FIELD ( reg -> data , DBG_IDLE_CHK_INFO_REG_ADDRESS ) ; wide_bus = GET_FIELD ( reg -> data , DBG_IDLE_CHK_INFO_REG_WIDE_BUS ) ; offset += IDLE_CHK_RESULT_REG_HDR_DWORDS ; hdr -> num_dumped_info_regs ++ ; memset ( reg_hdr , 0 , sizeof ( * reg_hdr ) ) ; reg_hdr -> size = reg -> size ; SET_FIELD ( reg_hdr -> data , DBG_IDLE_CHK_RESULT_REG_HDR_REG_ID , rule -> num_cond_regs + reg_id ) ; offset += qed_grc_dump_addr_range ( p_hwfn , p_ptt , dump_buf + offset , dump , addr , reg -> size , wide_bus , SPLIT_TYPE_NONE , 0 ) ; } } return offset ; }
Writes the specified failing Idle Check rule to the specified buffer.
Writes the specified failing Idle Check rule to the specified buffer .
/* Dump rule data */ /* Dump condition register values */ /* Write register header */ /* Write register values */ /* Dump info register values */ /* Check if register's block is in reset */ /* Check mode */ /* Write register header */ /* Write register values */