XilinxProcessorIPLib/drivers/dp14txss/examples/src/pt_only/xdptxss_dp14_pt.c
u32 DpSs_SetupIntrSystem(void)
{
	u32 Status;
	XINTC *IntcInstPtr = &IntcInst;

	// Tx side
#ifdef Tx
	DpTxSs_SetupIntrSystem();
#endif
	// Rx side
#ifdef Rx
	DpRxSs_SetupIntrSystem();
#endif

#if XPAR_XV_FRMBUFWR_NUM_INSTANCES
	XVFrmbufWr_SetCallback(&frmbufwr, XVFRMBUFWR_HANDLER_DONE,
								&bufferWr_callback, &frmbufwr);
#endif

#if XPAR_XV_FRMBUFRD_NUM_INSTANCES
	XVFrmbufRd_SetCallback(&frmbufrd, XVFRMBUFRD_HANDLER_DONE,
								&bufferRd_callback, &frmbufrd);
#endif

	/* The configuration parameters of the interrupt controller */
	XScuGic_Config *IntcConfig;

	/* Initialize the interrupt controller
	 * driver so that it is ready to use. */
	IntcConfig = XScuGic_LookupConfig(XINTC_DEVICE_ID);
	if (NULL == IntcConfig) {
		return XST_FAILURE;
	}

	Status = XScuGic_CfgInitialize(IntcInstPtr, IntcConfig,
	IntcConfig->CpuBaseAddress);
	if (Status != XST_SUCCESS) {
	return XST_FAILURE;
	}

	/* Connect the device driver handler that will be called when an
	 * interrupt for the device occurs, the handler defined
	 * above performs the specific interrupt processing for the device.
	 * */
#ifdef Rx
	Status = XScuGic_Connect(IntcInstPtr, XINTC_DPRXSS_DP_INTERRUPT_ID,
				(Xil_InterruptHandler)XDpRxSs_DpIntrHandler,
				&DpRxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP RX SS DP interrupt connect failed!\n\r");
		return XST_FAILURE;
	}
	/* Enable the interrupt for the DP device */
	XScuGic_Enable(IntcInstPtr, XINTC_DPRXSS_DP_INTERRUPT_ID);

#if XPAR_XV_FRMBUFWR_NUM_INSTANCES
	Status = XScuGic_Connect(IntcInstPtr,
				 XPAR_FABRIC_V_FRMBUF_WR_0_VEC_ID,
				 (Xil_InterruptHandler)XVFrmbufWr_InterruptHandler,
				 &frmbufwr);
	if (Status != XST_SUCCESS) {
		xil_printf("ERROR:: FRMBUF WR interrupt connect failed!\r\n");
		return XST_FAILURE;
	}
	/* Enable the interrupt vector at the interrupt controller */
	XScuGic_Enable(IntcInstPtr, XPAR_FABRIC_V_FRMBUF_WR_0_VEC_ID);
#endif

#endif
	/* Connect the device driver handler that will be called when an
	 * interrupt for the device occurs, the handler defined above performs
	 * the specific interrupt processing for the device
	 */
#ifdef Tx
	Status = XScuGic_Connect(IntcInstPtr, XINTC_DPTXSS_DP_INTERRUPT_ID,
				(Xil_InterruptHandler)XDpTxSs_DpIntrHandler,
				&DpTxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP TX SS DP interrupt connect failed!\r\n");
		return XST_FAILURE;
	}

	/* Enable the interrupt */
	XScuGic_Enable(IntcInstPtr, XINTC_DPTXSS_DP_INTERRUPT_ID);

#if XPAR_XV_FRMBUFRD_NUM_INSTANCES
	Status = XScuGic_Connect(IntcInstPtr,
				 XPAR_FABRIC_V_FRMBUF_RD_0_VEC_ID,
				 (Xil_InterruptHandler)XVFrmbufRd_InterruptHandler,
				 &frmbufrd);
	if (Status != XST_SUCCESS) {
		xil_printf("ERROR:: FRMBUF WR interrupt connect failed!\r\n");
		return XST_FAILURE;
	}

	/* Disable the interrupt vector at the interrupt controller */
	XScuGic_Enable(IntcInstPtr, XPAR_FABRIC_V_FRMBUF_RD_0_VEC_ID);
#endif

#endif

	/* Initialize the exception table. */
	Xil_ExceptionInit();

	/* Register the interrupt controller handler with the exception
	 * table.*/
	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
				     (Xil_ExceptionHandler)XINTC_HANDLER,
				     IntcInstPtr);

	/* Enable exceptions. */
	Xil_ExceptionEnable();

	return (XST_SUCCESS);
}
/*****************************************************************************/
/**
*
* This function sets up the interrupt system so interrupts can occur for the
* DisplayPort TX Subsystem core. The function is application-specific since
* the actual system may or may not have an interrupt controller. The DPTX
* Subsystem core could be directly connected to a processor without an
* interrupt controller. The user should modify this function to fit the
* application.
*
* @param	None
*
* @return
*		- XST_SUCCESS if interrupt setup was successful.
*		- A specific error code defined in "xstatus.h" if an error
*		occurs.
*
* @note		None.
*
******************************************************************************/
This function sets up the interrupt system so interrupts can occur for the
DisplayPort TX Subsystem core. The function is application-specific since
the actual system may or may not have an interrupt controller. The DPTX
Subsystem core could be directly connected to a processor without an
interrupt controller. The user should modify this function to fit the
application.
This function sets up the interrupt system so interrupts can occur for the DisplayPort TX Subsystem core . The function is application - specific since the actual system may or may not have an interrupt controller . The DPTX Subsystem core could be directly connected to a processor without an interrupt controller . The user should modify this function to fit the application .
u32 DpSs_SetupIntrSystem(void)
{
	u32 Status;
	XINTC *IntcInstPtr = &IntcInst;
#ifdef Tx
	DpTxSs_SetupIntrSystem();
#endif
#ifdef Rx
	DpRxSs_SetupIntrSystem();
#endif
#if XPAR_XV_FRMBUFWR_NUM_INSTANCES
	XVFrmbufWr_SetCallback(&frmbufwr, XVFRMBUFWR_HANDLER_DONE,
								&bufferWr_callback, &frmbufwr);
#endif
#if XPAR_XV_FRMBUFRD_NUM_INSTANCES
	XVFrmbufRd_SetCallback(&frmbufrd, XVFRMBUFRD_HANDLER_DONE,
								&bufferRd_callback, &frmbufrd);
#endif
	XScuGic_Config *IntcConfig;
	IntcConfig = XScuGic_LookupConfig(XINTC_DEVICE_ID);
	if (NULL == IntcConfig) {
		return XST_FAILURE;
	}
	Status = XScuGic_CfgInitialize(IntcInstPtr, IntcConfig,
	IntcConfig->CpuBaseAddress);
	if (Status != XST_SUCCESS) {
	return XST_FAILURE;
	}
#ifdef Rx
	Status = XScuGic_Connect(IntcInstPtr, XINTC_DPRXSS_DP_INTERRUPT_ID,
				(Xil_InterruptHandler)XDpRxSs_DpIntrHandler,
				&DpRxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP RX SS DP interrupt connect failed!\n\r");
		return XST_FAILURE;
	}
	XScuGic_Enable(IntcInstPtr, XINTC_DPRXSS_DP_INTERRUPT_ID);
#if XPAR_XV_FRMBUFWR_NUM_INSTANCES
	Status = XScuGic_Connect(IntcInstPtr,
				 XPAR_FABRIC_V_FRMBUF_WR_0_VEC_ID,
				 (Xil_InterruptHandler)XVFrmbufWr_InterruptHandler,
				 &frmbufwr);
	if (Status != XST_SUCCESS) {
		xil_printf("ERROR:: FRMBUF WR interrupt connect failed!\r\n");
		return XST_FAILURE;
	}
	XScuGic_Enable(IntcInstPtr, XPAR_FABRIC_V_FRMBUF_WR_0_VEC_ID);
#endif
#endif
#ifdef Tx
	Status = XScuGic_Connect(IntcInstPtr, XINTC_DPTXSS_DP_INTERRUPT_ID,
				(Xil_InterruptHandler)XDpTxSs_DpIntrHandler,
				&DpTxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP TX SS DP interrupt connect failed!\r\n");
		return XST_FAILURE;
	}
	XScuGic_Enable(IntcInstPtr, XINTC_DPTXSS_DP_INTERRUPT_ID);
#if XPAR_XV_FRMBUFRD_NUM_INSTANCES
	Status = XScuGic_Connect(IntcInstPtr,
				 XPAR_FABRIC_V_FRMBUF_RD_0_VEC_ID,
				 (Xil_InterruptHandler)XVFrmbufRd_InterruptHandler,
				 &frmbufrd);
	if (Status != XST_SUCCESS) {
		xil_printf("ERROR:: FRMBUF WR interrupt connect failed!\r\n");
		return XST_FAILURE;
	}
	XScuGic_Enable(IntcInstPtr, XPAR_FABRIC_V_FRMBUF_RD_0_VEC_ID);
#endif
#endif
	Xil_ExceptionInit();
	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
				     (Xil_ExceptionHandler)XINTC_HANDLER,
				     IntcInstPtr);
	Xil_ExceptionEnable();
	return (XST_SUCCESS);
}
u32 DpSs_SetupIntrSystem ( void ) { u32 Status ; XINTC * IntcInstPtr = & IntcInst ; #ifdef Tx DpTxSs_SetupIntrSystem ( ) ; #endif #ifdef Rx DpRxSs_SetupIntrSystem ( ) ; #endif #if XPAR_XV_FRMBUFWR_NUM_INSTANCES XVFrmbufWr_SetCallback ( & frmbufwr , XVFRMBUFWR_HANDLER_DONE , & bufferWr_callback , & frmbufwr ) ; #endif #if XPAR_XV_FRMBUFRD_NUM_INSTANCES XVFrmbufRd_SetCallback ( & frmbufrd , XVFRMBUFRD_HANDLER_DONE , & bufferRd_callback , & frmbufrd ) ; #endif XScuGic_Config * IntcConfig ; IntcConfig = XScuGic_LookupConfig ( XINTC_DEVICE_ID ) ; if ( NULL == IntcConfig ) { return XST_FAILURE ; } Status = XScuGic_CfgInitialize ( IntcInstPtr , IntcConfig , IntcConfig -> CpuBaseAddress ) ; if ( Status != XST_SUCCESS ) { return XST_FAILURE ; } #ifdef Rx Status = XScuGic_Connect ( IntcInstPtr , XINTC_DPRXSS_DP_INTERRUPT_ID , ( Xil_InterruptHandler ) XDpRxSs_DpIntrHandler , & DpRxSsInst ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \n \r " ) ; return XST_FAILURE ; } XScuGic_Enable ( IntcInstPtr , XINTC_DPRXSS_DP_INTERRUPT_ID ) ; #if XPAR_XV_FRMBUFWR_NUM_INSTANCES Status = XScuGic_Connect ( IntcInstPtr , XPAR_FABRIC_V_FRMBUF_WR_0_VEC_ID , ( Xil_InterruptHandler ) XVFrmbufWr_InterruptHandler , & frmbufwr ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \r \n " ) ; return XST_FAILURE ; } XScuGic_Enable ( IntcInstPtr , XPAR_FABRIC_V_FRMBUF_WR_0_VEC_ID ) ; #endif #endif #ifdef Tx Status = XScuGic_Connect ( IntcInstPtr , XINTC_DPTXSS_DP_INTERRUPT_ID , ( Xil_InterruptHandler ) XDpTxSs_DpIntrHandler , & DpTxSsInst ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \r \n " ) ; return XST_FAILURE ; } XScuGic_Enable ( IntcInstPtr , XINTC_DPTXSS_DP_INTERRUPT_ID ) ; #if XPAR_XV_FRMBUFRD_NUM_INSTANCES Status = XScuGic_Connect ( IntcInstPtr , XPAR_FABRIC_V_FRMBUF_RD_0_VEC_ID , ( Xil_InterruptHandler ) XVFrmbufRd_InterruptHandler , & frmbufrd ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \r \n " ) ; return XST_FAILURE ; } XScuGic_Enable ( IntcInstPtr , XPAR_FABRIC_V_FRMBUF_RD_0_VEC_ID ) ; #endif #endif Xil_ExceptionInit ( ) ; Xil_ExceptionRegisterHandler ( XIL_EXCEPTION_ID_INT , ( Xil_ExceptionHandler ) XINTC_HANDLER , IntcInstPtr ) ; Xil_ExceptionEnable ( ) ; return ( XST_SUCCESS ) ; }
This function sets up the interrupt system so interrupts can occur for the
DisplayPort TX Subsystem core.
This function sets up the interrupt system so interrupts can occur for the DisplayPort TX Subsystem core .
// Tx side // Rx side /* The configuration parameters of the interrupt controller */ /* Initialize the interrupt controller
	 * driver so that it is ready to use. */ /* Connect the device driver handler that will be called when an
	 * interrupt for the device occurs, the handler defined
	 * above performs the specific interrupt processing for the device.
	 * */ /* Enable the interrupt for the DP device */ /* Enable the interrupt vector at the interrupt controller */ /* Connect the device driver handler that will be called when an
	 * interrupt for the device occurs, the handler defined above performs
	 * the specific interrupt processing for the device
	 */ /* Enable the interrupt */ /* Disable the interrupt vector at the interrupt controller */ /* Initialize the exception table. */ /* Register the interrupt controller handler with the exception
	 * table.*/ /* Enable exceptions. */