XilinxProcessorIPLib/drivers/vphy/src/xvphy.c
u32 XVphy_PllInitialize(XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId,
		XVphy_PllRefClkSelType QpllRefClkSel,
		XVphy_PllRefClkSelType CpllRefClkSel,
		XVphy_PllType TxPllSelect, XVphy_PllType RxPllSelect)
{
	/* Suppress Warning Messages */
	ChId = ChId;

	/* Set configuration in software. */
	if (InstancePtr->Config.XcvrType != XVPHY_GT_TYPE_GTPE2) {
		XVphy_CfgPllRefClkSel(InstancePtr, QuadId,
				XVPHY_CHANNEL_ID_CMNA, QpllRefClkSel);
		XVphy_CfgPllRefClkSel(InstancePtr, QuadId,
				XVPHY_CHANNEL_ID_CHA, CpllRefClkSel);
	}
	/* GTP. */
	else {
		XVphy_CfgPllRefClkSel(InstancePtr, QuadId,
				XVPHY_CHANNEL_ID_CMN0,	QpllRefClkSel);
		XVphy_CfgPllRefClkSel(InstancePtr, QuadId,
				XVPHY_CHANNEL_ID_CMN1, CpllRefClkSel);
	}
	XVphy_CfgSysClkDataSel(InstancePtr, QuadId, XVPHY_DIR_TX,
			Pll2SysClkData(TxPllSelect));
	XVphy_CfgSysClkDataSel(InstancePtr, QuadId, XVPHY_DIR_RX,
			Pll2SysClkData(RxPllSelect));
	XVphy_CfgSysClkOutSel(InstancePtr, QuadId, XVPHY_DIR_TX,
			Pll2SysClkOut(TxPllSelect));
	XVphy_CfgSysClkOutSel(InstancePtr, QuadId, XVPHY_DIR_RX,
			Pll2SysClkOut(RxPllSelect));

	/* Write configuration to hardware at once. */
	XVphy_WriteCfgRefClkSelReg(InstancePtr, QuadId);

	return XST_SUCCESS;
}
/*****************************************************************************/
/**
* This function will initialize the PLL selection for a given channel.
*
* @param	InstancePtr is a pointer to the XVphy core instance.
* @param	QuadId is the GT quad ID to operate on.
* @param	ChId is the channel ID to operate on.
* @param	QpllRefClkSel is the QPLL reference clock selection for the
*		quad.
*		- In GTP, this is used to hold PLL0 refclk selection.
* @param	CpllRefClkSel is the CPLL reference clock selection for the
*		quad.
*		- In GTP, this is used to hold PLL1 refclk selection.
* @param	TxPllSelect is the reference clock selection for the quad's
*		TX PLL dividers.
* @param	RxPllSelect is the reference clock selection for the quad's
*		RX PLL dividers.
*
* @return
*		- XST_SUCCESS.
*
* @note		None.
*
******************************************************************************/
This function will initialize the PLL selection for a given channel.
This function will initialize the PLL selection for a given channel .
u32 XVphy_PllInitialize(XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId,
		XVphy_PllRefClkSelType QpllRefClkSel,
		XVphy_PllRefClkSelType CpllRefClkSel,
		XVphy_PllType TxPllSelect, XVphy_PllType RxPllSelect)
{
	ChId = ChId;
	if (InstancePtr->Config.XcvrType != XVPHY_GT_TYPE_GTPE2) {
		XVphy_CfgPllRefClkSel(InstancePtr, QuadId,
				XVPHY_CHANNEL_ID_CMNA, QpllRefClkSel);
		XVphy_CfgPllRefClkSel(InstancePtr, QuadId,
				XVPHY_CHANNEL_ID_CHA, CpllRefClkSel);
	}
	else {
		XVphy_CfgPllRefClkSel(InstancePtr, QuadId,
				XVPHY_CHANNEL_ID_CMN0,	QpllRefClkSel);
		XVphy_CfgPllRefClkSel(InstancePtr, QuadId,
				XVPHY_CHANNEL_ID_CMN1, CpllRefClkSel);
	}
	XVphy_CfgSysClkDataSel(InstancePtr, QuadId, XVPHY_DIR_TX,
			Pll2SysClkData(TxPllSelect));
	XVphy_CfgSysClkDataSel(InstancePtr, QuadId, XVPHY_DIR_RX,
			Pll2SysClkData(RxPllSelect));
	XVphy_CfgSysClkOutSel(InstancePtr, QuadId, XVPHY_DIR_TX,
			Pll2SysClkOut(TxPllSelect));
	XVphy_CfgSysClkOutSel(InstancePtr, QuadId, XVPHY_DIR_RX,
			Pll2SysClkOut(RxPllSelect));
	XVphy_WriteCfgRefClkSelReg(InstancePtr, QuadId);
	return XST_SUCCESS;
}
u32 XVphy_PllInitialize ( XVphy * InstancePtr , u8 QuadId , XVphy_ChannelId ChId , XVphy_PllRefClkSelType QpllRefClkSel , XVphy_PllRefClkSelType CpllRefClkSel , XVphy_PllType TxPllSelect , XVphy_PllType RxPllSelect ) { ChId = ChId ; if ( InstancePtr -> Config . XcvrType != XVPHY_GT_TYPE_GTPE2 ) { XVphy_CfgPllRefClkSel ( InstancePtr , QuadId , XVPHY_CHANNEL_ID_CMNA , QpllRefClkSel ) ; XVphy_CfgPllRefClkSel ( InstancePtr , QuadId , XVPHY_CHANNEL_ID_CHA , CpllRefClkSel ) ; } else { XVphy_CfgPllRefClkSel ( InstancePtr , QuadId , XVPHY_CHANNEL_ID_CMN0 , QpllRefClkSel ) ; XVphy_CfgPllRefClkSel ( InstancePtr , QuadId , XVPHY_CHANNEL_ID_CMN1 , CpllRefClkSel ) ; } XVphy_CfgSysClkDataSel ( InstancePtr , QuadId , XVPHY_DIR_TX , Pll2SysClkData ( TxPllSelect ) ) ; XVphy_CfgSysClkDataSel ( InstancePtr , QuadId , XVPHY_DIR_RX , Pll2SysClkData ( RxPllSelect ) ) ; XVphy_CfgSysClkOutSel ( InstancePtr , QuadId , XVPHY_DIR_TX , Pll2SysClkOut ( TxPllSelect ) ) ; XVphy_CfgSysClkOutSel ( InstancePtr , QuadId , XVPHY_DIR_RX , Pll2SysClkOut ( RxPllSelect ) ) ; XVphy_WriteCfgRefClkSelReg ( InstancePtr , QuadId ) ; return XST_SUCCESS ; }
This function will initialize the PLL selection for a given channel.
This function will initialize the PLL selection for a given channel .
/* Suppress Warning Messages */ /* Set configuration in software. */ /* GTP. */ /* Write configuration to hardware at once. */