XilinxProcessorIPLib/drivers/v_hdmiphy1/src/xhdmiphy1_hdmi.c
void XHdmiphy1_DruReset(XHdmiphy1 *InstancePtr, XHdmiphy1_ChannelId ChId,
        u8 Reset)
{
	u32 RegVal;
	u32 MaskVal = 0;
	u8 Id, Id0, Id1;

	/* Read DRU ctrl register. */
	RegVal = XHdmiphy1_ReadReg(InstancePtr->Config.BaseAddr,
			XHDMIPHY1_DRU_CTRL_REG);

	XHdmiphy1_Ch2Ids(InstancePtr, ChId, &Id0, &Id1);
	for (Id = Id0; Id <= Id1; Id++) {
		MaskVal |= XHDMIPHY1_DRU_CTRL_RST_MASK(Id);
	}

	/* Write DRU ctrl register. */
	if (Reset) {
		RegVal |= MaskVal;
	}
	else {
		RegVal &= ~MaskVal;
	}
	XHdmiphy1_WriteReg(InstancePtr->Config.BaseAddr, XHDMIPHY1_DRU_CTRL_REG,
			RegVal);
}
/*****************************************************************************/
/**
* This function resets the DRU in the HDMIPHY.
*
* @param	InstancePtr is a pointer to the XHdmiphy1 core instance.
* @param	ChId is the channel ID to operate on.
* @param	Reset specifies TRUE/FALSE value to either enable or disable
*		the DRU respectively.
*
* @return	None.
*
******************************************************************************/
This function resets the DRU in the HDMIPHY.
This function resets the DRU in the HDMIPHY .
void XHdmiphy1_DruReset(XHdmiphy1 *InstancePtr, XHdmiphy1_ChannelId ChId,
        u8 Reset)
{
	u32 RegVal;
	u32 MaskVal = 0;
	u8 Id, Id0, Id1;
	RegVal = XHdmiphy1_ReadReg(InstancePtr->Config.BaseAddr,
			XHDMIPHY1_DRU_CTRL_REG);
	XHdmiphy1_Ch2Ids(InstancePtr, ChId, &Id0, &Id1);
	for (Id = Id0; Id <= Id1; Id++) {
		MaskVal |= XHDMIPHY1_DRU_CTRL_RST_MASK(Id);
	}
	if (Reset) {
		RegVal |= MaskVal;
	}
	else {
		RegVal &= ~MaskVal;
	}
	XHdmiphy1_WriteReg(InstancePtr->Config.BaseAddr, XHDMIPHY1_DRU_CTRL_REG,
			RegVal);
}
void XHdmiphy1_DruReset ( XHdmiphy1 * InstancePtr , XHdmiphy1_ChannelId ChId , u8 Reset ) { u32 RegVal ; u32 MaskVal = 0 ; u8 Id , Id0 , Id1 ; RegVal = XHdmiphy1_ReadReg ( InstancePtr -> Config . BaseAddr , XHDMIPHY1_DRU_CTRL_REG ) ; XHdmiphy1_Ch2Ids ( InstancePtr , ChId , & Id0 , & Id1 ) ; for ( Id = Id0 ; Id <= Id1 ; Id ++ ) { MaskVal |= XHDMIPHY1_DRU_CTRL_RST_MASK ( Id ) ; } if ( Reset ) { RegVal |= MaskVal ; } else { RegVal &= ~ MaskVal ; } XHdmiphy1_WriteReg ( InstancePtr -> Config . BaseAddr , XHDMIPHY1_DRU_CTRL_REG , RegVal ) ; }
This function resets the DRU in the HDMIPHY.
This function resets the DRU in the HDMIPHY .
/* Read DRU ctrl register. */ /* Write DRU ctrl register. */