XilinxProcessorIPLib/drivers/dp12txss/examples/src/kc/dppt_vid_phy_config.c
void Dppt_Tx_SetRefClocks(u8 DPLinkRate_Value, u8 is_TX_CPLL)
{

//	XSpi SPI_LMK04906;  /* SPI Device Point*/
//	LMK04906_init(&SPI_LMK04906);
	PLL_init_Seting(&SPI_LMK04906);
//        // Programs LMK04960B - GTREFCLK0
	if (is_TX_CPLL == 1) {
		CLK135MHz_Out(&SPI_LMK04906, 0);
		xil_printf ("Programming fixed clock of 135Mhz..\r\n");
	} else {
		CLK162MHz_Out(&SPI_LMK04906, 0);
		xil_printf ("Programming fixed clock of 162Mhz..\r\n");
	}
}
//Board specific - Ref Clock settings
Board specific - Ref Clock settings
Board specific - Ref Clock settings
void Dppt_Tx_SetRefClocks(u8 DPLinkRate_Value, u8 is_TX_CPLL)
{
	PLL_init_Seting(&SPI_LMK04906);
	if (is_TX_CPLL == 1) {
		CLK135MHz_Out(&SPI_LMK04906, 0);
		xil_printf ("Programming fixed clock of 135Mhz..\r\n");
	} else {
		CLK162MHz_Out(&SPI_LMK04906, 0);
		xil_printf ("Programming fixed clock of 162Mhz..\r\n");
	}
}
void Dppt_Tx_SetRefClocks ( u8 DPLinkRate_Value , u8 is_TX_CPLL ) { PLL_init_Seting ( & SPI_LMK04906 ) ; if ( is_TX_CPLL == 1 ) { CLK135MHz_Out ( & SPI_LMK04906 , 0 ) ; xil_printf ( " \r \n " ) ; } else { CLK162MHz_Out ( & SPI_LMK04906 , 0 ) ; xil_printf ( " \r \n " ) ; } }
Board specific - Ref Clock settings
Board specific - Ref Clock settings
//	XSpi SPI_LMK04906;  /* SPI Device Point*/ //	LMK04906_init(&SPI_LMK04906); //        // Programs LMK04960B - GTREFCLK0