src/dpdk/drivers/net/igc/base/igc_nvm.c
void igc_stop_nvm(struct igc_hw *hw)
{
	u32 eecd;

	DEBUGFUNC("igc_stop_nvm");

	eecd = IGC_READ_REG(hw, IGC_EECD);
	if (hw->nvm.type == igc_nvm_eeprom_spi) {
		/* Pull CS high */
		eecd |= IGC_EECD_CS;
		igc_lower_eec_clk(hw, &eecd);
	} else if (hw->nvm.type == igc_nvm_eeprom_microwire) {
		/* CS on Microwire is active-high */
		eecd &= ~(IGC_EECD_CS | IGC_EECD_DI);
		IGC_WRITE_REG(hw, IGC_EECD, eecd);
		igc_raise_eec_clk(hw, &eecd);
		igc_lower_eec_clk(hw, &eecd);
	}
}
/**
 *  igc_stop_nvm - Terminate EEPROM command
 *  @hw: pointer to the HW structure
 *
 *  Terminates the current command by inverting the EEPROM's chip select pin.
 **/
Terminate EEPROM command
@hw: pointer to the HW structure

Terminates the current command by inverting the EEPROM's chip select pin.
Terminate EEPROM command @hw : pointer to the HW structure Terminates the current command by inverting the EEPROM ' s chip select pin .
void igc_stop_nvm(struct igc_hw *hw)
{
	u32 eecd;
	DEBUGFUNC("igc_stop_nvm");
	eecd = IGC_READ_REG(hw, IGC_EECD);
	if (hw->nvm.type == igc_nvm_eeprom_spi) {
		eecd |= IGC_EECD_CS;
		igc_lower_eec_clk(hw, &eecd);
	} else if (hw->nvm.type == igc_nvm_eeprom_microwire) {
		eecd &= ~(IGC_EECD_CS | IGC_EECD_DI);
		IGC_WRITE_REG(hw, IGC_EECD, eecd);
		igc_raise_eec_clk(hw, &eecd);
		igc_lower_eec_clk(hw, &eecd);
	}
}
void igc_stop_nvm ( struct igc_hw * hw ) { u32 eecd ; DEBUGFUNC ( " " ) ; eecd = IGC_READ_REG ( hw , IGC_EECD ) ; if ( hw -> nvm . type == igc_nvm_eeprom_spi ) { eecd |= IGC_EECD_CS ; igc_lower_eec_clk ( hw , & eecd ) ; } else if ( hw -> nvm . type == igc_nvm_eeprom_microwire ) { eecd &= ~ ( IGC_EECD_CS | IGC_EECD_DI ) ; IGC_WRITE_REG ( hw , IGC_EECD , eecd ) ; igc_raise_eec_clk ( hw , & eecd ) ; igc_lower_eec_clk ( hw , & eecd ) ; } }
igc_stop_nvm - Terminate EEPROM command
  @hw: pointer to the HW structure
igc_stop_nvm - Terminate EEPROM command @hw : pointer to the HW structure
/* Pull CS high */ /* CS on Microwire is active-high */