src/dpdk/drivers/net/mlx5/mlx5_trigger.c
int
mlx5_traffic_enable(struct rte_eth_dev *dev)
{
	struct mlx5_priv *priv = dev->data->dev_private;
	struct rte_flow_item_eth bcast = {
		.dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
	};
	struct rte_flow_item_eth ipv6_multi_spec = {
		.dst.addr_bytes = "\x33\x33\x00\x00\x00\x00",
	};
	struct rte_flow_item_eth ipv6_multi_mask = {
		.dst.addr_bytes = "\xff\xff\x00\x00\x00\x00",
	};
	struct rte_flow_item_eth unicast = {
		.src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
	};
	struct rte_flow_item_eth unicast_mask = {
		.dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
	};
	const unsigned int vlan_filter_n = priv->vlan_filter_n;
	const struct rte_ether_addr cmp = {
		.addr_bytes = "\x00\x00\x00\x00\x00\x00",
	};
	unsigned int i;
	unsigned int j;
	int ret;

	/*
	 * Hairpin txq default flow should be created no matter if it is
	 * isolation mode. Or else all the packets to be sent will be sent
	 * out directly without the TX flow actions, e.g. encapsulation.
	 */
	for (i = 0; i != priv->txqs_n; ++i) {
		struct mlx5_txq_ctrl *txq_ctrl = mlx5_txq_get(dev, i);
		if (!txq_ctrl)
			continue;
		/* Only Tx implicit mode requires the default Tx flow. */
		if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN &&
		    txq_ctrl->hairpin_conf.tx_explicit == 0 &&
		    txq_ctrl->hairpin_conf.peers[0].port ==
		    priv->dev_data->port_id) {
			ret = mlx5_ctrl_flow_source_queue(dev, i);
			if (ret) {
				mlx5_txq_release(dev, i);
				goto error;
			}
		}
		mlx5_txq_release(dev, i);
	}
	if (priv->config.dv_esw_en && !priv->config.vf) {
		if (mlx5_flow_create_esw_table_zero_flow(dev))
			priv->fdb_def_rule = 1;
		else
			DRV_LOG(INFO, "port %u FDB default rule cannot be"
				" configured - only Eswitch group 0 flows are"
				" supported.", dev->data->port_id);
	}
	if (!priv->config.lacp_by_user && priv->pf_bond >= 0) {
		ret = mlx5_flow_lacp_miss(dev);
		if (ret)
			DRV_LOG(INFO, "port %u LACP rule cannot be created - "
				"forward LACP to kernel.", dev->data->port_id);
		else
			DRV_LOG(INFO, "LACP traffic will be missed in port %u."
				, dev->data->port_id);
	}
	if (priv->isolated)
		return 0;
	if (dev->data->promiscuous) {
		struct rte_flow_item_eth promisc = {
			.dst.addr_bytes = "\x00\x00\x00\x00\x00\x00",
			.src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
			.type = 0,
		};

		ret = mlx5_ctrl_flow(dev, &promisc, &promisc);
		if (ret)
			goto error;
	}
	if (dev->data->all_multicast) {
		struct rte_flow_item_eth multicast = {
			.dst.addr_bytes = "\x01\x00\x00\x00\x00\x00",
			.src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
			.type = 0,
		};

		ret = mlx5_ctrl_flow(dev, &multicast, &multicast);
		if (ret)
			goto error;
	} else {
		/* Add broadcast/multicast flows. */
		for (i = 0; i != vlan_filter_n; ++i) {
			uint16_t vlan = priv->vlan_filter[i];

			struct rte_flow_item_vlan vlan_spec = {
				.tci = rte_cpu_to_be_16(vlan),
			};
			struct rte_flow_item_vlan vlan_mask =
				rte_flow_item_vlan_mask;

			ret = mlx5_ctrl_flow_vlan(dev, &bcast, &bcast,
						  &vlan_spec, &vlan_mask);
			if (ret)
				goto error;
			ret = mlx5_ctrl_flow_vlan(dev, &ipv6_multi_spec,
						  &ipv6_multi_mask,
						  &vlan_spec, &vlan_mask);
			if (ret)
				goto error;
		}
		if (!vlan_filter_n) {
			ret = mlx5_ctrl_flow(dev, &bcast, &bcast);
			if (ret)
				goto error;
			ret = mlx5_ctrl_flow(dev, &ipv6_multi_spec,
					     &ipv6_multi_mask);
			if (ret) {
				/* Do not fail on IPv6 broadcast creation failure. */
				DRV_LOG(WARNING,
					"IPv6 broadcast is not supported");
				ret = 0;
			}
		}
	}
	/* Add MAC address flows. */
	for (i = 0; i != MLX5_MAX_MAC_ADDRESSES; ++i) {
		struct rte_ether_addr *mac = &dev->data->mac_addrs[i];

		if (!memcmp(mac, &cmp, sizeof(*mac)))
			continue;
		memcpy(&unicast.dst.addr_bytes,
		       mac->addr_bytes,
		       RTE_ETHER_ADDR_LEN);
		for (j = 0; j != vlan_filter_n; ++j) {
			uint16_t vlan = priv->vlan_filter[j];

			struct rte_flow_item_vlan vlan_spec = {
				.tci = rte_cpu_to_be_16(vlan),
			};
			struct rte_flow_item_vlan vlan_mask =
				rte_flow_item_vlan_mask;

			ret = mlx5_ctrl_flow_vlan(dev, &unicast,
						  &unicast_mask,
						  &vlan_spec,
						  &vlan_mask);
			if (ret)
				goto error;
		}
		if (!vlan_filter_n) {
			ret = mlx5_ctrl_flow(dev, &unicast, &unicast_mask);
			if (ret)
				goto error;
		}
	}
	return 0;
error:
	ret = rte_errno; /* Save rte_errno before cleanup. */
	mlx5_flow_list_flush(dev, &priv->ctrl_flows, false);
	rte_errno = ret; /* Restore rte_errno. */
	return -rte_errno;
}
/**
 * Enable traffic flows configured by control plane
 *
 * @param dev
 *   Pointer to Ethernet device private data.
 * @param dev
 *   Pointer to Ethernet device structure.
 *
 * @return
 *   0 on success, a negative errno value otherwise and rte_errno is set.
 */
Enable traffic flows configured by control plane
@param dev
Pointer to Ethernet device private data.
@param dev
Pointer to Ethernet device structure.

@return
0 on success, a negative errno value otherwise and rte_errno is set.
Enable traffic flows configured by control plane @param dev Pointer to Ethernet device private data . @param dev Pointer to Ethernet device structure . @return 0 on success a negative errno value otherwise and rte_errno is set .
int
mlx5_traffic_enable(struct rte_eth_dev *dev)
{
	struct mlx5_priv *priv = dev->data->dev_private;
	struct rte_flow_item_eth bcast = {
		.dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
	};
	struct rte_flow_item_eth ipv6_multi_spec = {
		.dst.addr_bytes = "\x33\x33\x00\x00\x00\x00",
	};
	struct rte_flow_item_eth ipv6_multi_mask = {
		.dst.addr_bytes = "\xff\xff\x00\x00\x00\x00",
	};
	struct rte_flow_item_eth unicast = {
		.src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
	};
	struct rte_flow_item_eth unicast_mask = {
		.dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
	};
	const unsigned int vlan_filter_n = priv->vlan_filter_n;
	const struct rte_ether_addr cmp = {
		.addr_bytes = "\x00\x00\x00\x00\x00\x00",
	};
	unsigned int i;
	unsigned int j;
	int ret;
	for (i = 0; i != priv->txqs_n; ++i) {
		struct mlx5_txq_ctrl *txq_ctrl = mlx5_txq_get(dev, i);
		if (!txq_ctrl)
			continue;
		if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN &&
		    txq_ctrl->hairpin_conf.tx_explicit == 0 &&
		    txq_ctrl->hairpin_conf.peers[0].port ==
		    priv->dev_data->port_id) {
			ret = mlx5_ctrl_flow_source_queue(dev, i);
			if (ret) {
				mlx5_txq_release(dev, i);
				goto error;
			}
		}
		mlx5_txq_release(dev, i);
	}
	if (priv->config.dv_esw_en && !priv->config.vf) {
		if (mlx5_flow_create_esw_table_zero_flow(dev))
			priv->fdb_def_rule = 1;
		else
			DRV_LOG(INFO, "port %u FDB default rule cannot be"
				" configured - only Eswitch group 0 flows are"
				" supported.", dev->data->port_id);
	}
	if (!priv->config.lacp_by_user && priv->pf_bond >= 0) {
		ret = mlx5_flow_lacp_miss(dev);
		if (ret)
			DRV_LOG(INFO, "port %u LACP rule cannot be created - "
				"forward LACP to kernel.", dev->data->port_id);
		else
			DRV_LOG(INFO, "LACP traffic will be missed in port %u."
				, dev->data->port_id);
	}
	if (priv->isolated)
		return 0;
	if (dev->data->promiscuous) {
		struct rte_flow_item_eth promisc = {
			.dst.addr_bytes = "\x00\x00\x00\x00\x00\x00",
			.src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
			.type = 0,
		};
		ret = mlx5_ctrl_flow(dev, &promisc, &promisc);
		if (ret)
			goto error;
	}
	if (dev->data->all_multicast) {
		struct rte_flow_item_eth multicast = {
			.dst.addr_bytes = "\x01\x00\x00\x00\x00\x00",
			.src.addr_bytes = "\x00\x00\x00\x00\x00\x00",
			.type = 0,
		};
		ret = mlx5_ctrl_flow(dev, &multicast, &multicast);
		if (ret)
			goto error;
	} else {
		for (i = 0; i != vlan_filter_n; ++i) {
			uint16_t vlan = priv->vlan_filter[i];
			struct rte_flow_item_vlan vlan_spec = {
				.tci = rte_cpu_to_be_16(vlan),
			};
			struct rte_flow_item_vlan vlan_mask =
				rte_flow_item_vlan_mask;
			ret = mlx5_ctrl_flow_vlan(dev, &bcast, &bcast,
						  &vlan_spec, &vlan_mask);
			if (ret)
				goto error;
			ret = mlx5_ctrl_flow_vlan(dev, &ipv6_multi_spec,
						  &ipv6_multi_mask,
						  &vlan_spec, &vlan_mask);
			if (ret)
				goto error;
		}
		if (!vlan_filter_n) {
			ret = mlx5_ctrl_flow(dev, &bcast, &bcast);
			if (ret)
				goto error;
			ret = mlx5_ctrl_flow(dev, &ipv6_multi_spec,
					     &ipv6_multi_mask);
			if (ret) {
				DRV_LOG(WARNING,
					"IPv6 broadcast is not supported");
				ret = 0;
			}
		}
	}
	for (i = 0; i != MLX5_MAX_MAC_ADDRESSES; ++i) {
		struct rte_ether_addr *mac = &dev->data->mac_addrs[i];
		if (!memcmp(mac, &cmp, sizeof(*mac)))
			continue;
		memcpy(&unicast.dst.addr_bytes,
		       mac->addr_bytes,
		       RTE_ETHER_ADDR_LEN);
		for (j = 0; j != vlan_filter_n; ++j) {
			uint16_t vlan = priv->vlan_filter[j];
			struct rte_flow_item_vlan vlan_spec = {
				.tci = rte_cpu_to_be_16(vlan),
			};
			struct rte_flow_item_vlan vlan_mask =
				rte_flow_item_vlan_mask;
			ret = mlx5_ctrl_flow_vlan(dev, &unicast,
						  &unicast_mask,
						  &vlan_spec,
						  &vlan_mask);
			if (ret)
				goto error;
		}
		if (!vlan_filter_n) {
			ret = mlx5_ctrl_flow(dev, &unicast, &unicast_mask);
			if (ret)
				goto error;
		}
	}
	return 0;
error:
	ret = rte_errno; 
	mlx5_flow_list_flush(dev, &priv->ctrl_flows, false);
	rte_errno = ret; 
	return -rte_errno;
}
int mlx5_traffic_enable ( struct rte_eth_dev * dev ) { struct mlx5_priv * priv = dev -> data -> dev_private ; struct rte_flow_item_eth bcast = { . dst . addr_bytes = " \xff \xff \xff \xff \xff \xff " , } ; struct rte_flow_item_eth ipv6_multi_spec = { . dst . addr_bytes = " \x33 \x33 \x00 \x00 \x00 \x00 " , } ; struct rte_flow_item_eth ipv6_multi_mask = { . dst . addr_bytes = " \xff \xff \x00 \x00 \x00 \x00 " , } ; struct rte_flow_item_eth unicast = { . src . addr_bytes = " \x00 \x00 \x00 \x00 \x00 \x00 " , } ; struct rte_flow_item_eth unicast_mask = { . dst . addr_bytes = " \xff \xff \xff \xff \xff \xff " , } ; const unsigned int vlan_filter_n = priv -> vlan_filter_n ; const struct rte_ether_addr cmp = { . addr_bytes = " \x00 \x00 \x00 \x00 \x00 \x00 " , } ; unsigned int i ; unsigned int j ; int ret ; for ( i = 0 ; i != priv -> txqs_n ; ++ i ) { struct mlx5_txq_ctrl * txq_ctrl = mlx5_txq_get ( dev , i ) ; if ( ! txq_ctrl ) continue ; if ( txq_ctrl -> type == MLX5_TXQ_TYPE_HAIRPIN && txq_ctrl -> hairpin_conf . tx_explicit == 0 && txq_ctrl -> hairpin_conf . peers [ 0 ] . port == priv -> dev_data -> port_id ) { ret = mlx5_ctrl_flow_source_queue ( dev , i ) ; if ( ret ) { mlx5_txq_release ( dev , i ) ; goto error ; } } mlx5_txq_release ( dev , i ) ; } if ( priv -> config . dv_esw_en && ! priv -> config . vf ) { if ( mlx5_flow_create_esw_table_zero_flow ( dev ) ) priv -> fdb_def_rule = 1 ; else DRV_LOG ( INFO , " " " " " " , dev -> data -> port_id ) ; } if ( ! priv -> config . lacp_by_user && priv -> pf_bond >= 0 ) { ret = mlx5_flow_lacp_miss ( dev ) ; if ( ret ) DRV_LOG ( INFO , " " " " , dev -> data -> port_id ) ; else DRV_LOG ( INFO , " " , dev -> data -> port_id ) ; } if ( priv -> isolated ) return 0 ; if ( dev -> data -> promiscuous ) { struct rte_flow_item_eth promisc = { . dst . addr_bytes = " \x00 \x00 \x00 \x00 \x00 \x00 " , . src . addr_bytes = " \x00 \x00 \x00 \x00 \x00 \x00 " , . type = 0 , } ; ret = mlx5_ctrl_flow ( dev , & promisc , & promisc ) ; if ( ret ) goto error ; } if ( dev -> data -> all_multicast ) { struct rte_flow_item_eth multicast = { . dst . addr_bytes = " \x01 \x00 \x00 \x00 \x00 \x00 " , . src . addr_bytes = " \x00 \x00 \x00 \x00 \x00 \x00 " , . type = 0 , } ; ret = mlx5_ctrl_flow ( dev , & multicast , & multicast ) ; if ( ret ) goto error ; } else { for ( i = 0 ; i != vlan_filter_n ; ++ i ) { uint16_t vlan = priv -> vlan_filter [ i ] ; struct rte_flow_item_vlan vlan_spec = { . tci = rte_cpu_to_be_16 ( vlan ) , } ; struct rte_flow_item_vlan vlan_mask = rte_flow_item_vlan_mask ; ret = mlx5_ctrl_flow_vlan ( dev , & bcast , & bcast , & vlan_spec , & vlan_mask ) ; if ( ret ) goto error ; ret = mlx5_ctrl_flow_vlan ( dev , & ipv6_multi_spec , & ipv6_multi_mask , & vlan_spec , & vlan_mask ) ; if ( ret ) goto error ; } if ( ! vlan_filter_n ) { ret = mlx5_ctrl_flow ( dev , & bcast , & bcast ) ; if ( ret ) goto error ; ret = mlx5_ctrl_flow ( dev , & ipv6_multi_spec , & ipv6_multi_mask ) ; if ( ret ) { DRV_LOG ( WARNING , " " ) ; ret = 0 ; } } } for ( i = 0 ; i != MLX5_MAX_MAC_ADDRESSES ; ++ i ) { struct rte_ether_addr * mac = & dev -> data -> mac_addrs [ i ] ; if ( ! memcmp ( mac , & cmp , sizeof ( * mac ) ) ) continue ; memcpy ( & unicast . dst . addr_bytes , mac -> addr_bytes , RTE_ETHER_ADDR_LEN ) ; for ( j = 0 ; j != vlan_filter_n ; ++ j ) { uint16_t vlan = priv -> vlan_filter [ j ] ; struct rte_flow_item_vlan vlan_spec = { . tci = rte_cpu_to_be_16 ( vlan ) , } ; struct rte_flow_item_vlan vlan_mask = rte_flow_item_vlan_mask ; ret = mlx5_ctrl_flow_vlan ( dev , & unicast , & unicast_mask , & vlan_spec , & vlan_mask ) ; if ( ret ) goto error ; } if ( ! vlan_filter_n ) { ret = mlx5_ctrl_flow ( dev , & unicast , & unicast_mask ) ; if ( ret ) goto error ; } } return 0 ; error : ret = rte_errno ; mlx5_flow_list_flush ( dev , & priv -> ctrl_flows , false ) ; rte_errno = ret ; return - rte_errno ; }
Enable traffic flows configured by control plane
 @param dev
   Pointer to Ethernet device private data.
Enable traffic flows configured by control plane @param dev Pointer to Ethernet device private data .
/*
	 * Hairpin txq default flow should be created no matter if it is
	 * isolation mode. Or else all the packets to be sent will be sent
	 * out directly without the TX flow actions, e.g. encapsulation.
	 */ /* Only Tx implicit mode requires the default Tx flow. */ /* Add broadcast/multicast flows. */ /* Do not fail on IPv6 broadcast creation failure. */ /* Add MAC address flows. */ /* Save rte_errno before cleanup. */ /* Restore rte_errno. */