XilinxProcessorIPLib/drivers/dsitxss/examples/xdsitxss_video_test_example.c
s32 WaitForCompletion(s32 VdmaChannel, u32 *VdmaBaseAddr)
{
    if (VdmaChannel == VDMA_MM2S) {
	while (!(*Mm2sStatusReg & 0x1)) {
		xdbg_printf(XDBG_DEBUG_GENERAL,"Waiting for MM2S to halt ..."
			"MM2S SR = 0x%x\r\n", *Mm2sStatusReg);
	}
	if ((*Mm2sStatusReg & 0x1)) {
		xdbg_printf(XDBG_DEBUG_GENERAL," MM2S_HALT_SUCCESS \r\n");
		return MM2S_HALT_SUCCESS;
	}else {
		xil_printf(" returning MM2S_HALT_FAILURE \r\n");
		return MM2S_HALT_FAILURE;
		}
    }
    else if (VdmaChannel == VDMA_S2MM) {
	xdbg_printf(XDBG_DEBUG_GENERAL," Poll on s2mm status register\r\n");
	while (!(*S2mmStatusReg & 0x1)) {
		xdbg_printf(XDBG_DEBUG_GENERAL," Waiting for S2MM to halt ..."
				"S2MM SR = 0x%x\r\n", *S2mmStatusReg);
	}
	if((*S2mmStatusReg & 0x1)) {
		xdbg_printf(XDBG_DEBUG_GENERAL," MM2S_HALT_SUCCESS \r\n");
		return S2MM_HALT_SUCCESS;
	}
	else {
		xil_printf(" returning S2MM_HALT_FAILURE \r\n");
		return S2MM_HALT_FAILURE;
	}
    }
	return XST_FAILURE;
}
/*****************************************************************************/
/**
*
* This function wait until the DMA channel halts
*
* @param	VdmaChannel specifes VdmaChannel is MM2S or S2MM
*.@param	VdmaBaseAddr VDMA base address
*
* @return
*		MM2S_HALT_SUCCESS, S2MM_HALT_SUCCESS in success
*		MM2S_HALT_FAILURE, S2MM_HALT_FAILURE on failure
*
* @note		None.
*
******************************************************************************/
This function wait until the DMA channel halts
@param VdmaChannel specifes VdmaChannel is MM2S or S2MM
.@param VdmaBaseAddr VDMA base address



@note          None.
This function wait until the DMA channel halts @param VdmaChannel specifes VdmaChannel is MM2S or S2MM . @param VdmaBaseAddr VDMA base address @note None .
s32 WaitForCompletion(s32 VdmaChannel, u32 *VdmaBaseAddr)
{
    if (VdmaChannel == VDMA_MM2S) {
	while (!(*Mm2sStatusReg & 0x1)) {
		xdbg_printf(XDBG_DEBUG_GENERAL,"Waiting for MM2S to halt ..."
			"MM2S SR = 0x%x\r\n", *Mm2sStatusReg);
	}
	if ((*Mm2sStatusReg & 0x1)) {
		xdbg_printf(XDBG_DEBUG_GENERAL," MM2S_HALT_SUCCESS \r\n");
		return MM2S_HALT_SUCCESS;
	}else {
		xil_printf(" returning MM2S_HALT_FAILURE \r\n");
		return MM2S_HALT_FAILURE;
		}
    }
    else if (VdmaChannel == VDMA_S2MM) {
	xdbg_printf(XDBG_DEBUG_GENERAL," Poll on s2mm status register\r\n");
	while (!(*S2mmStatusReg & 0x1)) {
		xdbg_printf(XDBG_DEBUG_GENERAL," Waiting for S2MM to halt ..."
				"S2MM SR = 0x%x\r\n", *S2mmStatusReg);
	}
	if((*S2mmStatusReg & 0x1)) {
		xdbg_printf(XDBG_DEBUG_GENERAL," MM2S_HALT_SUCCESS \r\n");
		return S2MM_HALT_SUCCESS;
	}
	else {
		xil_printf(" returning S2MM_HALT_FAILURE \r\n");
		return S2MM_HALT_FAILURE;
	}
    }
	return XST_FAILURE;
}
s32 WaitForCompletion ( s32 VdmaChannel , u32 * VdmaBaseAddr ) { if ( VdmaChannel == VDMA_MM2S ) { while ( ! ( * Mm2sStatusReg & 0x1 ) ) { xdbg_printf ( XDBG_DEBUG_GENERAL , " " " \r \n " , * Mm2sStatusReg ) ; } if ( ( * Mm2sStatusReg & 0x1 ) ) { xdbg_printf ( XDBG_DEBUG_GENERAL , " \r \n " ) ; return MM2S_HALT_SUCCESS ; } else { xil_printf ( " \r \n " ) ; return MM2S_HALT_FAILURE ; } } else if ( VdmaChannel == VDMA_S2MM ) { xdbg_printf ( XDBG_DEBUG_GENERAL , " \r \n " ) ; while ( ! ( * S2mmStatusReg & 0x1 ) ) { xdbg_printf ( XDBG_DEBUG_GENERAL , " " " \r \n " , * S2mmStatusReg ) ; } if ( ( * S2mmStatusReg & 0x1 ) ) { xdbg_printf ( XDBG_DEBUG_GENERAL , " \r \n " ) ; return S2MM_HALT_SUCCESS ; } else { xil_printf ( " \r \n " ) ; return S2MM_HALT_FAILURE ; } } return XST_FAILURE ; }
This function wait until the DMA channel halts
@param VdmaChannel specifes VdmaChannel is MM2S or S2MM
.
This function wait until the DMA channel halts @param VdmaChannel specifes VdmaChannel is MM2S or S2MM .