lib/bsp/standalone/src/microblaze/xil_misc_psreset_api.c
void XSmc_ResetHw(u32 BaseAddress)
{
	u32 RegVal;

	/* Clear the interuupts */
	RegVal = Xil_In32(BaseAddress + XSMC_MEMC_CLR_CONFIG_OFFSET);
	RegVal |= XSMC_MEMC_CLR_CONFIG_MASK;
	Xil_Out32(BaseAddress + XSMC_MEMC_CLR_CONFIG_OFFSET, RegVal);
	/* Clear the idle counter registers */
	Xil_Out32(BaseAddress + XSMC_REFRESH_PERIOD_0_OFFSET, 0x0U);
	Xil_Out32(BaseAddress + XSMC_REFRESH_PERIOD_1_OFFSET, 0x0U);
	/* Update the ecc registers with reset values */
	Xil_Out32(BaseAddress + XSMC_ECC_MEMCFG1_OFFSET,
							XSMC_ECC_MEMCFG1_RESET_VAL);
	Xil_Out32(BaseAddress + XSMC_ECC_MEMCMD1_OFFSET,
							XSMC_ECC_MEMCMD1_RESET_VAL);
	Xil_Out32(BaseAddress + XSMC_ECC_MEMCMD2_OFFSET,
							XSMC_ECC_MEMCMD2_RESET_VAL);

}
/*****************************************************************************/
/**
* This function contains the implementation for SMC reset sequence
*
* @param   BaseAddress of the interface
*
* @return   N/A.
*
******************************************************************************/
This function contains the implementation for SMC reset sequence
This function contains the implementation for SMC reset sequence
void XSmc_ResetHw(u32 BaseAddress)
{
	u32 RegVal;
	RegVal = Xil_In32(BaseAddress + XSMC_MEMC_CLR_CONFIG_OFFSET);
	RegVal |= XSMC_MEMC_CLR_CONFIG_MASK;
	Xil_Out32(BaseAddress + XSMC_MEMC_CLR_CONFIG_OFFSET, RegVal);
	Xil_Out32(BaseAddress + XSMC_REFRESH_PERIOD_0_OFFSET, 0x0U);
	Xil_Out32(BaseAddress + XSMC_REFRESH_PERIOD_1_OFFSET, 0x0U);
	Xil_Out32(BaseAddress + XSMC_ECC_MEMCFG1_OFFSET,
							XSMC_ECC_MEMCFG1_RESET_VAL);
	Xil_Out32(BaseAddress + XSMC_ECC_MEMCMD1_OFFSET,
							XSMC_ECC_MEMCMD1_RESET_VAL);
	Xil_Out32(BaseAddress + XSMC_ECC_MEMCMD2_OFFSET,
							XSMC_ECC_MEMCMD2_RESET_VAL);
}
void XSmc_ResetHw ( u32 BaseAddress ) { u32 RegVal ; RegVal = Xil_In32 ( BaseAddress + XSMC_MEMC_CLR_CONFIG_OFFSET ) ; RegVal |= XSMC_MEMC_CLR_CONFIG_MASK ; Xil_Out32 ( BaseAddress + XSMC_MEMC_CLR_CONFIG_OFFSET , RegVal ) ; Xil_Out32 ( BaseAddress + XSMC_REFRESH_PERIOD_0_OFFSET , 0x0U ) ; Xil_Out32 ( BaseAddress + XSMC_REFRESH_PERIOD_1_OFFSET , 0x0U ) ; Xil_Out32 ( BaseAddress + XSMC_ECC_MEMCFG1_OFFSET , XSMC_ECC_MEMCFG1_RESET_VAL ) ; Xil_Out32 ( BaseAddress + XSMC_ECC_MEMCMD1_OFFSET , XSMC_ECC_MEMCMD1_RESET_VAL ) ; Xil_Out32 ( BaseAddress + XSMC_ECC_MEMCMD2_OFFSET , XSMC_ECC_MEMCMD2_RESET_VAL ) ; }
This function contains the implementation for SMC reset sequence
This function contains the implementation for SMC reset sequence
/* Clear the interuupts */ /* Clear the idle counter registers */ /* Update the ecc registers with reset values */