XilinxProcessorIPLib/drivers/v_hdmiphy1/src/xhdmiphy1_hdmi_intr.c
void XHdmiphy1_HdmiIntrHandlerCallbackInit(XHdmiphy1 *InstancePtr)
{
    /* GT Interrupts */
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_TXRESET_DONE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);

    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_RXRESET_DONE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);

#if (XPAR_HDMIPHY1_0_TRANSCEIVER != XHDMIPHY1_GTYE5)
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_CPLL_LOCK,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);

    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_QPLL_LOCK,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);

    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_TXALIGN_DONE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);

    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_QPLL1_LOCK,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);
#else
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_LCPLL_LOCK,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);

    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_RPLL_LOCK,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);
    XHdmiphy1_SetIntrHandler(InstancePtr,
		XHDMIPHY1_INTR_HANDLER_TYPE_TX_GPO_RISING_EDGE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);

    XHdmiphy1_SetIntrHandler(InstancePtr,
		XHDMIPHY1_INTR_HANDLER_TYPE_RX_GPO_RISING_EDGE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);
#endif

    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_TX_MMCM_LOCK_CHANGE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);

    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_RX_MMCM_LOCK_CHANGE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);

    /* Clock Detector Interrupts */
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_TX_CLKDET_FREQ_CHANGE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_ClkDetHandler, InstancePtr);

    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_RX_CLKDET_FREQ_CHANGE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_ClkDetHandler, InstancePtr);

    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_TX_TMR_TIMEOUT,
            (XHdmiphy1_IntrHandler)XHdmiphy1_ClkDetHandler, InstancePtr);

    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_RX_TMR_TIMEOUT,
            (XHdmiphy1_IntrHandler)XHdmiphy1_ClkDetHandler, InstancePtr);
}
/*****************************************************************************/
/**
* This function sets the appropriate HDMI interupt handlers.
*
* @param    InstancePtr is a pointer to the HDMIPHY instance.
*
* @return   None.
*
* @note     None.
*
******************************************************************************/
This function sets the appropriate HDMI interupt handlers.
This function sets the appropriate HDMI interupt handlers .
void XHdmiphy1_HdmiIntrHandlerCallbackInit(XHdmiphy1 *InstancePtr)
{
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_TXRESET_DONE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_RXRESET_DONE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);
#if (XPAR_HDMIPHY1_0_TRANSCEIVER != XHDMIPHY1_GTYE5)
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_CPLL_LOCK,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_QPLL_LOCK,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_TXALIGN_DONE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_QPLL1_LOCK,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);
#else
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_LCPLL_LOCK,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_RPLL_LOCK,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);
    XHdmiphy1_SetIntrHandler(InstancePtr,
		XHDMIPHY1_INTR_HANDLER_TYPE_TX_GPO_RISING_EDGE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);
    XHdmiphy1_SetIntrHandler(InstancePtr,
		XHDMIPHY1_INTR_HANDLER_TYPE_RX_GPO_RISING_EDGE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);
#endif
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_TX_MMCM_LOCK_CHANGE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_RX_MMCM_LOCK_CHANGE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_HdmiGtHandler, InstancePtr);
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_TX_CLKDET_FREQ_CHANGE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_ClkDetHandler, InstancePtr);
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_RX_CLKDET_FREQ_CHANGE,
            (XHdmiphy1_IntrHandler)XHdmiphy1_ClkDetHandler, InstancePtr);
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_TX_TMR_TIMEOUT,
            (XHdmiphy1_IntrHandler)XHdmiphy1_ClkDetHandler, InstancePtr);
    XHdmiphy1_SetIntrHandler(InstancePtr,
            XHDMIPHY1_INTR_HANDLER_TYPE_RX_TMR_TIMEOUT,
            (XHdmiphy1_IntrHandler)XHdmiphy1_ClkDetHandler, InstancePtr);
}
void XHdmiphy1_HdmiIntrHandlerCallbackInit ( XHdmiphy1 * InstancePtr ) { XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_TXRESET_DONE , ( XHdmiphy1_IntrHandler ) XHdmiphy1_HdmiGtHandler , InstancePtr ) ; XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_RXRESET_DONE , ( XHdmiphy1_IntrHandler ) XHdmiphy1_HdmiGtHandler , InstancePtr ) ; #if ( XPAR_HDMIPHY1_0_TRANSCEIVER != XHDMIPHY1_GTYE5 ) XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_CPLL_LOCK , ( XHdmiphy1_IntrHandler ) XHdmiphy1_HdmiGtHandler , InstancePtr ) ; XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_QPLL_LOCK , ( XHdmiphy1_IntrHandler ) XHdmiphy1_HdmiGtHandler , InstancePtr ) ; XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_TXALIGN_DONE , ( XHdmiphy1_IntrHandler ) XHdmiphy1_HdmiGtHandler , InstancePtr ) ; XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_QPLL1_LOCK , ( XHdmiphy1_IntrHandler ) XHdmiphy1_HdmiGtHandler , InstancePtr ) ; #else XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_LCPLL_LOCK , ( XHdmiphy1_IntrHandler ) XHdmiphy1_HdmiGtHandler , InstancePtr ) ; XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_RPLL_LOCK , ( XHdmiphy1_IntrHandler ) XHdmiphy1_HdmiGtHandler , InstancePtr ) ; XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_TX_GPO_RISING_EDGE , ( XHdmiphy1_IntrHandler ) XHdmiphy1_HdmiGtHandler , InstancePtr ) ; XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_RX_GPO_RISING_EDGE , ( XHdmiphy1_IntrHandler ) XHdmiphy1_HdmiGtHandler , InstancePtr ) ; #endif XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_TX_MMCM_LOCK_CHANGE , ( XHdmiphy1_IntrHandler ) XHdmiphy1_HdmiGtHandler , InstancePtr ) ; XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_RX_MMCM_LOCK_CHANGE , ( XHdmiphy1_IntrHandler ) XHdmiphy1_HdmiGtHandler , InstancePtr ) ; XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_TX_CLKDET_FREQ_CHANGE , ( XHdmiphy1_IntrHandler ) XHdmiphy1_ClkDetHandler , InstancePtr ) ; XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_RX_CLKDET_FREQ_CHANGE , ( XHdmiphy1_IntrHandler ) XHdmiphy1_ClkDetHandler , InstancePtr ) ; XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_TX_TMR_TIMEOUT , ( XHdmiphy1_IntrHandler ) XHdmiphy1_ClkDetHandler , InstancePtr ) ; XHdmiphy1_SetIntrHandler ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_RX_TMR_TIMEOUT , ( XHdmiphy1_IntrHandler ) XHdmiphy1_ClkDetHandler , InstancePtr ) ; }
This function sets the appropriate HDMI interupt handlers.
This function sets the appropriate HDMI interupt handlers .
/* GT Interrupts */ /* Clock Detector Interrupts */