XilinxProcessorIPLib/drivers/v_hdmiphy1/src/xhdmiphy1_hdmi.c
u32 XHdmiphy1_Hdmi20Config(XHdmiphy1 *InstancePtr, u8 QuadId,
		XHdmiphy1_DirectionType Dir)
{
	XHdmiphy1_PllType PllType;
	u32 Status = XST_SUCCESS;

	/* Suppress Warning Messages */
    QuadId = QuadId;

	XHdmiphy1_LogWrite(InstancePtr, XHDMIPHY1_LOG_EVT_TMDS_RECONFIG, Dir);

	/* Determine PLL type. */
	PllType = XHdmiphy1_GetPllType(InstancePtr, 0, Dir,
                XHDMIPHY1_CHANNEL_ID_CH1);

	/* Update HDMI Configurations */
	if (Dir == XHDMIPHY1_DIR_TX) {
		InstancePtr->TxHdmi21Cfg.LineRate = 0;
		InstancePtr->TxHdmi21Cfg.NChannels = 0;
		InstancePtr->TxHdmi21Cfg.IsEnabled = FALSE;
	} else {
		InstancePtr->RxHdmi21Cfg.LineRate = 0;
		InstancePtr->RxHdmi21Cfg.NChannels = 0;
		InstancePtr->RxHdmi21Cfg.IsEnabled = FALSE;
	}

	XHdmiphy1_MmcmSetClkinsel(InstancePtr, QuadId, Dir,
			XHDMIPHY1_MMCM_CLKINSEL_CLKIN1);

	/* Disable Clock Detector Interrupts */
	if (Dir == XHDMIPHY1_DIR_TX) {
		XHdmiphy1_IntrEnable(InstancePtr,
				XHDMIPHY1_INTR_HANDLER_TYPE_TX_CLKDET_FREQ_CHANGE);
	} else {
		XHdmiphy1_IntrEnable(InstancePtr,
				XHDMIPHY1_INTR_HANDLER_TYPE_RX_CLKDET_FREQ_CHANGE);
	}

#if (XPAR_HDMIPHY1_0_TRANSCEIVER != XHDMIPHY1_GTYE5)
	/* Update reference clock election. */
	XHdmiphy1_CfgPllRefClkSel(InstancePtr, 0,
		((PllType == XHDMIPHY1_PLL_TYPE_CPLL) ?
			XHDMIPHY1_CHANNEL_ID_CHA : XHDMIPHY1_CHANNEL_ID_CMNA),
		((Dir == XHDMIPHY1_DIR_TX) ?
			InstancePtr->Config.TxRefClkSel :
			InstancePtr->Config.RxRefClkSel));

	/* Update RefClk selection. */
	XHdmiphy1_WriteCfgRefClkSelReg(InstancePtr, 0);
#else
	/* Suppress Warning Messages */
	PllType = PllType;
#endif

	return Status;
}
/*****************************************************************************/
/**
* This function will configure the HDMIPHY to HDMI 2.0 mode
*
* @param	InstancePtr is a pointer to the Hdmiphy core instance.
* @param	QuadId is the GT quad ID to operate on.
* @param	ChId is the channel ID to operate on.
* @param	Dir is an indicator for RX or TX.
*
* @return
*		- XST_SUCCESS if TX parameters set/updated.
*		- XST_FAILURE if low resolution video not supported.
*
* @note		None.
*
******************************************************************************/
This function will configure the HDMIPHY to HDMI 2.0 mode
This function will configure the HDMIPHY to HDMI 2 . 0 mode
u32 XHdmiphy1_Hdmi20Config(XHdmiphy1 *InstancePtr, u8 QuadId,
		XHdmiphy1_DirectionType Dir)
{
	XHdmiphy1_PllType PllType;
	u32 Status = XST_SUCCESS;
    QuadId = QuadId;
	XHdmiphy1_LogWrite(InstancePtr, XHDMIPHY1_LOG_EVT_TMDS_RECONFIG, Dir);
	PllType = XHdmiphy1_GetPllType(InstancePtr, 0, Dir,
                XHDMIPHY1_CHANNEL_ID_CH1);
	if (Dir == XHDMIPHY1_DIR_TX) {
		InstancePtr->TxHdmi21Cfg.LineRate = 0;
		InstancePtr->TxHdmi21Cfg.NChannels = 0;
		InstancePtr->TxHdmi21Cfg.IsEnabled = FALSE;
	} else {
		InstancePtr->RxHdmi21Cfg.LineRate = 0;
		InstancePtr->RxHdmi21Cfg.NChannels = 0;
		InstancePtr->RxHdmi21Cfg.IsEnabled = FALSE;
	}
	XHdmiphy1_MmcmSetClkinsel(InstancePtr, QuadId, Dir,
			XHDMIPHY1_MMCM_CLKINSEL_CLKIN1);
	if (Dir == XHDMIPHY1_DIR_TX) {
		XHdmiphy1_IntrEnable(InstancePtr,
				XHDMIPHY1_INTR_HANDLER_TYPE_TX_CLKDET_FREQ_CHANGE);
	} else {
		XHdmiphy1_IntrEnable(InstancePtr,
				XHDMIPHY1_INTR_HANDLER_TYPE_RX_CLKDET_FREQ_CHANGE);
	}
#if (XPAR_HDMIPHY1_0_TRANSCEIVER != XHDMIPHY1_GTYE5)
	XHdmiphy1_CfgPllRefClkSel(InstancePtr, 0,
		((PllType == XHDMIPHY1_PLL_TYPE_CPLL) ?
			XHDMIPHY1_CHANNEL_ID_CHA : XHDMIPHY1_CHANNEL_ID_CMNA),
		((Dir == XHDMIPHY1_DIR_TX) ?
			InstancePtr->Config.TxRefClkSel :
			InstancePtr->Config.RxRefClkSel));
	XHdmiphy1_WriteCfgRefClkSelReg(InstancePtr, 0);
#else
	PllType = PllType;
#endif
	return Status;
}
u32 XHdmiphy1_Hdmi20Config ( XHdmiphy1 * InstancePtr , u8 QuadId , XHdmiphy1_DirectionType Dir ) { XHdmiphy1_PllType PllType ; u32 Status = XST_SUCCESS ; QuadId = QuadId ; XHdmiphy1_LogWrite ( InstancePtr , XHDMIPHY1_LOG_EVT_TMDS_RECONFIG , Dir ) ; PllType = XHdmiphy1_GetPllType ( InstancePtr , 0 , Dir , XHDMIPHY1_CHANNEL_ID_CH1 ) ; if ( Dir == XHDMIPHY1_DIR_TX ) { InstancePtr -> TxHdmi21Cfg . LineRate = 0 ; InstancePtr -> TxHdmi21Cfg . NChannels = 0 ; InstancePtr -> TxHdmi21Cfg . IsEnabled = FALSE ; } else { InstancePtr -> RxHdmi21Cfg . LineRate = 0 ; InstancePtr -> RxHdmi21Cfg . NChannels = 0 ; InstancePtr -> RxHdmi21Cfg . IsEnabled = FALSE ; } XHdmiphy1_MmcmSetClkinsel ( InstancePtr , QuadId , Dir , XHDMIPHY1_MMCM_CLKINSEL_CLKIN1 ) ; if ( Dir == XHDMIPHY1_DIR_TX ) { XHdmiphy1_IntrEnable ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_TX_CLKDET_FREQ_CHANGE ) ; } else { XHdmiphy1_IntrEnable ( InstancePtr , XHDMIPHY1_INTR_HANDLER_TYPE_RX_CLKDET_FREQ_CHANGE ) ; } #if ( XPAR_HDMIPHY1_0_TRANSCEIVER != XHDMIPHY1_GTYE5 ) XHdmiphy1_CfgPllRefClkSel ( InstancePtr , 0 , ( ( PllType == XHDMIPHY1_PLL_TYPE_CPLL ) ? XHDMIPHY1_CHANNEL_ID_CHA : XHDMIPHY1_CHANNEL_ID_CMNA ) , ( ( Dir == XHDMIPHY1_DIR_TX ) ? InstancePtr -> Config . TxRefClkSel : InstancePtr -> Config . RxRefClkSel ) ) ; XHdmiphy1_WriteCfgRefClkSelReg ( InstancePtr , 0 ) ; #else PllType = PllType ; #endif return Status ; }
This function will configure the HDMIPHY to HDMI 2.0 mode
This function will configure the HDMIPHY to HDMI 2 . 0 mode
/* Suppress Warning Messages */ /* Determine PLL type. */ /* Update HDMI Configurations */ /* Disable Clock Detector Interrupts */ /* Update reference clock election. */ /* Update RefClk selection. */ /* Suppress Warning Messages */