module/cdns_i2c/src/mod_cdns_i2c.c
static int i2c_master_read_polled(
    fwk_id_t device_id,
    uint16_t address,
    char *data,
    uint16_t length)
{
    bool complete = false;
    unsigned int timeout;
    struct cdns_i2c_dev_ctx *device_ctx;

    fwk_assert(length != 0);

    device_ctx = &i2c_ctx.device_ctx_table[fwk_id_get_element_idx(device_id)];

    I2C_REG_RMW(
        device_ctx->reg->CR, I2C_CR_HOLD_MASK, I2C_CR_HOLD_SHIFT, I2C_HOLD_ON);

    I2C_REG_RMW(
        device_ctx->reg->CR, I2C_CR_RW_MASK, I2C_CR_RW_SHIFT, I2C_RW_READ);

    if (!device_ctx->perform_repeat_start) {
        I2C_REG_RMW(
            device_ctx->reg->CR,
            I2C_CR_CLRFIFO_MASK,
            I2C_CR_CLRFIFO_SHIFT,
            I2C_CLRFIFO_ON);
    }

    clear_isr(device_ctx);

    /* Set the expected number of bytes to be received */
    I2C_REG_RMW(
        device_ctx->reg->TSR, I2C_TSR_SIZE_MASK, I2C_TSR_SIZE_SHIFT, length);

    I2C_REG_RMW(
        device_ctx->reg->AR, I2C_AR_ADD7_MASK, I2C_AR_ADD7_SHIFT, address);

    /* Wait for transfer completion */
    timeout = I2C_TRANSFER_TIMEOUT;
    while (!complete && (timeout != 0)) {
        if (I2C_REG_R(
                device_ctx->reg->SR, I2C_SR_RXDV_MASK, I2C_SR_RXDV_SHIFT)) {
            if (I2C_REG_R(
                    device_ctx->reg->ISR,
                    I2C_ISR_COMP_MASK,
                    I2C_ISR_COMP_SHIFT)) {
                complete = true;
            }
        }
        timeout--;
    }

    if (timeout == 0) {
        I2C_REG_RMW(
            device_ctx->reg->CR,
            I2C_CR_HOLD_MASK,
            I2C_CR_HOLD_SHIFT,
            I2C_HOLD_OFF);
        return FWK_E_STATE;
    }

    timeout = I2C_TRANSFER_TIMEOUT;
    while ((length != 0) && (timeout != 0)) {
        if (I2C_REG_R(
                device_ctx->reg->SR, I2C_SR_RXDV_MASK, I2C_SR_RXDV_SHIFT)) {
            *data++ = I2C_REG_R(
                device_ctx->reg->DR, I2C_DR_DATA_MASK, I2C_DR_DATA_SHIFT);
            length--;
        }
        timeout--;
    }

    clear_isr(device_ctx);

    /* Clear the hold bit to signify the end of the read sequence */
    I2C_REG_RMW(
        device_ctx->reg->CR, I2C_CR_HOLD_MASK, I2C_CR_HOLD_SHIFT, I2C_HOLD_OFF);

    clear_isr(device_ctx);

    device_ctx->perform_repeat_start = false;

    return FWK_SUCCESS;
}
/*
 * I2C master polled mode driver API
 */
I2C master polled mode driver API
I2C master polled mode driver API
static int i2c_master_read_polled(
    fwk_id_t device_id,
    uint16_t address,
    char *data,
    uint16_t length)
{
    bool complete = false;
    unsigned int timeout;
    struct cdns_i2c_dev_ctx *device_ctx;
    fwk_assert(length != 0);
    device_ctx = &i2c_ctx.device_ctx_table[fwk_id_get_element_idx(device_id)];
    I2C_REG_RMW(
        device_ctx->reg->CR, I2C_CR_HOLD_MASK, I2C_CR_HOLD_SHIFT, I2C_HOLD_ON);
    I2C_REG_RMW(
        device_ctx->reg->CR, I2C_CR_RW_MASK, I2C_CR_RW_SHIFT, I2C_RW_READ);
    if (!device_ctx->perform_repeat_start) {
        I2C_REG_RMW(
            device_ctx->reg->CR,
            I2C_CR_CLRFIFO_MASK,
            I2C_CR_CLRFIFO_SHIFT,
            I2C_CLRFIFO_ON);
    }
    clear_isr(device_ctx);
    I2C_REG_RMW(
        device_ctx->reg->TSR, I2C_TSR_SIZE_MASK, I2C_TSR_SIZE_SHIFT, length);
    I2C_REG_RMW(
        device_ctx->reg->AR, I2C_AR_ADD7_MASK, I2C_AR_ADD7_SHIFT, address);
    timeout = I2C_TRANSFER_TIMEOUT;
    while (!complete && (timeout != 0)) {
        if (I2C_REG_R(
                device_ctx->reg->SR, I2C_SR_RXDV_MASK, I2C_SR_RXDV_SHIFT)) {
            if (I2C_REG_R(
                    device_ctx->reg->ISR,
                    I2C_ISR_COMP_MASK,
                    I2C_ISR_COMP_SHIFT)) {
                complete = true;
            }
        }
        timeout--;
    }
    if (timeout == 0) {
        I2C_REG_RMW(
            device_ctx->reg->CR,
            I2C_CR_HOLD_MASK,
            I2C_CR_HOLD_SHIFT,
            I2C_HOLD_OFF);
        return FWK_E_STATE;
    }
    timeout = I2C_TRANSFER_TIMEOUT;
    while ((length != 0) && (timeout != 0)) {
        if (I2C_REG_R(
                device_ctx->reg->SR, I2C_SR_RXDV_MASK, I2C_SR_RXDV_SHIFT)) {
            *data++ = I2C_REG_R(
                device_ctx->reg->DR, I2C_DR_DATA_MASK, I2C_DR_DATA_SHIFT);
            length--;
        }
        timeout--;
    }
    clear_isr(device_ctx);
    I2C_REG_RMW(
        device_ctx->reg->CR, I2C_CR_HOLD_MASK, I2C_CR_HOLD_SHIFT, I2C_HOLD_OFF);
    clear_isr(device_ctx);
    device_ctx->perform_repeat_start = false;
    return FWK_SUCCESS;
}
static int i2c_master_read_polled ( fwk_id_t device_id , uint16_t address , char * data , uint16_t length ) { bool complete = false ; unsigned int timeout ; struct cdns_i2c_dev_ctx * device_ctx ; fwk_assert ( length != 0 ) ; device_ctx = & i2c_ctx . device_ctx_table [ fwk_id_get_element_idx ( device_id ) ] ; I2C_REG_RMW ( device_ctx -> reg -> CR , I2C_CR_HOLD_MASK , I2C_CR_HOLD_SHIFT , I2C_HOLD_ON ) ; I2C_REG_RMW ( device_ctx -> reg -> CR , I2C_CR_RW_MASK , I2C_CR_RW_SHIFT , I2C_RW_READ ) ; if ( ! device_ctx -> perform_repeat_start ) { I2C_REG_RMW ( device_ctx -> reg -> CR , I2C_CR_CLRFIFO_MASK , I2C_CR_CLRFIFO_SHIFT , I2C_CLRFIFO_ON ) ; } clear_isr ( device_ctx ) ; I2C_REG_RMW ( device_ctx -> reg -> TSR , I2C_TSR_SIZE_MASK , I2C_TSR_SIZE_SHIFT , length ) ; I2C_REG_RMW ( device_ctx -> reg -> AR , I2C_AR_ADD7_MASK , I2C_AR_ADD7_SHIFT , address ) ; timeout = I2C_TRANSFER_TIMEOUT ; while ( ! complete && ( timeout != 0 ) ) { if ( I2C_REG_R ( device_ctx -> reg -> SR , I2C_SR_RXDV_MASK , I2C_SR_RXDV_SHIFT ) ) { if ( I2C_REG_R ( device_ctx -> reg -> ISR , I2C_ISR_COMP_MASK , I2C_ISR_COMP_SHIFT ) ) { complete = true ; } } timeout -- ; } if ( timeout == 0 ) { I2C_REG_RMW ( device_ctx -> reg -> CR , I2C_CR_HOLD_MASK , I2C_CR_HOLD_SHIFT , I2C_HOLD_OFF ) ; return FWK_E_STATE ; } timeout = I2C_TRANSFER_TIMEOUT ; while ( ( length != 0 ) && ( timeout != 0 ) ) { if ( I2C_REG_R ( device_ctx -> reg -> SR , I2C_SR_RXDV_MASK , I2C_SR_RXDV_SHIFT ) ) { * data ++ = I2C_REG_R ( device_ctx -> reg -> DR , I2C_DR_DATA_MASK , I2C_DR_DATA_SHIFT ) ; length -- ; } timeout -- ; } clear_isr ( device_ctx ) ; I2C_REG_RMW ( device_ctx -> reg -> CR , I2C_CR_HOLD_MASK , I2C_CR_HOLD_SHIFT , I2C_HOLD_OFF ) ; clear_isr ( device_ctx ) ; device_ctx -> perform_repeat_start = false ; return FWK_SUCCESS ; }
I2C master polled mode driver API
I2C master polled mode driver API
/* Set the expected number of bytes to be received */ /* Wait for transfer completion */ /* Clear the hold bit to signify the end of the read sequence */