lib/sw_services/xilloader/src/xloader.c
static void XLoader_A72Config(u32 CpuId, u32 ExecState, u32 VInitHi)
{
	u32 RegVal = Xil_In32(XLOADER_FPD_APU_CONFIG_0);
	u32 ExecMask = 0U;
	u32 VInitHiMask = 0U;

	switch(CpuId)
	{
		case XIH_PH_ATTRB_DSTN_CPU_A72_0:
			ExecMask = XLOADER_FPD_APU_CONFIG_0_AA64N32_MASK_CPU0;
			VInitHiMask = XLOADER_FPD_APU_CONFIG_0_VINITHI_MASK_CPU0;
			break;
		case XIH_PH_ATTRB_DSTN_CPU_A72_1:
			ExecMask = XLOADER_FPD_APU_CONFIG_0_AA64N32_MASK_CPU1;
			VInitHiMask = XLOADER_FPD_APU_CONFIG_0_VINITHI_MASK_CPU1;
			break;
		default:
			break;
	}
	/* Set Aarch state 64 Vs 32 bit and vection location for 32 bit */
	if (ExecState == XIH_PH_ATTRB_A72_EXEC_ST_AA64) {
		RegVal |= ExecMask;
	}
	else {
		RegVal &= ~(ExecMask);
		if (VInitHi == XIH_PH_ATTRB_HIVEC_MASK) {
			RegVal |= VInitHiMask;
		}
		else {
			RegVal &= ~(VInitHiMask);
		}
	}
	/* Update the APU configuration */
	XPlmi_Out32(XLOADER_FPD_APU_CONFIG_0, RegVal);
}
/*****************************************************************************/
/**
 * @brief	This function sets Aarch state and vector location for APU.
 *
 * @param	CpuId CPU ID
 * @param	ExecState CPU execution state
 * @param	VInitHi resembles highvec configuration for CPU
 *
 * @return	None
 *
 *****************************************************************************/
@brief       This function sets Aarch state and vector location for APU.

@return      None
@brief This function sets Aarch state and vector location for APU . @return None
static void XLoader_A72Config(u32 CpuId, u32 ExecState, u32 VInitHi)
{
	u32 RegVal = Xil_In32(XLOADER_FPD_APU_CONFIG_0);
	u32 ExecMask = 0U;
	u32 VInitHiMask = 0U;
	switch(CpuId)
	{
		case XIH_PH_ATTRB_DSTN_CPU_A72_0:
			ExecMask = XLOADER_FPD_APU_CONFIG_0_AA64N32_MASK_CPU0;
			VInitHiMask = XLOADER_FPD_APU_CONFIG_0_VINITHI_MASK_CPU0;
			break;
		case XIH_PH_ATTRB_DSTN_CPU_A72_1:
			ExecMask = XLOADER_FPD_APU_CONFIG_0_AA64N32_MASK_CPU1;
			VInitHiMask = XLOADER_FPD_APU_CONFIG_0_VINITHI_MASK_CPU1;
			break;
		default:
			break;
	}
	if (ExecState == XIH_PH_ATTRB_A72_EXEC_ST_AA64) {
		RegVal |= ExecMask;
	}
	else {
		RegVal &= ~(ExecMask);
		if (VInitHi == XIH_PH_ATTRB_HIVEC_MASK) {
			RegVal |= VInitHiMask;
		}
		else {
			RegVal &= ~(VInitHiMask);
		}
	}
	XPlmi_Out32(XLOADER_FPD_APU_CONFIG_0, RegVal);
}
static void XLoader_A72Config ( u32 CpuId , u32 ExecState , u32 VInitHi ) { u32 RegVal = Xil_In32 ( XLOADER_FPD_APU_CONFIG_0 ) ; u32 ExecMask = 0U ; u32 VInitHiMask = 0U ; switch ( CpuId ) { case XIH_PH_ATTRB_DSTN_CPU_A72_0 : ExecMask = XLOADER_FPD_APU_CONFIG_0_AA64N32_MASK_CPU0 ; VInitHiMask = XLOADER_FPD_APU_CONFIG_0_VINITHI_MASK_CPU0 ; break ; case XIH_PH_ATTRB_DSTN_CPU_A72_1 : ExecMask = XLOADER_FPD_APU_CONFIG_0_AA64N32_MASK_CPU1 ; VInitHiMask = XLOADER_FPD_APU_CONFIG_0_VINITHI_MASK_CPU1 ; break ; default : break ; } if ( ExecState == XIH_PH_ATTRB_A72_EXEC_ST_AA64 ) { RegVal |= ExecMask ; } else { RegVal &= ~ ( ExecMask ) ; if ( VInitHi == XIH_PH_ATTRB_HIVEC_MASK ) { RegVal |= VInitHiMask ; } else { RegVal &= ~ ( VInitHiMask ) ; } } XPlmi_Out32 ( XLOADER_FPD_APU_CONFIG_0 , RegVal ) ; }
@brief       This function sets Aarch state and vector location for APU.
@brief This function sets Aarch state and vector location for APU .
/* Set Aarch state 64 Vs 32 bit and vection location for 32 bit */ /* Update the APU configuration */