XilinxProcessorIPLib/drivers/v_hdmitxss/examples/xhdmi_example/xhdmi_hdcp_keys.c
int XHdcp_KeyManagerInit(u32 BaseAddress, u8 *Hdcp14Key)
{
	u32 RegValue;
	u8 Row;
	u8 i;
	u8 *KeyPtr;
	u8 Status;

	/* Assign key pointer */
	KeyPtr = Hdcp14Key;

	/* Reset */
	XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x0c, (1<<31));

	// There are 41 rows
	for (Row=0; Row<41; Row++)
	{
		/* Set write enable */
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x20, 1);

		/* High data */
		RegValue = 0;
		for (i=0; i<4; i++)
		{
			RegValue <<= 8;
			RegValue |= *KeyPtr;
			KeyPtr++;
		}

		/* Write high data */
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x2c, RegValue);

		/* Low data */
		RegValue = 0;
		for (i=0; i<4; i++)
		{
			RegValue <<= 8;
			RegValue |= *KeyPtr;
			KeyPtr++;
		}

		/* Write low data */
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x30, RegValue);

		/* Table / Row Address */
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x28, Row);

		// Write in progress
		do
		{
			RegValue = XHdcp_KeyMgmtBlk_ReadReg(BaseAddress, 0x24);
			RegValue &= 1;
		} while (RegValue != 0);
	}

	// Verify

	/* Re-Assign key pointer */
	KeyPtr = Hdcp14Key;

	/* Default Status */
	Status = XST_SUCCESS;

	/* Start at row 0 */
	Row = 0;

	do
	{
		/* Set read enable */
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x20, (1<<1));

		/* Table / Row Address */
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x28, Row);

		// Read in progress
		do
		{
			RegValue = XHdcp_KeyMgmtBlk_ReadReg(BaseAddress, 0x24);
			RegValue &= 1;
		} while (RegValue != 0);

		/* High data */
		RegValue = 0;
		for (i=0; i<4; i++)
		{
			RegValue <<= 8;
			RegValue |= *KeyPtr;
			KeyPtr++;
		}

		if (RegValue != XHdcp_KeyMgmtBlk_ReadReg(BaseAddress, 0x2c))
			Status = XST_FAILURE;

		/* Low data */
		RegValue = 0;
		for (i=0; i<4; i++)
		{
			RegValue <<= 8;
			RegValue |= *KeyPtr;
			KeyPtr++;
		}

		if (RegValue != XHdcp_KeyMgmtBlk_ReadReg(BaseAddress, 0x30))
			Status = XST_FAILURE;

		/* Increment row */
		Row++;

	} while ((Row<41) && (Status == XST_SUCCESS));

	if (Status == XST_SUCCESS)
	{
		/* Set read lockout */
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x20, (1<<31));

		/* Start AXI-Stream */
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x0c, (1));
	}

	return Status;
}
/*****************************************************************************/
/**
 *
 * This function initialize the HDCP 1.4 key manager
 *
 *
 * @return
 *  - XST_SUCCESS if action was successful
 *  - XST_FAILURE if action was not successful
 *
 ******************************************************************************/
This function initialize the HDCP 1.4 key manager
@return
- XST_SUCCESS if action was successful
- XST_FAILURE if action was not successful
This function initialize the HDCP 1 . 4 key manager @return - XST_SUCCESS if action was successful - XST_FAILURE if action was not successful
int XHdcp_KeyManagerInit(u32 BaseAddress, u8 *Hdcp14Key)
{
	u32 RegValue;
	u8 Row;
	u8 i;
	u8 *KeyPtr;
	u8 Status;
	KeyPtr = Hdcp14Key;
	XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x0c, (1<<31));
	for (Row=0; Row<41; Row++)
	{
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x20, 1);
		RegValue = 0;
		for (i=0; i<4; i++)
		{
			RegValue <<= 8;
			RegValue |= *KeyPtr;
			KeyPtr++;
		}
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x2c, RegValue);
		RegValue = 0;
		for (i=0; i<4; i++)
		{
			RegValue <<= 8;
			RegValue |= *KeyPtr;
			KeyPtr++;
		}
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x30, RegValue);
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x28, Row);
		do
		{
			RegValue = XHdcp_KeyMgmtBlk_ReadReg(BaseAddress, 0x24);
			RegValue &= 1;
		} while (RegValue != 0);
	}
	KeyPtr = Hdcp14Key;
	Status = XST_SUCCESS;
	Row = 0;
	do
	{
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x20, (1<<1));
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x28, Row);
		do
		{
			RegValue = XHdcp_KeyMgmtBlk_ReadReg(BaseAddress, 0x24);
			RegValue &= 1;
		} while (RegValue != 0);
		RegValue = 0;
		for (i=0; i<4; i++)
		{
			RegValue <<= 8;
			RegValue |= *KeyPtr;
			KeyPtr++;
		}
		if (RegValue != XHdcp_KeyMgmtBlk_ReadReg(BaseAddress, 0x2c))
			Status = XST_FAILURE;
		RegValue = 0;
		for (i=0; i<4; i++)
		{
			RegValue <<= 8;
			RegValue |= *KeyPtr;
			KeyPtr++;
		}
		if (RegValue != XHdcp_KeyMgmtBlk_ReadReg(BaseAddress, 0x30))
			Status = XST_FAILURE;
		Row++;
	} while ((Row<41) && (Status == XST_SUCCESS));
	if (Status == XST_SUCCESS)
	{
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x20, (1<<31));
		XHdcp_KeyMgmtBlk_WriteReg(BaseAddress, 0x0c, (1));
	}
	return Status;
}
int XHdcp_KeyManagerInit ( u32 BaseAddress , u8 * Hdcp14Key ) { u32 RegValue ; u8 Row ; u8 i ; u8 * KeyPtr ; u8 Status ; KeyPtr = Hdcp14Key ; XHdcp_KeyMgmtBlk_WriteReg ( BaseAddress , 0x0c , ( 1 << 31 ) ) ; for ( Row = 0 ; Row < 41 ; Row ++ ) { XHdcp_KeyMgmtBlk_WriteReg ( BaseAddress , 0x20 , 1 ) ; RegValue = 0 ; for ( i = 0 ; i < 4 ; i ++ ) { RegValue <<= 8 ; RegValue |= * KeyPtr ; KeyPtr ++ ; } XHdcp_KeyMgmtBlk_WriteReg ( BaseAddress , 0x2c , RegValue ) ; RegValue = 0 ; for ( i = 0 ; i < 4 ; i ++ ) { RegValue <<= 8 ; RegValue |= * KeyPtr ; KeyPtr ++ ; } XHdcp_KeyMgmtBlk_WriteReg ( BaseAddress , 0x30 , RegValue ) ; XHdcp_KeyMgmtBlk_WriteReg ( BaseAddress , 0x28 , Row ) ; do { RegValue = XHdcp_KeyMgmtBlk_ReadReg ( BaseAddress , 0x24 ) ; RegValue &= 1 ; } while ( RegValue != 0 ) ; } KeyPtr = Hdcp14Key ; Status = XST_SUCCESS ; Row = 0 ; do { XHdcp_KeyMgmtBlk_WriteReg ( BaseAddress , 0x20 , ( 1 << 1 ) ) ; XHdcp_KeyMgmtBlk_WriteReg ( BaseAddress , 0x28 , Row ) ; do { RegValue = XHdcp_KeyMgmtBlk_ReadReg ( BaseAddress , 0x24 ) ; RegValue &= 1 ; } while ( RegValue != 0 ) ; RegValue = 0 ; for ( i = 0 ; i < 4 ; i ++ ) { RegValue <<= 8 ; RegValue |= * KeyPtr ; KeyPtr ++ ; } if ( RegValue != XHdcp_KeyMgmtBlk_ReadReg ( BaseAddress , 0x2c ) ) Status = XST_FAILURE ; RegValue = 0 ; for ( i = 0 ; i < 4 ; i ++ ) { RegValue <<= 8 ; RegValue |= * KeyPtr ; KeyPtr ++ ; } if ( RegValue != XHdcp_KeyMgmtBlk_ReadReg ( BaseAddress , 0x30 ) ) Status = XST_FAILURE ; Row ++ ; } while ( ( Row < 41 ) && ( Status == XST_SUCCESS ) ) ; if ( Status == XST_SUCCESS ) { XHdcp_KeyMgmtBlk_WriteReg ( BaseAddress , 0x20 , ( 1 << 31 ) ) ; XHdcp_KeyMgmtBlk_WriteReg ( BaseAddress , 0x0c , ( 1 ) ) ; } return Status ; }
This function initialize the HDCP 1.4 key manager
 @return
  - XST_SUCCESS if action was successful
  - XST_FAILURE if action was not successful
This function initialize the HDCP 1 . 4 key manager @return - XST_SUCCESS if action was successful - XST_FAILURE if action was not successful
/* Assign key pointer */ /* Reset */ // There are 41 rows /* Set write enable */ /* High data */ /* Write high data */ /* Low data */ /* Write low data */ /* Table / Row Address */ // Write in progress // Verify /* Re-Assign key pointer */ /* Default Status */ /* Start at row 0 */ /* Set read enable */ /* Table / Row Address */ // Read in progress /* High data */ /* Low data */ /* Increment row */ /* Set read lockout */ /* Start AXI-Stream */