src/system_mt7687.c
void cmnPLL1OFF_PLL2OFF(void)
{
    volatile uint32_t reg;
    volatile uint32_t *pTopCfgCM4PWRCtl = (volatile uint32_t *)TOP_CFG_CM4_PWR_CTL_CR;

    reg = cmnReadRegister32(pTopCfgCM4PWRCtl);
    reg = reg & ~(CM4_MPLL_EN_MASK << CM4_MPLL_EN_SHIFT);
    reg = reg & ~(CM4_NEED_RESTORE_MASK <<  CM4_NEED_RESTORE_SHIFT);    // avoid W1C
    reg = reg | (CM4_MPLL_EN_PLL1_OFF_PLL2_OFF << CM4_MPLL_EN_SHIFT);
    cmnWriteRegister32(pTopCfgCM4PWRCtl, reg);

    reg = cmnReadRegister32(pTopCfgCM4PWRCtl);
    reg = reg & ~(CM4_MCU_960_EN_MASK << CM4_MCU_960_EN_SHIFT);
    reg = reg & ~(CM4_NEED_RESTORE_MASK <<  CM4_NEED_RESTORE_SHIFT);    // avoid W1C
    reg = reg | (CM4_MCU_960_EN_DISABLE << CM4_MCU_960_EN_SHIFT);
    cmnWriteRegister32(pTopCfgCM4PWRCtl, reg);

    return;
}
/**
  * @brief  This function is to disable both PPL1 and PLL2.
  * @param  None
  * @retval None
  */
@brief  This function is to disable both PPL1 and PLL2.
@param  None
@retval None
@brief This function is to disable both PPL1 and PLL2 . @param None @retval None
void cmnPLL1OFF_PLL2OFF(void)
{
    volatile uint32_t reg;
    volatile uint32_t *pTopCfgCM4PWRCtl = (volatile uint32_t *)TOP_CFG_CM4_PWR_CTL_CR;
    reg = cmnReadRegister32(pTopCfgCM4PWRCtl);
    reg = reg & ~(CM4_MPLL_EN_MASK << CM4_MPLL_EN_SHIFT);
    reg = reg & ~(CM4_NEED_RESTORE_MASK <<  CM4_NEED_RESTORE_SHIFT);    
    reg = reg | (CM4_MPLL_EN_PLL1_OFF_PLL2_OFF << CM4_MPLL_EN_SHIFT);
    cmnWriteRegister32(pTopCfgCM4PWRCtl, reg);
    reg = cmnReadRegister32(pTopCfgCM4PWRCtl);
    reg = reg & ~(CM4_MCU_960_EN_MASK << CM4_MCU_960_EN_SHIFT);
    reg = reg & ~(CM4_NEED_RESTORE_MASK <<  CM4_NEED_RESTORE_SHIFT);    
    reg = reg | (CM4_MCU_960_EN_DISABLE << CM4_MCU_960_EN_SHIFT);
    cmnWriteRegister32(pTopCfgCM4PWRCtl, reg);
    return;
}
void cmnPLL1OFF_PLL2OFF ( void ) { volatile uint32_t reg ; volatile uint32_t * pTopCfgCM4PWRCtl = ( volatile uint32_t * ) TOP_CFG_CM4_PWR_CTL_CR ; reg = cmnReadRegister32 ( pTopCfgCM4PWRCtl ) ; reg = reg & ~ ( CM4_MPLL_EN_MASK << CM4_MPLL_EN_SHIFT ) ; reg = reg & ~ ( CM4_NEED_RESTORE_MASK << CM4_NEED_RESTORE_SHIFT ) ; reg = reg | ( CM4_MPLL_EN_PLL1_OFF_PLL2_OFF << CM4_MPLL_EN_SHIFT ) ; cmnWriteRegister32 ( pTopCfgCM4PWRCtl , reg ) ; reg = cmnReadRegister32 ( pTopCfgCM4PWRCtl ) ; reg = reg & ~ ( CM4_MCU_960_EN_MASK << CM4_MCU_960_EN_SHIFT ) ; reg = reg & ~ ( CM4_NEED_RESTORE_MASK << CM4_NEED_RESTORE_SHIFT ) ; reg = reg | ( CM4_MCU_960_EN_DISABLE << CM4_MCU_960_EN_SHIFT ) ; cmnWriteRegister32 ( pTopCfgCM4PWRCtl , reg ) ; return ; }
@brief  This function is to disable both PPL1 and PLL2.
@brief This function is to disable both PPL1 and PLL2 .
// avoid W1C // avoid W1C