XilinxProcessorIPLib/drivers/v_hdmiphy1/src/xhdmiphy1_hdmi_intr.c
void XHdmiphy1_ClkDetHandler(XHdmiphy1 *InstancePtr)
{
    u32 Event;
    u32 EventMask;
    u32 EventAck;

    EventMask = XHDMIPHY1_INTR_TXCLKDETFREQCHANGE_MASK |
                XHDMIPHY1_INTR_RXCLKDETFREQCHANGE_MASK |
                XHDMIPHY1_INTR_TXTMRTIMEOUT_MASK |
                XHDMIPHY1_INTR_RXTMRTIMEOUT_MASK;

    /* Read Interrupt Status register */
    Event = XHdmiphy1_ReadReg(InstancePtr->Config.BaseAddr,
                XHDMIPHY1_INTR_STS_REG);

    EventAck = EventMask & Event;

    if (Event & XHDMIPHY1_INTR_TXCLKDETFREQCHANGE_MASK) {
        XHdmiphy1_HdmiTxClkDetFreqChangeHandler(InstancePtr);
    }
    if (Event & XHDMIPHY1_INTR_RXCLKDETFREQCHANGE_MASK) {
        XHdmiphy1_HdmiRxClkDetFreqChangeHandler(InstancePtr);
    }
    if (Event & XHDMIPHY1_INTR_TXTMRTIMEOUT_MASK) {
        XHdmiphy1_HdmiTxTimerTimeoutHandler(InstancePtr);
    }
    if (Event & XHDMIPHY1_INTR_RXTMRTIMEOUT_MASK) {
        XHdmiphy1_HdmiRxTimerTimeoutHandler(InstancePtr);
    }

    /* Clear event flags by writing to Interrupt Status register */
    XHdmiphy1_WriteReg(InstancePtr->Config.BaseAddr, XHDMIPHY1_INTR_STS_REG,
            EventAck);
}
/*****************************************************************************/
/**
* This function is the interrupt handler for the clock detector events.
*
* @param    InstancePtr is a pointer to the HDMIPHY instance.
*
* @return   None.
*
* @note     None.
*
******************************************************************************/
This function is the interrupt handler for the clock detector events.
This function is the interrupt handler for the clock detector events .
void XHdmiphy1_ClkDetHandler(XHdmiphy1 *InstancePtr)
{
    u32 Event;
    u32 EventMask;
    u32 EventAck;
    EventMask = XHDMIPHY1_INTR_TXCLKDETFREQCHANGE_MASK |
                XHDMIPHY1_INTR_RXCLKDETFREQCHANGE_MASK |
                XHDMIPHY1_INTR_TXTMRTIMEOUT_MASK |
                XHDMIPHY1_INTR_RXTMRTIMEOUT_MASK;
    Event = XHdmiphy1_ReadReg(InstancePtr->Config.BaseAddr,
                XHDMIPHY1_INTR_STS_REG);
    EventAck = EventMask & Event;
    if (Event & XHDMIPHY1_INTR_TXCLKDETFREQCHANGE_MASK) {
        XHdmiphy1_HdmiTxClkDetFreqChangeHandler(InstancePtr);
    }
    if (Event & XHDMIPHY1_INTR_RXCLKDETFREQCHANGE_MASK) {
        XHdmiphy1_HdmiRxClkDetFreqChangeHandler(InstancePtr);
    }
    if (Event & XHDMIPHY1_INTR_TXTMRTIMEOUT_MASK) {
        XHdmiphy1_HdmiTxTimerTimeoutHandler(InstancePtr);
    }
    if (Event & XHDMIPHY1_INTR_RXTMRTIMEOUT_MASK) {
        XHdmiphy1_HdmiRxTimerTimeoutHandler(InstancePtr);
    }
    XHdmiphy1_WriteReg(InstancePtr->Config.BaseAddr, XHDMIPHY1_INTR_STS_REG,
            EventAck);
}
void XHdmiphy1_ClkDetHandler ( XHdmiphy1 * InstancePtr ) { u32 Event ; u32 EventMask ; u32 EventAck ; EventMask = XHDMIPHY1_INTR_TXCLKDETFREQCHANGE_MASK | XHDMIPHY1_INTR_RXCLKDETFREQCHANGE_MASK | XHDMIPHY1_INTR_TXTMRTIMEOUT_MASK | XHDMIPHY1_INTR_RXTMRTIMEOUT_MASK ; Event = XHdmiphy1_ReadReg ( InstancePtr -> Config . BaseAddr , XHDMIPHY1_INTR_STS_REG ) ; EventAck = EventMask & Event ; if ( Event & XHDMIPHY1_INTR_TXCLKDETFREQCHANGE_MASK ) { XHdmiphy1_HdmiTxClkDetFreqChangeHandler ( InstancePtr ) ; } if ( Event & XHDMIPHY1_INTR_RXCLKDETFREQCHANGE_MASK ) { XHdmiphy1_HdmiRxClkDetFreqChangeHandler ( InstancePtr ) ; } if ( Event & XHDMIPHY1_INTR_TXTMRTIMEOUT_MASK ) { XHdmiphy1_HdmiTxTimerTimeoutHandler ( InstancePtr ) ; } if ( Event & XHDMIPHY1_INTR_RXTMRTIMEOUT_MASK ) { XHdmiphy1_HdmiRxTimerTimeoutHandler ( InstancePtr ) ; } XHdmiphy1_WriteReg ( InstancePtr -> Config . BaseAddr , XHDMIPHY1_INTR_STS_REG , EventAck ) ; }
This function is the interrupt handler for the clock detector events.
This function is the interrupt handler for the clock detector events .
/* Read Interrupt Status register */ /* Clear event flags by writing to Interrupt Status register */