XilinxProcessorIPLib/drivers/v_hdmitx1/src/xv_hdmitx1_frl.c
void XV_HdmiTx1_SetFrlTimer(XV_HdmiTx1 *InstancePtr, u32 Milliseconds)
{
	u32 ClockCycles;

	if (Milliseconds > 0) {
		ClockCycles = InstancePtr->Config.AxiLiteClkFreq /
				(1000 / Milliseconds);
	} else {
		ClockCycles = 0;
	}
	XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress,
			(XV_HDMITX1_FRL_TMR_OFFSET),
			(ClockCycles));
}
/*****************************************************************************/
/**
*
* This function sets the timer of TX Core's FRL peripheral.
*
* @param	InstancePtr is a pointer to the XHdmi_Tx core instance.
*
* @param	Value specifies the timer's frequency (in milliseconds)
*
* @return	None.
*
* @note		None.
*
******************************************************************************/
This function sets the timer of TX Core's FRL peripheral.
This function sets the timer of TX Core ' s FRL peripheral .
void XV_HdmiTx1_SetFrlTimer(XV_HdmiTx1 *InstancePtr, u32 Milliseconds)
{
	u32 ClockCycles;
	if (Milliseconds > 0) {
		ClockCycles = InstancePtr->Config.AxiLiteClkFreq /
				(1000 / Milliseconds);
	} else {
		ClockCycles = 0;
	}
	XV_HdmiTx1_WriteReg((InstancePtr)->Config.BaseAddress,
			(XV_HDMITX1_FRL_TMR_OFFSET),
			(ClockCycles));
}
void XV_HdmiTx1_SetFrlTimer ( XV_HdmiTx1 * InstancePtr , u32 Milliseconds ) { u32 ClockCycles ; if ( Milliseconds > 0 ) { ClockCycles = InstancePtr -> Config . AxiLiteClkFreq / ( 1000 / Milliseconds ) ; } else { ClockCycles = 0 ; } XV_HdmiTx1_WriteReg ( ( InstancePtr ) -> Config . BaseAddress , ( XV_HDMITX1_FRL_TMR_OFFSET ) , ( ClockCycles ) ) ; }
This function sets the timer of TX Core's FRL peripheral.
This function sets the timer of TX Core ' s FRL peripheral .