src/dpdk/drivers/net/i40e/i40e_ethdev.c
static void
i40e_hw_init(struct rte_eth_dev *dev)
{
	struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);

	i40e_enable_extended_tag(dev);

	/* clear the PF Queue Filter control register */
	i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, 0);

	/* Disable symmetric hash per port */
	i40e_set_symmetric_hash_enable_per_port(hw, 0);
}
/*
 * As some registers wouldn't be reset unless a global hardware reset,
 * hardware initialization is needed to put those registers into an
 * expected initial state.
 */
As some registers wouldn't be reset unless a global hardware reset,
hardware initialization is needed to put those registers into an
expected initial state.
As some registers wouldn ' t be reset unless a global hardware reset hardware initialization is needed to put those registers into an expected initial state .
static void
i40e_hw_init(struct rte_eth_dev *dev)
{
	struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
	i40e_enable_extended_tag(dev);
	i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, 0);
	i40e_set_symmetric_hash_enable_per_port(hw, 0);
}
static void i40e_hw_init ( struct rte_eth_dev * dev ) { struct i40e_hw * hw = I40E_DEV_PRIVATE_TO_HW ( dev -> data -> dev_private ) ; i40e_enable_extended_tag ( dev ) ; i40e_write_rx_ctl ( hw , I40E_PFQF_CTL_0 , 0 ) ; i40e_set_symmetric_hash_enable_per_port ( hw , 0 ) ; }
As some registers wouldn't be reset unless a global hardware reset,
 hardware initialization is needed to put those registers into an
 expected initial state.
As some registers wouldn ' t be reset unless a global hardware reset hardware initialization is needed to put those registers into an expected initial state .
/* clear the PF Queue Filter control register */ /* Disable symmetric hash per port */