asf/sam/drivers/pwm/pwm.c
static uint32_t pwm_clocks_generate(uint32_t ul_frequency, uint32_t ul_mck)
{
	uint32_t ul_divisors[PWM_CLOCK_PRE_MAX] =
			{1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024 };
	uint32_t ul_pre = 0;
	uint32_t ul_div;

	/* Find prescaler and divisor values */
	do {
		ul_div = (ul_mck / ul_divisors[ul_pre]) / ul_frequency;
		if (ul_div <= PWM_CLOCK_DIV_MAX) {
			break;
		}
		ul_pre++;
	} while (ul_pre < PWM_CLOCK_PRE_MAX);

	/* Return result */
	if (ul_pre < PWM_CLOCK_PRE_MAX) {
		return ul_div | (ul_pre << 8);
	} else {
		return PWM_INVALID_ARGUMENT;
	}
}
/**
 * \brief Find a prescaler/divisor couple to generate the desired ul_frequency
 * from ul_mck.
 *
 * \param ul_frequency Desired frequency in Hz.
 * \param ul_mck Master clock frequency in Hz.
 *
 * \retval Return the value to be set in the PWM Clock Register (PWM Mode Register for
 * SAM3N/SAM4N/SAM4C/SAM4CP/SAM4CM) or PWM_INVALID_ARGUMENT if the configuration cannot be met.
 */
\brief Find a prescaler/divisor couple to generate the desired ul_frequency
from ul_mck.

\param ul_frequency Desired frequency in Hz.
\param ul_mck Master clock frequency in Hz.

\retval Return the value to be set in the PWM Clock Register (PWM Mode Register for
SAM3N/SAM4N/SAM4C/SAM4CP/SAM4CM) or PWM_INVALID_ARGUMENT if the configuration cannot be met.
\ brief Find a prescaler / divisor couple to generate the desired ul_frequency from ul_mck . \ param ul_frequency Desired frequency in Hz . \ param ul_mck Master clock frequency in Hz . \ retval Return the value to be set in the PWM Clock Register ( PWM Mode Register for SAM3N / SAM4N / SAM4C / SAM4CP / SAM4CM ) or PWM_INVALID_ARGUMENT if the configuration cannot be met .
static uint32_t pwm_clocks_generate(uint32_t ul_frequency, uint32_t ul_mck)
{
	uint32_t ul_divisors[PWM_CLOCK_PRE_MAX] =
			{1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024 };
	uint32_t ul_pre = 0;
	uint32_t ul_div;
	do {
		ul_div = (ul_mck / ul_divisors[ul_pre]) / ul_frequency;
		if (ul_div <= PWM_CLOCK_DIV_MAX) {
			break;
		}
		ul_pre++;
	} while (ul_pre < PWM_CLOCK_PRE_MAX);
	if (ul_pre < PWM_CLOCK_PRE_MAX) {
		return ul_div | (ul_pre << 8);
	} else {
		return PWM_INVALID_ARGUMENT;
	}
}
static uint32_t pwm_clocks_generate ( uint32_t ul_frequency , uint32_t ul_mck ) { uint32_t ul_divisors [ PWM_CLOCK_PRE_MAX ] = { 1 , 2 , 4 , 8 , 16 , 32 , 64 , 128 , 256 , 512 , 1024 } ; uint32_t ul_pre = 0 ; uint32_t ul_div ; do { ul_div = ( ul_mck / ul_divisors [ ul_pre ] ) / ul_frequency ; if ( ul_div <= PWM_CLOCK_DIV_MAX ) { break ; } ul_pre ++ ; } while ( ul_pre < PWM_CLOCK_PRE_MAX ) ; if ( ul_pre < PWM_CLOCK_PRE_MAX ) { return ul_div | ( ul_pre << 8 ) ; } else { return PWM_INVALID_ARGUMENT ; } }
\brief Find a prescaler/divisor couple to generate the desired ul_frequency
 from ul_mck.
\ brief Find a prescaler / divisor couple to generate the desired ul_frequency from ul_mck .
/* Find prescaler and divisor values */ /* Return result */