XilinxProcessorIPLib/drivers/nandps/src/xnandps.c
void XNandPs_SendCommand(XNandPs *InstancePtr, XNandPs_CommandFormat
		*Command, int Page, int Column)
{
	u32 EndCmdReq = 0;
	u32 EccLast = 0;
	u32 ClearCs = 0;
	u32 CmdPhaseAddr;
	u32 DataPhaseAddr;
	u32 CmdPhaseData=0;
	u32 PageShift;

	Xil_AssertVoid(Command != NULL);

	if (Command->EndCmdValid == XNANDPS_CMD_PHASE) {
		EndCmdReq = 1;
	}

	if ((Command->StartCmd == ONFI_CMD_READ1) ||
		(Command->StartCmd == ONFI_CMD_PAGE_PROG1)) {
		Command->AddrCycles = InstancePtr->Geometry.RowAddrCycles +
					InstancePtr->Geometry.ColAddrCycles;
	}
	if ((Command->StartCmd == ONFI_CMD_BLOCK_ERASE1)) {
		Command->AddrCycles = InstancePtr->Geometry.RowAddrCycles;
	}

	/*
	 * Construct command phase address
	 */
	CmdPhaseAddr = InstancePtr->Config.FlashBase			|
		(Command->AddrCycles << XNANDPS_ADDR_CYCLES_SHIFT)	|
		(EndCmdReq << XNANDPS_END_CMD_VALID_SHIFT)	|
		XNANDPS_COMMAND_PHASE_MASK			|
		(Command->EndCmd << XNANDPS_END_CMD_SHIFT)	|
		(Command->StartCmd << XNANDPS_START_CMD_SHIFT);

	InstancePtr->CommandPhaseAddr = CmdPhaseAddr;

	EndCmdReq = 0;

	/*
	 * Some NAND commands require end command to be sent after data phase
	 */
	if (Command->EndCmdValid == XNANDPS_DATA_PHASE) {
		EndCmdReq = 1;
	}

	/*
	 * Construct data phase address
	 */
	DataPhaseAddr = InstancePtr->Config.FlashBase			|
			  (ClearCs << XNANDPS_CLEAR_CS_SHIFT)		|
			  (EndCmdReq << XNANDPS_END_CMD_VALID_SHIFT)	|
			  XNANDPS_DATA_PHASE_MASK			|
			  (Command->EndCmd << XNANDPS_END_CMD_SHIFT)	|
			  (EccLast << XNANDPS_ECC_LAST_SHIFT);

	InstancePtr->DataPhaseAddr = DataPhaseAddr;

	/*
	 * Command phase data
	 */
	if (Column != XNANDPS_COLUMN_NOT_VALID && Page !=
			XNANDPS_PAGE_NOT_VALID) {
		if (InstancePtr->Geometry.FlashWidth ==
				XNANDPS_FLASH_WIDTH_16) {
			Column >>= 1;
		}
		CmdPhaseData = Column;
		PageShift = InstancePtr->Geometry.ColAddrCycles * 8;
		CmdPhaseData |= Page << PageShift;
		if (Command->AddrCycles > 4) {
			/*
			 * Send lower bytes of page address in first address
			 * cycle
			 */
			XNandPs_WriteReg(CmdPhaseAddr, CmdPhaseData);
			/*
			 * Send the upper bytes of the page address in second
			 * address cycle
			 */
			CmdPhaseData = Page >> (32 - PageShift);
		}
	} else if (Page != XNANDPS_PAGE_NOT_VALID) {
		CmdPhaseData = Page;
	} else {
		if (InstancePtr->Geometry.FlashWidth ==
				XNANDPS_FLASH_WIDTH_16) {
			Column >>= 1;
		}
		CmdPhaseData = Column;
	}

	/*
	 * Send command phase
	 */
	XNandPs_WriteReg(CmdPhaseAddr, CmdPhaseData);
}
/**************************************************************************/
/**
*
* This function sends a NAND command to the flash device.
*
* @param	InstancePtr is the pointer to XNandPs structure
* @param	Command is the NAND command to send
* @param	Page is the page offset required for specific commands
* @param	Column the column offset required for specific commands
*
* @return	None
*
* @note		None
*
***************************************************************************/
This function sends a NAND command to the flash device.
This function sends a NAND command to the flash device .
void XNandPs_SendCommand(XNandPs *InstancePtr, XNandPs_CommandFormat
		*Command, int Page, int Column)
{
	u32 EndCmdReq = 0;
	u32 EccLast = 0;
	u32 ClearCs = 0;
	u32 CmdPhaseAddr;
	u32 DataPhaseAddr;
	u32 CmdPhaseData=0;
	u32 PageShift;
	Xil_AssertVoid(Command != NULL);
	if (Command->EndCmdValid == XNANDPS_CMD_PHASE) {
		EndCmdReq = 1;
	}
	if ((Command->StartCmd == ONFI_CMD_READ1) ||
		(Command->StartCmd == ONFI_CMD_PAGE_PROG1)) {
		Command->AddrCycles = InstancePtr->Geometry.RowAddrCycles +
					InstancePtr->Geometry.ColAddrCycles;
	}
	if ((Command->StartCmd == ONFI_CMD_BLOCK_ERASE1)) {
		Command->AddrCycles = InstancePtr->Geometry.RowAddrCycles;
	}
	CmdPhaseAddr = InstancePtr->Config.FlashBase			|
		(Command->AddrCycles << XNANDPS_ADDR_CYCLES_SHIFT)	|
		(EndCmdReq << XNANDPS_END_CMD_VALID_SHIFT)	|
		XNANDPS_COMMAND_PHASE_MASK			|
		(Command->EndCmd << XNANDPS_END_CMD_SHIFT)	|
		(Command->StartCmd << XNANDPS_START_CMD_SHIFT);
	InstancePtr->CommandPhaseAddr = CmdPhaseAddr;
	EndCmdReq = 0;
	if (Command->EndCmdValid == XNANDPS_DATA_PHASE) {
		EndCmdReq = 1;
	}
	DataPhaseAddr = InstancePtr->Config.FlashBase			|
			  (ClearCs << XNANDPS_CLEAR_CS_SHIFT)		|
			  (EndCmdReq << XNANDPS_END_CMD_VALID_SHIFT)	|
			  XNANDPS_DATA_PHASE_MASK			|
			  (Command->EndCmd << XNANDPS_END_CMD_SHIFT)	|
			  (EccLast << XNANDPS_ECC_LAST_SHIFT);
	InstancePtr->DataPhaseAddr = DataPhaseAddr;
	if (Column != XNANDPS_COLUMN_NOT_VALID && Page !=
			XNANDPS_PAGE_NOT_VALID) {
		if (InstancePtr->Geometry.FlashWidth ==
				XNANDPS_FLASH_WIDTH_16) {
			Column >>= 1;
		}
		CmdPhaseData = Column;
		PageShift = InstancePtr->Geometry.ColAddrCycles * 8;
		CmdPhaseData |= Page << PageShift;
		if (Command->AddrCycles > 4) {
			XNandPs_WriteReg(CmdPhaseAddr, CmdPhaseData);
			CmdPhaseData = Page >> (32 - PageShift);
		}
	} else if (Page != XNANDPS_PAGE_NOT_VALID) {
		CmdPhaseData = Page;
	} else {
		if (InstancePtr->Geometry.FlashWidth ==
				XNANDPS_FLASH_WIDTH_16) {
			Column >>= 1;
		}
		CmdPhaseData = Column;
	}
	XNandPs_WriteReg(CmdPhaseAddr, CmdPhaseData);
}
void XNandPs_SendCommand ( XNandPs * InstancePtr , XNandPs_CommandFormat * Command , int Page , int Column ) { u32 EndCmdReq = 0 ; u32 EccLast = 0 ; u32 ClearCs = 0 ; u32 CmdPhaseAddr ; u32 DataPhaseAddr ; u32 CmdPhaseData = 0 ; u32 PageShift ; Xil_AssertVoid ( Command != NULL ) ; if ( Command -> EndCmdValid == XNANDPS_CMD_PHASE ) { EndCmdReq = 1 ; } if ( ( Command -> StartCmd == ONFI_CMD_READ1 ) || ( Command -> StartCmd == ONFI_CMD_PAGE_PROG1 ) ) { Command -> AddrCycles = InstancePtr -> Geometry . RowAddrCycles + InstancePtr -> Geometry . ColAddrCycles ; } if ( ( Command -> StartCmd == ONFI_CMD_BLOCK_ERASE1 ) ) { Command -> AddrCycles = InstancePtr -> Geometry . RowAddrCycles ; } CmdPhaseAddr = InstancePtr -> Config . FlashBase | ( Command -> AddrCycles << XNANDPS_ADDR_CYCLES_SHIFT ) | ( EndCmdReq << XNANDPS_END_CMD_VALID_SHIFT ) | XNANDPS_COMMAND_PHASE_MASK | ( Command -> EndCmd << XNANDPS_END_CMD_SHIFT ) | ( Command -> StartCmd << XNANDPS_START_CMD_SHIFT ) ; InstancePtr -> CommandPhaseAddr = CmdPhaseAddr ; EndCmdReq = 0 ; if ( Command -> EndCmdValid == XNANDPS_DATA_PHASE ) { EndCmdReq = 1 ; } DataPhaseAddr = InstancePtr -> Config . FlashBase | ( ClearCs << XNANDPS_CLEAR_CS_SHIFT ) | ( EndCmdReq << XNANDPS_END_CMD_VALID_SHIFT ) | XNANDPS_DATA_PHASE_MASK | ( Command -> EndCmd << XNANDPS_END_CMD_SHIFT ) | ( EccLast << XNANDPS_ECC_LAST_SHIFT ) ; InstancePtr -> DataPhaseAddr = DataPhaseAddr ; if ( Column != XNANDPS_COLUMN_NOT_VALID && Page != XNANDPS_PAGE_NOT_VALID ) { if ( InstancePtr -> Geometry . FlashWidth == XNANDPS_FLASH_WIDTH_16 ) { Column >>= 1 ; } CmdPhaseData = Column ; PageShift = InstancePtr -> Geometry . ColAddrCycles * 8 ; CmdPhaseData |= Page << PageShift ; if ( Command -> AddrCycles > 4 ) { XNandPs_WriteReg ( CmdPhaseAddr , CmdPhaseData ) ; CmdPhaseData = Page >> ( 32 - PageShift ) ; } } else if ( Page != XNANDPS_PAGE_NOT_VALID ) { CmdPhaseData = Page ; } else { if ( InstancePtr -> Geometry . FlashWidth == XNANDPS_FLASH_WIDTH_16 ) { Column >>= 1 ; } CmdPhaseData = Column ; } XNandPs_WriteReg ( CmdPhaseAddr , CmdPhaseData ) ; }
This function sends a NAND command to the flash device.
This function sends a NAND command to the flash device .
/*
	 * Construct command phase address
	 */ /*
	 * Some NAND commands require end command to be sent after data phase
	 */ /*
	 * Construct data phase address
	 */ /*
	 * Command phase data
	 */ /*
			 * Send lower bytes of page address in first address
			 * cycle
			 */ /*
			 * Send the upper bytes of the page address in second
			 * address cycle
			 */ /*
	 * Send command phase
	 */