XilinxProcessorIPLib/drivers/v_hdmiphy1/src/xhdmiphy1_hdmi_intr.c
void XHdmiphy1_HdmiCpllLockHandler(XHdmiphy1 *InstancePtr)
{
    XHdmiphy1_PllType TxPllType;
    XHdmiphy1_PllType RxPllType;
    u8 Id, Id0, Id1;
    XHdmiphy1_ChannelId ChId;

    /* Determine PLL type. */
    TxPllType = XHdmiphy1_GetPllType(InstancePtr, 0, XHDMIPHY1_DIR_TX,
            XHDMIPHY1_CHANNEL_ID_CH1);
    RxPllType = XHdmiphy1_GetPllType(InstancePtr, 0, XHDMIPHY1_DIR_RX,
            XHDMIPHY1_CHANNEL_ID_CH1);

    XHdmiphy1_Ch2Ids(InstancePtr, XHDMIPHY1_CHANNEL_ID_CHA, &Id0, &Id1);

    /* RX is using CPLL. */
    if (RxPllType == XHDMIPHY1_PLL_TYPE_CPLL) {
        /* Determine which channel(s) to operate on. */
        ChId = XHdmiphy1_GetRcfgChId(InstancePtr, 0,
                    XHDMIPHY1_DIR_RX, RxPllType);

        if (XHdmiphy1_IsPllLocked(InstancePtr, 0, ChId) == XST_SUCCESS) {
            /* Log, lock */
            XHdmiphy1_LogWrite(InstancePtr, XHDMIPHY1_LOG_EVT_CPLL_LOCK, 1);
            /* GT RX reset. */
            XHdmiphy1_ResetGtTxRx(InstancePtr, 0, XHDMIPHY1_CHANNEL_ID_CHA,
                    XHDMIPHY1_DIR_RX, FALSE);

            for (Id = Id0; Id <= Id1; Id++) {
                InstancePtr->Quads[0].Plls[XHDMIPHY1_CH2IDX(Id)].
                    RxState = XHDMIPHY1_GT_STATE_RESET;
            }
        }
        else {
            /* Log, Lost lock */
            XHdmiphy1_LogWrite(InstancePtr, XHDMIPHY1_LOG_EVT_CPLL_LOCK, 0);
        }
    }
    /* TX is using CPLL. */
    else {
        /* Determine which channel(s) to operate on. */
        ChId = XHdmiphy1_GetRcfgChId(InstancePtr, 0,
                    XHDMIPHY1_DIR_TX, TxPllType);

        if (XHdmiphy1_IsPllLocked(InstancePtr, 0, ChId) == XST_SUCCESS) {
            /* Log, lock */
            XHdmiphy1_LogWrite(InstancePtr, XHDMIPHY1_LOG_EVT_CPLL_LOCK, 1);

            /* GT TX reset. */
            XHdmiphy1_ResetGtTxRx(InstancePtr, 0, XHDMIPHY1_CHANNEL_ID_CHA,
                    XHDMIPHY1_DIR_TX, FALSE);

            for (Id = Id0; Id <= Id1; Id++) {
                InstancePtr->Quads[0].Plls[XHDMIPHY1_CH2IDX(Id)].
                    TxState = XHDMIPHY1_GT_STATE_RESET;
            }
        }
        else {
            /* Log, Lost lock */
            XHdmiphy1_LogWrite(InstancePtr, XHDMIPHY1_LOG_EVT_CPLL_LOCK, 0);
        }
    }
}
/*****************************************************************************/
/**
* This function is the handler for events triggered by CPLL lock done.
*
* @param    InstancePtr is a pointer to the HDMIPHY instance.
*
* @return   None.
*
* @note     None.
*
******************************************************************************/
This function is the handler for events triggered by CPLL lock done.
This function is the handler for events triggered by CPLL lock done .
void XHdmiphy1_HdmiCpllLockHandler(XHdmiphy1 *InstancePtr)
{
    XHdmiphy1_PllType TxPllType;
    XHdmiphy1_PllType RxPllType;
    u8 Id, Id0, Id1;
    XHdmiphy1_ChannelId ChId;
    TxPllType = XHdmiphy1_GetPllType(InstancePtr, 0, XHDMIPHY1_DIR_TX,
            XHDMIPHY1_CHANNEL_ID_CH1);
    RxPllType = XHdmiphy1_GetPllType(InstancePtr, 0, XHDMIPHY1_DIR_RX,
            XHDMIPHY1_CHANNEL_ID_CH1);
    XHdmiphy1_Ch2Ids(InstancePtr, XHDMIPHY1_CHANNEL_ID_CHA, &Id0, &Id1);
    if (RxPllType == XHDMIPHY1_PLL_TYPE_CPLL) {
        ChId = XHdmiphy1_GetRcfgChId(InstancePtr, 0,
                    XHDMIPHY1_DIR_RX, RxPllType);
        if (XHdmiphy1_IsPllLocked(InstancePtr, 0, ChId) == XST_SUCCESS) {
            XHdmiphy1_LogWrite(InstancePtr, XHDMIPHY1_LOG_EVT_CPLL_LOCK, 1);
            XHdmiphy1_ResetGtTxRx(InstancePtr, 0, XHDMIPHY1_CHANNEL_ID_CHA,
                    XHDMIPHY1_DIR_RX, FALSE);
            for (Id = Id0; Id <= Id1; Id++) {
                InstancePtr->Quads[0].Plls[XHDMIPHY1_CH2IDX(Id)].
                    RxState = XHDMIPHY1_GT_STATE_RESET;
            }
        }
        else {
            XHdmiphy1_LogWrite(InstancePtr, XHDMIPHY1_LOG_EVT_CPLL_LOCK, 0);
        }
    }
    else {
        ChId = XHdmiphy1_GetRcfgChId(InstancePtr, 0,
                    XHDMIPHY1_DIR_TX, TxPllType);
        if (XHdmiphy1_IsPllLocked(InstancePtr, 0, ChId) == XST_SUCCESS) {
            XHdmiphy1_LogWrite(InstancePtr, XHDMIPHY1_LOG_EVT_CPLL_LOCK, 1);
            XHdmiphy1_ResetGtTxRx(InstancePtr, 0, XHDMIPHY1_CHANNEL_ID_CHA,
                    XHDMIPHY1_DIR_TX, FALSE);
            for (Id = Id0; Id <= Id1; Id++) {
                InstancePtr->Quads[0].Plls[XHDMIPHY1_CH2IDX(Id)].
                    TxState = XHDMIPHY1_GT_STATE_RESET;
            }
        }
        else {
            XHdmiphy1_LogWrite(InstancePtr, XHDMIPHY1_LOG_EVT_CPLL_LOCK, 0);
        }
    }
}
void XHdmiphy1_HdmiCpllLockHandler ( XHdmiphy1 * InstancePtr ) { XHdmiphy1_PllType TxPllType ; XHdmiphy1_PllType RxPllType ; u8 Id , Id0 , Id1 ; XHdmiphy1_ChannelId ChId ; TxPllType = XHdmiphy1_GetPllType ( InstancePtr , 0 , XHDMIPHY1_DIR_TX , XHDMIPHY1_CHANNEL_ID_CH1 ) ; RxPllType = XHdmiphy1_GetPllType ( InstancePtr , 0 , XHDMIPHY1_DIR_RX , XHDMIPHY1_CHANNEL_ID_CH1 ) ; XHdmiphy1_Ch2Ids ( InstancePtr , XHDMIPHY1_CHANNEL_ID_CHA , & Id0 , & Id1 ) ; if ( RxPllType == XHDMIPHY1_PLL_TYPE_CPLL ) { ChId = XHdmiphy1_GetRcfgChId ( InstancePtr , 0 , XHDMIPHY1_DIR_RX , RxPllType ) ; if ( XHdmiphy1_IsPllLocked ( InstancePtr , 0 , ChId ) == XST_SUCCESS ) { XHdmiphy1_LogWrite ( InstancePtr , XHDMIPHY1_LOG_EVT_CPLL_LOCK , 1 ) ; XHdmiphy1_ResetGtTxRx ( InstancePtr , 0 , XHDMIPHY1_CHANNEL_ID_CHA , XHDMIPHY1_DIR_RX , FALSE ) ; for ( Id = Id0 ; Id <= Id1 ; Id ++ ) { InstancePtr -> Quads [ 0 ] . Plls [ XHDMIPHY1_CH2IDX ( Id ) ] . RxState = XHDMIPHY1_GT_STATE_RESET ; } } else { XHdmiphy1_LogWrite ( InstancePtr , XHDMIPHY1_LOG_EVT_CPLL_LOCK , 0 ) ; } } else { ChId = XHdmiphy1_GetRcfgChId ( InstancePtr , 0 , XHDMIPHY1_DIR_TX , TxPllType ) ; if ( XHdmiphy1_IsPllLocked ( InstancePtr , 0 , ChId ) == XST_SUCCESS ) { XHdmiphy1_LogWrite ( InstancePtr , XHDMIPHY1_LOG_EVT_CPLL_LOCK , 1 ) ; XHdmiphy1_ResetGtTxRx ( InstancePtr , 0 , XHDMIPHY1_CHANNEL_ID_CHA , XHDMIPHY1_DIR_TX , FALSE ) ; for ( Id = Id0 ; Id <= Id1 ; Id ++ ) { InstancePtr -> Quads [ 0 ] . Plls [ XHDMIPHY1_CH2IDX ( Id ) ] . TxState = XHDMIPHY1_GT_STATE_RESET ; } } else { XHdmiphy1_LogWrite ( InstancePtr , XHDMIPHY1_LOG_EVT_CPLL_LOCK , 0 ) ; } } }
This function is the handler for events triggered by CPLL lock done.
This function is the handler for events triggered by CPLL lock done .
/* Determine PLL type. */ /* RX is using CPLL. */ /* Determine which channel(s) to operate on. */ /* Log, lock */ /* GT RX reset. */ /* Log, Lost lock */ /* TX is using CPLL. */ /* Determine which channel(s) to operate on. */ /* Log, lock */ /* GT TX reset. */ /* Log, Lost lock */