XilinxProcessorIPLib/drivers/dp14txss/examples/src/zcu_pt_dp14_hdcp/rx.c
void DpRxSs_AccessErrorCounterHandler(void *InstancePtr)
{
	u16 DrpVal;
	u16 DrpVal_lower_lane0;
	u16 DrpVal_lower_lane1;
	u16 DrpVal_lower_lane2;
	u16 DrpVal_lower_lane3;
	u32 DrpVal1;

//	xil_printf("DpRxSs_AccessErrorCounterHandler\r\n");


	/*Read PRBS Error Counter Value from Video PHY*/

	/*Lane 0 - Store only lower 16 bits*/
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH1,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_LOWER,
		    &DrpVal_lower_lane0);
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH1,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_UPPER,
		    &DrpVal);

	/*Lane 1 - Store only lower 16 bits*/
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH2,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_LOWER,
		    &DrpVal_lower_lane1);
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH2,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_UPPER, &DrpVal);

	/*Lane 2 - Store only lower 16 bits*/
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH3,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_LOWER,
		    &DrpVal_lower_lane2);
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH3,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_UPPER, &DrpVal);

	/*Lane 3 - Store only lower 16 bits*/
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH4,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_LOWER,
		    &DrpVal_lower_lane3);
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH4,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_UPPER, &DrpVal);

	/*Write into DP Core - Validity bit and lower 15 bit counter value*/
	XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr,
		     XDP_RX_DPC_L01_PRBS_CNTR,
		     (0x8000 | DrpVal_lower_lane0) |
		     ((0x8000 | DrpVal_lower_lane1) << 16));
	XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr,
		     XDP_RX_DPC_L23_PRBS_CNTR,
		     (0x8000 | DrpVal_lower_lane2) |
		     ((0x8000 | DrpVal_lower_lane3) << 16));

	XDpRxSs_MCDP6000_Read_ErrorCounters(&DpRxSsInst, I2C_MCDP6000_ADDR);

	xil_printf("0x061C: %08x\n\r", XDpRxSs_MCDP6000_GetRegister(
			&DpRxSsInst, I2C_MCDP6000_ADDR, 0x061C));
	xil_printf("0x0504: %08x\n\r", XDpRxSs_MCDP6000_GetRegister(
			&DpRxSsInst, I2C_MCDP6000_ADDR, 0x0504));
	xil_printf("0x0604: %08x\n\r", XDpRxSs_MCDP6000_GetRegister(
			&DpRxSsInst, I2C_MCDP6000_ADDR, 0x0604));
	xil_printf("0x12BC: %08x\n\r", XDpRxSs_MCDP6000_GetRegister(
			&DpRxSsInst, I2C_MCDP6000_ADDR, 0x12BC));
	xil_printf("0x12E4: %08x\n\r", XDpRxSs_MCDP6000_GetRegister(
			&DpRxSsInst, I2C_MCDP6000_ADDR, 0x12E4));

	/* Reset PRBS7 Counters */
	DrpVal1 = XVphy_ReadReg(VPhyInst.Config.BaseAddr,
			       XVPHY_RX_CONTROL_REG);
	DrpVal1 = DrpVal1 | 0x08080808;
	XDp_WriteReg(VPhyInst.Config.BaseAddr,
		     XVPHY_RX_CONTROL_REG, DrpVal1);
	DrpVal1 = XVphy_ReadReg(VPhyInst.Config.BaseAddr,
			       XVPHY_RX_CONTROL_REG);
	DrpVal1 = DrpVal1 & 0xF7F7F7F7;
	XVphy_WriteReg(VPhyInst.Config.BaseAddr,
		       XVPHY_RX_CONTROL_REG, DrpVal1);
}
/*****************************************************************************/
/**
*
* This function is the callback function for Access prbs error count.
*
* @param    InstancePtr is a pointer to the XDpRxSs instance.
*
* @return    None.
*
* @note        None.
*
******************************************************************************/
This function is the callback function for Access prbs error count.
This function is the callback function for Access prbs error count .
void DpRxSs_AccessErrorCounterHandler(void *InstancePtr)
{
	u16 DrpVal;
	u16 DrpVal_lower_lane0;
	u16 DrpVal_lower_lane1;
	u16 DrpVal_lower_lane2;
	u16 DrpVal_lower_lane3;
	u32 DrpVal1;
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH1,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_LOWER,
		    &DrpVal_lower_lane0);
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH1,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_UPPER,
		    &DrpVal);
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH2,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_LOWER,
		    &DrpVal_lower_lane1);
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH2,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_UPPER, &DrpVal);
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH3,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_LOWER,
		    &DrpVal_lower_lane2);
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH3,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_UPPER, &DrpVal);
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH4,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_LOWER,
		    &DrpVal_lower_lane3);
	XVphy_DrpRd(&VPhyInst, 0, XVPHY_CHANNEL_ID_CH4,
		    XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_UPPER, &DrpVal);
	XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr,
		     XDP_RX_DPC_L01_PRBS_CNTR,
		     (0x8000 | DrpVal_lower_lane0) |
		     ((0x8000 | DrpVal_lower_lane1) << 16));
	XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr,
		     XDP_RX_DPC_L23_PRBS_CNTR,
		     (0x8000 | DrpVal_lower_lane2) |
		     ((0x8000 | DrpVal_lower_lane3) << 16));
	XDpRxSs_MCDP6000_Read_ErrorCounters(&DpRxSsInst, I2C_MCDP6000_ADDR);
	xil_printf("0x061C: %08x\n\r", XDpRxSs_MCDP6000_GetRegister(
			&DpRxSsInst, I2C_MCDP6000_ADDR, 0x061C));
	xil_printf("0x0504: %08x\n\r", XDpRxSs_MCDP6000_GetRegister(
			&DpRxSsInst, I2C_MCDP6000_ADDR, 0x0504));
	xil_printf("0x0604: %08x\n\r", XDpRxSs_MCDP6000_GetRegister(
			&DpRxSsInst, I2C_MCDP6000_ADDR, 0x0604));
	xil_printf("0x12BC: %08x\n\r", XDpRxSs_MCDP6000_GetRegister(
			&DpRxSsInst, I2C_MCDP6000_ADDR, 0x12BC));
	xil_printf("0x12E4: %08x\n\r", XDpRxSs_MCDP6000_GetRegister(
			&DpRxSsInst, I2C_MCDP6000_ADDR, 0x12E4));
	DrpVal1 = XVphy_ReadReg(VPhyInst.Config.BaseAddr,
			       XVPHY_RX_CONTROL_REG);
	DrpVal1 = DrpVal1 | 0x08080808;
	XDp_WriteReg(VPhyInst.Config.BaseAddr,
		     XVPHY_RX_CONTROL_REG, DrpVal1);
	DrpVal1 = XVphy_ReadReg(VPhyInst.Config.BaseAddr,
			       XVPHY_RX_CONTROL_REG);
	DrpVal1 = DrpVal1 & 0xF7F7F7F7;
	XVphy_WriteReg(VPhyInst.Config.BaseAddr,
		       XVPHY_RX_CONTROL_REG, DrpVal1);
}
void DpRxSs_AccessErrorCounterHandler ( void * InstancePtr ) { u16 DrpVal ; u16 DrpVal_lower_lane0 ; u16 DrpVal_lower_lane1 ; u16 DrpVal_lower_lane2 ; u16 DrpVal_lower_lane3 ; u32 DrpVal1 ; XVphy_DrpRd ( & VPhyInst , 0 , XVPHY_CHANNEL_ID_CH1 , XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_LOWER , & DrpVal_lower_lane0 ) ; XVphy_DrpRd ( & VPhyInst , 0 , XVPHY_CHANNEL_ID_CH1 , XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_UPPER , & DrpVal ) ; XVphy_DrpRd ( & VPhyInst , 0 , XVPHY_CHANNEL_ID_CH2 , XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_LOWER , & DrpVal_lower_lane1 ) ; XVphy_DrpRd ( & VPhyInst , 0 , XVPHY_CHANNEL_ID_CH2 , XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_UPPER , & DrpVal ) ; XVphy_DrpRd ( & VPhyInst , 0 , XVPHY_CHANNEL_ID_CH3 , XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_LOWER , & DrpVal_lower_lane2 ) ; XVphy_DrpRd ( & VPhyInst , 0 , XVPHY_CHANNEL_ID_CH3 , XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_UPPER , & DrpVal ) ; XVphy_DrpRd ( & VPhyInst , 0 , XVPHY_CHANNEL_ID_CH4 , XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_LOWER , & DrpVal_lower_lane3 ) ; XVphy_DrpRd ( & VPhyInst , 0 , XVPHY_CHANNEL_ID_CH4 , XVPHY_DRP_GTHE4_PRBS_ERR_CNTR_UPPER , & DrpVal ) ; XDp_WriteReg ( DpRxSsInst . DpPtr -> Config . BaseAddr , XDP_RX_DPC_L01_PRBS_CNTR , ( 0x8000 | DrpVal_lower_lane0 ) | ( ( 0x8000 | DrpVal_lower_lane1 ) << 16 ) ) ; XDp_WriteReg ( DpRxSsInst . DpPtr -> Config . BaseAddr , XDP_RX_DPC_L23_PRBS_CNTR , ( 0x8000 | DrpVal_lower_lane2 ) | ( ( 0x8000 | DrpVal_lower_lane3 ) << 16 ) ) ; XDpRxSs_MCDP6000_Read_ErrorCounters ( & DpRxSsInst , I2C_MCDP6000_ADDR ) ; xil_printf ( " \n \r " , XDpRxSs_MCDP6000_GetRegister ( & DpRxSsInst , I2C_MCDP6000_ADDR , 0x061C ) ) ; xil_printf ( " \n \r " , XDpRxSs_MCDP6000_GetRegister ( & DpRxSsInst , I2C_MCDP6000_ADDR , 0x0504 ) ) ; xil_printf ( " \n \r " , XDpRxSs_MCDP6000_GetRegister ( & DpRxSsInst , I2C_MCDP6000_ADDR , 0x0604 ) ) ; xil_printf ( " \n \r " , XDpRxSs_MCDP6000_GetRegister ( & DpRxSsInst , I2C_MCDP6000_ADDR , 0x12BC ) ) ; xil_printf ( " \n \r " , XDpRxSs_MCDP6000_GetRegister ( & DpRxSsInst , I2C_MCDP6000_ADDR , 0x12E4 ) ) ; DrpVal1 = XVphy_ReadReg ( VPhyInst . Config . BaseAddr , XVPHY_RX_CONTROL_REG ) ; DrpVal1 = DrpVal1 | 0x08080808 ; XDp_WriteReg ( VPhyInst . Config . BaseAddr , XVPHY_RX_CONTROL_REG , DrpVal1 ) ; DrpVal1 = XVphy_ReadReg ( VPhyInst . Config . BaseAddr , XVPHY_RX_CONTROL_REG ) ; DrpVal1 = DrpVal1 & 0xF7F7F7F7 ; XVphy_WriteReg ( VPhyInst . Config . BaseAddr , XVPHY_RX_CONTROL_REG , DrpVal1 ) ; }
This function is the callback function for Access prbs error count.
This function is the callback function for Access prbs error count .
//	xil_printf("DpRxSs_AccessErrorCounterHandler\r\n"); /*Read PRBS Error Counter Value from Video PHY*/ /*Lane 0 - Store only lower 16 bits*/ /*Lane 1 - Store only lower 16 bits*/ /*Lane 2 - Store only lower 16 bits*/ /*Lane 3 - Store only lower 16 bits*/ /*Write into DP Core - Validity bit and lower 15 bit counter value*/ /* Reset PRBS7 Counters */