XilinxProcessorIPLib/drivers/v_hdmiphy1/src/xhdmiphy1_hdmi.c
u32 XHdmiphy1_ClkDetGetRefClkFreqHz(XHdmiphy1 *InstancePtr,
        XHdmiphy1_DirectionType Dir)
{
	u32 RegOffset;

	if (Dir == XHDMIPHY1_DIR_TX) {
		RegOffset = XHDMIPHY1_CLKDET_FREQ_TX_REG;
	}
	else {
		RegOffset = XHDMIPHY1_CLKDET_FREQ_RX_REG;
	}

	return XHdmiphy1_ReadReg(InstancePtr->Config.BaseAddr, RegOffset);
}
/*****************************************************************************/
/**
* This function returns the frequency of the RX/TX reference clock as
* measured by the clock detector peripheral.
*
* @param	InstancePtr is a pointer to the XHdmiphy1 core instance.
* @param	Dir is an indicator for RX or TX.
*
* @return	The measured frequency of the RX/TX reference clock.
*
* @note		None.
*
******************************************************************************/
This function returns the frequency of the RX/TX reference clock as
measured by the clock detector peripheral.
This function returns the frequency of the RX / TX reference clock as measured by the clock detector peripheral .
u32 XHdmiphy1_ClkDetGetRefClkFreqHz(XHdmiphy1 *InstancePtr,
        XHdmiphy1_DirectionType Dir)
{
	u32 RegOffset;
	if (Dir == XHDMIPHY1_DIR_TX) {
		RegOffset = XHDMIPHY1_CLKDET_FREQ_TX_REG;
	}
	else {
		RegOffset = XHDMIPHY1_CLKDET_FREQ_RX_REG;
	}
	return XHdmiphy1_ReadReg(InstancePtr->Config.BaseAddr, RegOffset);
}
u32 XHdmiphy1_ClkDetGetRefClkFreqHz ( XHdmiphy1 * InstancePtr , XHdmiphy1_DirectionType Dir ) { u32 RegOffset ; if ( Dir == XHDMIPHY1_DIR_TX ) { RegOffset = XHDMIPHY1_CLKDET_FREQ_TX_REG ; } else { RegOffset = XHDMIPHY1_CLKDET_FREQ_RX_REG ; } return XHdmiphy1_ReadReg ( InstancePtr -> Config . BaseAddr , RegOffset ) ; }
This function returns the frequency of the RX/TX reference clock as
measured by the clock detector peripheral.
This function returns the frequency of the RX / TX reference clock as measured by the clock detector peripheral .