src/dpdk/drivers/net/igc/base/igc_mac.c
s32 igc_set_fc_watermarks_generic(struct igc_hw *hw)
{
	u32 fcrtl = 0, fcrth = 0;

	DEBUGFUNC("igc_set_fc_watermarks_generic");

	/* Set the flow control receive threshold registers.  Normally,
	 * these registers will be set to a default threshold that may be
	 * adjusted later by the driver's runtime code.  However, if the
	 * ability to transmit pause frames is not enabled, then these
	 * registers will be set to 0.
	 */
	if (hw->fc.current_mode & igc_fc_tx_pause) {
		/* We need to set up the Receive Threshold high and low water
		 * marks as well as (optionally) enabling the transmission of
		 * XON frames.
		 */
		fcrtl = hw->fc.low_water;
		if (hw->fc.send_xon)
			fcrtl |= IGC_FCRTL_XONE;

		fcrth = hw->fc.high_water;
	}
	IGC_WRITE_REG(hw, IGC_FCRTL, fcrtl);
	IGC_WRITE_REG(hw, IGC_FCRTH, fcrth);

	return IGC_SUCCESS;
}
/**
 *  igc_set_fc_watermarks_generic - Set flow control high/low watermarks
 *  @hw: pointer to the HW structure
 *
 *  Sets the flow control high/low threshold (watermark) registers.  If
 *  flow control XON frame transmission is enabled, then set XON frame
 *  transmission as well.
 **/
Set flow control high/low watermarks
@hw: pointer to the HW structure

Sets the flow control high/low threshold (watermark) registers.  If
flow control XON frame transmission is enabled, then set XON frame
transmission as well.
Set flow control high / low watermarks @hw : pointer to the HW structure Sets the flow control high / low threshold ( watermark ) registers . If flow control XON frame transmission is enabled then set XON frame transmission as well .
s32 igc_set_fc_watermarks_generic(struct igc_hw *hw)
{
	u32 fcrtl = 0, fcrth = 0;
	DEBUGFUNC("igc_set_fc_watermarks_generic");
	if (hw->fc.current_mode & igc_fc_tx_pause) {
		fcrtl = hw->fc.low_water;
		if (hw->fc.send_xon)
			fcrtl |= IGC_FCRTL_XONE;
		fcrth = hw->fc.high_water;
	}
	IGC_WRITE_REG(hw, IGC_FCRTL, fcrtl);
	IGC_WRITE_REG(hw, IGC_FCRTH, fcrth);
	return IGC_SUCCESS;
}
s32 igc_set_fc_watermarks_generic ( struct igc_hw * hw ) { u32 fcrtl = 0 , fcrth = 0 ; DEBUGFUNC ( " " ) ; if ( hw -> fc . current_mode & igc_fc_tx_pause ) { fcrtl = hw -> fc . low_water ; if ( hw -> fc . send_xon ) fcrtl |= IGC_FCRTL_XONE ; fcrth = hw -> fc . high_water ; } IGC_WRITE_REG ( hw , IGC_FCRTL , fcrtl ) ; IGC_WRITE_REG ( hw , IGC_FCRTH , fcrth ) ; return IGC_SUCCESS ; }
igc_set_fc_watermarks_generic - Set flow control high/low watermarks
  @hw: pointer to the HW structure
igc_set_fc_watermarks_generic - Set flow control high / low watermarks @hw : pointer to the HW structure
/* Set the flow control receive threshold registers.  Normally,
	 * these registers will be set to a default threshold that may be
	 * adjusted later by the driver's runtime code.  However, if the
	 * ability to transmit pause frames is not enabled, then these
	 * registers will be set to 0.
	 */ /* We need to set up the Receive Threshold high and low water
		 * marks as well as (optionally) enabling the transmission of
		 * XON frames.
		 */