XilinxProcessorIPLib/drivers/qspips/examples/xqspips_g128_flash_example.c
int FlashReadID(XQspiPs *QspiPtr, u8 *WriteBfrPtr, u8 *ReadBfrPtr)
{
	int Status;
	int StartIndex;

	/*
	 * Read ID in Auto mode.
	 */
	WriteBfrPtr[COMMAND_OFFSET]   = READ_ID;
	WriteBfrPtr[ADDRESS_1_OFFSET] = 0x23;		/* 3 dummy bytes */
	WriteBfrPtr[ADDRESS_2_OFFSET] = 0x08;
	WriteBfrPtr[ADDRESS_3_OFFSET] = 0x09;

	Status = XQspiPs_PolledTransfer(QspiPtr, WriteBfrPtr, ReadBfrPtr,
				RD_ID_SIZE);
	if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}

	/*
	 * Deduce flash make
	 */
	if(ReadBfrPtr[1] == MICRON_ID_BYTE0) {
		FlashMake = MICRON_ID_BYTE0;
		StartIndex = MICRON_INDEX_START;
	}else if(ReadBfrPtr[1] == SPANSION_ID_BYTE0) {
		FlashMake = SPANSION_ID_BYTE0;
		StartIndex = SPANSION_INDEX_START;
	}else if(ReadBfrPtr[1] == WINBOND_ID_BYTE0) {
		FlashMake = WINBOND_ID_BYTE0;
		StartIndex = WINBOND_INDEX_START;
	} else if(ReadBfrPtr[1] == MACRONIX_ID_BYTE0) {
		FlashMake = MACRONIX_ID_BYTE0;
		StartIndex = MACRONIX_INDEX_START;
	} else if(ReadBfrPtr[0] == ISSI_ID_BYTE0) {
		FlashMake = ISSI_ID_BYTE0;
		StartIndex = ISSI_INDEX_START;
	}


	/*
	 * If valid flash ID, then check connection mode & size and
	 * assign corresponding index in the Flash configuration table
	 */
	if(((FlashMake == MICRON_ID_BYTE0) || (FlashMake == SPANSION_ID_BYTE0)||
			(FlashMake == WINBOND_ID_BYTE0)) &&
			(ReadBfrPtr[3] == MICRON_ID_BYTE2_128)) {

		switch(QspiPtr->Config.ConnectionMode)
		{
			case XQSPIPS_CONNECTION_MODE_SINGLE:
				FCTIndex = FLASH_CFG_TBL_SINGLE_128_SP + StartIndex;
				break;
			case XQSPIPS_CONNECTION_MODE_PARALLEL:
				FCTIndex = FLASH_CFG_TBL_PARALLEL_128_SP + StartIndex;
				break;
			case XQSPIPS_CONNECTION_MODE_STACKED:
				FCTIndex = FLASH_CFG_TBL_STACKED_128_SP + StartIndex;
				break;
			default:
				FCTIndex = 0;
				break;
		}
	}
	/* 256 and 512Mbit supported only for Micron and Spansion, not Winbond */
	if(((FlashMake == MICRON_ID_BYTE0) || (FlashMake == SPANSION_ID_BYTE0)
			|| (FlashMake == MACRONIX_ID_BYTE0)) &&
			(ReadBfrPtr[3] == MICRON_ID_BYTE2_256)) {

		switch(QspiPtr->Config.ConnectionMode)
		{
			case XQSPIPS_CONNECTION_MODE_SINGLE:
				FCTIndex = FLASH_CFG_TBL_SINGLE_256_SP + StartIndex;
				break;
			case XQSPIPS_CONNECTION_MODE_PARALLEL:
				FCTIndex = FLASH_CFG_TBL_PARALLEL_256_SP + StartIndex;
				break;
			case XQSPIPS_CONNECTION_MODE_STACKED:
				FCTIndex = FLASH_CFG_TBL_STACKED_256_SP + StartIndex;
				break;
			default:
				FCTIndex = 0;
				break;
		}
	}
	if((FlashMake == ISSI_ID_BYTE0) &&
			(ReadBfrPtr[2] == MICRON_ID_BYTE2_256)) {
		switch(QspiPtr->Config.ConnectionMode)
		{
			case XQSPIPS_CONNECTION_MODE_SINGLE:
				FCTIndex = FLASH_CFG_TBL_SINGLE_256_ISSI;
				break;
			case XQSPIPS_CONNECTION_MODE_PARALLEL:
				FCTIndex = FLASH_CFG_TBL_PARALLEL_256_ISSI;
				break;
			case XQSPIPS_CONNECTION_MODE_STACKED:
				FCTIndex = FLASH_CFG_TBL_STACKED_256_ISSI;
				break;
			default:
				FCTIndex = 0;
				break;
		}
	}
	if ((((FlashMake == MICRON_ID_BYTE0) || (FlashMake == SPANSION_ID_BYTE0)) &&
			(ReadBfrPtr[3] == MICRON_ID_BYTE2_512)) || ((FlashMake ==
			MACRONIX_ID_BYTE0) && (ReadBfrPtr[3] == MACRONIX_ID_BYTE2_512))) {

		switch(QspiPtr->Config.ConnectionMode)
		{
			case XQSPIPS_CONNECTION_MODE_SINGLE:
				FCTIndex = FLASH_CFG_TBL_SINGLE_512_SP + StartIndex;
				break;
			case XQSPIPS_CONNECTION_MODE_PARALLEL:
				FCTIndex = FLASH_CFG_TBL_PARALLEL_512_SP + StartIndex;
				break;
			case XQSPIPS_CONNECTION_MODE_STACKED:
				FCTIndex = FLASH_CFG_TBL_STACKED_512_SP + StartIndex;
				break;
			default:
				FCTIndex = 0;
				break;
		}
	}
	/*
	 * 1Gbit Single connection supported for Spansion.
	 * The ConnectionMode will indicate stacked as this part has 2 SS
	 * The device ID will indicate 512Mbit.
	 * This configuration is handled as the above 512Mbit stacked configuration
	 */
	/* 1Gbit single, parallel and stacked supported for Micron */
	if(((FlashMake == MICRON_ID_BYTE0) &&
		(ReadBfrPtr[3] == MICRON_ID_BYTE2_1G)) ||
		((FlashMake == MACRONIX_ID_BYTE0) &&
		 (ReadBfrPtr[3] == MACRONIX_ID_BYTE2_1G))) {

		switch(QspiPtr->Config.ConnectionMode)
		{
			case XQSPIPS_CONNECTION_MODE_SINGLE:
				FCTIndex = FLASH_CFG_TBL_SINGLE_1GB_MC;
				break;
			case XQSPIPS_CONNECTION_MODE_PARALLEL:
				FCTIndex = FLASH_CFG_TBL_PARALLEL_1GB_MC;
				break;
			case XQSPIPS_CONNECTION_MODE_STACKED:
				FCTIndex = FLASH_CFG_TBL_STACKED_1GB_MC;
				break;
			default:
				FCTIndex = 0;
				break;
		}
	}

	xil_printf("FlashID=0x%x 0x%x 0x%x\n\r", ReadBfrPtr[1], ReadBfrPtr[2],
		   ReadBfrPtr[3]);

	return XST_SUCCESS;
}
/*****************************************************************************/
/**
*
* This function reads serial Flash ID connected to the SPI interface.
* It then deduces the make and size of the flash and obtains the
* connection mode to point to corresponding parameters in the flash
* configuration table. The flash driver will function based on this and
* it presently supports Micron and Spansion - 128, 256 and 512Mbit and
* Winbond 128Mbit
*
* @param	QspiPtr is a pointer to the QSPI driver component to use.
* @param	WriteBfrPtr is pointer to the write buffer
*		(which is to be transmitted)
* @param	ReadBfrPtr is pointer to the read buffer to which valid
*		received data should be written.
*
* @return	XST_SUCCESS if read id, otherwise XST_FAILURE.
*
* @note		None.
*
******************************************************************************/
This function reads serial Flash ID connected to the SPI interface.
It then deduces the make and size of the flash and obtains the
connection mode to point to corresponding parameters in the flash
configuration table. The flash driver will function based on this and
it presently supports Micron and Spansion - 128, 256 and 512Mbit and
Winbond 128Mbit
This function reads serial Flash ID connected to the SPI interface . It then deduces the make and size of the flash and obtains the connection mode to point to corresponding parameters in the flash configuration table . The flash driver will function based on this and it presently supports Micron and Spansion - 128 256 and 512Mbit and Winbond 128Mbit
int FlashReadID(XQspiPs *QspiPtr, u8 *WriteBfrPtr, u8 *ReadBfrPtr)
{
	int Status;
	int StartIndex;
	WriteBfrPtr[COMMAND_OFFSET]   = READ_ID;
	WriteBfrPtr[ADDRESS_1_OFFSET] = 0x23;		
	WriteBfrPtr[ADDRESS_2_OFFSET] = 0x08;
	WriteBfrPtr[ADDRESS_3_OFFSET] = 0x09;
	Status = XQspiPs_PolledTransfer(QspiPtr, WriteBfrPtr, ReadBfrPtr,
				RD_ID_SIZE);
	if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}
	if(ReadBfrPtr[1] == MICRON_ID_BYTE0) {
		FlashMake = MICRON_ID_BYTE0;
		StartIndex = MICRON_INDEX_START;
	}else if(ReadBfrPtr[1] == SPANSION_ID_BYTE0) {
		FlashMake = SPANSION_ID_BYTE0;
		StartIndex = SPANSION_INDEX_START;
	}else if(ReadBfrPtr[1] == WINBOND_ID_BYTE0) {
		FlashMake = WINBOND_ID_BYTE0;
		StartIndex = WINBOND_INDEX_START;
	} else if(ReadBfrPtr[1] == MACRONIX_ID_BYTE0) {
		FlashMake = MACRONIX_ID_BYTE0;
		StartIndex = MACRONIX_INDEX_START;
	} else if(ReadBfrPtr[0] == ISSI_ID_BYTE0) {
		FlashMake = ISSI_ID_BYTE0;
		StartIndex = ISSI_INDEX_START;
	}
	if(((FlashMake == MICRON_ID_BYTE0) || (FlashMake == SPANSION_ID_BYTE0)||
			(FlashMake == WINBOND_ID_BYTE0)) &&
			(ReadBfrPtr[3] == MICRON_ID_BYTE2_128)) {
		switch(QspiPtr->Config.ConnectionMode)
		{
			case XQSPIPS_CONNECTION_MODE_SINGLE:
				FCTIndex = FLASH_CFG_TBL_SINGLE_128_SP + StartIndex;
				break;
			case XQSPIPS_CONNECTION_MODE_PARALLEL:
				FCTIndex = FLASH_CFG_TBL_PARALLEL_128_SP + StartIndex;
				break;
			case XQSPIPS_CONNECTION_MODE_STACKED:
				FCTIndex = FLASH_CFG_TBL_STACKED_128_SP + StartIndex;
				break;
			default:
				FCTIndex = 0;
				break;
		}
	}
	if(((FlashMake == MICRON_ID_BYTE0) || (FlashMake == SPANSION_ID_BYTE0)
			|| (FlashMake == MACRONIX_ID_BYTE0)) &&
			(ReadBfrPtr[3] == MICRON_ID_BYTE2_256)) {
		switch(QspiPtr->Config.ConnectionMode)
		{
			case XQSPIPS_CONNECTION_MODE_SINGLE:
				FCTIndex = FLASH_CFG_TBL_SINGLE_256_SP + StartIndex;
				break;
			case XQSPIPS_CONNECTION_MODE_PARALLEL:
				FCTIndex = FLASH_CFG_TBL_PARALLEL_256_SP + StartIndex;
				break;
			case XQSPIPS_CONNECTION_MODE_STACKED:
				FCTIndex = FLASH_CFG_TBL_STACKED_256_SP + StartIndex;
				break;
			default:
				FCTIndex = 0;
				break;
		}
	}
	if((FlashMake == ISSI_ID_BYTE0) &&
			(ReadBfrPtr[2] == MICRON_ID_BYTE2_256)) {
		switch(QspiPtr->Config.ConnectionMode)
		{
			case XQSPIPS_CONNECTION_MODE_SINGLE:
				FCTIndex = FLASH_CFG_TBL_SINGLE_256_ISSI;
				break;
			case XQSPIPS_CONNECTION_MODE_PARALLEL:
				FCTIndex = FLASH_CFG_TBL_PARALLEL_256_ISSI;
				break;
			case XQSPIPS_CONNECTION_MODE_STACKED:
				FCTIndex = FLASH_CFG_TBL_STACKED_256_ISSI;
				break;
			default:
				FCTIndex = 0;
				break;
		}
	}
	if ((((FlashMake == MICRON_ID_BYTE0) || (FlashMake == SPANSION_ID_BYTE0)) &&
			(ReadBfrPtr[3] == MICRON_ID_BYTE2_512)) || ((FlashMake ==
			MACRONIX_ID_BYTE0) && (ReadBfrPtr[3] == MACRONIX_ID_BYTE2_512))) {
		switch(QspiPtr->Config.ConnectionMode)
		{
			case XQSPIPS_CONNECTION_MODE_SINGLE:
				FCTIndex = FLASH_CFG_TBL_SINGLE_512_SP + StartIndex;
				break;
			case XQSPIPS_CONNECTION_MODE_PARALLEL:
				FCTIndex = FLASH_CFG_TBL_PARALLEL_512_SP + StartIndex;
				break;
			case XQSPIPS_CONNECTION_MODE_STACKED:
				FCTIndex = FLASH_CFG_TBL_STACKED_512_SP + StartIndex;
				break;
			default:
				FCTIndex = 0;
				break;
		}
	}
	if(((FlashMake == MICRON_ID_BYTE0) &&
		(ReadBfrPtr[3] == MICRON_ID_BYTE2_1G)) ||
		((FlashMake == MACRONIX_ID_BYTE0) &&
		 (ReadBfrPtr[3] == MACRONIX_ID_BYTE2_1G))) {
		switch(QspiPtr->Config.ConnectionMode)
		{
			case XQSPIPS_CONNECTION_MODE_SINGLE:
				FCTIndex = FLASH_CFG_TBL_SINGLE_1GB_MC;
				break;
			case XQSPIPS_CONNECTION_MODE_PARALLEL:
				FCTIndex = FLASH_CFG_TBL_PARALLEL_1GB_MC;
				break;
			case XQSPIPS_CONNECTION_MODE_STACKED:
				FCTIndex = FLASH_CFG_TBL_STACKED_1GB_MC;
				break;
			default:
				FCTIndex = 0;
				break;
		}
	}
	xil_printf("FlashID=0x%x 0x%x 0x%x\n\r", ReadBfrPtr[1], ReadBfrPtr[2],
		   ReadBfrPtr[3]);
	return XST_SUCCESS;
}
int FlashReadID ( XQspiPs * QspiPtr , u8 * WriteBfrPtr , u8 * ReadBfrPtr ) { int Status ; int StartIndex ; WriteBfrPtr [ COMMAND_OFFSET ] = READ_ID ; WriteBfrPtr [ ADDRESS_1_OFFSET ] = 0x23 ; WriteBfrPtr [ ADDRESS_2_OFFSET ] = 0x08 ; WriteBfrPtr [ ADDRESS_3_OFFSET ] = 0x09 ; Status = XQspiPs_PolledTransfer ( QspiPtr , WriteBfrPtr , ReadBfrPtr , RD_ID_SIZE ) ; if ( Status != XST_SUCCESS ) { return XST_FAILURE ; } if ( ReadBfrPtr [ 1 ] == MICRON_ID_BYTE0 ) { FlashMake = MICRON_ID_BYTE0 ; StartIndex = MICRON_INDEX_START ; } else if ( ReadBfrPtr [ 1 ] == SPANSION_ID_BYTE0 ) { FlashMake = SPANSION_ID_BYTE0 ; StartIndex = SPANSION_INDEX_START ; } else if ( ReadBfrPtr [ 1 ] == WINBOND_ID_BYTE0 ) { FlashMake = WINBOND_ID_BYTE0 ; StartIndex = WINBOND_INDEX_START ; } else if ( ReadBfrPtr [ 1 ] == MACRONIX_ID_BYTE0 ) { FlashMake = MACRONIX_ID_BYTE0 ; StartIndex = MACRONIX_INDEX_START ; } else if ( ReadBfrPtr [ 0 ] == ISSI_ID_BYTE0 ) { FlashMake = ISSI_ID_BYTE0 ; StartIndex = ISSI_INDEX_START ; } if ( ( ( FlashMake == MICRON_ID_BYTE0 ) || ( FlashMake == SPANSION_ID_BYTE0 ) || ( FlashMake == WINBOND_ID_BYTE0 ) ) && ( ReadBfrPtr [ 3 ] == MICRON_ID_BYTE2_128 ) ) { switch ( QspiPtr -> Config . ConnectionMode ) { case XQSPIPS_CONNECTION_MODE_SINGLE : FCTIndex = FLASH_CFG_TBL_SINGLE_128_SP + StartIndex ; break ; case XQSPIPS_CONNECTION_MODE_PARALLEL : FCTIndex = FLASH_CFG_TBL_PARALLEL_128_SP + StartIndex ; break ; case XQSPIPS_CONNECTION_MODE_STACKED : FCTIndex = FLASH_CFG_TBL_STACKED_128_SP + StartIndex ; break ; default : FCTIndex = 0 ; break ; } } if ( ( ( FlashMake == MICRON_ID_BYTE0 ) || ( FlashMake == SPANSION_ID_BYTE0 ) || ( FlashMake == MACRONIX_ID_BYTE0 ) ) && ( ReadBfrPtr [ 3 ] == MICRON_ID_BYTE2_256 ) ) { switch ( QspiPtr -> Config . ConnectionMode ) { case XQSPIPS_CONNECTION_MODE_SINGLE : FCTIndex = FLASH_CFG_TBL_SINGLE_256_SP + StartIndex ; break ; case XQSPIPS_CONNECTION_MODE_PARALLEL : FCTIndex = FLASH_CFG_TBL_PARALLEL_256_SP + StartIndex ; break ; case XQSPIPS_CONNECTION_MODE_STACKED : FCTIndex = FLASH_CFG_TBL_STACKED_256_SP + StartIndex ; break ; default : FCTIndex = 0 ; break ; } } if ( ( FlashMake == ISSI_ID_BYTE0 ) && ( ReadBfrPtr [ 2 ] == MICRON_ID_BYTE2_256 ) ) { switch ( QspiPtr -> Config . ConnectionMode ) { case XQSPIPS_CONNECTION_MODE_SINGLE : FCTIndex = FLASH_CFG_TBL_SINGLE_256_ISSI ; break ; case XQSPIPS_CONNECTION_MODE_PARALLEL : FCTIndex = FLASH_CFG_TBL_PARALLEL_256_ISSI ; break ; case XQSPIPS_CONNECTION_MODE_STACKED : FCTIndex = FLASH_CFG_TBL_STACKED_256_ISSI ; break ; default : FCTIndex = 0 ; break ; } } if ( ( ( ( FlashMake == MICRON_ID_BYTE0 ) || ( FlashMake == SPANSION_ID_BYTE0 ) ) && ( ReadBfrPtr [ 3 ] == MICRON_ID_BYTE2_512 ) ) || ( ( FlashMake == MACRONIX_ID_BYTE0 ) && ( ReadBfrPtr [ 3 ] == MACRONIX_ID_BYTE2_512 ) ) ) { switch ( QspiPtr -> Config . ConnectionMode ) { case XQSPIPS_CONNECTION_MODE_SINGLE : FCTIndex = FLASH_CFG_TBL_SINGLE_512_SP + StartIndex ; break ; case XQSPIPS_CONNECTION_MODE_PARALLEL : FCTIndex = FLASH_CFG_TBL_PARALLEL_512_SP + StartIndex ; break ; case XQSPIPS_CONNECTION_MODE_STACKED : FCTIndex = FLASH_CFG_TBL_STACKED_512_SP + StartIndex ; break ; default : FCTIndex = 0 ; break ; } } if ( ( ( FlashMake == MICRON_ID_BYTE0 ) && ( ReadBfrPtr [ 3 ] == MICRON_ID_BYTE2_1G ) ) || ( ( FlashMake == MACRONIX_ID_BYTE0 ) && ( ReadBfrPtr [ 3 ] == MACRONIX_ID_BYTE2_1G ) ) ) { switch ( QspiPtr -> Config . ConnectionMode ) { case XQSPIPS_CONNECTION_MODE_SINGLE : FCTIndex = FLASH_CFG_TBL_SINGLE_1GB_MC ; break ; case XQSPIPS_CONNECTION_MODE_PARALLEL : FCTIndex = FLASH_CFG_TBL_PARALLEL_1GB_MC ; break ; case XQSPIPS_CONNECTION_MODE_STACKED : FCTIndex = FLASH_CFG_TBL_STACKED_1GB_MC ; break ; default : FCTIndex = 0 ; break ; } } xil_printf ( " \n \r " , ReadBfrPtr [ 1 ] , ReadBfrPtr [ 2 ] , ReadBfrPtr [ 3 ] ) ; return XST_SUCCESS ; }
This function reads serial Flash ID connected to the SPI interface.
This function reads serial Flash ID connected to the SPI interface .
/*
	 * Read ID in Auto mode.
	 */ /* 3 dummy bytes */ /*
	 * Deduce flash make
	 */ /*
	 * If valid flash ID, then check connection mode & size and
	 * assign corresponding index in the Flash configuration table
	 */ /* 256 and 512Mbit supported only for Micron and Spansion, not Winbond */ /*
	 * 1Gbit Single connection supported for Spansion.
	 * The ConnectionMode will indicate stacked as this part has 2 SS
	 * The device ID will indicate 512Mbit.
	 * This configuration is handled as the above 512Mbit stacked configuration
	 */ /* 1Gbit single, parallel and stacked supported for Micron */