XilinxProcessorIPLib/drivers/aiengine/examples/xaie-events.c
static int init_irq()
{
	int ret = 0;
	XScuGic_Config *IntcConfig;	/* The configuration parameters of
					   the interrupt controller */
	Xil_ExceptionDisable();

	/* Initialize the interrupt controller driver */
	IntcConfig = XScuGic_LookupConfig(INTC_DEVICE_ID);
	if (NULL == IntcConfig) {
		return (int)XST_FAILURE;
	}

	ret = XScuGic_CfgInitialize(&xInterruptController, IntcConfig,
			       IntcConfig->CpuBaseAddress);
	if (ret != XST_SUCCESS) {
		return (int)XST_FAILURE;
	}

	/*
	 * Register the interrupt handler to the hardware interrupt handling
	 * logic in the ARM processor.
	 */
	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_IRQ_INT,
				(Xil_ExceptionHandler)XScuGic_InterruptHandler,
				&xInterruptController);

	Xil_ExceptionEnable();
	/* Connect Interrupt */
	XScuGic_Connect(&xInterruptController, IRQ1_VECT_ID,
		   (Xil_InterruptHandler)XAieTile_EventsIsr,
		   (void *)(&AieInst));

	XScuGic_Enable(&xInterruptController, IRQ1_VECT_ID);

	printf("%s\n", __func__);

	return 0;
}
/*****************************************************************************/
/**
*
* This is to intialize interrupt controller
* It will register the AI engine driver interrupt handler to the interrupt
* controller.
*
* @param	None.
*
* @return	0 for success, and negative value for failure.

* @note		This is required to enable AI engine interrupt. It will
*		connect the AI engine driver interrupt handler to the interrupt
*		controller driver.
*		This is required to by done by the baremetal application, as
*		there is no interrupt abstraction in baremetal. The interrupt
*		controller instance is maintained by application. There is no
*		generic function for driver to call to register interrupt
*		handller for baremetal.
*
*******************************************************************************/
This is to intialize interrupt controller
It will register the AI engine driver interrupt handler to the interrupt
controller.
This is to intialize interrupt controller It will register the AI engine driver interrupt handler to the interrupt controller .
static int init_irq()
{
	int ret = 0;
	XScuGic_Config *IntcConfig;	
	Xil_ExceptionDisable();
	IntcConfig = XScuGic_LookupConfig(INTC_DEVICE_ID);
	if (NULL == IntcConfig) {
		return (int)XST_FAILURE;
	}
	ret = XScuGic_CfgInitialize(&xInterruptController, IntcConfig,
			       IntcConfig->CpuBaseAddress);
	if (ret != XST_SUCCESS) {
		return (int)XST_FAILURE;
	}
	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_IRQ_INT,
				(Xil_ExceptionHandler)XScuGic_InterruptHandler,
				&xInterruptController);
	Xil_ExceptionEnable();
	XScuGic_Connect(&xInterruptController, IRQ1_VECT_ID,
		   (Xil_InterruptHandler)XAieTile_EventsIsr,
		   (void *)(&AieInst));
	XScuGic_Enable(&xInterruptController, IRQ1_VECT_ID);
	printf("%s\n", __func__);
	return 0;
}
static int init_irq ( ) { int ret = 0 ; XScuGic_Config * IntcConfig ; Xil_ExceptionDisable ( ) ; IntcConfig = XScuGic_LookupConfig ( INTC_DEVICE_ID ) ; if ( NULL == IntcConfig ) { return ( int ) XST_FAILURE ; } ret = XScuGic_CfgInitialize ( & xInterruptController , IntcConfig , IntcConfig -> CpuBaseAddress ) ; if ( ret != XST_SUCCESS ) { return ( int ) XST_FAILURE ; } Xil_ExceptionRegisterHandler ( XIL_EXCEPTION_ID_IRQ_INT , ( Xil_ExceptionHandler ) XScuGic_InterruptHandler , & xInterruptController ) ; Xil_ExceptionEnable ( ) ; XScuGic_Connect ( & xInterruptController , IRQ1_VECT_ID , ( Xil_InterruptHandler ) XAieTile_EventsIsr , ( void * ) ( & AieInst ) ) ; XScuGic_Enable ( & xInterruptController , IRQ1_VECT_ID ) ; printf ( " \n " , __func__ ) ; return 0 ; }
This is to intialize interrupt controller
It will register the AI engine driver interrupt handler to the interrupt
controller.
This is to intialize interrupt controller It will register the AI engine driver interrupt handler to the interrupt controller .
/* The configuration parameters of
					   the interrupt controller */ /* Initialize the interrupt controller driver */ /*
	 * Register the interrupt handler to the hardware interrupt handling
	 * logic in the ARM processor.
	 */ /* Connect Interrupt */