XilinxProcessorIPLib/drivers/clockps/src/xclockps_divider.c
static XStatus XClock_DivFetchIdx(XClock_OutputClks ClockId, u8 *DivIndex)
{
	u8 Idx;

	/* Validate Args */
	XCLOCK_VALIDATE_INDEX(OP, ClockId);
	XCLOCK_VALIDATE_PTR(DivIndex);

	for (Idx = 0; Idx < CLK_ARRAY_SIZE(DivMap); Idx++) {
		if (DivMap[Idx].ClockId == ClockId) {
			*DivIndex = DivMap[Idx].DivIndex;
			return XST_SUCCESS;
		}
	}

	return XST_INVALID_PARAM;
}
/*****************************************************************************/
/*
*
* This function looks for the output clock mapped to divider and returns the
* divider index.
*
* @param	ClockId is the identifier for output clock.
* @param	DivIndex is the index of output clock in divider database.
*
* @return	XST_SUCCESS if successful.
*		XST_INVALID_PARAM if output clock mapping not found.
*
* @note		None.
*
******************************************************************************/
This function looks for the output clock mapped to divider and returns the
divider index.
This function looks for the output clock mapped to divider and returns the divider index .
static XStatus XClock_DivFetchIdx(XClock_OutputClks ClockId, u8 *DivIndex)
{
	u8 Idx;
	XCLOCK_VALIDATE_INDEX(OP, ClockId);
	XCLOCK_VALIDATE_PTR(DivIndex);
	for (Idx = 0; Idx < CLK_ARRAY_SIZE(DivMap); Idx++) {
		if (DivMap[Idx].ClockId == ClockId) {
			*DivIndex = DivMap[Idx].DivIndex;
			return XST_SUCCESS;
		}
	}
	return XST_INVALID_PARAM;
}
static XStatus XClock_DivFetchIdx ( XClock_OutputClks ClockId , u8 * DivIndex ) { u8 Idx ; XCLOCK_VALIDATE_INDEX ( OP , ClockId ) ; XCLOCK_VALIDATE_PTR ( DivIndex ) ; for ( Idx = 0 ; Idx < CLK_ARRAY_SIZE ( DivMap ) ; Idx ++ ) { if ( DivMap [ Idx ] . ClockId == ClockId ) { * DivIndex = DivMap [ Idx ] . DivIndex ; return XST_SUCCESS ; } } return XST_INVALID_PARAM ; }
This function looks for the output clock mapped to divider and returns the
divider index.
This function looks for the output clock mapped to divider and returns the divider index .
/* Validate Args */