XilinxProcessorIPLib/drivers/vphy/src/xvphy.c
void XVphy_IBufDsEnable(XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir,
		u8 Enable)
{
	XVphy_PllRefClkSelType *TypePtr, *DruTypePtr, DruTypeDummy;
	u32 RegAddr = XVPHY_IBUFDS_GTXX_CTRL_REG;
	u32 RegVal;
	u32 MaskVal = 0;
	DruTypeDummy = XVPHY_PLL_REFCLKSEL_TYPE_GTGREFCLK;
	DruTypePtr = &DruTypeDummy;

	/* Suppress Warning Messages */
	QuadId = QuadId;

	if (Dir == XVPHY_DIR_TX) {
		TypePtr = &InstancePtr->Config.TxRefClkSel;
	}
	else {
		TypePtr = &InstancePtr->Config.RxRefClkSel;
		if (InstancePtr->Config.DruIsPresent) {
			DruTypePtr = &InstancePtr->Config.DruRefClkSel;
		}
	}

	if ((*TypePtr == XVPHY_PLL_REFCLKSEL_TYPE_GTREFCLK0) ||
			((InstancePtr->Config.DruIsPresent) &&
			(*DruTypePtr == XVPHY_PLL_REFCLKSEL_TYPE_GTREFCLK0))) {
		MaskVal = XVPHY_IBUFDS_GTXX_CTRL_GTREFCLK0_CEB_MASK;
	}
	else if ((*TypePtr == XVPHY_PLL_REFCLKSEL_TYPE_GTREFCLK1) ||
			((InstancePtr->Config.DruIsPresent) &&
			(*DruTypePtr == XVPHY_PLL_REFCLKSEL_TYPE_GTREFCLK1))) {
		MaskVal = XVPHY_IBUFDS_GTXX_CTRL_GTREFCLK1_CEB_MASK;
	}
	else {
		if (Dir == XVPHY_DIR_TX) {
			RegAddr = XVPHY_MISC_TXUSRCLK_REG;
		}
		else {
			RegAddr = XVPHY_MISC_RXUSRCLK_REG;
		}
		MaskVal = XVPHY_MISC_XXUSRCLK_REFCLK_CEB_MASK;
	}

	RegVal = XVphy_ReadReg(InstancePtr->Config.BaseAddr, RegAddr);

	if (Enable) {
		RegVal &= ~MaskVal;
	}
	else {
		RegVal |= MaskVal;
	}
	XVphy_WriteReg(InstancePtr->Config.BaseAddr, RegAddr, RegVal);
}
/*****************************************************************************/
/**
* This function enables the TX or RX IBUFDS peripheral.
*
* @param	InstancePtr is a pointer to the XVphy core instance.
* @param	Dir is an indicator for TX or RX.
* @param	Enable specifies TRUE/FALSE value to either enable or disable
*		the IBUFDS, respectively.
*
* @return	None.
*
******************************************************************************/
This function enables the TX or RX IBUFDS peripheral.
This function enables the TX or RX IBUFDS peripheral .
void XVphy_IBufDsEnable(XVphy *InstancePtr, u8 QuadId, XVphy_DirectionType Dir,
		u8 Enable)
{
	XVphy_PllRefClkSelType *TypePtr, *DruTypePtr, DruTypeDummy;
	u32 RegAddr = XVPHY_IBUFDS_GTXX_CTRL_REG;
	u32 RegVal;
	u32 MaskVal = 0;
	DruTypeDummy = XVPHY_PLL_REFCLKSEL_TYPE_GTGREFCLK;
	DruTypePtr = &DruTypeDummy;
	QuadId = QuadId;
	if (Dir == XVPHY_DIR_TX) {
		TypePtr = &InstancePtr->Config.TxRefClkSel;
	}
	else {
		TypePtr = &InstancePtr->Config.RxRefClkSel;
		if (InstancePtr->Config.DruIsPresent) {
			DruTypePtr = &InstancePtr->Config.DruRefClkSel;
		}
	}
	if ((*TypePtr == XVPHY_PLL_REFCLKSEL_TYPE_GTREFCLK0) ||
			((InstancePtr->Config.DruIsPresent) &&
			(*DruTypePtr == XVPHY_PLL_REFCLKSEL_TYPE_GTREFCLK0))) {
		MaskVal = XVPHY_IBUFDS_GTXX_CTRL_GTREFCLK0_CEB_MASK;
	}
	else if ((*TypePtr == XVPHY_PLL_REFCLKSEL_TYPE_GTREFCLK1) ||
			((InstancePtr->Config.DruIsPresent) &&
			(*DruTypePtr == XVPHY_PLL_REFCLKSEL_TYPE_GTREFCLK1))) {
		MaskVal = XVPHY_IBUFDS_GTXX_CTRL_GTREFCLK1_CEB_MASK;
	}
	else {
		if (Dir == XVPHY_DIR_TX) {
			RegAddr = XVPHY_MISC_TXUSRCLK_REG;
		}
		else {
			RegAddr = XVPHY_MISC_RXUSRCLK_REG;
		}
		MaskVal = XVPHY_MISC_XXUSRCLK_REFCLK_CEB_MASK;
	}
	RegVal = XVphy_ReadReg(InstancePtr->Config.BaseAddr, RegAddr);
	if (Enable) {
		RegVal &= ~MaskVal;
	}
	else {
		RegVal |= MaskVal;
	}
	XVphy_WriteReg(InstancePtr->Config.BaseAddr, RegAddr, RegVal);
}
void XVphy_IBufDsEnable ( XVphy * InstancePtr , u8 QuadId , XVphy_DirectionType Dir , u8 Enable ) { XVphy_PllRefClkSelType * TypePtr , * DruTypePtr , DruTypeDummy ; u32 RegAddr = XVPHY_IBUFDS_GTXX_CTRL_REG ; u32 RegVal ; u32 MaskVal = 0 ; DruTypeDummy = XVPHY_PLL_REFCLKSEL_TYPE_GTGREFCLK ; DruTypePtr = & DruTypeDummy ; QuadId = QuadId ; if ( Dir == XVPHY_DIR_TX ) { TypePtr = & InstancePtr -> Config . TxRefClkSel ; } else { TypePtr = & InstancePtr -> Config . RxRefClkSel ; if ( InstancePtr -> Config . DruIsPresent ) { DruTypePtr = & InstancePtr -> Config . DruRefClkSel ; } } if ( ( * TypePtr == XVPHY_PLL_REFCLKSEL_TYPE_GTREFCLK0 ) || ( ( InstancePtr -> Config . DruIsPresent ) && ( * DruTypePtr == XVPHY_PLL_REFCLKSEL_TYPE_GTREFCLK0 ) ) ) { MaskVal = XVPHY_IBUFDS_GTXX_CTRL_GTREFCLK0_CEB_MASK ; } else if ( ( * TypePtr == XVPHY_PLL_REFCLKSEL_TYPE_GTREFCLK1 ) || ( ( InstancePtr -> Config . DruIsPresent ) && ( * DruTypePtr == XVPHY_PLL_REFCLKSEL_TYPE_GTREFCLK1 ) ) ) { MaskVal = XVPHY_IBUFDS_GTXX_CTRL_GTREFCLK1_CEB_MASK ; } else { if ( Dir == XVPHY_DIR_TX ) { RegAddr = XVPHY_MISC_TXUSRCLK_REG ; } else { RegAddr = XVPHY_MISC_RXUSRCLK_REG ; } MaskVal = XVPHY_MISC_XXUSRCLK_REFCLK_CEB_MASK ; } RegVal = XVphy_ReadReg ( InstancePtr -> Config . BaseAddr , RegAddr ) ; if ( Enable ) { RegVal &= ~ MaskVal ; } else { RegVal |= MaskVal ; } XVphy_WriteReg ( InstancePtr -> Config . BaseAddr , RegAddr , RegVal ) ; }
This function enables the TX or RX IBUFDS peripheral.
This function enables the TX or RX IBUFDS peripheral .
/* Suppress Warning Messages */