XilinxProcessorIPLib/drivers/sysmonpsu/src/xsysmonpsu.c
u64 XSysMonPsu_GetSeqAvgEnables(XSysMonPsu *InstancePtr, u32 SysmonBlk)
{
	u64 RegVal;
	UINTPTR EffectiveBaseAddress;

	/* Assert the arguments. */
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));

	/* Calculate the effective baseaddress based on the Sysmon instance. */
	EffectiveBaseAddress =
			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
					SysmonBlk);

	/*
	 * Read the averaging enable status for all the channels from the
	 * ADC Channel Averaging Enables Sequencer Registers.
	 */
	RegVal = (u64)XSysmonPsu_ReadReg(EffectiveBaseAddress +
			XSYSMONPSU_SEQ_AVERAGE0_OFFSET) & XSYSMONPSU_SEQ_AVERAGE0_MASK;
	RegVal |= ((u64)XSysmonPsu_ReadReg(EffectiveBaseAddress +
			XSYSMONPSU_SEQ_AVERAGE1_OFFSET) & XSYSMONPSU_SEQ_AVERAGE1_MASK) <<
			XSM_SEQ_CH_SHIFT;
	RegVal |= ((u64)XSysmonPsu_ReadReg(EffectiveBaseAddress +
			XSYSMONPSU_SEQ_AVERAGE2_OFFSET) &
			XSYSMONPSU_SEQ_AVERAGE2_MASK) << XSM_SEQ_CH2_SHIFT;

	return RegVal;
}
/****************************************************************************/
/**
*
* This function returns the channels for which the averaging has been enabled
* in the ADC Channel Averaging Enables Sequencer Registers.
*
* @param	InstancePtr is a pointer to the XSysMonPsu instance.
* @param	SysmonBlk is the value that tells whether it is for PS Sysmon
*       block or PL Sysmon block register region.
*
* @returns 	The status of averaging (enabled/disabled) for all the channels.
*		Use XSYSMONPSU_SEQ_AVERAGE* defined in xsysmonpsu_hw.h to interpret the
*		Channel numbers. Bit masks of 1 are the channels for which
*		averaging is enabled and bit mask of 0 are the channels for
*		averaging is disabled.
*
* @note		None.
*
*****************************************************************************/
This function returns the channels for which the averaging has been enabled
in the ADC Channel Averaging Enables Sequencer Registers.
This function returns the channels for which the averaging has been enabled in the ADC Channel Averaging Enables Sequencer Registers .
u64 XSysMonPsu_GetSeqAvgEnables(XSysMonPsu *InstancePtr, u32 SysmonBlk)
{
	u64 RegVal;
	UINTPTR EffectiveBaseAddress;
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
	Xil_AssertNonvoid((SysmonBlk == XSYSMON_PS)||(SysmonBlk == XSYSMON_PL));
	EffectiveBaseAddress =
			XSysMonPsu_GetEffBaseAddress(InstancePtr->Config.BaseAddress,
					SysmonBlk);
	RegVal = (u64)XSysmonPsu_ReadReg(EffectiveBaseAddress +
			XSYSMONPSU_SEQ_AVERAGE0_OFFSET) & XSYSMONPSU_SEQ_AVERAGE0_MASK;
	RegVal |= ((u64)XSysmonPsu_ReadReg(EffectiveBaseAddress +
			XSYSMONPSU_SEQ_AVERAGE1_OFFSET) & XSYSMONPSU_SEQ_AVERAGE1_MASK) <<
			XSM_SEQ_CH_SHIFT;
	RegVal |= ((u64)XSysmonPsu_ReadReg(EffectiveBaseAddress +
			XSYSMONPSU_SEQ_AVERAGE2_OFFSET) &
			XSYSMONPSU_SEQ_AVERAGE2_MASK) << XSM_SEQ_CH2_SHIFT;
	return RegVal;
}
u64 XSysMonPsu_GetSeqAvgEnables ( XSysMonPsu * InstancePtr , u32 SysmonBlk ) { u64 RegVal ; UINTPTR EffectiveBaseAddress ; Xil_AssertNonvoid ( InstancePtr != NULL ) ; Xil_AssertNonvoid ( InstancePtr -> IsReady == XIL_COMPONENT_IS_READY ) ; Xil_AssertNonvoid ( ( SysmonBlk == XSYSMON_PS ) || ( SysmonBlk == XSYSMON_PL ) ) ; EffectiveBaseAddress = XSysMonPsu_GetEffBaseAddress ( InstancePtr -> Config . BaseAddress , SysmonBlk ) ; RegVal = ( u64 ) XSysmonPsu_ReadReg ( EffectiveBaseAddress + XSYSMONPSU_SEQ_AVERAGE0_OFFSET ) & XSYSMONPSU_SEQ_AVERAGE0_MASK ; RegVal |= ( ( u64 ) XSysmonPsu_ReadReg ( EffectiveBaseAddress + XSYSMONPSU_SEQ_AVERAGE1_OFFSET ) & XSYSMONPSU_SEQ_AVERAGE1_MASK ) << XSM_SEQ_CH_SHIFT ; RegVal |= ( ( u64 ) XSysmonPsu_ReadReg ( EffectiveBaseAddress + XSYSMONPSU_SEQ_AVERAGE2_OFFSET ) & XSYSMONPSU_SEQ_AVERAGE2_MASK ) << XSM_SEQ_CH2_SHIFT ; return RegVal ; }
This function returns the channels for which the averaging has been enabled
in the ADC Channel Averaging Enables Sequencer Registers.
This function returns the channels for which the averaging has been enabled in the ADC Channel Averaging Enables Sequencer Registers .
/* Assert the arguments. */ /* Calculate the effective baseaddress based on the Sysmon instance. */ /*
	 * Read the averaging enable status for all the channels from the
	 * ADC Channel Averaging Enables Sequencer Registers.
	 */