XilinxProcessorIPLib/drivers/dp14txss/examples/xdptxss_debug_example.c
u32 DpTxSs_DebugExample(u16 DeviceId)
{
	u32 Status;
	u8 VSplitMode = 0;
	XDpTxSs_Config *ConfigPtr;

	/* Do platform initialization in this function. This is hardware
	 * system specific. It is up to the user to implement this function.
	 */
	xil_printf("PlatformInit\n\r");
	Status = DpTxSs_PlatformInit();
	if (Status != XST_SUCCESS) {
		xil_printf("Platform init failed!\n\r");
	}
	xil_printf("Platform initialization done.\n\r");

	/* Obtain the device configuration for the DisplayPort TX Subsystem */
	ConfigPtr = XDpTxSs_LookupConfig(DeviceId);
	if (!ConfigPtr) {
		return XST_FAILURE;
	}
	/* Copy the device configuration into the DpTxSsInst's Config
	 * structure. */
	Status = XDpTxSs_CfgInitialize(&DpTxSsInst, ConfigPtr,
					ConfigPtr->BaseAddress);
	if (Status != XST_SUCCESS) {
		xil_printf("DPTXSS config initialization failed.\n\r");
		return XST_FAILURE;
	}

	/* Check for SST/MST support */
	if (DpTxSsInst.UsrOpt.MstSupport) {
		xil_printf("\n\rINFO:DPTXSS is MST enabled. DPTXSS can be "
			"switched to SST/MST\n\r\n\r");
	}
	else {
		xil_printf("\n\rINFO:DPTXSS is  SST enabled. DPTXSS works "
			"only in SST mode.\n\r\n\r");
	}

	/* Disable interrupts. */
	Xil_ExceptionDisable();

	/* Read capabilities of RX device */
	Status = XDpTxSs_GetRxCapabilities(&DpTxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: RX device is not connected.\r\n");

		/* Enable interrupts. */
		Xil_ExceptionEnable();

		return XST_FAILURE;
	}

	/* Set Link rate and lane count to maximum */
	XDpTxSs_SetLinkRate(&DpTxSsInst, DPTXSS_LINK_RATE);
	XDpTxSs_SetLaneCount(&DpTxSsInst, DPTXSS_LANE_COUNT);

	/* Set video mode */
	XDpTxSs_SetVidMode(&DpTxSsInst, DPTXSS_VID_MODE);

	/* Set BPC */
	XDpTxSs_SetBpc(&DpTxSsInst, DPTXSS_BPC);

	/* Check whether DPTXSS and RX device is in MST */
	Status = XDpTxSs_IsMstCapable(&DpTxSsInst);
	if (DpTxSsInst.UsrOpt.MstSupport && DPTXSS_MST &&
		(Status == XST_SUCCESS)) {
		/* Set DPTXSS in MST mode */
		XDpTxSs_SetTransportMode(&DpTxSsInst, 1);
	}
	else {
		/* Set DPTXSS in SST mode */
		XDpTxSs_SetTransportMode(&DpTxSsInst, 0);
	}

	/* Start DPTXSS parameters set */
	Status = XDpTxSs_Start(&DpTxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR:DPTX SS start failed\n\r");

		/* Enable interrupts. */
		Xil_ExceptionEnable();

		return XST_FAILURE;
	}

	if ((DpTxSsInst.UsrOpt.VmId == (XVIDC_VM_UHD2_60_P)) &&
				(DpTxSsInst.UsrOpt.MstSupport)) {
		VSplitMode = 1;
	}
	else {
		VSplitMode = 0;
	}

	/* Do stream setup in this function. It is up to the user to implement
	* this function.
	 */
	DpTxSs_StreamSrc(VSplitMode);

	/* Print available sub-cores of subsystem */
	XDpTxSs_ReportCoreInfo(&DpTxSsInst);

	/* Print link info that was configured during link training */
	XDpTxSs_ReportLinkInfo(&DpTxSsInst);

	/* Print Multi-stream attributes being set during subsystem set up */
	XDpTxSs_ReportMsaInfo(&DpTxSsInst);

	/* Print RX device capability info */
	XDpTxSs_ReportSinkCapInfo(&DpTxSsInst);

	/* Print current Dual Splitter values set */
	XDpTxSs_ReportSplitterInfo(&DpTxSsInst);

	/* Print current VTC(s) values set */
	XDpTxSs_ReportVtcInfo(&DpTxSsInst);

	/* Print EDID info of RX device(s) */
	DpTxSs_ReportEdidInfo(&DpTxSsInst);

	/* Print HDCP debug info */
	XDpTxSs_ReportHdcpInfo(&DpTxSsInst);

	/* Enable interrupts. */
	Xil_ExceptionEnable();

	return XST_SUCCESS;
}
/*****************************************************************************/
/**
*
* This function is the main entry point for the debug example using the
* XDpTxSs driver. This function will print values set during DisplayPort TX
* Subsystem set up to work in MST/SST based upon RX device capabilities.
*
* @param	DeviceId is the unique device ID of the DisplayPort TX
*		Subsystem core.
*
* @return
*		- XST_SUCCESS if DisplayPort TX Subsystem prints debug
*		information successfully.
*		- XST_FAILURE, otherwise.
*
* @note		None.
*
******************************************************************************/
This function is the main entry point for the debug example using the
XDpTxSs driver. This function will print values set during DisplayPort TX
Subsystem set up to work in MST/SST based upon RX device capabilities.
This function is the main entry point for the debug example using the XDpTxSs driver . This function will print values set during DisplayPort TX Subsystem set up to work in MST / SST based upon RX device capabilities .
u32 DpTxSs_DebugExample(u16 DeviceId)
{
	u32 Status;
	u8 VSplitMode = 0;
	XDpTxSs_Config *ConfigPtr;
	xil_printf("PlatformInit\n\r");
	Status = DpTxSs_PlatformInit();
	if (Status != XST_SUCCESS) {
		xil_printf("Platform init failed!\n\r");
	}
	xil_printf("Platform initialization done.\n\r");
	ConfigPtr = XDpTxSs_LookupConfig(DeviceId);
	if (!ConfigPtr) {
		return XST_FAILURE;
	}
	Status = XDpTxSs_CfgInitialize(&DpTxSsInst, ConfigPtr,
					ConfigPtr->BaseAddress);
	if (Status != XST_SUCCESS) {
		xil_printf("DPTXSS config initialization failed.\n\r");
		return XST_FAILURE;
	}
	if (DpTxSsInst.UsrOpt.MstSupport) {
		xil_printf("\n\rINFO:DPTXSS is MST enabled. DPTXSS can be "
			"switched to SST/MST\n\r\n\r");
	}
	else {
		xil_printf("\n\rINFO:DPTXSS is  SST enabled. DPTXSS works "
			"only in SST mode.\n\r\n\r");
	}
	Xil_ExceptionDisable();
	Status = XDpTxSs_GetRxCapabilities(&DpTxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: RX device is not connected.\r\n");
		Xil_ExceptionEnable();
		return XST_FAILURE;
	}
	XDpTxSs_SetLinkRate(&DpTxSsInst, DPTXSS_LINK_RATE);
	XDpTxSs_SetLaneCount(&DpTxSsInst, DPTXSS_LANE_COUNT);
	XDpTxSs_SetVidMode(&DpTxSsInst, DPTXSS_VID_MODE);
	XDpTxSs_SetBpc(&DpTxSsInst, DPTXSS_BPC);
	Status = XDpTxSs_IsMstCapable(&DpTxSsInst);
	if (DpTxSsInst.UsrOpt.MstSupport && DPTXSS_MST &&
		(Status == XST_SUCCESS)) {
		XDpTxSs_SetTransportMode(&DpTxSsInst, 1);
	}
	else {
		XDpTxSs_SetTransportMode(&DpTxSsInst, 0);
	}
	Status = XDpTxSs_Start(&DpTxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR:DPTX SS start failed\n\r");
		Xil_ExceptionEnable();
		return XST_FAILURE;
	}
	if ((DpTxSsInst.UsrOpt.VmId == (XVIDC_VM_UHD2_60_P)) &&
				(DpTxSsInst.UsrOpt.MstSupport)) {
		VSplitMode = 1;
	}
	else {
		VSplitMode = 0;
	}
	DpTxSs_StreamSrc(VSplitMode);
	XDpTxSs_ReportCoreInfo(&DpTxSsInst);
	XDpTxSs_ReportLinkInfo(&DpTxSsInst);
	XDpTxSs_ReportMsaInfo(&DpTxSsInst);
	XDpTxSs_ReportSinkCapInfo(&DpTxSsInst);
	XDpTxSs_ReportSplitterInfo(&DpTxSsInst);
	XDpTxSs_ReportVtcInfo(&DpTxSsInst);
	DpTxSs_ReportEdidInfo(&DpTxSsInst);
	XDpTxSs_ReportHdcpInfo(&DpTxSsInst);
	Xil_ExceptionEnable();
	return XST_SUCCESS;
}
u32 DpTxSs_DebugExample ( u16 DeviceId ) { u32 Status ; u8 VSplitMode = 0 ; XDpTxSs_Config * ConfigPtr ; xil_printf ( " \n \r " ) ; Status = DpTxSs_PlatformInit ( ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \n \r " ) ; } xil_printf ( " \n \r " ) ; ConfigPtr = XDpTxSs_LookupConfig ( DeviceId ) ; if ( ! ConfigPtr ) { return XST_FAILURE ; } Status = XDpTxSs_CfgInitialize ( & DpTxSsInst , ConfigPtr , ConfigPtr -> BaseAddress ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \n \r " ) ; return XST_FAILURE ; } if ( DpTxSsInst . UsrOpt . MstSupport ) { xil_printf ( " \n \r " " \n \r \n \r " ) ; } else { xil_printf ( " \n \r " " \n \r \n \r " ) ; } Xil_ExceptionDisable ( ) ; Status = XDpTxSs_GetRxCapabilities ( & DpTxSsInst ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \r \n " ) ; Xil_ExceptionEnable ( ) ; return XST_FAILURE ; } XDpTxSs_SetLinkRate ( & DpTxSsInst , DPTXSS_LINK_RATE ) ; XDpTxSs_SetLaneCount ( & DpTxSsInst , DPTXSS_LANE_COUNT ) ; XDpTxSs_SetVidMode ( & DpTxSsInst , DPTXSS_VID_MODE ) ; XDpTxSs_SetBpc ( & DpTxSsInst , DPTXSS_BPC ) ; Status = XDpTxSs_IsMstCapable ( & DpTxSsInst ) ; if ( DpTxSsInst . UsrOpt . MstSupport && DPTXSS_MST && ( Status == XST_SUCCESS ) ) { XDpTxSs_SetTransportMode ( & DpTxSsInst , 1 ) ; } else { XDpTxSs_SetTransportMode ( & DpTxSsInst , 0 ) ; } Status = XDpTxSs_Start ( & DpTxSsInst ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \n \r " ) ; Xil_ExceptionEnable ( ) ; return XST_FAILURE ; } if ( ( DpTxSsInst . UsrOpt . VmId == ( XVIDC_VM_UHD2_60_P ) ) && ( DpTxSsInst . UsrOpt . MstSupport ) ) { VSplitMode = 1 ; } else { VSplitMode = 0 ; } DpTxSs_StreamSrc ( VSplitMode ) ; XDpTxSs_ReportCoreInfo ( & DpTxSsInst ) ; XDpTxSs_ReportLinkInfo ( & DpTxSsInst ) ; XDpTxSs_ReportMsaInfo ( & DpTxSsInst ) ; XDpTxSs_ReportSinkCapInfo ( & DpTxSsInst ) ; XDpTxSs_ReportSplitterInfo ( & DpTxSsInst ) ; XDpTxSs_ReportVtcInfo ( & DpTxSsInst ) ; DpTxSs_ReportEdidInfo ( & DpTxSsInst ) ; XDpTxSs_ReportHdcpInfo ( & DpTxSsInst ) ; Xil_ExceptionEnable ( ) ; return XST_SUCCESS ; }
This function is the main entry point for the debug example using the
XDpTxSs driver.
This function is the main entry point for the debug example using the XDpTxSs driver .
/* Do platform initialization in this function. This is hardware
	 * system specific. It is up to the user to implement this function.
	 */ /* Obtain the device configuration for the DisplayPort TX Subsystem */ /* Copy the device configuration into the DpTxSsInst's Config
	 * structure. */ /* Check for SST/MST support */ /* Disable interrupts. */ /* Read capabilities of RX device */ /* Enable interrupts. */ /* Set Link rate and lane count to maximum */ /* Set video mode */ /* Set BPC */ /* Check whether DPTXSS and RX device is in MST */ /* Set DPTXSS in MST mode */ /* Set DPTXSS in SST mode */ /* Start DPTXSS parameters set */ /* Enable interrupts. */ /* Do stream setup in this function. It is up to the user to implement
	* this function.
	 */ /* Print available sub-cores of subsystem */ /* Print link info that was configured during link training */ /* Print Multi-stream attributes being set during subsystem set up */ /* Print RX device capability info */ /* Print current Dual Splitter values set */ /* Print current VTC(s) values set */ /* Print EDID info of RX device(s) */ /* Print HDCP debug info */ /* Enable interrupts. */