src/dpdk/drivers/net/igc/base/igc_mac.c
s32 igc_get_bus_info_pcie_generic(struct igc_hw *hw)
{
	struct igc_mac_info *mac = &hw->mac;
	struct igc_bus_info *bus = &hw->bus;
	s32 ret_val;
	u16 pcie_link_status;

	DEBUGFUNC("igc_get_bus_info_pcie_generic");

	bus->type = igc_bus_type_pci_express;

	ret_val = igc_read_pcie_cap_reg(hw, PCIE_LINK_STATUS,
					  &pcie_link_status);
	if (ret_val) {
		bus->width = igc_bus_width_unknown;
		bus->speed = igc_bus_speed_unknown;
	} else {
		switch (pcie_link_status & PCIE_LINK_SPEED_MASK) {
		case PCIE_LINK_SPEED_2500:
			bus->speed = igc_bus_speed_2500;
			break;
		case PCIE_LINK_SPEED_5000:
			bus->speed = igc_bus_speed_5000;
			break;
		default:
			bus->speed = igc_bus_speed_unknown;
			break;
		}

		bus->width = (enum igc_bus_width)((pcie_link_status &
			      PCIE_LINK_WIDTH_MASK) >> PCIE_LINK_WIDTH_SHIFT);
	}

	mac->ops.set_lan_id(hw);

	return IGC_SUCCESS;
}
/**
 *  igc_get_bus_info_pcie_generic - Get PCIe bus information
 *  @hw: pointer to the HW structure
 *
 *  Determines and stores the system bus information for a particular
 *  network interface.  The following bus information is determined and stored:
 *  bus speed, bus width, type (PCIe), and PCIe function.
 **/
Get PCIe bus information
@hw: pointer to the HW structure

Determines and stores the system bus information for a particular
network interface.  The following bus information is determined and stored:
bus speed, bus width, type (PCIe), and PCIe function.
Get PCIe bus information @hw : pointer to the HW structure Determines and stores the system bus information for a particular network interface . The following bus information is determined and stored : bus speed bus width type ( PCIe ) and PCIe function .
s32 igc_get_bus_info_pcie_generic(struct igc_hw *hw)
{
	struct igc_mac_info *mac = &hw->mac;
	struct igc_bus_info *bus = &hw->bus;
	s32 ret_val;
	u16 pcie_link_status;
	DEBUGFUNC("igc_get_bus_info_pcie_generic");
	bus->type = igc_bus_type_pci_express;
	ret_val = igc_read_pcie_cap_reg(hw, PCIE_LINK_STATUS,
					  &pcie_link_status);
	if (ret_val) {
		bus->width = igc_bus_width_unknown;
		bus->speed = igc_bus_speed_unknown;
	} else {
		switch (pcie_link_status & PCIE_LINK_SPEED_MASK) {
		case PCIE_LINK_SPEED_2500:
			bus->speed = igc_bus_speed_2500;
			break;
		case PCIE_LINK_SPEED_5000:
			bus->speed = igc_bus_speed_5000;
			break;
		default:
			bus->speed = igc_bus_speed_unknown;
			break;
		}
		bus->width = (enum igc_bus_width)((pcie_link_status &
			      PCIE_LINK_WIDTH_MASK) >> PCIE_LINK_WIDTH_SHIFT);
	}
	mac->ops.set_lan_id(hw);
	return IGC_SUCCESS;
}
s32 igc_get_bus_info_pcie_generic ( struct igc_hw * hw ) { struct igc_mac_info * mac = & hw -> mac ; struct igc_bus_info * bus = & hw -> bus ; s32 ret_val ; u16 pcie_link_status ; DEBUGFUNC ( " " ) ; bus -> type = igc_bus_type_pci_express ; ret_val = igc_read_pcie_cap_reg ( hw , PCIE_LINK_STATUS , & pcie_link_status ) ; if ( ret_val ) { bus -> width = igc_bus_width_unknown ; bus -> speed = igc_bus_speed_unknown ; } else { switch ( pcie_link_status & PCIE_LINK_SPEED_MASK ) { case PCIE_LINK_SPEED_2500 : bus -> speed = igc_bus_speed_2500 ; break ; case PCIE_LINK_SPEED_5000 : bus -> speed = igc_bus_speed_5000 ; break ; default : bus -> speed = igc_bus_speed_unknown ; break ; } bus -> width = ( enum igc_bus_width ) ( ( pcie_link_status & PCIE_LINK_WIDTH_MASK ) >> PCIE_LINK_WIDTH_SHIFT ) ; } mac -> ops . set_lan_id ( hw ) ; return IGC_SUCCESS ; }
igc_get_bus_info_pcie_generic - Get PCIe bus information
  @hw: pointer to the HW structure
igc_get_bus_info_pcie_generic - Get PCIe bus information @hw : pointer to the HW structure