src/dpdk/drivers/net/bnx2x/bnx2x.c
int
bnx2x_sp_post(struct bnx2x_softc *sc, int command, int cid, uint32_t data_hi,
	    uint32_t data_lo, int cmd_type)
{
	struct eth_spe *spe;
	uint16_t type;
	int common;

	common = bnx2x_is_contextless_ramrod(command, cmd_type);

	if (common) {
		if (!atomic_load_acq_long(&sc->eq_spq_left)) {
			PMD_DRV_LOG(INFO, sc, "EQ ring is full!");
			return -1;
		}
	} else {
		if (!atomic_load_acq_long(&sc->cq_spq_left)) {
			PMD_DRV_LOG(INFO, sc, "SPQ ring is full!");
			return -1;
		}
	}

	spe = bnx2x_sp_get_next(sc);

	/* CID needs port number to be encoded int it */
	spe->hdr.conn_and_cmd_data =
	    htole32((command << SPE_HDR_CMD_ID_SHIFT) | HW_CID(sc, cid));

	type = (cmd_type << SPE_HDR_CONN_TYPE_SHIFT) & SPE_HDR_CONN_TYPE;

	/* TBD: Check if it works for VFs */
	type |= ((SC_FUNC(sc) << SPE_HDR_FUNCTION_ID_SHIFT) &
		 SPE_HDR_FUNCTION_ID);

	spe->hdr.type = htole16(type);

	spe->data.update_data_addr.hi = htole32(data_hi);
	spe->data.update_data_addr.lo = htole32(data_lo);

	/*
	 * It's ok if the actual decrement is issued towards the memory
	 * somewhere between the lock and unlock. Thus no more explict
	 * memory barrier is needed.
	 */
	if (common) {
		atomic_subtract_acq_long(&sc->eq_spq_left, 1);
	} else {
		atomic_subtract_acq_long(&sc->cq_spq_left, 1);
	}

	PMD_DRV_LOG(DEBUG, sc,
		    "SPQE[%x] (%x:%x) (cmd, common?) (%d,%d) hw_cid %x"
		    "data (%x:%x) type(0x%x) left (CQ, EQ) (%lx,%lx)",
		    sc->spq_prod_idx,
		    (uint32_t) U64_HI(sc->spq_dma.paddr),
		    (uint32_t) (U64_LO(sc->spq_dma.paddr) +
				(uint8_t *) sc->spq_prod_bd -
				(uint8_t *) sc->spq), command, common,
		    HW_CID(sc, cid), data_hi, data_lo, type,
		    atomic_load_acq_long(&sc->cq_spq_left),
		    atomic_load_acq_long(&sc->eq_spq_left));

	/* RAMROD completion is processed in bnx2x_intr_legacy()
	 * which can run from different contexts.
	 * Ask bnx2x_intr_intr() to process RAMROD
	 * completion whenever it gets scheduled.
	 */
	rte_atomic32_set(&sc->scan_fp, 1);
	bnx2x_sp_prod_update(sc);

	return 0;
}
/**
 * bnx2x_sp_post - place a single command on an SP ring
 *
 * @sc:         driver handle
 * @command:    command to place (e.g. SETUP, FILTER_RULES, etc.)
 * @cid:        SW CID the command is related to
 * @data_hi:    command private data address (high 32 bits)
 * @data_lo:    command private data address (low 32 bits)
 * @cmd_type:   command type (e.g. NONE, ETH)
 *
 * SP data is handled as if it's always an address pair, thus data fields are
 * not swapped to little endian in upper functions. Instead this function swaps
 * data as if it's two uint32 fields.
 */


SP data is handled as if it's always an address pair, thus data fields are
not swapped to little endian in upper functions. Instead this function swaps
data as if it's two uint32 fields.
SP data is handled as if it ' s always an address pair thus data fields are not swapped to little endian in upper functions . Instead this function swaps data as if it ' s two uint32 fields .
int
bnx2x_sp_post(struct bnx2x_softc *sc, int command, int cid, uint32_t data_hi,
	    uint32_t data_lo, int cmd_type)
{
	struct eth_spe *spe;
	uint16_t type;
	int common;
	common = bnx2x_is_contextless_ramrod(command, cmd_type);
	if (common) {
		if (!atomic_load_acq_long(&sc->eq_spq_left)) {
			PMD_DRV_LOG(INFO, sc, "EQ ring is full!");
			return -1;
		}
	} else {
		if (!atomic_load_acq_long(&sc->cq_spq_left)) {
			PMD_DRV_LOG(INFO, sc, "SPQ ring is full!");
			return -1;
		}
	}
	spe = bnx2x_sp_get_next(sc);
	spe->hdr.conn_and_cmd_data =
	    htole32((command << SPE_HDR_CMD_ID_SHIFT) | HW_CID(sc, cid));
	type = (cmd_type << SPE_HDR_CONN_TYPE_SHIFT) & SPE_HDR_CONN_TYPE;
	type |= ((SC_FUNC(sc) << SPE_HDR_FUNCTION_ID_SHIFT) &
		 SPE_HDR_FUNCTION_ID);
	spe->hdr.type = htole16(type);
	spe->data.update_data_addr.hi = htole32(data_hi);
	spe->data.update_data_addr.lo = htole32(data_lo);
	if (common) {
		atomic_subtract_acq_long(&sc->eq_spq_left, 1);
	} else {
		atomic_subtract_acq_long(&sc->cq_spq_left, 1);
	}
	PMD_DRV_LOG(DEBUG, sc,
		    "SPQE[%x] (%x:%x) (cmd, common?) (%d,%d) hw_cid %x"
		    "data (%x:%x) type(0x%x) left (CQ, EQ) (%lx,%lx)",
		    sc->spq_prod_idx,
		    (uint32_t) U64_HI(sc->spq_dma.paddr),
		    (uint32_t) (U64_LO(sc->spq_dma.paddr) +
				(uint8_t *) sc->spq_prod_bd -
				(uint8_t *) sc->spq), command, common,
		    HW_CID(sc, cid), data_hi, data_lo, type,
		    atomic_load_acq_long(&sc->cq_spq_left),
		    atomic_load_acq_long(&sc->eq_spq_left));
	rte_atomic32_set(&sc->scan_fp, 1);
	bnx2x_sp_prod_update(sc);
	return 0;
}
int bnx2x_sp_post ( struct bnx2x_softc * sc , int command , int cid , uint32_t data_hi , uint32_t data_lo , int cmd_type ) { struct eth_spe * spe ; uint16_t type ; int common ; common = bnx2x_is_contextless_ramrod ( command , cmd_type ) ; if ( common ) { if ( ! atomic_load_acq_long ( & sc -> eq_spq_left ) ) { PMD_DRV_LOG ( INFO , sc , " " ) ; return -1 ; } } else { if ( ! atomic_load_acq_long ( & sc -> cq_spq_left ) ) { PMD_DRV_LOG ( INFO , sc , " " ) ; return -1 ; } } spe = bnx2x_sp_get_next ( sc ) ; spe -> hdr . conn_and_cmd_data = htole32 ( ( command << SPE_HDR_CMD_ID_SHIFT ) | HW_CID ( sc , cid ) ) ; type = ( cmd_type << SPE_HDR_CONN_TYPE_SHIFT ) & SPE_HDR_CONN_TYPE ; type |= ( ( SC_FUNC ( sc ) << SPE_HDR_FUNCTION_ID_SHIFT ) & SPE_HDR_FUNCTION_ID ) ; spe -> hdr . type = htole16 ( type ) ; spe -> data . update_data_addr . hi = htole32 ( data_hi ) ; spe -> data . update_data_addr . lo = htole32 ( data_lo ) ; if ( common ) { atomic_subtract_acq_long ( & sc -> eq_spq_left , 1 ) ; } else { atomic_subtract_acq_long ( & sc -> cq_spq_left , 1 ) ; } PMD_DRV_LOG ( DEBUG , sc , " " " " , sc -> spq_prod_idx , ( uint32_t ) U64_HI ( sc -> spq_dma . paddr ) , ( uint32_t ) ( U64_LO ( sc -> spq_dma . paddr ) + ( uint8_t * ) sc -> spq_prod_bd - ( uint8_t * ) sc -> spq ) , command , common , HW_CID ( sc , cid ) , data_hi , data_lo , type , atomic_load_acq_long ( & sc -> cq_spq_left ) , atomic_load_acq_long ( & sc -> eq_spq_left ) ) ; rte_atomic32_set ( & sc -> scan_fp , 1 ) ; bnx2x_sp_prod_update ( sc ) ; return 0 ; }
bnx2x_sp_post - place a single command on an SP ring
 @sc:         driver handle
 @command:    command to place (e.g.
bnx2x_sp_post - place a single command on an SP ring @sc : driver handle @command : command to place ( e . g .
/* CID needs port number to be encoded int it */ /* TBD: Check if it works for VFs */ /*
	 * It's ok if the actual decrement is issued towards the memory
	 * somewhere between the lock and unlock. Thus no more explict
	 * memory barrier is needed.
	 */ /* RAMROD completion is processed in bnx2x_intr_legacy()
	 * which can run from different contexts.
	 * Ask bnx2x_intr_intr() to process RAMROD
	 * completion whenever it gets scheduled.
	 */