emlib/src/em_cmu.c
void CMU_OscillatorTuningSet(CMU_Osc_TypeDef osc, uint32_t val)
{
#if defined(_CMU_HFXOSTEADYSTATECTRL_REGISH_MASK)
  uint32_t regIshUpper;
#endif

  switch (osc) {
    case cmuOsc_LFRCO:
      EFM_ASSERT(val <= (_CMU_LFRCOCTRL_TUNING_MASK
                         >> _CMU_LFRCOCTRL_TUNING_SHIFT));
      val &= (_CMU_LFRCOCTRL_TUNING_MASK >> _CMU_LFRCOCTRL_TUNING_SHIFT);
#if defined(_SILICON_LABS_32B_SERIES_1)
      while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_LFRCOBSY_SHIFT)) ;
#endif
      CMU->LFRCOCTRL = (CMU->LFRCOCTRL & ~(_CMU_LFRCOCTRL_TUNING_MASK))
                       | (val << _CMU_LFRCOCTRL_TUNING_SHIFT);
      break;

    case cmuOsc_HFRCO:
      EFM_ASSERT(val <= (_CMU_HFRCOCTRL_TUNING_MASK
                         >> _CMU_HFRCOCTRL_TUNING_SHIFT));
      val &= (_CMU_HFRCOCTRL_TUNING_MASK >> _CMU_HFRCOCTRL_TUNING_SHIFT);
#if defined(_SILICON_LABS_32B_SERIES_1)
      while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_HFRCOBSY_SHIFT)) {
      }
#endif
      CMU->HFRCOCTRL = (CMU->HFRCOCTRL & ~(_CMU_HFRCOCTRL_TUNING_MASK))
                       | (val << _CMU_HFRCOCTRL_TUNING_SHIFT);
      break;

#if defined (_CMU_USHFRCOCTRL_TUNING_MASK)
    case cmuOsc_USHFRCO:
      EFM_ASSERT(val <= (_CMU_USHFRCOCTRL_TUNING_MASK
                         >> _CMU_USHFRCOCTRL_TUNING_SHIFT));
      val &= (_CMU_USHFRCOCTRL_TUNING_MASK >> _CMU_USHFRCOCTRL_TUNING_SHIFT);
#if defined(_SILICON_LABS_32B_SERIES_1)
      while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_USHFRCOBSY_SHIFT)) {
      }
#endif
      CMU->USHFRCOCTRL = (CMU->USHFRCOCTRL & ~(_CMU_USHFRCOCTRL_TUNING_MASK))
                         | (val << _CMU_USHFRCOCTRL_TUNING_SHIFT);
      break;
#endif

    case cmuOsc_AUXHFRCO:
      EFM_ASSERT(val <= (_CMU_AUXHFRCOCTRL_TUNING_MASK
                         >> _CMU_AUXHFRCOCTRL_TUNING_SHIFT));
      val &= (_CMU_AUXHFRCOCTRL_TUNING_MASK >> _CMU_AUXHFRCOCTRL_TUNING_SHIFT);
#if defined(_SILICON_LABS_32B_SERIES_1)
      while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_AUXHFRCOBSY_SHIFT)) {
      }
#endif
      CMU->AUXHFRCOCTRL = (CMU->AUXHFRCOCTRL & ~(_CMU_AUXHFRCOCTRL_TUNING_MASK))
                          | (val << _CMU_AUXHFRCOCTRL_TUNING_SHIFT);
      break;

#if defined(_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK)
    case cmuOsc_HFXO:

      /* Do set PEAKDETSHUNTOPTMODE or HFXOSTEADYSTATECTRL if HFXO is enabled */
      EFM_ASSERT(!(CMU->STATUS & CMU_STATUS_HFXOENS));

      /* Switch to command mode. Automatic SCO and PDA calibration is not done
         at the next enable. Set user REGISH, REGISHUPPER and IBTRIMXOCORE. */
      CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK)
                      | CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_CMD;

#if defined(_CMU_HFXOSTEADYSTATECTRL_REGISH_MASK)
      regIshUpper = getRegIshUpperVal((val & _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK)
                                      >> _CMU_HFXOSTEADYSTATECTRL_REGISH_SHIFT);
      CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL
                                  & ~(_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK
                                      | _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK
                                      | _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_MASK))
                                 | val
                                 | regIshUpper;
#else
      CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL
                                  & ~_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK)
                                 | val;
#endif

      break;
#endif

    default:
      EFM_ASSERT(0);
      break;
  }
}
/***************************************************************************/
/**
 * @brief
 *   Set the oscillator frequency tuning control.
 *
 * @note
 *   Oscillator tuning is done during production, and the tuning value is
 *   automatically loaded after a reset. Changing the tuning value from the
 *   calibrated value is for more advanced use. Certain oscillators also have
 *   build-in tuning optimization.
 *
 * @param[in] osc
 *   Oscillator to set tuning value for, one of:
 *   @li #cmuOsc_LFRCO
 *   @li #cmuOsc_HFRCO @if _CMU_USHFRCOCTRL_TUNING_MASK
 *   @li #cmuOsc_USHFRCO
 *   @endif
 *   @li #cmuOsc_AUXHFRCO
 *   @li #cmuOsc_HFXO if PEAKDETSHUNTOPTMODE is available. Note that CMD mode is set.
 *
 * @param[in] val
 *   The oscillator frequency tuning setting to use.
 ******************************************************************************/
@brief
Set the oscillator frequency tuning control.

@note
Oscillator tuning is done during production, and the tuning value is
automatically loaded after a reset. Changing the tuning value from the
calibrated value is for more advanced use. Certain oscillators also have
build-in tuning optimization.



@param[in] val
The oscillator frequency tuning setting to use.
@brief Set the oscillator frequency tuning control . @note Oscillator tuning is done during production and the tuning value is automatically loaded after a reset . Changing the tuning value from the calibrated value is for more advanced use . Certain oscillators also have build - in tuning optimization . @param [ in ] val The oscillator frequency tuning setting to use .
void CMU_OscillatorTuningSet(CMU_Osc_TypeDef osc, uint32_t val)
{
#if defined(_CMU_HFXOSTEADYSTATECTRL_REGISH_MASK)
  uint32_t regIshUpper;
#endif
  switch (osc) {
    case cmuOsc_LFRCO:
      EFM_ASSERT(val <= (_CMU_LFRCOCTRL_TUNING_MASK
                         >> _CMU_LFRCOCTRL_TUNING_SHIFT));
      val &= (_CMU_LFRCOCTRL_TUNING_MASK >> _CMU_LFRCOCTRL_TUNING_SHIFT);
#if defined(_SILICON_LABS_32B_SERIES_1)
      while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_LFRCOBSY_SHIFT)) ;
#endif
      CMU->LFRCOCTRL = (CMU->LFRCOCTRL & ~(_CMU_LFRCOCTRL_TUNING_MASK))
                       | (val << _CMU_LFRCOCTRL_TUNING_SHIFT);
      break;
    case cmuOsc_HFRCO:
      EFM_ASSERT(val <= (_CMU_HFRCOCTRL_TUNING_MASK
                         >> _CMU_HFRCOCTRL_TUNING_SHIFT));
      val &= (_CMU_HFRCOCTRL_TUNING_MASK >> _CMU_HFRCOCTRL_TUNING_SHIFT);
#if defined(_SILICON_LABS_32B_SERIES_1)
      while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_HFRCOBSY_SHIFT)) {
      }
#endif
      CMU->HFRCOCTRL = (CMU->HFRCOCTRL & ~(_CMU_HFRCOCTRL_TUNING_MASK))
                       | (val << _CMU_HFRCOCTRL_TUNING_SHIFT);
      break;
#if defined (_CMU_USHFRCOCTRL_TUNING_MASK)
    case cmuOsc_USHFRCO:
      EFM_ASSERT(val <= (_CMU_USHFRCOCTRL_TUNING_MASK
                         >> _CMU_USHFRCOCTRL_TUNING_SHIFT));
      val &= (_CMU_USHFRCOCTRL_TUNING_MASK >> _CMU_USHFRCOCTRL_TUNING_SHIFT);
#if defined(_SILICON_LABS_32B_SERIES_1)
      while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_USHFRCOBSY_SHIFT)) {
      }
#endif
      CMU->USHFRCOCTRL = (CMU->USHFRCOCTRL & ~(_CMU_USHFRCOCTRL_TUNING_MASK))
                         | (val << _CMU_USHFRCOCTRL_TUNING_SHIFT);
      break;
#endif
    case cmuOsc_AUXHFRCO:
      EFM_ASSERT(val <= (_CMU_AUXHFRCOCTRL_TUNING_MASK
                         >> _CMU_AUXHFRCOCTRL_TUNING_SHIFT));
      val &= (_CMU_AUXHFRCOCTRL_TUNING_MASK >> _CMU_AUXHFRCOCTRL_TUNING_SHIFT);
#if defined(_SILICON_LABS_32B_SERIES_1)
      while (BUS_RegBitRead(&CMU->SYNCBUSY, _CMU_SYNCBUSY_AUXHFRCOBSY_SHIFT)) {
      }
#endif
      CMU->AUXHFRCOCTRL = (CMU->AUXHFRCOCTRL & ~(_CMU_AUXHFRCOCTRL_TUNING_MASK))
                          | (val << _CMU_AUXHFRCOCTRL_TUNING_SHIFT);
      break;
#if defined(_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK)
    case cmuOsc_HFXO:
      EFM_ASSERT(!(CMU->STATUS & CMU_STATUS_HFXOENS));
      CMU->HFXOCTRL = (CMU->HFXOCTRL & ~_CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK)
                      | CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_CMD;
#if defined(_CMU_HFXOSTEADYSTATECTRL_REGISH_MASK)
      regIshUpper = getRegIshUpperVal((val & _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK)
                                      >> _CMU_HFXOSTEADYSTATECTRL_REGISH_SHIFT);
      CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL
                                  & ~(_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK
                                      | _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK
                                      | _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_MASK))
                                 | val
                                 | regIshUpper;
#else
      CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL
                                  & ~_CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK)
                                 | val;
#endif
      break;
#endif
    default:
      EFM_ASSERT(0);
      break;
  }
}
void CMU_OscillatorTuningSet ( CMU_Osc_TypeDef osc , uint32_t val ) { #if defined ( _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK ) uint32_t regIshUpper ; #endif switch ( osc ) { case cmuOsc_LFRCO : EFM_ASSERT ( val <= ( _CMU_LFRCOCTRL_TUNING_MASK >> _CMU_LFRCOCTRL_TUNING_SHIFT ) ) ; val &= ( _CMU_LFRCOCTRL_TUNING_MASK >> _CMU_LFRCOCTRL_TUNING_SHIFT ) ; #if defined ( _SILICON_LABS_32B_SERIES_1 ) while ( BUS_RegBitRead ( & CMU -> SYNCBUSY , _CMU_SYNCBUSY_LFRCOBSY_SHIFT ) ) ; #endif CMU -> LFRCOCTRL = ( CMU -> LFRCOCTRL & ~ ( _CMU_LFRCOCTRL_TUNING_MASK ) ) | ( val << _CMU_LFRCOCTRL_TUNING_SHIFT ) ; break ; case cmuOsc_HFRCO : EFM_ASSERT ( val <= ( _CMU_HFRCOCTRL_TUNING_MASK >> _CMU_HFRCOCTRL_TUNING_SHIFT ) ) ; val &= ( _CMU_HFRCOCTRL_TUNING_MASK >> _CMU_HFRCOCTRL_TUNING_SHIFT ) ; #if defined ( _SILICON_LABS_32B_SERIES_1 ) while ( BUS_RegBitRead ( & CMU -> SYNCBUSY , _CMU_SYNCBUSY_HFRCOBSY_SHIFT ) ) { } #endif CMU -> HFRCOCTRL = ( CMU -> HFRCOCTRL & ~ ( _CMU_HFRCOCTRL_TUNING_MASK ) ) | ( val << _CMU_HFRCOCTRL_TUNING_SHIFT ) ; break ; #if defined ( _CMU_USHFRCOCTRL_TUNING_MASK ) case cmuOsc_USHFRCO : EFM_ASSERT ( val <= ( _CMU_USHFRCOCTRL_TUNING_MASK >> _CMU_USHFRCOCTRL_TUNING_SHIFT ) ) ; val &= ( _CMU_USHFRCOCTRL_TUNING_MASK >> _CMU_USHFRCOCTRL_TUNING_SHIFT ) ; #if defined ( _SILICON_LABS_32B_SERIES_1 ) while ( BUS_RegBitRead ( & CMU -> SYNCBUSY , _CMU_SYNCBUSY_USHFRCOBSY_SHIFT ) ) { } #endif CMU -> USHFRCOCTRL = ( CMU -> USHFRCOCTRL & ~ ( _CMU_USHFRCOCTRL_TUNING_MASK ) ) | ( val << _CMU_USHFRCOCTRL_TUNING_SHIFT ) ; break ; #endif case cmuOsc_AUXHFRCO : EFM_ASSERT ( val <= ( _CMU_AUXHFRCOCTRL_TUNING_MASK >> _CMU_AUXHFRCOCTRL_TUNING_SHIFT ) ) ; val &= ( _CMU_AUXHFRCOCTRL_TUNING_MASK >> _CMU_AUXHFRCOCTRL_TUNING_SHIFT ) ; #if defined ( _SILICON_LABS_32B_SERIES_1 ) while ( BUS_RegBitRead ( & CMU -> SYNCBUSY , _CMU_SYNCBUSY_AUXHFRCOBSY_SHIFT ) ) { } #endif CMU -> AUXHFRCOCTRL = ( CMU -> AUXHFRCOCTRL & ~ ( _CMU_AUXHFRCOCTRL_TUNING_MASK ) ) | ( val << _CMU_AUXHFRCOCTRL_TUNING_SHIFT ) ; break ; #if defined ( _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK ) case cmuOsc_HFXO : EFM_ASSERT ( ! ( CMU -> STATUS & CMU_STATUS_HFXOENS ) ) ; CMU -> HFXOCTRL = ( CMU -> HFXOCTRL & ~ _CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_MASK ) | CMU_HFXOCTRL_PEAKDETSHUNTOPTMODE_CMD ; #if defined ( _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK ) regIshUpper = getRegIshUpperVal ( ( val & _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK ) >> _CMU_HFXOSTEADYSTATECTRL_REGISH_SHIFT ) ; CMU -> HFXOSTEADYSTATECTRL = ( CMU -> HFXOSTEADYSTATECTRL & ~ ( _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK | _CMU_HFXOSTEADYSTATECTRL_REGISH_MASK | _CMU_HFXOSTEADYSTATECTRL_REGISHUPPER_MASK ) ) | val | regIshUpper ; #else CMU -> HFXOSTEADYSTATECTRL = ( CMU -> HFXOSTEADYSTATECTRL & ~ _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK ) | val ; #endif break ; #endif default : EFM_ASSERT ( 0 ) ; break ; } }
@brief
   Set the oscillator frequency tuning control.
@brief Set the oscillator frequency tuning control .
/* Do set PEAKDETSHUNTOPTMODE or HFXOSTEADYSTATECTRL if HFXO is enabled */ /* Switch to command mode. Automatic SCO and PDA calibration is not done
         at the next enable. Set user REGISH, REGISHUPPER and IBTRIMXOCORE. */