src/dpdk/drivers/net/ixgbe/base/ixgbe_x550.c
s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
{
	struct ixgbe_phy_info *phy = &hw->phy;
	s32 ret_val;

	DEBUGFUNC("ixgbe_init_phy_ops_X550em");

	hw->mac.ops.set_lan_id(hw);
	ixgbe_read_mng_if_sel_x550em(hw);

	if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) {
		phy->phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM;
		ixgbe_setup_mux_ctl(hw);
		phy->ops.identify_sfp = ixgbe_identify_sfp_module_X550em;
	}

	switch (hw->device_id) {
	case IXGBE_DEV_ID_X550EM_A_1G_T:
	case IXGBE_DEV_ID_X550EM_A_1G_T_L:
		phy->ops.read_reg_mdi = NULL;
		phy->ops.write_reg_mdi = NULL;
		hw->phy.ops.read_reg = NULL;
		hw->phy.ops.write_reg = NULL;
		phy->ops.check_overtemp = ixgbe_check_overtemp_fw;
		if (hw->bus.lan_id)
			hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM;
		else
			hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY0_SM;

		break;
	case IXGBE_DEV_ID_X550EM_A_10G_T:
	case IXGBE_DEV_ID_X550EM_A_SFP:
		hw->phy.ops.read_reg = ixgbe_read_phy_reg_x550a;
		hw->phy.ops.write_reg = ixgbe_write_phy_reg_x550a;
		if (hw->bus.lan_id)
			hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM;
		else
			hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY0_SM;
		break;
	case IXGBE_DEV_ID_X550EM_X_SFP:
		/* set up for CS4227 usage */
		hw->phy.phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM;
		break;
	case IXGBE_DEV_ID_X550EM_X_1G_T:
		phy->ops.read_reg_mdi = NULL;
		phy->ops.write_reg_mdi = NULL;
	default:
		break;
	}

	/* Identify the PHY or SFP module */
	ret_val = phy->ops.identify(hw);
	if (ret_val == IXGBE_ERR_SFP_NOT_SUPPORTED ||
	    ret_val == IXGBE_ERR_PHY_ADDR_INVALID)
		return ret_val;

	/* Setup function pointers based on detected hardware */
	ixgbe_init_mac_link_ops_X550em(hw);
	if (phy->sfp_type != ixgbe_sfp_type_unknown)
		phy->ops.reset = NULL;

	/* Set functions pointers based on phy type */
	switch (hw->phy.type) {
	case ixgbe_phy_x550em_kx4:
		phy->ops.setup_link = NULL;
		phy->ops.read_reg = ixgbe_read_phy_reg_x550em;
		phy->ops.write_reg = ixgbe_write_phy_reg_x550em;
		break;
	case ixgbe_phy_x550em_kr:
		phy->ops.setup_link = ixgbe_setup_kr_x550em;
		phy->ops.read_reg = ixgbe_read_phy_reg_x550em;
		phy->ops.write_reg = ixgbe_write_phy_reg_x550em;
		break;
	case ixgbe_phy_ext_1g_t:
		/* link is managed by FW */
		phy->ops.setup_link = NULL;
		phy->ops.reset = NULL;
		break;
	case ixgbe_phy_x550em_xfi:
		/* link is managed by HW */
		phy->ops.setup_link = NULL;
		phy->ops.read_reg = ixgbe_read_phy_reg_x550em;
		phy->ops.write_reg = ixgbe_write_phy_reg_x550em;
		break;
	case ixgbe_phy_x550em_ext_t:
		/* If internal link mode is XFI, then setup iXFI internal link,
		 * else setup KR now.
		 */
		phy->ops.setup_internal_link =
					      ixgbe_setup_internal_phy_t_x550em;

		/* setup SW LPLU only for first revision of X550EM_x */
		if ((hw->mac.type == ixgbe_mac_X550EM_x) &&
		    !(IXGBE_FUSES0_REV_MASK &
		      IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0))))
			phy->ops.enter_lplu = ixgbe_enter_lplu_t_x550em;

		phy->ops.handle_lasi = ixgbe_handle_lasi_ext_t_x550em;
		phy->ops.reset = ixgbe_reset_phy_t_X550em;
		break;
	case ixgbe_phy_sgmii:
		phy->ops.setup_link = NULL;
		break;
	case ixgbe_phy_fw:
		phy->ops.setup_link = ixgbe_setup_fw_link;
		phy->ops.reset = ixgbe_reset_phy_fw;
		break;
	default:
		break;
	}
	return ret_val;
}
/**
 * ixgbe_init_phy_ops_X550em - PHY/SFP specific init
 * @hw: pointer to hardware structure
 *
 * Initialize any function pointers that were not able to be
 * set during init_shared_code because the PHY/SFP type was
 * not known.  Perform the SFP init if necessary.
 */
PHY/SFP specific init
@hw: pointer to hardware structure

Initialize any function pointers that were not able to be
set during init_shared_code because the PHY/SFP type was
not known.  Perform the SFP init if necessary.
PHY / SFP specific init @hw : pointer to hardware structure Initialize any function pointers that were not able to be set during init_shared_code because the PHY / SFP type was not known . Perform the SFP init if necessary .
s32 ixgbe_init_phy_ops_X550em(struct ixgbe_hw *hw)
{
	struct ixgbe_phy_info *phy = &hw->phy;
	s32 ret_val;
	DEBUGFUNC("ixgbe_init_phy_ops_X550em");
	hw->mac.ops.set_lan_id(hw);
	ixgbe_read_mng_if_sel_x550em(hw);
	if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) {
		phy->phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM;
		ixgbe_setup_mux_ctl(hw);
		phy->ops.identify_sfp = ixgbe_identify_sfp_module_X550em;
	}
	switch (hw->device_id) {
	case IXGBE_DEV_ID_X550EM_A_1G_T:
	case IXGBE_DEV_ID_X550EM_A_1G_T_L:
		phy->ops.read_reg_mdi = NULL;
		phy->ops.write_reg_mdi = NULL;
		hw->phy.ops.read_reg = NULL;
		hw->phy.ops.write_reg = NULL;
		phy->ops.check_overtemp = ixgbe_check_overtemp_fw;
		if (hw->bus.lan_id)
			hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM;
		else
			hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY0_SM;
		break;
	case IXGBE_DEV_ID_X550EM_A_10G_T:
	case IXGBE_DEV_ID_X550EM_A_SFP:
		hw->phy.ops.read_reg = ixgbe_read_phy_reg_x550a;
		hw->phy.ops.write_reg = ixgbe_write_phy_reg_x550a;
		if (hw->bus.lan_id)
			hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM;
		else
			hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY0_SM;
		break;
	case IXGBE_DEV_ID_X550EM_X_SFP:
		hw->phy.phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM;
		break;
	case IXGBE_DEV_ID_X550EM_X_1G_T:
		phy->ops.read_reg_mdi = NULL;
		phy->ops.write_reg_mdi = NULL;
	default:
		break;
	}
	ret_val = phy->ops.identify(hw);
	if (ret_val == IXGBE_ERR_SFP_NOT_SUPPORTED ||
	    ret_val == IXGBE_ERR_PHY_ADDR_INVALID)
		return ret_val;
	ixgbe_init_mac_link_ops_X550em(hw);
	if (phy->sfp_type != ixgbe_sfp_type_unknown)
		phy->ops.reset = NULL;
	switch (hw->phy.type) {
	case ixgbe_phy_x550em_kx4:
		phy->ops.setup_link = NULL;
		phy->ops.read_reg = ixgbe_read_phy_reg_x550em;
		phy->ops.write_reg = ixgbe_write_phy_reg_x550em;
		break;
	case ixgbe_phy_x550em_kr:
		phy->ops.setup_link = ixgbe_setup_kr_x550em;
		phy->ops.read_reg = ixgbe_read_phy_reg_x550em;
		phy->ops.write_reg = ixgbe_write_phy_reg_x550em;
		break;
	case ixgbe_phy_ext_1g_t:
		phy->ops.setup_link = NULL;
		phy->ops.reset = NULL;
		break;
	case ixgbe_phy_x550em_xfi:
		phy->ops.setup_link = NULL;
		phy->ops.read_reg = ixgbe_read_phy_reg_x550em;
		phy->ops.write_reg = ixgbe_write_phy_reg_x550em;
		break;
	case ixgbe_phy_x550em_ext_t:
		phy->ops.setup_internal_link =
					      ixgbe_setup_internal_phy_t_x550em;
		if ((hw->mac.type == ixgbe_mac_X550EM_x) &&
		    !(IXGBE_FUSES0_REV_MASK &
		      IXGBE_READ_REG(hw, IXGBE_FUSES0_GROUP(0))))
			phy->ops.enter_lplu = ixgbe_enter_lplu_t_x550em;
		phy->ops.handle_lasi = ixgbe_handle_lasi_ext_t_x550em;
		phy->ops.reset = ixgbe_reset_phy_t_X550em;
		break;
	case ixgbe_phy_sgmii:
		phy->ops.setup_link = NULL;
		break;
	case ixgbe_phy_fw:
		phy->ops.setup_link = ixgbe_setup_fw_link;
		phy->ops.reset = ixgbe_reset_phy_fw;
		break;
	default:
		break;
	}
	return ret_val;
}
s32 ixgbe_init_phy_ops_X550em ( struct ixgbe_hw * hw ) { struct ixgbe_phy_info * phy = & hw -> phy ; s32 ret_val ; DEBUGFUNC ( " " ) ; hw -> mac . ops . set_lan_id ( hw ) ; ixgbe_read_mng_if_sel_x550em ( hw ) ; if ( hw -> mac . ops . get_media_type ( hw ) == ixgbe_media_type_fiber ) { phy -> phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM ; ixgbe_setup_mux_ctl ( hw ) ; phy -> ops . identify_sfp = ixgbe_identify_sfp_module_X550em ; } switch ( hw -> device_id ) { case IXGBE_DEV_ID_X550EM_A_1G_T : case IXGBE_DEV_ID_X550EM_A_1G_T_L : phy -> ops . read_reg_mdi = NULL ; phy -> ops . write_reg_mdi = NULL ; hw -> phy . ops . read_reg = NULL ; hw -> phy . ops . write_reg = NULL ; phy -> ops . check_overtemp = ixgbe_check_overtemp_fw ; if ( hw -> bus . lan_id ) hw -> phy . phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM ; else hw -> phy . phy_semaphore_mask |= IXGBE_GSSR_PHY0_SM ; break ; case IXGBE_DEV_ID_X550EM_A_10G_T : case IXGBE_DEV_ID_X550EM_A_SFP : hw -> phy . ops . read_reg = ixgbe_read_phy_reg_x550a ; hw -> phy . ops . write_reg = ixgbe_write_phy_reg_x550a ; if ( hw -> bus . lan_id ) hw -> phy . phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM ; else hw -> phy . phy_semaphore_mask |= IXGBE_GSSR_PHY0_SM ; break ; case IXGBE_DEV_ID_X550EM_X_SFP : hw -> phy . phy_semaphore_mask = IXGBE_GSSR_SHARED_I2C_SM ; break ; case IXGBE_DEV_ID_X550EM_X_1G_T : phy -> ops . read_reg_mdi = NULL ; phy -> ops . write_reg_mdi = NULL ; default : break ; } ret_val = phy -> ops . identify ( hw ) ; if ( ret_val == IXGBE_ERR_SFP_NOT_SUPPORTED || ret_val == IXGBE_ERR_PHY_ADDR_INVALID ) return ret_val ; ixgbe_init_mac_link_ops_X550em ( hw ) ; if ( phy -> sfp_type != ixgbe_sfp_type_unknown ) phy -> ops . reset = NULL ; switch ( hw -> phy . type ) { case ixgbe_phy_x550em_kx4 : phy -> ops . setup_link = NULL ; phy -> ops . read_reg = ixgbe_read_phy_reg_x550em ; phy -> ops . write_reg = ixgbe_write_phy_reg_x550em ; break ; case ixgbe_phy_x550em_kr : phy -> ops . setup_link = ixgbe_setup_kr_x550em ; phy -> ops . read_reg = ixgbe_read_phy_reg_x550em ; phy -> ops . write_reg = ixgbe_write_phy_reg_x550em ; break ; case ixgbe_phy_ext_1g_t : phy -> ops . setup_link = NULL ; phy -> ops . reset = NULL ; break ; case ixgbe_phy_x550em_xfi : phy -> ops . setup_link = NULL ; phy -> ops . read_reg = ixgbe_read_phy_reg_x550em ; phy -> ops . write_reg = ixgbe_write_phy_reg_x550em ; break ; case ixgbe_phy_x550em_ext_t : phy -> ops . setup_internal_link = ixgbe_setup_internal_phy_t_x550em ; if ( ( hw -> mac . type == ixgbe_mac_X550EM_x ) && ! ( IXGBE_FUSES0_REV_MASK & IXGBE_READ_REG ( hw , IXGBE_FUSES0_GROUP ( 0 ) ) ) ) phy -> ops . enter_lplu = ixgbe_enter_lplu_t_x550em ; phy -> ops . handle_lasi = ixgbe_handle_lasi_ext_t_x550em ; phy -> ops . reset = ixgbe_reset_phy_t_X550em ; break ; case ixgbe_phy_sgmii : phy -> ops . setup_link = NULL ; break ; case ixgbe_phy_fw : phy -> ops . setup_link = ixgbe_setup_fw_link ; phy -> ops . reset = ixgbe_reset_phy_fw ; break ; default : break ; } return ret_val ; }
ixgbe_init_phy_ops_X550em - PHY/SFP specific init
 @hw: pointer to hardware structure
ixgbe_init_phy_ops_X550em - PHY / SFP specific init @hw : pointer to hardware structure
/* set up for CS4227 usage */ /* Identify the PHY or SFP module */ /* Setup function pointers based on detected hardware */ /* Set functions pointers based on phy type */ /* link is managed by FW */ /* link is managed by HW */ /* If internal link mode is XFI, then setup iXFI internal link,
		 * else setup KR now.
		 */ /* setup SW LPLU only for first revision of X550EM_x */