lib/sw_apps/zynqmp_fsbl/src/xfsbl_bs.c
u32 XFsbl_PcapInit(void) {
	u32 RegVal;
	u32 Status;
	u32 PlatInfo;
	(void)memset(ReadBuffer, 0U, sizeof(ReadBuffer));

	/* Take PCAP out of Reset */
	RegVal = XFsbl_In32(CSU_PCAP_RESET);
	RegVal &= (~CSU_PCAP_RESET_RESET_MASK);
	XFsbl_Out32(CSU_PCAP_RESET, RegVal);

	/* Select PCAP mode and change PCAP to write mode */
	RegVal = CSU_PCAP_CTRL_PCAP_PR_MASK;
	XFsbl_Out32(CSU_PCAP_CTRL, RegVal);
	XFsbl_Out32(CSU_PCAP_RDWR, 0x0);

	/**
	 * For 1.0 and 2.0 Silicon, PL should already be powered up
	 * (before MIO config). Hence, skip that step here.
	 */
	if (XGetPSVersion_Info() > (u32)XPS_VERSION_2) {
		Status = XFsbl_PowerUpIsland(PMU_GLOBAL_PWR_STATE_PL_MASK);

		if (Status != XFSBL_SUCCESS) {
			Status = XFSBL_ERROR_PL_POWER_UP;
			XFsbl_Printf(DEBUG_GENERAL, "XFSBL_ERROR_PL_POWER_UP\r\n");
			goto END;
		}

		usleep(XFSBL_PL_PWRUP_WAIT_MICROSEC);

		Status = XFsbl_IsolationRestore(PMU_GLOBAL_REQ_ISO_INT_EN_PL_NONPCAP_MASK);

		if (Status != XFSBL_SUCCESS) {
			Status = XFSBL_ERROR_PMU_GLOBAL_REQ_ISO;
			XFsbl_Printf(DEBUG_GENERAL, "XFSBL_ERROR_PMU_GLOBAL_REQ_ISO\r\n");
			goto END;
		}
	}

	/* Reset PL */
	XFsbl_Out32(CSU_PCAP_PROG, 0x0U);

	(void)usleep(PL_RESET_PERIOD_IN_US);

	XFsbl_Out32(CSU_PCAP_PROG, CSU_PCAP_PROG_PCFG_PROG_B_MASK);

	/*
	 *  Wait for PL_init completion
	 *  Bypass this check in platforms not supporting PCAP interface
	 */

	PlatInfo = XGet_Zynq_UltraMp_Platform_info();

	if ((PlatInfo != (u32)XPLAT_ZYNQ_ULTRA_MP)
			&& (PlatInfo != (u32)XPLAT_ZYNQ_ULTRA_MPQEMU)) {
		/* To confirm house cleaning of PL is started */
		do {
			RegVal = XFsbl_In32(CSU_PCAP_STATUS) &
				CSU_PCAP_STATUS_PL_CFG_RST_MASK;
		} while (RegVal != CSU_PCAP_STATUS_PL_CFG_RST_MASK);
		/* To confirm house cleaning of PL is done */
		do {
			RegVal = XFsbl_In32(CSU_PCAP_STATUS) &
			CSU_PCAP_STATUS_PL_INIT_MASK;
		} while (RegVal != CSU_PCAP_STATUS_PL_INIT_MASK);
	} else {
		XFsbl_Printf(DEBUG_GENERAL,
				"PCAP interface is not supported in this platform \r\n");
	}
	Status = XFSBL_SUCCESS;
END:
	return Status;
}
/*****************************************************************************/
/** This function does the necessary initialization of PCAP interface
 *
 * @param	None
 *
 * @return	error status based on implemented functionality (SUCCESS by default)
 *
 *****************************************************************************/
This function does the necessary initialization of PCAP interface
@param       None

@return      error status based on implemented functionality (SUCCESS by default)
This function does the necessary initialization of PCAP interface @param None @return error status based on implemented functionality ( SUCCESS by default )
u32 XFsbl_PcapInit(void) {
	u32 RegVal;
	u32 Status;
	u32 PlatInfo;
	(void)memset(ReadBuffer, 0U, sizeof(ReadBuffer));
	RegVal = XFsbl_In32(CSU_PCAP_RESET);
	RegVal &= (~CSU_PCAP_RESET_RESET_MASK);
	XFsbl_Out32(CSU_PCAP_RESET, RegVal);
	RegVal = CSU_PCAP_CTRL_PCAP_PR_MASK;
	XFsbl_Out32(CSU_PCAP_CTRL, RegVal);
	XFsbl_Out32(CSU_PCAP_RDWR, 0x0);
	if (XGetPSVersion_Info() > (u32)XPS_VERSION_2) {
		Status = XFsbl_PowerUpIsland(PMU_GLOBAL_PWR_STATE_PL_MASK);
		if (Status != XFSBL_SUCCESS) {
			Status = XFSBL_ERROR_PL_POWER_UP;
			XFsbl_Printf(DEBUG_GENERAL, "XFSBL_ERROR_PL_POWER_UP\r\n");
			goto END;
		}
		usleep(XFSBL_PL_PWRUP_WAIT_MICROSEC);
		Status = XFsbl_IsolationRestore(PMU_GLOBAL_REQ_ISO_INT_EN_PL_NONPCAP_MASK);
		if (Status != XFSBL_SUCCESS) {
			Status = XFSBL_ERROR_PMU_GLOBAL_REQ_ISO;
			XFsbl_Printf(DEBUG_GENERAL, "XFSBL_ERROR_PMU_GLOBAL_REQ_ISO\r\n");
			goto END;
		}
	}
	XFsbl_Out32(CSU_PCAP_PROG, 0x0U);
	(void)usleep(PL_RESET_PERIOD_IN_US);
	XFsbl_Out32(CSU_PCAP_PROG, CSU_PCAP_PROG_PCFG_PROG_B_MASK);
	PlatInfo = XGet_Zynq_UltraMp_Platform_info();
	if ((PlatInfo != (u32)XPLAT_ZYNQ_ULTRA_MP)
			&& (PlatInfo != (u32)XPLAT_ZYNQ_ULTRA_MPQEMU)) {
		do {
			RegVal = XFsbl_In32(CSU_PCAP_STATUS) &
				CSU_PCAP_STATUS_PL_CFG_RST_MASK;
		} while (RegVal != CSU_PCAP_STATUS_PL_CFG_RST_MASK);
		do {
			RegVal = XFsbl_In32(CSU_PCAP_STATUS) &
			CSU_PCAP_STATUS_PL_INIT_MASK;
		} while (RegVal != CSU_PCAP_STATUS_PL_INIT_MASK);
	} else {
		XFsbl_Printf(DEBUG_GENERAL,
				"PCAP interface is not supported in this platform \r\n");
	}
	Status = XFSBL_SUCCESS;
END:
	return Status;
}
u32 XFsbl_PcapInit ( void ) { u32 RegVal ; u32 Status ; u32 PlatInfo ; ( void ) memset ( ReadBuffer , 0U , sizeof ( ReadBuffer ) ) ; RegVal = XFsbl_In32 ( CSU_PCAP_RESET ) ; RegVal &= ( ~ CSU_PCAP_RESET_RESET_MASK ) ; XFsbl_Out32 ( CSU_PCAP_RESET , RegVal ) ; RegVal = CSU_PCAP_CTRL_PCAP_PR_MASK ; XFsbl_Out32 ( CSU_PCAP_CTRL , RegVal ) ; XFsbl_Out32 ( CSU_PCAP_RDWR , 0x0 ) ; if ( XGetPSVersion_Info ( ) > ( u32 ) XPS_VERSION_2 ) { Status = XFsbl_PowerUpIsland ( PMU_GLOBAL_PWR_STATE_PL_MASK ) ; if ( Status != XFSBL_SUCCESS ) { Status = XFSBL_ERROR_PL_POWER_UP ; XFsbl_Printf ( DEBUG_GENERAL , " \r \n " ) ; goto END ; } usleep ( XFSBL_PL_PWRUP_WAIT_MICROSEC ) ; Status = XFsbl_IsolationRestore ( PMU_GLOBAL_REQ_ISO_INT_EN_PL_NONPCAP_MASK ) ; if ( Status != XFSBL_SUCCESS ) { Status = XFSBL_ERROR_PMU_GLOBAL_REQ_ISO ; XFsbl_Printf ( DEBUG_GENERAL , " \r \n " ) ; goto END ; } } XFsbl_Out32 ( CSU_PCAP_PROG , 0x0U ) ; ( void ) usleep ( PL_RESET_PERIOD_IN_US ) ; XFsbl_Out32 ( CSU_PCAP_PROG , CSU_PCAP_PROG_PCFG_PROG_B_MASK ) ; PlatInfo = XGet_Zynq_UltraMp_Platform_info ( ) ; if ( ( PlatInfo != ( u32 ) XPLAT_ZYNQ_ULTRA_MP ) && ( PlatInfo != ( u32 ) XPLAT_ZYNQ_ULTRA_MPQEMU ) ) { do { RegVal = XFsbl_In32 ( CSU_PCAP_STATUS ) & CSU_PCAP_STATUS_PL_CFG_RST_MASK ; } while ( RegVal != CSU_PCAP_STATUS_PL_CFG_RST_MASK ) ; do { RegVal = XFsbl_In32 ( CSU_PCAP_STATUS ) & CSU_PCAP_STATUS_PL_INIT_MASK ; } while ( RegVal != CSU_PCAP_STATUS_PL_INIT_MASK ) ; } else { XFsbl_Printf ( DEBUG_GENERAL , " \r \n " ) ; } Status = XFSBL_SUCCESS ; END : return Status ; }
This function does the necessary initialization of PCAP interface
 @param       None
This function does the necessary initialization of PCAP interface @param None
/* Take PCAP out of Reset */ /* Select PCAP mode and change PCAP to write mode */ /**
	 * For 1.0 and 2.0 Silicon, PL should already be powered up
	 * (before MIO config). Hence, skip that step here.
	 */ /* Reset PL */ /*
	 *  Wait for PL_init completion
	 *  Bypass this check in platforms not supporting PCAP interface
	 */ /* To confirm house cleaning of PL is started */ /* To confirm house cleaning of PL is done */