src/dpdk/drivers/net/igc/base/igc_nvm.c
s32 igc_read_nvm_spi(struct igc_hw *hw, u16 offset, u16 words, u16 *data)
{
	struct igc_nvm_info *nvm = &hw->nvm;
	u32 i = 0;
	s32 ret_val;
	u16 word_in;
	u8 read_opcode = NVM_READ_OPCODE_SPI;

	DEBUGFUNC("igc_read_nvm_spi");

	/* A check for invalid values:  offset too large, too many words,
	 * and not enough words.
	 */
	if (offset >= nvm->word_size || words > (nvm->word_size - offset) ||
			words == 0) {
		DEBUGOUT("nvm parameter(s) out of bounds\n");
		return -IGC_ERR_NVM;
	}

	ret_val = nvm->ops.acquire(hw);
	if (ret_val)
		return ret_val;

	ret_val = igc_ready_nvm_eeprom(hw);
	if (ret_val)
		goto release;

	igc_standby_nvm(hw);

	if (nvm->address_bits == 8 && offset >= 128)
		read_opcode |= NVM_A8_OPCODE_SPI;

	/* Send the READ command (opcode + addr) */
	igc_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
	igc_shift_out_eec_bits(hw, (u16)(offset * 2), nvm->address_bits);

	/* Read the data.  SPI NVMs increment the address with each byte
	 * read and will roll over if reading beyond the end.  This allows
	 * us to read the whole NVM from any offset
	 */
	for (i = 0; i < words; i++) {
		word_in = igc_shift_in_eec_bits(hw, 16);
		data[i] = (word_in >> 8) | (word_in << 8);
	}

release:
	nvm->ops.release(hw);

	return ret_val;
}
/**
 *  igc_read_nvm_spi - Read EEPROM's using SPI
 *  @hw: pointer to the HW structure
 *  @offset: offset of word in the EEPROM to read
 *  @words: number of words to read
 *  @data: word read from the EEPROM
 *
 *  Reads a 16 bit word from the EEPROM.
 **/
Read EEPROM's using SPI
@hw: pointer to the HW structure
@offset: offset of word in the EEPROM to read
@words: number of words to read
@data: word read from the EEPROM

Reads a 16 bit word from the EEPROM.
Read EEPROM ' s using SPI @hw : pointer to the HW structure @offset : offset of word in the EEPROM to read @words : number of words to read @data : word read from the EEPROM Reads a 16 bit word from the EEPROM .
s32 igc_read_nvm_spi(struct igc_hw *hw, u16 offset, u16 words, u16 *data)
{
	struct igc_nvm_info *nvm = &hw->nvm;
	u32 i = 0;
	s32 ret_val;
	u16 word_in;
	u8 read_opcode = NVM_READ_OPCODE_SPI;
	DEBUGFUNC("igc_read_nvm_spi");
	if (offset >= nvm->word_size || words > (nvm->word_size - offset) ||
			words == 0) {
		DEBUGOUT("nvm parameter(s) out of bounds\n");
		return -IGC_ERR_NVM;
	}
	ret_val = nvm->ops.acquire(hw);
	if (ret_val)
		return ret_val;
	ret_val = igc_ready_nvm_eeprom(hw);
	if (ret_val)
		goto release;
	igc_standby_nvm(hw);
	if (nvm->address_bits == 8 && offset >= 128)
		read_opcode |= NVM_A8_OPCODE_SPI;
	igc_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
	igc_shift_out_eec_bits(hw, (u16)(offset * 2), nvm->address_bits);
	for (i = 0; i < words; i++) {
		word_in = igc_shift_in_eec_bits(hw, 16);
		data[i] = (word_in >> 8) | (word_in << 8);
	}
release:
	nvm->ops.release(hw);
	return ret_val;
}
s32 igc_read_nvm_spi ( struct igc_hw * hw , u16 offset , u16 words , u16 * data ) { struct igc_nvm_info * nvm = & hw -> nvm ; u32 i = 0 ; s32 ret_val ; u16 word_in ; u8 read_opcode = NVM_READ_OPCODE_SPI ; DEBUGFUNC ( " " ) ; if ( offset >= nvm -> word_size || words > ( nvm -> word_size - offset ) || words == 0 ) { DEBUGOUT ( " \n " ) ; return - IGC_ERR_NVM ; } ret_val = nvm -> ops . acquire ( hw ) ; if ( ret_val ) return ret_val ; ret_val = igc_ready_nvm_eeprom ( hw ) ; if ( ret_val ) goto release ; igc_standby_nvm ( hw ) ; if ( nvm -> address_bits == 8 && offset >= 128 ) read_opcode |= NVM_A8_OPCODE_SPI ; igc_shift_out_eec_bits ( hw , read_opcode , nvm -> opcode_bits ) ; igc_shift_out_eec_bits ( hw , ( u16 ) ( offset * 2 ) , nvm -> address_bits ) ; for ( i = 0 ; i < words ; i ++ ) { word_in = igc_shift_in_eec_bits ( hw , 16 ) ; data [ i ] = ( word_in >> 8 ) | ( word_in << 8 ) ; } release : nvm -> ops . release ( hw ) ; return ret_val ; }
igc_read_nvm_spi - Read EEPROM's using SPI
  @hw: pointer to the HW structure
  @offset: offset of word in the EEPROM to read
  @words: number of words to read
  @data: word read from the EEPROM
igc_read_nvm_spi - Read EEPROM ' s using SPI @hw : pointer to the HW structure @offset : offset of word in the EEPROM to read @words : number of words to read @data : word read from the EEPROM
/* A check for invalid values:  offset too large, too many words,
	 * and not enough words.
	 */ /* Send the READ command (opcode + addr) */ /* Read the data.  SPI NVMs increment the address with each byte
	 * read and will roll over if reading beyond the end.  This allows
	 * us to read the whole NVM from any offset
	 */