src/dpdk/drivers/net/i40e/i40e_ethdev.c
static void
i40e_enable_extended_tag(struct rte_eth_dev *dev)
{
	struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
	uint32_t buf = 0;
	int ret;

	ret = rte_pci_read_config(pci_dev, &buf, sizeof(buf),
				      PCI_DEV_CAP_REG);
	if (ret < 0) {
		PMD_DRV_LOG(ERR, "Failed to read PCI offset 0x%x",
			    PCI_DEV_CAP_REG);
		return;
	}
	if (!(buf & PCI_DEV_CAP_EXT_TAG_MASK)) {
		PMD_DRV_LOG(ERR, "Does not support Extended Tag");
		return;
	}

	buf = 0;
	ret = rte_pci_read_config(pci_dev, &buf, sizeof(buf),
				      PCI_DEV_CTRL_REG);
	if (ret < 0) {
		PMD_DRV_LOG(ERR, "Failed to read PCI offset 0x%x",
			    PCI_DEV_CTRL_REG);
		return;
	}
	if (buf & PCI_DEV_CTRL_EXT_TAG_MASK) {
		PMD_DRV_LOG(DEBUG, "Extended Tag has already been enabled");
		return;
	}
	buf |= PCI_DEV_CTRL_EXT_TAG_MASK;
	ret = rte_pci_write_config(pci_dev, &buf, sizeof(buf),
				       PCI_DEV_CTRL_REG);
	if (ret < 0) {
		PMD_DRV_LOG(ERR, "Failed to write PCI offset 0x%x",
			    PCI_DEV_CTRL_REG);
		return;
	}
}
/*
 * Check and enable Extended Tag.
 * Enabling Extended Tag is important for 40G performance.
 */
Check and enable Extended Tag.
Enabling Extended Tag is important for 40G performance.
Check and enable Extended Tag . Enabling Extended Tag is important for 40G performance .
static void
i40e_enable_extended_tag(struct rte_eth_dev *dev)
{
	struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
	uint32_t buf = 0;
	int ret;
	ret = rte_pci_read_config(pci_dev, &buf, sizeof(buf),
				      PCI_DEV_CAP_REG);
	if (ret < 0) {
		PMD_DRV_LOG(ERR, "Failed to read PCI offset 0x%x",
			    PCI_DEV_CAP_REG);
		return;
	}
	if (!(buf & PCI_DEV_CAP_EXT_TAG_MASK)) {
		PMD_DRV_LOG(ERR, "Does not support Extended Tag");
		return;
	}
	buf = 0;
	ret = rte_pci_read_config(pci_dev, &buf, sizeof(buf),
				      PCI_DEV_CTRL_REG);
	if (ret < 0) {
		PMD_DRV_LOG(ERR, "Failed to read PCI offset 0x%x",
			    PCI_DEV_CTRL_REG);
		return;
	}
	if (buf & PCI_DEV_CTRL_EXT_TAG_MASK) {
		PMD_DRV_LOG(DEBUG, "Extended Tag has already been enabled");
		return;
	}
	buf |= PCI_DEV_CTRL_EXT_TAG_MASK;
	ret = rte_pci_write_config(pci_dev, &buf, sizeof(buf),
				       PCI_DEV_CTRL_REG);
	if (ret < 0) {
		PMD_DRV_LOG(ERR, "Failed to write PCI offset 0x%x",
			    PCI_DEV_CTRL_REG);
		return;
	}
}
static void i40e_enable_extended_tag ( struct rte_eth_dev * dev ) { struct rte_pci_device * pci_dev = RTE_ETH_DEV_TO_PCI ( dev ) ; uint32_t buf = 0 ; int ret ; ret = rte_pci_read_config ( pci_dev , & buf , sizeof ( buf ) , PCI_DEV_CAP_REG ) ; if ( ret < 0 ) { PMD_DRV_LOG ( ERR , " " , PCI_DEV_CAP_REG ) ; return ; } if ( ! ( buf & PCI_DEV_CAP_EXT_TAG_MASK ) ) { PMD_DRV_LOG ( ERR , " " ) ; return ; } buf = 0 ; ret = rte_pci_read_config ( pci_dev , & buf , sizeof ( buf ) , PCI_DEV_CTRL_REG ) ; if ( ret < 0 ) { PMD_DRV_LOG ( ERR , " " , PCI_DEV_CTRL_REG ) ; return ; } if ( buf & PCI_DEV_CTRL_EXT_TAG_MASK ) { PMD_DRV_LOG ( DEBUG , " " ) ; return ; } buf |= PCI_DEV_CTRL_EXT_TAG_MASK ; ret = rte_pci_write_config ( pci_dev , & buf , sizeof ( buf ) , PCI_DEV_CTRL_REG ) ; if ( ret < 0 ) { PMD_DRV_LOG ( ERR , " " , PCI_DEV_CTRL_REG ) ; return ; } }
Check and enable Extended Tag.
Check and enable Extended Tag .