src/dpdk/drivers/net/qede/qede_debug.c
static u32 qed_grc_dump_addr_range(struct ecore_hwfn *p_hwfn,
				   struct ecore_ptt *p_ptt,
				   u32 *dump_buf,
				   bool dump, u32 addr, u32 len, bool wide_bus,
				   enum init_split_types split_type,
				   u8 split_id)
{
	struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
	u8 port_id = 0, pf_id = 0, vf_id = 0, fid = 0;
	bool read_using_dmae = false;
	u32 thresh;

	if (!dump)
		return len;

	switch (split_type) {
	case SPLIT_TYPE_PORT:
		port_id = split_id;
		break;
	case SPLIT_TYPE_PF:
		pf_id = split_id;
		break;
	case SPLIT_TYPE_PORT_PF:
		port_id = split_id / dev_data->num_pfs_per_port;
		pf_id = port_id + dev_data->num_ports *
		    (split_id % dev_data->num_pfs_per_port);
		break;
	case SPLIT_TYPE_VF:
		vf_id = split_id;
		break;
	default:
		break;
	}

	/* Try reading using DMAE */
	if (dev_data->use_dmae && split_type != SPLIT_TYPE_VF &&
	    (len >= s_hw_type_defs[dev_data->hw_type].dmae_thresh ||
	     (PROTECT_WIDE_BUS && wide_bus))) {
		struct dmae_params dmae_params;

		/* Set DMAE params */
		memset(&dmae_params, 0, sizeof(dmae_params));
		SET_FIELD(dmae_params.flags, DMAE_PARAMS_COMPLETION_DST, 1);
		switch (split_type) {
		case SPLIT_TYPE_PORT:
			SET_FIELD(dmae_params.flags, DMAE_PARAMS_PORT_VALID,
				  1);
			dmae_params.port_id = port_id;
			break;
		case SPLIT_TYPE_PF:
			SET_FIELD(dmae_params.flags,
				  DMAE_PARAMS_SRC_PF_VALID, 1);
			dmae_params.src_pf_id = pf_id;
			break;
		case SPLIT_TYPE_PORT_PF:
			SET_FIELD(dmae_params.flags, DMAE_PARAMS_PORT_VALID,
				  1);
			SET_FIELD(dmae_params.flags,
				  DMAE_PARAMS_SRC_PF_VALID, 1);
			dmae_params.port_id = port_id;
			dmae_params.src_pf_id = pf_id;
			break;
		default:
			break;
		}

		/* Execute DMAE command */
		read_using_dmae = !ecore_dmae_grc2host(p_hwfn,
						     p_ptt,
						     DWORDS_TO_BYTES(addr),
						     (u64)(uintptr_t)(dump_buf),
						     len, &dmae_params);
		if (!read_using_dmae) {
			dev_data->use_dmae = 0;
			DP_VERBOSE(p_hwfn->p_dev,
				   ECORE_MSG_DEBUG,
				   "Failed reading from chip using DMAE, using GRC instead\n");
		}
	}

	if (read_using_dmae)
		goto print_log;

	/* If not read using DMAE, read using GRC */

	/* Set pretend */
	if (split_type != dev_data->pretend.split_type ||
	    split_id != dev_data->pretend.split_id) {
		switch (split_type) {
		case SPLIT_TYPE_PORT:
			ecore_port_pretend(p_hwfn, p_ptt, port_id);
			break;
		case SPLIT_TYPE_PF:
			fid = FIELD_VALUE(PXP_PRETEND_CONCRETE_FID_PFID,
					  pf_id);
			ecore_fid_pretend(p_hwfn, p_ptt, fid);
			break;
		case SPLIT_TYPE_PORT_PF:
			fid = FIELD_VALUE(PXP_PRETEND_CONCRETE_FID_PFID,
					  pf_id);
			ecore_port_fid_pretend(p_hwfn, p_ptt, port_id, fid);
			break;
		case SPLIT_TYPE_VF:
			fid = FIELD_VALUE(PXP_PRETEND_CONCRETE_FID_VFVALID, 1)
			      | FIELD_VALUE(PXP_PRETEND_CONCRETE_FID_VFID,
					  vf_id);
			ecore_fid_pretend(p_hwfn, p_ptt, fid);
			break;
		default:
			break;
		}

		dev_data->pretend.split_type = (u8)split_type;
		dev_data->pretend.split_id = split_id;
	}

	/* Read registers using GRC */
	qed_read_regs(p_hwfn, p_ptt, dump_buf, addr, len);

print_log:
	/* Print log */
	dev_data->num_regs_read += len;
	thresh = s_hw_type_defs[dev_data->hw_type].log_thresh;
	if ((dev_data->num_regs_read / thresh) >
	    ((dev_data->num_regs_read - len) / thresh))
		DP_VERBOSE(p_hwfn->p_dev,
			   ECORE_MSG_DEBUG,
			   "Dumped %d registers...\n", dev_data->num_regs_read);

	return len;
}
/* Dumps the GRC registers in the specified address range.
 * Returns the dumped size in dwords.
 * The addr and len arguments are specified in dwords.
 */
Dumps the GRC registers in the specified address range.
Returns the dumped size in dwords.
The addr and len arguments are specified in dwords.
Dumps the GRC registers in the specified address range . Returns the dumped size in dwords . The addr and len arguments are specified in dwords .
static u32 qed_grc_dump_addr_range(struct ecore_hwfn *p_hwfn,
				   struct ecore_ptt *p_ptt,
				   u32 *dump_buf,
				   bool dump, u32 addr, u32 len, bool wide_bus,
				   enum init_split_types split_type,
				   u8 split_id)
{
	struct dbg_tools_data *dev_data = &p_hwfn->dbg_info;
	u8 port_id = 0, pf_id = 0, vf_id = 0, fid = 0;
	bool read_using_dmae = false;
	u32 thresh;
	if (!dump)
		return len;
	switch (split_type) {
	case SPLIT_TYPE_PORT:
		port_id = split_id;
		break;
	case SPLIT_TYPE_PF:
		pf_id = split_id;
		break;
	case SPLIT_TYPE_PORT_PF:
		port_id = split_id / dev_data->num_pfs_per_port;
		pf_id = port_id + dev_data->num_ports *
		    (split_id % dev_data->num_pfs_per_port);
		break;
	case SPLIT_TYPE_VF:
		vf_id = split_id;
		break;
	default:
		break;
	}
	if (dev_data->use_dmae && split_type != SPLIT_TYPE_VF &&
	    (len >= s_hw_type_defs[dev_data->hw_type].dmae_thresh ||
	     (PROTECT_WIDE_BUS && wide_bus))) {
		struct dmae_params dmae_params;
		memset(&dmae_params, 0, sizeof(dmae_params));
		SET_FIELD(dmae_params.flags, DMAE_PARAMS_COMPLETION_DST, 1);
		switch (split_type) {
		case SPLIT_TYPE_PORT:
			SET_FIELD(dmae_params.flags, DMAE_PARAMS_PORT_VALID,
				  1);
			dmae_params.port_id = port_id;
			break;
		case SPLIT_TYPE_PF:
			SET_FIELD(dmae_params.flags,
				  DMAE_PARAMS_SRC_PF_VALID, 1);
			dmae_params.src_pf_id = pf_id;
			break;
		case SPLIT_TYPE_PORT_PF:
			SET_FIELD(dmae_params.flags, DMAE_PARAMS_PORT_VALID,
				  1);
			SET_FIELD(dmae_params.flags,
				  DMAE_PARAMS_SRC_PF_VALID, 1);
			dmae_params.port_id = port_id;
			dmae_params.src_pf_id = pf_id;
			break;
		default:
			break;
		}
		read_using_dmae = !ecore_dmae_grc2host(p_hwfn,
						     p_ptt,
						     DWORDS_TO_BYTES(addr),
						     (u64)(uintptr_t)(dump_buf),
						     len, &dmae_params);
		if (!read_using_dmae) {
			dev_data->use_dmae = 0;
			DP_VERBOSE(p_hwfn->p_dev,
				   ECORE_MSG_DEBUG,
				   "Failed reading from chip using DMAE, using GRC instead\n");
		}
	}
	if (read_using_dmae)
		goto print_log;
	if (split_type != dev_data->pretend.split_type ||
	    split_id != dev_data->pretend.split_id) {
		switch (split_type) {
		case SPLIT_TYPE_PORT:
			ecore_port_pretend(p_hwfn, p_ptt, port_id);
			break;
		case SPLIT_TYPE_PF:
			fid = FIELD_VALUE(PXP_PRETEND_CONCRETE_FID_PFID,
					  pf_id);
			ecore_fid_pretend(p_hwfn, p_ptt, fid);
			break;
		case SPLIT_TYPE_PORT_PF:
			fid = FIELD_VALUE(PXP_PRETEND_CONCRETE_FID_PFID,
					  pf_id);
			ecore_port_fid_pretend(p_hwfn, p_ptt, port_id, fid);
			break;
		case SPLIT_TYPE_VF:
			fid = FIELD_VALUE(PXP_PRETEND_CONCRETE_FID_VFVALID, 1)
			      | FIELD_VALUE(PXP_PRETEND_CONCRETE_FID_VFID,
					  vf_id);
			ecore_fid_pretend(p_hwfn, p_ptt, fid);
			break;
		default:
			break;
		}
		dev_data->pretend.split_type = (u8)split_type;
		dev_data->pretend.split_id = split_id;
	}
	qed_read_regs(p_hwfn, p_ptt, dump_buf, addr, len);
print_log:
	dev_data->num_regs_read += len;
	thresh = s_hw_type_defs[dev_data->hw_type].log_thresh;
	if ((dev_data->num_regs_read / thresh) >
	    ((dev_data->num_regs_read - len) / thresh))
		DP_VERBOSE(p_hwfn->p_dev,
			   ECORE_MSG_DEBUG,
			   "Dumped %d registers...\n", dev_data->num_regs_read);
	return len;
}
static u32 qed_grc_dump_addr_range ( struct ecore_hwfn * p_hwfn , struct ecore_ptt * p_ptt , u32 * dump_buf , bool dump , u32 addr , u32 len , bool wide_bus , enum init_split_types split_type , u8 split_id ) { struct dbg_tools_data * dev_data = & p_hwfn -> dbg_info ; u8 port_id = 0 , pf_id = 0 , vf_id = 0 , fid = 0 ; bool read_using_dmae = false ; u32 thresh ; if ( ! dump ) return len ; switch ( split_type ) { case SPLIT_TYPE_PORT : port_id = split_id ; break ; case SPLIT_TYPE_PF : pf_id = split_id ; break ; case SPLIT_TYPE_PORT_PF : port_id = split_id / dev_data -> num_pfs_per_port ; pf_id = port_id + dev_data -> num_ports * ( split_id % dev_data -> num_pfs_per_port ) ; break ; case SPLIT_TYPE_VF : vf_id = split_id ; break ; default : break ; } if ( dev_data -> use_dmae && split_type != SPLIT_TYPE_VF && ( len >= s_hw_type_defs [ dev_data -> hw_type ] . dmae_thresh || ( PROTECT_WIDE_BUS && wide_bus ) ) ) { struct dmae_params dmae_params ; memset ( & dmae_params , 0 , sizeof ( dmae_params ) ) ; SET_FIELD ( dmae_params . flags , DMAE_PARAMS_COMPLETION_DST , 1 ) ; switch ( split_type ) { case SPLIT_TYPE_PORT : SET_FIELD ( dmae_params . flags , DMAE_PARAMS_PORT_VALID , 1 ) ; dmae_params . port_id = port_id ; break ; case SPLIT_TYPE_PF : SET_FIELD ( dmae_params . flags , DMAE_PARAMS_SRC_PF_VALID , 1 ) ; dmae_params . src_pf_id = pf_id ; break ; case SPLIT_TYPE_PORT_PF : SET_FIELD ( dmae_params . flags , DMAE_PARAMS_PORT_VALID , 1 ) ; SET_FIELD ( dmae_params . flags , DMAE_PARAMS_SRC_PF_VALID , 1 ) ; dmae_params . port_id = port_id ; dmae_params . src_pf_id = pf_id ; break ; default : break ; } read_using_dmae = ! ecore_dmae_grc2host ( p_hwfn , p_ptt , DWORDS_TO_BYTES ( addr ) , ( u64 ) ( uintptr_t ) ( dump_buf ) , len , & dmae_params ) ; if ( ! read_using_dmae ) { dev_data -> use_dmae = 0 ; DP_VERBOSE ( p_hwfn -> p_dev , ECORE_MSG_DEBUG , " \n " ) ; } } if ( read_using_dmae ) goto print_log ; if ( split_type != dev_data -> pretend . split_type || split_id != dev_data -> pretend . split_id ) { switch ( split_type ) { case SPLIT_TYPE_PORT : ecore_port_pretend ( p_hwfn , p_ptt , port_id ) ; break ; case SPLIT_TYPE_PF : fid = FIELD_VALUE ( PXP_PRETEND_CONCRETE_FID_PFID , pf_id ) ; ecore_fid_pretend ( p_hwfn , p_ptt , fid ) ; break ; case SPLIT_TYPE_PORT_PF : fid = FIELD_VALUE ( PXP_PRETEND_CONCRETE_FID_PFID , pf_id ) ; ecore_port_fid_pretend ( p_hwfn , p_ptt , port_id , fid ) ; break ; case SPLIT_TYPE_VF : fid = FIELD_VALUE ( PXP_PRETEND_CONCRETE_FID_VFVALID , 1 ) | FIELD_VALUE ( PXP_PRETEND_CONCRETE_FID_VFID , vf_id ) ; ecore_fid_pretend ( p_hwfn , p_ptt , fid ) ; break ; default : break ; } dev_data -> pretend . split_type = ( u8 ) split_type ; dev_data -> pretend . split_id = split_id ; } qed_read_regs ( p_hwfn , p_ptt , dump_buf , addr , len ) ; print_log : dev_data -> num_regs_read += len ; thresh = s_hw_type_defs [ dev_data -> hw_type ] . log_thresh ; if ( ( dev_data -> num_regs_read / thresh ) > ( ( dev_data -> num_regs_read - len ) / thresh ) ) DP_VERBOSE ( p_hwfn -> p_dev , ECORE_MSG_DEBUG , " \n " , dev_data -> num_regs_read ) ; return len ; }
Dumps the GRC registers in the specified address range.
Dumps the GRC registers in the specified address range .
/* Try reading using DMAE */ /* Set DMAE params */ /* Execute DMAE command */ /* If not read using DMAE, read using GRC */ /* Set pretend */ /* Read registers using GRC */ /* Print log */