src/dpdk/drivers/net/i40e/base/i40e_nvm.c
enum i40e_status_code __i40e_write_nvm_buffer(struct i40e_hw *hw,
					      u8 module_pointer, u32 offset,
					      u16 words, void *data)
{
	__le16 *le_word_ptr = (__le16 *)data;
	u16 *word_ptr = (u16 *)data;
	u32 i = 0;

	DEBUGFUNC("i40e_write_nvm_buffer");

	for (i = 0; i < words; i++)
		le_word_ptr[i] = CPU_TO_LE16(word_ptr[i]);

	/* Here we will only write one buffer as the size of the modules
	 * mirrored in the Shadow RAM is always less than 4K.
	 */
	return i40e_write_nvm_aq(hw, module_pointer, offset, words,
				 data, false);
}
/**
 * __i40e_write_nvm_buffer - Writes Shadow RAM buffer
 * @hw: pointer to the HW structure
 * @module_pointer: module pointer location in words from the NVM beginning
 * @offset: offset of the Shadow RAM buffer to write
 * @words: number of words to write
 * @data: words to write to the Shadow RAM
 *
 * Writes a 16 bit words buffer to the Shadow RAM using the admin command.
 * NVM ownership must be acquired before calling this function and released
 * on ARQ completion event reception by caller. To commit SR to NVM update
 * checksum function should be called.
 **/


Writes a 16 bit words buffer to the Shadow RAM using the admin command.
NVM ownership must be acquired before calling this function and released
on ARQ completion event reception by caller. To commit SR to NVM update
checksum function should be called.
Writes a 16 bit words buffer to the Shadow RAM using the admin command . NVM ownership must be acquired before calling this function and released on ARQ completion event reception by caller . To commit SR to NVM update checksum function should be called .
enum i40e_status_code __i40e_write_nvm_buffer(struct i40e_hw *hw,
					      u8 module_pointer, u32 offset,
					      u16 words, void *data)
{
	__le16 *le_word_ptr = (__le16 *)data;
	u16 *word_ptr = (u16 *)data;
	u32 i = 0;
	DEBUGFUNC("i40e_write_nvm_buffer");
	for (i = 0; i < words; i++)
		le_word_ptr[i] = CPU_TO_LE16(word_ptr[i]);
	return i40e_write_nvm_aq(hw, module_pointer, offset, words,
				 data, false);
}
enum i40e_status_code __i40e_write_nvm_buffer ( struct i40e_hw * hw , u8 module_pointer , u32 offset , u16 words , void * data ) { __le16 * le_word_ptr = ( __le16 * ) data ; u16 * word_ptr = ( u16 * ) data ; u32 i = 0 ; DEBUGFUNC ( " " ) ; for ( i = 0 ; i < words ; i ++ ) le_word_ptr [ i ] = CPU_TO_LE16 ( word_ptr [ i ] ) ; return i40e_write_nvm_aq ( hw , module_pointer , offset , words , data , false ) ; }
__i40e_write_nvm_buffer - Writes Shadow RAM buffer
 @hw: pointer to the HW structure
 @module_pointer: module pointer location in words from the NVM beginning
 @offset: offset of the Shadow RAM buffer to write
 @words: number of words to write
 @data: words to write to the Shadow RAM
__i40e_write_nvm_buffer - Writes Shadow RAM buffer @hw : pointer to the HW structure @module_pointer : module pointer location in words from the NVM beginning @offset : offset of the Shadow RAM buffer to write @words : number of words to write @data : words to write to the Shadow RAM
/* Here we will only write one buffer as the size of the modules
	 * mirrored in the Shadow RAM is always less than 4K.
	 */