AT example.cydsn/Generated_Source/PSoC5/UART.c
void UART_ClearTxBuffer(void) 
    {
        uint8 enableInterrupts;

        /* Enter critical section */
        enableInterrupts = CyEnterCriticalSection();
        /* clear the HW FIFO */
        UART_TXDATA_AUX_CTL_REG |=  UART_TX_FIFO_CLR;
        UART_TXDATA_AUX_CTL_REG &= (uint8)~UART_TX_FIFO_CLR;
        /* Exit critical section */
        CyExitCriticalSection(enableInterrupts);

        #if(UART_TXBUFFERSIZE > UART_FIFO_LENGTH)

            /* Disable Tx interrupt. */
            /* Protect variables that could change on interrupt. */
            #if(UART_TX_INTERRUPT_ENABLED)
                UART_DisableTxInt();
            #endif /* End UART_TX_INTERRUPT_ENABLED */

            UART_txBufferRead = 0u;
            UART_txBufferWrite = 0u;

            /* Enable Tx interrupt. */
            #if(UART_TX_INTERRUPT_ENABLED)
                UART_EnableTxInt();
            #endif /* End UART_TX_INTERRUPT_ENABLED */

        #endif /* End UART_TXBUFFERSIZE > UART_FIFO_LENGTH */
    }
/*******************************************************************************
    * Function Name: UART_ClearTxBuffer
    ********************************************************************************
    *
    * Summary:
    *  Clears the TX RAM buffer by setting the read and write pointers both to zero.
    *  Clears the hardware TX FIFO.  Any data present in the FIFO will not be sent.
    *
    * Parameters:
    *  None.
    *
    * Return:
    *  None.
    *
    * Global Variables:
    *  UART_txBufferWrite - cleared to zero.
    *  UART_txBufferRead - cleared to zero.
    *
    * Reentrant:
    *  No.
    *
    * Theory:
    *  Setting the pointers to zero makes the system believe there is no data to
    *  read and writing will resume at address 0 overwriting any data that may have
    *  remained in the RAM.
    *
    * Side Effects:
    *  Any received data not read from the RAM buffer will be lost when overwritten.
    *
    *******************************************************************************/
Function Name: UART_ClearTxBuffer
Summary:
Clears the TX RAM buffer by setting the read and write pointers both to zero.
Clears the hardware TX FIFO.  Any data present in the FIFO will not be sent.

None.

None.

Global Variables:
UART_txBufferWrite - cleared to zero.
UART_txBufferRead - cleared to zero.

No.

Setting the pointers to zero makes the system believe there is no data to
read and writing will resume at address 0 overwriting any data that may have
remained in the RAM.

Side Effects:
Any received data not read from the RAM buffer will be lost when overwritten.
Function Name : UART_ClearTxBuffer Summary : Clears the TX RAM buffer by setting the read and write pointers both to zero . Clears the hardware TX FIFO . Any data present in the FIFO will not be sent . None . None . Global Variables : UART_txBufferWrite - cleared to zero . UART_txBufferRead - cleared to zero . No . Setting the pointers to zero makes the system believe there is no data to read and writing will resume at address 0 overwriting any data that may have remained in the RAM . Side Effects : Any received data not read from the RAM buffer will be lost when overwritten .
void UART_ClearTxBuffer(void) 
    {
        uint8 enableInterrupts;
        enableInterrupts = CyEnterCriticalSection();
        UART_TXDATA_AUX_CTL_REG |=  UART_TX_FIFO_CLR;
        UART_TXDATA_AUX_CTL_REG &= (uint8)~UART_TX_FIFO_CLR;
        CyExitCriticalSection(enableInterrupts);
        #if(UART_TXBUFFERSIZE > UART_FIFO_LENGTH)
            #if(UART_TX_INTERRUPT_ENABLED)
                UART_DisableTxInt();
            #endif 
            UART_txBufferRead = 0u;
            UART_txBufferWrite = 0u;
            #if(UART_TX_INTERRUPT_ENABLED)
                UART_EnableTxInt();
            #endif 
        #endif 
    }
void UART_ClearTxBuffer ( void ) { uint8 enableInterrupts ; enableInterrupts = CyEnterCriticalSection ( ) ; UART_TXDATA_AUX_CTL_REG |= UART_TX_FIFO_CLR ; UART_TXDATA_AUX_CTL_REG &= ( uint8 ) ~ UART_TX_FIFO_CLR ; CyExitCriticalSection ( enableInterrupts ) ; #if ( UART_TXBUFFERSIZE > UART_FIFO_LENGTH ) #if ( UART_TX_INTERRUPT_ENABLED ) UART_DisableTxInt ( ) ; #endif UART_txBufferRead = 0u ; UART_txBufferWrite = 0u ; #if ( UART_TX_INTERRUPT_ENABLED ) UART_EnableTxInt ( ) ; #endif #endif }
Function Name: UART_ClearTxBuffer
 Summary:
  Clears the TX RAM buffer by setting the read and write pointers both to zero.
Function Name : UART_ClearTxBuffer Summary : Clears the TX RAM buffer by setting the read and write pointers both to zero .
/* Enter critical section */ /* clear the HW FIFO */ /* Exit critical section */ /* Disable Tx interrupt. */ /* Protect variables that could change on interrupt. */ /* End UART_TX_INTERRUPT_ENABLED */ /* Enable Tx interrupt. */ /* End UART_TX_INTERRUPT_ENABLED */ /* End UART_TXBUFFERSIZE > UART_FIFO_LENGTH */