XilinxProcessorIPLib/drivers/aienginev2/src/dma/xaie_dma_aieml.c
AieRC _XAieMl_DmaSetMultiDim(XAie_DmaDesc *DmaDesc, XAie_DmaTensor *Tensor)
{
	for(u8 i = 0U; i < Tensor->NumDim; i++) {
		const XAie_DmaBdProp *BdProp = DmaDesc->DmaMod->BdProp;
		if(Tensor->Dim[i].AieMlDimDesc.StepSize == 0U) {
			XAIE_ERROR("Invalid stepsize for dimension %d\n", i);
			return XAIE_ERR;
		}
		if((Tensor->Dim[i].AieMlDimDesc.StepSize > BdProp->StepSizeMax) ||
				(Tensor->Dim[i].AieMlDimDesc.Wrap > BdProp->WrapMax)) {
			XAIE_ERROR("Invalid stepsize or wrap for dimension %d\n",
					i);
			return XAIE_ERR;
		}
	}

	for(u8 i = 0U; i < Tensor->NumDim; i++) {

		DmaDesc->MultiDimDesc.AieMlMultiDimDesc.DimDesc[i].StepSize =
			Tensor->Dim[i].AieMlDimDesc.StepSize;
		DmaDesc->MultiDimDesc.AieMlMultiDimDesc.DimDesc[i].Wrap =
			Tensor->Dim[i].AieMlDimDesc.Wrap;
	}

	return XAIE_OK;
}
/*****************************************************************************/
/**
*
* This API setups the DmaDesc with the register fields required for the dma
* addressing mode of AIEML.
*
* @param	DmaDesc: Initialized Dma Descriptor.
* @param	Tensor: Dma Tensor describing the address mode of dma.
*
* @return	XAIE_OK on success, Error code on failure.
*
* @note		Internal API only.
*
******************************************************************************/
This API setups the DmaDesc with the register fields required for the dma
addressing mode of AIEML.
This API setups the DmaDesc with the register fields required for the dma addressing mode of AIEML .
AieRC _XAieMl_DmaSetMultiDim(XAie_DmaDesc *DmaDesc, XAie_DmaTensor *Tensor)
{
	for(u8 i = 0U; i < Tensor->NumDim; i++) {
		const XAie_DmaBdProp *BdProp = DmaDesc->DmaMod->BdProp;
		if(Tensor->Dim[i].AieMlDimDesc.StepSize == 0U) {
			XAIE_ERROR("Invalid stepsize for dimension %d\n", i);
			return XAIE_ERR;
		}
		if((Tensor->Dim[i].AieMlDimDesc.StepSize > BdProp->StepSizeMax) ||
				(Tensor->Dim[i].AieMlDimDesc.Wrap > BdProp->WrapMax)) {
			XAIE_ERROR("Invalid stepsize or wrap for dimension %d\n",
					i);
			return XAIE_ERR;
		}
	}
	for(u8 i = 0U; i < Tensor->NumDim; i++) {
		DmaDesc->MultiDimDesc.AieMlMultiDimDesc.DimDesc[i].StepSize =
			Tensor->Dim[i].AieMlDimDesc.StepSize;
		DmaDesc->MultiDimDesc.AieMlMultiDimDesc.DimDesc[i].Wrap =
			Tensor->Dim[i].AieMlDimDesc.Wrap;
	}
	return XAIE_OK;
}
AieRC _XAieMl_DmaSetMultiDim ( XAie_DmaDesc * DmaDesc , XAie_DmaTensor * Tensor ) { for ( u8 i = 0U ; i < Tensor -> NumDim ; i ++ ) { const XAie_DmaBdProp * BdProp = DmaDesc -> DmaMod -> BdProp ; if ( Tensor -> Dim [ i ] . AieMlDimDesc . StepSize == 0U ) { XAIE_ERROR ( " \n " , i ) ; return XAIE_ERR ; } if ( ( Tensor -> Dim [ i ] . AieMlDimDesc . StepSize > BdProp -> StepSizeMax ) || ( Tensor -> Dim [ i ] . AieMlDimDesc . Wrap > BdProp -> WrapMax ) ) { XAIE_ERROR ( " \n " , i ) ; return XAIE_ERR ; } } for ( u8 i = 0U ; i < Tensor -> NumDim ; i ++ ) { DmaDesc -> MultiDimDesc . AieMlMultiDimDesc . DimDesc [ i ] . StepSize = Tensor -> Dim [ i ] . AieMlDimDesc . StepSize ; DmaDesc -> MultiDimDesc . AieMlMultiDimDesc . DimDesc [ i ] . Wrap = Tensor -> Dim [ i ] . AieMlDimDesc . Wrap ; } return XAIE_OK ; }
This API setups the DmaDesc with the register fields required for the dma
addressing mode of AIEML.
This API setups the DmaDesc with the register fields required for the dma addressing mode of AIEML .