XilinxProcessorIPLib/drivers/hdcp22_rx_dp/src/xhdcp22_rx.c
void XHdcp22Rx_LogReset(XHdcp22_Rx *InstancePtr, u8 Verbose)
{
	/* Verify arguments. */
	Xil_AssertVoid(InstancePtr != NULL);

	InstancePtr->Log.Head = 0;
	InstancePtr->Log.Tail = 0;
	InstancePtr->Log.Verbose = Verbose;

	/* Reset and start the logging timer. */
	/* Note: This timer increments continuously and will wrap at 42 second (100 Mhz clock) */
	if (InstancePtr->TimerInst.IsReady == XIL_COMPONENT_IS_READY) {
	  XTmrCtr_Reset(&InstancePtr->TimerInst, XHDCP22_RX_TMR_CTR_0);
	  XTmrCtr_Start(&InstancePtr->TimerInst, XHDCP22_RX_TMR_CTR_0);
	}
}
/*****************************************************************************/
/**
* This function clears the log pointers.
*
* @param	InstancePtr is a pointer to the XHdcp22_Rx core instance.
* @param	Verbose allows to add debug logging.
*
* @return	None.
*
* @note		None.
******************************************************************************/
This function clears the log pointers.
This function clears the log pointers .
void XHdcp22Rx_LogReset(XHdcp22_Rx *InstancePtr, u8 Verbose)
{
	Xil_AssertVoid(InstancePtr != NULL);
	InstancePtr->Log.Head = 0;
	InstancePtr->Log.Tail = 0;
	InstancePtr->Log.Verbose = Verbose;
	if (InstancePtr->TimerInst.IsReady == XIL_COMPONENT_IS_READY) {
	  XTmrCtr_Reset(&InstancePtr->TimerInst, XHDCP22_RX_TMR_CTR_0);
	  XTmrCtr_Start(&InstancePtr->TimerInst, XHDCP22_RX_TMR_CTR_0);
	}
}
void XHdcp22Rx_LogReset ( XHdcp22_Rx * InstancePtr , u8 Verbose ) { Xil_AssertVoid ( InstancePtr != NULL ) ; InstancePtr -> Log . Head = 0 ; InstancePtr -> Log . Tail = 0 ; InstancePtr -> Log . Verbose = Verbose ; if ( InstancePtr -> TimerInst . IsReady == XIL_COMPONENT_IS_READY ) { XTmrCtr_Reset ( & InstancePtr -> TimerInst , XHDCP22_RX_TMR_CTR_0 ) ; XTmrCtr_Start ( & InstancePtr -> TimerInst , XHDCP22_RX_TMR_CTR_0 ) ; } }
This function clears the log pointers.
This function clears the log pointers .
/* Verify arguments. */ /* Reset and start the logging timer. */ /* Note: This timer increments continuously and will wrap at 42 second (100 Mhz clock) */