src/dpdk/drivers/net/iavf/iavf_ethdev.c
static inline void
iavf_enable_irq0(struct iavf_hw *hw)
{
	/* Enable admin queue interrupt trigger */
	IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1,
		       IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK);

	IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01,
		       IAVF_VFINT_DYN_CTL01_INTENA_MASK |
		       IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK |
		       IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK);

	IAVF_WRITE_FLUSH(hw);
}
/* Enable default admin queue interrupt setting */
Enable default admin queue interrupt setting
Enable default admin queue interrupt setting
static inline void
iavf_enable_irq0(struct iavf_hw *hw)
{
	IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1,
		       IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK);
	IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01,
		       IAVF_VFINT_DYN_CTL01_INTENA_MASK |
		       IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK |
		       IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK);
	IAVF_WRITE_FLUSH(hw);
}
static inline void iavf_enable_irq0 ( struct iavf_hw * hw ) { IAVF_WRITE_REG ( hw , IAVF_VFINT_ICR0_ENA1 , IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK ) ; IAVF_WRITE_REG ( hw , IAVF_VFINT_DYN_CTL01 , IAVF_VFINT_DYN_CTL01_INTENA_MASK | IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK ) ; IAVF_WRITE_FLUSH ( hw ) ; }
Enable default admin queue interrupt setting
Enable default admin queue interrupt setting
/* Enable admin queue interrupt trigger */