src/dpdk/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c
static int
fpga_queue_stop(struct rte_bbdev *dev, uint16_t queue_id)
{
	struct fpga_5gnr_fec_device *d = dev->data->dev_private;
#ifdef RTE_LIBRTE_BBDEV_DEBUG
	if (d == NULL) {
		rte_bbdev_log(ERR, "Invalid device pointer");
		return -1;
	}
#endif
	struct fpga_queue *q = dev->data->queues[queue_id].queue_private;
	uint32_t offset = FPGA_5GNR_FEC_RING_CTRL_REGS +
			(sizeof(struct fpga_ring_ctrl_reg) * q->q_idx);
	uint8_t payload = 0x01;
	uint8_t counter = 0;
	uint8_t timeout = FPGA_QUEUE_FLUSH_TIMEOUT_US /
			FPGA_TIMEOUT_CHECK_INTERVAL;

	/* Set flush_queue_en bit to trigger queue flushing */
	fpga_reg_write_8(d->mmio_base,
			offset + FPGA_5GNR_FEC_RING_FLUSH_QUEUE_EN, payload);

	/** Check if queue flush is completed.
	 * FPGA will update the completion flag after queue flushing is
	 * completed. If completion flag is not updated within 1ms it is
	 * considered as a failure.
	 */
	while (!(*((volatile uint8_t *)d->flush_queue_status + q->q_idx)
			& payload)) {
		if (counter > timeout) {
			rte_bbdev_log(ERR, "FPGA Queue Flush failed for queue %d",
					queue_id);
			return -1;
		}
		usleep(FPGA_TIMEOUT_CHECK_INTERVAL);
		counter++;
	}

	/* Disable queue */
	payload = 0x00;
	fpga_reg_write_8(d->mmio_base, offset + FPGA_5GNR_FEC_RING_ENABLE,
			payload);

	rte_bbdev_log_debug("FPGA Queue[%d] stopped", queue_id);
	return 0;
}
/* Function stops a device queue. */
Function stops a device queue.
Function stops a device queue .
static int
fpga_queue_stop(struct rte_bbdev *dev, uint16_t queue_id)
{
	struct fpga_5gnr_fec_device *d = dev->data->dev_private;
#ifdef RTE_LIBRTE_BBDEV_DEBUG
	if (d == NULL) {
		rte_bbdev_log(ERR, "Invalid device pointer");
		return -1;
	}
#endif
	struct fpga_queue *q = dev->data->queues[queue_id].queue_private;
	uint32_t offset = FPGA_5GNR_FEC_RING_CTRL_REGS +
			(sizeof(struct fpga_ring_ctrl_reg) * q->q_idx);
	uint8_t payload = 0x01;
	uint8_t counter = 0;
	uint8_t timeout = FPGA_QUEUE_FLUSH_TIMEOUT_US /
			FPGA_TIMEOUT_CHECK_INTERVAL;
	fpga_reg_write_8(d->mmio_base,
			offset + FPGA_5GNR_FEC_RING_FLUSH_QUEUE_EN, payload);
	while (!(*((volatile uint8_t *)d->flush_queue_status + q->q_idx)
			& payload)) {
		if (counter > timeout) {
			rte_bbdev_log(ERR, "FPGA Queue Flush failed for queue %d",
					queue_id);
			return -1;
		}
		usleep(FPGA_TIMEOUT_CHECK_INTERVAL);
		counter++;
	}
	payload = 0x00;
	fpga_reg_write_8(d->mmio_base, offset + FPGA_5GNR_FEC_RING_ENABLE,
			payload);
	rte_bbdev_log_debug("FPGA Queue[%d] stopped", queue_id);
	return 0;
}
static int fpga_queue_stop ( struct rte_bbdev * dev , uint16_t queue_id ) { struct fpga_5gnr_fec_device * d = dev -> data -> dev_private ; #ifdef RTE_LIBRTE_BBDEV_DEBUG if ( d == NULL ) { rte_bbdev_log ( ERR , " " ) ; return -1 ; } #endif struct fpga_queue * q = dev -> data -> queues [ queue_id ] . queue_private ; uint32_t offset = FPGA_5GNR_FEC_RING_CTRL_REGS + ( sizeof ( struct fpga_ring_ctrl_reg ) * q -> q_idx ) ; uint8_t payload = 0x01 ; uint8_t counter = 0 ; uint8_t timeout = FPGA_QUEUE_FLUSH_TIMEOUT_US / FPGA_TIMEOUT_CHECK_INTERVAL ; fpga_reg_write_8 ( d -> mmio_base , offset + FPGA_5GNR_FEC_RING_FLUSH_QUEUE_EN , payload ) ; while ( ! ( * ( ( volatile uint8_t * ) d -> flush_queue_status + q -> q_idx ) & payload ) ) { if ( counter > timeout ) { rte_bbdev_log ( ERR , " " , queue_id ) ; return -1 ; } usleep ( FPGA_TIMEOUT_CHECK_INTERVAL ) ; counter ++ ; } payload = 0x00 ; fpga_reg_write_8 ( d -> mmio_base , offset + FPGA_5GNR_FEC_RING_ENABLE , payload ) ; rte_bbdev_log_debug ( " " , queue_id ) ; return 0 ; }
Function stops a device queue.
Function stops a device queue .
/* Set flush_queue_en bit to trigger queue flushing */ /** Check if queue flush is completed.
	 * FPGA will update the completion flag after queue flushing is
	 * completed. If completion flag is not updated within 1ms it is
	 * considered as a failure.
	 */ /* Disable queue */