target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl839x.c
static void rtl839x_fill_l2_row(u32 r[], struct rtl838x_l2_entry *e)
{
	if (!e->valid) {
		r[0] = r[1] = r[2] = 0;
		return;
	}

	r[2] = e->is_ip_mc ? BIT(31) : 0;
	r[2] |= e->is_ipv6_mc ? BIT(30) : 0;

	if (!e->is_ip_mc  && !e->is_ipv6_mc) {
		r[0] = ((u32)e->mac[0]) << 12;
		r[0] |= ((u32)e->mac[1]) << 4;
		r[0] |= ((u32)e->mac[2]) >> 4;
		r[1] = ((u32)e->mac[2]) << 28;
		r[1] |= ((u32)e->mac[3]) << 20;
		r[1] |= ((u32)e->mac[4]) << 12;
		r[1] |= ((u32)e->mac[5]) << 4;

		if (!(e->mac[0] & 1)) { // Not multicast
			r[2] |= e->is_static ? BIT(18) : 0;
			r[0] |= ((u32)e->rvid) << 20;
			r[2] |= e->port << 24;
			r[2] |= e->block_da ? BIT(19) : 0;
			r[2] |= e->block_sa ? BIT(20) : 0;
			r[2] |= e->suspended ? BIT(17) : 0;
			r[2] |= ((u32)e->age) << 21;
			if (e->next_hop) {
				r[2] |= BIT(16);
				r[2] |= e->nh_vlan_target ? BIT(15) : 0;
				r[2] |= (e->nh_route_id & 0x7ff) << 4;
			} else {
				r[2] |= e->vid << 4;
			}
			pr_debug("Write L2 NH: %08x %08x %08x\n", r[0], r[1], r[2]);
		} else {  // L2 Multicast
			r[0] |= ((u32)e->rvid) << 20;
			r[2] |= ((u32)e->mc_portmask_index) << 6;
		}
	} else { // IPv4 or IPv6 MC entry
		r[0] = ((u32)e->rvid) << 20;
		r[1] = e->mc_gip;
		r[2] |= ((u32)e->mc_portmask_index) << 6;
	}
}
/*
 * Fills the 3 SoC table registers r[] with the information in the rtl838x_l2_entry
 */
Fills the 3 SoC table registers r[] with the information in the rtl838x_l2_entry
Fills the 3 SoC table registers r [] with the information in the rtl838x_l2_entry
static void rtl839x_fill_l2_row(u32 r[], struct rtl838x_l2_entry *e)
{
	if (!e->valid) {
		r[0] = r[1] = r[2] = 0;
		return;
	}
	r[2] = e->is_ip_mc ? BIT(31) : 0;
	r[2] |= e->is_ipv6_mc ? BIT(30) : 0;
	if (!e->is_ip_mc  && !e->is_ipv6_mc) {
		r[0] = ((u32)e->mac[0]) << 12;
		r[0] |= ((u32)e->mac[1]) << 4;
		r[0] |= ((u32)e->mac[2]) >> 4;
		r[1] = ((u32)e->mac[2]) << 28;
		r[1] |= ((u32)e->mac[3]) << 20;
		r[1] |= ((u32)e->mac[4]) << 12;
		r[1] |= ((u32)e->mac[5]) << 4;
		if (!(e->mac[0] & 1)) { 
			r[2] |= e->is_static ? BIT(18) : 0;
			r[0] |= ((u32)e->rvid) << 20;
			r[2] |= e->port << 24;
			r[2] |= e->block_da ? BIT(19) : 0;
			r[2] |= e->block_sa ? BIT(20) : 0;
			r[2] |= e->suspended ? BIT(17) : 0;
			r[2] |= ((u32)e->age) << 21;
			if (e->next_hop) {
				r[2] |= BIT(16);
				r[2] |= e->nh_vlan_target ? BIT(15) : 0;
				r[2] |= (e->nh_route_id & 0x7ff) << 4;
			} else {
				r[2] |= e->vid << 4;
			}
			pr_debug("Write L2 NH: %08x %08x %08x\n", r[0], r[1], r[2]);
		} else {  
			r[0] |= ((u32)e->rvid) << 20;
			r[2] |= ((u32)e->mc_portmask_index) << 6;
		}
	} else { 
		r[0] = ((u32)e->rvid) << 20;
		r[1] = e->mc_gip;
		r[2] |= ((u32)e->mc_portmask_index) << 6;
	}
}
static void rtl839x_fill_l2_row ( u32 r [ ] , struct rtl838x_l2_entry * e ) { if ( ! e -> valid ) { r [ 0 ] = r [ 1 ] = r [ 2 ] = 0 ; return ; } r [ 2 ] = e -> is_ip_mc ? BIT ( 31 ) : 0 ; r [ 2 ] |= e -> is_ipv6_mc ? BIT ( 30 ) : 0 ; if ( ! e -> is_ip_mc && ! e -> is_ipv6_mc ) { r [ 0 ] = ( ( u32 ) e -> mac [ 0 ] ) << 12 ; r [ 0 ] |= ( ( u32 ) e -> mac [ 1 ] ) << 4 ; r [ 0 ] |= ( ( u32 ) e -> mac [ 2 ] ) >> 4 ; r [ 1 ] = ( ( u32 ) e -> mac [ 2 ] ) << 28 ; r [ 1 ] |= ( ( u32 ) e -> mac [ 3 ] ) << 20 ; r [ 1 ] |= ( ( u32 ) e -> mac [ 4 ] ) << 12 ; r [ 1 ] |= ( ( u32 ) e -> mac [ 5 ] ) << 4 ; if ( ! ( e -> mac [ 0 ] & 1 ) ) { r [ 2 ] |= e -> is_static ? BIT ( 18 ) : 0 ; r [ 0 ] |= ( ( u32 ) e -> rvid ) << 20 ; r [ 2 ] |= e -> port << 24 ; r [ 2 ] |= e -> block_da ? BIT ( 19 ) : 0 ; r [ 2 ] |= e -> block_sa ? BIT ( 20 ) : 0 ; r [ 2 ] |= e -> suspended ? BIT ( 17 ) : 0 ; r [ 2 ] |= ( ( u32 ) e -> age ) << 21 ; if ( e -> next_hop ) { r [ 2 ] |= BIT ( 16 ) ; r [ 2 ] |= e -> nh_vlan_target ? BIT ( 15 ) : 0 ; r [ 2 ] |= ( e -> nh_route_id & 0x7ff ) << 4 ; } else { r [ 2 ] |= e -> vid << 4 ; } pr_debug ( " \n " , r [ 0 ] , r [ 1 ] , r [ 2 ] ) ; } else { r [ 0 ] |= ( ( u32 ) e -> rvid ) << 20 ; r [ 2 ] |= ( ( u32 ) e -> mc_portmask_index ) << 6 ; } } else { r [ 0 ] = ( ( u32 ) e -> rvid ) << 20 ; r [ 1 ] = e -> mc_gip ; r [ 2 ] |= ( ( u32 ) e -> mc_portmask_index ) << 6 ; } }
Fills the 3 SoC table registers r[] with the information in the rtl838x_l2_entry
Fills the 3 SoC table registers r [] with the information in the rtl838x_l2_entry
// Not multicast // L2 Multicast // IPv4 or IPv6 MC entry