XilinxProcessorIPLib/drivers/vphy/src/xvphy.c
void XVphy_SetRxLpm(XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId,
		XVphy_DirectionType Dir, u8 Enable)
{
	u32 RegVal;
	u32 MaskVal;

	/* Suppress Warning Messages */
	QuadId = QuadId;
	Dir = Dir;

	RegVal = XVphy_ReadReg(InstancePtr->Config.BaseAddr,
							XVPHY_RX_EQ_CDR_REG);

	if (ChId == XVPHY_CHANNEL_ID_CHA) {
		MaskVal = XVPHY_RX_CONTROL_RXLPMEN_ALL_MASK;
	}
	else {
		MaskVal = XVPHY_RX_CONTROL_RXLPMEN_MASK(ChId);
	}

	if (Enable) {
		RegVal |= MaskVal;
	}
	else {
		RegVal &= ~MaskVal;
	}
	XVphy_WriteReg(InstancePtr->Config.BaseAddr, XVPHY_RX_EQ_CDR_REG,
									RegVal);
}
/*****************************************************************************/
/**
* This function will enable or disable the LPM logic in the Video PHY core.
*
* @param	InstancePtr is a pointer to the XVphy core instance.
* @param	QuadId is the GT quad ID to operate on.
* @param	ChId is the channel ID to operate on.
* @param	Dir is an indicator for TX or RX.
* @param	Enable will enable (if 1) or disable (if 0) the LPM logic.
*
* @return	None.
*
* @note		None.
*
******************************************************************************/
This function will enable or disable the LPM logic in the Video PHY core.
This function will enable or disable the LPM logic in the Video PHY core .
void XVphy_SetRxLpm(XVphy *InstancePtr, u8 QuadId, XVphy_ChannelId ChId,
		XVphy_DirectionType Dir, u8 Enable)
{
	u32 RegVal;
	u32 MaskVal;
	QuadId = QuadId;
	Dir = Dir;
	RegVal = XVphy_ReadReg(InstancePtr->Config.BaseAddr,
							XVPHY_RX_EQ_CDR_REG);
	if (ChId == XVPHY_CHANNEL_ID_CHA) {
		MaskVal = XVPHY_RX_CONTROL_RXLPMEN_ALL_MASK;
	}
	else {
		MaskVal = XVPHY_RX_CONTROL_RXLPMEN_MASK(ChId);
	}
	if (Enable) {
		RegVal |= MaskVal;
	}
	else {
		RegVal &= ~MaskVal;
	}
	XVphy_WriteReg(InstancePtr->Config.BaseAddr, XVPHY_RX_EQ_CDR_REG,
									RegVal);
}
void XVphy_SetRxLpm ( XVphy * InstancePtr , u8 QuadId , XVphy_ChannelId ChId , XVphy_DirectionType Dir , u8 Enable ) { u32 RegVal ; u32 MaskVal ; QuadId = QuadId ; Dir = Dir ; RegVal = XVphy_ReadReg ( InstancePtr -> Config . BaseAddr , XVPHY_RX_EQ_CDR_REG ) ; if ( ChId == XVPHY_CHANNEL_ID_CHA ) { MaskVal = XVPHY_RX_CONTROL_RXLPMEN_ALL_MASK ; } else { MaskVal = XVPHY_RX_CONTROL_RXLPMEN_MASK ( ChId ) ; } if ( Enable ) { RegVal |= MaskVal ; } else { RegVal &= ~ MaskVal ; } XVphy_WriteReg ( InstancePtr -> Config . BaseAddr , XVPHY_RX_EQ_CDR_REG , RegVal ) ; }
This function will enable or disable the LPM logic in the Video PHY core.
This function will enable or disable the LPM logic in the Video PHY core .
/* Suppress Warning Messages */