lib/sw_apps/zynqmp_fsbl/src/xfsbl_bs.c
u32 XFsbl_PLWaitForDone(void) {
	u32 Status;
	u32 PollCount;
	u32 RegVal = 0U;

	PollCount = PL_DONE_POLL_COUNT;
	while (PollCount > 0U) {
		/* Read PCAP Status register and check for PL_DONE bit */
		RegVal = XFsbl_In32(CSU_PCAP_STATUS);
		RegVal &= CSU_PCAP_STATUS_PL_DONE_MASK;
		if (RegVal == CSU_PCAP_STATUS_PL_DONE_MASK) {
			break;
		}
		PollCount--;
	}

	if (RegVal == CSU_PCAP_STATUS_PL_DONE_MASK) {
		XFsbl_Printf(DEBUG_GENERAL, "PL Configuration done successfully \r\n");
	} else {
		Status = XFSBL_ERROR_BITSTREAM_LOAD_FAIL;
		XFsbl_Printf(DEBUG_GENERAL, "XFSBL_ERROR_BITSTREAM_LOAD_FAIL\r\n");
		goto END;
	}

	/* Reset PCAP after data transfer */
	RegVal = XFsbl_In32(CSU_PCAP_RESET);
	RegVal = RegVal | CSU_PCAP_RESET_RESET_MASK;
	XFsbl_Out32(CSU_PCAP_RESET, RegVal);

	do {
		RegVal = XFsbl_In32(CSU_PCAP_RESET);
		RegVal = RegVal & CSU_PCAP_RESET_RESET_MASK;
	} while (RegVal != CSU_PCAP_RESET_RESET_MASK);

	Status = XFSBL_SUCCESS;
	END:
	return Status;
}
/*****************************************************************************/
/**
 * This function waits for PL Done bit to be set or till timeout and resets
 * PCAP after this.
 *
 * @param	None
 *
 * @return	error status based on implemented functionality (SUCCESS by default)
 *
 *****************************************************************************/
This function waits for PL Done bit to be set or till timeout and resets
PCAP after this.

@param       None

@return      error status based on implemented functionality (SUCCESS by default)
This function waits for PL Done bit to be set or till timeout and resets PCAP after this . @param None @return error status based on implemented functionality ( SUCCESS by default )
u32 XFsbl_PLWaitForDone(void) {
	u32 Status;
	u32 PollCount;
	u32 RegVal = 0U;
	PollCount = PL_DONE_POLL_COUNT;
	while (PollCount > 0U) {
		RegVal = XFsbl_In32(CSU_PCAP_STATUS);
		RegVal &= CSU_PCAP_STATUS_PL_DONE_MASK;
		if (RegVal == CSU_PCAP_STATUS_PL_DONE_MASK) {
			break;
		}
		PollCount--;
	}
	if (RegVal == CSU_PCAP_STATUS_PL_DONE_MASK) {
		XFsbl_Printf(DEBUG_GENERAL, "PL Configuration done successfully \r\n");
	} else {
		Status = XFSBL_ERROR_BITSTREAM_LOAD_FAIL;
		XFsbl_Printf(DEBUG_GENERAL, "XFSBL_ERROR_BITSTREAM_LOAD_FAIL\r\n");
		goto END;
	}
	RegVal = XFsbl_In32(CSU_PCAP_RESET);
	RegVal = RegVal | CSU_PCAP_RESET_RESET_MASK;
	XFsbl_Out32(CSU_PCAP_RESET, RegVal);
	do {
		RegVal = XFsbl_In32(CSU_PCAP_RESET);
		RegVal = RegVal & CSU_PCAP_RESET_RESET_MASK;
	} while (RegVal != CSU_PCAP_RESET_RESET_MASK);
	Status = XFSBL_SUCCESS;
	END:
	return Status;
}
u32 XFsbl_PLWaitForDone ( void ) { u32 Status ; u32 PollCount ; u32 RegVal = 0U ; PollCount = PL_DONE_POLL_COUNT ; while ( PollCount > 0U ) { RegVal = XFsbl_In32 ( CSU_PCAP_STATUS ) ; RegVal &= CSU_PCAP_STATUS_PL_DONE_MASK ; if ( RegVal == CSU_PCAP_STATUS_PL_DONE_MASK ) { break ; } PollCount -- ; } if ( RegVal == CSU_PCAP_STATUS_PL_DONE_MASK ) { XFsbl_Printf ( DEBUG_GENERAL , " \r \n " ) ; } else { Status = XFSBL_ERROR_BITSTREAM_LOAD_FAIL ; XFsbl_Printf ( DEBUG_GENERAL , " \r \n " ) ; goto END ; } RegVal = XFsbl_In32 ( CSU_PCAP_RESET ) ; RegVal = RegVal | CSU_PCAP_RESET_RESET_MASK ; XFsbl_Out32 ( CSU_PCAP_RESET , RegVal ) ; do { RegVal = XFsbl_In32 ( CSU_PCAP_RESET ) ; RegVal = RegVal & CSU_PCAP_RESET_RESET_MASK ; } while ( RegVal != CSU_PCAP_RESET_RESET_MASK ) ; Status = XFSBL_SUCCESS ; END : return Status ; }
This function waits for PL Done bit to be set or till timeout and resets
 PCAP after this.
This function waits for PL Done bit to be set or till timeout and resets PCAP after this .
/* Read PCAP Status register and check for PL_DONE bit */ /* Reset PCAP after data transfer */