XilinxProcessorIPLib/drivers/v_hdmiphy1/src/xhdmiphy1_hdmi.c
void XHdmiphy1_HdmiUpdateClockSelection(XHdmiphy1 *InstancePtr, u8 QuadId,
		XHdmiphy1_SysClkDataSelType TxSysPllClkSel,
		XHdmiphy1_SysClkDataSelType RxSysPllClkSel)
{
	u8 Id, Id0, Id1;

	/* Reset PLL */
	XHdmiphy1_ResetGtPll(InstancePtr, QuadId, XHDMIPHY1_CHANNEL_ID_CHA,
			XHDMIPHY1_DIR_RX, TRUE);
	XHdmiphy1_ResetGtPll(InstancePtr, QuadId, XHDMIPHY1_CHANNEL_ID_CHA,
			XHDMIPHY1_DIR_TX, TRUE);

	/* Set default. */
	XHdmiphy1_Ch2Ids(InstancePtr, XHDMIPHY1_CHANNEL_ID_CHA, &Id0, &Id1);
	for (Id = Id0; Id <= Id1; Id++) {
		InstancePtr->Quads[QuadId].Plls[XHDMIPHY1_CH2IDX(Id)].TxState =
			XHDMIPHY1_GT_STATE_IDLE;
		InstancePtr->Quads[QuadId].Plls[XHDMIPHY1_CH2IDX(Id)].RxState =
			XHDMIPHY1_GT_STATE_IDLE;
	}

	/* Update Hdmiphy Clocking */
	InstancePtr->Config.TxSysPllClkSel = TxSysPllClkSel;
	InstancePtr->Config.RxSysPllClkSel = RxSysPllClkSel;
	XHdmiphy1_HdmiSetSystemClockSelection(InstancePtr, QuadId);
}
/*****************************************************************************/
/**
* This function Updates the HDMIPHY clocking.
*
* @param	InstancePtr is a pointer to the XHdmiphy1 core instance.
* @param	QuadId is the GT quad ID to operate on.
* @param	TxSysPllClkSel is the SYSCLKDATA selection for TX.
* @param	RxSysPllClkSel is the SYSCLKDATA selection for RX.
*
* @return	None.
*
* @note		None.
*
******************************************************************************/
This function Updates the HDMIPHY clocking.
This function Updates the HDMIPHY clocking .
void XHdmiphy1_HdmiUpdateClockSelection(XHdmiphy1 *InstancePtr, u8 QuadId,
		XHdmiphy1_SysClkDataSelType TxSysPllClkSel,
		XHdmiphy1_SysClkDataSelType RxSysPllClkSel)
{
	u8 Id, Id0, Id1;
	XHdmiphy1_ResetGtPll(InstancePtr, QuadId, XHDMIPHY1_CHANNEL_ID_CHA,
			XHDMIPHY1_DIR_RX, TRUE);
	XHdmiphy1_ResetGtPll(InstancePtr, QuadId, XHDMIPHY1_CHANNEL_ID_CHA,
			XHDMIPHY1_DIR_TX, TRUE);
	XHdmiphy1_Ch2Ids(InstancePtr, XHDMIPHY1_CHANNEL_ID_CHA, &Id0, &Id1);
	for (Id = Id0; Id <= Id1; Id++) {
		InstancePtr->Quads[QuadId].Plls[XHDMIPHY1_CH2IDX(Id)].TxState =
			XHDMIPHY1_GT_STATE_IDLE;
		InstancePtr->Quads[QuadId].Plls[XHDMIPHY1_CH2IDX(Id)].RxState =
			XHDMIPHY1_GT_STATE_IDLE;
	}
	InstancePtr->Config.TxSysPllClkSel = TxSysPllClkSel;
	InstancePtr->Config.RxSysPllClkSel = RxSysPllClkSel;
	XHdmiphy1_HdmiSetSystemClockSelection(InstancePtr, QuadId);
}
void XHdmiphy1_HdmiUpdateClockSelection ( XHdmiphy1 * InstancePtr , u8 QuadId , XHdmiphy1_SysClkDataSelType TxSysPllClkSel , XHdmiphy1_SysClkDataSelType RxSysPllClkSel ) { u8 Id , Id0 , Id1 ; XHdmiphy1_ResetGtPll ( InstancePtr , QuadId , XHDMIPHY1_CHANNEL_ID_CHA , XHDMIPHY1_DIR_RX , TRUE ) ; XHdmiphy1_ResetGtPll ( InstancePtr , QuadId , XHDMIPHY1_CHANNEL_ID_CHA , XHDMIPHY1_DIR_TX , TRUE ) ; XHdmiphy1_Ch2Ids ( InstancePtr , XHDMIPHY1_CHANNEL_ID_CHA , & Id0 , & Id1 ) ; for ( Id = Id0 ; Id <= Id1 ; Id ++ ) { InstancePtr -> Quads [ QuadId ] . Plls [ XHDMIPHY1_CH2IDX ( Id ) ] . TxState = XHDMIPHY1_GT_STATE_IDLE ; InstancePtr -> Quads [ QuadId ] . Plls [ XHDMIPHY1_CH2IDX ( Id ) ] . RxState = XHDMIPHY1_GT_STATE_IDLE ; } InstancePtr -> Config . TxSysPllClkSel = TxSysPllClkSel ; InstancePtr -> Config . RxSysPllClkSel = RxSysPllClkSel ; XHdmiphy1_HdmiSetSystemClockSelection ( InstancePtr , QuadId ) ; }
This function Updates the HDMIPHY clocking.
This function Updates the HDMIPHY clocking .
/* Reset PLL */ /* Set default. */ /* Update Hdmiphy Clocking */