src/dpdk/drivers/baseband/fpga_5gnr_fec/rte_fpga_5gnr_fec.c
static inline int
fpga_dma_desc_ld_fill(struct rte_bbdev_dec_op *op,
		struct fpga_dma_dec_desc *desc,
		struct rte_mbuf *input,	struct rte_mbuf *output,
		uint16_t harq_in_length,
		uint32_t in_offset, uint32_t out_offset,
		uint32_t harq_offset,
		uint16_t desc_offset,
		uint8_t cbs_in_op)
{
	/* reset */
	desc->done = 0;
	desc->error = 0;
	/* Set inbound data buffer address */
	desc->in_addr_hi = (uint32_t)(
			rte_pktmbuf_iova_offset(input, in_offset) >> 32);
	desc->in_addr_lw = (uint32_t)(
			rte_pktmbuf_iova_offset(input, in_offset));
	desc->rm_e = op->ldpc_dec.cb_params.e;
	desc->harq_input_length = harq_in_length;
	desc->et_dis = !check_bit(op->ldpc_dec.op_flags,
			RTE_BBDEV_LDPC_ITERATION_STOP_ENABLE);
	desc->rv = op->ldpc_dec.rv_index;
	desc->crc24b_ind = check_bit(op->ldpc_dec.op_flags,
			RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK);
	desc->drop_crc24b = check_bit(op->ldpc_dec.op_flags,
			RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP);
	desc->desc_idx = desc_offset;
	desc->ncb = op->ldpc_dec.n_cb;
	desc->num_null = op->ldpc_dec.n_filler;
	desc->hbstroe_offset = harq_offset >> 10;
	desc->zc = op->ldpc_dec.z_c;
	desc->harqin_en = check_bit(op->ldpc_dec.op_flags,
			RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE);
	desc->bg_idx = op->ldpc_dec.basegraph - 1;
	desc->max_iter = op->ldpc_dec.iter_max;
	desc->qm_idx = op->ldpc_dec.q_m / 2;
	desc->out_addr_hi = (uint32_t)(
			rte_pktmbuf_iova_offset(output, out_offset) >> 32);
	desc->out_addr_lw = (uint32_t)(
			rte_pktmbuf_iova_offset(output, out_offset));
	/* Save software context needed for dequeue */
	desc->op_addr = op;
	/* Set total number of CBs in an op */
	desc->cbs_in_op = cbs_in_op;

	return 0;
}
/**
 * Set DMA descriptor for decode operation (1 Code Block)
 *
 * @param op
 *   Pointer to a single encode operation.
 * @param desc
 *   Pointer to DMA descriptor.
 * @param input
 *   Pointer to pointer to input data which will be decoded.
 * @param in_offset
 *   Input offset in rte_mbuf structure. It is used for calculating the point
 *   where data is starting.
 * @param out_offset
 *   Output offset in rte_mbuf structure. It is used for calculating the point
 *   where hard output data will be stored.
 * @param cbs_in_op
 *   Number of CBs contained in one operation.
 */
Set DMA descriptor for decode operation (1 Code Block)
@param op
Pointer to a single encode operation.
@param desc
Pointer to DMA descriptor.
@param input
Pointer to pointer to input data which will be decoded.
@param in_offset
Input offset in rte_mbuf structure. It is used for calculating the point
where data is starting.
@param out_offset
Output offset in rte_mbuf structure. It is used for calculating the point
where hard output data will be stored.
@param cbs_in_op
Number of CBs contained in one operation.
Set DMA descriptor for decode operation ( 1 Code Block ) @param op Pointer to a single encode operation . @param desc Pointer to DMA descriptor . @param input Pointer to pointer to input data which will be decoded . @param in_offset Input offset in rte_mbuf structure . It is used for calculating the point where data is starting . @param out_offset Output offset in rte_mbuf structure . It is used for calculating the point where hard output data will be stored . @param cbs_in_op Number of CBs contained in one operation .
static inline int
fpga_dma_desc_ld_fill(struct rte_bbdev_dec_op *op,
		struct fpga_dma_dec_desc *desc,
		struct rte_mbuf *input,	struct rte_mbuf *output,
		uint16_t harq_in_length,
		uint32_t in_offset, uint32_t out_offset,
		uint32_t harq_offset,
		uint16_t desc_offset,
		uint8_t cbs_in_op)
{
	desc->done = 0;
	desc->error = 0;
	desc->in_addr_hi = (uint32_t)(
			rte_pktmbuf_iova_offset(input, in_offset) >> 32);
	desc->in_addr_lw = (uint32_t)(
			rte_pktmbuf_iova_offset(input, in_offset));
	desc->rm_e = op->ldpc_dec.cb_params.e;
	desc->harq_input_length = harq_in_length;
	desc->et_dis = !check_bit(op->ldpc_dec.op_flags,
			RTE_BBDEV_LDPC_ITERATION_STOP_ENABLE);
	desc->rv = op->ldpc_dec.rv_index;
	desc->crc24b_ind = check_bit(op->ldpc_dec.op_flags,
			RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK);
	desc->drop_crc24b = check_bit(op->ldpc_dec.op_flags,
			RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP);
	desc->desc_idx = desc_offset;
	desc->ncb = op->ldpc_dec.n_cb;
	desc->num_null = op->ldpc_dec.n_filler;
	desc->hbstroe_offset = harq_offset >> 10;
	desc->zc = op->ldpc_dec.z_c;
	desc->harqin_en = check_bit(op->ldpc_dec.op_flags,
			RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE);
	desc->bg_idx = op->ldpc_dec.basegraph - 1;
	desc->max_iter = op->ldpc_dec.iter_max;
	desc->qm_idx = op->ldpc_dec.q_m / 2;
	desc->out_addr_hi = (uint32_t)(
			rte_pktmbuf_iova_offset(output, out_offset) >> 32);
	desc->out_addr_lw = (uint32_t)(
			rte_pktmbuf_iova_offset(output, out_offset));
	desc->op_addr = op;
	desc->cbs_in_op = cbs_in_op;
	return 0;
}
static inline int fpga_dma_desc_ld_fill ( struct rte_bbdev_dec_op * op , struct fpga_dma_dec_desc * desc , struct rte_mbuf * input , struct rte_mbuf * output , uint16_t harq_in_length , uint32_t in_offset , uint32_t out_offset , uint32_t harq_offset , uint16_t desc_offset , uint8_t cbs_in_op ) { desc -> done = 0 ; desc -> error = 0 ; desc -> in_addr_hi = ( uint32_t ) ( rte_pktmbuf_iova_offset ( input , in_offset ) >> 32 ) ; desc -> in_addr_lw = ( uint32_t ) ( rte_pktmbuf_iova_offset ( input , in_offset ) ) ; desc -> rm_e = op -> ldpc_dec . cb_params . e ; desc -> harq_input_length = harq_in_length ; desc -> et_dis = ! check_bit ( op -> ldpc_dec . op_flags , RTE_BBDEV_LDPC_ITERATION_STOP_ENABLE ) ; desc -> rv = op -> ldpc_dec . rv_index ; desc -> crc24b_ind = check_bit ( op -> ldpc_dec . op_flags , RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK ) ; desc -> drop_crc24b = check_bit ( op -> ldpc_dec . op_flags , RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP ) ; desc -> desc_idx = desc_offset ; desc -> ncb = op -> ldpc_dec . n_cb ; desc -> num_null = op -> ldpc_dec . n_filler ; desc -> hbstroe_offset = harq_offset >> 10 ; desc -> zc = op -> ldpc_dec . z_c ; desc -> harqin_en = check_bit ( op -> ldpc_dec . op_flags , RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE ) ; desc -> bg_idx = op -> ldpc_dec . basegraph - 1 ; desc -> max_iter = op -> ldpc_dec . iter_max ; desc -> qm_idx = op -> ldpc_dec . q_m / 2 ; desc -> out_addr_hi = ( uint32_t ) ( rte_pktmbuf_iova_offset ( output , out_offset ) >> 32 ) ; desc -> out_addr_lw = ( uint32_t ) ( rte_pktmbuf_iova_offset ( output , out_offset ) ) ; desc -> op_addr = op ; desc -> cbs_in_op = cbs_in_op ; return 0 ; }
Set DMA descriptor for decode operation (1 Code Block)
 @param op
   Pointer to a single encode operation.
Set DMA descriptor for decode operation ( 1 Code Block ) @param op Pointer to a single encode operation .
/* reset */ /* Set inbound data buffer address */ /* Save software context needed for dequeue */ /* Set total number of CBs in an op */