src/dpdk/drivers/net/e1000/base/e1000_ich8lan.c
s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)
{
	s32 ret_val = E1000_SUCCESS;
	u8 ulp_exit_timeout = 30;
	u32 mac_reg;
	u16 phy_reg;
	int i = 0;

	if ((hw->mac.type < e1000_pch_lpt) ||
	    (hw->device_id == E1000_DEV_ID_PCH_LPT_I217_LM) ||
	    (hw->device_id == E1000_DEV_ID_PCH_LPT_I217_V) ||
	    (hw->device_id == E1000_DEV_ID_PCH_I218_LM2) ||
	    (hw->device_id == E1000_DEV_ID_PCH_I218_V2) ||
	    (hw->dev_spec.ich8lan.ulp_state == e1000_ulp_state_off))
		return 0;

	if (E1000_READ_REG(hw, E1000_FWSM) & E1000_ICH_FWSM_FW_VALID) {
		if (force) {
			/* Request ME un-configure ULP mode in the PHY */
			mac_reg = E1000_READ_REG(hw, E1000_H2ME);
			mac_reg &= ~E1000_H2ME_ULP;
			mac_reg |= E1000_H2ME_ENFORCE_SETTINGS;
			E1000_WRITE_REG(hw, E1000_H2ME, mac_reg);
		}

		if (hw->mac.type == e1000_pch_cnp)
			ulp_exit_timeout = 100;

		while (E1000_READ_REG(hw, E1000_FWSM) &
		       E1000_FWSM_ULP_CFG_DONE) {
			if (i++ == ulp_exit_timeout) {
				ret_val = -E1000_ERR_PHY;
				goto out;
			}

			msec_delay(10);
		}
		DEBUGOUT1("ULP_CONFIG_DONE cleared after %dmsec\n", i * 10);

		if (force) {
			mac_reg = E1000_READ_REG(hw, E1000_H2ME);
			mac_reg &= ~E1000_H2ME_ENFORCE_SETTINGS;
			E1000_WRITE_REG(hw, E1000_H2ME, mac_reg);
		} else {
			/* Clear H2ME.ULP after ME ULP configuration */
			mac_reg = E1000_READ_REG(hw, E1000_H2ME);
			mac_reg &= ~E1000_H2ME_ULP;
			E1000_WRITE_REG(hw, E1000_H2ME, mac_reg);

			/* Restore link speed advertisements and restart
			 * Auto-negotiation
			 */
			if (hw->mac.autoneg) {
				ret_val = e1000_phy_setup_autoneg(hw);
				if (ret_val)
					goto out;
			} else {
				ret_val = e1000_setup_copper_link_generic(hw);
				if (ret_val)
					goto out;
			}
			ret_val = e1000_oem_bits_config_ich8lan(hw, true);
		}

		goto out;
	}

	ret_val = hw->phy.ops.acquire(hw);
	if (ret_val)
		goto out;

	/* Revert the change to the 'Link Status Change'
	 * interrupt to trigger on 'Cable Status Change'
	 */
	ret_val = e1000_read_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_OP_MODES,
					     &phy_reg);
	if (ret_val)
		goto release;
	phy_reg &= ~E1000_KMRNCTRLSTA_OP_MODES_LSC2CSC;
	e1000_write_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_OP_MODES, phy_reg);

	if (force)
		/* Toggle LANPHYPC Value bit */
		e1000_toggle_lanphypc_pch_lpt(hw);

	/* Unforce SMBus mode in PHY */
	ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);
	if (ret_val) {
		/* The MAC might be in PCIe mode, so temporarily force to
		 * SMBus mode in order to access the PHY.
		 */
		mac_reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
		mac_reg |= E1000_CTRL_EXT_FORCE_SMBUS;
		E1000_WRITE_REG(hw, E1000_CTRL_EXT, mac_reg);

		msec_delay(50);

		ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL,
						       &phy_reg);
		if (ret_val)
			goto release;
	}
	phy_reg &= ~CV_SMB_CTRL_FORCE_SMBUS;
	e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);

	/* Unforce SMBus mode in MAC */
	mac_reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
	mac_reg &= ~E1000_CTRL_EXT_FORCE_SMBUS;
	E1000_WRITE_REG(hw, E1000_CTRL_EXT, mac_reg);

	/* When ULP mode was previously entered, K1 was disabled by the
	 * hardware.  Re-Enable K1 in the PHY when exiting ULP.
	 */
	ret_val = e1000_read_phy_reg_hv_locked(hw, HV_PM_CTRL, &phy_reg);
	if (ret_val)
		goto release;
	phy_reg |= HV_PM_CTRL_K1_ENABLE;
	e1000_write_phy_reg_hv_locked(hw, HV_PM_CTRL, phy_reg);

	/* Clear ULP enabled configuration */
	ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg);
	if (ret_val)
		goto release;
	/* CSC interrupt received due to ULP Indication */
	if ((phy_reg & I218_ULP_CONFIG1_IND) || force) {
		phy_reg &= ~(I218_ULP_CONFIG1_IND |
			     I218_ULP_CONFIG1_STICKY_ULP |
			     I218_ULP_CONFIG1_RESET_TO_SMBUS |
			     I218_ULP_CONFIG1_WOL_HOST |
			     I218_ULP_CONFIG1_INBAND_EXIT |
			     I218_ULP_CONFIG1_EN_ULP_LANPHYPC |
			     I218_ULP_CONFIG1_DIS_CLR_STICKY_ON_PERST |
			     I218_ULP_CONFIG1_DISABLE_SMB_PERST);
		e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);

		/* Commit ULP changes by starting auto ULP configuration */
		phy_reg |= I218_ULP_CONFIG1_START;
		e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);

		/* Clear Disable SMBus Release on PERST# in MAC */
		mac_reg = E1000_READ_REG(hw, E1000_FEXTNVM7);
		mac_reg &= ~E1000_FEXTNVM7_DISABLE_SMB_PERST;
		E1000_WRITE_REG(hw, E1000_FEXTNVM7, mac_reg);

		if (!force) {
			hw->phy.ops.release(hw);

			if (hw->mac.autoneg)
				e1000_phy_setup_autoneg(hw);
			else
				e1000_setup_copper_link_generic(hw);

			e1000_sw_lcd_config_ich8lan(hw);

			e1000_oem_bits_config_ich8lan(hw, true);

			/* Set ULP state to unknown and return non-zero to
			 * indicate no link (yet) and re-enter on the next LSC
			 * to finish disabling ULP flow.
			 */
			hw->dev_spec.ich8lan.ulp_state =
			    e1000_ulp_state_unknown;

			return 1;
		}
	}

	/* Re-enable Tx */
	mac_reg = E1000_READ_REG(hw, E1000_TCTL);
	mac_reg |= E1000_TCTL_EN;
	E1000_WRITE_REG(hw, E1000_TCTL, mac_reg);

release:
	hw->phy.ops.release(hw);
	if (force) {
		hw->phy.ops.reset(hw);
		msec_delay(50);
	}
out:
	if (ret_val)
		DEBUGOUT1("Error in ULP disable flow: %d\n", ret_val);
	else
		hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_off;

	return ret_val;
}
/**
 *  e1000_disable_ulp_lpt_lp - unconfigure Ultra Low Power mode for LynxPoint-LP
 *  @hw: pointer to the HW structure
 *  @force: boolean indicating whether or not to force disabling ULP
 *
 *  Un-configure ULP mode when link is up, the system is transitioned from
 *  Sx or the driver is unloaded.  If on a Manageability Engine (ME) enabled
 *  system, poll for an indication from ME that ULP has been un-configured.
 *  If not on an ME enabled system, un-configure the ULP mode by software.
 *
 *  During nominal operation, this function is called when link is acquired
 *  to disable ULP mode (force=false); otherwise, for example when unloading
 *  the driver or during Sx->S0 transitions, this is called with force=true
 *  to forcibly disable ULP.

 *  When the cable is plugged in while the device is in D0, a Cable Status
 *  Change interrupt is generated which causes this function to be called
 *  to partially disable ULP mode and restart autonegotiation.  This function
 *  is then called again due to the resulting Link Status Change interrupt
 *  to finish cleaning up after the ULP flow.
 */
unconfigure Ultra Low Power mode for LynxPoint-LP
@hw: pointer to the HW structure
@force: boolean indicating whether or not to force disabling ULP

Un-configure ULP mode when link is up, the system is transitioned from
Sx or the driver is unloaded.  If on a Manageability Engine (ME) enabled
system, poll for an indication from ME that ULP has been un-configured.
If not on an ME enabled system, un-configure the ULP mode by software.

During nominal operation, this function is called when link is acquired
to disable ULP mode (force=false); otherwise, for example when unloading
the driver or during Sx->S0 transitions, this is called with force=true
to forcibly disable ULP.

When the cable is plugged in while the device is in D0, a Cable Status
Change interrupt is generated which causes this function to be called
to partially disable ULP mode and restart autonegotiation.  This function
is then called again due to the resulting Link Status Change interrupt
to finish cleaning up after the ULP flow.
unconfigure Ultra Low Power mode for LynxPoint - LP @hw : pointer to the HW structure @force : boolean indicating whether or not to force disabling ULP Un - configure ULP mode when link is up the system is transitioned from Sx or the driver is unloaded . If on a Manageability Engine ( ME ) enabled system poll for an indication from ME that ULP has been un - configured . If not on an ME enabled system un - configure the ULP mode by software . During nominal operation this function is called when link is acquired to disable ULP mode ( force = false ) ; otherwise for example when unloading the driver or during Sx - > S0 transitions this is called with force = true to forcibly disable ULP . When the cable is plugged in while the device is in D0 a Cable Status Change interrupt is generated which causes this function to be called to partially disable ULP mode and restart autonegotiation . This function is then called again due to the resulting Link Status Change interrupt to finish cleaning up after the ULP flow .
s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)
{
	s32 ret_val = E1000_SUCCESS;
	u8 ulp_exit_timeout = 30;
	u32 mac_reg;
	u16 phy_reg;
	int i = 0;
	if ((hw->mac.type < e1000_pch_lpt) ||
	    (hw->device_id == E1000_DEV_ID_PCH_LPT_I217_LM) ||
	    (hw->device_id == E1000_DEV_ID_PCH_LPT_I217_V) ||
	    (hw->device_id == E1000_DEV_ID_PCH_I218_LM2) ||
	    (hw->device_id == E1000_DEV_ID_PCH_I218_V2) ||
	    (hw->dev_spec.ich8lan.ulp_state == e1000_ulp_state_off))
		return 0;
	if (E1000_READ_REG(hw, E1000_FWSM) & E1000_ICH_FWSM_FW_VALID) {
		if (force) {
			mac_reg = E1000_READ_REG(hw, E1000_H2ME);
			mac_reg &= ~E1000_H2ME_ULP;
			mac_reg |= E1000_H2ME_ENFORCE_SETTINGS;
			E1000_WRITE_REG(hw, E1000_H2ME, mac_reg);
		}
		if (hw->mac.type == e1000_pch_cnp)
			ulp_exit_timeout = 100;
		while (E1000_READ_REG(hw, E1000_FWSM) &
		       E1000_FWSM_ULP_CFG_DONE) {
			if (i++ == ulp_exit_timeout) {
				ret_val = -E1000_ERR_PHY;
				goto out;
			}
			msec_delay(10);
		}
		DEBUGOUT1("ULP_CONFIG_DONE cleared after %dmsec\n", i * 10);
		if (force) {
			mac_reg = E1000_READ_REG(hw, E1000_H2ME);
			mac_reg &= ~E1000_H2ME_ENFORCE_SETTINGS;
			E1000_WRITE_REG(hw, E1000_H2ME, mac_reg);
		} else {
			mac_reg = E1000_READ_REG(hw, E1000_H2ME);
			mac_reg &= ~E1000_H2ME_ULP;
			E1000_WRITE_REG(hw, E1000_H2ME, mac_reg);
			if (hw->mac.autoneg) {
				ret_val = e1000_phy_setup_autoneg(hw);
				if (ret_val)
					goto out;
			} else {
				ret_val = e1000_setup_copper_link_generic(hw);
				if (ret_val)
					goto out;
			}
			ret_val = e1000_oem_bits_config_ich8lan(hw, true);
		}
		goto out;
	}
	ret_val = hw->phy.ops.acquire(hw);
	if (ret_val)
		goto out;
	ret_val = e1000_read_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_OP_MODES,
					     &phy_reg);
	if (ret_val)
		goto release;
	phy_reg &= ~E1000_KMRNCTRLSTA_OP_MODES_LSC2CSC;
	e1000_write_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_OP_MODES, phy_reg);
	if (force)
		e1000_toggle_lanphypc_pch_lpt(hw);
	ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg);
	if (ret_val) {
		mac_reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
		mac_reg |= E1000_CTRL_EXT_FORCE_SMBUS;
		E1000_WRITE_REG(hw, E1000_CTRL_EXT, mac_reg);
		msec_delay(50);
		ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL,
						       &phy_reg);
		if (ret_val)
			goto release;
	}
	phy_reg &= ~CV_SMB_CTRL_FORCE_SMBUS;
	e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg);
	mac_reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
	mac_reg &= ~E1000_CTRL_EXT_FORCE_SMBUS;
	E1000_WRITE_REG(hw, E1000_CTRL_EXT, mac_reg);
	ret_val = e1000_read_phy_reg_hv_locked(hw, HV_PM_CTRL, &phy_reg);
	if (ret_val)
		goto release;
	phy_reg |= HV_PM_CTRL_K1_ENABLE;
	e1000_write_phy_reg_hv_locked(hw, HV_PM_CTRL, phy_reg);
	ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg);
	if (ret_val)
		goto release;
	if ((phy_reg & I218_ULP_CONFIG1_IND) || force) {
		phy_reg &= ~(I218_ULP_CONFIG1_IND |
			     I218_ULP_CONFIG1_STICKY_ULP |
			     I218_ULP_CONFIG1_RESET_TO_SMBUS |
			     I218_ULP_CONFIG1_WOL_HOST |
			     I218_ULP_CONFIG1_INBAND_EXIT |
			     I218_ULP_CONFIG1_EN_ULP_LANPHYPC |
			     I218_ULP_CONFIG1_DIS_CLR_STICKY_ON_PERST |
			     I218_ULP_CONFIG1_DISABLE_SMB_PERST);
		e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);
		phy_reg |= I218_ULP_CONFIG1_START;
		e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg);
		mac_reg = E1000_READ_REG(hw, E1000_FEXTNVM7);
		mac_reg &= ~E1000_FEXTNVM7_DISABLE_SMB_PERST;
		E1000_WRITE_REG(hw, E1000_FEXTNVM7, mac_reg);
		if (!force) {
			hw->phy.ops.release(hw);
			if (hw->mac.autoneg)
				e1000_phy_setup_autoneg(hw);
			else
				e1000_setup_copper_link_generic(hw);
			e1000_sw_lcd_config_ich8lan(hw);
			e1000_oem_bits_config_ich8lan(hw, true);
			hw->dev_spec.ich8lan.ulp_state =
			    e1000_ulp_state_unknown;
			return 1;
		}
	}
	mac_reg = E1000_READ_REG(hw, E1000_TCTL);
	mac_reg |= E1000_TCTL_EN;
	E1000_WRITE_REG(hw, E1000_TCTL, mac_reg);
release:
	hw->phy.ops.release(hw);
	if (force) {
		hw->phy.ops.reset(hw);
		msec_delay(50);
	}
out:
	if (ret_val)
		DEBUGOUT1("Error in ULP disable flow: %d\n", ret_val);
	else
		hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_off;
	return ret_val;
}
s32 e1000_disable_ulp_lpt_lp ( struct e1000_hw * hw , bool force ) { s32 ret_val = E1000_SUCCESS ; u8 ulp_exit_timeout = 30 ; u32 mac_reg ; u16 phy_reg ; int i = 0 ; if ( ( hw -> mac . type < e1000_pch_lpt ) || ( hw -> device_id == E1000_DEV_ID_PCH_LPT_I217_LM ) || ( hw -> device_id == E1000_DEV_ID_PCH_LPT_I217_V ) || ( hw -> device_id == E1000_DEV_ID_PCH_I218_LM2 ) || ( hw -> device_id == E1000_DEV_ID_PCH_I218_V2 ) || ( hw -> dev_spec . ich8lan . ulp_state == e1000_ulp_state_off ) ) return 0 ; if ( E1000_READ_REG ( hw , E1000_FWSM ) & E1000_ICH_FWSM_FW_VALID ) { if ( force ) { mac_reg = E1000_READ_REG ( hw , E1000_H2ME ) ; mac_reg &= ~ E1000_H2ME_ULP ; mac_reg |= E1000_H2ME_ENFORCE_SETTINGS ; E1000_WRITE_REG ( hw , E1000_H2ME , mac_reg ) ; } if ( hw -> mac . type == e1000_pch_cnp ) ulp_exit_timeout = 100 ; while ( E1000_READ_REG ( hw , E1000_FWSM ) & E1000_FWSM_ULP_CFG_DONE ) { if ( i ++ == ulp_exit_timeout ) { ret_val = - E1000_ERR_PHY ; goto out ; } msec_delay ( 10 ) ; } DEBUGOUT1 ( " \n " , i * 10 ) ; if ( force ) { mac_reg = E1000_READ_REG ( hw , E1000_H2ME ) ; mac_reg &= ~ E1000_H2ME_ENFORCE_SETTINGS ; E1000_WRITE_REG ( hw , E1000_H2ME , mac_reg ) ; } else { mac_reg = E1000_READ_REG ( hw , E1000_H2ME ) ; mac_reg &= ~ E1000_H2ME_ULP ; E1000_WRITE_REG ( hw , E1000_H2ME , mac_reg ) ; if ( hw -> mac . autoneg ) { ret_val = e1000_phy_setup_autoneg ( hw ) ; if ( ret_val ) goto out ; } else { ret_val = e1000_setup_copper_link_generic ( hw ) ; if ( ret_val ) goto out ; } ret_val = e1000_oem_bits_config_ich8lan ( hw , true ) ; } goto out ; } ret_val = hw -> phy . ops . acquire ( hw ) ; if ( ret_val ) goto out ; ret_val = e1000_read_kmrn_reg_locked ( hw , E1000_KMRNCTRLSTA_OP_MODES , & phy_reg ) ; if ( ret_val ) goto release ; phy_reg &= ~ E1000_KMRNCTRLSTA_OP_MODES_LSC2CSC ; e1000_write_kmrn_reg_locked ( hw , E1000_KMRNCTRLSTA_OP_MODES , phy_reg ) ; if ( force ) e1000_toggle_lanphypc_pch_lpt ( hw ) ; ret_val = e1000_read_phy_reg_hv_locked ( hw , CV_SMB_CTRL , & phy_reg ) ; if ( ret_val ) { mac_reg = E1000_READ_REG ( hw , E1000_CTRL_EXT ) ; mac_reg |= E1000_CTRL_EXT_FORCE_SMBUS ; E1000_WRITE_REG ( hw , E1000_CTRL_EXT , mac_reg ) ; msec_delay ( 50 ) ; ret_val = e1000_read_phy_reg_hv_locked ( hw , CV_SMB_CTRL , & phy_reg ) ; if ( ret_val ) goto release ; } phy_reg &= ~ CV_SMB_CTRL_FORCE_SMBUS ; e1000_write_phy_reg_hv_locked ( hw , CV_SMB_CTRL , phy_reg ) ; mac_reg = E1000_READ_REG ( hw , E1000_CTRL_EXT ) ; mac_reg &= ~ E1000_CTRL_EXT_FORCE_SMBUS ; E1000_WRITE_REG ( hw , E1000_CTRL_EXT , mac_reg ) ; ret_val = e1000_read_phy_reg_hv_locked ( hw , HV_PM_CTRL , & phy_reg ) ; if ( ret_val ) goto release ; phy_reg |= HV_PM_CTRL_K1_ENABLE ; e1000_write_phy_reg_hv_locked ( hw , HV_PM_CTRL , phy_reg ) ; ret_val = e1000_read_phy_reg_hv_locked ( hw , I218_ULP_CONFIG1 , & phy_reg ) ; if ( ret_val ) goto release ; if ( ( phy_reg & I218_ULP_CONFIG1_IND ) || force ) { phy_reg &= ~ ( I218_ULP_CONFIG1_IND | I218_ULP_CONFIG1_STICKY_ULP | I218_ULP_CONFIG1_RESET_TO_SMBUS | I218_ULP_CONFIG1_WOL_HOST | I218_ULP_CONFIG1_INBAND_EXIT | I218_ULP_CONFIG1_EN_ULP_LANPHYPC | I218_ULP_CONFIG1_DIS_CLR_STICKY_ON_PERST | I218_ULP_CONFIG1_DISABLE_SMB_PERST ) ; e1000_write_phy_reg_hv_locked ( hw , I218_ULP_CONFIG1 , phy_reg ) ; phy_reg |= I218_ULP_CONFIG1_START ; e1000_write_phy_reg_hv_locked ( hw , I218_ULP_CONFIG1 , phy_reg ) ; mac_reg = E1000_READ_REG ( hw , E1000_FEXTNVM7 ) ; mac_reg &= ~ E1000_FEXTNVM7_DISABLE_SMB_PERST ; E1000_WRITE_REG ( hw , E1000_FEXTNVM7 , mac_reg ) ; if ( ! force ) { hw -> phy . ops . release ( hw ) ; if ( hw -> mac . autoneg ) e1000_phy_setup_autoneg ( hw ) ; else e1000_setup_copper_link_generic ( hw ) ; e1000_sw_lcd_config_ich8lan ( hw ) ; e1000_oem_bits_config_ich8lan ( hw , true ) ; hw -> dev_spec . ich8lan . ulp_state = e1000_ulp_state_unknown ; return 1 ; } } mac_reg = E1000_READ_REG ( hw , E1000_TCTL ) ; mac_reg |= E1000_TCTL_EN ; E1000_WRITE_REG ( hw , E1000_TCTL , mac_reg ) ; release : hw -> phy . ops . release ( hw ) ; if ( force ) { hw -> phy . ops . reset ( hw ) ; msec_delay ( 50 ) ; } out : if ( ret_val ) DEBUGOUT1 ( " \n " , ret_val ) ; else hw -> dev_spec . ich8lan . ulp_state = e1000_ulp_state_off ; return ret_val ; }
e1000_disable_ulp_lpt_lp - unconfigure Ultra Low Power mode for LynxPoint-LP
  @hw: pointer to the HW structure
  @force: boolean indicating whether or not to force disabling ULP
e1000_disable_ulp_lpt_lp - unconfigure Ultra Low Power mode for LynxPoint - LP @hw : pointer to the HW structure @force : boolean indicating whether or not to force disabling ULP
/* Request ME un-configure ULP mode in the PHY */ /* Clear H2ME.ULP after ME ULP configuration */ /* Restore link speed advertisements and restart
			 * Auto-negotiation
			 */ /* Revert the change to the 'Link Status Change'
	 * interrupt to trigger on 'Cable Status Change'
	 */ /* Toggle LANPHYPC Value bit */ /* Unforce SMBus mode in PHY */ /* The MAC might be in PCIe mode, so temporarily force to
		 * SMBus mode in order to access the PHY.
		 */ /* Unforce SMBus mode in MAC */ /* When ULP mode was previously entered, K1 was disabled by the
	 * hardware.  Re-Enable K1 in the PHY when exiting ULP.
	 */ /* Clear ULP enabled configuration */ /* CSC interrupt received due to ULP Indication */ /* Commit ULP changes by starting auto ULP configuration */ /* Clear Disable SMBus Release on PERST# in MAC */ /* Set ULP state to unknown and return non-zero to
			 * indicate no link (yet) and re-enter on the next LSC
			 * to finish disabling ULP flow.
			 */ /* Re-enable Tx */