XilinxProcessorIPLib/drivers/dp14rxss/examples/xdprxss_intr_example.c
u32 DpRxSs_SetupIntrSystem(void)
{
	u32 Status;
	XINTC *IntcInstPtr = &IntcInst;

	/* Set callbacks for all the interrupts */
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_VM_CHG_EVENT,
				DpRxSs_VideoModeHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_PWR_CHG_EVENT,
				DpRxSs_PowerChangeHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_NO_VID_EVENT,
				DpRxSs_NoVideoHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_VBLANK_EVENT,
				DpRxSs_VerticalBlankHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_TLOST_EVENT,
				DpRxSs_TrainingLostHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_VID_EVENT,
				DpRxSs_VideoHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_INFO_PKT_EVENT,
				DpRxSs_InfoPacketHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_EXT_PKT_EVENT,
				DpRxSs_ExtPacketHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_TDONE_EVENT,
				DpRxSs_TrainingDoneHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_BW_CHG_EVENT,
				DpRxSs_BandwidthChangeHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_DWN_REQ_EVENT,
				DpRxSs_DownReqestHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_DWN_REP_EVENT,
				DpRxSs_DownReplyHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_AUD_OVRFLW_EVENT,
				DpRxSs_AudioOverflowHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst,
			XDPRXSS_HANDLER_DP_PAYLOAD_ALLOC_EVENT,
				DpRxSs_PayloadAllocationHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_ACT_RX_EVENT,
				DpRxSs_ActRxHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_CRC_TEST_EVENT,
				DpRxSs_CrcTestHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_UNPLUG_EVENT,
				DpRxSs_UnplugHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_LINKBW_EVENT,
				DpRxSs_LinkBandwidthHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_PLL_RESET_EVENT,
				DpRxSs_PllResetHandler, &DpRxSsInst);

#ifdef XPAR_INTC_0_DEVICE_ID
	/* Initialize the interrupt controller driver so that it's ready to
	 * use, specify the device ID that was generated in xparameters.h
	 */
	Status = XIntc_Initialize(IntcInstPtr, XINTC_DEVICE_ID);
	if (Status != XST_SUCCESS) {
		xil_printf("Intc initialization failed!\n\r");
		return XST_FAILURE;
	}

	/* Hook up interrupt service routine */
	Status = XIntc_Connect(IntcInstPtr, XINTC_DPRXSS_DP_INTERRUPT_ID,
			(XInterruptHandler)XDpRxSs_DpIntrHandler,
				&DpRxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP RX SS DP interrupt connect failed!\n\r");
		return XST_FAILURE;
	}

	/* Enable the interrupt vector at the interrupt controller */
	XIntc_Enable(IntcInstPtr, XINTC_DPRXSS_DP_INTERRUPT_ID);

#if (XPAR_XHDCP_NUM_INSTANCES > 0)
	Status = XIntc_Connect(IntcInstPtr, XINTC_DPRXSS_HDCP_INTERRUPT_ID,
			(XInterruptHandler)XDpRxSs_HdcpIntrHandler,
				&DpRxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP RX SS HDCP interrupt connect failed!\n\r");
		return XST_FAILURE;
	}

	Status = XIntc_Connect(IntcInstPtr, XINTC_DPRXSS_TMR_INTERRUPT_ID,
			(XInterruptHandler)XDpRxSs_TmrCtrIntrHandler,
				&DpRxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP RX SS Timer Counter interrupt connect "
			"failed!\n\r");
		return XST_FAILURE;
	}

	/* Enable the interrupt vector at the interrupt controller */
	XIntc_Enable(IntcInstPtr, XINTC_DPRXSS_HDCP_INTERRUPT_ID);
	XIntc_Enable(IntcInstPtr, XINTC_DPRXSS_TMR_INTERRUPT_ID);
#endif

	/* Start the interrupt controller such that interrupts are recognized
	 * and handled by the processor
	 */
	Status = XIntc_Start(IntcInstPtr, XIN_REAL_MODE);
	if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}
#else
	/* The configuration parameters of the interrupt controller */
	XScuGic_Config *IntcConfig;

	/* Initialize the interrupt controller driver so that it is ready to
	 * use.
	 */
	IntcConfig = XScuGic_LookupConfig(XINTC_DEVICE_ID);
	if (NULL == IntcConfig) {
		return XST_FAILURE;
	}

	Status = XScuGic_CfgInitialize(IntcInstPtr, IntcConfig,
				IntcConfig->CpuBaseAddress);
	if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}

	/* Connect the device driver handler that will be called when an
	 * interrupt for the device occurs, the handler defined above performs
	 * the specific interrupt processing for the device
	 */
	Status = XScuGic_Connect(IntcInstPtr, XINTC_DPRXSS_DP_INTERRUPT_ID,
			(Xil_InterruptHandler)XDpRxSs_DpIntrHandler,
				&DpRxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP RX SS DP interrupt connect failed!\n\r");
		return XST_FAILURE;
	}
	/* Enable the interrupt for the DP device */
	XScuGic_Enable(IntcInstance, XINTC_DPRXSS_DP_INTERRUPT_ID);

#if (XPAR_XHDCP_NUM_INSTANCES > 0)
	Status = XScuGic_Connect(IntcInstPtr, XINTC_DPRXSS_HDCP_INTERRUPT_ID,
			(Xil_InterruptHandler)XDpRxSs_HdcpIntrHandler,
				&DpRxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP RX SS HDCP interrupt connect failed!\n\r");
		return XST_FAILURE;
	}

	Status = XScuGic_Connect(IntcInstPtr, XINTC_DPRXSS_TMR_INTERRUPT_ID,
			(Xil_InterruptHandler)XDpRxSs_TmrCtrIntrHandler,
				&DpRxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP RX SS Timer Counter interrupt connect "
			"failed!\n\r");
		return XST_FAILURE;
	}

	/* Enable the interrupt device */
	XScuGic_Enable(IntcInstance, XINTC_DPRXSS_HDCP_INTERRUPT_ID);
	XScuGic_Enable(IntcInstance, XINTC_DPRXSS_TMR_INTERRUPT_ID);
#endif
#endif
	/* Initialize the exception table. */
	Xil_ExceptionInit();

	/* Register the interrupt controller handler with the exception
	 * table.
	 */
	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
			(Xil_ExceptionHandler)XINTC_HANDLER, IntcInstPtr);

	/* Enable exceptions. */
	Xil_ExceptionEnable();

	return (XST_SUCCESS);
}
/*****************************************************************************/
/**
*
* This function sets up the interrupt system so interrupts can occur for the
* DisplayPort RX Subsystem core. The function is application-specific since
* the actual system may or may not have an interrupt controller. The DPRX
* Subsystem core could be directly connected to a processor without an
* interrupt controller. The user should modify this function to fit the
* application.
*
* @param	None
*
* @return
*		- XST_SUCCESS if interrupt setup was successful.
*		- A specific error code defined in "xstatus.h" if an error
*		occurs.
*
* @note		None.
*
******************************************************************************/
This function sets up the interrupt system so interrupts can occur for the
DisplayPort RX Subsystem core. The function is application-specific since
the actual system may or may not have an interrupt controller. The DPRX
Subsystem core could be directly connected to a processor without an
interrupt controller. The user should modify this function to fit the
application.
This function sets up the interrupt system so interrupts can occur for the DisplayPort RX Subsystem core . The function is application - specific since the actual system may or may not have an interrupt controller . The DPRX Subsystem core could be directly connected to a processor without an interrupt controller . The user should modify this function to fit the application .
u32 DpRxSs_SetupIntrSystem(void)
{
	u32 Status;
	XINTC *IntcInstPtr = &IntcInst;
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_VM_CHG_EVENT,
				DpRxSs_VideoModeHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_PWR_CHG_EVENT,
				DpRxSs_PowerChangeHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_NO_VID_EVENT,
				DpRxSs_NoVideoHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_VBLANK_EVENT,
				DpRxSs_VerticalBlankHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_TLOST_EVENT,
				DpRxSs_TrainingLostHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_VID_EVENT,
				DpRxSs_VideoHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_INFO_PKT_EVENT,
				DpRxSs_InfoPacketHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_EXT_PKT_EVENT,
				DpRxSs_ExtPacketHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_TDONE_EVENT,
				DpRxSs_TrainingDoneHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_BW_CHG_EVENT,
				DpRxSs_BandwidthChangeHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_DWN_REQ_EVENT,
				DpRxSs_DownReqestHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_DWN_REP_EVENT,
				DpRxSs_DownReplyHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_AUD_OVRFLW_EVENT,
				DpRxSs_AudioOverflowHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst,
			XDPRXSS_HANDLER_DP_PAYLOAD_ALLOC_EVENT,
				DpRxSs_PayloadAllocationHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_ACT_RX_EVENT,
				DpRxSs_ActRxHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_DP_CRC_TEST_EVENT,
				DpRxSs_CrcTestHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_UNPLUG_EVENT,
				DpRxSs_UnplugHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_LINKBW_EVENT,
				DpRxSs_LinkBandwidthHandler, &DpRxSsInst);
	XDpRxSs_SetCallBack(&DpRxSsInst, XDPRXSS_HANDLER_PLL_RESET_EVENT,
				DpRxSs_PllResetHandler, &DpRxSsInst);
#ifdef XPAR_INTC_0_DEVICE_ID
	Status = XIntc_Initialize(IntcInstPtr, XINTC_DEVICE_ID);
	if (Status != XST_SUCCESS) {
		xil_printf("Intc initialization failed!\n\r");
		return XST_FAILURE;
	}
	Status = XIntc_Connect(IntcInstPtr, XINTC_DPRXSS_DP_INTERRUPT_ID,
			(XInterruptHandler)XDpRxSs_DpIntrHandler,
				&DpRxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP RX SS DP interrupt connect failed!\n\r");
		return XST_FAILURE;
	}
	XIntc_Enable(IntcInstPtr, XINTC_DPRXSS_DP_INTERRUPT_ID);
#if (XPAR_XHDCP_NUM_INSTANCES > 0)
	Status = XIntc_Connect(IntcInstPtr, XINTC_DPRXSS_HDCP_INTERRUPT_ID,
			(XInterruptHandler)XDpRxSs_HdcpIntrHandler,
				&DpRxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP RX SS HDCP interrupt connect failed!\n\r");
		return XST_FAILURE;
	}
	Status = XIntc_Connect(IntcInstPtr, XINTC_DPRXSS_TMR_INTERRUPT_ID,
			(XInterruptHandler)XDpRxSs_TmrCtrIntrHandler,
				&DpRxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP RX SS Timer Counter interrupt connect "
			"failed!\n\r");
		return XST_FAILURE;
	}
	XIntc_Enable(IntcInstPtr, XINTC_DPRXSS_HDCP_INTERRUPT_ID);
	XIntc_Enable(IntcInstPtr, XINTC_DPRXSS_TMR_INTERRUPT_ID);
#endif
	Status = XIntc_Start(IntcInstPtr, XIN_REAL_MODE);
	if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}
#else
	XScuGic_Config *IntcConfig;
	IntcConfig = XScuGic_LookupConfig(XINTC_DEVICE_ID);
	if (NULL == IntcConfig) {
		return XST_FAILURE;
	}
	Status = XScuGic_CfgInitialize(IntcInstPtr, IntcConfig,
				IntcConfig->CpuBaseAddress);
	if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}
	Status = XScuGic_Connect(IntcInstPtr, XINTC_DPRXSS_DP_INTERRUPT_ID,
			(Xil_InterruptHandler)XDpRxSs_DpIntrHandler,
				&DpRxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP RX SS DP interrupt connect failed!\n\r");
		return XST_FAILURE;
	}
	XScuGic_Enable(IntcInstance, XINTC_DPRXSS_DP_INTERRUPT_ID);
#if (XPAR_XHDCP_NUM_INSTANCES > 0)
	Status = XScuGic_Connect(IntcInstPtr, XINTC_DPRXSS_HDCP_INTERRUPT_ID,
			(Xil_InterruptHandler)XDpRxSs_HdcpIntrHandler,
				&DpRxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP RX SS HDCP interrupt connect failed!\n\r");
		return XST_FAILURE;
	}
	Status = XScuGic_Connect(IntcInstPtr, XINTC_DPRXSS_TMR_INTERRUPT_ID,
			(Xil_InterruptHandler)XDpRxSs_TmrCtrIntrHandler,
				&DpRxSsInst);
	if (Status != XST_SUCCESS) {
		xil_printf("ERR: DP RX SS Timer Counter interrupt connect "
			"failed!\n\r");
		return XST_FAILURE;
	}
	XScuGic_Enable(IntcInstance, XINTC_DPRXSS_HDCP_INTERRUPT_ID);
	XScuGic_Enable(IntcInstance, XINTC_DPRXSS_TMR_INTERRUPT_ID);
#endif
#endif
	Xil_ExceptionInit();
	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
			(Xil_ExceptionHandler)XINTC_HANDLER, IntcInstPtr);
	Xil_ExceptionEnable();
	return (XST_SUCCESS);
}
u32 DpRxSs_SetupIntrSystem ( void ) { u32 Status ; XINTC * IntcInstPtr = & IntcInst ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_VM_CHG_EVENT , DpRxSs_VideoModeHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_PWR_CHG_EVENT , DpRxSs_PowerChangeHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_NO_VID_EVENT , DpRxSs_NoVideoHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_VBLANK_EVENT , DpRxSs_VerticalBlankHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_TLOST_EVENT , DpRxSs_TrainingLostHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_VID_EVENT , DpRxSs_VideoHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_INFO_PKT_EVENT , DpRxSs_InfoPacketHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_EXT_PKT_EVENT , DpRxSs_ExtPacketHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_TDONE_EVENT , DpRxSs_TrainingDoneHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_BW_CHG_EVENT , DpRxSs_BandwidthChangeHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_DWN_REQ_EVENT , DpRxSs_DownReqestHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_DWN_REP_EVENT , DpRxSs_DownReplyHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_AUD_OVRFLW_EVENT , DpRxSs_AudioOverflowHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_PAYLOAD_ALLOC_EVENT , DpRxSs_PayloadAllocationHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_ACT_RX_EVENT , DpRxSs_ActRxHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_DP_CRC_TEST_EVENT , DpRxSs_CrcTestHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_UNPLUG_EVENT , DpRxSs_UnplugHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_LINKBW_EVENT , DpRxSs_LinkBandwidthHandler , & DpRxSsInst ) ; XDpRxSs_SetCallBack ( & DpRxSsInst , XDPRXSS_HANDLER_PLL_RESET_EVENT , DpRxSs_PllResetHandler , & DpRxSsInst ) ; #ifdef XPAR_INTC_0_DEVICE_ID Status = XIntc_Initialize ( IntcInstPtr , XINTC_DEVICE_ID ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \n \r " ) ; return XST_FAILURE ; } Status = XIntc_Connect ( IntcInstPtr , XINTC_DPRXSS_DP_INTERRUPT_ID , ( XInterruptHandler ) XDpRxSs_DpIntrHandler , & DpRxSsInst ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \n \r " ) ; return XST_FAILURE ; } XIntc_Enable ( IntcInstPtr , XINTC_DPRXSS_DP_INTERRUPT_ID ) ; #if ( XPAR_XHDCP_NUM_INSTANCES > 0 ) Status = XIntc_Connect ( IntcInstPtr , XINTC_DPRXSS_HDCP_INTERRUPT_ID , ( XInterruptHandler ) XDpRxSs_HdcpIntrHandler , & DpRxSsInst ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \n \r " ) ; return XST_FAILURE ; } Status = XIntc_Connect ( IntcInstPtr , XINTC_DPRXSS_TMR_INTERRUPT_ID , ( XInterruptHandler ) XDpRxSs_TmrCtrIntrHandler , & DpRxSsInst ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " " " \n \r " ) ; return XST_FAILURE ; } XIntc_Enable ( IntcInstPtr , XINTC_DPRXSS_HDCP_INTERRUPT_ID ) ; XIntc_Enable ( IntcInstPtr , XINTC_DPRXSS_TMR_INTERRUPT_ID ) ; #endif Status = XIntc_Start ( IntcInstPtr , XIN_REAL_MODE ) ; if ( Status != XST_SUCCESS ) { return XST_FAILURE ; } #else XScuGic_Config * IntcConfig ; IntcConfig = XScuGic_LookupConfig ( XINTC_DEVICE_ID ) ; if ( NULL == IntcConfig ) { return XST_FAILURE ; } Status = XScuGic_CfgInitialize ( IntcInstPtr , IntcConfig , IntcConfig -> CpuBaseAddress ) ; if ( Status != XST_SUCCESS ) { return XST_FAILURE ; } Status = XScuGic_Connect ( IntcInstPtr , XINTC_DPRXSS_DP_INTERRUPT_ID , ( Xil_InterruptHandler ) XDpRxSs_DpIntrHandler , & DpRxSsInst ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \n \r " ) ; return XST_FAILURE ; } XScuGic_Enable ( IntcInstance , XINTC_DPRXSS_DP_INTERRUPT_ID ) ; #if ( XPAR_XHDCP_NUM_INSTANCES > 0 ) Status = XScuGic_Connect ( IntcInstPtr , XINTC_DPRXSS_HDCP_INTERRUPT_ID , ( Xil_InterruptHandler ) XDpRxSs_HdcpIntrHandler , & DpRxSsInst ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \n \r " ) ; return XST_FAILURE ; } Status = XScuGic_Connect ( IntcInstPtr , XINTC_DPRXSS_TMR_INTERRUPT_ID , ( Xil_InterruptHandler ) XDpRxSs_TmrCtrIntrHandler , & DpRxSsInst ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " " " \n \r " ) ; return XST_FAILURE ; } XScuGic_Enable ( IntcInstance , XINTC_DPRXSS_HDCP_INTERRUPT_ID ) ; XScuGic_Enable ( IntcInstance , XINTC_DPRXSS_TMR_INTERRUPT_ID ) ; #endif #endif Xil_ExceptionInit ( ) ; Xil_ExceptionRegisterHandler ( XIL_EXCEPTION_ID_INT , ( Xil_ExceptionHandler ) XINTC_HANDLER , IntcInstPtr ) ; Xil_ExceptionEnable ( ) ; return ( XST_SUCCESS ) ; }
This function sets up the interrupt system so interrupts can occur for the
DisplayPort RX Subsystem core.
This function sets up the interrupt system so interrupts can occur for the DisplayPort RX Subsystem core .
/* Set callbacks for all the interrupts */ /* Initialize the interrupt controller driver so that it's ready to
	 * use, specify the device ID that was generated in xparameters.h
	 */ /* Hook up interrupt service routine */ /* Enable the interrupt vector at the interrupt controller */ /* Enable the interrupt vector at the interrupt controller */ /* Start the interrupt controller such that interrupts are recognized
	 * and handled by the processor
	 */ /* The configuration parameters of the interrupt controller */ /* Initialize the interrupt controller driver so that it is ready to
	 * use.
	 */ /* Connect the device driver handler that will be called when an
	 * interrupt for the device occurs, the handler defined above performs
	 * the specific interrupt processing for the device
	 */ /* Enable the interrupt for the DP device */ /* Enable the interrupt device */ /* Initialize the exception table. */ /* Register the interrupt controller handler with the exception
	 * table.
	 */ /* Enable exceptions. */