XilinxProcessorIPLib/drivers/aiengine/src/tile/xaietile_pl.c
u8 XAieTile_PlShimResetEnable(XAieGbl_Tile *TileInstPtr, u8 Reset)
{
	XAie_AssertNonvoid(TileInstPtr != XAIE_NULL);
	XAie_AssertNonvoid(TileInstPtr->TileType != XAIEGBL_TILE_TYPE_AIETILE);
	XAie_AssertNonvoid(Reset <= 1);

	XAieGbl_Write32(TileInstPtr->TileAddr + ShimReset.RegOff, Reset &
			XAIEGBL_PL_AIESHIRSTENA_RST_MASK);

	return XAIE_SUCCESS;
}
/*****************************************************************************/
/**
*
* This API enable / disable the shim reset to given time
*
* @param	TileInstPtr - Pointer to the Shim tile instance.
* @param	Reset - 1 for enable. 0 for disable.
*
* @return	XAIE_SUCCESS on success
*
* @note		None.
*
*******************************************************************************/
This API enable / disable the shim reset to given time
This API enable / disable the shim reset to given time
u8 XAieTile_PlShimResetEnable(XAieGbl_Tile *TileInstPtr, u8 Reset)
{
	XAie_AssertNonvoid(TileInstPtr != XAIE_NULL);
	XAie_AssertNonvoid(TileInstPtr->TileType != XAIEGBL_TILE_TYPE_AIETILE);
	XAie_AssertNonvoid(Reset <= 1);
	XAieGbl_Write32(TileInstPtr->TileAddr + ShimReset.RegOff, Reset &
			XAIEGBL_PL_AIESHIRSTENA_RST_MASK);
	return XAIE_SUCCESS;
}
u8 XAieTile_PlShimResetEnable ( XAieGbl_Tile * TileInstPtr , u8 Reset ) { XAie_AssertNonvoid ( TileInstPtr != XAIE_NULL ) ; XAie_AssertNonvoid ( TileInstPtr -> TileType != XAIEGBL_TILE_TYPE_AIETILE ) ; XAie_AssertNonvoid ( Reset <= 1 ) ; XAieGbl_Write32 ( TileInstPtr -> TileAddr + ShimReset . RegOff , Reset & XAIEGBL_PL_AIESHIRSTENA_RST_MASK ) ; return XAIE_SUCCESS ; }
This API enable / disable the shim reset to given time
This API enable / disable the shim reset to given time