src/drivers/trex_i40e_fdir.c
static int
i40e_check_fdir_flex_conf(const struct i40e_adapter *adapter,
			  const struct trex_rte_eth_fdir_flex_conf *conf)
{
	const struct trex_rte_eth_flex_payload_cfg *flex_cfg;
	const struct trex_rte_eth_fdir_flex_mask *flex_mask;
	uint16_t mask_tmp;
	uint8_t nb_bitmask;
	uint16_t i, j;
	int ret = 0;
	enum i40e_filter_pctype pctype;

	if (conf == NULL) {
		PMD_DRV_LOG(INFO, "NULL pointer.");
		return -EINVAL;
	}
	/* check flexible payload setting configuration */
	if (conf->nb_payloads > RTE_ETH_L4_PAYLOAD) {
		PMD_DRV_LOG(ERR, "invalid number of payload setting.");
		return -EINVAL;
	}
	for (i = 0; i < conf->nb_payloads; i++) {
		flex_cfg = &conf->flex_set[i];
		if (flex_cfg->type > RTE_ETH_L4_PAYLOAD) {
			PMD_DRV_LOG(ERR, "invalid payload type.");
			return -EINVAL;
		}
		ret = i40e_check_fdir_flex_payload(flex_cfg);
		if (ret < 0) {
			PMD_DRV_LOG(ERR, "invalid flex payload arguments.");
			return -EINVAL;
		}
	}

	/* check flex mask setting configuration */
	if (conf->nb_flexmasks >= RTE_ETH_FLOW_MAX) {
		PMD_DRV_LOG(ERR, "invalid number of flex masks.");
		return -EINVAL;
	}
	for (i = 0; i < conf->nb_flexmasks; i++) {
		flex_mask = &conf->flex_mask[i];
		pctype = i40e_flowtype_to_pctype(adapter, flex_mask->flow_type);
		if (pctype == I40E_FILTER_PCTYPE_INVALID) {
			PMD_DRV_LOG(WARNING, "invalid flow type.");
			return -EINVAL;
		}
		nb_bitmask = 0;
		for (j = 0; j < I40E_FDIR_MAX_FLEX_LEN; j += sizeof(uint16_t)) {
			mask_tmp = I40E_WORD(flex_mask->mask[j],
					     flex_mask->mask[j + 1]);
			if (mask_tmp != 0x0 && mask_tmp != UINT16_MAX) {
				nb_bitmask++;
				if (nb_bitmask > I40E_FDIR_BITMASK_NUM_WORD) {
					PMD_DRV_LOG(ERR, " exceed maximal"
						" number of bitmasks.");
					return -EINVAL;
				}
			}
		}
	}
	return 0;
}
/*
 * i40e_check_fdir_flex_conf -check if the flex payload and mask configuration
 * arguments are valid
 */
check if the flex payload and mask configuration
arguments are valid
check if the flex payload and mask configuration arguments are valid
static int
i40e_check_fdir_flex_conf(const struct i40e_adapter *adapter,
			  const struct trex_rte_eth_fdir_flex_conf *conf)
{
	const struct trex_rte_eth_flex_payload_cfg *flex_cfg;
	const struct trex_rte_eth_fdir_flex_mask *flex_mask;
	uint16_t mask_tmp;
	uint8_t nb_bitmask;
	uint16_t i, j;
	int ret = 0;
	enum i40e_filter_pctype pctype;
	if (conf == NULL) {
		PMD_DRV_LOG(INFO, "NULL pointer.");
		return -EINVAL;
	}
	if (conf->nb_payloads > RTE_ETH_L4_PAYLOAD) {
		PMD_DRV_LOG(ERR, "invalid number of payload setting.");
		return -EINVAL;
	}
	for (i = 0; i < conf->nb_payloads; i++) {
		flex_cfg = &conf->flex_set[i];
		if (flex_cfg->type > RTE_ETH_L4_PAYLOAD) {
			PMD_DRV_LOG(ERR, "invalid payload type.");
			return -EINVAL;
		}
		ret = i40e_check_fdir_flex_payload(flex_cfg);
		if (ret < 0) {
			PMD_DRV_LOG(ERR, "invalid flex payload arguments.");
			return -EINVAL;
		}
	}
	if (conf->nb_flexmasks >= RTE_ETH_FLOW_MAX) {
		PMD_DRV_LOG(ERR, "invalid number of flex masks.");
		return -EINVAL;
	}
	for (i = 0; i < conf->nb_flexmasks; i++) {
		flex_mask = &conf->flex_mask[i];
		pctype = i40e_flowtype_to_pctype(adapter, flex_mask->flow_type);
		if (pctype == I40E_FILTER_PCTYPE_INVALID) {
			PMD_DRV_LOG(WARNING, "invalid flow type.");
			return -EINVAL;
		}
		nb_bitmask = 0;
		for (j = 0; j < I40E_FDIR_MAX_FLEX_LEN; j += sizeof(uint16_t)) {
			mask_tmp = I40E_WORD(flex_mask->mask[j],
					     flex_mask->mask[j + 1]);
			if (mask_tmp != 0x0 && mask_tmp != UINT16_MAX) {
				nb_bitmask++;
				if (nb_bitmask > I40E_FDIR_BITMASK_NUM_WORD) {
					PMD_DRV_LOG(ERR, " exceed maximal"
						" number of bitmasks.");
					return -EINVAL;
				}
			}
		}
	}
	return 0;
}
static int i40e_check_fdir_flex_conf ( const struct i40e_adapter * adapter , const struct trex_rte_eth_fdir_flex_conf * conf ) { const struct trex_rte_eth_flex_payload_cfg * flex_cfg ; const struct trex_rte_eth_fdir_flex_mask * flex_mask ; uint16_t mask_tmp ; uint8_t nb_bitmask ; uint16_t i , j ; int ret = 0 ; enum i40e_filter_pctype pctype ; if ( conf == NULL ) { PMD_DRV_LOG ( INFO , " " ) ; return - EINVAL ; } if ( conf -> nb_payloads > RTE_ETH_L4_PAYLOAD ) { PMD_DRV_LOG ( ERR , " " ) ; return - EINVAL ; } for ( i = 0 ; i < conf -> nb_payloads ; i ++ ) { flex_cfg = & conf -> flex_set [ i ] ; if ( flex_cfg -> type > RTE_ETH_L4_PAYLOAD ) { PMD_DRV_LOG ( ERR , " " ) ; return - EINVAL ; } ret = i40e_check_fdir_flex_payload ( flex_cfg ) ; if ( ret < 0 ) { PMD_DRV_LOG ( ERR , " " ) ; return - EINVAL ; } } if ( conf -> nb_flexmasks >= RTE_ETH_FLOW_MAX ) { PMD_DRV_LOG ( ERR , " " ) ; return - EINVAL ; } for ( i = 0 ; i < conf -> nb_flexmasks ; i ++ ) { flex_mask = & conf -> flex_mask [ i ] ; pctype = i40e_flowtype_to_pctype ( adapter , flex_mask -> flow_type ) ; if ( pctype == I40E_FILTER_PCTYPE_INVALID ) { PMD_DRV_LOG ( WARNING , " " ) ; return - EINVAL ; } nb_bitmask = 0 ; for ( j = 0 ; j < I40E_FDIR_MAX_FLEX_LEN ; j += sizeof ( uint16_t ) ) { mask_tmp = I40E_WORD ( flex_mask -> mask [ j ] , flex_mask -> mask [ j + 1 ] ) ; if ( mask_tmp != 0x0 && mask_tmp != UINT16_MAX ) { nb_bitmask ++ ; if ( nb_bitmask > I40E_FDIR_BITMASK_NUM_WORD ) { PMD_DRV_LOG ( ERR , " " " " ) ; return - EINVAL ; } } } } return 0 ; }
i40e_check_fdir_flex_conf -check if the flex payload and mask configuration
 arguments are valid
i40e_check_fdir_flex_conf - check if the flex payload and mask configuration arguments are valid
/* check flexible payload setting configuration */ /* check flex mask setting configuration */