XilinxProcessorIPLib/drivers/v_hdmitxss1/examples/xhdmi_example/video_fmc.c
u32 Vfmc_HdmiInit(XVfmc *VfmcPtr, u16 GpioDeviceId, void *IicPtr,
		XVfmc_Location Loc)
{
	int Status;
	u8 Buffer[2];
	int ByteCount;
	u8 RevisionNumber;
	XGpio_Config *Gpio_Vfmc_ConfigPtr;


	/* Check if VFMC was already Initialized */
	if (VfmcPtr->IsReady == XIL_COMPONENT_IS_READY) {
		xil_printf("VFMC has already been initialized. "
				"Exiting Vfmc_HdmiInit\r\n");
		return (XST_FAILURE);
	} else {
		VfmcPtr->IicPtr = IicPtr;
		VfmcPtr->Loc = Loc;
		VfmcPtr->TxMezzType = VFMC_MEZZ_INVALID;
		VfmcPtr->RxMezzType = VFMC_MEZZ_INVALID;
		VfmcPtr->IsReady = 0;
	}


#if defined (XPS_BOARD_ZCU102) || \
	defined (XPS_BOARD_ZCU104) || \
	defined (XPS_BOARD_ZCU106) || \
    defined (XPS_BOARD_VCK190)
	XIicPs *Iic_Ptr = IicPtr;
#else
	XIic *Iic_Ptr = IicPtr;
#endif

	/* Initialize GPIO for VFMC */
	Gpio_Vfmc_ConfigPtr =
		XGpio_LookupConfig(GpioDeviceId);

	if(Gpio_Vfmc_ConfigPtr == NULL) {
		VfmcPtr->Gpio.IsReady = 0;
		xil_printf("ERR:: GPIO for VFMC not found\r\n");
		return (XST_FAILURE);
	}

	Status = XGpio_CfgInitialize(&VfmcPtr->Gpio,
			Gpio_Vfmc_ConfigPtr,
			Gpio_Vfmc_ConfigPtr->BaseAddress);
	if(Status != XST_SUCCESS) {
		xil_printf("ERR:: GPIO for VFMC ");
		xil_printf("Initialization failed %d\r\n", Status);
		return(XST_FAILURE);
	}

	Vfmc_I2cMuxSelect(VfmcPtr);

	/* Configure VFMC IO Expander 0:
	 * Enabled SI5344, To Disable SI5344 set Buffer[0] = 0x52
	 * Set primary clock source for LMK03318 to IOCLKp(0)
	 * Set secondary clock source for LMK03318 to IOCLKp(1)
	 * Disable LMK61E2*/
#if (defined XPS_BOARD_ZCU102)
		Buffer[0] = 0x41;
#elif (defined XPS_BOARD_ZCU106)
		Buffer[0] = 0x41;
#elif (defined XPS_BOARD_VCU118)
		Buffer[0] = 0x41;
#else /* Place Holder for other board */
		Buffer[0] = 0x41;
#endif

	ByteCount = Vfmc_I2cSend(IicPtr, VFMC_I2C_IOEXP_0_ADDR,
			(u8*)Buffer, 1, I2C_STOP);
	if (ByteCount != 1) {
		xil_printf("Failed to set the I2C IO Expander.\r\n");
		return XST_FAILURE;
	}

	/* Configure VFMC IO Expander 1:
	 * Enable LMK03318 -> In a power-down state the I2C bus becomes
	 * unusable.
	 * Select LMK03318 clock as source for FMC_GT_CLKp(0)
	 * Select IDT8T49N241 clock as source for FMC_GT_CLKp(1)
	 * Enable IDT8T49N241 */
	Buffer[0] = 0x1A;
	ByteCount = Vfmc_I2cSend(IicPtr, VFMC_I2C_IOEXP_1_ADDR,
			(u8*)Buffer, 1, I2C_STOP);
	if (ByteCount != 1) {
		xil_printf("Failed to set the I2C IO Expander.\r\n");
		return XST_FAILURE;
	}

	/* Configure HDMI2.0 Mezz in Slot 1 IO Expander 1:
	 * Enable DP159 Output
	 * Select GT3 as TMDS Clk source */
	/* Note : for HDMI4K FMC,
	 * Buffer[0] = 0x05;
	 * ByteCount = XIic_Send(BaseAddr, 0x22,
	 *		(u8*)Buffer, 1, XIIC_STOP);
	 * if (ByteCount != 1) {
	 *	xil_printf("Failed to set the I2C IO Expander.\r\n");
	 *	return XST_FAILURE;
	 * }
	 */

	Status |= IDT_8T49N24x_Init(Iic_Ptr, VFMC_I2C_IDT8N49_ADDR);
	Status |= IDT_8T49N24x_GpioLolEnable(Iic_Ptr,
					VFMC_I2C_IDT8N49_ADDR);
	if (Status != XST_SUCCESS) {
		xil_printf("Failed to initialize IDT 8T49N241.\r\n");
		return XST_FAILURE;
	}

	Status = TI_LMK03318_Init(Iic_Ptr, VFMC_I2C_LMK03318_ADDR);
	if (Status != XST_SUCCESS) {
		xil_printf("Failed to initialize TI LMK03318.\r\n");
		return XST_FAILURE;
	}

	/*SI5344 Initialization */
	Status = SI5344_Init(Iic_Ptr, VFMC_I2C_SI5344_ADDR);
	if (Status != XST_SUCCESS) {
		xil_printf("Failed to initialize SI5344.\r\n");
		return XST_FAILURE;
	}
#ifdef XPAR_XV_HDMITXSS1_NUM_INSTANCES
	/* Check if mezzanine card is with an active device */
	if (ONSEMI_NB7NQ621M_CheckDeviceID(Iic_Ptr,
			VFMC_MEZZ_I2C_NB7NQ621M_TX_ADDR) == XST_SUCCESS) {
		RevisionNumber = ONSEMI_NB7NQ621M_CheckDeviceVersion(Iic_Ptr,
				VFMC_MEZZ_I2C_NB7NQ621M_TX_ADDR);
		if (RevisionNumber == 0x00) {
			/* Revision 0 Silicon */
			VfmcPtr->TxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R0;
		} else if (RevisionNumber == 0x01) {
			/* Revision 1 Silicon */
			VfmcPtr->TxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R1;
		} else if (RevisionNumber == 0x24) {
			/* Revision Pass3 Silicon */
			VfmcPtr->TxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R2;
		} else if (RevisionNumber == 0x02) {
			/* Revision Pass4 Silicon */
			VfmcPtr->TxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R3;
		} else {
			VfmcPtr->TxMezzType = VFMC_MEZZ_INVALID;
			xil_printf("VFMC TX Mezz Not Supported!\r\n");
		}
		ONSEMI_NB7NQ621M_Init(Iic_Ptr, VFMC_MEZZ_I2C_NB7NQ621M_TX_ADDR,
				VfmcPtr->TxMezzType - VFMC_MEZZ_HDMI_ONSEMI_R0, 1);
		Vfmc_Gpio_Mezz_HdmiTxDriver_Enable(VfmcPtr, TRUE);
		xil_printf("VFMC Active HDMI TX Mezz (R%d) Detected\r\n",
				RevisionNumber);
	} else {
		VfmcPtr->TxMezzType = VFMC_MEZZ_HDMI_PASSIVE;
		xil_printf("VFMC Passive HDMI TX Mezz Detected\r\n");
	}
	/* TX Mezzanine Init Done */
	Vfmc_Gpio_Led_On(VfmcPtr, VFMC_GPIO_TX_LED0, TRUE);
#endif

#ifdef XPAR_XV_HDMIRXSS1_NUM_INSTANCES
	/* Check if mezzanine card is with an active device */
	if (ONSEMI_NB7NQ621M_CheckDeviceID(Iic_Ptr,
			VFMC_MEZZ_I2C_NB7NQ621M_RX_ADDR) == XST_SUCCESS) {
		RevisionNumber = ONSEMI_NB7NQ621M_CheckDeviceVersion(Iic_Ptr,
				VFMC_MEZZ_I2C_NB7NQ621M_RX_ADDR);
		if (RevisionNumber == 0x00) {
			/* Revision 0 Silicon */
			VfmcPtr->RxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R0;
		} else if (RevisionNumber == 0x01) {
			/* Revision 1 Silicon */
			VfmcPtr->RxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R1;
		} else if (RevisionNumber == 0x24) {
			/* Revision Pass3 Silicon */
			VfmcPtr->RxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R2;
		} else if (RevisionNumber == 0x02) {
			/* Revision Pass4 Silicon */
			VfmcPtr->RxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R3;
		} else {
			VfmcPtr->RxMezzType = VFMC_MEZZ_INVALID;
			xil_printf("VFMC RX Mezz Not Supported!\r\n");
		}
		ONSEMI_NB7NQ621M_Init(Iic_Ptr, VFMC_MEZZ_I2C_NB7NQ621M_RX_ADDR,
				VfmcPtr->RxMezzType - VFMC_MEZZ_HDMI_ONSEMI_R0, 0);
		Vfmc_Gpio_Mezz_HdmiRxEqualizer_Enable(VfmcPtr, TRUE);
		xil_printf("VFMC Active HDMI RX Mezz (R%d) Detected\r\n",
				RevisionNumber);
	} else {
		VfmcPtr->RxMezzType = VFMC_MEZZ_HDMI_PASSIVE;
		xil_printf("VFMC Passive HDMI RX Mezz Detected\r\n");
	}
	/* RX Mezzanine Init Done */
	Vfmc_Gpio_Led_On(VfmcPtr, VFMC_GPIO_RX_LED0, TRUE);
#endif

	VfmcPtr->IsReady = XIL_COMPONENT_IS_READY;

	return XST_SUCCESS;
}
/*****************************************************************************/
/**
*
* This function initializes the Video FMC clock generator and clock MUXs
* for HDMI operation
*
* @param  None.
*
* @return None.
*
* @note   None.
*
******************************************************************************/
This function initializes the Video FMC clock generator and clock MUXs
for HDMI operation
This function initializes the Video FMC clock generator and clock MUXs for HDMI operation
u32 Vfmc_HdmiInit(XVfmc *VfmcPtr, u16 GpioDeviceId, void *IicPtr,
		XVfmc_Location Loc)
{
	int Status;
	u8 Buffer[2];
	int ByteCount;
	u8 RevisionNumber;
	XGpio_Config *Gpio_Vfmc_ConfigPtr;
	if (VfmcPtr->IsReady == XIL_COMPONENT_IS_READY) {
		xil_printf("VFMC has already been initialized. "
				"Exiting Vfmc_HdmiInit\r\n");
		return (XST_FAILURE);
	} else {
		VfmcPtr->IicPtr = IicPtr;
		VfmcPtr->Loc = Loc;
		VfmcPtr->TxMezzType = VFMC_MEZZ_INVALID;
		VfmcPtr->RxMezzType = VFMC_MEZZ_INVALID;
		VfmcPtr->IsReady = 0;
	}
#if defined (XPS_BOARD_ZCU102) || \
	defined (XPS_BOARD_ZCU104) || \
	defined (XPS_BOARD_ZCU106) || \
    defined (XPS_BOARD_VCK190)
	XIicPs *Iic_Ptr = IicPtr;
#else
	XIic *Iic_Ptr = IicPtr;
#endif
	Gpio_Vfmc_ConfigPtr =
		XGpio_LookupConfig(GpioDeviceId);
	if(Gpio_Vfmc_ConfigPtr == NULL) {
		VfmcPtr->Gpio.IsReady = 0;
		xil_printf("ERR:: GPIO for VFMC not found\r\n");
		return (XST_FAILURE);
	}
	Status = XGpio_CfgInitialize(&VfmcPtr->Gpio,
			Gpio_Vfmc_ConfigPtr,
			Gpio_Vfmc_ConfigPtr->BaseAddress);
	if(Status != XST_SUCCESS) {
		xil_printf("ERR:: GPIO for VFMC ");
		xil_printf("Initialization failed %d\r\n", Status);
		return(XST_FAILURE);
	}
	Vfmc_I2cMuxSelect(VfmcPtr);
#if (defined XPS_BOARD_ZCU102)
		Buffer[0] = 0x41;
#elif (defined XPS_BOARD_ZCU106)
		Buffer[0] = 0x41;
#elif (defined XPS_BOARD_VCU118)
		Buffer[0] = 0x41;
#else 
		Buffer[0] = 0x41;
#endif
	ByteCount = Vfmc_I2cSend(IicPtr, VFMC_I2C_IOEXP_0_ADDR,
			(u8*)Buffer, 1, I2C_STOP);
	if (ByteCount != 1) {
		xil_printf("Failed to set the I2C IO Expander.\r\n");
		return XST_FAILURE;
	}
	Buffer[0] = 0x1A;
	ByteCount = Vfmc_I2cSend(IicPtr, VFMC_I2C_IOEXP_1_ADDR,
			(u8*)Buffer, 1, I2C_STOP);
	if (ByteCount != 1) {
		xil_printf("Failed to set the I2C IO Expander.\r\n");
		return XST_FAILURE;
	}
	Status |= IDT_8T49N24x_Init(Iic_Ptr, VFMC_I2C_IDT8N49_ADDR);
	Status |= IDT_8T49N24x_GpioLolEnable(Iic_Ptr,
					VFMC_I2C_IDT8N49_ADDR);
	if (Status != XST_SUCCESS) {
		xil_printf("Failed to initialize IDT 8T49N241.\r\n");
		return XST_FAILURE;
	}
	Status = TI_LMK03318_Init(Iic_Ptr, VFMC_I2C_LMK03318_ADDR);
	if (Status != XST_SUCCESS) {
		xil_printf("Failed to initialize TI LMK03318.\r\n");
		return XST_FAILURE;
	}
	Status = SI5344_Init(Iic_Ptr, VFMC_I2C_SI5344_ADDR);
	if (Status != XST_SUCCESS) {
		xil_printf("Failed to initialize SI5344.\r\n");
		return XST_FAILURE;
	}
#ifdef XPAR_XV_HDMITXSS1_NUM_INSTANCES
	if (ONSEMI_NB7NQ621M_CheckDeviceID(Iic_Ptr,
			VFMC_MEZZ_I2C_NB7NQ621M_TX_ADDR) == XST_SUCCESS) {
		RevisionNumber = ONSEMI_NB7NQ621M_CheckDeviceVersion(Iic_Ptr,
				VFMC_MEZZ_I2C_NB7NQ621M_TX_ADDR);
		if (RevisionNumber == 0x00) {
			VfmcPtr->TxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R0;
		} else if (RevisionNumber == 0x01) {
			VfmcPtr->TxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R1;
		} else if (RevisionNumber == 0x24) {
			VfmcPtr->TxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R2;
		} else if (RevisionNumber == 0x02) {
			VfmcPtr->TxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R3;
		} else {
			VfmcPtr->TxMezzType = VFMC_MEZZ_INVALID;
			xil_printf("VFMC TX Mezz Not Supported!\r\n");
		}
		ONSEMI_NB7NQ621M_Init(Iic_Ptr, VFMC_MEZZ_I2C_NB7NQ621M_TX_ADDR,
				VfmcPtr->TxMezzType - VFMC_MEZZ_HDMI_ONSEMI_R0, 1);
		Vfmc_Gpio_Mezz_HdmiTxDriver_Enable(VfmcPtr, TRUE);
		xil_printf("VFMC Active HDMI TX Mezz (R%d) Detected\r\n",
				RevisionNumber);
	} else {
		VfmcPtr->TxMezzType = VFMC_MEZZ_HDMI_PASSIVE;
		xil_printf("VFMC Passive HDMI TX Mezz Detected\r\n");
	}
	Vfmc_Gpio_Led_On(VfmcPtr, VFMC_GPIO_TX_LED0, TRUE);
#endif
#ifdef XPAR_XV_HDMIRXSS1_NUM_INSTANCES
	if (ONSEMI_NB7NQ621M_CheckDeviceID(Iic_Ptr,
			VFMC_MEZZ_I2C_NB7NQ621M_RX_ADDR) == XST_SUCCESS) {
		RevisionNumber = ONSEMI_NB7NQ621M_CheckDeviceVersion(Iic_Ptr,
				VFMC_MEZZ_I2C_NB7NQ621M_RX_ADDR);
		if (RevisionNumber == 0x00) {
			VfmcPtr->RxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R0;
		} else if (RevisionNumber == 0x01) {
			VfmcPtr->RxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R1;
		} else if (RevisionNumber == 0x24) {
			VfmcPtr->RxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R2;
		} else if (RevisionNumber == 0x02) {
			VfmcPtr->RxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R3;
		} else {
			VfmcPtr->RxMezzType = VFMC_MEZZ_INVALID;
			xil_printf("VFMC RX Mezz Not Supported!\r\n");
		}
		ONSEMI_NB7NQ621M_Init(Iic_Ptr, VFMC_MEZZ_I2C_NB7NQ621M_RX_ADDR,
				VfmcPtr->RxMezzType - VFMC_MEZZ_HDMI_ONSEMI_R0, 0);
		Vfmc_Gpio_Mezz_HdmiRxEqualizer_Enable(VfmcPtr, TRUE);
		xil_printf("VFMC Active HDMI RX Mezz (R%d) Detected\r\n",
				RevisionNumber);
	} else {
		VfmcPtr->RxMezzType = VFMC_MEZZ_HDMI_PASSIVE;
		xil_printf("VFMC Passive HDMI RX Mezz Detected\r\n");
	}
	Vfmc_Gpio_Led_On(VfmcPtr, VFMC_GPIO_RX_LED0, TRUE);
#endif
	VfmcPtr->IsReady = XIL_COMPONENT_IS_READY;
	return XST_SUCCESS;
}
u32 Vfmc_HdmiInit ( XVfmc * VfmcPtr , u16 GpioDeviceId , void * IicPtr , XVfmc_Location Loc ) { int Status ; u8 Buffer [ 2 ] ; int ByteCount ; u8 RevisionNumber ; XGpio_Config * Gpio_Vfmc_ConfigPtr ; if ( VfmcPtr -> IsReady == XIL_COMPONENT_IS_READY ) { xil_printf ( " " " \r \n " ) ; return ( XST_FAILURE ) ; } else { VfmcPtr -> IicPtr = IicPtr ; VfmcPtr -> Loc = Loc ; VfmcPtr -> TxMezzType = VFMC_MEZZ_INVALID ; VfmcPtr -> RxMezzType = VFMC_MEZZ_INVALID ; VfmcPtr -> IsReady = 0 ; } #if defined ( XPS_BOARD_ZCU102 ) || defined ( XPS_BOARD_ZCU104 ) || defined ( XPS_BOARD_ZCU106 ) || defined ( XPS_BOARD_VCK190 ) XIicPs * Iic_Ptr = IicPtr ; #else XIic * Iic_Ptr = IicPtr ; #endif Gpio_Vfmc_ConfigPtr = XGpio_LookupConfig ( GpioDeviceId ) ; if ( Gpio_Vfmc_ConfigPtr == NULL ) { VfmcPtr -> Gpio . IsReady = 0 ; xil_printf ( " \r \n " ) ; return ( XST_FAILURE ) ; } Status = XGpio_CfgInitialize ( & VfmcPtr -> Gpio , Gpio_Vfmc_ConfigPtr , Gpio_Vfmc_ConfigPtr -> BaseAddress ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " " ) ; xil_printf ( " \r \n " , Status ) ; return ( XST_FAILURE ) ; } Vfmc_I2cMuxSelect ( VfmcPtr ) ; #if ( defined XPS_BOARD_ZCU102 ) Buffer [ 0 ] = 0x41 ; #elif ( defined XPS_BOARD_ZCU106 ) Buffer [ 0 ] = 0x41 ; #elif ( defined XPS_BOARD_VCU118 ) Buffer [ 0 ] = 0x41 ; #else Buffer [ 0 ] = 0x41 ; #endif ByteCount = Vfmc_I2cSend ( IicPtr , VFMC_I2C_IOEXP_0_ADDR , ( u8 * ) Buffer , 1 , I2C_STOP ) ; if ( ByteCount != 1 ) { xil_printf ( " \r \n " ) ; return XST_FAILURE ; } Buffer [ 0 ] = 0x1A ; ByteCount = Vfmc_I2cSend ( IicPtr , VFMC_I2C_IOEXP_1_ADDR , ( u8 * ) Buffer , 1 , I2C_STOP ) ; if ( ByteCount != 1 ) { xil_printf ( " \r \n " ) ; return XST_FAILURE ; } Status |= IDT_8T49N24x_Init ( Iic_Ptr , VFMC_I2C_IDT8N49_ADDR ) ; Status |= IDT_8T49N24x_GpioLolEnable ( Iic_Ptr , VFMC_I2C_IDT8N49_ADDR ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \r \n " ) ; return XST_FAILURE ; } Status = TI_LMK03318_Init ( Iic_Ptr , VFMC_I2C_LMK03318_ADDR ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \r \n " ) ; return XST_FAILURE ; } Status = SI5344_Init ( Iic_Ptr , VFMC_I2C_SI5344_ADDR ) ; if ( Status != XST_SUCCESS ) { xil_printf ( " \r \n " ) ; return XST_FAILURE ; } #ifdef XPAR_XV_HDMITXSS1_NUM_INSTANCES if ( ONSEMI_NB7NQ621M_CheckDeviceID ( Iic_Ptr , VFMC_MEZZ_I2C_NB7NQ621M_TX_ADDR ) == XST_SUCCESS ) { RevisionNumber = ONSEMI_NB7NQ621M_CheckDeviceVersion ( Iic_Ptr , VFMC_MEZZ_I2C_NB7NQ621M_TX_ADDR ) ; if ( RevisionNumber == 0x00 ) { VfmcPtr -> TxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R0 ; } else if ( RevisionNumber == 0x01 ) { VfmcPtr -> TxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R1 ; } else if ( RevisionNumber == 0x24 ) { VfmcPtr -> TxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R2 ; } else if ( RevisionNumber == 0x02 ) { VfmcPtr -> TxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R3 ; } else { VfmcPtr -> TxMezzType = VFMC_MEZZ_INVALID ; xil_printf ( " \r \n " ) ; } ONSEMI_NB7NQ621M_Init ( Iic_Ptr , VFMC_MEZZ_I2C_NB7NQ621M_TX_ADDR , VfmcPtr -> TxMezzType - VFMC_MEZZ_HDMI_ONSEMI_R0 , 1 ) ; Vfmc_Gpio_Mezz_HdmiTxDriver_Enable ( VfmcPtr , TRUE ) ; xil_printf ( " \r \n " , RevisionNumber ) ; } else { VfmcPtr -> TxMezzType = VFMC_MEZZ_HDMI_PASSIVE ; xil_printf ( " \r \n " ) ; } Vfmc_Gpio_Led_On ( VfmcPtr , VFMC_GPIO_TX_LED0 , TRUE ) ; #endif #ifdef XPAR_XV_HDMIRXSS1_NUM_INSTANCES if ( ONSEMI_NB7NQ621M_CheckDeviceID ( Iic_Ptr , VFMC_MEZZ_I2C_NB7NQ621M_RX_ADDR ) == XST_SUCCESS ) { RevisionNumber = ONSEMI_NB7NQ621M_CheckDeviceVersion ( Iic_Ptr , VFMC_MEZZ_I2C_NB7NQ621M_RX_ADDR ) ; if ( RevisionNumber == 0x00 ) { VfmcPtr -> RxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R0 ; } else if ( RevisionNumber == 0x01 ) { VfmcPtr -> RxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R1 ; } else if ( RevisionNumber == 0x24 ) { VfmcPtr -> RxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R2 ; } else if ( RevisionNumber == 0x02 ) { VfmcPtr -> RxMezzType = VFMC_MEZZ_HDMI_ONSEMI_R3 ; } else { VfmcPtr -> RxMezzType = VFMC_MEZZ_INVALID ; xil_printf ( " \r \n " ) ; } ONSEMI_NB7NQ621M_Init ( Iic_Ptr , VFMC_MEZZ_I2C_NB7NQ621M_RX_ADDR , VfmcPtr -> RxMezzType - VFMC_MEZZ_HDMI_ONSEMI_R0 , 0 ) ; Vfmc_Gpio_Mezz_HdmiRxEqualizer_Enable ( VfmcPtr , TRUE ) ; xil_printf ( " \r \n " , RevisionNumber ) ; } else { VfmcPtr -> RxMezzType = VFMC_MEZZ_HDMI_PASSIVE ; xil_printf ( " \r \n " ) ; } Vfmc_Gpio_Led_On ( VfmcPtr , VFMC_GPIO_RX_LED0 , TRUE ) ; #endif VfmcPtr -> IsReady = XIL_COMPONENT_IS_READY ; return XST_SUCCESS ; }
This function initializes the Video FMC clock generator and clock MUXs
for HDMI operation
This function initializes the Video FMC clock generator and clock MUXs for HDMI operation
/* Check if VFMC was already Initialized */ /* Initialize GPIO for VFMC */ /* Configure VFMC IO Expander 0:
	 * Enabled SI5344, To Disable SI5344 set Buffer[0] = 0x52
	 * Set primary clock source for LMK03318 to IOCLKp(0)
	 * Set secondary clock source for LMK03318 to IOCLKp(1)
	 * Disable LMK61E2*/ /* Place Holder for other board */ /* Configure VFMC IO Expander 1:
	 * Enable LMK03318 -> In a power-down state the I2C bus becomes
	 * unusable.
	 * Select LMK03318 clock as source for FMC_GT_CLKp(0)
	 * Select IDT8T49N241 clock as source for FMC_GT_CLKp(1)
	 * Enable IDT8T49N241 */ /* Configure HDMI2.0 Mezz in Slot 1 IO Expander 1:
	 * Enable DP159 Output
	 * Select GT3 as TMDS Clk source */ /* Note : for HDMI4K FMC,
	 * Buffer[0] = 0x05;
	 * ByteCount = XIic_Send(BaseAddr, 0x22,
	 *		(u8*)Buffer, 1, XIIC_STOP);
	 * if (ByteCount != 1) {
	 *	xil_printf("Failed to set the I2C IO Expander.\r\n");
	 *	return XST_FAILURE;
	 * }
	 */ /*SI5344 Initialization */ /* Check if mezzanine card is with an active device */ /* Revision 0 Silicon */ /* Revision 1 Silicon */ /* Revision Pass3 Silicon */ /* Revision Pass4 Silicon */ /* TX Mezzanine Init Done */ /* Check if mezzanine card is with an active device */ /* Revision 0 Silicon */ /* Revision 1 Silicon */ /* Revision Pass3 Silicon */ /* Revision Pass4 Silicon */ /* RX Mezzanine Init Done */