XilinxProcessorIPLib/drivers/v_sditx/src/xv_sditx.c
void XV_SdiTx_VidBridgeEnable(XV_SdiTx *InstancePtr)
{
	u32 Data;

	Data = XV_SdiTx_ReadReg(InstancePtr->Config.BaseAddress,
				(XV_SDITX_RST_CTRL_OFFSET));
	Data |= XV_SDITX_RST_CTRL_SDITX_BRIDGE_EN_MASK;

	XV_SdiTx_WriteReg((InstancePtr)->Config.BaseAddress,
				(XV_SDITX_RST_CTRL_OFFSET), (Data));
}
/*****************************************************************************/
/**
*
* This function enables the video bridge
*
* @param    InstancePtr is a pointer to the XV_SdiTx core instance.
*
* @return   None
*
* @note     None.
*
******************************************************************************/
This function enables the video bridge
This function enables the video bridge
void XV_SdiTx_VidBridgeEnable(XV_SdiTx *InstancePtr)
{
	u32 Data;
	Data = XV_SdiTx_ReadReg(InstancePtr->Config.BaseAddress,
				(XV_SDITX_RST_CTRL_OFFSET));
	Data |= XV_SDITX_RST_CTRL_SDITX_BRIDGE_EN_MASK;
	XV_SdiTx_WriteReg((InstancePtr)->Config.BaseAddress,
				(XV_SDITX_RST_CTRL_OFFSET), (Data));
}
void XV_SdiTx_VidBridgeEnable ( XV_SdiTx * InstancePtr ) { u32 Data ; Data = XV_SdiTx_ReadReg ( InstancePtr -> Config . BaseAddress , ( XV_SDITX_RST_CTRL_OFFSET ) ) ; Data |= XV_SDITX_RST_CTRL_SDITX_BRIDGE_EN_MASK ; XV_SdiTx_WriteReg ( ( InstancePtr ) -> Config . BaseAddress , ( XV_SDITX_RST_CTRL_OFFSET ) , ( Data ) ) ; }
This function enables the video bridge
This function enables the video bridge