enclave/core/sgx/exception.c
int _emulate_illegal_instruction(sgx_ssa_gpr_t* ssa_gpr)
{
    // emulate CPUID
    if (*((uint16_t*)ssa_gpr->rip) == OE_CPUID_OPCODE)
    {
        return _emulate_cpuid(ssa_gpr);
    }

    // emulate WRFSBASE64
    if ((*(uint32_t*)ssa_gpr->rip) == WRFSBASE64_OPCODE_1 ||
        (*(uint32_t*)ssa_gpr->rip) == WRFSBASE64_OPCODE_2)
    {
        return _emulate_wrfsbase64(ssa_gpr);
    }

    return -1;
}
/*
**==============================================================================
**
** _emulate_illegal_instruction()
**
** Handle illegal instruction exceptions such as CPUID as part of the first
** chance exception dispatcher.
**
**==============================================================================
*/
_emulate_illegal_instruction()
Handle illegal instruction exceptions such as CPUID as part of the first
chance exception dispatcher.
_emulate_illegal_instruction () Handle illegal instruction exceptions such as CPUID as part of the first chance exception dispatcher .
int _emulate_illegal_instruction(sgx_ssa_gpr_t* ssa_gpr)
{
    if (*((uint16_t*)ssa_gpr->rip) == OE_CPUID_OPCODE)
    {
        return _emulate_cpuid(ssa_gpr);
    }
    if ((*(uint32_t*)ssa_gpr->rip) == WRFSBASE64_OPCODE_1 ||
        (*(uint32_t*)ssa_gpr->rip) == WRFSBASE64_OPCODE_2)
    {
        return _emulate_wrfsbase64(ssa_gpr);
    }
    return -1;
}
int _emulate_illegal_instruction ( sgx_ssa_gpr_t * ssa_gpr ) { if ( * ( ( uint16_t * ) ssa_gpr -> rip ) == OE_CPUID_OPCODE ) { return _emulate_cpuid ( ssa_gpr ) ; } if ( ( * ( uint32_t * ) ssa_gpr -> rip ) == WRFSBASE64_OPCODE_1 || ( * ( uint32_t * ) ssa_gpr -> rip ) == WRFSBASE64_OPCODE_2 ) { return _emulate_wrfsbase64 ( ssa_gpr ) ; } return -1 ; }
_emulate_illegal_instruction()
Handle illegal instruction exceptions such as CPUID as part of the first
chance exception dispatcher.
_emulate_illegal_instruction () Handle illegal instruction exceptions such as CPUID as part of the first chance exception dispatcher .
// emulate CPUID // emulate WRFSBASE64