XilinxProcessorIPLib/drivers/csi2txss/src/xcsi2txss.c
u32 XCsi2TxSs_Configure(XCsi2TxSs *InstancePtr, u8 ActiveLanes, u32 IntrMask)
{
	XCsi2Tx *CsiPtr;
	u32 Status;

	/* Verify arguments */
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->CsiPtr != NULL);
	Xil_AssertNonvoid(XCsi2Tx_IsActiveLaneCountValid(InstancePtr->CsiPtr,
						ActiveLanes));

	CsiPtr = InstancePtr->CsiPtr;

	if (InstancePtr->Config.FEGenEnabled) {
		IntrMask &= (XCSI2TX_ISR_ALLINTR_MASK |
			     XCSITX_LCSTAT_VC0_IER_MASK |
			     XCSITX_LCSTAT_VC1_IER_MASK |
			     XCSITX_LCSTAT_VC2_IER_MASK |
			     XCSITX_LCSTAT_VC3_IER_MASK);
	} else
		IntrMask &= XCSI2TX_ISR_ALLINTR_MASK;

	XCsi2Tx_IntrEnable(CsiPtr, IntrMask);

	CsiPtr->ActiveLanes = ActiveLanes;
	Status = XCsi2Tx_Configure(CsiPtr);
	if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}

	return XST_SUCCESS;
}
/*****************************************************************************/
/**
* This function is used to configure the CSI lanes and interrupts that are to
* be handled by the application. Refer to XCsi2Tx.h for interrupt masks.
*
* @param	InstancePtr is a pointer to the Subsystem instance to be
*		worked on.
* @param	ActiveLanes is no of active lanes to be configure. This value
*		ranges between 1 and 4.
* @param	IntrMask Indicates Mask for enable interrupts.
*
* @return
*		- XST_SUCCESS on successful configuration of parameters
* 		- XST_FAILURE otherwise
*
* @note		When EnableActiveLanes is 0, then the ActiveLanes parameter
*		passed should be equal to Max Lanes of design.
*
******************************************************************************/
This function is used to configure the CSI lanes and interrupts that are to
be handled by the application. Refer to XCsi2Tx.h for interrupt masks.
This function is used to configure the CSI lanes and interrupts that are to be handled by the application . Refer to XCsi2Tx . h for interrupt masks .
u32 XCsi2TxSs_Configure(XCsi2TxSs *InstancePtr, u8 ActiveLanes, u32 IntrMask)
{
	XCsi2Tx *CsiPtr;
	u32 Status;
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid(InstancePtr->CsiPtr != NULL);
	Xil_AssertNonvoid(XCsi2Tx_IsActiveLaneCountValid(InstancePtr->CsiPtr,
						ActiveLanes));
	CsiPtr = InstancePtr->CsiPtr;
	if (InstancePtr->Config.FEGenEnabled) {
		IntrMask &= (XCSI2TX_ISR_ALLINTR_MASK |
			     XCSITX_LCSTAT_VC0_IER_MASK |
			     XCSITX_LCSTAT_VC1_IER_MASK |
			     XCSITX_LCSTAT_VC2_IER_MASK |
			     XCSITX_LCSTAT_VC3_IER_MASK);
	} else
		IntrMask &= XCSI2TX_ISR_ALLINTR_MASK;
	XCsi2Tx_IntrEnable(CsiPtr, IntrMask);
	CsiPtr->ActiveLanes = ActiveLanes;
	Status = XCsi2Tx_Configure(CsiPtr);
	if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}
	return XST_SUCCESS;
}
u32 XCsi2TxSs_Configure ( XCsi2TxSs * InstancePtr , u8 ActiveLanes , u32 IntrMask ) { XCsi2Tx * CsiPtr ; u32 Status ; Xil_AssertNonvoid ( InstancePtr != NULL ) ; Xil_AssertNonvoid ( InstancePtr -> CsiPtr != NULL ) ; Xil_AssertNonvoid ( XCsi2Tx_IsActiveLaneCountValid ( InstancePtr -> CsiPtr , ActiveLanes ) ) ; CsiPtr = InstancePtr -> CsiPtr ; if ( InstancePtr -> Config . FEGenEnabled ) { IntrMask &= ( XCSI2TX_ISR_ALLINTR_MASK | XCSITX_LCSTAT_VC0_IER_MASK | XCSITX_LCSTAT_VC1_IER_MASK | XCSITX_LCSTAT_VC2_IER_MASK | XCSITX_LCSTAT_VC3_IER_MASK ) ; } else IntrMask &= XCSI2TX_ISR_ALLINTR_MASK ; XCsi2Tx_IntrEnable ( CsiPtr , IntrMask ) ; CsiPtr -> ActiveLanes = ActiveLanes ; Status = XCsi2Tx_Configure ( CsiPtr ) ; if ( Status != XST_SUCCESS ) { return XST_FAILURE ; } return XST_SUCCESS ; }
This function is used to configure the CSI lanes and interrupts that are to
be handled by the application.
This function is used to configure the CSI lanes and interrupts that are to be handled by the application .
/* Verify arguments */