XilinxProcessorIPLib/drivers/aienginev2/src/dma/xaie_dma.c
AieRC XAie_DmaChannelPushBdToQueue(XAie_DevInst *DevInst, XAie_LocType Loc,
		u8 ChNum, XAie_DmaDirection Dir, u8 BdNum)
{
	AieRC RC;
	u8 TileType;
	u64 Addr;
	const XAie_DmaMod *DmaMod;

	if((DevInst == XAIE_NULL) ||
			(DevInst->IsReady != XAIE_COMPONENT_IS_READY)) {
		XAIE_ERROR("Invalid Device Instance\n");
		return XAIE_INVALID_ARGS;
	}

	if(Dir >= DMA_MAX) {
		XAIE_ERROR("Invalid DMA direction\n");
		return XAIE_INVALID_ARGS;
	}

	TileType = DevInst->DevOps->GetTTypefromLoc(DevInst, Loc);
	if(TileType == XAIEGBL_TILE_TYPE_SHIMPL) {
		XAIE_ERROR("Invalid Tile Type\n");
		return XAIE_INVALID_TILE;
	}

	DmaMod = DevInst->DevProp.DevMod[TileType].DmaMod;
	if(ChNum > DmaMod->NumChannels) {
		XAIE_ERROR("Invalid Channel number\n");
		return XAIE_INVALID_CHANNEL_NUM;
	}

	if(BdNum > DmaMod->NumBds) {
		XAIE_ERROR("Invalid BD number\n");
		return XAIE_INVALID_BD_NUM;
	}

	RC = DmaMod->BdChValidity(BdNum, ChNum);
	if(RC != XAIE_OK)
		return RC;

	Addr = _XAie_GetTileAddr(DevInst, Loc.Row, Loc.Col) +
		DmaMod->ChCtrlBase + ChNum * DmaMod->ChIdxOffset +
		Dir * DmaMod->ChIdxOffset * DmaMod->NumChannels;

	return XAie_Write32(DevInst, Addr + (DmaMod->ChProp->StartBd.Idx * 4U),
			BdNum);
}
/*****************************************************************************/
/**
*
* This API pushes a Buffer Descriptor onto the MM2S or S2MM Channel queue.
*
* @param	DevInst: Device Instance.
* @param	Loc: Location of AIE Tile
* @param	ChNum: Channel number of the DMA.
* @param	Dir: Direction of the DMA Channel. (MM2S or S2MM)
* @param	BdNum: Bd number to be pushed to the queue.
*
* @return	XAIE_OK on success, Error code on failure.
*
* @note		If there is no bit to enable the channel in AIE DMAs,
*		pushing a Buffer descriptor number onto the queue starts the
*		channel.
*
******************************************************************************/
This API pushes a Buffer Descriptor onto the MM2S or S2MM Channel queue.
This API pushes a Buffer Descriptor onto the MM2S or S2MM Channel queue .
AieRC XAie_DmaChannelPushBdToQueue(XAie_DevInst *DevInst, XAie_LocType Loc,
		u8 ChNum, XAie_DmaDirection Dir, u8 BdNum)
{
	AieRC RC;
	u8 TileType;
	u64 Addr;
	const XAie_DmaMod *DmaMod;
	if((DevInst == XAIE_NULL) ||
			(DevInst->IsReady != XAIE_COMPONENT_IS_READY)) {
		XAIE_ERROR("Invalid Device Instance\n");
		return XAIE_INVALID_ARGS;
	}
	if(Dir >= DMA_MAX) {
		XAIE_ERROR("Invalid DMA direction\n");
		return XAIE_INVALID_ARGS;
	}
	TileType = DevInst->DevOps->GetTTypefromLoc(DevInst, Loc);
	if(TileType == XAIEGBL_TILE_TYPE_SHIMPL) {
		XAIE_ERROR("Invalid Tile Type\n");
		return XAIE_INVALID_TILE;
	}
	DmaMod = DevInst->DevProp.DevMod[TileType].DmaMod;
	if(ChNum > DmaMod->NumChannels) {
		XAIE_ERROR("Invalid Channel number\n");
		return XAIE_INVALID_CHANNEL_NUM;
	}
	if(BdNum > DmaMod->NumBds) {
		XAIE_ERROR("Invalid BD number\n");
		return XAIE_INVALID_BD_NUM;
	}
	RC = DmaMod->BdChValidity(BdNum, ChNum);
	if(RC != XAIE_OK)
		return RC;
	Addr = _XAie_GetTileAddr(DevInst, Loc.Row, Loc.Col) +
		DmaMod->ChCtrlBase + ChNum * DmaMod->ChIdxOffset +
		Dir * DmaMod->ChIdxOffset * DmaMod->NumChannels;
	return XAie_Write32(DevInst, Addr + (DmaMod->ChProp->StartBd.Idx * 4U),
			BdNum);
}
AieRC XAie_DmaChannelPushBdToQueue ( XAie_DevInst * DevInst , XAie_LocType Loc , u8 ChNum , XAie_DmaDirection Dir , u8 BdNum ) { AieRC RC ; u8 TileType ; u64 Addr ; const XAie_DmaMod * DmaMod ; if ( ( DevInst == XAIE_NULL ) || ( DevInst -> IsReady != XAIE_COMPONENT_IS_READY ) ) { XAIE_ERROR ( " \n " ) ; return XAIE_INVALID_ARGS ; } if ( Dir >= DMA_MAX ) { XAIE_ERROR ( " \n " ) ; return XAIE_INVALID_ARGS ; } TileType = DevInst -> DevOps -> GetTTypefromLoc ( DevInst , Loc ) ; if ( TileType == XAIEGBL_TILE_TYPE_SHIMPL ) { XAIE_ERROR ( " \n " ) ; return XAIE_INVALID_TILE ; } DmaMod = DevInst -> DevProp . DevMod [ TileType ] . DmaMod ; if ( ChNum > DmaMod -> NumChannels ) { XAIE_ERROR ( " \n " ) ; return XAIE_INVALID_CHANNEL_NUM ; } if ( BdNum > DmaMod -> NumBds ) { XAIE_ERROR ( " \n " ) ; return XAIE_INVALID_BD_NUM ; } RC = DmaMod -> BdChValidity ( BdNum , ChNum ) ; if ( RC != XAIE_OK ) return RC ; Addr = _XAie_GetTileAddr ( DevInst , Loc . Row , Loc . Col ) + DmaMod -> ChCtrlBase + ChNum * DmaMod -> ChIdxOffset + Dir * DmaMod -> ChIdxOffset * DmaMod -> NumChannels ; return XAie_Write32 ( DevInst , Addr + ( DmaMod -> ChProp -> StartBd . Idx * 4U ) , BdNum ) ; }
This API pushes a Buffer Descriptor onto the MM2S or S2MM Channel queue.
This API pushes a Buffer Descriptor onto the MM2S or S2MM Channel queue .