XilinxProcessorIPLib/drivers/dp14txss/examples/src/zcu_pt_dp14_hdcp/rx.c
void DpRxSs_UnplugHandler(void *InstancePtr)
{
	/* Disable & Enable Audio */
	rx_unplugged = 1;
	appx_fs_dup = 0;
//	XDpRxSs_AudioDisable(&DpRxSsInst);
	AudioinfoFrame.frame_count = 0;
	SdpExtFrame.Header[1] = 0;
	SdpExtFrame_q.Header[1] = 0;
	SdpExtFrame.frame_count = 0;
	SdpExtFrame.frame_count = 0;

	/*Enable Training related interrupts*/
#if ENABLE_HDCP_IN_DESIGN
	XDp_RxInterruptDisable(DpRxSsInst.DpPtr, 0xFE00FFFF);
#else
	XDp_RxInterruptDisable(DpRxSsInst.DpPtr, 0xF9FFFFFF /*0xFFF87FFF*/);
#endif
//	XDp_RxInterruptDisable(DpRxSsInst.DpPtr,
//			       XDP_RX_INTERRUPT_MASK_ALL_MASK);

	XDp_RxInterruptDisable1(DpRxSsInst.DpPtr, 0xFFFFFFFF);

	XDp_RxInterruptEnable(DpRxSsInst.DpPtr,
			      XDP_RX_INTERRUPT_MASK_TP1_MASK |
			      XDP_RX_INTERRUPT_MASK_TP2_MASK |
			XDP_RX_INTERRUPT_MASK_TP3_MASK|
			XDP_RX_INTERRUPT_MASK_POWER_STATE_MASK|
			XDP_RX_INTERRUPT_MASK_CRC_TEST_MASK|
			XDP_RX_INTERRUPT_MASK_BW_CHANGE_MASK);

	XDp_RxInterruptEnable1(DpRxSsInst.DpPtr,
			XDP_RX_INTERRUPT_MASK_TP4_MASK|
			XDP_RX_INTERRUPT_MASK_ACCESS_LANE_SET_MASK|
			XDP_RX_INTERRUPT_MASK_ACCESS_LINK_QUAL_MASK|
			XDP_RX_INTERRUPT_MASK_ACCESS_ERROR_COUNTER_MASK);

	XDp_RxGenerateHpdInterrupt(DpRxSsInst.DpPtr, 5000);
	DpRxSsInst.link_up_trigger = 0;
	DpRxSsInst.VBlankCount = 0;
	DpRxSsInst.no_video_trigger = 1;
#if ENABLE_HDCP22_IN_RX
	XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr,
						XDP_RX_SOFT_RESET,
						XDP_RX_SOFT_RESET_HDCP22_MASK);
				XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr,
						XDP_RX_SOFT_RESET, 0);
#endif

#if ENABLE_HDCP_IN_DESIGN
#if ENABLE_HDCP_FLOW_GUIDE
	XDpRxSs_HdcpDisable(&DpRxSsInst);
	XDpTxSs_HdcpDisable(&DpTxSsInst);
	XHdcp1xExample_Poll();
#endif

#if ENABLE_HDCP1x_IN_RX
	XDpRxSs_SetPhysicalState(&DpRxSsInst, FALSE);
#endif

#if ENABLE_HDCP1x_IN_TX
	XDpTxSs_SetPhysicalState(&DpTxSsInst, TRUE);
#endif

#if (ENABLE_HDCP1x_IN_RX | ENABLE_HDCP1x_IN_TX)
	XHdcp1xExample_Poll();
#endif

#if ENABLE_HDCP1x_IN_TX
	XDpTxSs_SetPhysicalState(&DpTxSsInst, FALSE);
#endif

#if (ENABLE_HDCP1x_IN_RX | ENABLE_HDCP1x_IN_TX)
	XHdcp1xExample_Poll();
#endif

//#if ENABLE_HDCP1x_IN_RX
	XDpRxSs_StopTimer(&DpRxSsInst);
//	IsTxEncrypted = 0;
//	IsTxAuthenticated = 0;
#endif
}
/*****************************************************************************/
/**
*
* This function is the callback function for when the unplug event occurs.
*
* @param    InstancePtr is a pointer to the XDpRxSs instance.
*
* @return    None.
*
* @note        None.
*
******************************************************************************/
This function is the callback function for when the unplug event occurs.
This function is the callback function for when the unplug event occurs .
void DpRxSs_UnplugHandler(void *InstancePtr)
{
	rx_unplugged = 1;
	appx_fs_dup = 0;
	AudioinfoFrame.frame_count = 0;
	SdpExtFrame.Header[1] = 0;
	SdpExtFrame_q.Header[1] = 0;
	SdpExtFrame.frame_count = 0;
	SdpExtFrame.frame_count = 0;
#if ENABLE_HDCP_IN_DESIGN
	XDp_RxInterruptDisable(DpRxSsInst.DpPtr, 0xFE00FFFF);
#else
	XDp_RxInterruptDisable(DpRxSsInst.DpPtr, 0xF9FFFFFF );
#endif
	XDp_RxInterruptDisable1(DpRxSsInst.DpPtr, 0xFFFFFFFF);
	XDp_RxInterruptEnable(DpRxSsInst.DpPtr,
			      XDP_RX_INTERRUPT_MASK_TP1_MASK |
			      XDP_RX_INTERRUPT_MASK_TP2_MASK |
			XDP_RX_INTERRUPT_MASK_TP3_MASK|
			XDP_RX_INTERRUPT_MASK_POWER_STATE_MASK|
			XDP_RX_INTERRUPT_MASK_CRC_TEST_MASK|
			XDP_RX_INTERRUPT_MASK_BW_CHANGE_MASK);
	XDp_RxInterruptEnable1(DpRxSsInst.DpPtr,
			XDP_RX_INTERRUPT_MASK_TP4_MASK|
			XDP_RX_INTERRUPT_MASK_ACCESS_LANE_SET_MASK|
			XDP_RX_INTERRUPT_MASK_ACCESS_LINK_QUAL_MASK|
			XDP_RX_INTERRUPT_MASK_ACCESS_ERROR_COUNTER_MASK);
	XDp_RxGenerateHpdInterrupt(DpRxSsInst.DpPtr, 5000);
	DpRxSsInst.link_up_trigger = 0;
	DpRxSsInst.VBlankCount = 0;
	DpRxSsInst.no_video_trigger = 1;
#if ENABLE_HDCP22_IN_RX
	XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr,
						XDP_RX_SOFT_RESET,
						XDP_RX_SOFT_RESET_HDCP22_MASK);
				XDp_WriteReg(DpRxSsInst.DpPtr->Config.BaseAddr,
						XDP_RX_SOFT_RESET, 0);
#endif
#if ENABLE_HDCP_IN_DESIGN
#if ENABLE_HDCP_FLOW_GUIDE
	XDpRxSs_HdcpDisable(&DpRxSsInst);
	XDpTxSs_HdcpDisable(&DpTxSsInst);
	XHdcp1xExample_Poll();
#endif
#if ENABLE_HDCP1x_IN_RX
	XDpRxSs_SetPhysicalState(&DpRxSsInst, FALSE);
#endif
#if ENABLE_HDCP1x_IN_TX
	XDpTxSs_SetPhysicalState(&DpTxSsInst, TRUE);
#endif
#if (ENABLE_HDCP1x_IN_RX | ENABLE_HDCP1x_IN_TX)
	XHdcp1xExample_Poll();
#endif
#if ENABLE_HDCP1x_IN_TX
	XDpTxSs_SetPhysicalState(&DpTxSsInst, FALSE);
#endif
#if (ENABLE_HDCP1x_IN_RX | ENABLE_HDCP1x_IN_TX)
	XHdcp1xExample_Poll();
#endif
	XDpRxSs_StopTimer(&DpRxSsInst);
#endif
}
void DpRxSs_UnplugHandler ( void * InstancePtr ) { rx_unplugged = 1 ; appx_fs_dup = 0 ; AudioinfoFrame . frame_count = 0 ; SdpExtFrame . Header [ 1 ] = 0 ; SdpExtFrame_q . Header [ 1 ] = 0 ; SdpExtFrame . frame_count = 0 ; SdpExtFrame . frame_count = 0 ; #if ENABLE_HDCP_IN_DESIGN XDp_RxInterruptDisable ( DpRxSsInst . DpPtr , 0xFE00FFFF ) ; #else XDp_RxInterruptDisable ( DpRxSsInst . DpPtr , 0xF9FFFFFF ) ; #endif XDp_RxInterruptDisable1 ( DpRxSsInst . DpPtr , 0xFFFFFFFF ) ; XDp_RxInterruptEnable ( DpRxSsInst . DpPtr , XDP_RX_INTERRUPT_MASK_TP1_MASK | XDP_RX_INTERRUPT_MASK_TP2_MASK | XDP_RX_INTERRUPT_MASK_TP3_MASK | XDP_RX_INTERRUPT_MASK_POWER_STATE_MASK | XDP_RX_INTERRUPT_MASK_CRC_TEST_MASK | XDP_RX_INTERRUPT_MASK_BW_CHANGE_MASK ) ; XDp_RxInterruptEnable1 ( DpRxSsInst . DpPtr , XDP_RX_INTERRUPT_MASK_TP4_MASK | XDP_RX_INTERRUPT_MASK_ACCESS_LANE_SET_MASK | XDP_RX_INTERRUPT_MASK_ACCESS_LINK_QUAL_MASK | XDP_RX_INTERRUPT_MASK_ACCESS_ERROR_COUNTER_MASK ) ; XDp_RxGenerateHpdInterrupt ( DpRxSsInst . DpPtr , 5000 ) ; DpRxSsInst . link_up_trigger = 0 ; DpRxSsInst . VBlankCount = 0 ; DpRxSsInst . no_video_trigger = 1 ; #if ENABLE_HDCP22_IN_RX XDp_WriteReg ( DpRxSsInst . DpPtr -> Config . BaseAddr , XDP_RX_SOFT_RESET , XDP_RX_SOFT_RESET_HDCP22_MASK ) ; XDp_WriteReg ( DpRxSsInst . DpPtr -> Config . BaseAddr , XDP_RX_SOFT_RESET , 0 ) ; #endif #if ENABLE_HDCP_IN_DESIGN #if ENABLE_HDCP_FLOW_GUIDE XDpRxSs_HdcpDisable ( & DpRxSsInst ) ; XDpTxSs_HdcpDisable ( & DpTxSsInst ) ; XHdcp1xExample_Poll ( ) ; #endif #if ENABLE_HDCP1x_IN_RX XDpRxSs_SetPhysicalState ( & DpRxSsInst , FALSE ) ; #endif #if ENABLE_HDCP1x_IN_TX XDpTxSs_SetPhysicalState ( & DpTxSsInst , TRUE ) ; #endif #if ( ENABLE_HDCP1x_IN_RX | ENABLE_HDCP1x_IN_TX ) XHdcp1xExample_Poll ( ) ; #endif #if ENABLE_HDCP1x_IN_TX XDpTxSs_SetPhysicalState ( & DpTxSsInst , FALSE ) ; #endif #if ( ENABLE_HDCP1x_IN_RX | ENABLE_HDCP1x_IN_TX ) XHdcp1xExample_Poll ( ) ; #endif XDpRxSs_StopTimer ( & DpRxSsInst ) ; #endif }
This function is the callback function for when the unplug event occurs.
This function is the callback function for when the unplug event occurs .
/* Disable & Enable Audio */ //	XDpRxSs_AudioDisable(&DpRxSsInst); /*Enable Training related interrupts*/ /*0xFFF87FFF*/ //	XDp_RxInterruptDisable(DpRxSsInst.DpPtr, //			       XDP_RX_INTERRUPT_MASK_ALL_MASK); //#if ENABLE_HDCP1x_IN_RX //	IsTxEncrypted = 0; //	IsTxAuthenticated = 0;