src/dpdk/drivers/net/i40e/i40e_fdir.c
static void
i40e_set_flx_pld_cfg(struct i40e_pf *pf,
			 const struct rte_eth_flex_payload_cfg *cfg)
{
	struct i40e_hw *hw = I40E_PF_TO_HW(pf);
	struct i40e_fdir_flex_pit flex_pit[I40E_MAX_FLXPLD_FIED];
	uint32_t flx_pit, flx_ort;
	uint16_t num, min_next_off;  /* in words */
	uint8_t field_idx = 0;
	uint8_t layer_idx = 0;
	uint16_t i;

	if (cfg->type == RTE_ETH_L2_PAYLOAD)
		layer_idx = I40E_FLXPLD_L2_IDX;
	else if (cfg->type == RTE_ETH_L3_PAYLOAD)
		layer_idx = I40E_FLXPLD_L3_IDX;
	else if (cfg->type == RTE_ETH_L4_PAYLOAD)
		layer_idx = I40E_FLXPLD_L4_IDX;

	memset(flex_pit, 0, sizeof(flex_pit));
	num = RTE_MIN(i40e_srcoff_to_flx_pit(cfg->src_offset, flex_pit),
		      RTE_DIM(flex_pit));

	if (num) {
		flx_ort = (1 << I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT) |
			  (num << I40E_GLQF_ORT_FIELD_CNT_SHIFT) |
			  (layer_idx * I40E_MAX_FLXPLD_FIED);
		I40E_WRITE_GLB_REG(hw, I40E_GLQF_ORT(33 + layer_idx), flx_ort);
	}

	for (i = 0; i < num; i++) {
		field_idx = layer_idx * I40E_MAX_FLXPLD_FIED + i;
		/* record the info in fdir structure */
		pf->fdir.flex_set[field_idx].src_offset =
			flex_pit[i].src_offset / sizeof(uint16_t);
		pf->fdir.flex_set[field_idx].size =
			flex_pit[i].size / sizeof(uint16_t);
		pf->fdir.flex_set[field_idx].dst_offset =
			flex_pit[i].dst_offset / sizeof(uint16_t);
		flx_pit = MK_FLX_PIT(pf->fdir.flex_set[field_idx].src_offset,
				pf->fdir.flex_set[field_idx].size,
				pf->fdir.flex_set[field_idx].dst_offset);

		I40E_WRITE_REG(hw, I40E_PRTQF_FLX_PIT(field_idx), flx_pit);
	}
	min_next_off = pf->fdir.flex_set[field_idx].src_offset +
				pf->fdir.flex_set[field_idx].size;

	for (; i < I40E_MAX_FLXPLD_FIED; i++) {
		/* set the non-used register obeying register's constrain */
		flx_pit = MK_FLX_PIT(min_next_off, NONUSE_FLX_PIT_FSIZE,
			   NONUSE_FLX_PIT_DEST_OFF);
		I40E_WRITE_REG(hw,
			I40E_PRTQF_FLX_PIT(layer_idx * I40E_MAX_FLXPLD_FIED + i),
			flx_pit);
		min_next_off++;
	}
}
/*
 * i40e_set_flx_pld_cfg -configure the rule how bytes stream is extracted as flexible payload
 * @pf: board private structure
 * @cfg: the rule how bytes stream is extracted as flexible payload
 */
configure the rule how bytes stream is extracted as flexible payload
@pf: board private structure
@cfg: the rule how bytes stream is extracted as flexible payload
configure the rule how bytes stream is extracted as flexible payload @pf : board private structure @cfg : the rule how bytes stream is extracted as flexible payload
static void
i40e_set_flx_pld_cfg(struct i40e_pf *pf,
			 const struct rte_eth_flex_payload_cfg *cfg)
{
	struct i40e_hw *hw = I40E_PF_TO_HW(pf);
	struct i40e_fdir_flex_pit flex_pit[I40E_MAX_FLXPLD_FIED];
	uint32_t flx_pit, flx_ort;
	uint16_t num, min_next_off;  
	uint8_t field_idx = 0;
	uint8_t layer_idx = 0;
	uint16_t i;
	if (cfg->type == RTE_ETH_L2_PAYLOAD)
		layer_idx = I40E_FLXPLD_L2_IDX;
	else if (cfg->type == RTE_ETH_L3_PAYLOAD)
		layer_idx = I40E_FLXPLD_L3_IDX;
	else if (cfg->type == RTE_ETH_L4_PAYLOAD)
		layer_idx = I40E_FLXPLD_L4_IDX;
	memset(flex_pit, 0, sizeof(flex_pit));
	num = RTE_MIN(i40e_srcoff_to_flx_pit(cfg->src_offset, flex_pit),
		      RTE_DIM(flex_pit));
	if (num) {
		flx_ort = (1 << I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT) |
			  (num << I40E_GLQF_ORT_FIELD_CNT_SHIFT) |
			  (layer_idx * I40E_MAX_FLXPLD_FIED);
		I40E_WRITE_GLB_REG(hw, I40E_GLQF_ORT(33 + layer_idx), flx_ort);
	}
	for (i = 0; i < num; i++) {
		field_idx = layer_idx * I40E_MAX_FLXPLD_FIED + i;
		pf->fdir.flex_set[field_idx].src_offset =
			flex_pit[i].src_offset / sizeof(uint16_t);
		pf->fdir.flex_set[field_idx].size =
			flex_pit[i].size / sizeof(uint16_t);
		pf->fdir.flex_set[field_idx].dst_offset =
			flex_pit[i].dst_offset / sizeof(uint16_t);
		flx_pit = MK_FLX_PIT(pf->fdir.flex_set[field_idx].src_offset,
				pf->fdir.flex_set[field_idx].size,
				pf->fdir.flex_set[field_idx].dst_offset);
		I40E_WRITE_REG(hw, I40E_PRTQF_FLX_PIT(field_idx), flx_pit);
	}
	min_next_off = pf->fdir.flex_set[field_idx].src_offset +
				pf->fdir.flex_set[field_idx].size;
	for (; i < I40E_MAX_FLXPLD_FIED; i++) {
		flx_pit = MK_FLX_PIT(min_next_off, NONUSE_FLX_PIT_FSIZE,
			   NONUSE_FLX_PIT_DEST_OFF);
		I40E_WRITE_REG(hw,
			I40E_PRTQF_FLX_PIT(layer_idx * I40E_MAX_FLXPLD_FIED + i),
			flx_pit);
		min_next_off++;
	}
}
static void i40e_set_flx_pld_cfg ( struct i40e_pf * pf , const struct rte_eth_flex_payload_cfg * cfg ) { struct i40e_hw * hw = I40E_PF_TO_HW ( pf ) ; struct i40e_fdir_flex_pit flex_pit [ I40E_MAX_FLXPLD_FIED ] ; uint32_t flx_pit , flx_ort ; uint16_t num , min_next_off ; uint8_t field_idx = 0 ; uint8_t layer_idx = 0 ; uint16_t i ; if ( cfg -> type == RTE_ETH_L2_PAYLOAD ) layer_idx = I40E_FLXPLD_L2_IDX ; else if ( cfg -> type == RTE_ETH_L3_PAYLOAD ) layer_idx = I40E_FLXPLD_L3_IDX ; else if ( cfg -> type == RTE_ETH_L4_PAYLOAD ) layer_idx = I40E_FLXPLD_L4_IDX ; memset ( flex_pit , 0 , sizeof ( flex_pit ) ) ; num = RTE_MIN ( i40e_srcoff_to_flx_pit ( cfg -> src_offset , flex_pit ) , RTE_DIM ( flex_pit ) ) ; if ( num ) { flx_ort = ( 1 << I40E_GLQF_ORT_FLX_PAYLOAD_SHIFT ) | ( num << I40E_GLQF_ORT_FIELD_CNT_SHIFT ) | ( layer_idx * I40E_MAX_FLXPLD_FIED ) ; I40E_WRITE_GLB_REG ( hw , I40E_GLQF_ORT ( 33 + layer_idx ) , flx_ort ) ; } for ( i = 0 ; i < num ; i ++ ) { field_idx = layer_idx * I40E_MAX_FLXPLD_FIED + i ; pf -> fdir . flex_set [ field_idx ] . src_offset = flex_pit [ i ] . src_offset / sizeof ( uint16_t ) ; pf -> fdir . flex_set [ field_idx ] . size = flex_pit [ i ] . size / sizeof ( uint16_t ) ; pf -> fdir . flex_set [ field_idx ] . dst_offset = flex_pit [ i ] . dst_offset / sizeof ( uint16_t ) ; flx_pit = MK_FLX_PIT ( pf -> fdir . flex_set [ field_idx ] . src_offset , pf -> fdir . flex_set [ field_idx ] . size , pf -> fdir . flex_set [ field_idx ] . dst_offset ) ; I40E_WRITE_REG ( hw , I40E_PRTQF_FLX_PIT ( field_idx ) , flx_pit ) ; } min_next_off = pf -> fdir . flex_set [ field_idx ] . src_offset + pf -> fdir . flex_set [ field_idx ] . size ; for ( ; i < I40E_MAX_FLXPLD_FIED ; i ++ ) { flx_pit = MK_FLX_PIT ( min_next_off , NONUSE_FLX_PIT_FSIZE , NONUSE_FLX_PIT_DEST_OFF ) ; I40E_WRITE_REG ( hw , I40E_PRTQF_FLX_PIT ( layer_idx * I40E_MAX_FLXPLD_FIED + i ) , flx_pit ) ; min_next_off ++ ; } }
i40e_set_flx_pld_cfg -configure the rule how bytes stream is extracted as flexible payload
 @pf: board private structure
 @cfg: the rule how bytes stream is extracted as flexible payload
i40e_set_flx_pld_cfg - configure the rule how bytes stream is extracted as flexible payload @pf : board private structure @cfg : the rule how bytes stream is extracted as flexible payload
/* in words */ /* record the info in fdir structure */ /* set the non-used register obeying register's constrain */