AllJoyn/Samples/BACnetAdapter/bacnet-stack-0.8.2/ports/xplained/ASF/xmega/services/pwm/pwm.c
void pwm_set_frequency(struct pwm_config *config, uint16_t freq_hz)
{
	uint32_t cpu_hz = sysclk_get_cpu_hz();
	uint16_t smallest_div;
	uint16_t dividor;

	/* Avoid division by zero. */
	Assert(freq_hz != 0);

	/* Calculate the smallest divider for the requested frequency
	   related to the CPU frequency */
	smallest_div = cpu_hz / freq_hz / 0xFFFF;
	if (smallest_div < 1) {
		dividor = 1;
		config->clk_sel = PWM_CLK_DIV1;
	} else if (smallest_div < 2) {
		dividor = 2;
		config->clk_sel = PWM_CLK_DIV2;
	} else if (smallest_div < 4) {
		dividor = 4;
		config->clk_sel = PWM_CLK_DIV4;
	} else if (smallest_div < 8) {
		dividor = 8;
		config->clk_sel = PWM_CLK_DIV8;
	} else if (smallest_div < 64) {
		dividor = 64;
		config->clk_sel = PWM_CLK_DIV64;
	} else if (smallest_div < 256) {
		dividor = 256;
		config->clk_sel = PWM_CLK_DIV256;
	} else {
		dividor = 1024;
		config->clk_sel = PWM_CLK_DIV1024;
	}

	/* Calculate the period from the just found divider */
	config->period = cpu_hz / dividor / freq_hz;

	/* Make sure our period is at least 100 ticks so we are able to provide
	   a full range (0-100% duty cycle */
	if (config->period < 100) {
		/* The period is too short. */
		config->clk_sel = PWM_CLK_OFF;
		config->period = 0;
		Assert(false);
	}
}
/**
 * \brief Calculate TC settings from PWM frequency
 *
 * This function will find the correct TC settings (clock prescaler and
 * period) which will give the wanted PWM frequency.
 *
 * \note Since we want to be able to run the PWM at all duty-cycles ranging
 * from 0-100%, we require a period of at least 100 to achieve this. Thus, the
 * highest possible PWM frequency is CPU frequency / 100.
 *
 * \param config Pointer to PWM configuration.
 * \param freq_hz Wanted PWM frequency in Hz.
 */
\brief Calculate TC settings from PWM frequency
This function will find the correct TC settings (clock prescaler and
period) which will give the wanted PWM frequency.

\note Since we want to be able to run the PWM at all duty-cycles ranging
from 0-100%, we require a period of at least 100 to achieve this. Thus, the
highest possible PWM frequency is CPU frequency / 100.

\param config Pointer to PWM configuration.
\param freq_hz Wanted PWM frequency in Hz.
\ brief Calculate TC settings from PWM frequency This function will find the correct TC settings ( clock prescaler and period ) which will give the wanted PWM frequency . \ note Since we want to be able to run the PWM at all duty - cycles ranging from 0 - 100% we require a period of at least 100 to achieve this . Thus the highest possible PWM frequency is CPU frequency / 100 . \ param config Pointer to PWM configuration . \ param freq_hz Wanted PWM frequency in Hz .
void pwm_set_frequency(struct pwm_config *config, uint16_t freq_hz)
{
	uint32_t cpu_hz = sysclk_get_cpu_hz();
	uint16_t smallest_div;
	uint16_t dividor;
	Assert(freq_hz != 0);
	smallest_div = cpu_hz / freq_hz / 0xFFFF;
	if (smallest_div < 1) {
		dividor = 1;
		config->clk_sel = PWM_CLK_DIV1;
	} else if (smallest_div < 2) {
		dividor = 2;
		config->clk_sel = PWM_CLK_DIV2;
	} else if (smallest_div < 4) {
		dividor = 4;
		config->clk_sel = PWM_CLK_DIV4;
	} else if (smallest_div < 8) {
		dividor = 8;
		config->clk_sel = PWM_CLK_DIV8;
	} else if (smallest_div < 64) {
		dividor = 64;
		config->clk_sel = PWM_CLK_DIV64;
	} else if (smallest_div < 256) {
		dividor = 256;
		config->clk_sel = PWM_CLK_DIV256;
	} else {
		dividor = 1024;
		config->clk_sel = PWM_CLK_DIV1024;
	}
	config->period = cpu_hz / dividor / freq_hz;
	if (config->period < 100) {
		config->clk_sel = PWM_CLK_OFF;
		config->period = 0;
		Assert(false);
	}
}
void pwm_set_frequency ( struct pwm_config * config , uint16_t freq_hz ) { uint32_t cpu_hz = sysclk_get_cpu_hz ( ) ; uint16_t smallest_div ; uint16_t dividor ; Assert ( freq_hz != 0 ) ; smallest_div = cpu_hz / freq_hz / 0xFFFF ; if ( smallest_div < 1 ) { dividor = 1 ; config -> clk_sel = PWM_CLK_DIV1 ; } else if ( smallest_div < 2 ) { dividor = 2 ; config -> clk_sel = PWM_CLK_DIV2 ; } else if ( smallest_div < 4 ) { dividor = 4 ; config -> clk_sel = PWM_CLK_DIV4 ; } else if ( smallest_div < 8 ) { dividor = 8 ; config -> clk_sel = PWM_CLK_DIV8 ; } else if ( smallest_div < 64 ) { dividor = 64 ; config -> clk_sel = PWM_CLK_DIV64 ; } else if ( smallest_div < 256 ) { dividor = 256 ; config -> clk_sel = PWM_CLK_DIV256 ; } else { dividor = 1024 ; config -> clk_sel = PWM_CLK_DIV1024 ; } config -> period = cpu_hz / dividor / freq_hz ; if ( config -> period < 100 ) { config -> clk_sel = PWM_CLK_OFF ; config -> period = 0 ; Assert ( false ) ; } }
\brief Calculate TC settings from PWM frequency
 This function will find the correct TC settings (clock prescaler and
 period) which will give the wanted PWM frequency.
\ brief Calculate TC settings from PWM frequency This function will find the correct TC settings ( clock prescaler and period ) which will give the wanted PWM frequency .
/* Avoid division by zero. */ /* Calculate the smallest divider for the requested frequency
	   related to the CPU frequency */ /* Calculate the period from the just found divider */ /* Make sure our period is at least 100 ticks so we are able to provide
	   a full range (0-100% duty cycle */ /* The period is too short. */