src/dpdk/drivers/net/igc/base/igc_mac.c
void igc_pcix_mmrbc_workaround_generic(struct igc_hw *hw)
{
	u16 cmd_mmrbc;
	u16 pcix_cmd;
	u16 pcix_stat_hi_word;
	u16 stat_mmrbc;

	DEBUGFUNC("igc_pcix_mmrbc_workaround_generic");

	/* Workaround for PCI-X issue when BIOS sets MMRBC incorrectly */
	if (hw->bus.type != igc_bus_type_pcix)
		return;

	igc_read_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd);
	igc_read_pci_cfg(hw, PCIX_STATUS_REGISTER_HI, &pcix_stat_hi_word);
	cmd_mmrbc = (pcix_cmd & PCIX_COMMAND_MMRBC_MASK) >>
		     PCIX_COMMAND_MMRBC_SHIFT;
	stat_mmrbc = (pcix_stat_hi_word & PCIX_STATUS_HI_MMRBC_MASK) >>
		      PCIX_STATUS_HI_MMRBC_SHIFT;
	if (stat_mmrbc == PCIX_STATUS_HI_MMRBC_4K)
		stat_mmrbc = PCIX_STATUS_HI_MMRBC_2K;
	if (cmd_mmrbc > stat_mmrbc) {
		pcix_cmd &= ~PCIX_COMMAND_MMRBC_MASK;
		pcix_cmd |= stat_mmrbc << PCIX_COMMAND_MMRBC_SHIFT;
		igc_write_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd);
	}
}
/**
 *  igc_pcix_mmrbc_workaround_generic - Fix incorrect MMRBC value
 *  @hw: pointer to the HW structure
 *
 *  In certain situations, a system BIOS may report that the PCIx maximum
 *  memory read byte count (MMRBC) value is higher than than the actual
 *  value. We check the PCIx command register with the current PCIx status
 *  register.
 **/
Fix incorrect MMRBC value
@hw: pointer to the HW structure

In certain situations, a system BIOS may report that the PCIx maximum
memory read byte count (MMRBC) value is higher than than the actual
value. We check the PCIx command register with the current PCIx status
register.
Fix incorrect MMRBC value @hw : pointer to the HW structure In certain situations a system BIOS may report that the PCIx maximum memory read byte count ( MMRBC ) value is higher than than the actual value . We check the PCIx command register with the current PCIx status register .
void igc_pcix_mmrbc_workaround_generic(struct igc_hw *hw)
{
	u16 cmd_mmrbc;
	u16 pcix_cmd;
	u16 pcix_stat_hi_word;
	u16 stat_mmrbc;
	DEBUGFUNC("igc_pcix_mmrbc_workaround_generic");
	if (hw->bus.type != igc_bus_type_pcix)
		return;
	igc_read_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd);
	igc_read_pci_cfg(hw, PCIX_STATUS_REGISTER_HI, &pcix_stat_hi_word);
	cmd_mmrbc = (pcix_cmd & PCIX_COMMAND_MMRBC_MASK) >>
		     PCIX_COMMAND_MMRBC_SHIFT;
	stat_mmrbc = (pcix_stat_hi_word & PCIX_STATUS_HI_MMRBC_MASK) >>
		      PCIX_STATUS_HI_MMRBC_SHIFT;
	if (stat_mmrbc == PCIX_STATUS_HI_MMRBC_4K)
		stat_mmrbc = PCIX_STATUS_HI_MMRBC_2K;
	if (cmd_mmrbc > stat_mmrbc) {
		pcix_cmd &= ~PCIX_COMMAND_MMRBC_MASK;
		pcix_cmd |= stat_mmrbc << PCIX_COMMAND_MMRBC_SHIFT;
		igc_write_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd);
	}
}
void igc_pcix_mmrbc_workaround_generic ( struct igc_hw * hw ) { u16 cmd_mmrbc ; u16 pcix_cmd ; u16 pcix_stat_hi_word ; u16 stat_mmrbc ; DEBUGFUNC ( " " ) ; if ( hw -> bus . type != igc_bus_type_pcix ) return ; igc_read_pci_cfg ( hw , PCIX_COMMAND_REGISTER , & pcix_cmd ) ; igc_read_pci_cfg ( hw , PCIX_STATUS_REGISTER_HI , & pcix_stat_hi_word ) ; cmd_mmrbc = ( pcix_cmd & PCIX_COMMAND_MMRBC_MASK ) >> PCIX_COMMAND_MMRBC_SHIFT ; stat_mmrbc = ( pcix_stat_hi_word & PCIX_STATUS_HI_MMRBC_MASK ) >> PCIX_STATUS_HI_MMRBC_SHIFT ; if ( stat_mmrbc == PCIX_STATUS_HI_MMRBC_4K ) stat_mmrbc = PCIX_STATUS_HI_MMRBC_2K ; if ( cmd_mmrbc > stat_mmrbc ) { pcix_cmd &= ~ PCIX_COMMAND_MMRBC_MASK ; pcix_cmd |= stat_mmrbc << PCIX_COMMAND_MMRBC_SHIFT ; igc_write_pci_cfg ( hw , PCIX_COMMAND_REGISTER , & pcix_cmd ) ; } }
igc_pcix_mmrbc_workaround_generic - Fix incorrect MMRBC value
  @hw: pointer to the HW structure
igc_pcix_mmrbc_workaround_generic - Fix incorrect MMRBC value @hw : pointer to the HW structure
/* Workaround for PCI-X issue when BIOS sets MMRBC incorrectly */