os_dep/linux/pci_intf.c
void rtw_pci_disable_aspm(_adapter *padapter)
{
	struct dvobj_priv	*pdvobjpriv = adapter_to_dvobj(padapter);
	struct pwrctrl_priv	*pwrpriv = dvobj_to_pwrctl(pdvobjpriv);
	struct pci_dev	*pdev = pdvobjpriv->ppcidev;
	struct pci_dev	*bridge_pdev = pdev->bus->self;
	struct pci_priv	*pcipriv = &(pdvobjpriv->pcipriv);
	u8	linkctrl_reg;
	u8	pcibridge_linkctrlreg, aspmlevel = 0;


	/* We shall check RF Off Level for ASPM function instead of registry settings, revised by Roger, 2013.03.29. */
	if (!(pwrpriv->reg_rfps_level & (RT_RF_LPS_LEVEL_ASPM | RT_RF_PS_LEVEL_ALWAYS_ASPM)))
		return;

	if (!rtw_is_hw_init_completed(padapter))
		return;

	if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN)
		return;

	linkctrl_reg = pcipriv->linkctrl_reg;
	pcibridge_linkctrlreg = pcipriv->pcibridge_linkctrlreg;

	/* Set corresponding value. */
	aspmlevel |= BIT(0) | BIT(1);
	linkctrl_reg &= ~aspmlevel;
	pcibridge_linkctrlreg &= ~aspmlevel;

	/*  */
	/* 09/08/21 MH From Sd1 suggestion. we need to adjust ASPM enable sequence */
	/* CLK_REQ ==> delay 50us ==> Device ==> Host ==> delay 50us */
	/*  */

	if (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
		RT_CLEAR_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_CLK_REQ);
		rtw_pci_switch_clk_req(padapter, 0x0);
	}

	{
		/*for promising device will in L0 state after an I/O.*/
		u8 tmp_u1b;

		pci_read_config_byte(pdev, (pcipriv->pciehdr_offset + 0x10), &tmp_u1b);
	}

	rtw_pci_platform_switch_device_pci_aspm(padapter, linkctrl_reg);

	rtw_udelay_os(50);

	/* When there exists anyone's BusNum, DevNum, and FuncNum that are set to 0xff, */
	/* we do not execute any action and return. Added by tynli. */
	if ((pcipriv->busnumber == 0xff && pcipriv->devnumber == 0xff && pcipriv->funcnumber == 0xff) ||
	    (pcipriv->pcibridge_busnum == 0xff && pcipriv->pcibridge_devnum == 0xff && pcipriv->pcibridge_funcnum == 0xff)) {
		/* Do Nothing!! */
	} else {
		/* 4  */ /* Disable Pci Bridge ASPM */
		pci_write_config_byte(bridge_pdev, (pcipriv->pcibridge_pciehdr_offset + 0x10), pcibridge_linkctrlreg);
		RTW_INFO("PlatformDisableASPM():PciBridge Write reg[%x] = %x\n",
			(pcipriv->pcibridge_pciehdr_offset + 0x10), pcibridge_linkctrlreg);
		rtw_udelay_os(50);
	}

}
/*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
Disable RTL8192SE ASPM & Disable Pci Bridge ASPM
Disable RTL8192SE ASPM & Disable Pci Bridge ASPM
void rtw_pci_disable_aspm(_adapter *padapter)
{
	struct dvobj_priv	*pdvobjpriv = adapter_to_dvobj(padapter);
	struct pwrctrl_priv	*pwrpriv = dvobj_to_pwrctl(pdvobjpriv);
	struct pci_dev	*pdev = pdvobjpriv->ppcidev;
	struct pci_dev	*bridge_pdev = pdev->bus->self;
	struct pci_priv	*pcipriv = &(pdvobjpriv->pcipriv);
	u8	linkctrl_reg;
	u8	pcibridge_linkctrlreg, aspmlevel = 0;
	if (!(pwrpriv->reg_rfps_level & (RT_RF_LPS_LEVEL_ASPM | RT_RF_PS_LEVEL_ALWAYS_ASPM)))
		return;
	if (!rtw_is_hw_init_completed(padapter))
		return;
	if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN)
		return;
	linkctrl_reg = pcipriv->linkctrl_reg;
	pcibridge_linkctrlreg = pcipriv->pcibridge_linkctrlreg;
	aspmlevel |= BIT(0) | BIT(1);
	linkctrl_reg &= ~aspmlevel;
	pcibridge_linkctrlreg &= ~aspmlevel;
	if (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
		RT_CLEAR_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_CLK_REQ);
		rtw_pci_switch_clk_req(padapter, 0x0);
	}
	{
		u8 tmp_u1b;
		pci_read_config_byte(pdev, (pcipriv->pciehdr_offset + 0x10), &tmp_u1b);
	}
	rtw_pci_platform_switch_device_pci_aspm(padapter, linkctrl_reg);
	rtw_udelay_os(50);
	if ((pcipriv->busnumber == 0xff && pcipriv->devnumber == 0xff && pcipriv->funcnumber == 0xff) ||
	    (pcipriv->pcibridge_busnum == 0xff && pcipriv->pcibridge_devnum == 0xff && pcipriv->pcibridge_funcnum == 0xff)) {
	} else {
		pci_write_config_byte(bridge_pdev, (pcipriv->pcibridge_pciehdr_offset + 0x10), pcibridge_linkctrlreg);
		RTW_INFO("PlatformDisableASPM():PciBridge Write reg[%x] = %x\n",
			(pcipriv->pcibridge_pciehdr_offset + 0x10), pcibridge_linkctrlreg);
		rtw_udelay_os(50);
	}
}
void rtw_pci_disable_aspm ( _adapter * padapter ) { struct dvobj_priv * pdvobjpriv = adapter_to_dvobj ( padapter ) ; struct pwrctrl_priv * pwrpriv = dvobj_to_pwrctl ( pdvobjpriv ) ; struct pci_dev * pdev = pdvobjpriv -> ppcidev ; struct pci_dev * bridge_pdev = pdev -> bus -> self ; struct pci_priv * pcipriv = & ( pdvobjpriv -> pcipriv ) ; u8 linkctrl_reg ; u8 pcibridge_linkctrlreg , aspmlevel = 0 ; if ( ! ( pwrpriv -> reg_rfps_level & ( RT_RF_LPS_LEVEL_ASPM | RT_RF_PS_LEVEL_ALWAYS_ASPM ) ) ) return ; if ( ! rtw_is_hw_init_completed ( padapter ) ) return ; if ( pcipriv -> pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN ) return ; linkctrl_reg = pcipriv -> linkctrl_reg ; pcibridge_linkctrlreg = pcipriv -> pcibridge_linkctrlreg ; aspmlevel |= BIT ( 0 ) | BIT ( 1 ) ; linkctrl_reg &= ~ aspmlevel ; pcibridge_linkctrlreg &= ~ aspmlevel ; if ( pwrpriv -> reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ ) { RT_CLEAR_PS_LEVEL ( pwrpriv , RT_RF_OFF_LEVL_CLK_REQ ) ; rtw_pci_switch_clk_req ( padapter , 0x0 ) ; } { u8 tmp_u1b ; pci_read_config_byte ( pdev , ( pcipriv -> pciehdr_offset + 0x10 ) , & tmp_u1b ) ; } rtw_pci_platform_switch_device_pci_aspm ( padapter , linkctrl_reg ) ; rtw_udelay_os ( 50 ) ; if ( ( pcipriv -> busnumber == 0xff && pcipriv -> devnumber == 0xff && pcipriv -> funcnumber == 0xff ) || ( pcipriv -> pcibridge_busnum == 0xff && pcipriv -> pcibridge_devnum == 0xff && pcipriv -> pcibridge_funcnum == 0xff ) ) { } else { pci_write_config_byte ( bridge_pdev , ( pcipriv -> pcibridge_pciehdr_offset + 0x10 ) , pcibridge_linkctrlreg ) ; RTW_INFO ( " \n " , ( pcipriv -> pcibridge_pciehdr_offset + 0x10 ) , pcibridge_linkctrlreg ) ; rtw_udelay_os ( 50 ) ; } }
Disable RTL8192SE ASPM & Disable Pci Bridge ASPM
Disable RTL8192SE ASPM & Disable Pci Bridge ASPM
/* We shall check RF Off Level for ASPM function instead of registry settings, revised by Roger, 2013.03.29. */ /* Set corresponding value. */ /*  */ /* 09/08/21 MH From Sd1 suggestion. we need to adjust ASPM enable sequence */ /* CLK_REQ ==> delay 50us ==> Device ==> Host ==> delay 50us */ /*  */ /*for promising device will in L0 state after an I/O.*/ /* When there exists anyone's BusNum, DevNum, and FuncNum that are set to 0xff, */ /* we do not execute any action and return. Added by tynli. */ /* Do Nothing!! */ /* 4  */ /* Disable Pci Bridge ASPM */