PSoC4200 Tx Example.cydsn/Generated_Source/PSoC4/XBEE_UART_tx_PM.c
void XBEE_UART_tx_Sleep(void)
{
    #if defined(XBEE_UART_tx__PC)
        XBEE_UART_tx_backup.pcState = XBEE_UART_tx_PC;
    #else
        #if (CY_PSOC4_4200L)
            /* Save the regulator state and put the PHY into suspend mode */
            XBEE_UART_tx_backup.usbState = XBEE_UART_tx_CR1_REG;
            XBEE_UART_tx_USB_POWER_REG |= XBEE_UART_tx_USBIO_ENTER_SLEEP;
            XBEE_UART_tx_CR1_REG &= XBEE_UART_tx_USBIO_CR1_OFF;
        #endif
    #endif
    #if defined(CYIPBLOCK_m0s8ioss_VERSION) && defined(XBEE_UART_tx__SIO)
        XBEE_UART_tx_backup.sioState = XBEE_UART_tx_SIO_REG;
        /* SIO requires unregulated output buffer and single ended input buffer */
        XBEE_UART_tx_SIO_REG &= (uint32)(~XBEE_UART_tx_SIO_LPM_MASK);
    #endif  
}
/**
*
* \brief Stores the pin configuration and prepares the pin for entering chip 
*  deep-sleep/hibernate modes. This function must be called for SIO and USBIO
*  pins. It is not essential if using GPIO or GPIO_OVT pins.
*
* <b>Note</b> This function is available in PSoC 4 only.
*
* \return 
*  None 
*  
* \sideeffect
*  For SIO pins, this function configures the pin input threshold to CMOS and
*  drive level to Vddio. This is needed for SIO pins when in device 
*  deep-sleep/hibernate modes.
*
* \funcusage
*  \snippet XBEE_UART_tx_SUT.c usage_XBEE_UART_tx_Sleep_Wakeup
*******************************************************************************/
\brief Stores the pin configuration and prepares the pin for entering chip
deep-sleep/hibernate modes. This function must be called for SIO and USBIO
pins. It is not essential if using GPIO or GPIO_OVT pins.

Note This function is available in PSoC 4 only.

\return
None

\sideeffect
For SIO pins, this function configures the pin input threshold to CMOS and
drive level to Vddio. This is needed for SIO pins when in device
deep-sleep/hibernate modes.


\ brief Stores the pin configuration and prepares the pin for entering chip deep - sleep / hibernate modes . This function must be called for SIO and USBIO pins . It is not essential if using GPIO or GPIO_OVT pins . Note This function is available in PSoC 4 only . \ return None \ sideeffect For SIO pins this function configures the pin input threshold to CMOS and drive level to Vddio . This is needed for SIO pins when in device deep - sleep / hibernate modes .
void XBEE_UART_tx_Sleep(void)
{
    #if defined(XBEE_UART_tx__PC)
        XBEE_UART_tx_backup.pcState = XBEE_UART_tx_PC;
    #else
        #if (CY_PSOC4_4200L)
            XBEE_UART_tx_backup.usbState = XBEE_UART_tx_CR1_REG;
            XBEE_UART_tx_USB_POWER_REG |= XBEE_UART_tx_USBIO_ENTER_SLEEP;
            XBEE_UART_tx_CR1_REG &= XBEE_UART_tx_USBIO_CR1_OFF;
        #endif
    #endif
    #if defined(CYIPBLOCK_m0s8ioss_VERSION) && defined(XBEE_UART_tx__SIO)
        XBEE_UART_tx_backup.sioState = XBEE_UART_tx_SIO_REG;
        XBEE_UART_tx_SIO_REG &= (uint32)(~XBEE_UART_tx_SIO_LPM_MASK);
    #endif  
}
void XBEE_UART_tx_Sleep ( void ) { #if defined ( XBEE_UART_tx__PC ) XBEE_UART_tx_backup . pcState = XBEE_UART_tx_PC ; #else #if ( CY_PSOC4_4200L ) XBEE_UART_tx_backup . usbState = XBEE_UART_tx_CR1_REG ; XBEE_UART_tx_USB_POWER_REG |= XBEE_UART_tx_USBIO_ENTER_SLEEP ; XBEE_UART_tx_CR1_REG &= XBEE_UART_tx_USBIO_CR1_OFF ; #endif #endif #if defined ( CYIPBLOCK_m0s8ioss_VERSION ) && defined ( XBEE_UART_tx__SIO ) XBEE_UART_tx_backup . sioState = XBEE_UART_tx_SIO_REG ; XBEE_UART_tx_SIO_REG &= ( uint32 ) ( ~ XBEE_UART_tx_SIO_LPM_MASK ) ; #endif }
\brief Stores the pin configuration and prepares the pin for entering chip
deep-sleep/hibernate modes.
\ brief Stores the pin configuration and prepares the pin for entering chip deep - sleep / hibernate modes .
/* Save the regulator state and put the PHY into suspend mode */ /* SIO requires unregulated output buffer and single ended input buffer */