src/dpdk/drivers/net/txgbe/txgbe_rxtx.c
static void
txgbe_vmdq_tx_hw_configure(struct txgbe_hw *hw)
{
	uint32_t reg;
	uint32_t q;

	PMD_INIT_FUNC_TRACE();
	/*PF VF Transmit Enable*/
	wr32(hw, TXGBE_POOLTXENA(0), UINT32_MAX);
	wr32(hw, TXGBE_POOLTXENA(1), UINT32_MAX);

	/* Disable the Tx desc arbiter */
	reg = rd32(hw, TXGBE_ARBTXCTL);
	reg |= TXGBE_ARBTXCTL_DIA;
	wr32(hw, TXGBE_ARBTXCTL, reg);

	wr32m(hw, TXGBE_PORTCTL, TXGBE_PORTCTL_NUMVT_MASK,
		TXGBE_PORTCTL_NUMVT_64);

	/* Disable drop for all queues */
	for (q = 0; q < 128; q++) {
		u32 val = 1 << (q % 32);
		wr32m(hw, TXGBE_QPRXDROP(q / 32), val, val);
	}

	/* Enable the Tx desc arbiter */
	reg = rd32(hw, TXGBE_ARBTXCTL);
	reg &= ~TXGBE_ARBTXCTL_DIA;
	wr32(hw, TXGBE_ARBTXCTL, reg);

	txgbe_flush(hw);
}
/*
 * txgbe_vmdq_tx_hw_configure - Configure general VMDq TX parameters
 * @hw: pointer to hardware structure
 */
Configure general VMDq TX parameters
@hw: pointer to hardware structure
Configure general VMDq TX parameters @hw : pointer to hardware structure
static void
txgbe_vmdq_tx_hw_configure(struct txgbe_hw *hw)
{
	uint32_t reg;
	uint32_t q;
	PMD_INIT_FUNC_TRACE();
	wr32(hw, TXGBE_POOLTXENA(0), UINT32_MAX);
	wr32(hw, TXGBE_POOLTXENA(1), UINT32_MAX);
	reg = rd32(hw, TXGBE_ARBTXCTL);
	reg |= TXGBE_ARBTXCTL_DIA;
	wr32(hw, TXGBE_ARBTXCTL, reg);
	wr32m(hw, TXGBE_PORTCTL, TXGBE_PORTCTL_NUMVT_MASK,
		TXGBE_PORTCTL_NUMVT_64);
	for (q = 0; q < 128; q++) {
		u32 val = 1 << (q % 32);
		wr32m(hw, TXGBE_QPRXDROP(q / 32), val, val);
	}
	reg = rd32(hw, TXGBE_ARBTXCTL);
	reg &= ~TXGBE_ARBTXCTL_DIA;
	wr32(hw, TXGBE_ARBTXCTL, reg);
	txgbe_flush(hw);
}
static void txgbe_vmdq_tx_hw_configure ( struct txgbe_hw * hw ) { uint32_t reg ; uint32_t q ; PMD_INIT_FUNC_TRACE ( ) ; wr32 ( hw , TXGBE_POOLTXENA ( 0 ) , UINT32_MAX ) ; wr32 ( hw , TXGBE_POOLTXENA ( 1 ) , UINT32_MAX ) ; reg = rd32 ( hw , TXGBE_ARBTXCTL ) ; reg |= TXGBE_ARBTXCTL_DIA ; wr32 ( hw , TXGBE_ARBTXCTL , reg ) ; wr32m ( hw , TXGBE_PORTCTL , TXGBE_PORTCTL_NUMVT_MASK , TXGBE_PORTCTL_NUMVT_64 ) ; for ( q = 0 ; q < 128 ; q ++ ) { u32 val = 1 << ( q % 32 ) ; wr32m ( hw , TXGBE_QPRXDROP ( q / 32 ) , val , val ) ; } reg = rd32 ( hw , TXGBE_ARBTXCTL ) ; reg &= ~ TXGBE_ARBTXCTL_DIA ; wr32 ( hw , TXGBE_ARBTXCTL , reg ) ; txgbe_flush ( hw ) ; }
txgbe_vmdq_tx_hw_configure - Configure general VMDq TX parameters
 @hw: pointer to hardware structure
txgbe_vmdq_tx_hw_configure - Configure general VMDq TX parameters @hw : pointer to hardware structure
/*PF VF Transmit Enable*/ /* Disable the Tx desc arbiter */ /* Disable drop for all queues */ /* Enable the Tx desc arbiter */