XilinxProcessorIPLib/drivers/v_hdmiphy1/src/xhdmiphy1_hdmi.c
u32 XHdmiphy1_SetHdmiTxParam(XHdmiphy1 *InstancePtr, u8 QuadId,
        XHdmiphy1_ChannelId ChId,
		XVidC_PixelsPerClock Ppc, XVidC_ColorDepth Bpc,
		XVidC_ColorFormat ColorFormat)
{
	u32 Status;

	/* Verify arguments. */
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid((Ppc == (XVIDC_PPC_1)) || (Ppc == (XVIDC_PPC_2)) ||
			(Ppc == (XVIDC_PPC_4)));
	Xil_AssertNonvoid((Bpc == (XVIDC_BPC_8)) || (Bpc == (XVIDC_BPC_10)) ||
			(Bpc == (XVIDC_BPC_12)) || (Bpc == (XVIDC_BPC_16)));
	Xil_AssertNonvoid((ColorFormat == (XVIDC_CSF_RGB)) ||
			(ColorFormat == (XVIDC_CSF_YCRCB_444)) ||
			(ColorFormat == (XVIDC_CSF_YCRCB_422)) ||
			(ColorFormat == (XVIDC_CSF_YCRCB_420)));

#if (XPAR_HDMIPHY1_0_TRANSCEIVER != XHDMIPHY1_GTYE5)
	/* Only calculate the QPLL/CPLL parameters when the GT TX and RX are not
	 * coupled. */
    if (XHdmiphy1_IsTxUsingCpll(InstancePtr, QuadId, ChId)) {
        Status = XHdmiphy1_HdmiCpllParam(InstancePtr, QuadId, ChId,
                XHDMIPHY1_DIR_TX);
    }
    else {
        Status = XHdmiphy1_HdmiQpllParam(InstancePtr, QuadId, ChId,
                XHDMIPHY1_DIR_TX);
        /* Update SysClk and PLL Clk registers immediately. */
        XHdmiphy1_WriteCfgRefClkSelReg(InstancePtr, QuadId);
    }
#else
    Status = XHdmiphy1_HdmiTxPllParam(InstancePtr, QuadId, ChId);
#endif

    if (Status == XST_FAILURE) {
        return Status;
    }

	/* Is HDMITXSS PPC match with HDMIPHY PPC? */
	if (Ppc == InstancePtr->Config.Ppc) {
		Status = (XST_SUCCESS);
	}
	else {
		XHdmiphy1_LogWrite(InstancePtr, XHDMIPHY1_LOG_EVT_PPC_MSMTCH_ERR, 1);
		XHdmiphy1_ErrorHandler(InstancePtr);
		Status = (XST_FAILURE);
	}
	if (Status == (XST_SUCCESS)) {
		/* HDMI 2.1 */
		if (InstancePtr->TxHdmi21Cfg.IsEnabled) {
			XHdmiphy1_MmcmParam(InstancePtr, QuadId, XHDMIPHY1_DIR_TX);
			return Status;
		}

		/* Calculate TXPLL parameters.
		 * In HDMI the colordepth in YUV422 is always 12 bits,
		 * although on the link itself it is being transmitted as
		 * 8-bits. Therefore if the colorspace is YUV422, then force the
		 * colordepth to 8 bits. */
		if (ColorFormat == XVIDC_CSF_YCRCB_422) {
			Status = XHdmiphy1_HdmiCfgCalcMmcmParam(InstancePtr, QuadId,
                        ChId, XHDMIPHY1_DIR_TX, Ppc, XVIDC_BPC_8);
		}
		/* Other colorspaces. */
		else {
			Status = XHdmiphy1_HdmiCfgCalcMmcmParam(InstancePtr, QuadId,
                        ChId, XHDMIPHY1_DIR_TX, Ppc, Bpc);
		}
	}
	else {
		Status = (XST_FAILURE);
	}
	return Status;
}
/*****************************************************************************/
/**
* This function update/set the HDMI TX parameter.
*
* @param	InstancePtr is a pointer to the Hdmiphy core instance.
* @param	QuadId is the GT quad ID to operate on.
* @param	ChId is the channel ID to operate on.
* @param	Ppc is the pixels per clock to set.
* @param	Bpc is the bits per color to set.
* @param	ColorFormat is the color format to set.
*
* @return
*		- XST_SUCCESS if TX parameters set/updated.
*		- XST_FAILURE if low resolution video not supported.
*
* @note		None.
*
******************************************************************************/
This function update/set the HDMI TX parameter.
This function update / set the HDMI TX parameter .
u32 XHdmiphy1_SetHdmiTxParam(XHdmiphy1 *InstancePtr, u8 QuadId,
        XHdmiphy1_ChannelId ChId,
		XVidC_PixelsPerClock Ppc, XVidC_ColorDepth Bpc,
		XVidC_ColorFormat ColorFormat)
{
	u32 Status;
	Xil_AssertNonvoid(InstancePtr != NULL);
	Xil_AssertNonvoid((Ppc == (XVIDC_PPC_1)) || (Ppc == (XVIDC_PPC_2)) ||
			(Ppc == (XVIDC_PPC_4)));
	Xil_AssertNonvoid((Bpc == (XVIDC_BPC_8)) || (Bpc == (XVIDC_BPC_10)) ||
			(Bpc == (XVIDC_BPC_12)) || (Bpc == (XVIDC_BPC_16)));
	Xil_AssertNonvoid((ColorFormat == (XVIDC_CSF_RGB)) ||
			(ColorFormat == (XVIDC_CSF_YCRCB_444)) ||
			(ColorFormat == (XVIDC_CSF_YCRCB_422)) ||
			(ColorFormat == (XVIDC_CSF_YCRCB_420)));
#if (XPAR_HDMIPHY1_0_TRANSCEIVER != XHDMIPHY1_GTYE5)
    if (XHdmiphy1_IsTxUsingCpll(InstancePtr, QuadId, ChId)) {
        Status = XHdmiphy1_HdmiCpllParam(InstancePtr, QuadId, ChId,
                XHDMIPHY1_DIR_TX);
    }
    else {
        Status = XHdmiphy1_HdmiQpllParam(InstancePtr, QuadId, ChId,
                XHDMIPHY1_DIR_TX);
        XHdmiphy1_WriteCfgRefClkSelReg(InstancePtr, QuadId);
    }
#else
    Status = XHdmiphy1_HdmiTxPllParam(InstancePtr, QuadId, ChId);
#endif
    if (Status == XST_FAILURE) {
        return Status;
    }
	if (Ppc == InstancePtr->Config.Ppc) {
		Status = (XST_SUCCESS);
	}
	else {
		XHdmiphy1_LogWrite(InstancePtr, XHDMIPHY1_LOG_EVT_PPC_MSMTCH_ERR, 1);
		XHdmiphy1_ErrorHandler(InstancePtr);
		Status = (XST_FAILURE);
	}
	if (Status == (XST_SUCCESS)) {
		if (InstancePtr->TxHdmi21Cfg.IsEnabled) {
			XHdmiphy1_MmcmParam(InstancePtr, QuadId, XHDMIPHY1_DIR_TX);
			return Status;
		}
		if (ColorFormat == XVIDC_CSF_YCRCB_422) {
			Status = XHdmiphy1_HdmiCfgCalcMmcmParam(InstancePtr, QuadId,
                        ChId, XHDMIPHY1_DIR_TX, Ppc, XVIDC_BPC_8);
		}
		else {
			Status = XHdmiphy1_HdmiCfgCalcMmcmParam(InstancePtr, QuadId,
                        ChId, XHDMIPHY1_DIR_TX, Ppc, Bpc);
		}
	}
	else {
		Status = (XST_FAILURE);
	}
	return Status;
}
u32 XHdmiphy1_SetHdmiTxParam ( XHdmiphy1 * InstancePtr , u8 QuadId , XHdmiphy1_ChannelId ChId , XVidC_PixelsPerClock Ppc , XVidC_ColorDepth Bpc , XVidC_ColorFormat ColorFormat ) { u32 Status ; Xil_AssertNonvoid ( InstancePtr != NULL ) ; Xil_AssertNonvoid ( ( Ppc == ( XVIDC_PPC_1 ) ) || ( Ppc == ( XVIDC_PPC_2 ) ) || ( Ppc == ( XVIDC_PPC_4 ) ) ) ; Xil_AssertNonvoid ( ( Bpc == ( XVIDC_BPC_8 ) ) || ( Bpc == ( XVIDC_BPC_10 ) ) || ( Bpc == ( XVIDC_BPC_12 ) ) || ( Bpc == ( XVIDC_BPC_16 ) ) ) ; Xil_AssertNonvoid ( ( ColorFormat == ( XVIDC_CSF_RGB ) ) || ( ColorFormat == ( XVIDC_CSF_YCRCB_444 ) ) || ( ColorFormat == ( XVIDC_CSF_YCRCB_422 ) ) || ( ColorFormat == ( XVIDC_CSF_YCRCB_420 ) ) ) ; #if ( XPAR_HDMIPHY1_0_TRANSCEIVER != XHDMIPHY1_GTYE5 ) if ( XHdmiphy1_IsTxUsingCpll ( InstancePtr , QuadId , ChId ) ) { Status = XHdmiphy1_HdmiCpllParam ( InstancePtr , QuadId , ChId , XHDMIPHY1_DIR_TX ) ; } else { Status = XHdmiphy1_HdmiQpllParam ( InstancePtr , QuadId , ChId , XHDMIPHY1_DIR_TX ) ; XHdmiphy1_WriteCfgRefClkSelReg ( InstancePtr , QuadId ) ; } #else Status = XHdmiphy1_HdmiTxPllParam ( InstancePtr , QuadId , ChId ) ; #endif if ( Status == XST_FAILURE ) { return Status ; } if ( Ppc == InstancePtr -> Config . Ppc ) { Status = ( XST_SUCCESS ) ; } else { XHdmiphy1_LogWrite ( InstancePtr , XHDMIPHY1_LOG_EVT_PPC_MSMTCH_ERR , 1 ) ; XHdmiphy1_ErrorHandler ( InstancePtr ) ; Status = ( XST_FAILURE ) ; } if ( Status == ( XST_SUCCESS ) ) { if ( InstancePtr -> TxHdmi21Cfg . IsEnabled ) { XHdmiphy1_MmcmParam ( InstancePtr , QuadId , XHDMIPHY1_DIR_TX ) ; return Status ; } if ( ColorFormat == XVIDC_CSF_YCRCB_422 ) { Status = XHdmiphy1_HdmiCfgCalcMmcmParam ( InstancePtr , QuadId , ChId , XHDMIPHY1_DIR_TX , Ppc , XVIDC_BPC_8 ) ; } else { Status = XHdmiphy1_HdmiCfgCalcMmcmParam ( InstancePtr , QuadId , ChId , XHDMIPHY1_DIR_TX , Ppc , Bpc ) ; } } else { Status = ( XST_FAILURE ) ; } return Status ; }
This function update/set the HDMI TX parameter.
This function update / set the HDMI TX parameter .
/* Verify arguments. */ /* Only calculate the QPLL/CPLL parameters when the GT TX and RX are not
	 * coupled. */ /* Update SysClk and PLL Clk registers immediately. */ /* Is HDMITXSS PPC match with HDMIPHY PPC? */ /* HDMI 2.1 */ /* Calculate TXPLL parameters.
		 * In HDMI the colordepth in YUV422 is always 12 bits,
		 * although on the link itself it is being transmitted as
		 * 8-bits. Therefore if the colorspace is YUV422, then force the
		 * colordepth to 8 bits. */ /* Other colorspaces. */