lib/sw_apps/zynqmp_fsbl/src/xfsbl_bs.c
u32 XFsbl_WriteToPcap(u32 WrSize, u8 *WrAddr) {
	u32 RegVal;
	u32 Status;

	/*
	 * Setup the  SSS, setup the PCAP to receive from DMA source
	 */
	RegVal = XFsbl_In32(CSU_CSU_SSS_CFG) & CSU_CSU_SSS_CFG_PCAP_SSS_MASK;
	RegVal = RegVal
			| (XFSBL_CSU_SSS_SRC_SRC_DMA << CSU_CSU_SSS_CFG_PCAP_SSS_SHIFT);
	XFsbl_Out32(CSU_CSU_SSS_CFG, RegVal);

	/* Setup the source DMA channel */
	XCsuDma_Transfer(&CsuDma, XCSUDMA_SRC_CHANNEL, (PTRSIZE) WrAddr, WrSize, 0);

	/* wait for the SRC_DMA to complete and the pcap to be IDLE */
	XCsuDma_WaitForDone(&CsuDma, XCSUDMA_SRC_CHANNEL){}

	/* Acknowledge the transfer has completed */
	XCsuDma_IntrClear(&CsuDma, XCSUDMA_SRC_CHANNEL, XCSUDMA_IXR_DONE_MASK);

	XFsbl_Printf(DEBUG_INFO, "DMA transfer done \r\n");
	Status = XFsbl_PcapWaitForDone();
	if (Status != XFSBL_SUCCESS) {
		goto END;
	}

	END: return Status;
}
/*****************************************************************************/
/** This is the function to write data to PCAP interface
 *
 * @param	WrSize: Number of 32bit words that the DMA should write to
 *          the PCAP interface
 * @param   WrAddr: Linear memory space from where CSUDMA will read
 *	        the data to be written to PCAP interface
 *
 * @return	None
 *
 *****************************************************************************/
This is the function to write data to PCAP interface
@param       WrSize: Number of 32bit words that the DMA should write to
the PCAP interface
@param   WrAddr: Linear memory space from where CSUDMA will read
the data to be written to PCAP interface

@return      None
This is the function to write data to PCAP interface @param WrSize : Number of 32bit words that the DMA should write to the PCAP interface @param WrAddr : Linear memory space from where CSUDMA will read the data to be written to PCAP interface @return None
u32 XFsbl_WriteToPcap(u32 WrSize, u8 *WrAddr) {
	u32 RegVal;
	u32 Status;
	RegVal = XFsbl_In32(CSU_CSU_SSS_CFG) & CSU_CSU_SSS_CFG_PCAP_SSS_MASK;
	RegVal = RegVal
			| (XFSBL_CSU_SSS_SRC_SRC_DMA << CSU_CSU_SSS_CFG_PCAP_SSS_SHIFT);
	XFsbl_Out32(CSU_CSU_SSS_CFG, RegVal);
	XCsuDma_Transfer(&CsuDma, XCSUDMA_SRC_CHANNEL, (PTRSIZE) WrAddr, WrSize, 0);
	XCsuDma_WaitForDone(&CsuDma, XCSUDMA_SRC_CHANNEL){}
	XCsuDma_IntrClear(&CsuDma, XCSUDMA_SRC_CHANNEL, XCSUDMA_IXR_DONE_MASK);
	XFsbl_Printf(DEBUG_INFO, "DMA transfer done \r\n");
	Status = XFsbl_PcapWaitForDone();
	if (Status != XFSBL_SUCCESS) {
		goto END;
	}
	END: return Status;
}
u32 XFsbl_WriteToPcap ( u32 WrSize , u8 * WrAddr ) { u32 RegVal ; u32 Status ; RegVal = XFsbl_In32 ( CSU_CSU_SSS_CFG ) & CSU_CSU_SSS_CFG_PCAP_SSS_MASK ; RegVal = RegVal | ( XFSBL_CSU_SSS_SRC_SRC_DMA << CSU_CSU_SSS_CFG_PCAP_SSS_SHIFT ) ; XFsbl_Out32 ( CSU_CSU_SSS_CFG , RegVal ) ; XCsuDma_Transfer ( & CsuDma , XCSUDMA_SRC_CHANNEL , ( PTRSIZE ) WrAddr , WrSize , 0 ) ; XCsuDma_WaitForDone ( & CsuDma , XCSUDMA_SRC_CHANNEL ) { } XCsuDma_IntrClear ( & CsuDma , XCSUDMA_SRC_CHANNEL , XCSUDMA_IXR_DONE_MASK ) ; XFsbl_Printf ( DEBUG_INFO , " \r \n " ) ; Status = XFsbl_PcapWaitForDone ( ) ; if ( Status != XFSBL_SUCCESS ) { goto END ; } END : return Status ; }
This is the function to write data to PCAP interface
 @param       WrSize: Number of 32bit words that the DMA should write to
          the PCAP interface
 @param   WrAddr: Linear memory space from where CSUDMA will read
              the data to be written to PCAP interface
This is the function to write data to PCAP interface @param WrSize : Number of 32bit words that the DMA should write to the PCAP interface @param WrAddr : Linear memory space from where CSUDMA will read the data to be written to PCAP interface
/*
	 * Setup the  SSS, setup the PCAP to receive from DMA source
	 */ /* Setup the source DMA channel */ /* wait for the SRC_DMA to complete and the pcap to be IDLE */ /* Acknowledge the transfer has completed */