src/dpdk/drivers/net/txgbe/base/txgbe_phy.c
s32 txgbe_read_phy_reg_mdi(struct txgbe_hw *hw, u32 reg_addr, u32 device_type,
			   u16 *phy_data)
{
	u32 command, data;

	/* Setup and write the address cycle command */
	command = TXGBE_MDIOSCA_REG(reg_addr) |
		  TXGBE_MDIOSCA_DEV(device_type) |
		  TXGBE_MDIOSCA_PORT(hw->phy.addr);
	wr32(hw, TXGBE_MDIOSCA, command);

	command = TXGBE_MDIOSCD_CMD_READ |
		  TXGBE_MDIOSCD_BUSY;
	wr32(hw, TXGBE_MDIOSCD, command);

	/*
	 * Check every 10 usec to see if the address cycle completed.
	 * The MDI Command bit will clear when the operation is
	 * complete
	 */
	if (!po32m(hw, TXGBE_MDIOSCD, TXGBE_MDIOSCD_BUSY,
		0, NULL, 100, 100)) {
		DEBUGOUT("PHY address command did not complete\n");
		return TXGBE_ERR_PHY;
	}

	data = rd32(hw, TXGBE_MDIOSCD);
	*phy_data = (u16)TXGBD_MDIOSCD_DAT(data);

	return 0;
}
/**
 *  txgbe_read_phy_mdi - Reads a value from a specified PHY register without
 *  the SWFW lock
 *  @hw: pointer to hardware structure
 *  @reg_addr: 32 bit address of PHY register to read
 *  @device_type: 5 bit device type
 *  @phy_data: Pointer to read data from PHY register
 **/
Reads a value from a specified PHY register without
the SWFW lock
@hw: pointer to hardware structure
@reg_addr: 32 bit address of PHY register to read
@device_type: 5 bit device type
@phy_data: Pointer to read data from PHY register
Reads a value from a specified PHY register without the SWFW lock @hw : pointer to hardware structure @reg_addr : 32 bit address of PHY register to read @device_type : 5 bit device type @phy_data : Pointer to read data from PHY register
s32 txgbe_read_phy_reg_mdi(struct txgbe_hw *hw, u32 reg_addr, u32 device_type,
			   u16 *phy_data)
{
	u32 command, data;
	command = TXGBE_MDIOSCA_REG(reg_addr) |
		  TXGBE_MDIOSCA_DEV(device_type) |
		  TXGBE_MDIOSCA_PORT(hw->phy.addr);
	wr32(hw, TXGBE_MDIOSCA, command);
	command = TXGBE_MDIOSCD_CMD_READ |
		  TXGBE_MDIOSCD_BUSY;
	wr32(hw, TXGBE_MDIOSCD, command);
	if (!po32m(hw, TXGBE_MDIOSCD, TXGBE_MDIOSCD_BUSY,
		0, NULL, 100, 100)) {
		DEBUGOUT("PHY address command did not complete\n");
		return TXGBE_ERR_PHY;
	}
	data = rd32(hw, TXGBE_MDIOSCD);
	*phy_data = (u16)TXGBD_MDIOSCD_DAT(data);
	return 0;
}
s32 txgbe_read_phy_reg_mdi ( struct txgbe_hw * hw , u32 reg_addr , u32 device_type , u16 * phy_data ) { u32 command , data ; command = TXGBE_MDIOSCA_REG ( reg_addr ) | TXGBE_MDIOSCA_DEV ( device_type ) | TXGBE_MDIOSCA_PORT ( hw -> phy . addr ) ; wr32 ( hw , TXGBE_MDIOSCA , command ) ; command = TXGBE_MDIOSCD_CMD_READ | TXGBE_MDIOSCD_BUSY ; wr32 ( hw , TXGBE_MDIOSCD , command ) ; if ( ! po32m ( hw , TXGBE_MDIOSCD , TXGBE_MDIOSCD_BUSY , 0 , NULL , 100 , 100 ) ) { DEBUGOUT ( " \n " ) ; return TXGBE_ERR_PHY ; } data = rd32 ( hw , TXGBE_MDIOSCD ) ; * phy_data = ( u16 ) TXGBD_MDIOSCD_DAT ( data ) ; return 0 ; }
txgbe_read_phy_mdi - Reads a value from a specified PHY register without
  the SWFW lock
  @hw: pointer to hardware structure
  @reg_addr: 32 bit address of PHY register to read
  @device_type: 5 bit device type
  @phy_data: Pointer to read data from PHY register
txgbe_read_phy_mdi - Reads a value from a specified PHY register without the SWFW lock @hw : pointer to hardware structure @reg_addr : 32 bit address of PHY register to read @device_type : 5 bit device type @phy_data : Pointer to read data from PHY register
/* Setup and write the address cycle command */ /*
	 * Check every 10 usec to see if the address cycle completed.
	 * The MDI Command bit will clear when the operation is
	 * complete
	 */