if (VM.VerifyAssertions) VM.assert(!IfCmp.getCond(s).isUNSIGNED());
if (VM.VerifyAssertions) VM._assert(!IfCmp.getCond(s).isUNSIGNED());
  private static void long_ifcmp(OPT_Instruction s, OPT_IR ir) {    if (VM.VerifyAssertions) VM.assert(!IfCmp.getCond(s).isUNSIGNED());    OPT_BasicBlock BB1 = s.getBasicBlock();    OPT_BasicBlock BB3 = BB1.splitNodeAt(s, ir);    OPT_BasicBlock BB2 = BB1.createSubBlock(0, ir);    BB1.insertOut(BB2);    BB1.insertOut(BB3);    BB2.insertOut(BB3);    ir.cfg.linkInCodeOrder(BB1, BB2);    ir.cfg.linkInCodeOrder(BB2, BB3);    s.remove(); // s is in BB1, we'll mutate it and insert in BB3 below.    OPT_RegisterOperand cr = ir.regpool.makeTempCondition();    OPT_RegisterOperand val1 = (OPT_RegisterOperand)IfCmp.getClearVal1(s);    OPT_RegisterOperand val2 = (OPT_RegisterOperand)IfCmp.getClearVal2(s);    OPT_RegisterOperand lval1 = L(ir.regpool.getSecondReg(val1.register));    OPT_RegisterOperand lval2 = L(ir.regpool.getSecondReg(val2.register));    OPT_PowerPCConditionOperand cond =       new OPT_PowerPCConditionOperand(IfCmp.getCond(s));    BB1.appendInstruction(MIR_Binary.create(PPC_CMP, cr, val1, val2));    BB1.appendInstruction(MIR_CondBranch.create(PPC_BCOND, cr.copyD2U(),						OPT_PowerPCConditionOperand.NOT_EQUAL(),						BB3.makeJumpTarget(),						new OPT_BranchProfileOperand()));    BB2.appendInstruction(MIR_Binary.create(PPC_CMPL, cr.copyD2D(),					    lval1, lval2));    BB3.prependInstruction(MIR_CondBranch.mutate(s, PPC_BCOND, cr.copyD2U(),						 cond,						 IfCmp.getTarget(s),						 IfCmp.getBranchProfile(s)));  }