R(jtoc), MO_BD(R(regpool.getPhysicalRegisterSet().getPR()), VM_Entrypoints.jtocField.getOffset(), DW, null, null)));
new OPT_RegisterOperand(jtoc, VM_TypeReference.Int), MO_BD(new OPT_RegisterOperand(regpool.getPhysicalRegisterSet().getPR(), VM_TypeReference.Int), VM_Entrypoints.jtocField.getOffset(), DW, null, null)));
  protected final void FPR_2INT(OPT_Instruction s,                                OPT_RegisterOperand result,                                OPT_Operand value) {    OPT_MemoryOperand M;    // Step 1: Get value to be converted into myFP0    //         and in 'strict' IEEE mode.    if (value instanceof OPT_MemoryOperand) {      // value is in memory, all we have to do is load it      EMIT(MIR_Move.create(IA32_FLD, myFP0(), value));    } else {      // sigh.  value is an FP register. Unfortunately,      // SPECjbb requires some 'strict' FP semantics.  Naturally, we don't      // normally implement strict semantics, but we try to slide by in      // order to pass the benchmark.        // In order to pass SPECjbb, it turns out we need to enforce 'strict'      // semantics before doing a particular f2int conversion.  To do this      // we must have a store/load sequence to cause IEEE rounding.      if (value instanceof OPT_BURSManagedFPROperand) {        if (VM.VerifyAssertions) VM._assert(value.similar(myFP0()));        EMIT(MIR_Move.create(IA32_FSTP, MO_CONV(DW), value));        EMIT(MIR_Move.create(IA32_FLD, myFP0(), MO_CONV(DW)));      } else {        EMIT(MIR_Move.create(IA32_FMOV, MO_CONV(DW), value));        EMIT(MIR_Move.create(IA32_FLD, myFP0(), MO_CONV(DW)));      }    }    // FP Stack: myFP0 = value     EMIT(MIR_Move.create(IA32_FIST, MO_CONV(DW),  myFP0()));    // MO_CONV now holds myFP0 converted to an integer (round-toward nearest)    // FP Stack: myFP0 == value    // isPositive == 1 iff 0.0 < value    // isNegative == 1 iff 0.0 > value    OPT_Register one        = regpool.getInteger();    OPT_Register isPositive = regpool.getInteger();    OPT_Register isNegative = regpool.getInteger();    EMIT(MIR_Move.create(IA32_MOV, R(one), IC(1)));    EMIT(MIR_Move.create(IA32_MOV, R(isPositive), IC(0)));    EMIT(MIR_Move.create(IA32_MOV, R(isNegative), IC(0)));    EMIT(MIR_Nullary.create(IA32_FLDZ, myFP0()));    // FP Stack: myFP0 = 0.0; myFP1 = value     EMIT(MIR_Compare.create(IA32_FCOMIP, myFP0(), myFP1()));    // FP Stack: myFP0 = value    EMIT(MIR_CondMove.create(IA32_CMOV, R(isPositive), R(one),                                    OPT_IA32ConditionOperand.LLT()));    EMIT(MIR_CondMove.create(IA32_CMOV, R(isNegative), R(one),                                    OPT_IA32ConditionOperand.LGT()));    EMIT(MIR_Move.create(IA32_FILD, myFP0(), MO_CONV(DW)));    // FP Stack: myFP0 = round(value), myFP1 = value    // addee      = 1 iff round(x) < x    // subtractee = 1 iff round(x) > x    OPT_Register addee      = regpool.getInteger();    OPT_Register subtractee = regpool.getInteger();    EMIT(MIR_Compare.create(IA32_FCOMIP, myFP0(), myFP1()));    // FP Stack: myFP0 = value    EMIT(MIR_Move.create(IA32_MOV, R(addee) , IC(0)));    EMIT(MIR_Move.create(IA32_MOV, R(subtractee) , IC(0)));    EMIT(MIR_CondMove.create(IA32_CMOV, R(addee), R(one),                                    OPT_IA32ConditionOperand.LLT()));    EMIT(MIR_CondMove.create(IA32_CMOV, R(subtractee), R(one),                                    OPT_IA32ConditionOperand.LGT()));        // Now a little tricky part.    // We will add 1 iff isNegative and x > round(x)    // We will subtract 1 iff isPositive and x < round(x)    EMIT(MIR_BinaryAcc.create(IA32_AND, R(addee), R(isNegative)));    EMIT(MIR_BinaryAcc.create(IA32_AND, R(subtractee), R(isPositive)));    EMIT(MIR_Move.create(IA32_MOV, result.copy(), MO_CONV(DW)));    EMIT(MIR_BinaryAcc.create(IA32_ADD, result.copy(), R(addee)));    EMIT(MIR_BinaryAcc.create(IA32_SUB, result.copy(), R(subtractee)));    // Acquire the JTOC in a register    OPT_Register jtoc = null;    if (!burs.ir.options.FIXED_JTOC) {      jtoc = regpool.getInteger();      EMIT(MIR_Move.create(IA32_MOV,                                   R(jtoc),                                   MO_BD(R(regpool.getPhysicalRegisterSet().getPR()),                                        VM_Entrypoints.jtocField.getOffset(), DW, null, null)));    }    // Compare myFP0 with (double)Integer.MAX_VALUE    if (burs.ir.options.FIXED_JTOC) {      M = OPT_MemoryOperand.D(VM_Magic.getTocPointer().add(VM_Entrypoints.maxintField.getOffset()),                              QW, null, null);    } else {      M = OPT_MemoryOperand.BD(R(jtoc), VM_Entrypoints.maxintField.getOffset(), QW, null, null);    }    EMIT(MIR_Move.create(IA32_FLD, myFP0(), M));    // FP Stack: myFP0 = (double)Integer.MAX_VALUE; myFP1 = value    EMIT(MIR_Compare.create(IA32_FCOMIP, myFP0(), myFP1()));    // FP Stack: myFP0 = value    // If MAX_VALUE < value, then result := MAX_INT    OPT_Register maxInt = regpool.getInteger();    EMIT(MIR_Move.create(IA32_MOV, R(maxInt), IC(Integer.MAX_VALUE)));    EMIT(MIR_CondMove.create(IA32_CMOV, result.copy(), R(maxInt),                                     OPT_IA32ConditionOperand.LLT()));        // Compare myFP0 with (double)Integer.MIN_VALUE    if (burs.ir.options.FIXED_JTOC) {      M = OPT_MemoryOperand.D(VM_Magic.getTocPointer().add(VM_Entrypoints.minintField.getOffset()),                              QW, null, null);    } else {      M = OPT_MemoryOperand.BD(R(jtoc), VM_Entrypoints.minintField.getOffset(), QW, null, null);    }    EMIT(MIR_Move.create(IA32_FLD, myFP0(), M));    // FP Stack: myFP0 = (double)Integer.MIN_VALUE; myFP1 = value    EMIT(MIR_Compare.create(IA32_FCOMIP, myFP0(), myFP1()));    // FP Stack: myFP0 = value    // If MIN_VALUE > value, then result := MIN_INT    OPT_Register minInt = regpool.getInteger();    EMIT(MIR_Move.create(IA32_MOV, R(minInt), IC(Integer.MIN_VALUE)));    EMIT(MIR_CondMove.create(IA32_CMOV, result.copy(), R(minInt),                                     OPT_IA32ConditionOperand.LGT()));        // Set condition flags: set PE iff myFP0 is a NaN    EMIT(MIR_Compare.create(IA32_FCOMIP, myFP0(), myFP0()));    // FP Stack: back to original level (all BURS managed slots freed)    // If FP0 was classified as a NaN, then result := 0    OPT_Register zero = regpool.getInteger();    EMIT(MIR_Move.create(IA32_MOV, R(zero), IC(0)));    EMIT(MIR_CondMove.create(IA32_CMOV, result.copy(), R(zero),                                    OPT_IA32ConditionOperand.PE()));      }