default: if (VM.VerifyAssertions) VM.assert (false);
default: if (VM.VerifyAssertions) VM._assert (false);
  private static void threeValueCmp (OPT_Instruction s, OPT_IR ir) {    OPT_PowerPCConditionOperand      firstCond = OPT_PowerPCConditionOperand.LESS_EQUAL();;    int firstConst = 1;          switch (s.operator.opcode) {    case DOUBLE_CMPG_opcode:    case FLOAT_CMPG_opcode:      firstCond  = OPT_PowerPCConditionOperand.GREATER_EQUAL();      firstConst = -1;      break;    case DOUBLE_CMPL_opcode:    case FLOAT_CMPL_opcode:      break;    default: if (VM.VerifyAssertions) VM.assert (false);      break;    }    OPT_Register res = Binary.getClearResult(s).register;    OPT_RegisterOperand one = (OPT_RegisterOperand) Binary.getClearVal1(s);    OPT_RegisterOperand two = (OPT_RegisterOperand) Binary.getClearVal2(s);    res.setSpansBasicBlock();    OPT_BasicBlock BB1 = s.getBasicBlock();    OPT_BasicBlock BB6 = BB1.splitNodeAt(s, ir);    s = s.remove();    OPT_BasicBlock BB2 = BB1.createSubBlock(0, ir);    OPT_BasicBlock BB3 = BB1.createSubBlock(0, ir);    OPT_BasicBlock BB4 = BB1.createSubBlock(0, ir);    OPT_BasicBlock BB5 = BB1.createSubBlock(0, ir);    OPT_RegisterOperand t = ir.regpool.makeTempInt();    t.register.setCondition();    BB1.appendInstruction(MIR_Binary.create(PPC_FCMPU, t, one, two));    BB1.appendInstruction      (MIR_CondBranch.create(PPC_BCOND, t.copyD2U(), firstCond,			     BB3.makeJumpTarget(),			     new OPT_BranchProfileOperand(0.5f)));    BB2.appendInstruction(MIR_Unary.create(PPC_LDI, R(res), I(firstConst)));    BB2.appendInstruction(MIR_Branch.create(PPC_B, BB6.makeJumpTarget()));    BB3.appendInstruction      (MIR_CondBranch.create(PPC_BCOND, t.copyD2U(),			     OPT_PowerPCConditionOperand.EQUAL(),			     BB5.makeJumpTarget(),			     OPT_BranchProfileOperand.unlikely()));    BB4.appendInstruction(MIR_Unary.create(PPC_LDI, R(res), I(-firstConst)));    BB4.appendInstruction(MIR_Branch.create(PPC_B, BB6.makeJumpTarget()));    BB5.appendInstruction(MIR_Unary.create(PPC_LDI, R(res), I(0)));    // fix CFG    BB1.insertOut(BB2);    BB1.insertOut(BB3);    BB2.insertOut(BB6);    BB3.insertOut(BB4);    BB3.insertOut(BB5);    BB4.insertOut(BB6);    BB5.insertOut(BB6);    ir.cfg.linkInCodeOrder(BB1, BB2);    ir.cfg.linkInCodeOrder(BB2, BB3);    ir.cfg.linkInCodeOrder(BB3, BB4);    ir.cfg.linkInCodeOrder(BB4, BB5);    ir.cfg.linkInCodeOrder(BB5, BB6);  }