EMIT(MIR_BinaryAcc.create(IA32_OR, R(lowlhsReg), IC(low)));
EMIT(MIR_BinaryAcc.create(IA32_OR, new OPT_RegisterOperand(lowlhsReg, VM_TypeReference.Int), IC(low)));
  protected final void LONG_OR(OPT_Instruction s,                               OPT_RegisterOperand result,                               OPT_Operand value) {    OPT_Register lhsReg = result.register;    OPT_Register lowlhsReg = regpool.getSecondReg(lhsReg);    if (value instanceof OPT_RegisterOperand) {      OPT_Register rhsReg = ((OPT_RegisterOperand)value).register;      OPT_Register lowrhsReg = regpool.getSecondReg(rhsReg);      EMIT(MIR_BinaryAcc.create(IA32_OR, R(lowlhsReg), R(lowrhsReg)));      EMIT(MIR_BinaryAcc.mutate(s, IA32_OR, R(lhsReg), R(rhsReg)));    } else {      OPT_LongConstantOperand rhs = (OPT_LongConstantOperand)value;      int low = rhs.lower32();      int high = rhs.upper32();      if (low == 0) { // x |= 0 ==> x = x ==> nop      } else if (low == -1) { // x |= 0xffffffff ==> x = 0xffffffff        EMIT(MIR_Move.create(IA32_MOV, R(lowlhsReg), IC(-1)));      } else {        EMIT(MIR_BinaryAcc.create(IA32_OR, R(lowlhsReg), IC(low)));      }      if (high == 0) { // x |= 0 ==> x = x ==> nop      } else if (high == -1) { // x |= 0xffffffff ==> x = 0xffffffff        EMIT(MIR_Move.create(IA32_MOV, R(lhsReg), IC(-1)));      } else {        EMIT(MIR_BinaryAcc.create(IA32_OR, R(lhsReg), IC(high)));      }    }     }