EMIT(MIR_BinaryAcc.create(IA32_ADD, R(lhsReg), R(lowlhsReg)));
EMIT(MIR_BinaryAcc.create(IA32_ADD, new OPT_RegisterOperand(lhsReg, VM_TypeReference.Int), new OPT_RegisterOperand(lowlhsReg, VM_TypeReference.Int)));
  protected final void LONG_MUL(OPT_Instruction s,                                OPT_RegisterOperand result,                                OPT_Operand value) {    // In general, (a,b) * (c,d) = (l(a imul d)+l(b imul c)+u(b mul d), l(b mul d))    OPT_Register lhsReg = result.register;    OPT_Register lowlhsReg = regpool.getSecondReg(lhsReg);    if (value instanceof OPT_RegisterOperand) {      OPT_Register rhsReg = ((OPT_RegisterOperand)value).register;      OPT_Register lowrhsReg = regpool.getSecondReg(rhsReg);      OPT_Register tmp = regpool.getInteger();      EMIT(MIR_BinaryAcc.create(IA32_IMUL2, R(lhsReg), R(lowrhsReg)));      EMIT(MIR_Move.create(IA32_MOV, R(tmp), R(rhsReg)));      EMIT(MIR_BinaryAcc.create(IA32_IMUL2, R(tmp), R(lowlhsReg)));      EMIT(MIR_BinaryAcc.create(IA32_ADD, R(lhsReg), R(tmp)));      EMIT(MIR_Move.create(IA32_MOV, R(getEAX()), R(lowlhsReg)));      EMIT(MIR_Multiply.create(IA32_MUL, R(getEDX()), R(getEAX()), R(lowrhsReg)));      EMIT(MIR_Move.create(IA32_MOV, R(lowlhsReg), R(getEAX())));      EMIT(MIR_BinaryAcc.create(IA32_ADD, R(lhsReg), R(getEDX())));    } else {      OPT_LongConstantOperand rhs = (OPT_LongConstantOperand)value;      int low = rhs.lower32();      int high = rhs.upper32();      // We only have to handle those cases that OPT_Simplifier wouldn't get.        // OPT_Simplifier catches       // high   low      //    0     0  (0L)      //    0     1  (1L)      //   -1    -1 (-1L)      // So, the possible cases we need to handle here:      //   -1     0       //   -1     1      //   -1     *      //    0    -1      //    0     *      //    1    -1      //    1     0       //    1     1      //    1     *      //    *    -1      //    *     0      //    *     1      //    *     *      // (where * is something other than -1,0,1)      if (high == -1) {        if (low == 0) {          // -1, 0          // CLAIM: (x,y) * (-1,0) = (-y,0)          EMIT(MIR_Move.create(IA32_MOV, R(lhsReg), R(lowlhsReg)));          EMIT(MIR_UnaryAcc.create(IA32_NEG, R(lhsReg)));          EMIT(MIR_Move.create(IA32_MOV, R(lowlhsReg), IC(0)));        } else if (low == 1) {          // -1, 1          // CLAIM: (x,y) * (-1,1) = (x-y,y)          EMIT(MIR_BinaryAcc.create(IA32_SUB, R(lhsReg), R(lowlhsReg)));        } else {          // -1, *          // CLAIM: (x,y) * (-1, z) = (l(x imul z)-y+u(y mul z)+, l(y mul z))          EMIT(MIR_BinaryAcc.create(IA32_IMUL2, R(lhsReg), IC(low)));          EMIT(MIR_BinaryAcc.create(IA32_SUB, R(lhsReg), R(lowlhsReg)));          EMIT(MIR_Move.create(IA32_MOV, R(getEAX()), IC(low)));          EMIT(MIR_Multiply.create(IA32_MUL, R(getEDX()), R(getEAX()), R(lowlhsReg)));          EMIT(MIR_Move.create(IA32_MOV, R(lowlhsReg), R(getEAX())));          EMIT(MIR_BinaryAcc.create(IA32_ADD, R(lhsReg), R(getEDX())));        }      } else if (high == 0) {        if (low == -1) {          // 0, -1          // CLAIM: (x,y) * (0,-1) = (u(y mul -1)-x, l(y mul -1))          EMIT(MIR_Move.create(IA32_MOV, R(getEAX()), IC(-1)));          EMIT(MIR_Multiply.create(IA32_MUL, R(getEDX()), R(getEAX()), R(lowlhsReg)));          EMIT(MIR_Move.create(IA32_MOV, R(lowlhsReg), R(getEAX())));          EMIT(MIR_BinaryAcc.create(IA32_SUB, R(getEDX()), R(lhsReg)));          EMIT(MIR_Move.create(IA32_MOV, R(lhsReg), R(getEDX())));        } else {          // 0, *          // CLAIM: (x,y) * (0,z) = (l(x imul z)+u(y mul z), l(y mul z))          EMIT(MIR_BinaryAcc.create(IA32_IMUL2, R(lhsReg), IC(low)));          EMIT(MIR_Move.create(IA32_MOV, R(getEAX()), IC(low)));          EMIT(MIR_Multiply.create(IA32_MUL, R(getEDX()), R(getEAX()), R(lowlhsReg)));          EMIT(MIR_Move.create(IA32_MOV, R(lowlhsReg), R(getEAX())));          EMIT(MIR_BinaryAcc.create(IA32_ADD, R(lhsReg), R(getEDX())));        }      } else if (high == 1) {        if (low == -1) {          // 1, -1          // CLAIM: (x,y) * (1,-1) = (-x+y+u(y mul -1), l(y mul -1))          EMIT(MIR_UnaryAcc.create(IA32_NEG, R(lhsReg)));          EMIT(MIR_BinaryAcc.create(IA32_ADD, R(lhsReg), R(lowlhsReg)));          EMIT(MIR_Move.create(IA32_MOV, R(getEAX()), IC(-1)));          EMIT(MIR_Multiply.create(IA32_MUL, R(getEDX()), R(getEAX()), R(lowlhsReg)));          EMIT(MIR_Move.create(IA32_MOV, R(lowlhsReg), R(getEAX())));          EMIT(MIR_BinaryAcc.create(IA32_ADD, R(lhsReg), R(getEDX())));        } else if (low == 0) {          // 1, 0           // CLAIM: (x,y) * (1,0) = (y,0)          EMIT(MIR_Move.create(IA32_MOV, R(lhsReg), R(lowlhsReg)));          EMIT(MIR_Move.create(IA32_MOV, R(lowlhsReg), IC(0)));        } else if (low == 1) {          // 1, 1          // CLAIM: (x,y) * (1,1)  = (x+y,y)          EMIT(MIR_BinaryAcc.create(IA32_ADD, R(lhsReg), R(lowlhsReg)));        } else {          // 1, *          // CLAIM: (x,y) * (1,z) = (l(x imul z)+y+u(y mul z), l(y mul z))          EMIT(MIR_BinaryAcc.create(IA32_IMUL2, R(lhsReg), IC(low)));          EMIT(MIR_BinaryAcc.create(IA32_ADD, R(lhsReg), R(lowlhsReg)));          EMIT(MIR_Move.create(IA32_MOV, R(getEAX()), IC(low)));          EMIT(MIR_Multiply.create(IA32_MUL, R(getEDX()), R(getEAX()), R(lowlhsReg)));          EMIT(MIR_Move.create(IA32_MOV, R(lowlhsReg), R(getEAX())));          EMIT(MIR_BinaryAcc.create(IA32_ADD, R(lhsReg), R(getEDX())));        }      } else {        if (low == -1) {          // *, -1          // CLAIM: (x,y) * (z,-1) = (-x+l(y imul z)+u(y mul -1), l(y mul -1))          OPT_Register tmp = regpool.getInteger();          EMIT(MIR_UnaryAcc.create(IA32_NEG, R(lhsReg)));          EMIT(MIR_Move.create(IA32_MOV, R(tmp), IC(high)));          EMIT(MIR_BinaryAcc.create(IA32_IMUL2, R(tmp), R(lowlhsReg)));          EMIT(MIR_BinaryAcc.create(IA32_ADD, R(lhsReg), R(tmp)));          EMIT(MIR_Move.create(IA32_MOV, R(getEAX()), IC(low)));          EMIT(MIR_Multiply.create(IA32_MUL, R(getEDX()), R(getEAX()), R(lowlhsReg)));          EMIT(MIR_Move.create(IA32_MOV, R(lowlhsReg), R(getEAX())));          EMIT(MIR_BinaryAcc.create(IA32_ADD, R(lhsReg), R(getEDX())));        } else if (low == 0) {          // *,  0          // CLAIM: (x,y) * (z,0) = (l(y imul z),0)          EMIT(MIR_Move.create(IA32_MOV, R(lhsReg), IC(high)));          EMIT(MIR_BinaryAcc.create(IA32_IMUL2, R(lhsReg), R(lowlhsReg)));          EMIT(MIR_Move.create(IA32_MOV, R(lowlhsReg), IC(0)));        } else if (low == 1) {          // *, 1          // CLAIM: (x,y) * (z,1) = (l(y imul z)+x,y)             OPT_Register tmp = regpool.getInteger();          EMIT(MIR_Move.create(IA32_MOV, R(tmp), R(lowlhsReg)));          EMIT(MIR_BinaryAcc.create(IA32_IMUL2, R(tmp), IC(high)));          EMIT(MIR_Move.create(IA32_ADD, R(lhsReg), R(tmp)));        } else {          // *, * (sigh, can't do anything interesting...)          OPT_Register tmp = regpool.getInteger();          EMIT(MIR_BinaryAcc.create(IA32_IMUL2, R(lhsReg), IC(low)));          EMIT(MIR_Move.create(IA32_MOV, R(tmp), IC(high)));          EMIT(MIR_BinaryAcc.create(IA32_IMUL2, R(tmp), R(lowlhsReg)));          EMIT(MIR_BinaryAcc.create(IA32_ADD, R(lhsReg), R(tmp)));          EMIT(MIR_Move.create(IA32_MOV, R(getEAX()), IC(low)));          EMIT(MIR_Multiply.create(IA32_MUL, R(getEDX()), R(getEAX()), R(lowlhsReg)));          EMIT(MIR_Move.create(IA32_MOV, R(lowlhsReg), R(getEAX())));          EMIT(MIR_BinaryAcc.create(IA32_ADD, R(lhsReg), R(getEDX())));        }      }    }  }