if (VM.VerifyAssertions) VM.assert(!cond.isUNSIGNED());
if (VM.VerifyAssertions) VM._assert(!cond.isUNSIGNED());
  void CMP_ZERO_AND_MASK(OPT_BURS burs, OPT_Instruction s, 			 OPT_RegisterOperand def, 			 OPT_RegisterOperand left, 			 OPT_IntConstantOperand Mask,			 OPT_ConditionOperand cond) {    if (VM.VerifyAssertions) VM.assert(!cond.isUNSIGNED());    int mask = Mask.value;    if (mask < 0) {      mask = ~mask;      int MB = MaskBegin(mask);      int ME = MaskEnd(mask);      burs.append(MIR_RotateAndMask.create(PPC_RLWINMr, def, left, I(0), 					   I((ME + 1) & 0x1f), I(MB - 1)));    } else {      int MB = MaskBegin(mask);      int ME = MaskEnd(mask);      burs.append(MIR_RotateAndMask.create(PPC_RLWINMr, def, left, I(0), 					   I(MB), I(ME)));    }    burs.append(MIR_CondBranch.mutate(s, PPC_BCOND, CR(0), 				      new OPT_PowerPCConditionOperand(cond), 				      IfCmp.getTarget(s),				      IfCmp.getBranchProfile(s)));  }