if(((false_const - true_const) > 0) && ((false_const - true_const) <= 0xFF)) {
if ((true_const - false_const) == 1){  EMIT(CPOS(s, MIR_Unary.create(IA32_MOVZX__B, result.copyRO(), result.copyRO()))); EMIT(MIR_BinaryAcc.mutate(s, IA32_ADD, result, IC(false_const))); }  else if ((false_const - true_const) == 1){  EMIT(CPOS(s, MIR_Unary.create(IA32_MOVZX__B, result.copyRO(), result.copyRO()))); EMIT(CPOS(s,MIR_UnaryAcc.create(IA32_NEG, result.copyRO()))); EMIT(MIR_BinaryAcc.mutate(s, IA32_ADD, result, IC(false_const))); }  else if(((false_const - true_const) > 0) && ((false_const - true_const) <= 0xFF)) {
  protected final void CMOV_MOV(OPT_Instruction s,                                OPT_RegisterOperand result,                                OPT_ConditionOperand cond,                                OPT_Operand trueValue,                                OPT_Operand falseValue) {    if (result.similar(trueValue)) {      // in this case, only need a conditional move for the false branch.      EMIT(MIR_CondMove.mutate(s, IA32_CMOV, result,                                      asReg(s, IA32_MOV, falseValue),                                      COND(cond.flipCode())));    } else if (result.similar(falseValue)) {      // in this case, only need a conditional move for the true branch.      EMIT(MIR_CondMove.mutate(s, IA32_CMOV, result,                                       asReg(s, IA32_MOV, trueValue),                                      COND(cond)));    } else {      // need to handle both possible assignments. Unconditionally      // assign one value then conditionally assign the other.      if (falseValue.isRegister()) {        EMIT(CPOS(s,MIR_Move.create(IA32_MOV, result, trueValue)));        EMIT(MIR_CondMove.mutate(s, IA32_CMOV, result.copyRO(),                                         falseValue,                                        COND(cond.flipCode())));      } else {		  if (trueValue.isRegister()) {			 EMIT(CPOS(s,MIR_Move.create(IA32_MOV, result, falseValue)));			 EMIT(MIR_CondMove.mutate(s, IA32_CMOV, result.copyRO(), 											  trueValue,											  COND(cond)));		  }		  else {			 // Perform constant move without creating a register (costs			 // 1 or 2 more instructions but saves a register)			 int true_const  = ((OPT_IntConstantOperand)trueValue).value;			 int false_const = ((OPT_IntConstantOperand)falseValue).value;			 // Generate values for consts trying to avoid zero extending the set__b result			 // result = cond ? 1 : 0			 EMIT(CPOS(s,MIR_Set.create(IA32_SET__B, result.copyRO(), COND(cond))));			 if(((false_const - true_const) > 0) && ((false_const - true_const) <= 0xFF)) {				// result = cond ? 0 : -1				// result = (cond ? 0 : -1) & (false_const - true__const)				// result = ((cond ? 0 : -1) & (false_const - true_const)) + true_const				EMIT(CPOS(s,MIR_BinaryAcc.create(IA32_SUB, result.copyRO(), IC(1))));				EMIT(CPOS(s,MIR_BinaryAcc.create(IA32_AND, result.copyRO(), IC(false_const - true_const))));				EMIT(MIR_BinaryAcc.mutate(s, IA32_ADD, result, IC(true_const)));			 }			 else {				// result = cond ? -1 : 0				// result = (cond ? -1 : 0) & (true_const - false_const)				// result = ((cond ? -1 : 0) & (true_const - false_const)) + false_const				if(((true_const - false_const) > 0xFF) || ((true_const - false_const) < 0)) {				  EMIT(CPOS(s,MIR_Unary.create(IA32_MOVZX__B, result.copyRO(), result.copyRO())));				}				EMIT(CPOS(s,MIR_UnaryAcc.create(IA32_NEG, result.copyRO())));				EMIT(CPOS(s,MIR_BinaryAcc.create(IA32_AND, result.copyRO(), IC(true_const - false_const))));				EMIT(MIR_BinaryAcc.mutate(s, IA32_ADD, result, IC(false_const)));			 }		  }      }    }  }