case TRAP_opcode:
  private void verifyInstructions(String where) {    Enumeration bbEnum = cfg.nodes();	 while(bbEnum.hasMoreElements()) {      OPT_BasicBlock block = (OPT_BasicBlock) bbEnum.nextElement();		OPT_IREnumeration.AllInstructionsEnum instructions = new OPT_IREnumeration.AllInstructionsEnum(this, block);		boolean startingInstructionsPassed = false;		while (instructions.hasMoreElements()) {		  OPT_Instruction instruction = instructions.next();		  // Perform (1) and (3)		  OPT_IREnumeration.AllUsesEnum useOperands = new OPT_IREnumeration.AllUsesEnum(this, instruction);		  while (useOperands.hasMoreElements()) {			 OPT_Operand use = useOperands.next();			 if(use.instruction != instruction) {				verror(where, "In block " + block + " for instruction " + instruction +						 " the back link in the use of operand " + use +						 " is invalid and references " + use.instruction);			 }			 if((IRStage >= MIR) && (use.isRegister()) && (use.asRegister().register.isValidation())) {				verror(where, "In block " + block + " for instruction " + instruction +						 " the use operand " + use + " is invalid as it is a validation register and this IR is in MIR form");			 }		  }		  OPT_IREnumeration.AllDefsEnum defOperands = new OPT_IREnumeration.AllDefsEnum(this, instruction);		  while (defOperands.hasMoreElements()) {			 OPT_Operand def = defOperands.next();			 if(def.instruction != instruction) {				verror(where, "In block " + block + " for instruction " + instruction +						 " the back link in the def of operand " + def +						 " is invalid and references " + def.instruction);			 }			 if((IRStage >= MIR) && (def.isRegister()) && (def.asRegister().register.isValidation())) {				verror(where, "In block " + block + " for instruction " + instruction +						 " the def operand " + def + " is invalid as it is a validation register and this IR is in MIR form");			 }		  }		  // Perform (2)		  // test for starting instructions		  if(startingInstructionsPassed == false) {			 if(Label.conforms(instruction)) {				continue;			 }			 if(Phi.conforms(instruction)) {				if((!inSSAForm())&&(!inSSAFormAwaitingReEntry())){				  verror(where, "Phi node encountered but SSA not computed");				}				continue;			 }			 startingInstructionsPassed = true;		  }		  // main instruction location test		  switch(instruction.operator().opcode) {			 // Label and phi nodes must be at the start of a BB		  case PHI_opcode:		  case LABEL_opcode:			 verror(where, "Unexpected instruction in the middle of a basic block " + instruction);			 // BBend, Goto, IfCmp, TableSwitch, Return, Trap and Athrow			 // must all appear at the end of a basic block		  case INT_IFCMP_opcode:		  case INT_IFCMP2_opcode:		  case LONG_IFCMP_opcode:		  case FLOAT_IFCMP_opcode:		  case DOUBLE_IFCMP_opcode:		  case REF_IFCMP_opcode:			 instruction = instructions.next();			 if((Goto.conforms(instruction) == false) &&				 (BBend.conforms(instruction) == false) &&				 (MIR_Branch.conforms(instruction) == false)				 ) {				verror(where, "Unexpected instruction after IFCMP " + instruction);			 }			 if(Goto.conforms(instruction)||				 MIR_Branch.conforms(instruction)				 ) {				instruction = instructions.next();				if(BBend.conforms(instruction) == false) {				  verror(where, "Unexpected instruction after GOTO/MIR_BRANCH " + instruction);				}			 }			 if(instructions.hasMoreElements()) {				verror(where, "Unexpected instructions after BBEND " + instructions.next());			 }			 break;		  case TABLESWITCH_opcode:		  case LOOKUPSWITCH_opcode:		  case ATHROW_opcode:		  case RETURN_opcode:		  case TRAP_opcode:		  case GOTO_opcode:			 OPT_Instruction next = instructions.next();			 if(BBend.conforms(next) == false) {				verror(where, "Unexpected instruction after " + instruction + "\n" + next);			 }			 if(instructions.hasMoreElements()) {				verror(where, "Unexpected instructions after BBEND " + instructions.next());			 }			 break;		  case BBEND_opcode:			 if(instructions.hasMoreElements()) {				verror(where, "Unexpected instructions after BBEND " + instructions.next());			 }			 break;		  default:		  }		}    }  }