data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v
1: b'%Error: data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v:17: Cannot find include file: defines.v\n`include "defines.v" \n         ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/502764644/mpeg_audio_video/backend,data/full_repos/permissive/502764644/defines.v\n             data/full_repos/permissive/502764644/mpeg_audio_video/backend,data/full_repos/permissive/502764644/defines.v.v\n             data/full_repos/permissive/502764644/mpeg_audio_video/backend,data/full_repos/permissive/502764644/defines.v.sv\n             defines.v\n             defines.v.v\n             defines.v.sv\n             obj_dir/defines.v\n             obj_dir/defines.v.v\n             obj_dir/defines.v.sv\n%Error: data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v:42: Define or directive not defined: \'`H_TOTAL\'\n else if (column_count == (`H_TOTAL - 1)) column_count <= 11\'h000;\n                           ^~~~~~~~\n%Error: data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v:49: Define or directive not defined: \'`H_ACTIVE\'\n else if (column_count == (`H_ACTIVE + `H_FRONT_PORCH - 1)) h_synch <= 1\'b1;\n                           ^~~~~~~~~\n%Error: data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v:49: Define or directive not defined: \'`H_FRONT_PORCH\'\n else if (column_count == (`H_ACTIVE + `H_FRONT_PORCH - 1)) h_synch <= 1\'b1;\n                                       ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v:50: Define or directive not defined: \'`H_TOTAL\'\n else if (column_count == (`H_TOTAL - `H_BACK_PORCH - 1)) h_synch <= 1\'b0;\n                           ^~~~~~~~\n%Error: data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v:50: Define or directive not defined: \'`H_BACK_PORCH\'\n else if (column_count == (`H_TOTAL - `H_BACK_PORCH - 1)) h_synch <= 1\'b0;\n                                      ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v:56: Define or directive not defined: \'`V_TOTAL\'\n else if ((row_count == (`V_TOTAL - 1))&& (column_count == (`H_TOTAL - 1))) row_count <= 10\'h000;\n                         ^~~~~~~~\n%Error: data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v:56: Define or directive not defined: \'`H_TOTAL\'\n else if ((row_count == (`V_TOTAL - 1))&& (column_count == (`H_TOTAL - 1))) row_count <= 10\'h000;\n                                                            ^~~~~~~~\n%Error: data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v:57: Define or directive not defined: \'`H_TOTAL\'\n else if ((column_count == (`H_TOTAL - 1))) row_count <= row_count + 1;\n                            ^~~~~~~~\n%Error: data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v:63: Define or directive not defined: \'`V_ACTIVE\'\n else if ((row_count == (`V_ACTIVE + `V_FRONT_PORCH - 1) && (column_count == `H_TOTAL - 1))) v_synch = 1\'b1;\n                         ^~~~~~~~~\n%Error: data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v:63: Define or directive not defined: \'`V_FRONT_PORCH\'\n else if ((row_count == (`V_ACTIVE + `V_FRONT_PORCH - 1) && (column_count == `H_TOTAL - 1))) v_synch = 1\'b1;\n                                     ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v:63: Define or directive not defined: \'`H_TOTAL\'\n else if ((row_count == (`V_ACTIVE + `V_FRONT_PORCH - 1) && (column_count == `H_TOTAL - 1))) v_synch = 1\'b1;\n                                                                             ^~~~~~~~\n%Error: data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v:64: Define or directive not defined: \'`V_TOTAL\'\n else if ((row_count == (`V_TOTAL - `V_BACK_PORCH - 1)) && (column_count == (`H_TOTAL - 1))) v_synch = 1\'b0;\n                         ^~~~~~~~\n%Error: data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v:64: Define or directive not defined: \'`V_BACK_PORCH\'\n else if ((row_count == (`V_TOTAL - `V_BACK_PORCH - 1)) && (column_count == (`H_TOTAL - 1))) v_synch = 1\'b0;\n                                    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/502764644/mpeg_audio_video/backend/SVGA_TIMING.v:64: Define or directive not defined: \'`H_TOTAL\'\n else if ((row_count == (`V_TOTAL - `V_BACK_PORCH - 1)) && (column_count == (`H_TOTAL - 1))) v_synch = 1\'b0;\n                                                                             ^~~~~~~~\n%Error: Exiting due to 15 error(s)\n'
module SVGA_TIMING (
	resetn,
	video_clock,
	h_synch,
	v_synch,
	column_count,
	row_count
);

input 				resetn;
input 				video_clock;
output 				h_synch;
output 				v_synch;
output	[10:0]	column_count;
output	[9:0]		row_count;

reg 	[10:0]	column_count;
reg 	[9:0]		row_count;
reg				h_synch;
reg				v_synch;


always @ (posedge video_clock or negedge resetn) begin
	if (~resetn) column_count <= 11'h000;
	else if (column_count == (`H_TOTAL - 1)) column_count <= 11'h000;
	else column_count <= column_count + 1;
end


always @ (posedge video_clock or negedge resetn) begin
	if (~resetn) h_synch <= 1'b0;
	else if (column_count == (`H_ACTIVE + `H_FRONT_PORCH - 1)) h_synch <= 1'b1;
	else if (column_count == (`H_TOTAL - `H_BACK_PORCH - 1)) h_synch <= 1'b0;
end


always @ (posedge video_clock or negedge resetn) begin
	if (~resetn) row_count <= 10'h000;
	else if ((row_count == (`V_TOTAL - 1))&& (column_count == (`H_TOTAL - 1))) row_count <= 10'h000;
	else if ((column_count == (`H_TOTAL - 1))) row_count <= row_count + 1;
end


always @ (posedge video_clock or negedge resetn) begin
	if (~resetn) v_synch = 1'b0;
	else if ((row_count == (`V_ACTIVE + `V_FRONT_PORCH - 1) && (column_count == `H_TOTAL - 1))) v_synch = 1'b1;
	else if ((row_count == (`V_TOTAL - `V_BACK_PORCH - 1)) && (column_count == (`H_TOTAL - 1))) v_synch = 1'b0;
end

endmodule
module SVGA_TIMING (
	resetn,
	video_clock,
	h_synch,
	v_synch,
	column_count,
	row_count
);


input 				resetn;
input 				video_clock;
output 				h_synch;
output 				v_synch;
output	[10:0]	column_count;
output	[9:0]		row_count;

reg 	[10:0]	column_count;
reg 	[9:0]		row_count;
reg				h_synch;
reg				v_synch;


always @ (posedge video_clock or negedge resetn) begin
	if (~resetn) column_count <= 11'h000;
	else if (column_count == (`H_TOTAL - 1)) column_count <= 11'h000;
	else column_count <= column_count + 1;
end


always @ (posedge video_clock or negedge resetn) begin
	if (~resetn) h_synch <= 1'b0;
	else if (column_count == (`H_ACTIVE + `H_FRONT_PORCH - 1)) h_synch <= 1'b1;
	else if (column_count == (`H_TOTAL - `H_BACK_PORCH - 1)) h_synch <= 1'b0;
end


always @ (posedge video_clock or negedge resetn) begin
	if (~resetn) row_count <= 10'h000;
	else if ((row_count == (`V_TOTAL - 1))&& (column_count == (`H_TOTAL - 1))) row_count <= 10'h000;
	else if ((column_count == (`H_TOTAL - 1))) row_count <= row_count + 1;
end


always @ (posedge video_clock or negedge resetn) begin
	if (~resetn) v_synch = 1'b0;
	else if ((row_count == (`V_ACTIVE + `V_FRONT_PORCH - 1) && (column_count == `H_TOTAL - 1))) v_synch = 1'b1;
	else if ((row_count == (`V_TOTAL - `V_BACK_PORCH - 1)) && (column_count == (`H_TOTAL - 1))) v_synch = 1'b0;
end

endmodule