data/full_repos/permissive/405799749/arithmetic_netlists/muliplier/Booth algorithm array multiplier/booth_array_4bit.v
1: b'%Error: Cannot find file containing module: algorithm\n        ... Looked in:\n             data/full_repos/permissive/405799749/arithmetic_netlists/muliplier/Booth/algorithm\n             data/full_repos/permissive/405799749/arithmetic_netlists/muliplier/Booth/algorithm.v\n             data/full_repos/permissive/405799749/arithmetic_netlists/muliplier/Booth/algorithm.sv\n             algorithm\n             algorithm.v\n             algorithm.sv\n             obj_dir/algorithm\n             obj_dir/algorithm.v\n             obj_dir/algorithm.sv\n%Error: Cannot find file containing module: array\n%Error: Cannot find file containing module: multiplier,data/full_repos/permissive/405799749\n%Error: Cannot find file containing module: data/full_repos/permissive/405799749/arithmetic_netlists/muliplier/Booth\n%Error: Cannot find file containing module: multiplier/booth_array_4bit.v\n%Error: Exiting due to 5 error(s)\n'
module tb_booth_array_4bit();
	reg signed [3:0] a,b;
	wire signed [7:0] prod;
	booth_array_4bit uut(.prod(prod),.a(a),.b(b));

	initial
	begin
	#20 a = 4'd3; b = 4'd5;
	#20 a = -4'd3; b = 4'd3;
	#20 a = -4'd3; b = -4'd7;
	#20 a = 4'd6; b = -4'd7;
	#20 a = 4'd0; b = 4'd2;
	#20 a = 4'd0; b = 4'd0;
	#20 a = -4'd4; b = 4'd1;
	#20 $stop;
	end
	
	initial
	begin
		$monitor("time=%3d, a=%4d, b=%4d, prod=%8d",$time,a,b,prod);
	end
	
	initial
	begin
	$dumpfile("booth_array_4bit.vcd");
	$dumpvars;
	end
	
endmodule
module tb_booth_array_4bit();

	reg signed [3:0] a,b;
	wire signed [7:0] prod;
	booth_array_4bit uut(.prod(prod),.a(a),.b(b));

	initial
	begin
	#20 a = 4'd3; b = 4'd5;
	#20 a = -4'd3; b = 4'd3;
	#20 a = -4'd3; b = -4'd7;
	#20 a = 4'd6; b = -4'd7;
	#20 a = 4'd0; b = 4'd2;
	#20 a = 4'd0; b = 4'd0;
	#20 a = -4'd4; b = 4'd1;
	#20 $stop;
	end
	
	initial
	begin
		$monitor("time=%3d, a=%4d, b=%4d, prod=%8d",$time,a,b,prod);
	end
	
	initial
	begin
	$dumpfile("booth_array_4bit.vcd");
	$dumpvars;
	end
	
endmodule