data/full_repos/permissive/458737381/src/verilog-parser/tests/efc_tck.v
1: b'%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/efc_tck.v:26: Cannot find include file: sys.h\n`include "sys.h" \n         ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/sys.h\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/sys.h.v\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/sys.h.sv\n             sys.h\n             sys.h.v\n             sys.h.sv\n             obj_dir/sys.h\n             obj_dir/sys.h.v\n             obj_dir/sys.h.sv\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/efc_tck.v:27: Cannot find include file: iop.h\n`include "iop.h" \n         ^~~~~~~\n%Error: Exiting due to 2 error(s)\n'
module efc_tck (

   tck_shft_data_ff, efc_ctu_data_out, 

   read_data_ff, ctu_efc_data_in, ctu_efc_shiftdr, ctu_efc_capturedr, 
   tck
   );




output [31:0]   tck_shft_data_ff;
input  [31:0]   read_data_ff;
input           ctu_efc_data_in;
output          efc_ctu_data_out;
input           ctu_efc_shiftdr;
input           ctu_efc_capturedr;
input           tck;








wire [31:0]	tck_shft_data_nxt;
wire [31:0]	tck_shft_data_ff;



assign tck_shft_data_nxt 
	      = ctu_efc_capturedr ? read_data_ff
	       : ctu_efc_shiftdr ? {tck_shft_data_ff[30:0], ctu_efc_data_in}
	       : tck_shft_data_ff;

dff_ns #(32) tck_shft_data_reg (.din(tck_shft_data_nxt ),
		   .q(tck_shft_data_ff ), .clk(tck));

assign       efc_ctu_data_out = tck_shft_data_ff[31];

endmodule
module efc_tck (

   tck_shft_data_ff, efc_ctu_data_out, 

   read_data_ff, ctu_efc_data_in, ctu_efc_shiftdr, ctu_efc_capturedr, 
   tck
   );





output [31:0]   tck_shft_data_ff;
input  [31:0]   read_data_ff;
input           ctu_efc_data_in;
output          efc_ctu_data_out;
input           ctu_efc_shiftdr;
input           ctu_efc_capturedr;
input           tck;








wire [31:0]	tck_shft_data_nxt;
wire [31:0]	tck_shft_data_ff;



assign tck_shft_data_nxt 
	      = ctu_efc_capturedr ? read_data_ff
	       : ctu_efc_shiftdr ? {tck_shft_data_ff[30:0], ctu_efc_data_in}
	       : tck_shft_data_ff;

dff_ns #(32) tck_shft_data_reg (.din(tck_shft_data_nxt ),
		   .q(tck_shft_data_ff ), .clk(tck));

assign       efc_ctu_data_out = tck_shft_data_ff[31];

endmodule