data/full_repos/permissive/505918157/ALU.v
1: b"%Error: data/full_repos/permissive/505918157/ALU.v:36: Cannot find file containing module: 'Multiplexer4to1'\n    Multiplexer4to1 ALU_mux(\n    ^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/505918157,data/full_repos/permissive/505918157/Multiplexer4to1\n             data/full_repos/permissive/505918157,data/full_repos/permissive/505918157/Multiplexer4to1.v\n             data/full_repos/permissive/505918157,data/full_repos/permissive/505918157/Multiplexer4to1.sv\n             Multiplexer4to1\n             Multiplexer4to1.v\n             Multiplexer4to1.sv\n             obj_dir/Multiplexer4to1\n             obj_dir/Multiplexer4to1.v\n             obj_dir/Multiplexer4to1.sv\n%Error: data/full_repos/permissive/505918157/ALU.v:45: Cannot find file containing module: 'Multiplexer4to1'\n    Multiplexer4to1 ALU_mux1(\n    ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/505918157/ALU.v:54: Cannot find file containing module: 'Add_sub'\n    Add_sub cpu_add_sub(\n    ^~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module ALU(
    input ALU_mode,
    input [1:0] num1_CS,
    input [1:0] num2_CS,
    input [31:0] PC_din,
    input [31:0] IM_din,
    input [31:0] reg_din0,
    input [31:0] reg_din1,
    output [31:0] ALU_out
    );

    wire [31:0] num1, num2;

    Multiplexer4to1 ALU_mux(
        .CS(num1_CS),
        .din0(reg_din0),
        .din1(IM_din),
        .din2(PC_din),
        .din3(reg_din1),
        .dout(num1)
    );

    Multiplexer4to1 ALU_mux1(
        .CS(num2_CS),
        .din0(reg_din0),
        .din1(IM_din),
        .din2(PC_din),
        .din3(reg_din1),
        .dout(num2)
    );

    Add_sub cpu_add_sub(
        .add(ALU_mode),
        .num1(num1),
        .num2(num2),
        .result(ALU_out)
    );
endmodule
module ALU(
    input ALU_mode,
    input [1:0] num1_CS,
    input [1:0] num2_CS,
    input [31:0] PC_din,
    input [31:0] IM_din,
    input [31:0] reg_din0,
    input [31:0] reg_din1,
    output [31:0] ALU_out
    );


    wire [31:0] num1, num2;

    Multiplexer4to1 ALU_mux(
        .CS(num1_CS),
        .din0(reg_din0),
        .din1(IM_din),
        .din2(PC_din),
        .din3(reg_din1),
        .dout(num1)
    );

    Multiplexer4to1 ALU_mux1(
        .CS(num2_CS),
        .din0(reg_din0),
        .din1(IM_din),
        .din2(PC_din),
        .din3(reg_din1),
        .dout(num2)
    );

    Add_sub cpu_add_sub(
        .add(ALU_mode),
        .num1(num1),
        .num2(num2),
        .result(ALU_out)
    );
endmodule