data/full_repos/permissive/487110065/MemInst.v
data/verilator_xmls/1f79364a-263a-48a6-858b-a5fbd248badb.xml
module MemInst (
    endereco,
    clock,
    saida
);

input [31:0] endereco;
input clock;

output reg [31:0] saida;

reg [31:0] memoriaI [(2**9 - 1):0];

initial begin
    $readmemb("out_bin.txt", memoriaI);
end

always @(posedge clock) begin
    saida <= memoriaI[endereco];
end

endmodule
module MemInst (
    endereco,
    clock,
    saida
);


input [31:0] endereco;
input clock;

output reg [31:0] saida;

reg [31:0] memoriaI [(2**9 - 1):0];

initial begin
    $readmemb("out_bin.txt", memoriaI);
end

always @(posedge clock) begin
    saida <= memoriaI[endereco];
end

endmodule