data/full_repos/permissive/514992586/1_Verilog_language/More_Verilog_Features/43_Bcdadd100.v
1: b"%Error: data/full_repos/permissive/514992586/1_Verilog_language/More_Verilog_Features/43_Bcdadd100.v:8: Cannot find file containing module: 'bcd_fadd'\n    bcd_fadd fadd(.a(a[3:0]), .b(b[3:0]), .cin(cin), .cout(cout_tmp[0]),.sum(sum[3:0]));\n    ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/514992586/1_Verilog_language/More_Verilog_Features,data/full_repos/permissive/514992586/bcd_fadd\n             data/full_repos/permissive/514992586/1_Verilog_language/More_Verilog_Features,data/full_repos/permissive/514992586/bcd_fadd.v\n             data/full_repos/permissive/514992586/1_Verilog_language/More_Verilog_Features,data/full_repos/permissive/514992586/bcd_fadd.sv\n             bcd_fadd\n             bcd_fadd.v\n             bcd_fadd.sv\n             obj_dir/bcd_fadd\n             obj_dir/bcd_fadd.v\n             obj_dir/bcd_fadd.sv\n%Error: data/full_repos/permissive/514992586/1_Verilog_language/More_Verilog_Features/43_Bcdadd100.v:14: Cannot find file containing module: 'bcd_fadd'\n            bcd_fadd fadd(.a(a[i+3:i]), .b(b[i+3:i]), .cin(cout_tmp[i-4]), .cout(cout_tmp[i]),.sum(sum[i+3:i]));\n            ^~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module top_module( 
    input [399:0] a, b,
    input cin,
    output cout,
    output [399:0] sum );

    wire [399:0] cout_tmp;
    bcd_fadd fadd(.a(a[3:0]), .b(b[3:0]), .cin(cin), .cout(cout_tmp[0]),.sum(sum[3:0]));
    assign cout = cout_tmp[396];
    
    generate
        genvar i;
        for(i = 4; i < 400; i=i+4) begin : adder
            bcd_fadd fadd(.a(a[i+3:i]), .b(b[i+3:i]), .cin(cout_tmp[i-4]), .cout(cout_tmp[i]),.sum(sum[i+3:i]));
        end
    endgenerate
endmodule
module top_module( 
    input [399:0] a, b,
    input cin,
    output cout,
    output [399:0] sum );


    wire [399:0] cout_tmp;
    bcd_fadd fadd(.a(a[3:0]), .b(b[3:0]), .cin(cin), .cout(cout_tmp[0]),.sum(sum[3:0]));
    assign cout = cout_tmp[396];
    
    generate
        genvar i;
        for(i = 4; i < 400; i=i+4) begin : adder
            bcd_fadd fadd(.a(a[i+3:i]), .b(b[i+3:i]), .cin(cout_tmp[i-4]), .cout(cout_tmp[i]),.sum(sum[i+3:i]));
        end
    endgenerate
endmodule