data/full_repos/permissive/481307378/source_files/ALU/alu_ctrl.v
data/verilator_xmls/2df3ed7e-82f0-42a5-9d13-268d94f23d8f.xml
module alu_ctrl( 
input [31 : 0] Instr,
output reg [4 : 0]  AluOp
);








always @(Instr)
begin

    AluOp = 5'h0;

    casez (Instr[6 : 0])

        `OPCODE_OP :
        begin
            casez ({Instr[31 : 25], Instr[14 : 12]})
            `ALU_ADD_OP: AluOp = `ADD;
            `ALU_SUB_OP: AluOp = `SUB;
            `ALU_MUL_OP: AluOp = `MUL;
            `ALU_AND_OP: AluOp = `AND;
            `ALU_OR_OP:  AluOp = `OR;
            `ALU_XOR_OP: AluOp = `XOR;
            `ALU_SLL_OP: AluOp = `SLL;
            `ALU_SRA_OP: AluOp = `SRA;
            `ALU_SRL_OP: AluOp = `SRL;
            `ALU_SLT_OP: AluOp = `SLT;
            `ALU_SLTU_OP: AluOp = `SLTU;
            endcase
        end

        `OPCODE_OPIMM :
        begin
            casez ({Instr[31 : 25], Instr[14 : 12]})
            `ALU_ADDI_OP: AluOp = `ADD;
            `ALU_ANDI_OP: AluOp = `AND;
            `ALU_ORI_OP:  AluOp = `OR;
            `ALU_XORI_OP: AluOp = `XOR;
            `ALU_SLLI_OP: AluOp = `SLLI;
            `ALU_SRAI_OP: AluOp = `SRAI;
            `ALU_SRLI_OP: AluOp = `SRLI;
            `ALU_SLTI_OP: AluOp = `SLT;
            `ALU_SLTIU_OP: AluOp = `SLTU;       
            endcase
        end

        `OPCODE_STORE : AluOp = `LUI;

        `OPCODE_LOAD : AluOp =  `LUI;

        `OPCODE_BRANCH :
        begin
            casez ({Instr[31 : 25], Instr[14 : 12]})
            `ALU_BEQ_OP:  AluOp = `BEQ;
            `ALU_BNE_OP:  AluOp = `BNE; 
            `ALU_BLT_OP:  AluOp = `BLT; 
            `ALU_BGE_OP:  AluOp = `BGE;  
            `ALU_BLTU_OP: AluOp = `BLTU;  
            `ALU_BGEU_OP: AluOp = `BGEU;
            endcase
        end 

        `OPCODE_JALR : AluOp = `AUIPC;

        `OPCODE_JAL :  AluOp = `AUIPC;

        `OPCODE_AUIPC : AluOp = `AUIPC;

        `OPCODE_LUI :  AluOp = `LUI;

    endcase
end


endmodule
module alu_ctrl( 
input [31 : 0] Instr,
output reg [4 : 0]  AluOp
);









always @(Instr)
begin

    AluOp = 5'h0;

    casez (Instr[6 : 0])

        `OPCODE_OP :
        begin
            casez ({Instr[31 : 25], Instr[14 : 12]})
            `ALU_ADD_OP: AluOp = `ADD;
            `ALU_SUB_OP: AluOp = `SUB;
            `ALU_MUL_OP: AluOp = `MUL;
            `ALU_AND_OP: AluOp = `AND;
            `ALU_OR_OP:  AluOp = `OR;
            `ALU_XOR_OP: AluOp = `XOR;
            `ALU_SLL_OP: AluOp = `SLL;
            `ALU_SRA_OP: AluOp = `SRA;
            `ALU_SRL_OP: AluOp = `SRL;
            `ALU_SLT_OP: AluOp = `SLT;
            `ALU_SLTU_OP: AluOp = `SLTU;
            endcase
        end

        `OPCODE_OPIMM :
        begin
            casez ({Instr[31 : 25], Instr[14 : 12]})
            `ALU_ADDI_OP: AluOp = `ADD;
            `ALU_ANDI_OP: AluOp = `AND;
            `ALU_ORI_OP:  AluOp = `OR;
            `ALU_XORI_OP: AluOp = `XOR;
            `ALU_SLLI_OP: AluOp = `SLLI;
            `ALU_SRAI_OP: AluOp = `SRAI;
            `ALU_SRLI_OP: AluOp = `SRLI;
            `ALU_SLTI_OP: AluOp = `SLT;
            `ALU_SLTIU_OP: AluOp = `SLTU;       
            endcase
        end

        `OPCODE_STORE : AluOp = `LUI;

        `OPCODE_LOAD : AluOp =  `LUI;

        `OPCODE_BRANCH :
        begin
            casez ({Instr[31 : 25], Instr[14 : 12]})
            `ALU_BEQ_OP:  AluOp = `BEQ;
            `ALU_BNE_OP:  AluOp = `BNE; 
            `ALU_BLT_OP:  AluOp = `BLT; 
            `ALU_BGE_OP:  AluOp = `BGE;  
            `ALU_BLTU_OP: AluOp = `BLTU;  
            `ALU_BGEU_OP: AluOp = `BGEU;
            endcase
        end 

        `OPCODE_JALR : AluOp = `AUIPC;

        `OPCODE_JAL :  AluOp = `AUIPC;

        `OPCODE_AUIPC : AluOp = `AUIPC;

        `OPCODE_LUI :  AluOp = `LUI;

    endcase
end


endmodule