data/full_repos/permissive/515477729/source/booth_rad.v
1: b"%Error: data/full_repos/permissive/515477729/source/booth_rad.v:8: Cannot find file containing module: 'booth_datapath'\n    booth_datapath bd0 ( clk, ldA, ldM, ldQ, clrA, clrQ, clrff, sftA, sftQ, addsub, dec, ldCnt, data_in, q0, qm1, eqz);\n    ^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/515477729/source,data/full_repos/permissive/515477729/booth_datapath\n             data/full_repos/permissive/515477729/source,data/full_repos/permissive/515477729/booth_datapath.v\n             data/full_repos/permissive/515477729/source,data/full_repos/permissive/515477729/booth_datapath.sv\n             booth_datapath\n             booth_datapath.v\n             booth_datapath.sv\n             obj_dir/booth_datapath\n             obj_dir/booth_datapath.v\n             obj_dir/booth_datapath.sv\n%Error: data/full_repos/permissive/515477729/source/booth_rad.v:9: Cannot find file containing module: 'booth_controller'\n    booth_controller bc0 ( ldA, clrA, sftA, ldQ, clrQ, sftQ, ldM, clrff, addsub, dec, ldCnt, done, clk, q0, qm1, eqz, start);\n    ^~~~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module booth_rad(output done, input clk, input [15:0] data_in, input start);

    wire ldA, clrA, sftA, ldQ, clrQ, sftQ, ldM, clrff, addsub;
    wire q0, qm1, dec, ldCnt;
    wire eqz;


    booth_datapath bd0 ( clk, ldA, ldM, ldQ, clrA, clrQ, clrff, sftA, sftQ, addsub, dec, ldCnt, data_in, q0, qm1, eqz);
    booth_controller bc0 ( ldA, clrA, sftA, ldQ, clrQ, sftQ, ldM, clrff, addsub, dec, ldCnt, done, clk, q0, qm1, eqz, start);

endmodule
module booth_rad(output done, input clk, input [15:0] data_in, input start);


    wire ldA, clrA, sftA, ldQ, clrQ, sftQ, ldM, clrff, addsub;
    wire q0, qm1, dec, ldCnt;
    wire eqz;


    booth_datapath bd0 ( clk, ldA, ldM, ldQ, clrA, clrQ, clrff, sftA, sftQ, addsub, dec, ldCnt, data_in, q0, qm1, eqz);
    booth_controller bc0 ( ldA, clrA, sftA, ldQ, clrQ, sftQ, ldM, clrff, addsub, dec, ldCnt, done, clk, q0, qm1, eqz, start);

endmodule