data/full_repos/permissive/412289941/polar.v
data/verilator_xmls/89bfc642-1f1b-44de-84e4-a6d136139f53.xml
module polar(rst,data_in,data_outP,data_outN,clk);

input [1:0]data_in;
input rst,clk;
output data_outP,data_outN;
reg [1:0] polar_out;
reg data_outN,data_outP;
reg even;

always@(posedge clk or negedge rst) begin
    if(!rst) even <= 1;
    else if(data_in == 2'b11) begin
        if(even ==     1)
            polar_out <= 2'b01;
        else
            polar_out <= 2'b10;
    end

    else if(data_in == 2'b01 || data_in == 2'b10) begin
        if(even == 1) begin
            even <= 0;
            polar_out <= 2'b10;
        end
        else begin
            even <= 1;
            polar_out <= 2'b01;
        end
    end
    else if(data_in == 2'b00)
        polar_out <= 2'b00;
end

always@(polar_out or rst) begin    

    if(!rst) begin
        data_outP <= 0;
        data_outN <= 0;
    end
    else if(polar_out == 2'b01) begin
        data_outP <= 0;
        data_outN <= 1;
    end
    else if(polar_out == 2'b10) begin
        data_outP <= 1;
        data_outN <= 0;
    end
    else begin
        data_outP <= 0;
        data_outN <= 0;            
    end
end
endmodule
module polar(rst,data_in,data_outP,data_outN,clk);


input [1:0]data_in;
input rst,clk;
output data_outP,data_outN;
reg [1:0] polar_out;
reg data_outN,data_outP;
reg even;

always@(posedge clk or negedge rst) begin
    if(!rst) even <= 1;
    else if(data_in == 2'b11) begin
        if(even ==     1)
            polar_out <= 2'b01;
        else
            polar_out <= 2'b10;
    end

    else if(data_in == 2'b01 || data_in == 2'b10) begin
        if(even == 1) begin
            even <= 0;
            polar_out <= 2'b10;
        end
        else begin
            even <= 1;
            polar_out <= 2'b01;
        end
    end
    else if(data_in == 2'b00)
        polar_out <= 2'b00;
end

always@(polar_out or rst) begin    

    if(!rst) begin
        data_outP <= 0;
        data_outN <= 0;
    end
    else if(polar_out == 2'b01) begin
        data_outP <= 0;
        data_outN <= 1;
    end
    else if(polar_out == 2'b10) begin
        data_outP <= 1;
        data_outN <= 0;
    end
    else begin
        data_outP <= 0;
        data_outN <= 0;            
    end
end
endmodule