data/full_repos/permissive/509706519/bram.v
1: b'%Warning-WIDTH: data/full_repos/permissive/509706519/bram.v:57: Bit extraction of array[16383:0] requires 14 bit index, not 16 bits.\n                                                              : ... In instance bram\n   ram [wadr] <= din;\n       ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/509706519/bram.v:62: Bit extraction of array[16383:0] requires 14 bit index, not 16 bits.\n                                                              : ... In instance bram\n assign dout = ram [read_a];\n                   ^\n%Error: Exiting due to 2 warning(s)\n'
module bram
#(
	parameter AW = 16,
	parameter BW = 8,
	parameter DP = 256 * 64
)
(
	input clk,
    input [BW-1:0] din,
    input we,
	input [AW-1:0] wadr,
    input [AW-1:0] radr,
	output [BW-1:0] dout
);
	
	(* ram_style = "block" *)
	reg [BW-1:0] ram [DP-1:0];
	reg [AW-1:0] read_a; 
    
    integer i;
    
    initial
    begin
        for(i = 0; i < DP; i = i + 1)
            ram[i] = 0;
    end
    
	always @(posedge clk) begin
		if (we) begin
			ram [wadr] <= din;
		end
		read_a <= radr;
	end
	
	assign dout = ram [read_a];
	
	
endmodule
module bram
#(
	parameter AW = 16,
	parameter BW = 8,
	parameter DP = 256 * 64
)
(
	input clk,
    input [BW-1:0] din,
    input we,
	input [AW-1:0] wadr,
    input [AW-1:0] radr,
	output [BW-1:0] dout
);

	
	(* ram_style = "block" *)
	reg [BW-1:0] ram [DP-1:0];
	reg [AW-1:0] read_a; 
    
    integer i;
    
    initial
    begin
        for(i = 0; i < DP; i = i + 1)
            ram[i] = 0;
    end
    
	always @(posedge clk) begin
		if (we) begin
			ram [wadr] <= din;
		end
		read_a <= radr;
	end
	
	assign dout = ram [read_a];
	
	
endmodule