data/full_repos/permissive/42434302/ivltests/specify3.v
1: b'%Error: data/full_repos/permissive/42434302/ivltests/specify3.v:11: Unsupported or unknown PLI call: $monitor\n      #10 $monitor($time,,"a=%b, b=%b, fast=%b, q=%b", a, b, fast, q);\n          ^~~~~~~~\n%Error: data/full_repos/permissive/42434302/ivltests/specify3.v:11: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n      #10 $monitor($time,,"a=%b, b=%b, fast=%b, q=%b", a, b, fast, q);\n                         ^\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/specify3.v:11: Unsupported: Ignoring delay on this delayed statement.\n      #10 $monitor($time,,"a=%b, b=%b, fast=%b, q=%b", a, b, fast, q);\n      ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/specify3.v:12: Unsupported: Ignoring delay on this delayed statement.\n      #10 a = 1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/specify3.v:13: Unsupported: Ignoring delay on this delayed statement.\n      #10 a = 0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/specify3.v:14: Unsupported: Ignoring delay on this delayed statement.\n      #10 b = 1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/specify3.v:15: Unsupported: Ignoring delay on this delayed statement.\n      #10 b = 0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/specify3.v:16: Unsupported: Ignoring delay on this delayed statement.\n      #10 a = 1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/specify3.v:17: Unsupported: Ignoring delay on this delayed statement.\n      #10 fast = 1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/specify3.v:18: Unsupported: Ignoring delay on this delayed statement.\n      #10 b = 1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/specify3.v:19: Unsupported: Ignoring delay on this delayed statement.\n      #10 b = 0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/specify3.v:20: Unsupported: Ignoring delay on this delayed statement.\n      #10 a = 0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/specify3.v:21: Unsupported: Ignoring delay on this delayed statement.\n      #10 a = 1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/specify3.v:23: Unsupported: Ignoring delay on this delayed statement.\n      #10 $finish;\n      ^\n%Error: Exiting due to 2 error(s), 12 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module top;
   reg a, b, fast;
   wire q;

   initial begin
      a = 0;
      b = 0;
      fast = 0;
      #10 $monitor($time,,"a=%b, b=%b, fast=%b, q=%b", a, b, fast, q);
      #10 a = 1;
      #10 a = 0;
      #10 b = 1;
      #10 b = 0;
      #10 a = 1;
      #10 fast = 1;
      #10 b = 1;
      #10 b = 0;
      #10 a = 0;
      #10 a = 1;

      #10 $finish;
   end

   myxor g1 (q, a, b, fast);

endmodule
module top;

   reg a, b, fast;
   wire q;

   initial begin
      a = 0;
      b = 0;
      fast = 0;
      #10 $monitor($time,,"a=%b, b=%b, fast=%b, q=%b", a, b, fast, q);
      #10 a = 1;
      #10 a = 0;
      #10 b = 1;
      #10 b = 0;
      #10 a = 1;
      #10 fast = 1;
      #10 b = 1;
      #10 b = 0;
      #10 a = 0;
      #10 a = 1;

      #10 $finish;
   end

   myxor g1 (q, a, b, fast);

endmodule