data/full_repos/permissive/441359809/src/yosys/tests/asicworld/code_hdl_models_decoder_using_assign.v
data/verilator_xmls/3e824ccf-179c-41f5-842c-cb42e7468079.xml
module decoder_using_assign (
binary_in   ,
decoder_out ,
enable
);
input [3:0] binary_in  ;
input  enable ; 
output [15:0] decoder_out ; 
        
wire [15:0] decoder_out ; 

assign decoder_out = (enable) ? (1 << binary_in) : 16'b0 ;

endmodule
module decoder_using_assign (
binary_in   ,
decoder_out ,
enable
);

input [3:0] binary_in  ;
input  enable ; 
output [15:0] decoder_out ; 
        
wire [15:0] decoder_out ; 

assign decoder_out = (enable) ? (1 << binary_in) : 16'b0 ;

endmodule