data/full_repos/permissive/497819211/01/DMux8Way_tb.v
1: b'%Error: data/full_repos/permissive/497819211/01/DMux8Way_tb.v:1: Cannot find include file: DMux8Way.v\n`include "DMux8Way.v" \n         ^~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/497819211/01,data/full_repos/permissive/497819211/DMux8Way.v\n             data/full_repos/permissive/497819211/01,data/full_repos/permissive/497819211/DMux8Way.v.v\n             data/full_repos/permissive/497819211/01,data/full_repos/permissive/497819211/DMux8Way.v.sv\n             DMux8Way.v\n             DMux8Way.v.v\n             DMux8Way.v.sv\n             obj_dir/DMux8Way.v\n             obj_dir/DMux8Way.v.v\n             obj_dir/DMux8Way.v.sv\n%Warning-STMTDLY: data/full_repos/permissive/497819211/01/DMux8Way_tb.v:32: Unsupported: Ignoring delay on this delayed statement.\n     #1 $fwrite(file, "|%1b|%3b|%1b|%1b|%1b|%1b|%1b|%1b|%1b|%1b|\\n", in,sel,a,b,c,d,e,f,g,h);\n     ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/497819211/01/DMux8Way_tb.v:36: Unsupported or unknown PLI call: $dumpfile\n    $dumpfile("DMux8Way_tb.vcd");\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/497819211/01/DMux8Way_tb.v:37: Unsupported or unknown PLI call: $dumpvars\n    $dumpvars(0, DMux8Way_tb);\n    ^~~~~~~~~\n%Error: Exiting due to 3 error(s), 1 warning(s)\n'
module DMux8Way_tb();

	integer file;

	reg in = 1'b0;
	reg[2:0] sel = 3'b000;
	wire a;
	wire b;
	wire c;
	wire d;
	wire e;
	wire f;
	wire g;
	wire h;
	
	DMux8Way DMUX8WAY(
	    .in(in),
	    .sel(sel),
	    .a(a),
		.b(b),
		.c(c),
		.d(d),
		.e(e),
		.f(f),
		.g(g),
		.h(h)
	  );

	task display;
    	#1 $fwrite(file, "|%1b|%3b|%1b|%1b|%1b|%1b|%1b|%1b|%1b|%1b|\n", in,sel,a,b,c,d,e,f,g,h);
  	endtask
  	
  	initial begin
  		$dumpfile("DMux8Way_tb.vcd");
  		$dumpvars(0, DMux8Way_tb);
		file = $fopen("DMux8Way.out","w");
    	$fwrite(file, "|in|sel|a|b|c|d|e|f|g|h|\n");
		
        sel = 3'b000;
		display();
        sel = 3'b001;
		display();
  		sel = 3'b010;
		display();
        sel = 3'b011;
		display();
		sel = 3'b100;
		display();
        sel = 3'b101;
		display();
  		sel = 3'b110;
		display();
        sel = 3'b111;
		display();
		
		in = 1'b1;
        sel = 3'b000;
		display();
        sel = 3'b001;
		display();
  		sel = 3'b010;
		display();
        sel = 3'b011;
		display();
		sel = 3'b100;
		display();
        sel = 3'b101;
		display();
  		sel = 3'b110;
		display();
        sel = 3'b111;
		display();
		$finish();	
	end

endmodule
module DMux8Way_tb();


	integer file;

	reg in = 1'b0;
	reg[2:0] sel = 3'b000;
	wire a;
	wire b;
	wire c;
	wire d;
	wire e;
	wire f;
	wire g;
	wire h;
	
	DMux8Way DMUX8WAY(
	    .in(in),
	    .sel(sel),
	    .a(a),
		.b(b),
		.c(c),
		.d(d),
		.e(e),
		.f(f),
		.g(g),
		.h(h)
	  );

	task display;
    	#1 $fwrite(file, "|%1b|%3b|%1b|%1b|%1b|%1b|%1b|%1b|%1b|%1b|\n", in,sel,a,b,c,d,e,f,g,h);
  	endtask
  	
  	initial begin
  		$dumpfile("DMux8Way_tb.vcd");
  		$dumpvars(0, DMux8Way_tb);
		file = $fopen("DMux8Way.out","w");
    	$fwrite(file, "|in|sel|a|b|c|d|e|f|g|h|\n");
		
        sel = 3'b000;
		display();
        sel = 3'b001;
		display();
  		sel = 3'b010;
		display();
        sel = 3'b011;
		display();
		sel = 3'b100;
		display();
        sel = 3'b101;
		display();
  		sel = 3'b110;
		display();
        sel = 3'b111;
		display();
		
		in = 1'b1;
        sel = 3'b000;
		display();
        sel = 3'b001;
		display();
  		sel = 3'b010;
		display();
        sel = 3'b011;
		display();
		sel = 3'b100;
		display();
        sel = 3'b101;
		display();
  		sel = 3'b110;
		display();
        sel = 3'b111;
		display();
		$finish();	
	end

endmodule