data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dtl_flps.v
1: b"%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dtl_flps.v:47: Cannot find file containing module: 'bw_u1_soff_2x'\n  bw_u1_soff_2x bsff_0 (\n  ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/bw_u1_soff_2x\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/bw_u1_soff_2x.v\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/bw_u1_soff_2x.sv\n             bw_u1_soff_2x\n             bw_u1_soff_2x.v\n             bw_u1_soff_2x.sv\n             obj_dir/bw_u1_soff_2x\n             obj_dir/bw_u1_soff_2x.v\n             obj_dir/bw_u1_soff_2x.sv\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dtl_flps.v:56: Cannot find file containing module: 'bw_u1_soff_2x'\n  bw_u1_soff_2x bsff_1 (\n  ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dtl_flps.v:65: Cannot find file containing module: 'bw_u1_soff_2x'\n  bw_u1_soff_2x I28 (\n  ^~~~~~~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module bw_io_dtl_flps (

  q, so, 

  d, clk, si, se
  );

  output [2:0]	q;
  input  [2:0]	d;
  output	so;
  input		clk;
  input		si;
  input		se;



 
 
  bw_u1_soff_2x bsff_0 (
    .q               (q[0]),
    .so              (so_0),
    .ck              (clk),
    .d               (d[0]),
    .se              (se),
    .sd              (si)
    );

  bw_u1_soff_2x bsff_1 (
    .q               (q[1]),
    .so              (net51),
    .ck              (clk),
    .d               (d[1]),
    .se              (se),
    .sd              (so_0)
    );

  bw_u1_soff_2x I28 (
    .q               (q[2]),
    .so              (so),
    .ck              (clk),
    .d               (d[2]),
    .se              (se),
    .sd              (net51)
    );


  endmodule
module bw_io_dtl_flps (

  q, so, 

  d, clk, si, se
  );


  output [2:0]	q;
  input  [2:0]	d;
  output	so;
  input		clk;
  input		si;
  input		se;



 
 
  bw_u1_soff_2x bsff_0 (
    .q               (q[0]),
    .so              (so_0),
    .ck              (clk),
    .d               (d[0]),
    .se              (se),
    .sd              (si)
    );

  bw_u1_soff_2x bsff_1 (
    .q               (q[1]),
    .so              (net51),
    .ck              (clk),
    .d               (d[1]),
    .se              (se),
    .sd              (so_0)
    );

  bw_u1_soff_2x I28 (
    .q               (q[2]),
    .so              (so),
    .ck              (clk),
    .d               (d[2]),
    .se              (se),
    .sd              (net51)
    );


  endmodule