data/full_repos/permissive/447976230/fpga/usrp1/sdr_lib/rx_buffer.v
1: b'%Error: data/full_repos/permissive/447976230/fpga/usrp1/sdr_lib/rx_buffer.v:25: Cannot find include file: ../common/fpga_regs_common.v\n`include "../common/fpga_regs_common.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/447976230/fpga/usrp1/sdr_lib,data/full_repos/permissive/447976230/../common/fpga_regs_common.v\n             data/full_repos/permissive/447976230/fpga/usrp1/sdr_lib,data/full_repos/permissive/447976230/../common/fpga_regs_common.v.v\n             data/full_repos/permissive/447976230/fpga/usrp1/sdr_lib,data/full_repos/permissive/447976230/../common/fpga_regs_common.v.sv\n             ../common/fpga_regs_common.v\n             ../common/fpga_regs_common.v.v\n             ../common/fpga_regs_common.v.sv\n             obj_dir/../common/fpga_regs_common.v\n             obj_dir/../common/fpga_regs_common.v.v\n             obj_dir/../common/fpga_regs_common.v.sv\n%Error: data/full_repos/permissive/447976230/fpga/usrp1/sdr_lib/rx_buffer.v:26: Cannot find include file: ../common/fpga_regs_standard.v\n`include "../common/fpga_regs_standard.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/447976230/fpga/usrp1/sdr_lib/rx_buffer.v:66: Define or directive not defined: \'`FR_RX_FORMAT\'\n   setting_reg #(`FR_RX_FORMAT) sr_rxformat(.clock(rxclk),.reset(reset_regs),\n                 ^~~~~~~~~~~~~\n%Error: Exiting due to 3 error(s)\n'
function [7:0] round_8;
      input [15:0] in_val;
      
      round_8 = in_val[15:8] + (in_val[15] & |in_val[7:0]);
   endfunction
function [7:0] round_8;

      input [15:0] in_val;
      
      round_8 = in_val[15:8] + (in_val[15] & |in_val[7:0]);
   endfunction