data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/rsinv_test/lib/atvn/lib_v/sim/imem2r1wx.v
1: b"%Error: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/rsinv_test/lib/atvn/lib_v/sim/imem2r1wx.v:69: Cannot find file containing module: 'imemrwpx'\nimemrwpx #(ADDRBIT,DEPTH,WIDTH) ram1\n^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/rsinv_test/lib/atvn/lib_v/sim,data/full_repos/permissive/530013823/imemrwpx\n             data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/rsinv_test/lib/atvn/lib_v/sim,data/full_repos/permissive/530013823/imemrwpx.v\n             data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/rsinv_test/lib/atvn/lib_v/sim,data/full_repos/permissive/530013823/imemrwpx.sv\n             imemrwpx\n             imemrwpx.v\n             imemrwpx.sv\n             obj_dir/imemrwpx\n             obj_dir/imemrwpx.v\n             obj_dir/imemrwpx.sv\n%Error: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/rsinv_test/lib/atvn/lib_v/sim/imem2r1wx.v:71: Cannot find file containing module: 'imemrwpx'\nimemrwpx #(ADDRBIT,DEPTH,WIDTH) ram2\n^~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module imem2r1wx
    (
     wrst_,
     wclk,
     wa,
     we,
     di,

     r1rst_,
     rclk1,
     ra1,
     re1,
     do1,

     r2rst_,
     rclk2,
     ra2,
     re2,
     do2,

     test,
     mask
     );

parameter ADDRBIT = 9;
parameter DEPTH = 512;
parameter WIDTH = 32;
parameter TYPE = "AUTO";
parameter MAXDEPTH = 0;

input               wrst_;
input               wclk;
input [ADDRBIT-1:0] wa;
input               we;
input [WIDTH-1:0]   di;

input               r1rst_;
input               rclk1;
input [ADDRBIT-1:0] ra1;
input               re1;
output [WIDTH-1:0]  do1;

input               r2rst_;
input               rclk2;
input [ADDRBIT-1:0] ra2;
input               re2;
output [WIDTH-1:0]  do2;

input               test;
input               mask;

imemrwpx #(ADDRBIT,DEPTH,WIDTH) ram1
    (wrst_,wclk,wa,we,di,r1rst_,rclk1,ra1,re1,do1,test,mask);
imemrwpx #(ADDRBIT,DEPTH,WIDTH) ram2
    (wrst_,wclk,wa,we,di,r2rst_,rclk2,ra2,re2,do2,test,mask);

endmodule
module imem2r1wx
    (
     wrst_,
     wclk,
     wa,
     we,
     di,

     r1rst_,
     rclk1,
     ra1,
     re1,
     do1,

     r2rst_,
     rclk2,
     ra2,
     re2,
     do2,

     test,
     mask
     );


parameter ADDRBIT = 9;
parameter DEPTH = 512;
parameter WIDTH = 32;
parameter TYPE = "AUTO";
parameter MAXDEPTH = 0;

input               wrst_;
input               wclk;
input [ADDRBIT-1:0] wa;
input               we;
input [WIDTH-1:0]   di;

input               r1rst_;
input               rclk1;
input [ADDRBIT-1:0] ra1;
input               re1;
output [WIDTH-1:0]  do1;

input               r2rst_;
input               rclk2;
input [ADDRBIT-1:0] ra2;
input               re2;
output [WIDTH-1:0]  do2;

input               test;
input               mask;

imemrwpx #(ADDRBIT,DEPTH,WIDTH) ram1
    (wrst_,wclk,wa,we,di,r1rst_,rclk1,ra1,re1,do1,test,mask);
imemrwpx #(ADDRBIT,DEPTH,WIDTH) ram2
    (wrst_,wclk,wa,we,di,r2rst_,rclk2,ra2,re2,do2,test,mask);

endmodule