data/full_repos/permissive/421030651/src/cpu/intc.sv
1: b'%Error: data/full_repos/permissive/421030651/src/cpu/intc.sv:1: Cannot find include file: soc_define.h\n`include "soc_define.h" \n         ^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/421030651/src/cpu,data/full_repos/permissive/421030651/soc_define.h\n             data/full_repos/permissive/421030651/src/cpu,data/full_repos/permissive/421030651/soc_define.h.v\n             data/full_repos/permissive/421030651/src/cpu,data/full_repos/permissive/421030651/soc_define.h.sv\n             soc_define.h\n             soc_define.h.v\n             soc_define.h.sv\n             obj_dir/soc_define.h\n             obj_dir/soc_define.h.v\n             obj_dir/soc_define.h.sv\n%Error: data/full_repos/permissive/421030651/src/cpu/intc.sv:9: Define or directive not defined: \'`CPU_NUM\'\n    output logic [`CPU_NUM-1: 0] msip,\n                  ^~~~~~~~\n%Error: data/full_repos/permissive/421030651/src/cpu/intc.sv:10: Define or directive not defined: \'`CPU_NUM\'\n    output logic [`CPU_NUM-1: 0] mtip,\n                  ^~~~~~~~\n%Error: data/full_repos/permissive/421030651/src/cpu/intc.sv:11: Define or directive not defined: \'`CPU_NUM\'\n    output logic [`CPU_NUM-1: 0] meip,\n                  ^~~~~~~~\n%Error: data/full_repos/permissive/421030651/src/cpu/intc.sv:12: Define or directive not defined: \'`CPU_NUM\'\n    output logic [`CPU_NUM-1: 0] seip,\n                  ^~~~~~~~\n%Error: data/full_repos/permissive/421030651/src/cpu/intc.sv:13: Define or directive not defined: \'`INT_NUM\'\n    input        [`INT_NUM-1: 0] ints\n                  ^~~~~~~~\n%Error: Exiting due to 6 error(s)\n'
module intc (
    input                        clk,
    input                        rstn,
    apb_intf.slave               s_apb_intf,

    input        [        63: 0] systime,
    output logic [`CPU_NUM-1: 0] msip,
    output logic [`CPU_NUM-1: 0] mtip,
    output logic [`CPU_NUM-1: 0] meip,
    output logic [`CPU_NUM-1: 0] seip,
    input        [`INT_NUM-1: 0] ints
);

apb_intf clint_apb();
apb_intf plic_apb();

intc_apb_conn u_intc_apb_conn (
    .intc_apb  ( s_apb_intf       ),
    .clint_apb ( clint_apb.master ),
    .plic_apb  ( plic_apb.master  )
);

clint u_clint (
    .clk      ( clk             ),
    .rstn     ( rstn            ),
    .apb_intf ( clint_apb.slave ),

    .systime  ( systime         ),
    .msip     ( msip            ),
    .mtip     ( mtip            )
);

plic u_plic(
    .clk      ( clk             ),
    .rstn     ( rstn            ),
    .apb_intf ( plic_apb.slave  ),

    .meip     ( meip            ),
    .seip     ( seip            ),
    .ints     ( ints            )
);

endmodule
module intc (
    input                        clk,
    input                        rstn,
    apb_intf.slave               s_apb_intf,

    input        [        63: 0] systime,
    output logic [`CPU_NUM-1: 0] msip,
    output logic [`CPU_NUM-1: 0] mtip,
    output logic [`CPU_NUM-1: 0] meip,
    output logic [`CPU_NUM-1: 0] seip,
    input        [`INT_NUM-1: 0] ints
);


apb_intf clint_apb();
apb_intf plic_apb();

intc_apb_conn u_intc_apb_conn (
    .intc_apb  ( s_apb_intf       ),
    .clint_apb ( clint_apb.master ),
    .plic_apb  ( plic_apb.master  )
);

clint u_clint (
    .clk      ( clk             ),
    .rstn     ( rstn            ),
    .apb_intf ( clint_apb.slave ),

    .systime  ( systime         ),
    .msip     ( msip            ),
    .mtip     ( mtip            )
);

plic u_plic(
    .clk      ( clk             ),
    .rstn     ( rstn            ),
    .apb_intf ( plic_apb.slave  ),

    .meip     ( meip            ),
    .seip     ( seip            ),
    .ints     ( ints            )
);

endmodule