data/full_repos/permissive/458935738/bluetooth/rx_wrapper.v
1: b"%Error: data/full_repos/permissive/458935738/bluetooth/rx_wrapper.v:16: Cannot find file containing module: 'Rx_core'\n    Rx_core #(DATA_WIDTH, BAUD_RATE) core(clk, rst, Rx, Rx_data_raw, Rx_done);\n    ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/458935738/bluetooth,data/full_repos/permissive/458935738/Rx_core\n             data/full_repos/permissive/458935738/bluetooth,data/full_repos/permissive/458935738/Rx_core.v\n             data/full_repos/permissive/458935738/bluetooth,data/full_repos/permissive/458935738/Rx_core.sv\n             Rx_core\n             Rx_core.v\n             Rx_core.sv\n             obj_dir/Rx_core\n             obj_dir/Rx_core.v\n             obj_dir/Rx_core.sv\n%Error: Exiting due to 1 error(s)\n"
module Rx_wrapper (
    clk, rst,
    Rx,
    Rx_data
);

    parameter DATA_WIDTH = 8;
    parameter BAUD_RATE = 32'd1667;

    input wire clk, rst, Rx;
    output reg [DATA_WIDTH-1:0] Rx_data;

    wire Rx_done;
    wire [DATA_WIDTH-1:0] Rx_data_raw;

    Rx_core #(DATA_WIDTH, BAUD_RATE) core(clk, rst, Rx, Rx_data_raw, Rx_done);

    always @(posedge clk) begin
        if (rst) begin
            Rx_data <= 0;
        end else begin
            Rx_data <= Rx_done ? Rx_data_raw : Rx_data;
        end
    end

endmodule
module Rx_wrapper (
    clk, rst,
    Rx,
    Rx_data
);


    parameter DATA_WIDTH = 8;
    parameter BAUD_RATE = 32'd1667;

    input wire clk, rst, Rx;
    output reg [DATA_WIDTH-1:0] Rx_data;

    wire Rx_done;
    wire [DATA_WIDTH-1:0] Rx_data_raw;

    Rx_core #(DATA_WIDTH, BAUD_RATE) core(clk, rst, Rx, Rx_data_raw, Rx_done);

    always @(posedge clk) begin
        if (rst) begin
            Rx_data <= 0;
        end else begin
            Rx_data <= Rx_done ? Rx_data_raw : Rx_data;
        end
    end

endmodule