data/full_repos/permissive/48852267/prj_niosii_pwm/niosii/niosii_bb.v
data/verilator_xmls/974908b5-8fc8-4cba-9601-af8e9befdc32.xml
module niosii (
	clk_clk,
	pio_0_external_connection_export,
	reset_reset_n,
	uart_0_rxd,
	uart_0_txd,
	ip_pwm_dir,
	ip_pwm_out);	

	input		clk_clk;
	output	[7:0]	pio_0_external_connection_export;
	input		reset_reset_n;
	input		uart_0_rxd;
	output		uart_0_txd;
	output	[1:0]	ip_pwm_dir;
	output	[1:0]	ip_pwm_out;
endmodule
module niosii (
	clk_clk,
	pio_0_external_connection_export,
	reset_reset_n,
	uart_0_rxd,
	uart_0_txd,
	ip_pwm_dir,
	ip_pwm_out);
	

	input		clk_clk;
	output	[7:0]	pio_0_external_connection_export;
	input		reset_reset_n;
	input		uart_0_rxd;
	output		uart_0_txd;
	output	[1:0]	ip_pwm_dir;
	output	[1:0]	ip_pwm_out;
endmodule