data/full_repos/permissive/410822585/general_tb.v
1: b'%Error: data/full_repos/permissive/410822585/general_tb.v:2: Cannot find include file: cell.v\n`include "cell.v" \n         ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/410822585,data/full_repos/permissive/410822585/cell.v\n             data/full_repos/permissive/410822585,data/full_repos/permissive/410822585/cell.v.v\n             data/full_repos/permissive/410822585,data/full_repos/permissive/410822585/cell.v.sv\n             cell.v\n             cell.v.v\n             cell.v.sv\n             obj_dir/cell.v\n             obj_dir/cell.v.v\n             obj_dir/cell.v.sv\n%Error: data/full_repos/permissive/410822585/general_tb.v:19: Unsupported or unknown PLI call: $dumpfile\n         $dumpfile("general_tb.vcd");\n         ^~~~~~~~~\n%Error: data/full_repos/permissive/410822585/general_tb.v:20: Unsupported or unknown PLI call: $dumpvars\n         $dumpvars(0, general_tb);\n         ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:23: Unsupported: Ignoring delay on this delayed statement.\n         #20;\n         ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:25: Unsupported: Ignoring delay on this delayed statement.\n         #20;\n         ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:27: Unsupported: Ignoring delay on this delayed statement.\n         #20;\n         ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:29: Unsupported: Ignoring delay on this delayed statement.\n         #20\n         ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:31: Unsupported: Ignoring delay on this delayed statement.\n         #20;\n         ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:33: Unsupported: Ignoring delay on this delayed statement.\n         #20;\n         ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:35: Unsupported: Ignoring delay on this delayed statement.\n         #20;\n         ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:37: Unsupported: Ignoring delay on this delayed statement.\n         #20;\n         ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:39: Unsupported: Ignoring delay on this delayed statement.\n         #20;\n         ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:41: Unsupported: Ignoring delay on this delayed statement.\n         #20;\n         ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:43: Unsupported: Ignoring delay on this delayed statement.\n         #20;\n         ^\n%Error: data/full_repos/permissive/410822585/general_tb.v:53: Unsupported or unknown PLI call: $dumpfile\n        $dumpfile("general_tb.vcd");\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/410822585/general_tb.v:54: Unsupported or unknown PLI call: $dumpvars\n        $dumpvars(0, general_tb);\n        ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:55: Unsupported: Ignoring delay on this delayed statement.\n        x = 0; y = 0; bin = 0; #20;\n                               ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:56: Unsupported: Ignoring delay on this delayed statement.\n        x = 0; y = 0; bin = 1; #20;\n                               ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:57: Unsupported: Ignoring delay on this delayed statement.\n        x = 0; y = 1; bin = 0; #20;\n                               ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:58: Unsupported: Ignoring delay on this delayed statement.\n        x = 0; y = 1; bin = 1; #20;\n                               ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:59: Unsupported: Ignoring delay on this delayed statement.\n        x = 1; y = 0; bin = 0; #20;\n                               ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:60: Unsupported: Ignoring delay on this delayed statement.\n        x = 1; y = 0; bin = 1; #20;\n                               ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:61: Unsupported: Ignoring delay on this delayed statement.\n        x = 1; y = 1; bin = 0; #20;\n                               ^\n%Warning-STMTDLY: data/full_repos/permissive/410822585/general_tb.v:62: Unsupported: Ignoring delay on this delayed statement.\n        x = 1; y = 1; bin = 1; #20;\n                               ^\n%Error: Exiting due to 5 error(s), 19 warning(s)\n'
module general_tb;
    reg x, y, bin;
    wire diff, bout;
    exdcr uut1 (.x(x), .y(y), .bin(bin), .bout(bout), .diff(diff));
    initial begin
        $dumpfile("general_tb.vcd");
        $dumpvars(0, general_tb);
        x = 0; y = 0; bin = 0; #20;
        x = 0; y = 0; bin = 1; #20;
        x = 0; y = 1; bin = 0; #20;
        x = 0; y = 1; bin = 1; #20;
        x = 1; y = 0; bin = 0; #20;
        x = 1; y = 0; bin = 1; #20;
        x = 1; y = 1; bin = 0; #20;
        x = 1; y = 1; bin = 1; #20;
    end
endmodule
module general_tb;

    reg x, y, bin;
    wire diff, bout;
    exdcr uut1 (.x(x), .y(y), .bin(bin), .bout(bout), .diff(diff));
    initial begin
        $dumpfile("general_tb.vcd");
        $dumpvars(0, general_tb);
        x = 0; y = 0; bin = 0; #20;
        x = 0; y = 0; bin = 1; #20;
        x = 0; y = 1; bin = 0; #20;
        x = 0; y = 1; bin = 1; #20;
        x = 1; y = 0; bin = 0; #20;
        x = 1; y = 0; bin = 1; #20;
        x = 1; y = 1; bin = 0; #20;
        x = 1; y = 1; bin = 1; #20;
    end
endmodule