data/full_repos/permissive/405799749/arithmetic_netlists/muliplier/16-bit signed multiplier using wallace tree/cla_16bit.v
1: b'%Error: Cannot find file containing module: signed\n        ... Looked in:\n             data/full_repos/permissive/405799749/arithmetic_netlists/muliplier/16-bit/signed\n             data/full_repos/permissive/405799749/arithmetic_netlists/muliplier/16-bit/signed.v\n             data/full_repos/permissive/405799749/arithmetic_netlists/muliplier/16-bit/signed.sv\n             signed\n             signed.v\n             signed.sv\n             obj_dir/signed\n             obj_dir/signed.v\n             obj_dir/signed.sv\n%Error: Cannot find file containing module: multiplier\n%Error: Cannot find file containing module: using\n%Error: Cannot find file containing module: wallace\n%Error: Cannot find file containing module: tree,data/full_repos/permissive/405799749\n%Error: Cannot find file containing module: data/full_repos/permissive/405799749/arithmetic_netlists/muliplier/16-bit\n%Error: Cannot find file containing module: tree/cla_16bit.v\n%Error: Exiting due to 7 error(s)\n'
module cla_16bit(sum,c16,a,b,c0);
	output [15:0] sum;
	output c16;
	input [15:0] a,b;
	wire [3:0] gs,ps;
	input c0;
	wire c4,c8,c12;
	cla_4bit c4b1(.sum(sum[3:0]),.ps(ps[0]),.gs(gs[0]),.a(a[3:0]),.b(b[3:0]),.c0(c0));
	cla_4bit c4b2(.sum(sum[7:4]),.ps(ps[1]),.gs(gs[1]),.a(a[7:4]),.b(b[7:4]),.c0(c4));
	cla_4bit c4b3(.sum(sum[11:8]),.ps(ps[2]),.gs(gs[2]),.a(a[11:8]),.b(b[11:8]),.c0(c8));
	cla_4bit c4b4(.sum(sum[15:12]),.ps(ps[3]),.gs(gs[3]),.a(a[15:12]),.b(b[15:12]),.c0(c12));
	carry c1(.c1(c4),.c2(c8),.c3(c12),.c4(c16),.p(ps),.g(gs),.c0(c0));
endmodule
module cla_16bit(sum,c16,a,b,c0);

	output [15:0] sum;
	output c16;
	input [15:0] a,b;
	wire [3:0] gs,ps;
	input c0;
	wire c4,c8,c12;
	cla_4bit c4b1(.sum(sum[3:0]),.ps(ps[0]),.gs(gs[0]),.a(a[3:0]),.b(b[3:0]),.c0(c0));
	cla_4bit c4b2(.sum(sum[7:4]),.ps(ps[1]),.gs(gs[1]),.a(a[7:4]),.b(b[7:4]),.c0(c4));
	cla_4bit c4b3(.sum(sum[11:8]),.ps(ps[2]),.gs(gs[2]),.a(a[11:8]),.b(b[11:8]),.c0(c8));
	cla_4bit c4b4(.sum(sum[15:12]),.ps(ps[3]),.gs(gs[3]),.a(a[15:12]),.b(b[15:12]),.c0(c12));
	carry c1(.c1(c4),.c2(c8),.c3(c12),.c4(c16),.p(ps),.g(gs),.c0(c0));
endmodule