data/full_repos/permissive/460468583/data/yosys/ecp5/cells_map.v
1: b'%Error: data/full_repos/permissive/460468583/data/yosys/ecp5/cells_map.v:99: Cannot find include file: cells_ff.vh\n`include "cells_ff.vh" \n         ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/460468583/data/yosys/ecp5,data/full_repos/permissive/460468583/cells_ff.vh\n             data/full_repos/permissive/460468583/data/yosys/ecp5,data/full_repos/permissive/460468583/cells_ff.vh.v\n             data/full_repos/permissive/460468583/data/yosys/ecp5,data/full_repos/permissive/460468583/cells_ff.vh.sv\n             cells_ff.vh\n             cells_ff.vh.v\n             cells_ff.vh.sv\n             obj_dir/cells_ff.vh\n             obj_dir/cells_ff.vh.v\n             obj_dir/cells_ff.vh.sv\n%Error: data/full_repos/permissive/460468583/data/yosys/ecp5/cells_map.v:100: Cannot find include file: cells_io.vh\n`include "cells_io.vh" \n         ^~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n'
module  \$_SDFFE_NP1P_ (input D, C, E, R, output Q); TRELLIS_FF #(.GSR("AUTO"), .CEMUX("CE"), .CLKMUX("INV"), .LSRMUX("LSR"), .REGSET("SET"), .SRMODE("LSR_OVER_CE"))  _TECHMAP_REPLACE_ (.CLK(C), .CE(E), .LSR(R), .DI(D), .Q(Q)); wire _TECHMAP_REMOVEINIT_Q_ = 1'b1; endmodule
module  \$_SDFFE_NP1P_ (input D, C, E, R, output Q);
 TRELLIS_FF #(.GSR("AUTO"), .CEMUX("CE"), .CLKMUX("INV"), .LSRMUX("LSR"), .REGSET("SET"), .SRMODE("LSR_OVER_CE"))  _TECHMAP_REPLACE_ (.CLK(C), .CE(E), .LSR(R), .DI(D), .Q(Q)); wire _TECHMAP_REMOVEINIT_Q_ = 1'b1; endmodule