data/full_repos/permissive/482974936/MultiCycle.srcs/sources_1/new/AND.v
data/verilator_xmls/344b7525-9652-4633-9d43-a12edc91c30b.xml
module AND(
    input Branch,
    input Zero,
    output ANDOut
    );  
    assign  ANDOut = Branch & Zero;
endmodule
module AND(
    input Branch,
    input Zero,
    output ANDOut
    );
  
    assign  ANDOut = Branch & Zero;
endmodule