data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v:25: Unsupported: Ignoring delay on this delayed statement.\n        #10 \n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v:30: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v:35: Unsupported: Ignoring delay on this delayed statement.\n        #10 \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v:40: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v:45: Unsupported: Ignoring delay on this delayed statement.\n        #10 \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v:50: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v:55: Unsupported: Ignoring delay on this delayed statement.\n        #10 \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v:60: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v:65: Unsupported: Ignoring delay on this delayed statement.\n        #10 \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v:70: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v:75: Unsupported: Ignoring delay on this delayed statement.\n        #10 \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v:80: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Error: data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v:85: Unsupported or unknown PLI call: $dumpfile\n            $dumpfile("boundingBoxGen_Test.vcd");\n            ^~~~~~~~~\n%Error: data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v:86: Unsupported or unknown PLI call: $dumpvars\n            $dumpvars(0,boundingBoxGen_Test);\n            ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/499944578/rtl/test/bounding_box_traverser/boundingBoxGen_Test.v:87: Unsupported: Ignoring delay on this delayed statement.\n            #1;\n            ^\n%Error: Exiting due to 2 error(s), 13 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module boundingBoxGen_Test ();
    reg [31:0] resx, resy;
    wire [31:0] Top,Bottom,Left, Right;

    reg [63:0] Pa, Pb, Pc;
    wire [65:0] PaRecFN, PbRecFN, PcRecFN;
    fNToRecFN#(8,24) fNToRecFN9 (Pa[63:32], PaRecFN[65:33]);
    fNToRecFN#(8,24) fNToRecFN10 (Pa[31:0], PaRecFN[32:0]);

    fNToRecFN#(8,24) fNToRecFn11 (Pb[63:32], PbRecFN[65:33]);
    fNToRecFN#(8,24) fNToRecFN12 (Pb[31:0], PbRecFN[32:0]);

    fNToRecFN#(8,24) fNToRecFN13 (Pc[63:32], PcRecFN[65:33]);
    fNToRecFN#(8,24) fNToRecFN14 (Pc[31:0], PcRecFN[32:0]);
    boundingBoxGen DUT(PaRecFN,PbRecFN,PcRecFN,Top,Bottom,Right,Left,resx,resy);

    initial begin
        $display("Starting");
        resx = 32'd1920;
        resy = 32'd1080;

        Pa = {32'h409ccccd,32'h4098f5c3};
        Pb = {32'h4119999a, 32'h4194cccd};
        Pc = {32'h4149999a, 32'h3fa66666};
        #10 
        $display("t,b,l,r: (%d,%d,%d,%d)", Top, Bottom, Left, Right);
        if((Top == 32'd1) && (Bottom == 32'd19) && (Left == 32'd4) && (Right == 32'd13)) begin
            $display("basic tst passed");
        end
        #10

        Pa = {32'h409ccccd,32'h4098f5c3};
        Pb = {32'h4119999a, 32'h4194cccd};
        Pc = {32'h44f45666, 32'h3fa66666};
        #10 
        $display("t,b,l,r: (%d,%d,%d,%d)", Top, Bottom, Left, Right);
        if((Top == 32'd1) && (Bottom == 32'd19) && (Left == 32'd4) && (Right == resx)) begin
            $display("right tst passed");
        end
        #10

        Pa = {32'hc0e9fbe7,32'h4098f5c3};
        Pb = {32'h4119999a, 32'h4194cccd};
        Pc = {32'h4149999a, 32'h3fa66666};
        #10 
        $display("t,b,l,r: (%d,%d,%d,%d)", Top, Bottom, Left, Right);
        if((Top == 32'd1) && (Bottom == 32'd19) && (Left == 32'd0) && (Right == 32'd13)) begin
            $display("left tst passed");
        end
        #10

        Pa = {32'h409ccccd,32'h4098f5c3};
        Pb = {32'h4119999a, 32'h4194cccd};
        Pc = {32'h4149999a, 32'hc2f6af1b};
        #10 
        $display("t,b,l,r: (%d,%d,%d,%d)", Top, Bottom, Left, Right);
        if((Top == 32'd0) && (Bottom == 32'd19) && (Left == 32'd4) && (Right == 32'd13)) begin
            $display("top tst passed");
        end
        #10

        Pa = {32'h409ccccd,32'h4098f5c3};
        Pb = {32'h4119999a, 32'h4620d767};
        Pc = {32'h4149999a, 32'h3fa66666};
        #10 
        $display("t,b,l,r: (%d,%d,%d,%d)", Top, Bottom, Left, Right);
        if((Top == 32'd1) && (Bottom == resy) && (Left == 32'd4) && (Right == 32'd13)) begin
            $display("bottom tst passed");
        end
        #10

        Pa = {32'hc0e9fbe7,32'h4098f5c3};
        Pb = {32'h4119999a, 32'h4620d767};
        Pc = {32'h4149999a, 32'h3fa66666};
        #10 
        $display("t,b,l,r: (%d,%d,%d,%d)", Top, Bottom, Left, Right);
        if((Top == 32'd1) && (Bottom == resy) && (Left == 32'd0) && (Right == 32'd13)) begin
            $display("bottom,left tst passed");
        end
        #10
        $finish;
    end
    initial
        begin
            $dumpfile("boundingBoxGen_Test.vcd");
            $dumpvars(0,boundingBoxGen_Test);
            #1;
        end
endmodule
module boundingBoxGen_Test ();

    reg [31:0] resx, resy;
    wire [31:0] Top,Bottom,Left, Right;

    reg [63:0] Pa, Pb, Pc;
    wire [65:0] PaRecFN, PbRecFN, PcRecFN;
    fNToRecFN#(8,24) fNToRecFN9 (Pa[63:32], PaRecFN[65:33]);
    fNToRecFN#(8,24) fNToRecFN10 (Pa[31:0], PaRecFN[32:0]);

    fNToRecFN#(8,24) fNToRecFn11 (Pb[63:32], PbRecFN[65:33]);
    fNToRecFN#(8,24) fNToRecFN12 (Pb[31:0], PbRecFN[32:0]);

    fNToRecFN#(8,24) fNToRecFN13 (Pc[63:32], PcRecFN[65:33]);
    fNToRecFN#(8,24) fNToRecFN14 (Pc[31:0], PcRecFN[32:0]);
    boundingBoxGen DUT(PaRecFN,PbRecFN,PcRecFN,Top,Bottom,Right,Left,resx,resy);

    initial begin
        $display("Starting");
        resx = 32'd1920;
        resy = 32'd1080;

        Pa = {32'h409ccccd,32'h4098f5c3};
        Pb = {32'h4119999a, 32'h4194cccd};
        Pc = {32'h4149999a, 32'h3fa66666};
        #10 
        $display("t,b,l,r: (%d,%d,%d,%d)", Top, Bottom, Left, Right);
        if((Top == 32'd1) && (Bottom == 32'd19) && (Left == 32'd4) && (Right == 32'd13)) begin
            $display("basic tst passed");
        end
        #10

        Pa = {32'h409ccccd,32'h4098f5c3};
        Pb = {32'h4119999a, 32'h4194cccd};
        Pc = {32'h44f45666, 32'h3fa66666};
        #10 
        $display("t,b,l,r: (%d,%d,%d,%d)", Top, Bottom, Left, Right);
        if((Top == 32'd1) && (Bottom == 32'd19) && (Left == 32'd4) && (Right == resx)) begin
            $display("right tst passed");
        end
        #10

        Pa = {32'hc0e9fbe7,32'h4098f5c3};
        Pb = {32'h4119999a, 32'h4194cccd};
        Pc = {32'h4149999a, 32'h3fa66666};
        #10 
        $display("t,b,l,r: (%d,%d,%d,%d)", Top, Bottom, Left, Right);
        if((Top == 32'd1) && (Bottom == 32'd19) && (Left == 32'd0) && (Right == 32'd13)) begin
            $display("left tst passed");
        end
        #10

        Pa = {32'h409ccccd,32'h4098f5c3};
        Pb = {32'h4119999a, 32'h4194cccd};
        Pc = {32'h4149999a, 32'hc2f6af1b};
        #10 
        $display("t,b,l,r: (%d,%d,%d,%d)", Top, Bottom, Left, Right);
        if((Top == 32'd0) && (Bottom == 32'd19) && (Left == 32'd4) && (Right == 32'd13)) begin
            $display("top tst passed");
        end
        #10

        Pa = {32'h409ccccd,32'h4098f5c3};
        Pb = {32'h4119999a, 32'h4620d767};
        Pc = {32'h4149999a, 32'h3fa66666};
        #10 
        $display("t,b,l,r: (%d,%d,%d,%d)", Top, Bottom, Left, Right);
        if((Top == 32'd1) && (Bottom == resy) && (Left == 32'd4) && (Right == 32'd13)) begin
            $display("bottom tst passed");
        end
        #10

        Pa = {32'hc0e9fbe7,32'h4098f5c3};
        Pb = {32'h4119999a, 32'h4620d767};
        Pc = {32'h4149999a, 32'h3fa66666};
        #10 
        $display("t,b,l,r: (%d,%d,%d,%d)", Top, Bottom, Left, Right);
        if((Top == 32'd1) && (Bottom == resy) && (Left == 32'd0) && (Right == 32'd13)) begin
            $display("bottom,left tst passed");
        end
        #10
        $finish;
    end
    initial
        begin
            $dumpfile("boundingBoxGen_Test.vcd");
            $dumpvars(0,boundingBoxGen_Test);
            #1;
        end
endmodule