data/full_repos/permissive/52703097/mux.v
data/verilator_xmls/7a238cd9-5330-4d90-ad29-b8d49e0f4842.xml
module mux(
    i_data,
    i_select,
    o_result);

    parameter width = 32;
    parameter channels = 5;

    input [width - 1:0] i_data;
    input [channels - 1:0] i_select;
    output o_result;

    assign o_result = i_data[i_select];
endmodule
module mux(
    i_data,
    i_select,
    o_result);


    parameter width = 32;
    parameter channels = 5;

    input [width - 1:0] i_data;
    input [channels - 1:0] i_select;
    output o_result;

    assign o_result = i_data[i_select];
endmodule