data/full_repos/permissive/445695969/src_rtl/unprotected/deoxys_rnd.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/445695969/src_rtl/unprotected/deoxys_rnd.v:128: Multiple top level modules\n                                                                                            : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                            : ... Top module \'deoxys_rnd\'\nmodule deoxys_rnd ( \n       ^~~~~~~~~~\n                                                                                            : ... Top module \'aes_sbox\'\nmodule aes_sbox ( \n       ^~~~~~~~\n                                                                                            : ... Top module \'deoxys_lfsr2_16\'\nmodule deoxys_lfsr2_16 ( \n       ^~~~~~~~~~~~~~~\n                                                                                            : ... Top module \'deoxys_lfsr3_16\'\nmodule deoxys_lfsr3_16 ( \n       ^~~~~~~~~~~~~~~\n%Warning-LITENDIAN: data/full_repos/permissive/445695969/src_rtl/unprotected/deoxys_rnd.v:536: Little bit endian vector: MSB < LSB of bit range: 0:7\n   wire [0:7]         s, x;\n        ^\n%Warning-WIDTH: data/full_repos/permissive/445695969/src_rtl/unprotected/deoxys_rnd.v:91: Operator ASSIGNW expects 6 bits on the Assign RHS, but Assign RHS\'s SEL generates 8 bits.\n                                                                                        : ... In instance deoxys_rnd\n         assign rndconstant[i] = constant[7+8*i:0+8*i];\n                               ^\n%Warning-WIDTH: data/full_repos/permissive/445695969/src_rtl/unprotected/deoxys_rnd.v:101: Operator XOR expects 128 bits on the RHS, but RHS\'s REPLICATE generates 120 bits.\n                                                                                         : ... In instance deoxys_rnd\n         assign rkey[i] = rndkey[i] ^ rndcnt[i] ^ rndtweak[i] ^\n                                                              ^\n%Warning-WIDTH: data/full_repos/permissive/445695969/src_rtl/unprotected/deoxys_rnd.v:835: Operator ASSIGNW expects 8 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 9 bits.\n                                                                                         : ... In instance deoxys_lfsr3_16\n            assign m[i+1][7+8*j:8*j] = {m[i][6]^m[i][0],m[i][7+8*j:8*j]};\n                                     ^\n%Error: Exiting due to 5 warning(s)\n'
module deoxys_rnd (

   nextcnt, nextkey, nexttweak, nextstate,

   roundkey, roundtweak, roundstate, roundcnt, constant
   ) ;
   parameter numrnd = 16;
   parameter fullcnt = 1;

   output [63+64*fullcnt:0] nextcnt;
   output [127:0]           nextkey, nexttweak, nextstate;
   input [127:0]            roundkey, roundtweak, roundstate;
   input [63+64*fullcnt:0]  roundcnt;
   input [7+8*(numrnd-1):0] constant;

   genvar                   i, j;

   wire [63+64*fullcnt:0]   rndcnt [numrnd:0];
   wire [127:0]             sb [0:numrnd-1];
   wire [127:0]             rkey [0:numrnd];
   wire [127:0]             atk [0:numrnd-1];
   wire [127:0]             shr [0:numrnd-1];
   wire [127:0]             x2 [0:numrnd-1];
   wire [127:0]             x3 [0:numrnd-1];
   wire [127:0]             mxc [0:numrnd-1];
   wire [127:0]             rndkey [0:numrnd];
   wire [127:0]             rndtweak [0:numrnd];

   wire [5:0]               rndconstant [numrnd:0];

   assign atk[0] = rkey[0] ^ roundstate;
   
   generate
      for (i = 0; i < numrnd; i = i + 1) begin:unrolled_rounds

         for (j = 0; j < 16; j = j + 1) begin:sbox_layer
            S sboxi (.Q(sb[i][8*j+7:8*j]),
                         .A(atk[i][8*j+7:8*j]));
         end


         assign shr[i][127:96] =  sb[i][127:96];
         assign shr[i][ 95:64] = {sb[i][ 87:64],sb[i][95:88]};
         assign shr[i][ 63:32] = {sb[i][ 47:32],sb[i][63:48]};
         assign shr[i][ 31: 0] = {sb[i][  7: 0],sb[i][31: 8]};


         for (j = 0; j < 16; j = j + 1) begin:mxc_coeff
            assign x2[i][8*j+7:8*j] = {shr[i][8*j+6:8*j],1'b0} ^
                                       {3'b0,shr[i][8*j+7],
                                        shr[i][8*j+7],
                                        1'b0,
                                        shr[i][8*j+7],
                                        shr[i][8*j+7]
                                       };
            assign x3[i][8*j+7:8*j] = x2[i][8*j+7:8*j] ^
                                      shr[i][8*j+7:8*j];
         end


         assign mxc[i][127:96] = x2[i][127:96] ^
                                 x3[i][95:64] ^
                                 shr[i][63:32] ^
                                 shr[i][31:0];
         assign mxc[i][95:64]  = shr[i][127:96] ^
                                 x2[i][95:64] ^
                                 x3[i][63:32] ^
                                 shr[i][31:0];
         assign mxc[i][63:32]  = shr[i][127:96] ^
                                 shr[i][95:64] ^
                                 x2[i][63:32] ^
                                 x3[i][31:0];
         assign mxc[i][31:0]   = x3[i][127:96] ^
                                 shr[i][95:64] ^
                                 shr[i][63:32] ^
                                 x2[i][31:0];

         if (i < (numrnd-1)) begin:second_atk
            assign atk[i+1] = rkey[i+1] ^ mxc[i];
         end
      end



      assign nextstate = mxc[numrnd-1] ^ rkey[numrnd];
      
   endgenerate

   generate
      for (i = 0; i < numrnd; i = i + 1) begin:round_constant
         assign rndconstant[i] = constant[7+8*i:0+8*i];
      end
   endgenerate

   generate
      for (i = 0; i < numrnd; i = i + 1) begin:keyexpansion
         key_expansion tk3 (.ko(rndkey[i+1]),.ki(rndkey[i]));
         tweak2_expansion tk2 (.ko(rndtweak[i+1]),.ki(rndtweak[i]));
         tweak1_expansion tk1 (.ko(rndcnt[i+1]),.ki(rndcnt[i]));

         assign rkey[i] = rndkey[i] ^ rndcnt[i] ^ rndtweak[i] ^
                           {8'h01,rndconstant[i],16'h0000,
                            8'h02,rndconstant[i],16'h0000,
                            8'h04,rndconstant[i],16'h0000,
                            8'h08,rndconstant[i],16'h0000
                           };

      end
      assign rkey[numrnd] = rndkey[numrnd] ^ rndcnt[numrnd] ^ rndtweak[numrnd] ^
		                           {8'h01,8'h72,16'h0000,
					    8'h02,8'h72,16'h0000,
					    8'h04,8'h72,16'h0000,
					    8'h08,8'h72,16'h0000
					    };
      
   endgenerate

   assign rndkey[0] = roundkey;
   assign rndtweak[0] = roundtweak;
   assign rndcnt[0] = roundcnt;

   assign nextkey = rndkey[numrnd];
   assign nexttweak = rndtweak[numrnd];
   assign nextcnt = rndcnt[numrnd];
endmodule
module deoxys_rnd (

   nextcnt, nextkey, nexttweak, nextstate,

   roundkey, roundtweak, roundstate, roundcnt, constant
   ) ;

   parameter numrnd = 16;
   parameter fullcnt = 1;

   output [63+64*fullcnt:0] nextcnt;
   output [127:0]           nextkey, nexttweak, nextstate;
   input [127:0]            roundkey, roundtweak, roundstate;
   input [63+64*fullcnt:0]  roundcnt;
   input [7+8*(numrnd-1):0] constant;

   genvar                   i, j;

   wire [63+64*fullcnt:0]   rndcnt [numrnd:0];
   wire [127:0]             sb [0:numrnd-1];
   wire [127:0]             rkey [0:numrnd];
   wire [127:0]             atk [0:numrnd-1];
   wire [127:0]             shr [0:numrnd-1];
   wire [127:0]             x2 [0:numrnd-1];
   wire [127:0]             x3 [0:numrnd-1];
   wire [127:0]             mxc [0:numrnd-1];
   wire [127:0]             rndkey [0:numrnd];
   wire [127:0]             rndtweak [0:numrnd];

   wire [5:0]               rndconstant [numrnd:0];

   assign atk[0] = rkey[0] ^ roundstate;
   
   generate
      for (i = 0; i < numrnd; i = i + 1) begin:unrolled_rounds

         for (j = 0; j < 16; j = j + 1) begin:sbox_layer
            S sboxi (.Q(sb[i][8*j+7:8*j]),
                         .A(atk[i][8*j+7:8*j]));
         end


         assign shr[i][127:96] =  sb[i][127:96];
         assign shr[i][ 95:64] = {sb[i][ 87:64],sb[i][95:88]};
         assign shr[i][ 63:32] = {sb[i][ 47:32],sb[i][63:48]};
         assign shr[i][ 31: 0] = {sb[i][  7: 0],sb[i][31: 8]};


         for (j = 0; j < 16; j = j + 1) begin:mxc_coeff
            assign x2[i][8*j+7:8*j] = {shr[i][8*j+6:8*j],1'b0} ^
                                       {3'b0,shr[i][8*j+7],
                                        shr[i][8*j+7],
                                        1'b0,
                                        shr[i][8*j+7],
                                        shr[i][8*j+7]
                                       };
            assign x3[i][8*j+7:8*j] = x2[i][8*j+7:8*j] ^
                                      shr[i][8*j+7:8*j];
         end


         assign mxc[i][127:96] = x2[i][127:96] ^
                                 x3[i][95:64] ^
                                 shr[i][63:32] ^
                                 shr[i][31:0];
         assign mxc[i][95:64]  = shr[i][127:96] ^
                                 x2[i][95:64] ^
                                 x3[i][63:32] ^
                                 shr[i][31:0];
         assign mxc[i][63:32]  = shr[i][127:96] ^
                                 shr[i][95:64] ^
                                 x2[i][63:32] ^
                                 x3[i][31:0];
         assign mxc[i][31:0]   = x3[i][127:96] ^
                                 shr[i][95:64] ^
                                 shr[i][63:32] ^
                                 x2[i][31:0];

         if (i < (numrnd-1)) begin:second_atk
            assign atk[i+1] = rkey[i+1] ^ mxc[i];
         end
      end



      assign nextstate = mxc[numrnd-1] ^ rkey[numrnd];
      
   endgenerate

   generate
      for (i = 0; i < numrnd; i = i + 1) begin:round_constant
         assign rndconstant[i] = constant[7+8*i:0+8*i];
      end
   endgenerate

   generate
      for (i = 0; i < numrnd; i = i + 1) begin:keyexpansion
         key_expansion tk3 (.ko(rndkey[i+1]),.ki(rndkey[i]));
         tweak2_expansion tk2 (.ko(rndtweak[i+1]),.ki(rndtweak[i]));
         tweak1_expansion tk1 (.ko(rndcnt[i+1]),.ki(rndcnt[i]));

         assign rkey[i] = rndkey[i] ^ rndcnt[i] ^ rndtweak[i] ^
                           {8'h01,rndconstant[i],16'h0000,
                            8'h02,rndconstant[i],16'h0000,
                            8'h04,rndconstant[i],16'h0000,
                            8'h08,rndconstant[i],16'h0000
                           };

      end
      assign rkey[numrnd] = rndkey[numrnd] ^ rndcnt[numrnd] ^ rndtweak[numrnd] ^
		                           {8'h01,8'h72,16'h0000,
					    8'h02,8'h72,16'h0000,
					    8'h04,8'h72,16'h0000,
					    8'h08,8'h72,16'h0000
					    };
      
   endgenerate

   assign rndkey[0] = roundkey;
   assign rndtweak[0] = roundtweak;
   assign rndcnt[0] = roundcnt;

   assign nextkey = rndkey[numrnd];
   assign nexttweak = rndtweak[numrnd];
   assign nextcnt = rndcnt[numrnd];
endmodule