data/full_repos/permissive/463481430/RTL/periph/sdram2rib.v
1: b"%Error: data/full_repos/permissive/463481430/RTL/periph/sdram2rib.v:61: Cannot find file containing module: 'sdr_as_ram'\nsdr_as_ram #( \n^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/463481430/RTL/periph,data/full_repos/permissive/463481430/sdr_as_ram\n             data/full_repos/permissive/463481430/RTL/periph,data/full_repos/permissive/463481430/sdr_as_ram.v\n             data/full_repos/permissive/463481430/RTL/periph,data/full_repos/permissive/463481430/sdr_as_ram.sv\n             sdr_as_ram\n             sdr_as_ram.v\n             sdr_as_ram.sv\n             obj_dir/sdr_as_ram\n             obj_dir/sdr_as_ram.v\n             obj_dir/sdr_as_ram.sv\n%Error: data/full_repos/permissive/463481430/RTL/periph/sdram2rib.v:96: Cannot find file containing module: 'SDRAM'\nSDRAM sdram(\n^~~~~\n%Error: Exiting due to 2 error(s)\n"
module SDRAM (
    clk,
    ras_n,
    cas_n,
    we_n,
    addr,
    ba,
    dq,
    cs_n,
    dm0,
    dm1,
    dm2,
    dm3,
    cke
);

input         clk;
input         ras_n;
input         cas_n;
input         we_n;
input  [10:0] addr;
input  [1:0]  ba;
inout  [31:0] dq;
input         cs_n;
input         dm0;
input         dm1;
input         dm2;
input         dm3;
input         cke;

endmodule
module SDRAM (
    clk,
    ras_n,
    cas_n,
    we_n,
    addr,
    ba,
    dq,
    cs_n,
    dm0,
    dm1,
    dm2,
    dm3,
    cke
);


input         clk;
input         ras_n;
input         cas_n;
input         we_n;
input  [10:0] addr;
input  [1:0]  ba;
inout  [31:0] dq;
input         cs_n;
input         dm0;
input         dm1;
input         dm2;
input         dm3;
input         cke;

endmodule