data/full_repos/permissive/500128826/but-2-led-Blocking-NonBlocking/top.v
data/verilator_xmls/03323b66-c0ed-4b22-9655-63a864fd8435.xml
module top (
    input  wire CLK,
    input  wire BUT1,
    output wire LED1,
    output wire LED2
);

  blocking blk1 (
      CLK,
      BUT1,
      LED1
  );
  nonblocking nblk1 (
      CLK,
      BUT1,
      LED2
  );

endmodule
module top (
    input  wire CLK,
    input  wire BUT1,
    output wire LED1,
    output wire LED2
);


  blocking blk1 (
      CLK,
      BUT1,
      LED1
  );
  nonblocking nblk1 (
      CLK,
      BUT1,
      LED2
  );

endmodule