data/full_repos/permissive/433174928/Project_Vivado/Project_Vivado.srcs/sources_1/new/IMem.v
1: b'%Warning-WIDTH: data/full_repos/permissive/433174928/Project_Vivado/Project_Vivado.srcs/sources_1/new/IMem.v:35: Bit extraction of array[511:0] requires 9 bit index, not 11 bits.\n                                                                                                               : ... In instance IMem\n            instruction <= rom[addr];\n                              ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module IMem(
    input wire clk,
    input wire rd,
    input wire [31:0] addr_in,
    output wire [31:0] instr_out 
    );
   

    reg [31:0] rom [0:`ROM_LENGTH_WORDS-1]; 
    

    reg [31:0] instruction;
    

    initial begin
        $readmemh("imem.mem", rom); 
    end


    wire [10:0] addr = (addr_in[`ROM_ADDR_BITS-1:0] >> 2);

    always @(posedge clk) begin
        if(rd)
            instruction <= rom[addr];
    end
    
    assign instr_out = instruction;
    
endmodule
module IMem(
    input wire clk,
    input wire rd,
    input wire [31:0] addr_in,
    output wire [31:0] instr_out 
    );

   

    reg [31:0] rom [0:`ROM_LENGTH_WORDS-1]; 
    

    reg [31:0] instruction;
    

    initial begin
        $readmemh("imem.mem", rom); 
    end


    wire [10:0] addr = (addr_in[`ROM_ADDR_BITS-1:0] >> 2);

    always @(posedge clk) begin
        if(rd)
            instruction <= rom[addr];
    end
    
    assign instr_out = instruction;
    
endmodule