data/full_repos/permissive/44788221/Final System Code/SYSTEMV3/Source/main.v
1: b'%Error: Cannot find file containing module: System\n        ... Looked in:\n             data/full_repos/permissive/44788221/Final/System\n             data/full_repos/permissive/44788221/Final/System.v\n             data/full_repos/permissive/44788221/Final/System.sv\n             System\n             System.v\n             System.sv\n             obj_dir/System\n             obj_dir/System.v\n             obj_dir/System.sv\n%Error: Cannot find file containing module: Code/SYSTEMV3/Source,data/full_repos/permissive/44788221\n%Error: Cannot find file containing module: data/full_repos/permissive/44788221/Final\n%Error: Cannot find file containing module: Code/SYSTEMV3/Source/main.v\n%Error: Exiting due to 4 error(s)\n'
module main(
	input 				iCLK_50,
	
	input		[17:0]	iSW,
	input 	[3:0]		iKEY,
	
	output	[17:0]	oLEDR,
	output	[8:0]		oLEDG,
	
	output	[6:0]		oHEX0_D, oHEX1_D, oHEX2_D, oHEX3_D, oHEX4_D, oHEX5_D, oHEX6_D, oHEX7_D,
	
	inout		[31:0]	GPIO_0, GPIO_1,
	
	output				oLCD_ON,
	output				oLCD_BLON,
	output				oLCD_EN,
	output				oLCD_RW,
	output				oLCD_RS,
	inout		[7:0]		LCD_D,
	
	inout		[31:0]	SRAM_DQ,
	inout		[3:0]		SRAM_DPA,
	output	[20:0]	oSRAM_A,
	output				oSRAM_ADSC_N,
	output				oSRAM_ADSP_N,
	output				oSRAM_ADV_N,
	output	[3:0]		oSRAM_BE_N,
	output				oSRAM_CE1_N,
	output				oSRAM_CE2,
	output				oSRAM_CE3_N,
	output				oSRAM_CLK,
	output				oSRAM_GW_N,
	output				oSRAM_OE_N,
	output				oSRAM_WE_N
);
	
	
	
	




	wire 					CLK_FAST, CLK_SRAM, CLK_40;
	
	CLKPLL				CLKPLL_inst (
		.inclk0 			( iCLK_50 						),
		.c0 				( CLK_FAST 						),
		.c1				( CLK_SRAM						),
		.c2				( CLK_40							)
	);
		




	assign	oSRAM_ADSP_N = 1'b1;
	assign	oSRAM_ADV_N = 1'b1;
	assign	oSRAM_CE2 = ~oSRAM_CE1_N;
	assign	oSRAM_CE3_N = oSRAM_CE1_N;
	assign	oSRAM_GW_N = 1'b1;
	wire [1:0]SRAM_DUMMY_ADDR;
	assign  	oSRAM_CLK = CLK_FAST;


	




	assign oLCD_ON = 		~RST;
	assign oLCD_BLON = 	RST;
	

	reg RST, RSTbar;
	always @(posedge CLK_FAST) begin
		RST 		<= ~iKEY[0];
		RSTbar 	<= iKEY[0];
	end
	
	reg ON;
	always @(posedge CLK_FAST) begin
		ON 		<= iSW[0];
	end
			

	assign 				GPIO_1[31:26] = 6'bzzzzzz;	

	












	HEX_ENCODER hex7(5'b11111,		oHEX7_D);
	HEX_ENCODER hex6(5'b11111,		oHEX6_D);
	HEX_ENCODER hex5(5'b11111,		oHEX5_D);
	HEX_ENCODER hex4(5'b11111,		oHEX4_D);
	HEX_ENCODER hex3(5'b11111,		oHEX3_D);
	HEX_ENCODER hex2(5'b11111,		oHEX2_D);
	HEX_ENCODER hex1(5'b11111,		oHEX1_D);
	HEX_ENCODER hex0(5'b11111,		oHEX0_D);
	
	
	
	




	wire NIOS_ADC_ON, NIOS_SUBTRACTOR_ON, NIOS_DETECTOR_ON, NIOS_FIFO_ADC_DATA_VALID, NIOS_FIFO_RST;
	wire [15:0] NIOS_FIFO_ADC_DATA;
	

	wire NIOS_TIMER_CH0_RST, NIOS_CHANNEL0_RD_PEAK, NIOS_CHANNEL0_PEAK_FOUND;
	wire [23:0] NIOS_CHANNEL0_THRESHOLD;
	wire [13:0] NIOS_CHANNEL0_TIME;
	wire [109:0] NIOS_CHANNEL0_YN1, NIOS_CHANNEL0_YN2, NIOS_CHANNEL0_YN3;
	

	wire NIOS_TIMER_CH1_RST, NIOS_CHANNEL1_RD_PEAK, NIOS_CHANNEL1_PEAK_FOUND;
	wire [23:0] NIOS_CHANNEL1_THRESHOLD;
	wire [13:0] NIOS_CHANNEL1_TIME;
	wire [109:0] NIOS_CHANNEL1_YN1, NIOS_CHANNEL1_YN2, NIOS_CHANNEL1_YN3;
	

	wire NIOS_TIMER_CH2_RST, NIOS_CHANNEL2_RD_PEAK, NIOS_CHANNEL2_PEAK_FOUND;
	wire [23:0] NIOS_CHANNEL2_THRESHOLD;
	wire [13:0] NIOS_CHANNEL2_TIME;
	wire [109:0] NIOS_CHANNEL2_YN1, NIOS_CHANNEL2_YN2, NIOS_CHANNEL2_YN3;
	

	wire NIOS_TIMER_CH3_RST, NIOS_CHANNEL3_RD_PEAK, NIOS_CHANNEL3_PEAK_FOUND;
	wire [23:0] NIOS_CHANNEL3_THRESHOLD;
	wire [13:0] NIOS_CHANNEL3_TIME;
	wire [109:0] NIOS_CHANNEL3_YN1, NIOS_CHANNEL3_YN2, NIOS_CHANNEL3_YN3;
	

	wire NIOS_TIMER_CH4_RST, NIOS_CHANNEL4_RD_PEAK, NIOS_CHANNEL4_PEAK_FOUND;
	wire [23:0] NIOS_CHANNEL4_THRESHOLD;
	wire [13:0] NIOS_CHANNEL4_TIME;
	wire [109:0] NIOS_CHANNEL4_YN1, NIOS_CHANNEL4_YN2, NIOS_CHANNEL4_YN3;
	
	NIOS_SYSTEMV3 NIOS_instant (
		.clk_clk									( CLK_FAST							),
		.reset_reset_n							( RSTbar								),
		
		.lcd_RS									( oLCD_RS							),
		.lcd_RW									( oLCD_RW							),
		.lcd_data								( LCD_D								),
		.lcd_E									( oLCD_EN							),
		
		.tristate_bridge_ssram_bwe_n_to_the_ssram 				(oSRAM_WE_N),
		.tristate_bridge_ssram_reset_n_to_the_ssram 				( ),
		.tristate_bridge_ssram_chipenable1_n_to_the_ssram 		(oSRAM_CE1_N),
		.tristate_bridge_ssram_bw_n_to_the_ssram 					(oSRAM_BE_N),
		.tristate_bridge_ssram_outputenable_n_to_the_ssram 	(oSRAM_OE_N),
		.tristate_bridge_ssram_adsc_n_to_the_ssram 				(oSRAM_ADSC_N),
		.tristate_bridge_ssram_address_to_the_ssram 				({oSRAM_A[17:0],SRAM_DUMMY_ADDR}),
		.tristate_bridge_ssram_data_to_and_from_the_ssram 		((SRAM_DQ)),
		
		.subtractor_on_export				( NIOS_SUBTRACTOR_ON				),
		.detector_on_export					( NIOS_DETECTOR_ON				),
		.fifo_rst_export						( NIOS_FIFO_RST					),
		
		.adc_on_export							( NIOS_ADC_ON						),
		
		.fifo_adc_data_export				( NIOS_FIFO_ADC_DATA 			),
		.fifo_adc_data_valid_export		( NIOS_FIFO_ADC_DATA_VALID		),

		.ch0_timer_rst_export        		( NIOS_TIMER_CH0_RST				),
		.ch0_thresh_export          		( NIOS_CHANNEL0_THRESHOLD		),
		.ch0_rd_peak_export					( NIOS_CHANNEL0_RD_PEAK			),
		.ch0_peak_found_export				( NIOS_CHANNEL0_PEAK_FOUND		),
		.ch0_time_export						( NIOS_CHANNEL0_TIME				),
		.ch0_yn1_u_export						( NIOS_CHANNEL0_YN1[109:96]	),
		.ch0_yn1_mu_export					( NIOS_CHANNEL0_YN1[95:64]		),
		.ch0_yn1_ml_export					( NIOS_CHANNEL0_YN1[63:32]		),
		.ch0_yn1_l_export						( NIOS_CHANNEL0_YN1[31:0]		),
		.ch0_yn2_u_export						( NIOS_CHANNEL0_YN2[109:96]	),
		.ch0_yn2_mu_export					( NIOS_CHANNEL0_YN2[95:64] 	),
		.ch0_yn2_ml_export					( NIOS_CHANNEL0_YN2[63:32] 	),
		.ch0_yn2_l_export						( NIOS_CHANNEL0_YN2[31:0] 		),
		.ch0_yn3_u_export						( NIOS_CHANNEL0_YN3[109:96]	),
		.ch0_yn3_mu_export					( NIOS_CHANNEL0_YN3[95:64]		),
		.ch0_yn3_ml_export					( NIOS_CHANNEL0_YN3[63:32]		),
`ifdef FULL_SCALE
		.ch0_yn3_l_export						( NIOS_CHANNEL0_YN3[31:0]		),
`else
		.ch0_yn3_l_export						( NIOS_CHANNEL0_YN3[31:0]		)
`endif
		
`ifdef FULL_SCALE
		.ch1_timer_rst_export				( NIOS_TIMER_CH1_RST				),
		.ch1_thresh_export					( NIOS_CHANNEL1_THRESHOLD		),
		.ch1_rd_peak_export					( NIOS_CHANNEL1_RD_PEAK			),
		.ch1_peak_found_export				( NIOS_CHANNEL1_PEAK_FOUND		),
		.ch1_time_export						( NIOS_CHANNEL1_TIME				),
		.ch1_yn1_u_export						( NIOS_CHANNEL1_YN1[109:96]	),
		.ch1_yn1_mu_export					( NIOS_CHANNEL1_YN1[95:64]		),
		.ch1_yn1_ml_export					( NIOS_CHANNEL1_YN1[63:32]		),
		.ch1_yn1_l_export						( NIOS_CHANNEL1_YN1[31:0]		),
		.ch1_yn2_u_export						( NIOS_CHANNEL1_YN2[109:96]	),
		.ch1_yn2_mu_export					( NIOS_CHANNEL1_YN2[95:64]		),
		.ch1_yn2_ml_export					( NIOS_CHANNEL1_YN2[63:32]		),
		.ch1_yn2_l_export						( NIOS_CHANNEL1_YN2[31:0]		),
		.ch1_yn3_u_export						( NIOS_CHANNEL1_YN3[109:96]	),
		.ch1_yn3_mu_export					( NIOS_CHANNEL1_YN3[95:64]		),
		.ch1_yn3_ml_export					( NIOS_CHANNEL1_YN3[63:32]		),
		.ch1_yn3_l_export						( NIOS_CHANNEL1_YN3[31:0]		),
		
		.ch2_timer_rst_export				( NIOS_TIMER_CH2_RST				),
		.ch2_thresh_export					( NIOS_CHANNEL2_THRESHOLD		),
		.ch2_rd_peak_export					( NIOS_CHANNEL2_RD_PEAK			),
		.ch2_peak_found_export				( NIOS_CHANNEL2_PEAK_FOUND		),
		.ch2_time_export						( NIOS_CHANNEL2_TIME				),
		.ch2_yn1_u_export						( NIOS_CHANNEL2_YN1[109:96]	),
		.ch2_yn1_mu_export					( NIOS_CHANNEL2_YN1[95:64]		),
		.ch2_yn1_ml_export					( NIOS_CHANNEL2_YN1[63:32]		),
		.ch2_yn1_l_export						( NIOS_CHANNEL2_YN1[31:0]		),
		.ch2_yn2_u_export						( NIOS_CHANNEL2_YN2[109:96]	),
		.ch2_yn2_mu_export					( NIOS_CHANNEL2_YN2[95:64]		),
		.ch2_yn2_ml_export					( NIOS_CHANNEL2_YN2[63:32]		),
		.ch2_yn2_l_export						( NIOS_CHANNEL2_YN2[31:0]		),
		.ch2_yn3_u_export						( NIOS_CHANNEL2_YN3[109:96]	),
		.ch2_yn3_mu_export					( NIOS_CHANNEL2_YN3[95:64]		),
		.ch2_yn3_ml_export					( NIOS_CHANNEL2_YN3[63:32]		),
		.ch2_yn3_l_export						( NIOS_CHANNEL2_YN3[31:0]		),
		
		.ch3_timer_rst_export				( NIOS_TIMER_CH3_RST				),
		.ch3_thresh_export					( NIOS_CHANNEL3_THRESHOLD		),
		.ch3_rd_peak_export					( NIOS_CHANNEL3_RD_PEAK			),
		.ch3_peak_found_export				( NIOS_CHANNEL3_PEAK_FOUND 	),
		.ch3_time_export						( NIOS_CHANNEL3_TIME				),
		.ch3_yn1_u_export						( NIOS_CHANNEL3_YN1[109:96]	),
		.ch3_yn1_mu_export					( NIOS_CHANNEL3_YN1[95:64]		),
		.ch3_yn1_ml_export					( NIOS_CHANNEL3_YN1[63:32]		),
		.ch3_yn1_l_export						( NIOS_CHANNEL3_YN1[31:0]		),
		.ch3_yn2_u_export						( NIOS_CHANNEL3_YN2[109:96]	),
		.ch3_yn2_mu_export					( NIOS_CHANNEL3_YN2[95:64]		),
		.ch3_yn2_ml_export					( NIOS_CHANNEL3_YN2[63:32]		),
		.ch3_yn2_l_export						( NIOS_CHANNEL3_YN2[31:0]		),
		.ch3_yn3_u_export						( NIOS_CHANNEL3_YN3[109:96]	),
		.ch3_yn3_mu_export					( NIOS_CHANNEL3_YN3[95:64]		),
		.ch3_yn3_ml_export					( NIOS_CHANNEL3_YN3[63:32]		),
		.ch3_yn3_l_export						( NIOS_CHANNEL3_YN3[31:0]		),
		
		.ch4_timer_rst_export				( NIOS_TIMER_CH4_RST				),
		.ch4_thresh_export					( NIOS_CHANNEL4_THRESHOLD		),
		.ch4_rd_peak_export					( NIOS_CHANNEL4_RD_PEAK			),
		.ch4_peak_found_export				( NIOS_CHANNEL4_PEAK_FOUND		),
		.ch4_time_export						( NIOS_CHANNEL4_TIME				),
		.ch4_yn1_u_export						( NIOS_CHANNEL4_YN1[109:96]	),
		.ch4_yn1_mu_export					( NIOS_CHANNEL4_YN1[95:64]		),
		.ch4_yn1_ml_export					( NIOS_CHANNEL4_YN1[63:32]		),
		.ch4_yn1_l_export						( NIOS_CHANNEL4_YN1[31:0]		),
		.ch4_yn2_u_export						( NIOS_CHANNEL4_YN2[109:96]	),
		.ch4_yn2_mu_export					( NIOS_CHANNEL4_YN2[95:64]		),
		.ch4_yn2_ml_export					( NIOS_CHANNEL4_YN2[63:32]		),
		.ch4_yn2_l_export						( NIOS_CHANNEL4_YN2[31:0]		),
		.ch4_yn3_u_export						( NIOS_CHANNEL4_YN3[109:96]	),
		.ch4_yn3_mu_export					( NIOS_CHANNEL4_YN3[95:64]		),
		.ch4_yn3_ml_export					( NIOS_CHANNEL4_YN3[63:32]		),
		.ch4_yn3_l_export						( NIOS_CHANNEL4_YN3[31:0]		)
`endif
	);
	

		
		



	wire usonicTXStart, usonicTXroundTripFlag;
	ultrasonicTransmitter usonicTX_inst(
		.SYS_CLK			( CLK_FAST					),
		.CLK_40 			( CLK_40 					),
		.RST				( RST 						), 
		.ON				( NIOS_ADC_ON & ON		),
		.burstStart		( usonicTXStart			),
		.roundTripFlag	( usonicTXroundTripFlag	),
		.pulseOutput	( GPIO_1[25:24]  			)
	);

	
	
	



	wire [12:0]	CHANNEL0_FIR_INPUT;
	
	ultrasonicReceiver #( .sampler_BITS(8), .subtractor_OFFSET(12'h7C2), .FIR_BANK(3'b000) ) 		
	usonicRX_CH0_instant (

		.SYS_CLK									( CLK_FAST								),
		.RST										( RST										),
		.RSTbar									( RSTbar									),
		.ADC_MISO								( GPIO_0[0]								),
		.ADC_MOSI								( GPIO_0[1]								),
		.ADC_SCK									( GPIO_0[3]								),
		.ADC_CSbar								( GPIO_0[5]								),
		
		.TIMER_RST								( usonicTXStart						),
		.ABS_PEAK_FLAG							( usonicTXroundTripFlag				),
		
		.NIOS_FIFO_RST							( NIOS_FIFO_RST						),
		.NIOS_ADC_ON 							( NIOS_ADC_ON							),
		.SUBTRACTOR_ON							( NIOS_SUBTRACTOR_ON					),
		
		.NIOS_FIFO_ADC_DATA_VALID 			( NIOS_FIFO_ADC_DATA_VALID			),
		.NIOS_FIFO_ADC_DATA					( NIOS_FIFO_ADC_DATA					),
		

		.NIOS_TIMER_RST						( NIOS_TIMER_CH0_RST					),
		.NIOS_THRESHOLD						( NIOS_CHANNEL0_THRESHOLD			),
		.NIOS_RD_PEAK							( NIOS_CHANNEL0_RD_PEAK				),
		.NIOS_PEAK_FOUND						( NIOS_CHANNEL0_PEAK_FOUND			),
		.NIOS_YN1								( NIOS_CHANNEL0_YN1					),
		.NIOS_YN2								( NIOS_CHANNEL0_YN2					),
		.NIOS_YN3								( NIOS_CHANNEL0_YN3					),
		.NIOS_TIME								( NIOS_CHANNEL0_TIME					),
		

		.FIR_INPUT								( CHANNEL0_FIR_INPUT					)	
	);
	
	reg CH0_DETECTION_HOLD;
	always @(posedge CLK_FAST) begin
		if (RST | ~NIOS_DETECTOR_ON)
			CH0_DETECTION_HOLD <= 0;
		else
			CH0_DETECTION_HOLD <= NIOS_CHANNEL0_PEAK_FOUND ? 1 : CH0_DETECTION_HOLD;
	end
	
	assign oLEDG[0] 		= CH0_DETECTION_HOLD;
	
	assign oLEDR[12:0] 	= CHANNEL0_FIR_INPUT;

	
`ifdef FULL_SCALE




	ultrasonicReceiver #( .sampler_BITS(8), .subtractor_OFFSET(12'h7BD), .FIR_BANK(3'b001) ) 		
	usonicRX_CH1_instant (

		.SYS_CLK									( CLK_FAST								),
		.RST										( RST										),
		.RSTbar									( RSTbar									),
		.ADC_MISO								( GPIO_0[9]								),
		.ADC_MOSI								( GPIO_0[11]							),
		.ADC_SCK									( GPIO_0[13]							),
		.ADC_CSbar								( GPIO_0[14]							),
		
		.TIMER_RST								( usonicTXStart						),
		.ABS_PEAK_FLAG							( usonicTXroundTripFlag				),
		
		.NIOS_FIFO_RST							( NIOS_FIFO_RST						),
		.NIOS_ADC_ON 							( NIOS_ADC_ON							),
		.SUBTRACTOR_ON							( NIOS_SUBTRACTOR_ON					),
		
		.NIOS_FIFO_ADC_DATA_VALID 			( NIOS_FIFO_ADC_DATA_VALID			),
		.NIOS_FIFO_ADC_DATA					( NIOS_FIFO_ADC_DATA					),
		

		.NIOS_TIMER_RST						( NIOS_TIMER_CH1_RST					),
		.NIOS_THRESHOLD						( NIOS_CHANNEL1_THRESHOLD			),
		.NIOS_RD_PEAK							( NIOS_CHANNEL1_RD_PEAK				),
		.NIOS_PEAK_FOUND						( NIOS_CHANNEL1_PEAK_FOUND			),
		.NIOS_YN1								( NIOS_CHANNEL1_YN1					),
		.NIOS_YN2								( NIOS_CHANNEL1_YN2					),
		.NIOS_YN3								( NIOS_CHANNEL1_YN3					),
		.NIOS_TIME								( NIOS_CHANNEL1_TIME					),
		

		.FIR_INPUT								( )	
	);	

	reg CH1_DETECTION_HOLD;
	always @(posedge CLK_FAST) begin
		if (RST | ~NIOS_DETECTOR_ON)
			CH1_DETECTION_HOLD <= 0;
		else
			CH1_DETECTION_HOLD <= NIOS_CHANNEL1_PEAK_FOUND ? 1 : CH1_DETECTION_HOLD;
	end
	
	assign oLEDG[1] 		= CH1_DETECTION_HOLD;





	ultrasonicReceiver #( .sampler_BITS(8), .subtractor_OFFSET(12'h7BD), .FIR_BANK(3'b010) ) 		
	usonicRX_CH2_instant (

		.SYS_CLK									( CLK_FAST								),
		.RST										( RST										),
		.RSTbar									( RSTbar									),
		.ADC_MISO								( GPIO_0[15]							),
		.ADC_MOSI								( GPIO_0[17]							),
		.ADC_SCK									( GPIO_0[19]							),
		.ADC_CSbar								( GPIO_0[21]							),
		
		.TIMER_RST								( usonicTXStart						),
		.ABS_PEAK_FLAG							( usonicTXroundTripFlag				),
		
		.NIOS_FIFO_RST							( NIOS_FIFO_RST						),
		.NIOS_ADC_ON 							( NIOS_ADC_ON							),
		.SUBTRACTOR_ON							( NIOS_SUBTRACTOR_ON					),
		
		.NIOS_FIFO_ADC_DATA_VALID 			( NIOS_FIFO_ADC_DATA_VALID			),
		.NIOS_FIFO_ADC_DATA					( NIOS_FIFO_ADC_DATA					),
		

		.NIOS_TIMER_RST						( NIOS_TIMER_CH2_RST					),
		.NIOS_THRESHOLD						( NIOS_CHANNEL2_THRESHOLD			),
		.NIOS_RD_PEAK							( NIOS_CHANNEL2_RD_PEAK				),
		.NIOS_PEAK_FOUND						( NIOS_CHANNEL2_PEAK_FOUND			),
		.NIOS_YN1								( NIOS_CHANNEL2_YN1					),
		.NIOS_YN2								( NIOS_CHANNEL2_YN2					),
		.NIOS_YN3								( NIOS_CHANNEL2_YN3					),
		.NIOS_TIME								( NIOS_CHANNEL2_TIME					),
		

		.FIR_INPUT								( )	
	);		

	reg CH2_DETECTION_HOLD;
	always @(posedge CLK_FAST) begin
		if (RST | ~NIOS_DETECTOR_ON)
			CH2_DETECTION_HOLD <= 0;
		else
			CH2_DETECTION_HOLD <= NIOS_CHANNEL2_PEAK_FOUND ? 1 : CH2_DETECTION_HOLD;
	end
	
	assign oLEDG[2] 		= CH2_DETECTION_HOLD;


	



	ultrasonicReceiver #( .sampler_BITS(8), .subtractor_OFFSET(12'h7B9), .FIR_BANK(3'b011) ) 		
	usonicRX_CH3_instant (

		.SYS_CLK									( CLK_FAST								),
		.RST										( RST										),
		.RSTbar									( RSTbar									),
		.ADC_MISO								( GPIO_0[25]							),
		.ADC_MOSI								( GPIO_0[27]							),
		.ADC_SCK									( GPIO_0[29]							),
		.ADC_CSbar								( GPIO_0[31]							),
		
		.TIMER_RST								( usonicTXStart						),
		.ABS_PEAK_FLAG							( usonicTXroundTripFlag				),
		
		.NIOS_FIFO_RST							( NIOS_FIFO_RST						),
		.NIOS_ADC_ON 							( NIOS_ADC_ON							),
		.SUBTRACTOR_ON							( NIOS_SUBTRACTOR_ON					),
		
		.NIOS_FIFO_ADC_DATA_VALID 			( NIOS_FIFO_ADC_DATA_VALID			),
		.NIOS_FIFO_ADC_DATA					( NIOS_FIFO_ADC_DATA					),
		

		.NIOS_TIMER_RST						( NIOS_TIMER_CH3_RST					),
		.NIOS_THRESHOLD						( NIOS_CHANNEL3_THRESHOLD			),
		.NIOS_RD_PEAK							( NIOS_CHANNEL3_RD_PEAK				),
		.NIOS_PEAK_FOUND						( NIOS_CHANNEL3_PEAK_FOUND			),
		.NIOS_YN1								( NIOS_CHANNEL3_YN1					),
		.NIOS_YN2								( NIOS_CHANNEL3_YN2					),
		.NIOS_YN3								( NIOS_CHANNEL3_YN3					),
		.NIOS_TIME								( NIOS_CHANNEL3_TIME					),
		

		.FIR_INPUT								( )	
	);		

	reg CH3_DETECTION_HOLD;
	always @(posedge CLK_FAST) begin
		if (RST | ~NIOS_DETECTOR_ON)
			CH3_DETECTION_HOLD <= 0;
		else
			CH3_DETECTION_HOLD <= NIOS_CHANNEL3_PEAK_FOUND ? 1 : CH3_DETECTION_HOLD;
	end
	
	assign oLEDG[3] 		= CH3_DETECTION_HOLD;

	



	ultrasonicReceiver #( .sampler_BITS(8), .subtractor_OFFSET(12'h7BF), .FIR_BANK(3'b100) ) 		
	usonicRX_CH4_instant (

		.SYS_CLK									( CLK_FAST								),
		.RST										( RST										),
		.RSTbar									( RSTbar									),
		.ADC_MISO								( GPIO_0[24]							),
		.ADC_MOSI								( GPIO_0[26]							),
		.ADC_SCK									( GPIO_0[28]							),
		.ADC_CSbar								( GPIO_0[30]							),
		
		.TIMER_RST								( usonicTXStart						),
		.ABS_PEAK_FLAG							( usonicTXroundTripFlag				),
		
		.NIOS_FIFO_RST							( NIOS_FIFO_RST						),
		.NIOS_ADC_ON 							( NIOS_ADC_ON							),
		.SUBTRACTOR_ON							( NIOS_SUBTRACTOR_ON					),
		
		.NIOS_FIFO_ADC_DATA_VALID 			( NIOS_FIFO_ADC_DATA_VALID			),
		.NIOS_FIFO_ADC_DATA					( NIOS_FIFO_ADC_DATA					),
		

		.NIOS_TIMER_RST						( NIOS_TIMER_CH4_RST					),
		.NIOS_THRESHOLD						( NIOS_CHANNEL4_THRESHOLD			),
		.NIOS_RD_PEAK							( NIOS_CHANNEL4_RD_PEAK				),
		.NIOS_PEAK_FOUND						( NIOS_CHANNEL4_PEAK_FOUND			),
		.NIOS_YN1								( NIOS_CHANNEL4_YN1					),
		.NIOS_YN2								( NIOS_CHANNEL4_YN2					),
		.NIOS_YN3								( NIOS_CHANNEL4_YN3					),
		.NIOS_TIME								( NIOS_CHANNEL4_TIME					),
		

		.FIR_INPUT								( )	
	);
	
	reg CH4_DETECTION_HOLD;
	always @(posedge CLK_FAST) begin
		if (RST | ~NIOS_DETECTOR_ON)
			CH4_DETECTION_HOLD <= 0;
		else
			CH4_DETECTION_HOLD <= NIOS_CHANNEL4_PEAK_FOUND ? 1 : CH4_DETECTION_HOLD;
	end
	
	assign oLEDG[4] 		= CH4_DETECTION_HOLD;
`endif
	
endmodule
module main(
	input 				iCLK_50,
	
	input		[17:0]	iSW,
	input 	[3:0]		iKEY,
	
	output	[17:0]	oLEDR,
	output	[8:0]		oLEDG,
	
	output	[6:0]		oHEX0_D, oHEX1_D, oHEX2_D, oHEX3_D, oHEX4_D, oHEX5_D, oHEX6_D, oHEX7_D,
	
	inout		[31:0]	GPIO_0, GPIO_1,
	
	output				oLCD_ON,
	output				oLCD_BLON,
	output				oLCD_EN,
	output				oLCD_RW,
	output				oLCD_RS,
	inout		[7:0]		LCD_D,
	
	inout		[31:0]	SRAM_DQ,
	inout		[3:0]		SRAM_DPA,
	output	[20:0]	oSRAM_A,
	output				oSRAM_ADSC_N,
	output				oSRAM_ADSP_N,
	output				oSRAM_ADV_N,
	output	[3:0]		oSRAM_BE_N,
	output				oSRAM_CE1_N,
	output				oSRAM_CE2,
	output				oSRAM_CE3_N,
	output				oSRAM_CLK,
	output				oSRAM_GW_N,
	output				oSRAM_OE_N,
	output				oSRAM_WE_N
);

	
	
	
	




	wire 					CLK_FAST, CLK_SRAM, CLK_40;
	
	CLKPLL				CLKPLL_inst (
		.inclk0 			( iCLK_50 						),
		.c0 				( CLK_FAST 						),
		.c1				( CLK_SRAM						),
		.c2				( CLK_40							)
	);
		




	assign	oSRAM_ADSP_N = 1'b1;
	assign	oSRAM_ADV_N = 1'b1;
	assign	oSRAM_CE2 = ~oSRAM_CE1_N;
	assign	oSRAM_CE3_N = oSRAM_CE1_N;
	assign	oSRAM_GW_N = 1'b1;
	wire [1:0]SRAM_DUMMY_ADDR;
	assign  	oSRAM_CLK = CLK_FAST;


	




	assign oLCD_ON = 		~RST;
	assign oLCD_BLON = 	RST;
	

	reg RST, RSTbar;
	always @(posedge CLK_FAST) begin
		RST 		<= ~iKEY[0];
		RSTbar 	<= iKEY[0];
	end
	
	reg ON;
	always @(posedge CLK_FAST) begin
		ON 		<= iSW[0];
	end
			

	assign 				GPIO_1[31:26] = 6'bzzzzzz;	

	












	HEX_ENCODER hex7(5'b11111,		oHEX7_D);
	HEX_ENCODER hex6(5'b11111,		oHEX6_D);
	HEX_ENCODER hex5(5'b11111,		oHEX5_D);
	HEX_ENCODER hex4(5'b11111,		oHEX4_D);
	HEX_ENCODER hex3(5'b11111,		oHEX3_D);
	HEX_ENCODER hex2(5'b11111,		oHEX2_D);
	HEX_ENCODER hex1(5'b11111,		oHEX1_D);
	HEX_ENCODER hex0(5'b11111,		oHEX0_D);
	
	
	
	




	wire NIOS_ADC_ON, NIOS_SUBTRACTOR_ON, NIOS_DETECTOR_ON, NIOS_FIFO_ADC_DATA_VALID, NIOS_FIFO_RST;
	wire [15:0] NIOS_FIFO_ADC_DATA;
	

	wire NIOS_TIMER_CH0_RST, NIOS_CHANNEL0_RD_PEAK, NIOS_CHANNEL0_PEAK_FOUND;
	wire [23:0] NIOS_CHANNEL0_THRESHOLD;
	wire [13:0] NIOS_CHANNEL0_TIME;
	wire [109:0] NIOS_CHANNEL0_YN1, NIOS_CHANNEL0_YN2, NIOS_CHANNEL0_YN3;
	

	wire NIOS_TIMER_CH1_RST, NIOS_CHANNEL1_RD_PEAK, NIOS_CHANNEL1_PEAK_FOUND;
	wire [23:0] NIOS_CHANNEL1_THRESHOLD;
	wire [13:0] NIOS_CHANNEL1_TIME;
	wire [109:0] NIOS_CHANNEL1_YN1, NIOS_CHANNEL1_YN2, NIOS_CHANNEL1_YN3;
	

	wire NIOS_TIMER_CH2_RST, NIOS_CHANNEL2_RD_PEAK, NIOS_CHANNEL2_PEAK_FOUND;
	wire [23:0] NIOS_CHANNEL2_THRESHOLD;
	wire [13:0] NIOS_CHANNEL2_TIME;
	wire [109:0] NIOS_CHANNEL2_YN1, NIOS_CHANNEL2_YN2, NIOS_CHANNEL2_YN3;
	

	wire NIOS_TIMER_CH3_RST, NIOS_CHANNEL3_RD_PEAK, NIOS_CHANNEL3_PEAK_FOUND;
	wire [23:0] NIOS_CHANNEL3_THRESHOLD;
	wire [13:0] NIOS_CHANNEL3_TIME;
	wire [109:0] NIOS_CHANNEL3_YN1, NIOS_CHANNEL3_YN2, NIOS_CHANNEL3_YN3;
	

	wire NIOS_TIMER_CH4_RST, NIOS_CHANNEL4_RD_PEAK, NIOS_CHANNEL4_PEAK_FOUND;
	wire [23:0] NIOS_CHANNEL4_THRESHOLD;
	wire [13:0] NIOS_CHANNEL4_TIME;
	wire [109:0] NIOS_CHANNEL4_YN1, NIOS_CHANNEL4_YN2, NIOS_CHANNEL4_YN3;
	
	NIOS_SYSTEMV3 NIOS_instant (
		.clk_clk									( CLK_FAST							),
		.reset_reset_n							( RSTbar								),
		
		.lcd_RS									( oLCD_RS							),
		.lcd_RW									( oLCD_RW							),
		.lcd_data								( LCD_D								),
		.lcd_E									( oLCD_EN							),
		
		.tristate_bridge_ssram_bwe_n_to_the_ssram 				(oSRAM_WE_N),
		.tristate_bridge_ssram_reset_n_to_the_ssram 				( ),
		.tristate_bridge_ssram_chipenable1_n_to_the_ssram 		(oSRAM_CE1_N),
		.tristate_bridge_ssram_bw_n_to_the_ssram 					(oSRAM_BE_N),
		.tristate_bridge_ssram_outputenable_n_to_the_ssram 	(oSRAM_OE_N),
		.tristate_bridge_ssram_adsc_n_to_the_ssram 				(oSRAM_ADSC_N),
		.tristate_bridge_ssram_address_to_the_ssram 				({oSRAM_A[17:0],SRAM_DUMMY_ADDR}),
		.tristate_bridge_ssram_data_to_and_from_the_ssram 		((SRAM_DQ)),
		
		.subtractor_on_export				( NIOS_SUBTRACTOR_ON				),
		.detector_on_export					( NIOS_DETECTOR_ON				),
		.fifo_rst_export						( NIOS_FIFO_RST					),
		
		.adc_on_export							( NIOS_ADC_ON						),
		
		.fifo_adc_data_export				( NIOS_FIFO_ADC_DATA 			),
		.fifo_adc_data_valid_export		( NIOS_FIFO_ADC_DATA_VALID		),

		.ch0_timer_rst_export        		( NIOS_TIMER_CH0_RST				),
		.ch0_thresh_export          		( NIOS_CHANNEL0_THRESHOLD		),
		.ch0_rd_peak_export					( NIOS_CHANNEL0_RD_PEAK			),
		.ch0_peak_found_export				( NIOS_CHANNEL0_PEAK_FOUND		),
		.ch0_time_export						( NIOS_CHANNEL0_TIME				),
		.ch0_yn1_u_export						( NIOS_CHANNEL0_YN1[109:96]	),
		.ch0_yn1_mu_export					( NIOS_CHANNEL0_YN1[95:64]		),
		.ch0_yn1_ml_export					( NIOS_CHANNEL0_YN1[63:32]		),
		.ch0_yn1_l_export						( NIOS_CHANNEL0_YN1[31:0]		),
		.ch0_yn2_u_export						( NIOS_CHANNEL0_YN2[109:96]	),
		.ch0_yn2_mu_export					( NIOS_CHANNEL0_YN2[95:64] 	),
		.ch0_yn2_ml_export					( NIOS_CHANNEL0_YN2[63:32] 	),
		.ch0_yn2_l_export						( NIOS_CHANNEL0_YN2[31:0] 		),
		.ch0_yn3_u_export						( NIOS_CHANNEL0_YN3[109:96]	),
		.ch0_yn3_mu_export					( NIOS_CHANNEL0_YN3[95:64]		),
		.ch0_yn3_ml_export					( NIOS_CHANNEL0_YN3[63:32]		),
`ifdef FULL_SCALE
		.ch0_yn3_l_export						( NIOS_CHANNEL0_YN3[31:0]		),
`else
		.ch0_yn3_l_export						( NIOS_CHANNEL0_YN3[31:0]		)
`endif
		
`ifdef FULL_SCALE
		.ch1_timer_rst_export				( NIOS_TIMER_CH1_RST				),
		.ch1_thresh_export					( NIOS_CHANNEL1_THRESHOLD		),
		.ch1_rd_peak_export					( NIOS_CHANNEL1_RD_PEAK			),
		.ch1_peak_found_export				( NIOS_CHANNEL1_PEAK_FOUND		),
		.ch1_time_export						( NIOS_CHANNEL1_TIME				),
		.ch1_yn1_u_export						( NIOS_CHANNEL1_YN1[109:96]	),
		.ch1_yn1_mu_export					( NIOS_CHANNEL1_YN1[95:64]		),
		.ch1_yn1_ml_export					( NIOS_CHANNEL1_YN1[63:32]		),
		.ch1_yn1_l_export						( NIOS_CHANNEL1_YN1[31:0]		),
		.ch1_yn2_u_export						( NIOS_CHANNEL1_YN2[109:96]	),
		.ch1_yn2_mu_export					( NIOS_CHANNEL1_YN2[95:64]		),
		.ch1_yn2_ml_export					( NIOS_CHANNEL1_YN2[63:32]		),
		.ch1_yn2_l_export						( NIOS_CHANNEL1_YN2[31:0]		),
		.ch1_yn3_u_export						( NIOS_CHANNEL1_YN3[109:96]	),
		.ch1_yn3_mu_export					( NIOS_CHANNEL1_YN3[95:64]		),
		.ch1_yn3_ml_export					( NIOS_CHANNEL1_YN3[63:32]		),
		.ch1_yn3_l_export						( NIOS_CHANNEL1_YN3[31:0]		),
		
		.ch2_timer_rst_export				( NIOS_TIMER_CH2_RST				),
		.ch2_thresh_export					( NIOS_CHANNEL2_THRESHOLD		),
		.ch2_rd_peak_export					( NIOS_CHANNEL2_RD_PEAK			),
		.ch2_peak_found_export				( NIOS_CHANNEL2_PEAK_FOUND		),
		.ch2_time_export						( NIOS_CHANNEL2_TIME				),
		.ch2_yn1_u_export						( NIOS_CHANNEL2_YN1[109:96]	),
		.ch2_yn1_mu_export					( NIOS_CHANNEL2_YN1[95:64]		),
		.ch2_yn1_ml_export					( NIOS_CHANNEL2_YN1[63:32]		),
		.ch2_yn1_l_export						( NIOS_CHANNEL2_YN1[31:0]		),
		.ch2_yn2_u_export						( NIOS_CHANNEL2_YN2[109:96]	),
		.ch2_yn2_mu_export					( NIOS_CHANNEL2_YN2[95:64]		),
		.ch2_yn2_ml_export					( NIOS_CHANNEL2_YN2[63:32]		),
		.ch2_yn2_l_export						( NIOS_CHANNEL2_YN2[31:0]		),
		.ch2_yn3_u_export						( NIOS_CHANNEL2_YN3[109:96]	),
		.ch2_yn3_mu_export					( NIOS_CHANNEL2_YN3[95:64]		),
		.ch2_yn3_ml_export					( NIOS_CHANNEL2_YN3[63:32]		),
		.ch2_yn3_l_export						( NIOS_CHANNEL2_YN3[31:0]		),
		
		.ch3_timer_rst_export				( NIOS_TIMER_CH3_RST				),
		.ch3_thresh_export					( NIOS_CHANNEL3_THRESHOLD		),
		.ch3_rd_peak_export					( NIOS_CHANNEL3_RD_PEAK			),
		.ch3_peak_found_export				( NIOS_CHANNEL3_PEAK_FOUND 	),
		.ch3_time_export						( NIOS_CHANNEL3_TIME				),
		.ch3_yn1_u_export						( NIOS_CHANNEL3_YN1[109:96]	),
		.ch3_yn1_mu_export					( NIOS_CHANNEL3_YN1[95:64]		),
		.ch3_yn1_ml_export					( NIOS_CHANNEL3_YN1[63:32]		),
		.ch3_yn1_l_export						( NIOS_CHANNEL3_YN1[31:0]		),
		.ch3_yn2_u_export						( NIOS_CHANNEL3_YN2[109:96]	),
		.ch3_yn2_mu_export					( NIOS_CHANNEL3_YN2[95:64]		),
		.ch3_yn2_ml_export					( NIOS_CHANNEL3_YN2[63:32]		),
		.ch3_yn2_l_export						( NIOS_CHANNEL3_YN2[31:0]		),
		.ch3_yn3_u_export						( NIOS_CHANNEL3_YN3[109:96]	),
		.ch3_yn3_mu_export					( NIOS_CHANNEL3_YN3[95:64]		),
		.ch3_yn3_ml_export					( NIOS_CHANNEL3_YN3[63:32]		),
		.ch3_yn3_l_export						( NIOS_CHANNEL3_YN3[31:0]		),
		
		.ch4_timer_rst_export				( NIOS_TIMER_CH4_RST				),
		.ch4_thresh_export					( NIOS_CHANNEL4_THRESHOLD		),
		.ch4_rd_peak_export					( NIOS_CHANNEL4_RD_PEAK			),
		.ch4_peak_found_export				( NIOS_CHANNEL4_PEAK_FOUND		),
		.ch4_time_export						( NIOS_CHANNEL4_TIME				),
		.ch4_yn1_u_export						( NIOS_CHANNEL4_YN1[109:96]	),
		.ch4_yn1_mu_export					( NIOS_CHANNEL4_YN1[95:64]		),
		.ch4_yn1_ml_export					( NIOS_CHANNEL4_YN1[63:32]		),
		.ch4_yn1_l_export						( NIOS_CHANNEL4_YN1[31:0]		),
		.ch4_yn2_u_export						( NIOS_CHANNEL4_YN2[109:96]	),
		.ch4_yn2_mu_export					( NIOS_CHANNEL4_YN2[95:64]		),
		.ch4_yn2_ml_export					( NIOS_CHANNEL4_YN2[63:32]		),
		.ch4_yn2_l_export						( NIOS_CHANNEL4_YN2[31:0]		),
		.ch4_yn3_u_export						( NIOS_CHANNEL4_YN3[109:96]	),
		.ch4_yn3_mu_export					( NIOS_CHANNEL4_YN3[95:64]		),
		.ch4_yn3_ml_export					( NIOS_CHANNEL4_YN3[63:32]		),
		.ch4_yn3_l_export						( NIOS_CHANNEL4_YN3[31:0]		)
`endif
	);
	

		
		



	wire usonicTXStart, usonicTXroundTripFlag;
	ultrasonicTransmitter usonicTX_inst(
		.SYS_CLK			( CLK_FAST					),
		.CLK_40 			( CLK_40 					),
		.RST				( RST 						), 
		.ON				( NIOS_ADC_ON & ON		),
		.burstStart		( usonicTXStart			),
		.roundTripFlag	( usonicTXroundTripFlag	),
		.pulseOutput	( GPIO_1[25:24]  			)
	);

	
	
	



	wire [12:0]	CHANNEL0_FIR_INPUT;
	
	ultrasonicReceiver #( .sampler_BITS(8), .subtractor_OFFSET(12'h7C2), .FIR_BANK(3'b000) ) 		
	usonicRX_CH0_instant (

		.SYS_CLK									( CLK_FAST								),
		.RST										( RST										),
		.RSTbar									( RSTbar									),
		.ADC_MISO								( GPIO_0[0]								),
		.ADC_MOSI								( GPIO_0[1]								),
		.ADC_SCK									( GPIO_0[3]								),
		.ADC_CSbar								( GPIO_0[5]								),
		
		.TIMER_RST								( usonicTXStart						),
		.ABS_PEAK_FLAG							( usonicTXroundTripFlag				),
		
		.NIOS_FIFO_RST							( NIOS_FIFO_RST						),
		.NIOS_ADC_ON 							( NIOS_ADC_ON							),
		.SUBTRACTOR_ON							( NIOS_SUBTRACTOR_ON					),
		
		.NIOS_FIFO_ADC_DATA_VALID 			( NIOS_FIFO_ADC_DATA_VALID			),
		.NIOS_FIFO_ADC_DATA					( NIOS_FIFO_ADC_DATA					),
		

		.NIOS_TIMER_RST						( NIOS_TIMER_CH0_RST					),
		.NIOS_THRESHOLD						( NIOS_CHANNEL0_THRESHOLD			),
		.NIOS_RD_PEAK							( NIOS_CHANNEL0_RD_PEAK				),
		.NIOS_PEAK_FOUND						( NIOS_CHANNEL0_PEAK_FOUND			),
		.NIOS_YN1								( NIOS_CHANNEL0_YN1					),
		.NIOS_YN2								( NIOS_CHANNEL0_YN2					),
		.NIOS_YN3								( NIOS_CHANNEL0_YN3					),
		.NIOS_TIME								( NIOS_CHANNEL0_TIME					),
		

		.FIR_INPUT								( CHANNEL0_FIR_INPUT					)	
	);
	
	reg CH0_DETECTION_HOLD;
	always @(posedge CLK_FAST) begin
		if (RST | ~NIOS_DETECTOR_ON)
			CH0_DETECTION_HOLD <= 0;
		else
			CH0_DETECTION_HOLD <= NIOS_CHANNEL0_PEAK_FOUND ? 1 : CH0_DETECTION_HOLD;
	end
	
	assign oLEDG[0] 		= CH0_DETECTION_HOLD;
	
	assign oLEDR[12:0] 	= CHANNEL0_FIR_INPUT;

	
`ifdef FULL_SCALE




	ultrasonicReceiver #( .sampler_BITS(8), .subtractor_OFFSET(12'h7BD), .FIR_BANK(3'b001) ) 		
	usonicRX_CH1_instant (

		.SYS_CLK									( CLK_FAST								),
		.RST										( RST										),
		.RSTbar									( RSTbar									),
		.ADC_MISO								( GPIO_0[9]								),
		.ADC_MOSI								( GPIO_0[11]							),
		.ADC_SCK									( GPIO_0[13]							),
		.ADC_CSbar								( GPIO_0[14]							),
		
		.TIMER_RST								( usonicTXStart						),
		.ABS_PEAK_FLAG							( usonicTXroundTripFlag				),
		
		.NIOS_FIFO_RST							( NIOS_FIFO_RST						),
		.NIOS_ADC_ON 							( NIOS_ADC_ON							),
		.SUBTRACTOR_ON							( NIOS_SUBTRACTOR_ON					),
		
		.NIOS_FIFO_ADC_DATA_VALID 			( NIOS_FIFO_ADC_DATA_VALID			),
		.NIOS_FIFO_ADC_DATA					( NIOS_FIFO_ADC_DATA					),
		

		.NIOS_TIMER_RST						( NIOS_TIMER_CH1_RST					),
		.NIOS_THRESHOLD						( NIOS_CHANNEL1_THRESHOLD			),
		.NIOS_RD_PEAK							( NIOS_CHANNEL1_RD_PEAK				),
		.NIOS_PEAK_FOUND						( NIOS_CHANNEL1_PEAK_FOUND			),
		.NIOS_YN1								( NIOS_CHANNEL1_YN1					),
		.NIOS_YN2								( NIOS_CHANNEL1_YN2					),
		.NIOS_YN3								( NIOS_CHANNEL1_YN3					),
		.NIOS_TIME								( NIOS_CHANNEL1_TIME					),
		

		.FIR_INPUT								( )	
	);	

	reg CH1_DETECTION_HOLD;
	always @(posedge CLK_FAST) begin
		if (RST | ~NIOS_DETECTOR_ON)
			CH1_DETECTION_HOLD <= 0;
		else
			CH1_DETECTION_HOLD <= NIOS_CHANNEL1_PEAK_FOUND ? 1 : CH1_DETECTION_HOLD;
	end
	
	assign oLEDG[1] 		= CH1_DETECTION_HOLD;





	ultrasonicReceiver #( .sampler_BITS(8), .subtractor_OFFSET(12'h7BD), .FIR_BANK(3'b010) ) 		
	usonicRX_CH2_instant (

		.SYS_CLK									( CLK_FAST								),
		.RST										( RST										),
		.RSTbar									( RSTbar									),
		.ADC_MISO								( GPIO_0[15]							),
		.ADC_MOSI								( GPIO_0[17]							),
		.ADC_SCK									( GPIO_0[19]							),
		.ADC_CSbar								( GPIO_0[21]							),
		
		.TIMER_RST								( usonicTXStart						),
		.ABS_PEAK_FLAG							( usonicTXroundTripFlag				),
		
		.NIOS_FIFO_RST							( NIOS_FIFO_RST						),
		.NIOS_ADC_ON 							( NIOS_ADC_ON							),
		.SUBTRACTOR_ON							( NIOS_SUBTRACTOR_ON					),
		
		.NIOS_FIFO_ADC_DATA_VALID 			( NIOS_FIFO_ADC_DATA_VALID			),
		.NIOS_FIFO_ADC_DATA					( NIOS_FIFO_ADC_DATA					),
		

		.NIOS_TIMER_RST						( NIOS_TIMER_CH2_RST					),
		.NIOS_THRESHOLD						( NIOS_CHANNEL2_THRESHOLD			),
		.NIOS_RD_PEAK							( NIOS_CHANNEL2_RD_PEAK				),
		.NIOS_PEAK_FOUND						( NIOS_CHANNEL2_PEAK_FOUND			),
		.NIOS_YN1								( NIOS_CHANNEL2_YN1					),
		.NIOS_YN2								( NIOS_CHANNEL2_YN2					),
		.NIOS_YN3								( NIOS_CHANNEL2_YN3					),
		.NIOS_TIME								( NIOS_CHANNEL2_TIME					),
		

		.FIR_INPUT								( )	
	);		

	reg CH2_DETECTION_HOLD;
	always @(posedge CLK_FAST) begin
		if (RST | ~NIOS_DETECTOR_ON)
			CH2_DETECTION_HOLD <= 0;
		else
			CH2_DETECTION_HOLD <= NIOS_CHANNEL2_PEAK_FOUND ? 1 : CH2_DETECTION_HOLD;
	end
	
	assign oLEDG[2] 		= CH2_DETECTION_HOLD;


	



	ultrasonicReceiver #( .sampler_BITS(8), .subtractor_OFFSET(12'h7B9), .FIR_BANK(3'b011) ) 		
	usonicRX_CH3_instant (

		.SYS_CLK									( CLK_FAST								),
		.RST										( RST										),
		.RSTbar									( RSTbar									),
		.ADC_MISO								( GPIO_0[25]							),
		.ADC_MOSI								( GPIO_0[27]							),
		.ADC_SCK									( GPIO_0[29]							),
		.ADC_CSbar								( GPIO_0[31]							),
		
		.TIMER_RST								( usonicTXStart						),
		.ABS_PEAK_FLAG							( usonicTXroundTripFlag				),
		
		.NIOS_FIFO_RST							( NIOS_FIFO_RST						),
		.NIOS_ADC_ON 							( NIOS_ADC_ON							),
		.SUBTRACTOR_ON							( NIOS_SUBTRACTOR_ON					),
		
		.NIOS_FIFO_ADC_DATA_VALID 			( NIOS_FIFO_ADC_DATA_VALID			),
		.NIOS_FIFO_ADC_DATA					( NIOS_FIFO_ADC_DATA					),
		

		.NIOS_TIMER_RST						( NIOS_TIMER_CH3_RST					),
		.NIOS_THRESHOLD						( NIOS_CHANNEL3_THRESHOLD			),
		.NIOS_RD_PEAK							( NIOS_CHANNEL3_RD_PEAK				),
		.NIOS_PEAK_FOUND						( NIOS_CHANNEL3_PEAK_FOUND			),
		.NIOS_YN1								( NIOS_CHANNEL3_YN1					),
		.NIOS_YN2								( NIOS_CHANNEL3_YN2					),
		.NIOS_YN3								( NIOS_CHANNEL3_YN3					),
		.NIOS_TIME								( NIOS_CHANNEL3_TIME					),
		

		.FIR_INPUT								( )	
	);		

	reg CH3_DETECTION_HOLD;
	always @(posedge CLK_FAST) begin
		if (RST | ~NIOS_DETECTOR_ON)
			CH3_DETECTION_HOLD <= 0;
		else
			CH3_DETECTION_HOLD <= NIOS_CHANNEL3_PEAK_FOUND ? 1 : CH3_DETECTION_HOLD;
	end
	
	assign oLEDG[3] 		= CH3_DETECTION_HOLD;

	



	ultrasonicReceiver #( .sampler_BITS(8), .subtractor_OFFSET(12'h7BF), .FIR_BANK(3'b100) ) 		
	usonicRX_CH4_instant (

		.SYS_CLK									( CLK_FAST								),
		.RST										( RST										),
		.RSTbar									( RSTbar									),
		.ADC_MISO								( GPIO_0[24]							),
		.ADC_MOSI								( GPIO_0[26]							),
		.ADC_SCK									( GPIO_0[28]							),
		.ADC_CSbar								( GPIO_0[30]							),
		
		.TIMER_RST								( usonicTXStart						),
		.ABS_PEAK_FLAG							( usonicTXroundTripFlag				),
		
		.NIOS_FIFO_RST							( NIOS_FIFO_RST						),
		.NIOS_ADC_ON 							( NIOS_ADC_ON							),
		.SUBTRACTOR_ON							( NIOS_SUBTRACTOR_ON					),
		
		.NIOS_FIFO_ADC_DATA_VALID 			( NIOS_FIFO_ADC_DATA_VALID			),
		.NIOS_FIFO_ADC_DATA					( NIOS_FIFO_ADC_DATA					),
		

		.NIOS_TIMER_RST						( NIOS_TIMER_CH4_RST					),
		.NIOS_THRESHOLD						( NIOS_CHANNEL4_THRESHOLD			),
		.NIOS_RD_PEAK							( NIOS_CHANNEL4_RD_PEAK				),
		.NIOS_PEAK_FOUND						( NIOS_CHANNEL4_PEAK_FOUND			),
		.NIOS_YN1								( NIOS_CHANNEL4_YN1					),
		.NIOS_YN2								( NIOS_CHANNEL4_YN2					),
		.NIOS_YN3								( NIOS_CHANNEL4_YN3					),
		.NIOS_TIME								( NIOS_CHANNEL4_TIME					),
		

		.FIR_INPUT								( )	
	);
	
	reg CH4_DETECTION_HOLD;
	always @(posedge CLK_FAST) begin
		if (RST | ~NIOS_DETECTOR_ON)
			CH4_DETECTION_HOLD <= 0;
		else
			CH4_DETECTION_HOLD <= NIOS_CHANNEL4_PEAK_FOUND ? 1 : CH4_DETECTION_HOLD;
	end
	
	assign oLEDG[4] 		= CH4_DETECTION_HOLD;
`endif
	
endmodule