data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v
1: b'%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:9: Cannot find include file: noc_parameter.vh\n    `include "noc_parameter.vh" \n             ^~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog,data/full_repos/permissive/463204869/noc_parameter.vh\n             data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog,data/full_repos/permissive/463204869/noc_parameter.vh.v\n             data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog,data/full_repos/permissive/463204869/noc_parameter.vh.sv\n             noc_parameter.vh\n             noc_parameter.vh.v\n             noc_parameter.vh.sv\n             obj_dir/noc_parameter.vh\n             obj_dir/noc_parameter.vh.v\n             obj_dir/noc_parameter.vh.sv\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:10: syntax error, unexpected \',\', expecting \'[\'\n    ,parameter                          INSTANCE_NAME       = "R1",\n    ^\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:11: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter                           INPORT_QUANT        = 1,         \n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:12: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter                           OUTPORT_QUANT       = 1,         \n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:13: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter                           MODULES_PER_ROUTER  = 1,\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:14: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter                           LINKS_PER_ROUTER    = INPORT_QUANT-1-MODULES_PER_ROUTER,     \n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:16: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter  [MOD_X_COORD_SIZE-1:0]   DIRECTION_ADD_X     = 0,\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:17: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter  [MOD_Y_COORD_SIZE-1:0]   DIRECTION_ADD_Y     = 0\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:18: syntax error, unexpected \')\', expecting \';\'\n)\n^\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:21: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire                                reset_q_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:24: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire                                rm_wrreq_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:25: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [CHIP_X_COORD_SIZE-1:0]     rm_trg_chip_x_coord_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:26: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [CHIP_Y_COORD_SIZE-1:0]     rm_trg_chip_y_coord_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:27: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [CHIP_Z_COORD_SIZE-1:0]     rm_trg_chip_z_coord_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:28: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [MOD_X_COORD_SIZE-1:0]      rm_trg_mod_x_coord_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:29: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [MOD_Y_COORD_SIZE-1:0]      rm_trg_mod_y_coord_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:30: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [MOD_Z_COORD_SIZE-1:0]      rm_trg_mod_z_coord_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:31: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [CHIP_X_COORD_SIZE-1:0]     rm_src_chip_x_coord_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:32: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [CHIP_Y_COORD_SIZE-1:0]     rm_src_chip_y_coord_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:33: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [CHIP_Z_COORD_SIZE-1:0]     rm_src_chip_z_coord_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:34: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [MOD_X_COORD_SIZE-1:0]      rm_src_mod_x_coord_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:35: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [MOD_Y_COORD_SIZE-1:0]      rm_src_mod_y_coord_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:36: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [MOD_Z_COORD_SIZE-1:0]      rm_src_mod_z_coord_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:37: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [NOC_BSEL_SIZE-1:0]         rm_bsel_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:38: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire                                rm_burst_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:39: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire                                rm_arq_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:40: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [NOC_DATA_SIZE-1:0]         rm_data0_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:41: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [NOC_DATA_SIZE-1:0]         rm_data1_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:42: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [NOC_ADDR_SIZE-1:0]         rm_addr_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:43: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [NOC_MODE_SIZE-1:0]         rm_mode_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:44: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire                                rm_stall_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:47: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire                                rm_wrreq_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:48: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [CHIP_X_COORD_SIZE-1:0]     rm_trg_chip_x_coord_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:49: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [CHIP_Y_COORD_SIZE-1:0]     rm_trg_chip_y_coord_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:50: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [CHIP_Z_COORD_SIZE-1:0]     rm_trg_chip_z_coord_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:51: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [MOD_X_COORD_SIZE-1:0]      rm_trg_mod_x_coord_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:52: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [MOD_Y_COORD_SIZE-1:0]      rm_trg_mod_y_coord_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:53: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [MOD_Z_COORD_SIZE-1:0]      rm_trg_mod_z_coord_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:54: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [CHIP_X_COORD_SIZE-1:0]     rm_src_chip_x_coord_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:55: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [CHIP_Y_COORD_SIZE-1:0]     rm_src_chip_y_coord_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:56: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [CHIP_Z_COORD_SIZE-1:0]     rm_src_chip_z_coord_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:57: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [MOD_X_COORD_SIZE-1:0]      rm_src_mod_x_coord_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:58: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [MOD_Y_COORD_SIZE-1:0]      rm_src_mod_y_coord_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:59: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [MOD_Z_COORD_SIZE-1:0]      rm_src_mod_z_coord_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:61: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [NOC_BSEL_SIZE-1:0]         rm_bsel_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:62: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [NOC_DATA_SIZE-1:0]         rm_data0_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:63: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [NOC_DATA_SIZE-1:0]         rm_data1_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:64: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [NOC_ADDR_SIZE-1:0]         rm_addr_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:65: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [NOC_MODE_SIZE-1:0]         rm_mode_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_module.v:66: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire                                rm_stall_o,\n    ^~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
function integer clogb2 (input [31:0] value_in);
        reg [31:0] value;
        begin
            value = value_in - 1;
            for (clogb2 = 0; value > 0; clogb2 = clogb2 + 1)
                value = value >> 1;
        end
    endfunction
function integer clogb2 (input [31:0] value_in);

        reg [31:0] value;
        begin
            value = value_in - 1;
            for (clogb2 = 0; value > 0; clogb2 = clogb2 + 1)
                value = value >> 1;
        end
    endfunction