data/full_repos/permissive/419273451/hw4/codes/Instruction_Memory.v
data/verilator_xmls/09e9c719-7b54-4d86-8d7f-e994772e23bc.xml
module Instruction_Memory
(
    addr_i, 
    instr_o
);


input   [31:0]      addr_i;
output  [31:0]      instr_o;


reg [31:0]     memory  [0:255];

assign  instr_o = memory[addr_i>>2];  

endmodule
module Instruction_Memory
(
    addr_i, 
    instr_o
);



input   [31:0]      addr_i;
output  [31:0]      instr_o;


reg [31:0]     memory  [0:255];

assign  instr_o = memory[addr_i>>2];  

endmodule