data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v
1: b'%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:40: Cannot find include file: openGFX430_defines.v\n`include "openGFX430_defines.v" \n         ^~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/531094269/verilog/rtl/src,data/full_repos/permissive/531094269/openGFX430_defines.v\n             data/full_repos/permissive/531094269/verilog/rtl/src,data/full_repos/permissive/531094269/openGFX430_defines.v.v\n             data/full_repos/permissive/531094269/verilog/rtl/src,data/full_repos/permissive/531094269/openGFX430_defines.v.sv\n             openGFX430_defines.v\n             openGFX430_defines.v.v\n             openGFX430_defines.v.sv\n             obj_dir/openGFX430_defines.v\n             obj_dir/openGFX430_defines.v.v\n             obj_dir/openGFX430_defines.v.sv\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:560: Cannot find include file: openGFX430_undefines.v\n`include "openGFX430_undefines.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:92: Define or directive not defined: \'`VRAM_MSB\'\noutput   [`VRAM_MSB:0] vid_ram_addr_o;             \n          ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:92: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\noutput   [`VRAM_MSB:0] vid_ram_addr_o;             \n                   ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:102: Define or directive not defined: \'`APIX_MSB\'\ninput    [`APIX_MSB:0] cfg_dst_px_addr_i;          \n          ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:102: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\ninput    [`APIX_MSB:0] cfg_dst_px_addr_i;          \n                   ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:108: Define or directive not defined: \'`LPIX_MSB\'\ninput    [`LPIX_MSB:0] cfg_rec_width_i;            \n          ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:108: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\ninput    [`LPIX_MSB:0] cfg_rec_width_i;            \n                   ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:109: Define or directive not defined: \'`LPIX_MSB\'\ninput    [`LPIX_MSB:0] cfg_rec_height_i;           \n          ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:109: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\ninput    [`LPIX_MSB:0] cfg_rec_height_i;           \n                   ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:110: Define or directive not defined: \'`APIX_MSB\'\ninput    [`APIX_MSB:0] cfg_src_px_addr_i;          \n          ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:110: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\ninput    [`APIX_MSB:0] cfg_src_px_addr_i;          \n                   ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:116: Define or directive not defined: \'`LPIX_MSB\'\ninput    [`LPIX_MSB:0] display_width_i;            \n          ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:116: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\ninput    [`LPIX_MSB:0] display_width_i;            \n                   ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:248: Define or directive not defined: \'`LPIX_MSB\'\nreg [`LPIX_MSB:0] height_cnt;\n     ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:248: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nreg [`LPIX_MSB:0] height_cnt;\n              ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:250: Define or directive not defined: \'`LPIX_MSB\'\nreg [`LPIX_MSB:0] width_cnt;\n     ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:250: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nreg [`LPIX_MSB:0] width_cnt;\n              ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:258: Define or directive not defined: \'`LPIX_MSB\'\n  if (puc_rst)              height_cnt <= {{`LPIX_MSB{1\'h0}},1\'b1};\n                                            ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:260: Define or directive not defined: \'`LPIX_MSB\'\n  else if (height_cnt_dec)  height_cnt <= height_cnt-{{`LPIX_MSB{1\'h0}},1\'b1};\n                                                       ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:262: Define or directive not defined: \'`LPIX_MSB\'\nassign                      height_cnt_done = (height_cnt=={{`LPIX_MSB{1\'h0}}, 1\'b1});\n                                                             ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:269: Define or directive not defined: \'`LPIX_MSB\'\n  if (puc_rst)              width_cnt <= {{`LPIX_MSB{1\'h0}},1\'b1};\n                                           ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:271: Define or directive not defined: \'`LPIX_MSB\'\n  else if (width_cnt_dec)   width_cnt <= width_cnt-{{`LPIX_MSB{1\'h0}},1\'b1};\n                                                     ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:273: Define or directive not defined: \'`LPIX_MSB\'\nassign            width_cnt_done = (width_cnt=={{`LPIX_MSB{1\'h0}}, 1\'b1});\n                                                 ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:283: Define or directive not defined: \'`APIX_MSB\'\nreg  [`APIX_MSB:0] vram_src_addr;\n      ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:283: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nreg  [`APIX_MSB:0] vram_src_addr;\n               ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:284: Define or directive not defined: \'`APIX_MSB\'\nwire [`APIX_MSB:0] vram_src_addr_calc;\n      ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:284: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nwire [`APIX_MSB:0] vram_src_addr_calc;\n               ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:287: Define or directive not defined: \'`APIX_MSB\'\nwire [`APIX_MSB:0] vram_src_addr_nxt  = trig_exec_i ? cfg_src_px_addr_i : vram_src_addr_calc;\n      ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:287: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nwire [`APIX_MSB:0] vram_src_addr_nxt  = trig_exec_i ? cfg_src_px_addr_i : vram_src_addr_calc;\n               ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:290: Define or directive not defined: \'`APIX_MSB\'\n  if (puc_rst)                              vram_src_addr <=  {`APIX_MSB+1{1\'b0}};\n                                                               ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:359: Define or directive not defined: \'`APIX_MSB\'\nreg  [`APIX_MSB:0] vram_dst_addr;\n      ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:359: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nreg  [`APIX_MSB:0] vram_dst_addr;\n               ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:360: Define or directive not defined: \'`APIX_MSB\'\nwire [`APIX_MSB:0] vram_dst_addr_calc;\n      ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:360: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nwire [`APIX_MSB:0] vram_dst_addr_calc;\n               ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:363: Define or directive not defined: \'`APIX_MSB\'\nwire [`APIX_MSB:0] vram_dst_addr_nxt  = trig_exec_i ? cfg_dst_px_addr_i : vram_dst_addr_calc;\n      ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:363: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nwire [`APIX_MSB:0] vram_dst_addr_nxt  = trig_exec_i ? cfg_dst_px_addr_i : vram_dst_addr_calc;\n               ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:366: Define or directive not defined: \'`APIX_MSB\'\n  if (puc_rst)                              vram_dst_addr <=  {`APIX_MSB+1{1\'b0}};\n                                                               ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:546: Define or directive not defined: \'`APIX_MSB\'\nassign      vid_ram_addr_o =  (dma_state==SRC_READ) ? vram_src_addr[`APIX_MSB:4] :\n                                                                    ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:546: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nassign      vid_ram_addr_o =  (dma_state==SRC_READ) ? vram_src_addr[`APIX_MSB:4] :\n                                                                             ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu_dma.v:547: Define or directive not defined: \'`APIX_MSB\'\n                                                      vram_dst_addr[`APIX_MSB:4] ;\n                                                                    ^~~~~~~~~\n%Error: Exiting due to 41 error(s)\n'
function [15:0] one_hot16;
   input  [3:0] binary;
   begin
      one_hot16         = 16'h0000;
      one_hot16[binary] =  1'b1;
   end
endfunction
function [15:0] one_hot16;

   input  [3:0] binary;
   begin
      one_hot16         = 16'h0000;
      one_hot16[binary] =  1'b1;
   end
endfunction