data/full_repos/permissive/42434302/ivltests/signed_pv.v
1: b'%Warning-WIDTH: data/full_repos/permissive/42434302/ivltests/signed_pv.v:25: Bit extraction of array[1:0] requires 1 bit index, not 16 bits.\n                                                                           : ... In instance top\n    $sformat(res, "%b", big_0[idxs[a]+:4]);\n                                  ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/42434302/ivltests/signed_pv.v:25: Bit extraction of var[15:0] requires 4 bit index, not 16 bits.\n                                                                           : ... In instance top\n    $sformat(res, "%b", big_0[idxs[a]+:4]);\n                             ^\n%Warning-WIDTH: data/full_repos/permissive/42434302/ivltests/signed_pv.v:40: Bit extraction of var[15:0] requires 4 bit index, not 16 bits.\n                                                                           : ... In instance top\n    $sformat(res, "%b", big_0[a+:4]);\n                             ^\n%Warning-SELRANGE: data/full_repos/permissive/42434302/ivltests/signed_pv.v:32: Selection index out of range: 18:15 outside 15:0 (adjusted +1 to account for negative lsb)\n                                                                              : ... In instance top\n    $sformat(res, "%b", big[pval+:4]);\n                           ^\n%Error: Exiting due to 4 warning(s)\n'
module top;
  parameter pval = -2;
  reg pass = 1'b1;
  reg [14:-1] big = 16'h0123;
  reg [15:0] big_0 = 16'h0123;
  reg signed [15:0] idxs [0:1];

  reg signed [15:0] a;

  reg [4*8:1] res;

  initial begin


    a = -2;
    $sformat(res, "%b", big[a+:4]);
    if (res !== "011x") begin
      $display("Failed: &PV<> check 1, expected 4'b011x, got %s.", res);
      pass = 1'b0;
    end

    a = 0;
    idxs[0] = -1;
    $sformat(res, "%b", big_0[idxs[a]+:4]);
    if (res !== "011x") begin
      $display("Failed: &PV<> check 2, expected 4'b011x, got %s.", res);
      pass = 1'b0;
    end


    $sformat(res, "%b", big[pval+:4]);
    if (res !== "011x") begin
      $display("Failed: &PV<> check 3, expected 4'b011x, got %s.", res);
      pass = 1'b0;
    end


    a = -1;
    $sformat(res, "%b", big_0[a+:4]);
    if (res !== "011x") begin
      $display("Failed: &PV<> check 4, expected 4'b011x, got %s.", res);
      pass = 1'b0;
    end

    if (pass) $display("PASSED");
  end
endmodule
module top;

  parameter pval = -2;
  reg pass = 1'b1;
  reg [14:-1] big = 16'h0123;
  reg [15:0] big_0 = 16'h0123;
  reg signed [15:0] idxs [0:1];

  reg signed [15:0] a;

  reg [4*8:1] res;

  initial begin


    a = -2;
    $sformat(res, "%b", big[a+:4]);
    if (res !== "011x") begin
      $display("Failed: &PV<> check 1, expected 4'b011x, got %s.", res);
      pass = 1'b0;
    end

    a = 0;
    idxs[0] = -1;
    $sformat(res, "%b", big_0[idxs[a]+:4]);
    if (res !== "011x") begin
      $display("Failed: &PV<> check 2, expected 4'b011x, got %s.", res);
      pass = 1'b0;
    end


    $sformat(res, "%b", big[pval+:4]);
    if (res !== "011x") begin
      $display("Failed: &PV<> check 3, expected 4'b011x, got %s.", res);
      pass = 1'b0;
    end


    a = -1;
    $sformat(res, "%b", big_0[a+:4]);
    if (res !== "011x") begin
      $display("Failed: &PV<> check 4, expected 4'b011x, got %s.", res);
      pass = 1'b0;
    end

    if (pass) $display("PASSED");
  end
endmodule