data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v
1: b'%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:10: Cannot find include file: noc_parameter.vh\n    `include "noc_parameter.vh" \n             ^~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog,data/full_repos/permissive/463204869/noc_parameter.vh\n             data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog,data/full_repos/permissive/463204869/noc_parameter.vh.v\n             data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog,data/full_repos/permissive/463204869/noc_parameter.vh.sv\n             noc_parameter.vh\n             noc_parameter.vh.v\n             noc_parameter.vh.sv\n             obj_dir/noc_parameter.vh\n             obj_dir/noc_parameter.vh.v\n             obj_dir/noc_parameter.vh.sv\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:11: syntax error, unexpected \',\', expecting \'[\'\n    ,parameter                                  INSTANCE_NAME       = "R1",\n    ^\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:12: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter                                   TOTAL_PORT_QUANT    = 1,                         \n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:13: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter                                   INPORT_QUANT        = TOTAL_PORT_QUANT-1,        \n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:14: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter                                   OUTPORT_QUANT       = TOTAL_PORT_QUANT-1,        \n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:15: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter                                   MODULES_PER_ROUTER  = 1,\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:16: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter                                   LINKS_PER_ROUTER    = TOTAL_PORT_QUANT-1-MODULES_PER_ROUTER,     \n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:17: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter   [LUT_SIZE*LINKS_PER_ROUTER-1:0] LUT_RESET_VALUE     = 0,\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:19: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter   [MOD_X_COORD_SIZE-1:0]          DIRECTION_ADD_X     = 0,\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:20: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter   [MOD_Y_COORD_SIZE-1:0]          DIRECTION_ADD_Y     = 0\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:21: syntax error, unexpected \')\', expecting \';\'\n)\n^\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:24: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire                                            reset_q_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:28: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [INPORT_QUANT*NOC_HEADER_SIZE-1:0]      header_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:29: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [INPORT_QUANT*NOC_PAYLOAD_SIZE-1:0]     payload_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:30: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [INPORT_QUANT-1:0]                      rdreq_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:31: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [INPORT_QUANT-1:0]                      flit_avail_q_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:33: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [OUTPORT_QUANT*NOC_HEADER_SIZE-1:0]     header_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:34: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [OUTPORT_QUANT*NOC_PAYLOAD_SIZE-1:0]    payload_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:35: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output  wire    [OUTPORT_QUANT-1:0]                     wrreq_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:36: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [OUTPORT_QUANT-1:0]                     stall_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:38: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input   wire    [NOC_CHIPID_SIZE-1:0]                   home_chipid_i\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:39: syntax error, unexpected \')\', expecting \',\' or \';\'\n);\n^\n%Error: data/full_repos/permissive/463204869/units/noc_router/source/rtl/verilog/router_top.v:142: syntax error, unexpected IDENTIFIER\n    router_OnOff_lut #(\n    ^~~~~~~~~~~~~~~~\n%Error: Exiting due to 23 error(s)\n'
function integer clogb2 (input [31:0] value_in);
        reg [31:0] value;
        begin
            value = value_in - 1;
            for (clogb2 = 0; value > 0; clogb2 = clogb2 + 1)
                value = value >> 1;
        end
    endfunction
function integer clogb2 (input [31:0] value_in);

        reg [31:0] value;
        begin
            value = value_in - 1;
            for (clogb2 = 0; value > 0; clogb2 = clogb2 + 1)
                value = value >> 1;
        end
    endfunction