data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/syn_lib/COUNT.v
1: b"%Error: data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/syn_lib/COUNT.v:62: Cannot find file containing module: 'ADD'\n  ADD\n  ^~~\n        ... Looked in:\n             data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/syn_lib,data/full_repos/permissive/486954482/ADD\n             data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/syn_lib,data/full_repos/permissive/486954482/ADD.v\n             data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/syn_lib,data/full_repos/permissive/486954482/ADD.sv\n             ADD\n             ADD.v\n             ADD.sv\n             obj_dir/ADD\n             obj_dir/ADD.v\n             obj_dir/ADD.sv\n%Error: data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/syn_lib/COUNT.v:96: Cannot find file containing module: 'ADD'\n  ADD\n  ^~~\n%Error: Exiting due to 2 error(s)\n"
function integer log2;
		input [31:0] value;
		reg [31:0] temp;
	begin
		temp = value;
		for (log2=0; temp>0; log2=log2+1)
			temp = temp>>1;
	end
	endfunction
function integer log2;

		input [31:0] value;
		reg [31:0] temp;
	begin
		temp = value;
		for (log2=0; temp>0; log2=log2+1)
			temp = temp>>1;
	end
	endfunction