data/full_repos/permissive/428611613/cores/axis_ram_writer_v2_0/axis_ram_writer.v
1: b'%Error: data/full_repos/permissive/428611613/cores/axis_ram_writer_v2_0/axis_ram_writer.v:114: Cannot find file containing module: \'FIFO36E1\'\n      FIFO36E1 #(\n      ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/428611613/cores/axis_ram_writer_v2_0,data/full_repos/permissive/428611613/FIFO36E1\n             data/full_repos/permissive/428611613/cores/axis_ram_writer_v2_0,data/full_repos/permissive/428611613/FIFO36E1.v\n             data/full_repos/permissive/428611613/cores/axis_ram_writer_v2_0,data/full_repos/permissive/428611613/FIFO36E1.sv\n             FIFO36E1\n             FIFO36E1.v\n             FIFO36E1.sv\n             obj_dir/FIFO36E1\n             obj_dir/FIFO36E1.v\n             obj_dir/FIFO36E1.sv\n%Warning-WIDTH: data/full_repos/permissive/428611613/cores/axis_ram_writer_v2_0/axis_ram_writer.v:149: Operator ASSIGNDLY expects 4 bits on the Assign RHS, but Assign RHS\'s CONST \'8\'h0\' generates 8 bits.\n                                                                                                     : ... In instance axis_ram_writer\n   int_res_reg <= 8\'b0;\n               ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/428611613/cores/axis_ram_writer_v2_0/axis_ram_writer.v:199: Operator ADD expects 32 bits on the RHS, but RHS\'s REPLICATE generates 19 bits.\n                                                                                                     : ... In instance axis_ram_writer\n  assign m_axi_awaddr = cfg_data + {int_addr_reg, {(ADDR_SIZE){1\'b0}}};\n                                 ^\n%Warning-WIDTH: data/full_repos/permissive/428611613/cores/axis_ram_writer_v2_0/axis_ram_writer.v:201: Operator ASSIGNW expects 3 bits on the Assign RHS, but Assign RHS\'s VARREF \'ADDR_SIZE\' generates 32 bits.\n                                                                                                     : ... In instance axis_ram_writer\n  assign m_axi_awsize = ADDR_SIZE;\n                      ^\n%Error: Exiting due to 1 error(s), 3 warning(s)\n'
function integer clogb2 (input integer value);
    for(clogb2 = 0; value > 0; clogb2 = clogb2 + 1) value = value >> 1;
  endfunction
function integer clogb2 (input integer value);

    for(clogb2 = 0; value > 0; clogb2 = clogb2 + 1) value = value >> 1;
  endfunction