data/full_repos/permissive/42178149/VGA_test.v
1: b"%Error: data/full_repos/permissive/42178149/VGA_test.v:41: Cannot find file containing module: 'VGA_Controlador'\n VGA_Controlador vsync_unit (\n ^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/42178149,data/full_repos/permissive/42178149/VGA_Controlador\n             data/full_repos/permissive/42178149,data/full_repos/permissive/42178149/VGA_Controlador.v\n             data/full_repos/permissive/42178149,data/full_repos/permissive/42178149/VGA_Controlador.sv\n             VGA_Controlador\n             VGA_Controlador.v\n             VGA_Controlador.sv\n             obj_dir/VGA_Controlador\n             obj_dir/VGA_Controlador.v\n             obj_dir/VGA_Controlador.sv\n%Error: data/full_repos/permissive/42178149/VGA_test.v:51: Cannot find file containing module: 'figuras_Gato'\n figuras_Gato graficos(\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/42178149/VGA_test.v:72: Cannot find file containing module: 'CLK_25Mhz'\n CLK_25Mhz clock25 (.CLK_IN(clk), .CLK_OUT(clkout));\n ^~~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module VGA_test(
	input wire clk , reset,
	input wire [3:0] sw,
	input wire [1:0] casilla1, casilla2, casilla3, casilla4, casilla5, casilla6, casilla7, casilla8, casilla9,
	output wire hsync,vsync,
	output wire [2:0] rgb
);



	wire[10:0] pix_x, pix_y;
	wire video_on;
	wire clkout;
	wire hsync_out;
	wire vsync_out;

	assign hsync = ~hsync_out;
	assign vsync = ~vsync_out;


	VGA_Controlador vsync_unit (
						 ._clk_(clkout),
						 ._reset_(reset),
						 .hsync(hsync_out),
						 .vsync(vsync_out),
						 .PixelX(pix_x),
						 .PixelY(pix_y),
						 .video_encendido(video_on));


	figuras_Gato graficos(
	.video_mostrar(video_on),
	.selector_entrada(sw),
	.c1_in(casilla1),
	.c2_in(casilla2),
	.c3_in(casilla3),
	.c4_in(casilla4),
	.c5_in(casilla5),
	.c6_in(casilla6),
	.c7_in(casilla7),
	.c8_in(casilla8),
	.c9_in(casilla9),
	.pixel_x(pix_x),
	.pixel_y(pix_y),
	.salida_rgb(rgb)
	);
			




	CLK_25Mhz clock25 (.CLK_IN(clk),	.CLK_OUT(clkout));


endmodule
module VGA_test(
	input wire clk , reset,
	input wire [3:0] sw,
	input wire [1:0] casilla1, casilla2, casilla3, casilla4, casilla5, casilla6, casilla7, casilla8, casilla9,
	output wire hsync,vsync,
	output wire [2:0] rgb
);




	wire[10:0] pix_x, pix_y;
	wire video_on;
	wire clkout;
	wire hsync_out;
	wire vsync_out;

	assign hsync = ~hsync_out;
	assign vsync = ~vsync_out;


	VGA_Controlador vsync_unit (
						 ._clk_(clkout),
						 ._reset_(reset),
						 .hsync(hsync_out),
						 .vsync(vsync_out),
						 .PixelX(pix_x),
						 .PixelY(pix_y),
						 .video_encendido(video_on));


	figuras_Gato graficos(
	.video_mostrar(video_on),
	.selector_entrada(sw),
	.c1_in(casilla1),
	.c2_in(casilla2),
	.c3_in(casilla3),
	.c4_in(casilla4),
	.c5_in(casilla5),
	.c6_in(casilla6),
	.c7_in(casilla7),
	.c8_in(casilla8),
	.c9_in(casilla9),
	.pixel_x(pix_x),
	.pixel_y(pix_y),
	.salida_rgb(rgb)
	);
			




	CLK_25Mhz clock25 (.CLK_IN(clk),	.CLK_OUT(clkout));


endmodule