data/full_repos/permissive/469509877/rtl/countUD10L.v
1: b"%Error: data/full_repos/permissive/469509877/rtl/countUD10L.v:35: Cannot find file containing module: 'countUD5L'\n    countUD5L counter1 (.clkin(clk), .Up(Up), .Dw(Dw), .reset(reset), .LD(LD), .D(D[4:0]), .Q(Q[4:0]), .UTC(UTC), .DTC(DTC));\n    ^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/469509877/rtl,data/full_repos/permissive/469509877/countUD5L\n             data/full_repos/permissive/469509877/rtl,data/full_repos/permissive/469509877/countUD5L.v\n             data/full_repos/permissive/469509877/rtl,data/full_repos/permissive/469509877/countUD5L.sv\n             countUD5L\n             countUD5L.v\n             countUD5L.sv\n             obj_dir/countUD5L\n             obj_dir/countUD5L.v\n             obj_dir/countUD5L.sv\n%Error: data/full_repos/permissive/469509877/rtl/countUD10L.v:36: Cannot find file containing module: 'countUD5L'\n    countUD5L counter2 (.clkin(clk), .Up(Up & UTC), .Dw(Dw & DTC), .reset(reset), .LD(LD), .D(D[9:5]), .Q(Q[9:5]));\n    ^~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module countUD10L(
    input clk,
    input Up,
    input Dw,
    input reset,
    input LD,
    input [9:0] D,
    output [9:0] Q
    );
    
    wire UTC, DTC;
    
    countUD5L counter1 (.clkin(clk), .Up(Up), .Dw(Dw), .reset(reset), .LD(LD), .D(D[4:0]), .Q(Q[4:0]), .UTC(UTC), .DTC(DTC));
    countUD5L counter2 (.clkin(clk), .Up(Up & UTC), .Dw(Dw & DTC), .reset(reset), .LD(LD), .D(D[9:5]), .Q(Q[9:5]));
    
endmodule
module countUD10L(
    input clk,
    input Up,
    input Dw,
    input reset,
    input LD,
    input [9:0] D,
    output [9:0] Q
    );

    
    wire UTC, DTC;
    
    countUD5L counter1 (.clkin(clk), .Up(Up), .Dw(Dw), .reset(reset), .LD(LD), .D(D[4:0]), .Q(Q[4:0]), .UTC(UTC), .DTC(DTC));
    countUD5L counter2 (.clkin(clk), .Up(Up & UTC), .Dw(Dw & DTC), .reset(reset), .LD(LD), .D(D[9:5]), .Q(Q[9:5]));
    
endmodule