data/full_repos/permissive/470590146/core/top_test.v
data/verilator_xmls/3b93c1f9-16e8-47b1-9dc3-bacd8db0f01c.xml
module top_test (
	 input clk
	,input rst_n
);



endmodule
module top_test (
	 input clk
	,input rst_n
);




endmodule