data/full_repos/permissive/502135797/Lab7_April_6_2022/Code/bin2bcd.v
1: b'%Warning-WIDTH: data/full_repos/permissive/502135797/Lab7_April_6_2022/Code/bin2bcd.v:21: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 9 bits.\n                                                                                        : ... In instance bin2bcd\n bcd = {bcd[7:0],bin[5-i]};\n     ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module bin2bcd(
   input [7:0] bin,
   
   output reg [7:0] bcd
   );
   
integer i;
	
always @(bin) begin
    bcd=0;		 	
    for (i=0;i<6;i=i+1) begin	
 	
	
	



    if (bcd[3:0] >= 5) bcd[3:0] = bcd[3:0] + 3;
	if (bcd[7:4] >= 5) bcd[7:4] = bcd[7:4] + 3;
	
	bcd = {bcd[7:0],bin[5-i]};

  	
	end
    end
endmodule
module bin2bcd(
   input [7:0] bin,
   
   output reg [7:0] bcd
   );

   
integer i;
	
always @(bin) begin
    bcd=0;		 	
    for (i=0;i<6;i=i+1) begin	
 	
	
	



    if (bcd[3:0] >= 5) bcd[3:0] = bcd[3:0] + 3;
	if (bcd[7:4] >= 5) bcd[7:4] = bcd[7:4] + 3;
	
	bcd = {bcd[7:0],bin[5-i]};

  	
	end
    end
endmodule