data/full_repos/permissive/513199821/top.tinyfpga-bx.v
1: b'%Error: data/full_repos/permissive/513199821/top.tinyfpga-bx.v:4: Cannot find include file: global.inc\n`include "global.inc" \n         ^~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/513199821,data/full_repos/permissive/513199821/global.inc\n             data/full_repos/permissive/513199821,data/full_repos/permissive/513199821/global.inc.v\n             data/full_repos/permissive/513199821,data/full_repos/permissive/513199821/global.inc.sv\n             global.inc\n             global.inc.v\n             global.inc.sv\n             obj_dir/global.inc\n             obj_dir/global.inc.v\n             obj_dir/global.inc.sv\n%Error: Exiting due to 1 error(s)\n'
module top (
  input  CLK,
  input  PIN_2,
  input  PIN_24,
  output USBPU,
  output LED,
  output PIN_23,
  output PIN_1,
  output PIN_12,
  inout  PIN_13,
  output PIN_22,
  output PIN_21,
  output PIN_20,
  input  PIN_19
);


assign USBPU = 0;


eonSoc #(
    .WIDTH	 (32),
    .EEPROM_PAGE (16),
    .UART_DIV	 (139)
  ) soc (
    .clk    (CLK),
    .rstn   (PIN_24),
    .led_r  (LED),
    .led_h  (PIN_23),

    .rx     (PIN_2),
    .tx     (PIN_1),

    .scl    (PIN_12),
    .sda    (PIN_13),

    .ssn    (PIN_22),
    .sck    (PIN_21),
    .mosi   (PIN_20),
    .miso   (PIN_19)
  );

endmodule
module top (
  input  CLK,
  input  PIN_2,
  input  PIN_24,
  output USBPU,
  output LED,
  output PIN_23,
  output PIN_1,
  output PIN_12,
  inout  PIN_13,
  output PIN_22,
  output PIN_21,
  output PIN_20,
  input  PIN_19
);



assign USBPU = 0;


eonSoc #(
    .WIDTH	 (32),
    .EEPROM_PAGE (16),
    .UART_DIV	 (139)
  ) soc (
    .clk    (CLK),
    .rstn   (PIN_24),
    .led_r  (LED),
    .led_h  (PIN_23),

    .rx     (PIN_2),
    .tx     (PIN_1),

    .scl    (PIN_12),
    .sda    (PIN_13),

    .ssn    (PIN_22),
    .sck    (PIN_21),
    .mosi   (PIN_20),
    .miso   (PIN_19)
  );

endmodule