data/full_repos/permissive/506562943/HDLBits/Circuits/Combinational Logic/Karnaugh Map to Circuit/exams_ece241_2014_q3.v
1: b'%Error: Cannot find file containing module: Logic/Karnaugh\n        ... Looked in:\n             data/full_repos/permissive/506562943/HDLBits/Circuits/Combinational/Logic/Karnaugh\n             data/full_repos/permissive/506562943/HDLBits/Circuits/Combinational/Logic/Karnaugh.v\n             data/full_repos/permissive/506562943/HDLBits/Circuits/Combinational/Logic/Karnaugh.sv\n             Logic/Karnaugh\n             Logic/Karnaugh.v\n             Logic/Karnaugh.sv\n             obj_dir/Logic/Karnaugh\n             obj_dir/Logic/Karnaugh.v\n             obj_dir/Logic/Karnaugh.sv\n%Error: Cannot find file containing module: Map\n%Error: Cannot find file containing module: to\n%Error: Cannot find file containing module: Circuit,data/full_repos/permissive/506562943\n%Error: Cannot find file containing module: data/full_repos/permissive/506562943/HDLBits/Circuits/Combinational\n%Error: Cannot find file containing module: Circuit/exams_ece241_2014_q3.v\n%Error: Exiting due to 6 error(s)\n'
module top_module (
    input c,
    input d,
    output [3:0] mux_in
); 

    assign mux_in[0] = c | d;
    assign mux_in[1] = 0;
    assign mux_in[2] = (c & d);
    assign mux_in[3] = !d;

endmodule
module top_module (
    input c,
    input d,
    output [3:0] mux_in
);
 

    assign mux_in[0] = c | d;
    assign mux_in[1] = 0;
    assign mux_in[2] = (c & d);
    assign mux_in[3] = !d;

endmodule