data/full_repos/permissive/507307707/generated/CellProcessing.v
data/verilator_xmls/ab97e684-dfea-49c9-88b0-d7fe90873c62.xml
module FR(
  input  [5:0] io_valid_in,
  input  [3:0] io_ready_out,
  input  [2:0] io_valid_mux_sel,
  input  [3:0] io_fork_mask,
  output       io_valid_out
);
  wire [2:0] conf_mux_io_selector;
  wire [5:0] conf_mux_io_mux_input;
  wire  conf_mux_io_mux_output;
  wire  aux_0 = ~io_fork_mask[0] | io_ready_out[0];
  wire  aux_1 = ~io_fork_mask[1] | io_ready_out[1];
  wire  aux_2 = ~io_fork_mask[2] | io_ready_out[2];
  wire  aux_3 = ~io_fork_mask[3] | io_ready_out[3];
  wire  Vaux = conf_mux_io_mux_output;
  wire  temp_1 = aux_0 & aux_1;
  wire  temp_2 = temp_1 & aux_2;
  wire  temp_3 = temp_2 & aux_3;
  ConfMux conf_mux (
    .io_selector(conf_mux_io_selector),
    .io_mux_input(conf_mux_io_mux_input),
    .io_mux_output(conf_mux_io_mux_output)
  );
  assign io_valid_out = temp_3 & Vaux;
  assign conf_mux_io_selector = io_valid_mux_sel;
  assign conf_mux_io_mux_input = io_valid_in;
endmodule
module FR(
  input  [5:0] io_valid_in,
  input  [3:0] io_ready_out,
  input  [2:0] io_valid_mux_sel,
  input  [3:0] io_fork_mask,
  output       io_valid_out
);

  wire [2:0] conf_mux_io_selector;
  wire [5:0] conf_mux_io_mux_input;
  wire  conf_mux_io_mux_output;
  wire  aux_0 = ~io_fork_mask[0] | io_ready_out[0];
  wire  aux_1 = ~io_fork_mask[1] | io_ready_out[1];
  wire  aux_2 = ~io_fork_mask[2] | io_ready_out[2];
  wire  aux_3 = ~io_fork_mask[3] | io_ready_out[3];
  wire  Vaux = conf_mux_io_mux_output;
  wire  temp_1 = aux_0 & aux_1;
  wire  temp_2 = temp_1 & aux_2;
  wire  temp_3 = temp_2 & aux_3;
  ConfMux conf_mux (
    .io_selector(conf_mux_io_selector),
    .io_mux_input(conf_mux_io_mux_input),
    .io_mux_output(conf_mux_io_mux_output)
  );
  assign io_valid_out = temp_3 & Vaux;
  assign conf_mux_io_selector = io_valid_mux_sel;
  assign conf_mux_io_mux_input = io_valid_in;
endmodule