data/full_repos/permissive/431682734/LabL/cpu.v
1: b'%Error: data/full_repos/permissive/431682734/LabL/cpu.v:25: syntax error, unexpected final, expecting IDENTIFIER\n    yMux #(SIZE) final(z, zLo, zHi, c[1]);\n                 ^~~~~\n%Error: Exiting due to 1 error(s)\n'
module yMux(z, a, b, c);
    parameter SIZE = 2;
    output [SIZE-1:0] z;
    input [SIZE-1:0] a, b;
    input c;
    yMux1 mine[SIZE-1:0](z, a, b, c);
endmodule
module yMux(z, a, b, c);

    parameter SIZE = 2;
    output [SIZE-1:0] z;
    input [SIZE-1:0] a, b;
    input c;
    yMux1 mine[SIZE-1:0](z, a, b, c);
endmodule