data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/aluwrap/montexpsave/tb_montexp.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/aluwrap/montexpsave/tb_montexp.v:16: Unsupported: Ignoring delay on this delayed statement.\n#50 clk=1;\n^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/aluwrap/montexpsave/tb_montexp.v:17: Unsupported: Ignoring delay on this delayed statement.\n#50;\n^\n%Warning-STMTDLY: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/aluwrap/montexpsave/tb_montexp.v:109: Unsupported: Ignoring delay on this delayed statement.\n#10000;\n^\n%Warning-STMTDLY: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/aluwrap/montexpsave/tb_montexp.v:110: Unsupported: Ignoring delay on this delayed statement.\n#150 t_rst = 1\'b1;\n^\n%Warning-STMTDLY: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/aluwrap/montexpsave/tb_montexp.v:111: Unsupported: Ignoring delay on this delayed statement.\n#100 t_rst = 1\'b0;\n^\n%Warning-STMTDLY: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/aluwrap/montexpsave/tb_montexp.v:112: Unsupported: Ignoring delay on this delayed statement.\n#10000;\n^\n%Warning-STMTDLY: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/aluwrap/montexpsave/tb_montexp.v:114: Unsupported: Ignoring delay on this delayed statement.\n#100;\n^\n%Error: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/aluwrap/montexpsave/tb_montexp.v:116: Unsupported: wait statements\nwait(vld);\n^~~~\n%Warning-STMTDLY: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/aluwrap/montexpsave/tb_montexp.v:117: Unsupported: Ignoring delay on this delayed statement.\n#70000;\n^\n%Error: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/aluwrap/montexpsave/tb_montexp.v:133: Unsupported or unknown PLI call: $monitor\n$monitor("cnt = %d", imontexp.cnt);\n^~~~~~~~\n%Error: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/aluwrap/montexpsave/tb_montexp.v:139: Unsupported or unknown PLI call: $shm_open\n$shm_open ("my_waves");\n^~~~~~~~~\n%Error: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/aluwrap/montexpsave/tb_montexp.v:140: Unsupported or unknown PLI call: $shm_probe\n$shm_probe (tb_montexp,"AC");\n^~~~~~~~~~\n%Error: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/aluwrap/montexpsave/tb_montexp.v:141: Unsupported or unknown PLI call: $recordfile\n$recordfile("testsample.trn");\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/aluwrap/montexpsave/tb_montexp.v:142: Unsupported or unknown PLI call: $recordvars\n$recordvars();\n^~~~~~~~~~~\n%Error: Exiting due to 6 error(s), 8 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module tb_montexp;

parameter WID = 256;

reg clk;
reg t_rst;
`define X255
`ifdef X255
parameter EXPK  = 256'd38;
parameter EXP2K = 256'd1444;
parameter MECC = 256'd57896044618658097711785492504343953926634992332820282019728792003956564819949;
`endif
always begin
clk = 0;
#50 clk=1;
#50;
end


reg [WID-1:0] a;
reg [WID-1:0] b;
reg         en;

wire [WID-1:0] r;
wire           vld;

wire [WID-1:0] mpa1;
wire [WID-1:0] mpb1;
wire [WID-1:0] mpr1;

wire           mpstart1;
wire           mpvld1;

wire [WID-1:0] mpa2;
wire [WID-1:0] mpb2;
wire [WID-1:0] mpr2;

wire           mpstart2;
wire           mpvld2;


montexp imontexp
    (
     .clk(clk),
     .rst(t_rst),
     
     .a(a),
     .b(b),
     .expk(EXPK),
     .exp2k(EXP2K),
     .r(r),
     
     .start(en),
     .vld(vld),


     .mpa1(mpa1),
     .mpb1(mpb1),
     .mpr1(mpr1),
     
     .mpstart1(mpstart1),
     .mpvld1(mpvld1),


     .mpa2(mpa2),
     .mpb2(mpb2),
     .mpr2(mpr2),
     
     .mpstart2(mpstart2),
     .mpvld2(mpvld2)
     );

montprowrap imontprowrap1
    (
     .clk(clk),
     .rst(t_rst),
     
     .a(mpa1),
     .b(mpb1),
     .m(MECC),
     .r(mpr1),
     
     .start(mpstart1),
     .vld(mpvld1)
     );

montprowrap imontprowrap2
    (
     .clk(clk),
     .rst(t_rst),
     
     .a(mpa2),
     .b(mpb2),
     .m(MECC),
     .r(mpr2),
     
     .start(mpstart2),
     .vld(mpvld2)
     );



initial begin
t_rst = 1'b0;
a = 256'd103;
b = 256'd141;
en = 1'b0;
#10000;
#150 t_rst = 1'b1;
#100 t_rst = 1'b0;
#10000;
en = 1'b1;
#100;
en = 1'b0;
wait(vld);
#70000;
$finish;
end

initial begin
$display ("==========OUTPUT==========");
end

always@(posedge clk) begin
if(vld)
    begin
    $display ("Output : %d ", r);
    end
end

initial begin
$monitor("cnt = %d", imontexp.cnt);
end



initial begin
$shm_open ("my_waves");
$shm_probe (tb_montexp,"AC");
$recordfile("testsample.trn");
$recordvars();
end

endmodule
module tb_montexp;


parameter WID = 256;

reg clk;
reg t_rst;
`define X255
`ifdef X255
parameter EXPK  = 256'd38;
parameter EXP2K = 256'd1444;
parameter MECC = 256'd57896044618658097711785492504343953926634992332820282019728792003956564819949;
`endif
always begin
clk = 0;
#50 clk=1;
#50;
end


reg [WID-1:0] a;
reg [WID-1:0] b;
reg         en;

wire [WID-1:0] r;
wire           vld;

wire [WID-1:0] mpa1;
wire [WID-1:0] mpb1;
wire [WID-1:0] mpr1;

wire           mpstart1;
wire           mpvld1;

wire [WID-1:0] mpa2;
wire [WID-1:0] mpb2;
wire [WID-1:0] mpr2;

wire           mpstart2;
wire           mpvld2;


montexp imontexp
    (
     .clk(clk),
     .rst(t_rst),
     
     .a(a),
     .b(b),
     .expk(EXPK),
     .exp2k(EXP2K),
     .r(r),
     
     .start(en),
     .vld(vld),


     .mpa1(mpa1),
     .mpb1(mpb1),
     .mpr1(mpr1),
     
     .mpstart1(mpstart1),
     .mpvld1(mpvld1),


     .mpa2(mpa2),
     .mpb2(mpb2),
     .mpr2(mpr2),
     
     .mpstart2(mpstart2),
     .mpvld2(mpvld2)
     );

montprowrap imontprowrap1
    (
     .clk(clk),
     .rst(t_rst),
     
     .a(mpa1),
     .b(mpb1),
     .m(MECC),
     .r(mpr1),
     
     .start(mpstart1),
     .vld(mpvld1)
     );

montprowrap imontprowrap2
    (
     .clk(clk),
     .rst(t_rst),
     
     .a(mpa2),
     .b(mpb2),
     .m(MECC),
     .r(mpr2),
     
     .start(mpstart2),
     .vld(mpvld2)
     );



initial begin
t_rst = 1'b0;
a = 256'd103;
b = 256'd141;
en = 1'b0;
#10000;
#150 t_rst = 1'b1;
#100 t_rst = 1'b0;
#10000;
en = 1'b1;
#100;
en = 1'b0;
wait(vld);
#70000;
$finish;
end

initial begin
$display ("==========OUTPUT==========");
end

always@(posedge clk) begin
if(vld)
    begin
    $display ("Output : %d ", r);
    end
end

initial begin
$monitor("cnt = %d", imontexp.cnt);
end



initial begin
$shm_open ("my_waves");
$shm_probe (tb_montexp,"AC");
$recordfile("testsample.trn");
$recordvars();
end

endmodule