data/full_repos/permissive/445695969/src_rtl/protected/pini1/skinny_sbox8_pini1_non_pipelined.v
data/verilator_xmls/be3fb33f-a912-4dae-8387-380ce65d5fec.xml
module pini1_sbox8_cfn_fr (

   f,

   a, b, z, r, clk
   ) ;
   (*equivalent_register_removal = "no" *)output [1:0]        f;
   (*equivalent_register_removal = "no" *)input [1:0]         a, b, z;
   (*equivalent_register_removal = "no" *)input  	       r;
   (*equivalent_register_removal = "no" *)input 	       clk;

   wire [1:0] 	       x, y;	      
   (*equivalent_register_removal = "no" *)reg [1:0] 	       g, t, m;

   assign x = {a[1],~a[0]};
   assign y = {b[1],~b[0]};
   
   always @ (posedge clk) begin
      g[1] <= (y[0] ^ r);
      g[0] <= (y[1] ^ r);      
   end

   always @(posedge clk) begin
      t[1] <= (~x[1])&r;
      t[0] <= (~x[0])&r;

      m[1] <= (x[1]&y[1])^z[1];
      m[0] <= (x[0]&y[0])^z[0];     
   end

   assign f[1] = (x[1]&g[1])^t[1]^m[1];   
   assign f[0] = (x[0]&g[0])^t[0]^m[0];
   
endmodule
module pini1_sbox8_cfn_fr (

   f,

   a, b, z, r, clk
   ) ;

   (*equivalent_register_removal = "no" *)output [1:0]        f;
   (*equivalent_register_removal = "no" *)input [1:0]         a, b, z;
   (*equivalent_register_removal = "no" *)input  	       r;
   (*equivalent_register_removal = "no" *)input 	       clk;

   wire [1:0] 	       x, y;	      
   (*equivalent_register_removal = "no" *)reg [1:0] 	       g, t, m;

   assign x = {a[1],~a[0]};
   assign y = {b[1],~b[0]};
   
   always @ (posedge clk) begin
      g[1] <= (y[0] ^ r);
      g[0] <= (y[1] ^ r);      
   end

   always @(posedge clk) begin
      t[1] <= (~x[1])&r;
      t[0] <= (~x[0])&r;

      m[1] <= (x[1]&y[1])^z[1];
      m[0] <= (x[0]&y[0])^z[0];     
   end

   assign f[1] = (x[1]&g[1])^t[1]^m[1];   
   assign f[0] = (x[0]&g[0])^t[0]^m[0];
   
endmodule