data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/BanGoc/LuanVan/Hardware/lv_2pl/mux_xx1.v
data/verilator_xmls/9705b13d-9f76-4de2-af15-d140d4978f98.xml
module mux_xx1
    (
     a,
     b,
     s,
     c
     );




parameter WIDTH = 1;







input     s;
input [WIDTH-1:0] a,b;

output [WIDTH-1:0] c;




assign             c = s?b:a;

endmodule
module mux_xx1
    (
     a,
     b,
     s,
     c
     );





parameter WIDTH = 1;







input     s;
input [WIDTH-1:0] a,b;

output [WIDTH-1:0] c;




assign             c = s?b:a;

endmodule