data/full_repos/permissive/451853158/MIPS_Multi_Cycle_Processor/controlUnit.v
1: b"%Error: data/full_repos/permissive/451853158/MIPS_Multi_Cycle_Processor/controlUnit.v:17: Cannot find file containing module: 'mainDecoder'\nmainDecoder maindec (.clk(clk), .reset(reset), .OPCode(OPCode), .MemtoReg(MemtoReg),\n^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/451853158/MIPS_Multi_Cycle_Processor,data/full_repos/permissive/451853158/mainDecoder\n             data/full_repos/permissive/451853158/MIPS_Multi_Cycle_Processor,data/full_repos/permissive/451853158/mainDecoder.v\n             data/full_repos/permissive/451853158/MIPS_Multi_Cycle_Processor,data/full_repos/permissive/451853158/mainDecoder.sv\n             mainDecoder\n             mainDecoder.v\n             mainDecoder.sv\n             obj_dir/mainDecoder\n             obj_dir/mainDecoder.v\n             obj_dir/mainDecoder.sv\n%Error: data/full_repos/permissive/451853158/MIPS_Multi_Cycle_Processor/controlUnit.v:23: Cannot find file containing module: 'ALUDecoder'\nALUDecoder aludec (.ALUOp(ALUOp), .Funct(Funct), .ALUControl(ALUControl));\n^~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module  controlUnit (
  input             clk, reset,
  input       [5:0] OPCode, Funct,
  input             Zero,
  output wire       MemtoReg, RegDst, IorD, ALUSrcA,
  output wire [1:0] PCSrc, ALUSrcB,
  output wire       IRWrite, MemWrite, RegWrite, PCEn,
  output wire [2:0] ALUControl
);




wire       Branch, PCWrite, bz;
wire [1:0] ALUOp;

mainDecoder maindec (.clk(clk), .reset(reset), .OPCode(OPCode), .MemtoReg(MemtoReg),
                     .RegDst(RegDst), .IorD(IorD), .ALUSrcA(ALUSrcA),
                     .PCSrc(PCSrc), .ALUSrcB(ALUSrcB),
                     .IRWrite(IRWrite), .MemWrite(MemWrite), .PCWrite(PCWrite),
                     .Branch(Branch), .RegWrite(RegWrite), .ALUOp(ALUOp));

ALUDecoder aludec (.ALUOp(ALUOp), .Funct(Funct), .ALUControl(ALUControl));

assign bz = Branch & Zero;
assign PCEn = bz | PCWrite;

endmodule
module  controlUnit (
  input             clk, reset,
  input       [5:0] OPCode, Funct,
  input             Zero,
  output wire       MemtoReg, RegDst, IorD, ALUSrcA,
  output wire [1:0] PCSrc, ALUSrcB,
  output wire       IRWrite, MemWrite, RegWrite, PCEn,
  output wire [2:0] ALUControl
);





wire       Branch, PCWrite, bz;
wire [1:0] ALUOp;

mainDecoder maindec (.clk(clk), .reset(reset), .OPCode(OPCode), .MemtoReg(MemtoReg),
                     .RegDst(RegDst), .IorD(IorD), .ALUSrcA(ALUSrcA),
                     .PCSrc(PCSrc), .ALUSrcB(ALUSrcB),
                     .IRWrite(IRWrite), .MemWrite(MemWrite), .PCWrite(PCWrite),
                     .Branch(Branch), .RegWrite(RegWrite), .ALUOp(ALUOp));

ALUDecoder aludec (.ALUOp(ALUOp), .Funct(Funct), .ALUControl(ALUControl));

assign bz = Branch & Zero;
assign PCEn = bz | PCWrite;

endmodule