data/full_repos/permissive/421450529/IM.v
data/verilator_xmls/1c2d6a00-bef2-496c-bcc5-3fe3407f0ad9.xml
module IM(
    input[31:0] pc,
	 output [31:0] Instr
    );
	 
	reg[31:0] ROM[4095:0];
	wire[31:0] address;
	assign address=pc-32'h3000;
   initial begin
		$readmemh("code.txt",ROM);
	end
	
	    assign  Instr=ROM[address[13:2]];
	
endmodule
module IM(
    input[31:0] pc,
	 output [31:0] Instr
    );

	 
	reg[31:0] ROM[4095:0];
	wire[31:0] address;
	assign address=pc-32'h3000;
   initial begin
		$readmemh("code.txt",ROM);
	end
	
	    assign  Instr=ROM[address[13:2]];
	
endmodule