data/full_repos/permissive/489642764/src/wb_ctrl/wb_ctrl.v
data/verilator_xmls/d81146d8-0c44-41d5-aa47-fc2049552096.xml
function [47:0] inst_mem_f;
		input [7:0] prog_count_arg;
		case (prog_count_r)
			8'd0    : inst_mem_f = {      INST_WAIT, 12'h000,    WAIT_INFTY};
			8'd1    : inst_mem_f = { INST_WRITE_IMD, 12'h000, 32'h0000_0002};
			8'd2    : inst_mem_f = {      INST_READ, 12'h100,         32'b0};
			default : inst_mem_f = {      INST_WAIT, 12'h000,    WAIT_INFTY};
		endcase
	endfunction
function [47:0] inst_mem_f;

		input [7:0] prog_count_arg;
		case (prog_count_r)
			8'd0    : inst_mem_f = {      INST_WAIT, 12'h000,    WAIT_INFTY};
			8'd1    : inst_mem_f = { INST_WRITE_IMD, 12'h000, 32'h0000_0002};
			8'd2    : inst_mem_f = {      INST_READ, 12'h100,         32'b0};
			default : inst_mem_f = {      INST_WAIT, 12'h000,    WAIT_INFTY};
		endcase
	endfunction