data/full_repos/permissive/517427004/CA1 - Linear Regression/Verilog/Mux.v
1: b'%Error: Invalid Option: -\n'
module Mux_2to1(a0, a1, sel, out);
    parameter N = 32;

    input [N-1:0] a0, a1;
    input sel;
    output [N-1:0] out;

    assign out = sel ? a1 : a0;
endmodule
module Mux_2to1(a0, a1, sel, out);

    parameter N = 32;

    input [N-1:0] a0, a1;
    input sel;
    output [N-1:0] out;

    assign out = sel ? a1 : a0;
endmodule