data/full_repos/permissive/478063538/dec2to4_v1.v
1: b'%Warning-LITENDIAN: data/full_repos/permissive/478063538/dec2to4_v1.v:5: Little bit endian vector: MSB < LSB of bit range: 0:3\n output reg [0:3] z ) ;\n            ^\n                    ... Use "/* verilator lint_off LITENDIAN */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module dec2to4_v1 (
	input [1:0] a , 
	input en ,
	output reg [0:3] z ) ;
	
	always @ (a, en)
	begin
		if (en == 0)
			z = 4'b0000;
		else
			case (a)
				0: z = 4'b1000;
				1: z = 4'b0100;
				2: z = 4'b0010;
				3: z = 4'b0001;
			endcase
	end
endmodule
module dec2to4_v1 (
	input [1:0] a , 
	input en ,
	output reg [0:3] z ) ;

	
	always @ (a, en)
	begin
		if (en == 0)
			z = 4'b0000;
		else
			case (a)
				0: z = 4'b1000;
				1: z = 4'b0100;
				2: z = 4'b0010;
				3: z = 4'b0001;
			endcase
	end
endmodule