data/full_repos/permissive/450962776/processor/src/Instruction_Memory.v
data/verilator_xmls/99c652be-b191-4954-9b26-e678abbf5dce.xml
module Instruction_Memory(pc,instruction);
input [4:0]pc;
output [15:0]instruction;

 reg [15:0] memory [29:0];
 assign instruction=memory[pc];
endmodule
module Instruction_Memory(pc,instruction);

input [4:0]pc;
output [15:0]instruction;

 reg [15:0] memory [29:0];
 assign instruction=memory[pc];
endmodule