data/full_repos/permissive/500128826/but-2-led/top.v
data/verilator_xmls/5ef23ec1-d54f-43d3-8d70-68480da0e805.xml
module top (
    input  wire BUT1,
    input  wire BUT2,
    output wire LED1,
    output wire LED2
);

  assign LED1 = ~BUT1;
  assign LED2 = ~BUT2;

endmodule
module top (
    input  wire BUT1,
    input  wire BUT2,
    output wire LED1,
    output wire LED2
);


  assign LED1 = ~BUT1;
  assign LED2 = ~BUT2;

endmodule