data/full_repos/permissive/489075769/write_address_slave.v
1: b"%Error: data/full_repos/permissive/489075769/write_address_slave.v:18: Can't find definition of scope/variable: 'write_address_master'\n  if (write_address_master.o_AWVALID && o_AWREADY) \n      ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/489075769/write_address_slave.v:19: Can't find definition of scope/variable: 'write_address_master'\n  AWADDR <= write_address_master.o_AWADDR;\n            ^~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module write_address_slave(ACLK,ARESETn, i_AWREADY, o_AWREADY, AWADDR);
	input ACLK;
	input ARESETn;
	input i_AWREADY;
	output reg o_AWREADY;
	output reg [31:0] AWADDR;

	
	always @(posedge ARESETn) begin
		AWADDR <= 0;
		o_AWREADY <=0;
	end
	
	always @(posedge ACLK) begin
		if(i_AWREADY)
		o_AWREADY=1;

		if (write_address_master.o_AWVALID && o_AWREADY) 
		AWADDR <= write_address_master.o_AWADDR;
		
		else 
		AWADDR <= 0;
	
	end
endmodule
module write_address_slave(ACLK,ARESETn, i_AWREADY, o_AWREADY, AWADDR);

	input ACLK;
	input ARESETn;
	input i_AWREADY;
	output reg o_AWREADY;
	output reg [31:0] AWADDR;

	
	always @(posedge ARESETn) begin
		AWADDR <= 0;
		o_AWREADY <=0;
	end
	
	always @(posedge ACLK) begin
		if(i_AWREADY)
		o_AWREADY=1;

		if (write_address_master.o_AWVALID && o_AWREADY) 
		AWADDR <= write_address_master.o_AWADDR;
		
		else 
		AWADDR <= 0;
	
	end
endmodule