data/full_repos/permissive/461086546/tb_debouncer.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/461086546/tb_debouncer.v:10: Unsupported: Ignoring delay on this delayed statement.\nalways #1 clk = ~clk;\n       ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/461086546/tb_debouncer.v:25: Unsupported: Ignoring delay on this delayed statement.\n  #10 btn = 1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/461086546/tb_debouncer.v:26: Unsupported: Ignoring delay on this delayed statement.\n  #10 btn = 0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/461086546/tb_debouncer.v:27: Unsupported: Ignoring delay on this delayed statement.\n  #10 btn = 1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/461086546/tb_debouncer.v:28: Unsupported: Ignoring delay on this delayed statement.\n  #10 btn = 0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/461086546/tb_debouncer.v:29: Unsupported: Ignoring delay on this delayed statement.\n  #10 btn = 1;\n  ^\n%Error: data/full_repos/permissive/461086546/tb_debouncer.v:12: Cannot find file containing module: \'debouncer\'\ndebouncer debouncer_DUT(\n^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/461086546,data/full_repos/permissive/461086546/debouncer\n             data/full_repos/permissive/461086546,data/full_repos/permissive/461086546/debouncer.v\n             data/full_repos/permissive/461086546,data/full_repos/permissive/461086546/debouncer.sv\n             debouncer\n             debouncer.v\n             debouncer.sv\n             obj_dir/debouncer\n             obj_dir/debouncer.v\n             obj_dir/debouncer.sv\n%Error: Exiting due to 1 error(s), 6 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module tb_debouncer();

reg clk;
reg btn;

wire	b_out_down;
wire	b_out_up;
wire 	b_state;

always #1 clk = ~clk;

debouncer	debouncer_DUT(
				.clk	(clk),
				.PB	(btn),
				.PB_state	(b_state),
				.PB_down		(b_out_down),
				.PB_up		(b_out_up)
			);
			
initial

	begin
		
		clk		=	0;
		#10	btn	=	1;
		#10	btn	=	0;
		#10	btn	=	1;
		#10	btn	=	0;
		#10	btn	=	1;


		$display("Simulation Finished Correctly");

		$stop;

	end

endmodule
module tb_debouncer();


reg clk;
reg btn;

wire	b_out_down;
wire	b_out_up;
wire 	b_state;

always #1 clk = ~clk;

debouncer	debouncer_DUT(
				.clk	(clk),
				.PB	(btn),
				.PB_state	(b_state),
				.PB_down		(b_out_down),
				.PB_up		(b_out_up)
			);
			
initial

	begin
		
		clk		=	0;
		#10	btn	=	1;
		#10	btn	=	0;
		#10	btn	=	1;
		#10	btn	=	0;
		#10	btn	=	1;


		$display("Simulation Finished Correctly");

		$stop;

	end

endmodule