data/full_repos/permissive/435914753/Display_kbd/onemegahz.v
data/verilator_xmls/d3c7b94e-877e-4386-9482-e107ac7a6caa.xml
module FourMegaHertz (reset, clk, enable, clkdiv4);
input reset, clk, enable;
output clkdiv4;
reg [1:0] cnt;

assign clkdiv4 = (cnt==2'd3);
always @(posedge reset or posedge clk)
  if (reset) cnt <= 0;
   else if (enable) 
          if (clkdiv4) cnt <= 0;
            else cnt <= cnt + 1;
endmodule
module FourMegaHertz (reset, clk, enable, clkdiv4);

input reset, clk, enable;
output clkdiv4;
reg [1:0] cnt;

assign clkdiv4 = (cnt==2'd3);
always @(posedge reset or posedge clk)
  if (reset) cnt <= 0;
   else if (enable) 
          if (clkdiv4) cnt <= 0;
            else cnt <= cnt + 1;
endmodule