data/full_repos/permissive/509809169/Circuits/Combinational Logic/Multiplexers/2-to-1 bus Mux.v
1: b'%Error: Cannot find file containing module: Logic/Multiplexers,data/full_repos/permissive/509809169\n        ... Looked in:\n             data/full_repos/permissive/509809169/Circuits/Combinational/Logic/Multiplexers,data/full_repos/permissive/509809169\n             data/full_repos/permissive/509809169/Circuits/Combinational/Logic/Multiplexers,data/full_repos/permissive/509809169.v\n             data/full_repos/permissive/509809169/Circuits/Combinational/Logic/Multiplexers,data/full_repos/permissive/509809169.sv\n             Logic/Multiplexers,data/full_repos/permissive/509809169\n             Logic/Multiplexers,data/full_repos/permissive/509809169.v\n             Logic/Multiplexers,data/full_repos/permissive/509809169.sv\n             obj_dir/Logic/Multiplexers,data/full_repos/permissive/509809169\n             obj_dir/Logic/Multiplexers,data/full_repos/permissive/509809169.v\n             obj_dir/Logic/Multiplexers,data/full_repos/permissive/509809169.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/509809169/Circuits/Combinational\n%Error: Cannot find file containing module: Logic/Multiplexers/2-to-1\n%Error: Cannot find file containing module: bus\n%Error: Cannot find file containing module: Mux.v\n%Error: Exiting due to 5 error(s)\n'
module top_module( 
    input [99:0] a, b,
    input sel,
    output [99:0] out );
    always @(*)begin
        if(sel)
            out=b;
    	else
        	out=a;
    end
endmodule
module top_module( 
    input [99:0] a, b,
    input sel,
    output [99:0] out );

    always @(*)begin
        if(sel)
            out=b;
    	else
        	out=a;
    end
endmodule