data/full_repos/permissive/423547971/FPGA Projects/Candy_Machine_Basys3/btn_debounce.v
1: b'%Error: Cannot find file containing module: Projects/Candy_Machine_Basys3,data/full_repos/permissive/423547971\n        ... Looked in:\n             data/full_repos/permissive/423547971/FPGA/Projects/Candy_Machine_Basys3,data/full_repos/permissive/423547971\n             data/full_repos/permissive/423547971/FPGA/Projects/Candy_Machine_Basys3,data/full_repos/permissive/423547971.v\n             data/full_repos/permissive/423547971/FPGA/Projects/Candy_Machine_Basys3,data/full_repos/permissive/423547971.sv\n             Projects/Candy_Machine_Basys3,data/full_repos/permissive/423547971\n             Projects/Candy_Machine_Basys3,data/full_repos/permissive/423547971.v\n             Projects/Candy_Machine_Basys3,data/full_repos/permissive/423547971.sv\n             obj_dir/Projects/Candy_Machine_Basys3,data/full_repos/permissive/423547971\n             obj_dir/Projects/Candy_Machine_Basys3,data/full_repos/permissive/423547971.v\n             obj_dir/Projects/Candy_Machine_Basys3,data/full_repos/permissive/423547971.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/423547971/FPGA\n%Error: Cannot find file containing module: Projects/Candy_Machine_Basys3/btn_debounce.v\n%Error: Exiting due to 3 error(s)\n'
module btn_debounce(
    input clk,
    input btn_in,
    output btn_out
    );
    
    reg a, b, c;
    
    always @(posedge clk) begin
        a <= btn_in;
        b <= a;
        c <= b;
    end
    
    assign btn_out = c;
    
endmodule
module btn_debounce(
    input clk,
    input btn_in,
    output btn_out
    );

    
    reg a, b, c;
    
    always @(posedge clk) begin
        a <= btn_in;
        b <= a;
        c <= b;
    end
    
    assign btn_out = c;
    
endmodule