data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/BanGoc/LuanVan/Hardware/lv_2pl/cswap.v
1: b"%Error: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/BanGoc/LuanVan/Hardware/lv_2pl/cswap.v:82: Cannot find file containing module: 'fflopx'\nfflopx #(1) ifflopx1(clk,rst,vldrg,vld);\n^~~~~~\n        ... Looked in:\n             data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/BanGoc/LuanVan/Hardware/lv_2pl,data/full_repos/permissive/530013823/fflopx\n             data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/BanGoc/LuanVan/Hardware/lv_2pl,data/full_repos/permissive/530013823/fflopx.v\n             data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/BanGoc/LuanVan/Hardware/lv_2pl,data/full_repos/permissive/530013823/fflopx.sv\n             fflopx\n             fflopx.v\n             fflopx.sv\n             obj_dir/fflopx\n             obj_dir/fflopx.v\n             obj_dir/fflopx.sv\n%Error: Exiting due to 1 error(s)\n"
module cswap
    (
     clk,
     rst,

     swap,
     a,
     b,
     en,

     aswap,
     bswap,
     vld
     );



parameter WID = 256;
parameter DUM = 256'd57896044618658097711785492504343953926634992332820282019728792003956564819968;
localparam INIT = 0;



input     clk;
input     rst;

input     swap;
input [WID-1:0] a;
input [WID-1:0] b;
input           en;

output [WID-1:0] aswap;
output [WID-1:0] bswap;
output           vld;





reg [WID-1:0]    arg,brg;
reg              swaprg;
reg              vldrg;

always@(posedge clk)
    begin
    if(rst)
        begin
        arg <= INIT;
        brg <= INIT;
        swaprg <= INIT;
        vldrg <= 1'b0;
        end
    else if(en)
        begin
        arg <= a;
        brg <= b;
        swaprg <= swap;
        vldrg <= 1'b1;
        end
    else
        begin
        arg <= arg;
        brg <= brg;
        swaprg <= swaprg;
        vldrg <= 1'b0;
        end
    end
    
fflopx #(1) ifflopx1(clk,rst,vldrg,vld);
assign aswap = swaprg? brg : arg;
assign bswap = swaprg? arg : brg;



endmodule
module cswap
    (
     clk,
     rst,

     swap,
     a,
     b,
     en,

     aswap,
     bswap,
     vld
     );




parameter WID = 256;
parameter DUM = 256'd57896044618658097711785492504343953926634992332820282019728792003956564819968;
localparam INIT = 0;



input     clk;
input     rst;

input     swap;
input [WID-1:0] a;
input [WID-1:0] b;
input           en;

output [WID-1:0] aswap;
output [WID-1:0] bswap;
output           vld;





reg [WID-1:0]    arg,brg;
reg              swaprg;
reg              vldrg;

always@(posedge clk)
    begin
    if(rst)
        begin
        arg <= INIT;
        brg <= INIT;
        swaprg <= INIT;
        vldrg <= 1'b0;
        end
    else if(en)
        begin
        arg <= a;
        brg <= b;
        swaprg <= swap;
        vldrg <= 1'b1;
        end
    else
        begin
        arg <= arg;
        brg <= brg;
        swaprg <= swaprg;
        vldrg <= 1'b0;
        end
    end
    
fflopx #(1) ifflopx1(clk,rst,vldrg,vld);
assign aswap = swaprg? brg : arg;
assign bswap = swaprg? arg : brg;



endmodule