data/full_repos/permissive/48602886/src/device/vga_sdram/vga_vram_control.sv
1: b'%Warning-MULTITOP: data/full_repos/permissive/48602886/src/device/vga_sdram/vga_vram_control.sv:101: Multiple top level modules\n                                                                                                   : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                                   : ... Top module \'vga_vram_control\'\nmodule vga_vram_control(\n       ^~~~~~~~~~~~~~~~\n                                                                                                   : ... Top module \'vga_vram_control_old\'\nmodule vga_vram_control_old(\n       ^~~~~~~~~~~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/48602886/src/device/vga_sdram/vga_vram_control.sv:145: Operator ASSIGNDLY expects 20 bits on the Assign RHS, but Assign RHS\'s CONST \'19\'h0\' generates 19 bits.\n                                                                                                : ... In instance vga_vram_control_old\n   b_addr <= 19\'h0;\n          ^~\n%Warning-WIDTH: data/full_repos/permissive/48602886/src/device/vga_sdram/vga_vram_control.sv:151: Operator ASSIGNDLY expects 20 bits on the Assign RHS, but Assign RHS\'s CONST \'19\'h0\' generates 19 bits.\n                                                                                                : ... In instance vga_vram_control_old\n   b_addr <= 19\'h0;\n          ^~\n%Warning-WIDTH: data/full_repos/permissive/48602886/src/device/vga_sdram/vga_vram_control.sv:179: Operator ASSIGNDLY expects 1 bits on the Assign RHS, but Assign RHS\'s CONST \'3\'h0\' generates 3 bits.\n                                                                                                : ... In instance vga_vram_control_old\n   b_read_buff <= 3\'h0;\n               ^~\n%Warning-WIDTH: data/full_repos/permissive/48602886/src/device/vga_sdram/vga_vram_control.sv:182: Operator ASSIGNDLY expects 1 bits on the Assign RHS, but Assign RHS\'s CONST \'3\'h0\' generates 3 bits.\n                                                                                                : ... In instance vga_vram_control_old\n   b_read_buff <= 3\'h0;\n               ^~\n%Warning-WIDTH: data/full_repos/permissive/48602886/src/device/vga_sdram/vga_vram_control.sv:219: Operator ASSIGNDLY expects 1 bits on the Assign RHS, but Assign RHS\'s CONST \'3\'h0\' generates 3 bits.\n                                                                                                : ... In instance vga_vram_control_old\n   b_write_buff <= 3\'h0;\n                ^~\n%Warning-WIDTH: data/full_repos/permissive/48602886/src/device/vga_sdram/vga_vram_control.sv:222: Operator ASSIGNDLY expects 1 bits on the Assign RHS, but Assign RHS\'s CONST \'3\'h0\' generates 3 bits.\n                                                                                                : ... In instance vga_vram_control_old\n   b_write_buff <= 3\'h0;\n                ^~\n%Error: Exiting due to 7 warning(s)\n'
function func_priority_encoder;
		input func_read_req;
		input [2:0] func_read_count;
		input func_write_req;
		input [2:0] func_write_count;
		begin
			if(func_read_req && func_write_req)begin
				if(func_read_count > func_write_count)begin
					func_priority_encoder = 1'b1;
				end
				else begin
					func_priority_encoder = 1'b0;
				end
			end
			else if(func_read_req)begin
				func_priority_encoder = 1'b0;
			end
			else if(func_write_req)begin
				func_priority_encoder = 1'b1;
			end
			else begin
				func_priority_encoder = 1'b0;
			end
		end
	endfunction
function func_priority_encoder;

		input func_read_req;
		input [2:0] func_read_count;
		input func_write_req;
		input [2:0] func_write_count;
		begin
			if(func_read_req && func_write_req)begin
				if(func_read_count > func_write_count)begin
					func_priority_encoder = 1'b1;
				end
				else begin
					func_priority_encoder = 1'b0;
				end
			end
			else if(func_read_req)begin
				func_priority_encoder = 1'b0;
			end
			else if(func_write_req)begin
				func_priority_encoder = 1'b1;
			end
			else begin
				func_priority_encoder = 1'b0;
			end
		end
	endfunction