data/full_repos/permissive/412284801/T_ff/t_ff_tb.v
1: b'%Error: data/full_repos/permissive/412284801/T_ff/t_ff_tb.v:1: Cannot find include file: t_ff.v\n`include "t_ff.v"\n         ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/412284801/T_ff,data/full_repos/permissive/412284801/t_ff.v\n             data/full_repos/permissive/412284801/T_ff,data/full_repos/permissive/412284801/t_ff.v.v\n             data/full_repos/permissive/412284801/T_ff,data/full_repos/permissive/412284801/t_ff.v.sv\n             t_ff.v\n             t_ff.v.v\n             t_ff.v.sv\n             obj_dir/t_ff.v\n             obj_dir/t_ff.v.v\n             obj_dir/t_ff.v.sv\n%Warning-STMTDLY: data/full_repos/permissive/412284801/T_ff/t_ff_tb.v:9: Unsupported: Ignoring delay on this delayed statement.\n  always #5 clk = ~clk;\n         ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/412284801/T_ff/t_ff_tb.v:14: Unsupported: Ignoring delay on this delayed statement.\n      #15 t = 1\'b0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/412284801/T_ff/t_ff_tb.v:15: Unsupported: Ignoring delay on this delayed statement.\n      #15 reset = 1\'b0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/412284801/T_ff/t_ff_tb.v:16: Unsupported: Ignoring delay on this delayed statement.\n      #15 t = 1\'b1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/412284801/T_ff/t_ff_tb.v:17: Unsupported: Ignoring delay on this delayed statement.\n      #15;\n      ^\n%Error: data/full_repos/permissive/412284801/T_ff/t_ff_tb.v:22: Unsupported or unknown PLI call: $monitor\n    $monitor("Reset = %0b, T = %0b , Q = %0b and Qbar = %0b", reset, t, q, qbar);\n    ^~~~~~~~\n%Error: data/full_repos/permissive/412284801/T_ff/t_ff_tb.v:23: Unsupported or unknown PLI call: $dumpfile\n    $dumpfile("test.vcd");\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/412284801/T_ff/t_ff_tb.v:24: Unsupported or unknown PLI call: $dumpvars\n    $dumpvars(0,t_ff_tb);\n    ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/412284801/T_ff/t_ff_tb.v:25: Unsupported: Ignoring delay on this delayed statement.\n    #150 $finish;\n    ^\n%Error: Exiting due to 4 error(s), 6 warning(s)\n'
module t_ff_tb();
  reg clk = 1'b0, t, reset;
  wire q, qbar;
  integer i;
  
  t_ff dut (clk, t, reset, q, qbar);
  
  always #5 clk = ~clk;
  
  initial begin
    for (i=1;i<=3;i=1+1) begin
      reset = 1'b1;
      #15 t = 1'b0;
      #15 reset = 1'b0;
      #15 t = 1'b1;
      #15;
    end
  end
  
  initial begin
    $monitor("Reset = %0b, T = %0b , Q = %0b and Qbar = %0b", reset, t, q, qbar);
    $dumpfile("test.vcd");
    $dumpvars(0,t_ff_tb);
    #150 $finish;
  end
endmodule
module t_ff_tb();

  reg clk = 1'b0, t, reset;
  wire q, qbar;
  integer i;
  
  t_ff dut (clk, t, reset, q, qbar);
  
  always #5 clk = ~clk;
  
  initial begin
    for (i=1;i<=3;i=1+1) begin
      reset = 1'b1;
      #15 t = 1'b0;
      #15 reset = 1'b0;
      #15 t = 1'b1;
      #15;
    end
  end
  
  initial begin
    $monitor("Reset = %0b, T = %0b , Q = %0b and Qbar = %0b", reset, t, q, qbar);
    $dumpfile("test.vcd");
    $dumpvars(0,t_ff_tb);
    #150 $finish;
  end
endmodule