data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/CU.v
data/verilator_xmls/e0b4a621-5e07-4fe7-9417-08a1b6a938d7.xml
module CU(
    input [5:0] Op,
    input [5:0] Funct,
    output reg MtoRFSel,
    output reg DMWE,
    output reg Branch,
    output reg [2:0] ALUSel,
    output reg ALUInSel,
    output reg RFDSel,
    output reg RFWE,
    output reg Jump
    );
    
    initial Jump <= 0;
    
    always @(Op or Funct)
        if(Op == 6'b100011) begin
            RFWE <= 1'b1;
            RFDSel <= 1'b0;
            ALUInSel <= 1'b1;
            Branch <= 1'b0;
            DMWE <= 1'b0;
            MtoRFSel <= 1'b1;
            ALUSel <= 3'b010;
            Jump <= 1'b0;
        end
        else if(Op == 6'b101011) begin
            RFWE <= 1'b0;
            RFDSel <= 1'bX;
            ALUInSel <= 1'b1;
            Branch <= 1'b0;
            DMWE <= 1'b1;
            MtoRFSel <= 1'bX;
            ALUSel <= 3'b010;
            Jump <= 1'b0;
        end
        else if(Op == 6'b000000) begin
            RFWE <= 1'b1;
            RFDSel <= 1'b1;
            ALUInSel <= 1'b0;
            Branch <= 1'b0;
            DMWE <= 1'b0;
            MtoRFSel <= 1'b0;
            Jump <= 1'b0;
            if (Funct == 6'b100000) begin
                ALUSel <= 3'b010;
            end
            else if (Funct == 6'b100010) begin
                ALUSel <= 3'b110;
            end
            else if (Funct == 6'b000000) begin
                ALUSel <= 3'b011;
            end
            else if (Funct == 6'b000100) begin
                ALUSel <= 3'b100;
            end
            else if (Funct == 6'b000111) begin
                ALUSel <= 3'b101;
            end    
        end
        else if(Op == 6'b000100) begin
            RFWE <= 1'b0;
            RFDSel <= 1'bX;
            ALUInSel <= 1'b0;
            Branch <= 1'b1;
            DMWE <= 1'b0;
            MtoRFSel <= 1'bX;
            ALUSel <= 3'b110;
            Jump <= 1'b0;
        end
        else if(Op == 6'b001000) begin
            RFWE <= 1'b1;
            RFDSel <= 1'b0;
            ALUInSel <= 1'b1;
            Branch <= 1'b0;
            DMWE <= 1'b0;
            MtoRFSel <= 1'b0;
            ALUSel <= 3'b010;
            Jump <= 1'b0;
        end
        else if(Op == 6'b000010) begin
            RFWE <= 1'b0;
            RFDSel <= 1'bX;
            ALUInSel <= 1'bX;
            Branch <= 1'bX;
            DMWE <= 1'b0;
            MtoRFSel <= 1'bX;
            ALUSel <= 3'bXXX;
            Jump <= 1'b1;
        end
endmodule
module CU(
    input [5:0] Op,
    input [5:0] Funct,
    output reg MtoRFSel,
    output reg DMWE,
    output reg Branch,
    output reg [2:0] ALUSel,
    output reg ALUInSel,
    output reg RFDSel,
    output reg RFWE,
    output reg Jump
    );

    
    initial Jump <= 0;
    
    always @(Op or Funct)
        if(Op == 6'b100011) begin
            RFWE <= 1'b1;
            RFDSel <= 1'b0;
            ALUInSel <= 1'b1;
            Branch <= 1'b0;
            DMWE <= 1'b0;
            MtoRFSel <= 1'b1;
            ALUSel <= 3'b010;
            Jump <= 1'b0;
        end
        else if(Op == 6'b101011) begin
            RFWE <= 1'b0;
            RFDSel <= 1'bX;
            ALUInSel <= 1'b1;
            Branch <= 1'b0;
            DMWE <= 1'b1;
            MtoRFSel <= 1'bX;
            ALUSel <= 3'b010;
            Jump <= 1'b0;
        end
        else if(Op == 6'b000000) begin
            RFWE <= 1'b1;
            RFDSel <= 1'b1;
            ALUInSel <= 1'b0;
            Branch <= 1'b0;
            DMWE <= 1'b0;
            MtoRFSel <= 1'b0;
            Jump <= 1'b0;
            if (Funct == 6'b100000) begin
                ALUSel <= 3'b010;
            end
            else if (Funct == 6'b100010) begin
                ALUSel <= 3'b110;
            end
            else if (Funct == 6'b000000) begin
                ALUSel <= 3'b011;
            end
            else if (Funct == 6'b000100) begin
                ALUSel <= 3'b100;
            end
            else if (Funct == 6'b000111) begin
                ALUSel <= 3'b101;
            end    
        end
        else if(Op == 6'b000100) begin
            RFWE <= 1'b0;
            RFDSel <= 1'bX;
            ALUInSel <= 1'b0;
            Branch <= 1'b1;
            DMWE <= 1'b0;
            MtoRFSel <= 1'bX;
            ALUSel <= 3'b110;
            Jump <= 1'b0;
        end
        else if(Op == 6'b001000) begin
            RFWE <= 1'b1;
            RFDSel <= 1'b0;
            ALUInSel <= 1'b1;
            Branch <= 1'b0;
            DMWE <= 1'b0;
            MtoRFSel <= 1'b0;
            ALUSel <= 3'b010;
            Jump <= 1'b0;
        end
        else if(Op == 6'b000010) begin
            RFWE <= 1'b0;
            RFDSel <= 1'bX;
            ALUInSel <= 1'bX;
            Branch <= 1'bX;
            DMWE <= 1'b0;
            MtoRFSel <= 1'bX;
            ALUSel <= 3'bXXX;
            Jump <= 1'b1;
        end
endmodule