data/full_repos/permissive/487110065/Debouncer.v
data/verilator_xmls/6cedc667-2531-4ca1-9682-bdb90734f7d9.xml
module Debouncer(
    clock,
    botao,
    saida
);

input clock;
input botao;
output reg saida;


reg PB_sync_0;  always @(posedge clock) PB_sync_0 <= ~botao;
reg PB_sync_1;  always @(posedge clock) PB_sync_1 <= PB_sync_0;



reg [16:0] PB_cnt;




wire PB_idle = (saida==PB_sync_1);
wire PB_cnt_max = &PB_cnt;

always @(posedge clock)
if(PB_idle)
    PB_cnt <= 0;
else
begin
    PB_cnt <= PB_cnt + 16'd1;
    if(PB_cnt_max) saida <= ~saida;
end

endmodule
module Debouncer(
    clock,
    botao,
    saida
);


input clock;
input botao;
output reg saida;


reg PB_sync_0;  always @(posedge clock) PB_sync_0 <= ~botao;
reg PB_sync_1;  always @(posedge clock) PB_sync_1 <= PB_sync_0;



reg [16:0] PB_cnt;




wire PB_idle = (saida==PB_sync_1);
wire PB_cnt_max = &PB_cnt;

always @(posedge clock)
if(PB_idle)
    PB_cnt <= 0;
else
begin
    PB_cnt <= PB_cnt + 16'd1;
    if(PB_cnt_max) saida <= ~saida;
end

endmodule