data/full_repos/permissive/449807379/CPU_design/flags_enabler.v
1: b'%Warning-WIDTH: data/full_repos/permissive/449807379/CPU_design/flags_enabler.v:14: Operator CASE expects 32 or 10 bits on the Case expression, but Case expression\'s VARREF \'condition\' generates 4 bits.\n                                                                                  : ... In instance flags_enabler\ncase(condition)\n^~~~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module flags_enabler(condition, flags, en_intermediate, en);

input [3:0] condition, flags;
input [15:0] en_intermediate;

output reg [15:0] en;




always @ (*)
begin

case(condition)
	0001: if(flags[2] == 1'b1) en=en_intermediate; else en=16'b0;
	0010: if( (flags[2] == 1'b0) && (flags[3] == flags[0])) en=en_intermediate; else en=16'b0;
	0011: if( (flags[3] == 1'b1) && (flags[0] == 1'b1)) en=en_intermediate; else en=16'b0;
	0100: if( flags[3] == flags[0] ) en=en_intermediate; else en=16'b0;
	0101: if( (flags[3] == 1'b1) || ((flags[3] == 1'b1) && (flags[0] == 1'b1))) en=en_intermediate; else en=16'b0;
	0110: if( (flags[1] == 1'b1) && (flags[3] == 1'b0)) en=en_intermediate; else en=16'b0;
	0111: if( (flags[1] == 1'b0) && (flags[3] == 1'b1) ) en=en_intermediate; else en=16'b0;
	1000: if( ((flags[1] == 1'b1) && (flags[3] == 1'b0)) || (flags[3] == 1'b1)) en=en_intermediate; else en=16'b0;
	default: en=en_intermediate;
endcase
end
endmodule
module flags_enabler(condition, flags, en_intermediate, en);


input [3:0] condition, flags;
input [15:0] en_intermediate;

output reg [15:0] en;




always @ (*)
begin

case(condition)
	0001: if(flags[2] == 1'b1) en=en_intermediate; else en=16'b0;
	0010: if( (flags[2] == 1'b0) && (flags[3] == flags[0])) en=en_intermediate; else en=16'b0;
	0011: if( (flags[3] == 1'b1) && (flags[0] == 1'b1)) en=en_intermediate; else en=16'b0;
	0100: if( flags[3] == flags[0] ) en=en_intermediate; else en=16'b0;
	0101: if( (flags[3] == 1'b1) || ((flags[3] == 1'b1) && (flags[0] == 1'b1))) en=en_intermediate; else en=16'b0;
	0110: if( (flags[1] == 1'b1) && (flags[3] == 1'b0)) en=en_intermediate; else en=16'b0;
	0111: if( (flags[1] == 1'b0) && (flags[3] == 1'b1) ) en=en_intermediate; else en=16'b0;
	1000: if( ((flags[1] == 1'b1) && (flags[3] == 1'b0)) || (flags[3] == 1'b1)) en=en_intermediate; else en=16'b0;
	default: en=en_intermediate;
endcase
end
endmodule