data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/riffa/offset_to_mask.v
1: b'%Error: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/riffa/offset_to_mask.v:35: Cannot find include file: functions.vh\n`include "functions.vh" \n         ^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/riffa,data/full_repos/permissive/498471995/functions.vh\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/riffa,data/full_repos/permissive/498471995/functions.vh.v\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/riffa,data/full_repos/permissive/498471995/functions.vh.sv\n             functions.vh\n             functions.vh.v\n             functions.vh.sv\n             obj_dir/functions.vh\n             obj_dir/functions.vh.v\n             obj_dir/functions.vh.sv\n%Error: Exiting due to 1 error(s)\n'
module offset_to_mask
    #(parameter C_MASK_SWAP = 1,
      parameter C_MASK_WIDTH = 4)
    (
     input                            OFFSET_ENABLE,
     input [clog2s(C_MASK_WIDTH)-1:0] OFFSET,
     output [C_MASK_WIDTH-1:0]        MASK
     );

    reg [7:0]                         _rMask,_rMaskSwap; 
    wire [3:0]                        wSelect;
    assign wSelect = {OFFSET_ENABLE,{{(3-clog2s(C_MASK_WIDTH)){1'b0}},OFFSET}};
    assign MASK = (C_MASK_SWAP)? _rMaskSwap[7 -: C_MASK_WIDTH]: _rMask[C_MASK_WIDTH-1:0];
    always @(*) begin
        _rMask = 0;
        _rMaskSwap = 0;

        casex(wSelect)
            default: begin
                _rMask = 8'b1111_1111;
                _rMaskSwap = 8'b1111_1111;
            end
            4'b1000: begin
                _rMask = 8'b0000_0001;
                _rMaskSwap = 8'b1111_1111;
            end
            4'b1001: begin
                _rMask = 8'b0000_0011;
                _rMaskSwap = 8'b0111_1111;
            end
            4'b1010: begin
                _rMask = 8'b0000_0111;
                _rMaskSwap = 8'b0011_1111;
            end
            4'b1011: begin
                _rMask = 8'b0000_1111;
                _rMaskSwap = 8'b0001_1111;
            end
            4'b1100: begin
                _rMask = 8'b0001_1111;
                _rMaskSwap = 8'b0000_1111;
            end
            4'b1101: begin
                _rMask = 8'b0011_1111;
                _rMaskSwap = 8'b0000_0111;
            end
            4'b1110: begin
                _rMask = 8'b0111_1111;
                _rMaskSwap = 8'b0000_0011;
            end
            4'b1111: begin
                _rMask = 8'b1111_1111;
                _rMaskSwap = 8'b0000_0001;
            end
        endcase


    end
endmodule
module offset_to_mask
    #(parameter C_MASK_SWAP = 1,
      parameter C_MASK_WIDTH = 4)
    (
     input                            OFFSET_ENABLE,
     input [clog2s(C_MASK_WIDTH)-1:0] OFFSET,
     output [C_MASK_WIDTH-1:0]        MASK
     );


    reg [7:0]                         _rMask,_rMaskSwap; 
    wire [3:0]                        wSelect;
    assign wSelect = {OFFSET_ENABLE,{{(3-clog2s(C_MASK_WIDTH)){1'b0}},OFFSET}};
    assign MASK = (C_MASK_SWAP)? _rMaskSwap[7 -: C_MASK_WIDTH]: _rMask[C_MASK_WIDTH-1:0];
    always @(*) begin
        _rMask = 0;
        _rMaskSwap = 0;

        casex(wSelect)
            default: begin
                _rMask = 8'b1111_1111;
                _rMaskSwap = 8'b1111_1111;
            end
            4'b1000: begin
                _rMask = 8'b0000_0001;
                _rMaskSwap = 8'b1111_1111;
            end
            4'b1001: begin
                _rMask = 8'b0000_0011;
                _rMaskSwap = 8'b0111_1111;
            end
            4'b1010: begin
                _rMask = 8'b0000_0111;
                _rMaskSwap = 8'b0011_1111;
            end
            4'b1011: begin
                _rMask = 8'b0000_1111;
                _rMaskSwap = 8'b0001_1111;
            end
            4'b1100: begin
                _rMask = 8'b0001_1111;
                _rMaskSwap = 8'b0000_1111;
            end
            4'b1101: begin
                _rMask = 8'b0011_1111;
                _rMaskSwap = 8'b0000_0111;
            end
            4'b1110: begin
                _rMask = 8'b0111_1111;
                _rMaskSwap = 8'b0000_0011;
            end
            4'b1111: begin
                _rMask = 8'b1111_1111;
                _rMaskSwap = 8'b0000_0001;
            end
        endcase


    end
endmodule