data/full_repos/permissive/510695465/ImmGen.v
data/verilator_xmls/19beb157-17d2-4af5-8981-c5be023f5148.xml
module ImmGen(InstrCode,ImmSel,extended);
input [7:0] InstrCode;
input ImmSel;
output [7:0] extended;

reg [7:0] ext;
always@(InstrCode,ImmSel)
begin
    case (ImmSel)
    1'b0:  ext = {{5{1'b0}},InstrCode[2:0]};
    1'b1:  ext = {{2{1'b0}},InstrCode[5:0]};
    endcase
end

assign extended = ext;
endmodule
module ImmGen(InstrCode,ImmSel,extended);

input [7:0] InstrCode;
input ImmSel;
output [7:0] extended;

reg [7:0] ext;
always@(InstrCode,ImmSel)
begin
    case (ImmSel)
    1'b0:  ext = {{5{1'b0}},InstrCode[2:0]};
    1'b1:  ext = {{2{1'b0}},InstrCode[5:0]};
    endcase
end

assign extended = ext;
endmodule