data/full_repos/permissive/503053625/fpga_projects/SPGD/src/tb/gen/gen_reg_tb.v
1: b"%Error: data/full_repos/permissive/503053625/fpga_projects/SPGD/src/tb/gen/gen_reg_tb.v:3: Cannot find file containing module: 'gen_reg'\ngen_reg #(\n^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/503053625/fpga_projects/SPGD/src/tb/gen,data/full_repos/permissive/503053625/gen_reg\n             data/full_repos/permissive/503053625/fpga_projects/SPGD/src/tb/gen,data/full_repos/permissive/503053625/gen_reg.v\n             data/full_repos/permissive/503053625/fpga_projects/SPGD/src/tb/gen,data/full_repos/permissive/503053625/gen_reg.sv\n             gen_reg\n             gen_reg.v\n             gen_reg.sv\n             obj_dir/gen_reg\n             obj_dir/gen_reg.v\n             obj_dir/gen_reg.sv\n%Error: Exiting due to 1 error(s)\n"
module gen_reg_tb;

gen_reg #(
	.DATA_WIDTH(12)
) REG0 (
	.data_in(),
	.clk(),
	.wrt(),
	.rst(),
	.data_out()
);

endmodule
module gen_reg_tb;


gen_reg #(
	.DATA_WIDTH(12)
) REG0 (
	.data_in(),
	.clk(),
	.wrt(),
	.rst(),
	.data_out()
);

endmodule