data/full_repos/permissive/501791642/ISE_devel/utils.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/501791642/ISE_devel/utils.v:25: Multiple top level modules\n                                                                            : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                            : ... Top module \'prescaler\'\nmodule prescaler #(\n       ^~~~~~~~~\n                                                                            : ... Top module \'up_cnt_mod\'\nmodule up_cnt_mod #(  \n       ^~~~~~~~~~\n                                                                            : ... Top module \'shift_reg\'\nmodule shift_reg #(\n       ^~~~~~~~~\n                                                                            : ... Top module \'register\'\nmodule register #(\n       ^~~~~~~~\n                                                                            : ... Top module \'register_clr\'\nmodule register_clr #(\n       ^~~~~~~~~~~~\n%Error: Exiting due to 1 warning(s)\n'
module prescaler #(
    parameter MODULO = 100000000,
    parameter W = 27
    
)
(
    input CLK,
    input CE,
    output CEO
);

reg [W-1:0] Q = 0;

always @(posedge CLK)
    if (CE)
        if (Q == MODULO-1)
            Q <= {W{1'd0}};
        else
            Q <= Q+1;     

    assign CEO = CE & (Q == MODULO-1);
    
endmodule
module prescaler #(
    parameter MODULO = 100000000,
    parameter W = 27
    
)
(
    input CLK,
    input CE,
    output CEO
);


reg [W-1:0] Q = 0;

always @(posedge CLK)
    if (CE)
        if (Q == MODULO-1)
            Q <= {W{1'd0}};
        else
            Q <= Q+1;     

    assign CEO = CE & (Q == MODULO-1);
    
endmodule