data/full_repos/permissive/499550390/notgate/tb_notgate.v
1: b'%Error: data/full_repos/permissive/499550390/notgate/tb_notgate.v:1: Cannot find include file: notgate.v\n`include "notgate.v" \n         ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/499550390/notgate,data/full_repos/permissive/499550390/notgate.v\n             data/full_repos/permissive/499550390/notgate,data/full_repos/permissive/499550390/notgate.v.v\n             data/full_repos/permissive/499550390/notgate,data/full_repos/permissive/499550390/notgate.v.sv\n             notgate.v\n             notgate.v.v\n             notgate.v.sv\n             obj_dir/notgate.v\n             obj_dir/notgate.v.v\n             obj_dir/notgate.v.sv\n%Error: data/full_repos/permissive/499550390/notgate/tb_notgate.v:13: Unsupported or unknown PLI call: $dumpfile\n  $dumpfile("tb_notgate.vcd");\n  ^~~~~~~~~\n%Error: data/full_repos/permissive/499550390/notgate/tb_notgate.v:14: Unsupported or unknown PLI call: $dumpvars\n  $dumpvars(0,tb_notgate);\n  ^~~~~~~~~\n%Error: data/full_repos/permissive/499550390/notgate/tb_notgate.v:15: Unsupported or unknown PLI call: $monitor\n  $monitor($time);\n  ^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/499550390/notgate/tb_notgate.v:16: Unsupported: Ignoring delay on this delayed statement.\n  #5 a=0;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/499550390/notgate/tb_notgate.v:17: Unsupported: Ignoring delay on this delayed statement.\n  #5 a=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/499550390/notgate/tb_notgate.v:20: Unsupported: Ignoring delay on this delayed statement.\n  #5 $finish;\n  ^\n%Error: Exiting due to 4 error(s), 3 warning(s)\n'
module tb_notgate();
	
	reg a;
	wire y;
	
	
	notgate DUT(a,y);
	
	initial begin
		$dumpfile("tb_notgate.vcd");
		$dumpvars(0,tb_notgate);
		$monitor($time);
		#5 a=0;
		#5 a=1;
		
		$display("success");
		#5 $finish;
		
	end
endmodule
module tb_notgate();

	
	reg a;
	wire y;
	
	
	notgate DUT(a,y);
	
	initial begin
		$dumpfile("tb_notgate.vcd");
		$dumpvars(0,tb_notgate);
		$monitor($time);
		#5 a=0;
		#5 a=1;
		
		$display("success");
		#5 $finish;
		
	end
endmodule