data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v
1: b"%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:125: Cannot find file containing module: 'PC'\n    PC ProgramCounter(\n    ^~\n        ... Looked in:\n             data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new,data/full_repos/permissive/482975152/PC\n             data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new,data/full_repos/permissive/482975152/PC.v\n             data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new,data/full_repos/permissive/482975152/PC.sv\n             PC\n             PC.v\n             PC.sv\n             obj_dir/PC\n             obj_dir/PC.v\n             obj_dir/PC.sv\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:130: Cannot find file containing module: 'IM'\n    IM InstructionMemory(\n    ^~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:133: Cannot find file containing module: 'PCAdder'\n    PCAdder ProgramCounterAdder(\n    ^~~~~~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:136: Cannot find file containing module: 'Mux'\n    Mux BranchMux(\n    ^~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:141: Cannot find file containing module: 'Mux'\n    Mux JumpMux(\n    ^~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:148: Cannot find file containing module: 'DReg'\n    DReg D(\n    ^~~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:156: Cannot find file containing module: 'CU'\n    CU ControlUnit(\n    ^~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:167: Cannot find file containing module: 'RF'\n    RF RegisterFile(\n    ^~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:176: Cannot find file containing module: 'Mux'\n    Mux ForwardADMux(\n    ^~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:181: Cannot find file containing module: 'Mux'\n    Mux ForwardBDMux(\n    ^~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:186: Cannot find file containing module: 'Equals'\n    Equals Eq(\n    ^~~~~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:190: Cannot find file containing module: 'BranchAND'\n    BranchAND BranchA(\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:194: Cannot find file containing module: 'SE'\n    SE SignExtend(\n    ^~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:197: Cannot find file containing module: 'PCBranch'\n    PCBranch PCB(\n    ^~~~~~~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:203: Cannot find file containing module: 'EReg'\n    EReg E(\n    ^~~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:232: Cannot find file containing module: 'in3Mux'\n    in3Mux ForwardAEMux(\n    ^~~~~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:238: Cannot find file containing module: 'in3Mux'\n    in3Mux ForwardBEMux(\n    ^~~~~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:244: Cannot find file containing module: 'Mux'\n    Mux ALUIn2Mux(\n    ^~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:249: Cannot find file containing module: 'ALU'\n    ALU ArithmeticLogicUnit(\n    ^~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:255: Cannot find file containing module: 'Mux'\n    Mux RFDMux(\n    ^~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:262: Cannot find file containing module: 'MReg'\n    MReg M(\n    ^~~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:276: Cannot find file containing module: 'DM'\n    DM DataMemory(\n    ^~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:284: Cannot find file containing module: 'WReg'\n    WReg W(\n    ^~~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:296: Cannot find file containing module: 'Mux'\n    Mux MtoRFMux(\n    ^~~\n%Error: data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/Top.v:301: Cannot find file containing module: 'HU'\n    HU HazardUnit(\n    ^~\n%Error: Exiting due to 25 error(s)\n"
module Top(
    input clk
    );
    

    wire [31:0] PCF;
    







    wire [31:0] Instr;
    

    wire [31:0] PCp1F;
    

    wire [31:0] BranchOut;
    

    wire [31:0] JumpOut;
    

    wire [31:0] InstrD;
    wire [31:0] PCp1D;
    

    wire MtoRFSelD;
    wire DMWED;
    wire BranchD;
    wire [2:0] ALUSelD;
    wire ALUInSelD;
    wire RFDSelD;
    wire RFWED;
    wire JumpD;
    

    wire [31:0] RFRD1;
    wire [31:0] RFRD2;
    

    wire [31:0] ForwardADOut;
    

    wire [31:0] ForwardBDOut;
    

    wire EqualD;
    

    wire PCSelD;
    

    wire [31:0] SImmD;
    

    wire [31:0] PCBranchD;
    

    wire RFWEE;
    wire MtoRFSelE;
    wire DMWEE;
    wire BranchE;
    wire [2:0] ALUSelE;
    wire ALUInSelE;
    wire RFDSelE;
    wire [31:0] ForwardAE00;
    wire [31:0] ForwardBE00;
    wire [4:0] rsE;
    wire [4:0] rtE;
    wire [4:0] rdE;
    wire [31:0] SImmE;
    wire [4:0] shamtE;
    

    wire [31:0] ForwardAEOut;
    

    wire [31:0] ForwardBEOut;
    

    wire [31:0] ALUOut;
    

    wire [31:0] ALUIn2E;
    

    wire [4:0] RFAE;
    

    wire RFWEM;
    wire MtoRFSelM;
    wire DMWEM;
    wire [31:0] ALUOutM;
    wire [31:0] DMdinM;
    wire [4:0] RFAM;
    

    wire [31:0] DMRD;
    

    wire RFWEW;
    wire MtoRFSelW;
    wire [31:0] ALUOutW;
    wire [31:0] DMOutW;
    wire [4:0] RFAW;
    

    wire [31:0] ResultW;
    

    wire Stall;
    wire ForwardAD;
    wire ForwardBD;
    wire Flush;
    wire [1:0] ForwardAE;
    wire [1:0] ForwardBE;
    

    PC ProgramCounter(
        .clk(clk),
        .EN(Stall),
        .PCIn(JumpOut),
        .PCOut(PCF));
    IM InstructionMemory(
        .IMA(PCF),
        .IMRD(Instr));
    PCAdder ProgramCounterAdder(
        .PCOld(PCF),
        .PCNew(PCp1F));  
    Mux BranchMux(
        .Sel(PCSelD),
        .In_0(PCp1F),
        .In_1(PCBranchD),
        .Mux_Out(BranchOut));
    Mux JumpMux(
        .Sel(JumpD),
        .In_0(BranchOut),
        .In_1({PCp1F[31:26],InstrD[25:0]}),
        .Mux_Out(JumpOut));
    

    DReg D(
        .clk(clk),
        .EN(Stall),
        .CLR(PCSelD),
        .IMRD(Instr),
        .PCp1F(PCp1F),
        .InstrD(InstrD),
        .PCp1D(PCp1D));
    CU ControlUnit(
        .Op(InstrD[31:26]),
        .Funct(InstrD[5:0]),
        .MtoRFSel(MtoRFSelD),
        .DMWE(DMWED),
        .Branch(BranchD),
        .ALUSel(ALUSelD),
        .ALUInSel(ALUInSelD),
        .RFDSel(RFDSelD),
        .RFWE(RFWED),
        .Jump(JumpD));       
    RF RegisterFile(
        .clk(clk),
        .RFWE(RFWEW),
        .RFRA1(InstrD[25:21]),
        .RFRA2(InstrD[20:16]),
        .RFWA(RFAW),
        .RFWD(ResultW),
        .RFRD1(RFRD1),
        .RFRD2(RFRD2));
    Mux ForwardADMux(
        .Sel(ForwardAD),
        .In_0(RFRD1),
        .In_1(ALUOutM),
        .Mux_Out(ForwardADOut));
    Mux ForwardBDMux(
        .Sel(ForwardBD),
        .In_0(RFRD2),
        .In_1(ALUOutM),
        .Mux_Out(ForwardBDOut)); 
    Equals Eq(
        .First(ForwardADOut),
        .Second(ForwardBDOut),
        .EqualD(EqualD));  
    BranchAND BranchA(
        .Branch(BranchD),
        .Zero(EqualD),
        .PCSelOut(PCSelD));        
    SE SignExtend(
        .Imm(InstrD[15:0]),
        .SImm(SImmD));
    PCBranch PCB(
        .SImm(SImmD),
        .PCp1(PCp1D),
        .BranchOut(PCBranchD));
        

    EReg E(
        .clk(clk),
        .CLR(Flush),
        .RFWED(RFWED),
        .MtoRFSelD(MtoRFSelD),
        .DMWED(DMWED),
        .ALUSelD(ALUSelD),
        .ALUInSelD(ALUInSelD),
        .RFDSelD(RFDSelD),
        .RFRD1(RFRD1),
        .RFRD2(RFRD2),
        .rsD(InstrD[25:21]),
        .rtD(InstrD[20:16]),
        .rdD(InstrD[15:11]),
        .SImmD(SImmD),
        .shamtD(InstrD[10:6]),
        .RFWEE(RFWEE),
        .MtoRFSelE(MtoRFSelE),
        .DMWEE(DMWEE),
        .ALUSelE(ALUSelE),
        .ALUInSelE(ALUInSelE),
        .RFDSelE(RFDSelE),
        .ForwardAE00(ForwardAE00),
        .ForwardBE00(ForwardBE00),
        .rsE(rsE),
        .rtE(rtE),
        .rdE(rdE),
        .SImmE(SImmE),
        .shamtE(shamtE));
    in3Mux ForwardAEMux(
        .Sel(ForwardAE),
        .In_00(ForwardAE00),
        .In_01(ResultW),
        .In_10(ALUOutM),
        .Mux_Out(ForwardAEOut));
    in3Mux ForwardBEMux(
        .Sel(ForwardBE),
        .In_00(ForwardBE00),
        .In_01(ResultW),
        .In_10(ALUOutM),
        .Mux_Out(ForwardBEOut));
    Mux ALUIn2Mux(
        .Sel(ALUInSelE),
        .In_0(ForwardBEOut),
        .In_1(SImmE),
        .Mux_Out(ALUIn2E));
    ALU ArithmeticLogicUnit(
        .ALUSel(ALUSelE),
        .ALUIn1(ForwardAEOut),
        .ALUIn2(ALUIn2E),
        .shamt(shamtE),
        .ALUOut(ALUOut));
    Mux RFDMux(
        .Sel(RFDSelE),
        .In_0(rtE),
        .In_1(rdE),
        .Mux_Out(RFAE));
    

    MReg M(
        .clk(clk),
        .RFWEE(RFWEE),
        .MtoRFSelE(MtoRFSelE),
        .DMWEE(DMWEE),
        .ALUOut(ALUOut),
        .DMdinE(ForwardBEOut),
        .RFAE(RFAE),
        .RFWEM(RFWEM),
        .MtoRFSelM(MtoRFSelM),
        .DMWEM(DMWEM),
        .ALUOutM(ALUOutM),
        .DMdinM(DMdinM),
        .RFAM(RFAM));
    DM DataMemory(
        .clk(clk),
        .DMWE(DMWEM),
        .DMA(ALUOutM),
        .DMWD(DMdinM),
        .DMRD(DMRD));  
    

    WReg W(
        .clk(clk),
        .RFWEM(RFWEM),
        .MtoRFSelM(MtoRFSelM),
        .ALUOutM(ALUOutM),
        .DMRD(DMRD),
        .RFAM(RFAM),
        .RFWEW(RFWEW),
        .MtoRFSelW(MtoRFSelW),
        .ALUOutW(ALUOutW),
        .DMOutW(DMOutW),
        .RFAW(RFAW));
    Mux MtoRFMux(
        .Sel(MtoRFSelW),
        .In_0(ALUOutW),
        .In_1(DMOutW),
        .Mux_Out(ResultW));
    HU HazardUnit(
        .BranchD(BranchD),
        .rsD(InstrD[25:21]),
        .rtD(InstrD[20:16]),
        .rsE(rsE),
        .rtE(rtE),
        .RFAE(RFAE),
        .MtoRFSelE(MtoRFSelE),
        .RFWEE(RFWEE),
        .RFAM(RFAM),
        .RFWEM(RFWEM),
        .RFAW(RFAW),
        .RFWEW(RFWEW),
        .Stall(Stall),
        .ForwardAD(ForwardAD),
        .ForwardBD(ForwardBD),
        .Flush(Flush),
        .ForwardAE(ForwardAE),
        .ForwardBE(ForwardBE));
    
endmodule
module Top(
    input clk
    );

    

    wire [31:0] PCF;
    







    wire [31:0] Instr;
    

    wire [31:0] PCp1F;
    

    wire [31:0] BranchOut;
    

    wire [31:0] JumpOut;
    

    wire [31:0] InstrD;
    wire [31:0] PCp1D;
    

    wire MtoRFSelD;
    wire DMWED;
    wire BranchD;
    wire [2:0] ALUSelD;
    wire ALUInSelD;
    wire RFDSelD;
    wire RFWED;
    wire JumpD;
    

    wire [31:0] RFRD1;
    wire [31:0] RFRD2;
    

    wire [31:0] ForwardADOut;
    

    wire [31:0] ForwardBDOut;
    

    wire EqualD;
    

    wire PCSelD;
    

    wire [31:0] SImmD;
    

    wire [31:0] PCBranchD;
    

    wire RFWEE;
    wire MtoRFSelE;
    wire DMWEE;
    wire BranchE;
    wire [2:0] ALUSelE;
    wire ALUInSelE;
    wire RFDSelE;
    wire [31:0] ForwardAE00;
    wire [31:0] ForwardBE00;
    wire [4:0] rsE;
    wire [4:0] rtE;
    wire [4:0] rdE;
    wire [31:0] SImmE;
    wire [4:0] shamtE;
    

    wire [31:0] ForwardAEOut;
    

    wire [31:0] ForwardBEOut;
    

    wire [31:0] ALUOut;
    

    wire [31:0] ALUIn2E;
    

    wire [4:0] RFAE;
    

    wire RFWEM;
    wire MtoRFSelM;
    wire DMWEM;
    wire [31:0] ALUOutM;
    wire [31:0] DMdinM;
    wire [4:0] RFAM;
    

    wire [31:0] DMRD;
    

    wire RFWEW;
    wire MtoRFSelW;
    wire [31:0] ALUOutW;
    wire [31:0] DMOutW;
    wire [4:0] RFAW;
    

    wire [31:0] ResultW;
    

    wire Stall;
    wire ForwardAD;
    wire ForwardBD;
    wire Flush;
    wire [1:0] ForwardAE;
    wire [1:0] ForwardBE;
    

    PC ProgramCounter(
        .clk(clk),
        .EN(Stall),
        .PCIn(JumpOut),
        .PCOut(PCF));
    IM InstructionMemory(
        .IMA(PCF),
        .IMRD(Instr));
    PCAdder ProgramCounterAdder(
        .PCOld(PCF),
        .PCNew(PCp1F));  
    Mux BranchMux(
        .Sel(PCSelD),
        .In_0(PCp1F),
        .In_1(PCBranchD),
        .Mux_Out(BranchOut));
    Mux JumpMux(
        .Sel(JumpD),
        .In_0(BranchOut),
        .In_1({PCp1F[31:26],InstrD[25:0]}),
        .Mux_Out(JumpOut));
    

    DReg D(
        .clk(clk),
        .EN(Stall),
        .CLR(PCSelD),
        .IMRD(Instr),
        .PCp1F(PCp1F),
        .InstrD(InstrD),
        .PCp1D(PCp1D));
    CU ControlUnit(
        .Op(InstrD[31:26]),
        .Funct(InstrD[5:0]),
        .MtoRFSel(MtoRFSelD),
        .DMWE(DMWED),
        .Branch(BranchD),
        .ALUSel(ALUSelD),
        .ALUInSel(ALUInSelD),
        .RFDSel(RFDSelD),
        .RFWE(RFWED),
        .Jump(JumpD));       
    RF RegisterFile(
        .clk(clk),
        .RFWE(RFWEW),
        .RFRA1(InstrD[25:21]),
        .RFRA2(InstrD[20:16]),
        .RFWA(RFAW),
        .RFWD(ResultW),
        .RFRD1(RFRD1),
        .RFRD2(RFRD2));
    Mux ForwardADMux(
        .Sel(ForwardAD),
        .In_0(RFRD1),
        .In_1(ALUOutM),
        .Mux_Out(ForwardADOut));
    Mux ForwardBDMux(
        .Sel(ForwardBD),
        .In_0(RFRD2),
        .In_1(ALUOutM),
        .Mux_Out(ForwardBDOut)); 
    Equals Eq(
        .First(ForwardADOut),
        .Second(ForwardBDOut),
        .EqualD(EqualD));  
    BranchAND BranchA(
        .Branch(BranchD),
        .Zero(EqualD),
        .PCSelOut(PCSelD));        
    SE SignExtend(
        .Imm(InstrD[15:0]),
        .SImm(SImmD));
    PCBranch PCB(
        .SImm(SImmD),
        .PCp1(PCp1D),
        .BranchOut(PCBranchD));
        

    EReg E(
        .clk(clk),
        .CLR(Flush),
        .RFWED(RFWED),
        .MtoRFSelD(MtoRFSelD),
        .DMWED(DMWED),
        .ALUSelD(ALUSelD),
        .ALUInSelD(ALUInSelD),
        .RFDSelD(RFDSelD),
        .RFRD1(RFRD1),
        .RFRD2(RFRD2),
        .rsD(InstrD[25:21]),
        .rtD(InstrD[20:16]),
        .rdD(InstrD[15:11]),
        .SImmD(SImmD),
        .shamtD(InstrD[10:6]),
        .RFWEE(RFWEE),
        .MtoRFSelE(MtoRFSelE),
        .DMWEE(DMWEE),
        .ALUSelE(ALUSelE),
        .ALUInSelE(ALUInSelE),
        .RFDSelE(RFDSelE),
        .ForwardAE00(ForwardAE00),
        .ForwardBE00(ForwardBE00),
        .rsE(rsE),
        .rtE(rtE),
        .rdE(rdE),
        .SImmE(SImmE),
        .shamtE(shamtE));
    in3Mux ForwardAEMux(
        .Sel(ForwardAE),
        .In_00(ForwardAE00),
        .In_01(ResultW),
        .In_10(ALUOutM),
        .Mux_Out(ForwardAEOut));
    in3Mux ForwardBEMux(
        .Sel(ForwardBE),
        .In_00(ForwardBE00),
        .In_01(ResultW),
        .In_10(ALUOutM),
        .Mux_Out(ForwardBEOut));
    Mux ALUIn2Mux(
        .Sel(ALUInSelE),
        .In_0(ForwardBEOut),
        .In_1(SImmE),
        .Mux_Out(ALUIn2E));
    ALU ArithmeticLogicUnit(
        .ALUSel(ALUSelE),
        .ALUIn1(ForwardAEOut),
        .ALUIn2(ALUIn2E),
        .shamt(shamtE),
        .ALUOut(ALUOut));
    Mux RFDMux(
        .Sel(RFDSelE),
        .In_0(rtE),
        .In_1(rdE),
        .Mux_Out(RFAE));
    

    MReg M(
        .clk(clk),
        .RFWEE(RFWEE),
        .MtoRFSelE(MtoRFSelE),
        .DMWEE(DMWEE),
        .ALUOut(ALUOut),
        .DMdinE(ForwardBEOut),
        .RFAE(RFAE),
        .RFWEM(RFWEM),
        .MtoRFSelM(MtoRFSelM),
        .DMWEM(DMWEM),
        .ALUOutM(ALUOutM),
        .DMdinM(DMdinM),
        .RFAM(RFAM));
    DM DataMemory(
        .clk(clk),
        .DMWE(DMWEM),
        .DMA(ALUOutM),
        .DMWD(DMdinM),
        .DMRD(DMRD));  
    

    WReg W(
        .clk(clk),
        .RFWEM(RFWEM),
        .MtoRFSelM(MtoRFSelM),
        .ALUOutM(ALUOutM),
        .DMRD(DMRD),
        .RFAM(RFAM),
        .RFWEW(RFWEW),
        .MtoRFSelW(MtoRFSelW),
        .ALUOutW(ALUOutW),
        .DMOutW(DMOutW),
        .RFAW(RFAW));
    Mux MtoRFMux(
        .Sel(MtoRFSelW),
        .In_0(ALUOutW),
        .In_1(DMOutW),
        .Mux_Out(ResultW));
    HU HazardUnit(
        .BranchD(BranchD),
        .rsD(InstrD[25:21]),
        .rtD(InstrD[20:16]),
        .rsE(rsE),
        .rtE(rtE),
        .RFAE(RFAE),
        .MtoRFSelE(MtoRFSelE),
        .RFWEE(RFWEE),
        .RFAM(RFAM),
        .RFWEM(RFWEM),
        .RFAW(RFAW),
        .RFWEW(RFWEW),
        .Stall(Stall),
        .ForwardAD(ForwardAD),
        .ForwardBD(ForwardBD),
        .Flush(Flush),
        .ForwardAE(ForwardAE),
        .ForwardBE(ForwardBE));
    
endmodule