data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:121: Unsupported: Ignoring delay on this delayed statement.\n           #20\n           ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:135: syntax error, unexpected \'@\'\n           @(posedge temp_data_CLK)\n           ^\n%Warning-STMTDLY: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:134: Unsupported: Ignoring delay on this delayed statement.\n           #20\n           ^\n%Warning-STMTDLY: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:140: Unsupported: Ignoring delay on this delayed statement.\n           #0.1 temp_data_cen_internal  = 1\'b0; \n           ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:143: syntax error, unexpected \'@\'\n               @(posedge temp_data_CLK)\n               ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:149: syntax error, unexpected \'@\'\n           @(posedge temp_data_CLK)\n           ^\n%Warning-STMTDLY: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:154: Unsupported: Ignoring delay on this delayed statement.\n           #0.1 temp_data_cen_internal  = 1\'b0; \n           ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:157: syntax error, unexpected \'@\'\n               @(posedge temp_data_CLK)\n               ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:161: syntax error, unexpected \'@\'\n               @(posedge temp_data_CLK)\n               ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:174: syntax error, unexpected \'#\'\n           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1\'b0}};\n           ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:179: syntax error, unexpected \'@\'\n               @(posedge temp_data_CLK)\n               ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:200: syntax error, unexpected \'@\'\n                 @(posedge temp_data_CLK)\n                 ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:230: syntax error, unexpected \'#\'\n           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1\'b0}};\n           ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:343: syntax error, unexpected \'#\'\n           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1\'b0}};\n           ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:371: syntax error, unexpected \'@\'\n               @(posedge temp_tag_CLK)\n               ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:393: syntax error, unexpected \'@\'\n                 @(posedge temp_tag_CLK)\n                 ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:422: syntax error, unexpected \'#\'\n           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1\'b0}};\n           ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:538: syntax error, unexpected \'#\'\n           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1\'b0}};\n           ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:566: syntax error, unexpected \'@\'\n               @(posedge temp_dirty_CLK)\n               ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:587: syntax error, unexpected \'@\'\n                 @(posedge temp_dirty_CLK)\n                 ^\n%Error: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:616: syntax error, unexpected \'#\'\n           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1\'b0}};\n           ^\n%Warning-STMTDLY: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:745: Unsupported: Ignoring delay on this delayed statement.\n#(10/2)  temp_tag_CLK = ~temp_tag_CLK;\n^\n%Warning-STMTDLY: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:747: Unsupported: Ignoring delay on this delayed statement.\n#(10/2)  temp_dirty_CLK = ~temp_dirty_CLK;\n^\n%Warning-STMTDLY: data/full_repos/permissive/418752214/smart_run/impl/mem_icg_test/cpu_dmem_test_tb.v:749: Unsupported: Ignoring delay on this delayed statement.\n#(10/2)  temp_forever_cpuclk = ~temp_forever_cpuclk;\n^\n%Error: Exiting due to 17 error(s), 7 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module cpu_dmem_test_tb(
dmem_passed
);
output dmem_passed;
reg    dmem_passed;






















`ifdef DCACHE_32K
parameter LOCAL_DATA_ADDR_WIDTH  = 10;
parameter LOCAL_TAG_ADDR_WIDTH   = 8;
parameter LOCAL_DIRTY_ADDR_WIDTH = 8;
`endif

`ifdef DCACHE_64K
parameter LOCAL_DATA_ADDR_WIDTH  = 11;
parameter LOCAL_TAG_ADDR_WIDTH   = 9;
parameter LOCAL_DIRTY_ADDR_WIDTH = 9;
`endif


`ifdef L1_CACHE_ECC
parameter LOCAL_DATA_DATA_WIDTH  = 39;
parameter LOCAL_DIRTY_DATA_WIDTH = 21;
parameter LOCAL_DIRTY_WE_WIDTH   = 21;
`else
parameter LOCAL_DATA_DATA_WIDTH  = 32;
parameter LOCAL_DIRTY_DATA_WIDTH = 7;
parameter LOCAL_DIRTY_WE_WIDTH   = 7;
`endif

parameter LOCAL_DATA_WE_WIDTH   = 4;

parameter LOCAL_TAG_DATA_WIDTH = 52;
parameter LOCAL_TAG_WE_WIDTH   = 2;




reg [ LOCAL_DATA_ADDR_WIDTH-1 : 0 ] temp_data_addr_internal;
reg [ LOCAL_DATA_DATA_WIDTH-1 : 0 ] temp_data_din_internal ;
reg [ LOCAL_DATA_WE_WIDTH  -1 : 0 ] temp_data_wen_internal ;
reg                                 temp_data_cen_internal ;
reg                                 temp_data_CLK          ;
wire [ LOCAL_DATA_DATA_WIDTH-1 : 0] temp_data_q_internal   ;
reg  [ LOCAL_DATA_DATA_WIDTH-1 : 0] golden_data      ;
reg  [ LOCAL_DATA_DATA_WIDTH-1 : 0] data_mask   ;
reg  [ LOCAL_DATA_DATA_WIDTH-1 : 0] data_mask_ff  ;


reg [ LOCAL_TAG_ADDR_WIDTH-1 : 0 ] temp_tag_addr_internal;
reg [ LOCAL_TAG_DATA_WIDTH-1 : 0 ] temp_tag_din_internal ;
reg [ LOCAL_TAG_WE_WIDTH  -1 : 0 ] temp_tag_wen_internal ;
reg                                temp_tag_cen_internal ;
reg                                temp_tag_CLK          ;
wire [ LOCAL_TAG_DATA_WIDTH-1 : 0] temp_tag_q_internal   ;
reg  [ LOCAL_TAG_DATA_WIDTH-1 : 0] golden_tag      ;
reg  [ LOCAL_TAG_DATA_WIDTH-1 : 0] tag_mask   ;
reg  [ LOCAL_TAG_DATA_WIDTH-1 : 0] tag_mask_ff   ;


reg [ LOCAL_DIRTY_ADDR_WIDTH-1 : 0 ] temp_dirty_addr_internal;
reg [ LOCAL_DIRTY_DATA_WIDTH-1 : 0 ] temp_dirty_din_internal ;
reg [ LOCAL_DIRTY_WE_WIDTH  -1 : 0 ] temp_dirty_wen_internal ;
reg                                  temp_dirty_cen_internal ;
reg                                  temp_dirty_CLK          ;
wire [ LOCAL_DIRTY_DATA_WIDTH-1 : 0] temp_dirty_q_internal   ;
reg  [ LOCAL_DIRTY_DATA_WIDTH-1 : 0] golden_dirty      ;
reg  [ LOCAL_DIRTY_DATA_WIDTH-1 : 0] dirty_mask   ;
reg  [ LOCAL_DIRTY_DATA_WIDTH-1 : 0] dirty_mask_ff   ;


reg temp_forever_cpuclk      ;
reg temp_external_en         ;
reg temp_pad_yy_test_mode    ;
wire temp_xor_clk            ;


integer i;

initial 
begin
dmem_passed = 1'b0;

           #20
           temp_forever_cpuclk         = 1'b0;
           temp_external_en            = 1'b0;
           temp_pad_yy_test_mode       = 1'b0;


           temp_data_CLK               = 1'b0; 
           temp_data_cen_internal      = 1'b0; 
           temp_data_wen_internal      = {LOCAL_DATA_WE_WIDTH{1'b1}};
           temp_data_addr_internal     = {LOCAL_DATA_ADDR_WIDTH{1'b0}};
           temp_data_din_internal      = {LOCAL_DATA_DATA_WIDTH{1'b0}};
           golden_data                 = {LOCAL_DATA_DATA_WIDTH{1'b0}};
           data_mask                   = {LOCAL_DATA_DATA_WIDTH{1'b0}};
           #20
           @(posedge temp_data_CLK)



           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b0}};
           #0.1 temp_data_cen_internal  = 1'b0; 
           for(i=1;i<10;i=i+1)
           begin
               @(posedge temp_data_CLK)
                temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b0}} + i;
                temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
                golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
           end

           @(posedge temp_data_CLK)



           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b1}};
           #0.1 temp_data_cen_internal  = 1'b0; 
           for(i=1;i<10;i=i+1)
           begin
               @(posedge temp_data_CLK)
                temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b0}} + i;
                temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
                golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_data_CLK)
               #0.1   

               if(temp_data_q_internal !== golden_data)
               begin

                   $finish;
               end
           end




           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b0}};
           #0.1 temp_data_cen_internal  = 1'b1; 

           for(i=10;i<15;i=i+1)
           begin
               @(posedge temp_data_CLK)
                temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b0}} + i;
                temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
                golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_data_CLK)
               #0.1   

               if(temp_data_q_internal === golden_data)
               begin

                   $finish;
               end
           end




           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b0}};
           #0.1 temp_data_cen_internal   = 1'b0; 
          for(i=0;i<LOCAL_DATA_WE_WIDTH + 1;i=i+1)
          begin
                 @(posedge temp_data_CLK)
                  temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b0}} ;
                  temp_data_wen_internal  <= {LOCAL_DATA_WE_WIDTH{1'b1}} >>i ; 
                  temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b1}} ;
                  golden_data             <= temp_data_din_internal ;
                 @(posedge temp_data_CLK)
                 @(posedge temp_data_CLK)
                  #0.1 temp_data_wen_internal  <= {LOCAL_DATA_WE_WIDTH{1'b1}};
                       golden_data             <= temp_data_din_internal ;
                       data_mask_ff            <= data_mask;
                 @(posedge temp_data_CLK)
                  #0.1 

                 if(temp_data_q_internal !== (golden_data &(~data_mask_ff)) )
                 begin

                      $finish;
                 end
           end
            
                      




           @(posedge temp_data_CLK)
           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b0}};
           #0.1 temp_data_cen_internal   = 1'b0; 
           for(i=10;i<15;i = i+1)
           begin
           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b0}};
           #0.1 temp_data_cen_internal   = 1'b0; 
               @(posedge temp_data_CLK)
                temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b0}} + i;
                temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
                golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_data_CLK)
               #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b1}};
                    golden_data             <= temp_data_din_internal ;
               @(posedge temp_data_CLK)
               #0.1   

               if(temp_data_q_internal !== golden_data)
               begin

                   $finish;
               end
           end





           @(posedge temp_data_CLK)
           #0.1 temp_data_cen_internal   = 1'b0; 
           @(posedge temp_data_CLK)
           temp_data_wen_internal  <= {LOCAL_DATA_WE_WIDTH{1'b0}};
           temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b0}} ;
           temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'hbb;
           golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'hbb;
           @(posedge temp_data_CLK)
           temp_data_wen_internal  <= {LOCAL_DATA_WE_WIDTH{1'b0}};
           temp_data_addr_internal <= { {3'b001},{LOCAL_DATA_ADDR_WIDTH-3{1'b0}} } ;
           temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'haa;
           golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'haa;


           @(posedge temp_data_CLK)
           temp_data_wen_internal  <= {LOCAL_DATA_WE_WIDTH{1'b1}};
           temp_data_addr_internal <= { {3'b001},{LOCAL_DATA_ADDR_WIDTH-3{1'b0}} } ;
           temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'hff;
           golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'haa;
           @(posedge temp_data_CLK)
           #0.1   
           if(temp_data_q_internal !== golden_data)
           begin

               $finish;
           end


           @(posedge temp_data_CLK)
           temp_data_wen_internal  <= {LOCAL_DATA_WE_WIDTH{1'b1}};
           temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b0}} ;
           temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'hff;
           golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'hbb;
           @(posedge temp_data_CLK)
           #0.1   
           if(temp_data_q_internal !== golden_data)
           begin

               $finish;
           end



     
           @(posedge temp_data_CLK)
           #0.1 temp_data_cen_internal   = 1'b0; 
           @(posedge temp_data_CLK)
           temp_data_wen_internal  <= {LOCAL_DATA_WE_WIDTH{1'b0}};
           temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b1}} ;
           temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b1}} ;
           golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b1}} ;
           @(posedge temp_data_CLK)
           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b1}};
                golden_data             <= temp_data_din_internal ;
           @(posedge temp_data_CLK)
           #0.1   

           if(temp_data_q_internal !== golden_data)
           begin

               $finish;
           end









           temp_tag_CLK               = 1'b0; 
           temp_tag_cen_internal      = 1'b0; 
           temp_tag_wen_internal      = {LOCAL_TAG_WE_WIDTH{1'b1}};
           temp_tag_addr_internal     = {LOCAL_TAG_ADDR_WIDTH{1'b0}};
           temp_tag_din_internal      = {LOCAL_TAG_DATA_WIDTH{1'b0}};
           golden_tag                 = {LOCAL_TAG_DATA_WIDTH{1'b0}};
           tag_mask                   = {LOCAL_TAG_DATA_WIDTH{1'b0}};

           #20
           @(posedge temp_tag_CLK)





           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b0}};
           #0.1 temp_tag_cen_internal  = 1'b0; 
           for(i=1;i<10;i=i+1)
           begin
           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b0}};
           #0.1 temp_tag_cen_internal  = 1'b0; 
               @(posedge temp_tag_CLK)
                temp_tag_addr_internal <= {LOCAL_TAG_ADDR_WIDTH{1'b0}} + i;
                temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + i;
                golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_tag_CLK)
               #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b1}};
                    golden_tag             <= temp_tag_din_internal;
               @(posedge temp_tag_CLK)
               #0.1   

               if(temp_tag_q_internal !== golden_tag)
               begin

                   $finish;
               end
           end





           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b0}};
           #0.1 temp_tag_cen_internal  = 1'b1; 

           for(i=10;i<15;i=i+1)
           begin
               @(posedge temp_tag_CLK)
                temp_tag_addr_internal <= {LOCAL_TAG_ADDR_WIDTH{1'b0}} + i;
                temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + i;
                golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_tag_CLK)
               #0.1   

               if(temp_tag_q_internal === golden_tag)
               begin

                   $finish;
               end
           end





           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b0}};
           #0.1 temp_tag_cen_internal   = 1'b0; 
          for(i=0;i<LOCAL_TAG_WE_WIDTH + 1;i=i+1)
          begin
                 @(posedge temp_tag_CLK)
                  temp_tag_addr_internal <= {LOCAL_TAG_ADDR_WIDTH{1'b0}} ;
                  temp_tag_wen_internal  <= {{LOCAL_TAG_WE_WIDTH{1'b1}},1'b0} <<i ; 
                  temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b1}} ;

                 @(posedge temp_tag_CLK)
                 @(posedge temp_tag_CLK)
                 #0.1 temp_tag_wen_internal  <= {LOCAL_TAG_WE_WIDTH{1'b1}};
                      golden_tag             <= temp_tag_din_internal;
                      tag_mask_ff            <= tag_mask;
                 @(posedge temp_tag_CLK)
                  #0.1 

                 if(temp_tag_q_internal !== (golden_tag &(~tag_mask_ff)) )
                 begin
                      $display("$  temp_tag_q_internal = %h , golden_tag =%h, wen=%h, (golden_tag &(~tag_mask)) =%h \n",temp_tag_q_internal,golden_tag,temp_tag_wen_internal, (golden_tag &(~tag_mask_ff)));    
                      $finish;
                 end
           end
                      




           @(posedge temp_tag_CLK)
           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b0}};
           #0.1 temp_tag_cen_internal   = 1'b0; 
           for(i=10;i<15;i = i+1)
           begin
           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b0}};
           #0.1 temp_tag_cen_internal   = 1'b0; 
               @(posedge temp_tag_CLK)
                temp_tag_addr_internal <= {LOCAL_TAG_ADDR_WIDTH{1'b0}} + i;
                temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + i;
                golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_tag_CLK)
               #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b1}};
                    golden_tag             <= temp_tag_din_internal;
               @(posedge temp_tag_CLK)
               #0.1   

               if(temp_tag_q_internal !== golden_tag)
               begin

                   $finish;
               end
           end





           @(posedge temp_tag_CLK)
           #0.1 temp_tag_cen_internal   = 1'b0; 

           @(posedge temp_tag_CLK)
           temp_tag_wen_internal  <= {LOCAL_TAG_WE_WIDTH{1'b0}};
           temp_tag_addr_internal <= {LOCAL_TAG_ADDR_WIDTH{1'b0}} ;
           temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'hbb;
           golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'hbb;

           @(posedge temp_tag_CLK)
           temp_tag_wen_internal  <= {LOCAL_TAG_WE_WIDTH{1'b0}};
           temp_tag_addr_internal <= {{3'b001}, {LOCAL_TAG_ADDR_WIDTH-3{1'b0}} } ;
           temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'haa;
           golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'haa;


           @(posedge temp_tag_CLK)
           temp_tag_wen_internal  <= {LOCAL_TAG_WE_WIDTH{1'b1}};
           temp_tag_addr_internal <= {{3'b001}, {LOCAL_TAG_ADDR_WIDTH-3{1'b0}} } ;
           temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'hff;
           golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'haa;
           @(posedge temp_tag_CLK)
           #0.1   
           if(temp_tag_q_internal !== golden_tag)
           begin

               $finish;
           end


           @(posedge temp_tag_CLK)
           temp_tag_wen_internal  <= {LOCAL_TAG_WE_WIDTH{1'b1}};
           temp_tag_addr_internal <= {LOCAL_TAG_ADDR_WIDTH{1'b0}}  ;
           temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'hff;
           golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'hbb;
           @(posedge temp_tag_CLK)
           #0.1   
           if(temp_tag_q_internal !== golden_tag)
           begin

               $finish;
           end




     
           @(posedge temp_tag_CLK)
           #0.1 temp_tag_cen_internal   = 1'b0; 
           @(posedge temp_tag_CLK)
           temp_tag_wen_internal  <= {LOCAL_TAG_WE_WIDTH{1'b0}};
           temp_tag_addr_internal <= {LOCAL_TAG_ADDR_WIDTH{1'b1}} ;
           temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b1}} ;
           golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b1}} ;
           @(posedge temp_tag_CLK)
           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b1}};
                golden_tag             <= temp_tag_din_internal;
           @(posedge temp_tag_CLK)
           #0.1   

           if(temp_tag_q_internal !== golden_tag)
           begin

               $finish;
           end









           temp_dirty_CLK               = 1'b0; 
           temp_dirty_cen_internal      = 1'b0; 
           temp_dirty_wen_internal      = {LOCAL_DIRTY_WE_WIDTH{1'b1}};
           temp_dirty_addr_internal     = {LOCAL_DIRTY_ADDR_WIDTH{1'b0}};
           temp_dirty_din_internal      = {LOCAL_DIRTY_DATA_WIDTH{1'b0}};
           golden_dirty                 = {LOCAL_DIRTY_DATA_WIDTH{1'b0}};
           dirty_mask                   = {LOCAL_DIRTY_DATA_WIDTH{1'b0}};

           #20
           @(posedge temp_dirty_CLK)





           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           #0.1 temp_dirty_cen_internal  = 1'b0; 
           for(i=1;i<10;i=i+1)
           begin
           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           #0.1 temp_dirty_cen_internal  = 1'b0; 
               @(posedge temp_dirty_CLK)
                temp_dirty_addr_internal <= {LOCAL_DIRTY_ADDR_WIDTH{1'b0}} + i;
                temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + i;
                golden_dirty             <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_dirty_CLK)
                    golden_dirty              <= temp_dirty_din_internal;
               #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b1}};
               @(posedge temp_dirty_CLK)
               #0.1   

               if(temp_dirty_q_internal !== golden_dirty)
               begin

                   $finish;
               end
           end





           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           #0.1 temp_dirty_cen_internal  = 1'b1; 

           for(i=10;i<15;i=i+1)
           begin
               @(posedge temp_dirty_CLK)
                temp_dirty_addr_internal <= {LOCAL_DIRTY_ADDR_WIDTH{1'b0}} + i;
                temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 2;
                golden_dirty             <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 2;
               @(posedge temp_dirty_CLK)
               #0.1   

               if(temp_dirty_q_internal === golden_dirty)
               begin

                   $finish;
               end
           end




           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           #0.1 temp_dirty_cen_internal   = 1'b0; 
          for(i=0;i<LOCAL_DIRTY_WE_WIDTH + 1;i=i+1)
          begin
                 @(posedge temp_dirty_CLK)
                  temp_dirty_addr_internal <= {LOCAL_DIRTY_ADDR_WIDTH{1'b0}} ;
                  temp_dirty_wen_internal  <= {LOCAL_DIRTY_WE_WIDTH{1'b1}} >>i ; 
                  temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b1}} ;

                 @(posedge temp_dirty_CLK)
                 @(posedge temp_dirty_CLK)
                 #0.1 temp_dirty_wen_internal  <= {LOCAL_DIRTY_WE_WIDTH{1'b1}};
                      golden_dirty             <= temp_dirty_din_internal;
                      dirty_mask_ff            <= dirty_mask;
                 @(posedge temp_dirty_CLK)
                  #0.1 

                 if(temp_dirty_q_internal !== (golden_dirty &(~dirty_mask_ff)) )
                 begin

                      $finish;
                 end
           end
            
                      



           @(posedge temp_dirty_CLK)
           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           #0.1 temp_dirty_cen_internal   = 1'b0; 
           for(i=10;i<15;i = i+1)
           begin
           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           #0.1 temp_dirty_cen_internal   = 1'b0; 
               @(posedge temp_dirty_CLK)
                temp_dirty_addr_internal <= {LOCAL_DIRTY_ADDR_WIDTH{1'b0}} + i;
                temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + i;
                golden_dirty             <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_dirty_CLK)
                    golden_dirty              <= temp_dirty_din_internal;
               #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b1}};
               @(posedge temp_dirty_CLK)
               #0.1   

               if(temp_dirty_q_internal !== golden_dirty)
               begin

                   $finish;
               end
           end





           @(posedge temp_dirty_CLK)
           #0.1 temp_dirty_cen_internal   = 1'b0; 

           @(posedge temp_dirty_CLK)
           temp_dirty_wen_internal  <= {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           temp_dirty_addr_internal <= {LOCAL_DIRTY_ADDR_WIDTH{1'b0}} ;
           temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'hbb;
           golden_dirty             <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'hbb;

           @(posedge temp_dirty_CLK)
           temp_dirty_wen_internal  <= {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           temp_dirty_addr_internal <= {{3'b001}, {LOCAL_DIRTY_ADDR_WIDTH-3{1'b0}} };
           temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'haa;
           golden_dirty             <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'haa;

           @(posedge temp_dirty_CLK)
           temp_dirty_wen_internal  <= {LOCAL_DIRTY_WE_WIDTH{1'b1}};
           temp_dirty_addr_internal <= {{3'b001}, {LOCAL_DIRTY_ADDR_WIDTH-3{1'b0}} };
           temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'hff;
           golden_dirty             <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'haa;
           @(posedge temp_dirty_CLK)
           #0.1  if(temp_dirty_q_internal !== golden_dirty)
           begin

               $finish;
           end

           @(posedge temp_dirty_CLK)
           temp_dirty_wen_internal  <= {LOCAL_DIRTY_WE_WIDTH{1'b1}};
           temp_dirty_addr_internal <= {LOCAL_DIRTY_ADDR_WIDTH{1'b0}} ;
           temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'hff;
           golden_dirty             <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'hbb;
           @(posedge temp_dirty_CLK)
           #0.1  if(temp_dirty_q_internal !== golden_dirty)
           begin

               $finish;
           end




     
           @(posedge temp_dirty_CLK)
           #0.1 temp_dirty_cen_internal   = 1'b0; 
           @(posedge temp_dirty_CLK)
           temp_dirty_wen_internal  <= {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           temp_dirty_addr_internal <= {LOCAL_DIRTY_ADDR_WIDTH{1'b1}} ;
           temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b1}} ;

           @(posedge temp_dirty_CLK)
           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b1}};
                golden_dirty             <= temp_dirty_din_internal;
           @(posedge temp_dirty_CLK)
           #0.1   

           if(temp_dirty_q_internal !== golden_dirty)
           begin

               $finish;
           end








           `ifdef DCACHE_16K
           $dispaly("$$$$$$$$  dcache 16k  Congratuations PASS!!!!!!!!!                     $");   
            `endif 
           `ifdef DCACHE_8K
           $dispaly("$$$$$$$$  dcache 8k  Congratuations PASS!!!!!!!!!                     $");   
            `endif 
           `ifdef DCACHE_4K
           $dispaly("$$$$$$$$  dcache 4k  Congratuations PASS!!!!!!!!!                     $");   
            `endif 
           `ifdef DCACHE_2K
           $dispaly("$$$$$$$$  dcache 2k  Congratuations PASS!!!!!!!!!                     $");   
            `endif 
           `ifdef DCACHE_1K
           /$dispaly("$$$$$$$$  dcache 1k  Congratuations PASS!!!!!!!!!                     $");   
            `endif 

             #10
             dmem_passed =1'b1;



end












always 
#(`CLK_PERIOD/2)  temp_data_CLK = ~temp_data_CLK;
always 
#(`CLK_PERIOD/2)  temp_tag_CLK = ~temp_tag_CLK;
always 
#(`CLK_PERIOD/2)  temp_dirty_CLK = ~temp_dirty_CLK;
always 
#(`CLK_PERIOD/2)  temp_forever_cpuclk = ~temp_forever_cpuclk;

always @(posedge temp_data_CLK)
begin


`ifdef L1_CACHE_ECC
data_mask <= {{7{&temp_data_wen_internal}},{8{temp_data_wen_internal[3]}},{8{temp_data_wen_internal[2]}},{8{temp_data_wen_internal[1]}},{8{temp_data_wen_internal[0]}} };
`else
data_mask <= { {8{temp_data_wen_internal[3]}},{8{temp_data_wen_internal[2]}},{8{temp_data_wen_internal[1]}},{8{temp_data_wen_internal[0]}} };
`endif

tag_mask <= {{26{temp_tag_wen_internal[1]}},{26{temp_tag_wen_internal[0]}}};


dirty_mask <=temp_dirty_wen_internal;

end 



ct_lsu_dcache_data_array x_way0_smbist_wrap (
`ifdef DCACHE_32K
  .data_idx                      (temp_data_addr_internal),
`endif

`ifdef DCACHE_64K
  .data_idx                      (temp_data_addr_internal),
`endif

  .data_sel_b              (  temp_data_cen_internal    ),
  .forever_cpuclk              (  temp_data_CLK             ),
  .data_din                (  temp_data_din_internal    ),
  .data_dout                (  temp_data_q_internal      ),
  .data_wen_b              (  temp_data_wen_internal    ),
  .data_gwen_b            (  &temp_data_wen_internal    ),



  .cp0_lsu_icg_en       (1'b0),

  .pad_yy_icg_scan_en       (   1'b0                     ),

  .data_gateclk_en (1'b1      )

);

ct_lsu_dcache_tag_array x_tag_array (
`ifdef DCACHE_32K
  .tag_idx                      ({1'b0,temp_tag_addr_internal}),
`endif
`ifdef DCACHE_64K
  .tag_idx                      (temp_tag_addr_internal),
`endif
  .tag_sel_b                    (temp_tag_cen_internal ),
  .forever_cpuclk                    (temp_tag_CLK          ),
  .tag_din                      (temp_tag_din_internal ),
  .tag_dout                      (temp_tag_q_internal   ),
  .tag_wen_b                    (temp_tag_wen_internal ),
  .tag_gwen_b                    (&temp_tag_wen_internal ),



  .tag_gateclk_en            (1'b1),

  .pad_yy_icg_scan_en       (   1'b0                     ),

  .cp0_lsu_icg_en       (1'b0      )

);

ct_lsu_dcache_dirty_array x_dirty_array (
`ifdef DCACHE_32K
  .dirty_idx                        ( {1'b0,temp_dirty_addr_internal}    ),
`endif
`ifdef DCACHE_64K
  .dirty_idx                        ( {temp_dirty_addr_internal}    ),
`endif
  .dirty_sel_b                      ( temp_dirty_cen_internal            ),
  .forever_cpuclk                      ( temp_dirty_CLK                     ),
  .dirty_din                        ( temp_dirty_din_internal            ),
  .dirty_dout                        ( temp_dirty_q_internal              ),
  .dirty_wen_b                      ( temp_dirty_wen_internal            ),
  .dirty_gwen_b                      (&temp_dirty_wen_internal            ),



  .dirty_gateclk_en        (1'b1),

  .pad_yy_icg_scan_en       (   1'b0                     ),

  .cp0_lsu_icg_en         (1'b0      )

);













endmodule
module cpu_dmem_test_tb(
dmem_passed
);

output dmem_passed;
reg    dmem_passed;






















`ifdef DCACHE_32K
parameter LOCAL_DATA_ADDR_WIDTH  = 10;
parameter LOCAL_TAG_ADDR_WIDTH   = 8;
parameter LOCAL_DIRTY_ADDR_WIDTH = 8;
`endif

`ifdef DCACHE_64K
parameter LOCAL_DATA_ADDR_WIDTH  = 11;
parameter LOCAL_TAG_ADDR_WIDTH   = 9;
parameter LOCAL_DIRTY_ADDR_WIDTH = 9;
`endif


`ifdef L1_CACHE_ECC
parameter LOCAL_DATA_DATA_WIDTH  = 39;
parameter LOCAL_DIRTY_DATA_WIDTH = 21;
parameter LOCAL_DIRTY_WE_WIDTH   = 21;
`else
parameter LOCAL_DATA_DATA_WIDTH  = 32;
parameter LOCAL_DIRTY_DATA_WIDTH = 7;
parameter LOCAL_DIRTY_WE_WIDTH   = 7;
`endif

parameter LOCAL_DATA_WE_WIDTH   = 4;

parameter LOCAL_TAG_DATA_WIDTH = 52;
parameter LOCAL_TAG_WE_WIDTH   = 2;




reg [ LOCAL_DATA_ADDR_WIDTH-1 : 0 ] temp_data_addr_internal;
reg [ LOCAL_DATA_DATA_WIDTH-1 : 0 ] temp_data_din_internal ;
reg [ LOCAL_DATA_WE_WIDTH  -1 : 0 ] temp_data_wen_internal ;
reg                                 temp_data_cen_internal ;
reg                                 temp_data_CLK          ;
wire [ LOCAL_DATA_DATA_WIDTH-1 : 0] temp_data_q_internal   ;
reg  [ LOCAL_DATA_DATA_WIDTH-1 : 0] golden_data      ;
reg  [ LOCAL_DATA_DATA_WIDTH-1 : 0] data_mask   ;
reg  [ LOCAL_DATA_DATA_WIDTH-1 : 0] data_mask_ff  ;


reg [ LOCAL_TAG_ADDR_WIDTH-1 : 0 ] temp_tag_addr_internal;
reg [ LOCAL_TAG_DATA_WIDTH-1 : 0 ] temp_tag_din_internal ;
reg [ LOCAL_TAG_WE_WIDTH  -1 : 0 ] temp_tag_wen_internal ;
reg                                temp_tag_cen_internal ;
reg                                temp_tag_CLK          ;
wire [ LOCAL_TAG_DATA_WIDTH-1 : 0] temp_tag_q_internal   ;
reg  [ LOCAL_TAG_DATA_WIDTH-1 : 0] golden_tag      ;
reg  [ LOCAL_TAG_DATA_WIDTH-1 : 0] tag_mask   ;
reg  [ LOCAL_TAG_DATA_WIDTH-1 : 0] tag_mask_ff   ;


reg [ LOCAL_DIRTY_ADDR_WIDTH-1 : 0 ] temp_dirty_addr_internal;
reg [ LOCAL_DIRTY_DATA_WIDTH-1 : 0 ] temp_dirty_din_internal ;
reg [ LOCAL_DIRTY_WE_WIDTH  -1 : 0 ] temp_dirty_wen_internal ;
reg                                  temp_dirty_cen_internal ;
reg                                  temp_dirty_CLK          ;
wire [ LOCAL_DIRTY_DATA_WIDTH-1 : 0] temp_dirty_q_internal   ;
reg  [ LOCAL_DIRTY_DATA_WIDTH-1 : 0] golden_dirty      ;
reg  [ LOCAL_DIRTY_DATA_WIDTH-1 : 0] dirty_mask   ;
reg  [ LOCAL_DIRTY_DATA_WIDTH-1 : 0] dirty_mask_ff   ;


reg temp_forever_cpuclk      ;
reg temp_external_en         ;
reg temp_pad_yy_test_mode    ;
wire temp_xor_clk            ;


integer i;

initial 
begin
dmem_passed = 1'b0;

           #20
           temp_forever_cpuclk         = 1'b0;
           temp_external_en            = 1'b0;
           temp_pad_yy_test_mode       = 1'b0;


           temp_data_CLK               = 1'b0; 
           temp_data_cen_internal      = 1'b0; 
           temp_data_wen_internal      = {LOCAL_DATA_WE_WIDTH{1'b1}};
           temp_data_addr_internal     = {LOCAL_DATA_ADDR_WIDTH{1'b0}};
           temp_data_din_internal      = {LOCAL_DATA_DATA_WIDTH{1'b0}};
           golden_data                 = {LOCAL_DATA_DATA_WIDTH{1'b0}};
           data_mask                   = {LOCAL_DATA_DATA_WIDTH{1'b0}};
           #20
           @(posedge temp_data_CLK)



           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b0}};
           #0.1 temp_data_cen_internal  = 1'b0; 
           for(i=1;i<10;i=i+1)
           begin
               @(posedge temp_data_CLK)
                temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b0}} + i;
                temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
                golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
           end

           @(posedge temp_data_CLK)



           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b1}};
           #0.1 temp_data_cen_internal  = 1'b0; 
           for(i=1;i<10;i=i+1)
           begin
               @(posedge temp_data_CLK)
                temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b0}} + i;
                temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
                golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_data_CLK)
               #0.1   

               if(temp_data_q_internal !== golden_data)
               begin

                   $finish;
               end
           end




           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b0}};
           #0.1 temp_data_cen_internal  = 1'b1; 

           for(i=10;i<15;i=i+1)
           begin
               @(posedge temp_data_CLK)
                temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b0}} + i;
                temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
                golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_data_CLK)
               #0.1   

               if(temp_data_q_internal === golden_data)
               begin

                   $finish;
               end
           end




           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b0}};
           #0.1 temp_data_cen_internal   = 1'b0; 
          for(i=0;i<LOCAL_DATA_WE_WIDTH + 1;i=i+1)
          begin
                 @(posedge temp_data_CLK)
                  temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b0}} ;
                  temp_data_wen_internal  <= {LOCAL_DATA_WE_WIDTH{1'b1}} >>i ; 
                  temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b1}} ;
                  golden_data             <= temp_data_din_internal ;
                 @(posedge temp_data_CLK)
                 @(posedge temp_data_CLK)
                  #0.1 temp_data_wen_internal  <= {LOCAL_DATA_WE_WIDTH{1'b1}};
                       golden_data             <= temp_data_din_internal ;
                       data_mask_ff            <= data_mask;
                 @(posedge temp_data_CLK)
                  #0.1 

                 if(temp_data_q_internal !== (golden_data &(~data_mask_ff)) )
                 begin

                      $finish;
                 end
           end
            
                      




           @(posedge temp_data_CLK)
           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b0}};
           #0.1 temp_data_cen_internal   = 1'b0; 
           for(i=10;i<15;i = i+1)
           begin
           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b0}};
           #0.1 temp_data_cen_internal   = 1'b0; 
               @(posedge temp_data_CLK)
                temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b0}} + i;
                temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
                golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_data_CLK)
               #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b1}};
                    golden_data             <= temp_data_din_internal ;
               @(posedge temp_data_CLK)
               #0.1   

               if(temp_data_q_internal !== golden_data)
               begin

                   $finish;
               end
           end





           @(posedge temp_data_CLK)
           #0.1 temp_data_cen_internal   = 1'b0; 
           @(posedge temp_data_CLK)
           temp_data_wen_internal  <= {LOCAL_DATA_WE_WIDTH{1'b0}};
           temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b0}} ;
           temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'hbb;
           golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'hbb;
           @(posedge temp_data_CLK)
           temp_data_wen_internal  <= {LOCAL_DATA_WE_WIDTH{1'b0}};
           temp_data_addr_internal <= { {3'b001},{LOCAL_DATA_ADDR_WIDTH-3{1'b0}} } ;
           temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'haa;
           golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'haa;


           @(posedge temp_data_CLK)
           temp_data_wen_internal  <= {LOCAL_DATA_WE_WIDTH{1'b1}};
           temp_data_addr_internal <= { {3'b001},{LOCAL_DATA_ADDR_WIDTH-3{1'b0}} } ;
           temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'hff;
           golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'haa;
           @(posedge temp_data_CLK)
           #0.1   
           if(temp_data_q_internal !== golden_data)
           begin

               $finish;
           end


           @(posedge temp_data_CLK)
           temp_data_wen_internal  <= {LOCAL_DATA_WE_WIDTH{1'b1}};
           temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b0}} ;
           temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'hff;
           golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b0}} + 8'hbb;
           @(posedge temp_data_CLK)
           #0.1   
           if(temp_data_q_internal !== golden_data)
           begin

               $finish;
           end



     
           @(posedge temp_data_CLK)
           #0.1 temp_data_cen_internal   = 1'b0; 
           @(posedge temp_data_CLK)
           temp_data_wen_internal  <= {LOCAL_DATA_WE_WIDTH{1'b0}};
           temp_data_addr_internal <= {LOCAL_DATA_ADDR_WIDTH{1'b1}} ;
           temp_data_din_internal  <= {LOCAL_DATA_DATA_WIDTH{1'b1}} ;
           golden_data             <= {LOCAL_DATA_DATA_WIDTH{1'b1}} ;
           @(posedge temp_data_CLK)
           #0.1 temp_data_wen_internal   = {LOCAL_DATA_WE_WIDTH{1'b1}};
                golden_data             <= temp_data_din_internal ;
           @(posedge temp_data_CLK)
           #0.1   

           if(temp_data_q_internal !== golden_data)
           begin

               $finish;
           end









           temp_tag_CLK               = 1'b0; 
           temp_tag_cen_internal      = 1'b0; 
           temp_tag_wen_internal      = {LOCAL_TAG_WE_WIDTH{1'b1}};
           temp_tag_addr_internal     = {LOCAL_TAG_ADDR_WIDTH{1'b0}};
           temp_tag_din_internal      = {LOCAL_TAG_DATA_WIDTH{1'b0}};
           golden_tag                 = {LOCAL_TAG_DATA_WIDTH{1'b0}};
           tag_mask                   = {LOCAL_TAG_DATA_WIDTH{1'b0}};

           #20
           @(posedge temp_tag_CLK)





           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b0}};
           #0.1 temp_tag_cen_internal  = 1'b0; 
           for(i=1;i<10;i=i+1)
           begin
           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b0}};
           #0.1 temp_tag_cen_internal  = 1'b0; 
               @(posedge temp_tag_CLK)
                temp_tag_addr_internal <= {LOCAL_TAG_ADDR_WIDTH{1'b0}} + i;
                temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + i;
                golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_tag_CLK)
               #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b1}};
                    golden_tag             <= temp_tag_din_internal;
               @(posedge temp_tag_CLK)
               #0.1   

               if(temp_tag_q_internal !== golden_tag)
               begin

                   $finish;
               end
           end





           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b0}};
           #0.1 temp_tag_cen_internal  = 1'b1; 

           for(i=10;i<15;i=i+1)
           begin
               @(posedge temp_tag_CLK)
                temp_tag_addr_internal <= {LOCAL_TAG_ADDR_WIDTH{1'b0}} + i;
                temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + i;
                golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_tag_CLK)
               #0.1   

               if(temp_tag_q_internal === golden_tag)
               begin

                   $finish;
               end
           end





           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b0}};
           #0.1 temp_tag_cen_internal   = 1'b0; 
          for(i=0;i<LOCAL_TAG_WE_WIDTH + 1;i=i+1)
          begin
                 @(posedge temp_tag_CLK)
                  temp_tag_addr_internal <= {LOCAL_TAG_ADDR_WIDTH{1'b0}} ;
                  temp_tag_wen_internal  <= {{LOCAL_TAG_WE_WIDTH{1'b1}},1'b0} <<i ; 
                  temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b1}} ;

                 @(posedge temp_tag_CLK)
                 @(posedge temp_tag_CLK)
                 #0.1 temp_tag_wen_internal  <= {LOCAL_TAG_WE_WIDTH{1'b1}};
                      golden_tag             <= temp_tag_din_internal;
                      tag_mask_ff            <= tag_mask;
                 @(posedge temp_tag_CLK)
                  #0.1 

                 if(temp_tag_q_internal !== (golden_tag &(~tag_mask_ff)) )
                 begin
                      $display("$  temp_tag_q_internal = %h , golden_tag =%h, wen=%h, (golden_tag &(~tag_mask)) =%h \n",temp_tag_q_internal,golden_tag,temp_tag_wen_internal, (golden_tag &(~tag_mask_ff)));    
                      $finish;
                 end
           end
                      




           @(posedge temp_tag_CLK)
           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b0}};
           #0.1 temp_tag_cen_internal   = 1'b0; 
           for(i=10;i<15;i = i+1)
           begin
           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b0}};
           #0.1 temp_tag_cen_internal   = 1'b0; 
               @(posedge temp_tag_CLK)
                temp_tag_addr_internal <= {LOCAL_TAG_ADDR_WIDTH{1'b0}} + i;
                temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + i;
                golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_tag_CLK)
               #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b1}};
                    golden_tag             <= temp_tag_din_internal;
               @(posedge temp_tag_CLK)
               #0.1   

               if(temp_tag_q_internal !== golden_tag)
               begin

                   $finish;
               end
           end





           @(posedge temp_tag_CLK)
           #0.1 temp_tag_cen_internal   = 1'b0; 

           @(posedge temp_tag_CLK)
           temp_tag_wen_internal  <= {LOCAL_TAG_WE_WIDTH{1'b0}};
           temp_tag_addr_internal <= {LOCAL_TAG_ADDR_WIDTH{1'b0}} ;
           temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'hbb;
           golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'hbb;

           @(posedge temp_tag_CLK)
           temp_tag_wen_internal  <= {LOCAL_TAG_WE_WIDTH{1'b0}};
           temp_tag_addr_internal <= {{3'b001}, {LOCAL_TAG_ADDR_WIDTH-3{1'b0}} } ;
           temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'haa;
           golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'haa;


           @(posedge temp_tag_CLK)
           temp_tag_wen_internal  <= {LOCAL_TAG_WE_WIDTH{1'b1}};
           temp_tag_addr_internal <= {{3'b001}, {LOCAL_TAG_ADDR_WIDTH-3{1'b0}} } ;
           temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'hff;
           golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'haa;
           @(posedge temp_tag_CLK)
           #0.1   
           if(temp_tag_q_internal !== golden_tag)
           begin

               $finish;
           end


           @(posedge temp_tag_CLK)
           temp_tag_wen_internal  <= {LOCAL_TAG_WE_WIDTH{1'b1}};
           temp_tag_addr_internal <= {LOCAL_TAG_ADDR_WIDTH{1'b0}}  ;
           temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'hff;
           golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b0}} + 8'hbb;
           @(posedge temp_tag_CLK)
           #0.1   
           if(temp_tag_q_internal !== golden_tag)
           begin

               $finish;
           end




     
           @(posedge temp_tag_CLK)
           #0.1 temp_tag_cen_internal   = 1'b0; 
           @(posedge temp_tag_CLK)
           temp_tag_wen_internal  <= {LOCAL_TAG_WE_WIDTH{1'b0}};
           temp_tag_addr_internal <= {LOCAL_TAG_ADDR_WIDTH{1'b1}} ;
           temp_tag_din_internal  <= {LOCAL_TAG_DATA_WIDTH{1'b1}} ;
           golden_tag             <= {LOCAL_TAG_DATA_WIDTH{1'b1}} ;
           @(posedge temp_tag_CLK)
           #0.1 temp_tag_wen_internal   = {LOCAL_TAG_WE_WIDTH{1'b1}};
                golden_tag             <= temp_tag_din_internal;
           @(posedge temp_tag_CLK)
           #0.1   

           if(temp_tag_q_internal !== golden_tag)
           begin

               $finish;
           end









           temp_dirty_CLK               = 1'b0; 
           temp_dirty_cen_internal      = 1'b0; 
           temp_dirty_wen_internal      = {LOCAL_DIRTY_WE_WIDTH{1'b1}};
           temp_dirty_addr_internal     = {LOCAL_DIRTY_ADDR_WIDTH{1'b0}};
           temp_dirty_din_internal      = {LOCAL_DIRTY_DATA_WIDTH{1'b0}};
           golden_dirty                 = {LOCAL_DIRTY_DATA_WIDTH{1'b0}};
           dirty_mask                   = {LOCAL_DIRTY_DATA_WIDTH{1'b0}};

           #20
           @(posedge temp_dirty_CLK)





           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           #0.1 temp_dirty_cen_internal  = 1'b0; 
           for(i=1;i<10;i=i+1)
           begin
           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           #0.1 temp_dirty_cen_internal  = 1'b0; 
               @(posedge temp_dirty_CLK)
                temp_dirty_addr_internal <= {LOCAL_DIRTY_ADDR_WIDTH{1'b0}} + i;
                temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + i;
                golden_dirty             <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_dirty_CLK)
                    golden_dirty              <= temp_dirty_din_internal;
               #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b1}};
               @(posedge temp_dirty_CLK)
               #0.1   

               if(temp_dirty_q_internal !== golden_dirty)
               begin

                   $finish;
               end
           end





           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           #0.1 temp_dirty_cen_internal  = 1'b1; 

           for(i=10;i<15;i=i+1)
           begin
               @(posedge temp_dirty_CLK)
                temp_dirty_addr_internal <= {LOCAL_DIRTY_ADDR_WIDTH{1'b0}} + i;
                temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 2;
                golden_dirty             <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 2;
               @(posedge temp_dirty_CLK)
               #0.1   

               if(temp_dirty_q_internal === golden_dirty)
               begin

                   $finish;
               end
           end




           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           #0.1 temp_dirty_cen_internal   = 1'b0; 
          for(i=0;i<LOCAL_DIRTY_WE_WIDTH + 1;i=i+1)
          begin
                 @(posedge temp_dirty_CLK)
                  temp_dirty_addr_internal <= {LOCAL_DIRTY_ADDR_WIDTH{1'b0}} ;
                  temp_dirty_wen_internal  <= {LOCAL_DIRTY_WE_WIDTH{1'b1}} >>i ; 
                  temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b1}} ;

                 @(posedge temp_dirty_CLK)
                 @(posedge temp_dirty_CLK)
                 #0.1 temp_dirty_wen_internal  <= {LOCAL_DIRTY_WE_WIDTH{1'b1}};
                      golden_dirty             <= temp_dirty_din_internal;
                      dirty_mask_ff            <= dirty_mask;
                 @(posedge temp_dirty_CLK)
                  #0.1 

                 if(temp_dirty_q_internal !== (golden_dirty &(~dirty_mask_ff)) )
                 begin

                      $finish;
                 end
           end
            
                      



           @(posedge temp_dirty_CLK)
           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           #0.1 temp_dirty_cen_internal   = 1'b0; 
           for(i=10;i<15;i = i+1)
           begin
           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           #0.1 temp_dirty_cen_internal   = 1'b0; 
               @(posedge temp_dirty_CLK)
                temp_dirty_addr_internal <= {LOCAL_DIRTY_ADDR_WIDTH{1'b0}} + i;
                temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + i;
                golden_dirty             <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + i;
               @(posedge temp_dirty_CLK)
                    golden_dirty              <= temp_dirty_din_internal;
               #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b1}};
               @(posedge temp_dirty_CLK)
               #0.1   

               if(temp_dirty_q_internal !== golden_dirty)
               begin

                   $finish;
               end
           end





           @(posedge temp_dirty_CLK)
           #0.1 temp_dirty_cen_internal   = 1'b0; 

           @(posedge temp_dirty_CLK)
           temp_dirty_wen_internal  <= {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           temp_dirty_addr_internal <= {LOCAL_DIRTY_ADDR_WIDTH{1'b0}} ;
           temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'hbb;
           golden_dirty             <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'hbb;

           @(posedge temp_dirty_CLK)
           temp_dirty_wen_internal  <= {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           temp_dirty_addr_internal <= {{3'b001}, {LOCAL_DIRTY_ADDR_WIDTH-3{1'b0}} };
           temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'haa;
           golden_dirty             <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'haa;

           @(posedge temp_dirty_CLK)
           temp_dirty_wen_internal  <= {LOCAL_DIRTY_WE_WIDTH{1'b1}};
           temp_dirty_addr_internal <= {{3'b001}, {LOCAL_DIRTY_ADDR_WIDTH-3{1'b0}} };
           temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'hff;
           golden_dirty             <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'haa;
           @(posedge temp_dirty_CLK)
           #0.1  if(temp_dirty_q_internal !== golden_dirty)
           begin

               $finish;
           end

           @(posedge temp_dirty_CLK)
           temp_dirty_wen_internal  <= {LOCAL_DIRTY_WE_WIDTH{1'b1}};
           temp_dirty_addr_internal <= {LOCAL_DIRTY_ADDR_WIDTH{1'b0}} ;
           temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'hff;
           golden_dirty             <= {LOCAL_DIRTY_DATA_WIDTH{1'b0}} + 8'hbb;
           @(posedge temp_dirty_CLK)
           #0.1  if(temp_dirty_q_internal !== golden_dirty)
           begin

               $finish;
           end




     
           @(posedge temp_dirty_CLK)
           #0.1 temp_dirty_cen_internal   = 1'b0; 
           @(posedge temp_dirty_CLK)
           temp_dirty_wen_internal  <= {LOCAL_DIRTY_WE_WIDTH{1'b0}};
           temp_dirty_addr_internal <= {LOCAL_DIRTY_ADDR_WIDTH{1'b1}} ;
           temp_dirty_din_internal  <= {LOCAL_DIRTY_DATA_WIDTH{1'b1}} ;

           @(posedge temp_dirty_CLK)
           #0.1 temp_dirty_wen_internal   = {LOCAL_DIRTY_WE_WIDTH{1'b1}};
                golden_dirty             <= temp_dirty_din_internal;
           @(posedge temp_dirty_CLK)
           #0.1   

           if(temp_dirty_q_internal !== golden_dirty)
           begin

               $finish;
           end








           `ifdef DCACHE_16K
           $dispaly("$$$$$$$$  dcache 16k  Congratuations PASS!!!!!!!!!                     $");   
            `endif 
           `ifdef DCACHE_8K
           $dispaly("$$$$$$$$  dcache 8k  Congratuations PASS!!!!!!!!!                     $");   
            `endif 
           `ifdef DCACHE_4K
           $dispaly("$$$$$$$$  dcache 4k  Congratuations PASS!!!!!!!!!                     $");   
            `endif 
           `ifdef DCACHE_2K
           $dispaly("$$$$$$$$  dcache 2k  Congratuations PASS!!!!!!!!!                     $");   
            `endif 
           `ifdef DCACHE_1K
           /$dispaly("$$$$$$$$  dcache 1k  Congratuations PASS!!!!!!!!!                     $");   
            `endif 

             #10
             dmem_passed =1'b1;



end












always 
#(`CLK_PERIOD/2)  temp_data_CLK = ~temp_data_CLK;
always 
#(`CLK_PERIOD/2)  temp_tag_CLK = ~temp_tag_CLK;
always 
#(`CLK_PERIOD/2)  temp_dirty_CLK = ~temp_dirty_CLK;
always 
#(`CLK_PERIOD/2)  temp_forever_cpuclk = ~temp_forever_cpuclk;

always @(posedge temp_data_CLK)
begin


`ifdef L1_CACHE_ECC
data_mask <= {{7{&temp_data_wen_internal}},{8{temp_data_wen_internal[3]}},{8{temp_data_wen_internal[2]}},{8{temp_data_wen_internal[1]}},{8{temp_data_wen_internal[0]}} };
`else
data_mask <= { {8{temp_data_wen_internal[3]}},{8{temp_data_wen_internal[2]}},{8{temp_data_wen_internal[1]}},{8{temp_data_wen_internal[0]}} };
`endif

tag_mask <= {{26{temp_tag_wen_internal[1]}},{26{temp_tag_wen_internal[0]}}};


dirty_mask <=temp_dirty_wen_internal;

end 



ct_lsu_dcache_data_array x_way0_smbist_wrap (
`ifdef DCACHE_32K
  .data_idx                      (temp_data_addr_internal),
`endif

`ifdef DCACHE_64K
  .data_idx                      (temp_data_addr_internal),
`endif

  .data_sel_b              (  temp_data_cen_internal    ),
  .forever_cpuclk              (  temp_data_CLK             ),
  .data_din                (  temp_data_din_internal    ),
  .data_dout                (  temp_data_q_internal      ),
  .data_wen_b              (  temp_data_wen_internal    ),
  .data_gwen_b            (  &temp_data_wen_internal    ),



  .cp0_lsu_icg_en       (1'b0),

  .pad_yy_icg_scan_en       (   1'b0                     ),

  .data_gateclk_en (1'b1      )

);

ct_lsu_dcache_tag_array x_tag_array (
`ifdef DCACHE_32K
  .tag_idx                      ({1'b0,temp_tag_addr_internal}),
`endif
`ifdef DCACHE_64K
  .tag_idx                      (temp_tag_addr_internal),
`endif
  .tag_sel_b                    (temp_tag_cen_internal ),
  .forever_cpuclk                    (temp_tag_CLK          ),
  .tag_din                      (temp_tag_din_internal ),
  .tag_dout                      (temp_tag_q_internal   ),
  .tag_wen_b                    (temp_tag_wen_internal ),
  .tag_gwen_b                    (&temp_tag_wen_internal ),



  .tag_gateclk_en            (1'b1),

  .pad_yy_icg_scan_en       (   1'b0                     ),

  .cp0_lsu_icg_en       (1'b0      )

);

ct_lsu_dcache_dirty_array x_dirty_array (
`ifdef DCACHE_32K
  .dirty_idx                        ( {1'b0,temp_dirty_addr_internal}    ),
`endif
`ifdef DCACHE_64K
  .dirty_idx                        ( {temp_dirty_addr_internal}    ),
`endif
  .dirty_sel_b                      ( temp_dirty_cen_internal            ),
  .forever_cpuclk                      ( temp_dirty_CLK                     ),
  .dirty_din                        ( temp_dirty_din_internal            ),
  .dirty_dout                        ( temp_dirty_q_internal              ),
  .dirty_wen_b                      ( temp_dirty_wen_internal            ),
  .dirty_gwen_b                      (&temp_dirty_wen_internal            ),



  .dirty_gateclk_en        (1'b1),

  .pad_yy_icg_scan_en       (   1'b0                     ),

  .cp0_lsu_icg_en         (1'b0      )

);













endmodule