data/full_repos/permissive/509809169/Verification_ Reading Simulations/Finding bugs in code/Case statement.v
1: b'%Error: Cannot find file containing module: Reading\n        ... Looked in:\n             data/full_repos/permissive/509809169/Verification_/Reading\n             data/full_repos/permissive/509809169/Verification_/Reading.v\n             data/full_repos/permissive/509809169/Verification_/Reading.sv\n             Reading\n             Reading.v\n             Reading.sv\n             obj_dir/Reading\n             obj_dir/Reading.v\n             obj_dir/Reading.sv\n%Error: Cannot find file containing module: Simulations/Finding\n%Error: Cannot find file containing module: bugs\n%Error: Cannot find file containing module: in\n%Error: Cannot find file containing module: code,data/full_repos/permissive/509809169\n%Error: Cannot find file containing module: data/full_repos/permissive/509809169/Verification_\n%Error: Cannot find file containing module: code/Case\n%Error: Cannot find file containing module: statement.v\n%Error: Exiting due to 8 error(s)\n'
module top_module (
    input [7:0] code,
    output reg [3:0] out,
    output reg valid=1 );

     always @(*)
        case (code)
            8'h45: begin out = 0; valid=1; end
            8'h16: begin out = 1; valid=1; end
            8'h1e: begin out = 2; valid=1; end
            8'h26: begin out = 3; valid=1; end
            8'h25: begin out = 4; valid=1; end
            8'h2e: begin out = 5; valid=1; end
            8'h36: begin out = 6; valid=1; end
            8'h3d: begin out = 7; valid=1; end
            8'h3e: begin out = 8; valid=1; end
            8'h46: begin out = 9; valid=1; end
            default: begin
                valid = 0;
                out=0;
            end
        endcase

endmodule
module top_module (
    input [7:0] code,
    output reg [3:0] out,
    output reg valid=1 );


     always @(*)
        case (code)
            8'h45: begin out = 0; valid=1; end
            8'h16: begin out = 1; valid=1; end
            8'h1e: begin out = 2; valid=1; end
            8'h26: begin out = 3; valid=1; end
            8'h25: begin out = 4; valid=1; end
            8'h2e: begin out = 5; valid=1; end
            8'h36: begin out = 6; valid=1; end
            8'h3d: begin out = 7; valid=1; end
            8'h3e: begin out = 8; valid=1; end
            8'h46: begin out = 9; valid=1; end
            default: begin
                valid = 0;
                out=0;
            end
        endcase

endmodule