data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume/rx_axi_riffa.v
1: b'%Error: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume/rx_axi_riffa.v:99: Cannot find file containing module: \'fallthrough_small_fifo\'\nfallthrough_small_fifo #(\n^~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume,data/full_repos/permissive/498471995/fallthrough_small_fifo\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume,data/full_repos/permissive/498471995/fallthrough_small_fifo.v\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume,data/full_repos/permissive/498471995/fallthrough_small_fifo.sv\n             fallthrough_small_fifo\n             fallthrough_small_fifo.v\n             fallthrough_small_fifo.sv\n             obj_dir/fallthrough_small_fifo\n             obj_dir/fallthrough_small_fifo.v\n             obj_dir/fallthrough_small_fifo.sv\n%Error: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume/rx_axi_riffa.v:117: Cannot find file containing module: \'fallthrough_small_fifo\'\nfallthrough_small_fifo #(\n^~~~~~~~~~~~~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume/rx_axi_riffa.v:199: Operator ADD expects 32 bits on the LHS, but LHS\'s SEL generates 14 bits.\n                                                                                                                                                         : ... In instance rx_axi_riffa\n            rlen_next = (fifo_out[34+:14] + (|fifo_out[32+:2]) + 4);\n                                          ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume/rx_axi_riffa.v:199: Operator ADD expects 32 bits on the RHS, but RHS\'s REDOR generates 1 bits.\n                                                                                                                                                         : ... In instance rx_axi_riffa\n            rlen_next = (fifo_out[34+:14] + (|fifo_out[32+:2]) + 4);\n                                          ^\n%Warning-WIDTH: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume/rx_axi_riffa.v:200: Operator ADD expects 32 bits on the LHS, but LHS\'s SEL generates 14 bits.\n                                                                                                                                                         : ... In instance rx_axi_riffa\n            CHNL_TX_LEN = (fifo_out[34+:14] + (|fifo_out[32+:2]) + 4);\n                                            ^\n%Warning-WIDTH: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume/rx_axi_riffa.v:200: Operator ADD expects 32 bits on the RHS, but RHS\'s REDOR generates 1 bits.\n                                                                                                                                                         : ... In instance rx_axi_riffa\n            CHNL_TX_LEN = (fifo_out[34+:14] + (|fifo_out[32+:2]) + 4);\n                                            ^\n%Error: Exiting due to 2 error(s), 4 warning(s)\n'
function integer log2;
   input integer number;
   begin
      log2=0;
      while(2**log2<number) begin
         log2=log2+1;
      end
   end
endfunction
function integer log2;

   input integer number;
   begin
      log2=0;
      while(2**log2<number) begin
         log2=log2+1;
      end
   end
endfunction