data/full_repos/permissive/458134463/Modules/signExtend_6to32_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/458134463/Modules/signExtend_6to32_tb.v:10: Unsupported: Ignoring delay on this delayed statement.\n#20 value = 6\'b100010;\n^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/458134463/Modules/signExtend_6to32_tb.v:14: Unsupported or unknown PLI call: $monitor\n$monitor("Time  : %2d\\nValue : %32b\\nResult: %32b\\n", $time, value, result);\n^~~~~~~~\n%Error: Exiting due to 1 error(s), 1 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module signExtend_6to32_tb();
reg [5:0]  value;
wire[31:0] result;


signExtend_6to32 extend(value, result);

initial begin
	 value = 6'b011101;
#20 value = 6'b100010;
end

initial begin
$monitor("Time  : %2d\nValue : %32b\nResult: %32b\n", $time, value, result);
end


endmodule
module signExtend_6to32_tb();

reg [5:0]  value;
wire[31:0] result;


signExtend_6to32 extend(value, result);

initial begin
	 value = 6'b011101;
#20 value = 6'b100010;
end

initial begin
$monitor("Time  : %2d\nValue : %32b\nResult: %32b\n", $time, value, result);
end


endmodule