data/full_repos/permissive/418752214/C910_RTL_FACTORY/gen_rtl/idu/rtl/ct_idu_rf_prf_vregfile.v
data/verilator_xmls/f71988bc-a2c0-4f3e-949e-c425a36819b2.xml
module ct_idu_rf_prf_vregfile(
  dp_prf_rf_pipe5_srcv0_vreg,
  dp_prf_rf_pipe6_srcv0_vreg,
  dp_prf_rf_pipe6_srcv1_vreg,
  dp_prf_rf_pipe6_srcv2_vreg,
  dp_prf_rf_pipe6_srcvm_vreg,
  dp_prf_rf_pipe7_srcv0_vreg,
  dp_prf_rf_pipe7_srcv1_vreg,
  dp_prf_rf_pipe7_srcv2_vreg,
  dp_prf_rf_pipe7_srcvm_vreg,
  lsu_idu_wb_pipe3_wb_vreg_data,
  lsu_idu_wb_pipe3_wb_vreg_expand,
  lsu_idu_wb_pipe3_wb_vreg_vld,
  prf_dp_rf_pipe5_srcv0_vreg_data,
  prf_dp_rf_pipe6_srcv0_vreg_data,
  prf_dp_rf_pipe6_srcv1_vreg_data,
  prf_dp_rf_pipe6_srcv2_vreg_data,
  prf_dp_rf_pipe6_srcvm_vreg_data,
  prf_dp_rf_pipe7_srcv0_vreg_data,
  prf_dp_rf_pipe7_srcv1_vreg_data,
  prf_dp_rf_pipe7_srcv2_vreg_data,
  prf_dp_rf_pipe7_srcvm_vreg_data,
  vfpu_idu_ex5_pipe6_wb_vreg_data,
  vfpu_idu_ex5_pipe6_wb_vreg_expand,
  vfpu_idu_ex5_pipe6_wb_vreg_vld,
  vfpu_idu_ex5_pipe7_wb_vreg_data,
  vfpu_idu_ex5_pipe7_wb_vreg_expand,
  vfpu_idu_ex5_pipe7_wb_vreg_vld
);


input   [5 :0]  dp_prf_rf_pipe5_srcv0_vreg;     
input   [5 :0]  dp_prf_rf_pipe6_srcv0_vreg;     
input   [5 :0]  dp_prf_rf_pipe6_srcv1_vreg;     
input   [5 :0]  dp_prf_rf_pipe6_srcv2_vreg;     
input   [5 :0]  dp_prf_rf_pipe6_srcvm_vreg;     
input   [5 :0]  dp_prf_rf_pipe7_srcv0_vreg;     
input   [5 :0]  dp_prf_rf_pipe7_srcv1_vreg;     
input   [5 :0]  dp_prf_rf_pipe7_srcv2_vreg;     
input   [5 :0]  dp_prf_rf_pipe7_srcvm_vreg;     
input   [63:0]  lsu_idu_wb_pipe3_wb_vreg_data;  
input   [63:0]  lsu_idu_wb_pipe3_wb_vreg_expand; 
input           lsu_idu_wb_pipe3_wb_vreg_vld;   
input   [63:0]  vfpu_idu_ex5_pipe6_wb_vreg_data; 
input   [63:0]  vfpu_idu_ex5_pipe6_wb_vreg_expand; 
input           vfpu_idu_ex5_pipe6_wb_vreg_vld; 
input   [63:0]  vfpu_idu_ex5_pipe7_wb_vreg_data; 
input   [63:0]  vfpu_idu_ex5_pipe7_wb_vreg_expand; 
input           vfpu_idu_ex5_pipe7_wb_vreg_vld; 
output  [63:0]  prf_dp_rf_pipe5_srcv0_vreg_data; 
output  [63:0]  prf_dp_rf_pipe6_srcv0_vreg_data; 
output  [63:0]  prf_dp_rf_pipe6_srcv1_vreg_data; 
output  [63:0]  prf_dp_rf_pipe6_srcv2_vreg_data; 
output  [63:0]  prf_dp_rf_pipe6_srcvm_vreg_data; 
output  [63:0]  prf_dp_rf_pipe7_srcv0_vreg_data; 
output  [63:0]  prf_dp_rf_pipe7_srcv1_vreg_data; 
output  [63:0]  prf_dp_rf_pipe7_srcv2_vreg_data; 
output  [63:0]  prf_dp_rf_pipe7_srcvm_vreg_data; 




wire    [63:0]  prf_dp_rf_pipe5_srcv0_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe6_srcv0_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe6_srcv1_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe6_srcv2_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe6_srcvm_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe7_srcv0_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe7_srcv1_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe7_srcv2_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe7_srcvm_vreg_data; 































































































































































































assign prf_dp_rf_pipe5_srcv0_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe6_srcv0_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe6_srcv1_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe6_srcv2_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe6_srcvm_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe7_srcv0_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe7_srcv1_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe7_srcv2_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe7_srcvm_vreg_data[63:0] = 64'b0;



endmodule
module ct_idu_rf_prf_vregfile(
  dp_prf_rf_pipe5_srcv0_vreg,
  dp_prf_rf_pipe6_srcv0_vreg,
  dp_prf_rf_pipe6_srcv1_vreg,
  dp_prf_rf_pipe6_srcv2_vreg,
  dp_prf_rf_pipe6_srcvm_vreg,
  dp_prf_rf_pipe7_srcv0_vreg,
  dp_prf_rf_pipe7_srcv1_vreg,
  dp_prf_rf_pipe7_srcv2_vreg,
  dp_prf_rf_pipe7_srcvm_vreg,
  lsu_idu_wb_pipe3_wb_vreg_data,
  lsu_idu_wb_pipe3_wb_vreg_expand,
  lsu_idu_wb_pipe3_wb_vreg_vld,
  prf_dp_rf_pipe5_srcv0_vreg_data,
  prf_dp_rf_pipe6_srcv0_vreg_data,
  prf_dp_rf_pipe6_srcv1_vreg_data,
  prf_dp_rf_pipe6_srcv2_vreg_data,
  prf_dp_rf_pipe6_srcvm_vreg_data,
  prf_dp_rf_pipe7_srcv0_vreg_data,
  prf_dp_rf_pipe7_srcv1_vreg_data,
  prf_dp_rf_pipe7_srcv2_vreg_data,
  prf_dp_rf_pipe7_srcvm_vreg_data,
  vfpu_idu_ex5_pipe6_wb_vreg_data,
  vfpu_idu_ex5_pipe6_wb_vreg_expand,
  vfpu_idu_ex5_pipe6_wb_vreg_vld,
  vfpu_idu_ex5_pipe7_wb_vreg_data,
  vfpu_idu_ex5_pipe7_wb_vreg_expand,
  vfpu_idu_ex5_pipe7_wb_vreg_vld
);



input   [5 :0]  dp_prf_rf_pipe5_srcv0_vreg;     
input   [5 :0]  dp_prf_rf_pipe6_srcv0_vreg;     
input   [5 :0]  dp_prf_rf_pipe6_srcv1_vreg;     
input   [5 :0]  dp_prf_rf_pipe6_srcv2_vreg;     
input   [5 :0]  dp_prf_rf_pipe6_srcvm_vreg;     
input   [5 :0]  dp_prf_rf_pipe7_srcv0_vreg;     
input   [5 :0]  dp_prf_rf_pipe7_srcv1_vreg;     
input   [5 :0]  dp_prf_rf_pipe7_srcv2_vreg;     
input   [5 :0]  dp_prf_rf_pipe7_srcvm_vreg;     
input   [63:0]  lsu_idu_wb_pipe3_wb_vreg_data;  
input   [63:0]  lsu_idu_wb_pipe3_wb_vreg_expand; 
input           lsu_idu_wb_pipe3_wb_vreg_vld;   
input   [63:0]  vfpu_idu_ex5_pipe6_wb_vreg_data; 
input   [63:0]  vfpu_idu_ex5_pipe6_wb_vreg_expand; 
input           vfpu_idu_ex5_pipe6_wb_vreg_vld; 
input   [63:0]  vfpu_idu_ex5_pipe7_wb_vreg_data; 
input   [63:0]  vfpu_idu_ex5_pipe7_wb_vreg_expand; 
input           vfpu_idu_ex5_pipe7_wb_vreg_vld; 
output  [63:0]  prf_dp_rf_pipe5_srcv0_vreg_data; 
output  [63:0]  prf_dp_rf_pipe6_srcv0_vreg_data; 
output  [63:0]  prf_dp_rf_pipe6_srcv1_vreg_data; 
output  [63:0]  prf_dp_rf_pipe6_srcv2_vreg_data; 
output  [63:0]  prf_dp_rf_pipe6_srcvm_vreg_data; 
output  [63:0]  prf_dp_rf_pipe7_srcv0_vreg_data; 
output  [63:0]  prf_dp_rf_pipe7_srcv1_vreg_data; 
output  [63:0]  prf_dp_rf_pipe7_srcv2_vreg_data; 
output  [63:0]  prf_dp_rf_pipe7_srcvm_vreg_data; 




wire    [63:0]  prf_dp_rf_pipe5_srcv0_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe6_srcv0_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe6_srcv1_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe6_srcv2_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe6_srcvm_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe7_srcv0_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe7_srcv1_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe7_srcv2_vreg_data; 
wire    [63:0]  prf_dp_rf_pipe7_srcvm_vreg_data; 































































































































































































assign prf_dp_rf_pipe5_srcv0_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe6_srcv0_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe6_srcv1_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe6_srcv2_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe6_srcvm_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe7_srcv0_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe7_srcv1_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe7_srcv2_vreg_data[63:0] = 64'b0;
assign prf_dp_rf_pipe7_srcvm_vreg_data[63:0] = 64'b0;



endmodule