data/full_repos/permissive/469195529/sources/hdl/debounce1bit.v
1: b"%Error: data/full_repos/permissive/469195529/sources/hdl/debounce1bit.v:29: Cannot find file containing module: 'DFlipFlop'\n    DFlipFlop ff1(.clk(clk), .reset(rst), .D(sig), .Q(intercon[0]));\n    ^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/469195529/sources/hdl,data/full_repos/permissive/469195529/DFlipFlop\n             data/full_repos/permissive/469195529/sources/hdl,data/full_repos/permissive/469195529/DFlipFlop.v\n             data/full_repos/permissive/469195529/sources/hdl,data/full_repos/permissive/469195529/DFlipFlop.sv\n             DFlipFlop\n             DFlipFlop.v\n             DFlipFlop.sv\n             obj_dir/DFlipFlop\n             obj_dir/DFlipFlop.v\n             obj_dir/DFlipFlop.sv\n%Error: data/full_repos/permissive/469195529/sources/hdl/debounce1bit.v:30: Cannot find file containing module: 'DFlipFlop'\n    DFlipFlop ff2(.clk(clk), .reset(rst), .D(intercon[0]), .Q(intercon[1]));\n    ^~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module debounce1bit(
    input clk, sig, rst,
    output debounceSig
    );
    
    wire [1:0]intercon;
    DFlipFlop ff1(.clk(clk), .reset(rst), .D(sig), .Q(intercon[0]));
    DFlipFlop ff2(.clk(clk), .reset(rst), .D(intercon[0]), .Q(intercon[1]));
    assign debounceSig = &intercon;
endmodule
module debounce1bit(
    input clk, sig, rst,
    output debounceSig
    );

    
    wire [1:0]intercon;
    DFlipFlop ff1(.clk(clk), .reset(rst), .D(sig), .Q(intercon[0]));
    DFlipFlop ff2(.clk(clk), .reset(rst), .D(intercon[0]), .Q(intercon[1]));
    assign debounceSig = &intercon;
endmodule