data/full_repos/permissive/463481430/RTL/core/ifu2bpu.v
1: b'%Error: data/full_repos/permissive/463481430/RTL/core/ifu2bpu.v:3: Cannot find include file: config.v\n`include "config.v" \n         ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/463481430/RTL/core,data/full_repos/permissive/463481430/config.v\n             data/full_repos/permissive/463481430/RTL/core,data/full_repos/permissive/463481430/config.v.v\n             data/full_repos/permissive/463481430/RTL/core,data/full_repos/permissive/463481430/config.v.sv\n             config.v\n             config.v.v\n             config.v.sv\n             obj_dir/config.v\n             obj_dir/config.v.v\n             obj_dir/config.v.sv\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu2bpu.v:4: Cannot find include file: defines.v\n`include "defines.v" \n         ^~~~~~~~~~~\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu2bpu.v:23: Define or directive not defined: \'`xlen_def\'\n    input wire[`xlen_def] i_iaddr,\n               ^~~~~~~~~\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu2bpu.v:23: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n    input wire[`xlen_def] i_iaddr,\n                        ^\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu2bpu.v:24: Define or directive not defined: \'`ilen_def\'\n                                                                  : ... Suggested alternative: \'`ifndef\'\n    input wire[`ilen_def] i_data,\n               ^~~~~~~~~\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu2bpu.v:27: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output wire[`xlen_def] o_iaddr,\n    ^~~~~~\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu2bpu.v:27: Define or directive not defined: \'`xlen_def\'\n    output wire[`xlen_def] o_iaddr,\n                ^~~~~~~~~\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu2bpu.v:28: Define or directive not defined: \'`ilen_def\'\n                                                                  : ... Suggested alternative: \'`ifndef\'\n    output wire[`ilen_def] o_data\n                ^~~~~~~~~\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu2bpu.v:39: syntax error, unexpected IDENTIFIER\nSYNC_FIFO#(\n^~~~~~~~~\n%Error: Exiting due to 9 error(s)\n'
module IFU2BPU (
    input wire i_clk,
    input wire i_rstn,

    input wire i_vld,
    output wire o_ifu_vld,
    input wire i_flush,

    input wire i_data_vld,
    input wire[`xlen_def] i_iaddr,
    input wire[`ilen_def] i_data,

    output wire o_data_vld,
    output wire[`xlen_def] o_iaddr,
    output wire[`ilen_def] o_data
);




wire fifo_full;
wire fifo_empty;
wire[63:0] fifo_out;
wire[8:0] fifo_cnt;

SYNC_FIFO#(
    .unitwid    ( 64 ),
    .unitdpth   ( 8 )
)u_SYNC_FIFO(
    .i_clk      ( i_clk      ),
    .i_rstn     ( i_rstn     ),

    .i_flush    ( i_flush   ),

    .i_wen      ( i_data_vld         ),
    .i_unitdata ( {i_data,i_iaddr}   ),
    .o_full     ( fifo_full     ),

    .i_ren      ( (i_vld & (~fifo_empty))    ),
    .o_unitdata ( fifo_out      ),
    .o_empty    ( fifo_empty    ),

    .o_fifo_cnt  ( fifo_cnt  )
);


assign o_ifu_vld = ~((i_vld==0) & (fifo_full==1));


assign o_data_vld = ~fifo_empty;
assign o_iaddr = fifo_out[31:0];
assign o_data = fifo_out[63:32];































    
    
endmodule
module IFU2BPU (
    input wire i_clk,
    input wire i_rstn,

    input wire i_vld,
    output wire o_ifu_vld,
    input wire i_flush,

    input wire i_data_vld,
    input wire[`xlen_def] i_iaddr,
    input wire[`ilen_def] i_data,

    output wire o_data_vld,
    output wire[`xlen_def] o_iaddr,
    output wire[`ilen_def] o_data
);





wire fifo_full;
wire fifo_empty;
wire[63:0] fifo_out;
wire[8:0] fifo_cnt;

SYNC_FIFO#(
    .unitwid    ( 64 ),
    .unitdpth   ( 8 )
)u_SYNC_FIFO(
    .i_clk      ( i_clk      ),
    .i_rstn     ( i_rstn     ),

    .i_flush    ( i_flush   ),

    .i_wen      ( i_data_vld         ),
    .i_unitdata ( {i_data,i_iaddr}   ),
    .o_full     ( fifo_full     ),

    .i_ren      ( (i_vld & (~fifo_empty))    ),
    .o_unitdata ( fifo_out      ),
    .o_empty    ( fifo_empty    ),

    .o_fifo_cnt  ( fifo_cnt  )
);


assign o_ifu_vld = ~((i_vld==0) & (fifo_full==1));


assign o_data_vld = ~fifo_empty;
assign o_iaddr = fifo_out[31:0];
assign o_data = fifo_out[63:32];































    
    
endmodule