data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules/NIOS_SYS.v
1: b"%Error: data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules/NIOS_SYS.v:35: Cannot find file containing module: 'nios_system'\nnios_system u0 (\n^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules,data/full_repos/permissive/436253691/nios_system\n             data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules,data/full_repos/permissive/436253691/nios_system.v\n             data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules,data/full_repos/permissive/436253691/nios_system.sv\n             nios_system\n             nios_system.v\n             nios_system.sv\n             obj_dir/nios_system\n             obj_dir/nios_system.v\n             obj_dir/nios_system.sv\n%Error: Exiting due to 1 error(s)\n"
module NIOS_SYS(

input FPGA_CLK1_50,
input KEY0,
input [2:0] SW,
output LED0

);





nios_system u0 (


.clk_clk                                              (FPGA_CLK1_50),                                                                               
.cnn_accelerator_avalon_0_control_signals_finished_ok (SW[2]),  
.cnn_accelerator_avalon_0_control_signals_same_w      (SW[1]),  
.cnn_accelerator_avalon_0_control_signals_start       (SW[0]),                              
.reset_reset_n(KEY0),


.cnn_accelerator_avalon_0_control_signals_finished    (LED0)                                                                     

);



endmodule
module NIOS_SYS(

input FPGA_CLK1_50,
input KEY0,
input [2:0] SW,
output LED0

);






nios_system u0 (


.clk_clk                                              (FPGA_CLK1_50),                                                                               
.cnn_accelerator_avalon_0_control_signals_finished_ok (SW[2]),  
.cnn_accelerator_avalon_0_control_signals_same_w      (SW[1]),  
.cnn_accelerator_avalon_0_control_signals_start       (SW[0]),                              
.reset_reset_n(KEY0),


.cnn_accelerator_avalon_0_control_signals_finished    (LED0)                                                                     

);



endmodule