data/full_repos/permissive/463549945/Problem_sets/Circuits/Sequential Logic/Latches and Flip-Flops/DFFs and gates.v
1: b'%Error: Cannot find file containing module: Logic/Latches\n        ... Looked in:\n             data/full_repos/permissive/463549945/Problem_sets/Circuits/Sequential/Logic/Latches\n             data/full_repos/permissive/463549945/Problem_sets/Circuits/Sequential/Logic/Latches.v\n             data/full_repos/permissive/463549945/Problem_sets/Circuits/Sequential/Logic/Latches.sv\n             Logic/Latches\n             Logic/Latches.v\n             Logic/Latches.sv\n             obj_dir/Logic/Latches\n             obj_dir/Logic/Latches.v\n             obj_dir/Logic/Latches.sv\n%Error: Cannot find file containing module: and\n%Error: Cannot find file containing module: Flip-Flops,data/full_repos/permissive/463549945\n%Error: Cannot find file containing module: data/full_repos/permissive/463549945/Problem_sets/Circuits/Sequential\n%Error: Cannot find file containing module: Flip-Flops/DFFs\n%Error: Cannot find file containing module: gates.v\n%Error: Exiting due to 6 error(s)\n'
module top_module (
    input clk,
    input x,
    output z
); 
    reg q1, q2, q3;
    parameter q1 = 1'b0,
              q2 = 1'b0,
              q3 = 1'b0,;
endmodule
module top_module (
    input clk,
    input x,
    output z
);
 
    reg q1, q2, q3;
    parameter q1 = 1'b0,
              q2 = 1'b0,
              q3 = 1'b0,;
endmodule