data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/rsinv_test/rtl/libp/prbsrand.v
data/verilator_xmls/70cf6777-9d7e-41b5-a477-02cb888ac39f.xml
module prbsrand
    (clk,
     rst,
     prbs
     );



parameter           WID   = 64;
parameter           HI    = 15;
parameter           LO    = 14;


input               clk,
                    rst;
output [WID-1:0]    prbs;






reg [WID-1:0]       prbs;
always @ (posedge clk)
    begin
    if (rst)        prbs <= {WID{1'b1}};
    else            prbs <= {prbs[WID-2:0],(prbs[HI-1] ^ prbs[LO-1])};
    end

endmodule
module prbsrand
    (clk,
     rst,
     prbs
     );




parameter           WID   = 64;
parameter           HI    = 15;
parameter           LO    = 14;


input               clk,
                    rst;
output [WID-1:0]    prbs;






reg [WID-1:0]       prbs;
always @ (posedge clk)
    begin
    if (rst)        prbs <= {WID{1'b1}};
    else            prbs <= {prbs[WID-2:0],(prbs[HI-1] ^ prbs[LO-1])};
    end

endmodule