data/full_repos/permissive/522268287/project_1/project_1.srcs/sources_1/new/is_bird.v
1: b'%Warning-UNSIGNED: data/full_repos/permissive/522268287/project_1/project_1.srcs/sources_1/new/is_bird.v:10: Comparison is constant due to unsigned arithmetic\n                                                                                                           : ... In instance is_bird\n    if(x>100&&x<=160&&y>=(y_bird)&&y<=(y_bird+50)&&y>=0&&y<=sc_h)\n                                                    ^~\n                   ... Use "/* verilator lint_off UNSIGNED */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module is_bird(clk,sc_h,x,y,y_bird,birdflag);
input [10:0]sc_h;
input [10:0]x,y;
input [10:0]y_bird;
input clk;
output reg birdflag;

always@(posedge clk)
begin
    if(x>100&&x<=160&&y>=(y_bird)&&y<=(y_bird+50)&&y>=0&&y<=sc_h)
    begin
        birdflag=1;
    end
    else
    begin
        birdflag=0;
    end
end


endmodule
module is_bird(clk,sc_h,x,y,y_bird,birdflag);

input [10:0]sc_h;
input [10:0]x,y;
input [10:0]y_bird;
input clk;
output reg birdflag;

always@(posedge clk)
begin
    if(x>100&&x<=160&&y>=(y_bird)&&y<=(y_bird+50)&&y>=0&&y<=sc_h)
    begin
        birdflag=1;
    end
    else
    begin
        birdflag=0;
    end
end


endmodule