data/full_repos/permissive/458737381/src/verilog-parser/tests/not_switch.v
data/verilator_xmls/52c8df62-179d-4beb-8426-ac9b2baca7b6.xml
module not_switch (out, in);
   output  out;               
   input   in;                
   
   supply1 power;             
   supply0 ground;            
   
   pmos (out, power, in);     
   nmos (out, ground, in);    
   
endmodule
module not_switch (out, in);

   output  out;               
   input   in;                
   
   supply1 power;             
   supply0 ground;            
   
   pmos (out, power, in);     
   nmos (out, ground, in);    
   
endmodule