data/full_repos/permissive/410272426/hardware_code_radix-2/top_poly_mul.v
1: b"%Error: data/full_repos/permissive/410272426/hardware_code_radix-2/top_poly_mul.v:76: Cannot find file containing module: 'fsm'\n  fsm m1 (.clk(clk),\n  ^~~\n        ... Looked in:\n             data/full_repos/permissive/410272426/hardware_code_radix-2,data/full_repos/permissive/410272426/fsm\n             data/full_repos/permissive/410272426/hardware_code_radix-2,data/full_repos/permissive/410272426/fsm.v\n             data/full_repos/permissive/410272426/hardware_code_radix-2,data/full_repos/permissive/410272426/fsm.sv\n             fsm\n             fsm.v\n             fsm.sv\n             obj_dir/fsm\n             obj_dir/fsm.v\n             obj_dir/fsm.sv\n%Error: data/full_repos/permissive/410272426/hardware_code_radix-2/top_poly_mul.v:90: Cannot find file containing module: 'address_generator'\n  address_generator m2(\n  ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/410272426/hardware_code_radix-2/top_poly_mul.v:97: Cannot find file containing module: 'conflict_free_memory_map'\n   conflict_free_memory_map map(\n   ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/410272426/hardware_code_radix-2/top_poly_mul.v:108: Cannot find file containing module: 'arbiter'\n  arbiter m3(\n  ^~~~~~~\n%Error: data/full_repos/permissive/410272426/hardware_code_radix-2/top_poly_mul.v:113: Cannot find file containing module: 'network_bank_in'\n  network_bank_in mux1(\n  ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/410272426/hardware_code_radix-2/top_poly_mul.v:118: Cannot find file containing module: 'shift_7'\n   shift_7 #(.data_width(9)) dff_n0 (.clk(clk),.rst(rst),.din(new_address_0),.dout(new_address_0_reg));       \n   ^~~~~~~\n%Error: data/full_repos/permissive/410272426/hardware_code_radix-2/top_poly_mul.v:119: Cannot find file containing module: 'shift_7'\n   shift_7 #(.data_width(9)) dff_n1 (.clk(clk),.rst(rst),.din(new_address_1),.dout(new_address_1_reg));  \n   ^~~~~~~\n%Error: data/full_repos/permissive/410272426/hardware_code_radix-2/top_poly_mul.v:122: Cannot find file containing module: 'data_bank'\n  data_bank bank_0(\n  ^~~~~~~~~\n%Error: data/full_repos/permissive/410272426/hardware_code_radix-2/top_poly_mul.v:133: Cannot find file containing module: 'data_bank'\n  data_bank bank_1(\n  ^~~~~~~~~\n%Error: data/full_repos/permissive/410272426/hardware_code_radix-2/top_poly_mul.v:144: Cannot find file containing module: 'network_bf_in'\n   network_bf_in mux2(\n   ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/410272426/hardware_code_radix-2/top_poly_mul.v:151: Cannot find file containing module: 'compact_bf'\n   compact_bf bf_0(\n   ^~~~~~~~~~\n%Error: data/full_repos/permissive/410272426/hardware_code_radix-2/top_poly_mul.v:160: Cannot find file containing module: 'network_bf_out'\n  network_bf_out mux3(\n  ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/410272426/hardware_code_radix-2/top_poly_mul.v:167: Cannot find file containing module: 'tf_address_generator'\n  tf_address_generator m6(\n  ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/410272426/hardware_code_radix-2/top_poly_mul.v:176: Cannot find file containing module: 'tf_ROM'\n  tf_ROM rom0(\n  ^~~~~~\n%Error: Exiting due to 14 error(s)\n"
module top_poly_mul 
    #(parameter addr_rom_width = 10,
                 addr_width = 9,
                 data_width = 14)
   (
    input clk,rst,
    input [2:0] conf,
    output wire [3:0] done_flag
    );
    

    wire [8:0] k;
    wire [8:0] i;
	wire [3:0] p;
    wire sel;
    wire wen,ren,en,en_tf_rom;
    

    wire [9:0] old_address_0,old_address_1;
    

    wire [addr_width-1:0] b0,b1;

    wire a0,a1;
    

    wire sel_a_0,sel_a_1;
    

    wire [addr_width-1:0] new_address_0_reg,new_address_1_reg;
         

    wire [addr_width-1:0] new_address_0,new_address_1;


    wire [data_width-1:0] q0,q1;
    

    wire [data_width-1:0] u0,v0;

    wire [data_width-1:0] bf_0_upper,bf_0_lower;


    wire [data_width-1:0] d0,d1;
   

    wire [data_width-1:0] w;
    

    wire [addr_rom_width-1:0] tf_address;

  
  (*DONT_TOUCH = "true"*)
  fsm m1 (.clk(clk),
      .rst(rst),
      .conf(conf),
      .sel(sel),
      .k(k),
      .i(i),
	  .p(p),
      .wen(wen),
      .ren(ren),
      .en(en),

      .done_flag(done_flag));  
  
  (*DONT_TOUCH = "true"*)
  address_generator m2(
          .k(k),
          .i(i),
		  .p(p),
          .old_address_0(old_address_0),.old_address_1(old_address_1));  
   
   (*DONT_TOUCH = "true"*)
   conflict_free_memory_map map(
              .clk(clk),
              .rst(rst),
              .old_address_0(old_address_0),
              .old_address_1(old_address_1),
              .new_address_0(b0),
              .new_address_1(b1),
              .bank_number_0(a0),
              .bank_number_1(a1));
          
  (*DONT_TOUCH = "true"*)                                     
  arbiter m3(
              .a0(a0),.a1(a1),
              .sel_a_0(sel_a_0),.sel_a_1(sel_a_1)); 
                          
  (*DONT_TOUCH = "true"*)                        
  network_bank_in mux1(
                 .b0(b0),.b1(b1),
                 .sel_a_0(sel_a_0),.sel_a_1(sel_a_1),
                 .new_address_0(new_address_0),.new_address_1(new_address_1));    
   
   shift_7 #(.data_width(9)) dff_n0 (.clk(clk),.rst(rst),.din(new_address_0),.dout(new_address_0_reg));       
   shift_7 #(.data_width(9)) dff_n1 (.clk(clk),.rst(rst),.din(new_address_1),.dout(new_address_1_reg));  
                 
  (*DONT_TOUCH = "true"*)                                   
  data_bank bank_0(
                   .clk(clk),
                   .A1(new_address_0_reg),
                   .A2(new_address_0),
                   .D(d0),
                   .WEN(wen),
                   .REN(ren),
                   .EN(en),
                   .Q(q0));
                   
  (*DONT_TOUCH = "true"*)                 
  data_bank bank_1(
                   .clk(clk),
                   .A1(new_address_1_reg),
                   .A2(new_address_1),
                   .D(d1),
                   .WEN(wen),
                   .REN(ren),
                   .EN(en),
                   .Q(q1));
                   
   (*DONT_TOUCH = "true"*)                 
   network_bf_in mux2(
                      .clk(clk),.rst(rst),
                      .sel_a_0(sel_a_0),.sel_a_1(sel_a_1),
                      .q0(q0),.q1(q1),
                      .u0(u0),.v0(v0)); 

   (*DONT_TOUCH = "true"*)                                                                            
   compact_bf bf_0(
              .clk(clk),.rst(rst),
              .u(u0),.v(v0),
              .w(w),
              .sel(sel),
              .bf_upper(bf_0_upper),.bf_lower(bf_0_lower)); 
   
                  
  (*DONT_TOUCH = "true"*)                 
  network_bf_out mux3(
                       .clk(clk),.rst(rst),
                       .bf_0_upper(bf_0_upper),.bf_0_lower(bf_0_lower),
                       .sel_a_0(sel_a_0),.sel_a_1(sel_a_1),
                       .d0(d0),.d1(d1));  
   
  (*DONT_TOUCH = "true"*)                     
  tf_address_generator m6(
                          .clk(clk),.rst(rst),
                          .conf(conf),
                          .p(p),
                          .k(k),
                          .tf_address(tf_address));  

  
  (*DONT_TOUCH = "true"*)                   
  tf_ROM rom0(
              .clk(clk),
              .A(tf_address),
              .REN(ren),
              .Q(w));
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          
endmodule
module top_poly_mul 
    #(parameter addr_rom_width = 10,
                 addr_width = 9,
                 data_width = 14)
   (
    input clk,rst,
    input [2:0] conf,
    output wire [3:0] done_flag
    );

    

    wire [8:0] k;
    wire [8:0] i;
	wire [3:0] p;
    wire sel;
    wire wen,ren,en,en_tf_rom;
    

    wire [9:0] old_address_0,old_address_1;
    

    wire [addr_width-1:0] b0,b1;

    wire a0,a1;
    

    wire sel_a_0,sel_a_1;
    

    wire [addr_width-1:0] new_address_0_reg,new_address_1_reg;
         

    wire [addr_width-1:0] new_address_0,new_address_1;


    wire [data_width-1:0] q0,q1;
    

    wire [data_width-1:0] u0,v0;

    wire [data_width-1:0] bf_0_upper,bf_0_lower;


    wire [data_width-1:0] d0,d1;
   

    wire [data_width-1:0] w;
    

    wire [addr_rom_width-1:0] tf_address;

  
  (*DONT_TOUCH = "true"*)
  fsm m1 (.clk(clk),
      .rst(rst),
      .conf(conf),
      .sel(sel),
      .k(k),
      .i(i),
	  .p(p),
      .wen(wen),
      .ren(ren),
      .en(en),

      .done_flag(done_flag));  
  
  (*DONT_TOUCH = "true"*)
  address_generator m2(
          .k(k),
          .i(i),
		  .p(p),
          .old_address_0(old_address_0),.old_address_1(old_address_1));  
   
   (*DONT_TOUCH = "true"*)
   conflict_free_memory_map map(
              .clk(clk),
              .rst(rst),
              .old_address_0(old_address_0),
              .old_address_1(old_address_1),
              .new_address_0(b0),
              .new_address_1(b1),
              .bank_number_0(a0),
              .bank_number_1(a1));
          
  (*DONT_TOUCH = "true"*)                                     
  arbiter m3(
              .a0(a0),.a1(a1),
              .sel_a_0(sel_a_0),.sel_a_1(sel_a_1)); 
                          
  (*DONT_TOUCH = "true"*)                        
  network_bank_in mux1(
                 .b0(b0),.b1(b1),
                 .sel_a_0(sel_a_0),.sel_a_1(sel_a_1),
                 .new_address_0(new_address_0),.new_address_1(new_address_1));    
   
   shift_7 #(.data_width(9)) dff_n0 (.clk(clk),.rst(rst),.din(new_address_0),.dout(new_address_0_reg));       
   shift_7 #(.data_width(9)) dff_n1 (.clk(clk),.rst(rst),.din(new_address_1),.dout(new_address_1_reg));  
                 
  (*DONT_TOUCH = "true"*)                                   
  data_bank bank_0(
                   .clk(clk),
                   .A1(new_address_0_reg),
                   .A2(new_address_0),
                   .D(d0),
                   .WEN(wen),
                   .REN(ren),
                   .EN(en),
                   .Q(q0));
                   
  (*DONT_TOUCH = "true"*)                 
  data_bank bank_1(
                   .clk(clk),
                   .A1(new_address_1_reg),
                   .A2(new_address_1),
                   .D(d1),
                   .WEN(wen),
                   .REN(ren),
                   .EN(en),
                   .Q(q1));
                   
   (*DONT_TOUCH = "true"*)                 
   network_bf_in mux2(
                      .clk(clk),.rst(rst),
                      .sel_a_0(sel_a_0),.sel_a_1(sel_a_1),
                      .q0(q0),.q1(q1),
                      .u0(u0),.v0(v0)); 

   (*DONT_TOUCH = "true"*)                                                                            
   compact_bf bf_0(
              .clk(clk),.rst(rst),
              .u(u0),.v(v0),
              .w(w),
              .sel(sel),
              .bf_upper(bf_0_upper),.bf_lower(bf_0_lower)); 
   
                  
  (*DONT_TOUCH = "true"*)                 
  network_bf_out mux3(
                       .clk(clk),.rst(rst),
                       .bf_0_upper(bf_0_upper),.bf_0_lower(bf_0_lower),
                       .sel_a_0(sel_a_0),.sel_a_1(sel_a_1),
                       .d0(d0),.d1(d1));  
   
  (*DONT_TOUCH = "true"*)                     
  tf_address_generator m6(
                          .clk(clk),.rst(rst),
                          .conf(conf),
                          .p(p),
                          .k(k),
                          .tf_address(tf_address));  

  
  (*DONT_TOUCH = "true"*)                   
  tf_ROM rom0(
              .clk(clk),
              .A(tf_address),
              .REN(ren),
              .Q(w));
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          
endmodule