data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules/RBUS_STATEMACHINE.v
data/verilator_xmls/5c196eeb-2c39-458b-81e5-de9cc2c8f1ae.xml
module RBUS_STATEMACHINE(


RBUS_STATEMACHINE_Clk,
RBUS_STATEMACHINE_Reset,
RBUS_STATEMACHINE_Start_Conf,
RBUS_STATEMACHINE_Conf_Already_Ok,
RBUS_STATEMACHINE_Counter_Bus_Flag,
RBUS_STATEMACHINE_Counter_W_Size_Flag,


RBUS_STATEMACHINE_Set_Conf_Already,
RBUS_STATEMACHINE_Counter_W_Size_En,
RBUS_STATEMACHINE_Counter_W_Size_Clr,
RBUS_STATEMACHINE_Counter_W_Col_En,
RBUS_STATEMACHINE_Counter_W_Col_Load,
RBUS_STATEMACHINE_Counter_W_Col_Clr,
RBUS_STATEMACHINE_Counter_Input_Clr,
RBUS_STATEMACHINE_Counter_Input_Load,
RBUS_STATEMACHINE_Counter_Bus_En,
RBUS_STATEMACHINE_Counter_Bus_Clr,
RBUS_STATEMACHINE_Conf_Rutine,
RBUS_STATEMACHINE_Bus_En

);






localparam State_reset = 0;
localparam State_load = 1;
localparam State_Configuring0 = 2;
localparam State_Configuring1 = 3;
localparam State_Wait_Conf = 4;
localparam State_Configured = 5;





input RBUS_STATEMACHINE_Clk;
input RBUS_STATEMACHINE_Reset;
input RBUS_STATEMACHINE_Start_Conf;
input RBUS_STATEMACHINE_Conf_Already_Ok;
input RBUS_STATEMACHINE_Counter_Bus_Flag;
input RBUS_STATEMACHINE_Counter_W_Size_Flag;
output reg RBUS_STATEMACHINE_Set_Conf_Already;
output reg RBUS_STATEMACHINE_Counter_W_Size_En;
output reg RBUS_STATEMACHINE_Counter_W_Size_Clr;
output reg RBUS_STATEMACHINE_Counter_W_Col_En;
output reg RBUS_STATEMACHINE_Counter_W_Col_Load;
output reg RBUS_STATEMACHINE_Counter_W_Col_Clr;
output reg RBUS_STATEMACHINE_Counter_Input_Clr;
output reg RBUS_STATEMACHINE_Counter_Input_Load;
output reg RBUS_STATEMACHINE_Counter_Bus_En;
output reg RBUS_STATEMACHINE_Counter_Bus_Clr;
output reg RBUS_STATEMACHINE_Conf_Rutine;
output reg RBUS_STATEMACHINE_Bus_En;




reg [2:0] State_Register;
reg [2:0] State_Signal;


always @(*)
begin
	case (State_Register)
		
		State_reset: if(RBUS_STATEMACHINE_Start_Conf)
							State_Signal=State_load;
						 else
							State_Signal=State_reset;
		
		State_load: State_Signal=State_Configuring0;
		
		
		
		State_Configuring0: if(RBUS_STATEMACHINE_Counter_Bus_Flag)
										State_Signal=State_Wait_Conf;
								  else if (RBUS_STATEMACHINE_Counter_W_Size_Flag)
										State_Signal =State_Configuring1;
								  else
									State_Signal=State_Configuring0;
		
		State_Configuring1: if(RBUS_STATEMACHINE_Counter_Bus_Flag)
										State_Signal=State_Wait_Conf;
								  else
										State_Signal=State_Configuring1;
										
		State_Wait_Conf: if(RBUS_STATEMACHINE_Conf_Already_Ok)	
									State_Signal=State_Configured;
							  else
									State_Signal=State_Wait_Conf;
											
		State_Configured: if(!RBUS_STATEMACHINE_Reset)
									State_Signal=State_reset;
								else
									State_Signal=State_Configured;		
									
		default: State_Signal = State_reset;
	endcase
	
end



always @ (posedge RBUS_STATEMACHINE_Clk, negedge RBUS_STATEMACHINE_Reset)
begin
	if (!RBUS_STATEMACHINE_Reset)
		State_Register <= State_reset;
	else
		State_Register <= State_Signal;
end




always @ (*)
begin
	case(State_Register)
	
		State_reset:
		begin
			RBUS_STATEMACHINE_Set_Conf_Already = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_En = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_Clr = 1'b0;
			RBUS_STATEMACHINE_Conf_Rutine = 1'b0;
			RBUS_STATEMACHINE_Bus_En = 1'b0;
		end
	
		State_load:
		begin
			RBUS_STATEMACHINE_Set_Conf_Already = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_Clr = 1'b1;
			RBUS_STATEMACHINE_Counter_W_Col_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Load = 1'b1;
			RBUS_STATEMACHINE_Counter_W_Col_Clr = 1'b1;
			RBUS_STATEMACHINE_Counter_Input_Clr = 1'b1;
			RBUS_STATEMACHINE_Counter_Input_Load = 1'b1;
			RBUS_STATEMACHINE_Counter_Bus_En = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_Clr = 1'b1;
			RBUS_STATEMACHINE_Conf_Rutine = 1'b0;
			RBUS_STATEMACHINE_Bus_En = 1'b0;
		end
	
		State_Configuring0:
		begin
			RBUS_STATEMACHINE_Set_Conf_Already = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_En = 1'b1;
			RBUS_STATEMACHINE_Counter_W_Size_Clr = 1'b1;
			RBUS_STATEMACHINE_Counter_W_Col_En = 1'b1;
			RBUS_STATEMACHINE_Counter_W_Col_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Clr = 1'b1;
			RBUS_STATEMACHINE_Counter_Input_Clr = 1'b1;
			RBUS_STATEMACHINE_Counter_Input_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_En = 1'b1;
			RBUS_STATEMACHINE_Counter_Bus_Clr = 1'b1;
			RBUS_STATEMACHINE_Conf_Rutine = 1'b1;
			RBUS_STATEMACHINE_Bus_En = 1'b0;
		end
	
		State_Configuring1:
		begin
			RBUS_STATEMACHINE_Set_Conf_Already = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_En = 1'b1;
			RBUS_STATEMACHINE_Counter_Bus_Clr = 1'b1;
			RBUS_STATEMACHINE_Conf_Rutine = 1'b1;
			RBUS_STATEMACHINE_Bus_En = 1'b0;
		end
	
		State_Wait_Conf:
		begin
			RBUS_STATEMACHINE_Set_Conf_Already = 1'b1;
			RBUS_STATEMACHINE_Counter_W_Size_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_En = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_Clr = 1'b0;
			RBUS_STATEMACHINE_Conf_Rutine = 1'b0;
			RBUS_STATEMACHINE_Bus_En = 1'b1;
		end
	
		State_Configured:
		begin
			RBUS_STATEMACHINE_Set_Conf_Already = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_En = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_Clr = 1'b0;
			RBUS_STATEMACHINE_Conf_Rutine = 1'b0;
			RBUS_STATEMACHINE_Bus_En = 1'b1;
		end
	
	
		default:
		begin
			RBUS_STATEMACHINE_Set_Conf_Already = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_En = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_Clr = 1'b0;
			RBUS_STATEMACHINE_Conf_Rutine = 1'b0;
			RBUS_STATEMACHINE_Bus_En = 1'b0;	
		end
	
	endcase
end


endmodule
module RBUS_STATEMACHINE(


RBUS_STATEMACHINE_Clk,
RBUS_STATEMACHINE_Reset,
RBUS_STATEMACHINE_Start_Conf,
RBUS_STATEMACHINE_Conf_Already_Ok,
RBUS_STATEMACHINE_Counter_Bus_Flag,
RBUS_STATEMACHINE_Counter_W_Size_Flag,


RBUS_STATEMACHINE_Set_Conf_Already,
RBUS_STATEMACHINE_Counter_W_Size_En,
RBUS_STATEMACHINE_Counter_W_Size_Clr,
RBUS_STATEMACHINE_Counter_W_Col_En,
RBUS_STATEMACHINE_Counter_W_Col_Load,
RBUS_STATEMACHINE_Counter_W_Col_Clr,
RBUS_STATEMACHINE_Counter_Input_Clr,
RBUS_STATEMACHINE_Counter_Input_Load,
RBUS_STATEMACHINE_Counter_Bus_En,
RBUS_STATEMACHINE_Counter_Bus_Clr,
RBUS_STATEMACHINE_Conf_Rutine,
RBUS_STATEMACHINE_Bus_En

);







localparam State_reset = 0;
localparam State_load = 1;
localparam State_Configuring0 = 2;
localparam State_Configuring1 = 3;
localparam State_Wait_Conf = 4;
localparam State_Configured = 5;





input RBUS_STATEMACHINE_Clk;
input RBUS_STATEMACHINE_Reset;
input RBUS_STATEMACHINE_Start_Conf;
input RBUS_STATEMACHINE_Conf_Already_Ok;
input RBUS_STATEMACHINE_Counter_Bus_Flag;
input RBUS_STATEMACHINE_Counter_W_Size_Flag;
output reg RBUS_STATEMACHINE_Set_Conf_Already;
output reg RBUS_STATEMACHINE_Counter_W_Size_En;
output reg RBUS_STATEMACHINE_Counter_W_Size_Clr;
output reg RBUS_STATEMACHINE_Counter_W_Col_En;
output reg RBUS_STATEMACHINE_Counter_W_Col_Load;
output reg RBUS_STATEMACHINE_Counter_W_Col_Clr;
output reg RBUS_STATEMACHINE_Counter_Input_Clr;
output reg RBUS_STATEMACHINE_Counter_Input_Load;
output reg RBUS_STATEMACHINE_Counter_Bus_En;
output reg RBUS_STATEMACHINE_Counter_Bus_Clr;
output reg RBUS_STATEMACHINE_Conf_Rutine;
output reg RBUS_STATEMACHINE_Bus_En;




reg [2:0] State_Register;
reg [2:0] State_Signal;


always @(*)
begin
	case (State_Register)
		
		State_reset: if(RBUS_STATEMACHINE_Start_Conf)
							State_Signal=State_load;
						 else
							State_Signal=State_reset;
		
		State_load: State_Signal=State_Configuring0;
		
		
		
		State_Configuring0: if(RBUS_STATEMACHINE_Counter_Bus_Flag)
										State_Signal=State_Wait_Conf;
								  else if (RBUS_STATEMACHINE_Counter_W_Size_Flag)
										State_Signal =State_Configuring1;
								  else
									State_Signal=State_Configuring0;
		
		State_Configuring1: if(RBUS_STATEMACHINE_Counter_Bus_Flag)
										State_Signal=State_Wait_Conf;
								  else
										State_Signal=State_Configuring1;
										
		State_Wait_Conf: if(RBUS_STATEMACHINE_Conf_Already_Ok)	
									State_Signal=State_Configured;
							  else
									State_Signal=State_Wait_Conf;
											
		State_Configured: if(!RBUS_STATEMACHINE_Reset)
									State_Signal=State_reset;
								else
									State_Signal=State_Configured;		
									
		default: State_Signal = State_reset;
	endcase
	
end



always @ (posedge RBUS_STATEMACHINE_Clk, negedge RBUS_STATEMACHINE_Reset)
begin
	if (!RBUS_STATEMACHINE_Reset)
		State_Register <= State_reset;
	else
		State_Register <= State_Signal;
end




always @ (*)
begin
	case(State_Register)
	
		State_reset:
		begin
			RBUS_STATEMACHINE_Set_Conf_Already = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_En = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_Clr = 1'b0;
			RBUS_STATEMACHINE_Conf_Rutine = 1'b0;
			RBUS_STATEMACHINE_Bus_En = 1'b0;
		end
	
		State_load:
		begin
			RBUS_STATEMACHINE_Set_Conf_Already = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_Clr = 1'b1;
			RBUS_STATEMACHINE_Counter_W_Col_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Load = 1'b1;
			RBUS_STATEMACHINE_Counter_W_Col_Clr = 1'b1;
			RBUS_STATEMACHINE_Counter_Input_Clr = 1'b1;
			RBUS_STATEMACHINE_Counter_Input_Load = 1'b1;
			RBUS_STATEMACHINE_Counter_Bus_En = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_Clr = 1'b1;
			RBUS_STATEMACHINE_Conf_Rutine = 1'b0;
			RBUS_STATEMACHINE_Bus_En = 1'b0;
		end
	
		State_Configuring0:
		begin
			RBUS_STATEMACHINE_Set_Conf_Already = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_En = 1'b1;
			RBUS_STATEMACHINE_Counter_W_Size_Clr = 1'b1;
			RBUS_STATEMACHINE_Counter_W_Col_En = 1'b1;
			RBUS_STATEMACHINE_Counter_W_Col_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Clr = 1'b1;
			RBUS_STATEMACHINE_Counter_Input_Clr = 1'b1;
			RBUS_STATEMACHINE_Counter_Input_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_En = 1'b1;
			RBUS_STATEMACHINE_Counter_Bus_Clr = 1'b1;
			RBUS_STATEMACHINE_Conf_Rutine = 1'b1;
			RBUS_STATEMACHINE_Bus_En = 1'b0;
		end
	
		State_Configuring1:
		begin
			RBUS_STATEMACHINE_Set_Conf_Already = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_En = 1'b1;
			RBUS_STATEMACHINE_Counter_Bus_Clr = 1'b1;
			RBUS_STATEMACHINE_Conf_Rutine = 1'b1;
			RBUS_STATEMACHINE_Bus_En = 1'b0;
		end
	
		State_Wait_Conf:
		begin
			RBUS_STATEMACHINE_Set_Conf_Already = 1'b1;
			RBUS_STATEMACHINE_Counter_W_Size_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_En = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_Clr = 1'b0;
			RBUS_STATEMACHINE_Conf_Rutine = 1'b0;
			RBUS_STATEMACHINE_Bus_En = 1'b1;
		end
	
		State_Configured:
		begin
			RBUS_STATEMACHINE_Set_Conf_Already = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_En = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_Clr = 1'b0;
			RBUS_STATEMACHINE_Conf_Rutine = 1'b0;
			RBUS_STATEMACHINE_Bus_En = 1'b1;
		end
	
	
		default:
		begin
			RBUS_STATEMACHINE_Set_Conf_Already = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Size_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_En = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_W_Col_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Clr = 1'b0;
			RBUS_STATEMACHINE_Counter_Input_Load = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_En = 1'b0;
			RBUS_STATEMACHINE_Counter_Bus_Clr = 1'b0;
			RBUS_STATEMACHINE_Conf_Rutine = 1'b0;
			RBUS_STATEMACHINE_Bus_En = 1'b0;	
		end
	
	endcase
end


endmodule