data/full_repos/permissive/516084497/cells/icgtn/gf180mcu_fd_sc_mcu7t5v0__icgtn_2.behavioral.v
1: b'%Error: data/full_repos/permissive/516084497/cells/icgtn/gf180mcu_fd_sc_mcu7t5v0__icgtn_2.behavioral.v:26: Can\'t resolve module reference: \'gf180mcu_fd_sc_mcu7t5v0__icgtn_2_func\'\n gf180mcu_fd_sc_mcu7t5v0__icgtn_2_func gf180mcu_fd_sc_mcu7t5v0__icgtn_2_inst(.TE(TE),.E(E),.CLKN(CLKN),.Q(Q),.notifier(notifier));\n                                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Warning-MULTITOP: data/full_repos/permissive/516084497/cells/icgtn/gf180mcu_fd_sc_mcu7t5v0__icgtn_2.behavioral.v:26: Multiple top level modules\n                                                                                                                    : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                                                    : ... Top module \'gf180mcu_fd_sc_mcu7t5v0__icgtn_2\'\nmodule gf180mcu_fd_sc_mcu7t5v0__icgtn_2( TE, E, CLKN, Q );\n       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n                                                                                                                    : ... Top module \'gf180mcu_fd_sc_mcu7t5v0__icgtn_2_func\'\n gf180mcu_fd_sc_mcu7t5v0__icgtn_2_func gf180mcu_fd_sc_mcu7t5v0__icgtn_2_inst(.TE(TE),.E(E),.CLKN(CLKN),.Q(Q),.notifier(notifier));\n                                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 1 error(s), 1 warning(s)\n'
module gf180mcu_fd_sc_mcu7t5v0__icgtn_2( TE, E, CLKN, Q );
input CLKN, E, TE;
output Q;
reg notifier;

   `ifdef FUNCTIONAL

	gf180mcu_fd_sc_mcu7t5v0__icgtn_2_func gf180mcu_fd_sc_mcu7t5v0__icgtn_2_behav_inst(.TE(TE),.E(E),.CLKN(CLKN),.Q(Q),.notifier(notifier));

   `else

	gf180mcu_fd_sc_mcu7t5v0__icgtn_2_func gf180mcu_fd_sc_mcu7t5v0__icgtn_2_inst(.TE(TE),.E(E),.CLKN(CLKN),.Q(Q),.notifier(notifier));




	not MGM_G0(MGM_W0,E);


	not MGM_G1(MGM_W1,TE);


	and MGM_G2(ENABLE_NOT_E_AND_NOT_TE,MGM_W1,MGM_W0);


	not MGM_G3(MGM_W2,E);


	and MGM_G4(ENABLE_NOT_E_AND_TE,TE,MGM_W2);


	not MGM_G5(MGM_W3,TE);


	and MGM_G6(ENABLE_E_AND_NOT_TE,MGM_W3,E);


	and MGM_G7(ENABLE_E_AND_TE,TE,E);






   specify



	if(E===1'b0 && TE===1'b1)

	 (CLKN => Q) = (1.0,1.0);

	if(E===1'b1 && TE===1'b0)

	 (CLKN => Q) = (1.0,1.0);

	if(E===1'b1 && TE===1'b1)

	 (CLKN => Q) = (1.0,1.0);

	ifnone

	 (CLKN => Q) = (1.0,1.0);

	if(E===1'b0 && TE===1'b0)

	 (CLKN => Q) = (1.0,1.0);

	$width(posedge CLKN &&& (ENABLE_NOT_E_AND_NOT_TE === 1'b1)
		,1.0,0,notifier);

	$width(posedge CLKN &&& (ENABLE_NOT_E_AND_TE === 1'b1)
		,1.0,0,notifier);

	$width(posedge CLKN &&& (ENABLE_E_AND_NOT_TE === 1'b1)
		,1.0,0,notifier);

	$width(posedge CLKN &&& (ENABLE_E_AND_TE === 1'b1)
		,1.0,0,notifier);


	$hold(negedge CLKN,negedge E,1.0,notifier);


	$hold(negedge CLKN,posedge E,1.0,notifier);


	$setup(negedge E,negedge CLKN,1.0,notifier);


	$setup(posedge E,negedge CLKN,1.0,notifier);


	$hold(negedge CLKN,negedge TE,1.0,notifier);


	$hold(negedge CLKN,posedge TE,1.0,notifier);


	$setup(negedge TE,negedge CLKN,1.0,notifier);


	$setup(posedge TE,negedge CLKN,1.0,notifier);


	$width(posedge CLKN,1.0,0,notifier);



   endspecify

   `endif

endmodule
module gf180mcu_fd_sc_mcu7t5v0__icgtn_2( TE, E, CLKN, Q );

input CLKN, E, TE;
output Q;
reg notifier;

   `ifdef FUNCTIONAL

	gf180mcu_fd_sc_mcu7t5v0__icgtn_2_func gf180mcu_fd_sc_mcu7t5v0__icgtn_2_behav_inst(.TE(TE),.E(E),.CLKN(CLKN),.Q(Q),.notifier(notifier));

   `else

	gf180mcu_fd_sc_mcu7t5v0__icgtn_2_func gf180mcu_fd_sc_mcu7t5v0__icgtn_2_inst(.TE(TE),.E(E),.CLKN(CLKN),.Q(Q),.notifier(notifier));




	not MGM_G0(MGM_W0,E);


	not MGM_G1(MGM_W1,TE);


	and MGM_G2(ENABLE_NOT_E_AND_NOT_TE,MGM_W1,MGM_W0);


	not MGM_G3(MGM_W2,E);


	and MGM_G4(ENABLE_NOT_E_AND_TE,TE,MGM_W2);


	not MGM_G5(MGM_W3,TE);


	and MGM_G6(ENABLE_E_AND_NOT_TE,MGM_W3,E);


	and MGM_G7(ENABLE_E_AND_TE,TE,E);






   specify



	if(E===1'b0 && TE===1'b1)

	 (CLKN => Q) = (1.0,1.0);

	if(E===1'b1 && TE===1'b0)

	 (CLKN => Q) = (1.0,1.0);

	if(E===1'b1 && TE===1'b1)

	 (CLKN => Q) = (1.0,1.0);

	ifnone

	 (CLKN => Q) = (1.0,1.0);

	if(E===1'b0 && TE===1'b0)

	 (CLKN => Q) = (1.0,1.0);

	$width(posedge CLKN &&& (ENABLE_NOT_E_AND_NOT_TE === 1'b1)
		,1.0,0,notifier);

	$width(posedge CLKN &&& (ENABLE_NOT_E_AND_TE === 1'b1)
		,1.0,0,notifier);

	$width(posedge CLKN &&& (ENABLE_E_AND_NOT_TE === 1'b1)
		,1.0,0,notifier);

	$width(posedge CLKN &&& (ENABLE_E_AND_TE === 1'b1)
		,1.0,0,notifier);


	$hold(negedge CLKN,negedge E,1.0,notifier);


	$hold(negedge CLKN,posedge E,1.0,notifier);


	$setup(negedge E,negedge CLKN,1.0,notifier);


	$setup(posedge E,negedge CLKN,1.0,notifier);


	$hold(negedge CLKN,negedge TE,1.0,notifier);


	$hold(negedge CLKN,posedge TE,1.0,notifier);


	$setup(negedge TE,negedge CLKN,1.0,notifier);


	$setup(posedge TE,negedge CLKN,1.0,notifier);


	$width(posedge CLKN,1.0,0,notifier);



   endspecify

   `endif

endmodule