data/full_repos/permissive/467899092/half_subtractor.v
data/verilator_xmls/e28bbdb2-d007-498e-9283-9280888f6316.xml
module half_subtractor (
	output d,
	output bo,
	input a,
	input b
);

	wire not_a;
	
	not(not_a, a);
	xor(d, a, b);
	and(bo, not_a, b);

endmodule
module half_subtractor (
	output d,
	output bo,
	input a,
	input b
);


	wire not_a;
	
	not(not_a, a);
	xor(d, a, b);
	and(bo, not_a, b);

endmodule