data/full_repos/permissive/420819839/Basics/Xnorgate.v
data/verilator_xmls/6dbd00ad-ff9b-4265-b109-d425496dc4ab.xml
module top_module(
        input a,
        input b,
        output out );

    assign out = !(a ^ b);

endmodule
module top_module(
        input a,
        input b,
        output out );


    assign out = !(a ^ b);

endmodule