data/full_repos/permissive/493212017/blink/simple.v
data/verilator_xmls/09b09e96-a109-42e5-b047-516e761d514c.xml
module simple(

			inSignal,
			outSignal
		);

	input		inSignal;
	output		outSignal;


	assign		outSignal = inSignal;
endmodule
module simple(

			inSignal,
			outSignal
		);


	input		inSignal;
	output		outSignal;


	assign		outSignal = inSignal;
endmodule