data/full_repos/permissive/504677412/src/fifo_top/fifo_top/dist_afifo_fwft_32x50.v
1: b'%Error: data/full_repos/permissive/504677412/src/fifo_top/fifo_top/dist_afifo_fwft_32x50.v:23: syntax error, unexpected IDENTIFIER\nWFpqgbDg9IxRKqE5QNow+mkiVszdwLO3YfpzxlJZDFkrV6TsdNeveiy32mkS7xb4exGEZwCZGgJz\n^~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 1 error(s)\n'
module dist_afifo_fwft_32x50 (
  Data,
  WrClk,
  RdClk,
  WrEn,
  RdEn,
  Q,
  Empty,
  Full
)
;
input [49:0] Data;
input WrClk;
input RdClk;
input WrEn;
input RdEn;
output [49:0] Q;
output Empty;
output Full;
wire VCC;
wire GND;
  \~fifo.dist_afifo_fwft_32x50  fifo_inst (
    .RdClk(RdClk),
    .WrClk(WrClk),
    .WrEn(WrEn),
    .RdEn(RdEn),
    .Data(Data[49:0]),
    .Full(Full),
    .Empty(Empty),
    .Q(Q[49:0])
);
  VCC VCC_cZ (
    .V(VCC)
);
  GND GND_cZ (
    .G(GND)
);
  GSR GSR (
    .GSRI(VCC) 
);
endmodule
module dist_afifo_fwft_32x50 (
  Data,
  WrClk,
  RdClk,
  WrEn,
  RdEn,
  Q,
  Empty,
  Full
)
;

input [49:0] Data;
input WrClk;
input RdClk;
input WrEn;
input RdEn;
output [49:0] Q;
output Empty;
output Full;
wire VCC;
wire GND;
  \~fifo.dist_afifo_fwft_32x50  fifo_inst (
    .RdClk(RdClk),
    .WrClk(WrClk),
    .WrEn(WrEn),
    .RdEn(RdEn),
    .Data(Data[49:0]),
    .Full(Full),
    .Empty(Empty),
    .Q(Q[49:0])
);
  VCC VCC_cZ (
    .V(VCC)
);
  GND GND_cZ (
    .G(GND)
);
  GSR GSR (
    .GSRI(VCC) 
);
endmodule