data/full_repos/permissive/469195529/sources/hdl/gateMain.v
1: b"%Error: data/full_repos/permissive/469195529/sources/hdl/gateMain.v:28: Cannot find file containing module: 'transLatch'\n    transLatch latch(.clk(clk), .D(enable), .Q(enSafe));\n    ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/469195529/sources/hdl,data/full_repos/permissive/469195529/transLatch\n             data/full_repos/permissive/469195529/sources/hdl,data/full_repos/permissive/469195529/transLatch.v\n             data/full_repos/permissive/469195529/sources/hdl,data/full_repos/permissive/469195529/transLatch.sv\n             transLatch\n             transLatch.v\n             transLatch.sv\n             obj_dir/transLatch\n             obj_dir/transLatch.v\n             obj_dir/transLatch.sv\n%Error: Exiting due to 1 error(s)\n"
module gateMain(
    input clk, enable,
    output g_clk
    );
    wire enSafe;
    transLatch latch(.clk(clk), .D(enable), .Q(enSafe));
    and and1(g_clk, enSafe, clk);
endmodule
module gateMain(
    input clk, enable,
    output g_clk
    );

    wire enSafe;
    transLatch latch(.clk(clk), .D(enable), .Q(enSafe));
    and and1(g_clk, enSafe, clk);
endmodule