data/full_repos/permissive/475371394/generators/cgra2x2/src/main/resources/ConfigCell.v
data/verilator_xmls/a8137510-d491-4e57-85f7-4333f993be11.xml
module ConfigCell(ConfigIn, ConfigOut, Config_Clock, Config_Reset, select);
    parameter size = 1; 
    input Config_Clock, Config_Reset, ConfigIn;
    output ConfigOut;
    output [size-1:0] select;
    reg [size-1:0] temp;

    always @(posedge Config_Clock, posedge Config_Reset)begin
        if (Config_Reset)
            temp <= 0;
        else
            begin
                temp <= temp >> 1;
                temp[size-1] <= ConfigIn;
            end
        end
    assign select = temp;
    assign ConfigOut = temp[0];
endmodule
module ConfigCell(ConfigIn, ConfigOut, Config_Clock, Config_Reset, select);

    parameter size = 1; 
    input Config_Clock, Config_Reset, ConfigIn;
    output ConfigOut;
    output [size-1:0] select;
    reg [size-1:0] temp;

    always @(posedge Config_Clock, posedge Config_Reset)begin
        if (Config_Reset)
            temp <= 0;
        else
            begin
                temp <= temp >> 1;
                temp[size-1] <= ConfigIn;
            end
        end
    assign select = temp;
    assign ConfigOut = temp[0];
endmodule