data/full_repos/permissive/475371394/generators/cgra4x3/src/main/resources/op_ashr_32b.v
data/verilator_xmls/29f4ecc3-d3bf-441f-a85d-6d9a586ddabf.xml
module op_ashr_32b(a, b, c);
    parameter size = 32;

    input [size-1:0] a;
    input [size-1:0] b;
    output [size-1:0] c;
    assign c = a >>> b;
endmodule
module op_ashr_32b(a, b, c);

    parameter size = 32;

    input [size-1:0] a;
    input [size-1:0] b;
    output [size-1:0] c;
    assign c = a >>> b;
endmodule