data/full_repos/permissive/461620575/Galaga on FPGA/VGA/vga.v
1: b'%Error: Cannot find file containing module: on\n        ... Looked in:\n             data/full_repos/permissive/461620575/Galaga/on\n             data/full_repos/permissive/461620575/Galaga/on.v\n             data/full_repos/permissive/461620575/Galaga/on.sv\n             on\n             on.v\n             on.sv\n             obj_dir/on\n             obj_dir/on.v\n             obj_dir/on.sv\n%Error: Cannot find file containing module: FPGA/VGA,data/full_repos/permissive/461620575\n%Error: Cannot find file containing module: data/full_repos/permissive/461620575/Galaga\n%Error: Cannot find file containing module: FPGA/VGA/vga.v\n%Error: Exiting due to 4 error(s)\n'
module vga (clk, rst, addr_b, q_b, hsync, vsync, vga_blank_n, vga_clk, rgb);
	input clk, rst;
	output [15:0] addr_b;
	input [15:0] q_b;
	output hsync, vsync;
	output vga_blank_n, vga_clk;
	output [23:0] rgb;
	

	wire [9:0] hcount, vcount;
	
	vga_control control (.clk(clk), 
								.rst(rst),
								.hsync(hsync),
								.vsync(vsync),
								.vga_blank_n(vga_blank_n),
								.vga_clk(vga_clk),
								.hcount(hcount),
								.vcount(vcount)
								);	
								

	wire [23:0] pixel_out;
	address_generator addr_gen (.clk(clk), 
										 .vga_blank_n(vga_blank_n), 
										 .hcount(hcount), 
										 .vcount(vcount), 
										 .ram_q(q_b), 
										 .ram_addr(addr_b), 
										 .pixel_out(pixel_out)
										 );
								

	bitgen bgen (.vga_blank_n(vga_blank_n), 
					  .pixel_en(1'b1),
					  .fg_pixel(pixel_out), 
					  .bg_pixel(24'h000000),
					  .rgb(rgb)
					  );
								
	

endmodule
module vga (clk, rst, addr_b, q_b, hsync, vsync, vga_blank_n, vga_clk, rgb);

	input clk, rst;
	output [15:0] addr_b;
	input [15:0] q_b;
	output hsync, vsync;
	output vga_blank_n, vga_clk;
	output [23:0] rgb;
	

	wire [9:0] hcount, vcount;
	
	vga_control control (.clk(clk), 
								.rst(rst),
								.hsync(hsync),
								.vsync(vsync),
								.vga_blank_n(vga_blank_n),
								.vga_clk(vga_clk),
								.hcount(hcount),
								.vcount(vcount)
								);	
								

	wire [23:0] pixel_out;
	address_generator addr_gen (.clk(clk), 
										 .vga_blank_n(vga_blank_n), 
										 .hcount(hcount), 
										 .vcount(vcount), 
										 .ram_q(q_b), 
										 .ram_addr(addr_b), 
										 .pixel_out(pixel_out)
										 );
								

	bitgen bgen (.vga_blank_n(vga_blank_n), 
					  .pixel_en(1'b1),
					  .fg_pixel(pixel_out), 
					  .bg_pixel(24'h000000),
					  .rgb(rgb)
					  );
								
	

endmodule