data/full_repos/permissive/521337848/Hardware/procesor/CPUHelpCmp.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/521337848/Hardware/procesor/CPUHelpCmp.v:13: Multiple top level modules\n                                                                                         : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                         : ... Top module \'fromMEM\'\nmodule fromMEM(\n       ^~~~~~~\n                                                                                         : ... Top module \'bufferIN\'\nmodule bufferIN(\n       ^~~~~~~~\n                                                                                         : ... Top module \'outMEM\'\nmodule outMEM(\n       ^~~~~~\n%Error: Exiting due to 1 warning(s)\n'
module bufferIN(
	input clk,
	input rst,
	input rdyCmp,
	input[15:0] in,
	
	output reg[7:0] in1,
	output reg[7:0] in2
);

always@(posedge clk or posedge rst)begin
	if(rst) begin
		in1 <= 0;
		in2 <= 0;
	end
	else begin
		if(rdyCmp)begin
			in1 <= in[7:0];
			in2 <= in[15:8];
		end else
		begin
			in1 <= 0;
			in2 <= 0;
		end
	end
end

endmodule
module bufferIN(
	input clk,
	input rst,
	input rdyCmp,
	input[15:0] in,
	
	output reg[7:0] in1,
	output reg[7:0] in2
);


always@(posedge clk or posedge rst)begin
	if(rst) begin
		in1 <= 0;
		in2 <= 0;
	end
	else begin
		if(rdyCmp)begin
			in1 <= in[7:0];
			in2 <= in[15:8];
		end else
		begin
			in1 <= 0;
			in2 <= 0;
		end
	end
end

endmodule