data/full_repos/permissive/494148647/src/mbiobus/bench/iobus_default_response_tb.v
1: b'%Error: data/full_repos/permissive/494148647/src/mbiobus/bench/iobus_default_response_tb.v:38: Unsupported or unknown PLI call: $dumpfile\n        $dumpfile("iobus_default_response_tb.vcd");\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/494148647/src/mbiobus/bench/iobus_default_response_tb.v:39: Unsupported or unknown PLI call: $dumpvars\n        $dumpvars(0, iobus_default_response_tb);\n        ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/494148647/src/mbiobus/bench/iobus_default_response_tb.v:42: Unsupported: Ignoring delay on this delayed statement.\n        #10;\n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/494148647/src/mbiobus/bench/iobus_default_response_tb.v:46: Unsupported: Ignoring delay on this delayed statement.\n        #10;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/494148647/src/mbiobus/bench/iobus_default_response_tb.v:50: Unsupported: Ignoring delay on this delayed statement.\n        #10;\n        ^\n%Error: Exiting due to 2 error(s), 3 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module iobus_default_response_tb();

    reg io_addr_strobe;
    wire [31:0] io_read_data;
    wire io_ready;

    integer err_count = 0;

    iobus_default_response DUT (
        .io_addr_strobe(io_addr_strobe),
        .io_read_data(io_read_data),
        .io_ready(io_ready)
    );

    task resp_check;
        begin
            if (io_read_data != 32'hffffffff) begin
                err_count = err_count + 1;
                $display("ERROR: io_read_data = 0x%h", io_read_data);
            end
            if (io_ready != io_addr_strobe) begin
                err_count = err_count + 1;
                $display("ERROR: io_ready = %d", io_ready);
            end
        end
    endtask

    initial begin
        $dumpfile("iobus_default_response_tb.vcd");
        $dumpvars(0, iobus_default_response_tb);

        io_addr_strobe = 1'b0;
        #10;
        resp_check();

        io_addr_strobe = 1'b1;
        #10;
        resp_check();

        io_addr_strobe = 1'b0;
        #10;
        resp_check();

        $display("testbench finished with %d errors", err_count);
        $finish;
    end

endmodule
module iobus_default_response_tb();


    reg io_addr_strobe;
    wire [31:0] io_read_data;
    wire io_ready;

    integer err_count = 0;

    iobus_default_response DUT (
        .io_addr_strobe(io_addr_strobe),
        .io_read_data(io_read_data),
        .io_ready(io_ready)
    );

    task resp_check;
        begin
            if (io_read_data != 32'hffffffff) begin
                err_count = err_count + 1;
                $display("ERROR: io_read_data = 0x%h", io_read_data);
            end
            if (io_ready != io_addr_strobe) begin
                err_count = err_count + 1;
                $display("ERROR: io_ready = %d", io_ready);
            end
        end
    endtask

    initial begin
        $dumpfile("iobus_default_response_tb.vcd");
        $dumpvars(0, iobus_default_response_tb);

        io_addr_strobe = 1'b0;
        #10;
        resp_check();

        io_addr_strobe = 1'b1;
        #10;
        resp_check();

        io_addr_strobe = 1'b0;
        #10;
        resp_check();

        $display("testbench finished with %d errors", err_count);
        $finish;
    end

endmodule