data/full_repos/permissive/515890445/ARM_SingleCycle/SingleCycle/Shifter.v
data/verilator_xmls/e3c56377-a8ee-430d-8ce0-47c5d97c63e2.xml
module Shifter #(
	parameter WIDTH = 32
) (
	input wire [7:0] 			Shift,
	input wire [WIDTH-1:0]	Number,
	output wire [WIDTH-1:0] Out
);

	assign Out = (~Shift[1]) ? Number << Shift[7:2] : Number >> Shift[7:2];

endmodule
module Shifter #(
	parameter WIDTH = 32
) (
	input wire [7:0] 			Shift,
	input wire [WIDTH-1:0]	Number,
	output wire [WIDTH-1:0] Out
);


	assign Out = (~Shift[1]) ? Number << Shift[7:2] : Number >> Shift[7:2];

endmodule