data/full_repos/permissive/498662723/Circuits/Combinational Logic/Arithmetic Circuits/ece241 2014 q1c (signed addition overflow).v
1: b'%Error: Cannot find file containing module: Logic/Arithmetic\n        ... Looked in:\n             data/full_repos/permissive/498662723/Circuits/Combinational/Logic/Arithmetic\n             data/full_repos/permissive/498662723/Circuits/Combinational/Logic/Arithmetic.v\n             data/full_repos/permissive/498662723/Circuits/Combinational/Logic/Arithmetic.sv\n             Logic/Arithmetic\n             Logic/Arithmetic.v\n             Logic/Arithmetic.sv\n             obj_dir/Logic/Arithmetic\n             obj_dir/Logic/Arithmetic.v\n             obj_dir/Logic/Arithmetic.sv\n%Error: Cannot find file containing module: Circuits,data/full_repos/permissive/498662723\n%Error: Cannot find file containing module: data/full_repos/permissive/498662723/Circuits/Combinational\n%Error: Cannot find file containing module: Circuits/ece241\n%Error: Cannot find file containing module: 2014\n%Error: Cannot find file containing module: q1c\n%Error: Cannot find file containing module: (signed\n%Error: Cannot find file containing module: addition\n%Error: Cannot find file containing module: overflow).v\n%Error: Exiting due to 9 error(s)\n'
module top_module (
    input [7:0] a,
    input [7:0] b,
    output [7:0] s,
    output overflow
);
 
     assign s = a+b;
    assign overflow = (!s[7] & a[7] & b[7]) || (!a[7] & !b[7] & s[7]);

endmodule
module top_module (
    input [7:0] a,
    input [7:0] b,
    output [7:0] s,
    output overflow
);

 
     assign s = a+b;
    assign overflow = (!s[7] & a[7] & b[7]) || (!a[7] & !b[7] & s[7]);

endmodule