data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v
1: b"%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:10: Cannot find file containing module: 'Decoder4x16'\nDecoder4x16 DRd(.IN(RSLCT[15:12]),.OUT(DecoderRd));  \n^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/51595169/VerilogSource/RegisterFile,data/full_repos/permissive/51595169/Decoder4x16\n             data/full_repos/permissive/51595169/VerilogSource/RegisterFile,data/full_repos/permissive/51595169/Decoder4x16.v\n             data/full_repos/permissive/51595169/VerilogSource/RegisterFile,data/full_repos/permissive/51595169/Decoder4x16.sv\n             Decoder4x16\n             Decoder4x16.v\n             Decoder4x16.sv\n             obj_dir/Decoder4x16\n             obj_dir/Decoder4x16.v\n             obj_dir/Decoder4x16.sv\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:15: Cannot find file containing module: 'Multiplexer'\nMultiplexer mux(RSLCT[19:16],RSLCT[3:0],IR_CU,_RN_CU);\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:18: Cannot find file containing module: 'Decoder4x16'\nDecoder4x16 DRn_CU(.IN(_RN_CU),.OUT(DecoderRn_CU)); \n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:23: Cannot find file containing module: 'Decoder4x16'\nDecoder4x16 DRm(.IN(RSLCT[7:4]),.OUT(DecoderRm)); \n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:28: Cannot find file containing module: 'Decoder4x16'\nDecoder4x16 DRs(.IN(RSLCT[11:8]),.OUT(DecoderRs)); \n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:32: Cannot find file containing module: 'Register'\nRegister test_reg0(.IN(in),\n^~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:38: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer0(.IN(Q[0]),.Store(DecoderRn_CU[0]),.OUT(Rn));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:40: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer02(.IN(Q[0]),.Store(DecoderRm[0]),.OUT(Rm));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:42: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer03(.IN(Q[0]),.Store(DecoderRs[0]),.OUT(Rs));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:46: Cannot find file containing module: 'Register'\nRegister test_reg1(.IN(in),\n^~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:52: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer1(.IN(Q[1]),.Store(DecoderRn_CU[1]),.OUT(Rn));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:54: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer12(.IN(Q[1]),.Store(DecoderRm[1]),.OUT(Rm));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:56: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer13(.IN(Q[1]),.Store(DecoderRs[1]),.OUT(Rs));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:60: Cannot find file containing module: 'Register'\nRegister test_reg2(.IN(in),\n^~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:66: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer2(.IN(Q[2]),.Store(DecoderRn_CU[2]),.OUT(Rn));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:68: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer22(.IN(Q[2]),.Store(DecoderRm[2]),.OUT(Rm));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:70: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer23(.IN(Q[2]),.Store(DecoderRs[2]),.OUT(Rs));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:74: Cannot find file containing module: 'Register'\nRegister test_reg3(.IN(in),\n^~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:80: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer3(.IN(Q[3]),.Store(DecoderRn_CU[3]),.OUT(Rn));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:82: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer32(.IN(Q[3]),.Store(DecoderRm[3]),.OUT(Rm));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:84: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer33(.IN(Q[3]),.Store(DecoderRs[3]),.OUT(Rs));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:88: Cannot find file containing module: 'Register'\nRegister test_reg4(.IN(in),\n^~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:94: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer4(.IN(Q[4]),.Store(DecoderRn_CU[4]),.OUT(Rn));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:96: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer42(.IN(Q[4]),.Store(DecoderRm[4]),.OUT(Rm));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:98: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer43(.IN(Q[4]),.Store(DecoderRs[4]),.OUT(Rs));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:102: Cannot find file containing module: 'Register'\nRegister test_reg5(.IN(in),\n^~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:108: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer5(.IN(Q[5]),.Store(DecoderRn_CU[5]),.OUT(Rn));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:110: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer52(.IN(Q[5]),.Store(DecoderRm[5]),.OUT(Rm));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:112: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer53(.IN(Q[5]),.Store(DecoderRs[5]),.OUT(Rs));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:116: Cannot find file containing module: 'Register'\nRegister test_reg6(.IN(in),\n^~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:122: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer6(.IN(Q[6]),.Store(DecoderRn_CU[6]),.OUT(Rn));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:124: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer62(.IN(Q[6]),.Store(DecoderRm[6]),.OUT(Rm));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:126: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer63(.IN(Q[6]),.Store(DecoderRs[6]),.OUT(Rs));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:130: Cannot find file containing module: 'Register'\nRegister test_reg7(.IN(in),\n^~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:136: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer7(.IN(Q[7]),.Store(DecoderRn_CU[7]),.OUT(Rn));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:138: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer72(.IN(Q[7]),.Store(DecoderRm[7]),.OUT(Rm));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:140: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer73(.IN(Q[7]),.Store(DecoderRs[7]),.OUT(Rs));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:144: Cannot find file containing module: 'Register'\nRegister test_reg8(.IN(in),\n^~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:150: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer8(.IN(Q[8]),.Store(DecoderRn_CU[8]),.OUT(Rn));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:152: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer82(.IN(Q[8]),.Store(DecoderRm[8]),.OUT(Rm));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:154: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer83(.IN(Q[8]),.Store(DecoderRs[8]),.OUT(Rs));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:158: Cannot find file containing module: 'Register'\nRegister test_reg9(.IN(in),\n^~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:164: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer9(.IN(Q[9]),.Store(DecoderRn_CU[9]),.OUT(Rn));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:166: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer92(.IN(Q[9]),.Store(DecoderRm[9]),.OUT(Rm));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:168: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer93(.IN(Q[9]),.Store(DecoderRs[9]),.OUT(Rs));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:172: Cannot find file containing module: 'Register'\nRegister test_reg10(.IN(in),\n^~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:178: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer10(.IN(Q[10]),.Store(DecoderRn_CU[10]),.OUT(Rn));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:180: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer102(.IN(Q[10]),.Store(DecoderRm[10]),.OUT(Rm));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:182: Cannot find file containing module: 'Buffer32_32'\nBuffer32_32 bufffer103(.IN(Q[10]),.Store(DecoderRs[10]),.OUT(Rs));\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/51595169/VerilogSource/RegisterFile/RegisterFile_nogenerate.v:186: Cannot find file containing module: 'Register'\nRegister test_reg11(.IN(in),\n^~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n"
module RegisterFile_nogenerate(input [31:0] Rd,Mem,Pcin,input [19:0] RSLCT,input Clk, RESET, LOADPC, LOAD,IR_CU, output [31:0] Rn,Rm,Rs,PCout);

wire [31:0] in;
assign in = (Rd | Mem);
wire [31:0] Q[15:0];


wire [15:0] DecoderRd;

Decoder4x16 DRd(.IN(RSLCT[15:12]),.OUT(DecoderRd));


wire [3:0] _RN_CU; 

Multiplexer mux(RSLCT[19:16],RSLCT[3:0],IR_CU,_RN_CU);
wire [15:0] DecoderRn_CU;

Decoder4x16 DRn_CU(.IN(_RN_CU),.OUT(DecoderRn_CU));


wire [15:0] DecoderRm;

Decoder4x16 DRm(.IN(RSLCT[7:4]),.OUT(DecoderRm));


wire [15:0] DecoderRs;

Decoder4x16 DRs(.IN(RSLCT[11:8]),.OUT(DecoderRs));
 


Register test_reg0(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[0]&LOAD),
				  .OUT(Q[0]));

Buffer32_32 bufffer0(.IN(Q[0]),.Store(DecoderRn_CU[0]),.OUT(Rn));

Buffer32_32 bufffer02(.IN(Q[0]),.Store(DecoderRm[0]),.OUT(Rm));

Buffer32_32 bufffer03(.IN(Q[0]),.Store(DecoderRs[0]),.OUT(Rs));



Register test_reg1(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[1]&LOAD),
				  .OUT(Q[1]));

Buffer32_32 bufffer1(.IN(Q[1]),.Store(DecoderRn_CU[1]),.OUT(Rn));

Buffer32_32 bufffer12(.IN(Q[1]),.Store(DecoderRm[1]),.OUT(Rm));

Buffer32_32 bufffer13(.IN(Q[1]),.Store(DecoderRs[1]),.OUT(Rs));



Register test_reg2(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[2]&LOAD),
				  .OUT(Q[2]));

Buffer32_32 bufffer2(.IN(Q[2]),.Store(DecoderRn_CU[2]),.OUT(Rn));

Buffer32_32 bufffer22(.IN(Q[2]),.Store(DecoderRm[2]),.OUT(Rm));

Buffer32_32 bufffer23(.IN(Q[2]),.Store(DecoderRs[2]),.OUT(Rs));



Register test_reg3(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[3]&LOAD),
				  .OUT(Q[3]));

Buffer32_32 bufffer3(.IN(Q[3]),.Store(DecoderRn_CU[3]),.OUT(Rn));

Buffer32_32 bufffer32(.IN(Q[3]),.Store(DecoderRm[3]),.OUT(Rm));

Buffer32_32 bufffer33(.IN(Q[3]),.Store(DecoderRs[3]),.OUT(Rs));



Register test_reg4(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[4]&LOAD),
				  .OUT(Q[4]));

Buffer32_32 bufffer4(.IN(Q[4]),.Store(DecoderRn_CU[4]),.OUT(Rn));

Buffer32_32 bufffer42(.IN(Q[4]),.Store(DecoderRm[4]),.OUT(Rm));

Buffer32_32 bufffer43(.IN(Q[4]),.Store(DecoderRs[4]),.OUT(Rs));



Register test_reg5(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[5]&LOAD),
				  .OUT(Q[5]));

Buffer32_32 bufffer5(.IN(Q[5]),.Store(DecoderRn_CU[5]),.OUT(Rn));

Buffer32_32 bufffer52(.IN(Q[5]),.Store(DecoderRm[5]),.OUT(Rm));

Buffer32_32 bufffer53(.IN(Q[5]),.Store(DecoderRs[5]),.OUT(Rs));



Register test_reg6(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[6]&LOAD),
				  .OUT(Q[6]));

Buffer32_32 bufffer6(.IN(Q[6]),.Store(DecoderRn_CU[6]),.OUT(Rn));

Buffer32_32 bufffer62(.IN(Q[6]),.Store(DecoderRm[6]),.OUT(Rm));

Buffer32_32 bufffer63(.IN(Q[6]),.Store(DecoderRs[6]),.OUT(Rs));



Register test_reg7(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[7]&LOAD),
				  .OUT(Q[7]));

Buffer32_32 bufffer7(.IN(Q[7]),.Store(DecoderRn_CU[7]),.OUT(Rn));

Buffer32_32 bufffer72(.IN(Q[7]),.Store(DecoderRm[7]),.OUT(Rm));

Buffer32_32 bufffer73(.IN(Q[7]),.Store(DecoderRs[7]),.OUT(Rs));



Register test_reg8(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[8]&LOAD),
				  .OUT(Q[8]));

Buffer32_32 bufffer8(.IN(Q[8]),.Store(DecoderRn_CU[8]),.OUT(Rn));

Buffer32_32 bufffer82(.IN(Q[8]),.Store(DecoderRm[8]),.OUT(Rm));

Buffer32_32 bufffer83(.IN(Q[8]),.Store(DecoderRs[8]),.OUT(Rs));



Register test_reg9(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[9]&LOAD),
				  .OUT(Q[9]));

Buffer32_32 bufffer9(.IN(Q[9]),.Store(DecoderRn_CU[9]),.OUT(Rn));

Buffer32_32 bufffer92(.IN(Q[9]),.Store(DecoderRm[9]),.OUT(Rm));

Buffer32_32 bufffer93(.IN(Q[9]),.Store(DecoderRs[9]),.OUT(Rs));



Register test_reg10(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[10]&LOAD),
				  .OUT(Q[10]));

Buffer32_32 bufffer10(.IN(Q[10]),.Store(DecoderRn_CU[10]),.OUT(Rn));

Buffer32_32 bufffer102(.IN(Q[10]),.Store(DecoderRm[10]),.OUT(Rm));

Buffer32_32 bufffer103(.IN(Q[10]),.Store(DecoderRs[10]),.OUT(Rs));



Register test_reg11(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[11]&LOAD),
				  .OUT(Q[11]));

Buffer32_32 bufffer11(.IN(Q[11]),.Store(DecoderRn_CU[11]),.OUT(Rn));

Buffer32_32 bufffer112(.IN(Q[11]),.Store(DecoderRm[11]),.OUT(Rm));

Buffer32_32 bufffer113(.IN(Q[11]),.Store(DecoderRs[11]),.OUT(Rs));



Register test_reg12(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[12]&LOAD),
				  .OUT(Q[12]));

Buffer32_32 bufffer121(.IN(Q[12]),.Store(DecoderRn_CU[12]),.OUT(Rn));

Buffer32_32 bufffer122(.IN(Q[12]),.Store(DecoderRm[12]),.OUT(Rm));

Buffer32_32 bufffer123(.IN(Q[12]),.Store(DecoderRs[12]),.OUT(Rs));



Register test_reg13(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[13]&LOAD),
				  .OUT(Q[13]));

Buffer32_32 bufffer131(.IN(Q[13]),.Store(DecoderRn_CU[13]),.OUT(Rn));

Buffer32_32 bufffer132(.IN(Q[13]),.Store(DecoderRm[13]),.OUT(Rm));

Buffer32_32 bufffer133(.IN(Q[13]),.Store(DecoderRs[13]),.OUT(Rs));



Register test_reg14(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[14]&LOAD),
				  .OUT(Q[14]));

Buffer32_32 bufffer14(.IN(Q[14]),.Store(DecoderRn_CU[14]),.OUT(Rn));

Buffer32_32 bufffer142(.IN(Q[14]),.Store(DecoderRm[14]),.OUT(Rm));

Buffer32_32 bufffer143(.IN(Q[14]),.Store(DecoderRs[14]),.OUT(Rs));



Register test_reg15(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[15]&LOAD),
				  .OUT(Q[15]));

Buffer32_32 bufffer15(.IN(Q[15]),.Store(DecoderRn_CU[15]),.OUT(Rn));

Buffer32_32 bufffer152(.IN(Q[15]),.Store(DecoderRm[15]),.OUT(Rm));

Buffer32_32 bufffer153(.IN(Q[15]),.Store(DecoderRs[15]),.OUT(Rs));

endmodule
module RegisterFile_nogenerate(input [31:0] Rd,Mem,Pcin,input [19:0] RSLCT,input Clk, RESET, LOADPC, LOAD,IR_CU, output [31:0] Rn,Rm,Rs,PCout);


wire [31:0] in;
assign in = (Rd | Mem);
wire [31:0] Q[15:0];


wire [15:0] DecoderRd;

Decoder4x16 DRd(.IN(RSLCT[15:12]),.OUT(DecoderRd));


wire [3:0] _RN_CU; 

Multiplexer mux(RSLCT[19:16],RSLCT[3:0],IR_CU,_RN_CU);
wire [15:0] DecoderRn_CU;

Decoder4x16 DRn_CU(.IN(_RN_CU),.OUT(DecoderRn_CU));


wire [15:0] DecoderRm;

Decoder4x16 DRm(.IN(RSLCT[7:4]),.OUT(DecoderRm));


wire [15:0] DecoderRs;

Decoder4x16 DRs(.IN(RSLCT[11:8]),.OUT(DecoderRs));
 


Register test_reg0(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[0]&LOAD),
				  .OUT(Q[0]));

Buffer32_32 bufffer0(.IN(Q[0]),.Store(DecoderRn_CU[0]),.OUT(Rn));

Buffer32_32 bufffer02(.IN(Q[0]),.Store(DecoderRm[0]),.OUT(Rm));

Buffer32_32 bufffer03(.IN(Q[0]),.Store(DecoderRs[0]),.OUT(Rs));



Register test_reg1(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[1]&LOAD),
				  .OUT(Q[1]));

Buffer32_32 bufffer1(.IN(Q[1]),.Store(DecoderRn_CU[1]),.OUT(Rn));

Buffer32_32 bufffer12(.IN(Q[1]),.Store(DecoderRm[1]),.OUT(Rm));

Buffer32_32 bufffer13(.IN(Q[1]),.Store(DecoderRs[1]),.OUT(Rs));



Register test_reg2(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[2]&LOAD),
				  .OUT(Q[2]));

Buffer32_32 bufffer2(.IN(Q[2]),.Store(DecoderRn_CU[2]),.OUT(Rn));

Buffer32_32 bufffer22(.IN(Q[2]),.Store(DecoderRm[2]),.OUT(Rm));

Buffer32_32 bufffer23(.IN(Q[2]),.Store(DecoderRs[2]),.OUT(Rs));



Register test_reg3(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[3]&LOAD),
				  .OUT(Q[3]));

Buffer32_32 bufffer3(.IN(Q[3]),.Store(DecoderRn_CU[3]),.OUT(Rn));

Buffer32_32 bufffer32(.IN(Q[3]),.Store(DecoderRm[3]),.OUT(Rm));

Buffer32_32 bufffer33(.IN(Q[3]),.Store(DecoderRs[3]),.OUT(Rs));



Register test_reg4(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[4]&LOAD),
				  .OUT(Q[4]));

Buffer32_32 bufffer4(.IN(Q[4]),.Store(DecoderRn_CU[4]),.OUT(Rn));

Buffer32_32 bufffer42(.IN(Q[4]),.Store(DecoderRm[4]),.OUT(Rm));

Buffer32_32 bufffer43(.IN(Q[4]),.Store(DecoderRs[4]),.OUT(Rs));



Register test_reg5(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[5]&LOAD),
				  .OUT(Q[5]));

Buffer32_32 bufffer5(.IN(Q[5]),.Store(DecoderRn_CU[5]),.OUT(Rn));

Buffer32_32 bufffer52(.IN(Q[5]),.Store(DecoderRm[5]),.OUT(Rm));

Buffer32_32 bufffer53(.IN(Q[5]),.Store(DecoderRs[5]),.OUT(Rs));



Register test_reg6(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[6]&LOAD),
				  .OUT(Q[6]));

Buffer32_32 bufffer6(.IN(Q[6]),.Store(DecoderRn_CU[6]),.OUT(Rn));

Buffer32_32 bufffer62(.IN(Q[6]),.Store(DecoderRm[6]),.OUT(Rm));

Buffer32_32 bufffer63(.IN(Q[6]),.Store(DecoderRs[6]),.OUT(Rs));



Register test_reg7(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[7]&LOAD),
				  .OUT(Q[7]));

Buffer32_32 bufffer7(.IN(Q[7]),.Store(DecoderRn_CU[7]),.OUT(Rn));

Buffer32_32 bufffer72(.IN(Q[7]),.Store(DecoderRm[7]),.OUT(Rm));

Buffer32_32 bufffer73(.IN(Q[7]),.Store(DecoderRs[7]),.OUT(Rs));



Register test_reg8(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[8]&LOAD),
				  .OUT(Q[8]));

Buffer32_32 bufffer8(.IN(Q[8]),.Store(DecoderRn_CU[8]),.OUT(Rn));

Buffer32_32 bufffer82(.IN(Q[8]),.Store(DecoderRm[8]),.OUT(Rm));

Buffer32_32 bufffer83(.IN(Q[8]),.Store(DecoderRs[8]),.OUT(Rs));



Register test_reg9(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[9]&LOAD),
				  .OUT(Q[9]));

Buffer32_32 bufffer9(.IN(Q[9]),.Store(DecoderRn_CU[9]),.OUT(Rn));

Buffer32_32 bufffer92(.IN(Q[9]),.Store(DecoderRm[9]),.OUT(Rm));

Buffer32_32 bufffer93(.IN(Q[9]),.Store(DecoderRs[9]),.OUT(Rs));



Register test_reg10(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[10]&LOAD),
				  .OUT(Q[10]));

Buffer32_32 bufffer10(.IN(Q[10]),.Store(DecoderRn_CU[10]),.OUT(Rn));

Buffer32_32 bufffer102(.IN(Q[10]),.Store(DecoderRm[10]),.OUT(Rm));

Buffer32_32 bufffer103(.IN(Q[10]),.Store(DecoderRs[10]),.OUT(Rs));



Register test_reg11(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[11]&LOAD),
				  .OUT(Q[11]));

Buffer32_32 bufffer11(.IN(Q[11]),.Store(DecoderRn_CU[11]),.OUT(Rn));

Buffer32_32 bufffer112(.IN(Q[11]),.Store(DecoderRm[11]),.OUT(Rm));

Buffer32_32 bufffer113(.IN(Q[11]),.Store(DecoderRs[11]),.OUT(Rs));



Register test_reg12(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[12]&LOAD),
				  .OUT(Q[12]));

Buffer32_32 bufffer121(.IN(Q[12]),.Store(DecoderRn_CU[12]),.OUT(Rn));

Buffer32_32 bufffer122(.IN(Q[12]),.Store(DecoderRm[12]),.OUT(Rm));

Buffer32_32 bufffer123(.IN(Q[12]),.Store(DecoderRs[12]),.OUT(Rs));



Register test_reg13(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[13]&LOAD),
				  .OUT(Q[13]));

Buffer32_32 bufffer131(.IN(Q[13]),.Store(DecoderRn_CU[13]),.OUT(Rn));

Buffer32_32 bufffer132(.IN(Q[13]),.Store(DecoderRm[13]),.OUT(Rm));

Buffer32_32 bufffer133(.IN(Q[13]),.Store(DecoderRs[13]),.OUT(Rs));



Register test_reg14(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[14]&LOAD),
				  .OUT(Q[14]));

Buffer32_32 bufffer14(.IN(Q[14]),.Store(DecoderRn_CU[14]),.OUT(Rn));

Buffer32_32 bufffer142(.IN(Q[14]),.Store(DecoderRm[14]),.OUT(Rm));

Buffer32_32 bufffer143(.IN(Q[14]),.Store(DecoderRs[14]),.OUT(Rs));



Register test_reg15(.IN(in),
				  .Clk(Clk),
				  .Reset(RESET),
				  .Load(DecoderRd[15]&LOAD),
				  .OUT(Q[15]));

Buffer32_32 bufffer15(.IN(Q[15]),.Store(DecoderRn_CU[15]),.OUT(Rn));

Buffer32_32 bufffer152(.IN(Q[15]),.Store(DecoderRm[15]),.OUT(Rm));

Buffer32_32 bufffer153(.IN(Q[15]),.Store(DecoderRs[15]),.OUT(Rs));

endmodule