data/full_repos/permissive/42061259/Proyecto 1/Fifo_Lifo TB/stack.v
1: b'%Error: Cannot find file containing module: 1/Fifo_Lifo\n        ... Looked in:\n             data/full_repos/permissive/42061259/Proyecto/1/Fifo_Lifo\n             data/full_repos/permissive/42061259/Proyecto/1/Fifo_Lifo.v\n             data/full_repos/permissive/42061259/Proyecto/1/Fifo_Lifo.sv\n             1/Fifo_Lifo\n             1/Fifo_Lifo.v\n             1/Fifo_Lifo.sv\n             obj_dir/1/Fifo_Lifo\n             obj_dir/1/Fifo_Lifo.v\n             obj_dir/1/Fifo_Lifo.sv\n%Error: Cannot find file containing module: TB,data/full_repos/permissive/42061259\n%Error: Cannot find file containing module: data/full_repos/permissive/42061259/Proyecto\n%Error: Cannot find file containing module: TB/stack.v\n%Error: Exiting due to 4 error(s)\n'
module Stack (
	clk,
	reset,
	q,
	d,
	push,
	pop
);

	parameter WIDTH = 32;
	parameter DEPTH = 7;

	input                    clk;
	input                    reset;
	input      [WIDTH - 1:0] d;
	output reg [WIDTH - 1:0] q;
	input                    push;
	input                    pop;

	reg [DEPTH - 1:0] ptr;
	reg [WIDTH - 1:0] stack [0:DEPTH - 1];

	always @(posedge clk) begin
		if (reset)
			ptr <= 0;
		else if (push)
			ptr <= ptr + 1;
		else if (pop)
			ptr <= ptr - 1;
	end

	always @(posedge clk) begin
		if (push) begin
			stack[ptr] <= d;
		end
		
		if (pop) begin
			q <= stack[ptr - 1];
		end
		
	end

endmodule
module Stack (
	clk,
	reset,
	q,
	d,
	push,
	pop
);


	parameter WIDTH = 32;
	parameter DEPTH = 7;

	input                    clk;
	input                    reset;
	input      [WIDTH - 1:0] d;
	output reg [WIDTH - 1:0] q;
	input                    push;
	input                    pop;

	reg [DEPTH - 1:0] ptr;
	reg [WIDTH - 1:0] stack [0:DEPTH - 1];

	always @(posedge clk) begin
		if (reset)
			ptr <= 0;
		else if (push)
			ptr <= ptr + 1;
		else if (pop)
			ptr <= ptr - 1;
	end

	always @(posedge clk) begin
		if (push) begin
			stack[ptr] <= d;
		end
		
		if (pop) begin
			q <= stack[ptr - 1];
		end
		
	end

endmodule