data/full_repos/permissive/411838135/rv/rename.sv
1: b'%Error: data/full_repos/permissive/411838135/rv/rename.sv:72: Cannot find include file: mk8_4.inc\n`include "mk8_4.inc" \n         ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/411838135/rv,data/full_repos/permissive/411838135/mk8_4.inc\n             data/full_repos/permissive/411838135/rv,data/full_repos/permissive/411838135/mk8_4.inc.v\n             data/full_repos/permissive/411838135/rv,data/full_repos/permissive/411838135/mk8_4.inc.sv\n             mk8_4.inc\n             mk8_4.inc.v\n             mk8_4.inc.sv\n             obj_dir/mk8_4.inc\n             obj_dir/mk8_4.inc.v\n             obj_dir/mk8_4.inc.sv\n%Error: data/full_repos/permissive/411838135/rv/rename.sv:75: Cannot find include file: mk8_8.inc\n`include "mk8_8.inc" \n         ^~~~~~~~~~~\n%Error: data/full_repos/permissive/411838135/rv/rename.sv:78: Cannot find include file: mk8_16.inc\n`include "mk8_16.inc" \n         ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/411838135/rv/rename.sv:268: Cannot find include file: mk4_16.inc\n`include "mk4_16.inc" \n         ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/411838135/rv/rename.sv:271: Cannot find include file: mk4_32.inc\n`include "mk4_32.inc" \n         ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/411838135/rv/rename.sv:274: Cannot find include file: mk4_64.inc\n`include "mk4_64.inc" \n         ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/411838135/rv/rename.sv:517: Cannot find include file: mkinc4.inc\n`include "mkinc4.inc" \n         ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/411838135/rv/rename.sv:520: Cannot find include file: mkinc8.inc\n`include "mkinc8.inc" \n         ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/411838135/rv/rename.sv:523: Cannot find include file: mkinc16.inc\n`include "mkinc16.inc" \n         ^~~~~~~~~~~~~\n%Error: Exiting due to 9 error(s)\n'
module rename_ctrl(
		input		clk, 
		input		reset,
`ifdef TRACE_CACHE
		input		trace_used,
`endif
		input   [2*NDEC-1:0]will_be_valid,
		input	[LNCOMMIT:0]current_available,
		input			    commit_br_enable,
		input				commit_trap_br_enable,
		input				commit_int_force_fetch,

		output				force_fetch_rename,

		output  [LNCOMMIT-1:0]count_out,
		output  [3:0]rename_count_out,
		output 	    proceed,
		output		rename_reloading,
		output	    rename_stall);
        parameter VA_SZ=48;
        parameter CNTRL_SIZE=7;
        parameter NDEC = 4;
        parameter NHART=1;      
        parameter LNHART=0;      
        parameter BDEC= 4;
		parameter RA=5;
		parameter RV=64;
		parameter HART=0;
		parameter NCOMMIT = 32;
        parameter LNCOMMIT = 5;
		parameter CALL_STACK_SIZE=32;
		parameter NUM_PENDING=32;
		parameter NUM_PENDING_RET=8;

	reg [LNCOMMIT-1:0]c_count_out;
	assign proceed = !rename_stall && c_count_out > 0;
	assign count_out = (reset?0:commit_int_force_fetch?2:rename_reloading|| c_count_out > current_available?0:c_count_out);
	assign rename_stall = !reset && c_count_out > current_available;
	wire stall_in = commit_br_enable|commit_trap_br_enable|r_force_fetch_rename;
	reg [1:0]r_stall;
	reg [3:0]r_count_out;
	always @(posedge clk)
		r_count_out <= (reset?0:count_out);
	assign rename_count_out = r_count_out;


	reg		r_force_fetch_rename;
	always @(posedge clk)
		r_force_fetch_rename <= commit_int_force_fetch;
	assign force_fetch_rename = r_force_fetch_rename;

	generate
		if (NDEC==2) begin
`include "mk8_4.inc"
		end else
		if (NDEC==4) begin
`include "mk8_8.inc"
		end else
		if (NDEC==8) begin
`include "mk8_16.inc"
		end 
	endgenerate

`ifdef TRACE_CACHE
	assign rename_reloading = (trace_used? r_stall[0]|stall_in :  r_stall!=0);
`else
	assign rename_reloading = r_stall!=0;
`endif
    always @(posedge clk)
		r_stall <= (reset||commit_int_force_fetch?0:{r_stall[0], stall_in});

endmodule
module rename_ctrl(
		input		clk, 
		input		reset,
`ifdef TRACE_CACHE
		input		trace_used,
`endif
		input   [2*NDEC-1:0]will_be_valid,
		input	[LNCOMMIT:0]current_available,
		input			    commit_br_enable,
		input				commit_trap_br_enable,
		input				commit_int_force_fetch,

		output				force_fetch_rename,

		output  [LNCOMMIT-1:0]count_out,
		output  [3:0]rename_count_out,
		output 	    proceed,
		output		rename_reloading,
		output	    rename_stall);

        parameter VA_SZ=48;
        parameter CNTRL_SIZE=7;
        parameter NDEC = 4;
        parameter NHART=1;      
        parameter LNHART=0;      
        parameter BDEC= 4;
		parameter RA=5;
		parameter RV=64;
		parameter HART=0;
		parameter NCOMMIT = 32;
        parameter LNCOMMIT = 5;
		parameter CALL_STACK_SIZE=32;
		parameter NUM_PENDING=32;
		parameter NUM_PENDING_RET=8;

	reg [LNCOMMIT-1:0]c_count_out;
	assign proceed = !rename_stall && c_count_out > 0;
	assign count_out = (reset?0:commit_int_force_fetch?2:rename_reloading|| c_count_out > current_available?0:c_count_out);
	assign rename_stall = !reset && c_count_out > current_available;
	wire stall_in = commit_br_enable|commit_trap_br_enable|r_force_fetch_rename;
	reg [1:0]r_stall;
	reg [3:0]r_count_out;
	always @(posedge clk)
		r_count_out <= (reset?0:count_out);
	assign rename_count_out = r_count_out;


	reg		r_force_fetch_rename;
	always @(posedge clk)
		r_force_fetch_rename <= commit_int_force_fetch;
	assign force_fetch_rename = r_force_fetch_rename;

	generate
		if (NDEC==2) begin
`include "mk8_4.inc"
		end else
		if (NDEC==4) begin
`include "mk8_8.inc"
		end else
		if (NDEC==8) begin
`include "mk8_16.inc"
		end 
	endgenerate

`ifdef TRACE_CACHE
	assign rename_reloading = (trace_used? r_stall[0]|stall_in :  r_stall!=0);
`else
	assign rename_reloading = r_stall!=0;
`endif
    always @(posedge clk)
		r_stall <= (reset||commit_int_force_fetch?0:{r_stall[0], stall_in});

endmodule