data/full_repos/permissive/435997396/asic/e-class-aardonyx/aardonyx.v
1: b"%Error: data/full_repos/permissive/435997396/asic/e-class-aardonyx/aardonyx.v:578: Cannot find file containing module: 'mkbootrom'\n  mkbootrom bootrom ( .CLK(CLK),\n  ^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/435997396/asic/e-class-aardonyx,data/full_repos/permissive/435997396/mkbootrom\n             data/full_repos/permissive/435997396/asic/e-class-aardonyx,data/full_repos/permissive/435997396/mkbootrom.v\n             data/full_repos/permissive/435997396/asic/e-class-aardonyx,data/full_repos/permissive/435997396/mkbootrom.sv\n             mkbootrom\n             mkbootrom.v\n             mkbootrom.sv\n             obj_dir/mkbootrom\n             obj_dir/mkbootrom.v\n             obj_dir/mkbootrom.sv\n%Error: data/full_repos/permissive/435997396/asic/e-class-aardonyx/aardonyx.v:602: Cannot find file containing module: 'mkSoc'\n  mkSoc soc ( .resetpc                        (resetpc                        ),\n  ^~~~~\n%Error: Exiting due to 2 error(s)\n"
module aardonyx(
    test_mode,
    boot_mode,
	  CLK_tck_clk,
	  RST_N_trst,
	  CLK,
	  RST_N,

	  spi0_io_mosi,

	  spi0_io_sclk,

	  spi0_io_nss,

	  spi0_io_miso_dat,

	  spi1_io_mosi,

	  spi1_io_sclk,

	  spi1_io_nss,

	  spi1_io_miso_dat,

	  uart0_io_SIN,

	  uart0_io_SOUT,

	  i2c0_out_scl_out,

	  i2c0_out_scl_in_in,

	  i2c0_out_scl_out_en,

	  i2c0_out_sda_out,

	  i2c0_out_sda_in_in,

	  i2c0_out_sda_out_en,

	  i2c1_out_scl_out,

	  i2c1_out_scl_in_in,

	  i2c1_out_scl_out_en,

	  i2c1_out_sda_out,

	  i2c1_out_sda_in_in,

	  i2c1_out_sda_out_en,

	  iocell_io_io7_cell_in_in,

	  iocell_io_io8_cell_in_in,

	  iocell_io_io9_cell_in_in,

	  iocell_io_io10_cell_in_in,

	  iocell_io_io12_cell_in_in,

	  iocell_io_io13_cell_in_in,

	  iocell_io_io16_cell_in_in,

	  iocell_io_io17_cell_in_in,

	  iocell_io_io18_cell_in_in,

	  iocell_io_io19_cell_in_in,

	  iocell_io_io20_cell_in_in,

	  iocell_io_io7_cell_out,

	  iocell_io_io8_cell_out,

	  iocell_io_io9_cell_out,

	  iocell_io_io10_cell_out,

	  iocell_io_io12_cell_out,

	  iocell_io_io13_cell_out,

	  iocell_io_io16_cell_out,

	  iocell_io_io17_cell_out,

	  iocell_io_io18_cell_out,

	  iocell_io_io19_cell_out,

	  iocell_io_io20_cell_out,

	  iocell_io_io7_cell_outen,

	  iocell_io_io8_cell_outen,

	  iocell_io_io9_cell_outen,

	  iocell_io_io10_cell_outen,

	  iocell_io_io12_cell_outen,

	  iocell_io_io13_cell_outen,

	  iocell_io_io16_cell_outen,

	  iocell_io_io17_cell_outen,

	  iocell_io_io18_cell_outen,

	  iocell_io_io19_cell_outen,

	  iocell_io_io20_cell_outen,

	  qspi_io_clk_o,

	  qspi_io_io_out,

	  qspi_io_io_enable,

	  qspi_io_io_in_io_in,

	  qspi_io_ncs_o,

	  wire_tms_tms_in,

	  wire_tdi_tdi_in,

	  wire_tdo,

          gpio_4_in,

          gpio_7_in,

          gpio_8_in,

          gpio_14_in,

          gpio_15_in,

          gpio_4_out,

          gpio_7_out,

          gpio_8_out,

          gpio_14_out,

          gpio_15_out,

          gpio_4_outen,

          gpio_7_outen,

          gpio_8_outen,

          gpio_14_outen,

          gpio_15_outen

`ifndef fpga_synth
	  ,sdram_io_ipad_sdr_din_pad_sdr_din,

	  sdram_io_osdr_dout,

	  sdram_io_osdr_den_n,

	  sdram_io_osdr_cke,

	  sdram_io_osdr_cs_n,

	  sdram_io_osdr_ras_n,

	  sdram_io_osdr_cas_n,

	  sdram_io_osdr_we_n,

	  sdram_io_osdr_dqm,

	  sdram_io_osdr_ba,

	  sdram_io_osdr_addr,

	  CLK_sdram_io_sdram_clk
`endif 
  );

  input test_mode;
  input [1:0] boot_mode;
  input  CLK_tck_clk;
  input  RST_N_trst;
  input  CLK;
  input  RST_N;


  output spi0_io_mosi;


  output spi0_io_sclk;


  output spi0_io_nss;


  input  spi0_io_miso_dat;


  output spi1_io_mosi;


  output spi1_io_sclk;


  output spi1_io_nss;


  input  spi1_io_miso_dat;


  input  uart0_io_SIN;


  output uart0_io_SOUT;


  output i2c0_out_scl_out;


  input  i2c0_out_scl_in_in;


  output i2c0_out_scl_out_en;


  output i2c0_out_sda_out;


  input  i2c0_out_sda_in_in;


  output i2c0_out_sda_out_en;


  output i2c1_out_scl_out;


  input  i2c1_out_scl_in_in;


  output i2c1_out_scl_out_en;


  output i2c1_out_sda_out;


  input  i2c1_out_sda_in_in;


  output i2c1_out_sda_out_en;


  input  iocell_io_io7_cell_in_in;


  input  iocell_io_io8_cell_in_in;


  input  iocell_io_io9_cell_in_in;


  input  iocell_io_io10_cell_in_in;


  input  iocell_io_io12_cell_in_in;


  input  iocell_io_io13_cell_in_in;


  input  iocell_io_io16_cell_in_in;


  input  iocell_io_io17_cell_in_in;


  input  iocell_io_io18_cell_in_in;


  input  iocell_io_io19_cell_in_in;


  input  iocell_io_io20_cell_in_in;


  output iocell_io_io7_cell_out;


  output iocell_io_io8_cell_out;


  output iocell_io_io9_cell_out;


  output iocell_io_io10_cell_out;


  output iocell_io_io12_cell_out;


  output iocell_io_io13_cell_out;


  output iocell_io_io16_cell_out;


  output iocell_io_io17_cell_out;


  output iocell_io_io18_cell_out;


  output iocell_io_io19_cell_out;


  output iocell_io_io20_cell_out;


  output iocell_io_io7_cell_outen;


  output iocell_io_io8_cell_outen;


  output iocell_io_io9_cell_outen;


  output iocell_io_io10_cell_outen;


  output iocell_io_io12_cell_outen;


  output iocell_io_io13_cell_outen;


  output iocell_io_io16_cell_outen;


  output iocell_io_io17_cell_outen;


  output iocell_io_io18_cell_outen;


  output iocell_io_io19_cell_outen;


  output iocell_io_io20_cell_outen;


  output qspi_io_clk_o;


  output [3 : 0] qspi_io_io_out;


  output [3 : 0] qspi_io_io_enable;


  input  [3 : 0] qspi_io_io_in_io_in;


  output qspi_io_ncs_o;


  input  wire_tms_tms_in;


  input  wire_tdi_tdi_in;


  output wire_tdo;


  input  gpio_4_in;


  input  gpio_7_in;


  input  gpio_8_in;


  input  gpio_14_in;


  input  gpio_15_in;


  output gpio_4_out;


  output gpio_7_out;


  output gpio_8_out;


  output gpio_14_out;


  output gpio_15_out;


  output gpio_4_outen;


  output gpio_7_outen;


  output gpio_8_outen;


  output gpio_14_outen;


  output gpio_15_outen;

`ifndef fpga_synth

  input  [31 : 0] sdram_io_ipad_sdr_din_pad_sdr_din;


  output [31 : 0] sdram_io_osdr_dout;


  output [3 : 0] sdram_io_osdr_den_n;


  output sdram_io_osdr_cke;


  output sdram_io_osdr_cs_n;


  output sdram_io_osdr_ras_n;


  output sdram_io_osdr_cas_n;


  output sdram_io_osdr_we_n;


  output [3 : 0] sdram_io_osdr_dqm;


  output [1 : 0] sdram_io_osdr_ba;


  output [12 : 0] sdram_io_osdr_addr;


  output CLK_sdram_io_sdram_clk;


  wire CLK_GATE_sdram_io_sdram_clk;
`endif


  wire bootrom_master_awvalid;


  wire [31 : 0] bootrom_master_awaddr;




  wire [2 : 0] bootrom_master_awprot;


  wire [1 : 0] bootrom_master_awsize;


  wire  bootrom_master_m_awready_awready;


  wire bootrom_master_wvalid;


  wire [31 : 0] bootrom_master_wdata;


  wire [3 : 0] bootrom_master_wstrb;


  wire  bootrom_master_m_wready_wready;


  wire  bootrom_master_m_bvalid_bvalid;
  wire  [1 : 0] bootrom_master_m_bvalid_bresp;


  wire bootrom_master_bready;


  wire bootrom_master_arvalid;


  wire [31 : 0] bootrom_master_araddr;




  wire [2 : 0] bootrom_master_arprot;


  wire [1 : 0] bootrom_master_arsize;


  wire  bootrom_master_m_arready_arready;


  wire  bootrom_master_m_rvalid_rvalid;
  wire  [1 : 0] bootrom_master_m_rvalid_rresp;
  wire  [31 : 0] bootrom_master_m_rvalid_rdata;


  wire bootrom_master_rready;
  reg [31:0] resetpc;





  always@(boot_mode) begin
    case (boot_mode)
      2'b00: resetpc    =  32'h00000010;
      default: resetpc  =  32'h00040200;
    endcase
  end

  mkbootrom bootrom ( .CLK(CLK),
                      .RST_N(RST_N),
		                  .slave_m_awvalid_awvalid    (bootrom_master_awvalid),
		                  .slave_m_awvalid_awaddr     (bootrom_master_awaddr),
		                  .slave_m_awvalid_awsize     (bootrom_master_awsize),
		                  .slave_m_awvalid_awprot     (bootrom_master_awprot),
		                  .slave_awready              (bootrom_master_m_awready_awready),
		                  .slave_m_wvalid_wvalid      (bootrom_master_wvalid),
		                  .slave_m_wvalid_wdata       (bootrom_master_wdata),
		                  .slave_m_wvalid_wstrb       (bootrom_master_wstrb),
		                  .slave_wready               (bootrom_master_m_wready_wready),
		                  .slave_bvalid               (bootrom_master_m_bvalid_bvalid),
		                  .slave_bresp                (bootrom_master_m_bvalid_bresp),
		                  .slave_m_bready_bready      (bootrom_master_bready),
		                  .slave_m_arvalid_arvalid    (bootrom_master_arvalid),
		                  .slave_m_arvalid_araddr     (bootrom_master_araddr),
		                  .slave_m_arvalid_arsize     (bootrom_master_arsize),
		                  .slave_m_arvalid_arprot     (bootrom_master_arprot),
		                  .slave_arready              (bootrom_master_m_arready_arready),
		                  .slave_rvalid               (bootrom_master_m_rvalid_rvalid),
		                  .slave_rresp                (bootrom_master_m_rvalid_rresp),
		                  .slave_rdata                (bootrom_master_m_rvalid_rdata),
		                  .slave_m_rready_rready      (bootrom_master_rready)    );

  mkSoc soc ( .resetpc                        (resetpc                        ),
              .spi0_io_mosi                   (spi0_io_mosi                   ),
              .spi0_io_sclk                   (spi0_io_sclk                   ),
              .spi0_io_nss                    (spi0_io_nss                    ),
              .spi1_io_mosi                   (spi1_io_mosi                   ),
              .spi1_io_sclk                   (spi1_io_sclk                   ),
              .spi1_io_nss                    (spi1_io_nss                    ),
              .uart0_io_SOUT                  (uart0_io_SOUT                  ),
              .i2c0_out_scl_out                (i2c0_out_scl_out                ),
              .i2c0_out_scl_out_en             (i2c0_out_scl_out_en             ),
              .i2c0_out_sda_out                (i2c0_out_sda_out                ),
              .i2c0_out_sda_out_en             (i2c0_out_sda_out_en             ),
              .i2c1_out_scl_out                (i2c1_out_scl_out                ),
              .i2c1_out_scl_out_en             (i2c1_out_scl_out_en             ),
              .i2c1_out_sda_out                (i2c1_out_sda_out                ),
              .i2c1_out_sda_out_en             (i2c1_out_sda_out_en             ),
              .iocell_io_io7_cell_out         (iocell_io_io7_cell_out         ),
              .iocell_io_io8_cell_out         (iocell_io_io8_cell_out         ),
              .iocell_io_io9_cell_out         (iocell_io_io9_cell_out         ),
              .iocell_io_io10_cell_out        (iocell_io_io10_cell_out        ),
              .iocell_io_io12_cell_out        (iocell_io_io12_cell_out        ),
              .iocell_io_io13_cell_out        (iocell_io_io13_cell_out        ),
              .iocell_io_io16_cell_out        (iocell_io_io16_cell_out        ),
              .iocell_io_io17_cell_out        (iocell_io_io17_cell_out        ),
              .iocell_io_io18_cell_out        (iocell_io_io18_cell_out        ),
              .iocell_io_io19_cell_out        (iocell_io_io19_cell_out        ),
              .iocell_io_io20_cell_out        (iocell_io_io20_cell_out        ),
              .iocell_io_io7_cell_outen       (iocell_io_io7_cell_outen       ),
              .iocell_io_io8_cell_outen       (iocell_io_io8_cell_outen       ),
              .iocell_io_io9_cell_outen       (iocell_io_io9_cell_outen       ),
              .iocell_io_io10_cell_outen      (iocell_io_io10_cell_outen      ),
              .iocell_io_io12_cell_outen      (iocell_io_io12_cell_outen      ),
              .iocell_io_io13_cell_outen      (iocell_io_io13_cell_outen      ),
              .iocell_io_io16_cell_outen      (iocell_io_io16_cell_outen      ),
              .iocell_io_io17_cell_outen      (iocell_io_io17_cell_outen      ),
              .iocell_io_io18_cell_outen      (iocell_io_io18_cell_outen      ),
              .iocell_io_io19_cell_outen      (iocell_io_io19_cell_outen      ),
              .iocell_io_io20_cell_outen      (iocell_io_io20_cell_outen      ),
              .qspi_io_clk_o                  (qspi_io_clk_o                  ),
              .qspi_io_io_o                   (qspi_io_io_out                 ),
              .qspi_io_io_enable              (qspi_io_io_enable              ),
              .qspi_io_ncs_o                  (qspi_io_ncs_o                  ),
              .wire_tdo                       (wire_tdo                       ),
	            .gpio_4_out		                  (gpio_4_out		      ),
	            .gpio_7_out		                  (gpio_7_out		      ),
	            .gpio_8_out		                  (gpio_8_out		      ),
	            .gpio_14_out		                (gpio_14_out		      ),
	            .gpio_15_out		                (gpio_15_out		      ),
	            .gpio_4_outen		                (gpio_4_outen		      ),
	            .gpio_7_outen		                (gpio_7_outen		      ),
	            .gpio_8_outen		                (gpio_8_outen		      ),
	            .gpio_14_outen		              (gpio_14_outen		      ),
	            .gpio_15_outen		              (gpio_15_outen		      ),
            `ifndef fpga_synth
              .sdram_io_osdr_dout             (sdram_io_osdr_dout             ),
              .sdram_io_osdr_den_n            (sdram_io_osdr_den_n            ),
              .sdram_io_osdr_cke              (sdram_io_osdr_cke              ),
              .sdram_io_osdr_cs_n             (sdram_io_osdr_cs_n             ),
              .sdram_io_osdr_ras_n            (sdram_io_osdr_ras_n            ),
              .sdram_io_osdr_cas_n            (sdram_io_osdr_cas_n            ),
              .sdram_io_osdr_we_n             (sdram_io_osdr_we_n             ),
              .sdram_io_osdr_dqm              (sdram_io_osdr_dqm              ),
              .sdram_io_osdr_ba               (sdram_io_osdr_ba               ),
              .sdram_io_osdr_addr             (sdram_io_osdr_addr             ),
              .CLK_sdram_io_sdram_clk         (CLK_sdram_io_sdram_clk         ),
              .CLK_GATE_sdram_io_sdram_clk    (CLK_GATE_sdram_io_sdram_clk    ),
              .sdram_io_ipad_sdr_din_pad_sdr_din  (sdram_io_ipad_sdr_din_pad_sdr_din),
            `endif
              .CLK_tck_clk                    (CLK_tck_clk                    ),
              .RST_N_trst                     (RST_N_trst                     ),
              .CLK                            (CLK                            ),
              .RST_N                          (RST_N                          ),
              .spi0_io_miso_dat               (spi0_io_miso_dat               ),
              .spi1_io_miso_dat               (spi1_io_miso_dat               ),
              .uart0_io_SIN                   (uart0_io_SIN                   ),
              .i2c0_out_scl_in_in              (i2c0_out_scl_in_in              ),
              .i2c0_out_sda_in_in              (i2c0_out_sda_in_in              ),
              .i2c1_out_scl_in_in              (i2c1_out_scl_in_in              ),
              .i2c1_out_sda_in_in              (i2c1_out_sda_in_in              ),
              .iocell_io_io7_cell_in_in       (iocell_io_io7_cell_in_in       ),
              .iocell_io_io8_cell_in_in       (iocell_io_io8_cell_in_in       ),
              .iocell_io_io9_cell_in_in       (iocell_io_io9_cell_in_in       ),
              .iocell_io_io10_cell_in_in      (iocell_io_io10_cell_in_in      ),
              .iocell_io_io12_cell_in_in      (iocell_io_io12_cell_in_in      ),
              .iocell_io_io13_cell_in_in      (iocell_io_io13_cell_in_in      ),
              .iocell_io_io16_cell_in_in      (iocell_io_io16_cell_in_in      ),
              .iocell_io_io17_cell_in_in      (iocell_io_io17_cell_in_in      ),
              .iocell_io_io18_cell_in_in      (iocell_io_io18_cell_in_in      ),
              .iocell_io_io19_cell_in_in      (iocell_io_io19_cell_in_in      ),
              .iocell_io_io20_cell_in_in      (iocell_io_io20_cell_in_in      ),
              .qspi_io_io_i_io_i              (qspi_io_io_in_io_in            ),
              .wire_tms_tms_in                (wire_tms_tms_in                ),
              .wire_tdi_tdi_in                (wire_tdi_tdi_in                ),
	            .gpio_4_in 		                  (gpio_4_in 		      ),
	            .gpio_7_in 		                  (gpio_7_in 		      ),
	            .gpio_8_in 		                  (gpio_8_in 		      ),
	            .gpio_14_in 		                (gpio_14_in 		      ),
	            .gpio_15_in 		                (gpio_15_in 		      ),
	            .bootrom_master_awvalid             (bootrom_master_awvalid),
	            .bootrom_master_awaddr              (bootrom_master_awaddr),
	            .bootrom_master_awprot              (bootrom_master_awprot),
	            .bootrom_master_awsize              (bootrom_master_awsize),
	            .bootrom_master_m_awready_awready   (bootrom_master_m_awready_awready),
	            .bootrom_master_wvalid              (bootrom_master_wvalid),
	            .bootrom_master_wdata               (bootrom_master_wdata),
	            .bootrom_master_wstrb               (bootrom_master_wstrb),
	            .bootrom_master_m_wready_wready     (bootrom_master_m_wready_wready),
	            .bootrom_master_m_bvalid_bvalid     (bootrom_master_m_bvalid_bvalid),
	            .bootrom_master_m_bvalid_bresp      (bootrom_master_m_bvalid_bresp),
	            .bootrom_master_bready              (bootrom_master_bready),
	            .bootrom_master_arvalid             (bootrom_master_arvalid),
	            .bootrom_master_araddr              (bootrom_master_araddr),
	            .bootrom_master_arprot              (bootrom_master_arprot),
	            .bootrom_master_arsize              (bootrom_master_arsize),
	            .bootrom_master_m_arready_arready   (bootrom_master_m_arready_arready),
	            .bootrom_master_m_rvalid_rvalid     (bootrom_master_m_rvalid_rvalid),
	            .bootrom_master_m_rvalid_rresp      (bootrom_master_m_rvalid_rresp),
	            .bootrom_master_m_rvalid_rdata      (bootrom_master_m_rvalid_rdata),
	            .bootrom_master_rready              (bootrom_master_rready)    );

endmodule
module aardonyx(
    test_mode,
    boot_mode,
	  CLK_tck_clk,
	  RST_N_trst,
	  CLK,
	  RST_N,

	  spi0_io_mosi,

	  spi0_io_sclk,

	  spi0_io_nss,

	  spi0_io_miso_dat,

	  spi1_io_mosi,

	  spi1_io_sclk,

	  spi1_io_nss,

	  spi1_io_miso_dat,

	  uart0_io_SIN,

	  uart0_io_SOUT,

	  i2c0_out_scl_out,

	  i2c0_out_scl_in_in,

	  i2c0_out_scl_out_en,

	  i2c0_out_sda_out,

	  i2c0_out_sda_in_in,

	  i2c0_out_sda_out_en,

	  i2c1_out_scl_out,

	  i2c1_out_scl_in_in,

	  i2c1_out_scl_out_en,

	  i2c1_out_sda_out,

	  i2c1_out_sda_in_in,

	  i2c1_out_sda_out_en,

	  iocell_io_io7_cell_in_in,

	  iocell_io_io8_cell_in_in,

	  iocell_io_io9_cell_in_in,

	  iocell_io_io10_cell_in_in,

	  iocell_io_io12_cell_in_in,

	  iocell_io_io13_cell_in_in,

	  iocell_io_io16_cell_in_in,

	  iocell_io_io17_cell_in_in,

	  iocell_io_io18_cell_in_in,

	  iocell_io_io19_cell_in_in,

	  iocell_io_io20_cell_in_in,

	  iocell_io_io7_cell_out,

	  iocell_io_io8_cell_out,

	  iocell_io_io9_cell_out,

	  iocell_io_io10_cell_out,

	  iocell_io_io12_cell_out,

	  iocell_io_io13_cell_out,

	  iocell_io_io16_cell_out,

	  iocell_io_io17_cell_out,

	  iocell_io_io18_cell_out,

	  iocell_io_io19_cell_out,

	  iocell_io_io20_cell_out,

	  iocell_io_io7_cell_outen,

	  iocell_io_io8_cell_outen,

	  iocell_io_io9_cell_outen,

	  iocell_io_io10_cell_outen,

	  iocell_io_io12_cell_outen,

	  iocell_io_io13_cell_outen,

	  iocell_io_io16_cell_outen,

	  iocell_io_io17_cell_outen,

	  iocell_io_io18_cell_outen,

	  iocell_io_io19_cell_outen,

	  iocell_io_io20_cell_outen,

	  qspi_io_clk_o,

	  qspi_io_io_out,

	  qspi_io_io_enable,

	  qspi_io_io_in_io_in,

	  qspi_io_ncs_o,

	  wire_tms_tms_in,

	  wire_tdi_tdi_in,

	  wire_tdo,

          gpio_4_in,

          gpio_7_in,

          gpio_8_in,

          gpio_14_in,

          gpio_15_in,

          gpio_4_out,

          gpio_7_out,

          gpio_8_out,

          gpio_14_out,

          gpio_15_out,

          gpio_4_outen,

          gpio_7_outen,

          gpio_8_outen,

          gpio_14_outen,

          gpio_15_outen

`ifndef fpga_synth
	  ,sdram_io_ipad_sdr_din_pad_sdr_din,

	  sdram_io_osdr_dout,

	  sdram_io_osdr_den_n,

	  sdram_io_osdr_cke,

	  sdram_io_osdr_cs_n,

	  sdram_io_osdr_ras_n,

	  sdram_io_osdr_cas_n,

	  sdram_io_osdr_we_n,

	  sdram_io_osdr_dqm,

	  sdram_io_osdr_ba,

	  sdram_io_osdr_addr,

	  CLK_sdram_io_sdram_clk
`endif 
  );


  input test_mode;
  input [1:0] boot_mode;
  input  CLK_tck_clk;
  input  RST_N_trst;
  input  CLK;
  input  RST_N;


  output spi0_io_mosi;


  output spi0_io_sclk;


  output spi0_io_nss;


  input  spi0_io_miso_dat;


  output spi1_io_mosi;


  output spi1_io_sclk;


  output spi1_io_nss;


  input  spi1_io_miso_dat;


  input  uart0_io_SIN;


  output uart0_io_SOUT;


  output i2c0_out_scl_out;


  input  i2c0_out_scl_in_in;


  output i2c0_out_scl_out_en;


  output i2c0_out_sda_out;


  input  i2c0_out_sda_in_in;


  output i2c0_out_sda_out_en;


  output i2c1_out_scl_out;


  input  i2c1_out_scl_in_in;


  output i2c1_out_scl_out_en;


  output i2c1_out_sda_out;


  input  i2c1_out_sda_in_in;


  output i2c1_out_sda_out_en;


  input  iocell_io_io7_cell_in_in;


  input  iocell_io_io8_cell_in_in;


  input  iocell_io_io9_cell_in_in;


  input  iocell_io_io10_cell_in_in;


  input  iocell_io_io12_cell_in_in;


  input  iocell_io_io13_cell_in_in;


  input  iocell_io_io16_cell_in_in;


  input  iocell_io_io17_cell_in_in;


  input  iocell_io_io18_cell_in_in;


  input  iocell_io_io19_cell_in_in;


  input  iocell_io_io20_cell_in_in;


  output iocell_io_io7_cell_out;


  output iocell_io_io8_cell_out;


  output iocell_io_io9_cell_out;


  output iocell_io_io10_cell_out;


  output iocell_io_io12_cell_out;


  output iocell_io_io13_cell_out;


  output iocell_io_io16_cell_out;


  output iocell_io_io17_cell_out;


  output iocell_io_io18_cell_out;


  output iocell_io_io19_cell_out;


  output iocell_io_io20_cell_out;


  output iocell_io_io7_cell_outen;


  output iocell_io_io8_cell_outen;


  output iocell_io_io9_cell_outen;


  output iocell_io_io10_cell_outen;


  output iocell_io_io12_cell_outen;


  output iocell_io_io13_cell_outen;


  output iocell_io_io16_cell_outen;


  output iocell_io_io17_cell_outen;


  output iocell_io_io18_cell_outen;


  output iocell_io_io19_cell_outen;


  output iocell_io_io20_cell_outen;


  output qspi_io_clk_o;


  output [3 : 0] qspi_io_io_out;


  output [3 : 0] qspi_io_io_enable;


  input  [3 : 0] qspi_io_io_in_io_in;


  output qspi_io_ncs_o;


  input  wire_tms_tms_in;


  input  wire_tdi_tdi_in;


  output wire_tdo;


  input  gpio_4_in;


  input  gpio_7_in;


  input  gpio_8_in;


  input  gpio_14_in;


  input  gpio_15_in;


  output gpio_4_out;


  output gpio_7_out;


  output gpio_8_out;


  output gpio_14_out;


  output gpio_15_out;


  output gpio_4_outen;


  output gpio_7_outen;


  output gpio_8_outen;


  output gpio_14_outen;


  output gpio_15_outen;

`ifndef fpga_synth

  input  [31 : 0] sdram_io_ipad_sdr_din_pad_sdr_din;


  output [31 : 0] sdram_io_osdr_dout;


  output [3 : 0] sdram_io_osdr_den_n;


  output sdram_io_osdr_cke;


  output sdram_io_osdr_cs_n;


  output sdram_io_osdr_ras_n;


  output sdram_io_osdr_cas_n;


  output sdram_io_osdr_we_n;


  output [3 : 0] sdram_io_osdr_dqm;


  output [1 : 0] sdram_io_osdr_ba;


  output [12 : 0] sdram_io_osdr_addr;


  output CLK_sdram_io_sdram_clk;


  wire CLK_GATE_sdram_io_sdram_clk;
`endif


  wire bootrom_master_awvalid;


  wire [31 : 0] bootrom_master_awaddr;




  wire [2 : 0] bootrom_master_awprot;


  wire [1 : 0] bootrom_master_awsize;


  wire  bootrom_master_m_awready_awready;


  wire bootrom_master_wvalid;


  wire [31 : 0] bootrom_master_wdata;


  wire [3 : 0] bootrom_master_wstrb;


  wire  bootrom_master_m_wready_wready;


  wire  bootrom_master_m_bvalid_bvalid;
  wire  [1 : 0] bootrom_master_m_bvalid_bresp;


  wire bootrom_master_bready;


  wire bootrom_master_arvalid;


  wire [31 : 0] bootrom_master_araddr;




  wire [2 : 0] bootrom_master_arprot;


  wire [1 : 0] bootrom_master_arsize;


  wire  bootrom_master_m_arready_arready;


  wire  bootrom_master_m_rvalid_rvalid;
  wire  [1 : 0] bootrom_master_m_rvalid_rresp;
  wire  [31 : 0] bootrom_master_m_rvalid_rdata;


  wire bootrom_master_rready;
  reg [31:0] resetpc;





  always@(boot_mode) begin
    case (boot_mode)
      2'b00: resetpc    =  32'h00000010;
      default: resetpc  =  32'h00040200;
    endcase
  end

  mkbootrom bootrom ( .CLK(CLK),
                      .RST_N(RST_N),
		                  .slave_m_awvalid_awvalid    (bootrom_master_awvalid),
		                  .slave_m_awvalid_awaddr     (bootrom_master_awaddr),
		                  .slave_m_awvalid_awsize     (bootrom_master_awsize),
		                  .slave_m_awvalid_awprot     (bootrom_master_awprot),
		                  .slave_awready              (bootrom_master_m_awready_awready),
		                  .slave_m_wvalid_wvalid      (bootrom_master_wvalid),
		                  .slave_m_wvalid_wdata       (bootrom_master_wdata),
		                  .slave_m_wvalid_wstrb       (bootrom_master_wstrb),
		                  .slave_wready               (bootrom_master_m_wready_wready),
		                  .slave_bvalid               (bootrom_master_m_bvalid_bvalid),
		                  .slave_bresp                (bootrom_master_m_bvalid_bresp),
		                  .slave_m_bready_bready      (bootrom_master_bready),
		                  .slave_m_arvalid_arvalid    (bootrom_master_arvalid),
		                  .slave_m_arvalid_araddr     (bootrom_master_araddr),
		                  .slave_m_arvalid_arsize     (bootrom_master_arsize),
		                  .slave_m_arvalid_arprot     (bootrom_master_arprot),
		                  .slave_arready              (bootrom_master_m_arready_arready),
		                  .slave_rvalid               (bootrom_master_m_rvalid_rvalid),
		                  .slave_rresp                (bootrom_master_m_rvalid_rresp),
		                  .slave_rdata                (bootrom_master_m_rvalid_rdata),
		                  .slave_m_rready_rready      (bootrom_master_rready)    );

  mkSoc soc ( .resetpc                        (resetpc                        ),
              .spi0_io_mosi                   (spi0_io_mosi                   ),
              .spi0_io_sclk                   (spi0_io_sclk                   ),
              .spi0_io_nss                    (spi0_io_nss                    ),
              .spi1_io_mosi                   (spi1_io_mosi                   ),
              .spi1_io_sclk                   (spi1_io_sclk                   ),
              .spi1_io_nss                    (spi1_io_nss                    ),
              .uart0_io_SOUT                  (uart0_io_SOUT                  ),
              .i2c0_out_scl_out                (i2c0_out_scl_out                ),
              .i2c0_out_scl_out_en             (i2c0_out_scl_out_en             ),
              .i2c0_out_sda_out                (i2c0_out_sda_out                ),
              .i2c0_out_sda_out_en             (i2c0_out_sda_out_en             ),
              .i2c1_out_scl_out                (i2c1_out_scl_out                ),
              .i2c1_out_scl_out_en             (i2c1_out_scl_out_en             ),
              .i2c1_out_sda_out                (i2c1_out_sda_out                ),
              .i2c1_out_sda_out_en             (i2c1_out_sda_out_en             ),
              .iocell_io_io7_cell_out         (iocell_io_io7_cell_out         ),
              .iocell_io_io8_cell_out         (iocell_io_io8_cell_out         ),
              .iocell_io_io9_cell_out         (iocell_io_io9_cell_out         ),
              .iocell_io_io10_cell_out        (iocell_io_io10_cell_out        ),
              .iocell_io_io12_cell_out        (iocell_io_io12_cell_out        ),
              .iocell_io_io13_cell_out        (iocell_io_io13_cell_out        ),
              .iocell_io_io16_cell_out        (iocell_io_io16_cell_out        ),
              .iocell_io_io17_cell_out        (iocell_io_io17_cell_out        ),
              .iocell_io_io18_cell_out        (iocell_io_io18_cell_out        ),
              .iocell_io_io19_cell_out        (iocell_io_io19_cell_out        ),
              .iocell_io_io20_cell_out        (iocell_io_io20_cell_out        ),
              .iocell_io_io7_cell_outen       (iocell_io_io7_cell_outen       ),
              .iocell_io_io8_cell_outen       (iocell_io_io8_cell_outen       ),
              .iocell_io_io9_cell_outen       (iocell_io_io9_cell_outen       ),
              .iocell_io_io10_cell_outen      (iocell_io_io10_cell_outen      ),
              .iocell_io_io12_cell_outen      (iocell_io_io12_cell_outen      ),
              .iocell_io_io13_cell_outen      (iocell_io_io13_cell_outen      ),
              .iocell_io_io16_cell_outen      (iocell_io_io16_cell_outen      ),
              .iocell_io_io17_cell_outen      (iocell_io_io17_cell_outen      ),
              .iocell_io_io18_cell_outen      (iocell_io_io18_cell_outen      ),
              .iocell_io_io19_cell_outen      (iocell_io_io19_cell_outen      ),
              .iocell_io_io20_cell_outen      (iocell_io_io20_cell_outen      ),
              .qspi_io_clk_o                  (qspi_io_clk_o                  ),
              .qspi_io_io_o                   (qspi_io_io_out                 ),
              .qspi_io_io_enable              (qspi_io_io_enable              ),
              .qspi_io_ncs_o                  (qspi_io_ncs_o                  ),
              .wire_tdo                       (wire_tdo                       ),
	            .gpio_4_out		                  (gpio_4_out		      ),
	            .gpio_7_out		                  (gpio_7_out		      ),
	            .gpio_8_out		                  (gpio_8_out		      ),
	            .gpio_14_out		                (gpio_14_out		      ),
	            .gpio_15_out		                (gpio_15_out		      ),
	            .gpio_4_outen		                (gpio_4_outen		      ),
	            .gpio_7_outen		                (gpio_7_outen		      ),
	            .gpio_8_outen		                (gpio_8_outen		      ),
	            .gpio_14_outen		              (gpio_14_outen		      ),
	            .gpio_15_outen		              (gpio_15_outen		      ),
            `ifndef fpga_synth
              .sdram_io_osdr_dout             (sdram_io_osdr_dout             ),
              .sdram_io_osdr_den_n            (sdram_io_osdr_den_n            ),
              .sdram_io_osdr_cke              (sdram_io_osdr_cke              ),
              .sdram_io_osdr_cs_n             (sdram_io_osdr_cs_n             ),
              .sdram_io_osdr_ras_n            (sdram_io_osdr_ras_n            ),
              .sdram_io_osdr_cas_n            (sdram_io_osdr_cas_n            ),
              .sdram_io_osdr_we_n             (sdram_io_osdr_we_n             ),
              .sdram_io_osdr_dqm              (sdram_io_osdr_dqm              ),
              .sdram_io_osdr_ba               (sdram_io_osdr_ba               ),
              .sdram_io_osdr_addr             (sdram_io_osdr_addr             ),
              .CLK_sdram_io_sdram_clk         (CLK_sdram_io_sdram_clk         ),
              .CLK_GATE_sdram_io_sdram_clk    (CLK_GATE_sdram_io_sdram_clk    ),
              .sdram_io_ipad_sdr_din_pad_sdr_din  (sdram_io_ipad_sdr_din_pad_sdr_din),
            `endif
              .CLK_tck_clk                    (CLK_tck_clk                    ),
              .RST_N_trst                     (RST_N_trst                     ),
              .CLK                            (CLK                            ),
              .RST_N                          (RST_N                          ),
              .spi0_io_miso_dat               (spi0_io_miso_dat               ),
              .spi1_io_miso_dat               (spi1_io_miso_dat               ),
              .uart0_io_SIN                   (uart0_io_SIN                   ),
              .i2c0_out_scl_in_in              (i2c0_out_scl_in_in              ),
              .i2c0_out_sda_in_in              (i2c0_out_sda_in_in              ),
              .i2c1_out_scl_in_in              (i2c1_out_scl_in_in              ),
              .i2c1_out_sda_in_in              (i2c1_out_sda_in_in              ),
              .iocell_io_io7_cell_in_in       (iocell_io_io7_cell_in_in       ),
              .iocell_io_io8_cell_in_in       (iocell_io_io8_cell_in_in       ),
              .iocell_io_io9_cell_in_in       (iocell_io_io9_cell_in_in       ),
              .iocell_io_io10_cell_in_in      (iocell_io_io10_cell_in_in      ),
              .iocell_io_io12_cell_in_in      (iocell_io_io12_cell_in_in      ),
              .iocell_io_io13_cell_in_in      (iocell_io_io13_cell_in_in      ),
              .iocell_io_io16_cell_in_in      (iocell_io_io16_cell_in_in      ),
              .iocell_io_io17_cell_in_in      (iocell_io_io17_cell_in_in      ),
              .iocell_io_io18_cell_in_in      (iocell_io_io18_cell_in_in      ),
              .iocell_io_io19_cell_in_in      (iocell_io_io19_cell_in_in      ),
              .iocell_io_io20_cell_in_in      (iocell_io_io20_cell_in_in      ),
              .qspi_io_io_i_io_i              (qspi_io_io_in_io_in            ),
              .wire_tms_tms_in                (wire_tms_tms_in                ),
              .wire_tdi_tdi_in                (wire_tdi_tdi_in                ),
	            .gpio_4_in 		                  (gpio_4_in 		      ),
	            .gpio_7_in 		                  (gpio_7_in 		      ),
	            .gpio_8_in 		                  (gpio_8_in 		      ),
	            .gpio_14_in 		                (gpio_14_in 		      ),
	            .gpio_15_in 		                (gpio_15_in 		      ),
	            .bootrom_master_awvalid             (bootrom_master_awvalid),
	            .bootrom_master_awaddr              (bootrom_master_awaddr),
	            .bootrom_master_awprot              (bootrom_master_awprot),
	            .bootrom_master_awsize              (bootrom_master_awsize),
	            .bootrom_master_m_awready_awready   (bootrom_master_m_awready_awready),
	            .bootrom_master_wvalid              (bootrom_master_wvalid),
	            .bootrom_master_wdata               (bootrom_master_wdata),
	            .bootrom_master_wstrb               (bootrom_master_wstrb),
	            .bootrom_master_m_wready_wready     (bootrom_master_m_wready_wready),
	            .bootrom_master_m_bvalid_bvalid     (bootrom_master_m_bvalid_bvalid),
	            .bootrom_master_m_bvalid_bresp      (bootrom_master_m_bvalid_bresp),
	            .bootrom_master_bready              (bootrom_master_bready),
	            .bootrom_master_arvalid             (bootrom_master_arvalid),
	            .bootrom_master_araddr              (bootrom_master_araddr),
	            .bootrom_master_arprot              (bootrom_master_arprot),
	            .bootrom_master_arsize              (bootrom_master_arsize),
	            .bootrom_master_m_arready_arready   (bootrom_master_m_arready_arready),
	            .bootrom_master_m_rvalid_rvalid     (bootrom_master_m_rvalid_rvalid),
	            .bootrom_master_m_rvalid_rresp      (bootrom_master_m_rvalid_rresp),
	            .bootrom_master_m_rvalid_rdata      (bootrom_master_m_rvalid_rdata),
	            .bootrom_master_rready              (bootrom_master_rready)    );

endmodule