data/full_repos/permissive/418753087/E902_RTL_FACTORY/gen_rtl/had/rtl/cr_had_inst_bkpt_lite.v
data/verilator_xmls/80219356-647d-4874-93f2-3ad6c4b7a502.xml
module cr_had_inst_bkpt_lite(
  bkpt_ctrl_inst_fetch_dbq_req,
  bkpt_ctrl_req,
  had_core_dbg_mode_req,
  ifu_had_fetch_expt_vld,
  ifu_had_inst_dbg_disable,
  ifu_had_match_pc,
  ifu_had_split_first,
  iu_yy_xx_dbgon,
  regs_bkpt_base,
  regs_bkpt_en
);


input           had_core_dbg_mode_req;       
input           ifu_had_fetch_expt_vld;      
input           ifu_had_inst_dbg_disable;    
input   [31:0]  ifu_had_match_pc;            
input           ifu_had_split_first;         
input           iu_yy_xx_dbgon;              
input   [31:0]  regs_bkpt_base;              
input           regs_bkpt_en;                
output          bkpt_ctrl_inst_fetch_dbq_req; 
output          bkpt_ctrl_req;               




wire            bkpt_ctrl_inst_fetch_dbq_req; 
wire            bkpt_ctrl_req;               
wire            bkpt_en;                     
wire            had_core_dbg_mode_req;       
wire            ifu_had_fetch_expt_vld;      
wire            ifu_had_inst_dbg_disable;    
wire    [31:0]  ifu_had_match_pc;            
wire            ifu_had_split_first;         
wire            inst_addr_match;             
wire            inst_bkpt_occur;             
wire            inst_bkpt_vld;               
wire            iu_yy_xx_dbgon;              
wire    [31:0]  regs_bkpt_base;              
wire            regs_bkpt_en;                


assign bkpt_en = regs_bkpt_en;










assign inst_addr_match = (ifu_had_match_pc[31:0] == regs_bkpt_base[31:0]);                             

assign inst_bkpt_occur = inst_addr_match
                         && !ifu_had_fetch_expt_vld
                         && !ifu_had_inst_dbg_disable
                         && ifu_had_split_first
                         && !iu_yy_xx_dbgon
                         && !had_core_dbg_mode_req;
                             

assign inst_bkpt_vld = bkpt_en ? inst_bkpt_occur : 1'b0;






assign bkpt_ctrl_inst_fetch_dbq_req = inst_bkpt_vld;

assign bkpt_ctrl_req = 1'b0;



























endmodule
module cr_had_inst_bkpt_lite(
  bkpt_ctrl_inst_fetch_dbq_req,
  bkpt_ctrl_req,
  had_core_dbg_mode_req,
  ifu_had_fetch_expt_vld,
  ifu_had_inst_dbg_disable,
  ifu_had_match_pc,
  ifu_had_split_first,
  iu_yy_xx_dbgon,
  regs_bkpt_base,
  regs_bkpt_en
);



input           had_core_dbg_mode_req;       
input           ifu_had_fetch_expt_vld;      
input           ifu_had_inst_dbg_disable;    
input   [31:0]  ifu_had_match_pc;            
input           ifu_had_split_first;         
input           iu_yy_xx_dbgon;              
input   [31:0]  regs_bkpt_base;              
input           regs_bkpt_en;                
output          bkpt_ctrl_inst_fetch_dbq_req; 
output          bkpt_ctrl_req;               




wire            bkpt_ctrl_inst_fetch_dbq_req; 
wire            bkpt_ctrl_req;               
wire            bkpt_en;                     
wire            had_core_dbg_mode_req;       
wire            ifu_had_fetch_expt_vld;      
wire            ifu_had_inst_dbg_disable;    
wire    [31:0]  ifu_had_match_pc;            
wire            ifu_had_split_first;         
wire            inst_addr_match;             
wire            inst_bkpt_occur;             
wire            inst_bkpt_vld;               
wire            iu_yy_xx_dbgon;              
wire    [31:0]  regs_bkpt_base;              
wire            regs_bkpt_en;                


assign bkpt_en = regs_bkpt_en;










assign inst_addr_match = (ifu_had_match_pc[31:0] == regs_bkpt_base[31:0]);                             

assign inst_bkpt_occur = inst_addr_match
                         && !ifu_had_fetch_expt_vld
                         && !ifu_had_inst_dbg_disable
                         && ifu_had_split_first
                         && !iu_yy_xx_dbgon
                         && !had_core_dbg_mode_req;
                             

assign inst_bkpt_vld = bkpt_en ? inst_bkpt_occur : 1'b0;






assign bkpt_ctrl_inst_fetch_dbq_req = inst_bkpt_vld;

assign bkpt_ctrl_req = 1'b0;



























endmodule