data/full_repos/permissive/524307278/datapath/ext.v
1: b"%Error: data/full_repos/permissive/524307278/datapath/ext.v:16: syntax error, unexpected ',', expecting '}'\n            SIGN: imm32 = {{16{imm16[15]}, imm16}};\n                                         ^\n%Error: data/full_repos/permissive/524307278/datapath/ext.v:30: syntax error, unexpected endmodule\nendmodule\n^~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module ext(imm16, imm32, ExtOp);
    
    input [15:0] imm16;
    input [1:0] ExtOp;

    output reg[31:0] imm32;


    parameter ZERO = 2'b00;
    parameter SIGN = 2'b01;


    always@(*) begin
        case(ExtOp)
            ZERO: imm32 = {16'b0, imm16};
            SIGN: imm32 = {{16{imm16[15]}, imm16}};
        endcase
    end

endmodule
module ext(imm16, imm32, ExtOp);

    
    input [15:0] imm16;
    input [1:0] ExtOp;

    output reg[31:0] imm32;


    parameter ZERO = 2'b00;
    parameter SIGN = 2'b01;


    always@(*) begin
        case(ExtOp)
            ZERO: imm32 = {16'b0, imm16};
            SIGN: imm32 = {{16{imm16[15]}, imm16}};
        endcase
    end

endmodule