data/full_repos/permissive/529698244/ai_accel.v
1: b'%Error: data/full_repos/permissive/529698244/ai_accel.v:320: syntax error, unexpected var, expecting IDENTIFIER\n  variance var(.a({a_out_1[7:0], a_out_2[7:0], a_out_3[7:0], a_out_4[7:0]}),\n           ^~~\n%Error: Exiting due to 1 error(s)\n'
module adder
(
	a, b, c, d
);

	input [31:0] a;
	input [31:0] b;
	input [31:0] c;
	output [31:0] d;
	
	wire [15:0] e;
	
	assign e = a[31:24] + b[31:24] + c[31:24]
				+ a[23:16] + b[23:16] + c[23:16]
				+ a[15:8]  + b[15:8]  + c[15:8];
	
	assign d = e > 8'hff ? 8'hff : e[7:0]; 

endmodule
module adder
(
	a, b, c, d
);


	input [31:0] a;
	input [31:0] b;
	input [31:0] c;
	output [31:0] d;
	
	wire [15:0] e;
	
	assign e = a[31:24] + b[31:24] + c[31:24]
				+ a[23:16] + b[23:16] + c[23:16]
				+ a[15:8]  + b[15:8]  + c[15:8];
	
	assign d = e > 8'hff ? 8'hff : e[7:0]; 

endmodule