data/full_repos/permissive/488739248/rtl/ym3526/jtopl2.v
1: b"%Error: data/full_repos/permissive/488739248/rtl/ym3526/jtopl2.v:38: Cannot find file containing module: 'jtopl'\n    jtopl #(.OPL_TYPE(2)) u_base(\n    ^~~~~\n        ... Looked in:\n             data/full_repos/permissive/488739248/rtl/ym3526,data/full_repos/permissive/488739248/jtopl\n             data/full_repos/permissive/488739248/rtl/ym3526,data/full_repos/permissive/488739248/jtopl.v\n             data/full_repos/permissive/488739248/rtl/ym3526,data/full_repos/permissive/488739248/jtopl.sv\n             jtopl\n             jtopl.v\n             jtopl.sv\n             obj_dir/jtopl\n             obj_dir/jtopl.v\n             obj_dir/jtopl.sv\n%Error: Exiting due to 1 error(s)\n"
module jtopl2(
    input  wire                rst,
    input  wire                clk,
    input  wire                cen,
    input  wire         [ 7:0] din,
    input  wire                addr,
    input  wire                cs_n,
    input  wire                wr_n,
    output wire         [ 7:0] dout,
    output wire                irq_n,

    output wire signed  [15:0] snd,
    output wire                sample
);

    `define JTOPL2
    jtopl #(.OPL_TYPE(2)) u_base(
        .rst    ( rst       ),
        .clk    ( clk       ),
        .cen    ( cen       ),
        .din    ( din       ),
        .addr   ( addr      ),
        .cs_n   ( cs_n      ),
        .wr_n   ( wr_n      ),
        .dout   ( dout      ),
        .irq_n  ( irq_n     ),
        .snd    ( snd       ),
        .sample ( sample    )
    );

endmodule
module jtopl2(
    input  wire                rst,
    input  wire                clk,
    input  wire                cen,
    input  wire         [ 7:0] din,
    input  wire                addr,
    input  wire                cs_n,
    input  wire                wr_n,
    output wire         [ 7:0] dout,
    output wire                irq_n,

    output wire signed  [15:0] snd,
    output wire                sample
);


    `define JTOPL2
    jtopl #(.OPL_TYPE(2)) u_base(
        .rst    ( rst       ),
        .clk    ( clk       ),
        .cen    ( cen       ),
        .din    ( din       ),
        .addr   ( addr      ),
        .cs_n   ( cs_n      ),
        .wr_n   ( wr_n      ),
        .dout   ( dout      ),
        .irq_n  ( irq_n     ),
        .snd    ( snd       ),
        .sample ( sample    )
    );

endmodule