data/full_repos/permissive/499137621/CheckPoint3_regfile-main/write_port.v
1: b"%Error: data/full_repos/permissive/499137621/CheckPoint3_regfile-main/write_port.v:8: Cannot find file containing module: '_5to32decoder'\n _5to32decoder dec1(.out(Intermediate), .ctrl(ctrl_writeReg), .Enable(1'b1));\n ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/499137621/CheckPoint3_regfile-main,data/full_repos/permissive/499137621/_5to32decoder\n             data/full_repos/permissive/499137621/CheckPoint3_regfile-main,data/full_repos/permissive/499137621/_5to32decoder.v\n             data/full_repos/permissive/499137621/CheckPoint3_regfile-main,data/full_repos/permissive/499137621/_5to32decoder.sv\n             _5to32decoder\n             _5to32decoder.v\n             _5to32decoder.sv\n             obj_dir/_5to32decoder\n             obj_dir/_5to32decoder.v\n             obj_dir/_5to32decoder.sv\n%Error: Exiting due to 1 error(s)\n"
module write_port(ctrl_writeReg, ctrl_writeEN, out);
	input[4:0] ctrl_writeReg;
	input ctrl_writeEN;
	output[31:0] out;
	
	wire[31:0] Intermediate;
	_5to32decoder dec1(.out(Intermediate), .ctrl(ctrl_writeReg), .Enable(1'b1));
	
	
	genvar i;
	
	generate
		for (i=1; i < 32; i = i+1)  begin : generate_block_identifier2
		assign out[i]= (ctrl_writeEN)? Intermediate[i] : (1'b0);
	end
	endgenerate

endmodule
module write_port(ctrl_writeReg, ctrl_writeEN, out);

	input[4:0] ctrl_writeReg;
	input ctrl_writeEN;
	output[31:0] out;
	
	wire[31:0] Intermediate;
	_5to32decoder dec1(.out(Intermediate), .ctrl(ctrl_writeReg), .Enable(1'b1));
	
	
	genvar i;
	
	generate
		for (i=1; i < 32; i = i+1)  begin : generate_block_identifier2
		assign out[i]= (ctrl_writeEN)? Intermediate[i] : (1'b0);
	end
	endgenerate

endmodule