data/full_repos/permissive/493265923/04_DIFFERNTIATOR/DIFFERENTIATOR.v
data/verilator_xmls/43fe8bd7-f2d6-437f-a1af-0581e0bd716c.xml
function [DATA_Bit_Length+1:0] assign_out;
        input [DATA_Bit_Length:0] SUM_DATA;
    begin
        case (SUM_DATA[DATA_Bit_Length:DATA_Bit_Length-1])
            2'b01: begin
                assign_out = {1'b1, 1'b0, 1'b0, {(DATA_Bit_Length-1){1'b1}}};
            end

            2'b10: begin
                assign_out = {1'b0, 1'b1, 1'b1, {(DATA_Bit_Length-1){1'b0}}};
            end

            default: begin
                assign_out = {1'b0, 1'b0, SUM_DATA[DATA_Bit_Length], SUM_DATA[DATA_Bit_Length-2:0]};
            end
        endcase
    end
    endfunction
function [DATA_Bit_Length+1:0] assign_out;

        input [DATA_Bit_Length:0] SUM_DATA;
    begin
        case (SUM_DATA[DATA_Bit_Length:DATA_Bit_Length-1])
            2'b01: begin
                assign_out = {1'b1, 1'b0, 1'b0, {(DATA_Bit_Length-1){1'b1}}};
            end

            2'b10: begin
                assign_out = {1'b0, 1'b1, 1'b1, {(DATA_Bit_Length-1){1'b0}}};
            end

            default: begin
                assign_out = {1'b0, 1'b0, SUM_DATA[DATA_Bit_Length], SUM_DATA[DATA_Bit_Length-2:0]};
            end
        endcase
    end
    endfunction