data/full_repos/permissive/436037353/src/InstructionMemory.v
data/verilator_xmls/4a1865bc-2531-4ec2-8219-6c204f265fbf.xml
module InstructionMemory(
	pcAddress,
	instruction);

	input [7:0]			pcAddress;
	
	output reg [15:0]	instruction;
	
	reg [7:0] insturctionMemory [0:255];
	

	initial begin
		

		$readmemb("subroutine.coe", insturctionMemory);
	
	end
	
	
	always@(*) begin
	
		instruction[7:0] <= insturctionMemory[pcAddress];
		instruction[15:8] <= insturctionMemory[pcAddress + 1];
	
	end

endmodule
module InstructionMemory(
	pcAddress,
	instruction);


	input [7:0]			pcAddress;
	
	output reg [15:0]	instruction;
	
	reg [7:0] insturctionMemory [0:255];
	

	initial begin
		

		$readmemb("subroutine.coe", insturctionMemory);
	
	end
	
	
	always@(*) begin
	
		instruction[7:0] <= insturctionMemory[pcAddress];
		instruction[15:8] <= insturctionMemory[pcAddress + 1];
	
	end

endmodule