data/full_repos/permissive/469509877/rtl/btnChecker.v
data/verilator_xmls/815b82be-e99f-4857-b8b7-ebd67633575f.xml
module btnChecker(
    input Uin,
    input Din,
    input Lin,
    input Rin,
    output Uout,
    output Dout,
    output Lout,
    output Rout
    );
    
    assign Uout = Uin & ~Din;
    assign Dout = ~Uin & Din;
    assign Lout = Lin & ~Rin;
    assign Rout = ~Lin & Rin;
endmodule
module btnChecker(
    input Uin,
    input Din,
    input Lin,
    input Rin,
    output Uout,
    output Dout,
    output Lout,
    output Rout
    );

    
    assign Uout = Uin & ~Din;
    assign Dout = ~Uin & Din;
    assign Lout = Lin & ~Rin;
    assign Rout = ~Lin & Rin;
endmodule