data/full_repos/permissive/46343463/src/Adder.v
data/verilator_xmls/b6585811-c736-427d-8fab-9ecfa58e7b34.xml
module Adder #(parameter width=32) (
	input	[width-1:0]	data_1, data_2,
	output 	[width-1:0]	data_o
);
	
	assign data_o = data_1 + data_2;

endmodule
module Adder #(parameter width=32) (
	input	[width-1:0]	data_1, data_2,
	output 	[width-1:0]	data_o
);

	
	assign data_o = data_1 + data_2;

endmodule