data/full_repos/permissive/40581558/fpga_sim/model_trans/cc3200_model_gen.v
data/verilator_xmls/10408ff1-824c-456c-838e-8b9d777e399e.xml
module  cc3200_model_gen   (

    input         clk_in ,
    input         reset_n

     

 );







 endmodule
module  cc3200_model_gen   (

    input         clk_in ,
    input         reset_n

     

 );








 endmodule