data/full_repos/permissive/421048855/Circuits/Sequential Logic/Counters/Countbcd.v
1: b'%Error: Cannot find file containing module: Logic/Counters,data/full_repos/permissive/421048855\n        ... Looked in:\n             data/full_repos/permissive/421048855/Circuits/Sequential/Logic/Counters,data/full_repos/permissive/421048855\n             data/full_repos/permissive/421048855/Circuits/Sequential/Logic/Counters,data/full_repos/permissive/421048855.v\n             data/full_repos/permissive/421048855/Circuits/Sequential/Logic/Counters,data/full_repos/permissive/421048855.sv\n             Logic/Counters,data/full_repos/permissive/421048855\n             Logic/Counters,data/full_repos/permissive/421048855.v\n             Logic/Counters,data/full_repos/permissive/421048855.sv\n             obj_dir/Logic/Counters,data/full_repos/permissive/421048855\n             obj_dir/Logic/Counters,data/full_repos/permissive/421048855.v\n             obj_dir/Logic/Counters,data/full_repos/permissive/421048855.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/421048855/Circuits/Sequential\n%Error: Cannot find file containing module: Logic/Counters/Countbcd.v\n%Error: Exiting due to 3 error(s)\n'
module top_module (
    input clk,
    input reset,
    output [3:1] ena,
    output [15:0] q);
    assign ena[3:1] = {{q[11:8] == 'd9 && q[7:4] == 'd9 && q[3:0] == 'd9}, {q[7:4] == 'd9 && q[3:0] == 'd9}, {q[3:0] == 'd9}};
    count10 count_1(clk, 1'b1, reset, q[3:0]);
    count10 count_10(clk, ena[1], reset, q[7:4]);
    count10 count_100(clk, ena[2], reset, q[11:8]);
    count10 count_1000(clk, ena[3], reset, q[15:12]);
    
endmodule
module top_module (
    input clk,
    input reset,
    output [3:1] ena,
    output [15:0] q);

    assign ena[3:1] = {{q[11:8] == 'd9 && q[7:4] == 'd9 && q[3:0] == 'd9}, {q[7:4] == 'd9 && q[3:0] == 'd9}, {q[3:0] == 'd9}};
    count10 count_1(clk, 1'b1, reset, q[3:0]);
    count10 count_10(clk, ena[1], reset, q[7:4]);
    count10 count_100(clk, ena[2], reset, q[11:8]);
    count10 count_1000(clk, ena[3], reset, q[15:12]);
    
endmodule