data/full_repos/permissive/518305937/iiitb_gc_tb.v
1: b'%Error: data/full_repos/permissive/518305937/iiitb_gc_tb.v:31: Unsupported or unknown PLI call: $dumpfile\n        $dumpfile("iiitb_gc.vcd");\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/518305937/iiitb_gc_tb.v:32: Unsupported or unknown PLI call: $dumpvars\n        $dumpvars(0, iiitb_gc_tb);\n        ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/518305937/iiitb_gc_tb.v:37: Unsupported: Ignoring delay on this delayed statement.\n        #5 reset = 0;\n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/518305937/iiitb_gc_tb.v:38: Unsupported: Ignoring delay on this delayed statement.\n        #4000 $finish;     \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/518305937/iiitb_gc_tb.v:41: Unsupported: Ignoring delay on this delayed statement.\n    always #2 clk = ~clk;\n           ^\n%Error: Exiting due to 2 error(s), 3 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module iiitb_gc_tb();
    reg clk, enable, reset;
    wire [7:0] gray_count;
    
    iiitb_gc gc1(clk, enable, reset, gray_count);
    
    initial
    begin
        $dumpfile("iiitb_gc.vcd");
        $dumpvars(0, iiitb_gc_tb);
        clk = 0;
        reset = 1;
        enable = 1;
        
        #5 reset = 0;
        #4000 $finish;     
    end 
    
    always #2 clk = ~clk;
       
endmodule
module iiitb_gc_tb();

    reg clk, enable, reset;
    wire [7:0] gray_count;
    
    iiitb_gc gc1(clk, enable, reset, gray_count);
    
    initial
    begin
        $dumpfile("iiitb_gc.vcd");
        $dumpvars(0, iiitb_gc_tb);
        clk = 0;
        reset = 1;
        enable = 1;
        
        #5 reset = 0;
        #4000 $finish;     
    end 
    
    always #2 clk = ~clk;
       
endmodule