data/full_repos/permissive/524509242/FSM GCD/board.v
1: b'%Error: Cannot find file containing module: GCD,data/full_repos/permissive/524509242\n        ... Looked in:\n             data/full_repos/permissive/524509242/FSM/GCD,data/full_repos/permissive/524509242\n             data/full_repos/permissive/524509242/FSM/GCD,data/full_repos/permissive/524509242.v\n             data/full_repos/permissive/524509242/FSM/GCD,data/full_repos/permissive/524509242.sv\n             GCD,data/full_repos/permissive/524509242\n             GCD,data/full_repos/permissive/524509242.v\n             GCD,data/full_repos/permissive/524509242.sv\n             obj_dir/GCD,data/full_repos/permissive/524509242\n             obj_dir/GCD,data/full_repos/permissive/524509242.v\n             obj_dir/GCD,data/full_repos/permissive/524509242.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/524509242/FSM\n%Error: Cannot find file containing module: GCD/board.v\n%Error: Exiting due to 3 error(s)\n'
module board(CLK, SW, BTN ,LED, LDT2G, DIP_A1);

input CLK;
input [7:0] SW;
input DIP_A1;
input [3:0]BTN;
output [3:0] LED;
output LDT2G;

wire slowCLK, debounced_BTN0;

	clock_divider cd(CLK, BTN[0], slowCLK);
	debouncer db (CLK, slowCLK, BTN[0], debounced_BTN0);
	
	GCDwrapper GCD(SW[3:0], SW[7:4], LED[3:0], CLK, debounced_BTN0, LDT2G, DIP_A1);
	
endmodule
module board(CLK, SW, BTN ,LED, LDT2G, DIP_A1);


input CLK;
input [7:0] SW;
input DIP_A1;
input [3:0]BTN;
output [3:0] LED;
output LDT2G;

wire slowCLK, debounced_BTN0;

	clock_divider cd(CLK, BTN[0], slowCLK);
	debouncer db (CLK, slowCLK, BTN[0], debounced_BTN0);
	
	GCDwrapper GCD(SW[3:0], SW[7:4], LED[3:0], CLK, debounced_BTN0, LDT2G, DIP_A1);
	
endmodule