data/full_repos/permissive/419984230/rtl/expAdd.v
data/verilator_xmls/466f1225-f950-45e1-8b71-b478bc2e0cb2.xml
module expAdd(
    input       [16:0]  a,
    input       [16:0]  b,
    input               en,
    input       [1:0]   precision, mode,
    input               isshft,
    output reg  [12:0]  out,
    output reg          underflow,
    output reg          overflow,
    output reg          inf,
    output reg          NaN,
    output reg          zero
);


    parameter   DBIAS    =   1023;
    parameter   SBIAS    =   127;
    parameter   HBIAS    =   15;

    reg [16:0] data_a, data_b; 
    always @(*) begin
        {underflow, overflow, inf, NaN, zero} = {1'b0, 1'b0, 1'b0, 1'b0, 1'b0};
        data_a = en ? a : 17'b0; 
        data_b = en ? b : 17'b0; 
        
        if (data_a[16] && data_b[16] || ~data_a[15] && ~data_b[15]) begin
            out = 13'b0;
            zero = 1'b1;
        end else if (data_a[16] || ~data_a[15]) begin
             out = data_b[12:0];
            if(data_b[14] || data_b [13]) begin
                zero = 1'b0; inf = data_b [14]; NaN = data_b [13];
                out = 13'b1_1111_1111_1111;
            end
        end else if (data_b[16] || ~data_b[15]) begin
             out = data_a[12:0];
            if(data_a[14] || data_a [13]) begin
                zero = 1'b0; inf = data_a [14]; NaN = data_a [13];
                out = 13'b1_1111_1111_1111;
            end
        end else if (data_a[14] || data_a[13] || data_b[14] || data_b[13]) begin
            out = 13'b1_1111_1111_1111;
            inf = 1'b1; NaN = 1'b0;
            if (data_a[13] || data_b[13]) begin
                inf = 1'b0; NaN = 1'b1;
            end
        end else begin
            {underflow, overflow, inf, NaN, zero} = {1'b0, 1'b0, 1'b0, 1'b0, 1'b0};
            out = isshft ? data_a[12:0] : (data_b[12:0]);
        end
    end
        
endmodule
module expAdd(
    input       [16:0]  a,
    input       [16:0]  b,
    input               en,
    input       [1:0]   precision, mode,
    input               isshft,
    output reg  [12:0]  out,
    output reg          underflow,
    output reg          overflow,
    output reg          inf,
    output reg          NaN,
    output reg          zero
);



    parameter   DBIAS    =   1023;
    parameter   SBIAS    =   127;
    parameter   HBIAS    =   15;

    reg [16:0] data_a, data_b; 
    always @(*) begin
        {underflow, overflow, inf, NaN, zero} = {1'b0, 1'b0, 1'b0, 1'b0, 1'b0};
        data_a = en ? a : 17'b0; 
        data_b = en ? b : 17'b0; 
        
        if (data_a[16] && data_b[16] || ~data_a[15] && ~data_b[15]) begin
            out = 13'b0;
            zero = 1'b1;
        end else if (data_a[16] || ~data_a[15]) begin
             out = data_b[12:0];
            if(data_b[14] || data_b [13]) begin
                zero = 1'b0; inf = data_b [14]; NaN = data_b [13];
                out = 13'b1_1111_1111_1111;
            end
        end else if (data_b[16] || ~data_b[15]) begin
             out = data_a[12:0];
            if(data_a[14] || data_a [13]) begin
                zero = 1'b0; inf = data_a [14]; NaN = data_a [13];
                out = 13'b1_1111_1111_1111;
            end
        end else if (data_a[14] || data_a[13] || data_b[14] || data_b[13]) begin
            out = 13'b1_1111_1111_1111;
            inf = 1'b1; NaN = 1'b0;
            if (data_a[13] || data_b[13]) begin
                inf = 1'b0; NaN = 1'b1;
            end
        end else begin
            {underflow, overflow, inf, NaN, zero} = {1'b0, 1'b0, 1'b0, 1'b0, 1'b0};
            out = isshft ? data_a[12:0] : (data_b[12:0]);
        end
    end
        
endmodule