data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv
1: b'%Error: data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv:3: Cannot find include file: noc_parameter.vh\n    `include "noc_parameter.vh" \n             ^~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog,data/full_repos/permissive/463204869/noc_parameter.vh\n             data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog,data/full_repos/permissive/463204869/noc_parameter.vh.v\n             data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog,data/full_repos/permissive/463204869/noc_parameter.vh.sv\n             noc_parameter.vh\n             noc_parameter.vh.v\n             noc_parameter.vh.sv\n             obj_dir/noc_parameter.vh\n             obj_dir/noc_parameter.vh.v\n             obj_dir/noc_parameter.vh.sv\n%Error: data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv:4: syntax error, unexpected \',\', expecting \'[\'\n    ,parameter  PORT_QUANT                                  = 3,     \n    ^\n%Error: data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv:5: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter   MODULES_PER_ROUTER                          = 1,\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv:6: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter   LINKS_PER_ROUTER                            = PORT_QUANT-MODULES_PER_ROUTER,     \n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv:9: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter   [LUT_SIZE*LINKS_PER_ROUTER-1:0] LUT_RESET_VALUE = 0,\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv:10: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter   [MOD_X_COORD_SIZE-1:0]      DIRECTION_ADD_X = 0,\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv:11: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter   [MOD_Y_COORD_SIZE-1:0]      DIRECTION_ADD_Y = 0,\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv:12: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter                                   SYNC_ROUTER = 0,\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv:13: syntax error, unexpected parameter, expecting IDENTIFIER\n    parameter   INSTANCE_NAME                                   = "R0"\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv:14: syntax error, unexpected \')\', expecting \';\'\n)\n^\n%Error: data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv:17: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input  wire                          reset_q_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv:18: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input  wire                          testmode_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv:19: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input  wire    [NOC_CHIPID_SIZE-1:0] home_chipid_i,\n    ^~~~~\n%Error: data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv:22: syntax error, unexpected \'.\', expecting \',\' or \';\'\n    noc_link_if.rx              rx_if[0:PORT_QUANT-1],\n               ^\n%Error: data/full_repos/permissive/463204869/units/noc_network/source/rtl/systemverilog/router_wrap.sv:47: syntax error, unexpected IDENTIFIER\nutil_clkbuf i_util_clkbuf_router (\n^~~~~~~~~~~\n%Error: Exiting due to 15 error(s)\n'
module router_wrap #(
    `include "noc_parameter.vh"
    ,parameter  PORT_QUANT                                  = 3,
    parameter   MODULES_PER_ROUTER                          = 1,
    parameter   LINKS_PER_ROUTER                            = PORT_QUANT-MODULES_PER_ROUTER,


    parameter   [LUT_SIZE*LINKS_PER_ROUTER-1:0] LUT_RESET_VALUE = 0,
    parameter   [MOD_X_COORD_SIZE-1:0]      DIRECTION_ADD_X = 0,
    parameter   [MOD_Y_COORD_SIZE-1:0]      DIRECTION_ADD_Y = 0,
    parameter                                   SYNC_ROUTER = 0,
    parameter   INSTANCE_NAME                                   = "R0"
)
(
    input  wire                          clk_i,
    input  wire                          reset_q_i,
    input  wire                          testmode_i,
    input  wire    [NOC_CHIPID_SIZE-1:0] home_chipid_i,


    noc_link_if.rx              rx_if[0:PORT_QUANT-1],


    noc_link_if.tx              tx_if[0:PORT_QUANT-1]
);




wire    [PORT_QUANT-1:0]                        tx_wrreq;
wire    [PORT_QUANT-1:0]                        tx_stall;
wire    [NOC_HEADER_SIZE*PORT_QUANT-1:0]        tx_header;
wire    [NOC_PAYLOAD_SIZE*PORT_QUANT-1:0]       tx_payload;

wire    [PORT_QUANT-1:0]                        rx_rdreq;
wire    [NOC_HEADER_SIZE*PORT_QUANT-1:0]        rx_header;
wire    [NOC_PAYLOAD_SIZE*PORT_QUANT-1:0]       rx_payload;
wire    [PORT_QUANT-1:0]                        rx_fifo_empty;

wire                                            clk_router_s;
wire                                            reset_q_router_s;




util_clkbuf i_util_clkbuf_router (
    .clk_i(clk_i),
    .clk_o(clk_router_s)
);

util_reset_sync i_util_reset_sync_router (
    .clk_i(clk_router_s),
    .reset_q_i(reset_q_i),
    .scan_mode_i(testmode_i),
    .sync_reset_q_o(reset_q_router_s)
);






genvar gen_i;
generate

    for (gen_i=0; gen_i<MODULES_PER_ROUTER; gen_i=gen_i+1) begin: FIFO_MOD_GEN
        noc_link_phy #(
            .SYNCHRONOUS        (0)
        ) FIFO_InOut (
            .clk_i              (clk_router_s),
            .rst_q_i            (reset_q_router_s),
            .testmode_i         (testmode_i),

            .tx_wrreq_i         (tx_wrreq[gen_i]),
            .tx_header_i        (tx_header [(gen_i+1)*NOC_HEADER_SIZE-1 : gen_i*NOC_HEADER_SIZE]),
            .tx_payload_i       (tx_payload [(gen_i+1)*NOC_PAYLOAD_SIZE-1 : gen_i*NOC_PAYLOAD_SIZE]),
            .tx_stall_o         (tx_stall[gen_i]),
            .tx_if              (tx_if[gen_i]),

            .rx_rdreq_i         (rx_rdreq[gen_i]),
            .rx_header_o        (rx_header[(gen_i+1)*NOC_HEADER_SIZE-1 : gen_i*NOC_HEADER_SIZE]),
            .rx_payload_o       (rx_payload[(gen_i+1)*NOC_PAYLOAD_SIZE-1 : gen_i*NOC_PAYLOAD_SIZE]),
            .rx_fifo_empty_o    (rx_fifo_empty[gen_i]),
            .rx_if              (rx_if[gen_i])
        );
    end


    for (gen_i=MODULES_PER_ROUTER; gen_i<PORT_QUANT; gen_i=gen_i+1) begin: FIFO_ROUTER_GEN
        noc_link_phy #(
            .SYNCHRONOUS        (SYNC_ROUTER)
        ) FIFO_InOut (
            .clk_i              (clk_router_s),
            .rst_q_i            (reset_q_router_s),
            .testmode_i         (testmode_i),

            .tx_wrreq_i         (tx_wrreq[gen_i]),
            .tx_header_i        (tx_header [(gen_i+1)*NOC_HEADER_SIZE-1 : gen_i*NOC_HEADER_SIZE]),
            .tx_payload_i       (tx_payload [(gen_i+1)*NOC_PAYLOAD_SIZE-1 : gen_i*NOC_PAYLOAD_SIZE]),
            .tx_stall_o         (tx_stall[gen_i]),
            .tx_if              (tx_if[gen_i]),

            .rx_rdreq_i         (rx_rdreq[gen_i]),
            .rx_header_o        (rx_header[(gen_i+1)*NOC_HEADER_SIZE-1 : gen_i*NOC_HEADER_SIZE]),
            .rx_payload_o       (rx_payload[(gen_i+1)*NOC_PAYLOAD_SIZE-1 : gen_i*NOC_PAYLOAD_SIZE]),
            .rx_fifo_empty_o    (rx_fifo_empty[gen_i]),
            .rx_if              (rx_if[gen_i])
        );
    end
endgenerate





router_top #(
    .INSTANCE_NAME              (INSTANCE_NAME),
    .TOTAL_PORT_QUANT           (PORT_QUANT+1),
    .MODULES_PER_ROUTER         (MODULES_PER_ROUTER),
    .LUT_RESET_VALUE            (LUT_RESET_VALUE),
    .DIRECTION_ADD_X            (DIRECTION_ADD_X),
    .DIRECTION_ADD_Y            (DIRECTION_ADD_Y)
) i_router_top (
    .clk_i                      (clk_router_s),
    .reset_q_i                  (reset_q_router_s),
    .home_chipid_i              (home_chipid_i),


    .header_i                   (rx_header),
    .payload_i                  (rx_payload),
    .rdreq_o                    (rx_rdreq),
    .flit_avail_q_i             (rx_fifo_empty),


    .header_o                   (tx_header),
    .payload_o                  (tx_payload),
    .wrreq_o                    (tx_wrreq),
    .stall_i                    (tx_stall)
);


endmodule
module router_wrap #(
    `include "noc_parameter.vh"
    ,parameter  PORT_QUANT                                  = 3,
    parameter   MODULES_PER_ROUTER                          = 1,
    parameter   LINKS_PER_ROUTER                            = PORT_QUANT-MODULES_PER_ROUTER,


    parameter   [LUT_SIZE*LINKS_PER_ROUTER-1:0] LUT_RESET_VALUE = 0,
    parameter   [MOD_X_COORD_SIZE-1:0]      DIRECTION_ADD_X = 0,
    parameter   [MOD_Y_COORD_SIZE-1:0]      DIRECTION_ADD_Y = 0,
    parameter                                   SYNC_ROUTER = 0,
    parameter   INSTANCE_NAME                                   = "R0"
)
(
    input  wire                          clk_i,
    input  wire                          reset_q_i,
    input  wire                          testmode_i,
    input  wire    [NOC_CHIPID_SIZE-1:0] home_chipid_i,


    noc_link_if.rx              rx_if[0:PORT_QUANT-1],


    noc_link_if.tx              tx_if[0:PORT_QUANT-1]
);





wire    [PORT_QUANT-1:0]                        tx_wrreq;
wire    [PORT_QUANT-1:0]                        tx_stall;
wire    [NOC_HEADER_SIZE*PORT_QUANT-1:0]        tx_header;
wire    [NOC_PAYLOAD_SIZE*PORT_QUANT-1:0]       tx_payload;

wire    [PORT_QUANT-1:0]                        rx_rdreq;
wire    [NOC_HEADER_SIZE*PORT_QUANT-1:0]        rx_header;
wire    [NOC_PAYLOAD_SIZE*PORT_QUANT-1:0]       rx_payload;
wire    [PORT_QUANT-1:0]                        rx_fifo_empty;

wire                                            clk_router_s;
wire                                            reset_q_router_s;




util_clkbuf i_util_clkbuf_router (
    .clk_i(clk_i),
    .clk_o(clk_router_s)
);

util_reset_sync i_util_reset_sync_router (
    .clk_i(clk_router_s),
    .reset_q_i(reset_q_i),
    .scan_mode_i(testmode_i),
    .sync_reset_q_o(reset_q_router_s)
);






genvar gen_i;
generate

    for (gen_i=0; gen_i<MODULES_PER_ROUTER; gen_i=gen_i+1) begin: FIFO_MOD_GEN
        noc_link_phy #(
            .SYNCHRONOUS        (0)
        ) FIFO_InOut (
            .clk_i              (clk_router_s),
            .rst_q_i            (reset_q_router_s),
            .testmode_i         (testmode_i),

            .tx_wrreq_i         (tx_wrreq[gen_i]),
            .tx_header_i        (tx_header [(gen_i+1)*NOC_HEADER_SIZE-1 : gen_i*NOC_HEADER_SIZE]),
            .tx_payload_i       (tx_payload [(gen_i+1)*NOC_PAYLOAD_SIZE-1 : gen_i*NOC_PAYLOAD_SIZE]),
            .tx_stall_o         (tx_stall[gen_i]),
            .tx_if              (tx_if[gen_i]),

            .rx_rdreq_i         (rx_rdreq[gen_i]),
            .rx_header_o        (rx_header[(gen_i+1)*NOC_HEADER_SIZE-1 : gen_i*NOC_HEADER_SIZE]),
            .rx_payload_o       (rx_payload[(gen_i+1)*NOC_PAYLOAD_SIZE-1 : gen_i*NOC_PAYLOAD_SIZE]),
            .rx_fifo_empty_o    (rx_fifo_empty[gen_i]),
            .rx_if              (rx_if[gen_i])
        );
    end


    for (gen_i=MODULES_PER_ROUTER; gen_i<PORT_QUANT; gen_i=gen_i+1) begin: FIFO_ROUTER_GEN
        noc_link_phy #(
            .SYNCHRONOUS        (SYNC_ROUTER)
        ) FIFO_InOut (
            .clk_i              (clk_router_s),
            .rst_q_i            (reset_q_router_s),
            .testmode_i         (testmode_i),

            .tx_wrreq_i         (tx_wrreq[gen_i]),
            .tx_header_i        (tx_header [(gen_i+1)*NOC_HEADER_SIZE-1 : gen_i*NOC_HEADER_SIZE]),
            .tx_payload_i       (tx_payload [(gen_i+1)*NOC_PAYLOAD_SIZE-1 : gen_i*NOC_PAYLOAD_SIZE]),
            .tx_stall_o         (tx_stall[gen_i]),
            .tx_if              (tx_if[gen_i]),

            .rx_rdreq_i         (rx_rdreq[gen_i]),
            .rx_header_o        (rx_header[(gen_i+1)*NOC_HEADER_SIZE-1 : gen_i*NOC_HEADER_SIZE]),
            .rx_payload_o       (rx_payload[(gen_i+1)*NOC_PAYLOAD_SIZE-1 : gen_i*NOC_PAYLOAD_SIZE]),
            .rx_fifo_empty_o    (rx_fifo_empty[gen_i]),
            .rx_if              (rx_if[gen_i])
        );
    end
endgenerate





router_top #(
    .INSTANCE_NAME              (INSTANCE_NAME),
    .TOTAL_PORT_QUANT           (PORT_QUANT+1),
    .MODULES_PER_ROUTER         (MODULES_PER_ROUTER),
    .LUT_RESET_VALUE            (LUT_RESET_VALUE),
    .DIRECTION_ADD_X            (DIRECTION_ADD_X),
    .DIRECTION_ADD_Y            (DIRECTION_ADD_Y)
) i_router_top (
    .clk_i                      (clk_router_s),
    .reset_q_i                  (reset_q_router_s),
    .home_chipid_i              (home_chipid_i),


    .header_i                   (rx_header),
    .payload_i                  (rx_payload),
    .rdreq_o                    (rx_rdreq),
    .flit_avail_q_i             (rx_fifo_empty),


    .header_o                   (tx_header),
    .payload_o                  (tx_payload),
    .wrreq_o                    (tx_wrreq),
    .stall_i                    (tx_stall)
);


endmodule