data/full_repos/permissive/493019833/test/testcase/firrtl/DynamicMemorySearchTests/reference/DynamicMemorySearchTests.v
1: b'%Warning-WIDTH: data/full_repos/permissive/493019833/test/testcase/firrtl/DynamicMemorySearchTests/reference/DynamicMemorySearchTests.v:637: Operator COND expects 3 bits on the Conditional False, but Conditional False\'s VARREF \'in\' generates 1 bits.\n                                                                                                                                           : ... In instance DynamicMemorySearch.u_pad_48\n    assign y = (n > width) ? {{(n - width){1\'b0}}, in} : in;\n                           ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/493019833/test/testcase/firrtl/DynamicMemorySearchTests/reference/DynamicMemorySearchTests.v:637: Operator COND expects 3 bits on the Conditional False, but Conditional False\'s VARREF \'in\' generates 2 bits.\n                                                                                                                                           : ... In instance DynamicMemorySearch.u_pad_50\n    assign y = (n > width) ? {{(n - width){1\'b0}}, in} : in;\n                           ^\n%Warning-WIDTH: data/full_repos/permissive/493019833/test/testcase/firrtl/DynamicMemorySearchTests/reference/DynamicMemorySearchTests.v:637: Operator COND expects 4 bits on the Conditional False, but Conditional False\'s VARREF \'in\' generates 1 bits.\n                                                                                                                                           : ... In instance DynamicMemorySearch.u_pad_65\n    assign y = (n > width) ? {{(n - width){1\'b0}}, in} : in;\n                           ^\n%Error: Exiting due to 3 warning(s)\n'
module BITS(y, in);
    parameter width = 4;
    parameter high = 2;
    parameter low = 0;
    output [high-low:0] y;
    input [width-1:0] in;
    assign y = in[high:low];
endmodule
module BITS(y, in);

    parameter width = 4;
    parameter high = 2;
    parameter low = 0;
    output [high-low:0] y;
    input [width-1:0] in;
    assign y = in[high:low];
endmodule