data/full_repos/permissive/418284997/src/blocks/sign_ext.v
data/verilator_xmls/443d62b9-79b8-4841-a514-c352627ea25a.xml
module sign_ext
  #(
    parameter XLEN = 32,
    parameter INPUT_LEN = 12
  )
  (
    input wire [INPUT_LEN-1:0] data_i,
    output wire [XLEN-1:0] data_o
  );

  assign data_o = {{XLEN-INPUT_LEN{data_i[INPUT_LEN-1]}}, data_i};

endmodule
module sign_ext
  #(
    parameter XLEN = 32,
    parameter INPUT_LEN = 12
  )
  (
    input wire [INPUT_LEN-1:0] data_i,
    output wire [XLEN-1:0] data_o
  );


  assign data_o = {{XLEN-INPUT_LEN{data_i[INPUT_LEN-1]}}, data_i};

endmodule