data/full_repos/permissive/506562943/HDLBits/Circuits/Sequential Logic/Counters/exams_ece241_2014_q7a.v
1: b'%Error: Cannot find file containing module: Logic/Counters,data/full_repos/permissive/506562943\n        ... Looked in:\n             data/full_repos/permissive/506562943/HDLBits/Circuits/Sequential/Logic/Counters,data/full_repos/permissive/506562943\n             data/full_repos/permissive/506562943/HDLBits/Circuits/Sequential/Logic/Counters,data/full_repos/permissive/506562943.v\n             data/full_repos/permissive/506562943/HDLBits/Circuits/Sequential/Logic/Counters,data/full_repos/permissive/506562943.sv\n             Logic/Counters,data/full_repos/permissive/506562943\n             Logic/Counters,data/full_repos/permissive/506562943.v\n             Logic/Counters,data/full_repos/permissive/506562943.sv\n             obj_dir/Logic/Counters,data/full_repos/permissive/506562943\n             obj_dir/Logic/Counters,data/full_repos/permissive/506562943.v\n             obj_dir/Logic/Counters,data/full_repos/permissive/506562943.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/506562943/HDLBits/Circuits/Sequential\n%Error: Cannot find file containing module: Logic/Counters/exams_ece241_2014_q7a.v\n%Error: Exiting due to 3 error(s)\n'
module top_module (
    input clk,
    input reset,
    input enable,
    output [3:0] Q,
    output c_enable,
    output c_load,
    output [3:0] c_d
);

    assign c_enable = enable;

    assign c_load = reset | (Q == 4'd12 && enable);

    assign c_d = 4'd1;
    
    count4 the_counter (clk, c_enable, c_load, c_d, Q);

endmodule
module top_module (
    input clk,
    input reset,
    input enable,
    output [3:0] Q,
    output c_enable,
    output c_load,
    output [3:0] c_d
);


    assign c_enable = enable;

    assign c_load = reset | (Q == 4'd12 && enable);

    assign c_d = 4'd1;
    
    count4 the_counter (clk, c_enable, c_load, c_d, Q);

endmodule