data/full_repos/permissive/427221126/workspace/rom.v
data/verilator_xmls/98419fb1-864b-4a84-99b0-dcee78fe8489.xml
module rom(clk,rst,addr,read,dout);


  input		clk,rst,read;
  input		[5:0]addr;
  output	[15:0]dout;

  wire		[15:0] dout;
  reg   [15:0] rom;















always @(posedge clk) begin
        case (addr)
                 0: rom <= 16'h0000;  1: rom <= 16'h0000;  2: rom <= 16'h0070;  3: rom <= 16'h0757;  4: rom <= 16'h0F1F;  5: rom <= 16'h1000;  6: rom <= 16'h0FDF;
                 7: rom <= 16'h01A1;  8: rom <= 16'h0AAA;  9: rom <= 16'h0BBB; 10: rom <= 16'h0FCF; 11: rom <= 16'h0FCF; 12: rom <= 16'h0FDF; 13: rom <= 16'h0FCF;
                14: rom <= 16'h0C8C; 15: rom <= 16'h0FDF; 16: rom <= 16'h0FCF; 17: rom <= 16'h0FCF; 18: rom <= 16'h0D6D; 19: rom <= 16'h0A8A; 20: rom <= 16'h0A8A;
                21: rom <= 16'h0E1E; 22: rom <= 16'h0FDF; 23: rom <= 16'h0FCF; 24: rom <= 16'h0FCF; 25: rom <= 16'h0282; 26: rom <= 16'h0000; 27: rom <= 16'h0000;
                28: rom <= 16'h0E2E; 29: rom <= 16'h1000; 30: rom <= 16'h0FDF; 31: rom <= 16'h0A8A; 32: rom <= 16'h0000; 33: rom <= 16'h0000; 34: rom <= 16'h0000;
                35: rom <= 16'h0969; 36: rom <= 16'h0FDF; 37: rom <= 16'h0FCF; 38: rom <= 16'h0A8A; 39: rom <= 16'h0000; 40: rom <= 16'h0000; 41: rom <= 16'h0000;
                42: rom <= 16'h0717; 43: rom <= 16'h0FDF; 44: rom <= 16'h0FCF; 45: rom <= 16'h0A8A; 46: rom <= 16'h0000; 47: rom <= 16'h0000; 48: rom <= 16'h0000;
                49: rom <= 16'hFD01; 50: rom <= 16'h01CD; 51: rom <= 16'hFEFC;
                52: rom <= 16'hFFC4; 53: rom <= 16'hFF30; 54: rom <= 16'hFDB4;
                55: rom <= 16'hFEDD; 56: rom <= 16'hFFBC; 57: rom <= 16'hFCFD;
          default:  rom <=  16'h0000;
        endcase
end

assign dout = rom;





endmodule
module rom(clk,rst,addr,read,dout);



  input		clk,rst,read;
  input		[5:0]addr;
  output	[15:0]dout;

  wire		[15:0] dout;
  reg   [15:0] rom;















always @(posedge clk) begin
        case (addr)
                 0: rom <= 16'h0000;  1: rom <= 16'h0000;  2: rom <= 16'h0070;  3: rom <= 16'h0757;  4: rom <= 16'h0F1F;  5: rom <= 16'h1000;  6: rom <= 16'h0FDF;
                 7: rom <= 16'h01A1;  8: rom <= 16'h0AAA;  9: rom <= 16'h0BBB; 10: rom <= 16'h0FCF; 11: rom <= 16'h0FCF; 12: rom <= 16'h0FDF; 13: rom <= 16'h0FCF;
                14: rom <= 16'h0C8C; 15: rom <= 16'h0FDF; 16: rom <= 16'h0FCF; 17: rom <= 16'h0FCF; 18: rom <= 16'h0D6D; 19: rom <= 16'h0A8A; 20: rom <= 16'h0A8A;
                21: rom <= 16'h0E1E; 22: rom <= 16'h0FDF; 23: rom <= 16'h0FCF; 24: rom <= 16'h0FCF; 25: rom <= 16'h0282; 26: rom <= 16'h0000; 27: rom <= 16'h0000;
                28: rom <= 16'h0E2E; 29: rom <= 16'h1000; 30: rom <= 16'h0FDF; 31: rom <= 16'h0A8A; 32: rom <= 16'h0000; 33: rom <= 16'h0000; 34: rom <= 16'h0000;
                35: rom <= 16'h0969; 36: rom <= 16'h0FDF; 37: rom <= 16'h0FCF; 38: rom <= 16'h0A8A; 39: rom <= 16'h0000; 40: rom <= 16'h0000; 41: rom <= 16'h0000;
                42: rom <= 16'h0717; 43: rom <= 16'h0FDF; 44: rom <= 16'h0FCF; 45: rom <= 16'h0A8A; 46: rom <= 16'h0000; 47: rom <= 16'h0000; 48: rom <= 16'h0000;
                49: rom <= 16'hFD01; 50: rom <= 16'h01CD; 51: rom <= 16'hFEFC;
                52: rom <= 16'hFFC4; 53: rom <= 16'hFF30; 54: rom <= 16'hFDB4;
                55: rom <= 16'hFEDD; 56: rom <= 16'hFFBC; 57: rom <= 16'hFCFD;
          default:  rom <=  16'h0000;
        endcase
end

assign dout = rom;





endmodule