data/full_repos/permissive/434840709/作业/加减法器/cg.v
1: b"%Error: data/full_repos/permissive/434840709/\xe4\xbd\x9c\xe4\xb8\x9a/\xe5\x8a\xa0\xe5\x87\x8f\xe6\xb3\x95\xe5\x99\xa8/cg.v:19: Cannot find file containing module: 'add16'\nadd16 A16_1(a[15:0],b1[15:0],sub,result[15:0],x);\n^~~~~\n        ... Looked in:\n             data/full_repos/permissive/434840709/\xe4\xbd\x9c\xe4\xb8\x9a/\xe5\x8a\xa0\xe5\x87\x8f\xe6\xb3\x95\xe5\x99\xa8,data/full_repos/permissive/434840709/add16\n             data/full_repos/permissive/434840709/\xe4\xbd\x9c\xe4\xb8\x9a/\xe5\x8a\xa0\xe5\x87\x8f\xe6\xb3\x95\xe5\x99\xa8,data/full_repos/permissive/434840709/add16.v\n             data/full_repos/permissive/434840709/\xe4\xbd\x9c\xe4\xb8\x9a/\xe5\x8a\xa0\xe5\x87\x8f\xe6\xb3\x95\xe5\x99\xa8,data/full_repos/permissive/434840709/add16.sv\n             add16\n             add16.v\n             add16.sv\n             obj_dir/add16\n             obj_dir/add16.v\n             obj_dir/add16.sv\n%Error: data/full_repos/permissive/434840709/\xe4\xbd\x9c\xe4\xb8\x9a/\xe5\x8a\xa0\xe5\x87\x8f\xe6\xb3\x95\xe5\x99\xa8/cg.v:20: Cannot find file containing module: 'add16'\nadd16 A16_2(a[31:16],b1[31:16],x,result[31:16],y);\n^~~~~\n%Error: Exiting due to 2 error(s)\n"
module top_module(

               input [31:0] a,

               input [31:0] b,

               input sub,

               output [31:0] result

       );


wire x,y;
wire[31:0] sub1 = {32{sub}};
wire[31:0] b1;
assign b1= b^sub1;

add16 A16_1(a[15:0],b1[15:0],sub,result[15:0],x);
add16 A16_2(a[31:16],b1[31:16],x,result[31:16],y);


endmodule
module top_module(

               input [31:0] a,

               input [31:0] b,

               input sub,

               output [31:0] result

       );



wire x,y;
wire[31:0] sub1 = {32{sub}};
wire[31:0] b1;
assign b1= b^sub1;

add16 A16_1(a[15:0],b1[15:0],sub,result[15:0],x);
add16 A16_2(a[31:16],b1[31:16],x,result[31:16],y);


endmodule