data/full_repos/permissive/493019833/test/testcase/firrtl/DutWithLogging/reference/DutWithLogging.v
data/verilator_xmls/0f108714-102d-4200-9556-fb6c7332a48b.xml
module DutWithLogging(
    input clock,
    input reset
);
endmodule
module DutWithLogging(
    input clock,
    input reset
);

endmodule