data/full_repos/permissive/426864978/lab1/task4/datapath.sv
1: b"%Error: data/full_repos/permissive/426864978/lab1/task4/datapath.sv:20: Cannot find file containing module: 'dealcard'\n    dealcard dc(fast_clock, resetb, new_card);\n    ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/426864978/lab1/task4,data/full_repos/permissive/426864978/dealcard\n             data/full_repos/permissive/426864978/lab1/task4,data/full_repos/permissive/426864978/dealcard.v\n             data/full_repos/permissive/426864978/lab1/task4,data/full_repos/permissive/426864978/dealcard.sv\n             dealcard\n             dealcard.v\n             dealcard.sv\n             obj_dir/dealcard\n             obj_dir/dealcard.v\n             obj_dir/dealcard.sv\n%Error: data/full_repos/permissive/426864978/lab1/task4/datapath.sv:22: Cannot find file containing module: 'reg4'\n    reg4 preg1(slow_clock, load_pcard1, resetb, new_card, pcard1);\n    ^~~~\n%Error: data/full_repos/permissive/426864978/lab1/task4/datapath.sv:23: Cannot find file containing module: 'reg4'\n    reg4 preg2(slow_clock, load_pcard2, resetb, new_card, pcard2);\n    ^~~~\n%Error: data/full_repos/permissive/426864978/lab1/task4/datapath.sv:24: Cannot find file containing module: 'reg4'\n    reg4 preg3(slow_clock, load_pcard3, resetb, new_card, pcard3);\n    ^~~~\n%Error: data/full_repos/permissive/426864978/lab1/task4/datapath.sv:25: Cannot find file containing module: 'reg4'\n    reg4 dreg1(slow_clock, load_dcard1, resetb, new_card, dcard1);\n    ^~~~\n%Error: data/full_repos/permissive/426864978/lab1/task4/datapath.sv:26: Cannot find file containing module: 'reg4'\n    reg4 dreg2(slow_clock, load_dcard2, resetb, new_card, dcard2);\n    ^~~~\n%Error: data/full_repos/permissive/426864978/lab1/task4/datapath.sv:27: Cannot find file containing module: 'reg4'\n    reg4 dreg3(slow_clock, load_dcard3, resetb, new_card, dcard3);\n    ^~~~\n%Error: data/full_repos/permissive/426864978/lab1/task4/datapath.sv:29: Cannot find file containing module: 'card7seg'\n    card7seg pled1(pcard1, HEX0);\n    ^~~~~~~~\n%Error: data/full_repos/permissive/426864978/lab1/task4/datapath.sv:30: Cannot find file containing module: 'card7seg'\n    card7seg pled2(pcard2, HEX1);\n    ^~~~~~~~\n%Error: data/full_repos/permissive/426864978/lab1/task4/datapath.sv:31: Cannot find file containing module: 'card7seg'\n    card7seg pled3(pcard3, HEX2);\n    ^~~~~~~~\n%Error: data/full_repos/permissive/426864978/lab1/task4/datapath.sv:32: Cannot find file containing module: 'card7seg'\n    card7seg dled1(dcard1, HEX3);\n    ^~~~~~~~\n%Error: data/full_repos/permissive/426864978/lab1/task4/datapath.sv:33: Cannot find file containing module: 'card7seg'\n    card7seg dled2(dcard2, HEX4);\n    ^~~~~~~~\n%Error: data/full_repos/permissive/426864978/lab1/task4/datapath.sv:34: Cannot find file containing module: 'card7seg'\n    card7seg dled3(dcard3, HEX5);\n    ^~~~~~~~\n%Error: data/full_repos/permissive/426864978/lab1/task4/datapath.sv:36: Cannot find file containing module: 'scorehand'\n    scorehand psum(pcard1, pcard2, pcard3, pscore_out);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/426864978/lab1/task4/datapath.sv:37: Cannot find file containing module: 'scorehand'\n    scorehand dsum(dcard1, dcard2, dcard3, dscore_out);\n    ^~~~~~~~~\n%Error: Exiting due to 15 error(s)\n"
module datapath(input slow_clock, input fast_clock, input resetb,
                input load_pcard1, input load_pcard2, input load_pcard3,
                input load_dcard1, input load_dcard2, input load_dcard3,
                output [3:0] pcard3_out,
                output [3:0] pscore_out, output [3:0] dscore_out,
                output[6:0] HEX5, output[6:0] HEX4, output[6:0] HEX3,
                output[6:0] HEX2, output[6:0] HEX1, output[6:0] HEX0);
						







    wire [3:0] new_card, pcard1, pcard2, pcard3, dcard1, dcard2, dcard3;

    assign pcard3_out = pcard3;

    dealcard dc(fast_clock, resetb, new_card);

    reg4 preg1(slow_clock, load_pcard1, resetb, new_card, pcard1);
    reg4 preg2(slow_clock, load_pcard2, resetb, new_card, pcard2);
    reg4 preg3(slow_clock, load_pcard3, resetb, new_card, pcard3);
    reg4 dreg1(slow_clock, load_dcard1, resetb, new_card, dcard1);
    reg4 dreg2(slow_clock, load_dcard2, resetb, new_card, dcard2);
    reg4 dreg3(slow_clock, load_dcard3, resetb, new_card, dcard3);

    card7seg pled1(pcard1, HEX0);
    card7seg pled2(pcard2, HEX1);
    card7seg pled3(pcard3, HEX2);
    card7seg dled1(dcard1, HEX3);
    card7seg dled2(dcard2, HEX4);
    card7seg dled3(dcard3, HEX5);

    scorehand psum(pcard1, pcard2, pcard3, pscore_out);
    scorehand dsum(dcard1, dcard2, dcard3, dscore_out);

endmodule
module datapath(input slow_clock, input fast_clock, input resetb,
                input load_pcard1, input load_pcard2, input load_pcard3,
                input load_dcard1, input load_dcard2, input load_dcard3,
                output [3:0] pcard3_out,
                output [3:0] pscore_out, output [3:0] dscore_out,
                output[6:0] HEX5, output[6:0] HEX4, output[6:0] HEX3,
                output[6:0] HEX2, output[6:0] HEX1, output[6:0] HEX0);

						







    wire [3:0] new_card, pcard1, pcard2, pcard3, dcard1, dcard2, dcard3;

    assign pcard3_out = pcard3;

    dealcard dc(fast_clock, resetb, new_card);

    reg4 preg1(slow_clock, load_pcard1, resetb, new_card, pcard1);
    reg4 preg2(slow_clock, load_pcard2, resetb, new_card, pcard2);
    reg4 preg3(slow_clock, load_pcard3, resetb, new_card, pcard3);
    reg4 dreg1(slow_clock, load_dcard1, resetb, new_card, dcard1);
    reg4 dreg2(slow_clock, load_dcard2, resetb, new_card, dcard2);
    reg4 dreg3(slow_clock, load_dcard3, resetb, new_card, dcard3);

    card7seg pled1(pcard1, HEX0);
    card7seg pled2(pcard2, HEX1);
    card7seg pled3(pcard3, HEX2);
    card7seg dled1(dcard1, HEX3);
    card7seg dled2(dcard2, HEX4);
    card7seg dled3(dcard3, HEX5);

    scorehand psum(pcard1, pcard2, pcard3, pscore_out);
    scorehand dsum(dcard1, dcard2, dcard3, dscore_out);

endmodule