data/full_repos/permissive/412284801/half_adder/half_adder_rtl.v
data/verilator_xmls/d9656741-75a0-4816-a2c5-b387f184b405.xml
module half_adder_rtl
( output reg cout,sum,
  input a,b
  );

always@*
begin  

cout=a&b;

sum=a^b;

end

endmodule
module half_adder_rtl
( output reg cout,sum,
  input a,b
  );


always@*
begin  

cout=a&b;

sum=a^b;

end

endmodule