data/full_repos/permissive/405799749/amg_new/mult/Unsigned/9/5/Simple_PPG/Wallace_tree/Han-Carlson_adder/module.v
data/verilator_xmls/72e5ceb7-1230-456d-98d4-39e8ca0391a6.xml
module UBPriHCA_12_4(S, X, Y, Cin);
  output [13:4] S;
  input Cin;
  input [12:4] X;
  input [12:4] Y;
  wire [12:4] G0;
  wire [12:4] G1;
  wire [12:4] G2;
  wire [12:4] G3;
  wire [12:4] G4;
  wire [12:4] G5;
  wire [12:4] P0;
  wire [12:4] P1;
  wire [12:4] P2;
  wire [12:4] P3;
  wire [12:4] P4;
  wire [12:4] P5;
  assign P1[4] = P0[4];
  assign G1[4] = G0[4];
  assign P1[6] = P0[6];
  assign G1[6] = G0[6];
  assign P1[8] = P0[8];
  assign G1[8] = G0[8];
  assign P1[10] = P0[10];
  assign G1[10] = G0[10];
  assign P1[12] = P0[12];
  assign G1[12] = G0[12];
  assign P2[4] = P1[4];
  assign G2[4] = G1[4];
  assign P2[5] = P1[5];
  assign G2[5] = G1[5];
  assign P2[6] = P1[6];
  assign G2[6] = G1[6];
  assign P2[8] = P1[8];
  assign G2[8] = G1[8];
  assign P2[10] = P1[10];
  assign G2[10] = G1[10];
  assign P2[12] = P1[12];
  assign G2[12] = G1[12];
  assign P3[4] = P2[4];
  assign G3[4] = G2[4];
  assign P3[5] = P2[5];
  assign G3[5] = G2[5];
  assign P3[6] = P2[6];
  assign G3[6] = G2[6];
  assign P3[7] = P2[7];
  assign G3[7] = G2[7];
  assign P3[8] = P2[8];
  assign G3[8] = G2[8];
  assign P3[10] = P2[10];
  assign G3[10] = G2[10];
  assign P3[12] = P2[12];
  assign G3[12] = G2[12];
  assign P4[4] = P3[4];
  assign G4[4] = G3[4];
  assign P4[5] = P3[5];
  assign G4[5] = G3[5];
  assign P4[6] = P3[6];
  assign G4[6] = G3[6];
  assign P4[7] = P3[7];
  assign G4[7] = G3[7];
  assign P4[8] = P3[8];
  assign G4[8] = G3[8];
  assign P4[9] = P3[9];
  assign G4[9] = G3[9];
  assign P4[10] = P3[10];
  assign G4[10] = G3[10];
  assign P4[11] = P3[11];
  assign G4[11] = G3[11];
  assign P4[12] = P3[12];
  assign G4[12] = G3[12];
  assign P5[4] = P4[4];
  assign G5[4] = G4[4];
  assign P5[5] = P4[5];
  assign G5[5] = G4[5];
  assign P5[7] = P4[7];
  assign G5[7] = G4[7];
  assign P5[9] = P4[9];
  assign G5[9] = G4[9];
  assign P5[11] = P4[11];
  assign G5[11] = G4[11];
  assign S[4] = Cin ^ P0[4];
  assign S[5] = ( G5[4] | ( P5[4] & Cin ) ) ^ P0[5];
  assign S[6] = ( G5[5] | ( P5[5] & Cin ) ) ^ P0[6];
  assign S[7] = ( G5[6] | ( P5[6] & Cin ) ) ^ P0[7];
  assign S[8] = ( G5[7] | ( P5[7] & Cin ) ) ^ P0[8];
  assign S[9] = ( G5[8] | ( P5[8] & Cin ) ) ^ P0[9];
  assign S[10] = ( G5[9] | ( P5[9] & Cin ) ) ^ P0[10];
  assign S[11] = ( G5[10] | ( P5[10] & Cin ) ) ^ P0[11];
  assign S[12] = ( G5[11] | ( P5[11] & Cin ) ) ^ P0[12];
  assign S[13] = G5[12] | ( P5[12] & Cin );
  GPGenerator U0 (G0[4], P0[4], X[4], Y[4]);
  GPGenerator U1 (G0[5], P0[5], X[5], Y[5]);
  GPGenerator U2 (G0[6], P0[6], X[6], Y[6]);
  GPGenerator U3 (G0[7], P0[7], X[7], Y[7]);
  GPGenerator U4 (G0[8], P0[8], X[8], Y[8]);
  GPGenerator U5 (G0[9], P0[9], X[9], Y[9]);
  GPGenerator U6 (G0[10], P0[10], X[10], Y[10]);
  GPGenerator U7 (G0[11], P0[11], X[11], Y[11]);
  GPGenerator U8 (G0[12], P0[12], X[12], Y[12]);
  CarryOperator U9 (G1[5], P1[5], G0[5], P0[5], G0[4], P0[4]);
  CarryOperator U10 (G1[7], P1[7], G0[7], P0[7], G0[6], P0[6]);
  CarryOperator U11 (G1[9], P1[9], G0[9], P0[9], G0[8], P0[8]);
  CarryOperator U12 (G1[11], P1[11], G0[11], P0[11], G0[10], P0[10]);
  CarryOperator U13 (G2[7], P2[7], G1[7], P1[7], G1[5], P1[5]);
  CarryOperator U14 (G2[9], P2[9], G1[9], P1[9], G1[7], P1[7]);
  CarryOperator U15 (G2[11], P2[11], G1[11], P1[11], G1[9], P1[9]);
  CarryOperator U16 (G3[9], P3[9], G2[9], P2[9], G2[5], P2[5]);
  CarryOperator U17 (G3[11], P3[11], G2[11], P2[11], G2[7], P2[7]);
  CarryOperator U18 (G5[6], P5[6], G4[6], P4[6], G4[5], P4[5]);
  CarryOperator U19 (G5[8], P5[8], G4[8], P4[8], G4[7], P4[7]);
  CarryOperator U20 (G5[10], P5[10], G4[10], P4[10], G4[9], P4[9]);
  CarryOperator U21 (G5[12], P5[12], G4[12], P4[12], G4[11], P4[11]);
endmodule
module UBPriHCA_12_4(S, X, Y, Cin);

  output [13:4] S;
  input Cin;
  input [12:4] X;
  input [12:4] Y;
  wire [12:4] G0;
  wire [12:4] G1;
  wire [12:4] G2;
  wire [12:4] G3;
  wire [12:4] G4;
  wire [12:4] G5;
  wire [12:4] P0;
  wire [12:4] P1;
  wire [12:4] P2;
  wire [12:4] P3;
  wire [12:4] P4;
  wire [12:4] P5;
  assign P1[4] = P0[4];
  assign G1[4] = G0[4];
  assign P1[6] = P0[6];
  assign G1[6] = G0[6];
  assign P1[8] = P0[8];
  assign G1[8] = G0[8];
  assign P1[10] = P0[10];
  assign G1[10] = G0[10];
  assign P1[12] = P0[12];
  assign G1[12] = G0[12];
  assign P2[4] = P1[4];
  assign G2[4] = G1[4];
  assign P2[5] = P1[5];
  assign G2[5] = G1[5];
  assign P2[6] = P1[6];
  assign G2[6] = G1[6];
  assign P2[8] = P1[8];
  assign G2[8] = G1[8];
  assign P2[10] = P1[10];
  assign G2[10] = G1[10];
  assign P2[12] = P1[12];
  assign G2[12] = G1[12];
  assign P3[4] = P2[4];
  assign G3[4] = G2[4];
  assign P3[5] = P2[5];
  assign G3[5] = G2[5];
  assign P3[6] = P2[6];
  assign G3[6] = G2[6];
  assign P3[7] = P2[7];
  assign G3[7] = G2[7];
  assign P3[8] = P2[8];
  assign G3[8] = G2[8];
  assign P3[10] = P2[10];
  assign G3[10] = G2[10];
  assign P3[12] = P2[12];
  assign G3[12] = G2[12];
  assign P4[4] = P3[4];
  assign G4[4] = G3[4];
  assign P4[5] = P3[5];
  assign G4[5] = G3[5];
  assign P4[6] = P3[6];
  assign G4[6] = G3[6];
  assign P4[7] = P3[7];
  assign G4[7] = G3[7];
  assign P4[8] = P3[8];
  assign G4[8] = G3[8];
  assign P4[9] = P3[9];
  assign G4[9] = G3[9];
  assign P4[10] = P3[10];
  assign G4[10] = G3[10];
  assign P4[11] = P3[11];
  assign G4[11] = G3[11];
  assign P4[12] = P3[12];
  assign G4[12] = G3[12];
  assign P5[4] = P4[4];
  assign G5[4] = G4[4];
  assign P5[5] = P4[5];
  assign G5[5] = G4[5];
  assign P5[7] = P4[7];
  assign G5[7] = G4[7];
  assign P5[9] = P4[9];
  assign G5[9] = G4[9];
  assign P5[11] = P4[11];
  assign G5[11] = G4[11];
  assign S[4] = Cin ^ P0[4];
  assign S[5] = ( G5[4] | ( P5[4] & Cin ) ) ^ P0[5];
  assign S[6] = ( G5[5] | ( P5[5] & Cin ) ) ^ P0[6];
  assign S[7] = ( G5[6] | ( P5[6] & Cin ) ) ^ P0[7];
  assign S[8] = ( G5[7] | ( P5[7] & Cin ) ) ^ P0[8];
  assign S[9] = ( G5[8] | ( P5[8] & Cin ) ) ^ P0[9];
  assign S[10] = ( G5[9] | ( P5[9] & Cin ) ) ^ P0[10];
  assign S[11] = ( G5[10] | ( P5[10] & Cin ) ) ^ P0[11];
  assign S[12] = ( G5[11] | ( P5[11] & Cin ) ) ^ P0[12];
  assign S[13] = G5[12] | ( P5[12] & Cin );
  GPGenerator U0 (G0[4], P0[4], X[4], Y[4]);
  GPGenerator U1 (G0[5], P0[5], X[5], Y[5]);
  GPGenerator U2 (G0[6], P0[6], X[6], Y[6]);
  GPGenerator U3 (G0[7], P0[7], X[7], Y[7]);
  GPGenerator U4 (G0[8], P0[8], X[8], Y[8]);
  GPGenerator U5 (G0[9], P0[9], X[9], Y[9]);
  GPGenerator U6 (G0[10], P0[10], X[10], Y[10]);
  GPGenerator U7 (G0[11], P0[11], X[11], Y[11]);
  GPGenerator U8 (G0[12], P0[12], X[12], Y[12]);
  CarryOperator U9 (G1[5], P1[5], G0[5], P0[5], G0[4], P0[4]);
  CarryOperator U10 (G1[7], P1[7], G0[7], P0[7], G0[6], P0[6]);
  CarryOperator U11 (G1[9], P1[9], G0[9], P0[9], G0[8], P0[8]);
  CarryOperator U12 (G1[11], P1[11], G0[11], P0[11], G0[10], P0[10]);
  CarryOperator U13 (G2[7], P2[7], G1[7], P1[7], G1[5], P1[5]);
  CarryOperator U14 (G2[9], P2[9], G1[9], P1[9], G1[7], P1[7]);
  CarryOperator U15 (G2[11], P2[11], G1[11], P1[11], G1[9], P1[9]);
  CarryOperator U16 (G3[9], P3[9], G2[9], P2[9], G2[5], P2[5]);
  CarryOperator U17 (G3[11], P3[11], G2[11], P2[11], G2[7], P2[7]);
  CarryOperator U18 (G5[6], P5[6], G4[6], P4[6], G4[5], P4[5]);
  CarryOperator U19 (G5[8], P5[8], G4[8], P4[8], G4[7], P4[7]);
  CarryOperator U20 (G5[10], P5[10], G4[10], P4[10], G4[9], P4[9]);
  CarryOperator U21 (G5[12], P5[12], G4[12], P4[12], G4[11], P4[11]);
endmodule