data/full_repos/permissive/439087417/ROM_Mem.v
data/verilator_xmls/8fc45627-e468-4e0f-a7d6-913e10f43b40.xml
module ROM_Mem #(parameter aw='h10, dw=8, file="rom_file_arctan.txt")
(	input clk, rst_b,
	input [aw-1:0] addr,
	output reg [dw-1:0] data
    );

reg [dw-1:0] mem[0:2**aw-1];

initial $readmemh(file, mem, 0, 2**aw-1);

always @(posedge clk, negedge rst_b) begin
	if(rst_b == 0) data <= 0;
	else data <= mem[addr];
end

endmodule
module ROM_Mem #(parameter aw='h10, dw=8, file="rom_file_arctan.txt")
(	input clk, rst_b,
	input [aw-1:0] addr,
	output reg [dw-1:0] data
    );


reg [dw-1:0] mem[0:2**aw-1];

initial $readmemh(file, mem, 0, 2**aw-1);

always @(posedge clk, negedge rst_b) begin
	if(rst_b == 0) data <= 0;
	else data <= mem[addr];
end

endmodule