data/full_repos/permissive/519567026/Simulation File/MIPS_Single_Cycle.srcs/sources_1/new/Instruction_memory.v
1: b'%Error: Cannot find file containing module: File/MIPS_Single_Cycle.srcs/sources_1/new,data/full_repos/permissive/519567026\n        ... Looked in:\n             data/full_repos/permissive/519567026/Simulation/File/MIPS_Single_Cycle.srcs/sources_1/new,data/full_repos/permissive/519567026\n             data/full_repos/permissive/519567026/Simulation/File/MIPS_Single_Cycle.srcs/sources_1/new,data/full_repos/permissive/519567026.v\n             data/full_repos/permissive/519567026/Simulation/File/MIPS_Single_Cycle.srcs/sources_1/new,data/full_repos/permissive/519567026.sv\n             File/MIPS_Single_Cycle.srcs/sources_1/new,data/full_repos/permissive/519567026\n             File/MIPS_Single_Cycle.srcs/sources_1/new,data/full_repos/permissive/519567026.v\n             File/MIPS_Single_Cycle.srcs/sources_1/new,data/full_repos/permissive/519567026.sv\n             obj_dir/File/MIPS_Single_Cycle.srcs/sources_1/new,data/full_repos/permissive/519567026\n             obj_dir/File/MIPS_Single_Cycle.srcs/sources_1/new,data/full_repos/permissive/519567026.v\n             obj_dir/File/MIPS_Single_Cycle.srcs/sources_1/new,data/full_repos/permissive/519567026.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/519567026/Simulation\n%Error: Cannot find file containing module: File/MIPS_Single_Cycle.srcs/sources_1/new/Instruction_memory.v\n%Error: Exiting due to 3 error(s)\n'
module Instruction_memory (

    input [31:0] addr,
    output reg [5:0] ctr,
    output reg [5:0] funcode,
    output reg [31:0] instruction
);

  parameter SIZE_IM = 128;
  reg [31:0] Imem[SIZE_IM-1:0];

  integer n;
  initial begin
    for (n = 0; n < SIZE_IM; n = n + 1) begin
      Imem[n] = 32'b11111100000000000000000000000000;
    end
    $readmemb("instructions.mem", Imem);

    instruction = 32'b11111100000000000000000000000000;
  end

  always @(addr) begin
    if (addr == -4) begin
      instruction = 32'b11111100000000000000000000000000;
    end else begin
      instruction = Imem[addr>>2];
    end
    ctr = instruction[31:26];
    funcode = instruction[5:0];
  end

endmodule
module Instruction_memory (

    input [31:0] addr,
    output reg [5:0] ctr,
    output reg [5:0] funcode,
    output reg [31:0] instruction
);


  parameter SIZE_IM = 128;
  reg [31:0] Imem[SIZE_IM-1:0];

  integer n;
  initial begin
    for (n = 0; n < SIZE_IM; n = n + 1) begin
      Imem[n] = 32'b11111100000000000000000000000000;
    end
    $readmemb("instructions.mem", Imem);

    instruction = 32'b11111100000000000000000000000000;
  end

  always @(addr) begin
    if (addr == -4) begin
      instruction = 32'b11111100000000000000000000000000;
    end else begin
      instruction = Imem[addr>>2];
    end
    ctr = instruction[31:26];
    funcode = instruction[5:0];
  end

endmodule