data/full_repos/permissive/489147019/Testcases/mempool/rtl/snitch/src/snitch_pkg.sv
1: b"%Error: data/full_repos/permissive/489147019/Testcases/mempool/rtl/snitch/src/snitch_pkg.sv:8: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\n  import cf_math_pkg::idx_width;\n         ^~~~~~~~~~~\n%Error: data/full_repos/permissive/489147019/Testcases/mempool/rtl/snitch/src/snitch_pkg.sv:129: syntax error, unexpected ::, expecting ',' or ':'\n      riscv_instr::MUL,\n                 ^~\n                                                                                               : ... Perhaps 'riscv_instr' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/489147019/Testcases/mempool/rtl/snitch/src/snitch_pkg.sv:156: syntax error, unexpected endpackage\nendpackage\n^~~~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
function automatic logic is_ssr(logic [4:0] register);
    unique case (register)
      FT0, FT1: return 1'b1;
      default : return 0;
    endcase
  endfunction
function automatic logic is_ssr(logic [4:0] register);

    unique case (register)
      FT0, FT1: return 1'b1;
      default : return 0;
    endcase
  endfunction