data/full_repos/permissive/412284801/adders/halfadder/b_halfadder.v
data/verilator_xmls/84966d6d-39ed-498d-9d2f-62d4d03859bf.xml
module b_halfadder(a,b,sum,cout);
    input a,b;
    output reg sum,cout;
    always@(*)begin
        sum = a ^ b; 
        cout = a & b;
    end
endmodule
module b_halfadder(a,b,sum,cout);

    input a,b;
    output reg sum,cout;
    always@(*)begin
        sum = a ^ b; 
        cout = a & b;
    end
endmodule