data/full_repos/permissive/427221126/workspace/mult_booth.sv
data/verilator_xmls/8c0f0c4b-8478-4475-9fde-3cb583000ab9.xml
module full_adder(
    input a,
    input b,
    input cin,
    output cout,
    output s
);

assign s = a ^ b ^ cin;
assign cout = a & b | (cin & (a ^ b));

endmodule
module full_adder(
    input a,
    input b,
    input cin,
    output cout,
    output s
);


assign s = a ^ b ^ cin;
assign cout = a & b | (cin & (a ^ b));

endmodule