data/full_repos/permissive/405799749/amg_new/mult/Unsigned/9/5/Simple_PPG/Wallace_tree/Han-Carlson_adder/module.v
data/verilator_xmls/72e5ceb7-1230-456d-98d4-39e8ca0391a6.xml
module Multiplier_8_0_4_000(P, IN1, IN2);
  output [13:0] P;
  input [8:0] IN1;
  input [4:0] IN2;
  wire [13:0] W;
  assign P[0] = W[0];
  assign P[1] = W[1];
  assign P[2] = W[2];
  assign P[3] = W[3];
  assign P[4] = W[4];
  assign P[5] = W[5];
  assign P[6] = W[6];
  assign P[7] = W[7];
  assign P[8] = W[8];
  assign P[9] = W[9];
  assign P[10] = W[10];
  assign P[11] = W[11];
  assign P[12] = W[12];
  assign P[13] = W[13];
  MultUB_STD_WAL_HC000 U0 (W, IN1, IN2);
endmodule
module Multiplier_8_0_4_000(P, IN1, IN2);

  output [13:0] P;
  input [8:0] IN1;
  input [4:0] IN2;
  wire [13:0] W;
  assign P[0] = W[0];
  assign P[1] = W[1];
  assign P[2] = W[2];
  assign P[3] = W[3];
  assign P[4] = W[4];
  assign P[5] = W[5];
  assign P[6] = W[6];
  assign P[7] = W[7];
  assign P[8] = W[8];
  assign P[9] = W[9];
  assign P[10] = W[10];
  assign P[11] = W[11];
  assign P[12] = W[12];
  assign P[13] = W[13];
  MultUB_STD_WAL_HC000 U0 (W, IN1, IN2);
endmodule