data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v
1: b'%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:21: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s SEL generates 5 bits.\n                                                                                             : ... In instance BarrelShifter\n      shiftAmount = IR[11:7];\n                  ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:28: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s SEL generates 6 bits.\n                                                                                             : ... In instance BarrelShifter\n      shiftAmount = Rs[5:0];\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:35: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s SEL generates 8 bits.\n                                                                                             : ... In instance BarrelShifter\n    shiftVal = IR[7:0];\n             ^\n%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:52: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s SEL generates 5 bits.\n                                                                                             : ... In instance BarrelShifter\n    shiftAmount =  IR[11:7];\n                ^\n%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:58: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s MUL generates 33 bits.\n                                                                                             : ... In instance BarrelShifter\n    _Out = 4*{IR[23],IR[23],IR[23],IR[23],IR[23],IR[23],IR[23],IR[23],IR[23],IR[23:0]};\n         ^\n%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:84: Operator SUB expects 32 bits on the RHS, but RHS\'s SEL generates 5 bits.\n                                                                                             : ... In instance BarrelShifter\n    for(i = 0; i <= 32 - shiftAmount[4:0] ;i = i + 1) begin\n                       ^\n%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:85: Operator SUB expects 32 bits on the RHS, but RHS\'s SEL generates 5 bits.\n                                                                                             : ... In instance BarrelShifter\n      temp2[32-i] = temp[32-i-shiftAmount[4:0] ] ; \n                             ^\n%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:100: Operator SUB expects 32 bits on the RHS, but RHS\'s SEL generates 5 bits.\n                                                                                              : ... In instance BarrelShifter\n    for(i = 0; i <= 32-shiftAmount[4:0] ;i = i + 1) begin\n                      ^\n%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:101: Operator ADD expects 32 bits on the RHS, but RHS\'s SEL generates 5 bits.\n                                                                                              : ... In instance BarrelShifter\n      temp2[i] = temp[i+shiftAmount[4:0] ] ; \n                       ^\n%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:111: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 31 bits.\n                                                                                              : ... In instance BarrelShifter\n      _Out = {shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],\n           ^\n%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:121: Operator ASSIGN expects 33 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 32 bits.\n                                                                                              : ... In instance BarrelShifter\n      {_SR29_OUT,_Out} = {shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],\n                       ^\n%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:132: Operator ASSIGN expects 33 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 32 bits.\n                                                                                              : ... In instance BarrelShifter\n    temp2 = {shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],\n          ^\n%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:139: Operator SUB expects 32 bits on the RHS, but RHS\'s SEL generates 5 bits.\n                                                                                              : ... In instance BarrelShifter\n    for(i = 0; i <= 32-shiftAmount[4:0] ;i = i + 1) begin\n                      ^\n%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:140: Operator ADD expects 32 bits on the RHS, but RHS\'s SEL generates 5 bits.\n                                                                                              : ... In instance BarrelShifter\n      temp2[i] = temp[i+shiftAmount[4:0] ] ; \n                       ^\n%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:151: Operator ADD expects 32 bits on the RHS, but RHS\'s SEL generates 5 bits.\n                                                                                              : ... In instance BarrelShifter\n      temp2[i] = temp[(i+shiftAmount[4:0])%33] ; \n                        ^\n%Warning-WIDTH: data/full_repos/permissive/51595169/VerilogSource/ALLBUTCU/BarrelShifter.v:152: Operator ADD expects 32 bits on the RHS, but RHS\'s SEL generates 5 bits.\n                                                                                              : ... In instance BarrelShifter\n      $display("[%3d]=[%3d]",i,(i+shiftAmount[4:0])%33);\n                                 ^\n%Error: Exiting due to 16 warning(s)\n'
module BarrelShifter(input [31:0] Rs,Rm,IR,input SR29_IN,output SR29_OUT,output [31:0] Out);

reg [31:0] shiftVal,shiftAmount;
reg [1:0]  shiftType;
always@(IR or Rm or Rs or SR29_IN)
begin 
	case(IR[27:25])
		3'b000:
			begin
				if(!IR[4])
					begin
						$display("Immediate Rm");
						shiftVal = Rm;
						shiftAmount = IR[11:7];
						shiftType = IR[6:5];
					end
				else
					begin
						$display("Registe rm");
						shiftVal = Rm;
						shiftAmount = Rs[5:0];
						shiftType = IR[6:5];
					end
			end
		3'b001:
			begin
				$display("Imediate IR[7:0]");
				shiftVal = IR[7:0];
				shiftAmount = IR[11:8]*2;
				shiftType = 2'b11;
			end
		3'b010:
			begin
				$display("Load/Store-Immediate Rm");
				_Out = {IR[11],IR[11],IR[11],IR[11],IR[11],
						IR[11],IR[11],IR[11],IR[11],IR[11],
						IR[11],IR[11],IR[11],IR[11],IR[11],
						IR[11],IR[11],IR[11],IR[11],IR[11],
						IR[11:0]};
			end
		3'b011:
			begin
				$display("Load/Store-offsett/index Rm");
				shiftVal = Rm;
				shiftAmount =  IR[11:7];
				shiftType = IR[6:5];
			end
		3'b101:
			begin
				$display("Branch");
				_Out = 4*{IR[23],IR[23],IR[23],IR[23],IR[23],IR[23],IR[23],IR[23],IR[23],IR[23:0]};
			end
	endcase
end

reg [32:0] temp,temp2;
reg [31:0] _Out;
reg _SR29_OUT;
integer i=0;

assign Out = _Out;
assign SR29_OUT = _SR29_OUT;

always@(*)
begin
	case(shiftType)
		2'b00:
			begin
				$display("LSL");
				if(shiftAmount==32)
					_Out = 0 ;
				else if (shiftAmount>=33)
					{_SR29_OUT,_Out} = 0 ;
				else begin
				temp = {SR29_IN,shiftVal };
				temp2 = 0;				
				for(i = 0; i <= 32 - shiftAmount[4:0] ;i = i + 1) begin
						temp2[32-i] = temp[32-i-shiftAmount[4:0] ] ; 
				end
				{_SR29_OUT,_Out} = temp2; 
				end
			end
		2'b01:	
			begin
				$display("LSR");
				if(shiftAmount==32)
					_Out = 0 ;
				else if (shiftAmount>=33)
					{_SR29_OUT,_Out} = 0 ;
				else begin
				temp = {shiftVal,SR29_IN};
				temp2 = 0;				
				for(i = 0; i <= 32-shiftAmount[4:0] ;i = i + 1) begin
						temp2[i] = temp[i+shiftAmount[4:0] ] ; 
				end
				{_Out,_SR29_OUT} = temp2; 
				end
			end
		2'b10:
			begin 
				$display("ASR");
				if(shiftAmount==32)
					begin
						_Out = {shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31]};	
					end
				else if (shiftAmount>=33)
					begin
						{_SR29_OUT,_Out} = {shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31]};
					end
				else begin
				temp = {shiftVal,SR29_IN };

				temp2 = {shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
						 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
						 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
						 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
						 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
						 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
						 shiftVal[31],shiftVal[31]};				
				for(i = 0; i <= 32-shiftAmount[4:0] ;i = i + 1) begin
						temp2[i] = temp[i+shiftAmount[4:0] ] ; 
				end
				{_Out,_SR29_OUT} = temp2; 
				end
			end
		2'b11:
			begin
				$display("ROR");
				temp = {shiftVal,SR29_IN};
				temp2 = temp;				
				for(i = 0; i <= 32 ;i = i + 1) begin
						temp2[i] = temp[(i+shiftAmount[4:0])%33] ; 
						$display("[%3d]=[%3d]",i,(i+shiftAmount[4:0])%33);
				end
				{_Out,_SR29_OUT} = temp2; 
			end
	endcase
end

endmodule
module BarrelShifter(input [31:0] Rs,Rm,IR,input SR29_IN,output SR29_OUT,output [31:0] Out);


reg [31:0] shiftVal,shiftAmount;
reg [1:0]  shiftType;
always@(IR or Rm or Rs or SR29_IN)
begin 
	case(IR[27:25])
		3'b000:
			begin
				if(!IR[4])
					begin
						$display("Immediate Rm");
						shiftVal = Rm;
						shiftAmount = IR[11:7];
						shiftType = IR[6:5];
					end
				else
					begin
						$display("Registe rm");
						shiftVal = Rm;
						shiftAmount = Rs[5:0];
						shiftType = IR[6:5];
					end
			end
		3'b001:
			begin
				$display("Imediate IR[7:0]");
				shiftVal = IR[7:0];
				shiftAmount = IR[11:8]*2;
				shiftType = 2'b11;
			end
		3'b010:
			begin
				$display("Load/Store-Immediate Rm");
				_Out = {IR[11],IR[11],IR[11],IR[11],IR[11],
						IR[11],IR[11],IR[11],IR[11],IR[11],
						IR[11],IR[11],IR[11],IR[11],IR[11],
						IR[11],IR[11],IR[11],IR[11],IR[11],
						IR[11:0]};
			end
		3'b011:
			begin
				$display("Load/Store-offsett/index Rm");
				shiftVal = Rm;
				shiftAmount =  IR[11:7];
				shiftType = IR[6:5];
			end
		3'b101:
			begin
				$display("Branch");
				_Out = 4*{IR[23],IR[23],IR[23],IR[23],IR[23],IR[23],IR[23],IR[23],IR[23],IR[23:0]};
			end
	endcase
end

reg [32:0] temp,temp2;
reg [31:0] _Out;
reg _SR29_OUT;
integer i=0;

assign Out = _Out;
assign SR29_OUT = _SR29_OUT;

always@(*)
begin
	case(shiftType)
		2'b00:
			begin
				$display("LSL");
				if(shiftAmount==32)
					_Out = 0 ;
				else if (shiftAmount>=33)
					{_SR29_OUT,_Out} = 0 ;
				else begin
				temp = {SR29_IN,shiftVal };
				temp2 = 0;				
				for(i = 0; i <= 32 - shiftAmount[4:0] ;i = i + 1) begin
						temp2[32-i] = temp[32-i-shiftAmount[4:0] ] ; 
				end
				{_SR29_OUT,_Out} = temp2; 
				end
			end
		2'b01:	
			begin
				$display("LSR");
				if(shiftAmount==32)
					_Out = 0 ;
				else if (shiftAmount>=33)
					{_SR29_OUT,_Out} = 0 ;
				else begin
				temp = {shiftVal,SR29_IN};
				temp2 = 0;				
				for(i = 0; i <= 32-shiftAmount[4:0] ;i = i + 1) begin
						temp2[i] = temp[i+shiftAmount[4:0] ] ; 
				end
				{_Out,_SR29_OUT} = temp2; 
				end
			end
		2'b10:
			begin 
				$display("ASR");
				if(shiftAmount==32)
					begin
						_Out = {shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31]};	
					end
				else if (shiftAmount>=33)
					begin
						{_SR29_OUT,_Out} = {shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
							 shiftVal[31],shiftVal[31]};
					end
				else begin
				temp = {shiftVal,SR29_IN };

				temp2 = {shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
						 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
						 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
						 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
						 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
						 shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],shiftVal[31],
						 shiftVal[31],shiftVal[31]};				
				for(i = 0; i <= 32-shiftAmount[4:0] ;i = i + 1) begin
						temp2[i] = temp[i+shiftAmount[4:0] ] ; 
				end
				{_Out,_SR29_OUT} = temp2; 
				end
			end
		2'b11:
			begin
				$display("ROR");
				temp = {shiftVal,SR29_IN};
				temp2 = temp;				
				for(i = 0; i <= 32 ;i = i + 1) begin
						temp2[i] = temp[(i+shiftAmount[4:0])%33] ; 
						$display("[%3d]=[%3d]",i,(i+shiftAmount[4:0])%33);
				end
				{_Out,_SR29_OUT} = temp2; 
			end
	endcase
end

endmodule