data/full_repos/permissive/423539813/source_files/BasicStructure.v
1: b'%Warning-PINMISSING: data/full_repos/permissive/423539813/source_files/BasicStructure.v:147: Cell has missing pin: \'instruction_type\'\n Control_Unit controller(.opcode(instruction[6:0]) , .func3(instruction[14:12]) , .func7(instruction[31:25]), .ZeroOut(ZeroOut), .CarryOut(CarryOut),\n              ^~~~~~~~~~\n                     ... Use "/* verilator lint_off PINMISSING */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/423539813/source_files/BasicStructure.v:136: Cannot find file containing module: \'adder\'\n adder pcplus4ins(.a(pc),.b(32\'h4),.y(PCPlus4));\n ^~~~~\n        ... Looked in:\n             data/full_repos/permissive/423539813/source_files,data/full_repos/permissive/423539813/adder\n             data/full_repos/permissive/423539813/source_files,data/full_repos/permissive/423539813/adder.v\n             data/full_repos/permissive/423539813/source_files,data/full_repos/permissive/423539813/adder.sv\n             adder\n             adder.v\n             adder.sv\n             obj_dir/adder\n             obj_dir/adder.v\n             obj_dir/adder.sv\n%Error: data/full_repos/permissive/423539813/source_files/BasicStructure.v:138: Cannot find file containing module: \'adder\'\n adder pctargetins(.a(pc),.b(immext),.y(PCTarget));\n ^~~~~\n%Error: data/full_repos/permissive/423539813/source_files/BasicStructure.v:142: Cannot find file containing module: \'instruction_memory\'\n instruction_memory instructionmemory(.pc(pc),.instruction(instruction));\n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/423539813/source_files/BasicStructure.v:152: Cannot find file containing module: \'extend\'\n     extend ext(.instruction(instruction[31:7]), .immsrc(immsrc), .immext(immext));\n     ^~~~~~\n%Error: data/full_repos/permissive/423539813/source_files/BasicStructure.v:154: Cannot find file containing module: \'register_file\'\n     register_file registerfile(.Port_A(Port_A), .Port_B(Port_B),.hardwire(hardwire), .RESULT(RESULT), .Addr_A(instruction[19:15]), .Addr_B(instruction[24:20]), .Addr_Wr(instruction[11:7]), .wr(RegWrite), .clk(clk),.rst(rst));\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/423539813/source_files/BasicStructure.v:156: Cannot find file containing module: \'alu\'\n     alu alu( .A(Port_A),.B(B),.ALU_Sel(ALUControl),.ALU_Out(ALU_Out),.CarryOut(CarryOut), .ZeroOut(ZeroOut));\n     ^~~\n%Error: data/full_repos/permissive/423539813/source_files/BasicStructure.v:158: Cannot find file containing module: \'address_gen\'\n     address_gen AddressGenerator(.pc(pc),.PCNext(PCNext),.clk(clk),.rst(rst));\n     ^~~~~~~~~~~\n%Error: data/full_repos/permissive/423539813/source_files/BasicStructure.v:162: Cannot find file containing module: \'Data_Memory\'\n     Data_Memory datamemory(.Data_Out(Data_Out),.Data_In(Port_B),.D_Addr(ALU_Out), .wr(MemWrite), .rst(rst),.clk(clk));\n     ^~~~~~~~~~~\n%Error: Exiting due to 8 error(s), 1 warning(s)\n'
module mux2x1(output [31:0]o,
					input[31:0]a,b,
					input sel
			);
			
	assign o = sel ? a:b;
endmodule
module mux2x1(output [31:0]o,
					input[31:0]a,b,
					input sel
			);

			
	assign o = sel ? a:b;
endmodule