data/full_repos/permissive/493019833/test/testcase/firrtl/DriverTest/reference/DriverTest.v
data/verilator_xmls/e7713b1e-fd76-48c5-af51-26c2c653bcda.xml
module DriverTest(
    input clock,
    input reset,
    input io_in,
    output io_out
);
    assign io_out = io_in;
endmodule
module DriverTest(
    input clock,
    input reset,
    input io_in,
    output io_out
);

    assign io_out = io_in;
endmodule