data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/mips/Shifter.v
1: b'%Error: data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/mips/Shifter.v:1: Cannot find include file: ../defined.vh\n`include "../defined.vh" \n         ^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/mips,data/full_repos/permissive/486954482/../defined.vh\n             data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/mips,data/full_repos/permissive/486954482/../defined.vh.v\n             data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/mips,data/full_repos/permissive/486954482/../defined.vh.sv\n             ../defined.vh\n             ../defined.vh.v\n             ../defined.vh.sv\n             obj_dir/../defined.vh\n             obj_dir/../defined.vh.v\n             obj_dir/../defined.vh.sv\n%Error: data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/mips/Shifter.v:24: Define or directive not defined: \'`SHIFT_NOTHING\'\n  `SHIFT_NOTHING:\n  ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/mips/Shifter.v:24: syntax error, unexpected \':\', expecting endcase\n  `SHIFT_NOTHING:\n                ^\n%Error: data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/mips/Shifter.v:26: Define or directive not defined: \'`SHIFT_LEFT_UNSIGNED\'\n  `SHIFT_LEFT_UNSIGNED:\n  ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/mips/Shifter.v:28: Define or directive not defined: \'`SHIFT_RIGHT_SIGNED\'\n  `SHIFT_RIGHT_SIGNED:\n  ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/486954482/TinyGarble/circuit_synthesis/mips/Shifter.v:30: Define or directive not defined: \'`SHIFT_RIGHT_UNSIGNED\'\n  `SHIFT_RIGHT_UNSIGNED:\n  ^~~~~~~~~~~~~~~~~~~~~\n%Error: Cannot continue\n'
module Shifter
(
	value,
	shift_amount,
	shift_func,
	c_shift
);
		
	input [31:0] value;
	input [4:0]  shift_amount;
	input   [1:0]  shift_func;
	output reg [31:0] c_shift;

	wire signed[31:0] value_s;
	
	assign value_s=value;

	always@(*)
	begin
		c_shift<=0;
		case(shift_func)
		`SHIFT_NOTHING:
			c_shift<=0;
		`SHIFT_LEFT_UNSIGNED:
			c_shift<=value<<shift_amount;
		`SHIFT_RIGHT_SIGNED:
			c_shift<=value_s>>>shift_amount;
		`SHIFT_RIGHT_UNSIGNED:
			c_shift<=value>>shift_amount;
		endcase
	end
endmodule
module Shifter
(
	value,
	shift_amount,
	shift_func,
	c_shift
);

		
	input [31:0] value;
	input [4:0]  shift_amount;
	input   [1:0]  shift_func;
	output reg [31:0] c_shift;

	wire signed[31:0] value_s;
	
	assign value_s=value;

	always@(*)
	begin
		c_shift<=0;
		case(shift_func)
		`SHIFT_NOTHING:
			c_shift<=0;
		`SHIFT_LEFT_UNSIGNED:
			c_shift<=value<<shift_amount;
		`SHIFT_RIGHT_SIGNED:
			c_shift<=value_s>>>shift_amount;
		`SHIFT_RIGHT_UNSIGNED:
			c_shift<=value>>shift_amount;
		endcase
	end
endmodule