data/full_repos/permissive/441359809/src/yosys/tests/various/dynamic_part_select/latch_1990.v
1: b'%Warning-WIDTH: data/full_repos/permissive/441359809/src/yosys/tests/various/dynamic_part_select/latch_1990.v:11: Operator XOR expects 32 bits on the LHS, but LHS\'s VARREF \'z\' generates 1 bits.\n                                                                                                                : ... In instance latch_1990\n                        x[z^i] = z^i;\n                           ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/441359809/src/yosys/tests/various/dynamic_part_select/latch_1990.v:11: Operator XOR expects 32 bits on the LHS, but LHS\'s VARREF \'z\' generates 1 bits.\n                                                                                                                : ... In instance latch_1990\n                        x[z^i] = z^i;\n                                  ^\n%Warning-WIDTH: data/full_repos/permissive/441359809/src/yosys/tests/various/dynamic_part_select/latch_1990.v:11: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s XOR generates 32 bits.\n                                                                                                                : ... In instance latch_1990\n                        x[z^i] = z^i;\n                               ^\n%Error: Exiting due to 3 warning(s)\n'
module latch_1990 #(
        parameter BUG = 1
) (
	(* nowrshmsk = !BUG *)
        output reg [1:0] x
);
        wire z = 0;
        integer i;
        always @*
                for (i = 0; i < 2; i=i+1)
                        x[z^i] = z^i;
endmodule
module latch_1990 #(
        parameter BUG = 1
) (
	(* nowrshmsk = !BUG *)
        output reg [1:0] x
);

        wire z = 0;
        integer i;
        always @*
                for (i = 0; i < 2; i=i+1)
                        x[z^i] = z^i;
endmodule