data/full_repos/permissive/474582223/DEMUX/oneByFour/tf.v
1: b'%Error: data/full_repos/permissive/474582223/DEMUX/oneByFour/tf.v:30: Unsupported or unknown PLI call: $dumpfile\n      $dumpfile("dump.vcd");\n      ^~~~~~~~~\n%Error: data/full_repos/permissive/474582223/DEMUX/oneByFour/tf.v:31: Unsupported or unknown PLI call: $dumpvars\n      $dumpvars(1);  \n      ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/474582223/DEMUX/oneByFour/tf.v:35: Unsupported: Ignoring delay on this delayed statement.\n       #100;\n       ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/474582223/DEMUX/oneByFour/tf.v:39: Unsupported: Ignoring delay on this delayed statement.\n       #100;\n       ^\n%Warning-STMTDLY: data/full_repos/permissive/474582223/DEMUX/oneByFour/tf.v:43: Unsupported: Ignoring delay on this delayed statement.\n       #100;\n       ^\n%Warning-STMTDLY: data/full_repos/permissive/474582223/DEMUX/oneByFour/tf.v:47: Unsupported: Ignoring delay on this delayed statement.\n       #100;\n       ^\n%Error: Exiting due to 2 error(s), 4 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module onebyfourdemux1;


	reg in;
	reg sel;


	wire out0;
  	wire out1;
  	wire out2;
  	wire out3;


	onebyfourdemux uut (
      .in(in),
      .sel(sel),
      .out0(out0),
      .out1(out1),
      .out2(out2),
      .out3(out3)
	);

	initial begin
      $dumpfile("dump.vcd");
      $dumpvars(1);

		sel = 00;
      	in = 1;
      	#100;
      
      	sel = 01;
      	in = 1;
      	#100;
      	
      	sel = 10;
      	in = 1;
      	#100;
      
      	sel = 11;
      	in = 1;
      	#100;
	end
endmodule
module onebyfourdemux1;



	reg in;
	reg sel;


	wire out0;
  	wire out1;
  	wire out2;
  	wire out3;


	onebyfourdemux uut (
      .in(in),
      .sel(sel),
      .out0(out0),
      .out1(out1),
      .out2(out2),
      .out3(out3)
	);

	initial begin
      $dumpfile("dump.vcd");
      $dumpvars(1);

		sel = 00;
      	in = 1;
      	#100;
      
      	sel = 01;
      	in = 1;
      	#100;
      	
      	sel = 10;
      	in = 1;
      	#100;
      
      	sel = 11;
      	in = 1;
      	#100;
	end
endmodule