data/full_repos/permissive/51494710/Hardware/Perceptron_xor/func_sigmoid.sv
1: b"%Error: data/full_repos/permissive/51494710/Hardware/Perceptron_xor/func_sigmoid.sv:14: Cannot find file containing module: 'fp_multiplier'\n  fp_multiplier mult1(\n  ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/51494710/Hardware/Perceptron_xor,data/full_repos/permissive/51494710/fp_multiplier\n             data/full_repos/permissive/51494710/Hardware/Perceptron_xor,data/full_repos/permissive/51494710/fp_multiplier.v\n             data/full_repos/permissive/51494710/Hardware/Perceptron_xor,data/full_repos/permissive/51494710/fp_multiplier.sv\n             fp_multiplier\n             fp_multiplier.v\n             fp_multiplier.sv\n             obj_dir/fp_multiplier\n             obj_dir/fp_multiplier.v\n             obj_dir/fp_multiplier.sv\n%Error: data/full_repos/permissive/51494710/Hardware/Perceptron_xor/func_sigmoid.sv:22: Cannot find file containing module: 'fp_exp'\n  fp_exp exp1(\n  ^~~~~~\n%Error: data/full_repos/permissive/51494710/Hardware/Perceptron_xor/func_sigmoid.sv:29: Cannot find file containing module: 'fp_add_sub'\n  fp_add_sub inst2(\n  ^~~~~~~~~~\n%Error: data/full_repos/permissive/51494710/Hardware/Perceptron_xor/func_sigmoid.sv:37: Cannot find file containing module: 'fp_divide'\n  fp_divide div1(\n  ^~~~~~~~~\n%Error: Exiting due to 4 error(s)\n"
module func_sigmoid(
  input				iCLK,
  input	[31:0]	iSUM,
    
  output	[31:0]	oSIGMOID
);

  logic	[31:0]	alpha, fp_1;
  assign	alpha	= 32'hbf800000;
  assign	fp_1	= 32'h3f800000;


  logic	[31:0]	inv_wx;
  fp_multiplier mult1(
    .clock(iCLK),
    .dataa(alpha),
    .datab(iSUM),
    .result(inv_wx)
  );

  logic	[31:0]	exp_wx;
  fp_exp exp1(
    .clock(iCLK),
    .data(inv_wx),
    .result(exp_wx)
  );

  logic	[31:0]	denom_sigm;
  fp_add_sub inst2(
    .add_sub(1'b1),
    .clock(iCLK),
    .dataa(fp_1),
    .datab(exp_wx),
    .result(denom_sigm)
  );

  fp_divide div1(
    .clock(iCLK),
    .dataa(fp_1),
    .datab(denom_sigm),
    .result(oSIGMOID)
  );
  
endmodule
module func_sigmoid(
  input				iCLK,
  input	[31:0]	iSUM,
    
  output	[31:0]	oSIGMOID
);


  logic	[31:0]	alpha, fp_1;
  assign	alpha	= 32'hbf800000;
  assign	fp_1	= 32'h3f800000;


  logic	[31:0]	inv_wx;
  fp_multiplier mult1(
    .clock(iCLK),
    .dataa(alpha),
    .datab(iSUM),
    .result(inv_wx)
  );

  logic	[31:0]	exp_wx;
  fp_exp exp1(
    .clock(iCLK),
    .data(inv_wx),
    .result(exp_wx)
  );

  logic	[31:0]	denom_sigm;
  fp_add_sub inst2(
    .add_sub(1'b1),
    .clock(iCLK),
    .dataa(fp_1),
    .datab(exp_wx),
    .result(denom_sigm)
  );

  fp_divide div1(
    .clock(iCLK),
    .dataa(fp_1),
    .datab(denom_sigm),
    .result(oSIGMOID)
  );
  
endmodule