data/full_repos/permissive/493265923/04_DIFFERNTIATOR/DIFFERENTIATOR_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/493265923/04_DIFFERNTIATOR/DIFFERENTIATOR_tb.v:36: Unsupported: Ignoring delay on this delayed statement.\n        #1000 DATA_I <= 6\'b011111; \n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/493265923/04_DIFFERNTIATOR/DIFFERENTIATOR_tb.v:39: Unsupported: Ignoring delay on this delayed statement.\n        #1020 DATA_I <= 6\'b100000;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/493265923/04_DIFFERNTIATOR/DIFFERENTIATOR_tb.v:44: Unsupported: Ignoring delay on this delayed statement.\n        #10 CLK_I <= ~CLK_I;\n        ^\n%Error: data/full_repos/permissive/493265923/04_DIFFERNTIATOR/DIFFERENTIATOR_tb.v:15: Cannot find file containing module: \'INTEGRATOR_BACK\'\n    INTEGRATOR_BACK u1(\n    ^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/493265923/04_DIFFERNTIATOR,data/full_repos/permissive/493265923/INTEGRATOR_BACK\n             data/full_repos/permissive/493265923/04_DIFFERNTIATOR,data/full_repos/permissive/493265923/INTEGRATOR_BACK.v\n             data/full_repos/permissive/493265923/04_DIFFERNTIATOR,data/full_repos/permissive/493265923/INTEGRATOR_BACK.sv\n             INTEGRATOR_BACK\n             INTEGRATOR_BACK.v\n             INTEGRATOR_BACK.sv\n             obj_dir/INTEGRATOR_BACK\n             obj_dir/INTEGRATOR_BACK.v\n             obj_dir/INTEGRATOR_BACK.sv\n%Error: data/full_repos/permissive/493265923/04_DIFFERNTIATOR/DIFFERENTIATOR_tb.v:24: Cannot find file containing module: \'DIFFERENTIATOR\'\n    DIFFERENTIATOR u2(\n    ^~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s), 3 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module DIFFERENTIATOR_tb();

    reg CLK_I = 1'b0;
    reg signed [5:0] DATA_I = 6'b000000;

    wire signed [5:0] DATA_O_INT;
    wire signed [5:0] DATA_O_DIFF;
    wire OFDET_O_INT;
    wire OFDET_O_DIFF;
    wire UFDET_O_INT;
    wire UFDET_O_DIFF;


    INTEGRATOR_BACK u1(
        .CLK_I(CLK_I),
        .DATA_I(DATA_I),
        .DATA_O(DATA_O_INT),
        .OFDET_O(OFDET_O_INT),
        .UFDET_O(UFDET_O_INT)
    );
    defparam u1.DATA_Bit_Length = 6;

    DIFFERENTIATOR u2(
        .CLK_I(CLK_I),
        .DATA_I(DATA_O_INT),
        .DATA_O(DATA_O_DIFF),
        .OFDET_O(OFDET_O_DIFF),
        .UFDET_O(UFDET_O_DIFF)
    );
    defparam u2.DATA_Bit_Length = 6;
    defparam u2.Latch_Length = 1;

    always begin

        #1000 DATA_I <= 6'b011111; 


        #1020 DATA_I <= 6'b100000;
    end

    always begin

        #10 CLK_I <= ~CLK_I;
    end


endmodule
module DIFFERENTIATOR_tb();


    reg CLK_I = 1'b0;
    reg signed [5:0] DATA_I = 6'b000000;

    wire signed [5:0] DATA_O_INT;
    wire signed [5:0] DATA_O_DIFF;
    wire OFDET_O_INT;
    wire OFDET_O_DIFF;
    wire UFDET_O_INT;
    wire UFDET_O_DIFF;


    INTEGRATOR_BACK u1(
        .CLK_I(CLK_I),
        .DATA_I(DATA_I),
        .DATA_O(DATA_O_INT),
        .OFDET_O(OFDET_O_INT),
        .UFDET_O(UFDET_O_INT)
    );
    defparam u1.DATA_Bit_Length = 6;

    DIFFERENTIATOR u2(
        .CLK_I(CLK_I),
        .DATA_I(DATA_O_INT),
        .DATA_O(DATA_O_DIFF),
        .OFDET_O(OFDET_O_DIFF),
        .UFDET_O(UFDET_O_DIFF)
    );
    defparam u2.DATA_Bit_Length = 6;
    defparam u2.Latch_Length = 1;

    always begin

        #1000 DATA_I <= 6'b011111; 


        #1020 DATA_I <= 6'b100000;
    end

    always begin

        #10 CLK_I <= ~CLK_I;
    end


endmodule