data/full_repos/permissive/531022334/src/spk_counter.v
1: b'%Warning-WIDTH: data/full_repos/permissive/531022334/src/spk_counter.v:17: Operator ADD expects 8 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance spk_counter\n            counter = counter + fan_in[i];  \n                              ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module spk_counter #(
    parameter NUM = 8
)(
    input       [NUM-1 :0]    fan_in,
    output reg  [7     :0]    counter
    );

    integer i;

    always @ (fan_in)
    begin
        counter = 0;
        for(i = 0; i < NUM; i = i + 1)
            counter = counter + fan_in[i];
    end

endmodule
module spk_counter #(
    parameter NUM = 8
)(
    input       [NUM-1 :0]    fan_in,
    output reg  [7     :0]    counter
    );


    integer i;

    always @ (fan_in)
    begin
        counter = 0;
        for(i = 0; i < NUM; i = i + 1)
            counter = counter + fan_in[i];
    end

endmodule