data/full_repos/permissive/474294847/rtl-src/IO/btn-debounce.v
data/verilator_xmls/eb140947-a856-4448-a294-e98ec2765fb1.xml
module btn_debounce(raw_input, clk, btn_pulse);


    parameter COUNTER_VAL = 28'h3D0900;


    input raw_input, clk;
    output btn_pulse;


reg d1, d2, d3;


reg [27:0]counter;


reg slow_clk;

always@(posedge clk)
begin
    if (counter == COUNTER_VAL)
    begin
        counter <= 28'd0;
        slow_clk <= ~slow_clk;
    end
    else
    begin
        counter <= counter + 1'b1;
    end
end

always@(posedge slow_clk)
begin
    d1 <= raw_input;
    d2 <= d1;
    d3 <= d2;
end


assign btn_pulse = d2 && !d3;

endmodule
module btn_debounce(raw_input, clk, btn_pulse);



    parameter COUNTER_VAL = 28'h3D0900;


    input raw_input, clk;
    output btn_pulse;


reg d1, d2, d3;


reg [27:0]counter;


reg slow_clk;

always@(posedge clk)
begin
    if (counter == COUNTER_VAL)
    begin
        counter <= 28'd0;
        slow_clk <= ~slow_clk;
    end
    else
    begin
        counter <= counter + 1'b1;
    end
end

always@(posedge slow_clk)
begin
    d1 <= raw_input;
    d2 <= d1;
    d3 <= d2;
end


assign btn_pulse = d2 && !d3;

endmodule