data/full_repos/permissive/48695884/mandelbrot_iter.v
1: b'%Error: data/full_repos/permissive/48695884/mandelbrot_iter.v:19: Cannot find file containing module: \'fixed_multiplication\'\n fixed_multiplication m1(in_real, in_real, real_square);\n ^~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/48695884,data/full_repos/permissive/48695884/fixed_multiplication\n             data/full_repos/permissive/48695884,data/full_repos/permissive/48695884/fixed_multiplication.v\n             data/full_repos/permissive/48695884,data/full_repos/permissive/48695884/fixed_multiplication.sv\n             fixed_multiplication\n             fixed_multiplication.v\n             fixed_multiplication.sv\n             obj_dir/fixed_multiplication\n             obj_dir/fixed_multiplication.v\n             obj_dir/fixed_multiplication.sv\n%Error: data/full_repos/permissive/48695884/mandelbrot_iter.v:20: Cannot find file containing module: \'fixed_multiplication\'\n fixed_multiplication m2(in_imag, in_imag, imag_square);\n ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/48695884/mandelbrot_iter.v:21: Cannot find file containing module: \'fixed_multiplication\'\n fixed_multiplication m3(in_real, in_imag, mixed);\n ^~~~~~~~~~~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/48695884/mandelbrot_iter.v:26: Operator GTE expects 32 bits on the LHS, but LHS\'s VARREF \'size_square\' generates 20 bits.\n                                                                        : ... In instance mandelbrot_iter\n assign iters_out   = size_square >= 32\'h1000 ? iters_in : iters_in + 1;\n                                  ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 3 error(s), 1 warning(s)\n'
module mandelbrot_iter(in_real, in_imag, c_real, c_imag, out_real, out_imag, size_square, iters_in, iters_out);
	parameter width = 20;
	
	input signed   [width - 1:0] in_real;
	input signed   [width - 1:0] in_imag;
	input signed   [width - 1:0] c_real;
	input signed   [width - 1:0] c_imag;
	input unsigned [7:0]         iters_in;
	
	output signed   [width - 1:0] out_real;
	output signed   [width - 1:0] out_imag;
	output signed   [width - 1:0] size_square;
	output unsigned [7:0]         iters_out;
	
	wire   signed [width - 1:0] real_square;
	wire   signed [width - 1:0] imag_square;
	wire   signed [width - 1:0] mixed;
	
	fixed_multiplication m1(in_real, in_real, real_square);
	fixed_multiplication m2(in_imag, in_imag, imag_square);
	fixed_multiplication m3(in_real, in_imag, mixed);
	
	assign out_real    = real_square - imag_square + c_real;
	assign out_imag    = (mixed * 2) + c_imag;
	assign size_square = real_square + imag_square;
	assign iters_out   = size_square >= 32'h1000 ? iters_in : iters_in + 1;
endmodule
module mandelbrot_iter(in_real, in_imag, c_real, c_imag, out_real, out_imag, size_square, iters_in, iters_out);

	parameter width = 20;
	
	input signed   [width - 1:0] in_real;
	input signed   [width - 1:0] in_imag;
	input signed   [width - 1:0] c_real;
	input signed   [width - 1:0] c_imag;
	input unsigned [7:0]         iters_in;
	
	output signed   [width - 1:0] out_real;
	output signed   [width - 1:0] out_imag;
	output signed   [width - 1:0] size_square;
	output unsigned [7:0]         iters_out;
	
	wire   signed [width - 1:0] real_square;
	wire   signed [width - 1:0] imag_square;
	wire   signed [width - 1:0] mixed;
	
	fixed_multiplication m1(in_real, in_real, real_square);
	fixed_multiplication m2(in_imag, in_imag, imag_square);
	fixed_multiplication m3(in_real, in_imag, mixed);
	
	assign out_real    = real_square - imag_square + c_real;
	assign out_imag    = (mixed * 2) + c_imag;
	assign size_square = real_square + imag_square;
	assign iters_out   = size_square >= 32'h1000 ? iters_in : iters_in + 1;
endmodule