data/full_repos/permissive/466022941/verilog/rtl/btc_miner_top_old.v
1: b"%Error: data/full_repos/permissive/466022941/verilog/rtl/btc_miner_top_old.v:52: Define or directive not defined: '`MPRJ_IO_PADS'\n  input  [`MPRJ_IO_PADS-1:0] io_in,\n          ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/466022941/verilog/rtl/btc_miner_top_old.v:53: Define or directive not defined: '`MPRJ_IO_PADS'\n  output [`MPRJ_IO_PADS-1:0] io_out,\n          ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/466022941/verilog/rtl/btc_miner_top_old.v:54: Define or directive not defined: '`MPRJ_IO_PADS'\n  output [`MPRJ_IO_PADS-1:0] io_oeb,\n          ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/466022941/verilog/rtl/btc_miner_top_old.v:62: Define or directive not defined: '`MPRJ_IO_PADS'\n  wire [`MPRJ_IO_PADS-1:0] io_in;\n        ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/466022941/verilog/rtl/btc_miner_top_old.v:63: Define or directive not defined: '`MPRJ_IO_PADS'\n  wire [`MPRJ_IO_PADS-1:0] io_out;\n        ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/466022941/verilog/rtl/btc_miner_top_old.v:64: Define or directive not defined: '`MPRJ_IO_PADS'\n  wire [`MPRJ_IO_PADS-1:0] io_oeb;\n        ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/466022941/verilog/rtl/btc_miner_top_old.v:98: Define or directive not defined: '`MPRJ_IO_PADS'\n  assign io_oeb = {(`MPRJ_IO_PADS-1){rst}};\n                    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/466022941/verilog/rtl/btc_miner_top_old.v:116: syntax error, unexpected ||, expecting ')' or ',' or or\n  always @(la_data_in || la_oenb || la_sel || o_nonce || o_block_header || o_target) begin\n                      ^~\n%Error: Exiting due to 8 error(s)\n"
function automatic [31:0] W;
    input [6:0] x;
    input [6:0] y;
    if(^x === 1'bX) W = 32'h777;
    else W = (x<16) ? padded[((PADDED_SIZE-1-y*512)-x*32) -: 32] : rho1(W(x-2, y)) + W(x-7, y) + rho0(W(x-15, y)) + W(x-16, y);
  endfunction
function automatic [31:0] W;

    input [6:0] x;
    input [6:0] y;
    if(^x === 1'bX) W = 32'h777;
    else W = (x<16) ? padded[((PADDED_SIZE-1-y*512)-x*32) -: 32] : rho1(W(x-2, y)) + W(x-7, y) + rho0(W(x-15, y)) + W(x-16, y);
  endfunction