data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:11: Unsupported: Ignoring delay on this delayed statement.\n    always #50 clock <= !clock;\n           ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:17: Unsupported or unknown PLI call: $dumpfile\n        $dumpfile("timer_input_control.vcd");\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:18: Unsupported or unknown PLI call: $dumpvars\n     $dumpvars(0,timer_input_control_tb);\n     ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:28: Unsupported: Ignoring delay on this delayed statement.\n        #5000 teclado = 10\'b0000000000; \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:29: Unsupported: Ignoring delay on this delayed statement.\n        #5000 teclado = 10\'b0000000001;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:30: Unsupported: Ignoring delay on this delayed statement.\n        #5000 teclado = 10\'b0000000010;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:31: Unsupported: Ignoring delay on this delayed statement.\n        #5000 teclado = 10\'b0000000100;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:32: Unsupported: Ignoring delay on this delayed statement.\n        #5000 teclado = 10\'b0000001000;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:33: Unsupported: Ignoring delay on this delayed statement.\n        #5000 teclado = 10\'b0000010000;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:34: Unsupported: Ignoring delay on this delayed statement.\n        #5000 teclado = 10\'b0000100000;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:35: Unsupported: Ignoring delay on this delayed statement.\n        #5000 teclado = 10\'b0000001000;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:36: Unsupported: Ignoring delay on this delayed statement.\n        #5000 teclado = 10\'b0001000000;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:37: Unsupported: Ignoring delay on this delayed statement.\n        #5000 teclado = 10\'b0010000000;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:38: Unsupported: Ignoring delay on this delayed statement.\n        #5000 teclado = 10\'b0100000000;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:39: Unsupported: Ignoring delay on this delayed statement.\n        #5000 teclado = 10\'b1000000000; \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/491294671/timer_input_control/timer_input_control_tb.v:41: Unsupported: Ignoring delay on this delayed statement.\n        #20000; $finish;\n        ^\n%Error: Exiting due to 2 error(s), 14 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module timer_input_control_tb; 

    reg  [9:0] teclado;
    reg enablen, clock; 
    wire [3:0] D;
    wire loadn, pgt_1Hz;

    
    always #50 clock <= !clock;
    

    timer_input_control dut(.D(D), .loadn(loadn), .pgt_1Hz(pgt_1Hz), .teclado(teclado), .enablen(enablen), .clock(clock));

    initial begin
        $dumpfile("timer_input_control.vcd");
	    $dumpvars(0,timer_input_control_tb);

        
    end

    initial begin

        enablen = 0;
        clock = 0;
        teclado = 10'b0000000000; 
        #5000 teclado = 10'b0000000000; 
        #5000 teclado = 10'b0000000001;
        #5000 teclado = 10'b0000000010;
        #5000 teclado = 10'b0000000100;
        #5000 teclado = 10'b0000001000;
        #5000 teclado = 10'b0000010000;
        #5000 teclado = 10'b0000100000;
        #5000 teclado = 10'b0000001000;
        #5000 teclado = 10'b0001000000;
        #5000 teclado = 10'b0010000000;
        #5000 teclado = 10'b0100000000;
        #5000 teclado = 10'b1000000000; 
        enablen = 1;
        #20000; $finish;
    end

endmodule
module timer_input_control_tb;
 

    reg  [9:0] teclado;
    reg enablen, clock; 
    wire [3:0] D;
    wire loadn, pgt_1Hz;

    
    always #50 clock <= !clock;
    

    timer_input_control dut(.D(D), .loadn(loadn), .pgt_1Hz(pgt_1Hz), .teclado(teclado), .enablen(enablen), .clock(clock));

    initial begin
        $dumpfile("timer_input_control.vcd");
	    $dumpvars(0,timer_input_control_tb);

        
    end

    initial begin

        enablen = 0;
        clock = 0;
        teclado = 10'b0000000000; 
        #5000 teclado = 10'b0000000000; 
        #5000 teclado = 10'b0000000001;
        #5000 teclado = 10'b0000000010;
        #5000 teclado = 10'b0000000100;
        #5000 teclado = 10'b0000001000;
        #5000 teclado = 10'b0000010000;
        #5000 teclado = 10'b0000100000;
        #5000 teclado = 10'b0000001000;
        #5000 teclado = 10'b0001000000;
        #5000 teclado = 10'b0010000000;
        #5000 teclado = 10'b0100000000;
        #5000 teclado = 10'b1000000000; 
        enablen = 1;
        #20000; $finish;
    end

endmodule