data/full_repos/permissive/502135797/Lab3_Feb_28_2022/Code/top.v
1: b"%Error: data/full_repos/permissive/502135797/Lab3_Feb_28_2022/Code/top.v:17: Cannot find file containing module: 'CLKMANAGER'\n     CLKMANAGER FIN(\n     ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/502135797/Lab3_Feb_28_2022/Code,data/full_repos/permissive/502135797/CLKMANAGER\n             data/full_repos/permissive/502135797/Lab3_Feb_28_2022/Code,data/full_repos/permissive/502135797/CLKMANAGER.v\n             data/full_repos/permissive/502135797/Lab3_Feb_28_2022/Code,data/full_repos/permissive/502135797/CLKMANAGER.sv\n             CLKMANAGER\n             CLKMANAGER.v\n             CLKMANAGER.sv\n             obj_dir/CLKMANAGER\n             obj_dir/CLKMANAGER.v\n             obj_dir/CLKMANAGER.sv\n%Error: data/full_repos/permissive/502135797/Lab3_Feb_28_2022/Code/top.v:26: Cannot find file containing module: 'UPDOWN'\n     UPDOWN FIND(\n     ^~~~~~\n%Error: data/full_repos/permissive/502135797/Lab3_Feb_28_2022/Code/top.v:34: Cannot find file containing module: 'SEGDRIVE'\n SEGDRIVE FINE(\n ^~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module top(
    input clkt,
    input rstt,
    input ent,
    input [4:0] SW1,
    input udt,
    output seg,
    output [6:0] Cnode1,
    output [7:0] AN1
    );



    wire slowclk_out; 
     CLKMANAGER FIN(
     .clk(clkt),

     .SW(SW1),
     .clkout(slowclk_out)
    );
    
   
   wire [3:0] tmp_cnt; 
     UPDOWN FIND(
     .rst1(rstt),
     .en(ent),
     .clk1(slowclk_out), 
     .tmp(tmp_cnt),
     .ud(udt)
    );
    
 SEGDRIVE FINE(
   .tmp_SW(tmp_cnt),
   .Cnode(Cnode1),
   .dp(seg),
   .AN(AN1)
   );
       


endmodule
module top(
    input clkt,
    input rstt,
    input ent,
    input [4:0] SW1,
    input udt,
    output seg,
    output [6:0] Cnode1,
    output [7:0] AN1
    );




    wire slowclk_out; 
     CLKMANAGER FIN(
     .clk(clkt),

     .SW(SW1),
     .clkout(slowclk_out)
    );
    
   
   wire [3:0] tmp_cnt; 
     UPDOWN FIND(
     .rst1(rstt),
     .en(ent),
     .clk1(slowclk_out), 
     .tmp(tmp_cnt),
     .ud(udt)
    );
    
 SEGDRIVE FINE(
   .tmp_SW(tmp_cnt),
   .Cnode(Cnode1),
   .dp(seg),
   .AN(AN1)
   );
       


endmodule