data/full_repos/permissive/463395574/hazard_detection.v
1: b'%Error: data/full_repos/permissive/463395574/hazard_detection.v:3: Cannot find include file: defines.v\n`include "defines.v" \n         ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/463395574,data/full_repos/permissive/463395574/defines.v\n             data/full_repos/permissive/463395574,data/full_repos/permissive/463395574/defines.v.v\n             data/full_repos/permissive/463395574,data/full_repos/permissive/463395574/defines.v.sv\n             defines.v\n             defines.v.v\n             defines.v.sv\n             obj_dir/defines.v\n             obj_dir/defines.v.v\n             obj_dir/defines.v.sv\n%Error: data/full_repos/permissive/463395574/hazard_detection.v:7: Define or directive not defined: \'`REG_IDX_WIDTH\'\n    input [`REG_IDX_WIDTH-1:0] readAddr1_ID, readAddr2_ID, writeAddr_EX,\n           ^~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n'
module HazardDetectionUnit (
    input memRead_EX, memWrite_ID, branchOrJump_ID, regWrite_EX,
    input [`REG_IDX_WIDTH-1:0] readAddr1_ID, readAddr2_ID, writeAddr_EX,

    output PCEn, IFIDEn, IDEXFlush
);
    assign IDEXFlush = ((branchOrJump_ID || memRead_EX && !memWrite_ID) && regWrite_EX && (readAddr1_ID == writeAddr_EX || readAddr2_ID == writeAddr_EX));
    assign IFIDEn = ~IDEXFlush;
    assign PCEn = ~IDEXFlush;
endmodule
module HazardDetectionUnit (
    input memRead_EX, memWrite_ID, branchOrJump_ID, regWrite_EX,
    input [`REG_IDX_WIDTH-1:0] readAddr1_ID, readAddr2_ID, writeAddr_EX,

    output PCEn, IFIDEn, IDEXFlush
);

    assign IDEXFlush = ((branchOrJump_ID || memRead_EX && !memWrite_ID) && regWrite_EX && (readAddr1_ID == writeAddr_EX || readAddr2_ID == writeAddr_EX));
    assign IFIDEn = ~IDEXFlush;
    assign PCEn = ~IDEXFlush;
endmodule