data/full_repos/permissive/478063538/decoder_2_4_B.v
data/verilator_xmls/3da96980-2a6f-4bd5-a715-30d9f876f30b.xml
module decoder_2_4_B (
	input [1:0] a, 
	input en,
	output reg [3:0] z
	);
	
	always@(a, en)
	begin
		if (en)
			case(a)
				0: z = 1;
				1: z = 2;
				2: z = 4;
				3: z = 8;
				default: z = 0;
			endcase
		else
			z = 0;
	end
	
endmodule
module decoder_2_4_B (
	input [1:0] a, 
	input en,
	output reg [3:0] z
	);

	
	always@(a, en)
	begin
		if (en)
			case(a)
				0: z = 1;
				1: z = 2;
				2: z = 4;
				3: z = 8;
				default: z = 0;
			endcase
		else
			z = 0;
	end
	
endmodule