data/full_repos/permissive/458737381/src/verilog-parser/tests/primitives2.v
1: b"%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/primitives2.v:8: syntax error, unexpected (-for-strength, expecting '('\nand (strong1, weak0) b(o, i1, i2);\n     ^~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/primitives2.v:9: Unsupported: trireg\ntrireg (medium) t;\n^~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/primitives2.v:9: Unsupported: Verilog 1995 strength specifiers\ntrireg (medium) t;\n        ^~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/primitives2.v:10: syntax error, unexpected (-for-strength, expecting '('\nbuf (strong1, weak0) g1 (y, a);\n     ^~~~~~~\n%Error: Exiting due to 4 error(s)\n"
module primitives_2_test();

wire a,b;
wire y;
wire i1,i2,ctrl,o;

and (strong1, weak0) b(o, i1, i2);
trireg (medium) t;
buf (strong1, weak0) g1 (y, a);
buf (pull1, supply0) g2 (y, b);
buf (strong1, weak0) g1 (y, a);
buf (strong1, weak0) g1 (y, b);
buf (strong1, weak0) g1 (y, a);
buf (weak1, strong0) g1 (y, b);
bufif0 (strong1, weak0) g1 (y, i1, ctrl);
bufif0 (strong1, weak0) g2 (y, i2, ctrl);

endmodule
module primitives_2_test();


wire a,b;
wire y;
wire i1,i2,ctrl,o;

and (strong1, weak0) b(o, i1, i2);
trireg (medium) t;
buf (strong1, weak0) g1 (y, a);
buf (pull1, supply0) g2 (y, b);
buf (strong1, weak0) g1 (y, a);
buf (strong1, weak0) g1 (y, b);
buf (strong1, weak0) g1 (y, a);
buf (weak1, strong0) g1 (y, b);
bufif0 (strong1, weak0) g1 (y, i1, ctrl);
bufif0 (strong1, weak0) g2 (y, i2, ctrl);

endmodule