data/full_repos/permissive/413230008/Seven-Segment Display Driver/Code/Sources/simple_register_generic.v
1: b'%Error: Cannot find file containing module: Display\n        ... Looked in:\n             data/full_repos/permissive/413230008/Seven-Segment/Display\n             data/full_repos/permissive/413230008/Seven-Segment/Display.v\n             data/full_repos/permissive/413230008/Seven-Segment/Display.sv\n             Display\n             Display.v\n             Display.sv\n             obj_dir/Display\n             obj_dir/Display.v\n             obj_dir/Display.sv\n%Error: Cannot find file containing module: Driver/Code/Sources,data/full_repos/permissive/413230008\n%Error: Cannot find file containing module: data/full_repos/permissive/413230008/Seven-Segment\n%Error: Cannot find file containing module: Driver/Code/Sources/simple_register_generic.v\n%Error: Exiting due to 4 error(s)\n'
module simple_register_generic
#(parameter N = 4)(
        input clk,
        input load,
        input reset_n,
        input set,
        input add,
        input sub,
        input [N - 1:0] D,
        output [N - 1:0] Q        
    );
    reg [N - 1:0] Q_reg, Q_next;
    
    always @(posedge clk)
    begin
        Q_reg <= Q_next;
    end
    

    always @(load, D, Q_reg, reset_n, set, add, sub)
    begin
        if (~reset_n)
            Q_next = 'b0;
        else if (set)
            Q_next = -'b1;
        else if (load)
            Q_next = D;
        else if (add)
            Q_next = Q_reg + 1;
        else if (sub)
            Q_next = Q_reg - 1;
        else
            Q_next = Q_reg;
    end
    

    assign Q = Q_reg;

endmodule
module simple_register_generic
#(parameter N = 4)(
        input clk,
        input load,
        input reset_n,
        input set,
        input add,
        input sub,
        input [N - 1:0] D,
        output [N - 1:0] Q        
    );

    reg [N - 1:0] Q_reg, Q_next;
    
    always @(posedge clk)
    begin
        Q_reg <= Q_next;
    end
    

    always @(load, D, Q_reg, reset_n, set, add, sub)
    begin
        if (~reset_n)
            Q_next = 'b0;
        else if (set)
            Q_next = -'b1;
        else if (load)
            Q_next = D;
        else if (add)
            Q_next = Q_reg + 1;
        else if (sub)
            Q_next = Q_reg - 1;
        else
            Q_next = Q_reg;
    end
    

    assign Q = Q_reg;

endmodule