data/full_repos/permissive/460468583/data/yosys/gatemate/cells_bb.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/460468583/data/yosys/gatemate/cells_bb.v:37: Multiple top level modules\n                                                                                         : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                         : ... Top module \'CC_PLL\'\nmodule CC_PLL #(\n       ^~~~~~\n                                                                                         : ... Top module \'CC_PLL_ADV\'\nmodule CC_PLL_ADV #(\n       ^~~~~~~~~~\n                                                                                         : ... Top module \'CC_SERDES\'\nmodule CC_SERDES #(\n       ^~~~~~~~~\n                                                                                         : ... Top module \'CC_CFG_CTRL\'\nmodule CC_CFG_CTRL(\n       ^~~~~~~~~~~\n                                                                                         : ... Top module \'CC_FIFO_40K\'\nmodule CC_FIFO_40K (\n       ^~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/460468583/data/yosys/gatemate/cells_bb.v:165: Operator VAR \'ALMOST_FULL_OFFSET\' expects 13 bits on the Initial value, but Initial value\'s CONST \'12\'h0\' generates 12 bits.\n                                                                                       : ... In instance CC_FIFO_40K\n parameter [12:0] ALMOST_FULL_OFFSET = 12\'b0;\n                  ^~~~~~~~~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/460468583/data/yosys/gatemate/cells_bb.v:166: Operator VAR \'ALMOST_EMPTY_OFFSET\' expects 13 bits on the Initial value, but Initial value\'s CONST \'12\'h0\' generates 12 bits.\n                                                                                       : ... In instance CC_FIFO_40K\n parameter [12:0] ALMOST_EMPTY_OFFSET = 12\'b0;\n                  ^~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 3 warning(s)\n'
module CC_SERDES #(
	parameter SERDES_CFG = ""
)(
	input [63:0] TX_DATA_I,
	input TX_RESET_I,
	input TX_PCS_RESET_I,
	input TX_PMA_RESET_I,
	input PLL_RESET_I,
	input TX_POWERDOWN_N_I,
	input TX_POLARITY_I,
	input [2:0] TX_PRBS_SEL_I,
	input TX_PRBS_FORCE_ERR_I,
	input TX_8B10B_EN_I,
	input [7:0] TX_8B10B_BYPASS_I,
	input [7:0] TX_CHAR_IS_K_I,
	input [7:0] TX_CHAR_DISPMODE_I,
	input [7:0] TX_CHAR_DISPVAL_I,
	input TX_ELEC_IDLE_I,
	input TX_DETECT_RX_I,
	input [2:0] LOOPBACK_I,
	input CLK_CORE_TX_I,
	input CLK_CORE_RX_I,
	input RX_RESET_I,
	input RX_PMA_RESET_I,
	input RX_EQA_RESET_I,
	input RX_CDR_RESET_I,
	input RX_PCS_RESET_I,
	input RX_BUF_RESET_I,
	input RX_POWERDOWN_N_I,
	input RX_POLARITY_I,
	input [2:0] RX_PRBS_SEL_I,
	input RX_PRBS_CNT_RESET_I,
	input RX_8B10B_EN_I,
	input [7:0] RX_8B10B_BYPASS_I,
	input RX_EN_EI_DETECTOR_I,
	input RX_COMMA_DETECT_EN_I,
	input RX_SLIDE_I,
	input RX_MCOMMA_ALIGN_I,
	input RX_PCOMMA_ALIGN_I,
	input CLK_REG_I,
	input REGFILE_WE_I,
	input REGFILE_EN_I,
	input [7:0] REGFILE_ADDR_I,
	input [15:0] REGFILE_DI_I,
	input [15:0] REGFILE_MASK_I,
	output [63:0] RX_DATA_O,
	output [7:0] RX_NOT_IN_TABLE_O,
	output [7:0] RX_CHAR_IS_COMMA_O,
	output [7:0] RX_CHAR_IS_K_O,
	output [7:0] RX_DISP_ERR_O,
	output RX_DETECT_DONE_O,
	output RX_PRESENT_O,
	output TX_BUF_ERR_O,
	output TX_RESETDONE_O,
	output RX_PRBS_ERR_O,
	output RX_BUF_ERR_O,
	output RX_BYTE_IS_ALIGNED_O,
	output RX_BYTE_REALIGN_O,
	output RX_RESETDONE_O,
	output RX_EI_EN_O,
	output CLK_CORE_RX_O,
	output CLK_CORE_PLL_O,
	output [15:0] REGFILE_DO_O,
	output REGFILE_RDY_O
);
endmodule
module CC_SERDES #(
	parameter SERDES_CFG = ""
)(
	input [63:0] TX_DATA_I,
	input TX_RESET_I,
	input TX_PCS_RESET_I,
	input TX_PMA_RESET_I,
	input PLL_RESET_I,
	input TX_POWERDOWN_N_I,
	input TX_POLARITY_I,
	input [2:0] TX_PRBS_SEL_I,
	input TX_PRBS_FORCE_ERR_I,
	input TX_8B10B_EN_I,
	input [7:0] TX_8B10B_BYPASS_I,
	input [7:0] TX_CHAR_IS_K_I,
	input [7:0] TX_CHAR_DISPMODE_I,
	input [7:0] TX_CHAR_DISPVAL_I,
	input TX_ELEC_IDLE_I,
	input TX_DETECT_RX_I,
	input [2:0] LOOPBACK_I,
	input CLK_CORE_TX_I,
	input CLK_CORE_RX_I,
	input RX_RESET_I,
	input RX_PMA_RESET_I,
	input RX_EQA_RESET_I,
	input RX_CDR_RESET_I,
	input RX_PCS_RESET_I,
	input RX_BUF_RESET_I,
	input RX_POWERDOWN_N_I,
	input RX_POLARITY_I,
	input [2:0] RX_PRBS_SEL_I,
	input RX_PRBS_CNT_RESET_I,
	input RX_8B10B_EN_I,
	input [7:0] RX_8B10B_BYPASS_I,
	input RX_EN_EI_DETECTOR_I,
	input RX_COMMA_DETECT_EN_I,
	input RX_SLIDE_I,
	input RX_MCOMMA_ALIGN_I,
	input RX_PCOMMA_ALIGN_I,
	input CLK_REG_I,
	input REGFILE_WE_I,
	input REGFILE_EN_I,
	input [7:0] REGFILE_ADDR_I,
	input [15:0] REGFILE_DI_I,
	input [15:0] REGFILE_MASK_I,
	output [63:0] RX_DATA_O,
	output [7:0] RX_NOT_IN_TABLE_O,
	output [7:0] RX_CHAR_IS_COMMA_O,
	output [7:0] RX_CHAR_IS_K_O,
	output [7:0] RX_DISP_ERR_O,
	output RX_DETECT_DONE_O,
	output RX_PRESENT_O,
	output TX_BUF_ERR_O,
	output TX_RESETDONE_O,
	output RX_PRBS_ERR_O,
	output RX_BUF_ERR_O,
	output RX_BYTE_IS_ALIGNED_O,
	output RX_BYTE_REALIGN_O,
	output RX_RESETDONE_O,
	output RX_EI_EN_O,
	output CLK_CORE_RX_O,
	output CLK_CORE_PLL_O,
	output [15:0] REGFILE_DO_O,
	output REGFILE_RDY_O
);

endmodule