data/full_repos/permissive/425175279/MIPS_Single_Cycle/MIPS_Single_Cycle.v
1: b"%Error: data/full_repos/permissive/425175279/MIPS_Single_Cycle/MIPS_Single_Cycle.v:50: Cannot find file containing module: 'PC_Counter'\n    PC_Counter u_PC_Counter(\n    ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/425175279/MIPS_Single_Cycle,data/full_repos/permissive/425175279/PC_Counter\n             data/full_repos/permissive/425175279/MIPS_Single_Cycle,data/full_repos/permissive/425175279/PC_Counter.v\n             data/full_repos/permissive/425175279/MIPS_Single_Cycle,data/full_repos/permissive/425175279/PC_Counter.sv\n             PC_Counter\n             PC_Counter.v\n             PC_Counter.sv\n             obj_dir/PC_Counter\n             obj_dir/PC_Counter.v\n             obj_dir/PC_Counter.sv\n%Error: data/full_repos/permissive/425175279/MIPS_Single_Cycle/MIPS_Single_Cycle.v:60: Cannot find file containing module: 'Instr_Memory'\n    Instr_Memory u_Instr_Memory(\n    ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/425175279/MIPS_Single_Cycle/MIPS_Single_Cycle.v:65: Cannot find file containing module: 'Control_Unit'\n    Control_Unit u_Control_Unit(\n    ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/425175279/MIPS_Single_Cycle/MIPS_Single_Cycle.v:79: Cannot find file containing module: 'Reg_File'\n    Reg_File u_Reg_File(\n    ^~~~~~~~\n%Error: data/full_repos/permissive/425175279/MIPS_Single_Cycle/MIPS_Single_Cycle.v:90: Cannot find file containing module: 'Imm_Sign_Extend'\n    Imm_Sign_Extend u_Imm_Sign_Extend(\n    ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/425175279/MIPS_Single_Cycle/MIPS_Single_Cycle.v:95: Cannot find file containing module: 'Data_Memory'\n    Data_Memory u_Data_Memory(\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/425175279/MIPS_Single_Cycle/MIPS_Single_Cycle.v:105: Cannot find file containing module: 'ALU_Control_Unit'\n    ALU_Control_Unit u_ALU_Control_Unit(\n    ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/425175279/MIPS_Single_Cycle/MIPS_Single_Cycle.v:111: Cannot find file containing module: 'ALU'\n    ALU u_ALU(\n    ^~~\n%Error: Exiting due to 8 error(s)\n"
module MIPS_Single_Cycle(

    input        clk,
    input        rst_n


    
);
    wire [31:0]     PC;
    wire [31:0]     Instr,ALUResult;
    wire [31:0]     ReadData,WriteData;
    wire [31:0]     SrcA,SrcB;
    wire            MemWrite,RegWrite;

    wire            RegDst,ALUSrc,MemtoReg;

    wire [4:0]      WriteReg;
    wire [31:0]     SignImm,RD2;
    wire [31:0]     WD3;

    wire            PCSrc,Branch,Zero;
    wire            Jump;

    wire [2:0]      ALUControl;
    wire [1:0]      ALUOp;


    assign PCSrc        = Branch & Zero;
    assign WriteReg     = RegDst ? Instr[15:11] : Instr[20:16];
    assign SrcB         = ALUSrc ? SignImm : RD2;
    assign WD3          = MemtoReg ? ReadData : ALUResult;
    assign WriteData    = RD2;

    PC_Counter u_PC_Counter(
        .clk(clk),
        .rst_n(rst_n),
        .PC(PC),
        .PCSrc(PCSrc),
        .Jump(Jump),
        .Jump_low_26Bit(Instr[25:0]),
        .SignImm(SignImm)
    );

    Instr_Memory u_Instr_Memory(
        .RD(Instr),
        .A(PC)
    );

    Control_Unit u_Control_Unit(
        .clk(clk),
        .rst_n(rst_n),
        .Opcode(Instr[31:26]),
        .MemWrite(MemWrite),
        .RegWrite(RegWrite),
        .RegDst(RegDst),
        .ALUSrc(ALUSrc),
        .MemtoReg(MemtoReg),
        .ALUOp(ALUOp),
        .Jump(Jump),
        .Branch(Branch)
    );

    Reg_File u_Reg_File(
        .clk(clk),
        .A1(Instr[25:21]),
        .RD1(SrcA),
        .A2(Instr[20:16]),
        .RD2(RD2),
        .A3(WriteReg),
        .RegWrite(RegWrite),
        .WD3(WD3)
    );

    Imm_Sign_Extend u_Imm_Sign_Extend(
        .Immediate(Instr[15:0]),
        .SignImm(SignImm)
    );

    Data_Memory u_Data_Memory(
        .clk(clk),
        .rst_n(rst_n),

        .A(ALUResult),
        .RD(ReadData),
        .WE(MemWrite),
        .WD(WriteData)
    );

    ALU_Control_Unit u_ALU_Control_Unit(
        .Funct(Instr[5:0]),
        .ALUOp(ALUOp),
        .ALUControl(ALUControl)
    );

    ALU u_ALU(
        .SrcA(SrcA),
        .SrcB(SrcB),
        .ALUControl(ALUControl),
        .ALUResult(ALUResult),
        .Zero(Zero)
    );

endmodule
module MIPS_Single_Cycle(

    input        clk,
    input        rst_n


    
);

    wire [31:0]     PC;
    wire [31:0]     Instr,ALUResult;
    wire [31:0]     ReadData,WriteData;
    wire [31:0]     SrcA,SrcB;
    wire            MemWrite,RegWrite;

    wire            RegDst,ALUSrc,MemtoReg;

    wire [4:0]      WriteReg;
    wire [31:0]     SignImm,RD2;
    wire [31:0]     WD3;

    wire            PCSrc,Branch,Zero;
    wire            Jump;

    wire [2:0]      ALUControl;
    wire [1:0]      ALUOp;


    assign PCSrc        = Branch & Zero;
    assign WriteReg     = RegDst ? Instr[15:11] : Instr[20:16];
    assign SrcB         = ALUSrc ? SignImm : RD2;
    assign WD3          = MemtoReg ? ReadData : ALUResult;
    assign WriteData    = RD2;

    PC_Counter u_PC_Counter(
        .clk(clk),
        .rst_n(rst_n),
        .PC(PC),
        .PCSrc(PCSrc),
        .Jump(Jump),
        .Jump_low_26Bit(Instr[25:0]),
        .SignImm(SignImm)
    );

    Instr_Memory u_Instr_Memory(
        .RD(Instr),
        .A(PC)
    );

    Control_Unit u_Control_Unit(
        .clk(clk),
        .rst_n(rst_n),
        .Opcode(Instr[31:26]),
        .MemWrite(MemWrite),
        .RegWrite(RegWrite),
        .RegDst(RegDst),
        .ALUSrc(ALUSrc),
        .MemtoReg(MemtoReg),
        .ALUOp(ALUOp),
        .Jump(Jump),
        .Branch(Branch)
    );

    Reg_File u_Reg_File(
        .clk(clk),
        .A1(Instr[25:21]),
        .RD1(SrcA),
        .A2(Instr[20:16]),
        .RD2(RD2),
        .A3(WriteReg),
        .RegWrite(RegWrite),
        .WD3(WD3)
    );

    Imm_Sign_Extend u_Imm_Sign_Extend(
        .Immediate(Instr[15:0]),
        .SignImm(SignImm)
    );

    Data_Memory u_Data_Memory(
        .clk(clk),
        .rst_n(rst_n),

        .A(ALUResult),
        .RD(ReadData),
        .WE(MemWrite),
        .WD(WriteData)
    );

    ALU_Control_Unit u_ALU_Control_Unit(
        .Funct(Instr[5:0]),
        .ALUOp(ALUOp),
        .ALUControl(ALUControl)
    );

    ALU u_ALU(
        .SrcA(SrcA),
        .SrcB(SrcB),
        .ALUControl(ALUControl),
        .ALUResult(ALUResult),
        .Zero(Zero)
    );

endmodule