data/full_repos/permissive/42815087/cpu/SyzygyB100.srcs/sources_1/new/InstructionDecoder.v
1: b'%Warning-WIDTH: data/full_repos/permissive/42815087/cpu/SyzygyB100.srcs/sources_1/new/InstructionDecoder.v:100: Operator ASSIGNDLY expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h0\' generates 7 bits.\n                                                                                                              : ... In instance InstructionDecoder\n                  aluArgs[7:0] <= 7\'b0000000;\n                               ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module InstructionDecoder(
    input [15:0] instrIn,
    output reg [3:0] sysFlagNum = 4'h0,
    output reg sysFlagVal = 1'b0,
    output reg sysFlagWrite = 1'b0,
    output reg [14:0] pushVal = 15'b000000000000000,
    output reg [3:0] regReadSelect = 4'b0000,
    output reg readEn = 1'b0,
    output reg [3:0] regWriteSelect = 4'b0000,
    output reg writeEn = 1'b0,
    output reg [2:0] jumpCondition = 3'b000,
    output reg [2:0] aluOp = 3'b000,
    output reg [7:0] aluArgs = 8'h00,
    output reg [3:0] periphSelect = 4'b0000,
    output reg [3:0] periphReg = 4'b0000,
    output reg periphRead = 1'b0,
    output reg periphWrite = 1'b0,
    output reg periphExec = 1'b0,
    output reg [1:0] accumMuxSelect = 2'b00,
    output reg ioWrite = 1'b0
  );
  


  always @ (instrIn) begin
    

    if(instrIn[15]) begin
      
      sysFlagNum[3:0] <= 4'h0;
      sysFlagVal <= 1'b0;
      sysFlagWrite <= 1'b0;
      pushVal[14:0] <= instrIn[14:0];
      regReadSelect[3:0] <= 4'b0000;
      readEn <= 1'b0;
      regWriteSelect[3:0] <= 4'b0010;
      writeEn <= 1'b1;
      jumpCondition[2:0] <= 3'b000;
      aluOp[2:0] <= 3'b000;
      aluArgs[7:0] <= 8'h00;
      periphSelect[3:0] <= 4'b0000;
      periphReg[3:0] <= 4'b0000;
      periphRead <= 1'b0;
      periphWrite <= 1'b0;
      periphExec <= 1'b0;
      accumMuxSelect[1:0] <= 2'b10;
      ioWrite <= 1'b0;
      

    end else begin
    

      case (instrIn[14:12])
          

        3'b000: begin
        

          case(instrIn[11:8])
            

            4'b0001: begin
            

              case(instrIn[7:0])
                

                8'h00: begin
                  sysFlagNum[3:0] <= 4'h0;
                  sysFlagVal <= 1'b1;
                  sysFlagWrite <= 1'b1;
                  pushVal[14:0] <= 15'b000000000000000;
                  regReadSelect[3:0] <= 4'b0000;
                  readEn <= 1'b0;
                  regWriteSelect[3:0] <= 4'b0000;
                  writeEn <= 1'b0;
                  jumpCondition[2:0] <= 3'b111;
                  aluOp[2:0] <= 3'b000;
                  aluArgs[7:0] <= 7'b0000000;
                  periphSelect[3:0] <= 4'b0000;
                  periphReg[3:0] <= 4'b0000;
                  periphRead <= 1'b0;
                  periphWrite <= 1'b0;
                  periphExec <= 1'b0;
                  accumMuxSelect[1:0] <= 2'b00;
                  ioWrite <= 1'b0;
                end
                

                8'h01: begin
                  sysFlagNum[3:0] <= 4'h0;
                  sysFlagVal <= 1'b0;
                  sysFlagWrite <= 1'b1;
                  pushVal[14:0] <= 15'b000000000000000;
                  regReadSelect[3:0] <= 4'b0000;
                  readEn <= 1'b0;
                  regWriteSelect[3:0] <= 4'b0000;
                  writeEn <= 1'b0;
                  jumpCondition[2:0] <= 3'b000;
                  aluOp[2:0] <= 3'b000;
                  aluArgs[7:0] <= 8'h00;
                  periphSelect[3:0] <= 4'b0000;
                  periphReg[3:0] <= 4'b0000;
                  periphRead <= 1'b0;
                  periphWrite <= 1'b0;
                  periphExec <= 1'b0;
                  accumMuxSelect[1:0] <= 2'b00;
                  ioWrite <= 1'b0;
                end
                

                default: begin
                  sysFlagNum[3:0] <= 4'h0;
                  sysFlagVal <= 1'b0;
                  sysFlagWrite <= 1'b0;
                  pushVal[14:0] <= 15'b000000000000000;
                  regReadSelect[3:0] <= 4'b0000;
                  readEn <= 1'b0;
                  regWriteSelect[3:0] <= 4'b0000;
                  writeEn <= 1'b0;
                  jumpCondition[2:0] <= 3'b000;
                  aluOp[2:0] <= 3'b000;
                  aluArgs[7:0] <= 8'h00;
                  periphSelect[3:0] <= 4'b0000;
                  periphReg[3:0] <= 4'b0000;
                  periphRead <= 1'b0;
                  periphWrite <= 1'b0;
                  periphExec <= 1'b0;
                  accumMuxSelect[1:0] <= 2'b00;
                  ioWrite <= 1'b0;
                end
              endcase
            end
            

            default: begin
              sysFlagNum[3:0] <= 4'h0;
              sysFlagVal <= 1'b0;
              sysFlagWrite <= 1'b0;
              pushVal[14:0] <= 15'b000000000000000;
              regReadSelect[3:0] <= 4'b0000;
              readEn <= 1'b0;
              regWriteSelect[3:0] <= 4'b0000;
              writeEn <= 1'b0;
              jumpCondition[2:0] <= 3'b000;
              aluOp[2:0] <= 3'b000;
              aluArgs[7:0] <= 8'h00;
              periphSelect[3:0] <= 4'b0000;
              periphReg[3:0] <= 4'b0000;
              periphRead <= 1'b0;
              periphWrite <= 1'b0;
              periphExec <= 1'b0;
              accumMuxSelect[1:0] <= 2'b00;
              ioWrite <= 1'b0;
            end
          endcase
        end
        

        3'b001: begin
          sysFlagNum[3:0] <= 4'h0;
          sysFlagVal <= 1'b0;
          sysFlagWrite <= 1'b0;
          pushVal[14:0] <= 15'b000000000000000;
          regReadSelect[3:0] <= instrIn[11:8];
          regWriteSelect[3:0] <= instrIn[7:4];
          readEn <= 1'b1;
          writeEn <= 1'b1;
          jumpCondition[2:0] <= 3'b000;
          aluOp[2:0] <= 3'b000;
          aluArgs[7:0] <= 8'h00;
          periphSelect[3:0] <= 4'b0000;
          periphReg[3:0] <= 4'b0000;
          periphRead <= 1'b0;
          periphWrite <= 1'b0;
          periphExec <= 1'b0;
          accumMuxSelect[1:0] <= 2'b00;
          ioWrite <= 1'b0;
        end
        

        3'b010: begin
          sysFlagNum[3:0] <= 4'h0;
          sysFlagVal <= 1'b0;
          sysFlagWrite <= 1'b0;
          pushVal[14:0] <= 15'b000000000000000;
          regReadSelect[3:0] <= 4'b0011;
          readEn <= 1'b1;
          regWriteSelect[3:0] <= 4'b0001;
          writeEn <= 1'b1;
          jumpCondition[2:0] <= instrIn[11:9];
          aluOp[2:0] <= 3'b000;
          aluArgs[7:0] <= 8'h00;
          periphSelect[3:0] <= 4'b0000;
          periphReg[3:0] <= 4'b0000;
          periphRead <= 1'b0;
          periphWrite <= 1'b0;
          periphExec <= 1'b0;
          accumMuxSelect[1:0] <= 2'b00;
          ioWrite <= 1'b0;
        end
        

        3'b011: begin
          sysFlagNum[3:0] <= 4'h0;
          sysFlagVal <= 1'b0;
          sysFlagWrite <= 1'b0;
          pushVal[14:0] <= 15'b000000000000000;
          regReadSelect[3:0] <= 4'b0000;
          readEn <= 1'b0;
          regWriteSelect[3:0] <= 4'b0010;
          writeEn <= 1'b1;
          jumpCondition[2:0] <= 3'b000;
          aluOp[2:0] <= instrIn[10:8];
          aluArgs[7:0] <= instrIn[7:0];
          periphSelect[3:0] <= 4'b0000;
          periphReg[3:0] <= 4'b0000;
          periphRead <= 1'b0;
          periphWrite <= 1'b0;
          periphExec <= 1'b0;
          accumMuxSelect[1:0] <= 2'b11;
          ioWrite <= 1'b0;
        end
        

        3'b100: begin
          sysFlagNum[3:0] <= 4'h0;
          sysFlagVal <= 1'b0;
          sysFlagWrite <= 1'b0;
          pushVal[14:0] <= 15'b000000000000000;
          jumpCondition[2:0] <= 3'b000;
          aluOp[2:0] <= 3'b000;
          aluArgs[7:0] <= 8'h00;
          periphSelect[3:0] <= instrIn[11:8];
          periphReg[3:0] <= instrIn[7:4];
          periphRead <= (~instrIn[2]) & (~instrIn[3]);
          periphWrite <= instrIn[2] & (~instrIn[3]);
          periphExec <= instrIn[3];
          accumMuxSelect[1:0] <= 2'b00;
          readEn <= 1'b0;
          regReadSelect[3:0] <= 4'b0000;
          regWriteSelect[3:0] <= 4'b0000;
          writeEn <= 1'b0;
          

          if(instrIn[2] == 1'b0) begin
            ioWrite <= 1'b1;
          end else begin
            ioWrite <= 1'b0;
            
          end
        end
        

        default: begin 
          sysFlagNum[3:0] <= 4'h0;
          sysFlagVal <= 1'b0;
          sysFlagWrite <= 1'b0;
          pushVal[14:0] <= 15'b000000000000000;
          regReadSelect[3:0] <= 4'b0000;
          readEn <= 1'b0;
          regWriteSelect[3:0] <= 4'b0000;
          writeEn <= 1'b0;
          jumpCondition[2:0] <= 3'b000;
          aluOp[2:0] <= 3'b000;
          aluArgs[7:0] <= 8'h00;
          periphSelect[3:0] <= 4'b0000;
          periphReg[3:0] <= 4'b0000;
          periphRead <= 1'b0;
          periphWrite <= 1'b0;
          periphExec <= 1'b0;
          accumMuxSelect[1:0] <= 2'b00;
          ioWrite <= 1'b0;
        end
        
      endcase
    end
  end
  
endmodule
module InstructionDecoder(
    input [15:0] instrIn,
    output reg [3:0] sysFlagNum = 4'h0,
    output reg sysFlagVal = 1'b0,
    output reg sysFlagWrite = 1'b0,
    output reg [14:0] pushVal = 15'b000000000000000,
    output reg [3:0] regReadSelect = 4'b0000,
    output reg readEn = 1'b0,
    output reg [3:0] regWriteSelect = 4'b0000,
    output reg writeEn = 1'b0,
    output reg [2:0] jumpCondition = 3'b000,
    output reg [2:0] aluOp = 3'b000,
    output reg [7:0] aluArgs = 8'h00,
    output reg [3:0] periphSelect = 4'b0000,
    output reg [3:0] periphReg = 4'b0000,
    output reg periphRead = 1'b0,
    output reg periphWrite = 1'b0,
    output reg periphExec = 1'b0,
    output reg [1:0] accumMuxSelect = 2'b00,
    output reg ioWrite = 1'b0
  );

  


  always @ (instrIn) begin
    

    if(instrIn[15]) begin
      
      sysFlagNum[3:0] <= 4'h0;
      sysFlagVal <= 1'b0;
      sysFlagWrite <= 1'b0;
      pushVal[14:0] <= instrIn[14:0];
      regReadSelect[3:0] <= 4'b0000;
      readEn <= 1'b0;
      regWriteSelect[3:0] <= 4'b0010;
      writeEn <= 1'b1;
      jumpCondition[2:0] <= 3'b000;
      aluOp[2:0] <= 3'b000;
      aluArgs[7:0] <= 8'h00;
      periphSelect[3:0] <= 4'b0000;
      periphReg[3:0] <= 4'b0000;
      periphRead <= 1'b0;
      periphWrite <= 1'b0;
      periphExec <= 1'b0;
      accumMuxSelect[1:0] <= 2'b10;
      ioWrite <= 1'b0;
      

    end else begin
    

      case (instrIn[14:12])
          

        3'b000: begin
        

          case(instrIn[11:8])
            

            4'b0001: begin
            

              case(instrIn[7:0])
                

                8'h00: begin
                  sysFlagNum[3:0] <= 4'h0;
                  sysFlagVal <= 1'b1;
                  sysFlagWrite <= 1'b1;
                  pushVal[14:0] <= 15'b000000000000000;
                  regReadSelect[3:0] <= 4'b0000;
                  readEn <= 1'b0;
                  regWriteSelect[3:0] <= 4'b0000;
                  writeEn <= 1'b0;
                  jumpCondition[2:0] <= 3'b111;
                  aluOp[2:0] <= 3'b000;
                  aluArgs[7:0] <= 7'b0000000;
                  periphSelect[3:0] <= 4'b0000;
                  periphReg[3:0] <= 4'b0000;
                  periphRead <= 1'b0;
                  periphWrite <= 1'b0;
                  periphExec <= 1'b0;
                  accumMuxSelect[1:0] <= 2'b00;
                  ioWrite <= 1'b0;
                end
                

                8'h01: begin
                  sysFlagNum[3:0] <= 4'h0;
                  sysFlagVal <= 1'b0;
                  sysFlagWrite <= 1'b1;
                  pushVal[14:0] <= 15'b000000000000000;
                  regReadSelect[3:0] <= 4'b0000;
                  readEn <= 1'b0;
                  regWriteSelect[3:0] <= 4'b0000;
                  writeEn <= 1'b0;
                  jumpCondition[2:0] <= 3'b000;
                  aluOp[2:0] <= 3'b000;
                  aluArgs[7:0] <= 8'h00;
                  periphSelect[3:0] <= 4'b0000;
                  periphReg[3:0] <= 4'b0000;
                  periphRead <= 1'b0;
                  periphWrite <= 1'b0;
                  periphExec <= 1'b0;
                  accumMuxSelect[1:0] <= 2'b00;
                  ioWrite <= 1'b0;
                end
                

                default: begin
                  sysFlagNum[3:0] <= 4'h0;
                  sysFlagVal <= 1'b0;
                  sysFlagWrite <= 1'b0;
                  pushVal[14:0] <= 15'b000000000000000;
                  regReadSelect[3:0] <= 4'b0000;
                  readEn <= 1'b0;
                  regWriteSelect[3:0] <= 4'b0000;
                  writeEn <= 1'b0;
                  jumpCondition[2:0] <= 3'b000;
                  aluOp[2:0] <= 3'b000;
                  aluArgs[7:0] <= 8'h00;
                  periphSelect[3:0] <= 4'b0000;
                  periphReg[3:0] <= 4'b0000;
                  periphRead <= 1'b0;
                  periphWrite <= 1'b0;
                  periphExec <= 1'b0;
                  accumMuxSelect[1:0] <= 2'b00;
                  ioWrite <= 1'b0;
                end
              endcase
            end
            

            default: begin
              sysFlagNum[3:0] <= 4'h0;
              sysFlagVal <= 1'b0;
              sysFlagWrite <= 1'b0;
              pushVal[14:0] <= 15'b000000000000000;
              regReadSelect[3:0] <= 4'b0000;
              readEn <= 1'b0;
              regWriteSelect[3:0] <= 4'b0000;
              writeEn <= 1'b0;
              jumpCondition[2:0] <= 3'b000;
              aluOp[2:0] <= 3'b000;
              aluArgs[7:0] <= 8'h00;
              periphSelect[3:0] <= 4'b0000;
              periphReg[3:0] <= 4'b0000;
              periphRead <= 1'b0;
              periphWrite <= 1'b0;
              periphExec <= 1'b0;
              accumMuxSelect[1:0] <= 2'b00;
              ioWrite <= 1'b0;
            end
          endcase
        end
        

        3'b001: begin
          sysFlagNum[3:0] <= 4'h0;
          sysFlagVal <= 1'b0;
          sysFlagWrite <= 1'b0;
          pushVal[14:0] <= 15'b000000000000000;
          regReadSelect[3:0] <= instrIn[11:8];
          regWriteSelect[3:0] <= instrIn[7:4];
          readEn <= 1'b1;
          writeEn <= 1'b1;
          jumpCondition[2:0] <= 3'b000;
          aluOp[2:0] <= 3'b000;
          aluArgs[7:0] <= 8'h00;
          periphSelect[3:0] <= 4'b0000;
          periphReg[3:0] <= 4'b0000;
          periphRead <= 1'b0;
          periphWrite <= 1'b0;
          periphExec <= 1'b0;
          accumMuxSelect[1:0] <= 2'b00;
          ioWrite <= 1'b0;
        end
        

        3'b010: begin
          sysFlagNum[3:0] <= 4'h0;
          sysFlagVal <= 1'b0;
          sysFlagWrite <= 1'b0;
          pushVal[14:0] <= 15'b000000000000000;
          regReadSelect[3:0] <= 4'b0011;
          readEn <= 1'b1;
          regWriteSelect[3:0] <= 4'b0001;
          writeEn <= 1'b1;
          jumpCondition[2:0] <= instrIn[11:9];
          aluOp[2:0] <= 3'b000;
          aluArgs[7:0] <= 8'h00;
          periphSelect[3:0] <= 4'b0000;
          periphReg[3:0] <= 4'b0000;
          periphRead <= 1'b0;
          periphWrite <= 1'b0;
          periphExec <= 1'b0;
          accumMuxSelect[1:0] <= 2'b00;
          ioWrite <= 1'b0;
        end
        

        3'b011: begin
          sysFlagNum[3:0] <= 4'h0;
          sysFlagVal <= 1'b0;
          sysFlagWrite <= 1'b0;
          pushVal[14:0] <= 15'b000000000000000;
          regReadSelect[3:0] <= 4'b0000;
          readEn <= 1'b0;
          regWriteSelect[3:0] <= 4'b0010;
          writeEn <= 1'b1;
          jumpCondition[2:0] <= 3'b000;
          aluOp[2:0] <= instrIn[10:8];
          aluArgs[7:0] <= instrIn[7:0];
          periphSelect[3:0] <= 4'b0000;
          periphReg[3:0] <= 4'b0000;
          periphRead <= 1'b0;
          periphWrite <= 1'b0;
          periphExec <= 1'b0;
          accumMuxSelect[1:0] <= 2'b11;
          ioWrite <= 1'b0;
        end
        

        3'b100: begin
          sysFlagNum[3:0] <= 4'h0;
          sysFlagVal <= 1'b0;
          sysFlagWrite <= 1'b0;
          pushVal[14:0] <= 15'b000000000000000;
          jumpCondition[2:0] <= 3'b000;
          aluOp[2:0] <= 3'b000;
          aluArgs[7:0] <= 8'h00;
          periphSelect[3:0] <= instrIn[11:8];
          periphReg[3:0] <= instrIn[7:4];
          periphRead <= (~instrIn[2]) & (~instrIn[3]);
          periphWrite <= instrIn[2] & (~instrIn[3]);
          periphExec <= instrIn[3];
          accumMuxSelect[1:0] <= 2'b00;
          readEn <= 1'b0;
          regReadSelect[3:0] <= 4'b0000;
          regWriteSelect[3:0] <= 4'b0000;
          writeEn <= 1'b0;
          

          if(instrIn[2] == 1'b0) begin
            ioWrite <= 1'b1;
          end else begin
            ioWrite <= 1'b0;
            
          end
        end
        

        default: begin 
          sysFlagNum[3:0] <= 4'h0;
          sysFlagVal <= 1'b0;
          sysFlagWrite <= 1'b0;
          pushVal[14:0] <= 15'b000000000000000;
          regReadSelect[3:0] <= 4'b0000;
          readEn <= 1'b0;
          regWriteSelect[3:0] <= 4'b0000;
          writeEn <= 1'b0;
          jumpCondition[2:0] <= 3'b000;
          aluOp[2:0] <= 3'b000;
          aluArgs[7:0] <= 8'h00;
          periphSelect[3:0] <= 4'b0000;
          periphReg[3:0] <= 4'b0000;
          periphRead <= 1'b0;
          periphWrite <= 1'b0;
          periphExec <= 1'b0;
          accumMuxSelect[1:0] <= 2'b00;
          ioWrite <= 1'b0;
        end
        
      endcase
    end
  end
  
endmodule