data/full_repos/permissive/461069000/timer/src/timer_output_controller.v
data/verilator_xmls/a0d32ba3-84cb-4c4f-965e-2a7212665c39.xml
module timer_output_controller
#(
    parameter COUNTER_BIT_WIDTH = 8
)(
    input [COUNTER_BIT_WIDTH-1:0] counter,
    input [COUNTER_BIT_WIDTH-1:0] cmp_1_value,
    input [COUNTER_BIT_WIDTH-1:0] cmp_0_value,
    output wire cmp_1_match,
    output wire cmp_0_match
);

    assign cmp_1_match  = (counter == cmp_1_value);
    assign cmp_0_match  = (counter == cmp_0_value);
endmodule
module timer_output_controller
#(
    parameter COUNTER_BIT_WIDTH = 8
)(
    input [COUNTER_BIT_WIDTH-1:0] counter,
    input [COUNTER_BIT_WIDTH-1:0] cmp_1_value,
    input [COUNTER_BIT_WIDTH-1:0] cmp_0_value,
    output wire cmp_1_match,
    output wire cmp_0_match
);


    assign cmp_1_match  = (counter == cmp_1_value);
    assign cmp_0_match  = (counter == cmp_0_value);
endmodule