data/full_repos/permissive/447976230/fpga/usrp3/top/e320/ip/ten_gig_eth_pcs_pma/ten_gige_phy_clk_gen.v
1: b"%Error: data/full_repos/permissive/447976230/fpga/usrp3/top/e320/ip/ten_gig_eth_pcs_pma/ten_gige_phy_clk_gen.v:14: Cannot find file containing module: 'BUFG'\n   BUFG clk156_bufg_inst (\n   ^~~~\n        ... Looked in:\n             data/full_repos/permissive/447976230/fpga/usrp3/top/e320/ip/ten_gig_eth_pcs_pma,data/full_repos/permissive/447976230/BUFG\n             data/full_repos/permissive/447976230/fpga/usrp3/top/e320/ip/ten_gig_eth_pcs_pma,data/full_repos/permissive/447976230/BUFG.v\n             data/full_repos/permissive/447976230/fpga/usrp3/top/e320/ip/ten_gig_eth_pcs_pma,data/full_repos/permissive/447976230/BUFG.sv\n             BUFG\n             BUFG.v\n             BUFG.sv\n             obj_dir/BUFG\n             obj_dir/BUFG.v\n             obj_dir/BUFG.sv\n%Error: data/full_repos/permissive/447976230/fpga/usrp3/top/e320/ip/ten_gig_eth_pcs_pma/ten_gige_phy_clk_gen.v:20: Cannot find file containing module: 'BUFR'\n   BUFR # (\n   ^~~~\n%Error: data/full_repos/permissive/447976230/fpga/usrp3/top/e320/ip/ten_gig_eth_pcs_pma/ten_gige_phy_clk_gen.v:29: Cannot find file containing module: 'BUFG'\n   BUFG dclk_bufg_i (\n   ^~~~\n%Error: Exiting due to 3 error(s)\n"
module ten_gige_phy_clk_gen
(
   input refclk_ibuf,
   output clk156,
   output dclk
);

   wire dclk_buf;

   BUFG clk156_bufg_inst (
      .I (refclk_ibuf),
      .O (clk156)
   );


   BUFR # (
      .BUFR_DIVIDE ("2")
   ) dclk_divide_by_2_buf (
      .I   (clk156),
      .O   (dclk_buf),
      .CE  (1'b1),
      .CLR (1'b0)
   );

   BUFG dclk_bufg_i (
      .I (dclk_buf),
      .O (dclk)
   );

endmodule
module ten_gige_phy_clk_gen
(
   input refclk_ibuf,
   output clk156,
   output dclk
);


   wire dclk_buf;

   BUFG clk156_bufg_inst (
      .I (refclk_ibuf),
      .O (clk156)
   );


   BUFR # (
      .BUFR_DIVIDE ("2")
   ) dclk_divide_by_2_buf (
      .I   (clk156),
      .O   (dclk_buf),
      .CE  (1'b1),
      .CLR (1'b0)
   );

   BUFG dclk_bufg_i (
      .I (dclk_buf),
      .O (dclk)
   );

endmodule