data/full_repos/permissive/49670587/vtr/ODIN_II/REGRESSION_TESTS/BENCHMARKS/MICROBENCHMARKS/bm_dag3_lpm_log_mod.v
1: b'%Warning-WIDTH: data/full_repos/permissive/49670587/vtr/ODIN_II/REGRESSION_TESTS/BENCHMARKS/MICROBENCHMARKS/bm_dag3_lpm_log_mod.v:84: Operator XOR expects 2 bits on the RHS, but RHS\'s VARREF \'temp3\' generates 1 bits.\n                                                                                                                                    : ... In instance bm_dag3_lpm_log_mod.top_b\n temp2 <= seventh | eight ^ temp3;\n                          ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module 	d(clock, 
		eleventh, 
		twelfth, 
		out5);


input	clock;
input eleventh;
input twelfth;
output  out5;
reg     out5;
reg temp6;

always @(posedge clock)
begin
	temp6 <= eleventh ^ twelfth;
	out5 <= temp6 | twelfth;
end

endmodule
module 	d(clock, 
		eleventh, 
		twelfth, 
		out5);



input	clock;
input eleventh;
input twelfth;
output  out5;
reg     out5;
reg temp6;

always @(posedge clock)
begin
	temp6 <= eleventh ^ twelfth;
	out5 <= temp6 | twelfth;
end

endmodule