data/full_repos/permissive/500717851/verilog/rtl/wfg/wfg_stim_sine/rtl/wfg_stim_sine_top.sv
1: b"%Error: data/full_repos/permissive/500717851/verilog/rtl/wfg/wfg_stim_sine/rtl/wfg_stim_sine_top.sv:38: Cannot find file containing module: 'wfg_stim_sine_wishbone_reg'\n    wfg_stim_sine_wishbone_reg wfg_stim_sine_wishbone_reg (\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/500717851/verilog/rtl/wfg/wfg_stim_sine/rtl,data/full_repos/permissive/500717851/wfg_stim_sine_wishbone_reg\n             data/full_repos/permissive/500717851/verilog/rtl/wfg/wfg_stim_sine/rtl,data/full_repos/permissive/500717851/wfg_stim_sine_wishbone_reg.v\n             data/full_repos/permissive/500717851/verilog/rtl/wfg/wfg_stim_sine/rtl,data/full_repos/permissive/500717851/wfg_stim_sine_wishbone_reg.sv\n             wfg_stim_sine_wishbone_reg\n             wfg_stim_sine_wishbone_reg.v\n             wfg_stim_sine_wishbone_reg.sv\n             obj_dir/wfg_stim_sine_wishbone_reg\n             obj_dir/wfg_stim_sine_wishbone_reg.v\n             obj_dir/wfg_stim_sine_wishbone_reg.sv\n%Error: data/full_repos/permissive/500717851/verilog/rtl/wfg/wfg_stim_sine/rtl/wfg_stim_sine_top.sv:63: Cannot find file containing module: 'wfg_stim_sine'\n    wfg_stim_sine wfg_stim_sine (\n    ^~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module wfg_stim_sine_top #(
    parameter int BUSW = 32
) (

    input                 wb_clk_i,
    input                 wb_rst_i,
    input                 wbs_stb_i,
    input                 wbs_cyc_i,
    input                 wbs_we_i,
    input  [(BUSW/8-1):0] wbs_sel_i,
    input  [  (BUSW-1):0] wbs_dat_i,
    input  [  (BUSW-1):0] wbs_adr_i,
    output                wbs_ack_o,
    output [  (BUSW-1):0] wbs_dat_o,


    input                wfg_axis_tready_i,
    output               wfg_axis_tvalid_o,
    output signed [31:0] wfg_axis_tdata_o
);






    logic         ctrl_en_q;
    logic [15: 0] gain_val_q;
    logic [15: 0] inc_val_q;
    logic [17: 0] offset_val_q;



    wfg_stim_sine_wishbone_reg wfg_stim_sine_wishbone_reg (
        .wb_clk_i (wb_clk_i),
        .wb_rst_i (wb_rst_i),
        .wbs_stb_i(wbs_stb_i),
        .wbs_cyc_i(wbs_cyc_i),
        .wbs_we_i (wbs_we_i),
        .wbs_sel_i(wbs_sel_i),
        .wbs_dat_i(wbs_dat_i),
        .wbs_adr_i(wbs_adr_i),
        .wbs_ack_o(wbs_ack_o),
        .wbs_dat_o(wbs_dat_o),






        .ctrl_en_q_o   (ctrl_en_q),
        .gain_val_q_o  (gain_val_q),
        .inc_val_q_o   (inc_val_q),
        .offset_val_q_o(offset_val_q)


    );

    wfg_stim_sine wfg_stim_sine (
        .clk              (wb_clk_i),
        .rst_n            (!wb_rst_i),
        .wfg_axis_tready_i(wfg_axis_tready_i),
        .wfg_axis_tvalid_o(wfg_axis_tvalid_o),
        .wfg_axis_tdata_o (wfg_axis_tdata_o),
        .ctrl_en_q_i      (ctrl_en_q),
        .inc_val_q_i      (inc_val_q),
        .gain_val_q_i     (gain_val_q),
        .offset_val_q_i   (offset_val_q)
    );

endmodule
module wfg_stim_sine_top #(
    parameter int BUSW = 32
) (

    input                 wb_clk_i,
    input                 wb_rst_i,
    input                 wbs_stb_i,
    input                 wbs_cyc_i,
    input                 wbs_we_i,
    input  [(BUSW/8-1):0] wbs_sel_i,
    input  [  (BUSW-1):0] wbs_dat_i,
    input  [  (BUSW-1):0] wbs_adr_i,
    output                wbs_ack_o,
    output [  (BUSW-1):0] wbs_dat_o,


    input                wfg_axis_tready_i,
    output               wfg_axis_tvalid_o,
    output signed [31:0] wfg_axis_tdata_o
);







    logic         ctrl_en_q;
    logic [15: 0] gain_val_q;
    logic [15: 0] inc_val_q;
    logic [17: 0] offset_val_q;



    wfg_stim_sine_wishbone_reg wfg_stim_sine_wishbone_reg (
        .wb_clk_i (wb_clk_i),
        .wb_rst_i (wb_rst_i),
        .wbs_stb_i(wbs_stb_i),
        .wbs_cyc_i(wbs_cyc_i),
        .wbs_we_i (wbs_we_i),
        .wbs_sel_i(wbs_sel_i),
        .wbs_dat_i(wbs_dat_i),
        .wbs_adr_i(wbs_adr_i),
        .wbs_ack_o(wbs_ack_o),
        .wbs_dat_o(wbs_dat_o),






        .ctrl_en_q_o   (ctrl_en_q),
        .gain_val_q_o  (gain_val_q),
        .inc_val_q_o   (inc_val_q),
        .offset_val_q_o(offset_val_q)


    );

    wfg_stim_sine wfg_stim_sine (
        .clk              (wb_clk_i),
        .rst_n            (!wb_rst_i),
        .wfg_axis_tready_i(wfg_axis_tready_i),
        .wfg_axis_tvalid_o(wfg_axis_tvalid_o),
        .wfg_axis_tdata_o (wfg_axis_tdata_o),
        .ctrl_en_q_i      (ctrl_en_q),
        .inc_val_q_i      (inc_val_q),
        .gain_val_q_i     (gain_val_q),
        .offset_val_q_i   (offset_val_q)
    );

endmodule