data/full_repos/permissive/485026242/Lock-system/main.v
1: b"%Error: data/full_repos/permissive/485026242/Lock-system/main.v:31: Cannot find file containing module: 'counter'\n    counter c1(Enter,Check,reset,Count,Access,Alarm);  \n    ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/485026242/Lock-system,data/full_repos/permissive/485026242/counter\n             data/full_repos/permissive/485026242/Lock-system,data/full_repos/permissive/485026242/counter.v\n             data/full_repos/permissive/485026242/Lock-system,data/full_repos/permissive/485026242/counter.sv\n             counter\n             counter.v\n             counter.sv\n             obj_dir/counter\n             obj_dir/counter.v\n             obj_dir/counter.sv\n%Error: Exiting due to 1 error(s)\n"
module Lock(reset,Enter,InputPass,user,Access,Setpass,Count,Alarm);
    input reset,Enter;
    input [11:0]InputPass;
    input [1:0]user;
    output Access,Alarm;
    output [1:0] Count;
    output reg [11:0]Setpass;
    wire [11:0]Check;

always@*
    begin
        if(user==2'b00)
        begin
            Setpass=12'hAB3;
        end
        else if(user==2'b01)
        begin
            Setpass=12'hF2A;
        end
        else if(user==2'b10)
        begin
            Setpass=12'hE93;
        end
        else if(user==2'b11)
        begin
            Setpass=12'h111;
        end
    end
    assign Check=(Setpass^InputPass);
    
    counter c1(Enter,Check,reset,Count,Access,Alarm);
endmodule
module Lock(reset,Enter,InputPass,user,Access,Setpass,Count,Alarm);

    input reset,Enter;
    input [11:0]InputPass;
    input [1:0]user;
    output Access,Alarm;
    output [1:0] Count;
    output reg [11:0]Setpass;
    wire [11:0]Check;

always@*
    begin
        if(user==2'b00)
        begin
            Setpass=12'hAB3;
        end
        else if(user==2'b01)
        begin
            Setpass=12'hF2A;
        end
        else if(user==2'b10)
        begin
            Setpass=12'hE93;
        end
        else if(user==2'b11)
        begin
            Setpass=12'h111;
        end
    end
    assign Check=(Setpass^InputPass);
    
    counter c1(Enter,Check,reset,Count,Access,Alarm);
endmodule