data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/RFDMux.v
data/verilator_xmls/74f84c57-8cd5-427e-84dd-80ac7f4bec57.xml
module RFDMux(
    input Sel,
    input [31:0] In_0,
    input [31:0] In_1,
    output [31:0] Mux_Out
    );
    assign Mux_Out = Sel ? In_1 : In_0;
endmodule
module RFDMux(
    input Sel,
    input [31:0] In_0,
    input [31:0] In_1,
    output [31:0] Mux_Out
    );

    assign Mux_Out = Sel ? In_1 : In_0;
endmodule