data/full_repos/permissive/470803657/modules/memory_16x8.v
data/verilator_xmls/a2080a6d-0ed2-4281-b366-6f46d1d58626.xml
module memory_16x8 (input  wire [3:0] in_mem,
                    output wire [7:0] out_mem);

reg [7:0] ram [15:0];

initial $readmemh ("programs/program.txt", ram);

assign out_mem = ram[in_mem];

endmodule
module memory_16x8 (input  wire [3:0] in_mem,
                    output wire [7:0] out_mem);


reg [7:0] ram [15:0];

initial $readmemh ("programs/program.txt", ram);

assign out_mem = ram[in_mem];

endmodule