data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:38: Unsupported: Ignoring delay on this delayed statement.\n  #2.5 clk = ~clk;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:42: Unsupported: fork statements\n  fork begin\n  ^~~~\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:44: Unsupported: Ignoring delay on this delayed statement.\n   #0 clk = 1\'b0;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:48: Unsupported: Ignoring delay on this delayed statement.\n   #1000 nrst <= 1\'b1;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:51: Unsupported: Ignoring delay on this delayed statement.\n   #500 cc1 = 1\'b1;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:52: Unsupported: Ignoring delay on this delayed statement.\n   #1333 cc1 = 1\'b0;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:53: Unsupported: Ignoring delay on this delayed statement.\n   #7500 cc1 = 1\'b1;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:55: Unsupported: Ignoring delay on this delayed statement.\n   #3333.333 cc1 <= 1\'b0;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:56: Unsupported: Ignoring delay on this delayed statement.\n   #3333.333 cc1 <= 1\'b1;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:57: Unsupported: Ignoring delay on this delayed statement.\n   #1666.667 cc1 <= 1\'b0;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:58: Unsupported: Ignoring delay on this delayed statement.\n   #1666.667 cc1 <= 1\'b1;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:59: Unsupported: Ignoring delay on this delayed statement.\n   #1666.667 cc1 <= 1\'b0;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:60: Unsupported: Ignoring delay on this delayed statement.\n   #1666.667 cc1 <= 1\'b1;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:61: Unsupported: Ignoring delay on this delayed statement.\n   #3333.333 cc1 <= 1\'b0;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:62: Unsupported: Ignoring delay on this delayed statement.\n   #1666.667 cc1 <= 1\'b1;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:63: Unsupported: Ignoring delay on this delayed statement.\n   #1666.667 cc1 <= 1\'b0;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:64: Unsupported: Ignoring delay on this delayed statement.\n   #3333.333 cc1 <= 1\'b0;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/531279620/resource/src/tb_bmc_decoder.v:65: Unsupported: Ignoring delay on this delayed statement.\n   #3333.333 cc1 <= 1\'b1;\n   ^\n%Error: Exiting due to 1 error(s), 17 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module tb_bmc_decoder;

	reg		clk;
	reg		nrst;
	
	reg		cc1;
	wire	rdy;
	wire	bmc_q;
	
	bmc_decoder#(
		.system_khz(200000)
	)DUT(
		.nrst		(nrst),
		.clock		(clk),
		.enable		(1'b1),
		
		.bmc_in		(cc1),
		
		.rdy		(rdy),
		.bmc_q		(bmc_q)
	);
	
	always begin
		#2.5 clk = ~clk;
	end
	
	initial begin
		fork begin
			
			#0 clk = 1'b0;
			nrst = 1'b0;
			cc1 = 1'b1;
			
			#1000 nrst <= 1'b1;
			

			#500 cc1 = 1'b1;
			#1333 cc1 = 1'b0;
			#7500 cc1 = 1'b1;
			
			#3333.333 cc1 <= 1'b0;
			#3333.333 cc1 <= 1'b1;
			#1666.667 cc1 <= 1'b0;
			#1666.667 cc1 <= 1'b1;
			#1666.667 cc1 <= 1'b0;
			#1666.667 cc1 <= 1'b1;
			#3333.333 cc1 <= 1'b0;
			#1666.667 cc1 <= 1'b1;
			#1666.667 cc1 <= 1'b0;
			#3333.333 cc1 <= 1'b0;
			#3333.333 cc1 <= 1'b1;
			
		end join
	end
	
endmodule
module tb_bmc_decoder;


	reg		clk;
	reg		nrst;
	
	reg		cc1;
	wire	rdy;
	wire	bmc_q;
	
	bmc_decoder#(
		.system_khz(200000)
	)DUT(
		.nrst		(nrst),
		.clock		(clk),
		.enable		(1'b1),
		
		.bmc_in		(cc1),
		
		.rdy		(rdy),
		.bmc_q		(bmc_q)
	);
	
	always begin
		#2.5 clk = ~clk;
	end
	
	initial begin
		fork begin
			
			#0 clk = 1'b0;
			nrst = 1'b0;
			cc1 = 1'b1;
			
			#1000 nrst <= 1'b1;
			

			#500 cc1 = 1'b1;
			#1333 cc1 = 1'b0;
			#7500 cc1 = 1'b1;
			
			#3333.333 cc1 <= 1'b0;
			#3333.333 cc1 <= 1'b1;
			#1666.667 cc1 <= 1'b0;
			#1666.667 cc1 <= 1'b1;
			#1666.667 cc1 <= 1'b0;
			#1666.667 cc1 <= 1'b1;
			#3333.333 cc1 <= 1'b0;
			#1666.667 cc1 <= 1'b1;
			#1666.667 cc1 <= 1'b0;
			#3333.333 cc1 <= 1'b0;
			#3333.333 cc1 <= 1'b1;
			
		end join
	end
	
endmodule