data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/macro/rstsyn04.v
1: b"%Error: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/macro/rstsyn04.v:46: Cannot find file containing module: 'rstsyn01'\nrstsyn01 rstm0  (rst_, clk[0],  scanmode, rstmsk[0],  orst_[0]);\n^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/macro,data/full_repos/permissive/530013823/rstsyn01\n             data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/macro,data/full_repos/permissive/530013823/rstsyn01.v\n             data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/macro,data/full_repos/permissive/530013823/rstsyn01.sv\n             rstsyn01\n             rstsyn01.v\n             rstsyn01.sv\n             obj_dir/rstsyn01\n             obj_dir/rstsyn01.v\n             obj_dir/rstsyn01.sv\n%Error: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/macro/rstsyn04.v:47: Cannot find file containing module: 'rstsyn01'\nrstsyn01 rstm1  (rst_, clk[1],  scanmode, rstmsk[1],  orst_[1]);\n^~~~~~~~\n%Error: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/macro/rstsyn04.v:48: Cannot find file containing module: 'rstsyn01'\nrstsyn01 rstm2  (rst_, clk[2],  scanmode, rstmsk[2],  orst_[2]);\n^~~~~~~~\n%Error: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/macro/rstsyn04.v:49: Cannot find file containing module: 'rstsyn01'\nrstsyn01 rstm3  (rst_, clk[3],  scanmode, rstmsk[3],  orst_[3]);\n^~~~~~~~\n%Error: Exiting due to 4 error(s)\n"
module rstsyn04
    (
     rst_,
     clk,
     scanmode,
     rstmsk,
     orst_
     );









input           rst_;
input  [3:0]    clk;
input           scanmode;
input  [3:0]    rstmsk;
output [3:0]    orst_;




wire    [3:0]   orst_;





rstsyn01 rstm0  (rst_, clk[0],  scanmode, rstmsk[0],  orst_[0]);
rstsyn01 rstm1  (rst_, clk[1],  scanmode, rstmsk[1],  orst_[1]);
rstsyn01 rstm2  (rst_, clk[2],  scanmode, rstmsk[2],  orst_[2]);
rstsyn01 rstm3  (rst_, clk[3],  scanmode, rstmsk[3],  orst_[3]);
 
endmodule
module rstsyn04
    (
     rst_,
     clk,
     scanmode,
     rstmsk,
     orst_
     );










input           rst_;
input  [3:0]    clk;
input           scanmode;
input  [3:0]    rstmsk;
output [3:0]    orst_;




wire    [3:0]   orst_;





rstsyn01 rstm0  (rst_, clk[0],  scanmode, rstmsk[0],  orst_[0]);
rstsyn01 rstm1  (rst_, clk[1],  scanmode, rstmsk[1],  orst_[1]);
rstsyn01 rstm2  (rst_, clk[2],  scanmode, rstmsk[2],  orst_[2]);
rstsyn01 rstm3  (rst_, clk[3],  scanmode, rstmsk[3],  orst_[3]);
 
endmodule