data/full_repos/permissive/491934675/ECE251/Buffer/8bitbuffer.v
data/verilator_xmls/76a72549-c5b4-416c-8b7b-9b383f1ea9dd.xml
module buffer8bit(
    input [7:0] in1,
    input enable,
    output reg [7:0] hold
);

always@(*)begin
    hold = enable ? in1 : 8'bzzzzzzzz;
end

endmodule
module buffer8bit(
    input [7:0] in1,
    input enable,
    output reg [7:0] hold
);


always@(*)begin
    hold = enable ? in1 : 8'bzzzzzzzz;
end

endmodule