data/full_repos/permissive/453637542/Design_files/top_module.v
1: b"%Error: data/full_repos/permissive/453637542/Design_files/top_module.v:36: Cannot find file containing module: 'carry_out_block'\n     carry_out_block M1( p, g, c, ci , cout  );\n     ^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/453637542/Design_files,data/full_repos/permissive/453637542/carry_out_block\n             data/full_repos/permissive/453637542/Design_files,data/full_repos/permissive/453637542/carry_out_block.v\n             data/full_repos/permissive/453637542/Design_files,data/full_repos/permissive/453637542/carry_out_block.sv\n             carry_out_block\n             carry_out_block.v\n             carry_out_block.sv\n             obj_dir/carry_out_block\n             obj_dir/carry_out_block.v\n             obj_dir/carry_out_block.sv\n%Error: data/full_repos/permissive/453637542/Design_files/top_module.v:37: Cannot find file containing module: 'full_adder'\n     full_adder FA1(a[0], b[0], p[0] , g[0] , ci , sum[0]  );\n     ^~~~~~~~~~\n%Error: data/full_repos/permissive/453637542/Design_files/top_module.v:38: Cannot find file containing module: 'full_adder'\n     full_adder FA2(a[1], b[1], p[1] , g[1] , c[1] , sum[1]  );\n     ^~~~~~~~~~\n%Error: data/full_repos/permissive/453637542/Design_files/top_module.v:39: Cannot find file containing module: 'full_adder'\n     full_adder FA3(a[2], b[2], p[2] , g[2] , c[2] , sum[2]  );\n     ^~~~~~~~~~\n%Error: data/full_repos/permissive/453637542/Design_files/top_module.v:40: Cannot find file containing module: 'full_adder'\n     full_adder FA4(a[3], b[3], p[3] , g[3] , c[3] , sum[3]   );\n     ^~~~~~~~~~\n%Error: Exiting due to 5 error(s)\n"
module top_module(
a, b, ci ,  cout,  sum
    );
    
 input [3:0] a;
 input [3:0] b;  
 input ci ;
 output cout ;
 output [3:0] sum ;
 wire [3:0] sum ;
  wire [3:0] p;
 wire [3:0] g; 
    wire [3:1] c; 
     carry_out_block M1( p, g, c, ci , cout  );
     full_adder FA1(a[0], b[0], p[0] , g[0] , ci , sum[0]  );
     full_adder FA2(a[1], b[1], p[1] , g[1] , c[1] , sum[1]  );
     full_adder FA3(a[2], b[2], p[2] , g[2] , c[2] , sum[2]  );
     full_adder FA4(a[3], b[3], p[3] , g[3] , c[3] , sum[3]   );
     
endmodule
module top_module(
a, b, ci ,  cout,  sum
    );

    
 input [3:0] a;
 input [3:0] b;  
 input ci ;
 output cout ;
 output [3:0] sum ;
 wire [3:0] sum ;
  wire [3:0] p;
 wire [3:0] g; 
    wire [3:1] c; 
     carry_out_block M1( p, g, c, ci , cout  );
     full_adder FA1(a[0], b[0], p[0] , g[0] , ci , sum[0]  );
     full_adder FA2(a[1], b[1], p[1] , g[1] , c[1] , sum[1]  );
     full_adder FA3(a[2], b[2], p[2] , g[2] , c[2] , sum[2]  );
     full_adder FA4(a[3], b[3], p[3] , g[3] , c[3] , sum[3]   );
     
endmodule