data/full_repos/permissive/476412093/TopTop_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/476412093/TopTop_tb.v:64: Unsupported: Ignoring delay on this delayed statement.\n  forever #5 clk = !clk;\n          ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:291: Too many digits for 32 bit number: \'h000010b3_00000001_00000000_00000000_00000000\nram[0]  = \'h000010b3_00000001_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:292: Too many digits for 32 bit number: \'h0000066f_00000002_00000000_00000000_00000000\nram[1]  = \'h0000066f_00000002_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:293: Too many digits for 32 bit number: \'h00000cec_000018b5_00000000_00000000_00000000\nram[2]  = \'h00000cec_000018b5_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:294: Too many digits for 32 bit number: \'h000004D7_00007BE8_00000000_00010000_00000000\nram[3]  = \'h000004D7_00007BE8_00000000_00010000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:295: Too many digits for 32 bit number: \'h000053F3_000044A7_00000000_00000000_00000000\nram[4]  = \'h000053F3_000044A7_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:296: Too many digits for 32 bit number: \'hffffef4f_00000300_00000000_00000000_00000000\nram[5]  = \'hffffef4f_00000300_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:297: Too many digits for 32 bit number: \'h00123400_00ba2500_00000000_00000000_00000000\nram[6]  = \'h00123400_00ba2500_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:298: Too many digits for 32 bit number: \'h00965300_00003637_00000000_00020000_00000000\nram[7]  = \'h00965300_00003637_00000000_00020000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:299: Too many digits for 32 bit number: \'hff753200_00123400_00000000_00000000_00000000\nram[8]  = \'hff753200_00123400_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:300: Too many digits for 32 bit number: \'h00325800_00965300_00000000_00000000_00000000\nram[9]  = \'h00325800_00965300_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:301: Too many digits for 32 bit number: \'h00a25d00_00753200_00000000_00000000_00000000\nram[10] = \'h00a25d00_00753200_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:302: Too many digits for 32 bit number: \'h00d2b300_0000989A_00000000_00000000_00000000\nram[11] = \'h00d2b300_0000989A_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:303: Too many digits for 32 bit number: \'hff501d00_ff354200_00000000_00000000_00000000\nram[12] = \'hff501d00_ff354200_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:304: Too many digits for 32 bit number: \'h00521000_00325700_00000000_00000000_00000000\nram[13] = \'h00521000_00325700_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:305: Too many digits for 32 bit number: \'h00862500_ffa25400_00000000_00000000_00000000\nram[14] = \'h00862500_ffa25400_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:306: Too many digits for 32 bit number: \'hffffff00_0000ABD5_00000000_00000000_00000000\nram[15] = \'hffffff00_0000ABD5_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:314: Too many digits for 32 bit number: \'h00f41500_00ffff00_00000000_00000000_00000000\nram[0]  = \'h00f41500_00ffff00_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/476412093/TopTop_tb.v:313: Unsupported: Ignoring delay on this delayed statement.\n#1610\n^\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:315: Too many digits for 32 bit number: \'h00000000_00000021_00000000_00000000_00000000\nram[1]  = \'h00000000_00000021_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:316: Too many digits for 32 bit number: \'h00456000_00003400_00000000_00000000_00000000\nram[2]  = \'h00456000_00003400_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:317: Too many digits for 32 bit number: \'h00f41500_00ffff00_00000000_00000001_00000000\nram[3]  = \'h00f41500_00ffff00_00000000_00000001_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:318: Too many digits for 32 bit number: \'h00000000_00000560_00000000_00000000_00000000\nram[4]  = \'h00000000_00000560_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:319: Too many digits for 32 bit number: \'h00000123_00201103_00000000_00000000_00000000\nram[5]  = \'h00000123_00201103_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:320: Too many digits for 32 bit number: \'h00325800_00000890_00000000_00000000_00000000\nram[6]  = \'h00325800_00000890_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:321: Too many digits for 32 bit number: \'h00000000_00ab0000_00000000_00000002_00000000\nram[7]  = \'h00000000_00ab0000_00000000_00000002_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:322: Too many digits for 32 bit number: \'h00000000_00521000_00000000_00000000_00000000\nram[8]  = \'h00000000_00521000_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:323: Too many digits for 32 bit number: \'h00000000_00000120_00000000_00000000_00000000\nram[9]  = \'h00000000_00000120_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:324: Too many digits for 32 bit number: \'h00521000_00325700_00000000_00000000_00000000\nram[10] = \'h00521000_00325700_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:325: Too many digits for 32 bit number: \'h00000000_00000340_00000000_00000003_00000000\nram[11] = \'h00000000_00000340_00000000_00000003_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:326: Too many digits for 32 bit number: \'h00000000_00110000_00000000_00000000_00000000\nram[12] = \'h00000000_00110000_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:327: Too many digits for 32 bit number: \'h00000000_00000020_00000000_00000000_00000000\nram[13] = \'h00000000_00000020_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:328: Too many digits for 32 bit number: \'h00000000_00f6a000_00000000_00000000_00000000\nram[14] = \'h00000000_00f6a000_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:329: Too many digits for 32 bit number: \'h00000000_00001000_00000000_00000004_00000000\nram[15] = \'h00000000_00001000_00000000_00000004_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:337: Too many digits for 32 bit number: \'h00000000_00000001_00000000_00000000_00000000\nram[0]  = \'h00000000_00000001_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/476412093/TopTop_tb.v:336: Unsupported: Ignoring delay on this delayed statement.\n#1610\n^\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:338: Too many digits for 32 bit number: \'h00965300_00f41500_00000000_00020000_00000000\nram[1]  = \'h00965300_00f41500_00000000_00020000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:339: Too many digits for 32 bit number: \'h00000000_00000002_00000000_00000000_00000000\nram[2]  = \'h00000000_00000002_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:340: Too many digits for 32 bit number: \'h00000000_00654300_00000000_00000000_00000000\nram[3]  = \'h00000000_00654300_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:341: Too many digits for 32 bit number: \'h00000000_00000003_00000000_00000000_00000000\nram[4]  = \'h00000000_00000003_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:342: Too many digits for 32 bit number: \'hff501d00_ff354200_00000000_00000000_00000000\nram[5]  = \'hff501d00_ff354200_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:343: Too many digits for 32 bit number: \'h00000000_00000004_00000000_00000000_00000000\nram[6]  = \'h00000000_00000004_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:344: Too many digits for 32 bit number: \'h00000000_00000005_00000000_00000000_00000000\nram[7]  = \'h00000000_00000005_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:345: Too many digits for 32 bit number: \'h00f41500_00000006_00000000_00000000_00000000\nram[8]  = \'h00f41500_00000006_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:346: Too many digits for 32 bit number: \'h00000000_00000007_00000000_00000000_00000000\nram[9]  = \'h00000000_00000007_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:347: Too many digits for 32 bit number: \'h00000000_00000123_00000000_00000000_00000000\nram[10] = \'h00000000_00000123_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:348: Too many digits for 32 bit number: \'h00000000_00000008_00000000_00000000_00000000\nram[11] = \'h00000000_00000008_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:349: Too many digits for 32 bit number: \'h00000000_04560000_00000000_00000000_00000000\nram[12] = \'h00000000_04560000_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:350: Too many digits for 32 bit number: \'h00000000_00000009_00000000_00000000_00000000\nram[13] = \'h00000000_00000009_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:351: Too many digits for 32 bit number: \'h00000000_000abc00_00000000_00000000_00000000\nram[14] = \'h00000000_000abc00_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:352: Too many digits for 32 bit number: \'h00000000_0000000a_00000000_00000000_00000000\nram[15] = \'h00000000_0000000a_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:360: Too many digits for 32 bit number: \'h00a25d00_00753200_00000000_00000000_00000000\nram[0]  = \'h00a25d00_00753200_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/476412093/TopTop_tb.v:359: Unsupported: Ignoring delay on this delayed statement.\n#1610\n^\n%Error: data/full_repos/permissive/476412093/TopTop_tb.v:361: Too many digits for 32 bit number: \'h00000000_0000000b_00000000_00000000_00000000\nram[1]  = \'h00000000_0000000b_00000000_00000000_00000000;\n          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n        ... See the manual and https://verilator.org for more assistance.\n'
module TopTop_tb;


parameter[15:0] SIZE = 16'h0202;
parameter MAX_WORD_LENGTH = 32;


reg clk, reset, start;
reg[31:0] instruction;




reg external;
reg[7:0] Tile_i = 8'b0;
reg[7:0] Tile_j = 8'b0;
reg[7:0] BRAM_i = 8'b0;
reg[7:0] BRAM_j = 8'b0;
reg WEA, WEB, mode;
reg[9:0] ADDRA = -1;
reg[9:0] ADDRB = 5;
reg[15:0] DINA, DINB;
wire[15:0] DOUTA, DOUTB;
reg[159:0] ram[15:0];
reg[9:0] ram_ptr = 0;
reg[1:0] Activation_Function;
reg Tanh_In;
integer i=0, j=0, k=0;




TopTop #(SIZE[15:8], SIZE[7:0], MAX_WORD_LENGTH) TopTopTB(clk, reset, start, instruction, external, Tile_i, Tile_j, BRAM_i, BRAM_j, WEA, 1'b0, ADDRA, ADDRB, DINA, DINB, DOUTA, DOUTB, Activation_Function, Tanh_In);

initial begin
  clk = 1;
  forever #5 clk = !clk;
end

always @ (posedge clk) begin



           


    if(Tile_i == 0 && Tile_j == 0 && BRAM_i == 0 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
	if(Tile_i == 0 && Tile_j == 0 && BRAM_i == 0 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
            
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 0 && Tile_j == 0 && BRAM_i == 1 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 0 && Tile_j == 0 && BRAM_i == 1 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
	
	
	if(Tile_i == 0 && Tile_j == 1 && BRAM_i == 0 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 0 && Tile_j == 1 && BRAM_i == 0 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
            
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 0 && Tile_j == 1 && BRAM_i == 1 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 0 && Tile_j == 1 && BRAM_i == 1 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end
	
	
	if(Tile_i == 1 && Tile_j == 0 && BRAM_i == 0 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 1 && Tile_j == 0 && BRAM_i == 0 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
            
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 1 && Tile_j == 0 && BRAM_i == 1 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 1 && Tile_j == 0 && BRAM_i == 1 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end
	
	
	if(Tile_i == 1 && Tile_j == 1 && BRAM_i == 0 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 1 && Tile_j == 1 && BRAM_i == 0 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
            
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 1 && Tile_j == 1 && BRAM_i == 1 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 1 && Tile_j == 1 && BRAM_i == 1 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end
	
end
initial
 
begin

Tanh_In = 0;
Activation_Function = 0;






reset = 0; 
start = 0;
mode = 0;
external = 1;

ram[0]  = 'h000010b3_00000001_00000000_00000000_00000000;
ram[1]  = 'h0000066f_00000002_00000000_00000000_00000000;
ram[2]  = 'h00000cec_000018b5_00000000_00000000_00000000;
ram[3]  = 'h000004D7_00007BE8_00000000_00010000_00000000;
ram[4]  = 'h000053F3_000044A7_00000000_00000000_00000000;
ram[5]  = 'hffffef4f_00000300_00000000_00000000_00000000;
ram[6] 	= 'h00123400_00ba2500_00000000_00000000_00000000;
ram[7] 	= 'h00965300_00003637_00000000_00020000_00000000;
ram[8] 	= 'hff753200_00123400_00000000_00000000_00000000;
ram[9] 	= 'h00325800_00965300_00000000_00000000_00000000;
ram[10]	= 'h00a25d00_00753200_00000000_00000000_00000000;
ram[11]	= 'h00d2b300_0000989A_00000000_00000000_00000000;
ram[12]	= 'hff501d00_ff354200_00000000_00000000_00000000;
ram[13]	= 'h00521000_00325700_00000000_00000000_00000000;
ram[14]	= 'h00862500_ffa25400_00000000_00000000_00000000;
ram[15]	= 'hffffff00_0000ABD5_00000000_00000000_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b0;
Tile_i = 8'b0;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[1]  = 'h00000000_00000021_00000000_00000000_00000000;
ram[2]  = 'h00456000_00003400_00000000_00000000_00000000;
ram[3]  = 'h00f41500_00ffff00_00000000_00000001_00000000;
ram[4]  = 'h00000000_00000560_00000000_00000000_00000000;
ram[5]  = 'h00000123_00201103_00000000_00000000_00000000;
ram[6] 	= 'h00325800_00000890_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00ab0000_00000000_00000002_00000000;
ram[8] 	= 'h00000000_00521000_00000000_00000000_00000000;
ram[9] 	= 'h00000000_00000120_00000000_00000000_00000000;
ram[10]	= 'h00521000_00325700_00000000_00000000_00000000;
ram[11]	= 'h00000000_00000340_00000000_00000003_00000000;
ram[12]	= 'h00000000_00110000_00000000_00000000_00000000;
ram[13]	= 'h00000000_00000020_00000000_00000000_00000000;
ram[14]	= 'h00000000_00f6a000_00000000_00000000_00000000;
ram[15]	= 'h00000000_00001000_00000000_00000004_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b1;
Tile_i = 8'b0;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00000000_00000001_00000000_00000000_00000000;
ram[1]  = 'h00965300_00f41500_00000000_00020000_00000000;
ram[2]  = 'h00000000_00000002_00000000_00000000_00000000;
ram[3]  = 'h00000000_00654300_00000000_00000000_00000000;
ram[4]  = 'h00000000_00000003_00000000_00000000_00000000;
ram[5]  = 'hff501d00_ff354200_00000000_00000000_00000000;
ram[6] 	= 'h00000000_00000004_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00000005_00000000_00000000_00000000;
ram[8] 	= 'h00f41500_00000006_00000000_00000000_00000000;
ram[9] 	= 'h00000000_00000007_00000000_00000000_00000000;
ram[10]	= 'h00000000_00000123_00000000_00000000_00000000;
ram[11]	= 'h00000000_00000008_00000000_00000000_00000000;
ram[12]	= 'h00000000_04560000_00000000_00000000_00000000;
ram[13]	= 'h00000000_00000009_00000000_00000000_00000000;
ram[14]	= 'h00000000_000abc00_00000000_00000000_00000000;
ram[15]	= 'h00000000_0000000a_00000000_00000000_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b0;
Tile_i = 8'b0;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00a25d00_00753200_00000000_00000000_00000000;
ram[1]  = 'h00000000_0000000b_00000000_00000000_00000000;
ram[2]  = 'h00123400_00ba2500_00000000_00000000_00000000;
ram[3]  = 'h000a2540_0000000c_00000000_00000005_00000000;
ram[4]  = 'h00000000_00000030_00000000_00000000_00000000;
ram[5]  = 'h00000000_0020000d_00000000_00000000_00000000;
ram[6] 	= 'h00000000_0000000e_00000000_00000000_00000000;
ram[7] 	= 'h00000000_0000000f_00000000_00000006_00000000;
ram[8] 	= 'h00000000_0000000a_00000000_00000000_00000000;
ram[9] 	= 'h00ba2500_ff862500_00000000_00000000_00000000;
ram[10]	= 'h00000000_00000001_00000000_00000000_00000000;
ram[11]	= 'h00000000_000008a0_00000000_00000007_00000000;
ram[12]	= 'h00000000_00000002_00000000_00000000_00000000;
ram[13]	= 'h00000000_00000440_00000000_00000000_00000000;
ram[14]	= 'h00000000_00000003_00000000_00000000_00000000;
ram[15]	= 'h00000000_00000550_00000000_00000008_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b1;
Tile_i = 8'b0;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610

ram[0]  = 'h00005678_12345678_00000000_00000000_00000000;
ram[1]  = 'h00354200_00d2b300_00000000_00000000_00000000;
ram[2]  = 'hff325700_00501d00_00000000_00000000_00000000;
ram[3]  = 'h00a25400_00654300_00000000_00010000_00000000;
ram[4]  = 'h00ba2500_ff862500_00000000_00000000_00000000;
ram[5]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[6] 	= 'h00123400_00ba2500_00000000_00000000_00000000;
ram[7] 	= 'h00965300_00f41500_00000000_00020000_00000000;
ram[8] 	= 'hff753200_00123400_00000000_00000000_00000000;
ram[9] 	= 'h00325800_00965300_00000000_00000000_00000000;
ram[10]	= 'h00a25d00_00753200_00000000_00000000_00000000;
ram[11]	= 'h00d2b300_00325800_00000000_00000000_00000000;
ram[12]	= 'hff501d00_ff354200_00000000_00000000_00000000;
ram[13]	= 'h00521000_00325700_00000000_00000000_00000000;
ram[14]	= 'h00862500_ffa25400_00000000_00000000_00000000;
ram[15]	= 'hffffff00_00521000_00000000_00000000_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b0;
Tile_i = 8'b0;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00f41500_00fabf00_00000000_00000000_00000000;
ram[1]  = 'h00000000_00000044_00000000_00000000_00000000;
ram[2]  = 'h00000000_00000050_00000000_00000000_00000000;
ram[3]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[4]  = 'h00000000_00000060_00000000_00000000_00000000;
ram[5]  = 'h00000000_00034000_00000000_00000000_00000000;
ram[6] 	= 'h00325800_00000070_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00000080_00000000_00000002_00000000;
ram[8] 	= 'h00000000_00521000_00000000_00000000_00000000;
ram[9] 	= 'h00000000_00000090_00000000_00000000_00000000;
ram[10]	= 'h00521000_00325700_00000000_00000000_00000000;
ram[11]	= 'h00000000_00009800_00000000_00000003_00000000;
ram[12]	= 'h00000000_00000500_00000000_00000000_00000000;
ram[13]	= 'h00000000_000000a0_00000000_00000000_00000000;
ram[14]	= 'h00000000_000ab300_00000000_00000000_00000000;
ram[15]	= 'h00000000_00030020_00000000_00000004_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b1;
Tile_i = 8'b0;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00000000_00380000_00000000_00000000_00000000;
ram[1]  = 'h00965300_00f41500_00000000_00020000_00000000;
ram[2]  = 'h00000000_00000b00_00000000_00000000_00000000;
ram[3]  = 'h00000000_00654300_00000000_00000000_00000000;
ram[4]  = 'h00000000_00000c00_00000000_00000000_00000000;
ram[5]  = 'hff501d00_ff354200_00000000_00000000_00000000;
ram[6] 	= 'h00000000_00000d00_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00000e00_00000000_00000000_00000000;
ram[8] 	= 'h00f41500_00000f00_00000000_00000000_00000000;
ram[9] 	= 'h00000000_00000a00_00000000_00000000_00000000;
ram[10]	= 'h00000000_00000100_00000000_00000000_00000000;
ram[11]	= 'h00000000_00098000_00000000_00000000_00000000;
ram[12]	= 'h00000000_00005500_00000000_00000000_00000000;
ram[13]	= 'h00000000_00030000_00000000_00000000_00000000;
ram[14]	= 'h00000000_00002010_00000000_00000000_00000000;
ram[15]	= 'h00000000_00504020_00000000_00000000_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b0;
Tile_i = 8'b0;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00a25d00_00753200_00000000_00000000_00000000;
ram[1]  = 'h00000000_00000200_00000000_00000000_00000000;
ram[2]  = 'h00123400_00ba2500_00000000_00000000_00000000;
ram[3]  = 'h000a2540_00000300_00000000_00000005_00000000;
ram[4]  = 'h00000000_00030000_00000000_00000000_00000000;
ram[5]  = 'h00000000_00000400_00000000_00000000_00000000;
ram[6] 	= 'h00000000_00000600_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00000500_00000000_00000006_00000000;
ram[8] 	= 'h00000000_00007000_00000000_00000000_00000000;
ram[9] 	= 'h00ba2500_ff862500_00000000_00000000_00000000;
ram[10]	= 'h00000000_00008000_00000000_00000000_00000000;
ram[11]	= 'h00000000_00004040_00000000_00000007_00000000;
ram[12]	= 'h00000000_00000d30_00000000_00000000_00000000;
ram[13]	= 'h00000000_00ab0000_00000000_00000000_00000000;
ram[14]	= 'h00000000_00000200_00000000_00000000_00000000;
ram[15]	= 'h00000000_00098000_00000000_00000008_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b1;
Tile_i = 8'b0;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610


ram[0]  = 'h00005678_12345678_00000000_00000000_00000000;
ram[1]  = 'h00354200_00d2b300_00000000_00000000_00000000;
ram[2]  = 'hff325700_00501d00_00000000_00000000_00000000;
ram[3]  = 'h00a25400_00654300_00000000_00010000_00000000;
ram[4]  = 'h00ba2500_ff862500_00000000_00000000_00000000;
ram[5]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[6] 	= 'h00123400_00ba2500_00000000_00000000_00000000;
ram[7] 	= 'h00965300_00f41500_00000000_00020000_00000000;
ram[8] 	= 'hff753200_00123400_00000000_00000000_00000000;
ram[9] 	= 'h00325800_00965300_00000000_00000000_00000000;
ram[10]	= 'h00a25d00_00753200_00000000_00000000_00000000;
ram[11]	= 'h00d2b300_00325800_00000000_00000000_00000000;
ram[12]	= 'hff501d00_ff354200_00000000_00000000_00000000;
ram[13]	= 'h00521000_00325700_00000000_00000000_00000000;
ram[14]	= 'h00862500_ffa25400_00000000_00000000_00000000;
ram[15]	= 'hffffff00_00521000_00000000_00000000_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b0;
Tile_i = 8'b1;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[1]  = 'h00000000_00009000_00000000_00000000_00000000;
ram[2]  = 'h00000000_0000a000_00000000_00000000_00000000;
ram[3]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[4]  = 'h00000000_0000b000_00000000_00000000_00000000;
ram[5]  = 'h00000000_0000c000_00000000_00000000_00000000;
ram[6] 	= 'h00325800_00520000_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00000050_00000000_00000002_00000000;
ram[8] 	= 'h00000000_00521000_00000000_00000000_00000000;
ram[9] 	= 'h00000000_0000d000_00000000_00000000_00000000;
ram[10]	= 'h00521000_00325700_00000000_00000000_00000000;
ram[11]	= 'h00000000_0000e000_00000000_00000003_00000000;
ram[12]	= 'h00000000_00066000_00000000_00000000_00000000;
ram[13]	= 'h00000000_00000050_00000000_00000000_00000000;
ram[14]	= 'h00000000_00043000_00000000_00000000_00000000;
ram[15]	= 'h00000000_00000770_00000000_00000004_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b1;
Tile_i = 8'b1;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00000000_000f0000_00000000_00000000_00000000;
ram[1]  = 'h00965300_00f41500_00000000_00020000_00000000;
ram[2]  = 'h00000000_000a0000_00000000_00000000_00000000;
ram[3]  = 'h00000000_00654300_00000000_00000000_00000000;
ram[4]  = 'h00000000_00010000_00000000_00000000_00000000;
ram[5]  = 'hff501d00_ff354200_00000000_00000000_00000000;
ram[6] 	= 'h00000000_00020000_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00030000_00000000_00000000_00000000;
ram[8] 	= 'h00f41500_00040000_00000000_00000000_00000000;
ram[9] 	= 'h00000000_00050000_00000000_00000000_00000000;
ram[10]	= 'h00000000_00230000_00000000_00000000_00000000;
ram[11]	= 'h00000000_00060000_00000000_00000000_00000000;
ram[12]	= 'h00000000_00000608_00000000_00000000_00000000;
ram[13]	= 'h00000000_00200400_00000000_00000000_00000000;
ram[14]	= 'h00000000_0a0b00c0_00000000_00000000_00000000;
ram[15]	= 'h00000000_0000a050_00000000_00000000_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b0;
Tile_i = 8'b1;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00a25d00_00753200_00000000_00000000_00000000;
ram[1]  = 'h00000000_00007000_00000000_00000000_00000000;
ram[2]  = 'h00123400_00ba2500_00000000_00000000_00000000;
ram[3]  = 'h000a2540_00080000_00000000_00000005_00000000;
ram[4]  = 'h00000000_00b00000_00000000_00000000_00000000;
ram[5]  = 'h00000000_00090000_00000000_00000000_00000000;
ram[6] 	= 'h00000000_000000a0_00000000_00000000_00000000;
ram[7] 	= 'h00000000_000b0000_00000000_00000006_00000000;
ram[8] 	= 'h00000000_000c0000_00000000_00000000_00000000;
ram[9] 	= 'h00ba2500_ff862500_00000000_00000000_00000000;
ram[10]	= 'h00000000_000d0000_00000000_00000000_00000000;
ram[11]	= 'h00000000_0c000000_00000000_00000007_00000000;
ram[12]	= 'h00000000_00000c00_00000000_00000000_00000000;
ram[13]	= 'h00000000_0200b000_00000000_00000000_00000000;
ram[14]	= 'h00000000_00d00600_00000000_00000000_00000000;
ram[15]	= 'h00000000_00da0400_00000000_00000008_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b1;
Tile_i = 8'b1;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610

ram[0]  = 'h00005678_12345678_00000000_00000000_00000000;
ram[1]  = 'h00354200_00d2b300_00000000_00000000_00000000;
ram[2]  = 'hff325700_00501d00_00000000_00000000_00000000;
ram[3]  = 'h00a25400_00654300_00000000_00010000_00000000;
ram[4]  = 'h00ba2500_ff862500_00000000_00000000_00000000;
ram[5]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[6] 	= 'h00123400_00ba2500_00000000_00000000_00000000;
ram[7] 	= 'h00965300_00f41500_00000000_00020000_00000000;
ram[8] 	= 'hff753200_00123400_00000000_00000000_00000000;
ram[9] 	= 'h00325800_00945400_00000000_00000000_00000000;
ram[10]	= 'h00a25d00_00743200_00000000_00000000_00000000;
ram[11]	= 'h00d2b300_00323400_00000000_00000000_00000000;
ram[12]	= 'hff501d00_ff354200_00000000_00000000_00000000;
ram[13]	= 'h00521000_00323700_00000000_00000000_00000000;
ram[14]	= 'h00862500_ffa25400_00000000_00000000_00000000;
ram[15]	= 'hffffff00_00523000_00000000_00000000_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b0;
Tile_i = 8'b1;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[1]  = 'h00000000_000e0000_00000000_00000000_00000000;
ram[2]  = 'h00000000_00000ff0_00000000_00000000_00000000;
ram[3]  = 'h00f41500_00fffd00_00000000_00000000_00000000;
ram[4]  = 'h00000000_000a0000_00000000_00000000_00000000;
ram[5]  = 'h00000000_0000d000_00000000_00000000_00000000;
ram[6] 	= 'h00325800_00a00000_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00100000_00000000_00000002_00000000;
ram[8] 	= 'h00000000_00521000_00000000_00000000_00000000;
ram[9] 	= 'h00000000_00200000_00000000_00000000_00000000;
ram[10]	= 'h00521000_00325700_00000000_00000000_00000000;
ram[11]	= 'h00000000_00300000_00000000_00000003_00000000;
ram[12]	= 'h00000000_00b000c0_00000000_00000000_00000000;
ram[13]	= 'h00000000_00000a00_00000000_00000000_00000000;
ram[14]	= 'h00000000_00b00000_00000000_00000000_00000000;
ram[15]	= 'h00000000_000d0c00_00000000_00000004_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b1;
Tile_i = 8'b1;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00000000_00300000_00000000_00000000_00000000;
ram[1]  = 'h00965300_00f41500_00000000_00020000_00000000;
ram[2]  = 'h00000000_00040000_00000000_00000000_00000000;
ram[3]  = 'h00000000_00654300_00000000_00000000_00000000;
ram[4]  = 'h00000000_00000000_00000000_00000000_00000000;
ram[5]  = 'hff501d00_ff354200_00000000_00000000_00000000;
ram[6] 	= 'h00000000_00500000_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00600000_00000000_00000000_00000000;
ram[8] 	= 'h00f41500_00010000_00000000_00000000_00000000;
ram[9] 	= 'h00000000_00600000_00000000_00000000_00000000;
ram[10]	= 'h00000000_00070000_00000000_00000000_00000000;
ram[11]	= 'h00000000_00010200_00000000_00000000_00000000;
ram[12]	= 'h00000000_00000003_00000000_00000000_00000000;
ram[13]	= 'h00000000_00305000_00000000_00000000_00000000;
ram[14]	= 'h00000000_00200060_00000000_00000000_00000000;
ram[15]	= 'h00000000_00045400_00000000_00000000_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b0;
Tile_i = 8'b1;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00a25d00_00753200_00000000_00000000_00000000;
ram[1]  = 'h00000000_00800000_00000000_00000000_00000000;
ram[2]  = 'h00123400_00ba2500_00000000_00000000_00000000;
ram[3]  = 'h000a2540_00090000_00000000_00000005_00000000;
ram[4]  = 'h00000000_00a00000_00000000_00000000_00000000;
ram[5]  = 'h00000000_00b00000_00000000_00000000_00000000;
ram[6] 	= 'h00000000_00007000_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00c00000_00000000_00000006_00000000;
ram[8] 	= 'h00000000_00d00000_00000000_00000000_00000000;
ram[9] 	= 'h00ba2500_ff862700_00000000_00000000_00000000;
ram[10]	= 'h00000000_00c000d0_00000000_00000000_00000000;
ram[11]	= 'h00000000_0000c000_00000000_00000007_00000000;
ram[12]	= 'h00000000_0d0900e0_00000000_00000000_00000000;
ram[13]	= 'h00000000_00b00a00_00000000_00000000_00000000;
ram[14]	= 'h00000000_00080080_00000000_00000000_00000000;
ram[15]	= 'h00000000_00a0b090_00000000_00000008_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b1;
Tile_i = 8'b1;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610


DINA = 0;
#10
external = 0;
#10000
reset = 1;
#2000






#1000

Activation_Function = 2'b00;
Tanh_In = 0;






instruction = (5<<26) + (1<<21) + (3<<16) + (2<<11);
start = 1;
#100 start = 0;


























































































end

endmodule
module TopTop_tb;



parameter[15:0] SIZE = 16'h0202;
parameter MAX_WORD_LENGTH = 32;


reg clk, reset, start;
reg[31:0] instruction;




reg external;
reg[7:0] Tile_i = 8'b0;
reg[7:0] Tile_j = 8'b0;
reg[7:0] BRAM_i = 8'b0;
reg[7:0] BRAM_j = 8'b0;
reg WEA, WEB, mode;
reg[9:0] ADDRA = -1;
reg[9:0] ADDRB = 5;
reg[15:0] DINA, DINB;
wire[15:0] DOUTA, DOUTB;
reg[159:0] ram[15:0];
reg[9:0] ram_ptr = 0;
reg[1:0] Activation_Function;
reg Tanh_In;
integer i=0, j=0, k=0;




TopTop #(SIZE[15:8], SIZE[7:0], MAX_WORD_LENGTH) TopTopTB(clk, reset, start, instruction, external, Tile_i, Tile_j, BRAM_i, BRAM_j, WEA, 1'b0, ADDRA, ADDRB, DINA, DINB, DOUTA, DOUTB, Activation_Function, Tanh_In);

initial begin
  clk = 1;
  forever #5 clk = !clk;
end

always @ (posedge clk) begin



           


    if(Tile_i == 0 && Tile_j == 0 && BRAM_i == 0 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
	if(Tile_i == 0 && Tile_j == 0 && BRAM_i == 0 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
            
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 0 && Tile_j == 0 && BRAM_i == 1 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 0 && Tile_j == 0 && BRAM_i == 1 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
	
	
	if(Tile_i == 0 && Tile_j == 1 && BRAM_i == 0 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 0 && Tile_j == 1 && BRAM_i == 0 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
            
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 0 && Tile_j == 1 && BRAM_i == 1 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 0 && Tile_j == 1 && BRAM_i == 1 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end
	
	
	if(Tile_i == 1 && Tile_j == 0 && BRAM_i == 0 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 1 && Tile_j == 0 && BRAM_i == 0 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
            
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 1 && Tile_j == 0 && BRAM_i == 1 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 1 && Tile_j == 0 && BRAM_i == 1 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end
	
	
	if(Tile_i == 1 && Tile_j == 1 && BRAM_i == 0 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 1 && Tile_j == 1 && BRAM_i == 0 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
            
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 1 && Tile_j == 1 && BRAM_i == 1 && BRAM_j == 0) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end 
    if(Tile_i == 1 && Tile_j == 1 && BRAM_i == 1 && BRAM_j == 1) begin
        if(!reset) begin
            WEA = 1;
            for(k=15; k>=0; k=k-1) begin  
                DINA[k] = ram[k][ram_ptr];
            end
           
            ADDRA = ADDRA + 1;
            ram_ptr = ram_ptr + 1;
        end 
        else DINA = 0;
    end
	
end
initial
 
begin

Tanh_In = 0;
Activation_Function = 0;






reset = 0; 
start = 0;
mode = 0;
external = 1;

ram[0]  = 'h000010b3_00000001_00000000_00000000_00000000;
ram[1]  = 'h0000066f_00000002_00000000_00000000_00000000;
ram[2]  = 'h00000cec_000018b5_00000000_00000000_00000000;
ram[3]  = 'h000004D7_00007BE8_00000000_00010000_00000000;
ram[4]  = 'h000053F3_000044A7_00000000_00000000_00000000;
ram[5]  = 'hffffef4f_00000300_00000000_00000000_00000000;
ram[6] 	= 'h00123400_00ba2500_00000000_00000000_00000000;
ram[7] 	= 'h00965300_00003637_00000000_00020000_00000000;
ram[8] 	= 'hff753200_00123400_00000000_00000000_00000000;
ram[9] 	= 'h00325800_00965300_00000000_00000000_00000000;
ram[10]	= 'h00a25d00_00753200_00000000_00000000_00000000;
ram[11]	= 'h00d2b300_0000989A_00000000_00000000_00000000;
ram[12]	= 'hff501d00_ff354200_00000000_00000000_00000000;
ram[13]	= 'h00521000_00325700_00000000_00000000_00000000;
ram[14]	= 'h00862500_ffa25400_00000000_00000000_00000000;
ram[15]	= 'hffffff00_0000ABD5_00000000_00000000_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b0;
Tile_i = 8'b0;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[1]  = 'h00000000_00000021_00000000_00000000_00000000;
ram[2]  = 'h00456000_00003400_00000000_00000000_00000000;
ram[3]  = 'h00f41500_00ffff00_00000000_00000001_00000000;
ram[4]  = 'h00000000_00000560_00000000_00000000_00000000;
ram[5]  = 'h00000123_00201103_00000000_00000000_00000000;
ram[6] 	= 'h00325800_00000890_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00ab0000_00000000_00000002_00000000;
ram[8] 	= 'h00000000_00521000_00000000_00000000_00000000;
ram[9] 	= 'h00000000_00000120_00000000_00000000_00000000;
ram[10]	= 'h00521000_00325700_00000000_00000000_00000000;
ram[11]	= 'h00000000_00000340_00000000_00000003_00000000;
ram[12]	= 'h00000000_00110000_00000000_00000000_00000000;
ram[13]	= 'h00000000_00000020_00000000_00000000_00000000;
ram[14]	= 'h00000000_00f6a000_00000000_00000000_00000000;
ram[15]	= 'h00000000_00001000_00000000_00000004_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b1;
Tile_i = 8'b0;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00000000_00000001_00000000_00000000_00000000;
ram[1]  = 'h00965300_00f41500_00000000_00020000_00000000;
ram[2]  = 'h00000000_00000002_00000000_00000000_00000000;
ram[3]  = 'h00000000_00654300_00000000_00000000_00000000;
ram[4]  = 'h00000000_00000003_00000000_00000000_00000000;
ram[5]  = 'hff501d00_ff354200_00000000_00000000_00000000;
ram[6] 	= 'h00000000_00000004_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00000005_00000000_00000000_00000000;
ram[8] 	= 'h00f41500_00000006_00000000_00000000_00000000;
ram[9] 	= 'h00000000_00000007_00000000_00000000_00000000;
ram[10]	= 'h00000000_00000123_00000000_00000000_00000000;
ram[11]	= 'h00000000_00000008_00000000_00000000_00000000;
ram[12]	= 'h00000000_04560000_00000000_00000000_00000000;
ram[13]	= 'h00000000_00000009_00000000_00000000_00000000;
ram[14]	= 'h00000000_000abc00_00000000_00000000_00000000;
ram[15]	= 'h00000000_0000000a_00000000_00000000_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b0;
Tile_i = 8'b0;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00a25d00_00753200_00000000_00000000_00000000;
ram[1]  = 'h00000000_0000000b_00000000_00000000_00000000;
ram[2]  = 'h00123400_00ba2500_00000000_00000000_00000000;
ram[3]  = 'h000a2540_0000000c_00000000_00000005_00000000;
ram[4]  = 'h00000000_00000030_00000000_00000000_00000000;
ram[5]  = 'h00000000_0020000d_00000000_00000000_00000000;
ram[6] 	= 'h00000000_0000000e_00000000_00000000_00000000;
ram[7] 	= 'h00000000_0000000f_00000000_00000006_00000000;
ram[8] 	= 'h00000000_0000000a_00000000_00000000_00000000;
ram[9] 	= 'h00ba2500_ff862500_00000000_00000000_00000000;
ram[10]	= 'h00000000_00000001_00000000_00000000_00000000;
ram[11]	= 'h00000000_000008a0_00000000_00000007_00000000;
ram[12]	= 'h00000000_00000002_00000000_00000000_00000000;
ram[13]	= 'h00000000_00000440_00000000_00000000_00000000;
ram[14]	= 'h00000000_00000003_00000000_00000000_00000000;
ram[15]	= 'h00000000_00000550_00000000_00000008_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b1;
Tile_i = 8'b0;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610

ram[0]  = 'h00005678_12345678_00000000_00000000_00000000;
ram[1]  = 'h00354200_00d2b300_00000000_00000000_00000000;
ram[2]  = 'hff325700_00501d00_00000000_00000000_00000000;
ram[3]  = 'h00a25400_00654300_00000000_00010000_00000000;
ram[4]  = 'h00ba2500_ff862500_00000000_00000000_00000000;
ram[5]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[6] 	= 'h00123400_00ba2500_00000000_00000000_00000000;
ram[7] 	= 'h00965300_00f41500_00000000_00020000_00000000;
ram[8] 	= 'hff753200_00123400_00000000_00000000_00000000;
ram[9] 	= 'h00325800_00965300_00000000_00000000_00000000;
ram[10]	= 'h00a25d00_00753200_00000000_00000000_00000000;
ram[11]	= 'h00d2b300_00325800_00000000_00000000_00000000;
ram[12]	= 'hff501d00_ff354200_00000000_00000000_00000000;
ram[13]	= 'h00521000_00325700_00000000_00000000_00000000;
ram[14]	= 'h00862500_ffa25400_00000000_00000000_00000000;
ram[15]	= 'hffffff00_00521000_00000000_00000000_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b0;
Tile_i = 8'b0;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00f41500_00fabf00_00000000_00000000_00000000;
ram[1]  = 'h00000000_00000044_00000000_00000000_00000000;
ram[2]  = 'h00000000_00000050_00000000_00000000_00000000;
ram[3]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[4]  = 'h00000000_00000060_00000000_00000000_00000000;
ram[5]  = 'h00000000_00034000_00000000_00000000_00000000;
ram[6] 	= 'h00325800_00000070_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00000080_00000000_00000002_00000000;
ram[8] 	= 'h00000000_00521000_00000000_00000000_00000000;
ram[9] 	= 'h00000000_00000090_00000000_00000000_00000000;
ram[10]	= 'h00521000_00325700_00000000_00000000_00000000;
ram[11]	= 'h00000000_00009800_00000000_00000003_00000000;
ram[12]	= 'h00000000_00000500_00000000_00000000_00000000;
ram[13]	= 'h00000000_000000a0_00000000_00000000_00000000;
ram[14]	= 'h00000000_000ab300_00000000_00000000_00000000;
ram[15]	= 'h00000000_00030020_00000000_00000004_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b1;
Tile_i = 8'b0;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00000000_00380000_00000000_00000000_00000000;
ram[1]  = 'h00965300_00f41500_00000000_00020000_00000000;
ram[2]  = 'h00000000_00000b00_00000000_00000000_00000000;
ram[3]  = 'h00000000_00654300_00000000_00000000_00000000;
ram[4]  = 'h00000000_00000c00_00000000_00000000_00000000;
ram[5]  = 'hff501d00_ff354200_00000000_00000000_00000000;
ram[6] 	= 'h00000000_00000d00_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00000e00_00000000_00000000_00000000;
ram[8] 	= 'h00f41500_00000f00_00000000_00000000_00000000;
ram[9] 	= 'h00000000_00000a00_00000000_00000000_00000000;
ram[10]	= 'h00000000_00000100_00000000_00000000_00000000;
ram[11]	= 'h00000000_00098000_00000000_00000000_00000000;
ram[12]	= 'h00000000_00005500_00000000_00000000_00000000;
ram[13]	= 'h00000000_00030000_00000000_00000000_00000000;
ram[14]	= 'h00000000_00002010_00000000_00000000_00000000;
ram[15]	= 'h00000000_00504020_00000000_00000000_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b0;
Tile_i = 8'b0;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00a25d00_00753200_00000000_00000000_00000000;
ram[1]  = 'h00000000_00000200_00000000_00000000_00000000;
ram[2]  = 'h00123400_00ba2500_00000000_00000000_00000000;
ram[3]  = 'h000a2540_00000300_00000000_00000005_00000000;
ram[4]  = 'h00000000_00030000_00000000_00000000_00000000;
ram[5]  = 'h00000000_00000400_00000000_00000000_00000000;
ram[6] 	= 'h00000000_00000600_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00000500_00000000_00000006_00000000;
ram[8] 	= 'h00000000_00007000_00000000_00000000_00000000;
ram[9] 	= 'h00ba2500_ff862500_00000000_00000000_00000000;
ram[10]	= 'h00000000_00008000_00000000_00000000_00000000;
ram[11]	= 'h00000000_00004040_00000000_00000007_00000000;
ram[12]	= 'h00000000_00000d30_00000000_00000000_00000000;
ram[13]	= 'h00000000_00ab0000_00000000_00000000_00000000;
ram[14]	= 'h00000000_00000200_00000000_00000000_00000000;
ram[15]	= 'h00000000_00098000_00000000_00000008_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b1;
Tile_i = 8'b0;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610


ram[0]  = 'h00005678_12345678_00000000_00000000_00000000;
ram[1]  = 'h00354200_00d2b300_00000000_00000000_00000000;
ram[2]  = 'hff325700_00501d00_00000000_00000000_00000000;
ram[3]  = 'h00a25400_00654300_00000000_00010000_00000000;
ram[4]  = 'h00ba2500_ff862500_00000000_00000000_00000000;
ram[5]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[6] 	= 'h00123400_00ba2500_00000000_00000000_00000000;
ram[7] 	= 'h00965300_00f41500_00000000_00020000_00000000;
ram[8] 	= 'hff753200_00123400_00000000_00000000_00000000;
ram[9] 	= 'h00325800_00965300_00000000_00000000_00000000;
ram[10]	= 'h00a25d00_00753200_00000000_00000000_00000000;
ram[11]	= 'h00d2b300_00325800_00000000_00000000_00000000;
ram[12]	= 'hff501d00_ff354200_00000000_00000000_00000000;
ram[13]	= 'h00521000_00325700_00000000_00000000_00000000;
ram[14]	= 'h00862500_ffa25400_00000000_00000000_00000000;
ram[15]	= 'hffffff00_00521000_00000000_00000000_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b0;
Tile_i = 8'b1;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[1]  = 'h00000000_00009000_00000000_00000000_00000000;
ram[2]  = 'h00000000_0000a000_00000000_00000000_00000000;
ram[3]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[4]  = 'h00000000_0000b000_00000000_00000000_00000000;
ram[5]  = 'h00000000_0000c000_00000000_00000000_00000000;
ram[6] 	= 'h00325800_00520000_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00000050_00000000_00000002_00000000;
ram[8] 	= 'h00000000_00521000_00000000_00000000_00000000;
ram[9] 	= 'h00000000_0000d000_00000000_00000000_00000000;
ram[10]	= 'h00521000_00325700_00000000_00000000_00000000;
ram[11]	= 'h00000000_0000e000_00000000_00000003_00000000;
ram[12]	= 'h00000000_00066000_00000000_00000000_00000000;
ram[13]	= 'h00000000_00000050_00000000_00000000_00000000;
ram[14]	= 'h00000000_00043000_00000000_00000000_00000000;
ram[15]	= 'h00000000_00000770_00000000_00000004_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b1;
Tile_i = 8'b1;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00000000_000f0000_00000000_00000000_00000000;
ram[1]  = 'h00965300_00f41500_00000000_00020000_00000000;
ram[2]  = 'h00000000_000a0000_00000000_00000000_00000000;
ram[3]  = 'h00000000_00654300_00000000_00000000_00000000;
ram[4]  = 'h00000000_00010000_00000000_00000000_00000000;
ram[5]  = 'hff501d00_ff354200_00000000_00000000_00000000;
ram[6] 	= 'h00000000_00020000_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00030000_00000000_00000000_00000000;
ram[8] 	= 'h00f41500_00040000_00000000_00000000_00000000;
ram[9] 	= 'h00000000_00050000_00000000_00000000_00000000;
ram[10]	= 'h00000000_00230000_00000000_00000000_00000000;
ram[11]	= 'h00000000_00060000_00000000_00000000_00000000;
ram[12]	= 'h00000000_00000608_00000000_00000000_00000000;
ram[13]	= 'h00000000_00200400_00000000_00000000_00000000;
ram[14]	= 'h00000000_0a0b00c0_00000000_00000000_00000000;
ram[15]	= 'h00000000_0000a050_00000000_00000000_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b0;
Tile_i = 8'b1;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00a25d00_00753200_00000000_00000000_00000000;
ram[1]  = 'h00000000_00007000_00000000_00000000_00000000;
ram[2]  = 'h00123400_00ba2500_00000000_00000000_00000000;
ram[3]  = 'h000a2540_00080000_00000000_00000005_00000000;
ram[4]  = 'h00000000_00b00000_00000000_00000000_00000000;
ram[5]  = 'h00000000_00090000_00000000_00000000_00000000;
ram[6] 	= 'h00000000_000000a0_00000000_00000000_00000000;
ram[7] 	= 'h00000000_000b0000_00000000_00000006_00000000;
ram[8] 	= 'h00000000_000c0000_00000000_00000000_00000000;
ram[9] 	= 'h00ba2500_ff862500_00000000_00000000_00000000;
ram[10]	= 'h00000000_000d0000_00000000_00000000_00000000;
ram[11]	= 'h00000000_0c000000_00000000_00000007_00000000;
ram[12]	= 'h00000000_00000c00_00000000_00000000_00000000;
ram[13]	= 'h00000000_0200b000_00000000_00000000_00000000;
ram[14]	= 'h00000000_00d00600_00000000_00000000_00000000;
ram[15]	= 'h00000000_00da0400_00000000_00000008_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b1;
Tile_i = 8'b1;
Tile_j = 8'b0;
ADDRA = -1;
ram_ptr = 0;
#1610

ram[0]  = 'h00005678_12345678_00000000_00000000_00000000;
ram[1]  = 'h00354200_00d2b300_00000000_00000000_00000000;
ram[2]  = 'hff325700_00501d00_00000000_00000000_00000000;
ram[3]  = 'h00a25400_00654300_00000000_00010000_00000000;
ram[4]  = 'h00ba2500_ff862500_00000000_00000000_00000000;
ram[5]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[6] 	= 'h00123400_00ba2500_00000000_00000000_00000000;
ram[7] 	= 'h00965300_00f41500_00000000_00020000_00000000;
ram[8] 	= 'hff753200_00123400_00000000_00000000_00000000;
ram[9] 	= 'h00325800_00945400_00000000_00000000_00000000;
ram[10]	= 'h00a25d00_00743200_00000000_00000000_00000000;
ram[11]	= 'h00d2b300_00323400_00000000_00000000_00000000;
ram[12]	= 'hff501d00_ff354200_00000000_00000000_00000000;
ram[13]	= 'h00521000_00323700_00000000_00000000_00000000;
ram[14]	= 'h00862500_ffa25400_00000000_00000000_00000000;
ram[15]	= 'hffffff00_00523000_00000000_00000000_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b0;
Tile_i = 8'b1;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00f41500_00ffff00_00000000_00000000_00000000;
ram[1]  = 'h00000000_000e0000_00000000_00000000_00000000;
ram[2]  = 'h00000000_00000ff0_00000000_00000000_00000000;
ram[3]  = 'h00f41500_00fffd00_00000000_00000000_00000000;
ram[4]  = 'h00000000_000a0000_00000000_00000000_00000000;
ram[5]  = 'h00000000_0000d000_00000000_00000000_00000000;
ram[6] 	= 'h00325800_00a00000_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00100000_00000000_00000002_00000000;
ram[8] 	= 'h00000000_00521000_00000000_00000000_00000000;
ram[9] 	= 'h00000000_00200000_00000000_00000000_00000000;
ram[10]	= 'h00521000_00325700_00000000_00000000_00000000;
ram[11]	= 'h00000000_00300000_00000000_00000003_00000000;
ram[12]	= 'h00000000_00b000c0_00000000_00000000_00000000;
ram[13]	= 'h00000000_00000a00_00000000_00000000_00000000;
ram[14]	= 'h00000000_00b00000_00000000_00000000_00000000;
ram[15]	= 'h00000000_000d0c00_00000000_00000004_00000000;
BRAM_i = 8'b0;
BRAM_j = 8'b1;
Tile_i = 8'b1;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00000000_00300000_00000000_00000000_00000000;
ram[1]  = 'h00965300_00f41500_00000000_00020000_00000000;
ram[2]  = 'h00000000_00040000_00000000_00000000_00000000;
ram[3]  = 'h00000000_00654300_00000000_00000000_00000000;
ram[4]  = 'h00000000_00000000_00000000_00000000_00000000;
ram[5]  = 'hff501d00_ff354200_00000000_00000000_00000000;
ram[6] 	= 'h00000000_00500000_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00600000_00000000_00000000_00000000;
ram[8] 	= 'h00f41500_00010000_00000000_00000000_00000000;
ram[9] 	= 'h00000000_00600000_00000000_00000000_00000000;
ram[10]	= 'h00000000_00070000_00000000_00000000_00000000;
ram[11]	= 'h00000000_00010200_00000000_00000000_00000000;
ram[12]	= 'h00000000_00000003_00000000_00000000_00000000;
ram[13]	= 'h00000000_00305000_00000000_00000000_00000000;
ram[14]	= 'h00000000_00200060_00000000_00000000_00000000;
ram[15]	= 'h00000000_00045400_00000000_00000000_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b0;
Tile_i = 8'b1;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610
ram[0]  = 'h00a25d00_00753200_00000000_00000000_00000000;
ram[1]  = 'h00000000_00800000_00000000_00000000_00000000;
ram[2]  = 'h00123400_00ba2500_00000000_00000000_00000000;
ram[3]  = 'h000a2540_00090000_00000000_00000005_00000000;
ram[4]  = 'h00000000_00a00000_00000000_00000000_00000000;
ram[5]  = 'h00000000_00b00000_00000000_00000000_00000000;
ram[6] 	= 'h00000000_00007000_00000000_00000000_00000000;
ram[7] 	= 'h00000000_00c00000_00000000_00000006_00000000;
ram[8] 	= 'h00000000_00d00000_00000000_00000000_00000000;
ram[9] 	= 'h00ba2500_ff862700_00000000_00000000_00000000;
ram[10]	= 'h00000000_00c000d0_00000000_00000000_00000000;
ram[11]	= 'h00000000_0000c000_00000000_00000007_00000000;
ram[12]	= 'h00000000_0d0900e0_00000000_00000000_00000000;
ram[13]	= 'h00000000_00b00a00_00000000_00000000_00000000;
ram[14]	= 'h00000000_00080080_00000000_00000000_00000000;
ram[15]	= 'h00000000_00a0b090_00000000_00000008_00000000;
BRAM_i = 8'b1;
BRAM_j = 8'b1;
Tile_i = 8'b1;
Tile_j = 8'b1;
ADDRA = -1;
ram_ptr = 0;
#1610


DINA = 0;
#10
external = 0;
#10000
reset = 1;
#2000






#1000

Activation_Function = 2'b00;
Tanh_In = 0;






instruction = (5<<26) + (1<<21) + (3<<16) + (2<<11);
start = 1;
#100 start = 0;


























































































end

endmodule