data/full_repos/permissive/450922687/Task 2/ALU_Control.v
1: b'%Error: Cannot find file containing module: 2,data/full_repos/permissive/450922687\n        ... Looked in:\n             data/full_repos/permissive/450922687/Task/2,data/full_repos/permissive/450922687\n             data/full_repos/permissive/450922687/Task/2,data/full_repos/permissive/450922687.v\n             data/full_repos/permissive/450922687/Task/2,data/full_repos/permissive/450922687.sv\n             2,data/full_repos/permissive/450922687\n             2,data/full_repos/permissive/450922687.v\n             2,data/full_repos/permissive/450922687.sv\n             obj_dir/2,data/full_repos/permissive/450922687\n             obj_dir/2,data/full_repos/permissive/450922687.v\n             obj_dir/2,data/full_repos/permissive/450922687.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/450922687/Task\n%Error: Cannot find file containing module: 2/ALU_Control.v\n%Error: Exiting due to 3 error(s)\n'
module ALU_Control(
  input [1:0] ALUOp,
  input [3:0] Funct,
  output reg [3:0] Operation);

 always @(*)
    begin


      case(ALUOp )
        2'b00: 
          case ({Funct[2:0]})
            3'b001: Operation = 4'b0111;
            default: Operation = 4'b0010;
          endcase
        2'b01:
          Operation = 4'b0110;
        2'b10 :
          case(Funct)
            4'b0000:
             Operation = 4'b0010;
            4'b1000:
             Operation = 4'b0110;
            4'b0111:
             Operation = 4'b0000;
            4'b0110:
             Operation = 4'b0001;
          endcase
      endcase
    end
endmodule
module ALU_Control(
  input [1:0] ALUOp,
  input [3:0] Funct,
  output reg [3:0] Operation);


 always @(*)
    begin


      case(ALUOp )
        2'b00: 
          case ({Funct[2:0]})
            3'b001: Operation = 4'b0111;
            default: Operation = 4'b0010;
          endcase
        2'b01:
          Operation = 4'b0110;
        2'b10 :
          case(Funct)
            4'b0000:
             Operation = 4'b0010;
            4'b1000:
             Operation = 4'b0110;
            4'b0111:
             Operation = 4'b0000;
            4'b0110:
             Operation = 4'b0001;
          endcase
      endcase
    end
endmodule