data/full_repos/permissive/509468557/generators/cva6/src/main/resources/vsrc/cva6/src/tech_cells_generic/src/pulp_power_gating.sv
data/verilator_xmls/9813366d-70d6-410e-ba63-725eced7942a.xml
module pulp_power_gating
  (
   input  logic sleep_i,
   output logic sleepout_o
   );
   
   assign sleepout_o = sleep_i;
   
endmodule
module pulp_power_gating
  (
   input  logic sleep_i,
   output logic sleepout_o
   );

   
   assign sleepout_o = sleep_i;
   
endmodule