data/full_repos/permissive/426864978/lab2/vga-core/vga_adapter.sv
1: b"%Error: data/full_repos/permissive/426864978/lab2/vga-core/vga_adapter.sv:199: Cannot find file containing module: 'vga_address_translator'\n vga_address_translator user_input_translator(\n ^~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/426864978/lab2/vga-core,data/full_repos/permissive/426864978/vga_address_translator\n             data/full_repos/permissive/426864978/lab2/vga-core,data/full_repos/permissive/426864978/vga_address_translator.v\n             data/full_repos/permissive/426864978/lab2/vga-core,data/full_repos/permissive/426864978/vga_address_translator.sv\n             vga_address_translator\n             vga_address_translator.v\n             vga_address_translator.sv\n             obj_dir/vga_address_translator\n             obj_dir/vga_address_translator.v\n             obj_dir/vga_address_translator.sv\n%Error: data/full_repos/permissive/426864978/lab2/vga-core/vga_adapter.sv:210: Cannot find file containing module: 'altsyncram'\n altsyncram VideoMemory (\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/426864978/lab2/vga-core/vga_adapter.sv:238: Cannot find file containing module: 'vga_pll'\n vga_pll mypll(clock, clock_25);\n ^~~~~~~\n%Error: data/full_repos/permissive/426864978/lab2/vga-core/vga_adapter.sv:246: Cannot find file containing module: 'vga_controller'\n vga_controller controller(\n ^~~~~~~~~~~~~~\n%Error: Exiting due to 4 error(s)\n"
module vga_adapter(
			resetn,
			clock,
			colour,
			x, y, plot,

			VGA_R,
			VGA_G,
			VGA_B,
			VGA_HS,
			VGA_VS,
			VGA_BLANK,
			VGA_SYNC,
			VGA_CLK);

	parameter BITS_PER_COLOUR_CHANNEL = 1;


	parameter MONOCHROME = "FALSE";


	parameter RESOLUTION = "320x240";


	parameter BACKGROUND_IMAGE = "background.mif";


	parameter USING_DE1 = "FALSE";





	input resetn;
	input clock;


	input [((MONOCHROME == "TRUE") ? (0) : (BITS_PER_COLOUR_CHANNEL*3-1)):0] colour;


	input [((RESOLUTION == "320x240") ? (8) : (7)):0] x;
	input [((RESOLUTION == "320x240") ? (7) : (6)):0] y;


	input plot;


	output [9:0] VGA_R;
	output [9:0] VGA_G;
	output [9:0] VGA_B;
	output VGA_HS;
	output VGA_VS;
	output VGA_BLANK;
	output VGA_SYNC;
	output VGA_CLK;





	wire valid_160x120;
	wire valid_320x240;


	wire writeEn;


	wire [((MONOCHROME == "TRUE") ? (0) : (BITS_PER_COLOUR_CHANNEL*3-1)):0] to_ctrl_colour;


	wire [((RESOLUTION == "320x240") ? (16) : (14)):0] user_to_video_memory_addr;


	wire [((RESOLUTION == "320x240") ? (16) : (14)):0] controller_to_video_memory_addr;


	wire clock_25;


	wire vcc, gnd;




	assign vcc = 1'b1;
	assign gnd = 1'b0;

	vga_address_translator user_input_translator(
					.x(x), .y(y), .mem_address(user_to_video_memory_addr) );
		defparam user_input_translator.RESOLUTION = RESOLUTION;


	assign valid_160x120 = (({1'b0, x} >= 0) & ({1'b0, x} < 160) & ({1'b0, y} >= 0) & ({1'b0, y} < 120)) & (RESOLUTION == "160x120");
	assign valid_320x240 = (({1'b0, x} >= 0) & ({1'b0, x} < 320) & ({1'b0, y} >= 0) & ({1'b0, y} < 240)) & (RESOLUTION == "320x240");
	assign writeEn = (plot) & (valid_160x120 | valid_320x240);



	altsyncram	VideoMemory (
				.wren_a (writeEn),
				.wren_b (gnd),
				.clock0 (clock),
				.clock1 (clock_25),
				.clocken0 (vcc),
				.clocken1 (vcc),
				.address_a (user_to_video_memory_addr),
				.address_b (controller_to_video_memory_addr),
				.data_a (colour),
				.q_b (to_ctrl_colour)
				);
	defparam
		VideoMemory.width_a = ((MONOCHROME == "FALSE") ? (BITS_PER_COLOUR_CHANNEL*3) : 1),
		VideoMemory.width_b = ((MONOCHROME == "FALSE") ? (BITS_PER_COLOUR_CHANNEL*3) : 1),
		VideoMemory.intended_device_family = "Cyclone II",
		VideoMemory.operation_mode = "DUAL_PORT",
		VideoMemory.widthad_a = ((RESOLUTION == "320x240") ? (17) : (15)),
		VideoMemory.numwords_a = ((RESOLUTION == "320x240") ? (76800) : (19200)),
		VideoMemory.widthad_b = ((RESOLUTION == "320x240") ? (17) : (15)),
		VideoMemory.numwords_b = ((RESOLUTION == "320x240") ? (76800) : (19200)),
		VideoMemory.outdata_reg_b = "CLOCK1",
		VideoMemory.address_reg_b = "CLOCK1",
		VideoMemory.clock_enable_input_a = "BYPASS",
		VideoMemory.clock_enable_input_b = "BYPASS",
		VideoMemory.clock_enable_output_b = "BYPASS",
		VideoMemory.power_up_uninitialized = "TRUE";

	vga_pll mypll(clock, clock_25);


	vga_controller controller(
			.vga_clock(clock_25),
			.resetn(resetn),
			.pixel_colour(to_ctrl_colour),
			.memory_address(controller_to_video_memory_addr),
			.VGA_R(VGA_R),
			.VGA_G(VGA_G),
			.VGA_B(VGA_B),
			.VGA_HS(VGA_HS),
			.VGA_VS(VGA_VS),
			.VGA_BLANK(VGA_BLANK),
			.VGA_SYNC(VGA_SYNC),
			.VGA_CLK(VGA_CLK)
		);
		defparam controller.BITS_PER_COLOUR_CHANNEL  = BITS_PER_COLOUR_CHANNEL ;
		defparam controller.MONOCHROME = MONOCHROME;
		defparam controller.RESOLUTION = RESOLUTION;
		defparam controller.USING_DE1 = USING_DE1;


    always @(posedge clock, negedge resetn) begin
        if (resetn === 1'b0) begin
`ifdef MODEL_TECH
            mti_fli::mti_Command("if { [namespace exists ::de1vga] } { ::de1vga::reset } else { echo \"VGA RESET\" }");
`else
            $display("VGA RESET");
`endif
        end else if (plot === 1'b1) begin
`ifdef MODEL_TECH
            mti_fli::mti_Command($sformatf("if { [namespace exists ::de1vga] } { ::de1vga::plot %0d %0d %0d } else { echo \"VGA PLOT %0d,%0d %0d\" }", x, y, colour, x, y, colour));
`else
            $display("VGA PLOT %0d,%0d %0d", x, y, colour);
`endif
        end
    end


endmodule
module vga_adapter(
			resetn,
			clock,
			colour,
			x, y, plot,

			VGA_R,
			VGA_G,
			VGA_B,
			VGA_HS,
			VGA_VS,
			VGA_BLANK,
			VGA_SYNC,
			VGA_CLK);


	parameter BITS_PER_COLOUR_CHANNEL = 1;


	parameter MONOCHROME = "FALSE";


	parameter RESOLUTION = "320x240";


	parameter BACKGROUND_IMAGE = "background.mif";


	parameter USING_DE1 = "FALSE";





	input resetn;
	input clock;


	input [((MONOCHROME == "TRUE") ? (0) : (BITS_PER_COLOUR_CHANNEL*3-1)):0] colour;


	input [((RESOLUTION == "320x240") ? (8) : (7)):0] x;
	input [((RESOLUTION == "320x240") ? (7) : (6)):0] y;


	input plot;


	output [9:0] VGA_R;
	output [9:0] VGA_G;
	output [9:0] VGA_B;
	output VGA_HS;
	output VGA_VS;
	output VGA_BLANK;
	output VGA_SYNC;
	output VGA_CLK;





	wire valid_160x120;
	wire valid_320x240;


	wire writeEn;


	wire [((MONOCHROME == "TRUE") ? (0) : (BITS_PER_COLOUR_CHANNEL*3-1)):0] to_ctrl_colour;


	wire [((RESOLUTION == "320x240") ? (16) : (14)):0] user_to_video_memory_addr;


	wire [((RESOLUTION == "320x240") ? (16) : (14)):0] controller_to_video_memory_addr;


	wire clock_25;


	wire vcc, gnd;




	assign vcc = 1'b1;
	assign gnd = 1'b0;

	vga_address_translator user_input_translator(
					.x(x), .y(y), .mem_address(user_to_video_memory_addr) );
		defparam user_input_translator.RESOLUTION = RESOLUTION;


	assign valid_160x120 = (({1'b0, x} >= 0) & ({1'b0, x} < 160) & ({1'b0, y} >= 0) & ({1'b0, y} < 120)) & (RESOLUTION == "160x120");
	assign valid_320x240 = (({1'b0, x} >= 0) & ({1'b0, x} < 320) & ({1'b0, y} >= 0) & ({1'b0, y} < 240)) & (RESOLUTION == "320x240");
	assign writeEn = (plot) & (valid_160x120 | valid_320x240);



	altsyncram	VideoMemory (
				.wren_a (writeEn),
				.wren_b (gnd),
				.clock0 (clock),
				.clock1 (clock_25),
				.clocken0 (vcc),
				.clocken1 (vcc),
				.address_a (user_to_video_memory_addr),
				.address_b (controller_to_video_memory_addr),
				.data_a (colour),
				.q_b (to_ctrl_colour)
				);
	defparam
		VideoMemory.width_a = ((MONOCHROME == "FALSE") ? (BITS_PER_COLOUR_CHANNEL*3) : 1),
		VideoMemory.width_b = ((MONOCHROME == "FALSE") ? (BITS_PER_COLOUR_CHANNEL*3) : 1),
		VideoMemory.intended_device_family = "Cyclone II",
		VideoMemory.operation_mode = "DUAL_PORT",
		VideoMemory.widthad_a = ((RESOLUTION == "320x240") ? (17) : (15)),
		VideoMemory.numwords_a = ((RESOLUTION == "320x240") ? (76800) : (19200)),
		VideoMemory.widthad_b = ((RESOLUTION == "320x240") ? (17) : (15)),
		VideoMemory.numwords_b = ((RESOLUTION == "320x240") ? (76800) : (19200)),
		VideoMemory.outdata_reg_b = "CLOCK1",
		VideoMemory.address_reg_b = "CLOCK1",
		VideoMemory.clock_enable_input_a = "BYPASS",
		VideoMemory.clock_enable_input_b = "BYPASS",
		VideoMemory.clock_enable_output_b = "BYPASS",
		VideoMemory.power_up_uninitialized = "TRUE";

	vga_pll mypll(clock, clock_25);


	vga_controller controller(
			.vga_clock(clock_25),
			.resetn(resetn),
			.pixel_colour(to_ctrl_colour),
			.memory_address(controller_to_video_memory_addr),
			.VGA_R(VGA_R),
			.VGA_G(VGA_G),
			.VGA_B(VGA_B),
			.VGA_HS(VGA_HS),
			.VGA_VS(VGA_VS),
			.VGA_BLANK(VGA_BLANK),
			.VGA_SYNC(VGA_SYNC),
			.VGA_CLK(VGA_CLK)
		);
		defparam controller.BITS_PER_COLOUR_CHANNEL  = BITS_PER_COLOUR_CHANNEL ;
		defparam controller.MONOCHROME = MONOCHROME;
		defparam controller.RESOLUTION = RESOLUTION;
		defparam controller.USING_DE1 = USING_DE1;


    always @(posedge clock, negedge resetn) begin
        if (resetn === 1'b0) begin
`ifdef MODEL_TECH
            mti_fli::mti_Command("if { [namespace exists ::de1vga] } { ::de1vga::reset } else { echo \"VGA RESET\" }");
`else
            $display("VGA RESET");
`endif
        end else if (plot === 1'b1) begin
`ifdef MODEL_TECH
            mti_fli::mti_Command($sformatf("if { [namespace exists ::de1vga] } { ::de1vga::plot %0d %0d %0d } else { echo \"VGA PLOT %0d,%0d %0d\" }", x, y, colour, x, y, colour));
`else
            $display("VGA PLOT %0d,%0d %0d", x, y, colour);
`endif
        end
    end


endmodule