data/full_repos/permissive/48192473/rtl/interrupts.v
1: b"%Error: data/full_repos/permissive/48192473/rtl/interrupts.v:35: Cannot find file containing module: 'FFD_POSEDGE_SYNCRONOUS_RESET'\nFFD_POSEDGE_SYNCRONOUS_RESET # ( 8 )FF_IE(\n^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/48192473/rtl,data/full_repos/permissive/48192473/FFD_POSEDGE_SYNCRONOUS_RESET\n             data/full_repos/permissive/48192473/rtl,data/full_repos/permissive/48192473/FFD_POSEDGE_SYNCRONOUS_RESET.v\n             data/full_repos/permissive/48192473/rtl,data/full_repos/permissive/48192473/FFD_POSEDGE_SYNCRONOUS_RESET.sv\n             FFD_POSEDGE_SYNCRONOUS_RESET\n             FFD_POSEDGE_SYNCRONOUS_RESET.v\n             FFD_POSEDGE_SYNCRONOUS_RESET.sv\n             obj_dir/FFD_POSEDGE_SYNCRONOUS_RESET\n             obj_dir/FFD_POSEDGE_SYNCRONOUS_RESET.v\n             obj_dir/FFD_POSEDGE_SYNCRONOUS_RESET.sv\n%Error: data/full_repos/permissive/48192473/rtl/interrupts.v:50: Cannot find file containing module: 'FFD_POSEDGE_SYNCRONOUS_RESET_INIT'\nFFD_POSEDGE_SYNCRONOUS_RESET_INIT # ( 8 )FF_IF(\n^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module interrupt_controller
(
  input wire iClock,
  input wire iReset,

   input wire        iMcuWe,
   input wire [3:0]  iMcuRegSelect,
   input wire [7:0]  iMcuWriteData,

   output wire[7:0]  oInterruptEnableRegister,
   output wire[7:0]  oInterruptFlag,


  input wire [7:0] iInterruptRequest,
  output reg [7:0] oInterruptResquestPending
);
















wire wWeInterrutpRegister;
assign wWeInterrutpRegister = (iMcuWe & iMcuRegSelect == 4'h0) ? 1'b1 : 1'b0;
FFD_POSEDGE_SYNCRONOUS_RESET # ( 8 )FF_IE(
	iClock, iReset ,  wWeInterrutpRegister , iMcuWriteData, oInterruptEnableRegister );











wire wWeInterruptFlag;
assign wWeInterruptFlag = (iMcuWe & iMcuRegSelect == 4'hf) ? 1'b1: 1'b0;
FFD_POSEDGE_SYNCRONOUS_RESET_INIT # ( 8 )FF_IF(
	iClock, iReset | wWeInterruptFlag ,  |iInterruptRequest , iMcuWriteData, iInterruptRequest, oInterruptFlag );


wire [7:0] wPendingInterrupts;
assign wPendingInterrupts = oInterruptFlag & oInterruptEnableRegister;


  always @ (*)
  begin
      case (wPendingInterrupts)
       8'h1: oInterruptResquestPending  = 8'b00000001;
       8'h2: oInterruptResquestPending  = 8'b00000010;
       8'h4: oInterruptResquestPending  = 8'b00000100;
       8'h8: oInterruptResquestPending  = 8'b00001000;
       8'h10: oInterruptResquestPending = 8'b00010000;
      default: oInterruptResquestPending = 8'b0;
      endcase
  end

endmodule
module interrupt_controller
(
  input wire iClock,
  input wire iReset,

   input wire        iMcuWe,
   input wire [3:0]  iMcuRegSelect,
   input wire [7:0]  iMcuWriteData,

   output wire[7:0]  oInterruptEnableRegister,
   output wire[7:0]  oInterruptFlag,


  input wire [7:0] iInterruptRequest,
  output reg [7:0] oInterruptResquestPending
);

















wire wWeInterrutpRegister;
assign wWeInterrutpRegister = (iMcuWe & iMcuRegSelect == 4'h0) ? 1'b1 : 1'b0;
FFD_POSEDGE_SYNCRONOUS_RESET # ( 8 )FF_IE(
	iClock, iReset ,  wWeInterrutpRegister , iMcuWriteData, oInterruptEnableRegister );











wire wWeInterruptFlag;
assign wWeInterruptFlag = (iMcuWe & iMcuRegSelect == 4'hf) ? 1'b1: 1'b0;
FFD_POSEDGE_SYNCRONOUS_RESET_INIT # ( 8 )FF_IF(
	iClock, iReset | wWeInterruptFlag ,  |iInterruptRequest , iMcuWriteData, iInterruptRequest, oInterruptFlag );


wire [7:0] wPendingInterrupts;
assign wPendingInterrupts = oInterruptFlag & oInterruptEnableRegister;


  always @ (*)
  begin
      case (wPendingInterrupts)
       8'h1: oInterruptResquestPending  = 8'b00000001;
       8'h2: oInterruptResquestPending  = 8'b00000010;
       8'h4: oInterruptResquestPending  = 8'b00000100;
       8'h8: oInterruptResquestPending  = 8'b00001000;
       8'h10: oInterruptResquestPending = 8'b00010000;
      default: oInterruptResquestPending = 8'b0;
      endcase
  end

endmodule