data/full_repos/permissive/434840709/lab4/4.1/fsm_mealy_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/434840709/lab4/4.1/fsm_mealy_tb.v:17: Unsupported: Ignoring delay on this delayed statement.\n            #(PERIOD/2) clk =1;\n            ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/434840709/lab4/4.1/fsm_mealy_tb.v:18: Unsupported: Ignoring delay on this delayed statement.\n            #(PERIOD/2) clk =0;\n            ^\n%Warning-STMTDLY: data/full_repos/permissive/434840709/lab4/4.1/fsm_mealy_tb.v:25: Unsupported: Ignoring delay on this delayed statement.\n            #50 clr = 0;\n            ^\n%Warning-STMTDLY: data/full_repos/permissive/434840709/lab4/4.1/fsm_mealy_tb.v:31: Unsupported: Ignoring delay on this delayed statement.\n        #350 din=0;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/434840709/lab4/4.1/fsm_mealy_tb.v:32: Unsupported: Ignoring delay on this delayed statement.\n        #50  din=1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/434840709/lab4/4.1/fsm_mealy_tb.v:33: Unsupported: Ignoring delay on this delayed statement.\n        #100 din=0;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/434840709/lab4/4.1/fsm_mealy_tb.v:34: Unsupported: Ignoring delay on this delayed statement.\n        #50  din=1;\n        ^\n%Error: data/full_repos/permissive/434840709/lab4/4.1/fsm_mealy_tb.v:7: Cannot find file containing module: \'seqdetb\'\n        seqdetb seqdetb(\n        ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/434840709/lab4/4.1,data/full_repos/permissive/434840709/seqdetb\n             data/full_repos/permissive/434840709/lab4/4.1,data/full_repos/permissive/434840709/seqdetb.v\n             data/full_repos/permissive/434840709/lab4/4.1,data/full_repos/permissive/434840709/seqdetb.sv\n             seqdetb\n             seqdetb.v\n             seqdetb.sv\n             obj_dir/seqdetb\n             obj_dir/seqdetb.v\n             obj_dir/seqdetb.sv\n%Error: Exiting due to 1 error(s), 7 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module  swqdetb_tb ;
    reg clk;
    reg clr;
    reg din;
    wire dout;
        parameter PERIOD=40;
        seqdetb seqdetb(
            .clk(clk),
            .clr(clr),
            .din(din),
            .dout(dout)
        );
    
    initial begin
        clk = 0;
        forever begin
            #(PERIOD/2) clk =1;
            #(PERIOD/2) clk =0;
        end
    end

    initial begin
        clr = 1;
        forever begin
            #50 clr = 0;
        end
    end
    
    initial begin
        din = 1;
        #350 din=0;
        #50  din=1;
        #100 din=0;
        #50  din=1;
    end
endmodule
module  swqdetb_tb ;

    reg clk;
    reg clr;
    reg din;
    wire dout;
        parameter PERIOD=40;
        seqdetb seqdetb(
            .clk(clk),
            .clr(clr),
            .din(din),
            .dout(dout)
        );
    
    initial begin
        clk = 0;
        forever begin
            #(PERIOD/2) clk =1;
            #(PERIOD/2) clk =0;
        end
    end

    initial begin
        clr = 1;
        forever begin
            #50 clr = 0;
        end
    end
    
    initial begin
        din = 1;
        #350 din=0;
        #50  din=1;
        #100 din=0;
        #50  din=1;
    end
endmodule