data/full_repos/permissive/455940806/designs/silice_vga_test.v
1: b'%Warning-PINMISSING: data/full_repos/permissive/455940806/designs/silice_vga_test.v:57: Cell has missing pin: \'out_done\'\nM_main __main(\n       ^~~~~~\n                     ... Use "/* verilator lint_off PINMISSING */" and lint_on around source to disable this message.\n%Warning-PINMISSING: data/full_repos/permissive/455940806/designs/silice_vga_test.v:57: Cell has missing pin: \'out_clock\'\nM_main __main(\n       ^~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/455940806/designs/silice_vga_test.v:369: Cell has missing pin: \'out_clock\'\nM_vga__vga_driver vga_driver (\n                  ^~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/455940806/designs/silice_vga_test.v:378: Cell has missing pin: \'out_clock\'\nM_frame_display__display display (\n                         ^~~~~~~\n%Error: Exiting due to 4 warning(s)\n'
module M_main (
out_leds,
out_video_clock,
out_video_r,
out_video_g,
out_video_b,
out_video_hs,
out_video_vs,
in_run,
out_done,
reset,
out_clock,
clock
);
output  [7:0] out_leds;
output  [0:0] out_video_clock;
output  [5:0] out_video_r;
output  [5:0] out_video_g;
output  [5:0] out_video_b;
output  [0:0] out_video_hs;
output  [0:0] out_video_vs;
input in_run;
output out_done;
input reset;
output out_clock;
input clock;
assign out_clock = clock;
wire  [0:0] _w_vga_driver_vga_hs;
wire  [0:0] _w_vga_driver_vga_vs;
wire  [0:0] _w_vga_driver_active;
wire  [0:0] _w_vga_driver_vblank;
wire  [9:0] _w_vga_driver_vga_x;
wire  [9:0] _w_vga_driver_vga_y;
wire  [5:0] _w_display_pix_red;
wire  [5:0] _w_display_pix_green;
wire  [5:0] _w_display_pix_blue;
wire _w_display_done;
reg  [7:0] _t_leds;

reg  [7:0] _d_frame;
reg  [7:0] _q_frame;
reg  [0:0] _d_video_clock;
reg  [0:0] _q_video_clock;
reg  [2:0] _d_index,_q_index = 7;
reg  _autorun = 0;
assign out_leds = _t_leds;
assign out_video_clock = _q_video_clock;
assign out_video_r = _w_display_pix_red;
assign out_video_g = _w_display_pix_green;
assign out_video_b = _w_display_pix_blue;
assign out_video_hs = _w_vga_driver_vga_hs;
assign out_video_vs = _w_vga_driver_vga_vs;
assign out_done = (_q_index == 7) & _autorun;
M_vga__vga_driver vga_driver (
.out_vga_hs(_w_vga_driver_vga_hs),
.out_vga_vs(_w_vga_driver_vga_vs),
.out_active(_w_vga_driver_active),
.out_vblank(_w_vga_driver_vblank),
.out_vga_x(_w_vga_driver_vga_x),
.out_vga_y(_w_vga_driver_vga_y),
.reset(reset),
.clock(clock));
M_frame_display__display display (
.in_pix_x(_w_vga_driver_vga_x),
.in_pix_y(_w_vga_driver_vga_y),
.in_pix_active(_w_vga_driver_active),
.in_pix_vblank(_w_vga_driver_vblank),
.out_pix_red(_w_display_pix_red),
.out_pix_green(_w_display_pix_green),
.out_pix_blue(_w_display_pix_blue),
.out_done(_w_display_done),
.reset(reset),
.clock(clock));



`ifdef FORMAL
initial begin
assume(reset);
end
assume property($initstate || (out_done));
`endif
always @* begin
_d_frame = _q_frame;
_d_video_clock = _q_video_clock;
_d_index = _q_index;
_t_leds = 0;

(* full_case *)
case (_q_index)
0: begin

_d_index = 1;
end
1: begin

if (1) begin


_d_index = 3;
end else begin
_d_index = 2;
end
end
3: begin

if (_w_vga_driver_vblank==1) begin



_d_index = 3;
end else begin
_d_index = 4;
end
end
2: begin

_d_index = 7;
end
4: begin

$display("vblank off");
_d_index = 5;
end
5: begin

if (_w_vga_driver_vblank==0) begin



_d_index = 5;
end else begin
_d_index = 6;
end
end
6: begin

$display("vblank on");
_d_frame = _q_frame+1;

_d_index = 1;
end
7: begin
end
default: begin 
_d_index = {3{1'bx}};
`ifdef FORMAL
assume(0);
`endif
 end
endcase

end

always @(posedge clock) begin
_q_frame <= (reset) ? 0 : _d_frame;
_q_video_clock <= _d_video_clock;
_q_index <= reset ? 7 : ( ~_autorun ? 0 : _d_index);
_autorun <= reset ? 0 : 1;
end

endmodule
module M_main (
out_leds,
out_video_clock,
out_video_r,
out_video_g,
out_video_b,
out_video_hs,
out_video_vs,
in_run,
out_done,
reset,
out_clock,
clock
);

output  [7:0] out_leds;
output  [0:0] out_video_clock;
output  [5:0] out_video_r;
output  [5:0] out_video_g;
output  [5:0] out_video_b;
output  [0:0] out_video_hs;
output  [0:0] out_video_vs;
input in_run;
output out_done;
input reset;
output out_clock;
input clock;
assign out_clock = clock;
wire  [0:0] _w_vga_driver_vga_hs;
wire  [0:0] _w_vga_driver_vga_vs;
wire  [0:0] _w_vga_driver_active;
wire  [0:0] _w_vga_driver_vblank;
wire  [9:0] _w_vga_driver_vga_x;
wire  [9:0] _w_vga_driver_vga_y;
wire  [5:0] _w_display_pix_red;
wire  [5:0] _w_display_pix_green;
wire  [5:0] _w_display_pix_blue;
wire _w_display_done;
reg  [7:0] _t_leds;

reg  [7:0] _d_frame;
reg  [7:0] _q_frame;
reg  [0:0] _d_video_clock;
reg  [0:0] _q_video_clock;
reg  [2:0] _d_index,_q_index = 7;
reg  _autorun = 0;
assign out_leds = _t_leds;
assign out_video_clock = _q_video_clock;
assign out_video_r = _w_display_pix_red;
assign out_video_g = _w_display_pix_green;
assign out_video_b = _w_display_pix_blue;
assign out_video_hs = _w_vga_driver_vga_hs;
assign out_video_vs = _w_vga_driver_vga_vs;
assign out_done = (_q_index == 7) & _autorun;
M_vga__vga_driver vga_driver (
.out_vga_hs(_w_vga_driver_vga_hs),
.out_vga_vs(_w_vga_driver_vga_vs),
.out_active(_w_vga_driver_active),
.out_vblank(_w_vga_driver_vblank),
.out_vga_x(_w_vga_driver_vga_x),
.out_vga_y(_w_vga_driver_vga_y),
.reset(reset),
.clock(clock));
M_frame_display__display display (
.in_pix_x(_w_vga_driver_vga_x),
.in_pix_y(_w_vga_driver_vga_y),
.in_pix_active(_w_vga_driver_active),
.in_pix_vblank(_w_vga_driver_vblank),
.out_pix_red(_w_display_pix_red),
.out_pix_green(_w_display_pix_green),
.out_pix_blue(_w_display_pix_blue),
.out_done(_w_display_done),
.reset(reset),
.clock(clock));



`ifdef FORMAL
initial begin
assume(reset);
end
assume property($initstate || (out_done));
`endif
always @* begin
_d_frame = _q_frame;
_d_video_clock = _q_video_clock;
_d_index = _q_index;
_t_leds = 0;

(* full_case *)
case (_q_index)
0: begin

_d_index = 1;
end
1: begin

if (1) begin


_d_index = 3;
end else begin
_d_index = 2;
end
end
3: begin

if (_w_vga_driver_vblank==1) begin



_d_index = 3;
end else begin
_d_index = 4;
end
end
2: begin

_d_index = 7;
end
4: begin

$display("vblank off");
_d_index = 5;
end
5: begin

if (_w_vga_driver_vblank==0) begin



_d_index = 5;
end else begin
_d_index = 6;
end
end
6: begin

$display("vblank on");
_d_frame = _q_frame+1;

_d_index = 1;
end
7: begin
end
default: begin 
_d_index = {3{1'bx}};
`ifdef FORMAL
assume(0);
`endif
 end
endcase

end

always @(posedge clock) begin
_q_frame <= (reset) ? 0 : _d_frame;
_q_video_clock <= _d_video_clock;
_q_index <= reset ? 7 : ( ~_autorun ? 0 : _d_index);
_autorun <= reset ? 0 : 1;
end

endmodule