data/full_repos/permissive/450205124/Assignment1/Q3-2-to-4-Decoder/A1Q3_two_to_four_decoder.v
data/verilator_xmls/78df8243-354d-4665-8ef3-428709d068c8.xml
module two_to_four_decoder(op,inp,enable);
    output [3:0] op;
    input [1:0] inp;
    input enable;
    
    assign op[0]=~inp[0]&&~inp[1]&&enable;
    assign op[1]=inp[0]&&~inp[1]&&enable;
    assign op[2]=~inp[0]&&inp[1]&&enable;
    assign op[3]=inp[0]&&inp[1]&&enable;
endmodule
module two_to_four_decoder(op,inp,enable);

    output [3:0] op;
    input [1:0] inp;
    input enable;
    
    assign op[0]=~inp[0]&&~inp[1]&&enable;
    assign op[1]=inp[0]&&~inp[1]&&enable;
    assign op[2]=~inp[0]&&inp[1]&&enable;
    assign op[3]=inp[0]&&inp[1]&&enable;
endmodule