data/full_repos/permissive/458737381/src/verilog-parser/tests/pcx_buf_fpio.v
1: b'%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/pcx_buf_fpio.v:29: Cannot find include file: sys.h\n`include "sys.h" // system level definition file which contains the  \n         ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/sys.h\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/sys.h.v\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/sys.h.sv\n             sys.h\n             sys.h.v\n             sys.h.sv\n             obj_dir/sys.h\n             obj_dir/sys.h.v\n             obj_dir/sys.h.sv\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/pcx_buf_fpio.v:32: Cannot find include file: iop.h\n`include "iop.h" \n         ^~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/pcx_buf_fpio.v:47: Define or directive not defined: \'`PCX_WIDTH\'\n   output [`PCX_WIDTH-1:0]pcx_fpio_data_px;\n           ^~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/pcx_buf_fpio.v:50: Define or directive not defined: \'`PCX_WIDTH\'\n   input [`PCX_WIDTH-1:0]pcx_fpio_data_ff_px;\n          ^~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/pcx_buf_fpio.v:54: Define or directive not defined: \'`PCX_WIDTH\'\n   assign pcx_fpio_data_px[`PCX_WIDTH-1:0] = pcx_fpio_data_ff_px[`PCX_WIDTH-1:0];\n                           ^~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/pcx_buf_fpio.v:54: Define or directive not defined: \'`PCX_WIDTH\'\n   assign pcx_fpio_data_px[`PCX_WIDTH-1:0] = pcx_fpio_data_ff_px[`PCX_WIDTH-1:0];\n                                                                 ^~~~~~~~~~\n%Error: Exiting due to 6 error(s)\n'
module pcx_buf_fpio(

   pcx_fpio_data_px, pcx_fpio_data_rdy_px, 

   pcx_fpio_data_ff_px, pcx_fpio_data_rdy_arb_px
   );

   output [`PCX_WIDTH-1:0]pcx_fpio_data_px;
   output                 pcx_fpio_data_rdy_px;

   input [`PCX_WIDTH-1:0]pcx_fpio_data_ff_px;
   input                 pcx_fpio_data_rdy_arb_px;


   assign pcx_fpio_data_px[`PCX_WIDTH-1:0] = pcx_fpio_data_ff_px[`PCX_WIDTH-1:0];
   assign pcx_fpio_data_rdy_px = pcx_fpio_data_rdy_arb_px;
   
endmodule
module pcx_buf_fpio(

   pcx_fpio_data_px, pcx_fpio_data_rdy_px, 

   pcx_fpio_data_ff_px, pcx_fpio_data_rdy_arb_px
   );


   output [`PCX_WIDTH-1:0]pcx_fpio_data_px;
   output                 pcx_fpio_data_rdy_px;

   input [`PCX_WIDTH-1:0]pcx_fpio_data_ff_px;
   input                 pcx_fpio_data_rdy_arb_px;


   assign pcx_fpio_data_px[`PCX_WIDTH-1:0] = pcx_fpio_data_ff_px[`PCX_WIDTH-1:0];
   assign pcx_fpio_data_rdy_px = pcx_fpio_data_rdy_arb_px;
   
endmodule