data/full_repos/permissive/522438596/CopytFreeCheckpoint.v
1: b'%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:107: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s SUB generates 5 bits.\n                                                                              : ... In instance cfc\n    Depth_Array[0] = Checkpoint_TagArray[0] - Rob_TopPtr;\n                   ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:108: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s SUB generates 5 bits.\n                                                                              : ... In instance cfc\n    Depth_Array[1] = Checkpoint_TagArray[1] - Rob_TopPtr;\n                   ^\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:109: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s SUB generates 5 bits.\n                                                                              : ... In instance cfc\n    Depth_Array[2] = Checkpoint_TagArray[2] - Rob_TopPtr;\n                   ^\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:110: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s SUB generates 5 bits.\n                                                                              : ... In instance cfc\n    Depth_Array[3] = Checkpoint_TagArray[3] - Rob_TopPtr;\n                   ^\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:111: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s SUB generates 5 bits.\n                                                                              : ... In instance cfc\n    Depth_Array[4] = Checkpoint_TagArray[4] - Rob_TopPtr;\n                   ^\n%Warning-SELRANGE: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:112: Selection index out of range: 5:5 outside 4:0\n                                                                                 : ... In instance cfc\n    Depth_Array[5] = Checkpoint_TagArray[5] - Rob_TopPtr;\n               ^\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:112: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s SUB generates 5 bits.\n                                                                              : ... In instance cfc\n    Depth_Array[5] = Checkpoint_TagArray[5] - Rob_TopPtr;\n                   ^\n%Warning-SELRANGE: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:113: Selection index out of range: 6:6 outside 4:0\n                                                                                 : ... In instance cfc\n    Depth_Array[6] = Checkpoint_TagArray[6] - Rob_TopPtr;\n               ^\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:113: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s SUB generates 5 bits.\n                                                                              : ... In instance cfc\n    Depth_Array[6] = Checkpoint_TagArray[6] - Rob_TopPtr;\n                   ^\n%Warning-SELRANGE: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:114: Selection index out of range: 7:7 outside 4:0\n                                                                                 : ... In instance cfc\n    Depth_Array[7] = Checkpoint_TagArray[7] - Rob_TopPtr;\n               ^\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:114: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s SUB generates 5 bits.\n                                                                              : ... In instance cfc\n    Depth_Array[7] = Checkpoint_TagArray[7] - Rob_TopPtr;\n                   ^\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:154: Operator NEQ expects 3 bits on the RHS, but RHS\'s CONST \'2\'h0\' generates 2 bits.\n                                                                              : ... In instance cfc\n        if ((Rob_Commit) && (Rob_TopPtr == Checkpoint_TagArray[Tail_Pointer]) && (Tail_Pointer - Next_Head_Pointer != 2\'b00)) begin\n                                                                                                                   ^~\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:171: Operator LT expects 5 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                              : ... In instance cfc\n                if (Cdb_RobDepth < Depth_Array[i]) begin\n                                 ^\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:177: Operator EQ expects 5 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                              : ... In instance cfc\n                if (Cdb_RobDepth == Depth_Array[i]) begin\n                                 ^~\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:237: Operator ASSIGN expects 3 bits on the Assign RHS, but Assign RHS\'s VARREF \'i\' generates 32 bits.\n                                                                              : ... In instance cfc\n                    rs_pointer1 = i;\n                                ^\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:248: Operator ASSIGN expects 3 bits on the Assign RHS, but Assign RHS\'s VARREF \'i\' generates 32 bits.\n                                                                              : ... In instance cfc\n                    rs_pointer2 = i;\n                                ^\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:265: Operator ASSIGNDLY expects 6 bits on the Assign RHS, but Assign RHS\'s VARREF \'j\' generates 32 bits.\n                                                                              : ... In instance cfc\n            Committed_RsList[j] <= j;\n                                ^~\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:304: Operator ASSIGN expects 3 bits on the Assign RHS, but Assign RHS\'s VARREF \'i\' generates 32 bits.\n                                                                              : ... In instance cfc\n                    rt_pointer1 = i;\n                                ^\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:315: Operator ASSIGN expects 3 bits on the Assign RHS, but Assign RHS\'s VARREF \'i\' generates 32 bits.\n                                                                              : ... In instance cfc\n                    rt_pointer2 = i;\n                                ^\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:332: Operator ASSIGNDLY expects 6 bits on the Assign RHS, but Assign RHS\'s VARREF \'j\' generates 32 bits.\n                                                                              : ... In instance cfc\n            Committed_RtList[j] <= j;\n                                ^~\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:371: Operator ASSIGN expects 3 bits on the Assign RHS, but Assign RHS\'s VARREF \'i\' generates 32 bits.\n                                                                              : ... In instance cfc\n                    rd_pointer1 = i;\n                                ^\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:382: Operator ASSIGN expects 3 bits on the Assign RHS, but Assign RHS\'s VARREF \'i\' generates 32 bits.\n                                                                              : ... In instance cfc\n                    rd_pointer2 = i;\n                                ^\n%Warning-WIDTH: data/full_repos/permissive/522438596/CopytFreeCheckpoint.v:399: Operator ASSIGNDLY expects 6 bits on the Assign RHS, but Assign RHS\'s VARREF \'j\' generates 32 bits.\n                                                                              : ... In instance cfc\n            Committed_RdList[j] <= j;\n                                ^~\n%Error: Exiting due to 23 warning(s)\n'
module cfc (clk,
            resetb,
            Dis_InstValid,
            Dis_CfcBranchTag,
            Dis_CfcRdAddr,
            Dis_CfcRsAddr,
            Dis_CfcRtAddr,
            Dis_CfcNewRdPhyAddr,
            Dis_CfcRegWrite,
            Dis_CfcBranch,
            Dis_Jr31Inst,
            Cfc_RdPhyAddr,
            Cfc_RsPhyAddr,
            Cfc_RtPhyAddr,
            Cfc_Full,
            Rob_TopPtr,
            Rob_Commit,
            Rob_CommitRdAddr,
            Rob_CommitRegWrite,
            Rob_CommitCurrPhyAddr,
            Cfc_RobTag,
            Frl_HeadPtr,
            Cfc_FrlHeadPtr,
            Cdb_Flush,
            Cdb_RobTag,
            Cdb_RobDepth
            );

input clk;               
input resetb;                

input Dis_InstValid;
input [4:0] Dis_CfcBranchTag;
input [4:0] Dis_CfcRdAddr;
input [4:0] Dis_CfcRsAddr;
input [4:0] Dis_CfcRtAddr;
input [5:0] Dis_CfcNewRdPhyAddr;
input Dis_CfcRegWrite;
input Dis_CfcBranch;
input Dis_Jr31Inst;
		
output [5:0] Cfc_RdPhyAddr;
output [5:0] Cfc_RsPhyAddr;
output [5:0] Cfc_RtPhyAddr;
output Cfc_Full;
				

input [4:0] Rob_TopPtr;
input Rob_Commit;
input [4:0] Rob_CommitRdAddr;
input Rob_CommitRegWrite;
input [5:0] Rob_CommitCurrPhyAddr;


output [4:0] Cfc_RobTag;


input [4:0] Frl_HeadPtr;
output [4:0] Cfc_FrlHeadPtr;
 		

input Cdb_Flush;
input [4:0] Cdb_RobTag;
input [4:0] Cdb_RobDepth;


reg [5:0] Cfc_RsList [0:255];
reg [5:0] Cfc_RtList [0:255];
reg [5:0] Cfc_RdList [0:255];


reg [5:0] Committed_RsList [0:31];
reg [5:0] Committed_RtList [0:31];
reg [5:0] Committed_RdList [0:31];


reg [0:0] Dfa_List [0:7][0:31];


reg [4:0] Checkpoint_TagArray [0:7];

reg [4:0] Frl_HeadPtrArray [0:7];

reg [4:0] Depth_Array;

reg [0:0] Cfc_ValidArray [0:7];


wire full, empty;
reg [2:0] Head_Pointer, Tail_Pointer;
reg [2:0] Next_Head_Pointer;
reg [7:0] Checkpoint_MatchArray;
reg Dfa_RsValid, Dfa_RtValid, Dfa_RdValid;

integer i, j;




always @ (*) begin
    Depth_Array[0] = Checkpoint_TagArray[0] - Rob_TopPtr;
    Depth_Array[1] = Checkpoint_TagArray[1] - Rob_TopPtr;
    Depth_Array[2] = Checkpoint_TagArray[2] - Rob_TopPtr;
    Depth_Array[3] = Checkpoint_TagArray[3] - Rob_TopPtr;
    Depth_Array[4] = Checkpoint_TagArray[4] - Rob_TopPtr;
    Depth_Array[5] = Checkpoint_TagArray[5] - Rob_TopPtr;
    Depth_Array[6] = Checkpoint_TagArray[6] - Rob_TopPtr;
    Depth_Array[7] = Checkpoint_TagArray[7] - Rob_TopPtr;
end

always @ (*) begin
    Checkpoint_MatchArray[0] = (Checkpoint_TagArray[0] == Cdb_RobTag) & (Cfc_ValidArray[0] == 1'b1);
    Checkpoint_MatchArray[1] = (Checkpoint_TagArray[1] == Cdb_RobTag) & (Cfc_ValidArray[1] == 1'b1);
    Checkpoint_MatchArray[2] = (Checkpoint_TagArray[2] == Cdb_RobTag) & (Cfc_ValidArray[2] == 1'b1);
    Checkpoint_MatchArray[3] = (Checkpoint_TagArray[3] == Cdb_RobTag) & (Cfc_ValidArray[3] == 1'b1);
    Checkpoint_MatchArray[4] = (Checkpoint_TagArray[4] == Cdb_RobTag) & (Cfc_ValidArray[4] == 1'b1);
    Checkpoint_MatchArray[5] = (Checkpoint_TagArray[5] == Cdb_RobTag) & (Cfc_ValidArray[5] == 1'b1);
    Checkpoint_MatchArray[6] = (Checkpoint_TagArray[6] == Cdb_RobTag) & (Cfc_ValidArray[6] == 1'b1);
    Checkpoint_MatchArray[7] = (Checkpoint_TagArray[7] == Cdb_RobTag) & (Cfc_ValidArray[7] == 1'b1);
end

assign Cfc_Full = full;
assign full = ((Head_Pointer+1) == Tail_Pointer);
assign empty = (Head_Pointer == Tail_Pointer);

assign Cfc_FrlHeadPtr = Frl_HeadPtrArray[Next_Head_Pointer];
assign Cfc_RobTag = Checkpoint_TagArray[Next_Head_Pointer];



always @ (posedge clk or negedge resetb) begin: cfcupdate
    
    if (!resetb) begin

        Head_Pointer <= 0;
        Tail_Pointer <= 0;
        
        for (i = 0; i < 8; i = i + 1) begin
            for (j = 0; j < 32; j = j + 1) begin
                Dfa_List[i][j] <= 0;
            end
            Cfc_ValidArray[i] <= 0;
        end
    end

    else begin

        if ((Rob_Commit) && (Rob_TopPtr == Checkpoint_TagArray[Tail_Pointer]) && (Tail_Pointer - Next_Head_Pointer != 2'b00)) begin
            Tail_Pointer <= Tail_Pointer + 1;
            Cfc_ValidArray[Tail_Pointer] <= 0;
            for (i = 0; i < 32; i = i + 1) begin
                Dfa_List[Tail_Pointer][i] <= 0;
            end
        end

        if (Cdb_Flush) begin


            for (j = 0; j < 32; j = j + 1) begin
                Dfa_List[Head_Pointer][j] <= 0;
            end

            for (i = 0; i < 8; i = i + 1) begin

                if (Cdb_RobDepth < Depth_Array[i]) begin
                    Cfc_ValidArray[i] <= 0;
                    for (j = 0; j < 32; j = j + 1) begin
                        Dfa_List[i][j] <= 0; 
                    end
                end
                if (Cdb_RobDepth == Depth_Array[i]) begin
                    Cfc_ValidArray[i] <= 0;

                end
            end
            Head_Pointer <= Next_Head_Pointer;
        end

        else begin 

            if (Dis_CfcRegWrite && Dis_InstValid) begin
                Dfa_List[Head_Pointer][Dis_CfcRdAddr] <= 1;
            end

            if ((Dis_CfcBranch || Dis_Jr31Inst) && Dis_InstValid && 
                (!full || (Rob_Commit && Rob_TopPtr == Checkpoint_TagArray[Tail_Pointer]))) begin
                
                Checkpoint_TagArray[Head_Pointer] <= Dis_CfcBranchTag;
                Cfc_ValidArray[Head_Pointer] <= 1;
                Frl_HeadPtrArray[Head_Pointer] <= Frl_HeadPtr;
                Head_Pointer <= Head_Pointer + 1;
            end
        end

    end
end


always @ (*) begin : cdbflush_logic

    if (Cdb_Flush) begin
        case (Checkpoint_MatchArray)
            8'b0000_0001: Next_Head_Pointer = 3'b000;
            8'b0000_0010: Next_Head_Pointer = 3'b001;
            8'b0000_0100: Next_Head_Pointer = 3'b010;
            8'b0000_1000: Next_Head_Pointer = 3'b011;
            8'b0001_0000: Next_Head_Pointer = 3'b100;
            8'b0010_0000: Next_Head_Pointer = 3'b101;
            8'b0100_0000: Next_Head_Pointer = 3'b110;
            8'b1000_0000: Next_Head_Pointer = 3'b111;
            default: Next_Head_Pointer = Head_Pointer;
        endcase
    end
end




reg [2:0] rs_pointer1;
reg [2:0] rs_pointer2;
reg found_rs1;
reg found_rs2;
reg [2:0] BRAM_Rspointer;
reg [5:0] Cfc_RsList_temp;
reg [5:0] Committed_RsList_temp;

always @ (*) begin
        for (i = 7; i >= 0; i = i - 1) begin: rs_search1
            if (i <= Head_Pointer) begin
                if (Dfa_List[i][Dis_CfcRsAddr]) begin
                    rs_pointer1 = i;
                    found_rs1 = 1;
                    disable rs_search1;
                end
                else found_rs1 = 0;
            end
        end

        for (i = 7; i >= 0; i = i - 1) begin : rs_search2
            if (i >= Tail_Pointer) begin
                if (Dfa_List[i][Dis_CfcRsAddr]) begin
                    rs_pointer2 = i;
                    found_rs2 = 1;
                    disable rs_search2;
                end
                else found_rs2 = 0;
            end
        end

        if (found_rs1)          BRAM_Rspointer = rs_pointer1;
        else if (found_rs2)     BRAM_Rspointer = rs_pointer2;
        else                    BRAM_Rspointer = 0;
end

always @ (posedge clk or negedge resetb) begin

    if (!resetb) begin
        for (j = 0; j < 32; j = j + 1) begin
            Committed_RsList[j] <= j;
        end
    end

    else begin

        if (found_rs1 || found_rs2) Dfa_RsValid <= 1;
        else                        Dfa_RsValid <= 0;

        if (Rob_Commit && Rob_CommitRegWrite) Committed_RsList[Rob_CommitRdAddr] <= Rob_CommitCurrPhyAddr;

        if (Dis_InstValid) begin
            if (Dis_CfcRegWrite) begin
                Cfc_RsList[{Head_Pointer, Dis_CfcRdAddr}] <= Dis_CfcNewRdPhyAddr;
            end
            Cfc_RsList_temp <= Cfc_RsList[{BRAM_Rspointer, Dis_CfcRdAddr}];
            Committed_RsList_temp <= Committed_RsList[Dis_CfcRdAddr];
        end

    end

end

assign Cfc_RsPhyAddr = (Dfa_RsValid) ? Cfc_RsList_temp : Committed_RsList_temp;



reg [2:0] rt_pointer1;
reg [2:0] rt_pointer2;
reg found_rt1;
reg found_rt2;
reg [2:0] BRAM_Rtpointer;
reg [5:0] Cfc_RtList_temp;
reg [5:0] Committed_RtList_temp;

always @ (*) begin
        for (i = 7; i >= 0; i = i - 1) begin: rt_search1
            if (i <= Head_Pointer) begin
                if (Dfa_List[i][Dis_CfcRtAddr]) begin
                    rt_pointer1 = i;
                    found_rt1 = 1;
                    disable rt_search1;
                end
                else found_rt1 = 0;
            end
        end

        for (i = 7; i >= 0; i = i - 1) begin: rt_search2
            if (i >= Tail_Pointer) begin
                if (Dfa_List[i][Dis_CfcRtAddr]) begin
                    rt_pointer2 = i;
                    found_rt2 = 1;
                    disable rt_search2;
                end
                else found_rt2 = 0;
            end
        end

        if (found_rt1)          BRAM_Rtpointer = rt_pointer1;
        else if (found_rt2)     BRAM_Rtpointer = rt_pointer2;
        else                    BRAM_Rtpointer = 0;
end

always @ (posedge clk or negedge resetb) begin

    if (!resetb) begin
        for (j = 0; j < 32; j = j + 1) begin
            Committed_RtList[j] <= j;
        end
    end

    else begin

        if (found_rt1 || found_rt2) Dfa_RtValid <= 1;
        else                        Dfa_RtValid <= 0;

        if (Rob_Commit && Rob_CommitRegWrite) Committed_RtList[Rob_CommitRdAddr] <= Rob_CommitCurrPhyAddr;

        if (Dis_InstValid) begin
            if (Dis_CfcRegWrite) begin
                Cfc_RtList[{Head_Pointer, Dis_CfcRdAddr}] <= Dis_CfcNewRdPhyAddr;
            end
            Cfc_RtList_temp <= Cfc_RtList[{BRAM_Rtpointer, Dis_CfcRtAddr}];
            Committed_RtList_temp <= Committed_RtList[Dis_CfcRtAddr];
        end

    end

end

assign Cfc_RtPhyAddr = (Dfa_RtValid) ? Cfc_RtList_temp : Committed_RtList_temp;



reg [2:0] rd_pointer1;
reg [2:0] rd_pointer2;
reg found_rd1;
reg found_rd2;
reg [2:0] BRAM_Rdpointer;
reg [5:0] Cfc_RdList_temp;
reg [5:0] Committed_RdList_temp;

always @ (*) begin
        for (i = 7; i >= 0; i = i - 1) begin: rd_search1
            if (i <= Head_Pointer) begin
                if (Dfa_List[i][Dis_CfcRdAddr]) begin
                    rd_pointer1 = i;
                    found_rd1 = 1;
                    disable rd_search1;
                end
                else found_rd1 = 0;
            end
        end

        for (i = 7; i >= 0; i = i - 1) begin: rd_search2
            if (i >= Tail_Pointer) begin
                if (Dfa_List[i][Dis_CfcRdAddr]) begin
                    rd_pointer2 = i;
                    found_rd2 = 1;
                    disable rd_search2;
                end
                else found_rd2 = 0;
            end
        end

        if (found_rd1)          BRAM_Rdpointer = rd_pointer1;
        else if (found_rd2)     BRAM_Rdpointer = rd_pointer2;
        else                    BRAM_Rdpointer = 0;
end

always @ (posedge clk or negedge resetb) begin

    if (!resetb) begin
        for (j = 0; j < 32; j = j + 1) begin
            Committed_RdList[j] <= j;
        end
    end

    else begin

        if (found_rd1 || found_rd2) Dfa_RdValid <= 1;
        else                        Dfa_RdValid <= 0;

        if (Rob_Commit && Rob_CommitRegWrite) Committed_RdList[Rob_CommitRdAddr] <= Rob_CommitCurrPhyAddr;

        if (Dis_InstValid) begin
            if (Dis_CfcRegWrite) begin
                Cfc_RdList[{Head_Pointer, Dis_CfcRdAddr}] <= Dis_CfcNewRdPhyAddr;
            end
            Cfc_RdList_temp <= Cfc_RdList[{BRAM_Rdpointer, Dis_CfcRdAddr}];
            Committed_RdList_temp <= Committed_RdList[Dis_CfcRdAddr];
        end

    end

end

assign Cfc_RdPhyAddr = (Dfa_RdValid) ? Cfc_RdList_temp : Committed_RdList_temp;

endmodule
module cfc (clk,
            resetb,
            Dis_InstValid,
            Dis_CfcBranchTag,
            Dis_CfcRdAddr,
            Dis_CfcRsAddr,
            Dis_CfcRtAddr,
            Dis_CfcNewRdPhyAddr,
            Dis_CfcRegWrite,
            Dis_CfcBranch,
            Dis_Jr31Inst,
            Cfc_RdPhyAddr,
            Cfc_RsPhyAddr,
            Cfc_RtPhyAddr,
            Cfc_Full,
            Rob_TopPtr,
            Rob_Commit,
            Rob_CommitRdAddr,
            Rob_CommitRegWrite,
            Rob_CommitCurrPhyAddr,
            Cfc_RobTag,
            Frl_HeadPtr,
            Cfc_FrlHeadPtr,
            Cdb_Flush,
            Cdb_RobTag,
            Cdb_RobDepth
            );


input clk;               
input resetb;                

input Dis_InstValid;
input [4:0] Dis_CfcBranchTag;
input [4:0] Dis_CfcRdAddr;
input [4:0] Dis_CfcRsAddr;
input [4:0] Dis_CfcRtAddr;
input [5:0] Dis_CfcNewRdPhyAddr;
input Dis_CfcRegWrite;
input Dis_CfcBranch;
input Dis_Jr31Inst;
		
output [5:0] Cfc_RdPhyAddr;
output [5:0] Cfc_RsPhyAddr;
output [5:0] Cfc_RtPhyAddr;
output Cfc_Full;
				

input [4:0] Rob_TopPtr;
input Rob_Commit;
input [4:0] Rob_CommitRdAddr;
input Rob_CommitRegWrite;
input [5:0] Rob_CommitCurrPhyAddr;


output [4:0] Cfc_RobTag;


input [4:0] Frl_HeadPtr;
output [4:0] Cfc_FrlHeadPtr;
 		

input Cdb_Flush;
input [4:0] Cdb_RobTag;
input [4:0] Cdb_RobDepth;


reg [5:0] Cfc_RsList [0:255];
reg [5:0] Cfc_RtList [0:255];
reg [5:0] Cfc_RdList [0:255];


reg [5:0] Committed_RsList [0:31];
reg [5:0] Committed_RtList [0:31];
reg [5:0] Committed_RdList [0:31];


reg [0:0] Dfa_List [0:7][0:31];


reg [4:0] Checkpoint_TagArray [0:7];

reg [4:0] Frl_HeadPtrArray [0:7];

reg [4:0] Depth_Array;

reg [0:0] Cfc_ValidArray [0:7];


wire full, empty;
reg [2:0] Head_Pointer, Tail_Pointer;
reg [2:0] Next_Head_Pointer;
reg [7:0] Checkpoint_MatchArray;
reg Dfa_RsValid, Dfa_RtValid, Dfa_RdValid;

integer i, j;




always @ (*) begin
    Depth_Array[0] = Checkpoint_TagArray[0] - Rob_TopPtr;
    Depth_Array[1] = Checkpoint_TagArray[1] - Rob_TopPtr;
    Depth_Array[2] = Checkpoint_TagArray[2] - Rob_TopPtr;
    Depth_Array[3] = Checkpoint_TagArray[3] - Rob_TopPtr;
    Depth_Array[4] = Checkpoint_TagArray[4] - Rob_TopPtr;
    Depth_Array[5] = Checkpoint_TagArray[5] - Rob_TopPtr;
    Depth_Array[6] = Checkpoint_TagArray[6] - Rob_TopPtr;
    Depth_Array[7] = Checkpoint_TagArray[7] - Rob_TopPtr;
end

always @ (*) begin
    Checkpoint_MatchArray[0] = (Checkpoint_TagArray[0] == Cdb_RobTag) & (Cfc_ValidArray[0] == 1'b1);
    Checkpoint_MatchArray[1] = (Checkpoint_TagArray[1] == Cdb_RobTag) & (Cfc_ValidArray[1] == 1'b1);
    Checkpoint_MatchArray[2] = (Checkpoint_TagArray[2] == Cdb_RobTag) & (Cfc_ValidArray[2] == 1'b1);
    Checkpoint_MatchArray[3] = (Checkpoint_TagArray[3] == Cdb_RobTag) & (Cfc_ValidArray[3] == 1'b1);
    Checkpoint_MatchArray[4] = (Checkpoint_TagArray[4] == Cdb_RobTag) & (Cfc_ValidArray[4] == 1'b1);
    Checkpoint_MatchArray[5] = (Checkpoint_TagArray[5] == Cdb_RobTag) & (Cfc_ValidArray[5] == 1'b1);
    Checkpoint_MatchArray[6] = (Checkpoint_TagArray[6] == Cdb_RobTag) & (Cfc_ValidArray[6] == 1'b1);
    Checkpoint_MatchArray[7] = (Checkpoint_TagArray[7] == Cdb_RobTag) & (Cfc_ValidArray[7] == 1'b1);
end

assign Cfc_Full = full;
assign full = ((Head_Pointer+1) == Tail_Pointer);
assign empty = (Head_Pointer == Tail_Pointer);

assign Cfc_FrlHeadPtr = Frl_HeadPtrArray[Next_Head_Pointer];
assign Cfc_RobTag = Checkpoint_TagArray[Next_Head_Pointer];



always @ (posedge clk or negedge resetb) begin: cfcupdate
    
    if (!resetb) begin

        Head_Pointer <= 0;
        Tail_Pointer <= 0;
        
        for (i = 0; i < 8; i = i + 1) begin
            for (j = 0; j < 32; j = j + 1) begin
                Dfa_List[i][j] <= 0;
            end
            Cfc_ValidArray[i] <= 0;
        end
    end

    else begin

        if ((Rob_Commit) && (Rob_TopPtr == Checkpoint_TagArray[Tail_Pointer]) && (Tail_Pointer - Next_Head_Pointer != 2'b00)) begin
            Tail_Pointer <= Tail_Pointer + 1;
            Cfc_ValidArray[Tail_Pointer] <= 0;
            for (i = 0; i < 32; i = i + 1) begin
                Dfa_List[Tail_Pointer][i] <= 0;
            end
        end

        if (Cdb_Flush) begin


            for (j = 0; j < 32; j = j + 1) begin
                Dfa_List[Head_Pointer][j] <= 0;
            end

            for (i = 0; i < 8; i = i + 1) begin

                if (Cdb_RobDepth < Depth_Array[i]) begin
                    Cfc_ValidArray[i] <= 0;
                    for (j = 0; j < 32; j = j + 1) begin
                        Dfa_List[i][j] <= 0; 
                    end
                end
                if (Cdb_RobDepth == Depth_Array[i]) begin
                    Cfc_ValidArray[i] <= 0;

                end
            end
            Head_Pointer <= Next_Head_Pointer;
        end

        else begin 

            if (Dis_CfcRegWrite && Dis_InstValid) begin
                Dfa_List[Head_Pointer][Dis_CfcRdAddr] <= 1;
            end

            if ((Dis_CfcBranch || Dis_Jr31Inst) && Dis_InstValid && 
                (!full || (Rob_Commit && Rob_TopPtr == Checkpoint_TagArray[Tail_Pointer]))) begin
                
                Checkpoint_TagArray[Head_Pointer] <= Dis_CfcBranchTag;
                Cfc_ValidArray[Head_Pointer] <= 1;
                Frl_HeadPtrArray[Head_Pointer] <= Frl_HeadPtr;
                Head_Pointer <= Head_Pointer + 1;
            end
        end

    end
end


always @ (*) begin : cdbflush_logic

    if (Cdb_Flush) begin
        case (Checkpoint_MatchArray)
            8'b0000_0001: Next_Head_Pointer = 3'b000;
            8'b0000_0010: Next_Head_Pointer = 3'b001;
            8'b0000_0100: Next_Head_Pointer = 3'b010;
            8'b0000_1000: Next_Head_Pointer = 3'b011;
            8'b0001_0000: Next_Head_Pointer = 3'b100;
            8'b0010_0000: Next_Head_Pointer = 3'b101;
            8'b0100_0000: Next_Head_Pointer = 3'b110;
            8'b1000_0000: Next_Head_Pointer = 3'b111;
            default: Next_Head_Pointer = Head_Pointer;
        endcase
    end
end




reg [2:0] rs_pointer1;
reg [2:0] rs_pointer2;
reg found_rs1;
reg found_rs2;
reg [2:0] BRAM_Rspointer;
reg [5:0] Cfc_RsList_temp;
reg [5:0] Committed_RsList_temp;

always @ (*) begin
        for (i = 7; i >= 0; i = i - 1) begin: rs_search1
            if (i <= Head_Pointer) begin
                if (Dfa_List[i][Dis_CfcRsAddr]) begin
                    rs_pointer1 = i;
                    found_rs1 = 1;
                    disable rs_search1;
                end
                else found_rs1 = 0;
            end
        end

        for (i = 7; i >= 0; i = i - 1) begin : rs_search2
            if (i >= Tail_Pointer) begin
                if (Dfa_List[i][Dis_CfcRsAddr]) begin
                    rs_pointer2 = i;
                    found_rs2 = 1;
                    disable rs_search2;
                end
                else found_rs2 = 0;
            end
        end

        if (found_rs1)          BRAM_Rspointer = rs_pointer1;
        else if (found_rs2)     BRAM_Rspointer = rs_pointer2;
        else                    BRAM_Rspointer = 0;
end

always @ (posedge clk or negedge resetb) begin

    if (!resetb) begin
        for (j = 0; j < 32; j = j + 1) begin
            Committed_RsList[j] <= j;
        end
    end

    else begin

        if (found_rs1 || found_rs2) Dfa_RsValid <= 1;
        else                        Dfa_RsValid <= 0;

        if (Rob_Commit && Rob_CommitRegWrite) Committed_RsList[Rob_CommitRdAddr] <= Rob_CommitCurrPhyAddr;

        if (Dis_InstValid) begin
            if (Dis_CfcRegWrite) begin
                Cfc_RsList[{Head_Pointer, Dis_CfcRdAddr}] <= Dis_CfcNewRdPhyAddr;
            end
            Cfc_RsList_temp <= Cfc_RsList[{BRAM_Rspointer, Dis_CfcRdAddr}];
            Committed_RsList_temp <= Committed_RsList[Dis_CfcRdAddr];
        end

    end

end

assign Cfc_RsPhyAddr = (Dfa_RsValid) ? Cfc_RsList_temp : Committed_RsList_temp;



reg [2:0] rt_pointer1;
reg [2:0] rt_pointer2;
reg found_rt1;
reg found_rt2;
reg [2:0] BRAM_Rtpointer;
reg [5:0] Cfc_RtList_temp;
reg [5:0] Committed_RtList_temp;

always @ (*) begin
        for (i = 7; i >= 0; i = i - 1) begin: rt_search1
            if (i <= Head_Pointer) begin
                if (Dfa_List[i][Dis_CfcRtAddr]) begin
                    rt_pointer1 = i;
                    found_rt1 = 1;
                    disable rt_search1;
                end
                else found_rt1 = 0;
            end
        end

        for (i = 7; i >= 0; i = i - 1) begin: rt_search2
            if (i >= Tail_Pointer) begin
                if (Dfa_List[i][Dis_CfcRtAddr]) begin
                    rt_pointer2 = i;
                    found_rt2 = 1;
                    disable rt_search2;
                end
                else found_rt2 = 0;
            end
        end

        if (found_rt1)          BRAM_Rtpointer = rt_pointer1;
        else if (found_rt2)     BRAM_Rtpointer = rt_pointer2;
        else                    BRAM_Rtpointer = 0;
end

always @ (posedge clk or negedge resetb) begin

    if (!resetb) begin
        for (j = 0; j < 32; j = j + 1) begin
            Committed_RtList[j] <= j;
        end
    end

    else begin

        if (found_rt1 || found_rt2) Dfa_RtValid <= 1;
        else                        Dfa_RtValid <= 0;

        if (Rob_Commit && Rob_CommitRegWrite) Committed_RtList[Rob_CommitRdAddr] <= Rob_CommitCurrPhyAddr;

        if (Dis_InstValid) begin
            if (Dis_CfcRegWrite) begin
                Cfc_RtList[{Head_Pointer, Dis_CfcRdAddr}] <= Dis_CfcNewRdPhyAddr;
            end
            Cfc_RtList_temp <= Cfc_RtList[{BRAM_Rtpointer, Dis_CfcRtAddr}];
            Committed_RtList_temp <= Committed_RtList[Dis_CfcRtAddr];
        end

    end

end

assign Cfc_RtPhyAddr = (Dfa_RtValid) ? Cfc_RtList_temp : Committed_RtList_temp;



reg [2:0] rd_pointer1;
reg [2:0] rd_pointer2;
reg found_rd1;
reg found_rd2;
reg [2:0] BRAM_Rdpointer;
reg [5:0] Cfc_RdList_temp;
reg [5:0] Committed_RdList_temp;

always @ (*) begin
        for (i = 7; i >= 0; i = i - 1) begin: rd_search1
            if (i <= Head_Pointer) begin
                if (Dfa_List[i][Dis_CfcRdAddr]) begin
                    rd_pointer1 = i;
                    found_rd1 = 1;
                    disable rd_search1;
                end
                else found_rd1 = 0;
            end
        end

        for (i = 7; i >= 0; i = i - 1) begin: rd_search2
            if (i >= Tail_Pointer) begin
                if (Dfa_List[i][Dis_CfcRdAddr]) begin
                    rd_pointer2 = i;
                    found_rd2 = 1;
                    disable rd_search2;
                end
                else found_rd2 = 0;
            end
        end

        if (found_rd1)          BRAM_Rdpointer = rd_pointer1;
        else if (found_rd2)     BRAM_Rdpointer = rd_pointer2;
        else                    BRAM_Rdpointer = 0;
end

always @ (posedge clk or negedge resetb) begin

    if (!resetb) begin
        for (j = 0; j < 32; j = j + 1) begin
            Committed_RdList[j] <= j;
        end
    end

    else begin

        if (found_rd1 || found_rd2) Dfa_RdValid <= 1;
        else                        Dfa_RdValid <= 0;

        if (Rob_Commit && Rob_CommitRegWrite) Committed_RdList[Rob_CommitRdAddr] <= Rob_CommitCurrPhyAddr;

        if (Dis_InstValid) begin
            if (Dis_CfcRegWrite) begin
                Cfc_RdList[{Head_Pointer, Dis_CfcRdAddr}] <= Dis_CfcNewRdPhyAddr;
            end
            Cfc_RdList_temp <= Cfc_RdList[{BRAM_Rdpointer, Dis_CfcRdAddr}];
            Committed_RdList_temp <= Committed_RdList[Dis_CfcRdAddr];
        end

    end

end

assign Cfc_RdPhyAddr = (Dfa_RdValid) ? Cfc_RdList_temp : Committed_RdList_temp;

endmodule