data/full_repos/permissive/521337848/Hardware/procesor/aluX.v
1: b'%Warning-PINMISSING: data/full_repos/permissive/521337848/Hardware/procesor/aluX.v:111: Cell has missing pin: \'sreg3\'\ncollectsubreg csr(.bank(bank[1]),\n              ^~~\n                     ... Use "/* verilator lint_off PINMISSING */" and lint_on around source to disable this message.\n%Warning-PINMISSING: data/full_repos/permissive/521337848/Hardware/procesor/aluX.v:111: Cell has missing pin: \'sreg4\'\ncollectsubreg csr(.bank(bank[1]),\n              ^~~\n%Error: Exiting due to 2 warning(s)\n'
module collectsubreg(
	input bank,
	
	input[15:0] sreg1,
	input[15:0] sreg2,
	input[15:0] sreg3,
	input[15:0] sreg4,


	output reg[15:0] sreg
);

always@(*)begin

	
	case(bank)
		0: sreg <= sreg1;
		1: sreg <= sreg2;
	endcase
end

endmodule
module collectsubreg(
	input bank,
	
	input[15:0] sreg1,
	input[15:0] sreg2,
	input[15:0] sreg3,
	input[15:0] sreg4,


	output reg[15:0] sreg
);


always@(*)begin

	
	case(bank)
		0: sreg <= sreg1;
		1: sreg <= sreg2;
	endcase
end

endmodule