data/full_repos/permissive/418752214/C910_RTL_FACTORY/gen_rtl/ciu/rtl/ct_ciu_bmbif_kid.v
1: b"%Error: data/full_repos/permissive/418752214/C910_RTL_FACTORY/gen_rtl/ciu/rtl/ct_ciu_bmbif_kid.v:112: Cannot find file containing module: 'gated_clk_cell'\ngated_clk_cell  x_bmbif_xx_prio_gated_clk (\n^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/418752214/C910_RTL_FACTORY/gen_rtl/ciu/rtl,data/full_repos/permissive/418752214/gated_clk_cell\n             data/full_repos/permissive/418752214/C910_RTL_FACTORY/gen_rtl/ciu/rtl,data/full_repos/permissive/418752214/gated_clk_cell.v\n             data/full_repos/permissive/418752214/C910_RTL_FACTORY/gen_rtl/ciu/rtl,data/full_repos/permissive/418752214/gated_clk_cell.sv\n             gated_clk_cell\n             gated_clk_cell.v\n             gated_clk_cell.sv\n             obj_dir/gated_clk_cell\n             obj_dir/gated_clk_cell.v\n             obj_dir/gated_clk_cell.sv\n%Error: data/full_repos/permissive/418752214/C910_RTL_FACTORY/gen_rtl/ciu/rtl/ct_ciu_bmbif_kid.v:134: Cannot find file containing module: 'ct_prio'\nct_prio #(.NUM(4)) x_ct_bmbif_xx_prio(\n^~~~~~~\n%Error: data/full_repos/permissive/418752214/C910_RTL_FACTORY/gen_rtl/ciu/rtl/ct_ciu_bmbif_kid.v:153: Cannot find file containing module: 'ct_fifo'\nct_fifo #(.WIDTH(4),.DEPTH(4),.PTR_W(2)) x_ct_bmbif_xx_fifo(\n^~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module ct_ciu_bmbif_kid(
  bmbif_piu0_xx_grant,
  bmbif_piu1_xx_grant,
  bmbif_piu2_xx_grant,
  bmbif_piu3_xx_grant,
  bmbif_xx_bar_req,
  bmbif_xx_mid,
  bmbif_xx_req_bus,
  ciu_icg_en,
  cpurst_b,
  forever_cpuclk,
  pad_yy_icg_scan_en,
  piu0_bmbif_req_bus,
  piu0_bmbif_xx_req,
  piu1_bmbif_req_bus,
  piu1_bmbif_xx_req,
  piu2_bmbif_req_bus,
  piu2_bmbif_xx_req,
  piu3_bmbif_req_bus,
  piu3_bmbif_xx_req,
  xx_bmbif_bar_grant
);


input          ciu_icg_en;         
input          cpurst_b;           
input          forever_cpuclk;     
input          pad_yy_icg_scan_en; 
input   [8:0]  piu0_bmbif_req_bus; 
input          piu0_bmbif_xx_req;  
input   [8:0]  piu1_bmbif_req_bus; 
input          piu1_bmbif_xx_req;  
input   [8:0]  piu2_bmbif_req_bus; 
input          piu2_bmbif_xx_req;  
input   [8:0]  piu3_bmbif_req_bus; 
input          piu3_bmbif_xx_req;  
input          xx_bmbif_bar_grant; 
output         bmbif_piu0_xx_grant; 
output         bmbif_piu1_xx_grant; 
output         bmbif_piu2_xx_grant; 
output         bmbif_piu3_xx_grant; 
output         bmbif_xx_bar_req;   
output  [2:0]  bmbif_xx_mid;       
output  [8:0]  bmbif_xx_req_bus;   




wire           bmbif_piu0_xx_grant; 
wire           bmbif_piu1_xx_grant; 
wire           bmbif_piu2_xx_grant; 
wire           bmbif_piu3_xx_grant; 
wire           bmbif_xx_bar_req;   
wire           bmbif_xx_clk;       
wire           bmbif_xx_clk_en;    
wire    [2:0]  bmbif_xx_mid;       
wire    [8:0]  bmbif_xx_req_bus;   
wire           ciu_icg_en;         
wire           forever_cpuclk;     
wire           pad_yy_icg_scan_en; 
wire    [8:0]  piu0_bmbif_req_bus; 
wire           piu0_bmbif_xx_req;  
wire    [8:0]  piu1_bmbif_req_bus; 
wire           piu1_bmbif_xx_req;  
wire    [8:0]  piu2_bmbif_req_bus; 
wire           piu2_bmbif_xx_req;  
wire    [8:0]  piu3_bmbif_req_bus; 
wire           piu3_bmbif_xx_req;  
wire    [3:0]  xx_bar_sel;         
wire    [3:0]  xx_bar_valid;       
wire           xx_bmbif_bar_grant; 
wire    [3:0]  xx_fifo_create_bus; 
wire           xx_fifo_create_en;  
wire    [3:0]  xx_fifo_pop_bus;    
wire           xx_fifo_pop_bus_vld; 
wire           xx_fifo_pop_en;     














assign bmbif_xx_clk_en = |xx_bar_sel[3:0];


gated_clk_cell  x_bmbif_xx_prio_gated_clk (
  .clk_in             (forever_cpuclk    ),
  .clk_out            (bmbif_xx_clk      ),
  .external_en        (1'b0              ),
  .global_en          (1'b1              ),
  .local_en           (bmbif_xx_clk_en   ),
  .module_en          (ciu_icg_en        ),
  .pad_yy_icg_scan_en (pad_yy_icg_scan_en)
);








assign xx_bar_valid[3:0] ={piu3_bmbif_xx_req,
                           piu2_bmbif_xx_req,
                           piu1_bmbif_xx_req,
                           piu0_bmbif_xx_req};

ct_prio #(.NUM(4)) x_ct_bmbif_xx_prio(
  .clk             (bmbif_xx_clk     ),
  .rst_b           (cpurst_b         ),
  .valid           (xx_bar_valid     ),
  .clr             (1'b1             ),
  .sel             (xx_bar_sel       )
);

assign bmbif_piu0_xx_grant = xx_bar_sel[0];
assign bmbif_piu1_xx_grant = xx_bar_sel[1];
assign bmbif_piu2_xx_grant = xx_bar_sel[2];
assign bmbif_piu3_xx_grant = xx_bar_sel[3];

assign xx_fifo_create_en = |xx_bar_valid[3:0];

assign xx_fifo_create_bus[3:0] = xx_bar_sel[3:0];

assign xx_fifo_pop_en = xx_bmbif_bar_grant;

ct_fifo #(.WIDTH(4),.DEPTH(4),.PTR_W(2)) x_ct_bmbif_xx_fifo(
  .clk                 (forever_cpuclk      ),
  .rst_b               (cpurst_b            ),
  .fifo_create_en      (xx_fifo_create_en   ),
  .fifo_create_en_dp   (xx_fifo_create_en   ),
  .fifo_pop_en         (xx_fifo_pop_en      ),
  .fifo_create_data    (xx_fifo_create_bus  ),
  .fifo_pop_data       (xx_fifo_pop_bus     ),
  .fifo_pop_data_vld   (xx_fifo_pop_bus_vld ),
  .fifo_full           (xx_fifo_full        ),
  .fifo_empty          (xx_fifo_empty       ),
  .pad_yy_icg_scan_en  (pad_yy_icg_scan_en   ),
  .fifo_icg_en           (ciu_icg_en)
);

assign bmbif_xx_bar_req = xx_fifo_pop_bus_vld;
assign bmbif_xx_req_bus[8:0] = 
         {9{xx_fifo_pop_bus[3]}} & piu3_bmbif_req_bus[8:0] |
         {9{xx_fifo_pop_bus[2]}} & piu2_bmbif_req_bus[8:0] |
         {9{xx_fifo_pop_bus[1]}} & piu1_bmbif_req_bus[8:0] |
         {9{xx_fifo_pop_bus[0]}} & piu0_bmbif_req_bus[8:0];

assign bmbif_xx_mid[2] = 1'b0;
assign bmbif_xx_mid[1] = xx_fifo_pop_bus[3] | xx_fifo_pop_bus[2];
assign bmbif_xx_mid[0] = xx_fifo_pop_bus[3] | xx_fifo_pop_bus[1];


endmodule
module ct_ciu_bmbif_kid(
  bmbif_piu0_xx_grant,
  bmbif_piu1_xx_grant,
  bmbif_piu2_xx_grant,
  bmbif_piu3_xx_grant,
  bmbif_xx_bar_req,
  bmbif_xx_mid,
  bmbif_xx_req_bus,
  ciu_icg_en,
  cpurst_b,
  forever_cpuclk,
  pad_yy_icg_scan_en,
  piu0_bmbif_req_bus,
  piu0_bmbif_xx_req,
  piu1_bmbif_req_bus,
  piu1_bmbif_xx_req,
  piu2_bmbif_req_bus,
  piu2_bmbif_xx_req,
  piu3_bmbif_req_bus,
  piu3_bmbif_xx_req,
  xx_bmbif_bar_grant
);



input          ciu_icg_en;         
input          cpurst_b;           
input          forever_cpuclk;     
input          pad_yy_icg_scan_en; 
input   [8:0]  piu0_bmbif_req_bus; 
input          piu0_bmbif_xx_req;  
input   [8:0]  piu1_bmbif_req_bus; 
input          piu1_bmbif_xx_req;  
input   [8:0]  piu2_bmbif_req_bus; 
input          piu2_bmbif_xx_req;  
input   [8:0]  piu3_bmbif_req_bus; 
input          piu3_bmbif_xx_req;  
input          xx_bmbif_bar_grant; 
output         bmbif_piu0_xx_grant; 
output         bmbif_piu1_xx_grant; 
output         bmbif_piu2_xx_grant; 
output         bmbif_piu3_xx_grant; 
output         bmbif_xx_bar_req;   
output  [2:0]  bmbif_xx_mid;       
output  [8:0]  bmbif_xx_req_bus;   




wire           bmbif_piu0_xx_grant; 
wire           bmbif_piu1_xx_grant; 
wire           bmbif_piu2_xx_grant; 
wire           bmbif_piu3_xx_grant; 
wire           bmbif_xx_bar_req;   
wire           bmbif_xx_clk;       
wire           bmbif_xx_clk_en;    
wire    [2:0]  bmbif_xx_mid;       
wire    [8:0]  bmbif_xx_req_bus;   
wire           ciu_icg_en;         
wire           forever_cpuclk;     
wire           pad_yy_icg_scan_en; 
wire    [8:0]  piu0_bmbif_req_bus; 
wire           piu0_bmbif_xx_req;  
wire    [8:0]  piu1_bmbif_req_bus; 
wire           piu1_bmbif_xx_req;  
wire    [8:0]  piu2_bmbif_req_bus; 
wire           piu2_bmbif_xx_req;  
wire    [8:0]  piu3_bmbif_req_bus; 
wire           piu3_bmbif_xx_req;  
wire    [3:0]  xx_bar_sel;         
wire    [3:0]  xx_bar_valid;       
wire           xx_bmbif_bar_grant; 
wire    [3:0]  xx_fifo_create_bus; 
wire           xx_fifo_create_en;  
wire    [3:0]  xx_fifo_pop_bus;    
wire           xx_fifo_pop_bus_vld; 
wire           xx_fifo_pop_en;     














assign bmbif_xx_clk_en = |xx_bar_sel[3:0];


gated_clk_cell  x_bmbif_xx_prio_gated_clk (
  .clk_in             (forever_cpuclk    ),
  .clk_out            (bmbif_xx_clk      ),
  .external_en        (1'b0              ),
  .global_en          (1'b1              ),
  .local_en           (bmbif_xx_clk_en   ),
  .module_en          (ciu_icg_en        ),
  .pad_yy_icg_scan_en (pad_yy_icg_scan_en)
);








assign xx_bar_valid[3:0] ={piu3_bmbif_xx_req,
                           piu2_bmbif_xx_req,
                           piu1_bmbif_xx_req,
                           piu0_bmbif_xx_req};

ct_prio #(.NUM(4)) x_ct_bmbif_xx_prio(
  .clk             (bmbif_xx_clk     ),
  .rst_b           (cpurst_b         ),
  .valid           (xx_bar_valid     ),
  .clr             (1'b1             ),
  .sel             (xx_bar_sel       )
);

assign bmbif_piu0_xx_grant = xx_bar_sel[0];
assign bmbif_piu1_xx_grant = xx_bar_sel[1];
assign bmbif_piu2_xx_grant = xx_bar_sel[2];
assign bmbif_piu3_xx_grant = xx_bar_sel[3];

assign xx_fifo_create_en = |xx_bar_valid[3:0];

assign xx_fifo_create_bus[3:0] = xx_bar_sel[3:0];

assign xx_fifo_pop_en = xx_bmbif_bar_grant;

ct_fifo #(.WIDTH(4),.DEPTH(4),.PTR_W(2)) x_ct_bmbif_xx_fifo(
  .clk                 (forever_cpuclk      ),
  .rst_b               (cpurst_b            ),
  .fifo_create_en      (xx_fifo_create_en   ),
  .fifo_create_en_dp   (xx_fifo_create_en   ),
  .fifo_pop_en         (xx_fifo_pop_en      ),
  .fifo_create_data    (xx_fifo_create_bus  ),
  .fifo_pop_data       (xx_fifo_pop_bus     ),
  .fifo_pop_data_vld   (xx_fifo_pop_bus_vld ),
  .fifo_full           (xx_fifo_full        ),
  .fifo_empty          (xx_fifo_empty       ),
  .pad_yy_icg_scan_en  (pad_yy_icg_scan_en   ),
  .fifo_icg_en           (ciu_icg_en)
);

assign bmbif_xx_bar_req = xx_fifo_pop_bus_vld;
assign bmbif_xx_req_bus[8:0] = 
         {9{xx_fifo_pop_bus[3]}} & piu3_bmbif_req_bus[8:0] |
         {9{xx_fifo_pop_bus[2]}} & piu2_bmbif_req_bus[8:0] |
         {9{xx_fifo_pop_bus[1]}} & piu1_bmbif_req_bus[8:0] |
         {9{xx_fifo_pop_bus[0]}} & piu0_bmbif_req_bus[8:0];

assign bmbif_xx_mid[2] = 1'b0;
assign bmbif_xx_mid[1] = xx_fifo_pop_bus[3] | xx_fifo_pop_bus[2];
assign bmbif_xx_mid[0] = xx_fifo_pop_bus[3] | xx_fifo_pop_bus[1];


endmodule