data/full_repos/permissive/51896788/projects/ip_test/rtl/irom.v
data/verilator_xmls/ac5c8a46-b073-49b3-ac09-74062b16be54.xml
module irom
(
    input clk,

    input [23:0] addr,
    input cs,
    output [31:0] dout
);
    parameter IROM_DATA_FILE = "irom.hex";
  
    reg [31:0] data_array[(1024 * 16)-1:0];
    reg [31:0] data_out;

    initial
    begin
        $readmemh(IROM_DATA_FILE, data_array);
    end

    always @ (posedge clk)
        if (cs)
            data_out <= data_array[addr[13:0]];

    assign dout = data_out;
  
endmodule
module irom
(
    input clk,

    input [23:0] addr,
    input cs,
    output [31:0] dout
);

    parameter IROM_DATA_FILE = "irom.hex";
  
    reg [31:0] data_array[(1024 * 16)-1:0];
    reg [31:0] data_out;

    initial
    begin
        $readmemh(IROM_DATA_FILE, data_array);
    end

    always @ (posedge clk)
        if (cs)
            data_out <= data_array[addr[13:0]];

    assign dout = data_out;
  
endmodule