data/full_repos/permissive/418753087/E902_RTL_FACTORY/gen_rtl/iu/rtl/cr_iu_hs_split.v
data/verilator_xmls/b1a44ea3-3c66-4147-80c8-9226ddc4ba85.xml
module cr_iu_hs_split(
  hs_split_iu_ctrl_inst_vld,
  hs_split_iu_dp_inst_op,
  hs_split_iu_hs_retire_mask,
  hs_split_iu_hs_switch_se,
  hs_split_iu_nsinst_gpr_rst_b,
  hs_split_iu_unstack_chgflw,
  iu_hs_split_ex_stall,
  iu_ifu_spcu_int_en,
  split_ifctrl_hs_stall,
  split_ifctrl_hs_stall_part
);


input           iu_hs_split_ex_stall;        
input           iu_ifu_spcu_int_en;          
output          hs_split_iu_ctrl_inst_vld;   
output  [31:0]  hs_split_iu_dp_inst_op;      
output          hs_split_iu_hs_retire_mask;  
output          hs_split_iu_hs_switch_se;    
output          hs_split_iu_nsinst_gpr_rst_b; 
output          hs_split_iu_unstack_chgflw;  
output          split_ifctrl_hs_stall;       
output          split_ifctrl_hs_stall_part;  




wire            hs_split_iu_ctrl_inst_vld;   
wire    [31:0]  hs_split_iu_dp_inst_op;      
wire            hs_split_iu_hs_retire_mask;  
wire            hs_split_iu_hs_switch_se;    
wire            hs_split_iu_nsinst_gpr_rst_b; 
wire            hs_split_iu_unstack_chgflw;  
wire            split_ifctrl_hs_stall;       
wire            split_ifctrl_hs_stall_part;  



























assign hs_split_iu_nsinst_gpr_rst_b = 1'b1; 
assign hs_split_iu_hs_retire_mask   = 1'b0; 
assign hs_split_iu_unstack_chgflw   = 1'b0;
assign hs_split_iu_hs_switch_se     = 1'b0;
assign split_ifctrl_hs_stall_part   = 1'b0;
assign split_ifctrl_hs_stall        = 1'b0;
assign hs_split_iu_ctrl_inst_vld    = 1'b0;


assign hs_split_iu_dp_inst_op[31:0] = 32'b0;












endmodule
module cr_iu_hs_split(
  hs_split_iu_ctrl_inst_vld,
  hs_split_iu_dp_inst_op,
  hs_split_iu_hs_retire_mask,
  hs_split_iu_hs_switch_se,
  hs_split_iu_nsinst_gpr_rst_b,
  hs_split_iu_unstack_chgflw,
  iu_hs_split_ex_stall,
  iu_ifu_spcu_int_en,
  split_ifctrl_hs_stall,
  split_ifctrl_hs_stall_part
);



input           iu_hs_split_ex_stall;        
input           iu_ifu_spcu_int_en;          
output          hs_split_iu_ctrl_inst_vld;   
output  [31:0]  hs_split_iu_dp_inst_op;      
output          hs_split_iu_hs_retire_mask;  
output          hs_split_iu_hs_switch_se;    
output          hs_split_iu_nsinst_gpr_rst_b; 
output          hs_split_iu_unstack_chgflw;  
output          split_ifctrl_hs_stall;       
output          split_ifctrl_hs_stall_part;  




wire            hs_split_iu_ctrl_inst_vld;   
wire    [31:0]  hs_split_iu_dp_inst_op;      
wire            hs_split_iu_hs_retire_mask;  
wire            hs_split_iu_hs_switch_se;    
wire            hs_split_iu_nsinst_gpr_rst_b; 
wire            hs_split_iu_unstack_chgflw;  
wire            split_ifctrl_hs_stall;       
wire            split_ifctrl_hs_stall_part;  



























assign hs_split_iu_nsinst_gpr_rst_b = 1'b1; 
assign hs_split_iu_hs_retire_mask   = 1'b0; 
assign hs_split_iu_unstack_chgflw   = 1'b0;
assign hs_split_iu_hs_switch_se     = 1'b0;
assign split_ifctrl_hs_stall_part   = 1'b0;
assign split_ifctrl_hs_stall        = 1'b0;
assign hs_split_iu_ctrl_inst_vld    = 1'b0;


assign hs_split_iu_dp_inst_op[31:0] = 32'b0;












endmodule