data/full_repos/permissive/423547971/FPGA Projects/Stopwatch_Timer on Nexys A7/seg_display_driver.v
1: b'%Error: Cannot find file containing module: Projects/Stopwatch_Timer\n        ... Looked in:\n             data/full_repos/permissive/423547971/FPGA/Projects/Stopwatch_Timer\n             data/full_repos/permissive/423547971/FPGA/Projects/Stopwatch_Timer.v\n             data/full_repos/permissive/423547971/FPGA/Projects/Stopwatch_Timer.sv\n             Projects/Stopwatch_Timer\n             Projects/Stopwatch_Timer.v\n             Projects/Stopwatch_Timer.sv\n             obj_dir/Projects/Stopwatch_Timer\n             obj_dir/Projects/Stopwatch_Timer.v\n             obj_dir/Projects/Stopwatch_Timer.sv\n%Error: Cannot find file containing module: on\n%Error: Cannot find file containing module: Nexys\n%Error: Cannot find file containing module: A7,data/full_repos/permissive/423547971\n%Error: Cannot find file containing module: data/full_repos/permissive/423547971/FPGA\n%Error: Cannot find file containing module: A7/seg_display_driver.v\n%Error: Exiting due to 6 error(s)\n'
module seg_display_driver(
    input clk_100MHz,
    input reset,
    input [3:0] hr_10s, hr_1s, min_10s, min_1s, sec_10s, sec_1s, sec100_10s, sec100_1s,
    output reg [0:6] seg,
    output reg dp,
    output reg [7:0] digit
    );


    parameter ZERO  = 7'b000_0001;
    parameter ONE   = 7'b100_1111;
    parameter TWO   = 7'b001_0010;
    parameter THREE = 7'b000_0110;
    parameter FOUR  = 7'b100_1100;
    parameter FIVE  = 7'b010_0100;
    parameter SIX   = 7'b010_0000;
    parameter SEVEN = 7'b000_1111;
    parameter EIGHT = 7'b000_0000;
    parameter NINE  = 7'b000_0100;
    

    reg [2:0] digit_select;
    reg [16:0] digit_timer;
    

    always @(posedge clk_100MHz or posedge reset) begin
        if(reset) begin
            digit_select <= 0;
            digit_timer <= 0; 
        end
        else
            if(digit_timer == 99_999) begin
                digit_timer <= 0;
                digit_select <=  digit_select + 1;
            end
            else
                digit_timer <=  digit_timer + 1;
    end
    

    always @(digit_select) begin
        case(digit_select) 
            3'b000 : digit = 8'b11111110;
            3'b001 : digit = 8'b11111101;
            3'b010 : digit = 8'b11111011;
            3'b011 : digit = 8'b11110111;
            3'b100 : digit = 8'b11101111;
            3'b101 : digit = 8'b11011111;
            3'b110 : digit = 8'b10111111;
            3'b111 : digit = 8'b01111111;
        endcase
    end
    


    always @*
        case(digit_select)
            3'b000 : begin
                        dp = 1'b1;
                        case(sec100_1s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end
                    
            3'b001 : begin
                        dp = 1'b1;
                        case(sec100_10s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end
                    
            3'b010 : begin
                        dp = 1'b0;
                        case(sec_1s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end
                    
            3'b011 : begin
                        dp = 1'b1;
                        case(sec_10s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end
                    
           3'b100 : begin
                        dp = 1'b0;
                        case(min_1s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end
                    
            3'b101 : begin
                        dp = 1'b1;
                        case(min_10s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end
                    
            3'b110 : begin
                        dp = 1'b0;
                        case(hr_1s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end
                    
            3'b111 : begin
                        dp = 1'b1;
                        case(hr_10s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end 
        endcase   
  
endmodule
module seg_display_driver(
    input clk_100MHz,
    input reset,
    input [3:0] hr_10s, hr_1s, min_10s, min_1s, sec_10s, sec_1s, sec100_10s, sec100_1s,
    output reg [0:6] seg,
    output reg dp,
    output reg [7:0] digit
    );



    parameter ZERO  = 7'b000_0001;
    parameter ONE   = 7'b100_1111;
    parameter TWO   = 7'b001_0010;
    parameter THREE = 7'b000_0110;
    parameter FOUR  = 7'b100_1100;
    parameter FIVE  = 7'b010_0100;
    parameter SIX   = 7'b010_0000;
    parameter SEVEN = 7'b000_1111;
    parameter EIGHT = 7'b000_0000;
    parameter NINE  = 7'b000_0100;
    

    reg [2:0] digit_select;
    reg [16:0] digit_timer;
    

    always @(posedge clk_100MHz or posedge reset) begin
        if(reset) begin
            digit_select <= 0;
            digit_timer <= 0; 
        end
        else
            if(digit_timer == 99_999) begin
                digit_timer <= 0;
                digit_select <=  digit_select + 1;
            end
            else
                digit_timer <=  digit_timer + 1;
    end
    

    always @(digit_select) begin
        case(digit_select) 
            3'b000 : digit = 8'b11111110;
            3'b001 : digit = 8'b11111101;
            3'b010 : digit = 8'b11111011;
            3'b011 : digit = 8'b11110111;
            3'b100 : digit = 8'b11101111;
            3'b101 : digit = 8'b11011111;
            3'b110 : digit = 8'b10111111;
            3'b111 : digit = 8'b01111111;
        endcase
    end
    


    always @*
        case(digit_select)
            3'b000 : begin
                        dp = 1'b1;
                        case(sec100_1s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end
                    
            3'b001 : begin
                        dp = 1'b1;
                        case(sec100_10s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end
                    
            3'b010 : begin
                        dp = 1'b0;
                        case(sec_1s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end
                    
            3'b011 : begin
                        dp = 1'b1;
                        case(sec_10s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end
                    
           3'b100 : begin
                        dp = 1'b0;
                        case(min_1s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end
                    
            3'b101 : begin
                        dp = 1'b1;
                        case(min_10s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end
                    
            3'b110 : begin
                        dp = 1'b0;
                        case(hr_1s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end
                    
            3'b111 : begin
                        dp = 1'b1;
                        case(hr_10s)
                            4'b0000 : seg = ZERO;
                            4'b0001 : seg = ONE;
                            4'b0010 : seg = TWO;
                            4'b0011 : seg = THREE;
                            4'b0100 : seg = FOUR;
                            4'b0101 : seg = FIVE;
                            4'b0110 : seg = SIX;
                            4'b0111 : seg = SEVEN;
                            4'b1000 : seg = EIGHT;
                            4'b1001 : seg = NINE;
                        endcase
                    end 
        endcase   
  
endmodule