data/full_repos/permissive/520487363/EX2 - FPGA Realization of Radix-4 Multiplier/Verilog/Mux.v
1: b'%Error: Invalid Option: -\n'
module Mux2to1 #(
    parameter N = 16
)(
    input sel,
    input [N-1:0] a0, a1,
    output [N-1:0] out
);
    assign out = sel ? a1 : a0;
endmodule
module Mux2to1 #(
    parameter N = 16
)(
    input sel,
    input [N-1:0] a0, a1,
    output [N-1:0] out
);

    assign out = sel ? a1 : a0;
endmodule