data/full_repos/permissive/473423187/hw/rtl/tex_unit/VX_tex_lerp.sv
1: b'%Error: data/full_repos/permissive/473423187/hw/rtl/tex_unit/VX_tex_lerp.sv:1: Cannot find include file: VX_tex_define.vh\n`include "VX_tex_define.vh" \n         ^~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/473423187/hw/rtl/tex_unit,data/full_repos/permissive/473423187/VX_tex_define.vh\n             data/full_repos/permissive/473423187/hw/rtl/tex_unit,data/full_repos/permissive/473423187/VX_tex_define.vh.v\n             data/full_repos/permissive/473423187/hw/rtl/tex_unit,data/full_repos/permissive/473423187/VX_tex_define.vh.sv\n             VX_tex_define.vh\n             VX_tex_define.vh.v\n             VX_tex_define.vh.sv\n             obj_dir/VX_tex_define.vh\n             obj_dir/VX_tex_define.vh.v\n             obj_dir/VX_tex_define.vh.sv\n%Error: data/full_repos/permissive/473423187/hw/rtl/tex_unit/VX_tex_lerp.sv:12: Define or directive not defined: \'`UNUSED_VAR\'\n        `UNUSED_VAR (sum)\n        ^~~~~~~~~~~\n%Error: data/full_repos/permissive/473423187/hw/rtl/tex_unit/VX_tex_lerp.sv:12: syntax error, unexpected \'(\'\n        `UNUSED_VAR (sum)\n                     ^~~\n%Error: Exiting due to 3 error(s)\n'
module VX_tex_lerp (
    input wire [3:0][7:0]  in1,
    input wire [3:0][7:0]  in2,
    input wire [8:0]       alpha,
    input wire [7:0]       beta,
    output wire [3:0][7:0] out
);  
    for (genvar i = 0; i < 4; ++i) begin
        wire [16:0] sum = in1[i] * alpha + in2[i] * beta;
        `UNUSED_VAR (sum)
        assign out[i] = sum[15:8];
    end

endmodule
module VX_tex_lerp (
    input wire [3:0][7:0]  in1,
    input wire [3:0][7:0]  in2,
    input wire [8:0]       alpha,
    input wire [7:0]       beta,
    output wire [3:0][7:0] out
);
  
    for (genvar i = 0; i < 4; ++i) begin
        wire [16:0] sum = in1[i] * alpha + in2[i] * beta;
        `UNUSED_VAR (sum)
        assign out[i] = sum[15:8];
    end

endmodule