data/full_repos/permissive/428601773/src/core/ALU.v
1: b'%Error: data/full_repos/permissive/428601773/src/core/ALU.v:1: Cannot find include file: defines.v\n`include "defines.v" \n         ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/428601773/src/core,data/full_repos/permissive/428601773/defines.v\n             data/full_repos/permissive/428601773/src/core,data/full_repos/permissive/428601773/defines.v.v\n             data/full_repos/permissive/428601773/src/core,data/full_repos/permissive/428601773/defines.v.sv\n             defines.v\n             defines.v.v\n             defines.v.sv\n             obj_dir/defines.v\n             obj_dir/defines.v.v\n             obj_dir/defines.v.sv\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:12: Define or directive not defined: \'`ALU_ADD\'\n      `ALU_ADD : result = A + B;\n      ^~~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:12: syntax error, unexpected \':\', expecting endcase\n      `ALU_ADD : result = A + B;\n               ^\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:13: Define or directive not defined: \'`ALU_SUB\'\n      `ALU_SUB : result = A - B;\n      ^~~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:15: Define or directive not defined: \'`ALU_XOR\'\n      `ALU_XOR : result = A ^ B;\n      ^~~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:16: Define or directive not defined: \'`ALU_OR\'\n      `ALU_OR  : result = A | B;\n      ^~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:17: Define or directive not defined: \'`ALU_AND\'\n      `ALU_AND : result = A & B;\n      ^~~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:19: Define or directive not defined: \'`ALU_SRA\'\n      `ALU_SRA : result = $signed(A) >>> $signed(B);\n      ^~~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:20: Define or directive not defined: \'`ALU_SRL\'\n      `ALU_SRL : result = A >> B;\n      ^~~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:21: Define or directive not defined: \'`ALU_SLL\'\n      `ALU_SLL : result = A << B;\n      ^~~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:23: Define or directive not defined: \'`ALU_SLTS\'\n      `ALU_SLTS: result = $signed(A) < $signed(B);\n      ^~~~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:24: Define or directive not defined: \'`ALU_SLTU\'\n      `ALU_SLTU: result = A < B;\n      ^~~~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:26: Define or directive not defined: \'`ALU_LTS\'\n      `ALU_LTS : result = $signed(A) < $signed(B);\n      ^~~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:27: Define or directive not defined: \'`ALU_LTU\'\n      `ALU_LTU : result = A < B;\n      ^~~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:29: Define or directive not defined: \'`ALU_SLTS\'\n      `ALU_SLTS: result = $signed(A) < $signed(B);\n      ^~~~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:30: Define or directive not defined: \'`ALU_SLTU\'\n      `ALU_SLTU: result = A < B;\n      ^~~~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:32: Define or directive not defined: \'`ALU_GES\'\n      `ALU_GES : result = $signed(A) >= $signed(B);\n      ^~~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:33: Define or directive not defined: \'`ALU_GEU\'\n      `ALU_GEU : result = A >= B;\n      ^~~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:34: Define or directive not defined: \'`ALU_EQ\'\n      `ALU_EQ  : result = A == B;\n      ^~~~~~~\n%Error: data/full_repos/permissive/428601773/src/core/ALU.v:35: Define or directive not defined: \'`ALU_NE\'\n      `ALU_NE  : result = A != B;\n      ^~~~~~~\n%Error: Exiting due to 20 error(s)\n'
module ALU (
  input  [31:0]     A, B,
  input  [4: 0]     operation,
  output reg[31: 0] result,
  output reg        flag
);
  always @(*) begin
    case(operation)
      `ALU_ADD : result = A + B;
      `ALU_SUB : result = A - B;
        
      `ALU_XOR : result = A ^ B;
      `ALU_OR  : result = A | B;
      `ALU_AND : result = A & B;
        
      `ALU_SRA : result = $signed(A) >>> $signed(B);
      `ALU_SRL : result = A >> B;
      `ALU_SLL : result = A << B;
      
      `ALU_SLTS: result = $signed(A) < $signed(B);
      `ALU_SLTU: result = A < B;

      `ALU_LTS : result = $signed(A) < $signed(B);
      `ALU_LTU : result = A < B;
	
      `ALU_SLTS: result = $signed(A) < $signed(B);
      `ALU_SLTU: result = A < B;

      `ALU_GES : result = $signed(A) >= $signed(B);
      `ALU_GEU : result = A >= B;
      `ALU_EQ  : result = A == B;
      `ALU_NE  : result = A != B;


    endcase
    flag = (operation[4] == 1) ? result : 0;
  end
endmodule
module ALU (
  input  [31:0]     A, B,
  input  [4: 0]     operation,
  output reg[31: 0] result,
  output reg        flag
);

  always @(*) begin
    case(operation)
      `ALU_ADD : result = A + B;
      `ALU_SUB : result = A - B;
        
      `ALU_XOR : result = A ^ B;
      `ALU_OR  : result = A | B;
      `ALU_AND : result = A & B;
        
      `ALU_SRA : result = $signed(A) >>> $signed(B);
      `ALU_SRL : result = A >> B;
      `ALU_SLL : result = A << B;
      
      `ALU_SLTS: result = $signed(A) < $signed(B);
      `ALU_SLTU: result = A < B;

      `ALU_LTS : result = $signed(A) < $signed(B);
      `ALU_LTU : result = A < B;
	
      `ALU_SLTS: result = $signed(A) < $signed(B);
      `ALU_SLTU: result = A < B;

      `ALU_GES : result = $signed(A) >= $signed(B);
      `ALU_GEU : result = A >= B;
      `ALU_EQ  : result = A == B;
      `ALU_NE  : result = A != B;


    endcase
    flag = (operation[4] == 1) ? result : 0;
  end
endmodule