data/full_repos/permissive/517390617/modules/jtframe/hdl/cpu/jtframe_z80.v
1: b"%Error: data/full_repos/permissive/517390617/modules/jtframe/hdl/cpu/jtframe_z80.v:352: Cannot find file containing module: 'T80s'\nT80s u_cpu(\n^~~~\n        ... Looked in:\n             data/full_repos/permissive/517390617/modules/jtframe/hdl/cpu,data/full_repos/permissive/517390617/T80s\n             data/full_repos/permissive/517390617/modules/jtframe/hdl/cpu,data/full_repos/permissive/517390617/T80s.v\n             data/full_repos/permissive/517390617/modules/jtframe/hdl/cpu,data/full_repos/permissive/517390617/T80s.sv\n             T80s\n             T80s.v\n             T80s.sv\n             obj_dir/T80s\n             obj_dir/T80s.v\n             obj_dir/T80s.sv\n%Error: data/full_repos/permissive/517390617/modules/jtframe/hdl/cpu/jtframe_z80.v:289: Cannot find file containing module: 'jtframe_z80wait'\njtframe_z80wait #(1) u_wait(\n^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517390617/modules/jtframe/hdl/cpu/jtframe_z80.v:184: Cannot find file containing module: 'jtframe_dual_nvram'\n    jtframe_dual_nvram #(.aw(RAM_AW)) u_ram(\n    ^~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module jtframe_sysz80(
    input         rst_n,
    input         clk,
    input         cen,
    output        cpu_cen,
    input         int_n,
    input         nmi_n,
    input         busrq_n,
    output        m1_n,
    output        mreq_n,
    output        iorq_n,
    output        rd_n,
    output        wr_n,
    output        rfsh_n,
    output        halt_n,
    output        busak_n,
    output [15:0] A,
    input  [7:0]  cpu_din,
    output [7:0]  cpu_dout,
    output [7:0]  ram_dout,

    input         ram_cs,
    input         rom_cs,
    input         rom_ok
);
    parameter
        RAM_AW  = 12,
        CLR_INT = 0,
        M1_WAIT = 0;

    jtframe_sysz80_nvram#(
        .RAM_AW  ( RAM_AW   ),
        .CLR_INT ( CLR_INT  ),
        .M1_WAIT ( M1_WAIT  )
    ) u_cpu(
        .rst_n      ( rst_n     ),
        .clk        ( clk       ),
        .cen        ( cen       ),
        .cpu_cen    ( cpu_cen   ),
        .int_n      ( int_n     ),
        .nmi_n      ( nmi_n     ),
        .busrq_n    ( busrq_n   ),
        .m1_n       ( m1_n      ),
        .mreq_n     ( mreq_n    ),
        .iorq_n     ( iorq_n    ),
        .rd_n       ( rd_n      ),
        .wr_n       ( wr_n      ),
        .rfsh_n     ( rfsh_n    ),
        .halt_n     ( halt_n    ),
        .busak_n    ( busak_n   ),
        .A          ( A         ),
        .cpu_din    ( cpu_din   ),
        .cpu_dout   ( cpu_dout  ),
        .ram_dout   ( ram_dout  ),

        .prog_addr  (           ),
        .prog_data  ( 8'd0      ),
        .prog_din   (           ),
        .prog_we    ( 1'b0      ),

        .ram_cs     ( ram_cs    ),
        .rom_cs     ( rom_cs    ),
        .rom_ok     ( rom_ok    )
    );
endmodule
module jtframe_sysz80(
    input         rst_n,
    input         clk,
    input         cen,
    output        cpu_cen,
    input         int_n,
    input         nmi_n,
    input         busrq_n,
    output        m1_n,
    output        mreq_n,
    output        iorq_n,
    output        rd_n,
    output        wr_n,
    output        rfsh_n,
    output        halt_n,
    output        busak_n,
    output [15:0] A,
    input  [7:0]  cpu_din,
    output [7:0]  cpu_dout,
    output [7:0]  ram_dout,

    input         ram_cs,
    input         rom_cs,
    input         rom_ok
);

    parameter
        RAM_AW  = 12,
        CLR_INT = 0,
        M1_WAIT = 0;

    jtframe_sysz80_nvram#(
        .RAM_AW  ( RAM_AW   ),
        .CLR_INT ( CLR_INT  ),
        .M1_WAIT ( M1_WAIT  )
    ) u_cpu(
        .rst_n      ( rst_n     ),
        .clk        ( clk       ),
        .cen        ( cen       ),
        .cpu_cen    ( cpu_cen   ),
        .int_n      ( int_n     ),
        .nmi_n      ( nmi_n     ),
        .busrq_n    ( busrq_n   ),
        .m1_n       ( m1_n      ),
        .mreq_n     ( mreq_n    ),
        .iorq_n     ( iorq_n    ),
        .rd_n       ( rd_n      ),
        .wr_n       ( wr_n      ),
        .rfsh_n     ( rfsh_n    ),
        .halt_n     ( halt_n    ),
        .busak_n    ( busak_n   ),
        .A          ( A         ),
        .cpu_din    ( cpu_din   ),
        .cpu_dout   ( cpu_dout  ),
        .ram_dout   ( ram_dout  ),

        .prog_addr  (           ),
        .prog_data  ( 8'd0      ),
        .prog_din   (           ),
        .prog_we    ( 1'b0      ),

        .ram_cs     ( ram_cs    ),
        .rom_cs     ( rom_cs    ),
        .rom_ok     ( rom_ok    )
    );
endmodule