data/full_repos/permissive/505898990/verilog/rtl/examples/distance_display_mine_orginal.v
1: b"%Error: data/full_repos/permissive/505898990/verilog/rtl/examples/distance_display_mine_orginal.v:435: syntax error, unexpected ';', expecting ')' or ','\n    output reg [7:0] o_segments = 0;\n                                   ^\n%Error: Exiting due to 1 error(s)\n"
module four_digit_seven_segment (
    input wire        i_clk,
    input wire        i_reset,
    input wire [11:0] i_distance_bcd,

    output wire [11:0] o_display
);

    localparam CYCLES_TILL_22000_US = 22_000;

    reg [14:0]  r_display_counter_uS;
    reg [11:0]  r_distance_bcd;
    reg [3:0]   r_current_bcd_digit;
    reg [11:0]  r_display;
    wire [11:0]  w_display;


    always @(posedge i_clk) begin

        if (i_reset) begin
            r_display_counter_uS <= {15{1'b0}};
            r_distance_bcd <= {12{1'b0}};
            r_display <= {12{1'b0}};
            r_current_bcd_digit <= {4{1'b0}};


        end else begin


            if (r_display_counter_uS == CYCLES_TILL_22000_US - 1) begin

                r_display_counter_uS <= {15{1'b0}};


                r_distance_bcd <= i_distance_bcd;


                r_current_bcd_digit <= r_distance_bcd[3:0];


                r_display[8] <= 1;




            end else begin
                r_display_counter_uS <= r_display_counter_uS + 1'b1;
            end


            if (r_display_counter_uS == 500 - 1) begin


                r_display[8] <= 0;


                r_current_bcd_digit <= r_distance_bcd[7:4];


                r_display[9] <= 1;



            end else if (r_display_counter_uS == 1000 - 1) begin

                r_display[9] <= 0;


                r_current_bcd_digit <= r_distance_bcd[11:8];


                r_display[10] <= 1;



            end else if (r_display_counter_uS == 1500 - 1) begin

                r_display[10] <= 0;


                r_current_bcd_digit <= {4{1'b0}};


                r_display[11] <= 1;
            

            end else if (r_display_counter_uS == 2000 - 1) begin

                r_display[11] <= 0;

            end

        end

    end



  seg8 seg8(.i_bcd_digit(r_current_bcd_digit), .o_segments(o_display[7:0]));

  assign o_display = r_display;

endmodule
module four_digit_seven_segment (
    input wire        i_clk,
    input wire        i_reset,
    input wire [11:0] i_distance_bcd,

    output wire [11:0] o_display
);


    localparam CYCLES_TILL_22000_US = 22_000;

    reg [14:0]  r_display_counter_uS;
    reg [11:0]  r_distance_bcd;
    reg [3:0]   r_current_bcd_digit;
    reg [11:0]  r_display;
    wire [11:0]  w_display;


    always @(posedge i_clk) begin

        if (i_reset) begin
            r_display_counter_uS <= {15{1'b0}};
            r_distance_bcd <= {12{1'b0}};
            r_display <= {12{1'b0}};
            r_current_bcd_digit <= {4{1'b0}};


        end else begin


            if (r_display_counter_uS == CYCLES_TILL_22000_US - 1) begin

                r_display_counter_uS <= {15{1'b0}};


                r_distance_bcd <= i_distance_bcd;


                r_current_bcd_digit <= r_distance_bcd[3:0];


                r_display[8] <= 1;




            end else begin
                r_display_counter_uS <= r_display_counter_uS + 1'b1;
            end


            if (r_display_counter_uS == 500 - 1) begin


                r_display[8] <= 0;


                r_current_bcd_digit <= r_distance_bcd[7:4];


                r_display[9] <= 1;



            end else if (r_display_counter_uS == 1000 - 1) begin

                r_display[9] <= 0;


                r_current_bcd_digit <= r_distance_bcd[11:8];


                r_display[10] <= 1;



            end else if (r_display_counter_uS == 1500 - 1) begin

                r_display[10] <= 0;


                r_current_bcd_digit <= {4{1'b0}};


                r_display[11] <= 1;
            

            end else if (r_display_counter_uS == 2000 - 1) begin

                r_display[11] <= 0;

            end

        end

    end



  seg8 seg8(.i_bcd_digit(r_current_bcd_digit), .o_segments(o_display[7:0]));

  assign o_display = r_display;

endmodule