data/full_repos/permissive/446997925/hw3/adder_32.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/446997925/hw3/adder_32.v:79: Multiple top level modules\n                                                                         : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                         : ... Top module \'adder_32_i\'\nmodule adder_32_i (out,carry_out,input1,input2,carry_in);\n       ^~~~~~~~~~\n                                                                         : ... Top module \'adder_32\'\nmodule adder_32 (out,input1,input2);\n       ^~~~~~~~\n%Error: Exiting due to 1 warning(s)\n'
module full_adder(sum, carry_out, input1, input2, carry_in);
input input1, input2, carry_in;
output sum, carry_out;
wire temp_sum, first_carry_out, second_carry_out;

half_adder first_sum(temp_sum, first_carry_out, input1, input2);
half_adder second_sum(sum, second_carry_out, temp_sum, carry_in);

or final_carry_out(carry_out, second_carry_out, first_carry_out);

endmodule
module full_adder(sum, carry_out, input1, input2, carry_in);

input input1, input2, carry_in;
output sum, carry_out;
wire temp_sum, first_carry_out, second_carry_out;

half_adder first_sum(temp_sum, first_carry_out, input1, input2);
half_adder second_sum(sum, second_carry_out, temp_sum, carry_in);

or final_carry_out(carry_out, second_carry_out, first_carry_out);

endmodule