data/full_repos/permissive/446128190/rtl/Bitlet_PE.v
1: b'%Error: data/full_repos/permissive/446128190/rtl/Bitlet_PE.v:12: Cannot find include file: Bitlet_Defs.vh\n`include "Bitlet_Defs.vh" \n         ^~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/446128190/rtl,data/full_repos/permissive/446128190/Bitlet_Defs.vh\n             data/full_repos/permissive/446128190/rtl,data/full_repos/permissive/446128190/Bitlet_Defs.vh.v\n             data/full_repos/permissive/446128190/rtl,data/full_repos/permissive/446128190/Bitlet_Defs.vh.sv\n             Bitlet_Defs.vh\n             Bitlet_Defs.vh.v\n             Bitlet_Defs.vh.sv\n             obj_dir/Bitlet_Defs.vh\n             obj_dir/Bitlet_Defs.vh.v\n             obj_dir/Bitlet_Defs.vh.sv\n%Error: data/full_repos/permissive/446128190/rtl/Bitlet_PE.v:24: Define or directive not defined: \'`Wid_quant\'\n    input   [`Wid_quant-1:0]            quant,       \n             ^~~~~~~~~~\n%Error: data/full_repos/permissive/446128190/rtl/Bitlet_PE.v:25: Define or directive not defined: \'`Max_quant\'\n    input   [`Max_quant-1:0]            prune,       \n             ^~~~~~~~~~\n%Error: data/full_repos/permissive/446128190/rtl/Bitlet_PE.v:28: Define or directive not defined: \'`Wid_exp\'\n    input   [N_total*`Wid_exp-1:0]      Wexp_vec,\n                     ^~~~~~~~\n%Error: data/full_repos/permissive/446128190/rtl/Bitlet_PE.v:29: Define or directive not defined: \'`Wid_abs\'\n    input   [N_total*`Wid_abs-1:0]      Wabs_vec,\n                     ^~~~~~~~\n%Error: data/full_repos/permissive/446128190/rtl/Bitlet_PE.v:31: Define or directive not defined: \'`Wid_bin\'\n    input   [N_input*`Wid_bin-1:0]      Abin_vec,\n                     ^~~~~~~~\n%Error: data/full_repos/permissive/446128190/rtl/Bitlet_PE.v:33: Define or directive not defined: \'`Wid_bin\'\n    output  [`Wid_bin-1:0]              res\n             ^~~~~~~~\n%Error: data/full_repos/permissive/446128190/rtl/Bitlet_PE.v:37: Define or directive not defined: \'`Wid_exs\'\nwire    [`Wid_exs-1:0]          Emax;\n         ^~~~~~~~\n%Error: data/full_repos/permissive/446128190/rtl/Bitlet_PE.v:39: Define or directive not defined: \'`Wid_fix\'\nwire    [N_total*`Wid_fix-1:0]  Afix_buff;\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/446128190/rtl/Bitlet_PE.v:40: Define or directive not defined: \'`Wid_abs\'\nwire    [N_total*`Wid_abs-1:0]  Wabs_buff;\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/446128190/rtl/Bitlet_PE.v:42: Define or directive not defined: \'`Wid_acc\'\nwire    [`Wid_acc-1:0]          Aacc;\n         ^~~~~~~~\n%Error: Exiting due to 11 error(s)\n'
module Bitlet_PE
#(
    parameter   N_total = 64,
    parameter   N_input = 16
)
(
    input                               clk,
    input                               rst_n,
    input                               isfix,
    input                               relu,
    input   [`Wid_quant-1:0]            quant,
    input   [`Max_quant-1:0]            prune,
    input                               flush,
    input   [N_total*1-1:0]             Wsig_vec,
    input   [N_total*`Wid_exp-1:0]      Wexp_vec,
    input   [N_total*`Wid_abs-1:0]      Wabs_vec,
    input                               Abin_vld,
    input   [N_input*`Wid_bin-1:0]      Abin_vec,
    output                              res_vld,
    output  [`Wid_bin-1:0]              res
);

wire                            Emax_vld;
wire    [`Wid_exs-1:0]          Emax;
wire                            Wabs_vld;
wire    [N_total*`Wid_fix-1:0]  Afix_buff;
wire    [N_total*`Wid_abs-1:0]  Wabs_buff;
wire                            Aacc_vld;
wire    [`Wid_acc-1:0]          Aacc;

Bitlet_Preprocessor #(.N_total(N_total), .N_input(N_input)) UPREPROCESSOR
(
    .clk(clk),
    .rst_n(rst_n),
    .isfix(isfix),
    .flush(flush),
    .Wsig_vec(Wsig_vec),
    .Wexp_vec(Wexp_vec),
    .Wabs_vec(Wabs_vec),
    .Abin_vld(Abin_vld),
    .Abin_vec(Abin_vec),
    .Emax_vld(Emax_vld),
    .Emax(Emax),
    .finish(Wabs_vld),
    .Afix_buff(Afix_buff),
    .Wabs_buff(Wabs_buff)
);

Bitlet_Calculator #(.N_total(N_total)) UCALCULATOR
(
    .clk(clk),
    .rst_n(rst_n),
    .prune(prune),
    .flush(flush),
    .Wabs_vld(Wabs_vld),
    .Wabs_vec(Wabs_buff),
    .Afix_vec(Afix_buff),
    .Aacc_vld(Aacc_vld),
    .Aacc(Aacc)
);

Bitlet_Postprocessor UPOSTPROCESSOR
(
    .clk(clk),
    .rst_n(rst_n),
    .isfix(isfix),
    .relu(relu),
    .quant(quant),
    .Aacc_vld(Aacc_vld),
    .Aacc(Aacc),
    .Emax_vld(Emax_vld),
    .Emax(Emax),
    .res_vld(res_vld),
    .res(res)
);

endmodule
module Bitlet_PE
#(
    parameter   N_total = 64,
    parameter   N_input = 16
)
(
    input                               clk,
    input                               rst_n,
    input                               isfix,
    input                               relu,
    input   [`Wid_quant-1:0]            quant,
    input   [`Max_quant-1:0]            prune,
    input                               flush,
    input   [N_total*1-1:0]             Wsig_vec,
    input   [N_total*`Wid_exp-1:0]      Wexp_vec,
    input   [N_total*`Wid_abs-1:0]      Wabs_vec,
    input                               Abin_vld,
    input   [N_input*`Wid_bin-1:0]      Abin_vec,
    output                              res_vld,
    output  [`Wid_bin-1:0]              res
);


wire                            Emax_vld;
wire    [`Wid_exs-1:0]          Emax;
wire                            Wabs_vld;
wire    [N_total*`Wid_fix-1:0]  Afix_buff;
wire    [N_total*`Wid_abs-1:0]  Wabs_buff;
wire                            Aacc_vld;
wire    [`Wid_acc-1:0]          Aacc;

Bitlet_Preprocessor #(.N_total(N_total), .N_input(N_input)) UPREPROCESSOR
(
    .clk(clk),
    .rst_n(rst_n),
    .isfix(isfix),
    .flush(flush),
    .Wsig_vec(Wsig_vec),
    .Wexp_vec(Wexp_vec),
    .Wabs_vec(Wabs_vec),
    .Abin_vld(Abin_vld),
    .Abin_vec(Abin_vec),
    .Emax_vld(Emax_vld),
    .Emax(Emax),
    .finish(Wabs_vld),
    .Afix_buff(Afix_buff),
    .Wabs_buff(Wabs_buff)
);

Bitlet_Calculator #(.N_total(N_total)) UCALCULATOR
(
    .clk(clk),
    .rst_n(rst_n),
    .prune(prune),
    .flush(flush),
    .Wabs_vld(Wabs_vld),
    .Wabs_vec(Wabs_buff),
    .Afix_vec(Afix_buff),
    .Aacc_vld(Aacc_vld),
    .Aacc(Aacc)
);

Bitlet_Postprocessor UPOSTPROCESSOR
(
    .clk(clk),
    .rst_n(rst_n),
    .isfix(isfix),
    .relu(relu),
    .quant(quant),
    .Aacc_vld(Aacc_vld),
    .Aacc(Aacc),
    .Emax_vld(Emax_vld),
    .Emax(Emax),
    .res_vld(res_vld),
    .res(res)
);

endmodule