data/full_repos/permissive/52653726/present_encrypt.v
1: b"%Error: data/full_repos/permissive/52653726/present_encrypt.v:62: Cannot find file containing module: 'PRESENT_ENCRYPT_SBOX'\n       PRESENT_ENCRYPT_SBOX USBOX( .odat(dat2[i+3:i]), .idat(dat1[i+3:i]) );\n       ^~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/52653726,data/full_repos/permissive/52653726/PRESENT_ENCRYPT_SBOX\n             data/full_repos/permissive/52653726,data/full_repos/permissive/52653726/PRESENT_ENCRYPT_SBOX.v\n             data/full_repos/permissive/52653726,data/full_repos/permissive/52653726/PRESENT_ENCRYPT_SBOX.sv\n             PRESENT_ENCRYPT_SBOX\n             PRESENT_ENCRYPT_SBOX.v\n             PRESENT_ENCRYPT_SBOX.sv\n             obj_dir/PRESENT_ENCRYPT_SBOX\n             obj_dir/PRESENT_ENCRYPT_SBOX.v\n             obj_dir/PRESENT_ENCRYPT_SBOX.sv\n%Error: data/full_repos/permissive/52653726/present_encrypt.v:67: Cannot find file containing module: 'PRESENT_ENCRYPT_PBOX'\nPRESENT_ENCRYPT_PBOX UPBOX    ( .odat(dat3), .idat(dat2) );\n^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/52653726/present_encrypt.v:70: Cannot find file containing module: 'PRESENT_ENCRYPT_SBOX'\nPRESENT_ENCRYPT_SBOX USBOXKEY ( .odat(kdat2[79:76]), .idat(kdat1[79:76]) );\n^~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module PRESENT_ENCRYPT (
        output [63:0] odat,
        input  [63:0] idat,
        input  [79:0] key,
        input         load,
        input         clk
    );


reg  [79:0] kreg;
reg  [63:0] dreg;
reg  [4:0]  round;
wire [63:0] dat1,dat2,dat3;
wire [79:0] kdat1,kdat2;




assign dat1 = dreg ^ kreg[79:16];
assign odat = dat1;


assign kdat1        = {kreg[18:0], kreg[79:19]};
assign kdat2[14:0 ] = kdat1[14:0 ];
assign kdat2[19:15] = kdat1[19:15] ^ round;
assign kdat2[75:20] = kdat1[75:20];





genvar i;
generate
    for (i=0; i<64; i=i+4) begin: sbox_loop
       PRESENT_ENCRYPT_SBOX USBOX( .odat(dat2[i+3:i]), .idat(dat1[i+3:i]) );
    end
endgenerate


PRESENT_ENCRYPT_PBOX UPBOX    ( .odat(dat3), .idat(dat2) );


PRESENT_ENCRYPT_SBOX USBOXKEY ( .odat(kdat2[79:76]), .idat(kdat1[79:76]) );





always @(posedge clk)
begin
   if (load)
      dreg <= idat;
   else
      dreg <= dat3;
end


always @(posedge clk)
begin
   if (load)
      kreg <= key;
   else
      kreg <= kdat2;
end


always @(posedge clk)
begin
   if (load)
      round <= 1;
   else
      round <= round + 1;
end




`ifdef PRINT_KEY_VECTORS
always @(posedge clk)
begin
   if (round==0)
      $display("KEYVECTOR=> key1=%x  key32=%x",key,kreg);
end
`endif


`ifdef PRINT_TEST_VECTORS
always @(posedge clk)
begin
   if (round==0)
      $display("TESTVECTOR=> ", $time, " plaintext=%x  key=%x  ciphertext=%x",idat,key,odat);
end
`endif


`ifdef DEBUG
always @(posedge clk)
begin
      $display("D=> ", $time, " %d  %x  %x  %x  %x  %x  %x",round,idat,dreg,dat1,dat2,dat3,odat);
      $display("K=> ", $time, " %d  %x  %x  %x",round,kreg,kdat1,kdat2);
end
`endif



endmodule
module PRESENT_ENCRYPT (
        output [63:0] odat,
        input  [63:0] idat,
        input  [79:0] key,
        input         load,
        input         clk
    );



reg  [79:0] kreg;
reg  [63:0] dreg;
reg  [4:0]  round;
wire [63:0] dat1,dat2,dat3;
wire [79:0] kdat1,kdat2;




assign dat1 = dreg ^ kreg[79:16];
assign odat = dat1;


assign kdat1        = {kreg[18:0], kreg[79:19]};
assign kdat2[14:0 ] = kdat1[14:0 ];
assign kdat2[19:15] = kdat1[19:15] ^ round;
assign kdat2[75:20] = kdat1[75:20];





genvar i;
generate
    for (i=0; i<64; i=i+4) begin: sbox_loop
       PRESENT_ENCRYPT_SBOX USBOX( .odat(dat2[i+3:i]), .idat(dat1[i+3:i]) );
    end
endgenerate


PRESENT_ENCRYPT_PBOX UPBOX    ( .odat(dat3), .idat(dat2) );


PRESENT_ENCRYPT_SBOX USBOXKEY ( .odat(kdat2[79:76]), .idat(kdat1[79:76]) );





always @(posedge clk)
begin
   if (load)
      dreg <= idat;
   else
      dreg <= dat3;
end


always @(posedge clk)
begin
   if (load)
      kreg <= key;
   else
      kreg <= kdat2;
end


always @(posedge clk)
begin
   if (load)
      round <= 1;
   else
      round <= round + 1;
end




`ifdef PRINT_KEY_VECTORS
always @(posedge clk)
begin
   if (round==0)
      $display("KEYVECTOR=> key1=%x  key32=%x",key,kreg);
end
`endif


`ifdef PRINT_TEST_VECTORS
always @(posedge clk)
begin
   if (round==0)
      $display("TESTVECTOR=> ", $time, " plaintext=%x  key=%x  ciphertext=%x",idat,key,odat);
end
`endif


`ifdef DEBUG
always @(posedge clk)
begin
      $display("D=> ", $time, " %d  %x  %x  %x  %x  %x  %x",round,idat,dreg,dat1,dat2,dat3,odat);
      $display("K=> ", $time, " %d  %x  %x  %x",round,kreg,kdat1,kdat2);
end
`endif



endmodule