data/full_repos/permissive/42434302/ivltests/pr1990029.v
1: b'%Warning-WIDTH: data/full_repos/permissive/42434302/ivltests/pr1990029.v:9: Operator ADD expects 32 bits on the RHS, but RHS\'s CONST \'16\'he020\' generates 16 bits.\n                                                                          : ... In instance top\n      $fdisplay(fp, "%d", i + 16\'he020);\n                            ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/42434302/ivltests/pr1990029.v:19: Extracting 16 bits from only 9 bit number\n                                                                   : ... In instance top\n      n = $fscanf(fp, " %d ", v[11:-4]);   \n                               ^\n%Warning-SELRANGE: data/full_repos/permissive/42434302/ivltests/pr1990029.v:19: Selection index out of range: 11:-4 outside 8:0\n                                                                              : ... In instance top\n      n = $fscanf(fp, " %d ", v[11:-4]);   \n                               ^\n%Error: Exiting due to 1 error(s), 2 warning(s)\n'
module top();
  reg pass = 1'b1;
  integer fp, i, n;
  reg [8:0]  v;

  initial begin
    fp = $fopen("work/temp.txt", "w");
    for (i = 0; i < 4; i = i + 1) begin
      $fdisplay(fp, "%d", i + 16'he020);
    end
    $fclose(fp);

    fp = $fopen("work/temp.txt", "r");
    for (i = 0; i < 4; i = i + 1) begin
      v = 9'd0;



      n = $fscanf(fp, " %d ", v[11:-4]);
      if (v != 2) begin
        $display("FAILED: iteration %d, got %b, expected 9'b000000010", i, v);
        pass = 1'b0;
      end
    end
    $fclose(fp);

    if (pass) $display("PASSED");
  end
endmodule
module top();

  reg pass = 1'b1;
  integer fp, i, n;
  reg [8:0]  v;

  initial begin
    fp = $fopen("work/temp.txt", "w");
    for (i = 0; i < 4; i = i + 1) begin
      $fdisplay(fp, "%d", i + 16'he020);
    end
    $fclose(fp);

    fp = $fopen("work/temp.txt", "r");
    for (i = 0; i < 4; i = i + 1) begin
      v = 9'd0;



      n = $fscanf(fp, " %d ", v[11:-4]);
      if (v != 2) begin
        $display("FAILED: iteration %d, got %b, expected 9'b000000010", i, v);
        pass = 1'b0;
      end
    end
    $fclose(fp);

    if (pass) $display("PASSED");
  end
endmodule