data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv
1: b'%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:5: Unsupported: classes\nclass mem_model #(int AddrWidth = bus_params_pkg::BUS_AW,\n^~~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:5: syntax error, unexpected ::, expecting \')\' or \',\'\nclass mem_model #(int AddrWidth = bus_params_pkg::BUS_AW,\n                                                ^~\n                                                                                                                                          : ... Perhaps \'bus_params_pkg\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:6: syntax error, unexpected ::, expecting \',\' or \';\'\n                  int DataWidth = bus_params_pkg::BUS_DW,\n                                                ^~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:7: syntax error, unexpected ::, expecting \',\' or \';\'\n                  int MaskWidth = bus_params_pkg::BUS_DBW) extends uvm_object;\n                                                ^~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:15: Define or directive not defined: \'`uvm_object_param_utils\'\n  `uvm_object_param_utils(mem_model#(AddrWidth, DataWidth))\n  ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:15: syntax error, unexpected \'(\'\n  `uvm_object_param_utils(mem_model#(AddrWidth, DataWidth))\n                          ^~~~~~~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:15: Unsupported: Parameter classes\n  `uvm_object_param_utils(mem_model#(AddrWidth, DataWidth))\n                                     ^~~~~~~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:15: syntax error, unexpected \')\', expecting IDENTIFIER or \'=\' or do or final\n  `uvm_object_param_utils(mem_model#(AddrWidth, DataWidth))\n                                                          ^\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:17: Define or directive not defined: \'`uvm_object_new\'\n  `uvm_object_new\n  ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:27: Define or directive not defined: \'`uvm_info\'\n      `uvm_info(`gfn, $sformatf("Read Mem  : Addr[0x%0h], Data[0x%0h]", addr, data), UVM_HIGH)\n      ^~~~~~~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:27: Define or directive not defined: \'`gfn\'\n      `uvm_info(`gfn, $sformatf("Read Mem  : Addr[0x%0h], Data[0x%0h]", addr, data), UVM_HIGH)\n                ^~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:27: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n      `uvm_info(`gfn, $sformatf("Read Mem  : Addr[0x%0h], Data[0x%0h]", addr, data), UVM_HIGH)\n                    ^\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:29: Define or directive not defined: \'`DV_CHECK_STD_RANDOMIZE_FATAL\'\n      `DV_CHECK_STD_RANDOMIZE_FATAL(data)\n      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:30: Define or directive not defined: \'`uvm_error\'\n                                                                                                                                           : ... Suggested alternative: \'`error\'\n      `uvm_error(`gfn, $sformatf("read to uninitialzed addr 0x%0h", addr))\n      ^~~~~~~~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:30: Define or directive not defined: \'`gfn\'\n      `uvm_error(`gfn, $sformatf("read to uninitialzed addr 0x%0h", addr))\n                 ^~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:36: Define or directive not defined: \'`uvm_info\'\n   `uvm_info(`gfn, $sformatf("Write Mem : Addr[0x%0h], Data[0x%0h]", addr, data), UVM_HIGH)\n   ^~~~~~~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:36: Define or directive not defined: \'`gfn\'\n   `uvm_info(`gfn, $sformatf("Write Mem : Addr[0x%0h], Data[0x%0h]", addr, data), UVM_HIGH)\n             ^~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:41: Define or directive not defined: \'`uvm_info\'\n   `uvm_info(`gfn, $sformatf("Compare Mem : Addr[0x%0h], Act Data[0x%0h], Exp Data[0x%0h]",\n   ^~~~~~~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:41: Define or directive not defined: \'`gfn\'\n   `uvm_info(`gfn, $sformatf("Compare Mem : Addr[0x%0h], Act Data[0x%0h], Exp Data[0x%0h]",\n             ^~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:44: Define or directive not defined: \'`DV_CHECK_EQ\'\n    `DV_CHECK_EQ(act_data, system_memory[addr], $sformatf("addr 0x%0h read out mismatch", addr))\n    ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:44: syntax error, unexpected \',\'\n    `DV_CHECK_EQ(act_data, system_memory[addr], $sformatf("addr 0x%0h read out mismatch", addr))\n                         ^\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:48: syntax error, unexpected IDENTIFIER, expecting "\'{"\n    bit [7:0] byte_data;\n              ^~~~~~~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:57: syntax error, unexpected endfunction\n  endfunction\n  ^~~~~~~~~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:68: syntax error, unexpected endfunction\n  endfunction\n  ^~~~~~~~~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:71: syntax error, unexpected IDENTIFIER, expecting "\'{"\n    bit [7:0] byte_data;\n              ^~~~~~~~~\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv:83: syntax error, unexpected endfunction\n  endfunction\n  ^~~~~~~~~~~\n%Error: Cannot continue\n        ... See the manual and https://verilator.org for more assistance.\n'
function void write(input mem_addr_t addr, mem_data_t data, mem_mask_t mask = '1);
    bit [7:0] byte_data;
    for (int i = 0; i < DataWidth / 8; i++) begin
      if (mask[0]) begin
        byte_data = data[7:0];
        write_byte(addr + i, byte_data);
      end
      data = data >> 8;
      mask = mask >> 1;
    end
  endfunction
function void write(input mem_addr_t addr, mem_data_t data, mem_mask_t mask = '1);

    bit [7:0] byte_data;
    for (int i = 0; i < DataWidth / 8; i++) begin
      if (mask[0]) begin
        byte_data = data[7:0];
        write_byte(addr + i, byte_data);
      end
      data = data >> 8;
      mask = mask >> 1;
    end
  endfunction