data/full_repos/permissive/446997925/hw4/alu_control_testbench.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/446997925/hw4/alu_control_testbench.v:26: Unsupported: Ignoring delay on this delayed statement.\n#20;\n^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/446997925/hw4/alu_control_testbench.v:30: Unsupported: Ignoring delay on this delayed statement.\n#20;\n^\n%Warning-STMTDLY: data/full_repos/permissive/446997925/hw4/alu_control_testbench.v:34: Unsupported: Ignoring delay on this delayed statement.\n#20;\n^\n%Warning-STMTDLY: data/full_repos/permissive/446997925/hw4/alu_control_testbench.v:38: Unsupported: Ignoring delay on this delayed statement.\n#20;\n^\n%Warning-STMTDLY: data/full_repos/permissive/446997925/hw4/alu_control_testbench.v:42: Unsupported: Ignoring delay on this delayed statement.\n#20;\n^\n%Warning-STMTDLY: data/full_repos/permissive/446997925/hw4/alu_control_testbench.v:46: Unsupported: Ignoring delay on this delayed statement.\n#20;\n^\n%Warning-STMTDLY: data/full_repos/permissive/446997925/hw4/alu_control_testbench.v:50: Unsupported: Ignoring delay on this delayed statement.\n#20;\n^\n%Warning-STMTDLY: data/full_repos/permissive/446997925/hw4/alu_control_testbench.v:54: Unsupported: Ignoring delay on this delayed statement.\n#20;\n^\n%Warning-STMTDLY: data/full_repos/permissive/446997925/hw4/alu_control_testbench.v:58: Unsupported: Ignoring delay on this delayed statement.\n#20;\n^\n%Warning-STMTDLY: data/full_repos/permissive/446997925/hw4/alu_control_testbench.v:62: Unsupported: Ignoring delay on this delayed statement.\n#20;\n^\n%Warning-STMTDLY: data/full_repos/permissive/446997925/hw4/alu_control_testbench.v:66: Unsupported: Ignoring delay on this delayed statement.\n#20;\n^\n%Warning-STMTDLY: data/full_repos/permissive/446997925/hw4/alu_control_testbench.v:70: Unsupported: Ignoring delay on this delayed statement.\n#20;\n^\n%Error: data/full_repos/permissive/446997925/hw4/alu_control_testbench.v:75: Unsupported or unknown PLI call: $monitor\n$monitor("time = %d, o=%3b, f=%3b, out=%3b,", $time, o, f, alu_ctr);\n^~~~~~~~\n%Error: Exiting due to 1 error(s), 12 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module alu_ctr_testbench();

reg [2:0] o;
reg [2:0] f;
wire [2:0] alu_ctr;

alu_control test(alu_ctr, f, o);













initial begin

f = 3'b000;
o = 3'b000;
#`DELAY;

f = 3'b001;
o = 3'b000;
#`DELAY;

f = 3'b010;
o = 3'b000;
#`DELAY;

f = 3'b011;
o = 3'b000;
#`DELAY;

f = 3'b100;
o = 3'b000;
#`DELAY;

f = 3'b101;
o = 3'b000;
#`DELAY;

f = 3'b000;
o= 3'b001;
#`DELAY;

f = 3'b000;
o = 3'b010;
#`DELAY;

f = 3'b000;
o = 3'b011;
#`DELAY;

f = 3'b000;
o = 3'b100;
#`DELAY;

f = 3'b000;
o = 3'b101;
#`DELAY;

f = 3'b000;
o = 3'b110;
#`DELAY;
end

initial
begin
$monitor("time = %d, o=%3b, f=%3b, out=%3b,", $time, o, f, alu_ctr);
end

endmodule
module alu_ctr_testbench();


reg [2:0] o;
reg [2:0] f;
wire [2:0] alu_ctr;

alu_control test(alu_ctr, f, o);













initial begin

f = 3'b000;
o = 3'b000;
#`DELAY;

f = 3'b001;
o = 3'b000;
#`DELAY;

f = 3'b010;
o = 3'b000;
#`DELAY;

f = 3'b011;
o = 3'b000;
#`DELAY;

f = 3'b100;
o = 3'b000;
#`DELAY;

f = 3'b101;
o = 3'b000;
#`DELAY;

f = 3'b000;
o= 3'b001;
#`DELAY;

f = 3'b000;
o = 3'b010;
#`DELAY;

f = 3'b000;
o = 3'b011;
#`DELAY;

f = 3'b000;
o = 3'b100;
#`DELAY;

f = 3'b000;
o = 3'b101;
#`DELAY;

f = 3'b000;
o = 3'b110;
#`DELAY;
end

initial
begin
$monitor("time = %d, o=%3b, f=%3b, out=%3b,", $time, o, f, alu_ctr);
end

endmodule