data/full_repos/permissive/423006272/verilog/dv/io_ports/pdk/sky130A/libs.ref/sky130_fd_sc_hd/verilog/sky130_ef_sc_hd__fill_8.v
data/verilator_xmls/7a0d22a3-3228-4cb4-b8b9-31bc10a62d21.xml
module sky130_ef_sc_hd__fill_8 (
    VPWR,
    VGND,
    VPB ,
    VNB
);

    input VPWR;
    input VGND;
    input VPB ;
    input VNB ;

endmodule
module sky130_ef_sc_hd__fill_8 (
    VPWR,
    VGND,
    VPB ,
    VNB
);


    input VPWR;
    input VGND;
    input VPB ;
    input VNB ;

endmodule