data/full_repos/permissive/502764644/mpeg_audio_video/tb_MPEG_Audio_Video.v
1: b'%Error: data/full_repos/permissive/502764644/mpeg_audio_video/tb_MPEG_Audio_Video.v:17: Cannot find include file: defines.v\n`include "defines.v" \n         ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/502764644/mpeg_audio_video,data/full_repos/permissive/502764644/defines.v\n             data/full_repos/permissive/502764644/mpeg_audio_video,data/full_repos/permissive/502764644/defines.v.v\n             data/full_repos/permissive/502764644/mpeg_audio_video,data/full_repos/permissive/502764644/defines.v.sv\n             defines.v\n             defines.v.v\n             defines.v.sv\n             obj_dir/defines.v\n             obj_dir/defines.v.v\n             obj_dir/defines.v.sv\n%Warning-STMTDLY: data/full_repos/permissive/502764644/mpeg_audio_video/tb_MPEG_Audio_Video.v:94: Unsupported: Ignoring delay on this delayed statement.\nalways begin #41.67 AC97_BIT_CLOCK_I = ~AC97_BIT_CLOCK_I; end\n             ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 error(s), 1 warning(s)\n'
module tb_MPEG_Audio_Video();


wire	 			MEMORY_BANK0_CLK_P,		MEMORY_BANK1_CLK_P,		MEMORY_BANK2_CLK_P,		MEMORY_BANK3_CLK_P,		MEMORY_BANK4_CLK_P;
wire	 			MEMORY_BANK0_CLKEN_N,	MEMORY_BANK1_CLKEN_N,	MEMORY_BANK2_CLKEN_N,	MEMORY_BANK3_CLKEN_N,	MEMORY_BANK4_CLKEN_N;
wire	 			MEMORY_BANK0_WEN_N,		MEMORY_BANK1_WEN_N,		MEMORY_BANK2_WEN_N,		MEMORY_BANK3_WEN_N,		MEMORY_BANK4_WEN_N;
wire	 			MEMORY_BANK0_WENA_N,		MEMORY_BANK1_WENA_N,		MEMORY_BANK2_WENA_N,		MEMORY_BANK3_WENA_N,		MEMORY_BANK4_WENA_N;
wire	 			MEMORY_BANK0_WENB_N,		MEMORY_BANK1_WENB_N,		MEMORY_BANK2_WENB_N,		MEMORY_BANK3_WENB_N,		MEMORY_BANK4_WENB_N;
wire	 			MEMORY_BANK0_WENC_N,		MEMORY_BANK1_WENC_N,		MEMORY_BANK2_WENC_N,		MEMORY_BANK3_WENC_N,		MEMORY_BANK4_WENC_N;
wire	 			MEMORY_BANK0_WEND_N,		MEMORY_BANK1_WEND_N,		MEMORY_BANK2_WEND_N,		MEMORY_BANK3_WEND_N,		MEMORY_BANK4_WEND_N;
wire	 			MEMORY_BANK0_ADV_LD_N,	MEMORY_BANK1_ADV_LD_N,	MEMORY_BANK2_ADV_LD_N,	MEMORY_BANK3_ADV_LD_N,	MEMORY_BANK4_ADV_LD_N;
wire	 			MEMORY_BANK0_OEN_N,		MEMORY_BANK1_OEN_N,		MEMORY_BANK2_OEN_N,		MEMORY_BANK3_OEN_N,		MEMORY_BANK4_OEN_N;
wire	 			MEMORY_BANK0_CEN_N,		MEMORY_BANK1_CEN_N,		MEMORY_BANK2_CEN_N,		MEMORY_BANK3_CEN_N,		MEMORY_BANK4_CEN_N;
wire	 [18:0]	MEMORY_BANK0_ADDR_P,		MEMORY_BANK1_ADDR_P,		MEMORY_BANK2_ADDR_P,		MEMORY_BANK3_ADDR_P,		MEMORY_BANK4_ADDR_P;
wire   [7:0] 	MEMORY_BANK0_DATA_A_P,	MEMORY_BANK1_DATA_A_P,	MEMORY_BANK2_DATA_A_P,	MEMORY_BANK3_DATA_A_P,	MEMORY_BANK4_DATA_A_P;
wire   [7:0] 	MEMORY_BANK0_DATA_B_P,	MEMORY_BANK1_DATA_B_P,	MEMORY_BANK2_DATA_B_P,	MEMORY_BANK3_DATA_B_P,	MEMORY_BANK4_DATA_B_P;
wire   [7:0] 	MEMORY_BANK0_DATA_C_P,	MEMORY_BANK1_DATA_C_P,	MEMORY_BANK2_DATA_C_P,	MEMORY_BANK3_DATA_C_P,	MEMORY_BANK4_DATA_C_P;
wire   [7:0] 	MEMORY_BANK0_DATA_D_P,	MEMORY_BANK1_DATA_D_P,	MEMORY_BANK2_DATA_D_P,	MEMORY_BANK3_DATA_D_P,	MEMORY_BANK4_DATA_D_P;
	

wire 				VGA_OUT_PIXEL_CLOCK_P;
wire 				VGA_COMP_SYNCH_N;
wire 				VGA_OUT_BLANK_N;
wire 				VGA_HSYNCH_N;
wire 				VGA_VSYNCH_N;
wire 	[7:0]		VGA_OUT_RED_P;
wire 	[7:0]		VGA_OUT_GREEN_P;
wire 	[7:0]		VGA_OUT_BLUE_P;


wire 				MASTER_CLOCK_P;
wire 				ALTERNATE_CLOCK_P;
wire 				MEM_CLK_FBIN_P;
wire 				MEM_CLK_FBOUT_P;
wire 				EXTEND_DCM_RESET_P;


wire 	[3:0]		TX_DATA_P;
wire 	     		TX_ENABLE_P;
wire 	     		TX_CLOCK_P;
wire 	     		TX_ERROR_P;
wire 	[1:0]		ENET_SLEW_P;
wire 	[3:0]		RX_DATA_P;
wire 	     		RX_DATA_VALID_P;
wire 	     		RX_ERROR_P;
wire 	     		RX_CLOCK_P;
wire 	     		COLLISION_DETECTED_P;
wire 	     		CARRIER_SENSE_P;
wire 	     		PAUSE_P;
wire 	     		MDIO_P;
wire 	     		MDC_P;
wire 	     		MDINIT_N;
wire 	     		SSN_DATA_P;


reg 				AC97_BIT_CLOCK_I;
wire 				AC97_SYNCH_O;
wire 				AC97_DATA_IN_I;
wire 				AC97_DATA_OUT_O;
wire 				AC97_BEEP_TONE_O;
wire 				STARTUP_O;


wire 				PAL_NTSC_N;
wire 				S_VIDEO_N;
wire 				USER_INPUT0_P;
wire 				USER_INPUT1_P;
wire 				USER_LED0_N;
wire 				USER_LED1_N;

assign PAL_NTSC_N = 1'b1;
assign S_VIDEO_N = 1'b1;
assign USER_INPUT1_P = 1'b1;
assign USER_INPUT0_P = 1'b1;

initial begin AC97_BIT_CLOCK_I = 1'b0; end
always begin #41.67 AC97_BIT_CLOCK_I = ~AC97_BIT_CLOCK_I; end


always @(posedge MPEG_decoder.Audio_Decoder.Header_done) begin
	if (MPEG_decoder.resetn) $write("Audio Header Decoded, sample freq %d, format_check %b, Table %d\n", 
		MPEG_decoder.Audio_Decoder.Decode_Header_unit.Sample_Freq_O,
		MPEG_decoder.Audio_Decoder.Decode_Header_unit.Format_Check_O,
		MPEG_decoder.Audio_Decoder.Decode_Header_unit.Table_O);
end


integer picture_counter; initial begin picture_counter = 0; end
always @(MPEG_decoder.Sequence_Decoder.Picture_Decoder.frame_counter)
	$write("-------------------- Frame Counter %d --------------------\n", 
		MPEG_decoder.Sequence_Decoder.Picture_Decoder.frame_counter);

reg prev_shift; reg mismatch_counter;
always @(posedge MPEG_decoder.internal_ZBT_clock) begin
	prev_shift <= MPEG_decoder.Decoder_Shift_1 | MPEG_decoder.Decoder_Shift_8;
	if (prev_shift & (MPEG_decoder.Decoder_Bitstream_Data[31:8] == 24'h000001)) begin
		if ((MPEG_decoder.Decoder_Bitstream_Data[7:0] >= 8'h01) & (MPEG_decoder.Decoder_Bitstream_Data[7:0] <= 8'hAF)) begin
			$write("      Slice Start Code %x detected at time %t - %d mismatches\n", 
				MPEG_decoder.Decoder_Bitstream_Data[7:0], $realtime, mismatch_counter);
		end else if ((MPEG_decoder.Decoder_Bitstream_Data[7:0] >= 8'hB9) & (MPEG_decoder.Decoder_Bitstream_Data[7:0] <= 8'hFF))
			$write("System Start Code %x detected at time %t\n", 
				MPEG_decoder.Decoder_Bitstream_Data[7:0], $realtime);
		else case(MPEG_decoder.Decoder_Bitstream_Data[7:0])

			8'h00 : begin
				$write("      Picture Start Code %d detected at time %t\n", picture_counter, $realtime);
				picture_counter = picture_counter + 1;
			end				
			8'hB2 : $write("   User Data Start Code detected at time %t\n", $realtime);
			8'hB3 : $write("Sequence Header Code detected at time %t\n", $realtime);
			8'hB4 : $write("Sequence Error Code detected at time %t\n", $realtime);
			8'hB5 : $write("   Extension Start Code detected at time %t\n", $realtime);
			8'hB7 : $write("Sequence End Code detected at time %t\n", $realtime);
			8'hB8 : $write("   Group Start Code detected at time %t\n", $realtime);

			8'hB9 : $write("ISO End Code detected at time %t\n", $realtime);
			8'hBA : $write("Pack Start Code detected at time %t\n", $realtime);
			8'hBB : $write("System Start Code detected at time %t\n", $realtime);
			8'hE0 : $write("Video Elementary Stream Code detected at time %t\n", $realtime);
			8'hC0 : $write("Audio Elementary Stream Code detected at time %t\n", $realtime);

			default : $write("Unrecognized Start Code %x detected at time %t\n", MPEG_decoder.Decoder_Bitstream_Data[7:0], $realtime);
		endcase
	end
end

MPEG_Audio_Video MPEG_decoder(
	MEMORY_BANK0_CLK_P,		MEMORY_BANK1_CLK_P,		MEMORY_BANK2_CLK_P,		MEMORY_BANK3_CLK_P,   	MEMORY_BANK4_CLK_P,   
	MEMORY_BANK0_CLKEN_N,	MEMORY_BANK1_CLKEN_N,	MEMORY_BANK2_CLKEN_N,   MEMORY_BANK3_CLKEN_N,   MEMORY_BANK4_CLKEN_N, 
	MEMORY_BANK0_WEN_N,		MEMORY_BANK1_WEN_N,		MEMORY_BANK2_WEN_N,     MEMORY_BANK3_WEN_N,     MEMORY_BANK4_WEN_N,   
	MEMORY_BANK0_WENA_N,		MEMORY_BANK1_WENA_N,		MEMORY_BANK2_WENA_N,    MEMORY_BANK3_WENA_N,    MEMORY_BANK4_WENA_N,  
	MEMORY_BANK0_WENB_N,		MEMORY_BANK1_WENB_N,		MEMORY_BANK2_WENB_N,    MEMORY_BANK3_WENB_N,    MEMORY_BANK4_WENB_N,  
	MEMORY_BANK0_WENC_N,		MEMORY_BANK1_WENC_N,		MEMORY_BANK2_WENC_N,    MEMORY_BANK3_WENC_N,    MEMORY_BANK4_WENC_N,  
	MEMORY_BANK0_WEND_N,		MEMORY_BANK1_WEND_N,		MEMORY_BANK2_WEND_N,    MEMORY_BANK3_WEND_N,    MEMORY_BANK4_WEND_N,  
	MEMORY_BANK0_ADV_LD_N,	MEMORY_BANK1_ADV_LD_N,	MEMORY_BANK2_ADV_LD_N,  MEMORY_BANK3_ADV_LD_N,  MEMORY_BANK4_ADV_LD_N,
	MEMORY_BANK0_OEN_N,		MEMORY_BANK1_OEN_N,		MEMORY_BANK2_OEN_N,     MEMORY_BANK3_OEN_N,     MEMORY_BANK4_OEN_N,   
	MEMORY_BANK0_CEN_N,		MEMORY_BANK1_CEN_N,		MEMORY_BANK2_CEN_N,     MEMORY_BANK3_CEN_N,     MEMORY_BANK4_CEN_N,   
	MEMORY_BANK0_ADDR_P,		MEMORY_BANK1_ADDR_P,		MEMORY_BANK2_ADDR_P,    MEMORY_BANK3_ADDR_P,    MEMORY_BANK4_ADDR_P,  
	MEMORY_BANK0_DATA_A_P,	MEMORY_BANK1_DATA_A_P,	MEMORY_BANK2_DATA_A_P,  MEMORY_BANK3_DATA_A_P,  MEMORY_BANK4_DATA_A_P,
	MEMORY_BANK0_DATA_B_P,	MEMORY_BANK1_DATA_B_P,	MEMORY_BANK2_DATA_B_P,  MEMORY_BANK3_DATA_B_P,  MEMORY_BANK4_DATA_B_P,
	MEMORY_BANK0_DATA_C_P,	MEMORY_BANK1_DATA_C_P,	MEMORY_BANK2_DATA_C_P,  MEMORY_BANK3_DATA_C_P,  MEMORY_BANK4_DATA_C_P,
	MEMORY_BANK0_DATA_D_P,	MEMORY_BANK1_DATA_D_P,	MEMORY_BANK2_DATA_D_P,  MEMORY_BANK3_DATA_D_P,  MEMORY_BANK4_DATA_D_P,

	VGA_OUT_PIXEL_CLOCK_P,
	VGA_COMP_SYNCH_N,
	VGA_OUT_BLANK_N,
	VGA_HSYNCH_N,
	VGA_VSYNCH_N,
	VGA_OUT_RED_P,
	VGA_OUT_GREEN_P,
	VGA_OUT_BLUE_P,

	MASTER_CLOCK_P,
	ALTERNATE_CLOCK_P,
	MEM_CLK_FBIN_P,
	MEM_CLK_FBOUT_P,
	EXTEND_DCM_RESET_P,

   TX_DATA_P,
   TX_ENABLE_P,
   TX_CLOCK_P,
   TX_ERROR_P,
   ENET_SLEW_P,
   RX_DATA_P,
   RX_DATA_VALID_P,
   RX_ERROR_P,
   RX_CLOCK_P,
   COLLISION_DETECTED_P,
   CARRIER_SENSE_P,
   PAUSE_P,
   MDIO_P,
   MDC_P,
   MDINIT_N,
   SSN_DATA_P,

	AC97_BIT_CLOCK_I,
	AC97_SYNCH_O,
	AC97_DATA_IN_I,
	AC97_DATA_OUT_O,
	AC97_BEEP_TONE_O,
	STARTUP_O,

	PAL_NTSC_N,
	S_VIDEO_N,
	USER_INPUT0_P,
	USER_INPUT1_P,
	USER_LED0_N,
	USER_LED1_N
);

ZBT_bank ZBT_BANK_0(
	MEMORY_BANK0_CLK_P,
	MEMORY_BANK0_CLKEN_N,
	MEMORY_BANK0_WEN_N,
	MEMORY_BANK0_WENA_N,
	MEMORY_BANK0_WENB_N,
	MEMORY_BANK0_WENC_N,
	MEMORY_BANK0_WEND_N,
	MEMORY_BANK0_ADV_LD_N,
	MEMORY_BANK0_OEN_N,
	MEMORY_BANK0_CEN_N,
	MEMORY_BANK0_ADDR_P,
	MEMORY_BANK0_DATA_A_P,
	MEMORY_BANK0_DATA_B_P,
	MEMORY_BANK0_DATA_C_P,
	MEMORY_BANK0_DATA_D_P
);

ZBT_bank ZBT_BANK_1(
	MEMORY_BANK1_CLK_P,
	MEMORY_BANK1_CLKEN_N,
	MEMORY_BANK1_WEN_N,
	MEMORY_BANK1_WENA_N,
	MEMORY_BANK1_WENB_N,
	MEMORY_BANK1_WENC_N,
	MEMORY_BANK1_WEND_N,
	MEMORY_BANK1_ADV_LD_N,
	MEMORY_BANK1_OEN_N,
	MEMORY_BANK1_CEN_N,
	MEMORY_BANK1_ADDR_P,
	MEMORY_BANK1_DATA_A_P,
	MEMORY_BANK1_DATA_B_P,
	MEMORY_BANK1_DATA_C_P,
	MEMORY_BANK1_DATA_D_P
);

ZBT_bank ZBT_BANK_2(
	MEMORY_BANK2_CLK_P,
	MEMORY_BANK2_CLKEN_N,
	MEMORY_BANK2_WEN_N,
	MEMORY_BANK2_WENA_N,
	MEMORY_BANK2_WENB_N,
	MEMORY_BANK2_WENC_N,
	MEMORY_BANK2_WEND_N,
	MEMORY_BANK2_ADV_LD_N,
	MEMORY_BANK2_OEN_N,
	MEMORY_BANK2_CEN_N,
	MEMORY_BANK2_ADDR_P,
	MEMORY_BANK2_DATA_A_P,
	MEMORY_BANK2_DATA_B_P,
	MEMORY_BANK2_DATA_C_P,
	MEMORY_BANK2_DATA_D_P
);

ZBT_bank ZBT_BANK_3(
	MEMORY_BANK3_CLK_P,
	MEMORY_BANK3_CLKEN_N,
	MEMORY_BANK3_WEN_N,
	MEMORY_BANK3_WENA_N,
	MEMORY_BANK3_WENB_N,
	MEMORY_BANK3_WENC_N,
	MEMORY_BANK3_WEND_N,
	MEMORY_BANK3_ADV_LD_N,
	MEMORY_BANK3_OEN_N,
	MEMORY_BANK3_CEN_N,
	MEMORY_BANK3_ADDR_P,
	MEMORY_BANK3_DATA_A_P,
	MEMORY_BANK3_DATA_B_P,
	MEMORY_BANK3_DATA_C_P,
	MEMORY_BANK3_DATA_D_P
);

ZBT_bank ZBT_BANK_4(
	MEMORY_BANK4_CLK_P,
	MEMORY_BANK4_CLKEN_N,
	MEMORY_BANK4_WEN_N,
	MEMORY_BANK4_WENA_N,
	MEMORY_BANK4_WENB_N,
	MEMORY_BANK4_WENC_N,
	MEMORY_BANK4_WEND_N,
	MEMORY_BANK4_ADV_LD_N,
	MEMORY_BANK4_OEN_N,
	MEMORY_BANK4_CEN_N,
	MEMORY_BANK4_ADDR_P,
	MEMORY_BANK4_DATA_A_P,
	MEMORY_BANK4_DATA_B_P,
	MEMORY_BANK4_DATA_C_P,
	MEMORY_BANK4_DATA_D_P
);

endmodule
module tb_MPEG_Audio_Video();



wire	 			MEMORY_BANK0_CLK_P,		MEMORY_BANK1_CLK_P,		MEMORY_BANK2_CLK_P,		MEMORY_BANK3_CLK_P,		MEMORY_BANK4_CLK_P;
wire	 			MEMORY_BANK0_CLKEN_N,	MEMORY_BANK1_CLKEN_N,	MEMORY_BANK2_CLKEN_N,	MEMORY_BANK3_CLKEN_N,	MEMORY_BANK4_CLKEN_N;
wire	 			MEMORY_BANK0_WEN_N,		MEMORY_BANK1_WEN_N,		MEMORY_BANK2_WEN_N,		MEMORY_BANK3_WEN_N,		MEMORY_BANK4_WEN_N;
wire	 			MEMORY_BANK0_WENA_N,		MEMORY_BANK1_WENA_N,		MEMORY_BANK2_WENA_N,		MEMORY_BANK3_WENA_N,		MEMORY_BANK4_WENA_N;
wire	 			MEMORY_BANK0_WENB_N,		MEMORY_BANK1_WENB_N,		MEMORY_BANK2_WENB_N,		MEMORY_BANK3_WENB_N,		MEMORY_BANK4_WENB_N;
wire	 			MEMORY_BANK0_WENC_N,		MEMORY_BANK1_WENC_N,		MEMORY_BANK2_WENC_N,		MEMORY_BANK3_WENC_N,		MEMORY_BANK4_WENC_N;
wire	 			MEMORY_BANK0_WEND_N,		MEMORY_BANK1_WEND_N,		MEMORY_BANK2_WEND_N,		MEMORY_BANK3_WEND_N,		MEMORY_BANK4_WEND_N;
wire	 			MEMORY_BANK0_ADV_LD_N,	MEMORY_BANK1_ADV_LD_N,	MEMORY_BANK2_ADV_LD_N,	MEMORY_BANK3_ADV_LD_N,	MEMORY_BANK4_ADV_LD_N;
wire	 			MEMORY_BANK0_OEN_N,		MEMORY_BANK1_OEN_N,		MEMORY_BANK2_OEN_N,		MEMORY_BANK3_OEN_N,		MEMORY_BANK4_OEN_N;
wire	 			MEMORY_BANK0_CEN_N,		MEMORY_BANK1_CEN_N,		MEMORY_BANK2_CEN_N,		MEMORY_BANK3_CEN_N,		MEMORY_BANK4_CEN_N;
wire	 [18:0]	MEMORY_BANK0_ADDR_P,		MEMORY_BANK1_ADDR_P,		MEMORY_BANK2_ADDR_P,		MEMORY_BANK3_ADDR_P,		MEMORY_BANK4_ADDR_P;
wire   [7:0] 	MEMORY_BANK0_DATA_A_P,	MEMORY_BANK1_DATA_A_P,	MEMORY_BANK2_DATA_A_P,	MEMORY_BANK3_DATA_A_P,	MEMORY_BANK4_DATA_A_P;
wire   [7:0] 	MEMORY_BANK0_DATA_B_P,	MEMORY_BANK1_DATA_B_P,	MEMORY_BANK2_DATA_B_P,	MEMORY_BANK3_DATA_B_P,	MEMORY_BANK4_DATA_B_P;
wire   [7:0] 	MEMORY_BANK0_DATA_C_P,	MEMORY_BANK1_DATA_C_P,	MEMORY_BANK2_DATA_C_P,	MEMORY_BANK3_DATA_C_P,	MEMORY_BANK4_DATA_C_P;
wire   [7:0] 	MEMORY_BANK0_DATA_D_P,	MEMORY_BANK1_DATA_D_P,	MEMORY_BANK2_DATA_D_P,	MEMORY_BANK3_DATA_D_P,	MEMORY_BANK4_DATA_D_P;
	

wire 				VGA_OUT_PIXEL_CLOCK_P;
wire 				VGA_COMP_SYNCH_N;
wire 				VGA_OUT_BLANK_N;
wire 				VGA_HSYNCH_N;
wire 				VGA_VSYNCH_N;
wire 	[7:0]		VGA_OUT_RED_P;
wire 	[7:0]		VGA_OUT_GREEN_P;
wire 	[7:0]		VGA_OUT_BLUE_P;


wire 				MASTER_CLOCK_P;
wire 				ALTERNATE_CLOCK_P;
wire 				MEM_CLK_FBIN_P;
wire 				MEM_CLK_FBOUT_P;
wire 				EXTEND_DCM_RESET_P;


wire 	[3:0]		TX_DATA_P;
wire 	     		TX_ENABLE_P;
wire 	     		TX_CLOCK_P;
wire 	     		TX_ERROR_P;
wire 	[1:0]		ENET_SLEW_P;
wire 	[3:0]		RX_DATA_P;
wire 	     		RX_DATA_VALID_P;
wire 	     		RX_ERROR_P;
wire 	     		RX_CLOCK_P;
wire 	     		COLLISION_DETECTED_P;
wire 	     		CARRIER_SENSE_P;
wire 	     		PAUSE_P;
wire 	     		MDIO_P;
wire 	     		MDC_P;
wire 	     		MDINIT_N;
wire 	     		SSN_DATA_P;


reg 				AC97_BIT_CLOCK_I;
wire 				AC97_SYNCH_O;
wire 				AC97_DATA_IN_I;
wire 				AC97_DATA_OUT_O;
wire 				AC97_BEEP_TONE_O;
wire 				STARTUP_O;


wire 				PAL_NTSC_N;
wire 				S_VIDEO_N;
wire 				USER_INPUT0_P;
wire 				USER_INPUT1_P;
wire 				USER_LED0_N;
wire 				USER_LED1_N;

assign PAL_NTSC_N = 1'b1;
assign S_VIDEO_N = 1'b1;
assign USER_INPUT1_P = 1'b1;
assign USER_INPUT0_P = 1'b1;

initial begin AC97_BIT_CLOCK_I = 1'b0; end
always begin #41.67 AC97_BIT_CLOCK_I = ~AC97_BIT_CLOCK_I; end


always @(posedge MPEG_decoder.Audio_Decoder.Header_done) begin
	if (MPEG_decoder.resetn) $write("Audio Header Decoded, sample freq %d, format_check %b, Table %d\n", 
		MPEG_decoder.Audio_Decoder.Decode_Header_unit.Sample_Freq_O,
		MPEG_decoder.Audio_Decoder.Decode_Header_unit.Format_Check_O,
		MPEG_decoder.Audio_Decoder.Decode_Header_unit.Table_O);
end


integer picture_counter; initial begin picture_counter = 0; end
always @(MPEG_decoder.Sequence_Decoder.Picture_Decoder.frame_counter)
	$write("-------------------- Frame Counter %d --------------------\n", 
		MPEG_decoder.Sequence_Decoder.Picture_Decoder.frame_counter);

reg prev_shift; reg mismatch_counter;
always @(posedge MPEG_decoder.internal_ZBT_clock) begin
	prev_shift <= MPEG_decoder.Decoder_Shift_1 | MPEG_decoder.Decoder_Shift_8;
	if (prev_shift & (MPEG_decoder.Decoder_Bitstream_Data[31:8] == 24'h000001)) begin
		if ((MPEG_decoder.Decoder_Bitstream_Data[7:0] >= 8'h01) & (MPEG_decoder.Decoder_Bitstream_Data[7:0] <= 8'hAF)) begin
			$write("      Slice Start Code %x detected at time %t - %d mismatches\n", 
				MPEG_decoder.Decoder_Bitstream_Data[7:0], $realtime, mismatch_counter);
		end else if ((MPEG_decoder.Decoder_Bitstream_Data[7:0] >= 8'hB9) & (MPEG_decoder.Decoder_Bitstream_Data[7:0] <= 8'hFF))
			$write("System Start Code %x detected at time %t\n", 
				MPEG_decoder.Decoder_Bitstream_Data[7:0], $realtime);
		else case(MPEG_decoder.Decoder_Bitstream_Data[7:0])

			8'h00 : begin
				$write("      Picture Start Code %d detected at time %t\n", picture_counter, $realtime);
				picture_counter = picture_counter + 1;
			end				
			8'hB2 : $write("   User Data Start Code detected at time %t\n", $realtime);
			8'hB3 : $write("Sequence Header Code detected at time %t\n", $realtime);
			8'hB4 : $write("Sequence Error Code detected at time %t\n", $realtime);
			8'hB5 : $write("   Extension Start Code detected at time %t\n", $realtime);
			8'hB7 : $write("Sequence End Code detected at time %t\n", $realtime);
			8'hB8 : $write("   Group Start Code detected at time %t\n", $realtime);

			8'hB9 : $write("ISO End Code detected at time %t\n", $realtime);
			8'hBA : $write("Pack Start Code detected at time %t\n", $realtime);
			8'hBB : $write("System Start Code detected at time %t\n", $realtime);
			8'hE0 : $write("Video Elementary Stream Code detected at time %t\n", $realtime);
			8'hC0 : $write("Audio Elementary Stream Code detected at time %t\n", $realtime);

			default : $write("Unrecognized Start Code %x detected at time %t\n", MPEG_decoder.Decoder_Bitstream_Data[7:0], $realtime);
		endcase
	end
end

MPEG_Audio_Video MPEG_decoder(
	MEMORY_BANK0_CLK_P,		MEMORY_BANK1_CLK_P,		MEMORY_BANK2_CLK_P,		MEMORY_BANK3_CLK_P,   	MEMORY_BANK4_CLK_P,   
	MEMORY_BANK0_CLKEN_N,	MEMORY_BANK1_CLKEN_N,	MEMORY_BANK2_CLKEN_N,   MEMORY_BANK3_CLKEN_N,   MEMORY_BANK4_CLKEN_N, 
	MEMORY_BANK0_WEN_N,		MEMORY_BANK1_WEN_N,		MEMORY_BANK2_WEN_N,     MEMORY_BANK3_WEN_N,     MEMORY_BANK4_WEN_N,   
	MEMORY_BANK0_WENA_N,		MEMORY_BANK1_WENA_N,		MEMORY_BANK2_WENA_N,    MEMORY_BANK3_WENA_N,    MEMORY_BANK4_WENA_N,  
	MEMORY_BANK0_WENB_N,		MEMORY_BANK1_WENB_N,		MEMORY_BANK2_WENB_N,    MEMORY_BANK3_WENB_N,    MEMORY_BANK4_WENB_N,  
	MEMORY_BANK0_WENC_N,		MEMORY_BANK1_WENC_N,		MEMORY_BANK2_WENC_N,    MEMORY_BANK3_WENC_N,    MEMORY_BANK4_WENC_N,  
	MEMORY_BANK0_WEND_N,		MEMORY_BANK1_WEND_N,		MEMORY_BANK2_WEND_N,    MEMORY_BANK3_WEND_N,    MEMORY_BANK4_WEND_N,  
	MEMORY_BANK0_ADV_LD_N,	MEMORY_BANK1_ADV_LD_N,	MEMORY_BANK2_ADV_LD_N,  MEMORY_BANK3_ADV_LD_N,  MEMORY_BANK4_ADV_LD_N,
	MEMORY_BANK0_OEN_N,		MEMORY_BANK1_OEN_N,		MEMORY_BANK2_OEN_N,     MEMORY_BANK3_OEN_N,     MEMORY_BANK4_OEN_N,   
	MEMORY_BANK0_CEN_N,		MEMORY_BANK1_CEN_N,		MEMORY_BANK2_CEN_N,     MEMORY_BANK3_CEN_N,     MEMORY_BANK4_CEN_N,   
	MEMORY_BANK0_ADDR_P,		MEMORY_BANK1_ADDR_P,		MEMORY_BANK2_ADDR_P,    MEMORY_BANK3_ADDR_P,    MEMORY_BANK4_ADDR_P,  
	MEMORY_BANK0_DATA_A_P,	MEMORY_BANK1_DATA_A_P,	MEMORY_BANK2_DATA_A_P,  MEMORY_BANK3_DATA_A_P,  MEMORY_BANK4_DATA_A_P,
	MEMORY_BANK0_DATA_B_P,	MEMORY_BANK1_DATA_B_P,	MEMORY_BANK2_DATA_B_P,  MEMORY_BANK3_DATA_B_P,  MEMORY_BANK4_DATA_B_P,
	MEMORY_BANK0_DATA_C_P,	MEMORY_BANK1_DATA_C_P,	MEMORY_BANK2_DATA_C_P,  MEMORY_BANK3_DATA_C_P,  MEMORY_BANK4_DATA_C_P,
	MEMORY_BANK0_DATA_D_P,	MEMORY_BANK1_DATA_D_P,	MEMORY_BANK2_DATA_D_P,  MEMORY_BANK3_DATA_D_P,  MEMORY_BANK4_DATA_D_P,

	VGA_OUT_PIXEL_CLOCK_P,
	VGA_COMP_SYNCH_N,
	VGA_OUT_BLANK_N,
	VGA_HSYNCH_N,
	VGA_VSYNCH_N,
	VGA_OUT_RED_P,
	VGA_OUT_GREEN_P,
	VGA_OUT_BLUE_P,

	MASTER_CLOCK_P,
	ALTERNATE_CLOCK_P,
	MEM_CLK_FBIN_P,
	MEM_CLK_FBOUT_P,
	EXTEND_DCM_RESET_P,

   TX_DATA_P,
   TX_ENABLE_P,
   TX_CLOCK_P,
   TX_ERROR_P,
   ENET_SLEW_P,
   RX_DATA_P,
   RX_DATA_VALID_P,
   RX_ERROR_P,
   RX_CLOCK_P,
   COLLISION_DETECTED_P,
   CARRIER_SENSE_P,
   PAUSE_P,
   MDIO_P,
   MDC_P,
   MDINIT_N,
   SSN_DATA_P,

	AC97_BIT_CLOCK_I,
	AC97_SYNCH_O,
	AC97_DATA_IN_I,
	AC97_DATA_OUT_O,
	AC97_BEEP_TONE_O,
	STARTUP_O,

	PAL_NTSC_N,
	S_VIDEO_N,
	USER_INPUT0_P,
	USER_INPUT1_P,
	USER_LED0_N,
	USER_LED1_N
);

ZBT_bank ZBT_BANK_0(
	MEMORY_BANK0_CLK_P,
	MEMORY_BANK0_CLKEN_N,
	MEMORY_BANK0_WEN_N,
	MEMORY_BANK0_WENA_N,
	MEMORY_BANK0_WENB_N,
	MEMORY_BANK0_WENC_N,
	MEMORY_BANK0_WEND_N,
	MEMORY_BANK0_ADV_LD_N,
	MEMORY_BANK0_OEN_N,
	MEMORY_BANK0_CEN_N,
	MEMORY_BANK0_ADDR_P,
	MEMORY_BANK0_DATA_A_P,
	MEMORY_BANK0_DATA_B_P,
	MEMORY_BANK0_DATA_C_P,
	MEMORY_BANK0_DATA_D_P
);

ZBT_bank ZBT_BANK_1(
	MEMORY_BANK1_CLK_P,
	MEMORY_BANK1_CLKEN_N,
	MEMORY_BANK1_WEN_N,
	MEMORY_BANK1_WENA_N,
	MEMORY_BANK1_WENB_N,
	MEMORY_BANK1_WENC_N,
	MEMORY_BANK1_WEND_N,
	MEMORY_BANK1_ADV_LD_N,
	MEMORY_BANK1_OEN_N,
	MEMORY_BANK1_CEN_N,
	MEMORY_BANK1_ADDR_P,
	MEMORY_BANK1_DATA_A_P,
	MEMORY_BANK1_DATA_B_P,
	MEMORY_BANK1_DATA_C_P,
	MEMORY_BANK1_DATA_D_P
);

ZBT_bank ZBT_BANK_2(
	MEMORY_BANK2_CLK_P,
	MEMORY_BANK2_CLKEN_N,
	MEMORY_BANK2_WEN_N,
	MEMORY_BANK2_WENA_N,
	MEMORY_BANK2_WENB_N,
	MEMORY_BANK2_WENC_N,
	MEMORY_BANK2_WEND_N,
	MEMORY_BANK2_ADV_LD_N,
	MEMORY_BANK2_OEN_N,
	MEMORY_BANK2_CEN_N,
	MEMORY_BANK2_ADDR_P,
	MEMORY_BANK2_DATA_A_P,
	MEMORY_BANK2_DATA_B_P,
	MEMORY_BANK2_DATA_C_P,
	MEMORY_BANK2_DATA_D_P
);

ZBT_bank ZBT_BANK_3(
	MEMORY_BANK3_CLK_P,
	MEMORY_BANK3_CLKEN_N,
	MEMORY_BANK3_WEN_N,
	MEMORY_BANK3_WENA_N,
	MEMORY_BANK3_WENB_N,
	MEMORY_BANK3_WENC_N,
	MEMORY_BANK3_WEND_N,
	MEMORY_BANK3_ADV_LD_N,
	MEMORY_BANK3_OEN_N,
	MEMORY_BANK3_CEN_N,
	MEMORY_BANK3_ADDR_P,
	MEMORY_BANK3_DATA_A_P,
	MEMORY_BANK3_DATA_B_P,
	MEMORY_BANK3_DATA_C_P,
	MEMORY_BANK3_DATA_D_P
);

ZBT_bank ZBT_BANK_4(
	MEMORY_BANK4_CLK_P,
	MEMORY_BANK4_CLKEN_N,
	MEMORY_BANK4_WEN_N,
	MEMORY_BANK4_WENA_N,
	MEMORY_BANK4_WENB_N,
	MEMORY_BANK4_WENC_N,
	MEMORY_BANK4_WEND_N,
	MEMORY_BANK4_ADV_LD_N,
	MEMORY_BANK4_OEN_N,
	MEMORY_BANK4_CEN_N,
	MEMORY_BANK4_ADDR_P,
	MEMORY_BANK4_DATA_A_P,
	MEMORY_BANK4_DATA_B_P,
	MEMORY_BANK4_DATA_C_P,
	MEMORY_BANK4_DATA_D_P
);

endmodule