data/full_repos/permissive/476429974/verilog/ECE_178_Project_nios.v
1: b"%Error: data/full_repos/permissive/476429974/verilog/ECE_178_Project_nios.v:78: Cannot find file containing module: 'nios_system'\n    nios_system nios2 (\n    ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/476429974/verilog,data/full_repos/permissive/476429974/nios_system\n             data/full_repos/permissive/476429974/verilog,data/full_repos/permissive/476429974/nios_system.v\n             data/full_repos/permissive/476429974/verilog,data/full_repos/permissive/476429974/nios_system.sv\n             nios_system\n             nios_system.v\n             nios_system.sv\n             obj_dir/nios_system\n             obj_dir/nios_system.v\n             obj_dir/nios_system.sv\n%Error: Exiting due to 1 error(s)\n"
module hex_decoder (output [6:0] hex_output, input [3:0] bin_digit);
    reg [6:0] invertedHex;
    assign hex_output = ~invertedHex;

    always @ (*) begin 
        case(bin_digit) 
            0:invertedHex = 7'h3F;
            1:invertedHex = 7'h06;
            2:invertedHex = 7'h5B;
            3:invertedHex = 7'h4F;
            4:invertedHex = 7'h66;
            5:invertedHex = 7'h6D;
            6:invertedHex = 7'h7D;
            7:invertedHex = 7'h07;
            8:invertedHex = 7'h7F;
            9:invertedHex = 7'h67;
            10:invertedHex = 7'h77;
            11:invertedHex = 7'h7C;
            12:invertedHex = 7'h39;
            13:invertedHex = 7'h5E;
            14:invertedHex = 7'h79;
            15:invertedHex = 7'h71;
        endcase
end 
endmodule
module hex_decoder (output [6:0] hex_output, input [3:0] bin_digit);

    reg [6:0] invertedHex;
    assign hex_output = ~invertedHex;

    always @ (*) begin 
        case(bin_digit) 
            0:invertedHex = 7'h3F;
            1:invertedHex = 7'h06;
            2:invertedHex = 7'h5B;
            3:invertedHex = 7'h4F;
            4:invertedHex = 7'h66;
            5:invertedHex = 7'h6D;
            6:invertedHex = 7'h7D;
            7:invertedHex = 7'h07;
            8:invertedHex = 7'h7F;
            9:invertedHex = 7'h67;
            10:invertedHex = 7'h77;
            11:invertedHex = 7'h7C;
            12:invertedHex = 7'h39;
            13:invertedHex = 7'h5E;
            14:invertedHex = 7'h79;
            15:invertedHex = 7'h71;
        endcase
end 
endmodule