data/full_repos/permissive/429462627/mips_pipeline.v
1: b'%Error: data/full_repos/permissive/429462627/mips_pipeline.v:138: Unsupported or unknown PLI call: $monitor\n        $monitor($time, " :A = %b,\\n\\t B = %b,\\n\\t ALU_ctrlerartion = %b,\\n\\t Result = %b,\\n\\t Carry Out = %b,\\n\\t Zero = %b.", A, B, ALU_ctrl, result, carry_out, zero);\n        ^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/429462627/mips_pipeline.v:139: Unsupported: Ignoring delay on this delayed statement.\n        #0  A = 32\'ha5a5a5a5; B = 32\'h5a5a5a5a; ALU_ctrl = 4\'b0000;      \n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/429462627/mips_pipeline.v:140: Unsupported: Ignoring delay on this delayed statement.\n        #10  ALU_ctrl = 4\'b0001;                                         \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/429462627/mips_pipeline.v:141: Unsupported: Ignoring delay on this delayed statement.\n        #10  ALU_ctrl = 4\'b0010;                                         \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/429462627/mips_pipeline.v:142: Unsupported: Ignoring delay on this delayed statement.\n        #10  ALU_ctrl = 4\'b0110;                                         \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/429462627/mips_pipeline.v:143: Unsupported: Ignoring delay on this delayed statement.\n        #10  A = 32\'hA5A5A5A5; B = 32\'hA5A5A5A5; ALU_ctrl = 4\'b0110;     \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/429462627/mips_pipeline.v:144: Unsupported: Ignoring delay on this delayed statement.\n        #10  B = 32\'hA5A5A5A5; A = 32\'h5A5A5A5A; ALU_ctrl = 4\'b0111;     \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/429462627/mips_pipeline.v:145: Unsupported: Ignoring delay on this delayed statement.\n        #10  B = 32\'hA5A5A5A5; A = 32\'h5A5A5A5A; ALU_ctrl = 4\'b1100;     \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/429462627/mips_pipeline.v:146: Unsupported: Ignoring delay on this delayed statement.\n        #20  $finish;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/429462627/mips_pipeline.v:1090: Unsupported: Ignoring delay on this delayed statement.\n        #5 clk = ~clk;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/429462627/mips_pipeline.v:1096: Unsupported: Ignoring delay on this delayed statement.\n        #5 reset = 0;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/429462627/mips_pipeline.v:1098: Unsupported: Ignoring delay on this delayed statement.\n        #300 $finish;\n        ^\n%Error: Exiting due to 1 error(s), 11 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module left_shifter_jump (
    input [25:0] in,
    output [27:0] out);

    assign out = {in[25:0],1'b0,1'b0};
endmodule
module left_shifter_jump (
    input [25:0] in,
    output [27:0] out);


    assign out = {in[25:0],1'b0,1'b0};
endmodule