data/full_repos/permissive/418750043/C906_RTL_FACTORY/gen_rtl/vfalu/rtl/aq_falu_ctrl.v
1: b"%Error: data/full_repos/permissive/418750043/C906_RTL_FACTORY/gen_rtl/vfalu/rtl/aq_falu_ctrl.v:114: Cannot find file containing module: 'gated_clk_cell'\ngated_clk_cell  x_fadd_ex1_pipe_clk (\n^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/418750043/C906_RTL_FACTORY/gen_rtl/vfalu/rtl,data/full_repos/permissive/418750043/gated_clk_cell\n             data/full_repos/permissive/418750043/C906_RTL_FACTORY/gen_rtl/vfalu/rtl,data/full_repos/permissive/418750043/gated_clk_cell.v\n             data/full_repos/permissive/418750043/C906_RTL_FACTORY/gen_rtl/vfalu/rtl,data/full_repos/permissive/418750043/gated_clk_cell.sv\n             gated_clk_cell\n             gated_clk_cell.v\n             gated_clk_cell.sv\n             obj_dir/gated_clk_cell\n             obj_dir/gated_clk_cell.v\n             obj_dir/gated_clk_cell.sv\n%Error: data/full_repos/permissive/418750043/C906_RTL_FACTORY/gen_rtl/vfalu/rtl/aq_falu_ctrl.v:133: Cannot find file containing module: 'gated_clk_cell'\ngated_clk_cell  x_fadd_ex2_pipe_clk (\n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/418750043/C906_RTL_FACTORY/gen_rtl/vfalu/rtl/aq_falu_ctrl.v:154: Cannot find file containing module: 'gated_clk_cell'\ngated_clk_cell  x_fadd_ex1_nocmp_pipe_clk (\n^~~~~~~~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module aq_falu_ctrl(
  cp0_vpu_icg_en,
  cp0_yy_clk_en,
  fadd_ex1_pipe_clk,
  fadd_ex1_pipedown,
  fadd_ex2_nocmp,
  fadd_ex2_nocmp_pipe_clk,
  fadd_ex2_nocmp_pipedown,
  fadd_ex2_pipe_clk,
  fadd_ex2_pipedown,
  fadd_ex3_pipedown,
  forever_cpuclk,
  ifu_vpu_warm_up,
  pad_yy_icg_scan_en,
  vfalu_vpu_ex1_denormal_stall,
  vpu_group_1_xx_ex1_eu_sel,
  vpu_group_1_xx_ex1_sel,
  vpu_group_1_xx_ex2_eu_sel,
  vpu_group_1_xx_ex2_sel,
  vpu_group_1_xx_ex2_stall,
  vpu_group_1_xx_ex3_eu_sel,
  vpu_group_1_xx_ex3_sel,
  vpu_group_1_xx_ex3_stall,
  vpu_group_1_xx_ex4_stall
);


input          cp0_vpu_icg_en;              
input          cp0_yy_clk_en;               
input          fadd_ex2_nocmp;              
input          forever_cpuclk;              
input          ifu_vpu_warm_up;             
input          pad_yy_icg_scan_en;          
input   [9:0]  vpu_group_1_xx_ex1_eu_sel;   
input          vpu_group_1_xx_ex1_sel;      
input   [9:0]  vpu_group_1_xx_ex2_eu_sel;   
input          vpu_group_1_xx_ex2_sel;      
input          vpu_group_1_xx_ex2_stall;    
input   [9:0]  vpu_group_1_xx_ex3_eu_sel;   
input          vpu_group_1_xx_ex3_sel;      
input          vpu_group_1_xx_ex3_stall;    
input          vpu_group_1_xx_ex4_stall;    
output         fadd_ex1_pipe_clk;           
output         fadd_ex1_pipedown;           
output         fadd_ex2_nocmp_pipe_clk;     
output         fadd_ex2_nocmp_pipedown;     
output         fadd_ex2_pipe_clk;           
output         fadd_ex2_pipedown;           
output         fadd_ex3_pipedown;           
output         vfalu_vpu_ex1_denormal_stall; 




wire           cp0_vpu_icg_en;              
wire           cp0_yy_clk_en;               
wire           fadd_ex1_pipe_clk;           
wire           fadd_ex1_pipedown;           
wire           fadd_ex1_vld;                
wire           fadd_ex2_nocmp;              
wire           fadd_ex2_nocmp_pipe_clk;     
wire           fadd_ex2_nocmp_pipedown;     
wire           fadd_ex2_pipe_clk;           
wire           fadd_ex2_pipedown;           
wire           fadd_ex2_stall;              
wire           fadd_ex2_vld;                
wire           fadd_ex3_pipedown;           
wire           fadd_ex3_stall;              
wire           fadd_ex3_vld;                
wire           fadd_ex4_stall;              
wire           forever_cpuclk;              
wire           ifu_vpu_warm_up;             
wire           pad_yy_icg_scan_en;          
wire           vfalu_vpu_ex1_denormal_stall; 
wire    [9:0]  vpu_group_1_xx_ex1_eu_sel;   
wire           vpu_group_1_xx_ex1_sel;      
wire    [9:0]  vpu_group_1_xx_ex2_eu_sel;   
wire           vpu_group_1_xx_ex2_sel;      
wire           vpu_group_1_xx_ex2_stall;    
wire    [9:0]  vpu_group_1_xx_ex3_eu_sel;   
wire           vpu_group_1_xx_ex3_sel;      
wire           vpu_group_1_xx_ex3_stall;    
wire           vpu_group_1_xx_ex4_stall;    
















gated_clk_cell  x_fadd_ex1_pipe_clk (
  .clk_in             (forever_cpuclk    ),
  .clk_out            (fadd_ex1_pipe_clk ),
  .external_en        (1'b0              ),
  .global_en          (cp0_yy_clk_en     ),
  .local_en           (fadd_ex1_pipedown ),
  .module_en          (cp0_vpu_icg_en    ),
  .pad_yy_icg_scan_en (pad_yy_icg_scan_en)
);










gated_clk_cell  x_fadd_ex2_pipe_clk (
  .clk_in             (forever_cpuclk    ),
  .clk_out            (fadd_ex2_pipe_clk ),
  .external_en        (1'b0              ),
  .global_en          (cp0_yy_clk_en     ),
  .local_en           (fadd_ex2_pipedown ),
  .module_en          (cp0_vpu_icg_en    ),
  .pad_yy_icg_scan_en (pad_yy_icg_scan_en)
);










assign fadd_ex2_nocmp_pipedown = fadd_ex2_pipedown && fadd_ex2_nocmp || ifu_vpu_warm_up;

gated_clk_cell  x_fadd_ex1_nocmp_pipe_clk (
  .clk_in                  (forever_cpuclk         ),
  .clk_out                 (fadd_ex2_nocmp_pipe_clk),
  .external_en             (1'b0                   ),
  .global_en               (cp0_yy_clk_en          ),
  .local_en                (fadd_ex2_nocmp_pipedown),
  .module_en               (cp0_vpu_icg_en         ),
  .pad_yy_icg_scan_en      (pad_yy_icg_scan_en     )
);

















assign fadd_ex1_vld      = vpu_group_1_xx_ex1_sel && (vpu_group_1_xx_ex1_eu_sel[7:6] == 2'b01) && vpu_group_1_xx_ex1_eu_sel[0];
assign fadd_ex2_vld      = vpu_group_1_xx_ex2_sel && (vpu_group_1_xx_ex2_eu_sel[7:6] == 2'b01) && vpu_group_1_xx_ex2_eu_sel[0];
assign fadd_ex3_vld      = vpu_group_1_xx_ex3_sel && (vpu_group_1_xx_ex3_eu_sel[7:6] == 2'b01) && vpu_group_1_xx_ex3_eu_sel[0];


assign fadd_ex2_stall    = vpu_group_1_xx_ex2_stall;
assign fadd_ex3_stall    = vpu_group_1_xx_ex3_stall;
assign fadd_ex4_stall    = vpu_group_1_xx_ex4_stall;
assign fadd_ex1_pipedown = fadd_ex1_vld  && !fadd_ex2_stall || ifu_vpu_warm_up;
assign fadd_ex2_pipedown = fadd_ex2_vld  && !fadd_ex3_stall || ifu_vpu_warm_up;
assign fadd_ex3_pipedown = fadd_ex3_vld  && !fadd_ex4_stall || ifu_vpu_warm_up;






































assign vfalu_vpu_ex1_denormal_stall = 1'b0;



endmodule
module aq_falu_ctrl(
  cp0_vpu_icg_en,
  cp0_yy_clk_en,
  fadd_ex1_pipe_clk,
  fadd_ex1_pipedown,
  fadd_ex2_nocmp,
  fadd_ex2_nocmp_pipe_clk,
  fadd_ex2_nocmp_pipedown,
  fadd_ex2_pipe_clk,
  fadd_ex2_pipedown,
  fadd_ex3_pipedown,
  forever_cpuclk,
  ifu_vpu_warm_up,
  pad_yy_icg_scan_en,
  vfalu_vpu_ex1_denormal_stall,
  vpu_group_1_xx_ex1_eu_sel,
  vpu_group_1_xx_ex1_sel,
  vpu_group_1_xx_ex2_eu_sel,
  vpu_group_1_xx_ex2_sel,
  vpu_group_1_xx_ex2_stall,
  vpu_group_1_xx_ex3_eu_sel,
  vpu_group_1_xx_ex3_sel,
  vpu_group_1_xx_ex3_stall,
  vpu_group_1_xx_ex4_stall
);



input          cp0_vpu_icg_en;              
input          cp0_yy_clk_en;               
input          fadd_ex2_nocmp;              
input          forever_cpuclk;              
input          ifu_vpu_warm_up;             
input          pad_yy_icg_scan_en;          
input   [9:0]  vpu_group_1_xx_ex1_eu_sel;   
input          vpu_group_1_xx_ex1_sel;      
input   [9:0]  vpu_group_1_xx_ex2_eu_sel;   
input          vpu_group_1_xx_ex2_sel;      
input          vpu_group_1_xx_ex2_stall;    
input   [9:0]  vpu_group_1_xx_ex3_eu_sel;   
input          vpu_group_1_xx_ex3_sel;      
input          vpu_group_1_xx_ex3_stall;    
input          vpu_group_1_xx_ex4_stall;    
output         fadd_ex1_pipe_clk;           
output         fadd_ex1_pipedown;           
output         fadd_ex2_nocmp_pipe_clk;     
output         fadd_ex2_nocmp_pipedown;     
output         fadd_ex2_pipe_clk;           
output         fadd_ex2_pipedown;           
output         fadd_ex3_pipedown;           
output         vfalu_vpu_ex1_denormal_stall; 




wire           cp0_vpu_icg_en;              
wire           cp0_yy_clk_en;               
wire           fadd_ex1_pipe_clk;           
wire           fadd_ex1_pipedown;           
wire           fadd_ex1_vld;                
wire           fadd_ex2_nocmp;              
wire           fadd_ex2_nocmp_pipe_clk;     
wire           fadd_ex2_nocmp_pipedown;     
wire           fadd_ex2_pipe_clk;           
wire           fadd_ex2_pipedown;           
wire           fadd_ex2_stall;              
wire           fadd_ex2_vld;                
wire           fadd_ex3_pipedown;           
wire           fadd_ex3_stall;              
wire           fadd_ex3_vld;                
wire           fadd_ex4_stall;              
wire           forever_cpuclk;              
wire           ifu_vpu_warm_up;             
wire           pad_yy_icg_scan_en;          
wire           vfalu_vpu_ex1_denormal_stall; 
wire    [9:0]  vpu_group_1_xx_ex1_eu_sel;   
wire           vpu_group_1_xx_ex1_sel;      
wire    [9:0]  vpu_group_1_xx_ex2_eu_sel;   
wire           vpu_group_1_xx_ex2_sel;      
wire           vpu_group_1_xx_ex2_stall;    
wire    [9:0]  vpu_group_1_xx_ex3_eu_sel;   
wire           vpu_group_1_xx_ex3_sel;      
wire           vpu_group_1_xx_ex3_stall;    
wire           vpu_group_1_xx_ex4_stall;    
















gated_clk_cell  x_fadd_ex1_pipe_clk (
  .clk_in             (forever_cpuclk    ),
  .clk_out            (fadd_ex1_pipe_clk ),
  .external_en        (1'b0              ),
  .global_en          (cp0_yy_clk_en     ),
  .local_en           (fadd_ex1_pipedown ),
  .module_en          (cp0_vpu_icg_en    ),
  .pad_yy_icg_scan_en (pad_yy_icg_scan_en)
);










gated_clk_cell  x_fadd_ex2_pipe_clk (
  .clk_in             (forever_cpuclk    ),
  .clk_out            (fadd_ex2_pipe_clk ),
  .external_en        (1'b0              ),
  .global_en          (cp0_yy_clk_en     ),
  .local_en           (fadd_ex2_pipedown ),
  .module_en          (cp0_vpu_icg_en    ),
  .pad_yy_icg_scan_en (pad_yy_icg_scan_en)
);










assign fadd_ex2_nocmp_pipedown = fadd_ex2_pipedown && fadd_ex2_nocmp || ifu_vpu_warm_up;

gated_clk_cell  x_fadd_ex1_nocmp_pipe_clk (
  .clk_in                  (forever_cpuclk         ),
  .clk_out                 (fadd_ex2_nocmp_pipe_clk),
  .external_en             (1'b0                   ),
  .global_en               (cp0_yy_clk_en          ),
  .local_en                (fadd_ex2_nocmp_pipedown),
  .module_en               (cp0_vpu_icg_en         ),
  .pad_yy_icg_scan_en      (pad_yy_icg_scan_en     )
);

















assign fadd_ex1_vld      = vpu_group_1_xx_ex1_sel && (vpu_group_1_xx_ex1_eu_sel[7:6] == 2'b01) && vpu_group_1_xx_ex1_eu_sel[0];
assign fadd_ex2_vld      = vpu_group_1_xx_ex2_sel && (vpu_group_1_xx_ex2_eu_sel[7:6] == 2'b01) && vpu_group_1_xx_ex2_eu_sel[0];
assign fadd_ex3_vld      = vpu_group_1_xx_ex3_sel && (vpu_group_1_xx_ex3_eu_sel[7:6] == 2'b01) && vpu_group_1_xx_ex3_eu_sel[0];


assign fadd_ex2_stall    = vpu_group_1_xx_ex2_stall;
assign fadd_ex3_stall    = vpu_group_1_xx_ex3_stall;
assign fadd_ex4_stall    = vpu_group_1_xx_ex4_stall;
assign fadd_ex1_pipedown = fadd_ex1_vld  && !fadd_ex2_stall || ifu_vpu_warm_up;
assign fadd_ex2_pipedown = fadd_ex2_vld  && !fadd_ex3_stall || ifu_vpu_warm_up;
assign fadd_ex3_pipedown = fadd_ex3_vld  && !fadd_ex4_stall || ifu_vpu_warm_up;






































assign vfalu_vpu_ex1_denormal_stall = 1'b0;



endmodule