data/full_repos/permissive/515471991/FourBitRCA.v
data/verilator_xmls/441b395f-a80d-4973-8b0c-fa7d0e901a78.xml
module rca_adder_4 (sum, Cout, x, y, Cin);
input [3:0] x, y;
input Cin;
output [3:0] sum;
output Cout;
  
  wire w1,w2,w3;
  
  full_adder ha1(sum[0],w1,x[0],y[0],Cin);
  full_adder ha2(sum[1],w2,x[1],y[1],w1);
  full_adder ha3(sum[2],w3,x[2],y[2],w2);
  full_adder ha4(sum[3],Cout,x[3],y[3],w3);
  
endmodule
module rca_adder_4 (sum, Cout, x, y, Cin);

input [3:0] x, y;
input Cin;
output [3:0] sum;
output Cout;
  
  wire w1,w2,w3;
  
  full_adder ha1(sum[0],w1,x[0],y[0],Cin);
  full_adder ha2(sum[1],w2,x[1],y[1],w1);
  full_adder ha3(sum[2],w3,x[2],y[2],w2);
  full_adder ha4(sum[3],Cout,x[3],y[3],w3);
  
endmodule