data/full_repos/permissive/524567962/designs/Adder/Adder.sv
1: b"%Error: data/full_repos/permissive/524567962/designs/Adder/Adder.sv:13: Cannot find file containing module: 'Half_Adder'\n        Half_Adder ha(.a(a[0]), .b(b[0]), .y(y[0]), .cout(cout[0]));\n        ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/524567962/designs/Adder,data/full_repos/permissive/524567962/Half_Adder\n             data/full_repos/permissive/524567962/designs/Adder,data/full_repos/permissive/524567962/Half_Adder.v\n             data/full_repos/permissive/524567962/designs/Adder,data/full_repos/permissive/524567962/Half_Adder.sv\n             Half_Adder\n             Half_Adder.v\n             Half_Adder.sv\n             obj_dir/Half_Adder\n             obj_dir/Half_Adder.v\n             obj_dir/Half_Adder.sv\n%Error: data/full_repos/permissive/524567962/designs/Adder/Adder.sv:15: Cannot find file containing module: 'Full_Adder'\n        Full_Adder fa(.a(a[i]), .b(b[i]), .cin(cout[i-1]), .y(y[i]), .cout(cout[i]));\n        ^~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module Adder #(parameter WIDTH=8)(
  input  logic [WIDTH-1:0] a, b,

  output logic [WIDTH-1:0] y
);

  logic [WIDTH-1:0] cout;
  generate
    genvar i;
    for (i = 0; i < WIDTH; i=i+1)
    begin
      if(i == 0)
        Half_Adder ha(.a(a[0]), .b(b[0]), .y(y[0]), .cout(cout[0]));
      else
        Full_Adder fa(.a(a[i]), .b(b[i]), .cin(cout[i-1]), .y(y[i]), .cout(cout[i]));
    end

  endgenerate

endmodule
module Adder #(parameter WIDTH=8)(
  input  logic [WIDTH-1:0] a, b,

  output logic [WIDTH-1:0] y
);


  logic [WIDTH-1:0] cout;
  generate
    genvar i;
    for (i = 0; i < WIDTH; i=i+1)
    begin
      if(i == 0)
        Half_Adder ha(.a(a[0]), .b(b[0]), .y(y[0]), .cout(cout[0]));
      else
        Full_Adder fa(.a(a[i]), .b(b[i]), .cin(cout[i-1]), .y(y[i]), .cout(cout[i]));
    end

  endgenerate

endmodule