data/full_repos/permissive/494905093/PUF/ROPUF/Comparator.v
1: b'%Warning-LITENDIAN: data/full_repos/permissive/494905093/PUF/ROPUF/Comparator.v:5: Little bit endian vector: MSB < LSB of bit range: 0:15\n    input [0:15] Up_In, Down_In,\n          ^\n                    ... Use "/* verilator lint_off LITENDIAN */" and lint_on around source to disable this message.\n%Warning-LITENDIAN: data/full_repos/permissive/494905093/PUF/ROPUF/Comparator.v:7: Little bit endian vector: MSB < LSB of bit range: 0:7\n    input [0:7] count,\n          ^\n%Error: Exiting due to 2 warning(s)\n'
module Comparator(
    input [0:15] Up_In, Down_In,
    input clk,
    input [0:7] count,
    output reg Out 
);

    always@( count or Up_In or Down_In )begin
        
        if( count >= 8'd245 && count <= 8'd250)begin
            
            if( Up_In >= Down_In )begin
                Out = 1'b1;
            end
            
            else begin
                Out = 1'b0;
            end

        end

        else if( count < 8'd245 )begin
            Out = 1'b0;    
        end

        else begin ; end

    end

endmodule
module Comparator(
    input [0:15] Up_In, Down_In,
    input clk,
    input [0:7] count,
    output reg Out 
);


    always@( count or Up_In or Down_In )begin
        
        if( count >= 8'd245 && count <= 8'd250)begin
            
            if( Up_In >= Down_In )begin
                Out = 1'b1;
            end
            
            else begin
                Out = 1'b0;
            end

        end

        else if( count < 8'd245 )begin
            Out = 1'b0;    
        end

        else begin ; end

    end

endmodule