data/full_repos/permissive/454159683/mul2bc/mul2bc.v
1: b'%Warning-WIDTH: data/full_repos/permissive/454159683/mul2bc/mul2bc.v:12: Operator COND expects 32 or 4 bits on the Conditional True, but Conditional True\'s REPLICATE generates 3 bits.\n                                                                       : ... In instance mul2bc\n  r1 = y[1] ? {x, 1\'b0} : 0;\n            ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module mul2bc(input [1:0] x, y, output [3:0] out);
	reg[3:0] r0, r1;

	always @(x or y)
	begin
		r0 = y[0] ? {2'b00, x} : 0;
		r1 = y[1] ? {x, 1'b0} : 0;
	end
	assign out = r0 + r1;
	






















endmodule
module mul2bc(input [1:0] x, y, output [3:0] out);

	reg[3:0] r0, r1;

	always @(x or y)
	begin
		r0 = y[0] ? {2'b00, x} : 0;
		r1 = y[1] ? {x, 1'b0} : 0;
	end
	assign out = r0 + r1;
	






















endmodule