data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/riffa/mux.v
1: b'%Error: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/riffa/mux.v:44: Cannot find include file: functions.vh\n`include "functions.vh" \n         ^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/riffa,data/full_repos/permissive/498471995/functions.vh\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/riffa,data/full_repos/permissive/498471995/functions.vh.v\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/riffa,data/full_repos/permissive/498471995/functions.vh.sv\n             functions.vh\n             functions.vh.v\n             functions.vh.sv\n             obj_dir/functions.vh\n             obj_dir/functions.vh.v\n             obj_dir/functions.vh.sv\n%Error: Exiting due to 1 error(s)\n'
module mux
    #(
      parameter C_NUM_INPUTS = 4,
      parameter C_CLOG_NUM_INPUTS = 2,
      parameter C_WIDTH = 32,
      parameter C_MUX_TYPE = "SELECT"
      )
    (
     input [(C_NUM_INPUTS)*C_WIDTH-1:0] MUX_INPUTS,
     input [C_CLOG_NUM_INPUTS-1:0]      MUX_SELECT,
     output [C_WIDTH-1:0]               MUX_OUTPUT
     );
    generate
        if(C_MUX_TYPE == "SELECT") begin
            mux_select
                #(

                  .C_NUM_INPUTS             (C_NUM_INPUTS),
                  .C_CLOG_NUM_INPUTS        (C_CLOG_NUM_INPUTS),
                  .C_WIDTH                  (C_WIDTH))
            mux_select_inst
                (

                 .MUX_OUTPUT            (MUX_OUTPUT[C_WIDTH-1:0]),

                 .MUX_INPUTS            (MUX_INPUTS[(C_NUM_INPUTS)*C_WIDTH-1:0]),
                 .MUX_SELECT            (MUX_SELECT[C_CLOG_NUM_INPUTS-1:0]));
        end else if (C_MUX_TYPE == "SHIFT") begin
            mux_shift
                #(

                  .C_NUM_INPUTS             (C_NUM_INPUTS),
                  .C_CLOG_NUM_INPUTS        (C_CLOG_NUM_INPUTS),
                  .C_WIDTH                  (C_WIDTH))
            mux_shift_inst
                (

                 .MUX_OUTPUT            (MUX_OUTPUT[C_WIDTH-1:0]),

                 .MUX_INPUTS            (MUX_INPUTS[(C_NUM_INPUTS)*C_WIDTH-1:0]),
                 .MUX_SELECT            (MUX_SELECT[C_CLOG_NUM_INPUTS-1:0]));
        end
    endgenerate
endmodule
module mux
    #(
      parameter C_NUM_INPUTS = 4,
      parameter C_CLOG_NUM_INPUTS = 2,
      parameter C_WIDTH = 32,
      parameter C_MUX_TYPE = "SELECT"
      )
    (
     input [(C_NUM_INPUTS)*C_WIDTH-1:0] MUX_INPUTS,
     input [C_CLOG_NUM_INPUTS-1:0]      MUX_SELECT,
     output [C_WIDTH-1:0]               MUX_OUTPUT
     );

    generate
        if(C_MUX_TYPE == "SELECT") begin
            mux_select
                #(

                  .C_NUM_INPUTS             (C_NUM_INPUTS),
                  .C_CLOG_NUM_INPUTS        (C_CLOG_NUM_INPUTS),
                  .C_WIDTH                  (C_WIDTH))
            mux_select_inst
                (

                 .MUX_OUTPUT            (MUX_OUTPUT[C_WIDTH-1:0]),

                 .MUX_INPUTS            (MUX_INPUTS[(C_NUM_INPUTS)*C_WIDTH-1:0]),
                 .MUX_SELECT            (MUX_SELECT[C_CLOG_NUM_INPUTS-1:0]));
        end else if (C_MUX_TYPE == "SHIFT") begin
            mux_shift
                #(

                  .C_NUM_INPUTS             (C_NUM_INPUTS),
                  .C_CLOG_NUM_INPUTS        (C_CLOG_NUM_INPUTS),
                  .C_WIDTH                  (C_WIDTH))
            mux_shift_inst
                (

                 .MUX_OUTPUT            (MUX_OUTPUT[C_WIDTH-1:0]),

                 .MUX_INPUTS            (MUX_INPUTS[(C_NUM_INPUTS)*C_WIDTH-1:0]),
                 .MUX_SELECT            (MUX_SELECT[C_CLOG_NUM_INPUTS-1:0]));
        end
    endgenerate
endmodule