data/full_repos/permissive/430337995/TinyML/top_tb.v
1: b"%Error: data/full_repos/permissive/430337995/TinyML/top_tb.v:14: Define or directive not defined: '`GBUFF_ADDR_SIZE'\nreg [`GBUFF_ADDR_SIZE-1:0] GOLDEN [`WORD_SIZE-1:0];\n     ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/430337995/TinyML/top_tb.v:14: Define or directive not defined: '`WORD_SIZE'\nreg [`GBUFF_ADDR_SIZE-1:0] GOLDEN [`WORD_SIZE-1:0];\n                                   ^~~~~~~~~~\n%Error: data/full_repos/permissive/430337995/TinyML/top_tb.v:16: Define or directive not defined: '`CYCLE'\nalways #(`CYCLE/2) clk = ~clk;\n         ^~~~~~\n%Error: data/full_repos/permissive/430337995/TinyML/top_tb.v:16: syntax error, unexpected '/', expecting TYPE-IDENTIFIER\nalways #(`CYCLE/2) clk = ~clk;\n               ^\n%Error: Exiting due to 4 error(s)\n"
module top_tb;


reg clk;
reg rst;
reg start;
wire done;

reg [3:0] row_a, col_b, k;

reg [`GBUFF_ADDR_SIZE-1:0] GOLDEN [`WORD_SIZE-1:0];

always #(`CYCLE/2) clk = ~clk;
















endmodule
module top_tb;



reg clk;
reg rst;
reg start;
wire done;

reg [3:0] row_a, col_b, k;

reg [`GBUFF_ADDR_SIZE-1:0] GOLDEN [`WORD_SIZE-1:0];

always #(`CYCLE/2) clk = ~clk;
















endmodule