data/full_repos/permissive/42499175/SourceFiles/dimmer.v
1: b'%Warning-WIDTH: data/full_repos/permissive/42499175/SourceFiles/dimmer.v:65: Operator LT expects 5 bits on the RHS, but RHS\'s CONST \'4\'hf\' generates 4 bits.\n                                                                           : ... In instance dimmer\n   nextstepcounter <= (stepcounter < 4\'d15) ? stepcounter + 4\'b1 : stepcounter;\n                                   ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/42499175/SourceFiles/dimmer.v:90: Operator COND expects 4 bits on the Conditional False, but Conditional False\'s CONST \'1\'h1\' generates 1 bits.\n                                                                           : ... In instance dimmer\n   scale = test ? 4\'b1010 : 1\'b1;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/42499175/SourceFiles/dimmer.v:95: Operator ADD expects 18 bits on the RHS, but RHS\'s CONST \'13\'h1\' generates 13 bits.\n                                                                           : ... In instance dimmer\n   cyclecounter <= cyclecounter + 13\'b1;\n                                ^\n%Warning-WIDTH: data/full_repos/permissive/42499175/SourceFiles/dimmer.v:97: Operator DIV expects 32 or 18 bits on the RHS, but RHS\'s VARREF \'scale\' generates 4 bits.\n                                                                           : ... In instance dimmer\n   if (cyclecounter >= (250000/scale)) begin\n                              ^\n%Warning-WIDTH: data/full_repos/permissive/42499175/SourceFiles/dimmer.v:106: Operator ADD expects 26 bits on the RHS, but RHS\'s CONST \'18\'h1\' generates 18 bits.\n                                                                            : ... In instance dimmer\n    upbuttoncounter <= upbuttoncounter + 18\'b1;\n                                       ^\n%Warning-WIDTH: data/full_repos/permissive/42499175/SourceFiles/dimmer.v:102: Operator DIV expects 32 or 26 bits on the RHS, but RHS\'s VARREF \'scale\' generates 4 bits.\n                                                                            : ... In instance dimmer\n   if (upbuttoncounter >= (50000000/scale) || (up_n == 1)) begin\n                                   ^\n%Warning-WIDTH: data/full_repos/permissive/42499175/SourceFiles/dimmer.v:114: Operator ADD expects 26 bits on the RHS, but RHS\'s CONST \'18\'h1\' generates 18 bits.\n                                                                            : ... In instance dimmer\n    downbuttoncounter <= downbuttoncounter + 18\'b1;\n                                           ^\n%Warning-WIDTH: data/full_repos/permissive/42499175/SourceFiles/dimmer.v:110: Operator DIV expects 32 or 26 bits on the RHS, but RHS\'s VARREF \'scale\' generates 4 bits.\n                                                                            : ... In instance dimmer\n   if (downbuttoncounter >= (50000000/scale) || (down_n == 1)) begin\n                                     ^\n%Warning-WIDTH: data/full_repos/permissive/42499175/SourceFiles/dimmer.v:120: Operator DIV expects 32 or 18 bits on the RHS, but RHS\'s VARREF \'scale\' generates 4 bits.\n                                                                            : ... In instance dimmer\nassign leds = (cyclecounter < stepcounter*(15625/scale)) ? 10\'b1111111111 : 10\'b0;\n                                                ^\n%Error: Exiting due to 9 warning(s)\n'
module dimmer(clock_50, clr_n, up_n, down_n, test, mode, leds);

	input clock_50;
	input clr_n;
	input up_n;
	input down_n;
	input test;
	input mode;
	output [9:0] leds;

	reg [3:0] scale;
	reg buttonpressed;
	reg nextbuttonpressed;
	reg [4:0] stepcounter;
	reg [4:0] nextstepcounter;
	reg [17:0] cyclecounter;
	reg [25:0] upbuttoncounter;
	reg [25:0] downbuttoncounter;


	always @(negedge up_n or negedge down_n) begin		

		if (up_n == 0) begin
			nextbuttonpressed <= 1;
		end
		else if (down_n == 0) begin
			nextbuttonpressed <= 1;
		end

		else begin
			nextbuttonpressed <= 0;
		end
	end
	

	always @(upbuttoncounter or downbuttoncounter) begin

		if (!up_n && (upbuttoncounter == 0) && buttonpressed) begin
			nextstepcounter <= (stepcounter < 4'd15) ? stepcounter + 4'b1 : stepcounter;
		end

		else if (!down_n && (downbuttoncounter == 0) && buttonpressed) begin
			nextstepcounter <= (stepcounter > 0) ? stepcounter - 4'b1 : stepcounter;
		end

		else begin
			nextstepcounter <= stepcounter;
		end
	end


	always @(posedge clock_50 or negedge clr_n) begin
		

		if (clr_n == 0) begin
			cyclecounter <= 0;
			stepcounter <= 0;
			buttonpressed <= 0;
			upbuttoncounter <= 0;
			downbuttoncounter <= 0;	
		end
		else begin

			scale = test ? 4'b1010 : 1'b1;
			stepcounter <= nextstepcounter;
			buttonpressed <= nextbuttonpressed;


			cyclecounter <= cyclecounter + 13'b1;

			if (cyclecounter >= (250000/scale)) begin
				cyclecounter <= 0;
			end
						

			if (upbuttoncounter >= (50000000/scale) || (up_n == 1)) begin
				upbuttoncounter <= 0;
			end
			else begin
				upbuttoncounter <= upbuttoncounter + 18'b1;
			end
			

			if (downbuttoncounter >= (50000000/scale) || (down_n == 1)) begin
				downbuttoncounter <= 0;
			end
			else begin
				downbuttoncounter <= downbuttoncounter + 18'b1;
			end
		end
	end


assign leds = (cyclecounter < stepcounter*(15625/scale)) ? 10'b1111111111 : 10'b0;

endmodule
module dimmer(clock_50, clr_n, up_n, down_n, test, mode, leds);


	input clock_50;
	input clr_n;
	input up_n;
	input down_n;
	input test;
	input mode;
	output [9:0] leds;

	reg [3:0] scale;
	reg buttonpressed;
	reg nextbuttonpressed;
	reg [4:0] stepcounter;
	reg [4:0] nextstepcounter;
	reg [17:0] cyclecounter;
	reg [25:0] upbuttoncounter;
	reg [25:0] downbuttoncounter;


	always @(negedge up_n or negedge down_n) begin		

		if (up_n == 0) begin
			nextbuttonpressed <= 1;
		end
		else if (down_n == 0) begin
			nextbuttonpressed <= 1;
		end

		else begin
			nextbuttonpressed <= 0;
		end
	end
	

	always @(upbuttoncounter or downbuttoncounter) begin

		if (!up_n && (upbuttoncounter == 0) && buttonpressed) begin
			nextstepcounter <= (stepcounter < 4'd15) ? stepcounter + 4'b1 : stepcounter;
		end

		else if (!down_n && (downbuttoncounter == 0) && buttonpressed) begin
			nextstepcounter <= (stepcounter > 0) ? stepcounter - 4'b1 : stepcounter;
		end

		else begin
			nextstepcounter <= stepcounter;
		end
	end


	always @(posedge clock_50 or negedge clr_n) begin
		

		if (clr_n == 0) begin
			cyclecounter <= 0;
			stepcounter <= 0;
			buttonpressed <= 0;
			upbuttoncounter <= 0;
			downbuttoncounter <= 0;	
		end
		else begin

			scale = test ? 4'b1010 : 1'b1;
			stepcounter <= nextstepcounter;
			buttonpressed <= nextbuttonpressed;


			cyclecounter <= cyclecounter + 13'b1;

			if (cyclecounter >= (250000/scale)) begin
				cyclecounter <= 0;
			end
						

			if (upbuttoncounter >= (50000000/scale) || (up_n == 1)) begin
				upbuttoncounter <= 0;
			end
			else begin
				upbuttoncounter <= upbuttoncounter + 18'b1;
			end
			

			if (downbuttoncounter >= (50000000/scale) || (down_n == 1)) begin
				downbuttoncounter <= 0;
			end
			else begin
				downbuttoncounter <= downbuttoncounter + 18'b1;
			end
		end
	end


assign leds = (cyclecounter < stepcounter*(15625/scale)) ? 10'b1111111111 : 10'b0;

endmodule