data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:142: Multiple top level modules\n                                                                                                                                                        : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                                                                                        : ... Top module \'data_arrays_0_ext\'\nmodule data_arrays_0_ext(\n       ^~~~~~~~~~~~~~~~~\n                                                                                                                                                        : ... Top module \'tag_array_ext\'\nmodule tag_array_ext(\n       ^~~~~~~~~~~~~\n                                                                                                                                                        : ... Top module \'tag_array_0_ext\'\nmodule tag_array_0_ext(\n       ^~~~~~~~~~~~~~~\n                                                                                                                                                        : ... Top module \'data_arrays_0_0_ext\'\nmodule data_arrays_0_0_ext(\n       ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:322: Cannot find file containing module: \'sky130_sram_2kbyte_1rw1r_32x512_8\'\n    sky130_sram_2kbyte_1rw1r_32x512_8 #(.VERBOSE(0)) ram0l (\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/517705285/verilog/rtl/marmot,data/full_repos/permissive/517705285/sky130_sram_2kbyte_1rw1r_32x512_8\n             data/full_repos/permissive/517705285/verilog/rtl/marmot,data/full_repos/permissive/517705285/sky130_sram_2kbyte_1rw1r_32x512_8.v\n             data/full_repos/permissive/517705285/verilog/rtl/marmot,data/full_repos/permissive/517705285/sky130_sram_2kbyte_1rw1r_32x512_8.sv\n             sky130_sram_2kbyte_1rw1r_32x512_8\n             sky130_sram_2kbyte_1rw1r_32x512_8.v\n             sky130_sram_2kbyte_1rw1r_32x512_8.sv\n             obj_dir/sky130_sram_2kbyte_1rw1r_32x512_8\n             obj_dir/sky130_sram_2kbyte_1rw1r_32x512_8.v\n             obj_dir/sky130_sram_2kbyte_1rw1r_32x512_8.sv\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:342: Cannot find file containing module: \'sky130_sram_2kbyte_1rw1r_32x512_8\'\n    sky130_sram_2kbyte_1rw1r_32x512_8 #(.VERBOSE(0)) ram0h (\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:362: Cannot find file containing module: \'sky130_sram_2kbyte_1rw1r_32x512_8\'\n    sky130_sram_2kbyte_1rw1r_32x512_8 #(.VERBOSE(0)) ram1l (\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:382: Cannot find file containing module: \'sky130_sram_2kbyte_1rw1r_32x512_8\'\n    sky130_sram_2kbyte_1rw1r_32x512_8 #(.VERBOSE(0)) ram1h (\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:402: Cannot find file containing module: \'sky130_sram_2kbyte_1rw1r_32x512_8\'\n    sky130_sram_2kbyte_1rw1r_32x512_8 #(.VERBOSE(0)) ram2l (\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:422: Cannot find file containing module: \'sky130_sram_2kbyte_1rw1r_32x512_8\'\n    sky130_sram_2kbyte_1rw1r_32x512_8 #(.VERBOSE(0)) ram2h (\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:442: Cannot find file containing module: \'sky130_sram_2kbyte_1rw1r_32x512_8\'\n    sky130_sram_2kbyte_1rw1r_32x512_8 #(.VERBOSE(0)) ram3l (\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:462: Cannot find file containing module: \'sky130_sram_2kbyte_1rw1r_32x512_8\'\n    sky130_sram_2kbyte_1rw1r_32x512_8 #(.VERBOSE(0)) ram3h (\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:234: Cannot find file containing module: \'sky130_sram_1kbyte_1rw1r_32x256_8\'\n  sky130_sram_1kbyte_1rw1r_32x256_8 #(.VERBOSE(0)) raml (\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:254: Cannot find file containing module: \'sky130_sram_1kbyte_1rw1r_32x256_8\'\n  sky130_sram_1kbyte_1rw1r_32x256_8 #(.VERBOSE(0)) ramh (\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:166: Cannot find file containing module: \'sky130_sram_1kbyte_1rw1r_32x256_8\'\n  sky130_sram_1kbyte_1rw1r_32x256_8 #(.VERBOSE(0)) raml (\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:186: Cannot find file containing module: \'sky130_sram_1kbyte_1rw1r_32x256_8\'\n  sky130_sram_1kbyte_1rw1r_32x256_8 #(.VERBOSE(0)) ramh (\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:58: Cannot find file containing module: \'sky130_sram_2kbyte_1rw1r_32x512_8\'\n    sky130_sram_2kbyte_1rw1r_32x512_8 #(.VERBOSE(0)) ram0l (\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:78: Cannot find file containing module: \'sky130_sram_2kbyte_1rw1r_32x512_8\'\n    sky130_sram_2kbyte_1rw1r_32x512_8 #(.VERBOSE(0)) ram0h (\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:98: Cannot find file containing module: \'sky130_sram_2kbyte_1rw1r_32x512_8\'\n    sky130_sram_2kbyte_1rw1r_32x512_8 #(.VERBOSE(0)) ram1l (\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/517705285/verilog/rtl/marmot/shc.marmotcaravel.MarmotCaravelChip.MarmotCaravelConfig.top.mems.sky130.v:118: Cannot find file containing module: \'sky130_sram_2kbyte_1rw1r_32x512_8\'\n    sky130_sram_2kbyte_1rw1r_32x512_8 #(.VERBOSE(0)) ram1h (\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 16 error(s), 1 warning(s)\n'
module tag_array_ext(
  input  [5:0]  RW0_addr,
  input         RW0_clk,
  input  [41:0] RW0_wdata,
  output [41:0] RW0_rdata,
  input         RW0_en,
  input         RW0_wmode,
  input  [1:0]  RW0_wmask
);

  wire        ram_clk    = RW0_clk;
  wire        ram_csb0   = ~RW0_en;
  wire        ram_web0   = ~RW0_wmode;
  wire [7:0]  ram_wmask0 = {{4{RW0_wmask[1]}}, {4{RW0_wmask[0]}}};
  wire [7:0]  ram_addr0  = {2'b00, RW0_addr};
  wire [63:0] ram_din0   = {{11'd0, RW0_wdata[41:21]}, {11'd0, RW0_wdata[20:0]}};
  wire [63:0] ram_dout0;
  wire        ram_csb1   = 1'b1;
  wire [7:0]  ram_addr1  = 8'hff;


  assign RW0_rdata = {ram_dout0[52:32], ram_dout0[20:0]};


  sky130_sram_1kbyte_1rw1r_32x256_8 #(.VERBOSE(`VERBOSE)) raml (
`ifdef USE_POWER_PINS
    .vccd1  (vccd1),
    .vssd1  (vssd1),
`endif
    .clk0   (ram_clk),
    .csb0   (ram_csb0),
    .web0   (ram_web0),
    .wmask0 (ram_wmask0[3:0]),
    .addr0  (ram_addr0),
    .din0   (ram_din0[31:0]),
    .dout0  (ram_dout0[31:0]),
    .clk1   (ram_clk),
    .csb1   (ram_csb1),
    .addr1  (ram_addr1),

    .dout1  ()

  );  

  sky130_sram_1kbyte_1rw1r_32x256_8 #(.VERBOSE(`VERBOSE)) ramh (
`ifdef USE_POWER_PINS
    .vccd1  (vccd1),
    .vssd1  (vssd1),
`endif
    .clk0   (ram_clk),
    .csb0   (ram_csb0),
    .web0   (ram_web0),
    .wmask0 (ram_wmask0[7:4]),
    .addr0  (ram_addr0),
    .din0   (ram_din0[63:32]),
    .dout0  (ram_dout0[63:32]),
    .clk1   (ram_clk),
    .csb1   (ram_csb1),
    .addr1  (ram_addr1),

    .dout1  ()

  );  
endmodule
module tag_array_ext(
  input  [5:0]  RW0_addr,
  input         RW0_clk,
  input  [41:0] RW0_wdata,
  output [41:0] RW0_rdata,
  input         RW0_en,
  input         RW0_wmode,
  input  [1:0]  RW0_wmask
);


  wire        ram_clk    = RW0_clk;
  wire        ram_csb0   = ~RW0_en;
  wire        ram_web0   = ~RW0_wmode;
  wire [7:0]  ram_wmask0 = {{4{RW0_wmask[1]}}, {4{RW0_wmask[0]}}};
  wire [7:0]  ram_addr0  = {2'b00, RW0_addr};
  wire [63:0] ram_din0   = {{11'd0, RW0_wdata[41:21]}, {11'd0, RW0_wdata[20:0]}};
  wire [63:0] ram_dout0;
  wire        ram_csb1   = 1'b1;
  wire [7:0]  ram_addr1  = 8'hff;


  assign RW0_rdata = {ram_dout0[52:32], ram_dout0[20:0]};


  sky130_sram_1kbyte_1rw1r_32x256_8 #(.VERBOSE(`VERBOSE)) raml (
`ifdef USE_POWER_PINS
    .vccd1  (vccd1),
    .vssd1  (vssd1),
`endif
    .clk0   (ram_clk),
    .csb0   (ram_csb0),
    .web0   (ram_web0),
    .wmask0 (ram_wmask0[3:0]),
    .addr0  (ram_addr0),
    .din0   (ram_din0[31:0]),
    .dout0  (ram_dout0[31:0]),
    .clk1   (ram_clk),
    .csb1   (ram_csb1),
    .addr1  (ram_addr1),

    .dout1  ()

  );  

  sky130_sram_1kbyte_1rw1r_32x256_8 #(.VERBOSE(`VERBOSE)) ramh (
`ifdef USE_POWER_PINS
    .vccd1  (vccd1),
    .vssd1  (vssd1),
`endif
    .clk0   (ram_clk),
    .csb0   (ram_csb0),
    .web0   (ram_web0),
    .wmask0 (ram_wmask0[7:4]),
    .addr0  (ram_addr0),
    .din0   (ram_din0[63:32]),
    .dout0  (ram_dout0[63:32]),
    .clk1   (ram_clk),
    .csb1   (ram_csb1),
    .addr1  (ram_addr1),

    .dout1  ()

  );  
endmodule