data/full_repos/permissive/472097485/Chu04/Banner_05/BoardTest.v
1: b"%Error: data/full_repos/permissive/472097485/Chu04/Banner_05/BoardTest.v:11: Cannot find file containing module: 'FrequencyDivider'\n FrequencyDivider #( 6000000, 23 ) secondClk ( clk, 1'b0, 1'b1, max_tick );\n ^~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/472097485/Chu04/Banner_05,data/full_repos/permissive/472097485/FrequencyDivider\n             data/full_repos/permissive/472097485/Chu04/Banner_05,data/full_repos/permissive/472097485/FrequencyDivider.v\n             data/full_repos/permissive/472097485/Chu04/Banner_05,data/full_repos/permissive/472097485/FrequencyDivider.sv\n             FrequencyDivider\n             FrequencyDivider.v\n             FrequencyDivider.sv\n             obj_dir/FrequencyDivider\n             obj_dir/FrequencyDivider.v\n             obj_dir/FrequencyDivider.sv\n%Error: data/full_repos/permissive/472097485/Chu04/Banner_05/BoardTest.v:14: Cannot find file containing module: 'Banner'\n Banner baner( clk, ~bt[0], ~max_tick || ~bt[1], bt[2], hex2, hex1, hex0 );\n ^~~~~~\n%Error: data/full_repos/permissive/472097485/Chu04/Banner_05/BoardTest.v:17: Cannot find file containing module: 'DispHexMux'\n DispHexMux hexMux( clk, 1'b0, hex2, hex1, hex0, 3'b000, 3'b111, en, ss );\n ^~~~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module BoardTest( input wire clk, input wire [2:0] bt, output wire [7:0] ss, output wire [2:0] en );

	wire max_tick;
	wire [4:0] hex2, hex1, hex0;
	
	FrequencyDivider #( 6000000, 23 ) secondClk ( clk, 1'b0, 1'b1, max_tick );


	Banner baner( clk, ~bt[0], ~max_tick || ~bt[1], bt[2], hex2, hex1, hex0 );


	DispHexMux hexMux( clk, 1'b0, hex2, hex1, hex0, 3'b000, 3'b111, en, ss );

endmodule
module BoardTest( input wire clk, input wire [2:0] bt, output wire [7:0] ss, output wire [2:0] en );


	wire max_tick;
	wire [4:0] hex2, hex1, hex0;
	
	FrequencyDivider #( 6000000, 23 ) secondClk ( clk, 1'b0, 1'b1, max_tick );


	Banner baner( clk, ~bt[0], ~max_tick || ~bt[1], bt[2], hex2, hex1, hex0 );


	DispHexMux hexMux( clk, 1'b0, hex2, hex1, hex0, 3'b000, 3'b111, en, ss );

endmodule