data/full_repos/permissive/49670587/vtr/ODIN_II/FULL_REGRESSION_TESTS/paj_framebuftop_hierarchy_no_mem_no_combinational.v
1: b'%Warning-WIDTH: data/full_repos/permissive/49670587/vtr/ODIN_II/FULL_REGRESSION_TESTS/paj_framebuftop_hierarchy_no_mem_no_combinational.v:295: Operator ASSIGNDLY expects 10 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 11 bits.\n                                                                                                                                             : ... In instance paj_framebuftop_hierarchy_no_mem.vidoutinst\n       tm3_vidout_red <= {(({1\'b0, primarypixel[20:14]}) + ({1\'b0, primarybuffer[20:14]})), 3\'b000} ; \n                      ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/49670587/vtr/ODIN_II/FULL_REGRESSION_TESTS/paj_framebuftop_hierarchy_no_mem_no_combinational.v:296: Operator ASSIGNDLY expects 10 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 11 bits.\n                                                                                                                                             : ... In instance paj_framebuftop_hierarchy_no_mem.vidoutinst\n       tm3_vidout_green <= {(({1\'b0, primarypixel[13:7]}) + ({1\'b0, primarybuffer[13:7]})), 3\'b000} ; \n                        ^~\n%Warning-WIDTH: data/full_repos/permissive/49670587/vtr/ODIN_II/FULL_REGRESSION_TESTS/paj_framebuftop_hierarchy_no_mem_no_combinational.v:297: Operator ASSIGNDLY expects 10 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 11 bits.\n                                                                                                                                             : ... In instance paj_framebuftop_hierarchy_no_mem.vidoutinst\n       tm3_vidout_blue <= {(({1\'b0, primarypixel[6:0]}) + ({1\'b0, primarybuffer[6:0]})), 3\'b000} ; \n                       ^~\n%Warning-WIDTH: data/full_repos/permissive/49670587/vtr/ODIN_II/FULL_REGRESSION_TESTS/paj_framebuftop_hierarchy_no_mem_no_combinational.v:310: Operator ASSIGNDLY expects 10 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 11 bits.\n                                                                                                                                             : ... In instance paj_framebuftop_hierarchy_no_mem.vidoutinst\n       tm3_vidout_red <= {(({1\'b0, primarypixel[20:14]}) + ({1\'b0, secondarypixel[20:14]})), 3\'b000} ; \n                      ^~\n%Warning-WIDTH: data/full_repos/permissive/49670587/vtr/ODIN_II/FULL_REGRESSION_TESTS/paj_framebuftop_hierarchy_no_mem_no_combinational.v:311: Operator ASSIGNDLY expects 10 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 11 bits.\n                                                                                                                                             : ... In instance paj_framebuftop_hierarchy_no_mem.vidoutinst\n       tm3_vidout_green <= {(({1\'b0, primarypixel[13:7]}) + ({1\'b0, secondarypixel[13:7]})), 3\'b000} ; \n                        ^~\n%Warning-WIDTH: data/full_repos/permissive/49670587/vtr/ODIN_II/FULL_REGRESSION_TESTS/paj_framebuftop_hierarchy_no_mem_no_combinational.v:312: Operator ASSIGNDLY expects 10 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 11 bits.\n                                                                                                                                             : ... In instance paj_framebuftop_hierarchy_no_mem.vidoutinst\n       tm3_vidout_blue <= {(({1\'b0, primarypixel[6:0]}) + ({1\'b0, secondarypixel[6:0]})), 3\'b000} ; \n                       ^~\n%Warning-WIDTH: data/full_repos/permissive/49670587/vtr/ODIN_II/FULL_REGRESSION_TESTS/paj_framebuftop_hierarchy_no_mem_no_combinational.v:322: Operator ASSIGNDLY expects 10 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 12 bits.\n                                                                                                                                             : ... In instance paj_framebuftop_hierarchy_no_mem.vidoutinst\n       tm3_vidout_red <= {(({2\'b00, primarypixel[20:14]}) \n                      ^~\n%Warning-WIDTH: data/full_repos/permissive/49670587/vtr/ODIN_II/FULL_REGRESSION_TESTS/paj_framebuftop_hierarchy_no_mem_no_combinational.v:326: Operator ASSIGNDLY expects 10 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 12 bits.\n                                                                                                                                             : ... In instance paj_framebuftop_hierarchy_no_mem.vidoutinst\n       tm3_vidout_green <= {(({2\'b00, primarypixel[13:7]}) \n                        ^~\n%Warning-WIDTH: data/full_repos/permissive/49670587/vtr/ODIN_II/FULL_REGRESSION_TESTS/paj_framebuftop_hierarchy_no_mem_no_combinational.v:330: Operator ASSIGNDLY expects 10 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 12 bits.\n                                                                                                                                             : ... In instance paj_framebuftop_hierarchy_no_mem.vidoutinst\n       tm3_vidout_blue <= {(({2\'b00, primarypixel[6:0]}) \n                       ^~\n%Warning-WIDTH: data/full_repos/permissive/49670587/vtr/ODIN_II/FULL_REGRESSION_TESTS/paj_framebuftop_hierarchy_no_mem_no_combinational.v:43: Input port connection \'fbdata\' expects 63 bits on the pin connection, but pin connection\'s VARREF \'fbdata\' generates 64 bits.\n                                                                                                                                            : ... In instance paj_framebuftop_hierarchy_no_mem\n    scanlinebuffer scanlinebuf (pixeldataA, pixeldataB, pixeldataC, nextpixelA, nextpixelB, nextpixelC, startframe, nextscanline, fbdata, fbnextscanlineint, fbdatavalid, globalreset, tm3_clk_v0); \n                                                                                                                                  ^~~~~~\n%Error: Exiting due to 10 warning(s)\n'
module scanlinebuffer (pixeldataA, pixeldataB, pixeldataC, nextpixelA, nextpixelB, nextpixelC, startframe, nextscanline, fbdata, fbnextscanline, fbdatavalid, globalreset, clk);

    output[20:0] pixeldataA; 
    wire[20:0] pixeldataA;
    output[20:0] pixeldataB; 
    wire[20:0] pixeldataB;
    output[20:0] pixeldataC; 
    wire[20:0] pixeldataC;
    input nextpixelA; 
    input nextpixelB; 

    input nextpixelC; 
    input startframe; 
    input nextscanline; 
    input[62:0] fbdata; 
    output fbnextscanline; 
    reg fbnextscanline;
    input fbdatavalid; 
    input globalreset; 
    input clk; 

    reg[1:0] state; 
    reg[1:0] next_state; 
    reg weA; 
    reg weB; 
    reg weC; 

	reg temp_fbnextscanline;

    scanline scanlineA (nextpixelA, weA, fbdata[62:0], pixeldataA, globalreset, clk); 
    scanline scanlineB (nextpixelB, weB, fbdata[62:0], pixeldataB, globalreset, clk); 
    scanline scanlineC (nextpixelC, weC, fbdata[62:0], pixeldataC, globalreset, clk); 

    always @(posedge clk)
    begin
       if (globalreset == 1'b1)
       begin
          state <= 0 ; 
          fbnextscanline <= 1'b0 ; 
       end
       else
       begin
          state <= next_state ; 
          if (fbdatavalid == 1'b1)
          begin
             fbnextscanline <= 1'b0 ; 
          end 
	  else
	  begin
	  	fbnextscanline <= temp_fbnextscanline;
	  end
	end
    end

    always @(posedge clk)
    begin
       case (state)
          0 :
                   begin
				       weB <= 1'b0 ; 
				       weC <= 1'b0 ; 
                      weA <= fbdatavalid ; 
                      if (nextscanline == 1'b1 & startframe == 1'b1)
                      begin
                         next_state <= 2 ; 
                      end
                      else
                      begin
                         next_state <= 0 ; 
                      end 
                         if (startframe == 1'b1 & nextscanline == 1'b1)
                         begin
                            temp_fbnextscanline <= 1'b1 ; 
                         end 

                   end
          1 :
                   begin
				       weB <= 1'b0 ; 
				       weC <= 1'b0 ; 
                      weA <= fbdatavalid ; 
                      if (nextscanline == 1'b1)
                      begin
                         next_state <= 2 ; 
                      end
                      else
                      begin
                         next_state <= 1 ; 
                      end 

                         if (nextscanline == 1'b1)
                         begin
                            temp_fbnextscanline <= 1'b1 ; 
                         end 
 

                   end
          2 :
                   begin
				       weA <= 1'b0 ; 
				       weC <= 1'b0 ; 
                      weB <= fbdatavalid ; 
                      if (nextscanline == 1'b1)
                      begin
                         next_state <= 3 ; 
                      end
                      else
                      begin
                         next_state <= 2 ; 
                      end 
                         if (nextscanline == 1'b1)

                         begin
                            temp_fbnextscanline <= 1'b1 ; 
                         end 
 
                   end
          3 :
                   begin
				       weA <= 1'b0 ; 
				       weB <= 1'b0 ; 
                      weC <= fbdatavalid ; 
                      if (nextscanline == 1'b1)
                      begin
                         next_state <= 1 ; 
                      end
                      else
                      begin
                         next_state <= 3 ; 
                      end 
	                  if (nextscanline == 1'b1)
                         begin

                            temp_fbnextscanline <= 1'b1 ; 
                         end 

                   end
       endcase 
    end 
 endmodule
module scanlinebuffer (pixeldataA, pixeldataB, pixeldataC, nextpixelA, nextpixelB, nextpixelC, startframe, nextscanline, fbdata, fbnextscanline, fbdatavalid, globalreset, clk);


    output[20:0] pixeldataA; 
    wire[20:0] pixeldataA;
    output[20:0] pixeldataB; 
    wire[20:0] pixeldataB;
    output[20:0] pixeldataC; 
    wire[20:0] pixeldataC;
    input nextpixelA; 
    input nextpixelB; 

    input nextpixelC; 
    input startframe; 
    input nextscanline; 
    input[62:0] fbdata; 
    output fbnextscanline; 
    reg fbnextscanline;
    input fbdatavalid; 
    input globalreset; 
    input clk; 

    reg[1:0] state; 
    reg[1:0] next_state; 
    reg weA; 
    reg weB; 
    reg weC; 

	reg temp_fbnextscanline;

    scanline scanlineA (nextpixelA, weA, fbdata[62:0], pixeldataA, globalreset, clk); 
    scanline scanlineB (nextpixelB, weB, fbdata[62:0], pixeldataB, globalreset, clk); 
    scanline scanlineC (nextpixelC, weC, fbdata[62:0], pixeldataC, globalreset, clk); 

    always @(posedge clk)
    begin
       if (globalreset == 1'b1)
       begin
          state <= 0 ; 
          fbnextscanline <= 1'b0 ; 
       end
       else
       begin
          state <= next_state ; 
          if (fbdatavalid == 1'b1)
          begin
             fbnextscanline <= 1'b0 ; 
          end 
	  else
	  begin
	  	fbnextscanline <= temp_fbnextscanline;
	  end
	end
    end

    always @(posedge clk)
    begin
       case (state)
          0 :
                   begin
				       weB <= 1'b0 ; 
				       weC <= 1'b0 ; 
                      weA <= fbdatavalid ; 
                      if (nextscanline == 1'b1 & startframe == 1'b1)
                      begin
                         next_state <= 2 ; 
                      end
                      else
                      begin
                         next_state <= 0 ; 
                      end 
                         if (startframe == 1'b1 & nextscanline == 1'b1)
                         begin
                            temp_fbnextscanline <= 1'b1 ; 
                         end 

                   end
          1 :
                   begin
				       weB <= 1'b0 ; 
				       weC <= 1'b0 ; 
                      weA <= fbdatavalid ; 
                      if (nextscanline == 1'b1)
                      begin
                         next_state <= 2 ; 
                      end
                      else
                      begin
                         next_state <= 1 ; 
                      end 

                         if (nextscanline == 1'b1)
                         begin
                            temp_fbnextscanline <= 1'b1 ; 
                         end 
 

                   end
          2 :
                   begin
				       weA <= 1'b0 ; 
				       weC <= 1'b0 ; 
                      weB <= fbdatavalid ; 
                      if (nextscanline == 1'b1)
                      begin
                         next_state <= 3 ; 
                      end
                      else
                      begin
                         next_state <= 2 ; 
                      end 
                         if (nextscanline == 1'b1)

                         begin
                            temp_fbnextscanline <= 1'b1 ; 
                         end 
 
                   end
          3 :
                   begin
				       weA <= 1'b0 ; 
				       weB <= 1'b0 ; 
                      weC <= fbdatavalid ; 
                      if (nextscanline == 1'b1)
                      begin
                         next_state <= 1 ; 
                      end
                      else
                      begin
                         next_state <= 3 ; 
                      end 
	                  if (nextscanline == 1'b1)
                         begin

                            temp_fbnextscanline <= 1'b1 ; 
                         end 

                   end
       endcase 
    end 
 endmodule