data/full_repos/permissive/52196097/DSP/Radar_DSP/FPGA/Individual Modules/Ram_example/Ram_example/tb_memory.v
1: b'%Error: Cannot find file containing module: Modules/Ram_example/Ram_example,data/full_repos/permissive/52196097\n        ... Looked in:\n             data/full_repos/permissive/52196097/DSP/Radar_DSP/FPGA/Individual/Modules/Ram_example/Ram_example,data/full_repos/permissive/52196097\n             data/full_repos/permissive/52196097/DSP/Radar_DSP/FPGA/Individual/Modules/Ram_example/Ram_example,data/full_repos/permissive/52196097.v\n             data/full_repos/permissive/52196097/DSP/Radar_DSP/FPGA/Individual/Modules/Ram_example/Ram_example,data/full_repos/permissive/52196097.sv\n             Modules/Ram_example/Ram_example,data/full_repos/permissive/52196097\n             Modules/Ram_example/Ram_example,data/full_repos/permissive/52196097.v\n             Modules/Ram_example/Ram_example,data/full_repos/permissive/52196097.sv\n             obj_dir/Modules/Ram_example/Ram_example,data/full_repos/permissive/52196097\n             obj_dir/Modules/Ram_example/Ram_example,data/full_repos/permissive/52196097.v\n             obj_dir/Modules/Ram_example/Ram_example,data/full_repos/permissive/52196097.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/52196097/DSP/Radar_DSP/FPGA/Individual\n%Error: Cannot find file containing module: Modules/Ram_example/Ram_example/tb_memory.v\n%Error: Exiting due to 3 error(s)\n'
module tb_memory();
	reg clk;
	reg [10:0] addr_a, addr_b;
	wire [7:0] data_a, data_b;
	integer i;
	
	initial clk = 0;
	always #100 clk = ~clk;
	
	memory memory_inst (.addr_a(addr_a), .addr_b(addr_b),
							  .clk(clk), .q_a(data_a), .q_b(data_b));

	initial begin
		addr_a <= 0;
		addr_b <= 1;
		
		for(i = 0; i < 1024; i = i + 1) begin
			@(posedge clk); #10;
			$display("Address = %b, contect = %b.", addr_a, data_a);
			$display("Address = %b, contect = %b.", addr_b, data_b);
			addr_a = addr_a + 2;
			addr_b = addr_b + 2;
		end
		
		#100; 
		$finish;
	end
endmodule
module tb_memory();

	reg clk;
	reg [10:0] addr_a, addr_b;
	wire [7:0] data_a, data_b;
	integer i;
	
	initial clk = 0;
	always #100 clk = ~clk;
	
	memory memory_inst (.addr_a(addr_a), .addr_b(addr_b),
							  .clk(clk), .q_a(data_a), .q_b(data_b));

	initial begin
		addr_a <= 0;
		addr_b <= 1;
		
		for(i = 0; i < 1024; i = i + 1) begin
			@(posedge clk); #10;
			$display("Address = %b, contect = %b.", addr_a, data_a);
			$display("Address = %b, contect = %b.", addr_b, data_b);
			addr_a = addr_a + 2;
			addr_b = addr_b + 2;
		end
		
		#100; 
		$finish;
	end
endmodule