data/full_repos/permissive/42581625/PersonalComputer/NumIn.v
data/verilator_xmls/5f302274-8917-462c-8f81-f95b9f2ff9b2.xml
module pbdebounce
	(input wire clk,
	input wire button,
	output reg pbreg);
	
	reg [7:0] pbshift;
	wire clk_1ms;
	timer_1ms m0(clk, clk_1ms);
	always@(posedge clk_1ms) begin
	pbshift <=pbshift<<1;
	pbshift[0] <=button;
	if (pbshift==0)
	pbreg <=0;
	if (pbshift==8'hFF)
	pbreg <=1;
end
endmodule
module pbdebounce
	(input wire clk,
	input wire button,
	output reg pbreg);

	
	reg [7:0] pbshift;
	wire clk_1ms;
	timer_1ms m0(clk, clk_1ms);
	always@(posedge clk_1ms) begin
	pbshift <=pbshift<<1;
	pbshift[0] <=button;
	if (pbshift==0)
	pbreg <=0;
	if (pbshift==8'hFF)
	pbreg <=1;
end
endmodule