data/full_repos/permissive/493019833/test/testcase/firrtl/FixedPointShifter/reference/FixedPointShifter.v
data/verilator_xmls/ff343b37-6295-4f2b-9e1d-fcdb55b26572.xml
module DSHL_SIGNED(y, in, n);
    parameter width_in = 4;
    parameter width_n = 2;
    output [(width_in+2**width_n-1)-1:0] y;
    input [width_in-1:0] in;
    input [width_n-1:0] n;
    wire [(width_in+2**width_n-1)-1:0] temp;
    assign temp = {{(2**width_n-1){in[width_in-1]}}, in};
    assign y = $signed(temp) << n;
endmodule
module DSHL_SIGNED(y, in, n);

    parameter width_in = 4;
    parameter width_n = 2;
    output [(width_in+2**width_n-1)-1:0] y;
    input [width_in-1:0] in;
    input [width_n-1:0] n;
    wire [(width_in+2**width_n-1)-1:0] temp;
    assign temp = {{(2**width_n-1){in[width_in-1]}}, in};
    assign y = $signed(temp) << n;
endmodule