data/full_repos/permissive/461000256/new/EXE.v
1: b'%Error: data/full_repos/permissive/461000256/new/EXE.v:1: Cannot find include file: definitions.v\n`include "definitions.v" \n         ^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/461000256/new,data/full_repos/permissive/461000256/definitions.v\n             data/full_repos/permissive/461000256/new,data/full_repos/permissive/461000256/definitions.v.v\n             data/full_repos/permissive/461000256/new,data/full_repos/permissive/461000256/definitions.v.sv\n             definitions.v\n             definitions.v.v\n             definitions.v.sv\n             obj_dir/definitions.v\n             obj_dir/definitions.v.v\n             obj_dir/definitions.v.sv\n%Error: data/full_repos/permissive/461000256/new/EXE.v:42: Define or directive not defined: \'`OP\'\n   `OP: \n   ^~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:42: syntax error, unexpected \':\', expecting endcase\n   `OP: \n      ^\n%Error: data/full_repos/permissive/461000256/new/EXE.v:45: Define or directive not defined: \'`ADD_F3\'\n     if    (funct3 == `ADD_F3 && funct7 == `ADD_F7) begin  \n                      ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:45: Define or directive not defined: \'`ADD_F7\'\n     if    (funct3 == `ADD_F3 && funct7 == `ADD_F7) begin  \n                                           ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:47: Define or directive not defined: \'`SUB_F3\'\n     end else if (funct3 == `SUB_F3 && funct7 == `SUB_F7) begin  \n                            ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:47: Define or directive not defined: \'`SUB_F7\'\n     end else if (funct3 == `SUB_F3 && funct7 == `SUB_F7) begin  \n                                                 ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:49: Define or directive not defined: \'`SLL_F3\'\n     end else if (funct3 == `SLL_F3 && funct7 == `SLL_F7) begin  \n                            ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:49: Define or directive not defined: \'`SLL_F7\'\n     end else if (funct3 == `SLL_F3 && funct7 == `SLL_F7) begin  \n                                                 ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:51: Define or directive not defined: \'`SLT_F3\'\n     end else if (funct3 == `SLT_F3 && funct7 == `SLT_F7) begin  \n                            ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:51: Define or directive not defined: \'`SLT_F7\'\n     end else if (funct3 == `SLT_F3 && funct7 == `SLT_F7) begin  \n                                                 ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:53: Define or directive not defined: \'`SLTU_F3\'\n     end else if (funct3 == `SLTU_F3 && funct7 == `SLTU_F7) begin  \n                            ^~~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:53: Define or directive not defined: \'`SLTU_F7\'\n     end else if (funct3 == `SLTU_F3 && funct7 == `SLTU_F7) begin  \n                                                  ^~~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:55: Define or directive not defined: \'`XOR_F3\'\n     end else if (funct3 == `XOR_F3 && funct7 == `XOR_F7) begin  \n                            ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:55: Define or directive not defined: \'`XOR_F7\'\n     end else if (funct3 == `XOR_F3 && funct7 == `XOR_F7) begin  \n                                                 ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:57: Define or directive not defined: \'`SRL_F3\'\n     end else if (funct3 == `SRL_F3 && funct7 == `SRL_F7) begin  \n                            ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:57: Define or directive not defined: \'`SRL_F7\'\n     end else if (funct3 == `SRL_F3 && funct7 == `SRL_F7) begin  \n                                                 ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:59: Define or directive not defined: \'`SRA_F3\'\n     end else if (funct3 == `SRA_F3 && funct7 == `SRA_F7) begin  \n                            ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:59: Define or directive not defined: \'`SRA_F7\'\n     end else if (funct3 == `SRA_F3 && funct7 == `SRA_F7) begin  \n                                                 ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:61: Define or directive not defined: \'`OR_F3\'\n     end else if (funct3 == `OR_F3 && funct7 == `OR_F7) begin  \n                            ^~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:61: Define or directive not defined: \'`OR_F7\'\n     end else if (funct3 == `OR_F3 && funct7 == `OR_F7) begin  \n                                                ^~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:63: Define or directive not defined: \'`AND_F3\'\n     end else if (funct3 == `AND_F3 && funct7 == `AND_F7) begin  \n                            ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:63: Define or directive not defined: \'`AND_F7\'\n     end else if (funct3 == `AND_F3 && funct7 == `AND_F7) begin  \n                                                 ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:70: Define or directive not defined: \'`OP_IMM\'\n   `OP_IMM: \n   ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:73: Define or directive not defined: \'`ADDI_F3\'\n     if    (funct3 == `ADDI_F3) begin  \n                      ^~~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:75: Define or directive not defined: \'`SLTI_F3\'\n     end else if (funct3 == `SLTI_F3) begin  \n                            ^~~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:77: Define or directive not defined: \'`SLTIU_F3\'\n     end else if (funct3 == `SLTIU_F3) begin  \n                            ^~~~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:79: Define or directive not defined: \'`XORI_F3\'\n     end else if (funct3 == `XORI_F3) begin  \n                            ^~~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:81: Define or directive not defined: \'`ORI_F3\'\n     end else if (funct3 == `ORI_F3) begin  \n                            ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:83: Define or directive not defined: \'`ANDI_F3\'\n     end else if (funct3 == `ANDI_F3) begin  \n                            ^~~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:85: Define or directive not defined: \'`SLLI_F3\'\n     end else if (funct3 == `SLLI_F3) begin  \n                            ^~~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:87: Define or directive not defined: \'`SRLI_F3\'\n     end else if (funct3 == `SRLI_F3) begin  \n                            ^~~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:89: Define or directive not defined: \'`SRAI_F3\'\n     end else if (funct3 == `SRAI_F3) begin  \n                            ^~~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:96: Define or directive not defined: \'`JALR\'\n   `JALR: \n   ^~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:99: Define or directive not defined: \'`JALR_F3\'\n     if    (funct3 == `JALR_F3) begin  \n                      ^~~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:106: Define or directive not defined: \'`LOAD\'\n   `LOAD: \n   ^~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:109: Define or directive not defined: \'`LB_F3\'\n     if    (funct3 == `LB_F3) begin  \n                      ^~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:111: Define or directive not defined: \'`LH_F3\'\n     end else if (funct3 == `LH_F3) begin  \n                            ^~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:113: Define or directive not defined: \'`LW_F3\'\n     end else if (funct3 == `LW_F3) begin  \n                            ^~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:115: Define or directive not defined: \'`LBU_F3\'\n     end else if (funct3 == `LBU_F3) begin  \n                            ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:117: Define or directive not defined: \'`LHU_F3\'\n     end else if (funct3 == `LHU_F3) begin  \n                            ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:125: Define or directive not defined: \'`SYSTEM\'\n   `SYSTEM: \n   ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:128: Define or directive not defined: \'`ECALL_F3\'\n     if    (funct3 == `ECALL_F3) begin  \n                      ^~~~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:130: Define or directive not defined: \'`EBREAK_F3\'\n     end else if (funct3 == `EBREAK_F3) begin  \n                            ^~~~~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:138: Define or directive not defined: \'`STORE\'\n   `STORE: \n   ^~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:141: Define or directive not defined: \'`SB_F3\'\n     if    (funct3 == `SB_F3) begin  \n                      ^~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:143: Define or directive not defined: \'`SH_F3\'\n     end else if (funct3 == `SH_F3) begin  \n                            ^~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:145: Define or directive not defined: \'`SW_F3\'\n     end else if (funct3 == `SW_F3) begin  \n                            ^~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:153: Define or directive not defined: \'`BRANCH\'\n   `BRANCH: \n   ^~~~~~~\n%Error: data/full_repos/permissive/461000256/new/EXE.v:156: Define or directive not defined: \'`BEQ_F3\'\n     if    (funct3 == `BEQ_F3) begin  \n                      ^~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
module EXE 
#(	parameter RFW = 5,
	parameter IMW = 4,
	parameter DW = 32,
	parameter IW = 32)
(	input wire [IW-1:0] inst,
	input wire [DW-1:0] dataA,
	input wire [DW-1:0] dataB,
	output reg [IW-1:0] inst_o,
	output reg [DW-1:0] data_out);

	
	wire [RFW-1:0] rs2, rs1, rd;
	wire [6:0] funct7;
	wire [6:0] opcode;
	wire [2:0] funct3;
	wire [DW-1:0] imm_I, imm_U, imm_S, imm_B, imm_J, jalr_add;

	assign imm_I	= { {20{inst[31]}}, inst[30:20] };
	assign imm_S	= { {20{inst[31]}}, inst[30:25],inst[11:7]};
	assign imm_B	= { {19{inst[31]}},inst[7],inst[30:25],inst[11:8], 1'b0};
	assign imm_U	= { {inst[31:12]}, {12{1'b0}} };
	assign imm_J	= { {11{inst[31]}}, inst[19:12],inst[20],inst[30:21], 1'b0};
	assign funct7 	= inst[31:25];
	assign rs2 		= inst[24:20];
	assign rs1		= inst[19:15];
	assign funct3	= inst[14:12];
	assign rd		= inst[11:7 ];
	assign opcode	= inst[6 :2 ];
	assign jalr_add = dataA + imm_I;

	always @(*) begin
		inst_o = inst;

		if (inst[1:0] != 2'b11) begin
			$display("ERROR IN INSTRUCTION");
			$display(inst);
			data_out = 32'bX;
		end
		case (opcode)
			`OP: 
				begin

					if 			(funct3 == `ADD_F3 && funct7 == `ADD_F7) begin
						data_out = dataA + dataB;
					end else if (funct3 == `SUB_F3 && funct7 == `SUB_F7) begin
						data_out = dataA - dataB;
					end else if (funct3 == `SLL_F3 && funct7 == `SLL_F7) begin
						data_out = dataA << dataB[4:0];
					end else if (funct3 == `SLT_F3 && funct7 == `SLT_F7) begin
						data_out = $signed(dataA) < $signed(dataB);
					end else if (funct3 == `SLTU_F3 && funct7 == `SLTU_F7) begin
						data_out = $unsigned(dataA) < $unsigned(dataB);
					end else if (funct3 == `XOR_F3 && funct7 == `XOR_F7) begin
						data_out = dataA ^ dataB;
					end else if (funct3 == `SRL_F3 && funct7 == `SRL_F7) begin
						data_out = dataA >> dataB[4:0];
					end else if (funct3 == `SRA_F3 && funct7 == `SRA_F7) begin
						data_out = $signed(dataA) >>> dataB[4:0];
					end else if (funct3 == `OR_F3 && funct7 == `OR_F7) begin
						data_out = dataA | dataB;
					end else if (funct3 == `AND_F3 && funct7 == `AND_F7) begin
						data_out = dataA & dataB;
					end else begin
						$display("Unknown OP!");
						data_out = 32'bX;
					end
				end
			`OP_IMM: 
				begin 

					if 			(funct3 == `ADDI_F3) begin
						data_out = dataA + imm_I;
					end else if (funct3 == `SLTI_F3) begin
						data_out = $signed(dataA) < $signed(imm_I);
					end else if (funct3 == `SLTIU_F3) begin
						data_out = $unsigned(dataA) < $unsigned(imm_I);
					end else if (funct3 == `XORI_F3) begin
						data_out = dataA ^ imm_I;
					end else if (funct3 == `ORI_F3) begin
						data_out = dataA | imm_I;
					end else if (funct3 == `ANDI_F3) begin
						data_out = dataA & imm_I;
					end else if (funct3 == `SLLI_F3) begin
						data_out = dataA << imm_I[4:0];
					end else if (funct3 == `SRLI_F3) begin
						data_out = dataA >> imm_I[4:0];
					end else if (funct3 == `SRAI_F3) begin
						data_out = $signed(dataA) >>> imm_I[4:0];
					end else begin
						$display("Unknown OP_IMM!");
						data_out = 32'bX;
					end
				end
			`JALR: 
				begin 

					if 			(funct3 == `JALR_F3) begin
						data_out = (dataA + imm_I) & {{DW-1{1'b1}},1'b0};
					end else begin
						$display("Unknown JALR!");
						data_out = 32'bX;
					end
				end
			`LOAD: 
				begin 

					if 			(funct3 == `LB_F3) begin
						data_out = dataA + imm_I;
					end else if (funct3 == `LH_F3) begin
						data_out = dataA + imm_I;
					end else if (funct3 == `LW_F3) begin
						data_out = dataA + imm_I;
					end else if (funct3 == `LBU_F3) begin
						data_out = dataA + imm_I;
					end else if (funct3 == `LHU_F3) begin
						data_out = dataA + imm_I;
					end else begin
						$display("Unknown LOAD!");
						data_out = 32'bX;
					end

				end
			`SYSTEM: 
				begin 

					if 			(funct3 == `ECALL_F3) begin
						data_out = 32'bX;
					end else if (funct3 == `EBREAK_F3) begin
						data_out = 32'bX;
					end else begin
						$display("Unknown LOAD!");
						data_out = 32'bX;
					end

				end
			`STORE: 
				begin 

					if 			(funct3 == `SB_F3) begin
						data_out = 32'bX;
					end else if (funct3 == `SH_F3) begin
						data_out = 32'bX;
					end else if (funct3 == `SW_F3) begin
						data_out = 32'bX;
					end else begin
						$display("Unknown STORE!");
						data_out = 32'bX;
					end

				end
			`BRANCH: 
				begin 

					if 			(funct3 == `BEQ_F3) begin
						data_out = dataA == dataB;
					end else if (funct3 == `BNE_F3) begin
						data_out = dataA != dataB;
					end else if (funct3 == `BLT_F3) begin
						data_out = dataA < dataB;
					end else if (funct3 == `BGE_F3) begin
						data_out = dataA >= dataB;
					end else if (funct3 == `BLTU_F3) begin
						data_out = $unsigned(dataA) < $unsigned(dataB);
					end else if (funct3 == `BGEU_F3) begin
						data_out = $unsigned(dataA) >= $unsigned(dataB);
					end else begin
						$display("Unknown BRANCH!");
						data_out = 32'bX;
					end

				end
			`LUI: 
				begin 

					data_out = imm_U;
				end
			`AUIPC: 
				begin 

					data_out = imm_U;
				end
			`JAL: 
				begin 

					data_out = dataA + imm_J;

				end
			default:
				begin
					$display("Unknown opcode: %b!",opcode);
				end

		endcase
	end



endmodule
module EXE 
#(	parameter RFW = 5,
	parameter IMW = 4,
	parameter DW = 32,
	parameter IW = 32)
(	input wire [IW-1:0] inst,
	input wire [DW-1:0] dataA,
	input wire [DW-1:0] dataB,
	output reg [IW-1:0] inst_o,
	output reg [DW-1:0] data_out);


	
	wire [RFW-1:0] rs2, rs1, rd;
	wire [6:0] funct7;
	wire [6:0] opcode;
	wire [2:0] funct3;
	wire [DW-1:0] imm_I, imm_U, imm_S, imm_B, imm_J, jalr_add;

	assign imm_I	= { {20{inst[31]}}, inst[30:20] };
	assign imm_S	= { {20{inst[31]}}, inst[30:25],inst[11:7]};
	assign imm_B	= { {19{inst[31]}},inst[7],inst[30:25],inst[11:8], 1'b0};
	assign imm_U	= { {inst[31:12]}, {12{1'b0}} };
	assign imm_J	= { {11{inst[31]}}, inst[19:12],inst[20],inst[30:21], 1'b0};
	assign funct7 	= inst[31:25];
	assign rs2 		= inst[24:20];
	assign rs1		= inst[19:15];
	assign funct3	= inst[14:12];
	assign rd		= inst[11:7 ];
	assign opcode	= inst[6 :2 ];
	assign jalr_add = dataA + imm_I;

	always @(*) begin
		inst_o = inst;

		if (inst[1:0] != 2'b11) begin
			$display("ERROR IN INSTRUCTION");
			$display(inst);
			data_out = 32'bX;
		end
		case (opcode)
			`OP: 
				begin

					if 			(funct3 == `ADD_F3 && funct7 == `ADD_F7) begin
						data_out = dataA + dataB;
					end else if (funct3 == `SUB_F3 && funct7 == `SUB_F7) begin
						data_out = dataA - dataB;
					end else if (funct3 == `SLL_F3 && funct7 == `SLL_F7) begin
						data_out = dataA << dataB[4:0];
					end else if (funct3 == `SLT_F3 && funct7 == `SLT_F7) begin
						data_out = $signed(dataA) < $signed(dataB);
					end else if (funct3 == `SLTU_F3 && funct7 == `SLTU_F7) begin
						data_out = $unsigned(dataA) < $unsigned(dataB);
					end else if (funct3 == `XOR_F3 && funct7 == `XOR_F7) begin
						data_out = dataA ^ dataB;
					end else if (funct3 == `SRL_F3 && funct7 == `SRL_F7) begin
						data_out = dataA >> dataB[4:0];
					end else if (funct3 == `SRA_F3 && funct7 == `SRA_F7) begin
						data_out = $signed(dataA) >>> dataB[4:0];
					end else if (funct3 == `OR_F3 && funct7 == `OR_F7) begin
						data_out = dataA | dataB;
					end else if (funct3 == `AND_F3 && funct7 == `AND_F7) begin
						data_out = dataA & dataB;
					end else begin
						$display("Unknown OP!");
						data_out = 32'bX;
					end
				end
			`OP_IMM: 
				begin 

					if 			(funct3 == `ADDI_F3) begin
						data_out = dataA + imm_I;
					end else if (funct3 == `SLTI_F3) begin
						data_out = $signed(dataA) < $signed(imm_I);
					end else if (funct3 == `SLTIU_F3) begin
						data_out = $unsigned(dataA) < $unsigned(imm_I);
					end else if (funct3 == `XORI_F3) begin
						data_out = dataA ^ imm_I;
					end else if (funct3 == `ORI_F3) begin
						data_out = dataA | imm_I;
					end else if (funct3 == `ANDI_F3) begin
						data_out = dataA & imm_I;
					end else if (funct3 == `SLLI_F3) begin
						data_out = dataA << imm_I[4:0];
					end else if (funct3 == `SRLI_F3) begin
						data_out = dataA >> imm_I[4:0];
					end else if (funct3 == `SRAI_F3) begin
						data_out = $signed(dataA) >>> imm_I[4:0];
					end else begin
						$display("Unknown OP_IMM!");
						data_out = 32'bX;
					end
				end
			`JALR: 
				begin 

					if 			(funct3 == `JALR_F3) begin
						data_out = (dataA + imm_I) & {{DW-1{1'b1}},1'b0};
					end else begin
						$display("Unknown JALR!");
						data_out = 32'bX;
					end
				end
			`LOAD: 
				begin 

					if 			(funct3 == `LB_F3) begin
						data_out = dataA + imm_I;
					end else if (funct3 == `LH_F3) begin
						data_out = dataA + imm_I;
					end else if (funct3 == `LW_F3) begin
						data_out = dataA + imm_I;
					end else if (funct3 == `LBU_F3) begin
						data_out = dataA + imm_I;
					end else if (funct3 == `LHU_F3) begin
						data_out = dataA + imm_I;
					end else begin
						$display("Unknown LOAD!");
						data_out = 32'bX;
					end

				end
			`SYSTEM: 
				begin 

					if 			(funct3 == `ECALL_F3) begin
						data_out = 32'bX;
					end else if (funct3 == `EBREAK_F3) begin
						data_out = 32'bX;
					end else begin
						$display("Unknown LOAD!");
						data_out = 32'bX;
					end

				end
			`STORE: 
				begin 

					if 			(funct3 == `SB_F3) begin
						data_out = 32'bX;
					end else if (funct3 == `SH_F3) begin
						data_out = 32'bX;
					end else if (funct3 == `SW_F3) begin
						data_out = 32'bX;
					end else begin
						$display("Unknown STORE!");
						data_out = 32'bX;
					end

				end
			`BRANCH: 
				begin 

					if 			(funct3 == `BEQ_F3) begin
						data_out = dataA == dataB;
					end else if (funct3 == `BNE_F3) begin
						data_out = dataA != dataB;
					end else if (funct3 == `BLT_F3) begin
						data_out = dataA < dataB;
					end else if (funct3 == `BGE_F3) begin
						data_out = dataA >= dataB;
					end else if (funct3 == `BLTU_F3) begin
						data_out = $unsigned(dataA) < $unsigned(dataB);
					end else if (funct3 == `BGEU_F3) begin
						data_out = $unsigned(dataA) >= $unsigned(dataB);
					end else begin
						$display("Unknown BRANCH!");
						data_out = 32'bX;
					end

				end
			`LUI: 
				begin 

					data_out = imm_U;
				end
			`AUIPC: 
				begin 

					data_out = imm_U;
				end
			`JAL: 
				begin 

					data_out = dataA + imm_J;

				end
			default:
				begin
					$display("Unknown opcode: %b!",opcode);
				end

		endcase
	end



endmodule