data/full_repos/permissive/42434302/ivltests/pr1664684.v
1: b'%Error: data/full_repos/permissive/42434302/ivltests/pr1664684.v:8: Unsupported or unknown PLI call: $monitor\n   initial $monitor($time,,rdo,,rm,cpen,,up14,,rdi);\n           ^~~~~~~~\n%Error: data/full_repos/permissive/42434302/ivltests/pr1664684.v:8: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n   initial $monitor($time,,rdo,,rm,cpen,,up14,,rdi);\n                          ^\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/pr1664684.v:26: Unsupported: Ignoring delay on this delayed statement.\n      #40;\n      ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/pr1664684.v:29: Unsupported: Ignoring delay on this delayed statement.\n      #40;\n      ^\n%Error: Exiting due to 2 error(s), 2 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module bug (rdo, rm, cpen, up14, rdi);
   output [31:0] rdo;
   input	 rm, cpen;
   input [31:0]  up14, rdi;

   initial $monitor($time,,rdo,,rm,cpen,,up14,,rdi);
   assign	 rdo = (rm | cpen) ? up14 : rdi;

 endmodule
module bug (rdo, rm, cpen, up14, rdi);

   output [31:0] rdo;
   input	 rm, cpen;
   input [31:0]  up14, rdi;

   initial $monitor($time,,rdo,,rm,cpen,,up14,,rdi);
   assign	 rdo = (rm | cpen) ? up14 : rdi;

 endmodule