data/full_repos/permissive/407433468/PRJ0_FINAL/rtl/CC_MUX101.v
1: b'%Warning-WIDTH: data/full_repos/permissive/407433468/PRJ0_FINAL/rtl/CC_MUX101.v:52: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s VARREF \'CC_MUX101_data1_InBUS\' generates 8 bits.\n                                                                                  : ... In instance CC_MUX101\n      CC_MUX101_z_Out = CC_MUX101_data1_InBUS;   \n                      ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/407433468/PRJ0_FINAL/rtl/CC_MUX101.v:54: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s VARREF \'CC_MUX101_data2_InBUS\' generates 8 bits.\n                                                                                  : ... In instance CC_MUX101\n      CC_MUX101_z_Out = CC_MUX101_data2_InBUS;  \n                      ^\n%Warning-WIDTH: data/full_repos/permissive/407433468/PRJ0_FINAL/rtl/CC_MUX101.v:56: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s VARREF \'CC_MUX101_data3_InBUS\' generates 8 bits.\n                                                                                  : ... In instance CC_MUX101\n      CC_MUX101_z_Out = CC_MUX101_data3_InBUS;  \n                      ^\n%Warning-WIDTH: data/full_repos/permissive/407433468/PRJ0_FINAL/rtl/CC_MUX101.v:58: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s VARREF \'CC_MUX101_data4_InBUS\' generates 8 bits.\n                                                                                  : ... In instance CC_MUX101\n      CC_MUX101_z_Out = CC_MUX101_data4_InBUS;  \n                      ^\n%Warning-WIDTH: data/full_repos/permissive/407433468/PRJ0_FINAL/rtl/CC_MUX101.v:60: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s VARREF \'CC_MUX101_data5_InBUS\' generates 8 bits.\n                                                                                  : ... In instance CC_MUX101\n      CC_MUX101_z_Out = CC_MUX101_data5_InBUS;  \n                      ^\n%Warning-WIDTH: data/full_repos/permissive/407433468/PRJ0_FINAL/rtl/CC_MUX101.v:62: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s VARREF \'CC_MUX101_data6_InBUS\' generates 8 bits.\n                                                                                  : ... In instance CC_MUX101\n      CC_MUX101_z_Out = CC_MUX101_data6_InBUS;  \n                      ^\n%Warning-WIDTH: data/full_repos/permissive/407433468/PRJ0_FINAL/rtl/CC_MUX101.v:64: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s VARREF \'CC_MUX101_data7_InBUS\' generates 8 bits.\n                                                                                  : ... In instance CC_MUX101\n      CC_MUX101_z_Out = CC_MUX101_data7_InBUS;  \n                      ^\n%Warning-WIDTH: data/full_repos/permissive/407433468/PRJ0_FINAL/rtl/CC_MUX101.v:66: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s VARREF \'CC_MUX101_data8_InBUS\' generates 8 bits.\n                                                                                  : ... In instance CC_MUX101\n      CC_MUX101_z_Out = CC_MUX101_data8_InBUS; \n                      ^\n%Warning-WIDTH: data/full_repos/permissive/407433468/PRJ0_FINAL/rtl/CC_MUX101.v:68: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s VARREF \'CC_MUX101_data9_InBUS\' generates 8 bits.\n                                                                                  : ... In instance CC_MUX101\n      CC_MUX101_z_Out = CC_MUX101_data9_InBUS; \n                      ^\n%Warning-WIDTH: data/full_repos/permissive/407433468/PRJ0_FINAL/rtl/CC_MUX101.v:70: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS\'s VARREF \'CC_MUX101_data10_InBUS\' generates 8 bits.\n                                                                                  : ... In instance CC_MUX101\n      CC_MUX101_z_Out = CC_MUX101_data10_InBUS; \n                      ^\n%Error: Exiting due to 10 warning(s)\n'
module CC_MUX101 #(parameter MUX101_SELECTWIDTH=4,parameter MUX101_DATAWIDTH=8)(

	CC_MUX101_z_Out,

	CC_MUX101_select_InBUS,
	CC_MUX101_data1_InBUS,
	CC_MUX101_data2_InBUS,
    CC_MUX101_data3_InBUS,
	CC_MUX101_data4_InBUS,
    CC_MUX101_data5_InBUS,
	CC_MUX101_data6_InBUS,
    CC_MUX101_data7_InBUS,
	CC_MUX101_data8_InBUS,
	 CC_MUX101_data9_InBUS,
	CC_MUX101_data10_InBUS
);







output	reg CC_MUX101_z_Out;
input 	[MUX101_SELECTWIDTH-1:0]CC_MUX101_select_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data1_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data2_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data3_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data4_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data5_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data6_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data7_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data8_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data9_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data10_InBUS;







always @(CC_MUX101_data1_InBUS or CC_MUX101_select_InBUS or CC_MUX101_data2_InBUS 
        or CC_MUX101_data2_InBUS or  CC_MUX101_data4_InBUS or CC_MUX101_data5_InBUS or 
         CC_MUX101_data6_InBUS or CC_MUX101_data7_InBUS or CC_MUX101_data8_InBUS )
begin
    if( CC_MUX101_select_InBUS == 0)
      CC_MUX101_z_Out = CC_MUX101_data1_InBUS;   
    else if( CC_MUX101_select_InBUS == 1)
      CC_MUX101_z_Out = CC_MUX101_data2_InBUS;  
    else if( CC_MUX101_select_InBUS == 2)
      CC_MUX101_z_Out = CC_MUX101_data3_InBUS;  
    else if( CC_MUX101_select_InBUS == 3)
      CC_MUX101_z_Out = CC_MUX101_data4_InBUS;  
    else if( CC_MUX101_select_InBUS == 4)
      CC_MUX101_z_Out = CC_MUX101_data5_InBUS;  
    else if( CC_MUX101_select_InBUS == 5)
      CC_MUX101_z_Out = CC_MUX101_data6_InBUS;  
    else if( CC_MUX101_select_InBUS == 6)
      CC_MUX101_z_Out = CC_MUX101_data7_InBUS;  
    else if( CC_MUX101_select_InBUS == 7)
      CC_MUX101_z_Out = CC_MUX101_data8_InBUS; 
	else if( CC_MUX101_select_InBUS == 8)
      CC_MUX101_z_Out = CC_MUX101_data9_InBUS; 
	else if( CC_MUX101_select_InBUS == 9)
      CC_MUX101_z_Out = CC_MUX101_data10_InBUS; 
	
    else	
	   CC_MUX101_z_Out = CC_MUX101_z_Out;
end

endmodule
module CC_MUX101 #(parameter MUX101_SELECTWIDTH=4,parameter MUX101_DATAWIDTH=8)(

	CC_MUX101_z_Out,

	CC_MUX101_select_InBUS,
	CC_MUX101_data1_InBUS,
	CC_MUX101_data2_InBUS,
    CC_MUX101_data3_InBUS,
	CC_MUX101_data4_InBUS,
    CC_MUX101_data5_InBUS,
	CC_MUX101_data6_InBUS,
    CC_MUX101_data7_InBUS,
	CC_MUX101_data8_InBUS,
	 CC_MUX101_data9_InBUS,
	CC_MUX101_data10_InBUS
);








output	reg CC_MUX101_z_Out;
input 	[MUX101_SELECTWIDTH-1:0]CC_MUX101_select_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data1_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data2_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data3_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data4_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data5_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data6_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data7_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data8_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data9_InBUS;
input 	[MUX101_DATAWIDTH-1:0] CC_MUX101_data10_InBUS;







always @(CC_MUX101_data1_InBUS or CC_MUX101_select_InBUS or CC_MUX101_data2_InBUS 
        or CC_MUX101_data2_InBUS or  CC_MUX101_data4_InBUS or CC_MUX101_data5_InBUS or 
         CC_MUX101_data6_InBUS or CC_MUX101_data7_InBUS or CC_MUX101_data8_InBUS )
begin
    if( CC_MUX101_select_InBUS == 0)
      CC_MUX101_z_Out = CC_MUX101_data1_InBUS;   
    else if( CC_MUX101_select_InBUS == 1)
      CC_MUX101_z_Out = CC_MUX101_data2_InBUS;  
    else if( CC_MUX101_select_InBUS == 2)
      CC_MUX101_z_Out = CC_MUX101_data3_InBUS;  
    else if( CC_MUX101_select_InBUS == 3)
      CC_MUX101_z_Out = CC_MUX101_data4_InBUS;  
    else if( CC_MUX101_select_InBUS == 4)
      CC_MUX101_z_Out = CC_MUX101_data5_InBUS;  
    else if( CC_MUX101_select_InBUS == 5)
      CC_MUX101_z_Out = CC_MUX101_data6_InBUS;  
    else if( CC_MUX101_select_InBUS == 6)
      CC_MUX101_z_Out = CC_MUX101_data7_InBUS;  
    else if( CC_MUX101_select_InBUS == 7)
      CC_MUX101_z_Out = CC_MUX101_data8_InBUS; 
	else if( CC_MUX101_select_InBUS == 8)
      CC_MUX101_z_Out = CC_MUX101_data9_InBUS; 
	else if( CC_MUX101_select_InBUS == 9)
      CC_MUX101_z_Out = CC_MUX101_data10_InBUS; 
	
    else	
	   CC_MUX101_z_Out = CC_MUX101_z_Out;
end

endmodule