data/full_repos/permissive/433621701/generic_CB_array/generic_CB_array.v
data/verilator_xmls/fd06e278-bb93-4e8c-8afc-57a7fd90af91.xml
module Full_Adder_LR_three_in(input a, and_value, b, carry_in, output reg sum, carry_out);
    always @(a or b or and_value or carry_in)
    begin
        sum = a ^ (b&and_value) ^ carry_in;
        carry_out = a & (b&and_value) | (a^(b&and_value)) & carry_in;
    end
endmodule
module Full_Adder_LR_three_in(input a, and_value, b, carry_in, output reg sum, carry_out);

    always @(a or b or and_value or carry_in)
    begin
        sum = a ^ (b&and_value) ^ carry_in;
        carry_out = a & (b&and_value) | (a^(b&and_value)) & carry_in;
    end
endmodule