data/full_repos/permissive/424312442/lab_6_digital clock/sources_1/new/clock.v
1: b'%Error: Cannot find file containing module: clock/sources_1/new,data/full_repos/permissive/424312442\n        ... Looked in:\n             data/full_repos/permissive/424312442/lab_6_digital/clock/sources_1/new,data/full_repos/permissive/424312442\n             data/full_repos/permissive/424312442/lab_6_digital/clock/sources_1/new,data/full_repos/permissive/424312442.v\n             data/full_repos/permissive/424312442/lab_6_digital/clock/sources_1/new,data/full_repos/permissive/424312442.sv\n             clock/sources_1/new,data/full_repos/permissive/424312442\n             clock/sources_1/new,data/full_repos/permissive/424312442.v\n             clock/sources_1/new,data/full_repos/permissive/424312442.sv\n             obj_dir/clock/sources_1/new,data/full_repos/permissive/424312442\n             obj_dir/clock/sources_1/new,data/full_repos/permissive/424312442.v\n             obj_dir/clock/sources_1/new,data/full_repos/permissive/424312442.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/424312442/lab_6_digital\n%Error: Cannot find file containing module: clock/sources_1/new/clock.v\n%Error: Exiting due to 3 error(s)\n'
module bcd_to_sevseg(BCD, segN);
input [3:0] BCD;
output [7:0] segN;

reg [7:0] segN;

always @(BCD) begin
    if (BCD == 4'b0000) segN <= 7'b1000000;
    else if (BCD == 4'b0001) segN <= 7'b1111001;
    else if (BCD == 4'b0010) segN <= 7'b0100100;
    else if (BCD == 4'b0011) segN <= 7'b0110000;
    else if (BCD == 4'b0100) segN <= 7'b0011001;
    else if (BCD == 4'b0101) segN <= 7'b0010010;
    else if (BCD == 4'b0110) segN <= 7'b0000010;
    else if (BCD == 4'b0111) segN <= 7'b1111000;
    else if (BCD == 4'b1000) segN <= 7'b0000000;
    else if (BCD == 4'b1001) segN <= 7'b0010000;
    else segN <= 7'b1111111;
end
endmodule
module bcd_to_sevseg(BCD, segN);

input [3:0] BCD;
output [7:0] segN;

reg [7:0] segN;

always @(BCD) begin
    if (BCD == 4'b0000) segN <= 7'b1000000;
    else if (BCD == 4'b0001) segN <= 7'b1111001;
    else if (BCD == 4'b0010) segN <= 7'b0100100;
    else if (BCD == 4'b0011) segN <= 7'b0110000;
    else if (BCD == 4'b0100) segN <= 7'b0011001;
    else if (BCD == 4'b0101) segN <= 7'b0010010;
    else if (BCD == 4'b0110) segN <= 7'b0000010;
    else if (BCD == 4'b0111) segN <= 7'b1111000;
    else if (BCD == 4'b1000) segN <= 7'b0000000;
    else if (BCD == 4'b1001) segN <= 7'b0010000;
    else segN <= 7'b1111111;
end
endmodule