data/full_repos/permissive/47573604/uart-tx/examples/txchar/txchar.v
1: b'%Error: data/full_repos/permissive/47573604/uart-tx/examples/txchar/txchar.v:13: Cannot find include file: baudgen.vh\n`include "baudgen.vh" \n         ^~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/47573604/uart-tx/examples/txchar,data/full_repos/permissive/47573604/baudgen.vh\n             data/full_repos/permissive/47573604/uart-tx/examples/txchar,data/full_repos/permissive/47573604/baudgen.vh.v\n             data/full_repos/permissive/47573604/uart-tx/examples/txchar,data/full_repos/permissive/47573604/baudgen.vh.sv\n             baudgen.vh\n             baudgen.vh.v\n             baudgen.vh.sv\n             obj_dir/baudgen.vh\n             obj_dir/baudgen.vh.v\n             obj_dir/baudgen.vh.sv\n%Error: data/full_repos/permissive/47573604/uart-tx/examples/txchar/txchar.v:24: Define or directive not defined: \'`B115200\'\n    .BAUDRATE(`B115200)   \n              ^~~~~~~~\n%Error: Exiting due to 2 error(s)\n'
module txchar (
          input wire clk,
          input wire rstn,
          output wire tx
);


uart_tx #(
    .BAUDRATE(`B115200)

  ) TX0 (
    .clk(clk),
    .rstn(rstn),
    .data("A"),
    .start(1'b1),
    .tx(tx)
);


endmodule
module txchar (
          input wire clk,
          input wire rstn,
          output wire tx
);



uart_tx #(
    .BAUDRATE(`B115200)

  ) TX0 (
    .clk(clk),
    .rstn(rstn),
    .data("A"),
    .start(1'b1),
    .tx(tx)
);


endmodule