data/full_repos/permissive/456424671/Design_files/GRAY_CNT2.v
1: b"%Error: data/full_repos/permissive/456424671/Design_files/GRAY_CNT2.v:16: Cannot find file containing module: 'bin_gray'\n bin_gray DUT1  ( .b_in(d_in) , .g_out(g_nEXT) );\n ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/456424671/Design_files,data/full_repos/permissive/456424671/bin_gray\n             data/full_repos/permissive/456424671/Design_files,data/full_repos/permissive/456424671/bin_gray.v\n             data/full_repos/permissive/456424671/Design_files,data/full_repos/permissive/456424671/bin_gray.sv\n             bin_gray\n             bin_gray.v\n             bin_gray.sv\n             obj_dir/bin_gray\n             obj_dir/bin_gray.v\n             obj_dir/bin_gray.sv\n%Error: data/full_repos/permissive/456424671/Design_files/GRAY_CNT2.v:17: Cannot find file containing module: 'gray_bin'\n gray_bin DUT2 ( .g_in(gray_out) , .b_out(bin_out));\n ^~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module GRAY_CNT2  
#(parameter DATA_WIDTH = 4)
( i_clk , gray_out , rst_n   );

input i_clk ;
input rst_n ;
output reg [DATA_WIDTH-1:0] gray_out ;


wire [DATA_WIDTH-1:0] d_in;      
wire [DATA_WIDTH-1:0] g_nEXT ;
wire [DATA_WIDTH-1:0] bin_out ; 

 bin_gray DUT1  ( .b_in(d_in) , .g_out(g_nEXT) );
 gray_bin DUT2 ( .g_in(gray_out) , .b_out(bin_out));
 
 
 
 assign d_in = 1'b1 + bin_out ;


 
 always @ (posedge i_clk )
   begin
	    if (~rst_n)
		  begin
		    gray_out <= 4'b0000;
			  end
	else
       begin
		 gray_out <= g_nEXT ;
		  end
		   end
		

endmodule
module GRAY_CNT2  
#(parameter DATA_WIDTH = 4)
( i_clk , gray_out , rst_n   );


input i_clk ;
input rst_n ;
output reg [DATA_WIDTH-1:0] gray_out ;


wire [DATA_WIDTH-1:0] d_in;      
wire [DATA_WIDTH-1:0] g_nEXT ;
wire [DATA_WIDTH-1:0] bin_out ; 

 bin_gray DUT1  ( .b_in(d_in) , .g_out(g_nEXT) );
 gray_bin DUT2 ( .g_in(gray_out) , .b_out(bin_out));
 
 
 
 assign d_in = 1'b1 + bin_out ;


 
 always @ (posedge i_clk )
   begin
	    if (~rst_n)
		  begin
		    gray_out <= 4'b0000;
			  end
	else
       begin
		 gray_out <= g_nEXT ;
		  end
		   end
		

endmodule