data/full_repos/permissive/497604366/cpu/cpu.srcs/sources_1/new/immediate_extender.v
data/verilator_xmls/49e9a22d-6e53-4562-91e1-e008ebb0ff32.xml
module immediate_extender(
    input [15:0] imm,
    output reg [31:0] imm32
    );
    
    always @(*) begin
        imm32 <= {imm,16'b0000000000000000} >>> 16;
    end
endmodule
module immediate_extender(
    input [15:0] imm,
    output reg [31:0] imm32
    );

    
    always @(*) begin
        imm32 <= {imm,16'b0000000000000000} >>> 16;
    end
endmodule