data/full_repos/permissive/502540587/TestBench/GPUBoard.v
1: b"%Error: data/full_repos/permissive/502540587/TestBench/GPUBoard.v:23: Cannot find file containing module: 'clk_div'\n    clk_div clocker(\n    ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/502540587/TestBench,data/full_repos/permissive/502540587/clk_div\n             data/full_repos/permissive/502540587/TestBench,data/full_repos/permissive/502540587/clk_div.v\n             data/full_repos/permissive/502540587/TestBench,data/full_repos/permissive/502540587/clk_div.sv\n             clk_div\n             clk_div.v\n             clk_div.sv\n             obj_dir/clk_div\n             obj_dir/clk_div.v\n             obj_dir/clk_div.sv\n%Error: data/full_repos/permissive/502540587/TestBench/GPUBoard.v:51: Cannot find file containing module: 'GPUTop'\n    GPUTop gpu(\n    ^~~~~~\n%Error: Exiting due to 2 error(s)\n"
module GPUBoard (
    input wire clk,
    input wire reset,

    output wire cs_n,
    input wire sdi,
    output wire sdo,
    output wire wp_n,
    output wire hld_n,

    output wire [3:0] oRed,
    output wire [3:0] oGreen,
    output wire [3:0] oBlue,
    output wire oHs,
    output wire oVs
);

    wire clk_100MHz;
    wire clk_vga;
    wire clk_50MHz;

    wire wb_ack;
    clk_div clocker(
        .clk_out1(clk_100MHz),
        .clk_out2(clk_vga),
        .clk_out3(clk_50MHz),

        .clk_in1(clk)
    );

    wire vram_we;
    wire[26:0] vram_addr;
    wire[31:0] vram_data;

















    GPUTop gpu(
        .clk_100MHz(clk_100MHz),
        .reset_n(~reset),

        .wb_we_i(0),
        .wb_sel_i(4'hf),
        .wb_adr_i(0),
        .wb_dat_i(0),
        .wb_ack_o(wb_ack),
        .wb_cyc_i(0),
        .wb_stb_i(0),

        .clk_vga(clk_vga),

        .oRed(oRed),
        .oBlue(oBlue),
        .oGreen(oGreen),
        .oHs(oHs),
        .oVs(oVs)
    );
endmodule
module GPUBoard (
    input wire clk,
    input wire reset,

    output wire cs_n,
    input wire sdi,
    output wire sdo,
    output wire wp_n,
    output wire hld_n,

    output wire [3:0] oRed,
    output wire [3:0] oGreen,
    output wire [3:0] oBlue,
    output wire oHs,
    output wire oVs
);


    wire clk_100MHz;
    wire clk_vga;
    wire clk_50MHz;

    wire wb_ack;
    clk_div clocker(
        .clk_out1(clk_100MHz),
        .clk_out2(clk_vga),
        .clk_out3(clk_50MHz),

        .clk_in1(clk)
    );

    wire vram_we;
    wire[26:0] vram_addr;
    wire[31:0] vram_data;

















    GPUTop gpu(
        .clk_100MHz(clk_100MHz),
        .reset_n(~reset),

        .wb_we_i(0),
        .wb_sel_i(4'hf),
        .wb_adr_i(0),
        .wb_dat_i(0),
        .wb_ack_o(wb_ack),
        .wb_cyc_i(0),
        .wb_stb_i(0),

        .clk_vga(clk_vga),

        .oRed(oRed),
        .oBlue(oBlue),
        .oGreen(oGreen),
        .oHs(oHs),
        .oVs(oVs)
    );
endmodule