data/full_repos/permissive/521337848/Hardware/SPISD/spi.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/521337848/Hardware/SPISD/spi.v:141: Multiple top level modules\n                                                                                : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                : ... Top module \'spi\'\nmodule spi(\n       ^~~\n                                                                                : ... Top module \'dclkb\'\nmodule dclkb(\n       ^~~~~\n%Error: Exiting due to 1 warning(s)\n'
module buffspi(
	input clk,
	input rst,
	
	input[7:0] in,
	output reg[7:0] b_in,
	
	input start,
	output reg b_start
);

always@(posedge clk or posedge rst)begin
	if(rst)begin
		b_in <= 0;
		b_start <= 0;
	end
	else begin
		b_in <= in;
		b_start <= start;
	end
end


endmodule
module buffspi(
	input clk,
	input rst,
	
	input[7:0] in,
	output reg[7:0] b_in,
	
	input start,
	output reg b_start
);


always@(posedge clk or posedge rst)begin
	if(rst)begin
		b_in <= 0;
		b_start <= 0;
	end
	else begin
		b_in <= in;
		b_start <= start;
	end
end


endmodule