data/full_repos/permissive/482975152/PipelinedProcessor.srcs/sources_1/new/PCAdder.v
data/verilator_xmls/fd5da12b-30b5-407f-9123-d4bca34d870e.xml
module PCAdder(
    input [31:0] PCOld,
    output [31:0] PCNew
    );
    
    assign PCNew = PCOld + 1;
endmodule
module PCAdder(
    input [31:0] PCOld,
    output [31:0] PCNew
    );

    
    assign PCNew = PCOld + 1;
endmodule