data/full_repos/permissive/489147019/Testcases/mempool/rtl/tech_cells_generic/src/deprecated/pulp_clk_cells.sv
1: b'%Warning-MULTITOP: data/full_repos/permissive/489147019/Testcases/mempool/rtl/tech_cells_generic/src/deprecated/pulp_clk_cells.sv:25: Multiple top level modules\n                                                                                                                                    : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                                                                    : ... Top module \'pulp_clock_and2\'\nmodule pulp_clock_and2 (\n       ^~~~~~~~~~~~~~~\n                                                                                                                                    : ... Top module \'pulp_clock_buffer\'\nmodule pulp_clock_buffer (\n       ^~~~~~~~~~~~~~~~~\n                                                                                                                                    : ... Top module \'pulp_clock_gating\'\nmodule pulp_clock_gating (\n       ^~~~~~~~~~~~~~~~~\n                                                                                                                                    : ... Top module \'pulp_clock_inverter\'\nmodule pulp_clock_inverter (\n       ^~~~~~~~~~~~~~~~~~~\n                                                                                                                                    : ... Top module \'pulp_clock_mux2\'\nmodule pulp_clock_mux2 (\n       ^~~~~~~~~~~~~~~\n                                                                                                                                    : ... Top module \'pulp_clock_xor2\'\nmodule pulp_clock_xor2 (\n       ^~~~~~~~~~~~~~~\n                                                                                                                                    : ... Top module \'pulp_clock_delay\'\nmodule pulp_clock_delay(\n       ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/489147019/Testcases/mempool/rtl/tech_cells_generic/src/deprecated/pulp_clk_cells.sv:88: Cannot find file containing module: \'tc_clk_xor2\'\n  tc_clk_xor2 i_tc_clk_xor2 (\n  ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/489147019/Testcases/mempool/rtl/tech_cells_generic/src/deprecated,data/full_repos/permissive/489147019/tc_clk_xor2\n             data/full_repos/permissive/489147019/Testcases/mempool/rtl/tech_cells_generic/src/deprecated,data/full_repos/permissive/489147019/tc_clk_xor2.v\n             data/full_repos/permissive/489147019/Testcases/mempool/rtl/tech_cells_generic/src/deprecated,data/full_repos/permissive/489147019/tc_clk_xor2.sv\n             tc_clk_xor2\n             tc_clk_xor2.v\n             tc_clk_xor2.sv\n             obj_dir/tc_clk_xor2\n             obj_dir/tc_clk_xor2.v\n             obj_dir/tc_clk_xor2.sv\n%Error: data/full_repos/permissive/489147019/Testcases/mempool/rtl/tech_cells_generic/src/deprecated/pulp_clk_cells.sv:73: Cannot find file containing module: \'tc_clk_mux2\'\n  tc_clk_mux2 i_tc_clk_mux2 (\n  ^~~~~~~~~~~\n%Error: data/full_repos/permissive/489147019/Testcases/mempool/rtl/tech_cells_generic/src/deprecated/pulp_clk_cells.sv:59: Cannot find file containing module: \'tc_clk_inverter\'\n  tc_clk_inverter i_tc_clk_inverter (\n  ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/489147019/Testcases/mempool/rtl/tech_cells_generic/src/deprecated/pulp_clk_cells.sv:45: Cannot find file containing module: \'tc_clk_gating\'\n  tc_clk_gating i_tc_clk_gating (\n  ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/489147019/Testcases/mempool/rtl/tech_cells_generic/src/deprecated/pulp_clk_cells.sv:30: Cannot find file containing module: \'tc_clk_buffer\'\n  tc_clk_buffer i_tc_clk_buffer (\n  ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/489147019/Testcases/mempool/rtl/tech_cells_generic/src/deprecated/pulp_clk_cells.sv:17: Cannot find file containing module: \'tc_clk_and2\'\n  tc_clk_and2 i_tc_clk_and2 (\n  ^~~~~~~~~~~\n%Error: Exiting due to 6 error(s), 1 warning(s)\n'
module pulp_clock_inverter (
  input  logic clk_i,
  output logic clk_o
);

  tc_clk_inverter i_tc_clk_inverter (
    .clk_i,
    .clk_o
  );

endmodule
module pulp_clock_inverter (
  input  logic clk_i,
  output logic clk_o
);


  tc_clk_inverter i_tc_clk_inverter (
    .clk_i,
    .clk_o
  );

endmodule