data/full_repos/permissive/494696040/processor.v
1: b"%Error: data/full_repos/permissive/494696040/processor.v:35: Cannot find file containing module: 'Instruction_Fetch_Module'\n    Instruction_Fetch_Module instruction_fetch_module(RESET, CLK, PC_in, Instruction, adder_output);\n    ^~~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/494696040,data/full_repos/permissive/494696040/Instruction_Fetch_Module\n             data/full_repos/permissive/494696040,data/full_repos/permissive/494696040/Instruction_Fetch_Module.v\n             data/full_repos/permissive/494696040,data/full_repos/permissive/494696040/Instruction_Fetch_Module.sv\n             Instruction_Fetch_Module\n             Instruction_Fetch_Module.v\n             Instruction_Fetch_Module.sv\n             obj_dir/Instruction_Fetch_Module\n             obj_dir/Instruction_Fetch_Module.v\n             obj_dir/Instruction_Fetch_Module.sv\n%Error: data/full_repos/permissive/494696040/processor.v:40: Cannot find file containing module: 'Control'\n    Control control(Instruction[31:26], RegDst, Jump, Branch, MemRead, MemtoReg, ALUOp, memWrite, ALUSrc, RegWrite);\n    ^~~~~~~\n%Error: data/full_repos/permissive/494696040/processor.v:46: Cannot find file containing module: 'mux_2_to_1_5bit'\n    mux_2_to_1_5bit mux_5bit_1(Instruction[20:16], Instruction[15:11], RegDst, mux_to_write_reg);\n    ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/494696040/processor.v:53: Cannot find file containing module: 'Register_File'\n    Register_File register_file(Instruction[25:21], Instruction[20:16], mux_to_write_reg, mux_to_write_data, RegWrite, CLK, read_data_1_to_ALU, read_data_2);\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/494696040/processor.v:57: Cannot find file containing module: 'Sign_Extension'\n    Sign_Extension sign_extension(Instruction[15:0], sign_ext_out);\n    ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/494696040/processor.v:61: Cannot find file containing module: 'mux_2_to_1_32bit'\n    mux_2_to_1_32bit mux_32bit_1(read_data_2, sign_ext_out, ALUSrc, mux_to_ALU);\n    ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/494696040/processor.v:65: Cannot find file containing module: 'ALU_control'\n    ALU_control alu_control(Instruction[5:0], ALUOp, ALU_operation);\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/494696040/processor.v:71: Cannot find file containing module: 'ALU'\n    ALU alu(read_data_1_to_ALU, mux_to_ALU, ALU_result, ALU_operation, ALU_zero);\n    ^~~\n%Error: data/full_repos/permissive/494696040/processor.v:76: Cannot find file containing module: 'data_memory'\n    data_memory data_mem(ALU_result, read_data_2, memWrite, MemRead, CLK, Read_data_mem);\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/494696040/processor.v:80: Cannot find file containing module: 'mux_2_to_1_32bit'\n    mux_2_to_1_32bit mux_32bit_2(ALU_result, Read_data_mem, MemtoReg, mux_to_write_data);\n    ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/494696040/processor.v:87: Cannot find file containing module: 'Adder_with_left_shift'\n    Adder_with_left_shift adder_with_left_shift(adder_output, sign_ext_out, branch_target);\n    ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/494696040/processor.v:94: Cannot find file containing module: 'mux_2_to_1_32bit'\n    mux_2_to_1_32bit mux_32bit_3(adder_output, branch_target, branch_control, mux_3_out);\n    ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/494696040/processor.v:101: Cannot find file containing module: 'left_shift_for_jump'\n    left_shift_for_jump left_shift_jump(Instruction[25:0], adder_output[31:28], Jump_Address);\n    ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/494696040/processor.v:105: Cannot find file containing module: 'mux_2_to_1_32bit'\n    mux_2_to_1_32bit mux_32bit_4(mux_3_out, Jump_Address, Jump, PC_in);\n    ^~~~~~~~~~~~~~~~\n%Error: Exiting due to 14 error(s)\n"
module processor(
    input wire CLK,
    input wire RESET
    );
    

    


    wire [31:0] PC_in;
    wire [31:0] adder_output;
    wire [31:0] Instruction;
    Instruction_Fetch_Module instruction_fetch_module(RESET, CLK, PC_in, Instruction, adder_output);
    

    wire RegDst, Jump, Branch, MemRead, MemtoReg, memWrite, ALUSrc, RegWrite;
    wire [1:0] ALUOp;
    Control control(Instruction[31:26], RegDst, Jump, Branch, MemRead, MemtoReg, ALUOp, memWrite, ALUSrc, RegWrite);
    



    wire [4:0] mux_to_write_reg;
    mux_2_to_1_5bit mux_5bit_1(Instruction[20:16], Instruction[15:11], RegDst, mux_to_write_reg);
    


    wire [31:0] mux_to_write_data;
    wire [31:0] read_data_1_to_ALU;
    wire [31:0] read_data_2;
    Register_File register_file(Instruction[25:21], Instruction[20:16], mux_to_write_reg, mux_to_write_data, RegWrite, CLK, read_data_1_to_ALU, read_data_2);
    

    wire [31:0] sign_ext_out;
    Sign_Extension sign_extension(Instruction[15:0], sign_ext_out);
    

    wire [31:0] mux_to_ALU;
    mux_2_to_1_32bit mux_32bit_1(read_data_2, sign_ext_out, ALUSrc, mux_to_ALU);
    

    wire [3:0] ALU_operation;
    ALU_control alu_control(Instruction[5:0], ALUOp, ALU_operation);
    


    wire [31:0] ALU_result;
    wire ALU_zero;
    ALU alu(read_data_1_to_ALU, mux_to_ALU, ALU_result, ALU_operation, ALU_zero);
    


    wire [31:0] Read_data_mem;
    data_memory data_mem(ALU_result, read_data_2, memWrite, MemRead, CLK, Read_data_mem);
    


    mux_2_to_1_32bit mux_32bit_2(ALU_result, Read_data_mem, MemtoReg, mux_to_write_data);
    




    wire [31:0] branch_target;
    Adder_with_left_shift adder_with_left_shift(adder_output, sign_ext_out, branch_target);
    


    wire [31:0] mux_3_out;
    wire branch_control;
    assign branch_control = Branch & ALU_zero;
    mux_2_to_1_32bit mux_32bit_3(adder_output, branch_target, branch_control, mux_3_out);





    wire [31:0] Jump_Address;
    left_shift_for_jump left_shift_jump(Instruction[25:0], adder_output[31:28], Jump_Address);
    


    mux_2_to_1_32bit mux_32bit_4(mux_3_out, Jump_Address, Jump, PC_in);

endmodule
module processor(
    input wire CLK,
    input wire RESET
    );

    

    


    wire [31:0] PC_in;
    wire [31:0] adder_output;
    wire [31:0] Instruction;
    Instruction_Fetch_Module instruction_fetch_module(RESET, CLK, PC_in, Instruction, adder_output);
    

    wire RegDst, Jump, Branch, MemRead, MemtoReg, memWrite, ALUSrc, RegWrite;
    wire [1:0] ALUOp;
    Control control(Instruction[31:26], RegDst, Jump, Branch, MemRead, MemtoReg, ALUOp, memWrite, ALUSrc, RegWrite);
    



    wire [4:0] mux_to_write_reg;
    mux_2_to_1_5bit mux_5bit_1(Instruction[20:16], Instruction[15:11], RegDst, mux_to_write_reg);
    


    wire [31:0] mux_to_write_data;
    wire [31:0] read_data_1_to_ALU;
    wire [31:0] read_data_2;
    Register_File register_file(Instruction[25:21], Instruction[20:16], mux_to_write_reg, mux_to_write_data, RegWrite, CLK, read_data_1_to_ALU, read_data_2);
    

    wire [31:0] sign_ext_out;
    Sign_Extension sign_extension(Instruction[15:0], sign_ext_out);
    

    wire [31:0] mux_to_ALU;
    mux_2_to_1_32bit mux_32bit_1(read_data_2, sign_ext_out, ALUSrc, mux_to_ALU);
    

    wire [3:0] ALU_operation;
    ALU_control alu_control(Instruction[5:0], ALUOp, ALU_operation);
    


    wire [31:0] ALU_result;
    wire ALU_zero;
    ALU alu(read_data_1_to_ALU, mux_to_ALU, ALU_result, ALU_operation, ALU_zero);
    


    wire [31:0] Read_data_mem;
    data_memory data_mem(ALU_result, read_data_2, memWrite, MemRead, CLK, Read_data_mem);
    


    mux_2_to_1_32bit mux_32bit_2(ALU_result, Read_data_mem, MemtoReg, mux_to_write_data);
    




    wire [31:0] branch_target;
    Adder_with_left_shift adder_with_left_shift(adder_output, sign_ext_out, branch_target);
    


    wire [31:0] mux_3_out;
    wire branch_control;
    assign branch_control = Branch & ALU_zero;
    mux_2_to_1_32bit mux_32bit_3(adder_output, branch_target, branch_control, mux_3_out);





    wire [31:0] Jump_Address;
    left_shift_for_jump left_shift_jump(Instruction[25:0], adder_output[31:28], Jump_Address);
    


    mux_2_to_1_32bit mux_32bit_4(mux_3_out, Jump_Address, Jump, PC_in);

endmodule