data/full_repos/permissive/519536489/02_Vectors/08_Replication_operator.v
data/verilator_xmls/fc576d86-de5b-4c09-8e7e-555b80c373ff.xml
module top_module (
    input [7:0] in,
    output [31:0] out 
    );
    assign out = {{24{in[7]}},in[7:0]};
endmodule
module top_module (
    input [7:0] in,
    output [31:0] out 
    );

    assign out = {{24{in[7]}},in[7:0]};
endmodule