data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v
1: b'%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:27: Cannot find include file: sys.h\n`include "sys.h" \n         ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/sys.h\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/sys.h.v\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/sys.h.sv\n             sys.h\n             sys.h.v\n             sys.h.sv\n             obj_dir/sys.h\n             obj_dir/sys.h.v\n             obj_dir/sys.h.sv\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:28: Cannot find include file: iop.h\n`include "iop.h" \n         ^~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:29: Cannot find include file: ctu.h\n`include "ctu.h" \n         ^~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:117: Define or directive not defined: \'`IOB_CLK_WIDTH\'\ninput [`IOB_CLK_WIDTH-1:0]iob_clsp_data;  \n       ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:161: Define or directive not defined: \'`CLK_IOB_WIDTH\'\noutput [`CLK_IOB_WIDTH-1:0]clsp_iob_data;  \n        ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:271: Define or directive not defined: \'`UCB_BUF_HI\'\nwire [`UCB_BUF_HI-`UCB_BUF_LO:0]clsp_ucb_buf_id_out; \n      ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:271: Define or directive not defined: \'`UCB_BUF_LO\'\nwire [`UCB_BUF_HI-`UCB_BUF_LO:0]clsp_ucb_buf_id_out; \n                  ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:271: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nwire [`UCB_BUF_HI-`UCB_BUF_LO:0]clsp_ucb_buf_id_out; \n                             ^\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:275: Define or directive not defined: \'`UCB_THR_HI\'\nwire [`UCB_THR_HI-`UCB_THR_LO:0]clsp_ucb_thr_id_out; \n      ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:275: Define or directive not defined: \'`UCB_THR_LO\'\nwire [`UCB_THR_HI-`UCB_THR_LO:0]clsp_ucb_thr_id_out; \n                  ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:275: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nwire [`UCB_THR_HI-`UCB_THR_LO:0]clsp_ucb_thr_id_out; \n                             ^\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:460: Define or directive not defined: \'`CCTRLSM_MAX_ST\'\nwire [`CCTRLSM_MAX_ST-1:0]stop_id_decoded;  \n      ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:465: Define or directive not defined: \'`UCB_ADDR_HI\'\nwire [`UCB_ADDR_HI-`UCB_ADDR_LO:0]ucb_clsp_addr_in; \n      ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:465: Define or directive not defined: \'`UCB_ADDR_LO\'\nwire [`UCB_ADDR_HI-`UCB_ADDR_LO:0]ucb_clsp_addr_in; \n                   ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:465: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nwire [`UCB_ADDR_HI-`UCB_ADDR_LO:0]ucb_clsp_addr_in; \n                               ^\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:466: Define or directive not defined: \'`UCB_BUF_HI\'\nwire [`UCB_BUF_HI-`UCB_BUF_LO:0]ucb_clsp_buf_id_in; \n      ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:466: Define or directive not defined: \'`UCB_BUF_LO\'\nwire [`UCB_BUF_HI-`UCB_BUF_LO:0]ucb_clsp_buf_id_in; \n                  ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:466: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nwire [`UCB_BUF_HI-`UCB_BUF_LO:0]ucb_clsp_buf_id_in; \n                             ^\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:467: Define or directive not defined: \'`UCB_DATA_HI\'\nwire [`UCB_DATA_HI-`UCB_DATA_LO:0]ucb_clsp_data_in; \n      ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:467: Define or directive not defined: \'`UCB_DATA_LO\'\nwire [`UCB_DATA_HI-`UCB_DATA_LO:0]ucb_clsp_data_in; \n                   ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:467: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nwire [`UCB_DATA_HI-`UCB_DATA_LO:0]ucb_clsp_data_in; \n                               ^\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:469: Define or directive not defined: \'`UCB_THR_HI\'\nwire [`UCB_THR_HI-`UCB_THR_LO:0]ucb_clsp_thr_id_in; \n      ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:469: Define or directive not defined: \'`UCB_THR_LO\'\nwire [`UCB_THR_HI-`UCB_THR_LO:0]ucb_clsp_thr_id_in; \n                  ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:469: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nwire [`UCB_THR_HI-`UCB_THR_LO:0]ucb_clsp_thr_id_in; \n                             ^\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:927: Define or directive not defined: \'`IOB_CLK_WIDTH\'\n       ucb_noflow  #(`IOB_CLK_WIDTH,`CLK_IOB_WIDTH,64)  \n                     ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:927: Define or directive not defined: \'`CLK_IOB_WIDTH\'\n       ucb_noflow  #(`IOB_CLK_WIDTH,`CLK_IOB_WIDTH,64)  \n                                    ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:933: Define or directive not defined: \'`UCB_THR_HI\'\n          .thr_id_in(ucb_clsp_thr_id_in[`UCB_THR_HI-`UCB_THR_LO:0]),  \n                                        ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:933: Define or directive not defined: \'`UCB_THR_LO\'\n          .thr_id_in(ucb_clsp_thr_id_in[`UCB_THR_HI-`UCB_THR_LO:0]),  \n                                                    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:933: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\n          .thr_id_in(ucb_clsp_thr_id_in[`UCB_THR_HI-`UCB_THR_LO:0]),  \n                                                               ^\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:934: Define or directive not defined: \'`UCB_BUF_HI\'\n          .buf_id_in(ucb_clsp_buf_id_in[`UCB_BUF_HI-`UCB_BUF_LO:0]),  \n                                        ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:934: Define or directive not defined: \'`UCB_BUF_LO\'\n          .buf_id_in(ucb_clsp_buf_id_in[`UCB_BUF_HI-`UCB_BUF_LO:0]),  \n                                                    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:936: Define or directive not defined: \'`UCB_ADDR_HI\'\n          .addr_in (ucb_clsp_addr_in[`UCB_ADDR_HI-`UCB_ADDR_LO:0]),  \n                                     ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:936: Define or directive not defined: \'`UCB_ADDR_LO\'\n          .addr_in (ucb_clsp_addr_in[`UCB_ADDR_HI-`UCB_ADDR_LO:0]),  \n                                                  ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:937: Define or directive not defined: \'`UCB_DATA_HI\'\n          .data_in (ucb_clsp_data_in[`UCB_DATA_HI-`UCB_DATA_LO:0]),  \n                                     ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:937: Define or directive not defined: \'`UCB_DATA_LO\'\n          .data_in (ucb_clsp_data_in[`UCB_DATA_HI-`UCB_DATA_LO:0]),  \n                                                  ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:940: Define or directive not defined: \'`CLK_IOB_WIDTH\'\n          .ucb_iob_data(clsp_iob_data[`CLK_IOB_WIDTH-1:0]),  \n                                      ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:945: Define or directive not defined: \'`IOB_CLK_WIDTH\'\n          .iob_ucb_data(iob_clsp_data[`IOB_CLK_WIDTH-1:0]),  \n                                      ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:948: Define or directive not defined: \'`UCB_THR_HI\'\n          .thr_id_out(clsp_ucb_thr_id_out[`UCB_THR_HI-`UCB_THR_LO:0]),  \n                                          ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:948: Define or directive not defined: \'`UCB_THR_LO\'\n          .thr_id_out(clsp_ucb_thr_id_out[`UCB_THR_HI-`UCB_THR_LO:0]),  \n                                                      ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:949: Define or directive not defined: \'`UCB_BUF_HI\'\n          .buf_id_out(clsp_ucb_buf_id_out[`UCB_BUF_HI-`UCB_BUF_LO:0]),  \n                                          ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:949: Define or directive not defined: \'`UCB_BUF_LO\'\n          .buf_id_out(clsp_ucb_buf_id_out[`UCB_BUF_HI-`UCB_BUF_LO:0]),  \n                                                      ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:953: Define or directive not defined: \'`UCB_PKT_HI\'\n          .int_typ ({`UCB_PKT_HI-`UCB_PKT_LO+1{1\'b0}}),  \n                     ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:953: Define or directive not defined: \'`UCB_PKT_LO\'\n          .int_typ ({`UCB_PKT_HI-`UCB_PKT_LO+1{1\'b0}}),  \n                                 ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:954: Define or directive not defined: \'`UCB_THR_HI\'\n          .int_thr_id({`UCB_THR_HI-`UCB_THR_LO+1{1\'b0}}),  \n                       ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:954: Define or directive not defined: \'`UCB_THR_LO\'\n          .int_thr_id({`UCB_THR_HI-`UCB_THR_LO+1{1\'b0}}),  \n                                   ^~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:955: Define or directive not defined: \'`UCB_INT_DEV_HI\'\n          .dev_id ({`UCB_INT_DEV_HI-`UCB_INT_DEV_LO+1{1\'b0}}),  \n                    ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:955: Define or directive not defined: \'`UCB_INT_DEV_LO\'\n          .dev_id ({`UCB_INT_DEV_HI-`UCB_INT_DEV_LO+1{1\'b0}}),  \n                                    ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:956: Define or directive not defined: \'`UCB_INT_STAT_HI\'\n          .int_stat({`UCB_INT_STAT_HI-`UCB_INT_STAT_LO+1{1\'b0}}),  \n                     ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:956: Define or directive not defined: \'`UCB_INT_STAT_LO\'\n          .int_stat({`UCB_INT_STAT_HI-`UCB_INT_STAT_LO+1{1\'b0}}),  \n                                      ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp.v:957: Define or directive not defined: \'`UCB_INT_VEC_HI\'\n          .int_vec ({`UCB_INT_VEC_HI-`UCB_INT_VEC_LO+1{1\'b0}}),  \n                     ^~~~~~~~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
module ctu_clsp(

pll_reset_ref_l, jbus_grst_out_l, jbus_gdbginit_out_l, jbus_gclk_out, 
jbus_gclk_dup_out, jbus_arst_l, jbus_adbginit_l, dram_grst_out_l, 
dram_gdbginit_out_l, dram_gclk_out, dram_arst_l, dram_adbginit_l, 
ctu_tst_pre_grst_l, ctu_spc_const_maskid, ctu_sparc7_cmp_cken, 
ctu_sparc6_cmp_cken, ctu_sparc5_cmp_cken, ctu_sparc4_cmp_cken, 
ctu_sparc3_cmp_cken, ctu_sparc2_cmp_cken, ctu_sparc1_cmp_cken, 
ctu_sparc0_cmp_cken, ctu_sctag3_cmp_cken, ctu_sctag2_cmp_cken, 
ctu_sctag1_cmp_cken, ctu_sctag0_cmp_cken, ctu_scdata3_cmp_cken, 
ctu_scdata2_cmp_cken, ctu_scdata1_cmp_cken, ctu_scdata0_cmp_cken, 
ctu_misc_jbus_cken, ctu_jbusr_jbus_cken, ctu_jbusl_jbus_cken, 
ctu_jbus_tx_sync_out, ctu_jbi_ssiclk, ctu_jbi_jbus_cken, 
ctu_jbi_cmp_cken, ctu_iob_wake_thr, ctu_iob_resetstat_wr, 
ctu_iob_resetstat, ctu_iob_jbus_cken, ctu_iob_cmp_cken, ctu_io_j_err, 
ctu_fpu_cmp_cken, ctu_efc_read_start, ctu_efc_jbus_cken, 
ctu_dram_tx_sync_out, ctu_dram_selfrsh, ctu_dram_rx_sync_out, 
ctu_dram13_jbus_cken, ctu_dram13_dram_cken, ctu_dram13_cmp_cken, 
ctu_dram02_jbus_cken, ctu_dram02_dram_cken, ctu_dram02_cmp_cken, 
ctu_dll3_byp_val, ctu_dll3_byp_l, ctu_dll2_byp_val, ctu_dll2_byp_l, 
ctu_dll1_byp_val, ctu_dll1_byp_l, ctu_dll0_byp_val, ctu_dll0_byp_l, 
ctu_ddr3_iodll_rst_l, ctu_ddr3_dram_cken, ctu_ddr3_dll_delayctr, 
ctu_ddr2_iodll_rst_l, ctu_ddr2_dram_cken, ctu_ddr2_dll_delayctr, 
ctu_ddr1_iodll_rst_l, ctu_ddr1_dram_cken, ctu_ddr1_dll_delayctr, 
ctu_ddr0_dram_cken, ctu_ddr0_dll_delayctr, ctu_dbg_jbus_cken, 
ctu_ccx_cmp_cken, cmp_grst_out_l, cmp_gdbginit_out_l, cmp_gclk_out, 
cmp_arst_l, cmp_adbginit_l, clsp_iob_vld, clsp_iob_stall, 
clsp_iob_data, clsp_bist_type, clsp_bist_dobist, clsp_bist_ctrl, 
ctu_ddr0_iodll_rst_l, ctu_jbus_rx_sync_out, start_clk_jl, 
start_clk_early_jl, 

testmode_l, se, sctag3_ctu_tr, sctag2_ctu_tr, sctag1_ctu_tr, 
sctag0_ctu_tr, pll_raw_clk_out, pll_clk_out_pre_l, pll_clk_out_pre, 
pll_clk_out_l, pll_clk_out, mask_minor_id, mask_major_id, 
jtag_nstep_vld, jtag_nstep_domain, jtag_nstep_count, 
jtag_clsp_stop_id_vld, jtag_clsp_stop_id, jtag_clsp_sel_tck2, 
jtag_clsp_sel_jbus, jtag_clsp_sel_dram, jtag_clsp_sel_cpu, 
jtag_clsp_ignore_wrm_rst, jtag_clsp_force_cken_jbus, 
jtag_clsp_force_cken_dram, jtag_clsp_force_cken_cmp, jtag_clock_dr, 
jbus_tx_sync, jbus_rx_sync, jbus_rst_l, jbus_gclk, jbus_clk, 
jbi_ctu_tr, iob_ctu_tr, iob_ctu_l2_tr, iob_clsp_vld, iob_clsp_stall, 
iob_clsp_data, io_tck2, io_pwron_rst_l, io_pll_char_in, io_j_rst_l, 
io_do_bist, io_clk_stretch, dram_gclk, dram13_ctu_tr, dram02_ctu_tr, 
dll3_ctu_ctrl, dll2_ctu_ctrl, dll1_ctu_ctrl, dll0_ctu_ctrl, 
dft_wake_thr, dft_clsp_nstep_capture_l, ddr3_ctu_dll_overflow, 
ddr3_ctu_dll_lock, ddr2_ctu_dll_overflow, ddr2_ctu_dll_lock, 
ddr1_ctu_dll_overflow, ddr1_ctu_dll_lock, ddr0_ctu_dll_overflow, 
ddr0_ctu_dll_lock, ctu_dram_tx_sync_early, cmp_gclk, cmp_clk
);



   parameter REG_WIDTH = 64;







input			cmp_clk;
input			cmp_gclk;
input			ctu_dram_tx_sync_early;
input			ddr0_ctu_dll_lock;
input			ddr0_ctu_dll_overflow;
input			ddr1_ctu_dll_lock;
input			ddr1_ctu_dll_overflow;
input			ddr2_ctu_dll_lock;
input			ddr2_ctu_dll_overflow;
input			ddr3_ctu_dll_lock;
input			ddr3_ctu_dll_overflow;
input			dft_clsp_nstep_capture_l;
input			dft_wake_thr;
input [4:0]		dll0_ctu_ctrl;
input [4:0]		dll1_ctu_ctrl;
input [4:0]		dll2_ctu_ctrl;
input [4:0]		dll3_ctu_ctrl;
input			dram02_ctu_tr;
input			dram13_ctu_tr;
input			dram_gclk;
input			io_clk_stretch;
input			io_do_bist;
input			io_j_rst_l;
input			io_pll_char_in;
input			io_pwron_rst_l;
input			io_tck2;
input [`IOB_CLK_WIDTH-1:0]iob_clsp_data;
input			iob_clsp_stall;
input			iob_clsp_vld;
input			iob_ctu_l2_tr;
input			iob_ctu_tr;
input			jbi_ctu_tr;
input			jbus_clk;
input			jbus_gclk;
input			jbus_rst_l;
input			jbus_rx_sync;
input			jbus_tx_sync;
input			jtag_clock_dr;
input			jtag_clsp_force_cken_cmp;
input			jtag_clsp_force_cken_dram;
input			jtag_clsp_force_cken_jbus;
input			jtag_clsp_ignore_wrm_rst;
input [2:0]		jtag_clsp_sel_cpu;
input [2:0]		jtag_clsp_sel_dram;
input [2:0]		jtag_clsp_sel_jbus;
input			jtag_clsp_sel_tck2;
input [5:0]		jtag_clsp_stop_id;
input			jtag_clsp_stop_id_vld;
input [3:0]		jtag_nstep_count;
input [2:0]		jtag_nstep_domain;
input			jtag_nstep_vld;
input [3:0]		mask_major_id;
input [3:0]		mask_minor_id;
input			pll_clk_out;
input			pll_clk_out_l;
input			pll_clk_out_pre;
input			pll_clk_out_pre_l;
input			pll_raw_clk_out;
input			sctag0_ctu_tr;
input			sctag1_ctu_tr;
input			sctag2_ctu_tr;
input			sctag3_ctu_tr;
input			se;
input			testmode_l;



output [5:0]		clsp_bist_ctrl;
output			clsp_bist_dobist;
output			clsp_bist_type;
output [`CLK_IOB_WIDTH-1:0]clsp_iob_data;
output			clsp_iob_stall;
output			clsp_iob_vld;
output			cmp_adbginit_l;
output			cmp_arst_l;
output			cmp_gclk_out;
output			cmp_gdbginit_out_l;
output			cmp_grst_out_l;
output			ctu_ccx_cmp_cken;
output			ctu_dbg_jbus_cken;
output [2:0]		ctu_ddr0_dll_delayctr;
output			ctu_ddr0_dram_cken;
output [2:0]		ctu_ddr1_dll_delayctr;
output			ctu_ddr1_dram_cken;
output			ctu_ddr1_iodll_rst_l;
output [2:0]		ctu_ddr2_dll_delayctr;
output			ctu_ddr2_dram_cken;
output			ctu_ddr2_iodll_rst_l;
output [2:0]		ctu_ddr3_dll_delayctr;
output			ctu_ddr3_dram_cken;
output			ctu_ddr3_iodll_rst_l;
output			ctu_dll0_byp_l;
output [4:0]		ctu_dll0_byp_val;
output			ctu_dll1_byp_l;
output [4:0]		ctu_dll1_byp_val;
output			ctu_dll2_byp_l;
output [4:0]		ctu_dll2_byp_val;
output			ctu_dll3_byp_l;
output [4:0]		ctu_dll3_byp_val;
output			ctu_dram02_cmp_cken;
output			ctu_dram02_dram_cken;
output			ctu_dram02_jbus_cken;
output			ctu_dram13_cmp_cken;
output			ctu_dram13_dram_cken;
output			ctu_dram13_jbus_cken;
output			ctu_dram_rx_sync_out;
output			ctu_dram_selfrsh;
output			ctu_dram_tx_sync_out;
output			ctu_efc_jbus_cken;
output			ctu_efc_read_start;
output			ctu_fpu_cmp_cken;
output			ctu_io_j_err;
output			ctu_iob_cmp_cken;
output			ctu_iob_jbus_cken;
output [2:0]		ctu_iob_resetstat;
output			ctu_iob_resetstat_wr;
output			ctu_iob_wake_thr;
output			ctu_jbi_cmp_cken;
output			ctu_jbi_jbus_cken;
output			ctu_jbi_ssiclk;
output			ctu_jbus_tx_sync_out;
output			ctu_jbusl_jbus_cken;
output			ctu_jbusr_jbus_cken;
output			ctu_misc_jbus_cken;
output			ctu_scdata0_cmp_cken;
output			ctu_scdata1_cmp_cken;
output			ctu_scdata2_cmp_cken;
output			ctu_scdata3_cmp_cken;
output			ctu_sctag0_cmp_cken;
output			ctu_sctag1_cmp_cken;
output			ctu_sctag2_cmp_cken;
output			ctu_sctag3_cmp_cken;
output			ctu_sparc0_cmp_cken;
output			ctu_sparc1_cmp_cken;
output			ctu_sparc2_cmp_cken;
output			ctu_sparc3_cmp_cken;
output			ctu_sparc4_cmp_cken;
output			ctu_sparc5_cmp_cken;
output			ctu_sparc6_cmp_cken;
output			ctu_sparc7_cmp_cken;
output [7:0]		ctu_spc_const_maskid;
output			ctu_tst_pre_grst_l;
output			dram_adbginit_l;
output			dram_arst_l;
output			dram_gclk_out;
output			dram_gdbginit_out_l;
output			dram_grst_out_l;
output			jbus_adbginit_l;
output			jbus_arst_l;
output			jbus_gclk_dup_out;
output			jbus_gclk_out;
output			jbus_gdbginit_out_l;
output			jbus_grst_out_l;
output			pll_reset_ref_l;

output                  ctu_ddr0_iodll_rst_l ;
output			ctu_jbus_rx_sync_out;
output                  start_clk_jl;
output                  start_clk_early_jl;



wire			a_dbginit_cl;
wire			a_dbginit_dg;
wire			a_dbginit_dl;
wire			a_dbginit_jl;
wire			a_grst_cl;
wire			a_grst_dg;
wire			a_grst_dl;
wire			a_grst_jl;
wire			clk_stretch_cnt_val_6;
wire			clk_stretch_cnt_val_odd;
wire			clk_stretch_trig;
wire [63:0]		clkctrl_data_in_reg;
wire			clkctrl_dn_cl;
wire			clkctrl_dn_jl;
wire [63:0]		clsp_ctrl_rd_bus_cl;
wire			clsp_ctrl_srarm_cl;
wire			clsp_ctrl_srarm_jl;
wire			clsp_ctrl_srarm_pre_jl;
wire [`UCB_BUF_HI-`UCB_BUF_LO:0]clsp_ucb_buf_id_out;
wire [REG_WIDTH-1:0]	clsp_ucb_data_out;
wire			clsp_ucb_rd_ack_vld;
wire			clsp_ucb_rd_nack_vld;
wire [`UCB_THR_HI-`UCB_THR_LO:0]clsp_ucb_thr_id_out;
wire			cmp_dbginit_cl_l;
wire			cmp_grst_cl_l;
wire			coin_edge;
wire			creg_cken_vld_cl;
wire			creg_cken_vld_jl;
wire			ctu_ccx_cken_cl;
wire			ctu_ccx_cmp_cken_cg;
wire			ctu_dbg_cken_cl;
wire			ctu_dbg_cken_jl;
wire			ctu_dbg_cken_pre_jl;
wire			ctu_ddr0_cken_cl;
wire [2:0]		ctu_ddr0_dll_delayctr_jl;
wire			ctu_ddr0_dram_cken_dg;
wire			ctu_ddr0_dram_cken_dl;
wire			ctu_ddr0_iodll_rst_jl_l;
wire			ctu_ddr1_cken_cl;
wire [2:0]		ctu_ddr1_dll_delayctr_jl;
wire			ctu_ddr1_dram_cken_dg;
wire			ctu_ddr1_dram_cken_dl;
wire			ctu_ddr1_iodll_rst_jl_l;
wire			ctu_ddr2_cken_cl;
wire [2:0]		ctu_ddr2_dll_delayctr_jl;
wire			ctu_ddr2_dram_cken_dg;
wire			ctu_ddr2_dram_cken_dl;
wire			ctu_ddr2_iodll_rst_jl_l;
wire			ctu_ddr3_cken_cl;
wire [2:0]		ctu_ddr3_dll_delayctr_jl;
wire			ctu_ddr3_dram_cken_dg;
wire			ctu_ddr3_dram_cken_dl;
wire			ctu_ddr3_iodll_rst_jl_l;
wire			ctu_dll0_byp_l_jl;
wire [4:0]		ctu_dll0_byp_val_jl;
wire			ctu_dll1_byp_l_jl;
wire [4:0]		ctu_dll1_byp_val_jl;
wire			ctu_dll2_byp_l_jl;
wire [4:0]		ctu_dll2_byp_val_jl;
wire			ctu_dll3_byp_l_jl;
wire [4:0]		ctu_dll3_byp_val_jl;
wire			ctu_dram02_cken_cl;
wire			ctu_dram02_cken_jl;
wire			ctu_dram02_cken_pre_jl;
wire			ctu_dram02_cmp_cken_cg;
wire			ctu_dram02_dram_cken_dg;
wire			ctu_dram02_dram_cken_dl;
wire			ctu_dram13_cken_cl;
wire			ctu_dram13_cken_jl;
wire			ctu_dram13_cken_pre_jl;
wire			ctu_dram13_cmp_cken_cg;
wire			ctu_dram13_dram_cken_dg;
wire			ctu_dram13_dram_cken_dl;
wire			ctu_dram_rx_sync_cl;
wire			ctu_dram_tx_sync_cl;
wire			ctu_efc_cken_cl;
wire			ctu_efc_cken_jl;
wire			ctu_efc_cken_pre_jl;
wire			ctu_fpu_cken_cl;
wire			ctu_fpu_cmp_cken_cg;
wire			ctu_io_j_err_cl;
wire			ctu_io_j_err_jl;
wire			ctu_iob_cken_cl;
wire			ctu_iob_cken_jl;
wire			ctu_iob_cken_pre_jl;
wire			ctu_iob_cmp_cken_cg;
wire			ctu_jbi_cken_cl;
wire			ctu_jbi_cken_jl;
wire			ctu_jbi_cken_pre_jl;
wire			ctu_jbi_cmp_cken_cg;
wire			ctu_jbus_rx_sync_cl;
wire			ctu_jbus_tx_sync_cl;
wire			ctu_jbusl_cken_cl;
wire			ctu_jbusl_cken_jl;
wire			ctu_jbusl_cken_pre_jl;
wire			ctu_jbusr_cken_cl;
wire			ctu_jbusr_cken_jl;
wire			ctu_jbusr_cken_pre_jl;
wire			ctu_misc_cken_cl;
wire			ctu_misc_cken_jl;
wire			ctu_misc_cken_pre_jl;
wire			ctu_scdata0_cken_cl;
wire			ctu_scdata0_cmp_cken_cg;
wire			ctu_scdata1_cken_cl;
wire			ctu_scdata1_cmp_cken_cg;
wire			ctu_scdata2_cken_cl;
wire			ctu_scdata2_cmp_cken_cg;
wire			ctu_scdata3_cken_cl;
wire			ctu_scdata3_cmp_cken_cg;
wire			ctu_sctag0_cken_cl;
wire			ctu_sctag0_cmp_cken_cg;
wire			ctu_sctag1_cken_cl;
wire			ctu_sctag1_cmp_cken_cg;
wire			ctu_sctag2_cken_cl;
wire			ctu_sctag2_cmp_cken_cg;
wire			ctu_sctag3_cken_cl;
wire			ctu_sctag3_cmp_cken_cg;
wire			ctu_sparc0_cken_cl;
wire			ctu_sparc0_cmp_cken_cg;
wire			ctu_sparc1_cken_cl;
wire			ctu_sparc1_cmp_cken_cg;
wire			ctu_sparc2_cken_cl;
wire			ctu_sparc2_cmp_cken_cg;
wire			ctu_sparc3_cken_cl;
wire			ctu_sparc3_cmp_cken_cg;
wire			ctu_sparc4_cken_cl;
wire			ctu_sparc4_cmp_cken_cg;
wire			ctu_sparc5_cken_cl;
wire			ctu_sparc5_cmp_cken_cg;
wire			ctu_sparc6_cken_cl;
wire			ctu_sparc6_cmp_cken_cg;
wire			ctu_sparc7_cken_cl;
wire			ctu_sparc7_cmp_cken_cg;
wire [4:0]		dbgtrig_dly_cnt_val;
wire [4:0]		dbgtrig_dly_cnt_val_cl;
wire			de_dbginit_cl;
wire			de_dbginit_dsync_edge_dg;
wire			de_dbginit_dsync_edge_dl;
wire			de_dbginit_jl;
wire			de_dbginit_jsync_edge;
wire			de_grst_cl;
wire			de_grst_dsync_edge_dg;
wire			de_grst_dsync_edge_dl;
wire			de_grst_jl;
wire			de_grst_jsync_edge;
wire			dram02_ctu_tr_cl;
wire			dram02_ctu_tr_jl;
wire			dram13_ctu_tr_cl;
wire			dram13_ctu_tr_jl;
wire			dram_a_grst_cl;
wire			dram_a_grst_jl;
wire [4:0]		dsync_reg_init;
wire [4:0]		dsync_reg_period;
wire [1:0]		dsync_reg_rx0;
wire [1:0]		dsync_reg_rx1;
wire [1:0]		dsync_reg_rx2;
wire [4:0]		dsync_reg_tx0;
wire [4:0]		dsync_reg_tx1;
wire [4:0]		dsync_reg_tx2;
wire			frq_chng_pending_jl;
wire			iob_ctu_l2_tr_cl;
wire			iob_ctu_l2_tr_jl;
wire			iob_ctu_tr_cl;
wire			iob_ctu_tr_jl;
wire			jbi_ctu_tr_cl;
wire			jbi_ctu_tr_jl;
wire			jbus_dbginit_jl_l;
wire			jbus_grst_jl_l;
wire			jbus_mult_rst_l;
wire [4:0]		jsync_reg_init;
wire [4:0]		jsync_reg_period;
wire [1:0]		jsync_reg_rx0;
wire [1:0]		jsync_reg_rx1;
wire [1:0]		jsync_reg_rx2;
wire [4:0]		jsync_reg_tx0;
wire [4:0]		jsync_reg_tx1;
wire [4:0]		jsync_reg_tx2;
wire			pll_locked_jl;
wire			pll_reset_ref_dly1_l;
wire			rd_clkctrl_reg_cl;
wire			rd_clkctrl_reg_jl;
wire			reg_cdiv_0;
wire [14:0]		reg_cdiv_vec;
wire			reg_ddiv_0;
wire [14:0]		reg_ddiv_vec;
wire [13:0]		reg_div_cmult;
wire [9:0]		reg_div_dmult;
wire [9:0]		reg_div_jmult;
wire			reg_jdiv_0;
wire [14:0]		reg_jdiv_vec;
wire			rstctrl_disclk_cl;
wire			rstctrl_disclk_jl;
wire			rstctrl_enclk_cl;
wire			rstctrl_enclk_jl;
wire			rstctrl_idle_cl;
wire			rstctrl_idle_jl;
wire			sctag0_ctu_tr_cl;
wire			sctag1_ctu_tr_cl;
wire			sctag2_ctu_tr_cl;
wire			sctag3_ctu_tr_cl;
wire [9:0]		shadreg_div_dmult;
wire [9:0]		shadreg_div_jmult;
wire			ssiclk_enable;
wire			start_2clk_early_jl;
wire			start_clk_cl;
wire			start_clk_dg;
wire			start_clk_dl;
wire [`CCTRLSM_MAX_ST-1:0]stop_id_decoded;
wire			stop_id_vld_cl;
wire			stop_id_vld_jl;
wire [14:0]		stretch_cnt_vec;
wire			tst_rst_ref;
wire [`UCB_ADDR_HI-`UCB_ADDR_LO:0]ucb_clsp_addr_in;
wire [`UCB_BUF_HI-`UCB_BUF_LO:0]ucb_clsp_buf_id_in;
wire [`UCB_DATA_HI-`UCB_DATA_LO:0]ucb_clsp_data_in;
wire			ucb_clsp_rd_req_vld;
wire [`UCB_THR_HI-`UCB_THR_LO:0]ucb_clsp_thr_id_in;
wire			ucb_clsp_wr_req_vld;
wire			update_clkctrl_reg_cl;
wire			update_clkctrl_reg_jl;
wire			update_shadow_cl;
wire			update_shadow_jl;
wire			wrm_rst_fc_ref;
wire			wrm_rst_ref;










     ctu_clsp_synch_cljl  u_ctu_clsp_synch_cljl(

						.clsp_ctrl_srarm_jl(clsp_ctrl_srarm_jl),
						.ctu_dbg_cken_jl(ctu_dbg_cken_jl),
						.ctu_dram02_cken_jl(ctu_dram02_cken_jl),
						.ctu_dram13_cken_jl(ctu_dram13_cken_jl),
						.ctu_efc_cken_jl(ctu_efc_cken_jl),
						.ctu_iob_cken_jl(ctu_iob_cken_jl),
						.ctu_jbi_cken_jl(ctu_jbi_cken_jl),
						.ctu_jbusl_cken_jl(ctu_jbusl_cken_jl),
						.ctu_jbusr_cken_jl(ctu_jbusr_cken_jl),
						.ctu_misc_cken_jl(ctu_misc_cken_jl),
						.dram02_ctu_tr_jl(dram02_ctu_tr_jl),
						.dram13_ctu_tr_jl(dram13_ctu_tr_jl),
						.iob_ctu_l2_tr_jl(iob_ctu_l2_tr_jl),
						.iob_ctu_tr_jl(iob_ctu_tr_jl),
						.jbi_ctu_tr_jl(jbi_ctu_tr_jl),

						.clsp_ctrl_srarm_pre_jl(clsp_ctrl_srarm_pre_jl),
						.ctu_dram02_cken_pre_jl(ctu_dram02_cken_pre_jl),
						.ctu_dram13_cken_pre_jl(ctu_dram13_cken_pre_jl),
						.ctu_efc_cken_pre_jl(ctu_efc_cken_pre_jl),
						.ctu_iob_cken_pre_jl(ctu_iob_cken_pre_jl),
						.ctu_jbi_cken_pre_jl(ctu_jbi_cken_pre_jl),
						.dram02_ctu_tr(dram02_ctu_tr),
						.dram13_ctu_tr(dram13_ctu_tr),
						.io_pwron_rst_l(io_pwron_rst_l),
						.iob_ctu_l2_tr(iob_ctu_l2_tr),
						.iob_ctu_tr(iob_ctu_tr),
						.jbi_ctu_tr(jbi_ctu_tr),
						.jbus_clk(jbus_clk),
						.start_clk_jl(start_clk_jl),
						.ctu_jbusl_cken_pre_jl(ctu_jbusl_cken_pre_jl),
						.ctu_jbusr_cken_pre_jl(ctu_jbusr_cken_pre_jl),
						.ctu_misc_cken_pre_jl(ctu_misc_cken_pre_jl),
						.ctu_dbg_cken_pre_jl(ctu_dbg_cken_pre_jl));



     ctu_clsp_synch_jlcl u_ctu_clsp_synch_jlcl(

					       .a_dbginit_cl(a_dbginit_cl),
					       .a_grst_cl(a_grst_cl),
					       .clkctrl_dn_jl(clkctrl_dn_jl),
					       .clsp_ctrl_srarm_pre_jl(clsp_ctrl_srarm_pre_jl),
					       .creg_cken_vld_cl(creg_cken_vld_cl),
					       .ctu_ccx_cmp_cken_cg(ctu_ccx_cmp_cken_cg),
					       .ctu_dbg_cken_pre_jl(ctu_dbg_cken_pre_jl),
					       .ctu_dram02_cken_pre_jl(ctu_dram02_cken_pre_jl),
					       .ctu_dram02_cmp_cken_cg(ctu_dram02_cmp_cken_cg),
					       .ctu_dram13_cken_pre_jl(ctu_dram13_cken_pre_jl),
					       .ctu_dram13_cmp_cken_cg(ctu_dram13_cmp_cken_cg),
					       .ctu_efc_cken_pre_jl(ctu_efc_cken_pre_jl),
					       .ctu_fpu_cmp_cken_cg(ctu_fpu_cmp_cken_cg),
					       .ctu_io_j_err_jl(ctu_io_j_err_jl),
					       .ctu_iob_cken_pre_jl(ctu_iob_cken_pre_jl),
					       .ctu_iob_cmp_cken_cg(ctu_iob_cmp_cken_cg),
					       .ctu_jbi_cken_pre_jl(ctu_jbi_cken_pre_jl),
					       .ctu_jbi_cmp_cken_cg(ctu_jbi_cmp_cken_cg),
					       .ctu_jbusl_cken_pre_jl(ctu_jbusl_cken_pre_jl),
					       .ctu_jbusr_cken_pre_jl(ctu_jbusr_cken_pre_jl),
					       .ctu_misc_cken_pre_jl(ctu_misc_cken_pre_jl),
					       .ctu_scdata0_cmp_cken_cg(ctu_scdata0_cmp_cken_cg),
					       .ctu_scdata1_cmp_cken_cg(ctu_scdata1_cmp_cken_cg),
					       .ctu_scdata2_cmp_cken_cg(ctu_scdata2_cmp_cken_cg),
					       .ctu_scdata3_cmp_cken_cg(ctu_scdata3_cmp_cken_cg),
					       .ctu_sctag0_cmp_cken_cg(ctu_sctag0_cmp_cken_cg),
					       .ctu_sctag1_cmp_cken_cg(ctu_sctag1_cmp_cken_cg),
					       .ctu_sctag2_cmp_cken_cg(ctu_sctag2_cmp_cken_cg),
					       .ctu_sctag3_cmp_cken_cg(ctu_sctag3_cmp_cken_cg),
					       .ctu_sparc0_cmp_cken_cg(ctu_sparc0_cmp_cken_cg),
					       .ctu_sparc1_cmp_cken_cg(ctu_sparc1_cmp_cken_cg),
					       .ctu_sparc2_cmp_cken_cg(ctu_sparc2_cmp_cken_cg),
					       .ctu_sparc3_cmp_cken_cg(ctu_sparc3_cmp_cken_cg),
					       .ctu_sparc4_cmp_cken_cg(ctu_sparc4_cmp_cken_cg),
					       .ctu_sparc5_cmp_cken_cg(ctu_sparc5_cmp_cken_cg),
					       .ctu_sparc6_cmp_cken_cg(ctu_sparc6_cmp_cken_cg),
					       .ctu_sparc7_cmp_cken_cg(ctu_sparc7_cmp_cken_cg),
					       .dbgtrig_dly_cnt_val_cl(dbgtrig_dly_cnt_val_cl[4:0]),
					       .de_dbginit_cl(de_dbginit_cl),
					       .de_grst_cl(de_grst_cl),
					       .dram02_ctu_tr_cl(dram02_ctu_tr_cl),
					       .dram13_ctu_tr_cl(dram13_ctu_tr_cl),
					       .dram_a_grst_cl(dram_a_grst_cl),
					       .iob_ctu_l2_tr_cl(iob_ctu_l2_tr_cl),
					       .iob_ctu_tr_cl(iob_ctu_tr_cl),
					       .jbi_ctu_tr_cl(jbi_ctu_tr_cl),
					       .rd_clkctrl_reg_cl(rd_clkctrl_reg_cl),
					       .rstctrl_disclk_cl(rstctrl_disclk_cl),
					       .rstctrl_enclk_cl(rstctrl_enclk_cl),
					       .rstctrl_idle_cl(rstctrl_idle_cl),
					       .sctag0_ctu_tr_cl(sctag0_ctu_tr_cl),
					       .sctag1_ctu_tr_cl(sctag1_ctu_tr_cl),
					       .sctag2_ctu_tr_cl(sctag2_ctu_tr_cl),
					       .sctag3_ctu_tr_cl(sctag3_ctu_tr_cl),
					       .stop_id_vld_cl(stop_id_vld_cl),
					       .update_clkctrl_reg_cl(update_clkctrl_reg_cl),
					       .start_clk_cl(start_clk_cl),
					       .update_shadow_cl(update_shadow_cl),

					       .a_dbginit_jl(a_dbginit_jl),
					       .a_grst_jl(a_grst_jl),
					       .clkctrl_dn_cl(clkctrl_dn_cl),
					       .clsp_ctrl_srarm_cl(clsp_ctrl_srarm_cl),
					       .cmp_clk(cmp_clk),
					       .creg_cken_vld_jl(creg_cken_vld_jl),
					       .ctu_ccx_cken_cl(ctu_ccx_cken_cl),
					       .ctu_dram02_cken_cl(ctu_dram02_cken_cl),
					       .ctu_dram13_cken_cl(ctu_dram13_cken_cl),
					       .ctu_efc_cken_cl(ctu_efc_cken_cl),
					       .ctu_fpu_cken_cl(ctu_fpu_cken_cl),
					       .ctu_io_j_err_cl(ctu_io_j_err_cl),
					       .ctu_iob_cken_cl(ctu_iob_cken_cl),
					       .ctu_jbi_cken_cl(ctu_jbi_cken_cl),
					       .ctu_scdata0_cken_cl(ctu_scdata0_cken_cl),
					       .ctu_scdata1_cken_cl(ctu_scdata1_cken_cl),
					       .ctu_scdata2_cken_cl(ctu_scdata2_cken_cl),
					       .ctu_scdata3_cken_cl(ctu_scdata3_cken_cl),
					       .ctu_sctag0_cken_cl(ctu_sctag0_cken_cl),
					       .ctu_sctag1_cken_cl(ctu_sctag1_cken_cl),
					       .ctu_sctag2_cken_cl(ctu_sctag2_cken_cl),
					       .ctu_sctag3_cken_cl(ctu_sctag3_cken_cl),
					       .ctu_sparc0_cken_cl(ctu_sparc0_cken_cl),
					       .ctu_sparc1_cken_cl(ctu_sparc1_cken_cl),
					       .ctu_sparc2_cken_cl(ctu_sparc2_cken_cl),
					       .ctu_sparc3_cken_cl(ctu_sparc3_cken_cl),
					       .ctu_sparc4_cken_cl(ctu_sparc4_cken_cl),
					       .ctu_sparc5_cken_cl(ctu_sparc5_cken_cl),
					       .ctu_sparc6_cken_cl(ctu_sparc6_cken_cl),
					       .ctu_sparc7_cken_cl(ctu_sparc7_cken_cl),
					       .dbgtrig_dly_cnt_val(dbgtrig_dly_cnt_val[4:0]),
					       .de_dbginit_jl(de_dbginit_jl),
					       .de_grst_jl(de_grst_jl),
					       .dram02_ctu_tr_jl(dram02_ctu_tr_jl),
					       .dram13_ctu_tr_jl(dram13_ctu_tr_jl),
					       .dram_a_grst_jl(dram_a_grst_jl),
					       .iob_ctu_l2_tr_jl(iob_ctu_l2_tr_jl),
					       .iob_ctu_tr_jl(iob_ctu_tr_jl),
					       .jbi_ctu_tr_jl(jbi_ctu_tr_jl),
					       .jbus_tx_sync(jbus_tx_sync),
					       .rstctrl_disclk_jl(rstctrl_disclk_jl),
					       .rstctrl_enclk_jl(rstctrl_enclk_jl),
					       .rstctrl_idle_jl(rstctrl_idle_jl),
					       .sctag0_ctu_tr(sctag0_ctu_tr),
					       .sctag1_ctu_tr(sctag1_ctu_tr),
					       .sctag2_ctu_tr(sctag2_ctu_tr),
					       .sctag3_ctu_tr(sctag3_ctu_tr),
					       .stop_id_vld_jl(stop_id_vld_jl),
					       .jbus_rx_sync(jbus_rx_sync),
					       .io_pwron_rst_l(io_pwron_rst_l),
					       .update_shadow_jl(update_shadow_jl),
					       .ctu_jbus_rx_sync_cl(ctu_jbus_rx_sync_cl),
					       .ctu_jbusr_cken_cl(ctu_jbusr_cken_cl),
					       .ctu_jbusl_cken_cl(ctu_jbusl_cken_cl),
					       .ctu_misc_cken_cl(ctu_misc_cken_cl),
					       .ctu_dbg_cken_cl(ctu_dbg_cken_cl),
					       .update_clkctrl_reg_jl(update_clkctrl_reg_jl),
					       .rd_clkctrl_reg_jl(rd_clkctrl_reg_jl),
                                               .start_clk_early_jl(start_2clk_early_jl),
					       .jtag_clsp_force_cken_cmp(jtag_clsp_force_cken_cmp),
					       .testmode_l(testmode_l));


     ctu_clsp_synch_dldg u_ctu_clsp_synch_dldg(

					       .start_clk_dg(start_clk_dg),
					       .ctu_ddr0_dram_cken_dg(ctu_ddr0_dram_cken_dg),
					       .ctu_ddr1_dram_cken_dg(ctu_ddr1_dram_cken_dg),
					       .ctu_ddr2_dram_cken_dg(ctu_ddr2_dram_cken_dg),
					       .ctu_ddr3_dram_cken_dg(ctu_ddr3_dram_cken_dg),
					       .ctu_dram02_dram_cken_dg(ctu_dram02_dram_cken_dg),
					       .ctu_dram13_dram_cken_dg(ctu_dram13_dram_cken_dg),
					       .a_grst_dg(a_grst_dg),
					       .a_dbginit_dg(a_dbginit_dg),
					       .de_grst_dsync_edge_dg(de_grst_dsync_edge_dg),
					       .de_dbginit_dsync_edge_dg(de_dbginit_dsync_edge_dg),

					       .io_pwron_rst_l(io_pwron_rst_l),
					       .cmp_gclk(cmp_gclk),
					       .ctu_ddr0_dram_cken_dl(ctu_ddr0_dram_cken_dl),
					       .ctu_ddr1_dram_cken_dl(ctu_ddr1_dram_cken_dl),
					       .ctu_ddr2_dram_cken_dl(ctu_ddr2_dram_cken_dl),
					       .ctu_ddr3_dram_cken_dl(ctu_ddr3_dram_cken_dl),
					       .ctu_dram02_dram_cken_dl(ctu_dram02_dram_cken_dl),
					       .ctu_dram13_dram_cken_dl(ctu_dram13_dram_cken_dl),
					       .start_clk_dl(start_clk_dl),
					       .a_grst_dl(a_grst_dl),
					       .a_dbginit_dl(a_dbginit_dl),
					       .de_grst_dsync_edge_dl(de_grst_dsync_edge_dl),
					       .de_dbginit_dsync_edge_dl(de_dbginit_dsync_edge_dl));


     ctu_clsp_synch_jldl u_ctu_clsp_synch_jldl(

					       .ctu_ddr0_dll_delayctr(ctu_ddr0_dll_delayctr[2:0]),
					       .ctu_ddr0_dram_cken_dl(ctu_ddr0_dram_cken_dl),
					       .ctu_ddr1_dll_delayctr(ctu_ddr1_dll_delayctr[2:0]),
					       .ctu_ddr1_dram_cken_dl(ctu_ddr1_dram_cken_dl),
					       .ctu_ddr2_dll_delayctr(ctu_ddr2_dll_delayctr[2:0]),
					       .ctu_ddr2_dram_cken_dl(ctu_ddr2_dram_cken_dl),
					       .ctu_ddr3_dll_delayctr(ctu_ddr3_dll_delayctr[2:0]),
					       .ctu_ddr3_dram_cken_dl(ctu_ddr3_dram_cken_dl),
					       .ctu_dll0_byp_l(ctu_dll0_byp_l),
					       .ctu_dll0_byp_val(ctu_dll0_byp_val[4:0]),
					       .ctu_dll1_byp_l(ctu_dll1_byp_l),
					       .ctu_dll1_byp_val(ctu_dll1_byp_val[4:0]),
					       .ctu_dll2_byp_l(ctu_dll2_byp_l),
					       .ctu_dll2_byp_val(ctu_dll2_byp_val[4:0]),
					       .ctu_dll3_byp_l(ctu_dll3_byp_l),
					       .ctu_dll3_byp_val(ctu_dll3_byp_val[4:0]),
					       .ctu_dram02_dram_cken_dl(ctu_dram02_dram_cken_dl),
					       .ctu_dram13_dram_cken_dl(ctu_dram13_dram_cken_dl),
					       .ctu_ddr0_iodll_rst_l(ctu_ddr0_iodll_rst_l),
					       .ctu_ddr1_iodll_rst_l(ctu_ddr1_iodll_rst_l),
					       .ctu_ddr2_iodll_rst_l(ctu_ddr2_iodll_rst_l),
					       .ctu_ddr3_iodll_rst_l(ctu_ddr3_iodll_rst_l),
					       .start_clk_dl(start_clk_dl),

					       .cmp_clk(cmp_clk),
					       .coin_edge(coin_edge),
					       .ctu_ddr0_cken_cl(ctu_ddr0_cken_cl),
					       .ctu_ddr0_dll_delayctr_jl(ctu_ddr0_dll_delayctr_jl[2:0]),
					       .ctu_ddr0_iodll_rst_jl_l(ctu_ddr0_iodll_rst_jl_l),
					       .ctu_ddr1_cken_cl(ctu_ddr1_cken_cl),
					       .ctu_ddr1_dll_delayctr_jl(ctu_ddr1_dll_delayctr_jl[2:0]),
					       .ctu_ddr1_iodll_rst_jl_l(ctu_ddr1_iodll_rst_jl_l),
					       .ctu_ddr2_cken_cl(ctu_ddr2_cken_cl),
					       .ctu_ddr2_dll_delayctr_jl(ctu_ddr2_dll_delayctr_jl[2:0]),
					       .ctu_ddr2_iodll_rst_jl_l(ctu_ddr2_iodll_rst_jl_l),
					       .ctu_ddr3_cken_cl(ctu_ddr3_cken_cl),
					       .ctu_ddr3_dll_delayctr_jl(ctu_ddr3_dll_delayctr_jl[2:0]),
					       .ctu_ddr3_iodll_rst_jl_l(ctu_ddr3_iodll_rst_jl_l),
					       .ctu_dll0_byp_l_jl(ctu_dll0_byp_l_jl),
					       .ctu_dll0_byp_val_jl(ctu_dll0_byp_val_jl[4:0]),
					       .ctu_dll1_byp_l_jl(ctu_dll1_byp_l_jl),
					       .ctu_dll1_byp_val_jl(ctu_dll1_byp_val_jl[4:0]),
					       .ctu_dll2_byp_l_jl(ctu_dll2_byp_l_jl),
					       .ctu_dll2_byp_val_jl(ctu_dll2_byp_val_jl[4:0]),
					       .ctu_dll3_byp_l_jl(ctu_dll3_byp_l_jl),
					       .ctu_dll3_byp_val_jl(ctu_dll3_byp_val_jl[4:0]),
					       .ctu_dram02_cken_cl(ctu_dram02_cken_cl),
					       .ctu_dram13_cken_cl(ctu_dram13_cken_cl),
					       .jbus_rx_sync(jbus_rx_sync),
					       .start_clk_cl(start_clk_cl),
					       .io_pwron_rst_l(io_pwron_rst_l),
					       .ctu_dram_tx_sync_early(ctu_dram_tx_sync_early));









     ctu_clsp_dramgif u_ctu_clsp_dramgif(

					 .dram_grst_out_l(dram_grst_out_l),
					 .dram_arst_l(dram_arst_l),
					 .dram_gdbginit_out_l(dram_gdbginit_out_l),
					 .dram_adbginit_l(dram_adbginit_l),
					 .ctu_dram02_dram_cken(ctu_dram02_dram_cken),
					 .ctu_dram13_dram_cken(ctu_dram13_dram_cken),
					 .ctu_ddr0_dram_cken(ctu_ddr0_dram_cken),
					 .ctu_ddr1_dram_cken(ctu_ddr1_dram_cken),
					 .ctu_ddr2_dram_cken(ctu_ddr2_dram_cken),
					 .ctu_ddr3_dram_cken(ctu_ddr3_dram_cken),

					 .io_pwron_rst_l(io_pwron_rst_l),
					 .start_clk_early_jl(start_clk_early_jl),
					 .testmode_l(testmode_l),
					 .dram_gclk(dram_gclk),
					 .start_clk_dg(start_clk_dg),
					 .shadreg_div_dmult(shadreg_div_dmult[9:0]),
					 .de_grst_dsync_edge_dg(de_grst_dsync_edge_dg),
					 .de_dbginit_dsync_edge_dg(de_dbginit_dsync_edge_dg),
					 .a_grst_dg(a_grst_dg),
					 .a_dbginit_dg(a_dbginit_dg),
					 .ctu_dram02_dram_cken_dg(ctu_dram02_dram_cken_dg),
					 .ctu_dram13_dram_cken_dg(ctu_dram13_dram_cken_dg),
					 .ctu_ddr0_dram_cken_dg(ctu_ddr0_dram_cken_dg),
					 .ctu_ddr1_dram_cken_dg(ctu_ddr1_dram_cken_dg),
					 .ctu_ddr2_dram_cken_dg(ctu_ddr2_dram_cken_dg),
					 .ctu_ddr3_dram_cken_dg(ctu_ddr3_dram_cken_dg),
					 .jtag_clsp_force_cken_dram(jtag_clsp_force_cken_dram));
     ctu_clsp_jbusgif u_ctu_clsp_jbusgif(

					 .ctu_dram02_jbus_cken(ctu_dram02_jbus_cken),
					 .ctu_dram13_jbus_cken(ctu_dram13_jbus_cken),
					 .ctu_jbi_jbus_cken(ctu_jbi_jbus_cken),
					 .ctu_iob_jbus_cken(ctu_iob_jbus_cken),
					 .ctu_jbusl_jbus_cken(ctu_jbusl_jbus_cken),
					 .ctu_jbusr_jbus_cken(ctu_jbusr_jbus_cken),
					 .ctu_misc_jbus_cken(ctu_misc_jbus_cken),
					 .ctu_efc_jbus_cken(ctu_efc_jbus_cken),
					 .ctu_dbg_jbus_cken(ctu_dbg_jbus_cken),
					 .jbus_grst_out_l(jbus_grst_out_l),
					 .jbus_arst_l(jbus_arst_l),
					 .jbus_gdbginit_out_l(jbus_gdbginit_out_l),
					 .jbus_adbginit_l(jbus_adbginit_l),

					 .io_pwron_rst_l(io_pwron_rst_l),
					 .start_clk_jl(start_clk_jl),
					 .testmode_l(testmode_l),
					 .jbus_gclk(jbus_gclk),
					 .jbus_grst_jl_l(jbus_grst_jl_l),
					 .jbus_dbginit_jl_l(jbus_dbginit_jl_l),
					 .ctu_dram02_cken_jl(ctu_dram02_cken_jl),
					 .ctu_dram13_cken_jl(ctu_dram13_cken_jl),
					 .ctu_iob_cken_jl(ctu_iob_cken_jl),
					 .ctu_efc_cken_jl(ctu_efc_cken_jl),
					 .ctu_dbg_cken_jl(ctu_dbg_cken_jl),
					 .ctu_jbusl_cken_jl(ctu_jbusl_cken_jl),
					 .ctu_jbusr_cken_jl(ctu_jbusr_cken_jl),
					 .ctu_jbi_cken_jl(ctu_jbi_cken_jl),
					 .ctu_misc_cken_jl(ctu_misc_cken_jl),
					 .jtag_clsp_force_cken_jbus(jtag_clsp_force_cken_jbus));


     ctu_clsp_cmpgif u_ctu_clsp_cmpgif(

				       .cmp_grst_out_l(cmp_grst_out_l),
				       .cmp_arst_l(cmp_arst_l),
				       .cmp_gdbginit_out_l(cmp_gdbginit_out_l),
				       .cmp_adbginit_l(cmp_adbginit_l),
				       .ctu_dram_tx_sync_out(ctu_dram_tx_sync_out),
				       .ctu_dram_rx_sync_out(ctu_dram_rx_sync_out),
				       .ctu_jbus_tx_sync_out(ctu_jbus_tx_sync_out),
				       .ctu_jbus_rx_sync_out(ctu_jbus_rx_sync_out),
				       .ctu_ccx_cmp_cken(ctu_ccx_cmp_cken),
				       .ctu_dram02_cmp_cken(ctu_dram02_cmp_cken),
				       .ctu_dram13_cmp_cken(ctu_dram13_cmp_cken),
				       .ctu_fpu_cmp_cken(ctu_fpu_cmp_cken),
				       .ctu_iob_cmp_cken(ctu_iob_cmp_cken),
				       .ctu_jbi_cmp_cken(ctu_jbi_cmp_cken),
				       .ctu_scdata0_cmp_cken(ctu_scdata0_cmp_cken),
				       .ctu_scdata1_cmp_cken(ctu_scdata1_cmp_cken),
				       .ctu_scdata2_cmp_cken(ctu_scdata2_cmp_cken),
				       .ctu_scdata3_cmp_cken(ctu_scdata3_cmp_cken),
				       .ctu_sctag0_cmp_cken(ctu_sctag0_cmp_cken),
				       .ctu_sctag1_cmp_cken(ctu_sctag1_cmp_cken),
				       .ctu_sctag2_cmp_cken(ctu_sctag2_cmp_cken),
				       .ctu_sctag3_cmp_cken(ctu_sctag3_cmp_cken),
				       .ctu_sparc0_cmp_cken(ctu_sparc0_cmp_cken),
				       .ctu_sparc1_cmp_cken(ctu_sparc1_cmp_cken),
				       .ctu_sparc2_cmp_cken(ctu_sparc2_cmp_cken),
				       .ctu_sparc3_cmp_cken(ctu_sparc3_cmp_cken),
				       .ctu_sparc4_cmp_cken(ctu_sparc4_cmp_cken),
				       .ctu_sparc5_cmp_cken(ctu_sparc5_cmp_cken),
				       .ctu_sparc6_cmp_cken(ctu_sparc6_cmp_cken),
				       .ctu_sparc7_cmp_cken(ctu_sparc7_cmp_cken),

				       .io_pwron_rst_l(io_pwron_rst_l),
				       .cmp_gclk(cmp_gclk),
				       .start_clk_cl(start_clk_cl),
				       .cmp_grst_cl_l(cmp_grst_cl_l),
				       .cmp_dbginit_cl_l(cmp_dbginit_cl_l),
				       .ctu_dram_tx_sync_cl(ctu_dram_tx_sync_cl),
				       .ctu_dram_rx_sync_cl(ctu_dram_rx_sync_cl),
				       .ctu_jbus_tx_sync_cl(ctu_jbus_tx_sync_cl),
				       .ctu_jbus_rx_sync_cl(ctu_jbus_rx_sync_cl),
				       .ctu_ccx_cmp_cken_cg(ctu_ccx_cmp_cken_cg),
				       .ctu_dram02_cmp_cken_cg(ctu_dram02_cmp_cken_cg),
				       .ctu_dram13_cmp_cken_cg(ctu_dram13_cmp_cken_cg),
				       .ctu_fpu_cmp_cken_cg(ctu_fpu_cmp_cken_cg),
				       .ctu_iob_cmp_cken_cg(ctu_iob_cmp_cken_cg),
				       .ctu_jbi_cmp_cken_cg(ctu_jbi_cmp_cken_cg),
				       .ctu_scdata0_cmp_cken_cg(ctu_scdata0_cmp_cken_cg),
				       .ctu_scdata1_cmp_cken_cg(ctu_scdata1_cmp_cken_cg),
				       .ctu_scdata2_cmp_cken_cg(ctu_scdata2_cmp_cken_cg),
				       .ctu_scdata3_cmp_cken_cg(ctu_scdata3_cmp_cken_cg),
				       .ctu_sctag0_cmp_cken_cg(ctu_sctag0_cmp_cken_cg),
				       .ctu_sctag1_cmp_cken_cg(ctu_sctag1_cmp_cken_cg),
				       .ctu_sctag2_cmp_cken_cg(ctu_sctag2_cmp_cken_cg),
				       .ctu_sctag3_cmp_cken_cg(ctu_sctag3_cmp_cken_cg),
				       .ctu_sparc0_cmp_cken_cg(ctu_sparc0_cmp_cken_cg),
				       .ctu_sparc1_cmp_cken_cg(ctu_sparc1_cmp_cken_cg),
				       .ctu_sparc2_cmp_cken_cg(ctu_sparc2_cmp_cken_cg),
				       .ctu_sparc3_cmp_cken_cg(ctu_sparc3_cmp_cken_cg),
				       .ctu_sparc4_cmp_cken_cg(ctu_sparc4_cmp_cken_cg),
				       .ctu_sparc5_cmp_cken_cg(ctu_sparc5_cmp_cken_cg),
				       .ctu_sparc6_cmp_cken_cg(ctu_sparc6_cmp_cken_cg),
				       .ctu_sparc7_cmp_cken_cg(ctu_sparc7_cmp_cken_cg));









       ucb_noflow  #(`IOB_CLK_WIDTH,`CLK_IOB_WIDTH,64)  
               u_ctu_clsp_ucb (

			       .ucb_iob_stall(clsp_iob_stall),
			       .rd_req_vld(ucb_clsp_rd_req_vld),
			       .wr_req_vld(ucb_clsp_wr_req_vld),
			       .thr_id_in(ucb_clsp_thr_id_in[`UCB_THR_HI-`UCB_THR_LO:0]),
			       .buf_id_in(ucb_clsp_buf_id_in[`UCB_BUF_HI-`UCB_BUF_LO:0]),
			       .size_in	(),
			       .addr_in	(ucb_clsp_addr_in[`UCB_ADDR_HI-`UCB_ADDR_LO:0]),
			       .data_in	(ucb_clsp_data_in[`UCB_DATA_HI-`UCB_DATA_LO:0]),
			       .int_busy(),
			       .ucb_iob_vld(clsp_iob_vld),
			       .ucb_iob_data(clsp_iob_data[`CLK_IOB_WIDTH-1:0]),

			       .clk	(jbus_clk),
			       .rst_l	(jbus_rst_l),
			       .iob_ucb_vld(iob_clsp_vld),
			       .iob_ucb_data(iob_clsp_data[`IOB_CLK_WIDTH-1:0]),
			       .rd_ack_vld(clsp_ucb_rd_ack_vld),
			       .rd_nack_vld(clsp_ucb_rd_nack_vld),
			       .thr_id_out(clsp_ucb_thr_id_out[`UCB_THR_HI-`UCB_THR_LO:0]),
			       .buf_id_out(clsp_ucb_buf_id_out[`UCB_BUF_HI-`UCB_BUF_LO:0]),
			       .data128	(1'b0),
			       .data_out(clsp_ucb_data_out[63:0]),
			       .int_vld	(1'b0),
			       .int_typ	({`UCB_PKT_HI-`UCB_PKT_LO+1{1'b0}}),
			       .int_thr_id({`UCB_THR_HI-`UCB_THR_LO+1{1'b0}}),
			       .dev_id	({`UCB_INT_DEV_HI-`UCB_INT_DEV_LO+1{1'b0}}),
			       .int_stat({`UCB_INT_STAT_HI-`UCB_INT_STAT_LO+1{1'b0}}),
			       .int_vec	({`UCB_INT_VEC_HI-`UCB_INT_VEC_LO+1{1'b0}}),
			       .iob_ucb_stall(iob_clsp_stall));


     ctu_clsp_creg u_ctu_clsp_creg (

				    .reg_cdiv_0(reg_cdiv_0),
				    .reg_ddiv_0(reg_ddiv_0),
				    .reg_jdiv_0(reg_jdiv_0),
				    .reg_cdiv_vec(reg_cdiv_vec[14:0]),
				    .reg_ddiv_vec(reg_ddiv_vec[14:0]),
				    .reg_jdiv_vec(reg_jdiv_vec[14:0]),
				    .stretch_cnt_vec(stretch_cnt_vec[14:0]),
				    .clk_stretch_cnt_val_6(clk_stretch_cnt_val_6),
				    .clk_stretch_cnt_val_odd(clk_stretch_cnt_val_odd),
				    .reg_div_cmult(reg_div_cmult[13:0]),
				    .reg_div_dmult(reg_div_dmult[9:0]),
				    .reg_div_jmult(reg_div_jmult[9:0]),
				    .dsync_reg_init(dsync_reg_init[4:0]),
				    .dsync_reg_period(dsync_reg_period[4:0]),
				    .dsync_reg_rx0(dsync_reg_rx0[1:0]),
				    .dsync_reg_rx1(dsync_reg_rx1[1:0]),
				    .dsync_reg_rx2(dsync_reg_rx2[1:0]),
				    .dsync_reg_tx0(dsync_reg_tx0[4:0]),
				    .dsync_reg_tx1(dsync_reg_tx1[4:0]),
				    .dsync_reg_tx2(dsync_reg_tx2[4:0]),
				    .jsync_reg_init(jsync_reg_init[4:0]),
				    .jsync_reg_period(jsync_reg_period[4:0]),
				    .jsync_reg_rx0(jsync_reg_rx0[1:0]),
				    .jsync_reg_rx1(jsync_reg_rx1[1:0]),
				    .jsync_reg_rx2(jsync_reg_rx2[1:0]),
				    .jsync_reg_tx0(jsync_reg_tx0[4:0]),
				    .jsync_reg_tx1(jsync_reg_tx1[4:0]),
				    .jsync_reg_tx2(jsync_reg_tx2[4:0]),
				    .ctu_spc_const_maskid(ctu_spc_const_maskid[7:0]),
				    .frq_chng_pending_jl(frq_chng_pending_jl),
				    .ctu_ddr0_dll_delayctr_jl(ctu_ddr0_dll_delayctr_jl[2:0]),
				    .ctu_ddr1_dll_delayctr_jl(ctu_ddr1_dll_delayctr_jl[2:0]),
				    .ctu_ddr2_dll_delayctr_jl(ctu_ddr2_dll_delayctr_jl[2:0]),
				    .ctu_ddr3_dll_delayctr_jl(ctu_ddr3_dll_delayctr_jl[2:0]),
				    .de_dbginit_jl(de_dbginit_jl),
				    .a_dbginit_jl(a_dbginit_jl),
				    .clsp_ucb_rd_ack_vld(clsp_ucb_rd_ack_vld),
				    .clsp_ucb_rd_nack_vld(clsp_ucb_rd_nack_vld),
				    .clsp_ucb_thr_id_out(clsp_ucb_thr_id_out[`UCB_THR_HI-`UCB_THR_LO:0]),
				    .clsp_ucb_buf_id_out(clsp_ucb_buf_id_out[`UCB_BUF_HI-`UCB_BUF_LO:0]),
				    .clsp_ucb_data_out(clsp_ucb_data_out[REG_WIDTH-1:0]),
				    .dbgtrig_dly_cnt_val(dbgtrig_dly_cnt_val[4:0]),
				    .jbus_grst_jl_l(jbus_grst_jl_l),
				    .jbus_dbginit_jl_l(jbus_dbginit_jl_l),
				    .clk_stretch_trig(clk_stretch_trig),
				    .ctu_dll3_byp_val_jl(ctu_dll3_byp_val_jl[4:0]),
				    .ctu_dll2_byp_val_jl(ctu_dll2_byp_val_jl[4:0]),
				    .ctu_dll1_byp_val_jl(ctu_dll1_byp_val_jl[4:0]),
				    .ctu_dll0_byp_val_jl(ctu_dll0_byp_val_jl[4:0]),
				    .ctu_dll3_byp_l_jl(ctu_dll3_byp_l_jl),
				    .ctu_dll2_byp_l_jl(ctu_dll2_byp_l_jl),
				    .ctu_dll1_byp_l_jl(ctu_dll1_byp_l_jl),
				    .ctu_dll0_byp_l_jl(ctu_dll0_byp_l_jl),
				    .stop_id_vld_jl(stop_id_vld_jl),
				    .stop_id_decoded(stop_id_decoded[`CCTRLSM_MAX_ST-1:0]),
				    .update_clkctrl_reg_jl(update_clkctrl_reg_jl),
				    .clkctrl_data_in_reg(clkctrl_data_in_reg[63:0]),
				    .rd_clkctrl_reg_jl(rd_clkctrl_reg_jl),

				    .se	(se),
				    .mask_major_id(mask_major_id[3:0]),
				    .mask_minor_id(mask_minor_id[3:0]),
				    .ddr0_ctu_dll_lock(ddr0_ctu_dll_lock),
				    .ddr1_ctu_dll_lock(ddr1_ctu_dll_lock),
				    .ddr2_ctu_dll_lock(ddr2_ctu_dll_lock),
				    .ddr3_ctu_dll_lock(ddr3_ctu_dll_lock),
				    .ddr0_ctu_dll_overflow(ddr0_ctu_dll_overflow),
				    .ddr1_ctu_dll_overflow(ddr1_ctu_dll_overflow),
				    .ddr2_ctu_dll_overflow(ddr2_ctu_dll_overflow),
				    .ddr3_ctu_dll_overflow(ddr3_ctu_dll_overflow),
				    .jbus_clk(jbus_clk),
				    .rst_l(jbus_rst_l),
				    .io_pwron_rst_l(io_pwron_rst_l),
				    .start_clk_jl(start_clk_jl),
				    .start_clk_early_jl(start_clk_early_jl),
				    .a_grst_jl(a_grst_jl),
				    .io_clk_stretch(io_clk_stretch),
				    .clsp_ctrl_rd_bus_cl(clsp_ctrl_rd_bus_cl[63:0]),
				    .shadreg_div_jmult(shadreg_div_jmult[9:0]),
				    .de_grst_jsync_edge(de_grst_jsync_edge),
				    .de_dbginit_jsync_edge(de_dbginit_jsync_edge),
				    .ucb_clsp_rd_req_vld(ucb_clsp_rd_req_vld),
				    .ucb_clsp_wr_req_vld(ucb_clsp_wr_req_vld),
				    .ucb_clsp_addr_in(ucb_clsp_addr_in[`UCB_ADDR_HI-`UCB_ADDR_LO:0]),
				    .ucb_clsp_data_in(ucb_clsp_data_in[`UCB_DATA_HI-`UCB_DATA_LO:0]),
				    .ucb_clsp_thr_id_in(ucb_clsp_thr_id_in[`UCB_THR_HI-`UCB_THR_LO:0]),
				    .ucb_clsp_buf_id_in(ucb_clsp_buf_id_in[`UCB_BUF_HI-`UCB_BUF_LO:0]),
				    .bypclksel(jtag_clsp_sel_jbus[2]),
				    .jbus_mult_rst_l(jbus_mult_rst_l),
				    .jtag_clsp_stop_id_vld(jtag_clsp_stop_id_vld),
				    .jtag_clsp_stop_id(jtag_clsp_stop_id[5:0]),
				    .dll3_ctu_ctrl(dll3_ctu_ctrl[4:0]),
				    .dll2_ctu_ctrl(dll2_ctu_ctrl[4:0]),
				    .dll1_ctu_ctrl(dll1_ctu_ctrl[4:0]),
				    .dll0_ctu_ctrl(dll0_ctu_ctrl[4:0]));









     ctu_clsp_clkctrl u_ctu_clsp_clkctrl(

					 .clsp_ctrl_rd_bus_cl(clsp_ctrl_rd_bus_cl[63:0]),
					 .ctu_sparc0_cken_cl(ctu_sparc0_cken_cl),
					 .ctu_sparc1_cken_cl(ctu_sparc1_cken_cl),
					 .ctu_sparc2_cken_cl(ctu_sparc2_cken_cl),
					 .ctu_sparc3_cken_cl(ctu_sparc3_cken_cl),
					 .ctu_sparc4_cken_cl(ctu_sparc4_cken_cl),
					 .ctu_sparc5_cken_cl(ctu_sparc5_cken_cl),
					 .ctu_sparc6_cken_cl(ctu_sparc6_cken_cl),
					 .ctu_sparc7_cken_cl(ctu_sparc7_cken_cl),
					 .ctu_scdata0_cken_cl(ctu_scdata0_cken_cl),
					 .ctu_scdata1_cken_cl(ctu_scdata1_cken_cl),
					 .ctu_scdata2_cken_cl(ctu_scdata2_cken_cl),
					 .ctu_scdata3_cken_cl(ctu_scdata3_cken_cl),
					 .ctu_sctag0_cken_cl(ctu_sctag0_cken_cl),
					 .ctu_sctag1_cken_cl(ctu_sctag1_cken_cl),
					 .ctu_sctag2_cken_cl(ctu_sctag2_cken_cl),
					 .ctu_sctag3_cken_cl(ctu_sctag3_cken_cl),
					 .ctu_dram02_cken_cl(ctu_dram02_cken_cl),
					 .ctu_dram13_cken_cl(ctu_dram13_cken_cl),
					 .ctu_ccx_cken_cl(ctu_ccx_cken_cl),
					 .ctu_fpu_cken_cl(ctu_fpu_cken_cl),
					 .ctu_ddr0_cken_cl(ctu_ddr0_cken_cl),
					 .ctu_ddr1_cken_cl(ctu_ddr1_cken_cl),
					 .ctu_ddr2_cken_cl(ctu_ddr2_cken_cl),
					 .ctu_ddr3_cken_cl(ctu_ddr3_cken_cl),
					 .ctu_iob_cken_cl(ctu_iob_cken_cl),
					 .ctu_efc_cken_cl(ctu_efc_cken_cl),
					 .ctu_dbg_cken_cl(ctu_dbg_cken_cl),
					 .ctu_jbi_cken_cl(ctu_jbi_cken_cl),
					 .ctu_jbusl_cken_cl(ctu_jbusl_cken_cl),
					 .ctu_misc_cken_cl(ctu_misc_cken_cl),
					 .ctu_jbusr_cken_cl(ctu_jbusr_cken_cl),
					 .ctu_io_j_err_cl(ctu_io_j_err_cl),
					 .clkctrl_dn_cl(clkctrl_dn_cl),
					 .clsp_ctrl_srarm_cl(clsp_ctrl_srarm_cl),

					 .cmp_clk(cmp_clk),
					 .io_pwron_rst_l(io_pwron_rst_l),
					 .creg_cken_vld_cl(creg_cken_vld_cl),
					 .jbus_tx_sync(jbus_tx_sync),
					 .start_clk_cl(start_clk_cl),
					 .rstctrl_idle_cl(rstctrl_idle_cl),
					 .rstctrl_disclk_cl(rstctrl_disclk_cl),
					 .rstctrl_enclk_cl(rstctrl_enclk_cl),
					 .sctag0_ctu_tr_cl(sctag0_ctu_tr_cl),
					 .sctag1_ctu_tr_cl(sctag1_ctu_tr_cl),
					 .sctag2_ctu_tr_cl(sctag2_ctu_tr_cl),
					 .sctag3_ctu_tr_cl(sctag3_ctu_tr_cl),
					 .iob_ctu_tr_cl(iob_ctu_tr_cl),
					 .dram02_ctu_tr_cl(dram02_ctu_tr_cl),
					 .dram13_ctu_tr_cl(dram13_ctu_tr_cl),
					 .jbi_ctu_tr_cl(jbi_ctu_tr_cl),
					 .iob_ctu_l2_tr_cl(iob_ctu_l2_tr_cl),
					 .dbgtrig_dly_cnt_val_cl(dbgtrig_dly_cnt_val_cl[4:0]),
					 .update_clkctrl_reg_cl(update_clkctrl_reg_cl),
					 .clkctrl_data_in_reg(clkctrl_data_in_reg[63:0]),
					 .rd_clkctrl_reg_cl(rd_clkctrl_reg_cl),
					 .stop_id_vld_cl(stop_id_vld_cl),
					 .stop_id_decoded(stop_id_decoded[`CCTRLSM_MAX_ST-1:0]));









     ctu_clsp_ctrl u_ctu_clsp_ctrl (

				    .start_clk_jl(start_clk_jl),
				    .start_clk_early_jl(start_clk_early_jl),
				    .start_2clk_early_jl(start_2clk_early_jl),
				    .update_shadow_jl(update_shadow_jl),
				    .ctu_dram_selfrsh(ctu_dram_selfrsh),
				    .de_grst_jl(de_grst_jl),
				    .a_grst_jl(a_grst_jl),
				    .dram_a_grst_jl(dram_a_grst_jl),
				    .wrm_rst_ref(wrm_rst_ref),
				    .wrm_rst_fc_ref(wrm_rst_fc_ref),
				    .tst_rst_ref(tst_rst_ref),
				    .ctu_efc_read_start(ctu_efc_read_start),
				    .ctu_iob_wake_thr(ctu_iob_wake_thr),
				    .creg_cken_vld_jl(creg_cken_vld_jl),
				    .ctu_io_j_err(ctu_io_j_err),
				    .ctu_tst_pre_grst_l(ctu_tst_pre_grst_l),
				    .ctu_ddr0_iodll_rst_jl_l(ctu_ddr0_iodll_rst_jl_l),
				    .ctu_ddr1_iodll_rst_jl_l(ctu_ddr1_iodll_rst_jl_l),
				    .ctu_ddr2_iodll_rst_jl_l(ctu_ddr2_iodll_rst_jl_l),
				    .ctu_ddr3_iodll_rst_jl_l(ctu_ddr3_iodll_rst_jl_l),
				    .clsp_bist_dobist(clsp_bist_dobist),
				    .clsp_bist_type(clsp_bist_type),
				    .clsp_bist_ctrl(clsp_bist_ctrl[5:0]),
				    .rstctrl_disclk_jl(rstctrl_disclk_jl),
				    .rstctrl_enclk_jl(rstctrl_enclk_jl),
				    .rstctrl_idle_jl(rstctrl_idle_jl),
				    .ssiclk_enable(ssiclk_enable),
				    .ctu_iob_resetstat_wr(ctu_iob_resetstat_wr),
				    .ctu_iob_resetstat(ctu_iob_resetstat[2:0]),

				    .jbus_clk(jbus_clk),
				    .io_pwron_rst_l(io_pwron_rst_l),
				    .pll_locked_jl(pll_locked_jl),
				    .io_j_rst_l(io_j_rst_l),
				    .frq_chng_pending_jl(frq_chng_pending_jl),
				    .clsp_ctrl_srarm_jl(clsp_ctrl_srarm_jl),
				    .clkctrl_dn_jl(clkctrl_dn_jl),
				    .jbus_grst_jl_l(jbus_grst_jl_l),
				    .io_do_bist(io_do_bist),
				    .io_pll_char_in(io_pll_char_in),
				    .dft_wake_thr(dft_wake_thr),
				    .de_dll_rst_dn(ctu_ddr0_iodll_rst_l),
				    .ctu_io_j_err_jl(ctu_io_j_err_jl),
				    .testmode_l(testmode_l),
				    .bypclksel( jtag_clsp_sel_jbus[2]),
				    .jtag_clsp_ignore_wrm_rst(jtag_clsp_ignore_wrm_rst));


     ctu_clsp_pllcnt u_ctu_clsp_pllcnt (

					.pll_locked_jl(pll_locked_jl),
					.pll_reset_ref_l(pll_reset_ref_l),
					.pll_reset_ref_dly1_l(pll_reset_ref_dly1_l),

					.pll_raw_clk_out(pll_raw_clk_out),
					.io_pwron_rst_l(io_pwron_rst_l),
					.testmode_l(testmode_l),
					.wrm_rst_ref(wrm_rst_ref),
					.wrm_rst_fc_ref(wrm_rst_fc_ref),
					.tst_rst_ref(tst_rst_ref),
					.bypclksel( jtag_clsp_sel_jbus[2]));








     ctu_clsp_clkgn u_ctu_clsp_clkgn(

				     .jbus_gclk_out(jbus_gclk_out),
				     .shadreg_div_dmult(shadreg_div_dmult[9:0]),
				     .shadreg_div_jmult(shadreg_div_jmult[9:0]),
				     .a_dbginit_dl(a_dbginit_dl),
				     .a_grst_dl(a_grst_dl),
				     .cmp_dbginit_cl_l(cmp_dbginit_cl_l),
				     .cmp_gclk_out(cmp_gclk_out),
				     .cmp_grst_cl_l(cmp_grst_cl_l),
				     .coin_edge(coin_edge),
				     .ctu_dram_rx_sync_cl(ctu_dram_rx_sync_cl),
				     .ctu_dram_tx_sync_cl(ctu_dram_tx_sync_cl),
				     .ctu_jbi_ssiclk(ctu_jbi_ssiclk),
				     .ctu_jbus_rx_sync_cl(ctu_jbus_rx_sync_cl),
				     .ctu_jbus_tx_sync_cl(ctu_jbus_tx_sync_cl),
				     .de_dbginit_dsync_edge_dl(de_dbginit_dsync_edge_dl),
				     .de_dbginit_jsync_edge(de_dbginit_jsync_edge),
				     .de_grst_dsync_edge_dl(de_grst_dsync_edge_dl),
				     .de_grst_jsync_edge(de_grst_jsync_edge),
				     .dram_gclk_out(dram_gclk_out),
				     .jbus_gclk_dup_out(jbus_gclk_dup_out),
				     .jbus_mult_rst_l(jbus_mult_rst_l),

				     .a_dbginit_cl(a_dbginit_cl),
				     .a_grst_cl(a_grst_cl),
				     .clk_stretch_cnt_val_6(clk_stretch_cnt_val_6),
				     .clk_stretch_cnt_val_odd(clk_stretch_cnt_val_odd),
				     .clk_stretch_trig(clk_stretch_trig),
				     .cmp_clk(cmp_clk),
				     .ctu_dram_tx_sync_early(ctu_dram_tx_sync_early),
				     .de_dbginit_cl(de_dbginit_cl),
				     .de_grst_cl(de_grst_cl),
				     .dft_clsp_nstep_capture_l(dft_clsp_nstep_capture_l),
				     .dram_a_grst_cl(dram_a_grst_cl),
				     .dsync_reg_init(dsync_reg_init[4:0]),
				     .dsync_reg_period(dsync_reg_period[4:0]),
				     .dsync_reg_rx0(dsync_reg_rx0[1:0]),
				     .dsync_reg_rx1(dsync_reg_rx1[1:0]),
				     .dsync_reg_rx2(dsync_reg_rx2[1:0]),
				     .dsync_reg_tx0(dsync_reg_tx0[4:0]),
				     .dsync_reg_tx1(dsync_reg_tx1[4:0]),
				     .dsync_reg_tx2(dsync_reg_tx2[4:0]),
				     .io_pwron_rst_l(io_pwron_rst_l),
				     .io_tck2(io_tck2),
				     .jbus_clk(jbus_clk),
				     .jbus_tx_sync(jbus_tx_sync),
				     .jsync_reg_init(jsync_reg_init[4:0]),
				     .jsync_reg_period(jsync_reg_period[4:0]),
				     .jsync_reg_rx0(jsync_reg_rx0[1:0]),
				     .jsync_reg_rx1(jsync_reg_rx1[1:0]),
				     .jsync_reg_rx2(jsync_reg_rx2[1:0]),
				     .jsync_reg_tx0(jsync_reg_tx0[4:0]),
				     .jsync_reg_tx1(jsync_reg_tx1[4:0]),
				     .jsync_reg_tx2(jsync_reg_tx2[4:0]),
				     .jtag_clock_dr(jtag_clock_dr),
				     .jtag_clsp_force_cken_cmp(jtag_clsp_force_cken_cmp),
				     .jtag_clsp_force_cken_dram(jtag_clsp_force_cken_dram),
				     .jtag_clsp_force_cken_jbus(jtag_clsp_force_cken_jbus),
				     .jtag_clsp_sel_cpu(jtag_clsp_sel_cpu[2:0]),
				     .jtag_clsp_sel_dram(jtag_clsp_sel_dram[2:0]),
				     .jtag_clsp_sel_jbus(jtag_clsp_sel_jbus[2:0]),
				     .jtag_clsp_sel_tck2(jtag_clsp_sel_tck2),
				     .jtag_nstep_count(jtag_nstep_count[3:0]),
				     .jtag_nstep_domain(jtag_nstep_domain[2:0]),
				     .jtag_nstep_vld(jtag_nstep_vld),
				     .pll_clk_out(pll_clk_out),
				     .pll_clk_out_l(pll_clk_out_l),
				     .pll_clk_out_pre(pll_clk_out_pre),
				     .pll_clk_out_pre_l(pll_clk_out_pre_l),
				     .pll_raw_clk_out(pll_raw_clk_out),
				     .pll_reset_ref_dly1_l(pll_reset_ref_dly1_l),
				     .reg_cdiv_0(reg_cdiv_0),
				     .reg_cdiv_vec(reg_cdiv_vec[14:0]),
				     .reg_ddiv_0(reg_ddiv_0),
				     .reg_ddiv_vec(reg_ddiv_vec[14:0]),
				     .reg_div_cmult(reg_div_cmult[13:0]),
				     .reg_div_dmult(reg_div_dmult[9:0]),
				     .reg_div_jmult(reg_div_jmult[9:0]),
				     .reg_jdiv_0(reg_jdiv_0),
				     .reg_jdiv_vec(reg_jdiv_vec[14:0]),
				     .se(se),
				     .ssiclk_enable(ssiclk_enable),
				     .start_2clk_early_jl(start_2clk_early_jl),
				     .start_clk_cl(start_clk_cl),
				     .start_clk_early_jl(start_clk_early_jl),
				     .stretch_cnt_vec(stretch_cnt_vec[14:0]),
				     .testmode_l(testmode_l),
				     .update_shadow_cl(update_shadow_cl));




endmodule
module ctu_clsp(

pll_reset_ref_l, jbus_grst_out_l, jbus_gdbginit_out_l, jbus_gclk_out, 
jbus_gclk_dup_out, jbus_arst_l, jbus_adbginit_l, dram_grst_out_l, 
dram_gdbginit_out_l, dram_gclk_out, dram_arst_l, dram_adbginit_l, 
ctu_tst_pre_grst_l, ctu_spc_const_maskid, ctu_sparc7_cmp_cken, 
ctu_sparc6_cmp_cken, ctu_sparc5_cmp_cken, ctu_sparc4_cmp_cken, 
ctu_sparc3_cmp_cken, ctu_sparc2_cmp_cken, ctu_sparc1_cmp_cken, 
ctu_sparc0_cmp_cken, ctu_sctag3_cmp_cken, ctu_sctag2_cmp_cken, 
ctu_sctag1_cmp_cken, ctu_sctag0_cmp_cken, ctu_scdata3_cmp_cken, 
ctu_scdata2_cmp_cken, ctu_scdata1_cmp_cken, ctu_scdata0_cmp_cken, 
ctu_misc_jbus_cken, ctu_jbusr_jbus_cken, ctu_jbusl_jbus_cken, 
ctu_jbus_tx_sync_out, ctu_jbi_ssiclk, ctu_jbi_jbus_cken, 
ctu_jbi_cmp_cken, ctu_iob_wake_thr, ctu_iob_resetstat_wr, 
ctu_iob_resetstat, ctu_iob_jbus_cken, ctu_iob_cmp_cken, ctu_io_j_err, 
ctu_fpu_cmp_cken, ctu_efc_read_start, ctu_efc_jbus_cken, 
ctu_dram_tx_sync_out, ctu_dram_selfrsh, ctu_dram_rx_sync_out, 
ctu_dram13_jbus_cken, ctu_dram13_dram_cken, ctu_dram13_cmp_cken, 
ctu_dram02_jbus_cken, ctu_dram02_dram_cken, ctu_dram02_cmp_cken, 
ctu_dll3_byp_val, ctu_dll3_byp_l, ctu_dll2_byp_val, ctu_dll2_byp_l, 
ctu_dll1_byp_val, ctu_dll1_byp_l, ctu_dll0_byp_val, ctu_dll0_byp_l, 
ctu_ddr3_iodll_rst_l, ctu_ddr3_dram_cken, ctu_ddr3_dll_delayctr, 
ctu_ddr2_iodll_rst_l, ctu_ddr2_dram_cken, ctu_ddr2_dll_delayctr, 
ctu_ddr1_iodll_rst_l, ctu_ddr1_dram_cken, ctu_ddr1_dll_delayctr, 
ctu_ddr0_dram_cken, ctu_ddr0_dll_delayctr, ctu_dbg_jbus_cken, 
ctu_ccx_cmp_cken, cmp_grst_out_l, cmp_gdbginit_out_l, cmp_gclk_out, 
cmp_arst_l, cmp_adbginit_l, clsp_iob_vld, clsp_iob_stall, 
clsp_iob_data, clsp_bist_type, clsp_bist_dobist, clsp_bist_ctrl, 
ctu_ddr0_iodll_rst_l, ctu_jbus_rx_sync_out, start_clk_jl, 
start_clk_early_jl, 

testmode_l, se, sctag3_ctu_tr, sctag2_ctu_tr, sctag1_ctu_tr, 
sctag0_ctu_tr, pll_raw_clk_out, pll_clk_out_pre_l, pll_clk_out_pre, 
pll_clk_out_l, pll_clk_out, mask_minor_id, mask_major_id, 
jtag_nstep_vld, jtag_nstep_domain, jtag_nstep_count, 
jtag_clsp_stop_id_vld, jtag_clsp_stop_id, jtag_clsp_sel_tck2, 
jtag_clsp_sel_jbus, jtag_clsp_sel_dram, jtag_clsp_sel_cpu, 
jtag_clsp_ignore_wrm_rst, jtag_clsp_force_cken_jbus, 
jtag_clsp_force_cken_dram, jtag_clsp_force_cken_cmp, jtag_clock_dr, 
jbus_tx_sync, jbus_rx_sync, jbus_rst_l, jbus_gclk, jbus_clk, 
jbi_ctu_tr, iob_ctu_tr, iob_ctu_l2_tr, iob_clsp_vld, iob_clsp_stall, 
iob_clsp_data, io_tck2, io_pwron_rst_l, io_pll_char_in, io_j_rst_l, 
io_do_bist, io_clk_stretch, dram_gclk, dram13_ctu_tr, dram02_ctu_tr, 
dll3_ctu_ctrl, dll2_ctu_ctrl, dll1_ctu_ctrl, dll0_ctu_ctrl, 
dft_wake_thr, dft_clsp_nstep_capture_l, ddr3_ctu_dll_overflow, 
ddr3_ctu_dll_lock, ddr2_ctu_dll_overflow, ddr2_ctu_dll_lock, 
ddr1_ctu_dll_overflow, ddr1_ctu_dll_lock, ddr0_ctu_dll_overflow, 
ddr0_ctu_dll_lock, ctu_dram_tx_sync_early, cmp_gclk, cmp_clk
);




   parameter REG_WIDTH = 64;







input			cmp_clk;
input			cmp_gclk;
input			ctu_dram_tx_sync_early;
input			ddr0_ctu_dll_lock;
input			ddr0_ctu_dll_overflow;
input			ddr1_ctu_dll_lock;
input			ddr1_ctu_dll_overflow;
input			ddr2_ctu_dll_lock;
input			ddr2_ctu_dll_overflow;
input			ddr3_ctu_dll_lock;
input			ddr3_ctu_dll_overflow;
input			dft_clsp_nstep_capture_l;
input			dft_wake_thr;
input [4:0]		dll0_ctu_ctrl;
input [4:0]		dll1_ctu_ctrl;
input [4:0]		dll2_ctu_ctrl;
input [4:0]		dll3_ctu_ctrl;
input			dram02_ctu_tr;
input			dram13_ctu_tr;
input			dram_gclk;
input			io_clk_stretch;
input			io_do_bist;
input			io_j_rst_l;
input			io_pll_char_in;
input			io_pwron_rst_l;
input			io_tck2;
input [`IOB_CLK_WIDTH-1:0]iob_clsp_data;
input			iob_clsp_stall;
input			iob_clsp_vld;
input			iob_ctu_l2_tr;
input			iob_ctu_tr;
input			jbi_ctu_tr;
input			jbus_clk;
input			jbus_gclk;
input			jbus_rst_l;
input			jbus_rx_sync;
input			jbus_tx_sync;
input			jtag_clock_dr;
input			jtag_clsp_force_cken_cmp;
input			jtag_clsp_force_cken_dram;
input			jtag_clsp_force_cken_jbus;
input			jtag_clsp_ignore_wrm_rst;
input [2:0]		jtag_clsp_sel_cpu;
input [2:0]		jtag_clsp_sel_dram;
input [2:0]		jtag_clsp_sel_jbus;
input			jtag_clsp_sel_tck2;
input [5:0]		jtag_clsp_stop_id;
input			jtag_clsp_stop_id_vld;
input [3:0]		jtag_nstep_count;
input [2:0]		jtag_nstep_domain;
input			jtag_nstep_vld;
input [3:0]		mask_major_id;
input [3:0]		mask_minor_id;
input			pll_clk_out;
input			pll_clk_out_l;
input			pll_clk_out_pre;
input			pll_clk_out_pre_l;
input			pll_raw_clk_out;
input			sctag0_ctu_tr;
input			sctag1_ctu_tr;
input			sctag2_ctu_tr;
input			sctag3_ctu_tr;
input			se;
input			testmode_l;



output [5:0]		clsp_bist_ctrl;
output			clsp_bist_dobist;
output			clsp_bist_type;
output [`CLK_IOB_WIDTH-1:0]clsp_iob_data;
output			clsp_iob_stall;
output			clsp_iob_vld;
output			cmp_adbginit_l;
output			cmp_arst_l;
output			cmp_gclk_out;
output			cmp_gdbginit_out_l;
output			cmp_grst_out_l;
output			ctu_ccx_cmp_cken;
output			ctu_dbg_jbus_cken;
output [2:0]		ctu_ddr0_dll_delayctr;
output			ctu_ddr0_dram_cken;
output [2:0]		ctu_ddr1_dll_delayctr;
output			ctu_ddr1_dram_cken;
output			ctu_ddr1_iodll_rst_l;
output [2:0]		ctu_ddr2_dll_delayctr;
output			ctu_ddr2_dram_cken;
output			ctu_ddr2_iodll_rst_l;
output [2:0]		ctu_ddr3_dll_delayctr;
output			ctu_ddr3_dram_cken;
output			ctu_ddr3_iodll_rst_l;
output			ctu_dll0_byp_l;
output [4:0]		ctu_dll0_byp_val;
output			ctu_dll1_byp_l;
output [4:0]		ctu_dll1_byp_val;
output			ctu_dll2_byp_l;
output [4:0]		ctu_dll2_byp_val;
output			ctu_dll3_byp_l;
output [4:0]		ctu_dll3_byp_val;
output			ctu_dram02_cmp_cken;
output			ctu_dram02_dram_cken;
output			ctu_dram02_jbus_cken;
output			ctu_dram13_cmp_cken;
output			ctu_dram13_dram_cken;
output			ctu_dram13_jbus_cken;
output			ctu_dram_rx_sync_out;
output			ctu_dram_selfrsh;
output			ctu_dram_tx_sync_out;
output			ctu_efc_jbus_cken;
output			ctu_efc_read_start;
output			ctu_fpu_cmp_cken;
output			ctu_io_j_err;
output			ctu_iob_cmp_cken;
output			ctu_iob_jbus_cken;
output [2:0]		ctu_iob_resetstat;
output			ctu_iob_resetstat_wr;
output			ctu_iob_wake_thr;
output			ctu_jbi_cmp_cken;
output			ctu_jbi_jbus_cken;
output			ctu_jbi_ssiclk;
output			ctu_jbus_tx_sync_out;
output			ctu_jbusl_jbus_cken;
output			ctu_jbusr_jbus_cken;
output			ctu_misc_jbus_cken;
output			ctu_scdata0_cmp_cken;
output			ctu_scdata1_cmp_cken;
output			ctu_scdata2_cmp_cken;
output			ctu_scdata3_cmp_cken;
output			ctu_sctag0_cmp_cken;
output			ctu_sctag1_cmp_cken;
output			ctu_sctag2_cmp_cken;
output			ctu_sctag3_cmp_cken;
output			ctu_sparc0_cmp_cken;
output			ctu_sparc1_cmp_cken;
output			ctu_sparc2_cmp_cken;
output			ctu_sparc3_cmp_cken;
output			ctu_sparc4_cmp_cken;
output			ctu_sparc5_cmp_cken;
output			ctu_sparc6_cmp_cken;
output			ctu_sparc7_cmp_cken;
output [7:0]		ctu_spc_const_maskid;
output			ctu_tst_pre_grst_l;
output			dram_adbginit_l;
output			dram_arst_l;
output			dram_gclk_out;
output			dram_gdbginit_out_l;
output			dram_grst_out_l;
output			jbus_adbginit_l;
output			jbus_arst_l;
output			jbus_gclk_dup_out;
output			jbus_gclk_out;
output			jbus_gdbginit_out_l;
output			jbus_grst_out_l;
output			pll_reset_ref_l;

output                  ctu_ddr0_iodll_rst_l ;
output			ctu_jbus_rx_sync_out;
output                  start_clk_jl;
output                  start_clk_early_jl;



wire			a_dbginit_cl;
wire			a_dbginit_dg;
wire			a_dbginit_dl;
wire			a_dbginit_jl;
wire			a_grst_cl;
wire			a_grst_dg;
wire			a_grst_dl;
wire			a_grst_jl;
wire			clk_stretch_cnt_val_6;
wire			clk_stretch_cnt_val_odd;
wire			clk_stretch_trig;
wire [63:0]		clkctrl_data_in_reg;
wire			clkctrl_dn_cl;
wire			clkctrl_dn_jl;
wire [63:0]		clsp_ctrl_rd_bus_cl;
wire			clsp_ctrl_srarm_cl;
wire			clsp_ctrl_srarm_jl;
wire			clsp_ctrl_srarm_pre_jl;
wire [`UCB_BUF_HI-`UCB_BUF_LO:0]clsp_ucb_buf_id_out;
wire [REG_WIDTH-1:0]	clsp_ucb_data_out;
wire			clsp_ucb_rd_ack_vld;
wire			clsp_ucb_rd_nack_vld;
wire [`UCB_THR_HI-`UCB_THR_LO:0]clsp_ucb_thr_id_out;
wire			cmp_dbginit_cl_l;
wire			cmp_grst_cl_l;
wire			coin_edge;
wire			creg_cken_vld_cl;
wire			creg_cken_vld_jl;
wire			ctu_ccx_cken_cl;
wire			ctu_ccx_cmp_cken_cg;
wire			ctu_dbg_cken_cl;
wire			ctu_dbg_cken_jl;
wire			ctu_dbg_cken_pre_jl;
wire			ctu_ddr0_cken_cl;
wire [2:0]		ctu_ddr0_dll_delayctr_jl;
wire			ctu_ddr0_dram_cken_dg;
wire			ctu_ddr0_dram_cken_dl;
wire			ctu_ddr0_iodll_rst_jl_l;
wire			ctu_ddr1_cken_cl;
wire [2:0]		ctu_ddr1_dll_delayctr_jl;
wire			ctu_ddr1_dram_cken_dg;
wire			ctu_ddr1_dram_cken_dl;
wire			ctu_ddr1_iodll_rst_jl_l;
wire			ctu_ddr2_cken_cl;
wire [2:0]		ctu_ddr2_dll_delayctr_jl;
wire			ctu_ddr2_dram_cken_dg;
wire			ctu_ddr2_dram_cken_dl;
wire			ctu_ddr2_iodll_rst_jl_l;
wire			ctu_ddr3_cken_cl;
wire [2:0]		ctu_ddr3_dll_delayctr_jl;
wire			ctu_ddr3_dram_cken_dg;
wire			ctu_ddr3_dram_cken_dl;
wire			ctu_ddr3_iodll_rst_jl_l;
wire			ctu_dll0_byp_l_jl;
wire [4:0]		ctu_dll0_byp_val_jl;
wire			ctu_dll1_byp_l_jl;
wire [4:0]		ctu_dll1_byp_val_jl;
wire			ctu_dll2_byp_l_jl;
wire [4:0]		ctu_dll2_byp_val_jl;
wire			ctu_dll3_byp_l_jl;
wire [4:0]		ctu_dll3_byp_val_jl;
wire			ctu_dram02_cken_cl;
wire			ctu_dram02_cken_jl;
wire			ctu_dram02_cken_pre_jl;
wire			ctu_dram02_cmp_cken_cg;
wire			ctu_dram02_dram_cken_dg;
wire			ctu_dram02_dram_cken_dl;
wire			ctu_dram13_cken_cl;
wire			ctu_dram13_cken_jl;
wire			ctu_dram13_cken_pre_jl;
wire			ctu_dram13_cmp_cken_cg;
wire			ctu_dram13_dram_cken_dg;
wire			ctu_dram13_dram_cken_dl;
wire			ctu_dram_rx_sync_cl;
wire			ctu_dram_tx_sync_cl;
wire			ctu_efc_cken_cl;
wire			ctu_efc_cken_jl;
wire			ctu_efc_cken_pre_jl;
wire			ctu_fpu_cken_cl;
wire			ctu_fpu_cmp_cken_cg;
wire			ctu_io_j_err_cl;
wire			ctu_io_j_err_jl;
wire			ctu_iob_cken_cl;
wire			ctu_iob_cken_jl;
wire			ctu_iob_cken_pre_jl;
wire			ctu_iob_cmp_cken_cg;
wire			ctu_jbi_cken_cl;
wire			ctu_jbi_cken_jl;
wire			ctu_jbi_cken_pre_jl;
wire			ctu_jbi_cmp_cken_cg;
wire			ctu_jbus_rx_sync_cl;
wire			ctu_jbus_tx_sync_cl;
wire			ctu_jbusl_cken_cl;
wire			ctu_jbusl_cken_jl;
wire			ctu_jbusl_cken_pre_jl;
wire			ctu_jbusr_cken_cl;
wire			ctu_jbusr_cken_jl;
wire			ctu_jbusr_cken_pre_jl;
wire			ctu_misc_cken_cl;
wire			ctu_misc_cken_jl;
wire			ctu_misc_cken_pre_jl;
wire			ctu_scdata0_cken_cl;
wire			ctu_scdata0_cmp_cken_cg;
wire			ctu_scdata1_cken_cl;
wire			ctu_scdata1_cmp_cken_cg;
wire			ctu_scdata2_cken_cl;
wire			ctu_scdata2_cmp_cken_cg;
wire			ctu_scdata3_cken_cl;
wire			ctu_scdata3_cmp_cken_cg;
wire			ctu_sctag0_cken_cl;
wire			ctu_sctag0_cmp_cken_cg;
wire			ctu_sctag1_cken_cl;
wire			ctu_sctag1_cmp_cken_cg;
wire			ctu_sctag2_cken_cl;
wire			ctu_sctag2_cmp_cken_cg;
wire			ctu_sctag3_cken_cl;
wire			ctu_sctag3_cmp_cken_cg;
wire			ctu_sparc0_cken_cl;
wire			ctu_sparc0_cmp_cken_cg;
wire			ctu_sparc1_cken_cl;
wire			ctu_sparc1_cmp_cken_cg;
wire			ctu_sparc2_cken_cl;
wire			ctu_sparc2_cmp_cken_cg;
wire			ctu_sparc3_cken_cl;
wire			ctu_sparc3_cmp_cken_cg;
wire			ctu_sparc4_cken_cl;
wire			ctu_sparc4_cmp_cken_cg;
wire			ctu_sparc5_cken_cl;
wire			ctu_sparc5_cmp_cken_cg;
wire			ctu_sparc6_cken_cl;
wire			ctu_sparc6_cmp_cken_cg;
wire			ctu_sparc7_cken_cl;
wire			ctu_sparc7_cmp_cken_cg;
wire [4:0]		dbgtrig_dly_cnt_val;
wire [4:0]		dbgtrig_dly_cnt_val_cl;
wire			de_dbginit_cl;
wire			de_dbginit_dsync_edge_dg;
wire			de_dbginit_dsync_edge_dl;
wire			de_dbginit_jl;
wire			de_dbginit_jsync_edge;
wire			de_grst_cl;
wire			de_grst_dsync_edge_dg;
wire			de_grst_dsync_edge_dl;
wire			de_grst_jl;
wire			de_grst_jsync_edge;
wire			dram02_ctu_tr_cl;
wire			dram02_ctu_tr_jl;
wire			dram13_ctu_tr_cl;
wire			dram13_ctu_tr_jl;
wire			dram_a_grst_cl;
wire			dram_a_grst_jl;
wire [4:0]		dsync_reg_init;
wire [4:0]		dsync_reg_period;
wire [1:0]		dsync_reg_rx0;
wire [1:0]		dsync_reg_rx1;
wire [1:0]		dsync_reg_rx2;
wire [4:0]		dsync_reg_tx0;
wire [4:0]		dsync_reg_tx1;
wire [4:0]		dsync_reg_tx2;
wire			frq_chng_pending_jl;
wire			iob_ctu_l2_tr_cl;
wire			iob_ctu_l2_tr_jl;
wire			iob_ctu_tr_cl;
wire			iob_ctu_tr_jl;
wire			jbi_ctu_tr_cl;
wire			jbi_ctu_tr_jl;
wire			jbus_dbginit_jl_l;
wire			jbus_grst_jl_l;
wire			jbus_mult_rst_l;
wire [4:0]		jsync_reg_init;
wire [4:0]		jsync_reg_period;
wire [1:0]		jsync_reg_rx0;
wire [1:0]		jsync_reg_rx1;
wire [1:0]		jsync_reg_rx2;
wire [4:0]		jsync_reg_tx0;
wire [4:0]		jsync_reg_tx1;
wire [4:0]		jsync_reg_tx2;
wire			pll_locked_jl;
wire			pll_reset_ref_dly1_l;
wire			rd_clkctrl_reg_cl;
wire			rd_clkctrl_reg_jl;
wire			reg_cdiv_0;
wire [14:0]		reg_cdiv_vec;
wire			reg_ddiv_0;
wire [14:0]		reg_ddiv_vec;
wire [13:0]		reg_div_cmult;
wire [9:0]		reg_div_dmult;
wire [9:0]		reg_div_jmult;
wire			reg_jdiv_0;
wire [14:0]		reg_jdiv_vec;
wire			rstctrl_disclk_cl;
wire			rstctrl_disclk_jl;
wire			rstctrl_enclk_cl;
wire			rstctrl_enclk_jl;
wire			rstctrl_idle_cl;
wire			rstctrl_idle_jl;
wire			sctag0_ctu_tr_cl;
wire			sctag1_ctu_tr_cl;
wire			sctag2_ctu_tr_cl;
wire			sctag3_ctu_tr_cl;
wire [9:0]		shadreg_div_dmult;
wire [9:0]		shadreg_div_jmult;
wire			ssiclk_enable;
wire			start_2clk_early_jl;
wire			start_clk_cl;
wire			start_clk_dg;
wire			start_clk_dl;
wire [`CCTRLSM_MAX_ST-1:0]stop_id_decoded;
wire			stop_id_vld_cl;
wire			stop_id_vld_jl;
wire [14:0]		stretch_cnt_vec;
wire			tst_rst_ref;
wire [`UCB_ADDR_HI-`UCB_ADDR_LO:0]ucb_clsp_addr_in;
wire [`UCB_BUF_HI-`UCB_BUF_LO:0]ucb_clsp_buf_id_in;
wire [`UCB_DATA_HI-`UCB_DATA_LO:0]ucb_clsp_data_in;
wire			ucb_clsp_rd_req_vld;
wire [`UCB_THR_HI-`UCB_THR_LO:0]ucb_clsp_thr_id_in;
wire			ucb_clsp_wr_req_vld;
wire			update_clkctrl_reg_cl;
wire			update_clkctrl_reg_jl;
wire			update_shadow_cl;
wire			update_shadow_jl;
wire			wrm_rst_fc_ref;
wire			wrm_rst_ref;










     ctu_clsp_synch_cljl  u_ctu_clsp_synch_cljl(

						.clsp_ctrl_srarm_jl(clsp_ctrl_srarm_jl),
						.ctu_dbg_cken_jl(ctu_dbg_cken_jl),
						.ctu_dram02_cken_jl(ctu_dram02_cken_jl),
						.ctu_dram13_cken_jl(ctu_dram13_cken_jl),
						.ctu_efc_cken_jl(ctu_efc_cken_jl),
						.ctu_iob_cken_jl(ctu_iob_cken_jl),
						.ctu_jbi_cken_jl(ctu_jbi_cken_jl),
						.ctu_jbusl_cken_jl(ctu_jbusl_cken_jl),
						.ctu_jbusr_cken_jl(ctu_jbusr_cken_jl),
						.ctu_misc_cken_jl(ctu_misc_cken_jl),
						.dram02_ctu_tr_jl(dram02_ctu_tr_jl),
						.dram13_ctu_tr_jl(dram13_ctu_tr_jl),
						.iob_ctu_l2_tr_jl(iob_ctu_l2_tr_jl),
						.iob_ctu_tr_jl(iob_ctu_tr_jl),
						.jbi_ctu_tr_jl(jbi_ctu_tr_jl),

						.clsp_ctrl_srarm_pre_jl(clsp_ctrl_srarm_pre_jl),
						.ctu_dram02_cken_pre_jl(ctu_dram02_cken_pre_jl),
						.ctu_dram13_cken_pre_jl(ctu_dram13_cken_pre_jl),
						.ctu_efc_cken_pre_jl(ctu_efc_cken_pre_jl),
						.ctu_iob_cken_pre_jl(ctu_iob_cken_pre_jl),
						.ctu_jbi_cken_pre_jl(ctu_jbi_cken_pre_jl),
						.dram02_ctu_tr(dram02_ctu_tr),
						.dram13_ctu_tr(dram13_ctu_tr),
						.io_pwron_rst_l(io_pwron_rst_l),
						.iob_ctu_l2_tr(iob_ctu_l2_tr),
						.iob_ctu_tr(iob_ctu_tr),
						.jbi_ctu_tr(jbi_ctu_tr),
						.jbus_clk(jbus_clk),
						.start_clk_jl(start_clk_jl),
						.ctu_jbusl_cken_pre_jl(ctu_jbusl_cken_pre_jl),
						.ctu_jbusr_cken_pre_jl(ctu_jbusr_cken_pre_jl),
						.ctu_misc_cken_pre_jl(ctu_misc_cken_pre_jl),
						.ctu_dbg_cken_pre_jl(ctu_dbg_cken_pre_jl));



     ctu_clsp_synch_jlcl u_ctu_clsp_synch_jlcl(

					       .a_dbginit_cl(a_dbginit_cl),
					       .a_grst_cl(a_grst_cl),
					       .clkctrl_dn_jl(clkctrl_dn_jl),
					       .clsp_ctrl_srarm_pre_jl(clsp_ctrl_srarm_pre_jl),
					       .creg_cken_vld_cl(creg_cken_vld_cl),
					       .ctu_ccx_cmp_cken_cg(ctu_ccx_cmp_cken_cg),
					       .ctu_dbg_cken_pre_jl(ctu_dbg_cken_pre_jl),
					       .ctu_dram02_cken_pre_jl(ctu_dram02_cken_pre_jl),
					       .ctu_dram02_cmp_cken_cg(ctu_dram02_cmp_cken_cg),
					       .ctu_dram13_cken_pre_jl(ctu_dram13_cken_pre_jl),
					       .ctu_dram13_cmp_cken_cg(ctu_dram13_cmp_cken_cg),
					       .ctu_efc_cken_pre_jl(ctu_efc_cken_pre_jl),
					       .ctu_fpu_cmp_cken_cg(ctu_fpu_cmp_cken_cg),
					       .ctu_io_j_err_jl(ctu_io_j_err_jl),
					       .ctu_iob_cken_pre_jl(ctu_iob_cken_pre_jl),
					       .ctu_iob_cmp_cken_cg(ctu_iob_cmp_cken_cg),
					       .ctu_jbi_cken_pre_jl(ctu_jbi_cken_pre_jl),
					       .ctu_jbi_cmp_cken_cg(ctu_jbi_cmp_cken_cg),
					       .ctu_jbusl_cken_pre_jl(ctu_jbusl_cken_pre_jl),
					       .ctu_jbusr_cken_pre_jl(ctu_jbusr_cken_pre_jl),
					       .ctu_misc_cken_pre_jl(ctu_misc_cken_pre_jl),
					       .ctu_scdata0_cmp_cken_cg(ctu_scdata0_cmp_cken_cg),
					       .ctu_scdata1_cmp_cken_cg(ctu_scdata1_cmp_cken_cg),
					       .ctu_scdata2_cmp_cken_cg(ctu_scdata2_cmp_cken_cg),
					       .ctu_scdata3_cmp_cken_cg(ctu_scdata3_cmp_cken_cg),
					       .ctu_sctag0_cmp_cken_cg(ctu_sctag0_cmp_cken_cg),
					       .ctu_sctag1_cmp_cken_cg(ctu_sctag1_cmp_cken_cg),
					       .ctu_sctag2_cmp_cken_cg(ctu_sctag2_cmp_cken_cg),
					       .ctu_sctag3_cmp_cken_cg(ctu_sctag3_cmp_cken_cg),
					       .ctu_sparc0_cmp_cken_cg(ctu_sparc0_cmp_cken_cg),
					       .ctu_sparc1_cmp_cken_cg(ctu_sparc1_cmp_cken_cg),
					       .ctu_sparc2_cmp_cken_cg(ctu_sparc2_cmp_cken_cg),
					       .ctu_sparc3_cmp_cken_cg(ctu_sparc3_cmp_cken_cg),
					       .ctu_sparc4_cmp_cken_cg(ctu_sparc4_cmp_cken_cg),
					       .ctu_sparc5_cmp_cken_cg(ctu_sparc5_cmp_cken_cg),
					       .ctu_sparc6_cmp_cken_cg(ctu_sparc6_cmp_cken_cg),
					       .ctu_sparc7_cmp_cken_cg(ctu_sparc7_cmp_cken_cg),
					       .dbgtrig_dly_cnt_val_cl(dbgtrig_dly_cnt_val_cl[4:0]),
					       .de_dbginit_cl(de_dbginit_cl),
					       .de_grst_cl(de_grst_cl),
					       .dram02_ctu_tr_cl(dram02_ctu_tr_cl),
					       .dram13_ctu_tr_cl(dram13_ctu_tr_cl),
					       .dram_a_grst_cl(dram_a_grst_cl),
					       .iob_ctu_l2_tr_cl(iob_ctu_l2_tr_cl),
					       .iob_ctu_tr_cl(iob_ctu_tr_cl),
					       .jbi_ctu_tr_cl(jbi_ctu_tr_cl),
					       .rd_clkctrl_reg_cl(rd_clkctrl_reg_cl),
					       .rstctrl_disclk_cl(rstctrl_disclk_cl),
					       .rstctrl_enclk_cl(rstctrl_enclk_cl),
					       .rstctrl_idle_cl(rstctrl_idle_cl),
					       .sctag0_ctu_tr_cl(sctag0_ctu_tr_cl),
					       .sctag1_ctu_tr_cl(sctag1_ctu_tr_cl),
					       .sctag2_ctu_tr_cl(sctag2_ctu_tr_cl),
					       .sctag3_ctu_tr_cl(sctag3_ctu_tr_cl),
					       .stop_id_vld_cl(stop_id_vld_cl),
					       .update_clkctrl_reg_cl(update_clkctrl_reg_cl),
					       .start_clk_cl(start_clk_cl),
					       .update_shadow_cl(update_shadow_cl),

					       .a_dbginit_jl(a_dbginit_jl),
					       .a_grst_jl(a_grst_jl),
					       .clkctrl_dn_cl(clkctrl_dn_cl),
					       .clsp_ctrl_srarm_cl(clsp_ctrl_srarm_cl),
					       .cmp_clk(cmp_clk),
					       .creg_cken_vld_jl(creg_cken_vld_jl),
					       .ctu_ccx_cken_cl(ctu_ccx_cken_cl),
					       .ctu_dram02_cken_cl(ctu_dram02_cken_cl),
					       .ctu_dram13_cken_cl(ctu_dram13_cken_cl),
					       .ctu_efc_cken_cl(ctu_efc_cken_cl),
					       .ctu_fpu_cken_cl(ctu_fpu_cken_cl),
					       .ctu_io_j_err_cl(ctu_io_j_err_cl),
					       .ctu_iob_cken_cl(ctu_iob_cken_cl),
					       .ctu_jbi_cken_cl(ctu_jbi_cken_cl),
					       .ctu_scdata0_cken_cl(ctu_scdata0_cken_cl),
					       .ctu_scdata1_cken_cl(ctu_scdata1_cken_cl),
					       .ctu_scdata2_cken_cl(ctu_scdata2_cken_cl),
					       .ctu_scdata3_cken_cl(ctu_scdata3_cken_cl),
					       .ctu_sctag0_cken_cl(ctu_sctag0_cken_cl),
					       .ctu_sctag1_cken_cl(ctu_sctag1_cken_cl),
					       .ctu_sctag2_cken_cl(ctu_sctag2_cken_cl),
					       .ctu_sctag3_cken_cl(ctu_sctag3_cken_cl),
					       .ctu_sparc0_cken_cl(ctu_sparc0_cken_cl),
					       .ctu_sparc1_cken_cl(ctu_sparc1_cken_cl),
					       .ctu_sparc2_cken_cl(ctu_sparc2_cken_cl),
					       .ctu_sparc3_cken_cl(ctu_sparc3_cken_cl),
					       .ctu_sparc4_cken_cl(ctu_sparc4_cken_cl),
					       .ctu_sparc5_cken_cl(ctu_sparc5_cken_cl),
					       .ctu_sparc6_cken_cl(ctu_sparc6_cken_cl),
					       .ctu_sparc7_cken_cl(ctu_sparc7_cken_cl),
					       .dbgtrig_dly_cnt_val(dbgtrig_dly_cnt_val[4:0]),
					       .de_dbginit_jl(de_dbginit_jl),
					       .de_grst_jl(de_grst_jl),
					       .dram02_ctu_tr_jl(dram02_ctu_tr_jl),
					       .dram13_ctu_tr_jl(dram13_ctu_tr_jl),
					       .dram_a_grst_jl(dram_a_grst_jl),
					       .iob_ctu_l2_tr_jl(iob_ctu_l2_tr_jl),
					       .iob_ctu_tr_jl(iob_ctu_tr_jl),
					       .jbi_ctu_tr_jl(jbi_ctu_tr_jl),
					       .jbus_tx_sync(jbus_tx_sync),
					       .rstctrl_disclk_jl(rstctrl_disclk_jl),
					       .rstctrl_enclk_jl(rstctrl_enclk_jl),
					       .rstctrl_idle_jl(rstctrl_idle_jl),
					       .sctag0_ctu_tr(sctag0_ctu_tr),
					       .sctag1_ctu_tr(sctag1_ctu_tr),
					       .sctag2_ctu_tr(sctag2_ctu_tr),
					       .sctag3_ctu_tr(sctag3_ctu_tr),
					       .stop_id_vld_jl(stop_id_vld_jl),
					       .jbus_rx_sync(jbus_rx_sync),
					       .io_pwron_rst_l(io_pwron_rst_l),
					       .update_shadow_jl(update_shadow_jl),
					       .ctu_jbus_rx_sync_cl(ctu_jbus_rx_sync_cl),
					       .ctu_jbusr_cken_cl(ctu_jbusr_cken_cl),
					       .ctu_jbusl_cken_cl(ctu_jbusl_cken_cl),
					       .ctu_misc_cken_cl(ctu_misc_cken_cl),
					       .ctu_dbg_cken_cl(ctu_dbg_cken_cl),
					       .update_clkctrl_reg_jl(update_clkctrl_reg_jl),
					       .rd_clkctrl_reg_jl(rd_clkctrl_reg_jl),
                                               .start_clk_early_jl(start_2clk_early_jl),
					       .jtag_clsp_force_cken_cmp(jtag_clsp_force_cken_cmp),
					       .testmode_l(testmode_l));


     ctu_clsp_synch_dldg u_ctu_clsp_synch_dldg(

					       .start_clk_dg(start_clk_dg),
					       .ctu_ddr0_dram_cken_dg(ctu_ddr0_dram_cken_dg),
					       .ctu_ddr1_dram_cken_dg(ctu_ddr1_dram_cken_dg),
					       .ctu_ddr2_dram_cken_dg(ctu_ddr2_dram_cken_dg),
					       .ctu_ddr3_dram_cken_dg(ctu_ddr3_dram_cken_dg),
					       .ctu_dram02_dram_cken_dg(ctu_dram02_dram_cken_dg),
					       .ctu_dram13_dram_cken_dg(ctu_dram13_dram_cken_dg),
					       .a_grst_dg(a_grst_dg),
					       .a_dbginit_dg(a_dbginit_dg),
					       .de_grst_dsync_edge_dg(de_grst_dsync_edge_dg),
					       .de_dbginit_dsync_edge_dg(de_dbginit_dsync_edge_dg),

					       .io_pwron_rst_l(io_pwron_rst_l),
					       .cmp_gclk(cmp_gclk),
					       .ctu_ddr0_dram_cken_dl(ctu_ddr0_dram_cken_dl),
					       .ctu_ddr1_dram_cken_dl(ctu_ddr1_dram_cken_dl),
					       .ctu_ddr2_dram_cken_dl(ctu_ddr2_dram_cken_dl),
					       .ctu_ddr3_dram_cken_dl(ctu_ddr3_dram_cken_dl),
					       .ctu_dram02_dram_cken_dl(ctu_dram02_dram_cken_dl),
					       .ctu_dram13_dram_cken_dl(ctu_dram13_dram_cken_dl),
					       .start_clk_dl(start_clk_dl),
					       .a_grst_dl(a_grst_dl),
					       .a_dbginit_dl(a_dbginit_dl),
					       .de_grst_dsync_edge_dl(de_grst_dsync_edge_dl),
					       .de_dbginit_dsync_edge_dl(de_dbginit_dsync_edge_dl));


     ctu_clsp_synch_jldl u_ctu_clsp_synch_jldl(

					       .ctu_ddr0_dll_delayctr(ctu_ddr0_dll_delayctr[2:0]),
					       .ctu_ddr0_dram_cken_dl(ctu_ddr0_dram_cken_dl),
					       .ctu_ddr1_dll_delayctr(ctu_ddr1_dll_delayctr[2:0]),
					       .ctu_ddr1_dram_cken_dl(ctu_ddr1_dram_cken_dl),
					       .ctu_ddr2_dll_delayctr(ctu_ddr2_dll_delayctr[2:0]),
					       .ctu_ddr2_dram_cken_dl(ctu_ddr2_dram_cken_dl),
					       .ctu_ddr3_dll_delayctr(ctu_ddr3_dll_delayctr[2:0]),
					       .ctu_ddr3_dram_cken_dl(ctu_ddr3_dram_cken_dl),
					       .ctu_dll0_byp_l(ctu_dll0_byp_l),
					       .ctu_dll0_byp_val(ctu_dll0_byp_val[4:0]),
					       .ctu_dll1_byp_l(ctu_dll1_byp_l),
					       .ctu_dll1_byp_val(ctu_dll1_byp_val[4:0]),
					       .ctu_dll2_byp_l(ctu_dll2_byp_l),
					       .ctu_dll2_byp_val(ctu_dll2_byp_val[4:0]),
					       .ctu_dll3_byp_l(ctu_dll3_byp_l),
					       .ctu_dll3_byp_val(ctu_dll3_byp_val[4:0]),
					       .ctu_dram02_dram_cken_dl(ctu_dram02_dram_cken_dl),
					       .ctu_dram13_dram_cken_dl(ctu_dram13_dram_cken_dl),
					       .ctu_ddr0_iodll_rst_l(ctu_ddr0_iodll_rst_l),
					       .ctu_ddr1_iodll_rst_l(ctu_ddr1_iodll_rst_l),
					       .ctu_ddr2_iodll_rst_l(ctu_ddr2_iodll_rst_l),
					       .ctu_ddr3_iodll_rst_l(ctu_ddr3_iodll_rst_l),
					       .start_clk_dl(start_clk_dl),

					       .cmp_clk(cmp_clk),
					       .coin_edge(coin_edge),
					       .ctu_ddr0_cken_cl(ctu_ddr0_cken_cl),
					       .ctu_ddr0_dll_delayctr_jl(ctu_ddr0_dll_delayctr_jl[2:0]),
					       .ctu_ddr0_iodll_rst_jl_l(ctu_ddr0_iodll_rst_jl_l),
					       .ctu_ddr1_cken_cl(ctu_ddr1_cken_cl),
					       .ctu_ddr1_dll_delayctr_jl(ctu_ddr1_dll_delayctr_jl[2:0]),
					       .ctu_ddr1_iodll_rst_jl_l(ctu_ddr1_iodll_rst_jl_l),
					       .ctu_ddr2_cken_cl(ctu_ddr2_cken_cl),
					       .ctu_ddr2_dll_delayctr_jl(ctu_ddr2_dll_delayctr_jl[2:0]),
					       .ctu_ddr2_iodll_rst_jl_l(ctu_ddr2_iodll_rst_jl_l),
					       .ctu_ddr3_cken_cl(ctu_ddr3_cken_cl),
					       .ctu_ddr3_dll_delayctr_jl(ctu_ddr3_dll_delayctr_jl[2:0]),
					       .ctu_ddr3_iodll_rst_jl_l(ctu_ddr3_iodll_rst_jl_l),
					       .ctu_dll0_byp_l_jl(ctu_dll0_byp_l_jl),
					       .ctu_dll0_byp_val_jl(ctu_dll0_byp_val_jl[4:0]),
					       .ctu_dll1_byp_l_jl(ctu_dll1_byp_l_jl),
					       .ctu_dll1_byp_val_jl(ctu_dll1_byp_val_jl[4:0]),
					       .ctu_dll2_byp_l_jl(ctu_dll2_byp_l_jl),
					       .ctu_dll2_byp_val_jl(ctu_dll2_byp_val_jl[4:0]),
					       .ctu_dll3_byp_l_jl(ctu_dll3_byp_l_jl),
					       .ctu_dll3_byp_val_jl(ctu_dll3_byp_val_jl[4:0]),
					       .ctu_dram02_cken_cl(ctu_dram02_cken_cl),
					       .ctu_dram13_cken_cl(ctu_dram13_cken_cl),
					       .jbus_rx_sync(jbus_rx_sync),
					       .start_clk_cl(start_clk_cl),
					       .io_pwron_rst_l(io_pwron_rst_l),
					       .ctu_dram_tx_sync_early(ctu_dram_tx_sync_early));









     ctu_clsp_dramgif u_ctu_clsp_dramgif(

					 .dram_grst_out_l(dram_grst_out_l),
					 .dram_arst_l(dram_arst_l),
					 .dram_gdbginit_out_l(dram_gdbginit_out_l),
					 .dram_adbginit_l(dram_adbginit_l),
					 .ctu_dram02_dram_cken(ctu_dram02_dram_cken),
					 .ctu_dram13_dram_cken(ctu_dram13_dram_cken),
					 .ctu_ddr0_dram_cken(ctu_ddr0_dram_cken),
					 .ctu_ddr1_dram_cken(ctu_ddr1_dram_cken),
					 .ctu_ddr2_dram_cken(ctu_ddr2_dram_cken),
					 .ctu_ddr3_dram_cken(ctu_ddr3_dram_cken),

					 .io_pwron_rst_l(io_pwron_rst_l),
					 .start_clk_early_jl(start_clk_early_jl),
					 .testmode_l(testmode_l),
					 .dram_gclk(dram_gclk),
					 .start_clk_dg(start_clk_dg),
					 .shadreg_div_dmult(shadreg_div_dmult[9:0]),
					 .de_grst_dsync_edge_dg(de_grst_dsync_edge_dg),
					 .de_dbginit_dsync_edge_dg(de_dbginit_dsync_edge_dg),
					 .a_grst_dg(a_grst_dg),
					 .a_dbginit_dg(a_dbginit_dg),
					 .ctu_dram02_dram_cken_dg(ctu_dram02_dram_cken_dg),
					 .ctu_dram13_dram_cken_dg(ctu_dram13_dram_cken_dg),
					 .ctu_ddr0_dram_cken_dg(ctu_ddr0_dram_cken_dg),
					 .ctu_ddr1_dram_cken_dg(ctu_ddr1_dram_cken_dg),
					 .ctu_ddr2_dram_cken_dg(ctu_ddr2_dram_cken_dg),
					 .ctu_ddr3_dram_cken_dg(ctu_ddr3_dram_cken_dg),
					 .jtag_clsp_force_cken_dram(jtag_clsp_force_cken_dram));
     ctu_clsp_jbusgif u_ctu_clsp_jbusgif(

					 .ctu_dram02_jbus_cken(ctu_dram02_jbus_cken),
					 .ctu_dram13_jbus_cken(ctu_dram13_jbus_cken),
					 .ctu_jbi_jbus_cken(ctu_jbi_jbus_cken),
					 .ctu_iob_jbus_cken(ctu_iob_jbus_cken),
					 .ctu_jbusl_jbus_cken(ctu_jbusl_jbus_cken),
					 .ctu_jbusr_jbus_cken(ctu_jbusr_jbus_cken),
					 .ctu_misc_jbus_cken(ctu_misc_jbus_cken),
					 .ctu_efc_jbus_cken(ctu_efc_jbus_cken),
					 .ctu_dbg_jbus_cken(ctu_dbg_jbus_cken),
					 .jbus_grst_out_l(jbus_grst_out_l),
					 .jbus_arst_l(jbus_arst_l),
					 .jbus_gdbginit_out_l(jbus_gdbginit_out_l),
					 .jbus_adbginit_l(jbus_adbginit_l),

					 .io_pwron_rst_l(io_pwron_rst_l),
					 .start_clk_jl(start_clk_jl),
					 .testmode_l(testmode_l),
					 .jbus_gclk(jbus_gclk),
					 .jbus_grst_jl_l(jbus_grst_jl_l),
					 .jbus_dbginit_jl_l(jbus_dbginit_jl_l),
					 .ctu_dram02_cken_jl(ctu_dram02_cken_jl),
					 .ctu_dram13_cken_jl(ctu_dram13_cken_jl),
					 .ctu_iob_cken_jl(ctu_iob_cken_jl),
					 .ctu_efc_cken_jl(ctu_efc_cken_jl),
					 .ctu_dbg_cken_jl(ctu_dbg_cken_jl),
					 .ctu_jbusl_cken_jl(ctu_jbusl_cken_jl),
					 .ctu_jbusr_cken_jl(ctu_jbusr_cken_jl),
					 .ctu_jbi_cken_jl(ctu_jbi_cken_jl),
					 .ctu_misc_cken_jl(ctu_misc_cken_jl),
					 .jtag_clsp_force_cken_jbus(jtag_clsp_force_cken_jbus));


     ctu_clsp_cmpgif u_ctu_clsp_cmpgif(

				       .cmp_grst_out_l(cmp_grst_out_l),
				       .cmp_arst_l(cmp_arst_l),
				       .cmp_gdbginit_out_l(cmp_gdbginit_out_l),
				       .cmp_adbginit_l(cmp_adbginit_l),
				       .ctu_dram_tx_sync_out(ctu_dram_tx_sync_out),
				       .ctu_dram_rx_sync_out(ctu_dram_rx_sync_out),
				       .ctu_jbus_tx_sync_out(ctu_jbus_tx_sync_out),
				       .ctu_jbus_rx_sync_out(ctu_jbus_rx_sync_out),
				       .ctu_ccx_cmp_cken(ctu_ccx_cmp_cken),
				       .ctu_dram02_cmp_cken(ctu_dram02_cmp_cken),
				       .ctu_dram13_cmp_cken(ctu_dram13_cmp_cken),
				       .ctu_fpu_cmp_cken(ctu_fpu_cmp_cken),
				       .ctu_iob_cmp_cken(ctu_iob_cmp_cken),
				       .ctu_jbi_cmp_cken(ctu_jbi_cmp_cken),
				       .ctu_scdata0_cmp_cken(ctu_scdata0_cmp_cken),
				       .ctu_scdata1_cmp_cken(ctu_scdata1_cmp_cken),
				       .ctu_scdata2_cmp_cken(ctu_scdata2_cmp_cken),
				       .ctu_scdata3_cmp_cken(ctu_scdata3_cmp_cken),
				       .ctu_sctag0_cmp_cken(ctu_sctag0_cmp_cken),
				       .ctu_sctag1_cmp_cken(ctu_sctag1_cmp_cken),
				       .ctu_sctag2_cmp_cken(ctu_sctag2_cmp_cken),
				       .ctu_sctag3_cmp_cken(ctu_sctag3_cmp_cken),
				       .ctu_sparc0_cmp_cken(ctu_sparc0_cmp_cken),
				       .ctu_sparc1_cmp_cken(ctu_sparc1_cmp_cken),
				       .ctu_sparc2_cmp_cken(ctu_sparc2_cmp_cken),
				       .ctu_sparc3_cmp_cken(ctu_sparc3_cmp_cken),
				       .ctu_sparc4_cmp_cken(ctu_sparc4_cmp_cken),
				       .ctu_sparc5_cmp_cken(ctu_sparc5_cmp_cken),
				       .ctu_sparc6_cmp_cken(ctu_sparc6_cmp_cken),
				       .ctu_sparc7_cmp_cken(ctu_sparc7_cmp_cken),

				       .io_pwron_rst_l(io_pwron_rst_l),
				       .cmp_gclk(cmp_gclk),
				       .start_clk_cl(start_clk_cl),
				       .cmp_grst_cl_l(cmp_grst_cl_l),
				       .cmp_dbginit_cl_l(cmp_dbginit_cl_l),
				       .ctu_dram_tx_sync_cl(ctu_dram_tx_sync_cl),
				       .ctu_dram_rx_sync_cl(ctu_dram_rx_sync_cl),
				       .ctu_jbus_tx_sync_cl(ctu_jbus_tx_sync_cl),
				       .ctu_jbus_rx_sync_cl(ctu_jbus_rx_sync_cl),
				       .ctu_ccx_cmp_cken_cg(ctu_ccx_cmp_cken_cg),
				       .ctu_dram02_cmp_cken_cg(ctu_dram02_cmp_cken_cg),
				       .ctu_dram13_cmp_cken_cg(ctu_dram13_cmp_cken_cg),
				       .ctu_fpu_cmp_cken_cg(ctu_fpu_cmp_cken_cg),
				       .ctu_iob_cmp_cken_cg(ctu_iob_cmp_cken_cg),
				       .ctu_jbi_cmp_cken_cg(ctu_jbi_cmp_cken_cg),
				       .ctu_scdata0_cmp_cken_cg(ctu_scdata0_cmp_cken_cg),
				       .ctu_scdata1_cmp_cken_cg(ctu_scdata1_cmp_cken_cg),
				       .ctu_scdata2_cmp_cken_cg(ctu_scdata2_cmp_cken_cg),
				       .ctu_scdata3_cmp_cken_cg(ctu_scdata3_cmp_cken_cg),
				       .ctu_sctag0_cmp_cken_cg(ctu_sctag0_cmp_cken_cg),
				       .ctu_sctag1_cmp_cken_cg(ctu_sctag1_cmp_cken_cg),
				       .ctu_sctag2_cmp_cken_cg(ctu_sctag2_cmp_cken_cg),
				       .ctu_sctag3_cmp_cken_cg(ctu_sctag3_cmp_cken_cg),
				       .ctu_sparc0_cmp_cken_cg(ctu_sparc0_cmp_cken_cg),
				       .ctu_sparc1_cmp_cken_cg(ctu_sparc1_cmp_cken_cg),
				       .ctu_sparc2_cmp_cken_cg(ctu_sparc2_cmp_cken_cg),
				       .ctu_sparc3_cmp_cken_cg(ctu_sparc3_cmp_cken_cg),
				       .ctu_sparc4_cmp_cken_cg(ctu_sparc4_cmp_cken_cg),
				       .ctu_sparc5_cmp_cken_cg(ctu_sparc5_cmp_cken_cg),
				       .ctu_sparc6_cmp_cken_cg(ctu_sparc6_cmp_cken_cg),
				       .ctu_sparc7_cmp_cken_cg(ctu_sparc7_cmp_cken_cg));









       ucb_noflow  #(`IOB_CLK_WIDTH,`CLK_IOB_WIDTH,64)  
               u_ctu_clsp_ucb (

			       .ucb_iob_stall(clsp_iob_stall),
			       .rd_req_vld(ucb_clsp_rd_req_vld),
			       .wr_req_vld(ucb_clsp_wr_req_vld),
			       .thr_id_in(ucb_clsp_thr_id_in[`UCB_THR_HI-`UCB_THR_LO:0]),
			       .buf_id_in(ucb_clsp_buf_id_in[`UCB_BUF_HI-`UCB_BUF_LO:0]),
			       .size_in	(),
			       .addr_in	(ucb_clsp_addr_in[`UCB_ADDR_HI-`UCB_ADDR_LO:0]),
			       .data_in	(ucb_clsp_data_in[`UCB_DATA_HI-`UCB_DATA_LO:0]),
			       .int_busy(),
			       .ucb_iob_vld(clsp_iob_vld),
			       .ucb_iob_data(clsp_iob_data[`CLK_IOB_WIDTH-1:0]),

			       .clk	(jbus_clk),
			       .rst_l	(jbus_rst_l),
			       .iob_ucb_vld(iob_clsp_vld),
			       .iob_ucb_data(iob_clsp_data[`IOB_CLK_WIDTH-1:0]),
			       .rd_ack_vld(clsp_ucb_rd_ack_vld),
			       .rd_nack_vld(clsp_ucb_rd_nack_vld),
			       .thr_id_out(clsp_ucb_thr_id_out[`UCB_THR_HI-`UCB_THR_LO:0]),
			       .buf_id_out(clsp_ucb_buf_id_out[`UCB_BUF_HI-`UCB_BUF_LO:0]),
			       .data128	(1'b0),
			       .data_out(clsp_ucb_data_out[63:0]),
			       .int_vld	(1'b0),
			       .int_typ	({`UCB_PKT_HI-`UCB_PKT_LO+1{1'b0}}),
			       .int_thr_id({`UCB_THR_HI-`UCB_THR_LO+1{1'b0}}),
			       .dev_id	({`UCB_INT_DEV_HI-`UCB_INT_DEV_LO+1{1'b0}}),
			       .int_stat({`UCB_INT_STAT_HI-`UCB_INT_STAT_LO+1{1'b0}}),
			       .int_vec	({`UCB_INT_VEC_HI-`UCB_INT_VEC_LO+1{1'b0}}),
			       .iob_ucb_stall(iob_clsp_stall));


     ctu_clsp_creg u_ctu_clsp_creg (

				    .reg_cdiv_0(reg_cdiv_0),
				    .reg_ddiv_0(reg_ddiv_0),
				    .reg_jdiv_0(reg_jdiv_0),
				    .reg_cdiv_vec(reg_cdiv_vec[14:0]),
				    .reg_ddiv_vec(reg_ddiv_vec[14:0]),
				    .reg_jdiv_vec(reg_jdiv_vec[14:0]),
				    .stretch_cnt_vec(stretch_cnt_vec[14:0]),
				    .clk_stretch_cnt_val_6(clk_stretch_cnt_val_6),
				    .clk_stretch_cnt_val_odd(clk_stretch_cnt_val_odd),
				    .reg_div_cmult(reg_div_cmult[13:0]),
				    .reg_div_dmult(reg_div_dmult[9:0]),
				    .reg_div_jmult(reg_div_jmult[9:0]),
				    .dsync_reg_init(dsync_reg_init[4:0]),
				    .dsync_reg_period(dsync_reg_period[4:0]),
				    .dsync_reg_rx0(dsync_reg_rx0[1:0]),
				    .dsync_reg_rx1(dsync_reg_rx1[1:0]),
				    .dsync_reg_rx2(dsync_reg_rx2[1:0]),
				    .dsync_reg_tx0(dsync_reg_tx0[4:0]),
				    .dsync_reg_tx1(dsync_reg_tx1[4:0]),
				    .dsync_reg_tx2(dsync_reg_tx2[4:0]),
				    .jsync_reg_init(jsync_reg_init[4:0]),
				    .jsync_reg_period(jsync_reg_period[4:0]),
				    .jsync_reg_rx0(jsync_reg_rx0[1:0]),
				    .jsync_reg_rx1(jsync_reg_rx1[1:0]),
				    .jsync_reg_rx2(jsync_reg_rx2[1:0]),
				    .jsync_reg_tx0(jsync_reg_tx0[4:0]),
				    .jsync_reg_tx1(jsync_reg_tx1[4:0]),
				    .jsync_reg_tx2(jsync_reg_tx2[4:0]),
				    .ctu_spc_const_maskid(ctu_spc_const_maskid[7:0]),
				    .frq_chng_pending_jl(frq_chng_pending_jl),
				    .ctu_ddr0_dll_delayctr_jl(ctu_ddr0_dll_delayctr_jl[2:0]),
				    .ctu_ddr1_dll_delayctr_jl(ctu_ddr1_dll_delayctr_jl[2:0]),
				    .ctu_ddr2_dll_delayctr_jl(ctu_ddr2_dll_delayctr_jl[2:0]),
				    .ctu_ddr3_dll_delayctr_jl(ctu_ddr3_dll_delayctr_jl[2:0]),
				    .de_dbginit_jl(de_dbginit_jl),
				    .a_dbginit_jl(a_dbginit_jl),
				    .clsp_ucb_rd_ack_vld(clsp_ucb_rd_ack_vld),
				    .clsp_ucb_rd_nack_vld(clsp_ucb_rd_nack_vld),
				    .clsp_ucb_thr_id_out(clsp_ucb_thr_id_out[`UCB_THR_HI-`UCB_THR_LO:0]),
				    .clsp_ucb_buf_id_out(clsp_ucb_buf_id_out[`UCB_BUF_HI-`UCB_BUF_LO:0]),
				    .clsp_ucb_data_out(clsp_ucb_data_out[REG_WIDTH-1:0]),
				    .dbgtrig_dly_cnt_val(dbgtrig_dly_cnt_val[4:0]),
				    .jbus_grst_jl_l(jbus_grst_jl_l),
				    .jbus_dbginit_jl_l(jbus_dbginit_jl_l),
				    .clk_stretch_trig(clk_stretch_trig),
				    .ctu_dll3_byp_val_jl(ctu_dll3_byp_val_jl[4:0]),
				    .ctu_dll2_byp_val_jl(ctu_dll2_byp_val_jl[4:0]),
				    .ctu_dll1_byp_val_jl(ctu_dll1_byp_val_jl[4:0]),
				    .ctu_dll0_byp_val_jl(ctu_dll0_byp_val_jl[4:0]),
				    .ctu_dll3_byp_l_jl(ctu_dll3_byp_l_jl),
				    .ctu_dll2_byp_l_jl(ctu_dll2_byp_l_jl),
				    .ctu_dll1_byp_l_jl(ctu_dll1_byp_l_jl),
				    .ctu_dll0_byp_l_jl(ctu_dll0_byp_l_jl),
				    .stop_id_vld_jl(stop_id_vld_jl),
				    .stop_id_decoded(stop_id_decoded[`CCTRLSM_MAX_ST-1:0]),
				    .update_clkctrl_reg_jl(update_clkctrl_reg_jl),
				    .clkctrl_data_in_reg(clkctrl_data_in_reg[63:0]),
				    .rd_clkctrl_reg_jl(rd_clkctrl_reg_jl),

				    .se	(se),
				    .mask_major_id(mask_major_id[3:0]),
				    .mask_minor_id(mask_minor_id[3:0]),
				    .ddr0_ctu_dll_lock(ddr0_ctu_dll_lock),
				    .ddr1_ctu_dll_lock(ddr1_ctu_dll_lock),
				    .ddr2_ctu_dll_lock(ddr2_ctu_dll_lock),
				    .ddr3_ctu_dll_lock(ddr3_ctu_dll_lock),
				    .ddr0_ctu_dll_overflow(ddr0_ctu_dll_overflow),
				    .ddr1_ctu_dll_overflow(ddr1_ctu_dll_overflow),
				    .ddr2_ctu_dll_overflow(ddr2_ctu_dll_overflow),
				    .ddr3_ctu_dll_overflow(ddr3_ctu_dll_overflow),
				    .jbus_clk(jbus_clk),
				    .rst_l(jbus_rst_l),
				    .io_pwron_rst_l(io_pwron_rst_l),
				    .start_clk_jl(start_clk_jl),
				    .start_clk_early_jl(start_clk_early_jl),
				    .a_grst_jl(a_grst_jl),
				    .io_clk_stretch(io_clk_stretch),
				    .clsp_ctrl_rd_bus_cl(clsp_ctrl_rd_bus_cl[63:0]),
				    .shadreg_div_jmult(shadreg_div_jmult[9:0]),
				    .de_grst_jsync_edge(de_grst_jsync_edge),
				    .de_dbginit_jsync_edge(de_dbginit_jsync_edge),
				    .ucb_clsp_rd_req_vld(ucb_clsp_rd_req_vld),
				    .ucb_clsp_wr_req_vld(ucb_clsp_wr_req_vld),
				    .ucb_clsp_addr_in(ucb_clsp_addr_in[`UCB_ADDR_HI-`UCB_ADDR_LO:0]),
				    .ucb_clsp_data_in(ucb_clsp_data_in[`UCB_DATA_HI-`UCB_DATA_LO:0]),
				    .ucb_clsp_thr_id_in(ucb_clsp_thr_id_in[`UCB_THR_HI-`UCB_THR_LO:0]),
				    .ucb_clsp_buf_id_in(ucb_clsp_buf_id_in[`UCB_BUF_HI-`UCB_BUF_LO:0]),
				    .bypclksel(jtag_clsp_sel_jbus[2]),
				    .jbus_mult_rst_l(jbus_mult_rst_l),
				    .jtag_clsp_stop_id_vld(jtag_clsp_stop_id_vld),
				    .jtag_clsp_stop_id(jtag_clsp_stop_id[5:0]),
				    .dll3_ctu_ctrl(dll3_ctu_ctrl[4:0]),
				    .dll2_ctu_ctrl(dll2_ctu_ctrl[4:0]),
				    .dll1_ctu_ctrl(dll1_ctu_ctrl[4:0]),
				    .dll0_ctu_ctrl(dll0_ctu_ctrl[4:0]));









     ctu_clsp_clkctrl u_ctu_clsp_clkctrl(

					 .clsp_ctrl_rd_bus_cl(clsp_ctrl_rd_bus_cl[63:0]),
					 .ctu_sparc0_cken_cl(ctu_sparc0_cken_cl),
					 .ctu_sparc1_cken_cl(ctu_sparc1_cken_cl),
					 .ctu_sparc2_cken_cl(ctu_sparc2_cken_cl),
					 .ctu_sparc3_cken_cl(ctu_sparc3_cken_cl),
					 .ctu_sparc4_cken_cl(ctu_sparc4_cken_cl),
					 .ctu_sparc5_cken_cl(ctu_sparc5_cken_cl),
					 .ctu_sparc6_cken_cl(ctu_sparc6_cken_cl),
					 .ctu_sparc7_cken_cl(ctu_sparc7_cken_cl),
					 .ctu_scdata0_cken_cl(ctu_scdata0_cken_cl),
					 .ctu_scdata1_cken_cl(ctu_scdata1_cken_cl),
					 .ctu_scdata2_cken_cl(ctu_scdata2_cken_cl),
					 .ctu_scdata3_cken_cl(ctu_scdata3_cken_cl),
					 .ctu_sctag0_cken_cl(ctu_sctag0_cken_cl),
					 .ctu_sctag1_cken_cl(ctu_sctag1_cken_cl),
					 .ctu_sctag2_cken_cl(ctu_sctag2_cken_cl),
					 .ctu_sctag3_cken_cl(ctu_sctag3_cken_cl),
					 .ctu_dram02_cken_cl(ctu_dram02_cken_cl),
					 .ctu_dram13_cken_cl(ctu_dram13_cken_cl),
					 .ctu_ccx_cken_cl(ctu_ccx_cken_cl),
					 .ctu_fpu_cken_cl(ctu_fpu_cken_cl),
					 .ctu_ddr0_cken_cl(ctu_ddr0_cken_cl),
					 .ctu_ddr1_cken_cl(ctu_ddr1_cken_cl),
					 .ctu_ddr2_cken_cl(ctu_ddr2_cken_cl),
					 .ctu_ddr3_cken_cl(ctu_ddr3_cken_cl),
					 .ctu_iob_cken_cl(ctu_iob_cken_cl),
					 .ctu_efc_cken_cl(ctu_efc_cken_cl),
					 .ctu_dbg_cken_cl(ctu_dbg_cken_cl),
					 .ctu_jbi_cken_cl(ctu_jbi_cken_cl),
					 .ctu_jbusl_cken_cl(ctu_jbusl_cken_cl),
					 .ctu_misc_cken_cl(ctu_misc_cken_cl),
					 .ctu_jbusr_cken_cl(ctu_jbusr_cken_cl),
					 .ctu_io_j_err_cl(ctu_io_j_err_cl),
					 .clkctrl_dn_cl(clkctrl_dn_cl),
					 .clsp_ctrl_srarm_cl(clsp_ctrl_srarm_cl),

					 .cmp_clk(cmp_clk),
					 .io_pwron_rst_l(io_pwron_rst_l),
					 .creg_cken_vld_cl(creg_cken_vld_cl),
					 .jbus_tx_sync(jbus_tx_sync),
					 .start_clk_cl(start_clk_cl),
					 .rstctrl_idle_cl(rstctrl_idle_cl),
					 .rstctrl_disclk_cl(rstctrl_disclk_cl),
					 .rstctrl_enclk_cl(rstctrl_enclk_cl),
					 .sctag0_ctu_tr_cl(sctag0_ctu_tr_cl),
					 .sctag1_ctu_tr_cl(sctag1_ctu_tr_cl),
					 .sctag2_ctu_tr_cl(sctag2_ctu_tr_cl),
					 .sctag3_ctu_tr_cl(sctag3_ctu_tr_cl),
					 .iob_ctu_tr_cl(iob_ctu_tr_cl),
					 .dram02_ctu_tr_cl(dram02_ctu_tr_cl),
					 .dram13_ctu_tr_cl(dram13_ctu_tr_cl),
					 .jbi_ctu_tr_cl(jbi_ctu_tr_cl),
					 .iob_ctu_l2_tr_cl(iob_ctu_l2_tr_cl),
					 .dbgtrig_dly_cnt_val_cl(dbgtrig_dly_cnt_val_cl[4:0]),
					 .update_clkctrl_reg_cl(update_clkctrl_reg_cl),
					 .clkctrl_data_in_reg(clkctrl_data_in_reg[63:0]),
					 .rd_clkctrl_reg_cl(rd_clkctrl_reg_cl),
					 .stop_id_vld_cl(stop_id_vld_cl),
					 .stop_id_decoded(stop_id_decoded[`CCTRLSM_MAX_ST-1:0]));









     ctu_clsp_ctrl u_ctu_clsp_ctrl (

				    .start_clk_jl(start_clk_jl),
				    .start_clk_early_jl(start_clk_early_jl),
				    .start_2clk_early_jl(start_2clk_early_jl),
				    .update_shadow_jl(update_shadow_jl),
				    .ctu_dram_selfrsh(ctu_dram_selfrsh),
				    .de_grst_jl(de_grst_jl),
				    .a_grst_jl(a_grst_jl),
				    .dram_a_grst_jl(dram_a_grst_jl),
				    .wrm_rst_ref(wrm_rst_ref),
				    .wrm_rst_fc_ref(wrm_rst_fc_ref),
				    .tst_rst_ref(tst_rst_ref),
				    .ctu_efc_read_start(ctu_efc_read_start),
				    .ctu_iob_wake_thr(ctu_iob_wake_thr),
				    .creg_cken_vld_jl(creg_cken_vld_jl),
				    .ctu_io_j_err(ctu_io_j_err),
				    .ctu_tst_pre_grst_l(ctu_tst_pre_grst_l),
				    .ctu_ddr0_iodll_rst_jl_l(ctu_ddr0_iodll_rst_jl_l),
				    .ctu_ddr1_iodll_rst_jl_l(ctu_ddr1_iodll_rst_jl_l),
				    .ctu_ddr2_iodll_rst_jl_l(ctu_ddr2_iodll_rst_jl_l),
				    .ctu_ddr3_iodll_rst_jl_l(ctu_ddr3_iodll_rst_jl_l),
				    .clsp_bist_dobist(clsp_bist_dobist),
				    .clsp_bist_type(clsp_bist_type),
				    .clsp_bist_ctrl(clsp_bist_ctrl[5:0]),
				    .rstctrl_disclk_jl(rstctrl_disclk_jl),
				    .rstctrl_enclk_jl(rstctrl_enclk_jl),
				    .rstctrl_idle_jl(rstctrl_idle_jl),
				    .ssiclk_enable(ssiclk_enable),
				    .ctu_iob_resetstat_wr(ctu_iob_resetstat_wr),
				    .ctu_iob_resetstat(ctu_iob_resetstat[2:0]),

				    .jbus_clk(jbus_clk),
				    .io_pwron_rst_l(io_pwron_rst_l),
				    .pll_locked_jl(pll_locked_jl),
				    .io_j_rst_l(io_j_rst_l),
				    .frq_chng_pending_jl(frq_chng_pending_jl),
				    .clsp_ctrl_srarm_jl(clsp_ctrl_srarm_jl),
				    .clkctrl_dn_jl(clkctrl_dn_jl),
				    .jbus_grst_jl_l(jbus_grst_jl_l),
				    .io_do_bist(io_do_bist),
				    .io_pll_char_in(io_pll_char_in),
				    .dft_wake_thr(dft_wake_thr),
				    .de_dll_rst_dn(ctu_ddr0_iodll_rst_l),
				    .ctu_io_j_err_jl(ctu_io_j_err_jl),
				    .testmode_l(testmode_l),
				    .bypclksel( jtag_clsp_sel_jbus[2]),
				    .jtag_clsp_ignore_wrm_rst(jtag_clsp_ignore_wrm_rst));


     ctu_clsp_pllcnt u_ctu_clsp_pllcnt (

					.pll_locked_jl(pll_locked_jl),
					.pll_reset_ref_l(pll_reset_ref_l),
					.pll_reset_ref_dly1_l(pll_reset_ref_dly1_l),

					.pll_raw_clk_out(pll_raw_clk_out),
					.io_pwron_rst_l(io_pwron_rst_l),
					.testmode_l(testmode_l),
					.wrm_rst_ref(wrm_rst_ref),
					.wrm_rst_fc_ref(wrm_rst_fc_ref),
					.tst_rst_ref(tst_rst_ref),
					.bypclksel( jtag_clsp_sel_jbus[2]));








     ctu_clsp_clkgn u_ctu_clsp_clkgn(

				     .jbus_gclk_out(jbus_gclk_out),
				     .shadreg_div_dmult(shadreg_div_dmult[9:0]),
				     .shadreg_div_jmult(shadreg_div_jmult[9:0]),
				     .a_dbginit_dl(a_dbginit_dl),
				     .a_grst_dl(a_grst_dl),
				     .cmp_dbginit_cl_l(cmp_dbginit_cl_l),
				     .cmp_gclk_out(cmp_gclk_out),
				     .cmp_grst_cl_l(cmp_grst_cl_l),
				     .coin_edge(coin_edge),
				     .ctu_dram_rx_sync_cl(ctu_dram_rx_sync_cl),
				     .ctu_dram_tx_sync_cl(ctu_dram_tx_sync_cl),
				     .ctu_jbi_ssiclk(ctu_jbi_ssiclk),
				     .ctu_jbus_rx_sync_cl(ctu_jbus_rx_sync_cl),
				     .ctu_jbus_tx_sync_cl(ctu_jbus_tx_sync_cl),
				     .de_dbginit_dsync_edge_dl(de_dbginit_dsync_edge_dl),
				     .de_dbginit_jsync_edge(de_dbginit_jsync_edge),
				     .de_grst_dsync_edge_dl(de_grst_dsync_edge_dl),
				     .de_grst_jsync_edge(de_grst_jsync_edge),
				     .dram_gclk_out(dram_gclk_out),
				     .jbus_gclk_dup_out(jbus_gclk_dup_out),
				     .jbus_mult_rst_l(jbus_mult_rst_l),

				     .a_dbginit_cl(a_dbginit_cl),
				     .a_grst_cl(a_grst_cl),
				     .clk_stretch_cnt_val_6(clk_stretch_cnt_val_6),
				     .clk_stretch_cnt_val_odd(clk_stretch_cnt_val_odd),
				     .clk_stretch_trig(clk_stretch_trig),
				     .cmp_clk(cmp_clk),
				     .ctu_dram_tx_sync_early(ctu_dram_tx_sync_early),
				     .de_dbginit_cl(de_dbginit_cl),
				     .de_grst_cl(de_grst_cl),
				     .dft_clsp_nstep_capture_l(dft_clsp_nstep_capture_l),
				     .dram_a_grst_cl(dram_a_grst_cl),
				     .dsync_reg_init(dsync_reg_init[4:0]),
				     .dsync_reg_period(dsync_reg_period[4:0]),
				     .dsync_reg_rx0(dsync_reg_rx0[1:0]),
				     .dsync_reg_rx1(dsync_reg_rx1[1:0]),
				     .dsync_reg_rx2(dsync_reg_rx2[1:0]),
				     .dsync_reg_tx0(dsync_reg_tx0[4:0]),
				     .dsync_reg_tx1(dsync_reg_tx1[4:0]),
				     .dsync_reg_tx2(dsync_reg_tx2[4:0]),
				     .io_pwron_rst_l(io_pwron_rst_l),
				     .io_tck2(io_tck2),
				     .jbus_clk(jbus_clk),
				     .jbus_tx_sync(jbus_tx_sync),
				     .jsync_reg_init(jsync_reg_init[4:0]),
				     .jsync_reg_period(jsync_reg_period[4:0]),
				     .jsync_reg_rx0(jsync_reg_rx0[1:0]),
				     .jsync_reg_rx1(jsync_reg_rx1[1:0]),
				     .jsync_reg_rx2(jsync_reg_rx2[1:0]),
				     .jsync_reg_tx0(jsync_reg_tx0[4:0]),
				     .jsync_reg_tx1(jsync_reg_tx1[4:0]),
				     .jsync_reg_tx2(jsync_reg_tx2[4:0]),
				     .jtag_clock_dr(jtag_clock_dr),
				     .jtag_clsp_force_cken_cmp(jtag_clsp_force_cken_cmp),
				     .jtag_clsp_force_cken_dram(jtag_clsp_force_cken_dram),
				     .jtag_clsp_force_cken_jbus(jtag_clsp_force_cken_jbus),
				     .jtag_clsp_sel_cpu(jtag_clsp_sel_cpu[2:0]),
				     .jtag_clsp_sel_dram(jtag_clsp_sel_dram[2:0]),
				     .jtag_clsp_sel_jbus(jtag_clsp_sel_jbus[2:0]),
				     .jtag_clsp_sel_tck2(jtag_clsp_sel_tck2),
				     .jtag_nstep_count(jtag_nstep_count[3:0]),
				     .jtag_nstep_domain(jtag_nstep_domain[2:0]),
				     .jtag_nstep_vld(jtag_nstep_vld),
				     .pll_clk_out(pll_clk_out),
				     .pll_clk_out_l(pll_clk_out_l),
				     .pll_clk_out_pre(pll_clk_out_pre),
				     .pll_clk_out_pre_l(pll_clk_out_pre_l),
				     .pll_raw_clk_out(pll_raw_clk_out),
				     .pll_reset_ref_dly1_l(pll_reset_ref_dly1_l),
				     .reg_cdiv_0(reg_cdiv_0),
				     .reg_cdiv_vec(reg_cdiv_vec[14:0]),
				     .reg_ddiv_0(reg_ddiv_0),
				     .reg_ddiv_vec(reg_ddiv_vec[14:0]),
				     .reg_div_cmult(reg_div_cmult[13:0]),
				     .reg_div_dmult(reg_div_dmult[9:0]),
				     .reg_div_jmult(reg_div_jmult[9:0]),
				     .reg_jdiv_0(reg_jdiv_0),
				     .reg_jdiv_vec(reg_jdiv_vec[14:0]),
				     .se(se),
				     .ssiclk_enable(ssiclk_enable),
				     .start_2clk_early_jl(start_2clk_early_jl),
				     .start_clk_cl(start_clk_cl),
				     .start_clk_early_jl(start_clk_early_jl),
				     .stretch_cnt_vec(stretch_cnt_vec[14:0]),
				     .testmode_l(testmode_l),
				     .update_shadow_cl(update_shadow_cl));




endmodule