data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v
1: b'%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:24: Cannot find include file: ../genericIOSateliteEnv.v\n`include "../genericIOSateliteEnv.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/429196919/FPGA/pulse,data/full_repos/permissive/429196919/../genericIOSateliteEnv.v\n             data/full_repos/permissive/429196919/FPGA/pulse,data/full_repos/permissive/429196919/../genericIOSateliteEnv.v.v\n             data/full_repos/permissive/429196919/FPGA/pulse,data/full_repos/permissive/429196919/../genericIOSateliteEnv.v.sv\n             ../genericIOSateliteEnv.v\n             ../genericIOSateliteEnv.v.v\n             ../genericIOSateliteEnv.v.sv\n             obj_dir/../genericIOSateliteEnv.v\n             obj_dir/../genericIOSateliteEnv.v.v\n             obj_dir/../genericIOSateliteEnv.v.sv\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:25: Cannot find include file: ../genericIOSateliteEnv_TB.v\n`include "../genericIOSateliteEnv_TB.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:26: Cannot find include file: pulse.v\n`include "pulse.v" \n         ^~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:37: Define or directive not defined: \'`OSCH_FREQ\'\n OSCH #(.NOM_FREQ(`OSCH_FREQ)) internal_oscillator_inst (.STDBY(1\'b0), .OSC(masterClk), .SEDSTDBY ());\n                  ^~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:45: Define or directive not defined: \'`US_NS\'\n  #(`US_NS);\n    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:45: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n  #(`US_NS);\n          ^\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:47: Define or directive not defined: \'`US_NS\'\n  #(`US_NS);\n    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:47: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n  #(`US_NS);\n          ^\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:49: Define or directive not defined: \'`US_NS\'\n  #(`US_NS);\n    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:49: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n  #(`US_NS);\n          ^\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:51: Define or directive not defined: \'`MS_NS\'\n  #(`MS_NS + `MS_NS*0.05);\n    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:51: Define or directive not defined: \'`MS_NS\'\n  #(`MS_NS + `MS_NS*0.05);\n             ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:51: syntax error, unexpected \'*\', expecting TYPE-IDENTIFIER\n  #(`MS_NS + `MS_NS*0.05);\n                   ^\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:56: Define or directive not defined: \'`US_NS\'\n  #(`US_NS);\n    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:56: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n  #(`US_NS);\n          ^\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:60: Define or directive not defined: \'`US_NS\'\n   #(`US_NS);\n     ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:60: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n   #(`US_NS);\n           ^\n%Warning-STMTDLY: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:62: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:71: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:78: Define or directive not defined: \'`MS_NS\'\n    if($time-t0 > setPulseLength*`MS_NS+setPulseLength*`MS_NS*0.01) begin\n                                 ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:78: Define or directive not defined: \'`MS_NS\'\n    if($time-t0 > setPulseLength*`MS_NS+setPulseLength*`MS_NS*0.01) begin\n                                                       ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:78: syntax error, unexpected \'*\', expecting TYPE-IDENTIFIER\n    if($time-t0 > setPulseLength*`MS_NS+setPulseLength*`MS_NS*0.01) begin\n                                                             ^\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:79: Define or directive not defined: \'`MS_NS\'\n     $display("pulse: TC-1A: ERROR: pulse length was more than 1 %% longer than expected nominal: %d ms, allowed accuracy +/- %d ns, breaking at %d ns", setPulseLength, setPulseLength*`MS_NS*0.01, $time-t0);\n                                                                                                                                                                                        ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:85: Define or directive not defined: \'`MS_NS\'\n   if($time-t0 < setPulseLength*`MS_NS-setPulseLength*`MS_NS*0.01) begin\n                                ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:85: Define or directive not defined: \'`MS_NS\'\n   if($time-t0 < setPulseLength*`MS_NS-setPulseLength*`MS_NS*0.01) begin\n                                                      ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:85: syntax error, unexpected \'*\', expecting TYPE-IDENTIFIER\n   if($time-t0 < setPulseLength*`MS_NS-setPulseLength*`MS_NS*0.01) begin\n                                                            ^\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:86: Define or directive not defined: \'`MS_NS\'\n    $display("pulse: ERROR: TC-1A: pulse > 1 %% shorter than expected, expected nominal %d ms, allowed accuracy +/- %d ns, actual pulselength: %d ns", setPulseLength, setPulseLength*`MS_NS*0.01, $time-t0);\n                                                                                                                                                                                      ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:90: syntax error, unexpected else\n   else begin\n   ^~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:91: Define or directive not defined: \'`MS_NS\'\n    $display("pulse: PASS: TC-1A: pulse was as long as expected (+/- 1 %%), expected nominal: %d ms, allowed accuracy +/- %d ns, actual pulselength: %d ns", setPulseLength, setPulseLength*`MS_NS*0.01, $time-t0);\n                                                                                                                                                                                            ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:94: Define or directive not defined: \'`US_NS\'\n    #(`US_NS);\n      ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:103: Define or directive not defined: \'`US_NS\'\n  #(`US_NS);\n    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:116: Define or directive not defined: \'`US_NS\'\n  #(`US_NS);\n    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:121: Define or directive not defined: \'`US_NS\'\n  #(`US_NS);\n    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:124: Define or directive not defined: \'`US_NS\'\n  #(`US_NS);\n    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:129: syntax error, unexpected $write\n    $write(".");\n    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:133: syntax error, unexpected \'=\', expecting IDENTIFIER\n    progress = progress + 1;\n             ^\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:134: Define or directive not defined: \'`MS_NS\'\n   if($time-t0 > 255*`MS_NS+255*`MS_NS*0.01) begin\n                     ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:134: Define or directive not defined: \'`MS_NS\'\n   if($time-t0 > 255*`MS_NS+255*`MS_NS*0.01) begin\n                                ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:134: syntax error, unexpected \'*\', expecting TYPE-IDENTIFIER\n   if($time-t0 > 255*`MS_NS+255*`MS_NS*0.01) begin\n                                      ^\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:135: Define or directive not defined: \'`MS_NS\'\n    $display("pulse: ERROR: TC-1C: pulse length was more than 1 %% longer than expected nominal: %d ms, allowed accuracy +/- %d ns, breaking at %d ns", 255, 255*`MS_NS*0.01, $time-t0);\n                                                                                                                                                                 ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:141: Define or directive not defined: \'`MS_NS\'\n  if($time-t0 < 255*`MS_NS-255*`MS_NS*0.01) begin\n                    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:141: Define or directive not defined: \'`MS_NS\'\n  if($time-t0 < 255*`MS_NS-255*`MS_NS*0.01) begin\n                               ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:141: syntax error, unexpected \'*\', expecting TYPE-IDENTIFIER\n  if($time-t0 < 255*`MS_NS-255*`MS_NS*0.01) begin\n                                     ^\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:142: Define or directive not defined: \'`MS_NS\'\n   $display("pulse: ERROR: TC-1C: pulse > 1 %% shorter than expected, expected nominal %d ms, allowed accuracy +/- %d ns, actual pulselength: %d ns", 255, 255*`MS_NS*0.01, $time-t0);\n                                                                                                                                                               ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:147: Define or directive not defined: \'`MS_NS\'\n   $display("pulse: PASS: TC-1C: pulse was as long as expected (+/- 1 %%), expected nominal: %d ms, allowed accuracy +/- %d ns, actual pulselength: %d ns", 255, 255*`MS_NS*0.01, $time-t0);\n                                                                                                                                                                     ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:149: Define or directive not defined: \'`US_NS\'\n   #(`US_NS);\n     ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:153: Define or directive not defined: \'`US_NS\'\n  #(`US_NS);\n    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:158: Define or directive not defined: \'`US_NS\'\n  #(`US_NS);\n    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:160: Define or directive not defined: \'`US_NS\'\n  #(`US_NS);\n    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:163: Define or directive not defined: \'`US_NS\'\n  #(`US_NS);\n    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:165: Define or directive not defined: \'`MS_NS\'\n  #(`MS_NS + `MS_NS*0.01);\n    ^~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/pulse/pulse_TB.v:165: Define or directive not defined: \'`MS_NS\'\n  #(`MS_NS + `MS_NS*0.01);\n             ^~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
module pulse_TB ();
	reg[7:0] pulseLength;
	reg trigger;
	wire masterClk;
	wire pulse;

	integer setPulseLength, t0, progress;

	pulse DUT(.pulseLength(pulseLength), .trigger(trigger), .masterClk(masterClk), .pulse(pulse));
	OSCH #(.NOM_FREQ(`OSCH_FREQ)) internal_oscillator_inst (.STDBY(1'b0), .OSC(masterClk), .SEDSTDBY ());
	
	initial begin
		$display("pulse: Running simulation for a pulse generator");
		$display("pulse: Initializing simulation for WS2811Decoder");


		trigger = 1'b0;
		#(`US_NS);
		pulseLength=8'h01;
		#(`US_NS);
		trigger = 1'b1;
		#(`US_NS);
		trigger = 1'b0;
		#(`MS_NS + `MS_NS*0.05);


		$display("pulse: Running TestCase 1A (TC-1A): Sweeping all pulse lengths from 1 to 255, with 32 ms increments, expected +/- 1 %% accuarcy");
		pulseLength=8'h01;
		#(`US_NS);
		for(setPulseLength=1; setPulseLength<256; setPulseLength=setPulseLength+16) begin
			trigger=1'b1;
			t0 = $time;
			#(`US_NS);
			while (pulse != 1'b1) begin
				#1;
				if($time - t0 > 100) begin
					$display("pulse: ERROR: TC-1A: pulse did not trigger as expected");
					$display("pulse: TC-1A: ERROR: stopping simulation...");
					$stop;
				end
			end
			progress = 0;
			while (pulse != 1'b0) begin
				#1;
				if (progress == 1000000) begin
					$write(".");
					progress = 0;
				end
				else
					progress = progress + 1;
				if($time-t0 > setPulseLength*`MS_NS+setPulseLength*`MS_NS*0.01) begin
					$display("pulse: TC-1A: ERROR: pulse length was more than 1 %% longer than expected nominal: %d ms, allowed accuracy +/- %d ns, breaking at %d ns", setPulseLength, setPulseLength*`MS_NS*0.01, $time-t0);
					$display("pulse: TC-1A: ERROR: stopping simulation...");
					$stop;
				end
			end
			$display("");
			if($time-t0 < setPulseLength*`MS_NS-setPulseLength*`MS_NS*0.01) begin
				$display("pulse: ERROR: TC-1A: pulse > 1 %% shorter than expected, expected nominal %d ms, allowed accuracy +/- %d ns, actual pulselength: %d ns", setPulseLength, setPulseLength*`MS_NS*0.01, $time-t0);
				$display("pulse: ERROR: TC-1A: stopping simulation...");
				$stop;
			end
			else begin
				$display("pulse: PASS: TC-1A: pulse was as long as expected (+/- 1 %%), expected nominal: %d ms, allowed accuracy +/- %d ns, actual pulselength: %d ns", setPulseLength, setPulseLength*`MS_NS*0.01, $time-t0);
				trigger=1'b0;
				pulseLength = pulseLength + 8'h10;
				#(`US_NS);

			end
		end
		$display("pulse: PASS TC-1A: Sweeping all pulse lengths from 1  with 32 ms increments, expected +/- 0.1 percent accuarcy has passed");


		$display("pulse: Running TestCase 1B (TC-1B): Checking that pulseLength = 8'h00 does not generate any pulse");
		pulseLength=8'h00;
		#(`US_NS);
		trigger=1'b1;
		t0 = $time;
		while($time-t0 < 100) begin
			if (pulse === 1'b1) begin
				$display("pulse: ERROR: TC-1B: Did not expect pulse to trigger for pulsLength 8'h00");
				$display("pulse: ERROR: TC-1B: stopping simulation...");
				$stop;
			end
			#1;
		end
		trigger = 1'b0;
		$display("pulse: PASS: TC-1B: pulseLength = 8'h00 did not trigger a pulse");
		#(`US_NS);


		$display("pulse: Running TestCase 1C (TC-1C): Checking pulse length 255 ms,  expected +/- 1 percent accuarcy");
		pulseLength=8'hFF;
		#(`US_NS);
		trigger = 1'b1;
		t0 = $time;
		#(`US_NS);
		progress = 0;
		while (pulse != 1'b0) begin
			#1;
			if (progress == 1000000) begin
				$write(".");
				progress = 0;
			end
			else
				progress = progress + 1;
			if($time-t0 > 255*`MS_NS+255*`MS_NS*0.01) begin
				$display("pulse: ERROR: TC-1C: pulse length was more than 1 %% longer than expected nominal: %d ms, allowed accuracy +/- %d ns, breaking at %d ns", 255, 255*`MS_NS*0.01, $time-t0);
				$display("pulse: ERROR: TC-1C: stopping simulation...");
				$stop;
			end
		end
		$display("");
		if($time-t0 < 255*`MS_NS-255*`MS_NS*0.01) begin
			$display("pulse: ERROR: TC-1C: pulse > 1 %% shorter than expected, expected nominal %d ms, allowed accuracy +/- %d ns, actual pulselength: %d ns", 255, 255*`MS_NS*0.01, $time-t0);
			$display("pulse: ERROR: TC-1C: stopping simulation...");
			$stop;
		end
		else begin
			$display("pulse: PASS: TC-1C: pulse was as long as expected (+/- 1 %%), expected nominal: %d ms, allowed accuracy +/- %d ns, actual pulselength: %d ns", 255, 255*`MS_NS*0.01, $time-t0);
			trigger=1'b0;
			#(`US_NS);
		end
		$display("pulse: PASS: TC-1C: Checking pulse length 255 ms,  expected +/- 1 percent accuarcy has passed");
		trigger = 1'b0;
		#(`US_NS);


		$display("pulse: Running TestCase 2 (TC-2): Checking that pulse is not retriggered while active");
		pulseLength = 8'h01;
		#(`US_NS);
		trigger = 1'b1;
		#(`US_NS);
		trigger = 1'b0;
		pulseLength = 8'hFF;
		#(`US_NS);
		trigger = 1'b1;
		#(`MS_NS + `MS_NS*0.01);
		if(pulse === 1'b1) begin
			$display("pulse: TC-2: ERROR: pulse seems to have been retriggered despite it was already active");
			$display("pulse: TC-2: ERROR: stopping simulation...");
			$stop;
		end
		$display("pulse: PASS: TC-2: Checking that pulse is not retriggered while active was successful");
		trigger = 0;
		#(`US_NS);
		$display("pulse: SUCCESS: pulse simulation was successful!!!");
		$stop;
	end
endmodule
module pulse_TB ();

	reg[7:0] pulseLength;
	reg trigger;
	wire masterClk;
	wire pulse;

	integer setPulseLength, t0, progress;

	pulse DUT(.pulseLength(pulseLength), .trigger(trigger), .masterClk(masterClk), .pulse(pulse));
	OSCH #(.NOM_FREQ(`OSCH_FREQ)) internal_oscillator_inst (.STDBY(1'b0), .OSC(masterClk), .SEDSTDBY ());
	
	initial begin
		$display("pulse: Running simulation for a pulse generator");
		$display("pulse: Initializing simulation for WS2811Decoder");


		trigger = 1'b0;
		#(`US_NS);
		pulseLength=8'h01;
		#(`US_NS);
		trigger = 1'b1;
		#(`US_NS);
		trigger = 1'b0;
		#(`MS_NS + `MS_NS*0.05);


		$display("pulse: Running TestCase 1A (TC-1A): Sweeping all pulse lengths from 1 to 255, with 32 ms increments, expected +/- 1 %% accuarcy");
		pulseLength=8'h01;
		#(`US_NS);
		for(setPulseLength=1; setPulseLength<256; setPulseLength=setPulseLength+16) begin
			trigger=1'b1;
			t0 = $time;
			#(`US_NS);
			while (pulse != 1'b1) begin
				#1;
				if($time - t0 > 100) begin
					$display("pulse: ERROR: TC-1A: pulse did not trigger as expected");
					$display("pulse: TC-1A: ERROR: stopping simulation...");
					$stop;
				end
			end
			progress = 0;
			while (pulse != 1'b0) begin
				#1;
				if (progress == 1000000) begin
					$write(".");
					progress = 0;
				end
				else
					progress = progress + 1;
				if($time-t0 > setPulseLength*`MS_NS+setPulseLength*`MS_NS*0.01) begin
					$display("pulse: TC-1A: ERROR: pulse length was more than 1 %% longer than expected nominal: %d ms, allowed accuracy +/- %d ns, breaking at %d ns", setPulseLength, setPulseLength*`MS_NS*0.01, $time-t0);
					$display("pulse: TC-1A: ERROR: stopping simulation...");
					$stop;
				end
			end
			$display("");
			if($time-t0 < setPulseLength*`MS_NS-setPulseLength*`MS_NS*0.01) begin
				$display("pulse: ERROR: TC-1A: pulse > 1 %% shorter than expected, expected nominal %d ms, allowed accuracy +/- %d ns, actual pulselength: %d ns", setPulseLength, setPulseLength*`MS_NS*0.01, $time-t0);
				$display("pulse: ERROR: TC-1A: stopping simulation...");
				$stop;
			end
			else begin
				$display("pulse: PASS: TC-1A: pulse was as long as expected (+/- 1 %%), expected nominal: %d ms, allowed accuracy +/- %d ns, actual pulselength: %d ns", setPulseLength, setPulseLength*`MS_NS*0.01, $time-t0);
				trigger=1'b0;
				pulseLength = pulseLength + 8'h10;
				#(`US_NS);

			end
		end
		$display("pulse: PASS TC-1A: Sweeping all pulse lengths from 1  with 32 ms increments, expected +/- 0.1 percent accuarcy has passed");


		$display("pulse: Running TestCase 1B (TC-1B): Checking that pulseLength = 8'h00 does not generate any pulse");
		pulseLength=8'h00;
		#(`US_NS);
		trigger=1'b1;
		t0 = $time;
		while($time-t0 < 100) begin
			if (pulse === 1'b1) begin
				$display("pulse: ERROR: TC-1B: Did not expect pulse to trigger for pulsLength 8'h00");
				$display("pulse: ERROR: TC-1B: stopping simulation...");
				$stop;
			end
			#1;
		end
		trigger = 1'b0;
		$display("pulse: PASS: TC-1B: pulseLength = 8'h00 did not trigger a pulse");
		#(`US_NS);


		$display("pulse: Running TestCase 1C (TC-1C): Checking pulse length 255 ms,  expected +/- 1 percent accuarcy");
		pulseLength=8'hFF;
		#(`US_NS);
		trigger = 1'b1;
		t0 = $time;
		#(`US_NS);
		progress = 0;
		while (pulse != 1'b0) begin
			#1;
			if (progress == 1000000) begin
				$write(".");
				progress = 0;
			end
			else
				progress = progress + 1;
			if($time-t0 > 255*`MS_NS+255*`MS_NS*0.01) begin
				$display("pulse: ERROR: TC-1C: pulse length was more than 1 %% longer than expected nominal: %d ms, allowed accuracy +/- %d ns, breaking at %d ns", 255, 255*`MS_NS*0.01, $time-t0);
				$display("pulse: ERROR: TC-1C: stopping simulation...");
				$stop;
			end
		end
		$display("");
		if($time-t0 < 255*`MS_NS-255*`MS_NS*0.01) begin
			$display("pulse: ERROR: TC-1C: pulse > 1 %% shorter than expected, expected nominal %d ms, allowed accuracy +/- %d ns, actual pulselength: %d ns", 255, 255*`MS_NS*0.01, $time-t0);
			$display("pulse: ERROR: TC-1C: stopping simulation...");
			$stop;
		end
		else begin
			$display("pulse: PASS: TC-1C: pulse was as long as expected (+/- 1 %%), expected nominal: %d ms, allowed accuracy +/- %d ns, actual pulselength: %d ns", 255, 255*`MS_NS*0.01, $time-t0);
			trigger=1'b0;
			#(`US_NS);
		end
		$display("pulse: PASS: TC-1C: Checking pulse length 255 ms,  expected +/- 1 percent accuarcy has passed");
		trigger = 1'b0;
		#(`US_NS);


		$display("pulse: Running TestCase 2 (TC-2): Checking that pulse is not retriggered while active");
		pulseLength = 8'h01;
		#(`US_NS);
		trigger = 1'b1;
		#(`US_NS);
		trigger = 1'b0;
		pulseLength = 8'hFF;
		#(`US_NS);
		trigger = 1'b1;
		#(`MS_NS + `MS_NS*0.01);
		if(pulse === 1'b1) begin
			$display("pulse: TC-2: ERROR: pulse seems to have been retriggered despite it was already active");
			$display("pulse: TC-2: ERROR: stopping simulation...");
			$stop;
		end
		$display("pulse: PASS: TC-2: Checking that pulse is not retriggered while active was successful");
		trigger = 0;
		#(`US_NS);
		$display("pulse: SUCCESS: pulse simulation was successful!!!");
		$stop;
	end
endmodule