data/full_repos/permissive/499137621/CheckPoint5-main/mux_2_5bit.v
data/verilator_xmls/2894cbf4-7061-4f8b-95bd-2d85766f12ef.xml
module mux_2_5bit(a, b, sel, out);

    input [4:0] a, b;
    input sel;
    output [4:0] out;
    
    assign out = sel ? b : a;

endmodule
module mux_2_5bit(a, b, sel, out);


    input [4:0] a, b;
    input sel;
    output [4:0] out;
    
    assign out = sel ? b : a;

endmodule