data/full_repos/permissive/52871302/elbert2/ch07_pwm/src/pwm_tester.v
1: b"%Error: data/full_repos/permissive/52871302/elbert2/ch07_pwm/src/pwm_tester.v:9: Cannot find file containing module: 'debouncer'\ndebouncer d1(.CLK (CLK), .switch_input (switch_up), .trans_up (s_up));\n^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/52871302/elbert2/ch07_pwm/src,data/full_repos/permissive/52871302/debouncer\n             data/full_repos/permissive/52871302/elbert2/ch07_pwm/src,data/full_repos/permissive/52871302/debouncer.v\n             data/full_repos/permissive/52871302/elbert2/ch07_pwm/src,data/full_repos/permissive/52871302/debouncer.sv\n             debouncer\n             debouncer.v\n             debouncer.sv\n             obj_dir/debouncer\n             obj_dir/debouncer.v\n             obj_dir/debouncer.sv\n%Error: data/full_repos/permissive/52871302/elbert2/ch07_pwm/src/pwm_tester.v:10: Cannot find file containing module: 'debouncer'\ndebouncer d2(.CLK (CLK), .switch_input (switch_dn), .trans_up (s_dn));\n^~~~~~~~~\n%Error: data/full_repos/permissive/52871302/elbert2/ch07_pwm/src/pwm_tester.v:14: Cannot find file containing module: 'pwm'\npwm p(.pwm_clk (prescaler[6]), .duty (duty), .PWM_PIN (PWM_PIN));\n^~~\n%Error: Exiting due to 3 error(s)\n"
module pwm_tester(
    input CLK,
    input switch_up,
    input switch_dn,
    output PWM_PIN
    );

wire s_up, s_dn;
debouncer d1(.CLK (CLK), .switch_input (switch_up), .trans_up (s_up));
debouncer d2(.CLK (CLK), .switch_input (switch_dn), .trans_up (s_dn));

reg [7:0] duty = 0;
reg [6:0] prescaler = 0;
pwm p(.pwm_clk (prescaler[6]), .duty (duty), .PWM_PIN (PWM_PIN));

always @(posedge CLK)
begin
  prescaler <= prescaler + 1;
  if (s_up)
  begin
    duty <= duty + 5;
  end
  if (s_dn)
  begin
    duty <= duty - 5;
  end  
end

endmodule
module pwm_tester(
    input CLK,
    input switch_up,
    input switch_dn,
    output PWM_PIN
    );


wire s_up, s_dn;
debouncer d1(.CLK (CLK), .switch_input (switch_up), .trans_up (s_up));
debouncer d2(.CLK (CLK), .switch_input (switch_dn), .trans_up (s_dn));

reg [7:0] duty = 0;
reg [6:0] prescaler = 0;
pwm p(.pwm_clk (prescaler[6]), .duty (duty), .PWM_PIN (PWM_PIN));

always @(posedge CLK)
begin
  prescaler <= prescaler + 1;
  if (s_up)
  begin
    duty <= duty + 5;
  end
  if (s_dn)
  begin
    duty <= duty - 5;
  end  
end

endmodule