data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv
1: b'%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:472: Operator COND expects 9 bits on the Conditional True, but Conditional True\'s CONST \'4\'h6\' generates 4 bits.\n                                                                              : ... In instance fx68kAlu.aluCorf\n   htemp = { 1\'b0, binResult} + (lowC  ? 4\'h6 : 4\'h0);\n                                       ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:472: Operator COND expects 9 bits on the Conditional False, but Conditional False\'s CONST \'4\'h0\' generates 4 bits.\n                                                                              : ... In instance fx68kAlu.aluCorf\n   htemp = { 1\'b0, binResult} + (lowC  ? 4\'h6 : 4\'h0);\n                                       ^\n%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:473: Operator COND expects 5 bits on the Conditional True, but Conditional True\'s CONST \'4\'h6\' generates 4 bits.\n                                                                              : ... In instance fx68kAlu.aluCorf\n   hNib  = htemp[8:4] + (highC ? 4\'h6 : 4\'h0);\n                               ^\n%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:473: Operator COND expects 5 bits on the Conditional False, but Conditional False\'s CONST \'4\'h0\' generates 4 bits.\n                                                                              : ... In instance fx68kAlu.aluCorf\n   hNib  = htemp[8:4] + (highC ? 4\'h6 : 4\'h0);\n                               ^\n%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:477: Operator COND expects 9 bits on the Conditional True, but Conditional True\'s CONST \'4\'h6\' generates 4 bits.\n                                                                              : ... In instance fx68kAlu.aluCorf\n   htemp = { 1\'b0, binResult} - (lowC  ? 4\'h6 : 4\'h0);\n                                       ^\n%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:477: Operator COND expects 9 bits on the Conditional False, but Conditional False\'s CONST \'4\'h0\' generates 4 bits.\n                                                                              : ... In instance fx68kAlu.aluCorf\n   htemp = { 1\'b0, binResult} - (lowC  ? 4\'h6 : 4\'h0);\n                                       ^\n%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:478: Operator COND expects 5 bits on the Conditional True, but Conditional True\'s CONST \'4\'h6\' generates 4 bits.\n                                                                              : ... In instance fx68kAlu.aluCorf\n   hNib  = htemp[8:4] - (highC ? 4\'h6 : 4\'h0);\n                               ^\n%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:478: Operator COND expects 5 bits on the Conditional False, but Conditional False\'s CONST \'4\'h0\' generates 4 bits.\n                                                                              : ... In instance fx68kAlu.aluCorf\n   hNib  = htemp[8:4] - (highC ? 4\'h6 : 4\'h0);\n                               ^\n%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:282: Operator ADD expects 17 bits on the LHS, but LHS\'s REPLICATE generates 9 bits.\n                                                                              : ... In instance fx68kAlu\n    rtemp = bAdd ? { 1\'b0, inpb[7:0]} + { 1\'b0, inpa[7:0]} + cin:\n                                      ^\n%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:282: Operator ADD expects 17 bits on the RHS, but RHS\'s REPLICATE generates 9 bits.\n                                                                              : ... In instance fx68kAlu\n    rtemp = bAdd ? { 1\'b0, inpb[7:0]} + { 1\'b0, inpa[7:0]} + cin:\n                                      ^\n%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:282: Operator ADD expects 17 bits on the RHS, but RHS\'s VARREF \'cin\' generates 1 bits.\n                                                                              : ... In instance fx68kAlu\n    rtemp = bAdd ? { 1\'b0, inpb[7:0]} + { 1\'b0, inpa[7:0]} + cin:\n                                                           ^\n%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:283: Operator SUB expects 17 bits on the LHS, but LHS\'s REPLICATE generates 9 bits.\n                                                                              : ... In instance fx68kAlu\n        { 1\'b0, inpb[7:0] } - { 1\'b0, inpa[7:0]} - cin;\n                            ^\n%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:283: Operator SUB expects 17 bits on the RHS, but RHS\'s REPLICATE generates 9 bits.\n                                                                              : ... In instance fx68kAlu\n        { 1\'b0, inpb[7:0] } - { 1\'b0, inpa[7:0]} - cin;\n                            ^\n%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:283: Operator SUB expects 17 bits on the RHS, but RHS\'s VARREF \'cin\' generates 1 bits.\n                                                                              : ... In instance fx68kAlu\n        { 1\'b0, inpb[7:0] } - { 1\'b0, inpa[7:0]} - cin;\n                                                 ^\n%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:288: Operator ADD expects 17 bits on the RHS, but RHS\'s VARREF \'cin\' generates 1 bits.\n                                                                              : ... In instance fx68kAlu\n    rtemp = bAdd ? { 1\'b0, inpb } + { 1\'b0, inpa} + cin:\n                                                  ^\n%Warning-WIDTH: data/full_repos/permissive/452215364/rtl/fx86k/fx68kAlu.sv:289: Operator SUB expects 17 bits on the RHS, but RHS\'s VARREF \'cin\' generates 1 bits.\n                                                                              : ... In instance fx68kAlu\n        { 1\'b0, inpb } - { 1\'b0, inpa} - cin;\n                                       ^\n%Error: Exiting due to 16 warning(s)\n'
module aluShifter( input [31:0] data,
	input isByte, input isLong, swapWords,
	input dir, input cin,
	output logic [31:0] result);


	logic [31:0] tdata;         


	always_comb begin
		tdata = data;
		if( isByte & dir)
			tdata[8] = cin;
		else if( !isLong & dir)
			tdata[16] = cin;
	end
    
	always_comb begin


		if( swapWords & dir)
			result = { tdata[0], tdata[31:17], cin, tdata[15:1]};
		else if( swapWords)
			result = { tdata[30:16], cin, tdata[14:0], tdata[31]};
			
		else if( dir)
			result = { cin, tdata[31:1]};
		else
			result = { tdata[30:0], cin};
	end

endmodule
module aluShifter( input [31:0] data,
	input isByte, input isLong, swapWords,
	input dir, input cin,
	output logic [31:0] result);



	logic [31:0] tdata;         


	always_comb begin
		tdata = data;
		if( isByte & dir)
			tdata[8] = cin;
		else if( !isLong & dir)
			tdata[16] = cin;
	end
    
	always_comb begin


		if( swapWords & dir)
			result = { tdata[0], tdata[31:17], cin, tdata[15:1]};
		else if( swapWords)
			result = { tdata[30:16], cin, tdata[14:0], tdata[31]};
			
		else if( dir)
			result = { cin, tdata[31:1]};
		else
			result = { tdata[30:0], cin};
	end

endmodule