data/full_repos/permissive/414822257/ip/third_party/picorv32_wb/gpio32_wb.v
1: b'%Warning-PINMISSING: data/full_repos/permissive/414822257/ip/third_party/picorv32_wb/gpio32_wb.v:46: Cell has missing pin: \'gpio_in_pad\'\n    ) gpio_ctrl (\n      ^~~~~~~~~\n                     ... Use "/* verilator lint_off PINMISSING */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/414822257/ip/third_party/picorv32_wb/gpio32_wb.v:87: Duplicate declaration of signal: \'gpio_out\'\n    reg [31:0] gpio_out;   \n               ^~~~~~~~\n        data/full_repos/permissive/414822257/ip/third_party/picorv32_wb/gpio32_wb.v:83: ... Location of original declaration\n    output [31:0] gpio_out,\n                  ^~~~~~~~\n%Error: data/full_repos/permissive/414822257/ip/third_party/picorv32_wb/gpio32_wb.v:90: Duplicate declaration of signal: \'gpio_oeb\'\n    reg [31:0] gpio_oeb;     \n               ^~~~~~~~\n        data/full_repos/permissive/414822257/ip/third_party/picorv32_wb/gpio32_wb.v:84: ... Location of original declaration\n    output [31:0] gpio_oeb\n                  ^~~~~~~~\n%Error: Exiting due to 2 error(s), 1 warning(s)\n'
module gpio32_wb # (
    parameter GPIO_DATA = 8'h 00,
    parameter GPIO_ENA  = 8'h 04,
    parameter GPIO_PU   = 8'h 08,
    parameter GPIO_PD   = 8'h 0c
) (
    input wb_clk_i,
    input wb_rst_i,

    input [31:0] wb_dat_i,
    input [31:0] wb_adr_i,
    input [3:0] wb_sel_i,
    input wb_cyc_i,
    input wb_stb_i,
    input wb_we_i,

    output [31:0] wb_dat_o,
    output wb_ack_o,

    input [31:0]  gpio_in,
    output [31:0] gpio_out,
    output [31:0] gpio_oeb
);

    wire resetn;
    wire valid;
    wire ready;
    wire [3:0] iomem_we;

    assign resetn = ~wb_rst_i;
    assign valid = wb_stb_i && wb_cyc_i;

    assign iomem_we = wb_sel_i & {4{wb_we_i}};
    assign wb_ack_o = ready;

    gpio32 #(
        .GPIO_DATA(GPIO_DATA),
        .GPIO_ENA(GPIO_ENA),
        .GPIO_PD(GPIO_PD),
        .GPIO_PU(GPIO_PU)
    ) gpio_ctrl (
        .clk(wb_clk_i),
        .resetn(resetn),

        .iomem_addr(wb_adr_i),
        .iomem_valid(valid),
        .iomem_wstrb(iomem_we[0]),
        .iomem_wdata(wb_dat_i),
        .iomem_rdata(wb_dat_o),
        .iomem_ready(ready),

        .gpio_in(gpio_in),
        .gpio_out(gpio_out),
        .gpio_oeb(gpio_oeb)
    );

endmodule
module gpio32_wb # (
    parameter GPIO_DATA = 8'h 00,
    parameter GPIO_ENA  = 8'h 04,
    parameter GPIO_PU   = 8'h 08,
    parameter GPIO_PD   = 8'h 0c
) (
    input wb_clk_i,
    input wb_rst_i,

    input [31:0] wb_dat_i,
    input [31:0] wb_adr_i,
    input [3:0] wb_sel_i,
    input wb_cyc_i,
    input wb_stb_i,
    input wb_we_i,

    output [31:0] wb_dat_o,
    output wb_ack_o,

    input [31:0]  gpio_in,
    output [31:0] gpio_out,
    output [31:0] gpio_oeb
);


    wire resetn;
    wire valid;
    wire ready;
    wire [3:0] iomem_we;

    assign resetn = ~wb_rst_i;
    assign valid = wb_stb_i && wb_cyc_i;

    assign iomem_we = wb_sel_i & {4{wb_we_i}};
    assign wb_ack_o = ready;

    gpio32 #(
        .GPIO_DATA(GPIO_DATA),
        .GPIO_ENA(GPIO_ENA),
        .GPIO_PD(GPIO_PD),
        .GPIO_PU(GPIO_PU)
    ) gpio_ctrl (
        .clk(wb_clk_i),
        .resetn(resetn),

        .iomem_addr(wb_adr_i),
        .iomem_valid(valid),
        .iomem_wstrb(iomem_we[0]),
        .iomem_wdata(wb_dat_i),
        .iomem_rdata(wb_dat_o),
        .iomem_ready(ready),

        .gpio_in(gpio_in),
        .gpio_out(gpio_out),
        .gpio_oeb(gpio_oeb)
    );

endmodule