data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume/axis_sume_attachment_top.v
1: b"%Error: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume/axis_sume_attachment_top.v:169: Cannot find file containing module: 'tx_riffa_axi'\ntx_riffa_axi \n^~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume,data/full_repos/permissive/498471995/tx_riffa_axi\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume,data/full_repos/permissive/498471995/tx_riffa_axi.v\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume,data/full_repos/permissive/498471995/tx_riffa_axi.sv\n             tx_riffa_axi\n             tx_riffa_axi.v\n             tx_riffa_axi.sv\n             obj_dir/tx_riffa_axi\n             obj_dir/tx_riffa_axi.v\n             obj_dir/tx_riffa_axi.sv\n%Error: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/nf_riffa_dma_v1_0_0/hdl/sume/axis_sume_attachment_top.v:206: Cannot find file containing module: 'rx_axi_riffa'\nrx_axi_riffa \n^~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module axis_sume_attachment_top #(
    parameter C_PCI_DATA_WIDTH  = 128, 	
    parameter C_AXIS_TDATA_WIDTH = 128,
    parameter C_AXIS_TKEEP_WIDTH = (C_AXIS_TDATA_WIDTH/8),
    parameter C_AXIS_TUSER_WIDTH = 128,
    parameter C_PREAM_VALUE	    = 32'hCAFE	

)(


	input wire                              CLK,
	input wire                              RST,

	output wire                             CHNL_RX_CLK,            
    input wire                              CHNL_RX,                
	output wire                             CHNL_RX_ACK,            
	input wire                              CHNL_RX_LAST,            
	input wire [31:0]                       CHNL_RX_LEN,            
	input wire [30:0]                       CHNL_RX_OFF,                
	input wire [(C_PCI_DATA_WIDTH-1):0]     CHNL_RX_DATA,           
	input wire                              CHNL_RX_DATA_VALID,     
	output wire                             CHNL_RX_DATA_REN,       	
	output wire                             CHNL_TX_CLK, 
	output wire                             CHNL_TX, 
	input wire                              CHNL_TX_ACK, 
	output wire                             CHNL_TX_LAST, 
	output wire [31:0]                      CHNL_TX_LEN, 
	output wire [30:0]                      CHNL_TX_OFF, 
	output wire [(C_PCI_DATA_WIDTH-1):0]    CHNL_TX_DATA, 
	output wire                             CHNL_TX_DATA_VALID, 
   	input wire                              CHNL_TX_DATA_REN,



  	output wire [(C_AXIS_TDATA_WIDTH-1):0]  m_axis_xge_tx_tdata,
  	output wire [(C_AXIS_TKEEP_WIDTH-1):0]  m_axis_xge_tx_tkeep, 
  	output wire [(C_AXIS_TUSER_WIDTH-1):0]  m_axis_xge_tx_tuser,
  	output wire                             m_axis_xge_tx_tlast, 
  	output wire                             m_axis_xge_tx_tvalid, 
  	input wire                              m_axis_xge_tx_tready,			

	input wire [(C_AXIS_TDATA_WIDTH-1):0]   s_axis_xge_rx_tdata, 
  	input wire [(C_AXIS_TKEEP_WIDTH-1):0]   s_axis_xge_rx_tkeep,
  	input wire [(C_AXIS_TUSER_WIDTH-1):0]   s_axis_xge_rx_tuser,
  	input wire  		                    s_axis_xge_rx_tlast, 
  	input wire                              s_axis_xge_rx_tvalid,   
  	output wire                             s_axis_xge_rx_tready
);







































localparam C_M_AXIS_DATA_WIDTH_INTERNAL	= C_PCI_DATA_WIDTH;
localparam C_M_AXIS_DATA_WIDTH		    = C_AXIS_TDATA_WIDTH;
localparam C_M_AXIS_TUSER_WIDTH		    = C_AXIS_TUSER_WIDTH;

localparam C_S_AXIS_DATA_WIDTH_INTERNAL	= C_PCI_DATA_WIDTH;
localparam C_S_AXIS_DATA_WIDTH		    = C_AXIS_TDATA_WIDTH;
localparam C_S_AXIS_TUSER_WIDTH		    = C_AXIS_TUSER_WIDTH;





wire [(C_M_AXIS_DATA_WIDTH_INTERNAL-1):0]   	    m_axis_tdata_128;
wire [(C_M_AXIS_DATA_WIDTH_INTERNAL/8)-1:0]   	m_axis_tkeep_128;
wire [(C_M_AXIS_TUSER_WIDTH-1):0]   		        m_axis_tuser_128;
wire		               			            m_axis_tvalid_128;
wire		               			            m_axis_tready_128;
wire  			       			                m_axis_tlast_128;



wire [(C_S_AXIS_DATA_WIDTH_INTERNAL-1):0]   	s_axis_tdata_128;
wire [((C_S_AXIS_DATA_WIDTH_INTERNAL/8)-1):0]   s_axis_tkeep_128;
wire [(C_S_AXIS_TUSER_WIDTH-1):0]   		    s_axis_tuser_128;
wire		               			            s_axis_tvalid_128;
wire		               		                s_axis_tready_128;
wire  			       		            	s_axis_tlast_128;




assign CHNL_RX_CLK = CLK;
assign CHNL_TX_CLK = CLK;




tx_riffa_axi 
#(
  .C_PCI_DATA_WIDTH         (C_PCI_DATA_WIDTH),
  .C_PREAM_VALUE            (C_PREAM_VALUE)
) riffa_to_axis_conv (
  .CLK                      (CLK),
  .RST                      (RST),

  .CHNL_RX                  (CHNL_RX),
  .CHNL_RX_DATA             (CHNL_RX_DATA),
  .CHNL_RX_DATA_VALID       (CHNL_RX_DATA_VALID),
  .CHNL_RX_LAST             (CHNL_RX_LAST),
  .CHNL_RX_LEN              (CHNL_RX_LEN),
  .CHNL_RX_OFF              (CHNL_RX_OFF),
  .CHNL_RX_DATA_REN         (CHNL_RX_DATA_REN),
  .CHNL_RX_ACK              (CHNL_RX_ACK),

  .tdata                    (m_axis_tdata_128),
  .tkeep                    (m_axis_tkeep_128),
  .tuser                    (m_axis_tuser_128),
  .tvalid                   (m_axis_tvalid_128),
  .tlast                    (m_axis_tlast_128),
  .tready                   (m_axis_tready_128)  
);

assign m_axis_xge_tx_tdata = m_axis_tdata_128;
assign m_axis_xge_tx_tkeep = m_axis_tkeep_128; 
assign m_axis_xge_tx_tuser = m_axis_tuser_128;
assign m_axis_xge_tx_tlast = m_axis_tlast_128; 
assign m_axis_xge_tx_tvalid = m_axis_tvalid_128;
assign m_axis_tready_128 = m_axis_xge_tx_tready;






rx_axi_riffa 
#(
  .C_PCI_DATA_WIDTH         (C_PCI_DATA_WIDTH),
  .C_RIFFA_OFFSET           (31'd0),
  .C_PREAM_VALUE            (C_PREAM_VALUE)
) axis_to_riffa_conv (
  .CLK                      (CLK),
  .RST                      (RST),

  .CHNL_TX                  (CHNL_TX),
  .CHNL_TX_DATA             (CHNL_TX_DATA),
  .CHNL_TX_DATA_VALID       (CHNL_TX_DATA_VALID),
  .CHNL_TX_LAST             (CHNL_TX_LAST),
  .CHNL_TX_LEN              (CHNL_TX_LEN),
  .CHNL_TX_OFF              (CHNL_TX_OFF),
  .CHNL_TX_DATA_REN         (CHNL_TX_DATA_REN),
  .CHNL_TX_ACK              (CHNL_TX_ACK),

  .tdata                    (s_axis_tdata_128),
  .tkeep                    (s_axis_tkeep_128),
  .tuser                    (s_axis_tuser_128),
  .tvalid                   (s_axis_tvalid_128),
  .tlast                    (s_axis_tlast_128),
  .tready                   (s_axis_tready_128)
);



assign s_axis_tdata_128 = s_axis_xge_rx_tdata;
assign s_axis_tkeep_128 = s_axis_xge_rx_tkeep;
assign s_axis_tuser_128 = s_axis_xge_rx_tuser;
assign s_axis_tvalid_128 = s_axis_xge_rx_tvalid;
assign s_axis_tlast_128 = s_axis_xge_rx_tlast;
assign s_axis_xge_rx_tready = s_axis_tready_128;

endmodule
module axis_sume_attachment_top #(
    parameter C_PCI_DATA_WIDTH  = 128, 	
    parameter C_AXIS_TDATA_WIDTH = 128,
    parameter C_AXIS_TKEEP_WIDTH = (C_AXIS_TDATA_WIDTH/8),
    parameter C_AXIS_TUSER_WIDTH = 128,
    parameter C_PREAM_VALUE	    = 32'hCAFE	

)(


	input wire                              CLK,
	input wire                              RST,

	output wire                             CHNL_RX_CLK,            
    input wire                              CHNL_RX,                
	output wire                             CHNL_RX_ACK,            
	input wire                              CHNL_RX_LAST,            
	input wire [31:0]                       CHNL_RX_LEN,            
	input wire [30:0]                       CHNL_RX_OFF,                
	input wire [(C_PCI_DATA_WIDTH-1):0]     CHNL_RX_DATA,           
	input wire                              CHNL_RX_DATA_VALID,     
	output wire                             CHNL_RX_DATA_REN,       	
	output wire                             CHNL_TX_CLK, 
	output wire                             CHNL_TX, 
	input wire                              CHNL_TX_ACK, 
	output wire                             CHNL_TX_LAST, 
	output wire [31:0]                      CHNL_TX_LEN, 
	output wire [30:0]                      CHNL_TX_OFF, 
	output wire [(C_PCI_DATA_WIDTH-1):0]    CHNL_TX_DATA, 
	output wire                             CHNL_TX_DATA_VALID, 
   	input wire                              CHNL_TX_DATA_REN,



  	output wire [(C_AXIS_TDATA_WIDTH-1):0]  m_axis_xge_tx_tdata,
  	output wire [(C_AXIS_TKEEP_WIDTH-1):0]  m_axis_xge_tx_tkeep, 
  	output wire [(C_AXIS_TUSER_WIDTH-1):0]  m_axis_xge_tx_tuser,
  	output wire                             m_axis_xge_tx_tlast, 
  	output wire                             m_axis_xge_tx_tvalid, 
  	input wire                              m_axis_xge_tx_tready,			

	input wire [(C_AXIS_TDATA_WIDTH-1):0]   s_axis_xge_rx_tdata, 
  	input wire [(C_AXIS_TKEEP_WIDTH-1):0]   s_axis_xge_rx_tkeep,
  	input wire [(C_AXIS_TUSER_WIDTH-1):0]   s_axis_xge_rx_tuser,
  	input wire  		                    s_axis_xge_rx_tlast, 
  	input wire                              s_axis_xge_rx_tvalid,   
  	output wire                             s_axis_xge_rx_tready
);








































localparam C_M_AXIS_DATA_WIDTH_INTERNAL	= C_PCI_DATA_WIDTH;
localparam C_M_AXIS_DATA_WIDTH		    = C_AXIS_TDATA_WIDTH;
localparam C_M_AXIS_TUSER_WIDTH		    = C_AXIS_TUSER_WIDTH;

localparam C_S_AXIS_DATA_WIDTH_INTERNAL	= C_PCI_DATA_WIDTH;
localparam C_S_AXIS_DATA_WIDTH		    = C_AXIS_TDATA_WIDTH;
localparam C_S_AXIS_TUSER_WIDTH		    = C_AXIS_TUSER_WIDTH;





wire [(C_M_AXIS_DATA_WIDTH_INTERNAL-1):0]   	    m_axis_tdata_128;
wire [(C_M_AXIS_DATA_WIDTH_INTERNAL/8)-1:0]   	m_axis_tkeep_128;
wire [(C_M_AXIS_TUSER_WIDTH-1):0]   		        m_axis_tuser_128;
wire		               			            m_axis_tvalid_128;
wire		               			            m_axis_tready_128;
wire  			       			                m_axis_tlast_128;



wire [(C_S_AXIS_DATA_WIDTH_INTERNAL-1):0]   	s_axis_tdata_128;
wire [((C_S_AXIS_DATA_WIDTH_INTERNAL/8)-1):0]   s_axis_tkeep_128;
wire [(C_S_AXIS_TUSER_WIDTH-1):0]   		    s_axis_tuser_128;
wire		               			            s_axis_tvalid_128;
wire		               		                s_axis_tready_128;
wire  			       		            	s_axis_tlast_128;




assign CHNL_RX_CLK = CLK;
assign CHNL_TX_CLK = CLK;




tx_riffa_axi 
#(
  .C_PCI_DATA_WIDTH         (C_PCI_DATA_WIDTH),
  .C_PREAM_VALUE            (C_PREAM_VALUE)
) riffa_to_axis_conv (
  .CLK                      (CLK),
  .RST                      (RST),

  .CHNL_RX                  (CHNL_RX),
  .CHNL_RX_DATA             (CHNL_RX_DATA),
  .CHNL_RX_DATA_VALID       (CHNL_RX_DATA_VALID),
  .CHNL_RX_LAST             (CHNL_RX_LAST),
  .CHNL_RX_LEN              (CHNL_RX_LEN),
  .CHNL_RX_OFF              (CHNL_RX_OFF),
  .CHNL_RX_DATA_REN         (CHNL_RX_DATA_REN),
  .CHNL_RX_ACK              (CHNL_RX_ACK),

  .tdata                    (m_axis_tdata_128),
  .tkeep                    (m_axis_tkeep_128),
  .tuser                    (m_axis_tuser_128),
  .tvalid                   (m_axis_tvalid_128),
  .tlast                    (m_axis_tlast_128),
  .tready                   (m_axis_tready_128)  
);

assign m_axis_xge_tx_tdata = m_axis_tdata_128;
assign m_axis_xge_tx_tkeep = m_axis_tkeep_128; 
assign m_axis_xge_tx_tuser = m_axis_tuser_128;
assign m_axis_xge_tx_tlast = m_axis_tlast_128; 
assign m_axis_xge_tx_tvalid = m_axis_tvalid_128;
assign m_axis_tready_128 = m_axis_xge_tx_tready;






rx_axi_riffa 
#(
  .C_PCI_DATA_WIDTH         (C_PCI_DATA_WIDTH),
  .C_RIFFA_OFFSET           (31'd0),
  .C_PREAM_VALUE            (C_PREAM_VALUE)
) axis_to_riffa_conv (
  .CLK                      (CLK),
  .RST                      (RST),

  .CHNL_TX                  (CHNL_TX),
  .CHNL_TX_DATA             (CHNL_TX_DATA),
  .CHNL_TX_DATA_VALID       (CHNL_TX_DATA_VALID),
  .CHNL_TX_LAST             (CHNL_TX_LAST),
  .CHNL_TX_LEN              (CHNL_TX_LEN),
  .CHNL_TX_OFF              (CHNL_TX_OFF),
  .CHNL_TX_DATA_REN         (CHNL_TX_DATA_REN),
  .CHNL_TX_ACK              (CHNL_TX_ACK),

  .tdata                    (s_axis_tdata_128),
  .tkeep                    (s_axis_tkeep_128),
  .tuser                    (s_axis_tuser_128),
  .tvalid                   (s_axis_tvalid_128),
  .tlast                    (s_axis_tlast_128),
  .tready                   (s_axis_tready_128)
);



assign s_axis_tdata_128 = s_axis_xge_rx_tdata;
assign s_axis_tkeep_128 = s_axis_xge_rx_tkeep;
assign s_axis_tuser_128 = s_axis_xge_rx_tuser;
assign s_axis_tvalid_128 = s_axis_xge_rx_tvalid;
assign s_axis_tlast_128 = s_axis_xge_rx_tlast;
assign s_axis_xge_rx_tready = s_axis_tready_128;

endmodule