data/full_repos/permissive/443556793/lab_4/rtl/mips.v
1: b"%Error: data/full_repos/permissive/443556793/lab_4/rtl/mips.v:44: Cannot find file containing module: 'controller'\ncontroller c(\n^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/443556793/lab_4/rtl,data/full_repos/permissive/443556793/controller\n             data/full_repos/permissive/443556793/lab_4/rtl,data/full_repos/permissive/443556793/controller.v\n             data/full_repos/permissive/443556793/lab_4/rtl,data/full_repos/permissive/443556793/controller.sv\n             controller\n             controller.v\n             controller.sv\n             obj_dir/controller\n             obj_dir/controller.v\n             obj_dir/controller.sv\n%Error: data/full_repos/permissive/443556793/lab_4/rtl/mips.v:73: Cannot find file containing module: 'datapath'\ndatapath dp(\n^~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module mips(
           input wire clk,rst,
           output wire[31:0] pcF,
           input wire[31:0] instrF,
           output wire[3:0] memwriteM,
           output wire[31:0] aluoutM,writedataM,
           input wire[31:0] readdataM
       );

wire [5:0] opD,functD;
wire [4:0] rtD;
wire regdstE,alusrcE,pcsrcD,memtoregE,memtoregM,memtoregW,
     regwriteE,regwriteM,regwriteW;

wire [2:0] lshbM;
wire [2:0] lshbW;
wire [3:0] memwriteD;

wire [7:0] alucontrolE;
wire flushE,equalD;

controller c(
               clk,rst,

               opD,functD,rtD,

               branchD,

               jumpD,memwriteD,
               jrD,
               jalD,
               pceightD,
               signD,
               hilowriteD,
               hilotoregD,
               hiloaluD,


               flushE,
               memtoregE,alusrcE,
               regdstE,regwriteE,
               alucontrolE,
               stallE,


               memtoregM,
               regwriteM,lshbM,

               memtoregW,regwriteW,lshbW
           );
datapath dp(
             clk,rst,

             pcF,
             instrF,


             branchD,
             jumpD,

             opD,functD,
             rtD,
             memwriteD,
             jrD,
             jalD,
             pceightD,
             signD,
             hilowriteD,
             hilotoregD,
             hiloaluD,

             memtoregE,
             alusrcE,regdstE,
             regwriteE,
             alucontrolE,
             flushE,
             stallE,

             memtoregM,
             regwriteM,
             aluoutM,writedataM,
             readdataM,lshbM,
             memwriteM,

             memtoregW,
             regwriteW,lshbW
         );

endmodule
module mips(
           input wire clk,rst,
           output wire[31:0] pcF,
           input wire[31:0] instrF,
           output wire[3:0] memwriteM,
           output wire[31:0] aluoutM,writedataM,
           input wire[31:0] readdataM
       );


wire [5:0] opD,functD;
wire [4:0] rtD;
wire regdstE,alusrcE,pcsrcD,memtoregE,memtoregM,memtoregW,
     regwriteE,regwriteM,regwriteW;

wire [2:0] lshbM;
wire [2:0] lshbW;
wire [3:0] memwriteD;

wire [7:0] alucontrolE;
wire flushE,equalD;

controller c(
               clk,rst,

               opD,functD,rtD,

               branchD,

               jumpD,memwriteD,
               jrD,
               jalD,
               pceightD,
               signD,
               hilowriteD,
               hilotoregD,
               hiloaluD,


               flushE,
               memtoregE,alusrcE,
               regdstE,regwriteE,
               alucontrolE,
               stallE,


               memtoregM,
               regwriteM,lshbM,

               memtoregW,regwriteW,lshbW
           );
datapath dp(
             clk,rst,

             pcF,
             instrF,


             branchD,
             jumpD,

             opD,functD,
             rtD,
             memwriteD,
             jrD,
             jalD,
             pceightD,
             signD,
             hilowriteD,
             hilotoregD,
             hiloaluD,

             memtoregE,
             alusrcE,regdstE,
             regwriteE,
             alucontrolE,
             flushE,
             stallE,

             memtoregM,
             regwriteM,
             aluoutM,writedataM,
             readdataM,lshbM,
             memwriteM,

             memtoregW,
             regwriteW,lshbW
         );

endmodule