data/full_repos/permissive/50737157/src/Buttons.v
data/verilator_xmls/b14f85ce-c122-4df0-bb38-1f76a13c6e81.xml
module Buttons(data_bus, enable, interrupt, buttons);
    output [15:0] data_bus;
    input enable;
    output interrupt;
    
    input [4:0] buttons;
    
    reg [4:0] reg_buttons;
    
    assign data_bus = enable ? {11'b0, reg_buttons} : 16'bz;
    assign interrupt = |buttons;
    
    always @(posedge interrupt or negedge enable)
        if (interrupt)
            reg_buttons = reg_buttons | buttons;
        else
            reg_buttons = 5'b0;

endmodule
module Buttons(data_bus, enable, interrupt, buttons);

    output [15:0] data_bus;
    input enable;
    output interrupt;
    
    input [4:0] buttons;
    
    reg [4:0] reg_buttons;
    
    assign data_bus = enable ? {11'b0, reg_buttons} : 16'bz;
    assign interrupt = |buttons;
    
    always @(posedge interrupt or negedge enable)
        if (interrupt)
            reg_buttons = reg_buttons | buttons;
        else
            reg_buttons = 5'b0;

endmodule