data/full_repos/permissive/488739248/rtl/ttl/ttl_74139_nodly.v
1: b'%Error: data/full_repos/permissive/488739248/rtl/ttl/ttl_74139_nodly.v:5: Cannot find include file: helper.v\n`include "helper.v" \n         ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/488739248/rtl/ttl,data/full_repos/permissive/488739248/helper.v\n             data/full_repos/permissive/488739248/rtl/ttl,data/full_repos/permissive/488739248/helper.v.v\n             data/full_repos/permissive/488739248/rtl/ttl,data/full_repos/permissive/488739248/helper.v.sv\n             helper.v\n             helper.v.v\n             helper.v.sv\n             obj_dir/helper.v\n             obj_dir/helper.v.v\n             obj_dir/helper.v.sv\n%Error: Exiting due to 1 error(s)\n'
module ttl_74139_nodly
(
  input wire Enable_bar,
  input wire [1:0] A_2D,
  output wire [3:0] Y_2D
);
  assign Y_2D[0] = ~(~Enable_bar & ~A_2D[1] & ~A_2D[0]); 
  assign Y_2D[1] = ~(~Enable_bar & ~A_2D[1] &  A_2D[0]);
  assign Y_2D[2] = ~(~Enable_bar &  A_2D[1] & ~A_2D[0]);
  assign Y_2D[3] = ~(~Enable_bar &  A_2D[1] &  A_2D[0]);
endmodule
module ttl_74139_nodly
(
  input wire Enable_bar,
  input wire [1:0] A_2D,
  output wire [3:0] Y_2D
);

  assign Y_2D[0] = ~(~Enable_bar & ~A_2D[1] & ~A_2D[0]); 
  assign Y_2D[1] = ~(~Enable_bar & ~A_2D[1] &  A_2D[0]);
  assign Y_2D[2] = ~(~Enable_bar &  A_2D[1] & ~A_2D[0]);
  assign Y_2D[3] = ~(~Enable_bar &  A_2D[1] &  A_2D[0]);
endmodule