data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:65: Unsupported: Ignoring delay on this delayed statement.\n    #CLK_HALF_PERIOD;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:77: Unsupported: Ignoring delay on this delayed statement.\n    #(CLK_PERIOD);\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:141: Unsupported: Ignoring delay on this delayed statement.\n        #(2 * CLK_PERIOD);\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:195: Unsupported: Ignoring delay on this delayed statement.\n            #(CLK_PERIOD);\n            ^\n%Warning-STMTDLY: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:211: Unsupported: Ignoring delay on this delayed statement.\n            #(CLK_PERIOD);\n            ^\n%Warning-STMTDLY: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:234: Unsupported: Ignoring delay on this delayed statement.\n        #(2 * CLK_PERIOD);\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:247: Unsupported: Ignoring delay on this delayed statement.\n        #(2 * CLK_PERIOD);\n        ^\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:94: Can\'t find definition of \'encdec\' in dotted variable: \'dut.encdec\'\n                dut.encdec, dut.init, dut.next);\n                    ^~~~~~\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:94: Can\'t find definition of \'init\' in dotted variable: \'dut.init\'\n                dut.encdec, dut.init, dut.next);\n                                ^~~~\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:94: Can\'t find definition of \'next\' in dotted variable: \'dut.next\'\n                dut.encdec, dut.init, dut.next);\n                                          ^~~~\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:95: Can\'t find definition of \'key\' in dotted variable: \'dut.key\'\n        $display("key    = 0x%032x ", dut.key);\n                                          ^~~\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:96: Can\'t find definition of \'block\' in dotted variable: \'dut.block\'\n        $display("block  = 0x%032x", dut.block);\n                                         ^~~~~\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:98: Can\'t find definition of \'ready\' in dotted variable: \'dut.ready\'\n        $display("ready        = 0x%01x", dut.ready);\n                                              ^~~~~\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:100: Can\'t find definition of \'result_valid\' in dotted variable: \'dut.result_valid\'\n                dut.result_valid, dut.result);\n                    ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:100: Can\'t find definition of \'result\' in dotted variable: \'dut.result\'\n                dut.result_valid, dut.result);\n                                      ^~~~~~\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:104: Can\'t find definition of \'enc_block\' in dotted scope/variable: \'dut.enc_block\'\n                dut.enc_block.enc_ctrl_reg, dut.enc_block.round_ctr_reg);\n                    ^~~~~~~~~\n        ... Known scopes under \'dut\': <no cells found>\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:104: Can\'t find definition of \'enc_block\' in dotted scope/variable: \'dut.enc_block\'\n                dut.enc_block.enc_ctrl_reg, dut.enc_block.round_ctr_reg);\n                                                ^~~~~~~~~\n        ... Known scopes under \'dut\': <no cells found>\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:117: Can\'t find definition of \'keymem\' in dotted scope/variable: \'dut.keymem\'\n        $display("key[00] = 0x%016x", dut.keymem.key_mem[00]);\n                                          ^~~~~~\n        ... Known scopes under \'dut\': <no cells found>\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:118: Can\'t find definition of \'keymem\' in dotted scope/variable: \'dut.keymem\'\n        $display("key[01] = 0x%016x", dut.keymem.key_mem[01]);\n                                          ^~~~~~\n        ... Known scopes under \'dut\': <no cells found>\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:119: Can\'t find definition of \'keymem\' in dotted scope/variable: \'dut.keymem\'\n        $display("key[02] = 0x%016x", dut.keymem.key_mem[02]);\n                                          ^~~~~~\n        ... Known scopes under \'dut\': <no cells found>\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:120: Can\'t find definition of \'keymem\' in dotted scope/variable: \'dut.keymem\'\n        $display("key[03] = 0x%016x", dut.keymem.key_mem[03]);\n                                          ^~~~~~\n        ... Known scopes under \'dut\': <no cells found>\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:121: Can\'t find definition of \'keymem\' in dotted scope/variable: \'dut.keymem\'\n        $display("key[04] = 0x%016x", dut.keymem.key_mem[04]);\n                                          ^~~~~~\n        ... Known scopes under \'dut\': <no cells found>\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:122: Can\'t find definition of \'keymem\' in dotted scope/variable: \'dut.keymem\'\n        $display("key[05] = 0x%016x", dut.keymem.key_mem[05]);\n                                          ^~~~~~\n        ... Known scopes under \'dut\': <no cells found>\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:123: Can\'t find definition of \'keymem\' in dotted scope/variable: \'dut.keymem\'\n        $display("key[06] = 0x%016x", dut.keymem.key_mem[06]);\n                                          ^~~~~~\n        ... Known scopes under \'dut\': <no cells found>\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:124: Can\'t find definition of \'keymem\' in dotted scope/variable: \'dut.keymem\'\n        $display("key[07] = 0x%016x", dut.keymem.key_mem[07]);\n                                          ^~~~~~\n        ... Known scopes under \'dut\': <no cells found>\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:125: Can\'t find definition of \'keymem\' in dotted scope/variable: \'dut.keymem\'\n        $display("key[08] = 0x%016x", dut.keymem.key_mem[08]);\n                                          ^~~~~~\n        ... Known scopes under \'dut\': <no cells found>\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:126: Can\'t find definition of \'keymem\' in dotted scope/variable: \'dut.keymem\'\n        $display("key[09] = 0x%016x", dut.keymem.key_mem[09]);\n                                          ^~~~~~\n        ... Known scopes under \'dut\': <no cells found>\n%Error: data/full_repos/permissive/493694849/tb/tb_AES_128_Core.v:127: Can\'t find definition of \'keymem\' in dotted scope/variable: \'dut.keymem\'\n        $display("key[10] = 0x%016x", dut.keymem.key_mem[10]);\n                                          ^~~~~~\n        ... Known scopes under \'dut\': <no cells found>\n%Error: Exiting due to 21 error(s), 7 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module tb_AES_128_Core();




parameter DEBUG = 0;
parameter DUMP_WAIT = 0;

parameter CLK_HALF_PERIOD = 1;
parameter CLK_PERIOD = 2 * CLK_HALF_PERIOD;

parameter AES_128_BIT_KEY = 0;

parameter AES_DECIPHER = 1'b0;
parameter AES_ENCIPHER = 1'b1;




reg [31:0] cycle_ctr;
reg [31:0] error_ctr;
reg [31:0] tc_ctr;

reg tb_clk;
reg tb_reset_n;
reg tb_encdec;
reg tb_init;
reg tb_next;

reg [127:0] tb_key;
reg [127:0] tb_block;

wire tb_ready;
wire [127:0] tb_result;
wire tb_result_valid;




AES_128_Core dut(
    .clk(tb_clk),
    .reset_n(tb_reset_n),
    .encdec(tb_encdec),
    .init(tb_init),
    .next(tb_next),
    .key(tb_key),
    .block(tb_block),
    
    .ready(tb_ready),
    .result(tb_result),
    .result_valid(tb_result_valid)
);






always begin: clk_gen
    #CLK_HALF_PERIOD;
    tb_clk = !tb_clk;
end







always begin: sys_monitor
    cycle_ctr = cycle_ctr + 1;
    #(CLK_PERIOD);
    if (DEBUG) begin
        dump_dut_state();
    end
end






task dump_dut_state; 
    begin
        $display("State of DUT");
        $display("------------");
        $display("Inputs and outputs:");
        $display("encdec = 0x%01x, init = 0x%01x, next = 0x%01x",
                dut.encdec, dut.init, dut.next);
        $display("key    = 0x%032x ", dut.key);
        $display("block  = 0x%032x", dut.block);
        $display("");
        $display("ready        = 0x%01x", dut.ready);
        $display("result_valid = 0x%01x, result = 0x%032x",
                dut.result_valid, dut.result);
        $display("");
        $display("Encipher state::");
        $display("enc_ctrl = 0x%01x, round_ctr = 0x%01x",
                dut.enc_block.enc_ctrl_reg, dut.enc_block.round_ctr_reg);
        $display("");
    end
endtask






task dump_keys; 
    begin
        $display("State of key memory in DUT:");
        $display("key[00] = 0x%016x", dut.keymem.key_mem[00]);
        $display("key[01] = 0x%016x", dut.keymem.key_mem[01]);
        $display("key[02] = 0x%016x", dut.keymem.key_mem[02]);
        $display("key[03] = 0x%016x", dut.keymem.key_mem[03]);
        $display("key[04] = 0x%016x", dut.keymem.key_mem[04]);
        $display("key[05] = 0x%016x", dut.keymem.key_mem[05]);
        $display("key[06] = 0x%016x", dut.keymem.key_mem[06]);
        $display("key[07] = 0x%016x", dut.keymem.key_mem[07]);
        $display("key[08] = 0x%016x", dut.keymem.key_mem[08]);
        $display("key[09] = 0x%016x", dut.keymem.key_mem[09]);
        $display("key[10] = 0x%016x", dut.keymem.key_mem[10]);
        $display("");
    end
endtask






task reset_dut; 
    begin
        $display("*** Toggle reset");
        tb_reset_n = 0;
        #(2 * CLK_PERIOD);
        tb_reset_n = 1;
        $display("");
    end
endtask








task init_sim; 
    begin
        cycle_ctr = 0;
        error_ctr = 0;
        tc_ctr = 0;

        tb_clk = 0;
        tb_reset_n = 1;
        tb_encdec = 0;
        tb_init = 0;

        tb_next = 0;
        tb_key = {4{32'h00000000}};

        tb_block = {4{32'h00000000}};
    end
endtask






task display_test_result; 
    begin
        if (error_ctr == 0) 
            $display("--- All %02d test cases completed successfully", tc_ctr);
        else
            $display("--- %02d tests completed - %02d test cases did not complete successfully.",
                    tc_ctr, error_ctr);
    end
endtask






task wait_ready; 
    begin
        while (!tb_ready) begin
            #(CLK_PERIOD);

            if (DUMP_WAIT)
                dump_dut_state();
        end
    end
endtask






task wait_valid;
    begin
        while (!tb_result_valid) 
            #(CLK_PERIOD);
    end
endtask






task ecb_mode_single_block_test(
    input [7:0] tc_number,
    input encdec,
    input [127:0] key,
    input [127:0] block,
    input [127:0] expected
);
    begin
        $display("*** TC %0d ECB mode test started.", tc_number);
        tc_ctr = tc_ctr + 1;


        tb_key = key;
        tb_init = 1;
        #(2 * CLK_PERIOD);
        tb_init = 0;
        wait_ready();

        $display("Key expansion done");
        $display("");

        dump_keys();


        tb_encdec = encdec;
        tb_block = block;
        tb_next = 1;
        #(2 * CLK_PERIOD);
        tb_next = 0;
        wait_ready();

        if (tb_result == expected) begin
            $display("*** TC %0d successful", tc_number);
            $display("");
        end
        else begin
            $display("*** ERROR: TC %0d NOT successful", tc_number);
            $display("Expected: 0x%032x", expected);
            $display("Got:      0x%032x", tb_result);
            $display("");

            error_ctr = error_ctr + 1;
        end
    end
endtask

















initial begin: tb_AES_core_test
    reg [127:0] nist_aes128_key1;
    reg [127:0] nist_aes128_key2;

    reg [127:0] nist_plaintext0;
    reg [127:0] nist_plaintext1;
    reg [127:0] nist_plaintext2;
    reg [127:0] nist_plaintext3;
    reg [127:0] nist_plaintext4;
    reg [127:0] nist_plaintext5;

    reg [127:0] nist_ecb_128_enc_expected0;
    reg [127:0] nist_ecb_128_enc_expected1;
    reg [127:0] nist_ecb_128_enc_expected2;
    reg [127:0] nist_ecb_128_enc_expected3;
    reg [127:0] nist_ecb_128_enc_expected4;
    reg [127:0] nist_ecb_128_enc_expected5;

    nist_aes128_key1 = 256'h2b7e151628aed2a6abf7158809cf4f3c;
    nist_aes128_key2 = 256'h000102030405060708090a0b0c0d0e0f;

    nist_plaintext0 = 128'h6bc1bee22e409f96e93d7e117393172a;
    nist_plaintext1 = 128'hae2d8a571e03ac9c9eb76fac45af8e51;
    nist_plaintext2 = 128'h30c81c46a35ce411e5fbc1191a0a52ef;
    nist_plaintext3 = 128'hf69f2445df4f9b17ad2b417be66c3710;
    nist_plaintext4 = 128'h00112233445566778899aabbccddeeff;
    nist_plaintext5 = 128'h3243f6a8885a308d313198a2e0370734;

    nist_ecb_128_enc_expected0 = 128'h3ad77bb40d7a3660a89ecaf32466ef97;
    nist_ecb_128_enc_expected1 = 128'hf5d3d58503b9699de785895a96fdbaaf;
    nist_ecb_128_enc_expected2 = 128'h43b1cd7f598ece23881b00e3ed030688;
    nist_ecb_128_enc_expected3 = 128'h7b0c785e27e8ad3f8223207104725dd4;
    nist_ecb_128_enc_expected4 = 128'h69c4e0d86a7b0430d8cdb78070b4c55a;
    nist_ecb_128_enc_expected5 = 128'h3925841d02dc09fbdc118597196a0b32;

    $display("   -= Testbench for aes core started =-");
    $display("     ================================");
    $display("");

    init_sim();
    dump_dut_state();
    reset_dut();
    dump_dut_state();

    $display("ECB 128 bit key tests");
    $display("---------------------");

    ecb_mode_single_block_test(8'h01, AES_ENCIPHER, nist_aes128_key1,
                               nist_plaintext0, nist_ecb_128_enc_expected0);

    ecb_mode_single_block_test(8'h02, AES_ENCIPHER, nist_aes128_key1,
                               nist_plaintext1, nist_ecb_128_enc_expected1);

    ecb_mode_single_block_test(8'h03, AES_ENCIPHER, nist_aes128_key1,
                               nist_plaintext2, nist_ecb_128_enc_expected2);

    ecb_mode_single_block_test(8'h04, AES_ENCIPHER, nist_aes128_key1,
                               nist_plaintext3, nist_ecb_128_enc_expected3);


    ecb_mode_single_block_test(8'h05, AES_DECIPHER, nist_aes128_key1,
                               nist_ecb_128_enc_expected0, nist_plaintext0);

    ecb_mode_single_block_test(8'h06, AES_DECIPHER, nist_aes128_key1,
                               nist_ecb_128_enc_expected1, nist_plaintext1);

    ecb_mode_single_block_test(8'h07, AES_DECIPHER, nist_aes128_key1,
                               nist_ecb_128_enc_expected2, nist_plaintext2);

    ecb_mode_single_block_test(8'h08, AES_DECIPHER, nist_aes128_key1,
                               nist_ecb_128_enc_expected3, nist_plaintext3);


    ecb_mode_single_block_test(8'h09, AES_ENCIPHER, nist_aes128_key2,
                               nist_plaintext4, nist_ecb_128_enc_expected4);

    ecb_mode_single_block_test(8'h0a, AES_DECIPHER, nist_aes128_key2,
                               nist_ecb_128_enc_expected4, nist_plaintext4);

    ecb_mode_single_block_test(8'h0b, AES_ENCIPHER, nist_aes128_key1,
                               nist_plaintext5, nist_ecb_128_enc_expected5);

    $display("");

    display_test_result();
    $display("");
    $display("*** AES core simulation done. ***");
    $finish;
end


endmodule
module tb_AES_128_Core();





parameter DEBUG = 0;
parameter DUMP_WAIT = 0;

parameter CLK_HALF_PERIOD = 1;
parameter CLK_PERIOD = 2 * CLK_HALF_PERIOD;

parameter AES_128_BIT_KEY = 0;

parameter AES_DECIPHER = 1'b0;
parameter AES_ENCIPHER = 1'b1;




reg [31:0] cycle_ctr;
reg [31:0] error_ctr;
reg [31:0] tc_ctr;

reg tb_clk;
reg tb_reset_n;
reg tb_encdec;
reg tb_init;
reg tb_next;

reg [127:0] tb_key;
reg [127:0] tb_block;

wire tb_ready;
wire [127:0] tb_result;
wire tb_result_valid;




AES_128_Core dut(
    .clk(tb_clk),
    .reset_n(tb_reset_n),
    .encdec(tb_encdec),
    .init(tb_init),
    .next(tb_next),
    .key(tb_key),
    .block(tb_block),
    
    .ready(tb_ready),
    .result(tb_result),
    .result_valid(tb_result_valid)
);






always begin: clk_gen
    #CLK_HALF_PERIOD;
    tb_clk = !tb_clk;
end







always begin: sys_monitor
    cycle_ctr = cycle_ctr + 1;
    #(CLK_PERIOD);
    if (DEBUG) begin
        dump_dut_state();
    end
end






task dump_dut_state; 
    begin
        $display("State of DUT");
        $display("------------");
        $display("Inputs and outputs:");
        $display("encdec = 0x%01x, init = 0x%01x, next = 0x%01x",
                dut.encdec, dut.init, dut.next);
        $display("key    = 0x%032x ", dut.key);
        $display("block  = 0x%032x", dut.block);
        $display("");
        $display("ready        = 0x%01x", dut.ready);
        $display("result_valid = 0x%01x, result = 0x%032x",
                dut.result_valid, dut.result);
        $display("");
        $display("Encipher state::");
        $display("enc_ctrl = 0x%01x, round_ctr = 0x%01x",
                dut.enc_block.enc_ctrl_reg, dut.enc_block.round_ctr_reg);
        $display("");
    end
endtask






task dump_keys; 
    begin
        $display("State of key memory in DUT:");
        $display("key[00] = 0x%016x", dut.keymem.key_mem[00]);
        $display("key[01] = 0x%016x", dut.keymem.key_mem[01]);
        $display("key[02] = 0x%016x", dut.keymem.key_mem[02]);
        $display("key[03] = 0x%016x", dut.keymem.key_mem[03]);
        $display("key[04] = 0x%016x", dut.keymem.key_mem[04]);
        $display("key[05] = 0x%016x", dut.keymem.key_mem[05]);
        $display("key[06] = 0x%016x", dut.keymem.key_mem[06]);
        $display("key[07] = 0x%016x", dut.keymem.key_mem[07]);
        $display("key[08] = 0x%016x", dut.keymem.key_mem[08]);
        $display("key[09] = 0x%016x", dut.keymem.key_mem[09]);
        $display("key[10] = 0x%016x", dut.keymem.key_mem[10]);
        $display("");
    end
endtask






task reset_dut; 
    begin
        $display("*** Toggle reset");
        tb_reset_n = 0;
        #(2 * CLK_PERIOD);
        tb_reset_n = 1;
        $display("");
    end
endtask








task init_sim; 
    begin
        cycle_ctr = 0;
        error_ctr = 0;
        tc_ctr = 0;

        tb_clk = 0;
        tb_reset_n = 1;
        tb_encdec = 0;
        tb_init = 0;

        tb_next = 0;
        tb_key = {4{32'h00000000}};

        tb_block = {4{32'h00000000}};
    end
endtask






task display_test_result; 
    begin
        if (error_ctr == 0) 
            $display("--- All %02d test cases completed successfully", tc_ctr);
        else
            $display("--- %02d tests completed - %02d test cases did not complete successfully.",
                    tc_ctr, error_ctr);
    end
endtask






task wait_ready; 
    begin
        while (!tb_ready) begin
            #(CLK_PERIOD);

            if (DUMP_WAIT)
                dump_dut_state();
        end
    end
endtask






task wait_valid;
    begin
        while (!tb_result_valid) 
            #(CLK_PERIOD);
    end
endtask






task ecb_mode_single_block_test(
    input [7:0] tc_number,
    input encdec,
    input [127:0] key,
    input [127:0] block,
    input [127:0] expected
);
    begin
        $display("*** TC %0d ECB mode test started.", tc_number);
        tc_ctr = tc_ctr + 1;


        tb_key = key;
        tb_init = 1;
        #(2 * CLK_PERIOD);
        tb_init = 0;
        wait_ready();

        $display("Key expansion done");
        $display("");

        dump_keys();


        tb_encdec = encdec;
        tb_block = block;
        tb_next = 1;
        #(2 * CLK_PERIOD);
        tb_next = 0;
        wait_ready();

        if (tb_result == expected) begin
            $display("*** TC %0d successful", tc_number);
            $display("");
        end
        else begin
            $display("*** ERROR: TC %0d NOT successful", tc_number);
            $display("Expected: 0x%032x", expected);
            $display("Got:      0x%032x", tb_result);
            $display("");

            error_ctr = error_ctr + 1;
        end
    end
endtask

















initial begin: tb_AES_core_test
    reg [127:0] nist_aes128_key1;
    reg [127:0] nist_aes128_key2;

    reg [127:0] nist_plaintext0;
    reg [127:0] nist_plaintext1;
    reg [127:0] nist_plaintext2;
    reg [127:0] nist_plaintext3;
    reg [127:0] nist_plaintext4;
    reg [127:0] nist_plaintext5;

    reg [127:0] nist_ecb_128_enc_expected0;
    reg [127:0] nist_ecb_128_enc_expected1;
    reg [127:0] nist_ecb_128_enc_expected2;
    reg [127:0] nist_ecb_128_enc_expected3;
    reg [127:0] nist_ecb_128_enc_expected4;
    reg [127:0] nist_ecb_128_enc_expected5;

    nist_aes128_key1 = 256'h2b7e151628aed2a6abf7158809cf4f3c;
    nist_aes128_key2 = 256'h000102030405060708090a0b0c0d0e0f;

    nist_plaintext0 = 128'h6bc1bee22e409f96e93d7e117393172a;
    nist_plaintext1 = 128'hae2d8a571e03ac9c9eb76fac45af8e51;
    nist_plaintext2 = 128'h30c81c46a35ce411e5fbc1191a0a52ef;
    nist_plaintext3 = 128'hf69f2445df4f9b17ad2b417be66c3710;
    nist_plaintext4 = 128'h00112233445566778899aabbccddeeff;
    nist_plaintext5 = 128'h3243f6a8885a308d313198a2e0370734;

    nist_ecb_128_enc_expected0 = 128'h3ad77bb40d7a3660a89ecaf32466ef97;
    nist_ecb_128_enc_expected1 = 128'hf5d3d58503b9699de785895a96fdbaaf;
    nist_ecb_128_enc_expected2 = 128'h43b1cd7f598ece23881b00e3ed030688;
    nist_ecb_128_enc_expected3 = 128'h7b0c785e27e8ad3f8223207104725dd4;
    nist_ecb_128_enc_expected4 = 128'h69c4e0d86a7b0430d8cdb78070b4c55a;
    nist_ecb_128_enc_expected5 = 128'h3925841d02dc09fbdc118597196a0b32;

    $display("   -= Testbench for aes core started =-");
    $display("     ================================");
    $display("");

    init_sim();
    dump_dut_state();
    reset_dut();
    dump_dut_state();

    $display("ECB 128 bit key tests");
    $display("---------------------");

    ecb_mode_single_block_test(8'h01, AES_ENCIPHER, nist_aes128_key1,
                               nist_plaintext0, nist_ecb_128_enc_expected0);

    ecb_mode_single_block_test(8'h02, AES_ENCIPHER, nist_aes128_key1,
                               nist_plaintext1, nist_ecb_128_enc_expected1);

    ecb_mode_single_block_test(8'h03, AES_ENCIPHER, nist_aes128_key1,
                               nist_plaintext2, nist_ecb_128_enc_expected2);

    ecb_mode_single_block_test(8'h04, AES_ENCIPHER, nist_aes128_key1,
                               nist_plaintext3, nist_ecb_128_enc_expected3);


    ecb_mode_single_block_test(8'h05, AES_DECIPHER, nist_aes128_key1,
                               nist_ecb_128_enc_expected0, nist_plaintext0);

    ecb_mode_single_block_test(8'h06, AES_DECIPHER, nist_aes128_key1,
                               nist_ecb_128_enc_expected1, nist_plaintext1);

    ecb_mode_single_block_test(8'h07, AES_DECIPHER, nist_aes128_key1,
                               nist_ecb_128_enc_expected2, nist_plaintext2);

    ecb_mode_single_block_test(8'h08, AES_DECIPHER, nist_aes128_key1,
                               nist_ecb_128_enc_expected3, nist_plaintext3);


    ecb_mode_single_block_test(8'h09, AES_ENCIPHER, nist_aes128_key2,
                               nist_plaintext4, nist_ecb_128_enc_expected4);

    ecb_mode_single_block_test(8'h0a, AES_DECIPHER, nist_aes128_key2,
                               nist_ecb_128_enc_expected4, nist_plaintext4);

    ecb_mode_single_block_test(8'h0b, AES_ENCIPHER, nist_aes128_key1,
                               nist_plaintext5, nist_ecb_128_enc_expected5);

    $display("");

    display_test_result();
    $display("");
    $display("*** AES core simulation done. ***");
    $finish;
end


endmodule