data/full_repos/permissive/464120924/Basys3_CPU/Basys3_CPU.srcs/sources_1/new/top.v
1: b"%Error: data/full_repos/permissive/464120924/Basys3_CPU/Basys3_CPU.srcs/sources_1/new/top.v:17: Cannot find file containing module: 'memory'\n    memory#(memory_size) memory1(clk, memory_write, memory_address, memory_io);\n    ^~~~~~\n        ... Looked in:\n             data/full_repos/permissive/464120924/Basys3_CPU/Basys3_CPU.srcs/sources_1/new,data/full_repos/permissive/464120924/memory\n             data/full_repos/permissive/464120924/Basys3_CPU/Basys3_CPU.srcs/sources_1/new,data/full_repos/permissive/464120924/memory.v\n             data/full_repos/permissive/464120924/Basys3_CPU/Basys3_CPU.srcs/sources_1/new,data/full_repos/permissive/464120924/memory.sv\n             memory\n             memory.v\n             memory.sv\n             obj_dir/memory\n             obj_dir/memory.v\n             obj_dir/memory.sv\n%Error: data/full_repos/permissive/464120924/Basys3_CPU/Basys3_CPU.srcs/sources_1/new/top.v:18: Cannot find file containing module: 'ssd_controller'\n    ssd_controller ctrl1(clk, disp_number, disp_cathode, disp_anode);\n    ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/464120924/Basys3_CPU/Basys3_CPU.srcs/sources_1/new/top.v:19: Cannot find file containing module: 'core'\n    core#(memory_size) cpu0(clk, memory_io, memory_address, memory_write, sw, LED, disp_number);\n    ^~~~\n%Error: Exiting due to 3 error(s)\n"
module top(input clk, input[15:0] sw, output[15:0] LED, output[6:0] disp_cathode, output[3:0] disp_anode);
        
        
    parameter memory_size = 16'd1023;
            
    wire[15:0] disp_number,
                memory_address,
                memory_io;
                
    wire memory_write;
    
    memory#(memory_size) memory1(clk, memory_write, memory_address, memory_io);
    ssd_controller ctrl1(clk, disp_number, disp_cathode, disp_anode);
    core#(memory_size) cpu0(clk, memory_io, memory_address, memory_write, sw, LED, disp_number);

endmodule
module top(input clk, input[15:0] sw, output[15:0] LED, output[6:0] disp_cathode, output[3:0] disp_anode);

        
        
    parameter memory_size = 16'd1023;
            
    wire[15:0] disp_number,
                memory_address,
                memory_io;
                
    wire memory_write;
    
    memory#(memory_size) memory1(clk, memory_write, memory_address, memory_io);
    ssd_controller ctrl1(clk, disp_number, disp_cathode, disp_anode);
    core#(memory_size) cpu0(clk, memory_io, memory_address, memory_write, sw, LED, disp_number);

endmodule