data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main/ArithmeticOperator.v
1: b"%Error: data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main/ArithmeticOperator.v:16: Cannot find file containing module: 'ADD_SUB_EN'\n ADD_SUB_EN add_sub_en(EN,ctrl_ALUopcode);  \n ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main,data/full_repos/permissive/499137621/ADD_SUB_EN\n             data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main,data/full_repos/permissive/499137621/ADD_SUB_EN.v\n             data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main,data/full_repos/permissive/499137621/ADD_SUB_EN.sv\n             ADD_SUB_EN\n             ADD_SUB_EN.v\n             ADD_SUB_EN.sv\n             obj_dir/ADD_SUB_EN\n             obj_dir/ADD_SUB_EN.v\n             obj_dir/ADD_SUB_EN.sv\n%Error: data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main/ArithmeticOperator.v:19: Cannot find file containing module: 'ADD_SUB_OP'\n   ADD_SUB_OP add_sub_op(_data_operandB_, data_operandB, ctrl_ALUopcode);  \n   ^~~~~~~~~~\n%Error: data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main/ArithmeticOperator.v:25: Cannot find file containing module: 'carry_select_adder_32'\n carry_select_adder_32 csa_32(data_operandA, _data_operandB_, ctrl_ALUopcode[0], _data_result_, c_out_31, c_in_31);  \n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main/ArithmeticOperator.v:30: Cannot find file containing module: 'overflow'\n overflow of(_overflow_, c_out_31, c_in_31);\n ^~~~~~~~\n%Error: data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main/ArithmeticOperator.v:33: Cannot find file containing module: 'isNotEqual'\n isNotEqual _isNotEqual_(isNotEqual, EN, _data_result_, ctrl_ALUopcode);  \n ^~~~~~~~~~\n%Error: data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main/ArithmeticOperator.v:35: Cannot find file containing module: 'isLessThan'\n isLessThan islessthan(isLessThan, EN, _data_result_, _overflow_, ctrl_ALUopcode);  \n ^~~~~~~~~~\n%Error: data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main/ArithmeticOperator.v:50: Cannot find file containing module: 'bit_and_EN'\n bit_and_EN and_en(EN_and,ctrl_ALUopcode);\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main/ArithmeticOperator.v:51: Cannot find file containing module: 'bit_or_EN'\n bit_or_EN or_en(EN_or,ctrl_ALUopcode); \n ^~~~~~~~~\n%Error: data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main/ArithmeticOperator.v:55: Cannot find file containing module: 'logic_and'\n logic_and bitwise_and(data_operandA, data_operandB, temp_out_and);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main/ArithmeticOperator.v:56: Cannot find file containing module: 'logic_or'\n logic_or bitwise_or(data_operandA, data_operandB, temp_out_or);\n ^~~~~~~~\n%Error: data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main/ArithmeticOperator.v:65: Cannot find file containing module: 'logic_or'\n logic_or or_1( data_result_and, data_result_or, out1);\n ^~~~~~~~\n%Error: data/full_repos/permissive/499137621/CheckPoint2_32bit_ALU_project-main/ArithmeticOperator.v:66: Cannot find file containing module: 'logic_or'\n logic_or or_2( out1, data_result_Arithmetic, data_result);\n ^~~~~~~~\n%Error: Exiting due to 12 error(s)\n"
module ArithmeticOperator(data_result, isNotEqual, isLessThan, overflow, data_operandA, data_operandB, ctrl_ALUopcode);
	
   input [31:0] data_operandA, data_operandB;
   input [4:0] ctrl_ALUopcode;

   output [31:0] data_result;
   output isNotEqual, isLessThan, overflow;
	
	
	
	
	wire EN;
	ADD_SUB_EN add_sub_en(EN,ctrl_ALUopcode);
	
	wire [31:0] _data_operandB_; 
   ADD_SUB_OP add_sub_op(_data_operandB_, data_operandB, ctrl_ALUopcode);
	

	wire [31:0] _data_result_;
	wire c_out_31, c_in_31; 
	
	carry_select_adder_32 csa_32(data_operandA, _data_operandB_, ctrl_ALUopcode[0], _data_result_, c_out_31, c_in_31);
	


	wire _overflow_;
	overflow of(_overflow_, c_out_31, c_in_31);
	and overflow_EN(overflow, _overflow_, EN);

	isNotEqual _isNotEqual_(isNotEqual, EN, _data_result_, ctrl_ALUopcode);

	isLessThan islessthan(isLessThan, EN, _data_result_, _overflow_, ctrl_ALUopcode);
	
	
	
	
	
	
	
	wire [31:0] data_result_Arithmetic;
	assign data_result_Arithmetic = EN ? _data_result_:0;
	



	wire EN_and, EN_or;
	bit_and_EN and_en(EN_and,ctrl_ALUopcode);
	bit_or_EN or_en(EN_or,ctrl_ALUopcode);	


	wire [31:0] temp_out_and, temp_out_or;
	logic_and bitwise_and(data_operandA, data_operandB, temp_out_and);
	logic_or bitwise_or(data_operandA, data_operandB, temp_out_or);


	wire [31:0] data_result_and, data_result_or;
	assign data_result_and = EN_and ? temp_out_and:0;
	assign data_result_or = EN_or ? temp_out_or:0;


	wire [31:0] out1;
	logic_or or_1( data_result_and, data_result_or, out1);
	logic_or or_2( out1, data_result_Arithmetic, data_result);
	

endmodule
module ArithmeticOperator(data_result, isNotEqual, isLessThan, overflow, data_operandA, data_operandB, ctrl_ALUopcode);

	
   input [31:0] data_operandA, data_operandB;
   input [4:0] ctrl_ALUopcode;

   output [31:0] data_result;
   output isNotEqual, isLessThan, overflow;
	
	
	
	
	wire EN;
	ADD_SUB_EN add_sub_en(EN,ctrl_ALUopcode);
	
	wire [31:0] _data_operandB_; 
   ADD_SUB_OP add_sub_op(_data_operandB_, data_operandB, ctrl_ALUopcode);
	

	wire [31:0] _data_result_;
	wire c_out_31, c_in_31; 
	
	carry_select_adder_32 csa_32(data_operandA, _data_operandB_, ctrl_ALUopcode[0], _data_result_, c_out_31, c_in_31);
	


	wire _overflow_;
	overflow of(_overflow_, c_out_31, c_in_31);
	and overflow_EN(overflow, _overflow_, EN);

	isNotEqual _isNotEqual_(isNotEqual, EN, _data_result_, ctrl_ALUopcode);

	isLessThan islessthan(isLessThan, EN, _data_result_, _overflow_, ctrl_ALUopcode);
	
	
	
	
	
	
	
	wire [31:0] data_result_Arithmetic;
	assign data_result_Arithmetic = EN ? _data_result_:0;
	



	wire EN_and, EN_or;
	bit_and_EN and_en(EN_and,ctrl_ALUopcode);
	bit_or_EN or_en(EN_or,ctrl_ALUopcode);	


	wire [31:0] temp_out_and, temp_out_or;
	logic_and bitwise_and(data_operandA, data_operandB, temp_out_and);
	logic_or bitwise_or(data_operandA, data_operandB, temp_out_or);


	wire [31:0] data_result_and, data_result_or;
	assign data_result_and = EN_and ? temp_out_and:0;
	assign data_result_or = EN_or ? temp_out_or:0;


	wire [31:0] out1;
	logic_or or_1( data_result_and, data_result_or, out1);
	logic_or or_2( out1, data_result_Arithmetic, data_result);
	

endmodule