data/full_repos/permissive/523043017/Verilog microcontroller/ROM_unit.v
1: b'%Error: Cannot find file containing module: microcontroller,data/full_repos/permissive/523043017\n        ... Looked in:\n             data/full_repos/permissive/523043017/Verilog/microcontroller,data/full_repos/permissive/523043017\n             data/full_repos/permissive/523043017/Verilog/microcontroller,data/full_repos/permissive/523043017.v\n             data/full_repos/permissive/523043017/Verilog/microcontroller,data/full_repos/permissive/523043017.sv\n             microcontroller,data/full_repos/permissive/523043017\n             microcontroller,data/full_repos/permissive/523043017.v\n             microcontroller,data/full_repos/permissive/523043017.sv\n             obj_dir/microcontroller,data/full_repos/permissive/523043017\n             obj_dir/microcontroller,data/full_repos/permissive/523043017.v\n             obj_dir/microcontroller,data/full_repos/permissive/523043017.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/523043017/Verilog\n%Error: Cannot find file containing module: microcontroller/ROM_unit.v\n%Error: Exiting due to 3 error(s)\n'
module ROM_unit(
	input wire [7:0] A,
	output wire [11:0]D);
	reg [11:0] rom[255:0];
	initial
		$readmemh("ROM.dat", rom);
	assign D = rom[A];
endmodule
module ROM_unit(
	input wire [7:0] A,
	output wire [11:0]D);

	reg [11:0] rom[255:0];
	initial
		$readmemh("ROM.dat", rom);
	assign D = rom[A];
endmodule