data/full_repos/permissive/509335294/instrmem.v
1: b'%Warning-WIDTH: data/full_repos/permissive/509335294/instrmem.v:40: Bit extraction of array[23:0] requires 5 bit index, not 13 bits.\n                                                                  : ... In instance instrmem\n  inst_out = inst_mem[pc_pointer];\n                     ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module instrmem(
	input[12:0] pc_pointer, 
	input clk, rst,
	output reg[15:0] inst_out
	);
	integer i;
	reg [15:0] inst_mem [0:23];
	
initial begin
inst_mem[0] <= 16'b1001100100000001;
inst_mem[1] <= 16'b1001100110000010;
inst_mem[2] <= 16'b0000100111000000;
inst_mem[3] <= 16'b0000100110010100;
inst_mem[4] <= 16'b1100010000000010;
inst_mem[5] <= 16'b0000100111000010;
inst_mem[6] <= 16'b0100000000001000;
inst_mem[7] <= 16'b0000100111000001;
inst_mem[8] <= 16'b0000100111000011;
inst_mem[9] <= 16'b0110000000001101;
inst_mem[10] <= 16'b1111001000000010;
inst_mem[11] <= 16'b1011101000000011;
inst_mem[12] <= 16'b0100000000001111;
inst_mem[13] <= 16'b0000100111000110;
inst_mem[14] <= 16'b0001110000001000;
inst_mem[15] <= 16'b0000000000000000;
inst_mem[16] <= 16'b0000000000000000;
inst_mem[17] <= 16'b0000000000000000;
inst_mem[18] <= 16'b0000000000000000;
inst_mem[19] <= 16'b0000000000000000;
inst_mem[20] <= 16'b0000000000000000;
inst_mem[21] <= 16'b0000000000000000;
inst_mem[22] <= 16'b0000000000000000;
inst_mem[23] <= 16'b0000000000000000;
inst_out <= 16'b0;
end
	
always@(posedge clk) begin
	if(rst) 
		inst_out = inst_mem[pc_pointer];

end

endmodule
module instrmem(
	input[12:0] pc_pointer, 
	input clk, rst,
	output reg[15:0] inst_out
	);

	integer i;
	reg [15:0] inst_mem [0:23];
	
initial begin
inst_mem[0] <= 16'b1001100100000001;
inst_mem[1] <= 16'b1001100110000010;
inst_mem[2] <= 16'b0000100111000000;
inst_mem[3] <= 16'b0000100110010100;
inst_mem[4] <= 16'b1100010000000010;
inst_mem[5] <= 16'b0000100111000010;
inst_mem[6] <= 16'b0100000000001000;
inst_mem[7] <= 16'b0000100111000001;
inst_mem[8] <= 16'b0000100111000011;
inst_mem[9] <= 16'b0110000000001101;
inst_mem[10] <= 16'b1111001000000010;
inst_mem[11] <= 16'b1011101000000011;
inst_mem[12] <= 16'b0100000000001111;
inst_mem[13] <= 16'b0000100111000110;
inst_mem[14] <= 16'b0001110000001000;
inst_mem[15] <= 16'b0000000000000000;
inst_mem[16] <= 16'b0000000000000000;
inst_mem[17] <= 16'b0000000000000000;
inst_mem[18] <= 16'b0000000000000000;
inst_mem[19] <= 16'b0000000000000000;
inst_mem[20] <= 16'b0000000000000000;
inst_mem[21] <= 16'b0000000000000000;
inst_mem[22] <= 16'b0000000000000000;
inst_mem[23] <= 16'b0000000000000000;
inst_out <= 16'b0;
end
	
always@(posedge clk) begin
	if(rst) 
		inst_out = inst_mem[pc_pointer];

end

endmodule