data/full_repos/permissive/463549945/Problem_sets/Circuits/Combinational Logic/Basic Gates/Combine circuits A and B.v
1: b'%Error: Cannot find file containing module: Logic/Basic\n        ... Looked in:\n             data/full_repos/permissive/463549945/Problem_sets/Circuits/Combinational/Logic/Basic\n             data/full_repos/permissive/463549945/Problem_sets/Circuits/Combinational/Logic/Basic.v\n             data/full_repos/permissive/463549945/Problem_sets/Circuits/Combinational/Logic/Basic.sv\n             Logic/Basic\n             Logic/Basic.v\n             Logic/Basic.sv\n             obj_dir/Logic/Basic\n             obj_dir/Logic/Basic.v\n             obj_dir/Logic/Basic.sv\n%Error: Cannot find file containing module: Gates,data/full_repos/permissive/463549945\n%Error: Cannot find file containing module: data/full_repos/permissive/463549945/Problem_sets/Circuits/Combinational\n%Error: Cannot find file containing module: Gates/Combine\n%Error: Cannot find file containing module: circuits\n%Error: Cannot find file containing module: A\n%Error: Cannot find file containing module: and\n%Error: Cannot find file containing module: B.v\n%Error: Exiting due to 8 error(s)\n'
module top_module (input x, input y, output z);
    wire z1, z2, z3, z4, z12, z34;

    assign z1 = (x ^ y) & x;
    assign z2 = (~x * ~y) | (x * y);
    assign z3 = (x ^ y) & x;
    assign z4 = (~x * ~y) | (x * y);

    or  U1 (z12, z1, z2);
    and U2 (z34, z3, z4);

    xor U3 (z, z12, z34);

endmodule
module top_module (input x, input y, output z);

    wire z1, z2, z3, z4, z12, z34;

    assign z1 = (x ^ y) & x;
    assign z2 = (~x * ~y) | (x * y);
    assign z3 = (x ^ y) & x;
    assign z4 = (~x * ~y) | (x * y);

    or  U1 (z12, z1, z2);
    and U2 (z34, z3, z4);

    xor U3 (z, z12, z34);

endmodule