data/full_repos/permissive/437632408/NVDLA/nvdla/csc/NV_NVDLA_csc_top.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/437632408/NVDLA/nvdla/csc/NV_NVDLA_csc_top.v:33: Multiple top level modules\n                                                                                             : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                             : ... Top module \'NV_NVDLA_csc_top\'\nmodule NV_NVDLA_csc_top (\n       ^~~~~~~~~~~~~~~~\n                                                                                             : ... Top module \'NV_NVDLA_csc\'\nmodule NV_NVDLA_csc (\n       ^~~~~~~~~~~~\n%Error: Exiting due to 1 warning(s)\n'
module NV_NVDLA_csc (
   accu2sc_credit_size
  ,accu2sc_credit_vld

  ,cdma2sc_dat_entries
  ,cdma2sc_dat_pending_ack
  ,cdma2sc_dat_slices
  ,cdma2sc_dat_updt

  ,cdma2sc_wmb_entries

  ,cdma2sc_wt_entries
  ,cdma2sc_wt_kernels
  ,cdma2sc_wt_pending_ack
  ,cdma2sc_wt_updt

  ,csb2csc_req_pd
  ,csb2csc_req_pvld

  ,dla_clk_ovr_on_sync
  ,global_clk_ovr_on_sync

  ,nvdla_core_clk
  ,nvdla_core_rstn

  ,pwrbus_ram_pd

  ,sc2buf_dat_rd_data
  ,sc2buf_dat_rd_valid
  ,sc2buf_wmb_rd_data
  ,sc2buf_wmb_rd_valid
  ,sc2buf_wt_rd_data
  ,sc2buf_wt_rd_valid
  
  ,tmc2slcg_disable_clock_gating
  ,csb2csc_req_prdy
  ,csc2csb_resp_pd
  ,csc2csb_resp_valid
  ,sc2buf_dat_rd_addr
  ,sc2buf_dat_rd_en
  ,sc2buf_wmb_rd_addr
  ,sc2buf_wmb_rd_en
  ,sc2buf_wt_rd_addr
  ,sc2buf_wt_rd_en
  ,sc2cdma_dat_entries
  ,sc2cdma_dat_pending_req
  ,sc2cdma_dat_slices
  ,sc2cdma_dat_updt
  ,sc2cdma_wmb_entries
  ,sc2cdma_wt_entries
  ,sc2cdma_wt_kernels
  ,sc2cdma_wt_pending_req
  ,sc2cdma_wt_updt

  
  ,sc2mac_dat_a_data0
  ,sc2mac_dat_a_data1
  ,sc2mac_dat_a_data10
  ,sc2mac_dat_a_data100
  ,sc2mac_dat_a_data101
  ,sc2mac_dat_a_data102
  ,sc2mac_dat_a_data103
  ,sc2mac_dat_a_data104
  ,sc2mac_dat_a_data105
  ,sc2mac_dat_a_data106
  ,sc2mac_dat_a_data107
  ,sc2mac_dat_a_data108
  ,sc2mac_dat_a_data109
  ,sc2mac_dat_a_data11
  ,sc2mac_dat_a_data110
  ,sc2mac_dat_a_data111
  ,sc2mac_dat_a_data112
  ,sc2mac_dat_a_data113
  ,sc2mac_dat_a_data114
  ,sc2mac_dat_a_data115
  ,sc2mac_dat_a_data116
  ,sc2mac_dat_a_data117
  ,sc2mac_dat_a_data118
  ,sc2mac_dat_a_data119
  ,sc2mac_dat_a_data12
  ,sc2mac_dat_a_data120
  ,sc2mac_dat_a_data121
  ,sc2mac_dat_a_data122
  ,sc2mac_dat_a_data123
  ,sc2mac_dat_a_data124
  ,sc2mac_dat_a_data125
  ,sc2mac_dat_a_data126
  ,sc2mac_dat_a_data127
  ,sc2mac_dat_a_data13
  ,sc2mac_dat_a_data14
  ,sc2mac_dat_a_data15
  ,sc2mac_dat_a_data16
  ,sc2mac_dat_a_data17
  ,sc2mac_dat_a_data18
  ,sc2mac_dat_a_data19
  ,sc2mac_dat_a_data2
  ,sc2mac_dat_a_data20
  ,sc2mac_dat_a_data21
  ,sc2mac_dat_a_data22
  ,sc2mac_dat_a_data23
  ,sc2mac_dat_a_data24
  ,sc2mac_dat_a_data25
  ,sc2mac_dat_a_data26
  ,sc2mac_dat_a_data27
  ,sc2mac_dat_a_data28
  ,sc2mac_dat_a_data29
  ,sc2mac_dat_a_data3
  ,sc2mac_dat_a_data30
  ,sc2mac_dat_a_data31
  ,sc2mac_dat_a_data32
  ,sc2mac_dat_a_data33
  ,sc2mac_dat_a_data34
  ,sc2mac_dat_a_data35
  ,sc2mac_dat_a_data36
  ,sc2mac_dat_a_data37
  ,sc2mac_dat_a_data38
  ,sc2mac_dat_a_data39
  ,sc2mac_dat_a_data4
  ,sc2mac_dat_a_data40
  ,sc2mac_dat_a_data41
  ,sc2mac_dat_a_data42
  ,sc2mac_dat_a_data43
  ,sc2mac_dat_a_data44
  ,sc2mac_dat_a_data45
  ,sc2mac_dat_a_data46
  ,sc2mac_dat_a_data47
  ,sc2mac_dat_a_data48
  ,sc2mac_dat_a_data49
  ,sc2mac_dat_a_data5
  ,sc2mac_dat_a_data50
  ,sc2mac_dat_a_data51
  ,sc2mac_dat_a_data52
  ,sc2mac_dat_a_data53
  ,sc2mac_dat_a_data54
  ,sc2mac_dat_a_data55
  ,sc2mac_dat_a_data56
  ,sc2mac_dat_a_data57
  ,sc2mac_dat_a_data58
  ,sc2mac_dat_a_data59
  ,sc2mac_dat_a_data6
  ,sc2mac_dat_a_data60
  ,sc2mac_dat_a_data61
  ,sc2mac_dat_a_data62
  ,sc2mac_dat_a_data63
  ,sc2mac_dat_a_data64
  ,sc2mac_dat_a_data65
  ,sc2mac_dat_a_data66
  ,sc2mac_dat_a_data67
  ,sc2mac_dat_a_data68
  ,sc2mac_dat_a_data69
  ,sc2mac_dat_a_data7
  ,sc2mac_dat_a_data70
  ,sc2mac_dat_a_data71
  ,sc2mac_dat_a_data72
  ,sc2mac_dat_a_data73
  ,sc2mac_dat_a_data74
  ,sc2mac_dat_a_data75
  ,sc2mac_dat_a_data76
  ,sc2mac_dat_a_data77
  ,sc2mac_dat_a_data78
  ,sc2mac_dat_a_data79
  ,sc2mac_dat_a_data8
  ,sc2mac_dat_a_data80
  ,sc2mac_dat_a_data81
  ,sc2mac_dat_a_data82
  ,sc2mac_dat_a_data83
  ,sc2mac_dat_a_data84
  ,sc2mac_dat_a_data85
  ,sc2mac_dat_a_data86
  ,sc2mac_dat_a_data87
  ,sc2mac_dat_a_data88
  ,sc2mac_dat_a_data89
  ,sc2mac_dat_a_data9
  ,sc2mac_dat_a_data90
  ,sc2mac_dat_a_data91
  ,sc2mac_dat_a_data92
  ,sc2mac_dat_a_data93
  ,sc2mac_dat_a_data94
  ,sc2mac_dat_a_data95
  ,sc2mac_dat_a_data96
  ,sc2mac_dat_a_data97
  ,sc2mac_dat_a_data98
  ,sc2mac_dat_a_data99
  ,sc2mac_dat_a_mask
  ,sc2mac_dat_a_pd
  ,sc2mac_dat_a_pvld
  ,sc2mac_dat_b_data0
  ,sc2mac_dat_b_data1
  ,sc2mac_dat_b_data10
  ,sc2mac_dat_b_data100
  ,sc2mac_dat_b_data101
  ,sc2mac_dat_b_data102
  ,sc2mac_dat_b_data103
  ,sc2mac_dat_b_data104
  ,sc2mac_dat_b_data105
  ,sc2mac_dat_b_data106
  ,sc2mac_dat_b_data107
  ,sc2mac_dat_b_data108
  ,sc2mac_dat_b_data109
  ,sc2mac_dat_b_data11
  ,sc2mac_dat_b_data110
  ,sc2mac_dat_b_data111
  ,sc2mac_dat_b_data112
  ,sc2mac_dat_b_data113
  ,sc2mac_dat_b_data114
  ,sc2mac_dat_b_data115
  ,sc2mac_dat_b_data116
  ,sc2mac_dat_b_data117
  ,sc2mac_dat_b_data118
  ,sc2mac_dat_b_data119
  ,sc2mac_dat_b_data12
  ,sc2mac_dat_b_data120
  ,sc2mac_dat_b_data121
  ,sc2mac_dat_b_data122
  ,sc2mac_dat_b_data123
  ,sc2mac_dat_b_data124
  ,sc2mac_dat_b_data125
  ,sc2mac_dat_b_data126
  ,sc2mac_dat_b_data127
  ,sc2mac_dat_b_data13
  ,sc2mac_dat_b_data14
  ,sc2mac_dat_b_data15
  ,sc2mac_dat_b_data16
  ,sc2mac_dat_b_data17
  ,sc2mac_dat_b_data18
  ,sc2mac_dat_b_data19
  ,sc2mac_dat_b_data2
  ,sc2mac_dat_b_data20
  ,sc2mac_dat_b_data21
  ,sc2mac_dat_b_data22
  ,sc2mac_dat_b_data23
  ,sc2mac_dat_b_data24
  ,sc2mac_dat_b_data25
  ,sc2mac_dat_b_data26
  ,sc2mac_dat_b_data27
  ,sc2mac_dat_b_data28
  ,sc2mac_dat_b_data29
  ,sc2mac_dat_b_data3
  ,sc2mac_dat_b_data30
  ,sc2mac_dat_b_data31
  ,sc2mac_dat_b_data32
  ,sc2mac_dat_b_data33
  ,sc2mac_dat_b_data34
  ,sc2mac_dat_b_data35
  ,sc2mac_dat_b_data36
  ,sc2mac_dat_b_data37
  ,sc2mac_dat_b_data38
  ,sc2mac_dat_b_data39
  ,sc2mac_dat_b_data4
  ,sc2mac_dat_b_data40
  ,sc2mac_dat_b_data41
  ,sc2mac_dat_b_data42
  ,sc2mac_dat_b_data43
  ,sc2mac_dat_b_data44
  ,sc2mac_dat_b_data45
  ,sc2mac_dat_b_data46
  ,sc2mac_dat_b_data47
  ,sc2mac_dat_b_data48
  ,sc2mac_dat_b_data49
  ,sc2mac_dat_b_data5
  ,sc2mac_dat_b_data50
  ,sc2mac_dat_b_data51
  ,sc2mac_dat_b_data52
  ,sc2mac_dat_b_data53
  ,sc2mac_dat_b_data54
  ,sc2mac_dat_b_data55
  ,sc2mac_dat_b_data56
  ,sc2mac_dat_b_data57
  ,sc2mac_dat_b_data58
  ,sc2mac_dat_b_data59
  ,sc2mac_dat_b_data6
  ,sc2mac_dat_b_data60
  ,sc2mac_dat_b_data61
  ,sc2mac_dat_b_data62
  ,sc2mac_dat_b_data63
  ,sc2mac_dat_b_data64
  ,sc2mac_dat_b_data65
  ,sc2mac_dat_b_data66
  ,sc2mac_dat_b_data67
  ,sc2mac_dat_b_data68
  ,sc2mac_dat_b_data69
  ,sc2mac_dat_b_data7
  ,sc2mac_dat_b_data70
  ,sc2mac_dat_b_data71
  ,sc2mac_dat_b_data72
  ,sc2mac_dat_b_data73
  ,sc2mac_dat_b_data74
  ,sc2mac_dat_b_data75
  ,sc2mac_dat_b_data76
  ,sc2mac_dat_b_data77
  ,sc2mac_dat_b_data78
  ,sc2mac_dat_b_data79
  ,sc2mac_dat_b_data8
  ,sc2mac_dat_b_data80
  ,sc2mac_dat_b_data81
  ,sc2mac_dat_b_data82
  ,sc2mac_dat_b_data83
  ,sc2mac_dat_b_data84
  ,sc2mac_dat_b_data85
  ,sc2mac_dat_b_data86
  ,sc2mac_dat_b_data87
  ,sc2mac_dat_b_data88
  ,sc2mac_dat_b_data89
  ,sc2mac_dat_b_data9
  ,sc2mac_dat_b_data90
  ,sc2mac_dat_b_data91
  ,sc2mac_dat_b_data92
  ,sc2mac_dat_b_data93
  ,sc2mac_dat_b_data94
  ,sc2mac_dat_b_data95
  ,sc2mac_dat_b_data96
  ,sc2mac_dat_b_data97
  ,sc2mac_dat_b_data98
  ,sc2mac_dat_b_data99
  ,sc2mac_dat_b_mask
  ,sc2mac_dat_b_pd
  ,sc2mac_dat_b_pvld
  ,sc2mac_wt_a_data0
  ,sc2mac_wt_a_data1
  ,sc2mac_wt_a_data10
  ,sc2mac_wt_a_data100
  ,sc2mac_wt_a_data101
  ,sc2mac_wt_a_data102
  ,sc2mac_wt_a_data103
  ,sc2mac_wt_a_data104
  ,sc2mac_wt_a_data105
  ,sc2mac_wt_a_data106
  ,sc2mac_wt_a_data107
  ,sc2mac_wt_a_data108
  ,sc2mac_wt_a_data109
  ,sc2mac_wt_a_data11
  ,sc2mac_wt_a_data110
  ,sc2mac_wt_a_data111
  ,sc2mac_wt_a_data112
  ,sc2mac_wt_a_data113
  ,sc2mac_wt_a_data114
  ,sc2mac_wt_a_data115
  ,sc2mac_wt_a_data116
  ,sc2mac_wt_a_data117
  ,sc2mac_wt_a_data118
  ,sc2mac_wt_a_data119
  ,sc2mac_wt_a_data12
  ,sc2mac_wt_a_data120
  ,sc2mac_wt_a_data121
  ,sc2mac_wt_a_data122
  ,sc2mac_wt_a_data123
  ,sc2mac_wt_a_data124
  ,sc2mac_wt_a_data125
  ,sc2mac_wt_a_data126
  ,sc2mac_wt_a_data127
  ,sc2mac_wt_a_data13
  ,sc2mac_wt_a_data14
  ,sc2mac_wt_a_data15
  ,sc2mac_wt_a_data16
  ,sc2mac_wt_a_data17
  ,sc2mac_wt_a_data18
  ,sc2mac_wt_a_data19
  ,sc2mac_wt_a_data2
  ,sc2mac_wt_a_data20
  ,sc2mac_wt_a_data21
  ,sc2mac_wt_a_data22
  ,sc2mac_wt_a_data23
  ,sc2mac_wt_a_data24
  ,sc2mac_wt_a_data25
  ,sc2mac_wt_a_data26
  ,sc2mac_wt_a_data27
  ,sc2mac_wt_a_data28
  ,sc2mac_wt_a_data29
  ,sc2mac_wt_a_data3
  ,sc2mac_wt_a_data30
  ,sc2mac_wt_a_data31
  ,sc2mac_wt_a_data32
  ,sc2mac_wt_a_data33
  ,sc2mac_wt_a_data34
  ,sc2mac_wt_a_data35
  ,sc2mac_wt_a_data36
  ,sc2mac_wt_a_data37
  ,sc2mac_wt_a_data38
  ,sc2mac_wt_a_data39
  ,sc2mac_wt_a_data4
  ,sc2mac_wt_a_data40
  ,sc2mac_wt_a_data41
  ,sc2mac_wt_a_data42
  ,sc2mac_wt_a_data43
  ,sc2mac_wt_a_data44
  ,sc2mac_wt_a_data45
  ,sc2mac_wt_a_data46
  ,sc2mac_wt_a_data47
  ,sc2mac_wt_a_data48
  ,sc2mac_wt_a_data49
  ,sc2mac_wt_a_data5
  ,sc2mac_wt_a_data50
  ,sc2mac_wt_a_data51
  ,sc2mac_wt_a_data52
  ,sc2mac_wt_a_data53
  ,sc2mac_wt_a_data54
  ,sc2mac_wt_a_data55
  ,sc2mac_wt_a_data56
  ,sc2mac_wt_a_data57
  ,sc2mac_wt_a_data58
  ,sc2mac_wt_a_data59
  ,sc2mac_wt_a_data6
  ,sc2mac_wt_a_data60
  ,sc2mac_wt_a_data61
  ,sc2mac_wt_a_data62
  ,sc2mac_wt_a_data63
  ,sc2mac_wt_a_data64
  ,sc2mac_wt_a_data65
  ,sc2mac_wt_a_data66
  ,sc2mac_wt_a_data67
  ,sc2mac_wt_a_data68
  ,sc2mac_wt_a_data69
  ,sc2mac_wt_a_data7
  ,sc2mac_wt_a_data70
  ,sc2mac_wt_a_data71
  ,sc2mac_wt_a_data72
  ,sc2mac_wt_a_data73
  ,sc2mac_wt_a_data74
  ,sc2mac_wt_a_data75
  ,sc2mac_wt_a_data76
  ,sc2mac_wt_a_data77
  ,sc2mac_wt_a_data78
  ,sc2mac_wt_a_data79
  ,sc2mac_wt_a_data8
  ,sc2mac_wt_a_data80
  ,sc2mac_wt_a_data81
  ,sc2mac_wt_a_data82
  ,sc2mac_wt_a_data83
  ,sc2mac_wt_a_data84
  ,sc2mac_wt_a_data85
  ,sc2mac_wt_a_data86
  ,sc2mac_wt_a_data87
  ,sc2mac_wt_a_data88
  ,sc2mac_wt_a_data89
  ,sc2mac_wt_a_data9
  ,sc2mac_wt_a_data90
  ,sc2mac_wt_a_data91
  ,sc2mac_wt_a_data92
  ,sc2mac_wt_a_data93
  ,sc2mac_wt_a_data94
  ,sc2mac_wt_a_data95
  ,sc2mac_wt_a_data96
  ,sc2mac_wt_a_data97
  ,sc2mac_wt_a_data98
  ,sc2mac_wt_a_data99
  ,sc2mac_wt_a_mask
  ,sc2mac_wt_a_pvld
  ,sc2mac_wt_a_sel
  ,sc2mac_wt_b_data0
  ,sc2mac_wt_b_data1
  ,sc2mac_wt_b_data10
  ,sc2mac_wt_b_data100
  ,sc2mac_wt_b_data101
  ,sc2mac_wt_b_data102
  ,sc2mac_wt_b_data103
  ,sc2mac_wt_b_data104
  ,sc2mac_wt_b_data105
  ,sc2mac_wt_b_data106
  ,sc2mac_wt_b_data107
  ,sc2mac_wt_b_data108
  ,sc2mac_wt_b_data109
  ,sc2mac_wt_b_data11
  ,sc2mac_wt_b_data110
  ,sc2mac_wt_b_data111
  ,sc2mac_wt_b_data112
  ,sc2mac_wt_b_data113
  ,sc2mac_wt_b_data114
  ,sc2mac_wt_b_data115
  ,sc2mac_wt_b_data116
  ,sc2mac_wt_b_data117
  ,sc2mac_wt_b_data118
  ,sc2mac_wt_b_data119
  ,sc2mac_wt_b_data12
  ,sc2mac_wt_b_data120
  ,sc2mac_wt_b_data121
  ,sc2mac_wt_b_data122
  ,sc2mac_wt_b_data123
  ,sc2mac_wt_b_data124
  ,sc2mac_wt_b_data125
  ,sc2mac_wt_b_data126
  ,sc2mac_wt_b_data127
  ,sc2mac_wt_b_data13
  ,sc2mac_wt_b_data14
  ,sc2mac_wt_b_data15
  ,sc2mac_wt_b_data16
  ,sc2mac_wt_b_data17
  ,sc2mac_wt_b_data18
  ,sc2mac_wt_b_data19
  ,sc2mac_wt_b_data2
  ,sc2mac_wt_b_data20
  ,sc2mac_wt_b_data21
  ,sc2mac_wt_b_data22
  ,sc2mac_wt_b_data23
  ,sc2mac_wt_b_data24
  ,sc2mac_wt_b_data25
  ,sc2mac_wt_b_data26
  ,sc2mac_wt_b_data27
  ,sc2mac_wt_b_data28
  ,sc2mac_wt_b_data29
  ,sc2mac_wt_b_data3
  ,sc2mac_wt_b_data30
  ,sc2mac_wt_b_data31
  ,sc2mac_wt_b_data32
  ,sc2mac_wt_b_data33
  ,sc2mac_wt_b_data34
  ,sc2mac_wt_b_data35
  ,sc2mac_wt_b_data36
  ,sc2mac_wt_b_data37
  ,sc2mac_wt_b_data38
  ,sc2mac_wt_b_data39
  ,sc2mac_wt_b_data4
  ,sc2mac_wt_b_data40
  ,sc2mac_wt_b_data41
  ,sc2mac_wt_b_data42
  ,sc2mac_wt_b_data43
  ,sc2mac_wt_b_data44
  ,sc2mac_wt_b_data45
  ,sc2mac_wt_b_data46
  ,sc2mac_wt_b_data47
  ,sc2mac_wt_b_data48
  ,sc2mac_wt_b_data49
  ,sc2mac_wt_b_data5
  ,sc2mac_wt_b_data50
  ,sc2mac_wt_b_data51
  ,sc2mac_wt_b_data52
  ,sc2mac_wt_b_data53
  ,sc2mac_wt_b_data54
  ,sc2mac_wt_b_data55
  ,sc2mac_wt_b_data56
  ,sc2mac_wt_b_data57
  ,sc2mac_wt_b_data58
  ,sc2mac_wt_b_data59
  ,sc2mac_wt_b_data6
  ,sc2mac_wt_b_data60
  ,sc2mac_wt_b_data61
  ,sc2mac_wt_b_data62
  ,sc2mac_wt_b_data63
  ,sc2mac_wt_b_data64
  ,sc2mac_wt_b_data65
  ,sc2mac_wt_b_data66
  ,sc2mac_wt_b_data67
  ,sc2mac_wt_b_data68
  ,sc2mac_wt_b_data69
  ,sc2mac_wt_b_data7
  ,sc2mac_wt_b_data70
  ,sc2mac_wt_b_data71
  ,sc2mac_wt_b_data72
  ,sc2mac_wt_b_data73
  ,sc2mac_wt_b_data74
  ,sc2mac_wt_b_data75
  ,sc2mac_wt_b_data76
  ,sc2mac_wt_b_data77
  ,sc2mac_wt_b_data78
  ,sc2mac_wt_b_data79
  ,sc2mac_wt_b_data8
  ,sc2mac_wt_b_data80
  ,sc2mac_wt_b_data81
  ,sc2mac_wt_b_data82
  ,sc2mac_wt_b_data83
  ,sc2mac_wt_b_data84
  ,sc2mac_wt_b_data85
  ,sc2mac_wt_b_data86
  ,sc2mac_wt_b_data87
  ,sc2mac_wt_b_data88
  ,sc2mac_wt_b_data89
  ,sc2mac_wt_b_data9
  ,sc2mac_wt_b_data90
  ,sc2mac_wt_b_data91
  ,sc2mac_wt_b_data92
  ,sc2mac_wt_b_data93
  ,sc2mac_wt_b_data94
  ,sc2mac_wt_b_data95
  ,sc2mac_wt_b_data96
  ,sc2mac_wt_b_data97
  ,sc2mac_wt_b_data98
  ,sc2mac_wt_b_data99
  ,sc2mac_wt_b_mask
  ,sc2mac_wt_b_pvld
  ,sc2mac_wt_b_sel
  );



input nvdla_core_clk;
input nvdla_core_rstn;
output sc2cdma_dat_pending_req;
output sc2cdma_wt_pending_req;
input accu2sc_credit_vld;
input [2:0] accu2sc_credit_size;
input cdma2sc_dat_pending_ack;
input cdma2sc_wt_pending_ack;
input csb2csc_req_pvld;
output csb2csc_req_prdy;
input [62:0] csb2csc_req_pd;
output csc2csb_resp_valid;
output [33:0] csc2csb_resp_pd;
input cdma2sc_dat_updt;
input [11:0] cdma2sc_dat_entries;
input [11:0] cdma2sc_dat_slices;
output sc2cdma_dat_updt;
output [11:0] sc2cdma_dat_entries;
output [11:0] sc2cdma_dat_slices;
input [31:0] pwrbus_ram_pd;
output sc2buf_dat_rd_en;
output [11:0] sc2buf_dat_rd_addr;
input sc2buf_dat_rd_valid;
input [1023:0] sc2buf_dat_rd_data;
output sc2buf_wmb_rd_en;
output [7:0] sc2buf_wmb_rd_addr;
input sc2buf_wmb_rd_valid;
input [1023:0] sc2buf_wmb_rd_data;
output sc2buf_wt_rd_en;
output [11:0] sc2buf_wt_rd_addr;
input sc2buf_wt_rd_valid;
input [1023:0] sc2buf_wt_rd_data;
output sc2mac_dat_a_pvld;
output [127:0] sc2mac_dat_a_mask;
output [7:0] sc2mac_dat_a_data0;
output [7:0] sc2mac_dat_a_data1;
output [7:0] sc2mac_dat_a_data2;
output [7:0] sc2mac_dat_a_data3;
output [7:0] sc2mac_dat_a_data4;
output [7:0] sc2mac_dat_a_data5;
output [7:0] sc2mac_dat_a_data6;
output [7:0] sc2mac_dat_a_data7;
output [7:0] sc2mac_dat_a_data8;
output [7:0] sc2mac_dat_a_data9;
output [7:0] sc2mac_dat_a_data10;
output [7:0] sc2mac_dat_a_data11;
output [7:0] sc2mac_dat_a_data12;
output [7:0] sc2mac_dat_a_data13;
output [7:0] sc2mac_dat_a_data14;
output [7:0] sc2mac_dat_a_data15;
output [7:0] sc2mac_dat_a_data16;
output [7:0] sc2mac_dat_a_data17;
output [7:0] sc2mac_dat_a_data18;
output [7:0] sc2mac_dat_a_data19;
output [7:0] sc2mac_dat_a_data20;
output [7:0] sc2mac_dat_a_data21;
output [7:0] sc2mac_dat_a_data22;
output [7:0] sc2mac_dat_a_data23;
output [7:0] sc2mac_dat_a_data24;
output [7:0] sc2mac_dat_a_data25;
output [7:0] sc2mac_dat_a_data26;
output [7:0] sc2mac_dat_a_data27;
output [7:0] sc2mac_dat_a_data28;
output [7:0] sc2mac_dat_a_data29;
output [7:0] sc2mac_dat_a_data30;
output [7:0] sc2mac_dat_a_data31;
output [7:0] sc2mac_dat_a_data32;
output [7:0] sc2mac_dat_a_data33;
output [7:0] sc2mac_dat_a_data34;
output [7:0] sc2mac_dat_a_data35;
output [7:0] sc2mac_dat_a_data36;
output [7:0] sc2mac_dat_a_data37;
output [7:0] sc2mac_dat_a_data38;
output [7:0] sc2mac_dat_a_data39;
output [7:0] sc2mac_dat_a_data40;
output [7:0] sc2mac_dat_a_data41;
output [7:0] sc2mac_dat_a_data42;
output [7:0] sc2mac_dat_a_data43;
output [7:0] sc2mac_dat_a_data44;
output [7:0] sc2mac_dat_a_data45;
output [7:0] sc2mac_dat_a_data46;
output [7:0] sc2mac_dat_a_data47;
output [7:0] sc2mac_dat_a_data48;
output [7:0] sc2mac_dat_a_data49;
output [7:0] sc2mac_dat_a_data50;
output [7:0] sc2mac_dat_a_data51;
output [7:0] sc2mac_dat_a_data52;
output [7:0] sc2mac_dat_a_data53;
output [7:0] sc2mac_dat_a_data54;
output [7:0] sc2mac_dat_a_data55;
output [7:0] sc2mac_dat_a_data56;
output [7:0] sc2mac_dat_a_data57;
output [7:0] sc2mac_dat_a_data58;
output [7:0] sc2mac_dat_a_data59;
output [7:0] sc2mac_dat_a_data60;
output [7:0] sc2mac_dat_a_data61;
output [7:0] sc2mac_dat_a_data62;
output [7:0] sc2mac_dat_a_data63;
output [7:0] sc2mac_dat_a_data64;
output [7:0] sc2mac_dat_a_data65;
output [7:0] sc2mac_dat_a_data66;
output [7:0] sc2mac_dat_a_data67;
output [7:0] sc2mac_dat_a_data68;
output [7:0] sc2mac_dat_a_data69;
output [7:0] sc2mac_dat_a_data70;
output [7:0] sc2mac_dat_a_data71;
output [7:0] sc2mac_dat_a_data72;
output [7:0] sc2mac_dat_a_data73;
output [7:0] sc2mac_dat_a_data74;
output [7:0] sc2mac_dat_a_data75;
output [7:0] sc2mac_dat_a_data76;
output [7:0] sc2mac_dat_a_data77;
output [7:0] sc2mac_dat_a_data78;
output [7:0] sc2mac_dat_a_data79;
output [7:0] sc2mac_dat_a_data80;
output [7:0] sc2mac_dat_a_data81;
output [7:0] sc2mac_dat_a_data82;
output [7:0] sc2mac_dat_a_data83;
output [7:0] sc2mac_dat_a_data84;
output [7:0] sc2mac_dat_a_data85;
output [7:0] sc2mac_dat_a_data86;
output [7:0] sc2mac_dat_a_data87;
output [7:0] sc2mac_dat_a_data88;
output [7:0] sc2mac_dat_a_data89;
output [7:0] sc2mac_dat_a_data90;
output [7:0] sc2mac_dat_a_data91;
output [7:0] sc2mac_dat_a_data92;
output [7:0] sc2mac_dat_a_data93;
output [7:0] sc2mac_dat_a_data94;
output [7:0] sc2mac_dat_a_data95;
output [7:0] sc2mac_dat_a_data96;
output [7:0] sc2mac_dat_a_data97;
output [7:0] sc2mac_dat_a_data98;
output [7:0] sc2mac_dat_a_data99;
output [7:0] sc2mac_dat_a_data100;
output [7:0] sc2mac_dat_a_data101;
output [7:0] sc2mac_dat_a_data102;
output [7:0] sc2mac_dat_a_data103;
output [7:0] sc2mac_dat_a_data104;
output [7:0] sc2mac_dat_a_data105;
output [7:0] sc2mac_dat_a_data106;
output [7:0] sc2mac_dat_a_data107;
output [7:0] sc2mac_dat_a_data108;
output [7:0] sc2mac_dat_a_data109;
output [7:0] sc2mac_dat_a_data110;
output [7:0] sc2mac_dat_a_data111;
output [7:0] sc2mac_dat_a_data112;
output [7:0] sc2mac_dat_a_data113;
output [7:0] sc2mac_dat_a_data114;
output [7:0] sc2mac_dat_a_data115;
output [7:0] sc2mac_dat_a_data116;
output [7:0] sc2mac_dat_a_data117;
output [7:0] sc2mac_dat_a_data118;
output [7:0] sc2mac_dat_a_data119;
output [7:0] sc2mac_dat_a_data120;
output [7:0] sc2mac_dat_a_data121;
output [7:0] sc2mac_dat_a_data122;
output [7:0] sc2mac_dat_a_data123;
output [7:0] sc2mac_dat_a_data124;
output [7:0] sc2mac_dat_a_data125;
output [7:0] sc2mac_dat_a_data126;
output [7:0] sc2mac_dat_a_data127;
output [8:0] sc2mac_dat_a_pd;
output sc2mac_dat_b_pvld;
output [127:0] sc2mac_dat_b_mask;
output [7:0] sc2mac_dat_b_data0;
output [7:0] sc2mac_dat_b_data1;
output [7:0] sc2mac_dat_b_data2;
output [7:0] sc2mac_dat_b_data3;
output [7:0] sc2mac_dat_b_data4;
output [7:0] sc2mac_dat_b_data5;
output [7:0] sc2mac_dat_b_data6;
output [7:0] sc2mac_dat_b_data7;
output [7:0] sc2mac_dat_b_data8;
output [7:0] sc2mac_dat_b_data9;
output [7:0] sc2mac_dat_b_data10;
output [7:0] sc2mac_dat_b_data11;
output [7:0] sc2mac_dat_b_data12;
output [7:0] sc2mac_dat_b_data13;
output [7:0] sc2mac_dat_b_data14;
output [7:0] sc2mac_dat_b_data15;
output [7:0] sc2mac_dat_b_data16;
output [7:0] sc2mac_dat_b_data17;
output [7:0] sc2mac_dat_b_data18;
output [7:0] sc2mac_dat_b_data19;
output [7:0] sc2mac_dat_b_data20;
output [7:0] sc2mac_dat_b_data21;
output [7:0] sc2mac_dat_b_data22;
output [7:0] sc2mac_dat_b_data23;
output [7:0] sc2mac_dat_b_data24;
output [7:0] sc2mac_dat_b_data25;
output [7:0] sc2mac_dat_b_data26;
output [7:0] sc2mac_dat_b_data27;
output [7:0] sc2mac_dat_b_data28;
output [7:0] sc2mac_dat_b_data29;
output [7:0] sc2mac_dat_b_data30;
output [7:0] sc2mac_dat_b_data31;
output [7:0] sc2mac_dat_b_data32;
output [7:0] sc2mac_dat_b_data33;
output [7:0] sc2mac_dat_b_data34;
output [7:0] sc2mac_dat_b_data35;
output [7:0] sc2mac_dat_b_data36;
output [7:0] sc2mac_dat_b_data37;
output [7:0] sc2mac_dat_b_data38;
output [7:0] sc2mac_dat_b_data39;
output [7:0] sc2mac_dat_b_data40;
output [7:0] sc2mac_dat_b_data41;
output [7:0] sc2mac_dat_b_data42;
output [7:0] sc2mac_dat_b_data43;
output [7:0] sc2mac_dat_b_data44;
output [7:0] sc2mac_dat_b_data45;
output [7:0] sc2mac_dat_b_data46;
output [7:0] sc2mac_dat_b_data47;
output [7:0] sc2mac_dat_b_data48;
output [7:0] sc2mac_dat_b_data49;
output [7:0] sc2mac_dat_b_data50;
output [7:0] sc2mac_dat_b_data51;
output [7:0] sc2mac_dat_b_data52;
output [7:0] sc2mac_dat_b_data53;
output [7:0] sc2mac_dat_b_data54;
output [7:0] sc2mac_dat_b_data55;
output [7:0] sc2mac_dat_b_data56;
output [7:0] sc2mac_dat_b_data57;
output [7:0] sc2mac_dat_b_data58;
output [7:0] sc2mac_dat_b_data59;
output [7:0] sc2mac_dat_b_data60;
output [7:0] sc2mac_dat_b_data61;
output [7:0] sc2mac_dat_b_data62;
output [7:0] sc2mac_dat_b_data63;
output [7:0] sc2mac_dat_b_data64;
output [7:0] sc2mac_dat_b_data65;
output [7:0] sc2mac_dat_b_data66;
output [7:0] sc2mac_dat_b_data67;
output [7:0] sc2mac_dat_b_data68;
output [7:0] sc2mac_dat_b_data69;
output [7:0] sc2mac_dat_b_data70;
output [7:0] sc2mac_dat_b_data71;
output [7:0] sc2mac_dat_b_data72;
output [7:0] sc2mac_dat_b_data73;
output [7:0] sc2mac_dat_b_data74;
output [7:0] sc2mac_dat_b_data75;
output [7:0] sc2mac_dat_b_data76;
output [7:0] sc2mac_dat_b_data77;
output [7:0] sc2mac_dat_b_data78;
output [7:0] sc2mac_dat_b_data79;
output [7:0] sc2mac_dat_b_data80;
output [7:0] sc2mac_dat_b_data81;
output [7:0] sc2mac_dat_b_data82;
output [7:0] sc2mac_dat_b_data83;
output [7:0] sc2mac_dat_b_data84;
output [7:0] sc2mac_dat_b_data85;
output [7:0] sc2mac_dat_b_data86;
output [7:0] sc2mac_dat_b_data87;
output [7:0] sc2mac_dat_b_data88;
output [7:0] sc2mac_dat_b_data89;
output [7:0] sc2mac_dat_b_data90;
output [7:0] sc2mac_dat_b_data91;
output [7:0] sc2mac_dat_b_data92;
output [7:0] sc2mac_dat_b_data93;
output [7:0] sc2mac_dat_b_data94;
output [7:0] sc2mac_dat_b_data95;
output [7:0] sc2mac_dat_b_data96;
output [7:0] sc2mac_dat_b_data97;
output [7:0] sc2mac_dat_b_data98;
output [7:0] sc2mac_dat_b_data99;
output [7:0] sc2mac_dat_b_data100;
output [7:0] sc2mac_dat_b_data101;
output [7:0] sc2mac_dat_b_data102;
output [7:0] sc2mac_dat_b_data103;
output [7:0] sc2mac_dat_b_data104;
output [7:0] sc2mac_dat_b_data105;
output [7:0] sc2mac_dat_b_data106;
output [7:0] sc2mac_dat_b_data107;
output [7:0] sc2mac_dat_b_data108;
output [7:0] sc2mac_dat_b_data109;
output [7:0] sc2mac_dat_b_data110;
output [7:0] sc2mac_dat_b_data111;
output [7:0] sc2mac_dat_b_data112;
output [7:0] sc2mac_dat_b_data113;
output [7:0] sc2mac_dat_b_data114;
output [7:0] sc2mac_dat_b_data115;
output [7:0] sc2mac_dat_b_data116;
output [7:0] sc2mac_dat_b_data117;
output [7:0] sc2mac_dat_b_data118;
output [7:0] sc2mac_dat_b_data119;
output [7:0] sc2mac_dat_b_data120;
output [7:0] sc2mac_dat_b_data121;
output [7:0] sc2mac_dat_b_data122;
output [7:0] sc2mac_dat_b_data123;
output [7:0] sc2mac_dat_b_data124;
output [7:0] sc2mac_dat_b_data125;
output [7:0] sc2mac_dat_b_data126;
output [7:0] sc2mac_dat_b_data127;
output [8:0] sc2mac_dat_b_pd;
output sc2mac_wt_a_pvld;
output [127:0] sc2mac_wt_a_mask;
output [7:0] sc2mac_wt_a_data0;
output [7:0] sc2mac_wt_a_data1;
output [7:0] sc2mac_wt_a_data2;
output [7:0] sc2mac_wt_a_data3;
output [7:0] sc2mac_wt_a_data4;
output [7:0] sc2mac_wt_a_data5;
output [7:0] sc2mac_wt_a_data6;
output [7:0] sc2mac_wt_a_data7;
output [7:0] sc2mac_wt_a_data8;
output [7:0] sc2mac_wt_a_data9;
output [7:0] sc2mac_wt_a_data10;
output [7:0] sc2mac_wt_a_data11;
output [7:0] sc2mac_wt_a_data12;
output [7:0] sc2mac_wt_a_data13;
output [7:0] sc2mac_wt_a_data14;
output [7:0] sc2mac_wt_a_data15;
output [7:0] sc2mac_wt_a_data16;
output [7:0] sc2mac_wt_a_data17;
output [7:0] sc2mac_wt_a_data18;
output [7:0] sc2mac_wt_a_data19;
output [7:0] sc2mac_wt_a_data20;
output [7:0] sc2mac_wt_a_data21;
output [7:0] sc2mac_wt_a_data22;
output [7:0] sc2mac_wt_a_data23;
output [7:0] sc2mac_wt_a_data24;
output [7:0] sc2mac_wt_a_data25;
output [7:0] sc2mac_wt_a_data26;
output [7:0] sc2mac_wt_a_data27;
output [7:0] sc2mac_wt_a_data28;
output [7:0] sc2mac_wt_a_data29;
output [7:0] sc2mac_wt_a_data30;
output [7:0] sc2mac_wt_a_data31;
output [7:0] sc2mac_wt_a_data32;
output [7:0] sc2mac_wt_a_data33;
output [7:0] sc2mac_wt_a_data34;
output [7:0] sc2mac_wt_a_data35;
output [7:0] sc2mac_wt_a_data36;
output [7:0] sc2mac_wt_a_data37;
output [7:0] sc2mac_wt_a_data38;
output [7:0] sc2mac_wt_a_data39;
output [7:0] sc2mac_wt_a_data40;
output [7:0] sc2mac_wt_a_data41;
output [7:0] sc2mac_wt_a_data42;
output [7:0] sc2mac_wt_a_data43;
output [7:0] sc2mac_wt_a_data44;
output [7:0] sc2mac_wt_a_data45;
output [7:0] sc2mac_wt_a_data46;
output [7:0] sc2mac_wt_a_data47;
output [7:0] sc2mac_wt_a_data48;
output [7:0] sc2mac_wt_a_data49;
output [7:0] sc2mac_wt_a_data50;
output [7:0] sc2mac_wt_a_data51;
output [7:0] sc2mac_wt_a_data52;
output [7:0] sc2mac_wt_a_data53;
output [7:0] sc2mac_wt_a_data54;
output [7:0] sc2mac_wt_a_data55;
output [7:0] sc2mac_wt_a_data56;
output [7:0] sc2mac_wt_a_data57;
output [7:0] sc2mac_wt_a_data58;
output [7:0] sc2mac_wt_a_data59;
output [7:0] sc2mac_wt_a_data60;
output [7:0] sc2mac_wt_a_data61;
output [7:0] sc2mac_wt_a_data62;
output [7:0] sc2mac_wt_a_data63;
output [7:0] sc2mac_wt_a_data64;
output [7:0] sc2mac_wt_a_data65;
output [7:0] sc2mac_wt_a_data66;
output [7:0] sc2mac_wt_a_data67;
output [7:0] sc2mac_wt_a_data68;
output [7:0] sc2mac_wt_a_data69;
output [7:0] sc2mac_wt_a_data70;
output [7:0] sc2mac_wt_a_data71;
output [7:0] sc2mac_wt_a_data72;
output [7:0] sc2mac_wt_a_data73;
output [7:0] sc2mac_wt_a_data74;
output [7:0] sc2mac_wt_a_data75;
output [7:0] sc2mac_wt_a_data76;
output [7:0] sc2mac_wt_a_data77;
output [7:0] sc2mac_wt_a_data78;
output [7:0] sc2mac_wt_a_data79;
output [7:0] sc2mac_wt_a_data80;
output [7:0] sc2mac_wt_a_data81;
output [7:0] sc2mac_wt_a_data82;
output [7:0] sc2mac_wt_a_data83;
output [7:0] sc2mac_wt_a_data84;
output [7:0] sc2mac_wt_a_data85;
output [7:0] sc2mac_wt_a_data86;
output [7:0] sc2mac_wt_a_data87;
output [7:0] sc2mac_wt_a_data88;
output [7:0] sc2mac_wt_a_data89;
output [7:0] sc2mac_wt_a_data90;
output [7:0] sc2mac_wt_a_data91;
output [7:0] sc2mac_wt_a_data92;
output [7:0] sc2mac_wt_a_data93;
output [7:0] sc2mac_wt_a_data94;
output [7:0] sc2mac_wt_a_data95;
output [7:0] sc2mac_wt_a_data96;
output [7:0] sc2mac_wt_a_data97;
output [7:0] sc2mac_wt_a_data98;
output [7:0] sc2mac_wt_a_data99;
output [7:0] sc2mac_wt_a_data100;
output [7:0] sc2mac_wt_a_data101;
output [7:0] sc2mac_wt_a_data102;
output [7:0] sc2mac_wt_a_data103;
output [7:0] sc2mac_wt_a_data104;
output [7:0] sc2mac_wt_a_data105;
output [7:0] sc2mac_wt_a_data106;
output [7:0] sc2mac_wt_a_data107;
output [7:0] sc2mac_wt_a_data108;
output [7:0] sc2mac_wt_a_data109;
output [7:0] sc2mac_wt_a_data110;
output [7:0] sc2mac_wt_a_data111;
output [7:0] sc2mac_wt_a_data112;
output [7:0] sc2mac_wt_a_data113;
output [7:0] sc2mac_wt_a_data114;
output [7:0] sc2mac_wt_a_data115;
output [7:0] sc2mac_wt_a_data116;
output [7:0] sc2mac_wt_a_data117;
output [7:0] sc2mac_wt_a_data118;
output [7:0] sc2mac_wt_a_data119;
output [7:0] sc2mac_wt_a_data120;
output [7:0] sc2mac_wt_a_data121;
output [7:0] sc2mac_wt_a_data122;
output [7:0] sc2mac_wt_a_data123;
output [7:0] sc2mac_wt_a_data124;
output [7:0] sc2mac_wt_a_data125;
output [7:0] sc2mac_wt_a_data126;
output [7:0] sc2mac_wt_a_data127;
output [7:0] sc2mac_wt_a_sel;
output sc2mac_wt_b_pvld;
output [127:0] sc2mac_wt_b_mask;
output [7:0] sc2mac_wt_b_data0;
output [7:0] sc2mac_wt_b_data1;
output [7:0] sc2mac_wt_b_data2;
output [7:0] sc2mac_wt_b_data3;
output [7:0] sc2mac_wt_b_data4;
output [7:0] sc2mac_wt_b_data5;
output [7:0] sc2mac_wt_b_data6;
output [7:0] sc2mac_wt_b_data7;
output [7:0] sc2mac_wt_b_data8;
output [7:0] sc2mac_wt_b_data9;
output [7:0] sc2mac_wt_b_data10;
output [7:0] sc2mac_wt_b_data11;
output [7:0] sc2mac_wt_b_data12;
output [7:0] sc2mac_wt_b_data13;
output [7:0] sc2mac_wt_b_data14;
output [7:0] sc2mac_wt_b_data15;
output [7:0] sc2mac_wt_b_data16;
output [7:0] sc2mac_wt_b_data17;
output [7:0] sc2mac_wt_b_data18;
output [7:0] sc2mac_wt_b_data19;
output [7:0] sc2mac_wt_b_data20;
output [7:0] sc2mac_wt_b_data21;
output [7:0] sc2mac_wt_b_data22;
output [7:0] sc2mac_wt_b_data23;
output [7:0] sc2mac_wt_b_data24;
output [7:0] sc2mac_wt_b_data25;
output [7:0] sc2mac_wt_b_data26;
output [7:0] sc2mac_wt_b_data27;
output [7:0] sc2mac_wt_b_data28;
output [7:0] sc2mac_wt_b_data29;
output [7:0] sc2mac_wt_b_data30;
output [7:0] sc2mac_wt_b_data31;
output [7:0] sc2mac_wt_b_data32;
output [7:0] sc2mac_wt_b_data33;
output [7:0] sc2mac_wt_b_data34;
output [7:0] sc2mac_wt_b_data35;
output [7:0] sc2mac_wt_b_data36;
output [7:0] sc2mac_wt_b_data37;
output [7:0] sc2mac_wt_b_data38;
output [7:0] sc2mac_wt_b_data39;
output [7:0] sc2mac_wt_b_data40;
output [7:0] sc2mac_wt_b_data41;
output [7:0] sc2mac_wt_b_data42;
output [7:0] sc2mac_wt_b_data43;
output [7:0] sc2mac_wt_b_data44;
output [7:0] sc2mac_wt_b_data45;
output [7:0] sc2mac_wt_b_data46;
output [7:0] sc2mac_wt_b_data47;
output [7:0] sc2mac_wt_b_data48;
output [7:0] sc2mac_wt_b_data49;
output [7:0] sc2mac_wt_b_data50;
output [7:0] sc2mac_wt_b_data51;
output [7:0] sc2mac_wt_b_data52;
output [7:0] sc2mac_wt_b_data53;
output [7:0] sc2mac_wt_b_data54;
output [7:0] sc2mac_wt_b_data55;
output [7:0] sc2mac_wt_b_data56;
output [7:0] sc2mac_wt_b_data57;
output [7:0] sc2mac_wt_b_data58;
output [7:0] sc2mac_wt_b_data59;
output [7:0] sc2mac_wt_b_data60;
output [7:0] sc2mac_wt_b_data61;
output [7:0] sc2mac_wt_b_data62;
output [7:0] sc2mac_wt_b_data63;
output [7:0] sc2mac_wt_b_data64;
output [7:0] sc2mac_wt_b_data65;
output [7:0] sc2mac_wt_b_data66;
output [7:0] sc2mac_wt_b_data67;
output [7:0] sc2mac_wt_b_data68;
output [7:0] sc2mac_wt_b_data69;
output [7:0] sc2mac_wt_b_data70;
output [7:0] sc2mac_wt_b_data71;
output [7:0] sc2mac_wt_b_data72;
output [7:0] sc2mac_wt_b_data73;
output [7:0] sc2mac_wt_b_data74;
output [7:0] sc2mac_wt_b_data75;
output [7:0] sc2mac_wt_b_data76;
output [7:0] sc2mac_wt_b_data77;
output [7:0] sc2mac_wt_b_data78;
output [7:0] sc2mac_wt_b_data79;
output [7:0] sc2mac_wt_b_data80;
output [7:0] sc2mac_wt_b_data81;
output [7:0] sc2mac_wt_b_data82;
output [7:0] sc2mac_wt_b_data83;
output [7:0] sc2mac_wt_b_data84;
output [7:0] sc2mac_wt_b_data85;
output [7:0] sc2mac_wt_b_data86;
output [7:0] sc2mac_wt_b_data87;
output [7:0] sc2mac_wt_b_data88;
output [7:0] sc2mac_wt_b_data89;
output [7:0] sc2mac_wt_b_data90;
output [7:0] sc2mac_wt_b_data91;
output [7:0] sc2mac_wt_b_data92;
output [7:0] sc2mac_wt_b_data93;
output [7:0] sc2mac_wt_b_data94;
output [7:0] sc2mac_wt_b_data95;
output [7:0] sc2mac_wt_b_data96;
output [7:0] sc2mac_wt_b_data97;
output [7:0] sc2mac_wt_b_data98;
output [7:0] sc2mac_wt_b_data99;
output [7:0] sc2mac_wt_b_data100;
output [7:0] sc2mac_wt_b_data101;
output [7:0] sc2mac_wt_b_data102;
output [7:0] sc2mac_wt_b_data103;
output [7:0] sc2mac_wt_b_data104;
output [7:0] sc2mac_wt_b_data105;
output [7:0] sc2mac_wt_b_data106;
output [7:0] sc2mac_wt_b_data107;
output [7:0] sc2mac_wt_b_data108;
output [7:0] sc2mac_wt_b_data109;
output [7:0] sc2mac_wt_b_data110;
output [7:0] sc2mac_wt_b_data111;
output [7:0] sc2mac_wt_b_data112;
output [7:0] sc2mac_wt_b_data113;
output [7:0] sc2mac_wt_b_data114;
output [7:0] sc2mac_wt_b_data115;
output [7:0] sc2mac_wt_b_data116;
output [7:0] sc2mac_wt_b_data117;
output [7:0] sc2mac_wt_b_data118;
output [7:0] sc2mac_wt_b_data119;
output [7:0] sc2mac_wt_b_data120;
output [7:0] sc2mac_wt_b_data121;
output [7:0] sc2mac_wt_b_data122;
output [7:0] sc2mac_wt_b_data123;
output [7:0] sc2mac_wt_b_data124;
output [7:0] sc2mac_wt_b_data125;
output [7:0] sc2mac_wt_b_data126;
output [7:0] sc2mac_wt_b_data127;
output [7:0] sc2mac_wt_b_sel;
input cdma2sc_wt_updt;
input [13:0] cdma2sc_wt_kernels;
input [11:0] cdma2sc_wt_entries;
input [8:0] cdma2sc_wmb_entries;
output sc2cdma_wt_updt;
output [13:0] sc2cdma_wt_kernels;
output [11:0] sc2cdma_wt_entries;
output [8:0] sc2cdma_wmb_entries;
input dla_clk_ovr_on_sync;
input global_clk_ovr_on_sync;
input tmc2slcg_disable_clock_gating;
wire dp2reg_done;
wire nvdla_op_gated_clk_0;
wire nvdla_op_gated_clk_1;
wire nvdla_op_gated_clk_2;
wire nvdla_wg_gated_clk;
wire [20:0] reg2dp_atomics;
wire [4:0] reg2dp_batches;
wire [0:0] reg2dp_conv_mode;
wire [2:0] reg2dp_conv_x_stride_ext;
wire [2:0] reg2dp_conv_y_stride_ext;
wire [31:0] reg2dp_cya;
wire [3:0] reg2dp_data_bank;
wire [0:0] reg2dp_data_reuse;
wire [12:0] reg2dp_datain_channel_ext;
wire [0:0] reg2dp_datain_format;
wire [12:0] reg2dp_datain_height_ext;
wire [12:0] reg2dp_datain_width_ext;
wire [12:0] reg2dp_dataout_channel;
wire [12:0] reg2dp_dataout_height;
wire [12:0] reg2dp_dataout_width;
wire [11:0] reg2dp_entries;
wire [1:0] reg2dp_in_precision;
wire [0:0] reg2dp_op_en;
wire [4:0] reg2dp_pad_left;
wire [4:0] reg2dp_pad_top;
wire [15:0] reg2dp_pad_value;
wire [1:0] reg2dp_pra_truncate;
wire [1:0] reg2dp_proc_precision;
wire [11:0] reg2dp_rls_slices;
wire [0:0] reg2dp_skip_data_rls;
wire [0:0] reg2dp_skip_weight_rls;
wire [3:0] reg2dp_weight_bank;
wire [24:0] reg2dp_weight_bytes;
wire [12:0] reg2dp_weight_channel_ext;
wire [0:0] reg2dp_weight_format;
wire [4:0] reg2dp_weight_height_ext;
wire [12:0] reg2dp_weight_kernel;
wire [0:0] reg2dp_weight_reuse;
wire [4:0] reg2dp_weight_width_ext;
wire [20:0] reg2dp_wmb_bytes;
wire [4:0] reg2dp_x_dilation_ext;
wire [4:0] reg2dp_y_dilation_ext;
wire [1:0] reg2dp_y_extension;
wire [1:0] sc_state;
wire [30:0] sg2dl_pd;
wire sg2dl_pvld;
wire sg2dl_reuse_rls;
wire [17:0] sg2wl_pd;
wire sg2wl_pvld;
wire sg2wl_reuse_rls;
wire [3:0] slcg_op_en;
wire slcg_wg_en;

endmodule
module NV_NVDLA_csc (
   accu2sc_credit_size
  ,accu2sc_credit_vld

  ,cdma2sc_dat_entries
  ,cdma2sc_dat_pending_ack
  ,cdma2sc_dat_slices
  ,cdma2sc_dat_updt

  ,cdma2sc_wmb_entries

  ,cdma2sc_wt_entries
  ,cdma2sc_wt_kernels
  ,cdma2sc_wt_pending_ack
  ,cdma2sc_wt_updt

  ,csb2csc_req_pd
  ,csb2csc_req_pvld

  ,dla_clk_ovr_on_sync
  ,global_clk_ovr_on_sync

  ,nvdla_core_clk
  ,nvdla_core_rstn

  ,pwrbus_ram_pd

  ,sc2buf_dat_rd_data
  ,sc2buf_dat_rd_valid
  ,sc2buf_wmb_rd_data
  ,sc2buf_wmb_rd_valid
  ,sc2buf_wt_rd_data
  ,sc2buf_wt_rd_valid
  
  ,tmc2slcg_disable_clock_gating
  ,csb2csc_req_prdy
  ,csc2csb_resp_pd
  ,csc2csb_resp_valid
  ,sc2buf_dat_rd_addr
  ,sc2buf_dat_rd_en
  ,sc2buf_wmb_rd_addr
  ,sc2buf_wmb_rd_en
  ,sc2buf_wt_rd_addr
  ,sc2buf_wt_rd_en
  ,sc2cdma_dat_entries
  ,sc2cdma_dat_pending_req
  ,sc2cdma_dat_slices
  ,sc2cdma_dat_updt
  ,sc2cdma_wmb_entries
  ,sc2cdma_wt_entries
  ,sc2cdma_wt_kernels
  ,sc2cdma_wt_pending_req
  ,sc2cdma_wt_updt

  
  ,sc2mac_dat_a_data0
  ,sc2mac_dat_a_data1
  ,sc2mac_dat_a_data10
  ,sc2mac_dat_a_data100
  ,sc2mac_dat_a_data101
  ,sc2mac_dat_a_data102
  ,sc2mac_dat_a_data103
  ,sc2mac_dat_a_data104
  ,sc2mac_dat_a_data105
  ,sc2mac_dat_a_data106
  ,sc2mac_dat_a_data107
  ,sc2mac_dat_a_data108
  ,sc2mac_dat_a_data109
  ,sc2mac_dat_a_data11
  ,sc2mac_dat_a_data110
  ,sc2mac_dat_a_data111
  ,sc2mac_dat_a_data112
  ,sc2mac_dat_a_data113
  ,sc2mac_dat_a_data114
  ,sc2mac_dat_a_data115
  ,sc2mac_dat_a_data116
  ,sc2mac_dat_a_data117
  ,sc2mac_dat_a_data118
  ,sc2mac_dat_a_data119
  ,sc2mac_dat_a_data12
  ,sc2mac_dat_a_data120
  ,sc2mac_dat_a_data121
  ,sc2mac_dat_a_data122
  ,sc2mac_dat_a_data123
  ,sc2mac_dat_a_data124
  ,sc2mac_dat_a_data125
  ,sc2mac_dat_a_data126
  ,sc2mac_dat_a_data127
  ,sc2mac_dat_a_data13
  ,sc2mac_dat_a_data14
  ,sc2mac_dat_a_data15
  ,sc2mac_dat_a_data16
  ,sc2mac_dat_a_data17
  ,sc2mac_dat_a_data18
  ,sc2mac_dat_a_data19
  ,sc2mac_dat_a_data2
  ,sc2mac_dat_a_data20
  ,sc2mac_dat_a_data21
  ,sc2mac_dat_a_data22
  ,sc2mac_dat_a_data23
  ,sc2mac_dat_a_data24
  ,sc2mac_dat_a_data25
  ,sc2mac_dat_a_data26
  ,sc2mac_dat_a_data27
  ,sc2mac_dat_a_data28
  ,sc2mac_dat_a_data29
  ,sc2mac_dat_a_data3
  ,sc2mac_dat_a_data30
  ,sc2mac_dat_a_data31
  ,sc2mac_dat_a_data32
  ,sc2mac_dat_a_data33
  ,sc2mac_dat_a_data34
  ,sc2mac_dat_a_data35
  ,sc2mac_dat_a_data36
  ,sc2mac_dat_a_data37
  ,sc2mac_dat_a_data38
  ,sc2mac_dat_a_data39
  ,sc2mac_dat_a_data4
  ,sc2mac_dat_a_data40
  ,sc2mac_dat_a_data41
  ,sc2mac_dat_a_data42
  ,sc2mac_dat_a_data43
  ,sc2mac_dat_a_data44
  ,sc2mac_dat_a_data45
  ,sc2mac_dat_a_data46
  ,sc2mac_dat_a_data47
  ,sc2mac_dat_a_data48
  ,sc2mac_dat_a_data49
  ,sc2mac_dat_a_data5
  ,sc2mac_dat_a_data50
  ,sc2mac_dat_a_data51
  ,sc2mac_dat_a_data52
  ,sc2mac_dat_a_data53
  ,sc2mac_dat_a_data54
  ,sc2mac_dat_a_data55
  ,sc2mac_dat_a_data56
  ,sc2mac_dat_a_data57
  ,sc2mac_dat_a_data58
  ,sc2mac_dat_a_data59
  ,sc2mac_dat_a_data6
  ,sc2mac_dat_a_data60
  ,sc2mac_dat_a_data61
  ,sc2mac_dat_a_data62
  ,sc2mac_dat_a_data63
  ,sc2mac_dat_a_data64
  ,sc2mac_dat_a_data65
  ,sc2mac_dat_a_data66
  ,sc2mac_dat_a_data67
  ,sc2mac_dat_a_data68
  ,sc2mac_dat_a_data69
  ,sc2mac_dat_a_data7
  ,sc2mac_dat_a_data70
  ,sc2mac_dat_a_data71
  ,sc2mac_dat_a_data72
  ,sc2mac_dat_a_data73
  ,sc2mac_dat_a_data74
  ,sc2mac_dat_a_data75
  ,sc2mac_dat_a_data76
  ,sc2mac_dat_a_data77
  ,sc2mac_dat_a_data78
  ,sc2mac_dat_a_data79
  ,sc2mac_dat_a_data8
  ,sc2mac_dat_a_data80
  ,sc2mac_dat_a_data81
  ,sc2mac_dat_a_data82
  ,sc2mac_dat_a_data83
  ,sc2mac_dat_a_data84
  ,sc2mac_dat_a_data85
  ,sc2mac_dat_a_data86
  ,sc2mac_dat_a_data87
  ,sc2mac_dat_a_data88
  ,sc2mac_dat_a_data89
  ,sc2mac_dat_a_data9
  ,sc2mac_dat_a_data90
  ,sc2mac_dat_a_data91
  ,sc2mac_dat_a_data92
  ,sc2mac_dat_a_data93
  ,sc2mac_dat_a_data94
  ,sc2mac_dat_a_data95
  ,sc2mac_dat_a_data96
  ,sc2mac_dat_a_data97
  ,sc2mac_dat_a_data98
  ,sc2mac_dat_a_data99
  ,sc2mac_dat_a_mask
  ,sc2mac_dat_a_pd
  ,sc2mac_dat_a_pvld
  ,sc2mac_dat_b_data0
  ,sc2mac_dat_b_data1
  ,sc2mac_dat_b_data10
  ,sc2mac_dat_b_data100
  ,sc2mac_dat_b_data101
  ,sc2mac_dat_b_data102
  ,sc2mac_dat_b_data103
  ,sc2mac_dat_b_data104
  ,sc2mac_dat_b_data105
  ,sc2mac_dat_b_data106
  ,sc2mac_dat_b_data107
  ,sc2mac_dat_b_data108
  ,sc2mac_dat_b_data109
  ,sc2mac_dat_b_data11
  ,sc2mac_dat_b_data110
  ,sc2mac_dat_b_data111
  ,sc2mac_dat_b_data112
  ,sc2mac_dat_b_data113
  ,sc2mac_dat_b_data114
  ,sc2mac_dat_b_data115
  ,sc2mac_dat_b_data116
  ,sc2mac_dat_b_data117
  ,sc2mac_dat_b_data118
  ,sc2mac_dat_b_data119
  ,sc2mac_dat_b_data12
  ,sc2mac_dat_b_data120
  ,sc2mac_dat_b_data121
  ,sc2mac_dat_b_data122
  ,sc2mac_dat_b_data123
  ,sc2mac_dat_b_data124
  ,sc2mac_dat_b_data125
  ,sc2mac_dat_b_data126
  ,sc2mac_dat_b_data127
  ,sc2mac_dat_b_data13
  ,sc2mac_dat_b_data14
  ,sc2mac_dat_b_data15
  ,sc2mac_dat_b_data16
  ,sc2mac_dat_b_data17
  ,sc2mac_dat_b_data18
  ,sc2mac_dat_b_data19
  ,sc2mac_dat_b_data2
  ,sc2mac_dat_b_data20
  ,sc2mac_dat_b_data21
  ,sc2mac_dat_b_data22
  ,sc2mac_dat_b_data23
  ,sc2mac_dat_b_data24
  ,sc2mac_dat_b_data25
  ,sc2mac_dat_b_data26
  ,sc2mac_dat_b_data27
  ,sc2mac_dat_b_data28
  ,sc2mac_dat_b_data29
  ,sc2mac_dat_b_data3
  ,sc2mac_dat_b_data30
  ,sc2mac_dat_b_data31
  ,sc2mac_dat_b_data32
  ,sc2mac_dat_b_data33
  ,sc2mac_dat_b_data34
  ,sc2mac_dat_b_data35
  ,sc2mac_dat_b_data36
  ,sc2mac_dat_b_data37
  ,sc2mac_dat_b_data38
  ,sc2mac_dat_b_data39
  ,sc2mac_dat_b_data4
  ,sc2mac_dat_b_data40
  ,sc2mac_dat_b_data41
  ,sc2mac_dat_b_data42
  ,sc2mac_dat_b_data43
  ,sc2mac_dat_b_data44
  ,sc2mac_dat_b_data45
  ,sc2mac_dat_b_data46
  ,sc2mac_dat_b_data47
  ,sc2mac_dat_b_data48
  ,sc2mac_dat_b_data49
  ,sc2mac_dat_b_data5
  ,sc2mac_dat_b_data50
  ,sc2mac_dat_b_data51
  ,sc2mac_dat_b_data52
  ,sc2mac_dat_b_data53
  ,sc2mac_dat_b_data54
  ,sc2mac_dat_b_data55
  ,sc2mac_dat_b_data56
  ,sc2mac_dat_b_data57
  ,sc2mac_dat_b_data58
  ,sc2mac_dat_b_data59
  ,sc2mac_dat_b_data6
  ,sc2mac_dat_b_data60
  ,sc2mac_dat_b_data61
  ,sc2mac_dat_b_data62
  ,sc2mac_dat_b_data63
  ,sc2mac_dat_b_data64
  ,sc2mac_dat_b_data65
  ,sc2mac_dat_b_data66
  ,sc2mac_dat_b_data67
  ,sc2mac_dat_b_data68
  ,sc2mac_dat_b_data69
  ,sc2mac_dat_b_data7
  ,sc2mac_dat_b_data70
  ,sc2mac_dat_b_data71
  ,sc2mac_dat_b_data72
  ,sc2mac_dat_b_data73
  ,sc2mac_dat_b_data74
  ,sc2mac_dat_b_data75
  ,sc2mac_dat_b_data76
  ,sc2mac_dat_b_data77
  ,sc2mac_dat_b_data78
  ,sc2mac_dat_b_data79
  ,sc2mac_dat_b_data8
  ,sc2mac_dat_b_data80
  ,sc2mac_dat_b_data81
  ,sc2mac_dat_b_data82
  ,sc2mac_dat_b_data83
  ,sc2mac_dat_b_data84
  ,sc2mac_dat_b_data85
  ,sc2mac_dat_b_data86
  ,sc2mac_dat_b_data87
  ,sc2mac_dat_b_data88
  ,sc2mac_dat_b_data89
  ,sc2mac_dat_b_data9
  ,sc2mac_dat_b_data90
  ,sc2mac_dat_b_data91
  ,sc2mac_dat_b_data92
  ,sc2mac_dat_b_data93
  ,sc2mac_dat_b_data94
  ,sc2mac_dat_b_data95
  ,sc2mac_dat_b_data96
  ,sc2mac_dat_b_data97
  ,sc2mac_dat_b_data98
  ,sc2mac_dat_b_data99
  ,sc2mac_dat_b_mask
  ,sc2mac_dat_b_pd
  ,sc2mac_dat_b_pvld
  ,sc2mac_wt_a_data0
  ,sc2mac_wt_a_data1
  ,sc2mac_wt_a_data10
  ,sc2mac_wt_a_data100
  ,sc2mac_wt_a_data101
  ,sc2mac_wt_a_data102
  ,sc2mac_wt_a_data103
  ,sc2mac_wt_a_data104
  ,sc2mac_wt_a_data105
  ,sc2mac_wt_a_data106
  ,sc2mac_wt_a_data107
  ,sc2mac_wt_a_data108
  ,sc2mac_wt_a_data109
  ,sc2mac_wt_a_data11
  ,sc2mac_wt_a_data110
  ,sc2mac_wt_a_data111
  ,sc2mac_wt_a_data112
  ,sc2mac_wt_a_data113
  ,sc2mac_wt_a_data114
  ,sc2mac_wt_a_data115
  ,sc2mac_wt_a_data116
  ,sc2mac_wt_a_data117
  ,sc2mac_wt_a_data118
  ,sc2mac_wt_a_data119
  ,sc2mac_wt_a_data12
  ,sc2mac_wt_a_data120
  ,sc2mac_wt_a_data121
  ,sc2mac_wt_a_data122
  ,sc2mac_wt_a_data123
  ,sc2mac_wt_a_data124
  ,sc2mac_wt_a_data125
  ,sc2mac_wt_a_data126
  ,sc2mac_wt_a_data127
  ,sc2mac_wt_a_data13
  ,sc2mac_wt_a_data14
  ,sc2mac_wt_a_data15
  ,sc2mac_wt_a_data16
  ,sc2mac_wt_a_data17
  ,sc2mac_wt_a_data18
  ,sc2mac_wt_a_data19
  ,sc2mac_wt_a_data2
  ,sc2mac_wt_a_data20
  ,sc2mac_wt_a_data21
  ,sc2mac_wt_a_data22
  ,sc2mac_wt_a_data23
  ,sc2mac_wt_a_data24
  ,sc2mac_wt_a_data25
  ,sc2mac_wt_a_data26
  ,sc2mac_wt_a_data27
  ,sc2mac_wt_a_data28
  ,sc2mac_wt_a_data29
  ,sc2mac_wt_a_data3
  ,sc2mac_wt_a_data30
  ,sc2mac_wt_a_data31
  ,sc2mac_wt_a_data32
  ,sc2mac_wt_a_data33
  ,sc2mac_wt_a_data34
  ,sc2mac_wt_a_data35
  ,sc2mac_wt_a_data36
  ,sc2mac_wt_a_data37
  ,sc2mac_wt_a_data38
  ,sc2mac_wt_a_data39
  ,sc2mac_wt_a_data4
  ,sc2mac_wt_a_data40
  ,sc2mac_wt_a_data41
  ,sc2mac_wt_a_data42
  ,sc2mac_wt_a_data43
  ,sc2mac_wt_a_data44
  ,sc2mac_wt_a_data45
  ,sc2mac_wt_a_data46
  ,sc2mac_wt_a_data47
  ,sc2mac_wt_a_data48
  ,sc2mac_wt_a_data49
  ,sc2mac_wt_a_data5
  ,sc2mac_wt_a_data50
  ,sc2mac_wt_a_data51
  ,sc2mac_wt_a_data52
  ,sc2mac_wt_a_data53
  ,sc2mac_wt_a_data54
  ,sc2mac_wt_a_data55
  ,sc2mac_wt_a_data56
  ,sc2mac_wt_a_data57
  ,sc2mac_wt_a_data58
  ,sc2mac_wt_a_data59
  ,sc2mac_wt_a_data6
  ,sc2mac_wt_a_data60
  ,sc2mac_wt_a_data61
  ,sc2mac_wt_a_data62
  ,sc2mac_wt_a_data63
  ,sc2mac_wt_a_data64
  ,sc2mac_wt_a_data65
  ,sc2mac_wt_a_data66
  ,sc2mac_wt_a_data67
  ,sc2mac_wt_a_data68
  ,sc2mac_wt_a_data69
  ,sc2mac_wt_a_data7
  ,sc2mac_wt_a_data70
  ,sc2mac_wt_a_data71
  ,sc2mac_wt_a_data72
  ,sc2mac_wt_a_data73
  ,sc2mac_wt_a_data74
  ,sc2mac_wt_a_data75
  ,sc2mac_wt_a_data76
  ,sc2mac_wt_a_data77
  ,sc2mac_wt_a_data78
  ,sc2mac_wt_a_data79
  ,sc2mac_wt_a_data8
  ,sc2mac_wt_a_data80
  ,sc2mac_wt_a_data81
  ,sc2mac_wt_a_data82
  ,sc2mac_wt_a_data83
  ,sc2mac_wt_a_data84
  ,sc2mac_wt_a_data85
  ,sc2mac_wt_a_data86
  ,sc2mac_wt_a_data87
  ,sc2mac_wt_a_data88
  ,sc2mac_wt_a_data89
  ,sc2mac_wt_a_data9
  ,sc2mac_wt_a_data90
  ,sc2mac_wt_a_data91
  ,sc2mac_wt_a_data92
  ,sc2mac_wt_a_data93
  ,sc2mac_wt_a_data94
  ,sc2mac_wt_a_data95
  ,sc2mac_wt_a_data96
  ,sc2mac_wt_a_data97
  ,sc2mac_wt_a_data98
  ,sc2mac_wt_a_data99
  ,sc2mac_wt_a_mask
  ,sc2mac_wt_a_pvld
  ,sc2mac_wt_a_sel
  ,sc2mac_wt_b_data0
  ,sc2mac_wt_b_data1
  ,sc2mac_wt_b_data10
  ,sc2mac_wt_b_data100
  ,sc2mac_wt_b_data101
  ,sc2mac_wt_b_data102
  ,sc2mac_wt_b_data103
  ,sc2mac_wt_b_data104
  ,sc2mac_wt_b_data105
  ,sc2mac_wt_b_data106
  ,sc2mac_wt_b_data107
  ,sc2mac_wt_b_data108
  ,sc2mac_wt_b_data109
  ,sc2mac_wt_b_data11
  ,sc2mac_wt_b_data110
  ,sc2mac_wt_b_data111
  ,sc2mac_wt_b_data112
  ,sc2mac_wt_b_data113
  ,sc2mac_wt_b_data114
  ,sc2mac_wt_b_data115
  ,sc2mac_wt_b_data116
  ,sc2mac_wt_b_data117
  ,sc2mac_wt_b_data118
  ,sc2mac_wt_b_data119
  ,sc2mac_wt_b_data12
  ,sc2mac_wt_b_data120
  ,sc2mac_wt_b_data121
  ,sc2mac_wt_b_data122
  ,sc2mac_wt_b_data123
  ,sc2mac_wt_b_data124
  ,sc2mac_wt_b_data125
  ,sc2mac_wt_b_data126
  ,sc2mac_wt_b_data127
  ,sc2mac_wt_b_data13
  ,sc2mac_wt_b_data14
  ,sc2mac_wt_b_data15
  ,sc2mac_wt_b_data16
  ,sc2mac_wt_b_data17
  ,sc2mac_wt_b_data18
  ,sc2mac_wt_b_data19
  ,sc2mac_wt_b_data2
  ,sc2mac_wt_b_data20
  ,sc2mac_wt_b_data21
  ,sc2mac_wt_b_data22
  ,sc2mac_wt_b_data23
  ,sc2mac_wt_b_data24
  ,sc2mac_wt_b_data25
  ,sc2mac_wt_b_data26
  ,sc2mac_wt_b_data27
  ,sc2mac_wt_b_data28
  ,sc2mac_wt_b_data29
  ,sc2mac_wt_b_data3
  ,sc2mac_wt_b_data30
  ,sc2mac_wt_b_data31
  ,sc2mac_wt_b_data32
  ,sc2mac_wt_b_data33
  ,sc2mac_wt_b_data34
  ,sc2mac_wt_b_data35
  ,sc2mac_wt_b_data36
  ,sc2mac_wt_b_data37
  ,sc2mac_wt_b_data38
  ,sc2mac_wt_b_data39
  ,sc2mac_wt_b_data4
  ,sc2mac_wt_b_data40
  ,sc2mac_wt_b_data41
  ,sc2mac_wt_b_data42
  ,sc2mac_wt_b_data43
  ,sc2mac_wt_b_data44
  ,sc2mac_wt_b_data45
  ,sc2mac_wt_b_data46
  ,sc2mac_wt_b_data47
  ,sc2mac_wt_b_data48
  ,sc2mac_wt_b_data49
  ,sc2mac_wt_b_data5
  ,sc2mac_wt_b_data50
  ,sc2mac_wt_b_data51
  ,sc2mac_wt_b_data52
  ,sc2mac_wt_b_data53
  ,sc2mac_wt_b_data54
  ,sc2mac_wt_b_data55
  ,sc2mac_wt_b_data56
  ,sc2mac_wt_b_data57
  ,sc2mac_wt_b_data58
  ,sc2mac_wt_b_data59
  ,sc2mac_wt_b_data6
  ,sc2mac_wt_b_data60
  ,sc2mac_wt_b_data61
  ,sc2mac_wt_b_data62
  ,sc2mac_wt_b_data63
  ,sc2mac_wt_b_data64
  ,sc2mac_wt_b_data65
  ,sc2mac_wt_b_data66
  ,sc2mac_wt_b_data67
  ,sc2mac_wt_b_data68
  ,sc2mac_wt_b_data69
  ,sc2mac_wt_b_data7
  ,sc2mac_wt_b_data70
  ,sc2mac_wt_b_data71
  ,sc2mac_wt_b_data72
  ,sc2mac_wt_b_data73
  ,sc2mac_wt_b_data74
  ,sc2mac_wt_b_data75
  ,sc2mac_wt_b_data76
  ,sc2mac_wt_b_data77
  ,sc2mac_wt_b_data78
  ,sc2mac_wt_b_data79
  ,sc2mac_wt_b_data8
  ,sc2mac_wt_b_data80
  ,sc2mac_wt_b_data81
  ,sc2mac_wt_b_data82
  ,sc2mac_wt_b_data83
  ,sc2mac_wt_b_data84
  ,sc2mac_wt_b_data85
  ,sc2mac_wt_b_data86
  ,sc2mac_wt_b_data87
  ,sc2mac_wt_b_data88
  ,sc2mac_wt_b_data89
  ,sc2mac_wt_b_data9
  ,sc2mac_wt_b_data90
  ,sc2mac_wt_b_data91
  ,sc2mac_wt_b_data92
  ,sc2mac_wt_b_data93
  ,sc2mac_wt_b_data94
  ,sc2mac_wt_b_data95
  ,sc2mac_wt_b_data96
  ,sc2mac_wt_b_data97
  ,sc2mac_wt_b_data98
  ,sc2mac_wt_b_data99
  ,sc2mac_wt_b_mask
  ,sc2mac_wt_b_pvld
  ,sc2mac_wt_b_sel
  );




input nvdla_core_clk;
input nvdla_core_rstn;
output sc2cdma_dat_pending_req;
output sc2cdma_wt_pending_req;
input accu2sc_credit_vld;
input [2:0] accu2sc_credit_size;
input cdma2sc_dat_pending_ack;
input cdma2sc_wt_pending_ack;
input csb2csc_req_pvld;
output csb2csc_req_prdy;
input [62:0] csb2csc_req_pd;
output csc2csb_resp_valid;
output [33:0] csc2csb_resp_pd;
input cdma2sc_dat_updt;
input [11:0] cdma2sc_dat_entries;
input [11:0] cdma2sc_dat_slices;
output sc2cdma_dat_updt;
output [11:0] sc2cdma_dat_entries;
output [11:0] sc2cdma_dat_slices;
input [31:0] pwrbus_ram_pd;
output sc2buf_dat_rd_en;
output [11:0] sc2buf_dat_rd_addr;
input sc2buf_dat_rd_valid;
input [1023:0] sc2buf_dat_rd_data;
output sc2buf_wmb_rd_en;
output [7:0] sc2buf_wmb_rd_addr;
input sc2buf_wmb_rd_valid;
input [1023:0] sc2buf_wmb_rd_data;
output sc2buf_wt_rd_en;
output [11:0] sc2buf_wt_rd_addr;
input sc2buf_wt_rd_valid;
input [1023:0] sc2buf_wt_rd_data;
output sc2mac_dat_a_pvld;
output [127:0] sc2mac_dat_a_mask;
output [7:0] sc2mac_dat_a_data0;
output [7:0] sc2mac_dat_a_data1;
output [7:0] sc2mac_dat_a_data2;
output [7:0] sc2mac_dat_a_data3;
output [7:0] sc2mac_dat_a_data4;
output [7:0] sc2mac_dat_a_data5;
output [7:0] sc2mac_dat_a_data6;
output [7:0] sc2mac_dat_a_data7;
output [7:0] sc2mac_dat_a_data8;
output [7:0] sc2mac_dat_a_data9;
output [7:0] sc2mac_dat_a_data10;
output [7:0] sc2mac_dat_a_data11;
output [7:0] sc2mac_dat_a_data12;
output [7:0] sc2mac_dat_a_data13;
output [7:0] sc2mac_dat_a_data14;
output [7:0] sc2mac_dat_a_data15;
output [7:0] sc2mac_dat_a_data16;
output [7:0] sc2mac_dat_a_data17;
output [7:0] sc2mac_dat_a_data18;
output [7:0] sc2mac_dat_a_data19;
output [7:0] sc2mac_dat_a_data20;
output [7:0] sc2mac_dat_a_data21;
output [7:0] sc2mac_dat_a_data22;
output [7:0] sc2mac_dat_a_data23;
output [7:0] sc2mac_dat_a_data24;
output [7:0] sc2mac_dat_a_data25;
output [7:0] sc2mac_dat_a_data26;
output [7:0] sc2mac_dat_a_data27;
output [7:0] sc2mac_dat_a_data28;
output [7:0] sc2mac_dat_a_data29;
output [7:0] sc2mac_dat_a_data30;
output [7:0] sc2mac_dat_a_data31;
output [7:0] sc2mac_dat_a_data32;
output [7:0] sc2mac_dat_a_data33;
output [7:0] sc2mac_dat_a_data34;
output [7:0] sc2mac_dat_a_data35;
output [7:0] sc2mac_dat_a_data36;
output [7:0] sc2mac_dat_a_data37;
output [7:0] sc2mac_dat_a_data38;
output [7:0] sc2mac_dat_a_data39;
output [7:0] sc2mac_dat_a_data40;
output [7:0] sc2mac_dat_a_data41;
output [7:0] sc2mac_dat_a_data42;
output [7:0] sc2mac_dat_a_data43;
output [7:0] sc2mac_dat_a_data44;
output [7:0] sc2mac_dat_a_data45;
output [7:0] sc2mac_dat_a_data46;
output [7:0] sc2mac_dat_a_data47;
output [7:0] sc2mac_dat_a_data48;
output [7:0] sc2mac_dat_a_data49;
output [7:0] sc2mac_dat_a_data50;
output [7:0] sc2mac_dat_a_data51;
output [7:0] sc2mac_dat_a_data52;
output [7:0] sc2mac_dat_a_data53;
output [7:0] sc2mac_dat_a_data54;
output [7:0] sc2mac_dat_a_data55;
output [7:0] sc2mac_dat_a_data56;
output [7:0] sc2mac_dat_a_data57;
output [7:0] sc2mac_dat_a_data58;
output [7:0] sc2mac_dat_a_data59;
output [7:0] sc2mac_dat_a_data60;
output [7:0] sc2mac_dat_a_data61;
output [7:0] sc2mac_dat_a_data62;
output [7:0] sc2mac_dat_a_data63;
output [7:0] sc2mac_dat_a_data64;
output [7:0] sc2mac_dat_a_data65;
output [7:0] sc2mac_dat_a_data66;
output [7:0] sc2mac_dat_a_data67;
output [7:0] sc2mac_dat_a_data68;
output [7:0] sc2mac_dat_a_data69;
output [7:0] sc2mac_dat_a_data70;
output [7:0] sc2mac_dat_a_data71;
output [7:0] sc2mac_dat_a_data72;
output [7:0] sc2mac_dat_a_data73;
output [7:0] sc2mac_dat_a_data74;
output [7:0] sc2mac_dat_a_data75;
output [7:0] sc2mac_dat_a_data76;
output [7:0] sc2mac_dat_a_data77;
output [7:0] sc2mac_dat_a_data78;
output [7:0] sc2mac_dat_a_data79;
output [7:0] sc2mac_dat_a_data80;
output [7:0] sc2mac_dat_a_data81;
output [7:0] sc2mac_dat_a_data82;
output [7:0] sc2mac_dat_a_data83;
output [7:0] sc2mac_dat_a_data84;
output [7:0] sc2mac_dat_a_data85;
output [7:0] sc2mac_dat_a_data86;
output [7:0] sc2mac_dat_a_data87;
output [7:0] sc2mac_dat_a_data88;
output [7:0] sc2mac_dat_a_data89;
output [7:0] sc2mac_dat_a_data90;
output [7:0] sc2mac_dat_a_data91;
output [7:0] sc2mac_dat_a_data92;
output [7:0] sc2mac_dat_a_data93;
output [7:0] sc2mac_dat_a_data94;
output [7:0] sc2mac_dat_a_data95;
output [7:0] sc2mac_dat_a_data96;
output [7:0] sc2mac_dat_a_data97;
output [7:0] sc2mac_dat_a_data98;
output [7:0] sc2mac_dat_a_data99;
output [7:0] sc2mac_dat_a_data100;
output [7:0] sc2mac_dat_a_data101;
output [7:0] sc2mac_dat_a_data102;
output [7:0] sc2mac_dat_a_data103;
output [7:0] sc2mac_dat_a_data104;
output [7:0] sc2mac_dat_a_data105;
output [7:0] sc2mac_dat_a_data106;
output [7:0] sc2mac_dat_a_data107;
output [7:0] sc2mac_dat_a_data108;
output [7:0] sc2mac_dat_a_data109;
output [7:0] sc2mac_dat_a_data110;
output [7:0] sc2mac_dat_a_data111;
output [7:0] sc2mac_dat_a_data112;
output [7:0] sc2mac_dat_a_data113;
output [7:0] sc2mac_dat_a_data114;
output [7:0] sc2mac_dat_a_data115;
output [7:0] sc2mac_dat_a_data116;
output [7:0] sc2mac_dat_a_data117;
output [7:0] sc2mac_dat_a_data118;
output [7:0] sc2mac_dat_a_data119;
output [7:0] sc2mac_dat_a_data120;
output [7:0] sc2mac_dat_a_data121;
output [7:0] sc2mac_dat_a_data122;
output [7:0] sc2mac_dat_a_data123;
output [7:0] sc2mac_dat_a_data124;
output [7:0] sc2mac_dat_a_data125;
output [7:0] sc2mac_dat_a_data126;
output [7:0] sc2mac_dat_a_data127;
output [8:0] sc2mac_dat_a_pd;
output sc2mac_dat_b_pvld;
output [127:0] sc2mac_dat_b_mask;
output [7:0] sc2mac_dat_b_data0;
output [7:0] sc2mac_dat_b_data1;
output [7:0] sc2mac_dat_b_data2;
output [7:0] sc2mac_dat_b_data3;
output [7:0] sc2mac_dat_b_data4;
output [7:0] sc2mac_dat_b_data5;
output [7:0] sc2mac_dat_b_data6;
output [7:0] sc2mac_dat_b_data7;
output [7:0] sc2mac_dat_b_data8;
output [7:0] sc2mac_dat_b_data9;
output [7:0] sc2mac_dat_b_data10;
output [7:0] sc2mac_dat_b_data11;
output [7:0] sc2mac_dat_b_data12;
output [7:0] sc2mac_dat_b_data13;
output [7:0] sc2mac_dat_b_data14;
output [7:0] sc2mac_dat_b_data15;
output [7:0] sc2mac_dat_b_data16;
output [7:0] sc2mac_dat_b_data17;
output [7:0] sc2mac_dat_b_data18;
output [7:0] sc2mac_dat_b_data19;
output [7:0] sc2mac_dat_b_data20;
output [7:0] sc2mac_dat_b_data21;
output [7:0] sc2mac_dat_b_data22;
output [7:0] sc2mac_dat_b_data23;
output [7:0] sc2mac_dat_b_data24;
output [7:0] sc2mac_dat_b_data25;
output [7:0] sc2mac_dat_b_data26;
output [7:0] sc2mac_dat_b_data27;
output [7:0] sc2mac_dat_b_data28;
output [7:0] sc2mac_dat_b_data29;
output [7:0] sc2mac_dat_b_data30;
output [7:0] sc2mac_dat_b_data31;
output [7:0] sc2mac_dat_b_data32;
output [7:0] sc2mac_dat_b_data33;
output [7:0] sc2mac_dat_b_data34;
output [7:0] sc2mac_dat_b_data35;
output [7:0] sc2mac_dat_b_data36;
output [7:0] sc2mac_dat_b_data37;
output [7:0] sc2mac_dat_b_data38;
output [7:0] sc2mac_dat_b_data39;
output [7:0] sc2mac_dat_b_data40;
output [7:0] sc2mac_dat_b_data41;
output [7:0] sc2mac_dat_b_data42;
output [7:0] sc2mac_dat_b_data43;
output [7:0] sc2mac_dat_b_data44;
output [7:0] sc2mac_dat_b_data45;
output [7:0] sc2mac_dat_b_data46;
output [7:0] sc2mac_dat_b_data47;
output [7:0] sc2mac_dat_b_data48;
output [7:0] sc2mac_dat_b_data49;
output [7:0] sc2mac_dat_b_data50;
output [7:0] sc2mac_dat_b_data51;
output [7:0] sc2mac_dat_b_data52;
output [7:0] sc2mac_dat_b_data53;
output [7:0] sc2mac_dat_b_data54;
output [7:0] sc2mac_dat_b_data55;
output [7:0] sc2mac_dat_b_data56;
output [7:0] sc2mac_dat_b_data57;
output [7:0] sc2mac_dat_b_data58;
output [7:0] sc2mac_dat_b_data59;
output [7:0] sc2mac_dat_b_data60;
output [7:0] sc2mac_dat_b_data61;
output [7:0] sc2mac_dat_b_data62;
output [7:0] sc2mac_dat_b_data63;
output [7:0] sc2mac_dat_b_data64;
output [7:0] sc2mac_dat_b_data65;
output [7:0] sc2mac_dat_b_data66;
output [7:0] sc2mac_dat_b_data67;
output [7:0] sc2mac_dat_b_data68;
output [7:0] sc2mac_dat_b_data69;
output [7:0] sc2mac_dat_b_data70;
output [7:0] sc2mac_dat_b_data71;
output [7:0] sc2mac_dat_b_data72;
output [7:0] sc2mac_dat_b_data73;
output [7:0] sc2mac_dat_b_data74;
output [7:0] sc2mac_dat_b_data75;
output [7:0] sc2mac_dat_b_data76;
output [7:0] sc2mac_dat_b_data77;
output [7:0] sc2mac_dat_b_data78;
output [7:0] sc2mac_dat_b_data79;
output [7:0] sc2mac_dat_b_data80;
output [7:0] sc2mac_dat_b_data81;
output [7:0] sc2mac_dat_b_data82;
output [7:0] sc2mac_dat_b_data83;
output [7:0] sc2mac_dat_b_data84;
output [7:0] sc2mac_dat_b_data85;
output [7:0] sc2mac_dat_b_data86;
output [7:0] sc2mac_dat_b_data87;
output [7:0] sc2mac_dat_b_data88;
output [7:0] sc2mac_dat_b_data89;
output [7:0] sc2mac_dat_b_data90;
output [7:0] sc2mac_dat_b_data91;
output [7:0] sc2mac_dat_b_data92;
output [7:0] sc2mac_dat_b_data93;
output [7:0] sc2mac_dat_b_data94;
output [7:0] sc2mac_dat_b_data95;
output [7:0] sc2mac_dat_b_data96;
output [7:0] sc2mac_dat_b_data97;
output [7:0] sc2mac_dat_b_data98;
output [7:0] sc2mac_dat_b_data99;
output [7:0] sc2mac_dat_b_data100;
output [7:0] sc2mac_dat_b_data101;
output [7:0] sc2mac_dat_b_data102;
output [7:0] sc2mac_dat_b_data103;
output [7:0] sc2mac_dat_b_data104;
output [7:0] sc2mac_dat_b_data105;
output [7:0] sc2mac_dat_b_data106;
output [7:0] sc2mac_dat_b_data107;
output [7:0] sc2mac_dat_b_data108;
output [7:0] sc2mac_dat_b_data109;
output [7:0] sc2mac_dat_b_data110;
output [7:0] sc2mac_dat_b_data111;
output [7:0] sc2mac_dat_b_data112;
output [7:0] sc2mac_dat_b_data113;
output [7:0] sc2mac_dat_b_data114;
output [7:0] sc2mac_dat_b_data115;
output [7:0] sc2mac_dat_b_data116;
output [7:0] sc2mac_dat_b_data117;
output [7:0] sc2mac_dat_b_data118;
output [7:0] sc2mac_dat_b_data119;
output [7:0] sc2mac_dat_b_data120;
output [7:0] sc2mac_dat_b_data121;
output [7:0] sc2mac_dat_b_data122;
output [7:0] sc2mac_dat_b_data123;
output [7:0] sc2mac_dat_b_data124;
output [7:0] sc2mac_dat_b_data125;
output [7:0] sc2mac_dat_b_data126;
output [7:0] sc2mac_dat_b_data127;
output [8:0] sc2mac_dat_b_pd;
output sc2mac_wt_a_pvld;
output [127:0] sc2mac_wt_a_mask;
output [7:0] sc2mac_wt_a_data0;
output [7:0] sc2mac_wt_a_data1;
output [7:0] sc2mac_wt_a_data2;
output [7:0] sc2mac_wt_a_data3;
output [7:0] sc2mac_wt_a_data4;
output [7:0] sc2mac_wt_a_data5;
output [7:0] sc2mac_wt_a_data6;
output [7:0] sc2mac_wt_a_data7;
output [7:0] sc2mac_wt_a_data8;
output [7:0] sc2mac_wt_a_data9;
output [7:0] sc2mac_wt_a_data10;
output [7:0] sc2mac_wt_a_data11;
output [7:0] sc2mac_wt_a_data12;
output [7:0] sc2mac_wt_a_data13;
output [7:0] sc2mac_wt_a_data14;
output [7:0] sc2mac_wt_a_data15;
output [7:0] sc2mac_wt_a_data16;
output [7:0] sc2mac_wt_a_data17;
output [7:0] sc2mac_wt_a_data18;
output [7:0] sc2mac_wt_a_data19;
output [7:0] sc2mac_wt_a_data20;
output [7:0] sc2mac_wt_a_data21;
output [7:0] sc2mac_wt_a_data22;
output [7:0] sc2mac_wt_a_data23;
output [7:0] sc2mac_wt_a_data24;
output [7:0] sc2mac_wt_a_data25;
output [7:0] sc2mac_wt_a_data26;
output [7:0] sc2mac_wt_a_data27;
output [7:0] sc2mac_wt_a_data28;
output [7:0] sc2mac_wt_a_data29;
output [7:0] sc2mac_wt_a_data30;
output [7:0] sc2mac_wt_a_data31;
output [7:0] sc2mac_wt_a_data32;
output [7:0] sc2mac_wt_a_data33;
output [7:0] sc2mac_wt_a_data34;
output [7:0] sc2mac_wt_a_data35;
output [7:0] sc2mac_wt_a_data36;
output [7:0] sc2mac_wt_a_data37;
output [7:0] sc2mac_wt_a_data38;
output [7:0] sc2mac_wt_a_data39;
output [7:0] sc2mac_wt_a_data40;
output [7:0] sc2mac_wt_a_data41;
output [7:0] sc2mac_wt_a_data42;
output [7:0] sc2mac_wt_a_data43;
output [7:0] sc2mac_wt_a_data44;
output [7:0] sc2mac_wt_a_data45;
output [7:0] sc2mac_wt_a_data46;
output [7:0] sc2mac_wt_a_data47;
output [7:0] sc2mac_wt_a_data48;
output [7:0] sc2mac_wt_a_data49;
output [7:0] sc2mac_wt_a_data50;
output [7:0] sc2mac_wt_a_data51;
output [7:0] sc2mac_wt_a_data52;
output [7:0] sc2mac_wt_a_data53;
output [7:0] sc2mac_wt_a_data54;
output [7:0] sc2mac_wt_a_data55;
output [7:0] sc2mac_wt_a_data56;
output [7:0] sc2mac_wt_a_data57;
output [7:0] sc2mac_wt_a_data58;
output [7:0] sc2mac_wt_a_data59;
output [7:0] sc2mac_wt_a_data60;
output [7:0] sc2mac_wt_a_data61;
output [7:0] sc2mac_wt_a_data62;
output [7:0] sc2mac_wt_a_data63;
output [7:0] sc2mac_wt_a_data64;
output [7:0] sc2mac_wt_a_data65;
output [7:0] sc2mac_wt_a_data66;
output [7:0] sc2mac_wt_a_data67;
output [7:0] sc2mac_wt_a_data68;
output [7:0] sc2mac_wt_a_data69;
output [7:0] sc2mac_wt_a_data70;
output [7:0] sc2mac_wt_a_data71;
output [7:0] sc2mac_wt_a_data72;
output [7:0] sc2mac_wt_a_data73;
output [7:0] sc2mac_wt_a_data74;
output [7:0] sc2mac_wt_a_data75;
output [7:0] sc2mac_wt_a_data76;
output [7:0] sc2mac_wt_a_data77;
output [7:0] sc2mac_wt_a_data78;
output [7:0] sc2mac_wt_a_data79;
output [7:0] sc2mac_wt_a_data80;
output [7:0] sc2mac_wt_a_data81;
output [7:0] sc2mac_wt_a_data82;
output [7:0] sc2mac_wt_a_data83;
output [7:0] sc2mac_wt_a_data84;
output [7:0] sc2mac_wt_a_data85;
output [7:0] sc2mac_wt_a_data86;
output [7:0] sc2mac_wt_a_data87;
output [7:0] sc2mac_wt_a_data88;
output [7:0] sc2mac_wt_a_data89;
output [7:0] sc2mac_wt_a_data90;
output [7:0] sc2mac_wt_a_data91;
output [7:0] sc2mac_wt_a_data92;
output [7:0] sc2mac_wt_a_data93;
output [7:0] sc2mac_wt_a_data94;
output [7:0] sc2mac_wt_a_data95;
output [7:0] sc2mac_wt_a_data96;
output [7:0] sc2mac_wt_a_data97;
output [7:0] sc2mac_wt_a_data98;
output [7:0] sc2mac_wt_a_data99;
output [7:0] sc2mac_wt_a_data100;
output [7:0] sc2mac_wt_a_data101;
output [7:0] sc2mac_wt_a_data102;
output [7:0] sc2mac_wt_a_data103;
output [7:0] sc2mac_wt_a_data104;
output [7:0] sc2mac_wt_a_data105;
output [7:0] sc2mac_wt_a_data106;
output [7:0] sc2mac_wt_a_data107;
output [7:0] sc2mac_wt_a_data108;
output [7:0] sc2mac_wt_a_data109;
output [7:0] sc2mac_wt_a_data110;
output [7:0] sc2mac_wt_a_data111;
output [7:0] sc2mac_wt_a_data112;
output [7:0] sc2mac_wt_a_data113;
output [7:0] sc2mac_wt_a_data114;
output [7:0] sc2mac_wt_a_data115;
output [7:0] sc2mac_wt_a_data116;
output [7:0] sc2mac_wt_a_data117;
output [7:0] sc2mac_wt_a_data118;
output [7:0] sc2mac_wt_a_data119;
output [7:0] sc2mac_wt_a_data120;
output [7:0] sc2mac_wt_a_data121;
output [7:0] sc2mac_wt_a_data122;
output [7:0] sc2mac_wt_a_data123;
output [7:0] sc2mac_wt_a_data124;
output [7:0] sc2mac_wt_a_data125;
output [7:0] sc2mac_wt_a_data126;
output [7:0] sc2mac_wt_a_data127;
output [7:0] sc2mac_wt_a_sel;
output sc2mac_wt_b_pvld;
output [127:0] sc2mac_wt_b_mask;
output [7:0] sc2mac_wt_b_data0;
output [7:0] sc2mac_wt_b_data1;
output [7:0] sc2mac_wt_b_data2;
output [7:0] sc2mac_wt_b_data3;
output [7:0] sc2mac_wt_b_data4;
output [7:0] sc2mac_wt_b_data5;
output [7:0] sc2mac_wt_b_data6;
output [7:0] sc2mac_wt_b_data7;
output [7:0] sc2mac_wt_b_data8;
output [7:0] sc2mac_wt_b_data9;
output [7:0] sc2mac_wt_b_data10;
output [7:0] sc2mac_wt_b_data11;
output [7:0] sc2mac_wt_b_data12;
output [7:0] sc2mac_wt_b_data13;
output [7:0] sc2mac_wt_b_data14;
output [7:0] sc2mac_wt_b_data15;
output [7:0] sc2mac_wt_b_data16;
output [7:0] sc2mac_wt_b_data17;
output [7:0] sc2mac_wt_b_data18;
output [7:0] sc2mac_wt_b_data19;
output [7:0] sc2mac_wt_b_data20;
output [7:0] sc2mac_wt_b_data21;
output [7:0] sc2mac_wt_b_data22;
output [7:0] sc2mac_wt_b_data23;
output [7:0] sc2mac_wt_b_data24;
output [7:0] sc2mac_wt_b_data25;
output [7:0] sc2mac_wt_b_data26;
output [7:0] sc2mac_wt_b_data27;
output [7:0] sc2mac_wt_b_data28;
output [7:0] sc2mac_wt_b_data29;
output [7:0] sc2mac_wt_b_data30;
output [7:0] sc2mac_wt_b_data31;
output [7:0] sc2mac_wt_b_data32;
output [7:0] sc2mac_wt_b_data33;
output [7:0] sc2mac_wt_b_data34;
output [7:0] sc2mac_wt_b_data35;
output [7:0] sc2mac_wt_b_data36;
output [7:0] sc2mac_wt_b_data37;
output [7:0] sc2mac_wt_b_data38;
output [7:0] sc2mac_wt_b_data39;
output [7:0] sc2mac_wt_b_data40;
output [7:0] sc2mac_wt_b_data41;
output [7:0] sc2mac_wt_b_data42;
output [7:0] sc2mac_wt_b_data43;
output [7:0] sc2mac_wt_b_data44;
output [7:0] sc2mac_wt_b_data45;
output [7:0] sc2mac_wt_b_data46;
output [7:0] sc2mac_wt_b_data47;
output [7:0] sc2mac_wt_b_data48;
output [7:0] sc2mac_wt_b_data49;
output [7:0] sc2mac_wt_b_data50;
output [7:0] sc2mac_wt_b_data51;
output [7:0] sc2mac_wt_b_data52;
output [7:0] sc2mac_wt_b_data53;
output [7:0] sc2mac_wt_b_data54;
output [7:0] sc2mac_wt_b_data55;
output [7:0] sc2mac_wt_b_data56;
output [7:0] sc2mac_wt_b_data57;
output [7:0] sc2mac_wt_b_data58;
output [7:0] sc2mac_wt_b_data59;
output [7:0] sc2mac_wt_b_data60;
output [7:0] sc2mac_wt_b_data61;
output [7:0] sc2mac_wt_b_data62;
output [7:0] sc2mac_wt_b_data63;
output [7:0] sc2mac_wt_b_data64;
output [7:0] sc2mac_wt_b_data65;
output [7:0] sc2mac_wt_b_data66;
output [7:0] sc2mac_wt_b_data67;
output [7:0] sc2mac_wt_b_data68;
output [7:0] sc2mac_wt_b_data69;
output [7:0] sc2mac_wt_b_data70;
output [7:0] sc2mac_wt_b_data71;
output [7:0] sc2mac_wt_b_data72;
output [7:0] sc2mac_wt_b_data73;
output [7:0] sc2mac_wt_b_data74;
output [7:0] sc2mac_wt_b_data75;
output [7:0] sc2mac_wt_b_data76;
output [7:0] sc2mac_wt_b_data77;
output [7:0] sc2mac_wt_b_data78;
output [7:0] sc2mac_wt_b_data79;
output [7:0] sc2mac_wt_b_data80;
output [7:0] sc2mac_wt_b_data81;
output [7:0] sc2mac_wt_b_data82;
output [7:0] sc2mac_wt_b_data83;
output [7:0] sc2mac_wt_b_data84;
output [7:0] sc2mac_wt_b_data85;
output [7:0] sc2mac_wt_b_data86;
output [7:0] sc2mac_wt_b_data87;
output [7:0] sc2mac_wt_b_data88;
output [7:0] sc2mac_wt_b_data89;
output [7:0] sc2mac_wt_b_data90;
output [7:0] sc2mac_wt_b_data91;
output [7:0] sc2mac_wt_b_data92;
output [7:0] sc2mac_wt_b_data93;
output [7:0] sc2mac_wt_b_data94;
output [7:0] sc2mac_wt_b_data95;
output [7:0] sc2mac_wt_b_data96;
output [7:0] sc2mac_wt_b_data97;
output [7:0] sc2mac_wt_b_data98;
output [7:0] sc2mac_wt_b_data99;
output [7:0] sc2mac_wt_b_data100;
output [7:0] sc2mac_wt_b_data101;
output [7:0] sc2mac_wt_b_data102;
output [7:0] sc2mac_wt_b_data103;
output [7:0] sc2mac_wt_b_data104;
output [7:0] sc2mac_wt_b_data105;
output [7:0] sc2mac_wt_b_data106;
output [7:0] sc2mac_wt_b_data107;
output [7:0] sc2mac_wt_b_data108;
output [7:0] sc2mac_wt_b_data109;
output [7:0] sc2mac_wt_b_data110;
output [7:0] sc2mac_wt_b_data111;
output [7:0] sc2mac_wt_b_data112;
output [7:0] sc2mac_wt_b_data113;
output [7:0] sc2mac_wt_b_data114;
output [7:0] sc2mac_wt_b_data115;
output [7:0] sc2mac_wt_b_data116;
output [7:0] sc2mac_wt_b_data117;
output [7:0] sc2mac_wt_b_data118;
output [7:0] sc2mac_wt_b_data119;
output [7:0] sc2mac_wt_b_data120;
output [7:0] sc2mac_wt_b_data121;
output [7:0] sc2mac_wt_b_data122;
output [7:0] sc2mac_wt_b_data123;
output [7:0] sc2mac_wt_b_data124;
output [7:0] sc2mac_wt_b_data125;
output [7:0] sc2mac_wt_b_data126;
output [7:0] sc2mac_wt_b_data127;
output [7:0] sc2mac_wt_b_sel;
input cdma2sc_wt_updt;
input [13:0] cdma2sc_wt_kernels;
input [11:0] cdma2sc_wt_entries;
input [8:0] cdma2sc_wmb_entries;
output sc2cdma_wt_updt;
output [13:0] sc2cdma_wt_kernels;
output [11:0] sc2cdma_wt_entries;
output [8:0] sc2cdma_wmb_entries;
input dla_clk_ovr_on_sync;
input global_clk_ovr_on_sync;
input tmc2slcg_disable_clock_gating;
wire dp2reg_done;
wire nvdla_op_gated_clk_0;
wire nvdla_op_gated_clk_1;
wire nvdla_op_gated_clk_2;
wire nvdla_wg_gated_clk;
wire [20:0] reg2dp_atomics;
wire [4:0] reg2dp_batches;
wire [0:0] reg2dp_conv_mode;
wire [2:0] reg2dp_conv_x_stride_ext;
wire [2:0] reg2dp_conv_y_stride_ext;
wire [31:0] reg2dp_cya;
wire [3:0] reg2dp_data_bank;
wire [0:0] reg2dp_data_reuse;
wire [12:0] reg2dp_datain_channel_ext;
wire [0:0] reg2dp_datain_format;
wire [12:0] reg2dp_datain_height_ext;
wire [12:0] reg2dp_datain_width_ext;
wire [12:0] reg2dp_dataout_channel;
wire [12:0] reg2dp_dataout_height;
wire [12:0] reg2dp_dataout_width;
wire [11:0] reg2dp_entries;
wire [1:0] reg2dp_in_precision;
wire [0:0] reg2dp_op_en;
wire [4:0] reg2dp_pad_left;
wire [4:0] reg2dp_pad_top;
wire [15:0] reg2dp_pad_value;
wire [1:0] reg2dp_pra_truncate;
wire [1:0] reg2dp_proc_precision;
wire [11:0] reg2dp_rls_slices;
wire [0:0] reg2dp_skip_data_rls;
wire [0:0] reg2dp_skip_weight_rls;
wire [3:0] reg2dp_weight_bank;
wire [24:0] reg2dp_weight_bytes;
wire [12:0] reg2dp_weight_channel_ext;
wire [0:0] reg2dp_weight_format;
wire [4:0] reg2dp_weight_height_ext;
wire [12:0] reg2dp_weight_kernel;
wire [0:0] reg2dp_weight_reuse;
wire [4:0] reg2dp_weight_width_ext;
wire [20:0] reg2dp_wmb_bytes;
wire [4:0] reg2dp_x_dilation_ext;
wire [4:0] reg2dp_y_dilation_ext;
wire [1:0] reg2dp_y_extension;
wire [1:0] sc_state;
wire [30:0] sg2dl_pd;
wire sg2dl_pvld;
wire sg2dl_reuse_rls;
wire [17:0] sg2wl_pd;
wire sg2wl_pvld;
wire sg2wl_reuse_rls;
wire [3:0] slcg_op_en;
wire slcg_wg_en;

endmodule