data/full_repos/permissive/468755927/verilog/rtl/step_motor_controller.v
1: b'%Warning-WIDTH: data/full_repos/permissive/468755927/verilog/rtl/step_motor_controller.v:345: Operator SUB expects 24 bits on the LHS, but LHS\'s VARREF \'cycles\' generates 16 bits.\n                                                                                            : ... In instance step_motor_controller.i_step_motor_controller_registers\n  assign next_cycles = cycles - 1\'b1;\n                              ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/468755927/verilog/rtl/step_motor_controller.v:372: Operator ASSIGNDLY expects 21 bits on the Assign RHS, but Assign RHS\'s CONST \'11\'h0\' generates 11 bits.\n                                                                                            : ... In instance step_motor_controller.i_step_motor_controller_registers\n            wbs_dat_o[28:8] <= 11\'b0;\n                            ^~\n%Warning-WIDTH: data/full_repos/permissive/468755927/verilog/rtl/step_motor_controller.v:432: Operator ASSIGNDLY expects 16 bits on the Assign RHS, but Assign RHS\'s VARREF \'next_cycles\' generates 24 bits.\n                                                                                            : ... In instance step_motor_controller.i_step_motor_controller_registers\n        cycles <= next_cycles;\n               ^~\n%Error: data/full_repos/permissive/468755927/verilog/rtl/step_motor_controller.v:60: Cannot find file containing module: \'prescaler\'\n  prescaler #(\n  ^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/468755927/verilog/rtl,data/full_repos/permissive/468755927/prescaler\n             data/full_repos/permissive/468755927/verilog/rtl,data/full_repos/permissive/468755927/prescaler.v\n             data/full_repos/permissive/468755927/verilog/rtl,data/full_repos/permissive/468755927/prescaler.sv\n             prescaler\n             prescaler.v\n             prescaler.sv\n             obj_dir/prescaler\n             obj_dir/prescaler.v\n             obj_dir/prescaler.sv\n%Error: Exiting due to 1 error(s), 3 warning(s)\n'
module step_motor_controller #(
  parameter PSIZE = 32         ,
  parameter DSIZE = 32
)(

  input  wire        rst_n     ,
  input  wire        clk       ,


  input  wire        wbs_cyc_i ,
  input  wire        wbs_stb_i ,
  input  wire [31:0] wbs_adr_i ,
  input  wire        wbs_we_i  ,
  input  wire [31:0] wbs_dat_i ,
  input  wire [3:0]  wbs_sel_i ,
  output wire [31:0] wbs_dat_o ,
  output wire        wbs_ack_o ,


  output wire        motor_a1  ,
  output wire        motor_a2  ,
  output wire        motor_b1  ,
  output wire        motor_b2

);

  wire             controller_en   ;
  wire [PSIZE-1:0] multiplier      ;
  wire [PSIZE-1:0] divider         ;
  wire             tick            ;
  wire [7:0]       duty_cycle      ;
  wire             start           ;
  wire             pwm             ;
  wire             ptype           ;
  wire             mode            ;
  wire             direction       ;
  wire [DSIZE-1:0] period          ;
  wire             run             ;
  wire             step_strobe     ;

  prescaler #(
    .BITS(PSIZE)
  ) i_prescaler (
    .rst_n      (rst_n         ),
    .clk        (clk           ),
    .clear_n    (controller_en ),
    .multiplier (multiplier    ),
    .divider    (divider       ),
    .tick       (tick          )
  );

  pwm_generator i_pwm_generator (
    .rst_n      (rst_n         ),
    .clk        (clk           ),
    .clear_n    (controller_en ),
    .duty_cycle (duty_cycle    ),
    .tick       (tick          ),
    .start      (start         ),
    .pwm        (pwm           )
  );

  motor_sequencer #(
    .DSIZE(DSIZE)
  )i_motor_sequencer (
    .rst_n      (rst_n         ),
    .clk        (clk           ),
    .clear_n    (controller_en ),
    .ptype      (ptype         ),
    .mode       (mode          ),
    .direction  (direction     ),
    .period     (period        ),
    .run        (run           ),
    .step_strobe(step_strobe   ),
    .start      (start         ),
    .pwm        (pwm           ),
    .motor_a1   (motor_a1      ),
    .motor_a2   (motor_a2      ),
    .motor_b1   (motor_b1      ),
    .motor_b2   (motor_b2      )
  );

  step_motor_controller_registers #(
    .PSIZE(PSIZE),
    .DSIZE(DSIZE)
  ) i_step_motor_controller_registers (
    .rst_n        (rst_n        ),
    .clk          (clk          ),
    .controller_en(controller_en),
    .multiplier   (multiplier   ),
    .divider      (divider      ),
    .duty_cycle   (duty_cycle   ),
    .ptype        (ptype        ),
    .mode         (mode         ),
    .direction    (direction    ),
    .period       (period       ),
    .run          (run          ),
    .step_strobe  (step_strobe  ),
    .wbs_cyc_i    (wbs_cyc_i    ),
    .wbs_stb_i    (wbs_stb_i    ),
    .wbs_adr_i    (wbs_adr_i    ),
    .wbs_we_i     (wbs_we_i     ),
    .wbs_dat_i    (wbs_dat_i    ),
    .wbs_sel_i    (wbs_sel_i    ),
    .wbs_dat_o    (wbs_dat_o    ),
    .wbs_ack_o    (wbs_ack_o    )
  );

endmodule
module step_motor_controller #(
  parameter PSIZE = 32         ,
  parameter DSIZE = 32
)(

  input  wire        rst_n     ,
  input  wire        clk       ,


  input  wire        wbs_cyc_i ,
  input  wire        wbs_stb_i ,
  input  wire [31:0] wbs_adr_i ,
  input  wire        wbs_we_i  ,
  input  wire [31:0] wbs_dat_i ,
  input  wire [3:0]  wbs_sel_i ,
  output wire [31:0] wbs_dat_o ,
  output wire        wbs_ack_o ,


  output wire        motor_a1  ,
  output wire        motor_a2  ,
  output wire        motor_b1  ,
  output wire        motor_b2

);


  wire             controller_en   ;
  wire [PSIZE-1:0] multiplier      ;
  wire [PSIZE-1:0] divider         ;
  wire             tick            ;
  wire [7:0]       duty_cycle      ;
  wire             start           ;
  wire             pwm             ;
  wire             ptype           ;
  wire             mode            ;
  wire             direction       ;
  wire [DSIZE-1:0] period          ;
  wire             run             ;
  wire             step_strobe     ;

  prescaler #(
    .BITS(PSIZE)
  ) i_prescaler (
    .rst_n      (rst_n         ),
    .clk        (clk           ),
    .clear_n    (controller_en ),
    .multiplier (multiplier    ),
    .divider    (divider       ),
    .tick       (tick          )
  );

  pwm_generator i_pwm_generator (
    .rst_n      (rst_n         ),
    .clk        (clk           ),
    .clear_n    (controller_en ),
    .duty_cycle (duty_cycle    ),
    .tick       (tick          ),
    .start      (start         ),
    .pwm        (pwm           )
  );

  motor_sequencer #(
    .DSIZE(DSIZE)
  )i_motor_sequencer (
    .rst_n      (rst_n         ),
    .clk        (clk           ),
    .clear_n    (controller_en ),
    .ptype      (ptype         ),
    .mode       (mode          ),
    .direction  (direction     ),
    .period     (period        ),
    .run        (run           ),
    .step_strobe(step_strobe   ),
    .start      (start         ),
    .pwm        (pwm           ),
    .motor_a1   (motor_a1      ),
    .motor_a2   (motor_a2      ),
    .motor_b1   (motor_b1      ),
    .motor_b2   (motor_b2      )
  );

  step_motor_controller_registers #(
    .PSIZE(PSIZE),
    .DSIZE(DSIZE)
  ) i_step_motor_controller_registers (
    .rst_n        (rst_n        ),
    .clk          (clk          ),
    .controller_en(controller_en),
    .multiplier   (multiplier   ),
    .divider      (divider      ),
    .duty_cycle   (duty_cycle   ),
    .ptype        (ptype        ),
    .mode         (mode         ),
    .direction    (direction    ),
    .period       (period       ),
    .run          (run          ),
    .step_strobe  (step_strobe  ),
    .wbs_cyc_i    (wbs_cyc_i    ),
    .wbs_stb_i    (wbs_stb_i    ),
    .wbs_adr_i    (wbs_adr_i    ),
    .wbs_we_i     (wbs_we_i     ),
    .wbs_dat_i    (wbs_dat_i    ),
    .wbs_sel_i    (wbs_sel_i    ),
    .wbs_dat_o    (wbs_dat_o    ),
    .wbs_ack_o    (wbs_ack_o    )
  );

endmodule