data/full_repos/permissive/433336136/cpu/Instruction_Memory.v
1: b'%Error: data/full_repos/permissive/433336136/cpu/Instruction_Memory.v:1: Cannot find include file: Parameter.v\n`include "Parameter.v" \n         ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/433336136/cpu,data/full_repos/permissive/433336136/Parameter.v\n             data/full_repos/permissive/433336136/cpu,data/full_repos/permissive/433336136/Parameter.v.v\n             data/full_repos/permissive/433336136/cpu,data/full_repos/permissive/433336136/Parameter.v.sv\n             Parameter.v\n             Parameter.v.v\n             Parameter.v.sv\n             obj_dir/Parameter.v\n             obj_dir/Parameter.v.v\n             obj_dir/Parameter.v.sv\n%Error: data/full_repos/permissive/433336136/cpu/Instruction_Memory.v:11: Define or directive not defined: \'`col\'\n reg [`col - 1:0] memory [`row_i - 1:0];\n      ^~~~\n%Error: data/full_repos/permissive/433336136/cpu/Instruction_Memory.v:11: Define or directive not defined: \'`row_i\'\n reg [`col - 1:0] memory [`row_i - 1:0];\n                          ^~~~~~\n%Error: Exiting due to 3 error(s)\n'
module Instruction_Memory (
 input[15:0] pc,
 output[15:0] instruction
);

 reg [`col - 1:0] memory [`row_i - 1:0];
 wire [3 : 0] rom_addr = pc[4 : 1];
 initial
 begin

 memory [0] = 16'b0100010001000010;
 memory [1] = 16'b0100010011000001;
 memory [2] = 16'b0100010100000011;
 memory [3] = 16'b0100010101000100;
 memory [4] = 16'b0000000000000000;
 memory [5] = 16'b1000001011001000;
 memory [6] = 16'b1010001011011000;
 memory [7] = 16'b1010000100000000;
 memory [8] = 16'b1110000101111100;
 memory [9] = 16'b0010001000000000;
 end
 assign instruction =  memory[rom_addr]; 

endmodule
module Instruction_Memory (
 input[15:0] pc,
 output[15:0] instruction
);


 reg [`col - 1:0] memory [`row_i - 1:0];
 wire [3 : 0] rom_addr = pc[4 : 1];
 initial
 begin

 memory [0] = 16'b0100010001000010;
 memory [1] = 16'b0100010011000001;
 memory [2] = 16'b0100010100000011;
 memory [3] = 16'b0100010101000100;
 memory [4] = 16'b0000000000000000;
 memory [5] = 16'b1000001011001000;
 memory [6] = 16'b1010001011011000;
 memory [7] = 16'b1010000100000000;
 memory [8] = 16'b1110000101111100;
 memory [9] = 16'b0010001000000000;
 end
 assign instruction =  memory[rom_addr]; 

endmodule