data/full_repos/permissive/517427004/CA1 - Linear Regression/Verilog/Multiplier.v
1: b'%Error: Invalid Option: -\n'
module Multiplier(a, b, out);
    parameter N = 32;

    input signed [N-1:0] a, b;
    output signed [2*N-1:0] out;

    assign out = a * b;
endmodule
module Multiplier(a, b, out);

    parameter N = 32;

    input signed [N-1:0] a, b;
    output signed [2*N-1:0] out;

    assign out = a * b;
endmodule