data/full_repos/permissive/42434302/ivltests/event3.v
1: b'%Error: data/full_repos/permissive/42434302/ivltests/event3.v:8: Unsupported: event data types\nevent e1;\n^~~~~\n%Error: data/full_repos/permissive/42434302/ivltests/event3.v:12: Unsupported or unknown PLI call: $monitor\n $monitor ("T=", $time, ", a=", a, ", b=", b, ", x=",\n ^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/event3.v:14: Unsupported: Ignoring delay on this delayed statement.\n #200\n ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/event3.v:21: Unsupported: Ignoring delay on this delayed statement.\n #10\n ^\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/event3.v:23: Unsupported: Ignoring delay on this delayed statement.\n #10\n ^\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/event3.v:25: Unsupported: Ignoring delay on this delayed statement.\n #10\n ^\n%Error: data/full_repos/permissive/42434302/ivltests/event3.v:27: syntax error, unexpected ->\n -> et1.m1.e2;\n ^~\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/event3.v:28: Unsupported: Ignoring delay on this delayed statement.\n #10\n ^\n%Error: data/full_repos/permissive/42434302/ivltests/event3.v:30: syntax error, unexpected ->\n -> et1.m1.e2;\n ^~\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/event3.v:31: Unsupported: Ignoring delay on this delayed statement.\n #10\n ^\n%Error: data/full_repos/permissive/42434302/ivltests/event3.v:33: syntax error, unexpected ->\n -> et1.m1.e2;\n ^~\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/event3.v:35: Unsupported: Ignoring delay on this delayed statement.\n #10\n ^\n%Error: data/full_repos/permissive/42434302/ivltests/event3.v:53: Unsupported: event data types\nevent e2;\n^~~~~\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/event3.v:56: Unsupported: Ignoring delay on this delayed statement.\n #1\n ^\n%Error: data/full_repos/permissive/42434302/ivltests/event3.v:59: syntax error, unexpected ->\n -> et1.e1;\n ^~\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/event3.v:58: Unsupported: Ignoring delay on this delayed statement.\n #2\n ^\n%Error: Exiting due to 7 error(s), 9 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module m (a,x);
input [31:0] a;
output [31:0] x;
reg    [31:0] x;

event e2;

always @e2 begin
	#1
	x <= a;
	#2
	-> et1.e1;
end
endmodule
module m (a,x);

input [31:0] a;
output [31:0] x;
reg    [31:0] x;

event e2;

always @e2 begin
	#1
	x <= a;
	#2
	-> et1.e1;
end
endmodule