data/full_repos/permissive/443520440/code/seg7_driver.v
1: b'%Warning-PINMISSING: data/full_repos/permissive/443520440/code/seg7_driver.v:65: Cell has missing pin: \'rst\'\n    Divider display_div(.I_CLK(clk), .O_CLK(display_clk));\n            ^~~~~~~~~~~\n                     ... Use "/* verilator lint_off PINMISSING */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module Divider(
    input 			I_CLK	,
    input 			rst		,
    output reg 		O_CLK
);
    parameter base = 20000;
    integer cnt;
    initial begin cnt <=  0; O_CLK <= 0; end
    always @(posedge I_CLK) begin
        if(rst == 1) begin cnt <= 0; O_CLK <= 0; end
        else begin 
            cnt <= cnt + 1;
            if(cnt == base / 2 - 1) begin O_CLK <= ~O_CLK; cnt <= 0; end
        end
    end 
endmodule
module Divider(
    input 			I_CLK	,
    input 			rst		,
    output reg 		O_CLK
);

    parameter base = 20000;
    integer cnt;
    initial begin cnt <=  0; O_CLK <= 0; end
    always @(posedge I_CLK) begin
        if(rst == 1) begin cnt <= 0; O_CLK <= 0; end
        else begin 
            cnt <= cnt + 1;
            if(cnt == base / 2 - 1) begin O_CLK <= ~O_CLK; cnt <= 0; end
        end
    end 
endmodule