data/full_repos/permissive/502764644/mpeg_audio_video/MP2_Decode/Const_ROM_Sample_RAM.v
1: b'%Error: data/full_repos/permissive/502764644/mpeg_audio_video/MP2_Decode/Const_ROM_Sample_RAM.v:17: Cannot find include file: defines.v\n`include "defines.v" \n         ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/502764644/mpeg_audio_video/MP2_Decode,data/full_repos/permissive/502764644/defines.v\n             data/full_repos/permissive/502764644/mpeg_audio_video/MP2_Decode,data/full_repos/permissive/502764644/defines.v.v\n             data/full_repos/permissive/502764644/mpeg_audio_video/MP2_Decode,data/full_repos/permissive/502764644/defines.v.sv\n             defines.v\n             defines.v.v\n             defines.v.sv\n             obj_dir/defines.v\n             obj_dir/defines.v.v\n             obj_dir/defines.v.sv\n%Error: Exiting due to 1 error(s)\n'
module Const_ROM_Sample_RAM(
   clock,

   ROM_Enable_I,
   ROM_Address_I,
   ROM_Data_O,

	RAM_Address_I,
	RAM_Data_O,
	RAM_Wen_I,
	RAM_Data_I
);

input 				clock;

input					ROM_Enable_I;
input 	[9:0]		ROM_Address_I;
output 	[15:0]	ROM_Data_O;

input 	[9:0]		RAM_Address_I;
output 	[15:0]	RAM_Data_O;
input 				RAM_Wen_I;
input 	[15:0]	RAM_Data_I;

RAMB16_S18_S18 ROM_RAM_BRAM (
   .DOA(ROM_Data_O),
   .DOB(RAM_Data_O),
   .DOPA(),
   .DOPB(),
   .ADDRA(ROM_Address_I),
   .ADDRB(RAM_Address_I),
   .CLKA(clock),
   .CLKB(clock),
   .DIA(16'h0000),
   .DIB(RAM_Data_I),
   .DIPA(2'b00),
   .DIPB(2'b00),
   .ENA(ROM_Enable_I),
   .ENB(1'b1),
   .SSRA(1'b0),
   .SSRB(1'b0),
   .WEA(1'b0),
   .WEB(RAM_Wen_I)
);






































                                                                                                                     











defparam ROM_RAM_BRAM.WRITE_MODE_B = "READ_FIRST";

defparam ROM_RAM_BRAM.INIT_00 = 256'hffff000000000000000000000000000000000000000000000000000000004947;
defparam ROM_RAM_BRAM.INIT_01 = 256'hfffafffafffbfffcfffcfffcfffdfffdfffefffefffeffffffffffffffffffff;
defparam ROM_RAM_BRAM.INIT_02 = 256'hffe8ffeaffebffedffeeffeffff1fff2fff3fff4fff5fff6fff7fff8fff9fff9;
defparam ROM_RAM_BRAM.INIT_03 = 256'hffcdffceffcfffd1ffd3ffd4ffd6ffd8ffdaffdcffdeffe0ffe1ffe3ffe5ffe7;
defparam ROM_RAM_BRAM.INIT_04 = 256'h0028002c002f0032003300350037003800380039003900380038003700360035;
defparam ROM_RAM_BRAM.INIT_05 = 256'hff9cffaaffb7ffc3ffcfffdaffe5ffeefff800000007000e0014001a001f0024;
defparam ROM_RAM_BRAM.INIT_06 = 256'hfe8afe9bfeadfec0fed2fee4fef6ff09ff1bff2dff3eff4fff5fff6fff7fff8e;
defparam ROM_RAM_BRAM.INIT_07 = 256'hfdfdfdf9fdf7fdf7fdfafdfefe05fe0cfe16fe21fe2dfe3afe49fe58fe68fe79;

defparam ROM_RAM_BRAM.INIT_08 = 256'h002e0064009700c600f2011a01400161017f019a01b201c701d901e701f301fd;
defparam ROM_RAM_BRAM.INIT_09 = 256'hfb54fbaefc09fc62fcbbfd12fd67fdbafe0bfe5afea6feefff35ff78ffb9fff5;
defparam ROM_RAM_BRAM.INIT_0A = 256'hf6a4f6cef700f737f774f7b6f7fcf847f895f8e7f93bf991f9e9fa43fa9dfaf8;
defparam ROM_RAM_BRAM.INIT_0B = 256'hf909f88bf81af7b5f75ff714f6d5f6a2f67bf65ff64df645f647f652f665f681;
defparam ROM_RAM_BRAM.INIT_0C = 256'hf7a9f904fa52fb93fcc7fdeeff070011010e01fd02dd03af0474052a05d1066b;
defparam ROM_RAM_BRAM.INIT_0D = 256'hdd33df01e0cee299e460e624e7e3e99ceb4fecfbee9ff03af1ccf354f4d1f643;
defparam ROM_RAM_BRAM.INIT_0E = 256'hc2c9c426c591c709c88eca1ecbb9cd5dcf0ad0bfd27ad43bd601d7cbd996db64;
defparam ROM_RAM_BRAM.INIT_0F = 256'hb6c5b6e7b71fb76eb7d4b84fb8e0b986ba41bb11bbf5bcecbdf5bf11c03ec17c;

defparam ROM_RAM_BRAM.INIT_10 = 256'h0400050A065908000A140CB21000142819652000285132CB400050A265978000;
defparam ROM_RAM_BRAM.INIT_11 = 256'h0019002000280032004000500065008000A100CB01000142019602000285032C;
defparam ROM_RAM_BRAM.INIT_12 = 256'h000000000001000100010002000200030004000500060008000A000C00100014;
defparam ROM_RAM_BRAM.INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
defparam ROM_RAM_BRAM.INIT_14 = 256'h000200040008001000200040008001010204041008421111C71C249299995555;
defparam ROM_RAM_BRAM.INIT_15 = 256'h0001000200030008001000200040008001000200040008001000200040000001;
defparam ROM_RAM_BRAM.INIT_16 = 256'hbdaec5e4cd9fd4dbdb94e1c5e76bec83f109f4faf853fb14fd3afec4ffb1ffff;
defparam ROM_RAM_BRAM.INIT_17 = 256'h0c8f1917259031f13e334a50563e61f76d7478ad839c8e39987fa267abebb504;
                                                                                                  
defparam ROM_RAM_BRAM.INIT_18 = 256'hDA987654321F0E01DCBA987654321001DCBA987654321001DCBA987654321001;
defparam ROM_RAM_BRAM.INIT_19 = 256'hDA987654321F0E01DA987654321F0E01DA987654321F0E01DA987654321F0E01;
defparam ROM_RAM_BRAM.INIT_1A = 256'hD21F0E02D21F0E02DA987654321F0E01DA987654321F0E01DA987654321F0E01;
defparam ROM_RAM_BRAM.INIT_1B = 256'hD21F0E02D21F0E02D21F0E02D21F0E02D21F0E02D21F0E02D21F0E02D21F0E02;
defparam ROM_RAM_BRAM.INIT_1C = 256'hFE01CBA987654321FE01DE03DE03DE03DE03DE03DE03DE03D21F0E02D21F0E02;
defparam ROM_RAM_BRAM.INIT_1D = 256'hFE024321FE024321FE024321FE024321FE024321FE024321FE02CBA987654321;
defparam ROM_RAM_BRAM.INIT_1E = 256'h0E01BA987654321F0E01BA987654321F0E014321FE024321FE024321FE024321;
defparam ROM_RAM_BRAM.INIT_1F = 256'hFE024321FE024321FE024321FE024321FE02BA987654321F0E01BA987654321F;
                          
defparam ROM_RAM_BRAM.INIT_20 = 256'hFE03FE03FE03FE03FE03FE03FE03FE03FE03FE03FE034321FE024321FE024321;
defparam ROM_RAM_BRAM.INIT_21 = 256'h00000000000000000000000000000000FE03FE03FE03FE03FE03FE03FE03FE03;
defparam ROM_RAM_BRAM.INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
defparam ROM_RAM_BRAM.INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
defparam ROM_RAM_BRAM.INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
defparam ROM_RAM_BRAM.INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
defparam ROM_RAM_BRAM.INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
defparam ROM_RAM_BRAM.INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
                                                                                                     


endmodule
module Const_ROM_Sample_RAM(
   clock,

   ROM_Enable_I,
   ROM_Address_I,
   ROM_Data_O,

	RAM_Address_I,
	RAM_Data_O,
	RAM_Wen_I,
	RAM_Data_I
);


input 				clock;

input					ROM_Enable_I;
input 	[9:0]		ROM_Address_I;
output 	[15:0]	ROM_Data_O;

input 	[9:0]		RAM_Address_I;
output 	[15:0]	RAM_Data_O;
input 				RAM_Wen_I;
input 	[15:0]	RAM_Data_I;

RAMB16_S18_S18 ROM_RAM_BRAM (
   .DOA(ROM_Data_O),
   .DOB(RAM_Data_O),
   .DOPA(),
   .DOPB(),
   .ADDRA(ROM_Address_I),
   .ADDRB(RAM_Address_I),
   .CLKA(clock),
   .CLKB(clock),
   .DIA(16'h0000),
   .DIB(RAM_Data_I),
   .DIPA(2'b00),
   .DIPB(2'b00),
   .ENA(ROM_Enable_I),
   .ENB(1'b1),
   .SSRA(1'b0),
   .SSRB(1'b0),
   .WEA(1'b0),
   .WEB(RAM_Wen_I)
);






































                                                                                                                     











defparam ROM_RAM_BRAM.WRITE_MODE_B = "READ_FIRST";

defparam ROM_RAM_BRAM.INIT_00 = 256'hffff000000000000000000000000000000000000000000000000000000004947;
defparam ROM_RAM_BRAM.INIT_01 = 256'hfffafffafffbfffcfffcfffcfffdfffdfffefffefffeffffffffffffffffffff;
defparam ROM_RAM_BRAM.INIT_02 = 256'hffe8ffeaffebffedffeeffeffff1fff2fff3fff4fff5fff6fff7fff8fff9fff9;
defparam ROM_RAM_BRAM.INIT_03 = 256'hffcdffceffcfffd1ffd3ffd4ffd6ffd8ffdaffdcffdeffe0ffe1ffe3ffe5ffe7;
defparam ROM_RAM_BRAM.INIT_04 = 256'h0028002c002f0032003300350037003800380039003900380038003700360035;
defparam ROM_RAM_BRAM.INIT_05 = 256'hff9cffaaffb7ffc3ffcfffdaffe5ffeefff800000007000e0014001a001f0024;
defparam ROM_RAM_BRAM.INIT_06 = 256'hfe8afe9bfeadfec0fed2fee4fef6ff09ff1bff2dff3eff4fff5fff6fff7fff8e;
defparam ROM_RAM_BRAM.INIT_07 = 256'hfdfdfdf9fdf7fdf7fdfafdfefe05fe0cfe16fe21fe2dfe3afe49fe58fe68fe79;

defparam ROM_RAM_BRAM.INIT_08 = 256'h002e0064009700c600f2011a01400161017f019a01b201c701d901e701f301fd;
defparam ROM_RAM_BRAM.INIT_09 = 256'hfb54fbaefc09fc62fcbbfd12fd67fdbafe0bfe5afea6feefff35ff78ffb9fff5;
defparam ROM_RAM_BRAM.INIT_0A = 256'hf6a4f6cef700f737f774f7b6f7fcf847f895f8e7f93bf991f9e9fa43fa9dfaf8;
defparam ROM_RAM_BRAM.INIT_0B = 256'hf909f88bf81af7b5f75ff714f6d5f6a2f67bf65ff64df645f647f652f665f681;
defparam ROM_RAM_BRAM.INIT_0C = 256'hf7a9f904fa52fb93fcc7fdeeff070011010e01fd02dd03af0474052a05d1066b;
defparam ROM_RAM_BRAM.INIT_0D = 256'hdd33df01e0cee299e460e624e7e3e99ceb4fecfbee9ff03af1ccf354f4d1f643;
defparam ROM_RAM_BRAM.INIT_0E = 256'hc2c9c426c591c709c88eca1ecbb9cd5dcf0ad0bfd27ad43bd601d7cbd996db64;
defparam ROM_RAM_BRAM.INIT_0F = 256'hb6c5b6e7b71fb76eb7d4b84fb8e0b986ba41bb11bbf5bcecbdf5bf11c03ec17c;

defparam ROM_RAM_BRAM.INIT_10 = 256'h0400050A065908000A140CB21000142819652000285132CB400050A265978000;
defparam ROM_RAM_BRAM.INIT_11 = 256'h0019002000280032004000500065008000A100CB01000142019602000285032C;
defparam ROM_RAM_BRAM.INIT_12 = 256'h000000000001000100010002000200030004000500060008000A000C00100014;
defparam ROM_RAM_BRAM.INIT_13 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
defparam ROM_RAM_BRAM.INIT_14 = 256'h000200040008001000200040008001010204041008421111C71C249299995555;
defparam ROM_RAM_BRAM.INIT_15 = 256'h0001000200030008001000200040008001000200040008001000200040000001;
defparam ROM_RAM_BRAM.INIT_16 = 256'hbdaec5e4cd9fd4dbdb94e1c5e76bec83f109f4faf853fb14fd3afec4ffb1ffff;
defparam ROM_RAM_BRAM.INIT_17 = 256'h0c8f1917259031f13e334a50563e61f76d7478ad839c8e39987fa267abebb504;
                                                                                                  
defparam ROM_RAM_BRAM.INIT_18 = 256'hDA987654321F0E01DCBA987654321001DCBA987654321001DCBA987654321001;
defparam ROM_RAM_BRAM.INIT_19 = 256'hDA987654321F0E01DA987654321F0E01DA987654321F0E01DA987654321F0E01;
defparam ROM_RAM_BRAM.INIT_1A = 256'hD21F0E02D21F0E02DA987654321F0E01DA987654321F0E01DA987654321F0E01;
defparam ROM_RAM_BRAM.INIT_1B = 256'hD21F0E02D21F0E02D21F0E02D21F0E02D21F0E02D21F0E02D21F0E02D21F0E02;
defparam ROM_RAM_BRAM.INIT_1C = 256'hFE01CBA987654321FE01DE03DE03DE03DE03DE03DE03DE03D21F0E02D21F0E02;
defparam ROM_RAM_BRAM.INIT_1D = 256'hFE024321FE024321FE024321FE024321FE024321FE024321FE02CBA987654321;
defparam ROM_RAM_BRAM.INIT_1E = 256'h0E01BA987654321F0E01BA987654321F0E014321FE024321FE024321FE024321;
defparam ROM_RAM_BRAM.INIT_1F = 256'hFE024321FE024321FE024321FE024321FE02BA987654321F0E01BA987654321F;
                          
defparam ROM_RAM_BRAM.INIT_20 = 256'hFE03FE03FE03FE03FE03FE03FE03FE03FE03FE03FE034321FE024321FE024321;
defparam ROM_RAM_BRAM.INIT_21 = 256'h00000000000000000000000000000000FE03FE03FE03FE03FE03FE03FE03FE03;
defparam ROM_RAM_BRAM.INIT_22 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
defparam ROM_RAM_BRAM.INIT_23 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
defparam ROM_RAM_BRAM.INIT_24 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
defparam ROM_RAM_BRAM.INIT_25 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
defparam ROM_RAM_BRAM.INIT_26 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
defparam ROM_RAM_BRAM.INIT_27 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
                                                                                                     


endmodule