data/full_repos/permissive/488964817/4_bitRingCounter.v
1: b"%Error: data/full_repos/permissive/488964817/4_bitRingCounter.v:14: Cannot find file containing module: 'D_FF'\n D_FF D0(temp[3], Q[0], _Q[0], CLK) ;\n ^~~~\n        ... Looked in:\n             data/full_repos/permissive/488964817,data/full_repos/permissive/488964817/D_FF\n             data/full_repos/permissive/488964817,data/full_repos/permissive/488964817/D_FF.v\n             data/full_repos/permissive/488964817,data/full_repos/permissive/488964817/D_FF.sv\n             D_FF\n             D_FF.v\n             D_FF.sv\n             obj_dir/D_FF\n             obj_dir/D_FF.v\n             obj_dir/D_FF.sv\n%Error: data/full_repos/permissive/488964817/4_bitRingCounter.v:15: Cannot find file containing module: 'D_FF'\n D_FF D1(temp[0], Q[1], _Q[1], CLK) ;\n ^~~~\n%Error: data/full_repos/permissive/488964817/4_bitRingCounter.v:16: Cannot find file containing module: 'D_FF'\n D_FF D2(temp[1], Q[2], _Q[2], CLK) ;\n ^~~~\n%Error: data/full_repos/permissive/488964817/4_bitRingCounter.v:17: Cannot find file containing module: 'D_FF'\n D_FF D3(temp[2], Q[3], _Q[3], CLK) ;\n ^~~~\n%Error: Exiting due to 4 error(s)\n"
module today0512(inputD, CLK, pre, LED) ;
	input pre ;
	input CLK ;
	input [3:0] inputD ;
	output [3:0] LED ;
	reg [3:0] temp ;
	wire [3:0] Q ;
	wire [3:0] _Q ;
	always @ (negedge CLK)
	begin
		temp = Q ;
		if(!pre) temp = inputD ;
	end
	D_FF D0(temp[3], Q[0], _Q[0], CLK) ;
	D_FF D1(temp[0], Q[1], _Q[1], CLK) ;
	D_FF D2(temp[1], Q[2], _Q[2], CLK) ;
	D_FF D3(temp[2], Q[3], _Q[3], CLK) ;
	assign LED = temp ;
endmodule
module today0512(inputD, CLK, pre, LED) ;

	input pre ;
	input CLK ;
	input [3:0] inputD ;
	output [3:0] LED ;
	reg [3:0] temp ;
	wire [3:0] Q ;
	wire [3:0] _Q ;
	always @ (negedge CLK)
	begin
		temp = Q ;
		if(!pre) temp = inputD ;
	end
	D_FF D0(temp[3], Q[0], _Q[0], CLK) ;
	D_FF D1(temp[0], Q[1], _Q[1], CLK) ;
	D_FF D2(temp[1], Q[2], _Q[2], CLK) ;
	D_FF D3(temp[2], Q[3], _Q[3], CLK) ;
	assign LED = temp ;
endmodule