data/full_repos/permissive/460664642/mult_integrated_tb.v
1: b'%Error: data/full_repos/permissive/460664642/mult_integrated_tb.v:1: Cannot find include file: mult_integrated.v\n`include "mult_integrated.v" \n         ^~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/460664642,data/full_repos/permissive/460664642/mult_integrated.v\n             data/full_repos/permissive/460664642,data/full_repos/permissive/460664642/mult_integrated.v.v\n             data/full_repos/permissive/460664642,data/full_repos/permissive/460664642/mult_integrated.v.sv\n             mult_integrated.v\n             mult_integrated.v.v\n             mult_integrated.v.sv\n             obj_dir/mult_integrated.v\n             obj_dir/mult_integrated.v.v\n             obj_dir/mult_integrated.v.sv\n%Error: data/full_repos/permissive/460664642/mult_integrated_tb.v:14: Unsupported or unknown PLI call: $monitor\n   $monitor("%d*%d=%b|%b|%b",Input1,Input2,seg3,seg2,seg1);\n   ^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/460664642/mult_integrated_tb.v:21: Unsupported: Ignoring delay on this delayed statement.\n       #1 Input1 = i;\n       ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 2 error(s), 1 warning(s)\n'
module mult_integrated_tb();

reg[3:0] Input1;
reg[3:0] Input2;
wire[6:0] seg1;
wire[6:0] seg2;
wire[6:0] seg3;

integer i;
integer j;

initial begin
   $monitor("%d*%d=%b|%b|%b",Input1,Input2,seg3,seg2,seg1);
   Input1 = 0;
   Input2 = 0;
   for(i = 0; i < 16; i = i + 1)
   begin
     for(j = 0; j < 16; j = j + 1)
     begin
       #1 Input1 = i;
       Input2 = j;
     end
   end
end

mult_integrated mult(
Input1,
Input2,
seg1,
seg2,
seg3
 );
endmodule
module mult_integrated_tb();


reg[3:0] Input1;
reg[3:0] Input2;
wire[6:0] seg1;
wire[6:0] seg2;
wire[6:0] seg3;

integer i;
integer j;

initial begin
   $monitor("%d*%d=%b|%b|%b",Input1,Input2,seg3,seg2,seg1);
   Input1 = 0;
   Input2 = 0;
   for(i = 0; i < 16; i = i + 1)
   begin
     for(j = 0; j < 16; j = j + 1)
     begin
       #1 Input1 = i;
       Input2 = j;
     end
   end
end

mult_integrated mult(
Input1,
Input2,
seg1,
seg2,
seg3
 );
endmodule