data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:68: Unsupported: Ignoring delay on this delayed statement.\n   #5;\n   ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:70: Unsupported: Ignoring delay on this delayed statement.\n   #10;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:72: Unsupported: Ignoring delay on this delayed statement.\n   #2;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:104: Unsupported: Ignoring delay on this delayed statement.\n   #3;\n   ^\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:133: Unsupported or unknown PLI call: $dumpfile\n  $dumpfile("test_dsp_model.vcd");\n  ^~~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:134: Unsupported or unknown PLI call: $dumpvars\n  $dumpvars(0, testbench);\n  ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:136: Unsupported: Ignoring delay on this delayed statement.\n  #2;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:148: Unsupported: Ignoring delay on this delayed statement.\n   #10;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:150: Unsupported: Ignoring delay on this delayed statement.\n   #10;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:152: Unsupported: Ignoring delay on this delayed statement.\n   #10;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:154: Unsupported: Ignoring delay on this delayed statement.\n   #10;\n   ^\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:163: Unsupported or unknown PLI call: $urandom\n    A = $urandom;\n        ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:164: Unsupported or unknown PLI call: $urandom\n    ACIN = $urandom;\n           ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:165: Unsupported or unknown PLI call: $urandom\n    B = $urandom;\n        ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:166: Unsupported or unknown PLI call: $urandom\n    BCIN = $urandom;\n           ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:167: Unsupported or unknown PLI call: $urandom\n    C = {$urandom, $urandom};\n         ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:167: Unsupported or unknown PLI call: $urandom\n    C = {$urandom, $urandom};\n                   ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:168: Unsupported or unknown PLI call: $urandom\n    D = $urandom;\n        ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:169: Unsupported or unknown PLI call: $urandom\n    PCIN = {$urandom, $urandom};\n            ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:169: Unsupported or unknown PLI call: $urandom\n    PCIN = {$urandom, $urandom};\n                      ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:171: Unsupported or unknown PLI call: $urandom\n    {CEA1, CEA2, CEAD, CEALUMODE, CEB1, CEB2, CEC, CECARRYIN, CECTRL} = $urandom | $urandom | $urandom;\n                                                                        ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:171: Unsupported or unknown PLI call: $urandom\n    {CEA1, CEA2, CEAD, CEALUMODE, CEB1, CEB2, CEC, CECARRYIN, CECTRL} = $urandom | $urandom | $urandom;\n                                                                                   ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:171: Unsupported or unknown PLI call: $urandom\n    {CEA1, CEA2, CEAD, CEALUMODE, CEB1, CEB2, CEC, CECARRYIN, CECTRL} = $urandom | $urandom | $urandom;\n                                                                                              ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:172: Unsupported or unknown PLI call: $urandom\n    {CED, CEINMODE, CEM, CEP} = $urandom | $urandom | $urandom | $urandom;\n                                ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:172: Unsupported or unknown PLI call: $urandom\n    {CED, CEINMODE, CEM, CEP} = $urandom | $urandom | $urandom | $urandom;\n                                           ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:172: Unsupported or unknown PLI call: $urandom\n    {CED, CEINMODE, CEM, CEP} = $urandom | $urandom | $urandom | $urandom;\n                                                      ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:172: Unsupported or unknown PLI call: $urandom\n    {CED, CEINMODE, CEM, CEP} = $urandom | $urandom | $urandom | $urandom;\n                                                                 ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:178: Unsupported or unknown PLI call: $urandom\n    {RSTA, RSTALLCARRYIN, RSTALUMODE, RSTB, RSTC, RSTCTRL, RSTD, RSTINMODE, RSTM, RSTP} = $urandom & $urandom & $urandom & $urandom & $urandom & $urandom;\n                                                                                          ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:178: Unsupported or unknown PLI call: $urandom\n    {RSTA, RSTALLCARRYIN, RSTALUMODE, RSTB, RSTC, RSTCTRL, RSTD, RSTINMODE, RSTM, RSTP} = $urandom & $urandom & $urandom & $urandom & $urandom & $urandom;\n                                                                                                     ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:178: Unsupported or unknown PLI call: $urandom\n    {RSTA, RSTALLCARRYIN, RSTALUMODE, RSTB, RSTC, RSTCTRL, RSTD, RSTINMODE, RSTM, RSTP} = $urandom & $urandom & $urandom & $urandom & $urandom & $urandom;\n                                                                                                                ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:178: Unsupported or unknown PLI call: $urandom\n    {RSTA, RSTALLCARRYIN, RSTALUMODE, RSTB, RSTC, RSTCTRL, RSTD, RSTINMODE, RSTM, RSTP} = $urandom & $urandom & $urandom & $urandom & $urandom & $urandom;\n                                                                                                                           ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:178: Unsupported or unknown PLI call: $urandom\n    {RSTA, RSTALLCARRYIN, RSTALUMODE, RSTB, RSTC, RSTCTRL, RSTD, RSTINMODE, RSTM, RSTP} = $urandom & $urandom & $urandom & $urandom & $urandom & $urandom;\n                                                                                                                                      ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:178: Unsupported or unknown PLI call: $urandom\n    {RSTA, RSTALLCARRYIN, RSTALUMODE, RSTB, RSTC, RSTCTRL, RSTD, RSTINMODE, RSTM, RSTP} = $urandom & $urandom & $urandom & $urandom & $urandom & $urandom;\n                                                                                                                                                 ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:179: Unsupported or unknown PLI call: $urandom\n    {ALUMODE, INMODE} = $urandom;\n                        ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:180: Unsupported or unknown PLI call: $urandom\n    CARRYINSEL = $urandom & $urandom & $urandom;\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:180: Unsupported or unknown PLI call: $urandom\n    CARRYINSEL = $urandom & $urandom & $urandom;\n                            ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:180: Unsupported or unknown PLI call: $urandom\n    CARRYINSEL = $urandom & $urandom & $urandom;\n                                       ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:181: Unsupported or unknown PLI call: $urandom\n    OPMODE = $urandom; \n             ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:182: Unsupported or unknown PLI call: $urandom\n    if ($urandom & 1\'b1)\n        ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:184: Unsupported or unknown PLI call: $urandom\n    {CARRYCASCIN, CARRYIN, MULTSIGNIN} = $urandom;\n                                         ^~~~~~~~\n%Error: data/full_repos/permissive/441359809/src/yosys/techlibs/xilinx/tests/test_dsp_model.v:239: syntax error, unexpected ref, expecting IDENTIFIER\n ) ref (\n   ^~~\n%Error: Exiting due to 32 error(s), 9 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module mult_noreg_preadd_nocasc;
	testbench #(
		.ACASCREG           (0),
		.ADREG              (0),
		.ALUMODEREG         (0),
		.AREG               (0),
		.AUTORESET_PATDET   ("NO_RESET"),
		.A_INPUT            ("DIRECT"),
		.BCASCREG           (0),
		.BREG               (0),
		.B_INPUT            ("DIRECT"),
		.CARRYINREG         (0),
		.CARRYINSELREG      (0),
		.CREG               (0),
		.DREG               (0),
		.INMODEREG          (0),
		.MREG               (0),
		.OPMODEREG          (0),
		.PREG               (0),
		.SEL_MASK           ("MASK"),
		.SEL_PATTERN        ("PATTERN"),
		.USE_DPORT          ("TRUE"),
		.USE_MULT           ("DYNAMIC"),
		.USE_PATTERN_DETECT ("NO_PATDET"),
		.USE_SIMD           ("ONE48"),
		.MASK               (48'h3FFFFFFFFFFF),
		.PATTERN            (48'h000000000000),
		.IS_ALUMODE_INVERTED(4'b0),
		.IS_CARRYIN_INVERTED(1'b0),
		.IS_CLK_INVERTED    (1'b0),
		.IS_INMODE_INVERTED (5'b0),
		.IS_OPMODE_INVERTED (7'b0)
	) testbench ();
endmodule
module mult_noreg_preadd_nocasc;

	testbench #(
		.ACASCREG           (0),
		.ADREG              (0),
		.ALUMODEREG         (0),
		.AREG               (0),
		.AUTORESET_PATDET   ("NO_RESET"),
		.A_INPUT            ("DIRECT"),
		.BCASCREG           (0),
		.BREG               (0),
		.B_INPUT            ("DIRECT"),
		.CARRYINREG         (0),
		.CARRYINSELREG      (0),
		.CREG               (0),
		.DREG               (0),
		.INMODEREG          (0),
		.MREG               (0),
		.OPMODEREG          (0),
		.PREG               (0),
		.SEL_MASK           ("MASK"),
		.SEL_PATTERN        ("PATTERN"),
		.USE_DPORT          ("TRUE"),
		.USE_MULT           ("DYNAMIC"),
		.USE_PATTERN_DETECT ("NO_PATDET"),
		.USE_SIMD           ("ONE48"),
		.MASK               (48'h3FFFFFFFFFFF),
		.PATTERN            (48'h000000000000),
		.IS_ALUMODE_INVERTED(4'b0),
		.IS_CARRYIN_INVERTED(1'b0),
		.IS_CLK_INVERTED    (1'b0),
		.IS_INMODE_INVERTED (5'b0),
		.IS_OPMODE_INVERTED (7'b0)
	) testbench ();
endmodule