data/full_repos/permissive/448192472/V09_3bit_adder_Verilog_script/Adder3bit.v
1: b"%Error: data/full_repos/permissive/448192472/V09_3bit_adder_Verilog_script/Adder3bit.v:11: Cannot find file containing module: 'FullAdder'\nFullAdder M1(A[0],B[0],1'b0,sum[0],w1);\n^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/448192472/V09_3bit_adder_Verilog_script,data/full_repos/permissive/448192472/FullAdder\n             data/full_repos/permissive/448192472/V09_3bit_adder_Verilog_script,data/full_repos/permissive/448192472/FullAdder.v\n             data/full_repos/permissive/448192472/V09_3bit_adder_Verilog_script,data/full_repos/permissive/448192472/FullAdder.sv\n             FullAdder\n             FullAdder.v\n             FullAdder.sv\n             obj_dir/FullAdder\n             obj_dir/FullAdder.v\n             obj_dir/FullAdder.sv\n%Error: data/full_repos/permissive/448192472/V09_3bit_adder_Verilog_script/Adder3bit.v:12: Cannot find file containing module: 'FullAdder'\nFullAdder M2(A[1],B[1],w1,sum[1],w2);\n^~~~~~~~~\n%Error: data/full_repos/permissive/448192472/V09_3bit_adder_Verilog_script/Adder3bit.v:13: Cannot find file containing module: 'FullAdder'\nFullAdder M3(A[2],B[2],w2,sum[2],cy);\n^~~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module Adder3bit(A, B, sum, cy);
input [2:0] A, B;
output [2:0] sum;
output cy;

wire w1, w2;

FullAdder M1(A[0],B[0],1'b0,sum[0],w1);
FullAdder M2(A[1],B[1],w1,sum[1],w2);
FullAdder M3(A[2],B[2],w2,sum[2],cy);

endmodule
module Adder3bit(A, B, sum, cy);

input [2:0] A, B;
output [2:0] sum;
output cy;

wire w1, w2;

FullAdder M1(A[0],B[0],1'b0,sum[0],w1);
FullAdder M2(A[1],B[1],w1,sum[1],w2);
FullAdder M3(A[2],B[2],w2,sum[2],cy);

endmodule