data/full_repos/permissive/463481430/RTL/core/ifu_pc.v
1: b'%Error: data/full_repos/permissive/463481430/RTL/core/ifu_pc.v:4: Cannot find include file: config.v\n`include "config.v" \n         ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/463481430/RTL/core,data/full_repos/permissive/463481430/config.v\n             data/full_repos/permissive/463481430/RTL/core,data/full_repos/permissive/463481430/config.v.v\n             data/full_repos/permissive/463481430/RTL/core,data/full_repos/permissive/463481430/config.v.sv\n             config.v\n             config.v.v\n             config.v.sv\n             obj_dir/config.v\n             obj_dir/config.v.v\n             obj_dir/config.v.sv\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu_pc.v:13: Define or directive not defined: \'`xlen_def\'\n    input wire[`xlen_def] i_pc_goback,\n               ^~~~~~~~~\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu_pc.v:13: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n    input wire[`xlen_def] i_pc_goback,\n                        ^\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu_pc.v:17: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input wire i_jump,\n    ^~~~~\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu_pc.v:18: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input wire[`xlen_def] i_jump_addr,\n    ^~~~~\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu_pc.v:18: Define or directive not defined: \'`xlen_def\'\n    input wire[`xlen_def] i_jump_addr,\n               ^~~~~~~~~\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu_pc.v:20: Define or directive not defined: \'`xlen_def\'\n    output wire[`xlen_def] o_fetch_addr\n                ^~~~~~~~~\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu_pc.v:23: Define or directive not defined: \'`xlen_def\'\n    reg[`xlen_def] pc;\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu_pc.v:23: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n    reg[`xlen_def] pc;\n                 ^\n%Error: data/full_repos/permissive/463481430/RTL/core/ifu_pc.v:27: Define or directive not defined: \'`cpu_reset_addr\'\n            pc <= `cpu_reset_addr;\n                  ^~~~~~~~~~~~~~~\n%Error: Exiting due to 10 error(s)\n'
module IFU_PC (
    input wire i_clk,
    input wire i_rstn,

    input wire i_fetch_vld,
    input wire i_fifo_empty,

    input wire[`xlen_def] i_pc_goback,


    input wire i_pc_vld,
    input wire i_jump,
    input wire[`xlen_def] i_jump_addr,

    output wire[`xlen_def] o_fetch_addr
);

    reg[`xlen_def] pc;

    always @(posedge i_clk or negedge i_rstn) begin
        if(~i_rstn)begin
            pc <= `cpu_reset_addr;
        end
        else begin
            
            if(i_pc_vld | i_jump) begin
                pc <= i_jump ? (i_pc_vld ? i_jump_addr + 4 :  i_jump_addr) : pc + 4 ;
            end
            else if((~i_fifo_empty) & (~i_fetch_vld)) begin
                pc <= i_pc_goback;
            end

        end
    end

    assign o_fetch_addr =   i_jump ? i_jump_addr :
                            pc;

endmodule
module IFU_PC (
    input wire i_clk,
    input wire i_rstn,

    input wire i_fetch_vld,
    input wire i_fifo_empty,

    input wire[`xlen_def] i_pc_goback,


    input wire i_pc_vld,
    input wire i_jump,
    input wire[`xlen_def] i_jump_addr,

    output wire[`xlen_def] o_fetch_addr
);


    reg[`xlen_def] pc;

    always @(posedge i_clk or negedge i_rstn) begin
        if(~i_rstn)begin
            pc <= `cpu_reset_addr;
        end
        else begin
            
            if(i_pc_vld | i_jump) begin
                pc <= i_jump ? (i_pc_vld ? i_jump_addr + 4 :  i_jump_addr) : pc + 4 ;
            end
            else if((~i_fifo_empty) & (~i_fetch_vld)) begin
                pc <= i_pc_goback;
            end

        end
    end

    assign o_fetch_addr =   i_jump ? i_jump_addr :
                            pc;

endmodule