data/full_repos/permissive/437303189/src/sar_and_tmu/digital_part.v
1: b'%Error: data/full_repos/permissive/437303189/src/sar_and_tmu/digital_part.v:1: Cannot find include file: sar_logic.v\n`include "sar_logic.v" \n         ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/437303189/src/sar_and_tmu,data/full_repos/permissive/437303189/sar_logic.v\n             data/full_repos/permissive/437303189/src/sar_and_tmu,data/full_repos/permissive/437303189/sar_logic.v.v\n             data/full_repos/permissive/437303189/src/sar_and_tmu,data/full_repos/permissive/437303189/sar_logic.v.sv\n             sar_logic.v\n             sar_logic.v.v\n             sar_logic.v.sv\n             obj_dir/sar_logic.v\n             obj_dir/sar_logic.v.v\n             obj_dir/sar_logic.v.sv\n%Error: data/full_repos/permissive/437303189/src/sar_and_tmu/digital_part.v:2: Cannot find include file: timing_management_unit.v\n`include "timing_management_unit.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n'
module digital_part #(

    parameter HIGH_COUNT = 1,
    parameter LOW_COUNT = 12,

    parameter PRECISION = 10
)(
`ifdef USE_POWER_PINS
    inout vccd1,
    inout vssd1,
`endif

    input rst,
    input clk,

    input cmp,

    output clk_out,

    output [PRECISION - 1 : 0] sar_out
);

    timing_management_unit #(
        .HIGH_COUNT(HIGH_COUNT),
        .LOW_COUNT(LOW_COUNT)
    ) tmu (
        .rst(rst),
        .clk_in(clk),
        .clk_out(clk_out)
    );

    sar_logic #(
        .PRECISION(PRECISION)
    ) sar (
        .rst(rst),
        .clk(clk),
        .cmp(cmp),
        .sar_out(sar_out)
    );

endmodule
module digital_part #(

    parameter HIGH_COUNT = 1,
    parameter LOW_COUNT = 12,

    parameter PRECISION = 10
)(
`ifdef USE_POWER_PINS
    inout vccd1,
    inout vssd1,
`endif

    input rst,
    input clk,

    input cmp,

    output clk_out,

    output [PRECISION - 1 : 0] sar_out
);


    timing_management_unit #(
        .HIGH_COUNT(HIGH_COUNT),
        .LOW_COUNT(LOW_COUNT)
    ) tmu (
        .rst(rst),
        .clk_in(clk),
        .clk_out(clk_out)
    );

    sar_logic #(
        .PRECISION(PRECISION)
    ) sar (
        .rst(rst),
        .clk(clk),
        .cmp(cmp),
        .sar_out(sar_out)
    );

endmodule