data/full_repos/permissive/443770883/lab7/Lab6-Student copy/pc.v
1: b'%Error: Cannot find file containing module: copy,data/full_repos/permissive/443770883\n        ... Looked in:\n             data/full_repos/permissive/443770883/lab7/Lab6-Student/copy,data/full_repos/permissive/443770883\n             data/full_repos/permissive/443770883/lab7/Lab6-Student/copy,data/full_repos/permissive/443770883.v\n             data/full_repos/permissive/443770883/lab7/Lab6-Student/copy,data/full_repos/permissive/443770883.sv\n             copy,data/full_repos/permissive/443770883\n             copy,data/full_repos/permissive/443770883.v\n             copy,data/full_repos/permissive/443770883.sv\n             obj_dir/copy,data/full_repos/permissive/443770883\n             obj_dir/copy,data/full_repos/permissive/443770883.v\n             obj_dir/copy,data/full_repos/permissive/443770883.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/443770883/lab7/Lab6-Student\n%Error: Cannot find file containing module: copy/pc.v\n%Error: Exiting due to 3 error(s)\n'
module pc (input wire clk, reset, inc, add, sub, input wire [15:0] offset, output wire [15:0] pc);


	wire [0:15] c;



	pc_slice p0(offset[0], inc, sub, sub, load, clk, reset, c[0], pc[0]);
	pc_slice p1(offset[1], inc, sub, c[0], load, clk, reset, c[1], pc[1]);
	pc_slice p2(offset[2], inc, sub, c[1], load, clk, reset, c[2], pc[2]);
	pc_slice p3(offset[3], inc, sub, c[2], load, clk, reset, c[3], pc[3]);
	pc_slice p4(offset[4], inc, sub, c[3], load, clk, reset, c[4], pc[4]);
	pc_slice p5(offset[5], inc, sub, c[4], load, clk, reset, c[5], pc[5]);
	pc_slice p6(offset[6], inc, sub, c[5], load, clk, reset, c[6], pc[6]);
	pc_slice p7(offset[7], inc, sub, c[6], load, clk, reset, c[7], pc[7]);
	pc_slice p8(offset[8], inc, sub, c[7], load, clk, reset, c[8], pc[8]);
	pc_slice p9(offset[9], inc, sub, c[8], load, clk, reset, c[9], pc[9]);
	pc_slice p10(offset[10], inc, sub, c[9], load, clk, reset, c[10], pc[10]);
	pc_slice p11(offset[11], inc, sub, c[10], load, clk, reset, c[11], pc[11]);
	pc_slice p12(offset[12], inc, sub, c[11], load, clk, reset, c[12], pc[12]);
	pc_slice p13(offset[13], inc, sub, c[12], load, clk, reset, c[13], pc[13]);
	pc_slice p14(offset[14], inc, sub, c[13], load, clk, reset, c[14], pc[14]);
	pc_slice p15(offset[15], inc, sub, c[14], load, clk, reset, c[15], pc[15]);

endmodule
module pc (input wire clk, reset, inc, add, sub, input wire [15:0] offset, output wire [15:0] pc);



	wire [0:15] c;



	pc_slice p0(offset[0], inc, sub, sub, load, clk, reset, c[0], pc[0]);
	pc_slice p1(offset[1], inc, sub, c[0], load, clk, reset, c[1], pc[1]);
	pc_slice p2(offset[2], inc, sub, c[1], load, clk, reset, c[2], pc[2]);
	pc_slice p3(offset[3], inc, sub, c[2], load, clk, reset, c[3], pc[3]);
	pc_slice p4(offset[4], inc, sub, c[3], load, clk, reset, c[4], pc[4]);
	pc_slice p5(offset[5], inc, sub, c[4], load, clk, reset, c[5], pc[5]);
	pc_slice p6(offset[6], inc, sub, c[5], load, clk, reset, c[6], pc[6]);
	pc_slice p7(offset[7], inc, sub, c[6], load, clk, reset, c[7], pc[7]);
	pc_slice p8(offset[8], inc, sub, c[7], load, clk, reset, c[8], pc[8]);
	pc_slice p9(offset[9], inc, sub, c[8], load, clk, reset, c[9], pc[9]);
	pc_slice p10(offset[10], inc, sub, c[9], load, clk, reset, c[10], pc[10]);
	pc_slice p11(offset[11], inc, sub, c[10], load, clk, reset, c[11], pc[11]);
	pc_slice p12(offset[12], inc, sub, c[11], load, clk, reset, c[12], pc[12]);
	pc_slice p13(offset[13], inc, sub, c[12], load, clk, reset, c[13], pc[13]);
	pc_slice p14(offset[14], inc, sub, c[13], load, clk, reset, c[14], pc[14]);
	pc_slice p15(offset[15], inc, sub, c[14], load, clk, reset, c[15], pc[15]);

endmodule