data/full_repos/permissive/507383616/rtl/top_module.v
1: b"%Error: data/full_repos/permissive/507383616/rtl/top_module.v:61: Cannot find file containing module: 'main_gpio_complex'\n    main_gpio_complex #(\n    ^~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/507383616/rtl,data/full_repos/permissive/507383616/main_gpio_complex\n             data/full_repos/permissive/507383616/rtl,data/full_repos/permissive/507383616/main_gpio_complex.v\n             data/full_repos/permissive/507383616/rtl,data/full_repos/permissive/507383616/main_gpio_complex.sv\n             main_gpio_complex\n             main_gpio_complex.v\n             main_gpio_complex.sv\n             obj_dir/main_gpio_complex\n             obj_dir/main_gpio_complex.v\n             obj_dir/main_gpio_complex.sv\n%Error: data/full_repos/permissive/507383616/rtl/top_module.v:84: Cannot find file containing module: 'pmu_controller'\n    pmu_controller #(\n    ^~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module top_module #
(
    parameter WORD_SIZE = 32,
    parameter SIZE_WORD = 3,
    parameter INPUT_DATA_SIZE = 52,
    parameter STATUS_SIGNALS = 6,
    parameter DATA_WIDTH = 8,
    parameter BAUD_RATE = 115200,
    parameter CLOCK_SPEED = 125000000,
    parameter OUTPUTS = 32,
    parameter INPUTS = 32,
    parameter COUNTERSIZE = 8
)
(
    input wire clk,
    input wire btn,
    input wire rxd,
    input wire rxd_pmu,
    input wire [3:0] sw,
    output wire [3:0] led,
    output wire txd,
    output wire txd_pmu
);

    wire rst;

    wire [INPUTS  - 1: 0] inputs;
    wire [OUTPUTS - 1 :0] outputs;
    wire [2:0] trx_error;
    wire [2:0] io_error; 
    wire [2:0] command_arrive;
    wire [2:0] command_arrive_discrepancy;

    
    assign rst = btn;
    assign inputs[3:0] = sw;
    assign led = outputs[3:0];


    main_gpio_complex #(
        .WORD_SIZE(WORD_SIZE),
        .SIZE_WORD(SIZE_WORD),
        .STATUS_SIGNALS(STATUS_SIGNALS),
        .DATA_WIDTH(DATA_WIDTH),
        .INPUT_DATA_SIZE(INPUT_DATA_SIZE),
        .OUTPUTS(OUTPUTS),
        .INPUTS(INPUTS),
        .BAUD_RATE(BAUD_RATE),
        .CLOCK_SPEED(CLOCK_SPEED)
    )main_gpio_complex_inst(
        .clk(clk),
        .rst(rst),
        .rx(rxd),
        .tx(txd),
        .input_io(inputs),
        .output_io_signal(outputs),
        .trx_error(trx_error),
        .output_io_error(io_error),
        .command_arrive(command_arrive),
        .command_arrive_discrepancy(command_arrive_discrepancy)
    );

    pmu_controller #(
        .SIZE_WORD(SIZE_WORD),
        .DATA_WIDTH(DATA_WIDTH),
        .BAUD_RATE(BAUD_RATE),
        .CLOCK_SPEED(CLOCK_SPEED),
        .COUNTERSIZE(COUNTERSIZE)
    )pmu_controller_inst(
        .clk(clk),
        .rst(rst),
        .rxd_pmu(rxd_pmu),
        .txd_pmu(txd_pmu),
        .trx_error(trx_error),
        .output_io_error(io_error),
        .command_arrive(command_arrive),
        .command_arrive_discrepancy(command_arrive_discrepancy)
    );

endmodule
module top_module #
(
    parameter WORD_SIZE = 32,
    parameter SIZE_WORD = 3,
    parameter INPUT_DATA_SIZE = 52,
    parameter STATUS_SIGNALS = 6,
    parameter DATA_WIDTH = 8,
    parameter BAUD_RATE = 115200,
    parameter CLOCK_SPEED = 125000000,
    parameter OUTPUTS = 32,
    parameter INPUTS = 32,
    parameter COUNTERSIZE = 8
)
(
    input wire clk,
    input wire btn,
    input wire rxd,
    input wire rxd_pmu,
    input wire [3:0] sw,
    output wire [3:0] led,
    output wire txd,
    output wire txd_pmu
);


    wire rst;

    wire [INPUTS  - 1: 0] inputs;
    wire [OUTPUTS - 1 :0] outputs;
    wire [2:0] trx_error;
    wire [2:0] io_error; 
    wire [2:0] command_arrive;
    wire [2:0] command_arrive_discrepancy;

    
    assign rst = btn;
    assign inputs[3:0] = sw;
    assign led = outputs[3:0];


    main_gpio_complex #(
        .WORD_SIZE(WORD_SIZE),
        .SIZE_WORD(SIZE_WORD),
        .STATUS_SIGNALS(STATUS_SIGNALS),
        .DATA_WIDTH(DATA_WIDTH),
        .INPUT_DATA_SIZE(INPUT_DATA_SIZE),
        .OUTPUTS(OUTPUTS),
        .INPUTS(INPUTS),
        .BAUD_RATE(BAUD_RATE),
        .CLOCK_SPEED(CLOCK_SPEED)
    )main_gpio_complex_inst(
        .clk(clk),
        .rst(rst),
        .rx(rxd),
        .tx(txd),
        .input_io(inputs),
        .output_io_signal(outputs),
        .trx_error(trx_error),
        .output_io_error(io_error),
        .command_arrive(command_arrive),
        .command_arrive_discrepancy(command_arrive_discrepancy)
    );

    pmu_controller #(
        .SIZE_WORD(SIZE_WORD),
        .DATA_WIDTH(DATA_WIDTH),
        .BAUD_RATE(BAUD_RATE),
        .CLOCK_SPEED(CLOCK_SPEED),
        .COUNTERSIZE(COUNTERSIZE)
    )pmu_controller_inst(
        .clk(clk),
        .rst(rst),
        .rxd_pmu(rxd_pmu),
        .txd_pmu(txd_pmu),
        .trx_error(trx_error),
        .output_io_error(io_error),
        .command_arrive(command_arrive),
        .command_arrive_discrepancy(command_arrive_discrepancy)
    );

endmodule