data/full_repos/permissive/456791631/Proyecto3/Proyecto3.v
1: b'%Warning-WIDTH: data/full_repos/permissive/456791631/Proyecto3/Proyecto3.v:10: Operator CASE expects 3 bits on the Case expression, but Case expression\'s VARREF \'s\' generates 2 bits.\n                                                                             : ... In instance Peoyecto3\n case (s)\n ^~~~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module Peoyecto3
(
	input [1:0] s,
	input [3:0] a, b, c,
	output [3:0] out
);

reg [3:0]sal;
always @(s, a, b, c)
	case (s)
		3'h0: sal = a;
		3'h1: sal = b;
		3'h2: sal = c;
		default: sal = 0;
	endcase
	assign out = sal;
endmodule
module Peoyecto3
(
	input [1:0] s,
	input [3:0] a, b, c,
	output [3:0] out
);


reg [3:0]sal;
always @(s, a, b, c)
	case (s)
		3'h0: sal = a;
		3'h1: sal = b;
		3'h2: sal = c;
		default: sal = 0;
	endcase
	assign out = sal;
endmodule