data/full_repos/permissive/485312426/sim/CordicComputer_TB.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/485312426/sim/CordicComputer_TB.v:10: Unsupported: Ignoring delay on this delayed statement.\n        clk = 0 ; #5 ;\n                  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/485312426/sim/CordicComputer_TB.v:11: Unsupported: Ignoring delay on this delayed statement.\n        clk = 1 ; #5 ;\n                  ^\n%Warning-STMTDLY: data/full_repos/permissive/485312426/sim/CordicComputer_TB.v:17: Unsupported: Ignoring delay on this delayed statement.\n        #8 ;      rstn      = 1\'b1 ;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/485312426/sim/CordicComputer_TB.v:36: Unsupported: Ignoring delay on this delayed statement.\n        #8;\n        ^\n%Error: data/full_repos/permissive/485312426/sim/CordicComputer_TB.v:37: syntax error, unexpected \'@\'\n        forever @(negedge clk) begin\n                ^\n%Error: data/full_repos/permissive/485312426/sim/CordicComputer_TB.v:41: syntax error, unexpected end\n    end\n    ^~~\n%Error: Exiting due to 2 error(s), 4 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module CordicComputer_TB;
    reg  clk, rstn;
    wire rst = ~rstn;
    parameter W2 = 18;
    `define M_PI (3.14159265358979323846)
    `define DTOR (`M_PI / 180.0)

    always begin
        clk = 0 ; #5 ;
        clk = 1 ; #5 ;
    end


    initial begin
        rstn      = 1'b0 ;
        #8 ;      rstn      = 1'b1 ;
    end

    function integer scaleDegree;
        input real deg;
        begin
            scaleDegree = ($pow(2, W2 - 2) / 45.0) * deg;
            $display("deg = %.1f, scaleDegree = %d, cos = %f, sin = %f\n", deg, scaleDegree, $cos(deg * `DTOR), $sin(deg * `DTOR));
        end
    endfunction

    reg [19:0] io_in_a;
    wire [17:0] io_out_s;
    wire [17:0] io_out_c;


    integer i = 0;
    real sin, cos;
    initial begin
        #8;
        forever @(negedge clk) begin
            io_in_a = scaleDegree(1.0 * i);
            i = i + 1;
        end
    end

    always @(posedge clk) begin
        sin = io_out_s / $pow(2, 16);
        cos = io_out_c / $pow(2, 16);
    end


    CordicComputer uut (
      .clock            (clk),
      .reset            (rst),
      .io_in_a          (io_in_a),
      .io_out_s         (io_out_s),
      .io_out_c         (io_out_c)
     );
endmodule
module CordicComputer_TB;

    reg  clk, rstn;
    wire rst = ~rstn;
    parameter W2 = 18;
    `define M_PI (3.14159265358979323846)
    `define DTOR (`M_PI / 180.0)

    always begin
        clk = 0 ; #5 ;
        clk = 1 ; #5 ;
    end


    initial begin
        rstn      = 1'b0 ;
        #8 ;      rstn      = 1'b1 ;
    end

    function integer scaleDegree;
        input real deg;
        begin
            scaleDegree = ($pow(2, W2 - 2) / 45.0) * deg;
            $display("deg = %.1f, scaleDegree = %d, cos = %f, sin = %f\n", deg, scaleDegree, $cos(deg * `DTOR), $sin(deg * `DTOR));
        end
    endfunction

    reg [19:0] io_in_a;
    wire [17:0] io_out_s;
    wire [17:0] io_out_c;


    integer i = 0;
    real sin, cos;
    initial begin
        #8;
        forever @(negedge clk) begin
            io_in_a = scaleDegree(1.0 * i);
            i = i + 1;
        end
    end

    always @(posedge clk) begin
        sin = io_out_s / $pow(2, 16);
        cos = io_out_c / $pow(2, 16);
    end


    CordicComputer uut (
      .clock            (clk),
      .reset            (rst),
      .io_in_a          (io_in_a),
      .io_out_s         (io_out_s),
      .io_out_c         (io_out_c)
     );
endmodule