data/full_repos/permissive/42434302/ivltests/unary_not.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/unary_not.v:26: Unsupported: Ignoring delay on this delayed statement.\n      #1 if (tmp !== 8\'b00000000) begin\n      ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/unary_not.v:33: Unsupported: Ignoring delay on this delayed statement.\n      #1 if (tmp !== 8\'b11111111) begin\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/unary_not.v:40: Unsupported: Ignoring delay on this delayed statement.\n      #1 if (tmp !== 8\'b00000000) begin\n      ^\n%Error: Exiting due to 3 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module main;

   reg [7:0] tmp;

   initial begin
      tmp = 8'b0;
      #1 if (tmp !== 8'b00000000) begin
	 $display("FAILED to set tmp: %b", tmp);
	 $finish;
      end

      tmp <= ~ 8'b0;

      #1 if (tmp !== 8'b11111111) begin
	 $display("FAILED to set ~0: %b", tmp);
	 $finish;
      end

      tmp <= ~tmp;

      #1 if (tmp !== 8'b00000000) begin
	 $display("FAILED to invert tmp: %b", tmp);
	 $finish;
      end

      $display("PASSED");
   end
endmodule
module main;


   reg [7:0] tmp;

   initial begin
      tmp = 8'b0;
      #1 if (tmp !== 8'b00000000) begin
	 $display("FAILED to set tmp: %b", tmp);
	 $finish;
      end

      tmp <= ~ 8'b0;

      #1 if (tmp !== 8'b11111111) begin
	 $display("FAILED to set ~0: %b", tmp);
	 $finish;
      end

      tmp <= ~tmp;

      #1 if (tmp !== 8'b00000000) begin
	 $display("FAILED to invert tmp: %b", tmp);
	 $finish;
      end

      $display("PASSED");
   end
endmodule