data/full_repos/permissive/455706578/bondmachine-src/bondmachine.sv
data/verilator_xmls/30d9174f-0823-424c-b6a5-d9529d98a82f.xml
module bondmachine(clk, reset, i0, o0);


	input clk, reset;
	input [7:0] i0;

	output [7:0] o0;



	wire [7:0] p0o0;
	wire p0o0_valid;
	wire p0o0_received;
	wire [7:0] i0;
	wire i0_valid;
	wire i0_received;



	a0 a0_inst(clk, reset, i0, i0_valid, i0_received, p0o0, p0o0_valid, p0o0_received);

	assign o0 = p0o0;

endmodule
module bondmachine(clk, reset, i0, o0);



	input clk, reset;
	input [7:0] i0;

	output [7:0] o0;



	wire [7:0] p0o0;
	wire p0o0_valid;
	wire p0o0_received;
	wire [7:0] i0;
	wire i0_valid;
	wire i0_received;



	a0 a0_inst(clk, reset, i0, i0_valid, i0_received, p0o0, p0o0_valid, p0o0_received);

	assign o0 = p0o0;

endmodule