data/full_repos/permissive/425573648/fpga/motor_rpm_count.v
1: b'%Warning-WIDTH: data/full_repos/permissive/425573648/fpga/motor_rpm_count.v:29: Operator EQ expects 32 bits on the RHS, but RHS\'s CONST \'31\'h0\' generates 31 bits.\n                                                                              : ... In instance motor_rpm_count\n  if (pulse_count == 31\'d0)\n                  ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module motor_rpm_count(
	input clk,
	input motor_rot_pulse,
	output wire [15:0]rpm_output
);


reg [31:0]pulse_count;


always @(posedge clk)
	begin
		if (pulse_count == 31'd0)
			begin
				pulse_count <= 31'd50_000_000 - 1;
			end
		else
			begin
				pulse_count <= pulse_count - 1;
			end
	end


reg last_scan_value;


always @(posedge clk)
	begin
		last_scan_value <= motor_rot_pulse;
	end


reg [15:0]pulse_count_qty;
reg [15:0]output_count_qty;

always @(posedge clk)
	begin
		if (pulse_count == 0)
			begin

				output_count_qty <= pulse_count_qty;
				pulse_count_qty <= 0;
			end
		else if (~last_scan_value && motor_rot_pulse)
			begin

				pulse_count_qty <= pulse_count_qty + 1;
			end
	end
	

assign rpm_output = output_count_qty;
	
endmodule
module motor_rpm_count(
	input clk,
	input motor_rot_pulse,
	output wire [15:0]rpm_output
);



reg [31:0]pulse_count;


always @(posedge clk)
	begin
		if (pulse_count == 31'd0)
			begin
				pulse_count <= 31'd50_000_000 - 1;
			end
		else
			begin
				pulse_count <= pulse_count - 1;
			end
	end


reg last_scan_value;


always @(posedge clk)
	begin
		last_scan_value <= motor_rot_pulse;
	end


reg [15:0]pulse_count_qty;
reg [15:0]output_count_qty;

always @(posedge clk)
	begin
		if (pulse_count == 0)
			begin

				output_count_qty <= pulse_count_qty;
				pulse_count_qty <= 0;
			end
		else if (~last_scan_value && motor_rot_pulse)
			begin

				pulse_count_qty <= pulse_count_qty + 1;
			end
	end
	

assign rpm_output = output_count_qty;
	
endmodule