data/full_repos/permissive/517493654/04-Vision/DE10_LITE_D8M_VIP_16/ip/EEE_IMGPROC/building_distance.v
1: b'%Warning-WIDTH: data/full_repos/permissive/517493654/04-Vision/DE10_LITE_D8M_VIP_16/ip/EEE_IMGPROC/building_distance.v:238: Operator ASSIGNDLY expects 2 bits on the Assign RHS, but Assign RHS\'s VARREF \'left_slot\' generates 5 bits.\n                                                                                                                          : ... In instance buildiing_distance_cal\n  left_slot_1 <= left_slot;\n              ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/517493654/04-Vision/DE10_LITE_D8M_VIP_16/ip/EEE_IMGPROC/building_distance.v:239: Operator ASSIGNDLY expects 2 bits on the Assign RHS, but Assign RHS\'s VARREF \'right_slot\' generates 5 bits.\n                                                                                                                          : ... In instance buildiing_distance_cal\n  right_slot_1 <= right_slot;\n               ^~\n%Warning-WIDTH: data/full_repos/permissive/517493654/04-Vision/DE10_LITE_D8M_VIP_16/ip/EEE_IMGPROC/building_distance.v:262: Operator DIV expects 12 bits on the RHS, but RHS\'s VARREF \'stripe_width\' generates 11 bits.\n                                                                                                                          : ... In instance buildiing_distance_cal\n  total_slot= ((right_most_bound - left_most_bound) / stripe_width );\n                                                    ^\n%Error: Exiting due to 3 warning(s)\n'
module buildiing_distance_cal
(




	input clk,
    input [4:0] center_slot,
	input [4:0] left_slot,
	input [4:0] right_slot,
    input [10:0] f_slot_7_blackToWhite,
    input [10:0] f_slot_8_blackToWhite,
    input [10:0] f_slot_9_blackToWhite,
    input [10:0] f_slot_10_blackToWhite,

    input [10:0] f_slot_7_whiteToBlack,
    input [10:0] f_slot_8_whiteToBlack,
    input [10:0] f_slot_9_whiteToBlack,
    input [10:0] f_slot_10_whiteToBlack,


	input [10:0] left_most_bound,
	input [10:0] right_most_bound,

    input eop,
    
    output reg valid,
    output reg formate,
    output reg [10:0] target_center_x_pixel,
    output reg [11:0] distance,
	output reg [11:0] diameter,
    
    output reg [10:0] slot_7,
    output reg [10:0] slot_8,
    output reg [10:0] slot_9,
    output reg [10:0] slot_10,

    output reg [1:0] slot_7_WB,
    output reg [1:0] slot_8_WB,
    output reg [1:0] slot_9_WB,
    output reg [1:0] slot_10_WB,
	output reg [10:0] stripe_width


);
parameter IMAGE_W = 11'd640;
parameter cali_size = 11'd70;
parameter cali_distance = 11'd30;



reg [4:0] count_slots;
reg [10:9] left_slot_1, right_slot_1;
reg [11:0] total_slot;
reg [10:0] tmp_white_width, tmp_black_width;
reg [10:0] min_white_width, min_black_width;
reg [4:0] first_wb, first_bw;
wire [10:0] min_slot_7, min_slot_8, min_slot_9, min_slot_10;
reg [10:0] max_width_inside_slot;



wire [10:0] c_1, c_2, c_3, c_4;
assign min_slot_7 = (slot_7_WB == 3)? (f_slot_7_blackToWhite > f_slot_7_whiteToBlack) ? (f_slot_7_blackToWhite - f_slot_7_whiteToBlack) : (f_slot_7_whiteToBlack - f_slot_7_blackToWhite) : 0;
assign min_slot_8 = (slot_8_WB == 3)? (f_slot_8_blackToWhite > f_slot_8_whiteToBlack) ? (f_slot_8_blackToWhite - f_slot_8_whiteToBlack) : (f_slot_8_whiteToBlack - f_slot_8_blackToWhite) : 0;
assign min_slot_9 = (slot_9_WB == 3)? (f_slot_9_blackToWhite > f_slot_9_whiteToBlack) ? (f_slot_9_blackToWhite - f_slot_9_whiteToBlack) : (f_slot_9_whiteToBlack - f_slot_9_blackToWhite) : 0;
assign min_slot_10 = (slot_10_WB == 3)? (f_slot_10_blackToWhite > f_slot_10_whiteToBlack) ? (f_slot_10_blackToWhite - f_slot_10_whiteToBlack) : (f_slot_10_whiteToBlack - f_slot_10_blackToWhite) : 0;






assign c_1 = min_slot_7;
assign c_2 = (min_slot_8 > c_1) ? min_slot_8 : c_1;
assign c_3 = (min_slot_9 > c_2 ) ? min_slot_9 : c_2;
assign c_4 = (min_slot_10 > c_3) ? min_slot_10 : c_3; 
always @(*) begin
       





			
		
		slot_7 =(f_slot_7_blackToWhite != 0)? f_slot_7_blackToWhite : (f_slot_7_whiteToBlack != 0)? f_slot_7_whiteToBlack : 0;
		slot_7_WB = ((f_slot_7_blackToWhite != 0) && (f_slot_7_whiteToBlack != 0))? 3: 
					(f_slot_7_blackToWhite != 0)? 2 :
					(f_slot_7_whiteToBlack != 0)? 1 : 0;
		
		slot_8 = (f_slot_8_blackToWhite != 0)? f_slot_8_blackToWhite : (f_slot_8_whiteToBlack != 0)? f_slot_8_whiteToBlack : 0;
		slot_8_WB = ((f_slot_8_blackToWhite != 0) && (f_slot_8_whiteToBlack != 0))? 3: 
					(f_slot_8_blackToWhite != 0)? 2 : 
					(f_slot_8_whiteToBlack != 0)? 1 : 0;

		slot_9 = (f_slot_9_blackToWhite != 0)? f_slot_9_blackToWhite : (f_slot_9_whiteToBlack != 0)? f_slot_9_whiteToBlack : 0;
		slot_9_WB = ((f_slot_9_blackToWhite != 0) && (f_slot_9_whiteToBlack != 0))? 3: 
					(f_slot_9_blackToWhite != 0)? 2 : 
					(f_slot_9_whiteToBlack != 0)? 1 : 0;

		slot_10 = (f_slot_10_blackToWhite != 0)? f_slot_10_blackToWhite : (f_slot_10_whiteToBlack != 0)? f_slot_10_whiteToBlack : 0;
		slot_10_WB = 	((f_slot_7_blackToWhite != 0) && (f_slot_7_whiteToBlack != 0))? 3: 
						(f_slot_10_blackToWhite != 0)? 2 : 
						(f_slot_10_whiteToBlack != 0)? 1 : 0;
		
		
		first_wb = 0;
		first_bw = 0;
		tmp_white_width = 900;
		tmp_black_width = 900;
		min_white_width = 900;
		min_black_width = 900;
		max_width_inside_slot = 0;
		
		if(~(min_slot_7 != 0 || min_slot_8 != 0 || min_slot_9 != 0 || min_slot_10 != 0))  begin

			if(slot_7_WB == 1)begin
				first_wb = 7;
			end
			else if(slot_7_WB == 2)begin
				first_bw = 7;
			end


			if(slot_8_WB == 1)begin

				if(first_bw != 0)begin

					tmp_white_width = slot_8 - slot_7;
				end 

				first_wb = 8;
				if(min_white_width > tmp_white_width)begin
					min_white_width = tmp_white_width;
				end
			end

			else if(slot_8_WB == 2)begin

				if(first_wb != 0)begin

					tmp_black_width = slot_8 - slot_7;
				end

				first_bw = 8;
				if(min_black_width > tmp_black_width)begin
					min_black_width = tmp_black_width;
				end
			end


			if(slot_9_WB == 1)begin

				if(first_bw != 0)begin
					if(first_bw == 7)begin


						tmp_white_width = slot_9 - slot_7;
					end
					else begin


						tmp_white_width = slot_9 - slot_8;
					end
					
				end
				first_wb = 9;
				if(min_white_width > tmp_white_width)begin
					min_white_width = tmp_white_width;
				end
			end
			else if(slot_9_WB == 2)begin

				if(first_wb != 0)begin
					if(first_wb == 7)begin

						tmp_black_width = slot_9 - slot_7;
					end
					else begin


						tmp_black_width = slot_9 - slot_8;
					end
					
				end
				first_bw = 9;
				if(min_black_width > tmp_black_width)begin
					min_black_width = tmp_black_width;
				end
			end
		


			if(slot_10_WB == 1)begin

				if(first_bw != 0)begin
					if(first_bw == 7)begin
						tmp_white_width = slot_9 - slot_7;
					end
					else if(first_bw == 8) begin
						tmp_white_width = slot_10 - slot_8;
					end
					else begin

						tmp_white_width = slot_10 - slot_9;
					end
				end
				if(min_white_width > tmp_white_width)begin
					min_white_width = tmp_white_width;
				end
			end
			else if(slot_10_WB == 2)begin

				if(first_wb != 0)begin
					if(first_wb == 7)begin
						tmp_black_width = slot_10 - slot_7;
					end
					else if(first_wb == 8)begin
						tmp_black_width = slot_10 - slot_8;
					end
					else begin

						tmp_black_width = slot_10 - slot_9;
					end
				end
				if(min_black_width > tmp_black_width)begin
					min_black_width = tmp_black_width;
				end
			end
		end
		
end


always @(posedge clk) begin
    if(eop)begin
		left_slot_1 <= left_slot;
		right_slot_1 <= right_slot;
	end
end



always @(*) begin
    if(eop)begin
		stripe_width = (min_slot_7 != 0 || min_slot_8 != 0 || min_slot_9 != 0 || min_slot_10 != 0)? c_4 : (min_black_width> min_white_width) ? tmp_white_width : tmp_black_width;
        distance = ((cali_size * cali_distance) / (stripe_width*2));
        valid = 	(left_slot <= 1 && right_slot >= 15 )? 0 :


					(right_slot - left_slot <= 2)? 0 : 1;



			


        formate = (center_slot == 8 || center_slot == 9);
        target_center_x_pixel = 40 * center_slot - 20;

		total_slot= ((right_most_bound - left_most_bound) / stripe_width );
		diameter = total_slot * 2;

    end
end
endmodule
module buildiing_distance_cal
(




	input clk,
    input [4:0] center_slot,
	input [4:0] left_slot,
	input [4:0] right_slot,
    input [10:0] f_slot_7_blackToWhite,
    input [10:0] f_slot_8_blackToWhite,
    input [10:0] f_slot_9_blackToWhite,
    input [10:0] f_slot_10_blackToWhite,

    input [10:0] f_slot_7_whiteToBlack,
    input [10:0] f_slot_8_whiteToBlack,
    input [10:0] f_slot_9_whiteToBlack,
    input [10:0] f_slot_10_whiteToBlack,


	input [10:0] left_most_bound,
	input [10:0] right_most_bound,

    input eop,
    
    output reg valid,
    output reg formate,
    output reg [10:0] target_center_x_pixel,
    output reg [11:0] distance,
	output reg [11:0] diameter,
    
    output reg [10:0] slot_7,
    output reg [10:0] slot_8,
    output reg [10:0] slot_9,
    output reg [10:0] slot_10,

    output reg [1:0] slot_7_WB,
    output reg [1:0] slot_8_WB,
    output reg [1:0] slot_9_WB,
    output reg [1:0] slot_10_WB,
	output reg [10:0] stripe_width


);

parameter IMAGE_W = 11'd640;
parameter cali_size = 11'd70;
parameter cali_distance = 11'd30;



reg [4:0] count_slots;
reg [10:9] left_slot_1, right_slot_1;
reg [11:0] total_slot;
reg [10:0] tmp_white_width, tmp_black_width;
reg [10:0] min_white_width, min_black_width;
reg [4:0] first_wb, first_bw;
wire [10:0] min_slot_7, min_slot_8, min_slot_9, min_slot_10;
reg [10:0] max_width_inside_slot;



wire [10:0] c_1, c_2, c_3, c_4;
assign min_slot_7 = (slot_7_WB == 3)? (f_slot_7_blackToWhite > f_slot_7_whiteToBlack) ? (f_slot_7_blackToWhite - f_slot_7_whiteToBlack) : (f_slot_7_whiteToBlack - f_slot_7_blackToWhite) : 0;
assign min_slot_8 = (slot_8_WB == 3)? (f_slot_8_blackToWhite > f_slot_8_whiteToBlack) ? (f_slot_8_blackToWhite - f_slot_8_whiteToBlack) : (f_slot_8_whiteToBlack - f_slot_8_blackToWhite) : 0;
assign min_slot_9 = (slot_9_WB == 3)? (f_slot_9_blackToWhite > f_slot_9_whiteToBlack) ? (f_slot_9_blackToWhite - f_slot_9_whiteToBlack) : (f_slot_9_whiteToBlack - f_slot_9_blackToWhite) : 0;
assign min_slot_10 = (slot_10_WB == 3)? (f_slot_10_blackToWhite > f_slot_10_whiteToBlack) ? (f_slot_10_blackToWhite - f_slot_10_whiteToBlack) : (f_slot_10_whiteToBlack - f_slot_10_blackToWhite) : 0;






assign c_1 = min_slot_7;
assign c_2 = (min_slot_8 > c_1) ? min_slot_8 : c_1;
assign c_3 = (min_slot_9 > c_2 ) ? min_slot_9 : c_2;
assign c_4 = (min_slot_10 > c_3) ? min_slot_10 : c_3; 
always @(*) begin
       





			
		
		slot_7 =(f_slot_7_blackToWhite != 0)? f_slot_7_blackToWhite : (f_slot_7_whiteToBlack != 0)? f_slot_7_whiteToBlack : 0;
		slot_7_WB = ((f_slot_7_blackToWhite != 0) && (f_slot_7_whiteToBlack != 0))? 3: 
					(f_slot_7_blackToWhite != 0)? 2 :
					(f_slot_7_whiteToBlack != 0)? 1 : 0;
		
		slot_8 = (f_slot_8_blackToWhite != 0)? f_slot_8_blackToWhite : (f_slot_8_whiteToBlack != 0)? f_slot_8_whiteToBlack : 0;
		slot_8_WB = ((f_slot_8_blackToWhite != 0) && (f_slot_8_whiteToBlack != 0))? 3: 
					(f_slot_8_blackToWhite != 0)? 2 : 
					(f_slot_8_whiteToBlack != 0)? 1 : 0;

		slot_9 = (f_slot_9_blackToWhite != 0)? f_slot_9_blackToWhite : (f_slot_9_whiteToBlack != 0)? f_slot_9_whiteToBlack : 0;
		slot_9_WB = ((f_slot_9_blackToWhite != 0) && (f_slot_9_whiteToBlack != 0))? 3: 
					(f_slot_9_blackToWhite != 0)? 2 : 
					(f_slot_9_whiteToBlack != 0)? 1 : 0;

		slot_10 = (f_slot_10_blackToWhite != 0)? f_slot_10_blackToWhite : (f_slot_10_whiteToBlack != 0)? f_slot_10_whiteToBlack : 0;
		slot_10_WB = 	((f_slot_7_blackToWhite != 0) && (f_slot_7_whiteToBlack != 0))? 3: 
						(f_slot_10_blackToWhite != 0)? 2 : 
						(f_slot_10_whiteToBlack != 0)? 1 : 0;
		
		
		first_wb = 0;
		first_bw = 0;
		tmp_white_width = 900;
		tmp_black_width = 900;
		min_white_width = 900;
		min_black_width = 900;
		max_width_inside_slot = 0;
		
		if(~(min_slot_7 != 0 || min_slot_8 != 0 || min_slot_9 != 0 || min_slot_10 != 0))  begin

			if(slot_7_WB == 1)begin
				first_wb = 7;
			end
			else if(slot_7_WB == 2)begin
				first_bw = 7;
			end


			if(slot_8_WB == 1)begin

				if(first_bw != 0)begin

					tmp_white_width = slot_8 - slot_7;
				end 

				first_wb = 8;
				if(min_white_width > tmp_white_width)begin
					min_white_width = tmp_white_width;
				end
			end

			else if(slot_8_WB == 2)begin

				if(first_wb != 0)begin

					tmp_black_width = slot_8 - slot_7;
				end

				first_bw = 8;
				if(min_black_width > tmp_black_width)begin
					min_black_width = tmp_black_width;
				end
			end


			if(slot_9_WB == 1)begin

				if(first_bw != 0)begin
					if(first_bw == 7)begin


						tmp_white_width = slot_9 - slot_7;
					end
					else begin


						tmp_white_width = slot_9 - slot_8;
					end
					
				end
				first_wb = 9;
				if(min_white_width > tmp_white_width)begin
					min_white_width = tmp_white_width;
				end
			end
			else if(slot_9_WB == 2)begin

				if(first_wb != 0)begin
					if(first_wb == 7)begin

						tmp_black_width = slot_9 - slot_7;
					end
					else begin


						tmp_black_width = slot_9 - slot_8;
					end
					
				end
				first_bw = 9;
				if(min_black_width > tmp_black_width)begin
					min_black_width = tmp_black_width;
				end
			end
		


			if(slot_10_WB == 1)begin

				if(first_bw != 0)begin
					if(first_bw == 7)begin
						tmp_white_width = slot_9 - slot_7;
					end
					else if(first_bw == 8) begin
						tmp_white_width = slot_10 - slot_8;
					end
					else begin

						tmp_white_width = slot_10 - slot_9;
					end
				end
				if(min_white_width > tmp_white_width)begin
					min_white_width = tmp_white_width;
				end
			end
			else if(slot_10_WB == 2)begin

				if(first_wb != 0)begin
					if(first_wb == 7)begin
						tmp_black_width = slot_10 - slot_7;
					end
					else if(first_wb == 8)begin
						tmp_black_width = slot_10 - slot_8;
					end
					else begin

						tmp_black_width = slot_10 - slot_9;
					end
				end
				if(min_black_width > tmp_black_width)begin
					min_black_width = tmp_black_width;
				end
			end
		end
		
end


always @(posedge clk) begin
    if(eop)begin
		left_slot_1 <= left_slot;
		right_slot_1 <= right_slot;
	end
end



always @(*) begin
    if(eop)begin
		stripe_width = (min_slot_7 != 0 || min_slot_8 != 0 || min_slot_9 != 0 || min_slot_10 != 0)? c_4 : (min_black_width> min_white_width) ? tmp_white_width : tmp_black_width;
        distance = ((cali_size * cali_distance) / (stripe_width*2));
        valid = 	(left_slot <= 1 && right_slot >= 15 )? 0 :


					(right_slot - left_slot <= 2)? 0 : 1;



			


        formate = (center_slot == 8 || center_slot == 9);
        target_center_x_pixel = 40 * center_slot - 20;

		total_slot= ((right_most_bound - left_most_bound) / stripe_width );
		diameter = total_slot * 2;

    end
end
endmodule