data/full_repos/permissive/42835347/EMU_Basic_Project/src/mojo_top.v
1: b'%Warning-IMPLICIT: data/full_repos/permissive/42835347/EMU_Basic_Project/src/mojo_top.v:25: Signal definition not found, creating implicitly: \'CLK\'\n                                                                                          : ... Suggested alternative: \'DMCLK\'\nassign CLK = clk;\n       ^~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/42835347/EMU_Basic_Project/src/mojo_top.v:40: Cannot find file containing module: \'DigiMic_Interface\'\nDigiMic_Interface DigiMic_Interface_Instance(\n^~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/42835347/EMU_Basic_Project/src,data/full_repos/permissive/42835347/DigiMic_Interface\n             data/full_repos/permissive/42835347/EMU_Basic_Project/src,data/full_repos/permissive/42835347/DigiMic_Interface.v\n             data/full_repos/permissive/42835347/EMU_Basic_Project/src,data/full_repos/permissive/42835347/DigiMic_Interface.sv\n             DigiMic_Interface\n             DigiMic_Interface.v\n             DigiMic_Interface.sv\n             obj_dir/DigiMic_Interface\n             obj_dir/DigiMic_Interface.v\n             obj_dir/DigiMic_Interface.sv\n%Error: data/full_repos/permissive/42835347/EMU_Basic_Project/src/mojo_top.v:61: Cannot find file containing module: \'FFT_Module\'\nFFT_Module FFT_Module_Instance(\n^~~~~~~~~~\n%Error: data/full_repos/permissive/42835347/EMU_Basic_Project/src/mojo_top.v:79: Cannot find file containing module: \'DM_TLV5619_DAC_Interface_Module\'\nDM_TLV5619_DAC_Interface_Module DM_TLV5619_DAC_Interface_Module_Instance(\n^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 3 error(s), 1 warning(s)\n'
module mojo_top(

    input clk,
    
    input user_switch,
    output user_led0,
    output user_led1,
	 
    output [11:0] DACD,
	  output DACCS,
	  output DACWE,
	  output DACLDAC,
	  output DACPD, 
	  input  DMDATA1,
	  input  DMDATA2,
    input  DMDATA3,
    input  DMDATA4,
    output DMCLK,
  
    input  [13:0] FioSp
    );

wire rst = user_switch;

assign CLK = clk;

wire        SampleDelayZero; 
wire [9:0]  DMLocationWritingTo;
wire [8:0]  DesiredDMInterfaceOutput; 
wire [9:0]  DesiredDMMemoryLocationToRead;

assign DACD[11:0] = DACDataInput[11:0];
assign user_led0  = 1'b0;
assign user_led1  = DACDataInput[10];



wire [1:0]     DesiredDM;

DigiMic_Interface DigiMic_Interface_Instance(
.CLK(CLK), 
.DesiredDMMemoryLocationToRead(DesiredDMMemoryLocationToRead),
.DMLocationWritingTo(DMLocationWritingTo), 
.SampleDelayZero(SampleDelayZero),
.DesiredDMInterfaceOutput(DesiredDMInterfaceOutput),
.DMCLK(DMCLK),
.DMDATA1(DMDATA1),
.DMDATA2(DMDATA2),
.DMDATA3(DMDATA3),
.DMDATA4(DMDATA4),
.DesiredDM(DesiredDM)
);



wire           IFFTOutputWE;
wire [8:0]     IFFTOutputIndex;
wire [11:0]    IFFTOutput; 


FFT_Module FFT_Module_Instance(
.CLK(CLK),  
.DesiredDMInterfaceOutput(DesiredDMInterfaceOutput),
.DesiredDMMemoryLocationToRead(DesiredDMMemoryLocationToRead),
.DMLocationWritingTo(DMLocationWritingTo),
.IFFTOutputWE(IFFTOutputWE),
.IFFTOutputIndex(IFFTOutputIndex),
.IFFTOutput(IFFTOutput),
.SampleDelayZero(SampleDelayZero),
.DesiredDM(DesiredDM),
.rst(rst),
.FioSp(FioSp)
);



wire [11:0] DACDataInput;

DM_TLV5619_DAC_Interface_Module DM_TLV5619_DAC_Interface_Module_Instance(
.DACDataInput(DACDataInput),
.DACCS(DACCS),
.CLK(CLK),
.SampleDelayZero(SampleDelayZero),
.DACLDAC(DACLDAC),
.DACPD(DACPD),
.DACWE(DACWE),
.IFFTOutput(IFFTOutput),
.DMLocationWritingTo(DMLocationWritingTo),
.IFFTOutputWE(IFFTOutputWE),
.IFFTOutputIndex(IFFTOutputIndex)
);






endmodule
module mojo_top(

    input clk,
    
    input user_switch,
    output user_led0,
    output user_led1,
	 
    output [11:0] DACD,
	  output DACCS,
	  output DACWE,
	  output DACLDAC,
	  output DACPD, 
	  input  DMDATA1,
	  input  DMDATA2,
    input  DMDATA3,
    input  DMDATA4,
    output DMCLK,
  
    input  [13:0] FioSp
    );


wire rst = user_switch;

assign CLK = clk;

wire        SampleDelayZero; 
wire [9:0]  DMLocationWritingTo;
wire [8:0]  DesiredDMInterfaceOutput; 
wire [9:0]  DesiredDMMemoryLocationToRead;

assign DACD[11:0] = DACDataInput[11:0];
assign user_led0  = 1'b0;
assign user_led1  = DACDataInput[10];



wire [1:0]     DesiredDM;

DigiMic_Interface DigiMic_Interface_Instance(
.CLK(CLK), 
.DesiredDMMemoryLocationToRead(DesiredDMMemoryLocationToRead),
.DMLocationWritingTo(DMLocationWritingTo), 
.SampleDelayZero(SampleDelayZero),
.DesiredDMInterfaceOutput(DesiredDMInterfaceOutput),
.DMCLK(DMCLK),
.DMDATA1(DMDATA1),
.DMDATA2(DMDATA2),
.DMDATA3(DMDATA3),
.DMDATA4(DMDATA4),
.DesiredDM(DesiredDM)
);



wire           IFFTOutputWE;
wire [8:0]     IFFTOutputIndex;
wire [11:0]    IFFTOutput; 


FFT_Module FFT_Module_Instance(
.CLK(CLK),  
.DesiredDMInterfaceOutput(DesiredDMInterfaceOutput),
.DesiredDMMemoryLocationToRead(DesiredDMMemoryLocationToRead),
.DMLocationWritingTo(DMLocationWritingTo),
.IFFTOutputWE(IFFTOutputWE),
.IFFTOutputIndex(IFFTOutputIndex),
.IFFTOutput(IFFTOutput),
.SampleDelayZero(SampleDelayZero),
.DesiredDM(DesiredDM),
.rst(rst),
.FioSp(FioSp)
);



wire [11:0] DACDataInput;

DM_TLV5619_DAC_Interface_Module DM_TLV5619_DAC_Interface_Module_Instance(
.DACDataInput(DACDataInput),
.DACCS(DACCS),
.CLK(CLK),
.SampleDelayZero(SampleDelayZero),
.DACLDAC(DACLDAC),
.DACPD(DACPD),
.DACWE(DACWE),
.IFFTOutput(IFFTOutput),
.DMLocationWritingTo(DMLocationWritingTo),
.IFFTOutputWE(IFFTOutputWE),
.IFFTOutputIndex(IFFTOutputIndex)
);






endmodule