data/full_repos/permissive/496903659/114 exams#2014_q4b.v
1: b'%Error: Cannot find file containing module: data/full_repos/permissive/496903659/114\n        ... Looked in:\n             data/full_repos/permissive/496903659,data/full_repos/permissive/496903659/data/full_repos/permissive/496903659/114\n             data/full_repos/permissive/496903659,data/full_repos/permissive/496903659/data/full_repos/permissive/496903659/114.v\n             data/full_repos/permissive/496903659,data/full_repos/permissive/496903659/data/full_repos/permissive/496903659/114.sv\n             data/full_repos/permissive/496903659/114\n             data/full_repos/permissive/496903659/114.v\n             data/full_repos/permissive/496903659/114.sv\n             obj_dir/data/full_repos/permissive/496903659/114\n             obj_dir/data/full_repos/permissive/496903659/114.v\n             obj_dir/data/full_repos/permissive/496903659/114.sv\n%Error: Cannot find file containing module: exams#2014_q4b.v\n%Error: Exiting due to 2 error(s)\n'
module top_module (
    input [3:0] SW,
    input [3:0] KEY,
    output reg [3:0] LEDR
);
    wire [3:0] R = SW;
    wire clk = KEY[0];
    wire E = KEY[1];
    wire L = KEY[2];
    wire w = KEY[3];

    MUXDFF obj[3:0]({4{clk}}, {4{E}}, {4{L}}, {w, LEDR[3:1]}, R, LEDR);
endmodule
module top_module (
    input [3:0] SW,
    input [3:0] KEY,
    output reg [3:0] LEDR
);

    wire [3:0] R = SW;
    wire clk = KEY[0];
    wire E = KEY[1];
    wire L = KEY[2];
    wire w = KEY[3];

    MUXDFF obj[3:0]({4{clk}}, {4{E}}, {4{L}}, {w, LEDR[3:1]}, R, LEDR);
endmodule