data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules/DEMUX_169.v
data/verilator_xmls/b502e970-ce9b-4d22-8d2c-203b28ecba4c.xml
module DEMUX_169 #(parameter INPUT_DATA_WIDTH =8, BITWIDTH_SEL=9)(


input [INPUT_DATA_WIDTH-1:0] DEMUX_Data_in,
input [BITWIDTH_SEL-1:0] DEMUX_selector,
input DEMUX_En,


output [INPUT_DATA_WIDTH-1:0] DEMUX_out0,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out1,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out2,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out3,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out4,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out5,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out6,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out7,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out8,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out9,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out10,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out11,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out12,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out13,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out14,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out15,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out16,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out17,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out18,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out19,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out20,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out21,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out22,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out23,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out24,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out25,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out26,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out27,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out28,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out29,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out30,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out31,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out32,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out33,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out34,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out35


);






localparam [INPUT_DATA_WIDTH-1:0] DATA0 = 0;


















assign DEMUX_out0 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd0 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out1 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd1 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out2 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd2 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out3 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd3 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out4 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd4 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out5 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd5 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out6 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd6 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out7 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd7 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out8 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd8 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out9 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd9 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out10 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd10 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out11 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd11 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out12 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd12 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out13 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd13 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out14 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd14 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out15 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd15 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out16 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd16 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out17 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd17 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out18 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd18 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out19 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd19 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out20 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd20 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out21 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd21 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out22 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd22 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out23 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd23 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out24 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd24 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out25 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd25 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out26 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd26 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out27 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd27 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out28 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd28 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out29 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd29 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out30 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd30 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out31 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd31 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out32 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd32 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out33 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd33 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out34 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd34 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out35 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd35 ? DEMUX_Data_in : DATA0 : DATA0;


endmodule
module DEMUX_169 #(parameter INPUT_DATA_WIDTH =8, BITWIDTH_SEL=9)(


input [INPUT_DATA_WIDTH-1:0] DEMUX_Data_in,
input [BITWIDTH_SEL-1:0] DEMUX_selector,
input DEMUX_En,


output [INPUT_DATA_WIDTH-1:0] DEMUX_out0,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out1,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out2,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out3,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out4,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out5,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out6,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out7,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out8,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out9,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out10,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out11,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out12,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out13,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out14,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out15,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out16,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out17,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out18,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out19,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out20,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out21,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out22,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out23,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out24,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out25,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out26,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out27,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out28,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out29,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out30,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out31,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out32,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out33,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out34,
output [INPUT_DATA_WIDTH-1:0] DEMUX_out35


);







localparam [INPUT_DATA_WIDTH-1:0] DATA0 = 0;


















assign DEMUX_out0 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd0 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out1 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd1 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out2 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd2 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out3 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd3 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out4 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd4 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out5 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd5 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out6 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd6 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out7 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd7 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out8 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd8 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out9 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd9 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out10 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd10 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out11 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd11 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out12 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd12 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out13 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd13 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out14 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd14 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out15 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd15 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out16 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd16 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out17 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd17 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out18 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd18 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out19 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd19 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out20 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd20 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out21 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd21 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out22 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd22 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out23 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd23 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out24 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd24 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out25 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd25 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out26 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd26 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out27 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd27 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out28 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd28 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out29 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd29 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out30 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd30 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out31 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd31 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out32 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd32 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out33 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd33 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out34 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd34 ? DEMUX_Data_in : DATA0 : DATA0;
assign DEMUX_out35 = DEMUX_En == 1'b1 ? DEMUX_selector == 9'd35 ? DEMUX_Data_in : DATA0 : DATA0;


endmodule