data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v
1: b'%Warning-LITENDIAN: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:8: Little bit endian vector: MSB < LSB of bit range: 0:15\nwire [15:0][0:15] mayukh;\n           ^\n                    ... Use "/* verilator lint_off LITENDIAN */" and lint_on around source to disable this message.\n%Warning-LITENDIAN: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:9: Little bit endian vector: MSB < LSB of bit range: 0:15\nwire [15:0][0:15] temp; \n           ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:17: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                           sum=( mayukh[(i)%5\'d16][(j-5\'d1)%5\'d16]+ \n                                           ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:17: Operator SUB expects 32 bits on the RHS, but RHS\'s CONST \'5\'h1\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                           sum=( mayukh[(i)%5\'d16][(j-5\'d1)%5\'d16]+ \n                                                     ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:17: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                           sum=( mayukh[(i)%5\'d16][(j-5\'d1)%5\'d16]+ \n                                                           ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:18: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i)%5\'d16][(j+5\'d1)%5\'d16]+\n                                           ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:18: Operator ADD expects 32 bits on the RHS, but RHS\'s CONST \'5\'h1\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i)%5\'d16][(j+5\'d1)%5\'d16]+\n                                                     ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:18: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i)%5\'d16][(j+5\'d1)%5\'d16]+\n                                                           ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:19: Operator SUB expects 32 bits on the RHS, but RHS\'s CONST \'5\'h1\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i-5\'d1)%5\'d16][(j)%5\'d16]+ \n                                          ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:19: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i-5\'d1)%5\'d16][(j)%5\'d16]+ \n                                                ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:19: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i-5\'d1)%5\'d16][(j)%5\'d16]+ \n                                                           ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:20: Operator SUB expects 32 bits on the RHS, but RHS\'s CONST \'5\'h1\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i-5\'d1)%5\'d16][(j-5\'d1)%5\'d16]+ \n                                          ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:20: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i-5\'d1)%5\'d16][(j-5\'d1)%5\'d16]+ \n                                                ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:20: Operator SUB expects 32 bits on the RHS, but RHS\'s CONST \'5\'h1\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i-5\'d1)%5\'d16][(j-5\'d1)%5\'d16]+ \n                                                          ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:20: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i-5\'d1)%5\'d16][(j-5\'d1)%5\'d16]+ \n                                                                ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:21: Operator SUB expects 32 bits on the RHS, but RHS\'s CONST \'5\'h1\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i-5\'d1)%5\'d16][(j+5\'d1)%5\'d16]+ \n                                          ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:21: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i-5\'d1)%5\'d16][(j+5\'d1)%5\'d16]+ \n                                                ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:21: Operator ADD expects 32 bits on the RHS, but RHS\'s CONST \'5\'h1\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i-5\'d1)%5\'d16][(j+5\'d1)%5\'d16]+ \n                                                          ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:21: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i-5\'d1)%5\'d16][(j+5\'d1)%5\'d16]+ \n                                                                ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:22: Operator ADD expects 32 bits on the RHS, but RHS\'s CONST \'5\'h1\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i+5\'d1)%5\'d16][(j)%5\'d16]+ \n                                          ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:22: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i+5\'d1)%5\'d16][(j)%5\'d16]+ \n                                                ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:22: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i+5\'d1)%5\'d16][(j)%5\'d16]+ \n                                                           ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:23: Operator ADD expects 32 bits on the RHS, but RHS\'s CONST \'5\'h1\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i+5\'d1)%5\'d16][(j+5\'d1)%5\'d16]+ \n                                          ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:23: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i+5\'d1)%5\'d16][(j+5\'d1)%5\'d16]+ \n                                                ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:23: Operator ADD expects 32 bits on the RHS, but RHS\'s CONST \'5\'h1\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i+5\'d1)%5\'d16][(j+5\'d1)%5\'d16]+ \n                                                          ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:23: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i+5\'d1)%5\'d16][(j+5\'d1)%5\'d16]+ \n                                                                ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:24: Operator ADD expects 32 bits on the RHS, but RHS\'s CONST \'5\'h1\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i+5\'d1)%5\'d16][(j-5\'d1)%5\'d16] );                             \n                                          ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:24: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i+5\'d1)%5\'d16][(j-5\'d1)%5\'d16] );                             \n                                                ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:24: Operator SUB expects 32 bits on the RHS, but RHS\'s CONST \'5\'h1\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i+5\'d1)%5\'d16][(j-5\'d1)%5\'d16] );                             \n                                                          ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:24: Operator MODDIV expects 32 bits on the RHS, but RHS\'s CONST \'5\'h10\' generates 5 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i+5\'d1)%5\'d16][(j-5\'d1)%5\'d16] );                             \n                                                                ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:17: Operator ADD expects 4 bits on the LHS, but LHS\'s SEL generates 1 bits.\n                                                                                           : ... In instance top_module\n                           sum=( mayukh[(i)%5\'d16][(j-5\'d1)%5\'d16]+ \n                                                                  ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:17: Operator ADD expects 4 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                                           : ... In instance top_module\n                           sum=( mayukh[(i)%5\'d16][(j-5\'d1)%5\'d16]+ \n                                                                  ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:18: Operator ADD expects 4 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i)%5\'d16][(j+5\'d1)%5\'d16]+\n                                                                  ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:19: Operator ADD expects 4 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i-5\'d1)%5\'d16][(j)%5\'d16]+ \n                                                                  ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:20: Operator ADD expects 4 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i-5\'d1)%5\'d16][(j-5\'d1)%5\'d16]+ \n                                                                       ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:21: Operator ADD expects 4 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i-5\'d1)%5\'d16][(j+5\'d1)%5\'d16]+ \n                                                                       ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:22: Operator ADD expects 4 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i+5\'d1)%5\'d16][(j)%5\'d16]+ \n                                                                  ^\n%Warning-WIDTH: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:23: Operator ADD expects 4 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                                           : ... In instance top_module\n                                 mayukh[(i+5\'d1)%5\'d16][(j+5\'d1)%5\'d16]+ \n                                                                       ^\n%Error-PROCASSWIRE: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:11: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'mayukh\'\n                                                                                               : ... In instance top_module\n    mayukh=q;\n    ^~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:12: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'temp\'\n                                                                                               : ... In instance top_module\n    temp=q;\n    ^~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:17: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'sum\'\n                                                                                               : ... In instance top_module\n                           sum=( mayukh[(i)%5\'d16][(j-5\'d1)%5\'d16]+ \n                           ^~~\n%Error-PROCASSWIRE: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:26: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'temp\'\n                                                                                               : ... In instance top_module\n                                4\'d2:temp[i][j]=temp[i][j];\n                                     ^~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:27: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'temp\'\n                                                                                               : ... In instance top_module\n                                4\'d3:temp[i][j]=1;\n                                     ^~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:28: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'temp\'\n                                                                                               : ... In instance top_module\n                                default:temp[i][j]=0;\n                                        ^~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:37: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'q\'\n                                                                                               : ... In instance top_module\n          q<=data;\n          ^\n%Error-PROCASSWIRE: data/full_repos/permissive/509083020/conway_s_game_of_life_on_a_toroid.v:39: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'q\'\n                                                                                               : ... In instance top_module\n          q<=temp;\n          ^\n%Error: Exiting due to 8 error(s), 38 warning(s)\n'
module top_module(
input clk,
input load,
input [255:0] data,
output [255:0] q );
    
wire [3:0] sum;
wire [15:0][0:15] mayukh;
wire [15:0][0:15] temp; 
    always@(*)begin
    mayukh=q;
    temp=q;
    for(int i=0;i<16;i++)
                  begin
                       for(int j=0;j<16;j++)
                       begin
                           sum=( mayukh[(i)%5'd16][(j-5'd1)%5'd16]+ 
                                 mayukh[(i)%5'd16][(j+5'd1)%5'd16]+
                                 mayukh[(i-5'd1)%5'd16][(j)%5'd16]+ 
                                 mayukh[(i-5'd1)%5'd16][(j-5'd1)%5'd16]+ 
                                 mayukh[(i-5'd1)%5'd16][(j+5'd1)%5'd16]+ 
                                 mayukh[(i+5'd1)%5'd16][(j)%5'd16]+ 
                                 mayukh[(i+5'd1)%5'd16][(j+5'd1)%5'd16]+ 
                                 mayukh[(i+5'd1)%5'd16][(j-5'd1)%5'd16] );                             
                            case(sum)                                 
                                4'd2:temp[i][j]=temp[i][j];
                                4'd3:temp[i][j]=1;
                                default:temp[i][j]=0;
                            endcase
                       end
                  end
    end
    
    
   always@(posedge clk) begin
       if(load)
          q<=data;
       else
          q<=temp;
       end
endmodule
module top_module(
input clk,
input load,
input [255:0] data,
output [255:0] q );

    
wire [3:0] sum;
wire [15:0][0:15] mayukh;
wire [15:0][0:15] temp; 
    always@(*)begin
    mayukh=q;
    temp=q;
    for(int i=0;i<16;i++)
                  begin
                       for(int j=0;j<16;j++)
                       begin
                           sum=( mayukh[(i)%5'd16][(j-5'd1)%5'd16]+ 
                                 mayukh[(i)%5'd16][(j+5'd1)%5'd16]+
                                 mayukh[(i-5'd1)%5'd16][(j)%5'd16]+ 
                                 mayukh[(i-5'd1)%5'd16][(j-5'd1)%5'd16]+ 
                                 mayukh[(i-5'd1)%5'd16][(j+5'd1)%5'd16]+ 
                                 mayukh[(i+5'd1)%5'd16][(j)%5'd16]+ 
                                 mayukh[(i+5'd1)%5'd16][(j+5'd1)%5'd16]+ 
                                 mayukh[(i+5'd1)%5'd16][(j-5'd1)%5'd16] );                             
                            case(sum)                                 
                                4'd2:temp[i][j]=temp[i][j];
                                4'd3:temp[i][j]=1;
                                default:temp[i][j]=0;
                            endcase
                       end
                  end
    end
    
    
   always@(posedge clk) begin
       if(load)
          q<=data;
       else
          q<=temp;
       end
endmodule