data/full_repos/permissive/475231219/multiplexers/mux2to1.v
data/verilator_xmls/7d6a11d2-952f-4f98-b8a6-b8e6e1c13120.xml
module top_module( 
    input a, b, sel,
    output out ); 
    assign out = (sel)?b:a;
endmodule
module top_module( 
    input a, b, sel,
    output out );
 
    assign out = (sel)?b:a;
endmodule