data/full_repos/permissive/405799749/amg_new2/adder/FSA_16_64_Carry_select_adder.v
data/verilator_xmls/a1e22f4f-1bee-4d86-a007-eae88622d5c2.xml
module UBRCB_36_29 (Co, S, X, Y, Ci);
  output Co;
  output [36:29] S;
  input Ci;
  input [36:29] X;
  input [36:29] Y;
  wire C30;
  wire C31;
  wire C32;
  wire C33;
  wire C34;
  wire C35;
  wire C36;
  UBFA_29 U0 (C30, S[29], X[29], Y[29], Ci);
  UBFA_30 U1 (C31, S[30], X[30], Y[30], C30);
  UBFA_31 U2 (C32, S[31], X[31], Y[31], C31);
  UBFA_32 U3 (C33, S[32], X[32], Y[32], C32);
  UBFA_33 U4 (C34, S[33], X[33], Y[33], C33);
  UBFA_34 U5 (C35, S[34], X[34], Y[34], C34);
  UBFA_35 U6 (C36, S[35], X[35], Y[35], C35);
  UBFA_36 U7 (Co, S[36], X[36], Y[36], C36);
endmodule
module UBRCB_36_29 (Co, S, X, Y, Ci);

  output Co;
  output [36:29] S;
  input Ci;
  input [36:29] X;
  input [36:29] Y;
  wire C30;
  wire C31;
  wire C32;
  wire C33;
  wire C34;
  wire C35;
  wire C36;
  UBFA_29 U0 (C30, S[29], X[29], Y[29], Ci);
  UBFA_30 U1 (C31, S[30], X[30], Y[30], C30);
  UBFA_31 U2 (C32, S[31], X[31], Y[31], C31);
  UBFA_32 U3 (C33, S[32], X[32], Y[32], C32);
  UBFA_33 U4 (C34, S[33], X[33], Y[33], C33);
  UBFA_34 U5 (C35, S[34], X[34], Y[34], C34);
  UBFA_35 U6 (C36, S[35], X[35], Y[35], C35);
  UBFA_36 U7 (Co, S[36], X[36], Y[36], C36);
endmodule