data/full_repos/permissive/458737381/src/verilog-parser/tests/scdata_periph_io.v
1: b"%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/scdata_periph_io.v:40: Cannot find file containing module: 'dff_s'\n   dff_s #(624)  ff_scbuf_scdata_fbdecc_c5 (.q(scbuf_scdata_fbdecc_c5[623:0]),\n   ^~~~~\n        ... Looked in:\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/dff_s\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/dff_s.v\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/dff_s.sv\n             dff_s\n             dff_s.v\n             dff_s.sv\n             obj_dir/dff_s\n             obj_dir/dff_s.v\n             obj_dir/dff_s.sv\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/scdata_periph_io.v:44: Cannot find file containing module: 'dff_s'\n   dff_s #(624)  ff_scdata_scbuf_decc_out_c7 (.q(scdata_scbuf_decc_out_c7[623:0]),\n   ^~~~~\n%Error: Exiting due to 2 error(s)\n"
module scdata_periph_io(

   so, scdata_scbuf_decc_out_c7, scbuf_scdata_fbdecc_c5, 

   scdata_decc_out_c6, scbuf_scdata_fbdecc_c4, rclk, se, si
   );

   input [623:0]  scdata_decc_out_c6;
   input [623:0]  scbuf_scdata_fbdecc_c4;
   input 	  rclk, se, si;   
   
   output 	  so;
   output [623:0] scdata_scbuf_decc_out_c7;
   output [623:0] scbuf_scdata_fbdecc_c5;

   wire [623:0]   scdata_decc_out_c6;
   

   dff_s #(624)  ff_scbuf_scdata_fbdecc_c5 (.q(scbuf_scdata_fbdecc_c5[623:0]),
					  .din(scbuf_scdata_fbdecc_c4[623:0]),
					  .clk(rclk), .se(se), .si(), .so());

   dff_s #(624)  ff_scdata_scbuf_decc_out_c7 (.q(scdata_scbuf_decc_out_c7[623:0]),
					    .din(scdata_decc_out_c6[623:0]),
					    .clk(rclk), .se(se), .si(), .so());

endmodule
module scdata_periph_io(

   so, scdata_scbuf_decc_out_c7, scbuf_scdata_fbdecc_c5, 

   scdata_decc_out_c6, scbuf_scdata_fbdecc_c4, rclk, se, si
   );


   input [623:0]  scdata_decc_out_c6;
   input [623:0]  scbuf_scdata_fbdecc_c4;
   input 	  rclk, se, si;   
   
   output 	  so;
   output [623:0] scdata_scbuf_decc_out_c7;
   output [623:0] scbuf_scdata_fbdecc_c5;

   wire [623:0]   scdata_decc_out_c6;
   

   dff_s #(624)  ff_scbuf_scdata_fbdecc_c5 (.q(scbuf_scdata_fbdecc_c5[623:0]),
					  .din(scbuf_scdata_fbdecc_c4[623:0]),
					  .clk(rclk), .se(se), .si(), .so());

   dff_s #(624)  ff_scdata_scbuf_decc_out_c7 (.q(scdata_scbuf_decc_out_c7[623:0]),
					    .din(scdata_decc_out_c6[623:0]),
					    .clk(rclk), .se(se), .si(), .so());

endmodule