data/full_repos/permissive/522542985/WC_round_robin_arbiter.v
1: b"%Error-PROCASSWIRE: data/full_repos/permissive/522542985/WC_round_robin_arbiter.v:109: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'grant_out'\n                                                                                     : ... In instance WC_round_robin_arbiter\n    IDLE : grant_out = 4'b0000;\n           ^~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/522542985/WC_round_robin_arbiter.v:112: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'grant_out'\n                                                                                     : ... In instance WC_round_robin_arbiter\n                          grant_out = 4'b0001;        \n                          ^~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/522542985/WC_round_robin_arbiter.v:115: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'grant_out'\n                                                                                     : ... In instance WC_round_robin_arbiter\n                          grant_out = 4'b0010;        \n                          ^~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/522542985/WC_round_robin_arbiter.v:118: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'grant_out'\n                                                                                     : ... In instance WC_round_robin_arbiter\n                          grant_out = 4'b0100;        \n                          ^~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/522542985/WC_round_robin_arbiter.v:121: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'grant_out'\n                                                                                     : ... In instance WC_round_robin_arbiter\n                          grant_out = 4'b1000;        \n                          ^~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/522542985/WC_round_robin_arbiter.v:123: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'grant_out'\n                                                                                     : ... In instance WC_round_robin_arbiter\n                      else grant_out = 4'b0000;\n                           ^~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/522542985/WC_round_robin_arbiter.v:125: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'grant_out'\n                                                                                     : ... In instance WC_round_robin_arbiter\n                    grant_out = request_queue[1]?4'b0010:request_queue[2]?4'b0100:request_queue[3]?4'b1000:request_queue[0]?4'b0001:4'b0000;\n                    ^~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/522542985/WC_round_robin_arbiter.v:128: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'grant_out'\n                                                                                     : ... In instance WC_round_robin_arbiter\n                    grant_out = request_queue[2]?4'b0100:request_queue[3]?4'b1000:request_queue[0]?4'b0001:request_queue[1]?4'b0010:4'b0000;\n                    ^~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/522542985/WC_round_robin_arbiter.v:131: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'grant_out'\n                                                                                     : ... In instance WC_round_robin_arbiter\n                    grant_out = request_queue[3]?4'b1000:request_queue[0]?4'b0001:request_queue[1]?4'b0010:request_queue[2]?4'b0100:4'b0000;\n                    ^~~~~~~~~\n%Error: Exiting due to 9 error(s)\n        ... See the manual and https://verilator.org for more assistance.\n"
module WC_round_robin_arbiter
#(parameter integer THREE_SECS_FREQ = 150000000)
(input clk, input reset, input [3:0] request_queue, output [3:0] grant_out);



localparam [2:0]
                IDLE = 0,
                queue_1_priority = 1,
                queue_2_priority = 2,
                queue_3_priority = 3,
                queue_4_priority = 4;

reg [2:0] current_state, next_state;
reg enable;
integer time_counter = 0;
wire queues_are_empty;



always @ (posedge clk) begin
    if (reset) begin
        current_state <= IDLE;
    end

    else if (enable == 1'b1)begin
        current_state <= next_state;
    end
    
end




always @ (posedge clk) begin
    time_counter = time_counter + 1;
    if (time_counter == THREE_SECS_FREQ) begin
        enable = 1'b1;
        time_counter = 0;
    end
    else enable = 1'b0;
    
end



assign queues_are_empty = ~|(request_queue);      


always @ (current_state, queues_are_empty) begin
    case (current_state)
        IDLE: if (queues_are_empty == 1'b1) begin
                   next_state = IDLE;
              end
              else next_state = queue_1_priority;
        queue_1_priority:
                        if (queues_are_empty == 1'b1) begin
                              next_state = IDLE;
                         end
                        else next_state = queue_2_priority;
        queue_2_priority:
                        if (queues_are_empty == 1'b1) begin
                            next_state = IDLE;
                        end
                        else next_state = queue_3_priority;
        queue_3_priority:
                        if (queues_are_empty == 1'b1) begin
                            next_state = IDLE;
                        end
                        else next_state = queue_4_priority;
        queue_4_priority:
                        if (queues_are_empty == 1'b1) begin
                            next_state = IDLE;
                        end
                        else next_state = queue_1_priority;

    endcase



    
end


always @(current_state, request_queue) begin
    case (current_state)
    IDLE : grant_out = 4'b0000;
    queue_1_priority :
                      if (request_queue[0]) begin
                          grant_out = 4'b0001;        
                      end
                      else if (request_queue[1]) begin
                          grant_out = 4'b0010;        
                      end
                      else if (request_queue[2]) begin
                          grant_out = 4'b0100;        
                      end
                      else if (request_queue[3]) begin
                          grant_out = 4'b1000;        
                      end
                      else grant_out = 4'b0000;
    queue_2_priority:
                    grant_out = request_queue[1]?4'b0010:request_queue[2]?4'b0100:request_queue[3]?4'b1000:request_queue[0]?4'b0001:4'b0000;

    queue_3_priority:
                    grant_out = request_queue[2]?4'b0100:request_queue[3]?4'b1000:request_queue[0]?4'b0001:request_queue[1]?4'b0010:4'b0000;

    queue_4_priority:
                    grant_out = request_queue[3]?4'b1000:request_queue[0]?4'b0001:request_queue[1]?4'b0010:request_queue[2]?4'b0100:4'b0000;


    endcase
    
end


endmodule
module WC_round_robin_arbiter
#(parameter integer THREE_SECS_FREQ = 150000000)
(input clk, input reset, input [3:0] request_queue, output [3:0] grant_out);




localparam [2:0]
                IDLE = 0,
                queue_1_priority = 1,
                queue_2_priority = 2,
                queue_3_priority = 3,
                queue_4_priority = 4;

reg [2:0] current_state, next_state;
reg enable;
integer time_counter = 0;
wire queues_are_empty;



always @ (posedge clk) begin
    if (reset) begin
        current_state <= IDLE;
    end

    else if (enable == 1'b1)begin
        current_state <= next_state;
    end
    
end




always @ (posedge clk) begin
    time_counter = time_counter + 1;
    if (time_counter == THREE_SECS_FREQ) begin
        enable = 1'b1;
        time_counter = 0;
    end
    else enable = 1'b0;
    
end



assign queues_are_empty = ~|(request_queue);      


always @ (current_state, queues_are_empty) begin
    case (current_state)
        IDLE: if (queues_are_empty == 1'b1) begin
                   next_state = IDLE;
              end
              else next_state = queue_1_priority;
        queue_1_priority:
                        if (queues_are_empty == 1'b1) begin
                              next_state = IDLE;
                         end
                        else next_state = queue_2_priority;
        queue_2_priority:
                        if (queues_are_empty == 1'b1) begin
                            next_state = IDLE;
                        end
                        else next_state = queue_3_priority;
        queue_3_priority:
                        if (queues_are_empty == 1'b1) begin
                            next_state = IDLE;
                        end
                        else next_state = queue_4_priority;
        queue_4_priority:
                        if (queues_are_empty == 1'b1) begin
                            next_state = IDLE;
                        end
                        else next_state = queue_1_priority;

    endcase



    
end


always @(current_state, request_queue) begin
    case (current_state)
    IDLE : grant_out = 4'b0000;
    queue_1_priority :
                      if (request_queue[0]) begin
                          grant_out = 4'b0001;        
                      end
                      else if (request_queue[1]) begin
                          grant_out = 4'b0010;        
                      end
                      else if (request_queue[2]) begin
                          grant_out = 4'b0100;        
                      end
                      else if (request_queue[3]) begin
                          grant_out = 4'b1000;        
                      end
                      else grant_out = 4'b0000;
    queue_2_priority:
                    grant_out = request_queue[1]?4'b0010:request_queue[2]?4'b0100:request_queue[3]?4'b1000:request_queue[0]?4'b0001:4'b0000;

    queue_3_priority:
                    grant_out = request_queue[2]?4'b0100:request_queue[3]?4'b1000:request_queue[0]?4'b0001:request_queue[1]?4'b0010:4'b0000;

    queue_4_priority:
                    grant_out = request_queue[3]?4'b1000:request_queue[0]?4'b0001:request_queue[1]?4'b0010:request_queue[2]?4'b0100:4'b0000;


    endcase
    
end


endmodule