data/full_repos/permissive/434840709/lab5/code/calculate.v
1: b"%Error: data/full_repos/permissive/434840709/lab5/code/calculate.v:28: Cannot find file containing module: 'segMsg1'\n    segMsg1 u(clk190hz, rst, sel, mid1, mid2, pos, seg);\n    ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/434840709/lab5/code,data/full_repos/permissive/434840709/segMsg1\n             data/full_repos/permissive/434840709/lab5/code,data/full_repos/permissive/434840709/segMsg1.v\n             data/full_repos/permissive/434840709/lab5/code,data/full_repos/permissive/434840709/segMsg1.sv\n             segMsg1\n             segMsg1.v\n             segMsg1.sv\n             obj_dir/segMsg1\n             obj_dir/segMsg1.v\n             obj_dir/segMsg1.sv\n%Error: Exiting due to 1 error(s)\n"
module calculate(
    input clk190hz,
    input rst,
    input sel,

    input but1,
    input but2,
    input but3,
    input but4,

    input but5,
    input but6,
    input but7,
    input but8,

    output [3:0] pos,
    output [7:0] seg
);

    wire [3:0] mid1;
    wire [3:0] mid2;
    assign mid1 = {but4,but3,but2,but1};
    assign mid2 = {but8,but7,but6,but5};
   
   
    segMsg1 u(clk190hz, rst, sel, mid1, mid2, pos, seg);
endmodule
module calculate(
    input clk190hz,
    input rst,
    input sel,

    input but1,
    input but2,
    input but3,
    input but4,

    input but5,
    input but6,
    input but7,
    input but8,

    output [3:0] pos,
    output [7:0] seg
);


    wire [3:0] mid1;
    wire [3:0] mid2;
    assign mid1 = {but4,but3,but2,but1};
    assign mid2 = {but8,but7,but6,but5};
   
   
    segMsg1 u(clk190hz, rst, sel, mid1, mid2, pos, seg);
endmodule