data/full_repos/permissive/41643185/system.v
1: b"%Error: data/full_repos/permissive/41643185/system.v:439: Cannot find file containing module: 'reg8'\n reg8 counthrreg0(\n ^~~~\n        ... Looked in:\n             data/full_repos/permissive/41643185,data/full_repos/permissive/41643185/reg8\n             data/full_repos/permissive/41643185,data/full_repos/permissive/41643185/reg8.v\n             data/full_repos/permissive/41643185,data/full_repos/permissive/41643185/reg8.sv\n             reg8\n             reg8.v\n             reg8.sv\n             obj_dir/reg8\n             obj_dir/reg8.v\n             obj_dir/reg8.sv\n%Error: data/full_repos/permissive/41643185/system.v:446: Cannot find file containing module: 'reg8'\n reg8 counthrreg1(\n ^~~~\n%Error: data/full_repos/permissive/41643185/system.v:452: Cannot find file containing module: 'reg8'\n reg8 counthrreg2(\n ^~~~\n%Error: data/full_repos/permissive/41643185/system.v:458: Cannot find file containing module: 'control'\n control ctrl0(\n ^~~~~~~\n%Error: data/full_repos/permissive/41643185/system.v:493: Cannot find file containing module: 'bdcmotorchannel'\n bdcmotorchannel bdcm0(\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/41643185/system.v:512: Cannot find file containing module: 'bdcmotorchannel'\n bdcmotorchannel bdcm1(\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/41643185/system.v:531: Cannot find file containing module: 'bdcmotorchannel'\n bdcmotorchannel bdcm2(\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/41643185/system.v:549: Cannot find file containing module: 'digitalfilter'\n digitalfilter spienfilter(\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/41643185/system.v:555: Cannot find file containing module: 'spi'\n spi spi0(\n ^~~\n%Error: Exiting due to 9 error(s)\n"
module system(

	output miso,

	output [1:0] pwm0,
	output [3:0] pwm40,
	output [1:0] pwm1,
	output [3:0] pwm41,
	output [1:0] pwm2,
	output [3:0] pwm42,

	output motorena,

	output ledalive,

	output spioe,

	input clk,

	input ss,

	input sclk,

	input mosi,

	input currentlimit0,
	input currentlimit1,
	input currentlimit2,
	

	input tst,

	input wdogdis,

	input [1:0] tach0, 
	input [1:0] tach1,
	input [1:0] tach2);
  
  

	wire countlread0;
	wire countlread1;
	wire countlread2;
	wire freeze0;
	wire freeze1;
	wire freeze2;
	wire highce0;
	wire highce1;
	wire highce2;
	wire pwmld0;
	wire pwmld1;
	wire pwmld2;
	wire cfgld0;
	wire cfgld1;
	wire cfgld2;
	wire invertpwm0;
	wire invertpwm1;
	wire invertpwm2;
	wire invphase0;
	wire invphase1;
	wire invphase2;
	wire pwmcntce0;
	wire pwmcntce1;
	wire pwmcntce2;
	wire filterce0;
	wire filterce1;
	wire filterce2;
	wire run0;
	wire run1;
	wire run2;
	wire rdt;
	wire wrt;
	wire we;
	wire ctrlld;
	wire wdogdivld;
	wire motorenaint;
	wire wdreset;
	wire spien_filt;
	wire [7:0] counthfrozen0;
	wire [7:0] countl0;
	wire [7:0] counth0;
	wire [7:0] configrdreg0;
	wire [7:0] counthfrozen1;
	wire [7:0] countl1;
	wire [7:0] counth1;
	wire [7:0] configrdreg1;
	wire [7:0] counthfrozen2;
	wire [7:0] countl2;
	wire [7:0] counth2;
	wire [7:0] configrdreg2;
	wire [3:0] addr;
	wire [7:0] wrtdata;
	wire [7:0] rddata;
	wire [7:0] controlrdata;
	wire [7:0] hwconfig;
  

	assign motorena = motorenaint;
	
	
  
  
	negedgedet ned0(
		.clk(clk),
		.in(wrt),
		.out(we));
  
	decoder dec0(
		.we(we),
		.rdt(rdt),
		.addr(addr),
		.countl0(countl0),
		.counthfrozen0(counthfrozen0),
		.configrdreg0(configrdreg0),
		.countl1(countl1),
		.counthfrozen1(counthfrozen1),
		.configrdreg1(configrdreg1),
		.countl2(countl2),
		.counthfrozen2(counthfrozen2),
		.configrdreg2(configrdreg2),
		.controlrdata(controlrdata),
		.hwconfig(hwconfig),
		.rddata(rddata),
		.countlread0(countlread0),
		.countlread1(countlread1),
		.countlread2(countlread2),
		.pwmld0(pwmld0),
		.pwmld1(pwmld1),
		.pwmld2(pwmld2),
		.cfgld0(cfgld0),
		.cfgld1(cfgld1),
		.cfgld2(cfgld2),
		.ctrlld(ctrlld),
		.wdogdivld(wdogdivld),
		.wdreset(wdreset));
    
  
	freezer frz0(
		.clk(clk),
		.countlread(countlread0),
		.freeze(freeze0),
		.highce(highce0));
		
		
	freezer frz1(
		.clk(clk),
		.countlread(countlread1),
		.freeze(freeze1),
		.highce(highce1));
  
  	freezer frz2(
		.clk(clk),
		.countlread(countlread2),
		.freeze(freeze2),
		.highce(highce2));
  
	reg8 counthrreg0(
		.clk(clk),
		.ce(highce0),
		.in(counth0),
		.out(counthfrozen0));
		
		
	reg8 counthrreg1(
		.clk(clk),
		.ce(highce1),
		.in(counth1),
		.out(counthfrozen1));
		
	reg8 counthrreg2(
		.clk(clk),
		.ce(highce2),
		.in(counth2),
		.out(counthfrozen2));

	control ctrl0(
		.clk(clk),
		.cfgld0(cfgld0),
		.cfgld1(cfgld1),
		.cfgld2(cfgld2),
		.ctrlld(ctrlld),
		.wdogdivld(wdogdivld),
		.tst(tst),
		.wdogdis(wdogdis),
		.wdreset(wdreset),
		.wrtdata(wrtdata),
		.pwmcntce0(pwmcntce0),
		.pwmcntce1(pwmcntce1),
		.pwmcntce2(pwmcntce2),		
		.filterce0(filterce0),
		.filterce1(filterce1),
		.filterce2(filterce2),
		.invertpwm0(invertpwm0),
		.invertpwm1(invertpwm1),
		.invertpwm2(invertpwm2),
		.run0(run0),
		.run1(run1),
		.run2(run2),
		.invphase0(invphase0),
		.invphase1(invphase1),
		.invphase2(invphase2),
		.motorenaint(motorenaint),
		.ledalive(ledalive),
		.controlrdata(controlrdata),
		.hwconfig(hwconfig),
		.configrdreg0(configrdreg0),
		.configrdreg1(configrdreg1),
		.configrdreg2(configrdreg2));
		
		 
	bdcmotorchannel bdcm0(
		.clk(clk),
		.filterce(filterce0),
		.invphase(invphase0),
		.freeze(freeze0),
		.pwmcntce(pwmcntce0),
		.pwmldce(pwmld0),
		.invertpwm(invertpwm0),
		.enablepwm(motorenaint),
		.run(run0),
		.currentlimit(currentlimit0),
		.tach(tach0),
		.wrtdata(wrtdata),
		.countl(countl0),
		.counth(counth0),
		.pwmout(pwm0),
		.pwmout4(pwm40));
		
		
	bdcmotorchannel bdcm1(
		.clk(clk),
		.filterce(filterce1),
		.invphase(invphase1),
		.freeze(freeze1),
		.pwmcntce(pwmcntce1),
		.pwmldce(pwmld1),
		.invertpwm(invertpwm1),
		.enablepwm(motorenaint),
		.run(run1),
		.currentlimit(currentlimit1),
		.tach(tach1),
		.wrtdata(wrtdata),
		.countl(countl1),
		.counth(counth1),
		.pwmout(pwm1),
		.pwmout4(pwm41));
		
		
	bdcmotorchannel bdcm2(
		.clk(clk),
		.filterce(filterce2),
		.invphase(invphase2),
		.freeze(freeze2),
		.pwmcntce(pwmcntce2),
		.pwmldce(pwmld2),
		.invertpwm(invertpwm2),
		.enablepwm(motorenaint),
		.run(run2),
		.currentlimit(currentlimit2),
		.tach(tach2),
		.wrtdata(wrtdata),
		.countl(countl2),
		.counth(counth2),
		.pwmout(pwm2),
		.pwmout4(pwm42));
		
	digitalfilter spienfilter(
		.out(spien_filt),
		.clk(clk),
		.ce(1'b1),
		.in(ss));
   
	spi spi0(
		.spidout(miso),
		.spiclk(sclk),
		.rdt(rdt),
		.wrt(wrt),
		.spioe(spioe),
		.wrtdata(wrtdata),
		.addr(addr),
		.spien(spien_filt),
		.spidin(mosi),
		.rddata(rddata));

		
endmodule
module system(

	output miso,

	output [1:0] pwm0,
	output [3:0] pwm40,
	output [1:0] pwm1,
	output [3:0] pwm41,
	output [1:0] pwm2,
	output [3:0] pwm42,

	output motorena,

	output ledalive,

	output spioe,

	input clk,

	input ss,

	input sclk,

	input mosi,

	input currentlimit0,
	input currentlimit1,
	input currentlimit2,
	

	input tst,

	input wdogdis,

	input [1:0] tach0, 
	input [1:0] tach1,
	input [1:0] tach2);

  
  

	wire countlread0;
	wire countlread1;
	wire countlread2;
	wire freeze0;
	wire freeze1;
	wire freeze2;
	wire highce0;
	wire highce1;
	wire highce2;
	wire pwmld0;
	wire pwmld1;
	wire pwmld2;
	wire cfgld0;
	wire cfgld1;
	wire cfgld2;
	wire invertpwm0;
	wire invertpwm1;
	wire invertpwm2;
	wire invphase0;
	wire invphase1;
	wire invphase2;
	wire pwmcntce0;
	wire pwmcntce1;
	wire pwmcntce2;
	wire filterce0;
	wire filterce1;
	wire filterce2;
	wire run0;
	wire run1;
	wire run2;
	wire rdt;
	wire wrt;
	wire we;
	wire ctrlld;
	wire wdogdivld;
	wire motorenaint;
	wire wdreset;
	wire spien_filt;
	wire [7:0] counthfrozen0;
	wire [7:0] countl0;
	wire [7:0] counth0;
	wire [7:0] configrdreg0;
	wire [7:0] counthfrozen1;
	wire [7:0] countl1;
	wire [7:0] counth1;
	wire [7:0] configrdreg1;
	wire [7:0] counthfrozen2;
	wire [7:0] countl2;
	wire [7:0] counth2;
	wire [7:0] configrdreg2;
	wire [3:0] addr;
	wire [7:0] wrtdata;
	wire [7:0] rddata;
	wire [7:0] controlrdata;
	wire [7:0] hwconfig;
  

	assign motorena = motorenaint;
	
	
  
  
	negedgedet ned0(
		.clk(clk),
		.in(wrt),
		.out(we));
  
	decoder dec0(
		.we(we),
		.rdt(rdt),
		.addr(addr),
		.countl0(countl0),
		.counthfrozen0(counthfrozen0),
		.configrdreg0(configrdreg0),
		.countl1(countl1),
		.counthfrozen1(counthfrozen1),
		.configrdreg1(configrdreg1),
		.countl2(countl2),
		.counthfrozen2(counthfrozen2),
		.configrdreg2(configrdreg2),
		.controlrdata(controlrdata),
		.hwconfig(hwconfig),
		.rddata(rddata),
		.countlread0(countlread0),
		.countlread1(countlread1),
		.countlread2(countlread2),
		.pwmld0(pwmld0),
		.pwmld1(pwmld1),
		.pwmld2(pwmld2),
		.cfgld0(cfgld0),
		.cfgld1(cfgld1),
		.cfgld2(cfgld2),
		.ctrlld(ctrlld),
		.wdogdivld(wdogdivld),
		.wdreset(wdreset));
    
  
	freezer frz0(
		.clk(clk),
		.countlread(countlread0),
		.freeze(freeze0),
		.highce(highce0));
		
		
	freezer frz1(
		.clk(clk),
		.countlread(countlread1),
		.freeze(freeze1),
		.highce(highce1));
  
  	freezer frz2(
		.clk(clk),
		.countlread(countlread2),
		.freeze(freeze2),
		.highce(highce2));
  
	reg8 counthrreg0(
		.clk(clk),
		.ce(highce0),
		.in(counth0),
		.out(counthfrozen0));
		
		
	reg8 counthrreg1(
		.clk(clk),
		.ce(highce1),
		.in(counth1),
		.out(counthfrozen1));
		
	reg8 counthrreg2(
		.clk(clk),
		.ce(highce2),
		.in(counth2),
		.out(counthfrozen2));

	control ctrl0(
		.clk(clk),
		.cfgld0(cfgld0),
		.cfgld1(cfgld1),
		.cfgld2(cfgld2),
		.ctrlld(ctrlld),
		.wdogdivld(wdogdivld),
		.tst(tst),
		.wdogdis(wdogdis),
		.wdreset(wdreset),
		.wrtdata(wrtdata),
		.pwmcntce0(pwmcntce0),
		.pwmcntce1(pwmcntce1),
		.pwmcntce2(pwmcntce2),		
		.filterce0(filterce0),
		.filterce1(filterce1),
		.filterce2(filterce2),
		.invertpwm0(invertpwm0),
		.invertpwm1(invertpwm1),
		.invertpwm2(invertpwm2),
		.run0(run0),
		.run1(run1),
		.run2(run2),
		.invphase0(invphase0),
		.invphase1(invphase1),
		.invphase2(invphase2),
		.motorenaint(motorenaint),
		.ledalive(ledalive),
		.controlrdata(controlrdata),
		.hwconfig(hwconfig),
		.configrdreg0(configrdreg0),
		.configrdreg1(configrdreg1),
		.configrdreg2(configrdreg2));
		
		 
	bdcmotorchannel bdcm0(
		.clk(clk),
		.filterce(filterce0),
		.invphase(invphase0),
		.freeze(freeze0),
		.pwmcntce(pwmcntce0),
		.pwmldce(pwmld0),
		.invertpwm(invertpwm0),
		.enablepwm(motorenaint),
		.run(run0),
		.currentlimit(currentlimit0),
		.tach(tach0),
		.wrtdata(wrtdata),
		.countl(countl0),
		.counth(counth0),
		.pwmout(pwm0),
		.pwmout4(pwm40));
		
		
	bdcmotorchannel bdcm1(
		.clk(clk),
		.filterce(filterce1),
		.invphase(invphase1),
		.freeze(freeze1),
		.pwmcntce(pwmcntce1),
		.pwmldce(pwmld1),
		.invertpwm(invertpwm1),
		.enablepwm(motorenaint),
		.run(run1),
		.currentlimit(currentlimit1),
		.tach(tach1),
		.wrtdata(wrtdata),
		.countl(countl1),
		.counth(counth1),
		.pwmout(pwm1),
		.pwmout4(pwm41));
		
		
	bdcmotorchannel bdcm2(
		.clk(clk),
		.filterce(filterce2),
		.invphase(invphase2),
		.freeze(freeze2),
		.pwmcntce(pwmcntce2),
		.pwmldce(pwmld2),
		.invertpwm(invertpwm2),
		.enablepwm(motorenaint),
		.run(run2),
		.currentlimit(currentlimit2),
		.tach(tach2),
		.wrtdata(wrtdata),
		.countl(countl2),
		.counth(counth2),
		.pwmout(pwm2),
		.pwmout4(pwm42));
		
	digitalfilter spienfilter(
		.out(spien_filt),
		.clk(clk),
		.ce(1'b1),
		.in(ss));
   
	spi spi0(
		.spidout(miso),
		.spiclk(sclk),
		.rdt(rdt),
		.wrt(wrt),
		.spioe(spioe),
		.wrtdata(wrtdata),
		.addr(addr),
		.spien(spien_filt),
		.spidin(mosi),
		.rddata(rddata));

		
endmodule