data/full_repos/permissive/474582223/MUX/twoByOne/uut.v
data/verilator_xmls/79fbf5cf-e80e-4473-85d9-6c118fb76a10.xml
module twobyonemux(I0, I1, S0, Y);
  input I0, I1, S0;
  output Y;
  wire a, b;
  
  and and1(a, I0, !S0);
  and and2(b, I1, S0);
  or or1(Y, a, b);
endmodule
module twobyonemux(I0, I1, S0, Y);

  input I0, I1, S0;
  output Y;
  wire a, b;
  
  and and1(a, I0, !S0);
  and and2(b, I1, S0);
  or or1(Y, a, b);
endmodule