data/full_repos/permissive/441359809/src/yosys/tests/simple/scopes.v
1: b'%Warning-WIDTH: data/full_repos/permissive/441359809/src/yosys/tests/simple/scopes.v:42: Operator ADD expects 32 or 16 bits on the RHS, but RHS\'s VARREF \'a\' generates 4 bits.\n                                                                                       : ... In instance scopes_test_01\n    x = 77 + a;\n           ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/441359809/src/yosys/tests/simple/scopes.v:57: Operator ADD expects 16 bits on the RHS, but RHS\'s VARREF \'k\' generates 4 bits.\n                                                                                       : ... In instance scopes_test_01\n   y = y + k;\n         ^\n%Error: Exiting due to 2 warning(s)\n'
function [15:0] func_01;
		input [15:0] x, y;
		begin
			func_01 = x + y;
			begin:blk
				reg [15:0] x;
				x = y;
				func_01 = func_01 ^ x;
			end
			func_01 = func_01 ^ x;
		end
	endfunction
function [15:0] func_01;

		input [15:0] x, y;
		begin
			func_01 = x + y;
			begin:blk
				reg [15:0] x;
				x = y;
				func_01 = func_01 ^ x;
			end
			func_01 = func_01 ^ x;
		end
	endfunction