data/full_repos/permissive/489075769/test bench/write_address_tb.v
1: b'%Error: Cannot find file containing module: bench,data/full_repos/permissive/489075769\n        ... Looked in:\n             data/full_repos/permissive/489075769/test/bench,data/full_repos/permissive/489075769\n             data/full_repos/permissive/489075769/test/bench,data/full_repos/permissive/489075769.v\n             data/full_repos/permissive/489075769/test/bench,data/full_repos/permissive/489075769.sv\n             bench,data/full_repos/permissive/489075769\n             bench,data/full_repos/permissive/489075769.v\n             bench,data/full_repos/permissive/489075769.sv\n             obj_dir/bench,data/full_repos/permissive/489075769\n             obj_dir/bench,data/full_repos/permissive/489075769.v\n             obj_dir/bench,data/full_repos/permissive/489075769.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/489075769/test\n%Error: Cannot find file containing module: bench/write_address_tb.v\n%Error: Exiting due to 3 error(s)\n'
module write_address_tb;
	reg ACLK;
	reg ARESETn;
	reg AWVALID;
	reg[31:0] i_AWADDR;
	reg[2:0] AWPROT;
	reg AWREADY;
	wire[31:0] o_AWADDR;
	
	
	write_address uut(ACLK,ARESETn,AWVALID, AWREADY, i_AWADDR, o_AWADDR, AWPROT);
	initial
	begin
	
	i_AWADDR = 32'h10;
	#5 AWREADY=1'b0;  AWVALID=1'b1;
	#5 AWREADY=1'b1;  AWVALID=1'b1;
	#5 AWREADY=1'b1;  AWVALID=1'b1;
	#5 $finish;
	end
initial
begin
ACLK=1'b0;
forever #3 ACLK<=~ACLK;
end
endmodule
module write_address_tb;

	reg ACLK;
	reg ARESETn;
	reg AWVALID;
	reg[31:0] i_AWADDR;
	reg[2:0] AWPROT;
	reg AWREADY;
	wire[31:0] o_AWADDR;
	
	
	write_address uut(ACLK,ARESETn,AWVALID, AWREADY, i_AWADDR, o_AWADDR, AWPROT);
	initial
	begin
	
	i_AWADDR = 32'h10;
	#5 AWREADY=1'b0;  AWVALID=1'b1;
	#5 AWREADY=1'b1;  AWVALID=1'b1;
	#5 AWREADY=1'b1;  AWVALID=1'b1;
	#5 $finish;
	end
initial
begin
ACLK=1'b0;
forever #3 ACLK<=~ACLK;
end
endmodule