data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v
1: b'%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:3: Cannot find include file: miriscv_defines.v\n`include "miriscv_defines.v" \n         ^~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/440575220,data/full_repos/permissive/440575220/miriscv_defines.v\n             data/full_repos/permissive/440575220,data/full_repos/permissive/440575220/miriscv_defines.v.v\n             data/full_repos/permissive/440575220,data/full_repos/permissive/440575220/miriscv_defines.v.sv\n             miriscv_defines.v\n             miriscv_defines.v.v\n             miriscv_defines.v.sv\n             obj_dir/miriscv_defines.v\n             obj_dir/miriscv_defines.v.v\n             obj_dir/miriscv_defines.v.sv\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:13: Define or directive not defined: \'`ALU_OP_WIDTH\'\n  wire  [`ALU_OP_WIDTH-1:0]  VFNI1TeJWM5X;\n         ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:25: Define or directive not defined: \'`ALU_OP_WIDTH\'\n  reg  [`ALU_OP_WIDTH-1:0]   kQPPGtSqrrg0;\n        ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:129: Define or directive not defined: \'`ALU_ADD\'\n        kQPPGtSqrrg0 = `ALU_ADD;\n                       ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:129: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        kQPPGtSqrrg0 = `ALU_ADD;\n                               ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:134: Define or directive not defined: \'`OP_IMM_OPCODE\'\n      `OP_IMM_OPCODE: begin\n      ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:134: syntax error, unexpected begin, expecting IDENTIFIER or PACKAGE-IDENTIFIER or TYPE-IDENTIFIER or new\n      `OP_IMM_OPCODE: begin\n                      ^~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:136: Define or directive not defined: \'`ALU_ADD\'\n          {7\'h??, 3\'h0}: kQPPGtSqrrg0 = `ALU_ADD;\n                                        ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:137: syntax error, unexpected \':\'\n          {7\'h00, 3\'h1}: kQPPGtSqrrg0 = `ALU_SLL;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:137: Define or directive not defined: \'`ALU_SLL\'\n          {7\'h00, 3\'h1}: kQPPGtSqrrg0 = `ALU_SLL;\n                                        ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:138: syntax error, unexpected \':\'\n          {7\'h??, 3\'h2}: kQPPGtSqrrg0 = `ALU_SLTS;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:138: Define or directive not defined: \'`ALU_SLTS\'\n          {7\'h??, 3\'h2}: kQPPGtSqrrg0 = `ALU_SLTS;\n                                        ^~~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:139: syntax error, unexpected \':\'\n          {7\'h??, 3\'h3}: kQPPGtSqrrg0 = `ALU_SLTU;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:139: Define or directive not defined: \'`ALU_SLTU\'\n          {7\'h??, 3\'h3}: kQPPGtSqrrg0 = `ALU_SLTU;\n                                        ^~~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:140: syntax error, unexpected \':\'\n          {7\'h??, 3\'h4}: kQPPGtSqrrg0 = `ALU_XOR;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:140: Define or directive not defined: \'`ALU_XOR\'\n          {7\'h??, 3\'h4}: kQPPGtSqrrg0 = `ALU_XOR;\n                                        ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:141: syntax error, unexpected \':\'\n          {7\'h00, 3\'h5}: kQPPGtSqrrg0 = `ALU_SRL;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:141: Define or directive not defined: \'`ALU_SRL\'\n          {7\'h00, 3\'h5}: kQPPGtSqrrg0 = `ALU_SRL;\n                                        ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:142: syntax error, unexpected \':\'\n          {7\'h20, 3\'h5}: kQPPGtSqrrg0 = `ALU_SRA;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:142: Define or directive not defined: \'`ALU_SRA\'\n          {7\'h20, 3\'h5}: kQPPGtSqrrg0 = `ALU_SRA;\n                                        ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:143: syntax error, unexpected \':\'\n          {7\'h??, 3\'h6}: kQPPGtSqrrg0 = `ALU_OR;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:143: Define or directive not defined: \'`ALU_OR\'\n          {7\'h??, 3\'h6}: kQPPGtSqrrg0 = `ALU_OR;\n                                        ^~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:144: syntax error, unexpected \':\'\n          {7\'h??, 3\'h7}: kQPPGtSqrrg0 = `ALU_AND;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:144: Define or directive not defined: \'`ALU_AND\'\n          {7\'h??, 3\'h7}: kQPPGtSqrrg0 = `ALU_AND;\n                                        ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:149: Define or directive not defined: \'`OP_OPCODE\'\n      `OP_OPCODE: begin\n      ^~~~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:151: Define or directive not defined: \'`ALU_ADD\'\n          {7\'h00, 3\'h0}: kQPPGtSqrrg0 = `ALU_ADD;\n                                        ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:152: syntax error, unexpected \':\'\n          {7\'h20, 3\'h0}: kQPPGtSqrrg0 = `ALU_SUB;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:152: Define or directive not defined: \'`ALU_SUB\'\n          {7\'h20, 3\'h0}: kQPPGtSqrrg0 = `ALU_SUB;\n                                        ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:153: syntax error, unexpected \':\'\n          {7\'h00, 3\'h1}: kQPPGtSqrrg0 = `ALU_SLL;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:153: Define or directive not defined: \'`ALU_SLL\'\n          {7\'h00, 3\'h1}: kQPPGtSqrrg0 = `ALU_SLL;\n                                        ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:154: syntax error, unexpected \':\'\n          {7\'h00, 3\'h2}: kQPPGtSqrrg0 = `ALU_SLTS;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:154: Define or directive not defined: \'`ALU_SLTS\'\n          {7\'h00, 3\'h2}: kQPPGtSqrrg0 = `ALU_SLTS;\n                                        ^~~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:155: syntax error, unexpected \':\'\n          {7\'h00, 3\'h3}: kQPPGtSqrrg0 = `ALU_SLTU;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:155: Define or directive not defined: \'`ALU_SLTU\'\n          {7\'h00, 3\'h3}: kQPPGtSqrrg0 = `ALU_SLTU;\n                                        ^~~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:156: syntax error, unexpected \':\'\n          {7\'h00, 3\'h4}: kQPPGtSqrrg0 = `ALU_XOR;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:156: Define or directive not defined: \'`ALU_XOR\'\n          {7\'h00, 3\'h4}: kQPPGtSqrrg0 = `ALU_XOR;\n                                        ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:157: syntax error, unexpected \':\'\n          {7\'h00, 3\'h5}: kQPPGtSqrrg0 = `ALU_SRL;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:157: Define or directive not defined: \'`ALU_SRL\'\n          {7\'h00, 3\'h5}: kQPPGtSqrrg0 = `ALU_SRL;\n                                        ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:158: syntax error, unexpected \':\'\n          {7\'h20, 3\'h5}: kQPPGtSqrrg0 = `ALU_SRA;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:158: Define or directive not defined: \'`ALU_SRA\'\n          {7\'h20, 3\'h5}: kQPPGtSqrrg0 = `ALU_SRA;\n                                        ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:159: syntax error, unexpected \':\'\n          {7\'h00, 3\'h6}: kQPPGtSqrrg0 = `ALU_OR;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:159: Define or directive not defined: \'`ALU_OR\'\n          {7\'h00, 3\'h6}: kQPPGtSqrrg0 = `ALU_OR;\n                                        ^~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:160: syntax error, unexpected \':\'\n          {7\'h00, 3\'h7}: kQPPGtSqrrg0 = `ALU_AND;\n                       ^\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:160: Define or directive not defined: \'`ALU_AND\'\n          {7\'h00, 3\'h7}: kQPPGtSqrrg0 = `ALU_AND;\n                                        ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:167: Define or directive not defined: \'`LUI_OPCODE\'\n      `LUI_OPCODE: begin\n      ^~~~~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:170: Define or directive not defined: \'`ALU_ADD\'\n            `ALU_ADD,\n            ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:171: Define or directive not defined: \'`ALU_OR\'\n            `ALU_OR,\n            ^~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:172: Define or directive not defined: \'`ALU_XOR\'\n            `ALU_XOR:\n            ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:174: Define or directive not defined: \'`ALU_ADD\'\n            default: kQPPGtSqrrg0 = `ALU_ADD;\n                                    ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/tb_miriscv_decode_obf.v:179: Define or directive not defined: \'`BRANCH_OPCODE\'\n      `BRANCH_OPCODE: begin\n      ^~~~~~~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
function i9Xe5cLse;
    input [31:0] mplvZae, Ep6WE8jtOlZ;
    if (mplvZae === Ep6WE8jtOlZ)
      i9Xe5cLse = 1'b0;
    else begin
      i9Xe5cLse = 1'b1;
      XMLVHtniB4 = XMLVHtniB4 + 1'b1;
    end
  endfunction
function i9Xe5cLse;

    input [31:0] mplvZae, Ep6WE8jtOlZ;
    if (mplvZae === Ep6WE8jtOlZ)
      i9Xe5cLse = 1'b0;
    else begin
      i9Xe5cLse = 1'b1;
      XMLVHtniB4 = XMLVHtniB4 + 1'b1;
    end
  endfunction