data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v
1: b'%Warning-IMPLICIT: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:238: Signal definition not found, creating implicitly: \'AnalyzerCount\'\nassign AnalyzerCount = FFTCount[6:0];    \n       ^~~~~~~~~~~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Warning-IMPLICIT: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:874: Signal definition not found, creating implicitly: \'AnalyzerOutputWE\'\n                                                                                                  : ... Suggested alternative: \'AnalyzerOutputIm\'\nassign AnalyzerOutputWE = (((FFTCount >= 17\'b1100_0011_1000_0000_0) && (FFTCount <= 18\'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7\'b0111_111));  \n       ^~~~~~~~~~~~~~~~\n%Warning-WIDTHCONCAT: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:109: Unsized numbers/parameters not allowed in concatenations.\n                                                                                                     : ... In instance FFT_Module\nassign DesiredDMMemoryLocationToRead = {ArraySideToCalculate, XN_INDEX + 1};\n                                                                       ^\n%Warning-WIDTHCONCAT: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:109: Unsized numbers/parameters not allowed in replications.\n                                                                                                     : ... In instance FFT_Module\nassign DesiredDMMemoryLocationToRead = {ArraySideToCalculate, XN_INDEX + 1};\n                                                            ^\n%Error: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:128: Cannot find file containing module: \'FFT_IFFT_IP_CORE\'\nFFT_IFFT_IP_CORE FFT_IP_CORE_Instance (\n^~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/42835347/EMU_Basic_Project,data/full_repos/permissive/42835347/FFT_IFFT_IP_CORE\n             data/full_repos/permissive/42835347/EMU_Basic_Project,data/full_repos/permissive/42835347/FFT_IFFT_IP_CORE.v\n             data/full_repos/permissive/42835347/EMU_Basic_Project,data/full_repos/permissive/42835347/FFT_IFFT_IP_CORE.sv\n             FFT_IFFT_IP_CORE\n             FFT_IFFT_IP_CORE.v\n             FFT_IFFT_IP_CORE.sv\n             obj_dir/FFT_IFFT_IP_CORE\n             obj_dir/FFT_IFFT_IP_CORE.v\n             obj_dir/FFT_IFFT_IP_CORE.sv\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:230: Operator GTE expects 24 bits on the RHS, but RHS\'s CONST \'17\'h18700\' generates 17 bits.\n                                                                                               : ... In instance FFT_Module\nassign AnalyzerInterval = ((FFTCount >= 17\'b1100_0011_1000_0000_0) && (FFTCount <= 18\'b1010_0001_1100_0000_00));\n                                     ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:230: Operator LTE expects 24 bits on the RHS, but RHS\'s CONST \'18\'h28700\' generates 18 bits.\n                                                                                               : ... In instance FFT_Module\nassign AnalyzerInterval = ((FFTCount >= 17\'b1100_0011_1000_0000_0) && (FFTCount <= 18\'b1010_0001_1100_0000_00));\n                                                                                ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:236: Operator ASSIGNW expects 9 bits on the Assign RHS, but Assign RHS\'s SUB generates 11 bits.\n                                                                                               : ... In instance FFT_Module\nassign FFTStoredOutputIndex[8:0] = (FFTCount[17:7] - 10\'b1100_0011_10);  \n                                 ^\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:238: Operator ASSIGNW expects 1 bits on the Assign RHS, but Assign RHS\'s SEL generates 7 bits.\n                                                                                               : ... In instance FFT_Module\nassign AnalyzerCount = FFTCount[6:0];    \n                     ^\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:257: Operator GTE expects 24 bits on the RHS, but RHS\'s CONST \'17\'h18700\' generates 17 bits.\n                                                                                               : ... In instance FFT_Module\nassign ND1   = (((FFTCount >= 17\'b1100_0011_1000_0000_0) && (FFTCount <= 18\'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7\'b0000_100));\n                           ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:257: Operator LTE expects 24 bits on the RHS, but RHS\'s CONST \'18\'h28700\' generates 18 bits.\n                                                                                               : ... In instance FFT_Module\nassign ND1   = (((FFTCount >= 17\'b1100_0011_1000_0000_0) && (FFTCount <= 18\'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7\'b0000_100));\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:258: Operator GTE expects 24 bits on the RHS, but RHS\'s CONST \'17\'h18700\' generates 17 bits.\n                                                                                               : ... In instance FFT_Module\nassign ND2   = (((FFTCount >= 17\'b1100_0011_1000_0000_0) && (FFTCount <= 18\'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7\'b0000_100));\n                           ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:258: Operator LTE expects 24 bits on the RHS, but RHS\'s CONST \'18\'h28700\' generates 18 bits.\n                                                                                               : ... In instance FFT_Module\nassign ND2   = (((FFTCount >= 17\'b1100_0011_1000_0000_0) && (FFTCount <= 18\'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7\'b0000_100));\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:259: Operator GTE expects 24 bits on the RHS, but RHS\'s CONST \'17\'h18700\' generates 17 bits.\n                                                                                               : ... In instance FFT_Module\nassign ND3   = (((FFTCount >= 17\'b1100_0011_1000_0000_0) && (FFTCount <= 18\'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7\'b0000_100));\n                           ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:259: Operator LTE expects 24 bits on the RHS, but RHS\'s CONST \'18\'h28700\' generates 18 bits.\n                                                                                               : ... In instance FFT_Module\nassign ND3   = (((FFTCount >= 17\'b1100_0011_1000_0000_0) && (FFTCount <= 18\'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7\'b0000_100));\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:260: Operator GTE expects 24 bits on the RHS, but RHS\'s CONST \'17\'h18700\' generates 17 bits.\n                                                                                               : ... In instance FFT_Module\nassign ND4   = (((FFTCount >= 17\'b1100_0011_1000_0000_0) && (FFTCount <= 18\'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7\'b0000_100));\n                           ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:260: Operator LTE expects 24 bits on the RHS, but RHS\'s CONST \'18\'h28700\' generates 18 bits.\n                                                                                               : ... In instance FFT_Module\nassign ND4   = (((FFTCount >= 17\'b1100_0011_1000_0000_0) && (FFTCount <= 18\'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7\'b0000_100));\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:388: Operator ASSIGN expects 9 bits on the Assign RHS, but Assign RHS\'s SEL generates 7 bits.\n                                                                                               : ... In instance FFT_Module\n      aVal1 = FioSp[6:0];\n            ^\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:407: Operator ASSIGN expects 9 bits on the Assign RHS, but Assign RHS\'s SEL generates 7 bits.\n                                                                                               : ... In instance FFT_Module\n      bVal1 = FioSp[6:0];\n            ^\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:427: Operator ASSIGN expects 9 bits on the Assign RHS, but Assign RHS\'s SEL generates 7 bits.\n                                                                                               : ... In instance FFT_Module\n      aVal2 = FioSp[6:0];\n            ^\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:446: Operator ASSIGN expects 9 bits on the Assign RHS, but Assign RHS\'s SEL generates 7 bits.\n                                                                                               : ... In instance FFT_Module\n      bVal2 = FioSp[6:0];\n            ^\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:466: Operator ASSIGN expects 9 bits on the Assign RHS, but Assign RHS\'s SEL generates 7 bits.\n                                                                                               : ... In instance FFT_Module\n      aVal3 = FioSp[6:0];\n            ^\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:485: Operator ASSIGN expects 9 bits on the Assign RHS, but Assign RHS\'s SEL generates 7 bits.\n                                                                                               : ... In instance FFT_Module\n      bVal3 = FioSp[6:0];\n            ^\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:505: Operator ASSIGN expects 9 bits on the Assign RHS, but Assign RHS\'s SEL generates 7 bits.\n                                                                                               : ... In instance FFT_Module\n      aVal4 = FioSp[6:0];\n            ^\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:524: Operator ASSIGN expects 9 bits on the Assign RHS, but Assign RHS\'s SEL generates 7 bits.\n                                                                                               : ... In instance FFT_Module\n      bVal4 = FioSp[6:0];\n            ^\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:575: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} <= (aValIndMult1)) && ({(P1a - P2a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:575: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} <= (aValIndMult1)) && ({(P1a - P2a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:578: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} <= (aValIndMult1)) && ({(P1a - P2a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:578: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} <= (aValIndMult1)) && ({(P1a - P2a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:581: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} <= (aValIndMult1)) || ({(P2a - P1a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:581: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} <= (aValIndMult1)) || ({(P2a - P1a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:584: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} <= (aValIndMult1)) || ({(P2a - P1a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:584: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} <= (aValIndMult1)) || ({(P2a - P1a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:587: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} >= (aValIndMult1)) && ({(P1a - P2a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:587: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} >= (aValIndMult1)) && ({(P1a - P2a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:590: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} >= (aValIndMult1)) && ({(P1a - P2a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:590: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} >= (aValIndMult1)) && ({(P1a - P2a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:593: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} >= (aValIndMult1)) || ({(P2a - P1a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:593: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} >= (aValIndMult1)) || ({(P2a - P1a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:596: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} >= (aValIndMult1)) || ({(P2a - P1a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:596: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P1a - P2a), 8\'b0000_0000} >= (aValIndMult1)) || ({(P2a - P1a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:599: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} <= (aValIndMult1)) || ({(P1a - P2a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:599: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} <= (aValIndMult1)) || ({(P1a - P2a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:602: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} <= (aValIndMult1)) || ({(P1a - P2a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:602: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} <= (aValIndMult1)) || ({(P1a - P2a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:605: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} <= (aValIndMult1)) && ({(P2a - P1a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:605: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} <= (aValIndMult1)) && ({(P2a - P1a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:608: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} <= (aValIndMult1)) && ({(P2a - P1a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:608: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} <= (aValIndMult1)) && ({(P2a - P1a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:611: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} >= (aValIndMult1)) || ({(P1a - P2a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:611: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} >= (aValIndMult1)) || ({(P1a - P2a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:614: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} >= (aValIndMult1)) || ({(P1a - P2a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:614: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} >= (aValIndMult1)) || ({(P1a - P2a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:617: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} >= (aValIndMult1)) && ({(P2a - P1a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:617: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} >= (aValIndMult1)) && ({(P2a - P1a), 8\'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:620: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} >= (aValIndMult1)) && ({(P2a - P1a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:620: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe1 = (({(P2a - P1a), 8\'b0000_0000} >= (aValIndMult1)) && ({(P2a - P1a), 8\'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:639: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} <= (aValIndMult2)) && ({(P2a - P3a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:639: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} <= (aValIndMult2)) && ({(P2a - P3a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:642: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} <= (aValIndMult2)) && ({(P2a - P3a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:642: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} <= (aValIndMult2)) && ({(P2a - P3a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:645: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} <= (aValIndMult2)) || ({(P3a - P2a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:645: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} <= (aValIndMult2)) || ({(P3a - P2a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:648: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} <= (aValIndMult2)) || ({(P3a - P2a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:648: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} <= (aValIndMult2)) || ({(P3a - P2a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:651: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} >= (aValIndMult2)) && ({(P2a - P3a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:651: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} >= (aValIndMult2)) && ({(P2a - P3a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:654: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} >= (aValIndMult2)) && ({(P2a - P3a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:654: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} >= (aValIndMult2)) && ({(P2a - P3a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:657: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} >= (aValIndMult2)) || ({(P3a - P2a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:657: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} >= (aValIndMult2)) || ({(P3a - P2a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:660: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} >= (aValIndMult2)) || ({(P3a - P2a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:660: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P2a - P3a), 8\'b0000_0000} >= (aValIndMult2)) || ({(P3a - P2a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:663: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} <= (aValIndMult2)) || ({(P2a - P3a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:663: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} <= (aValIndMult2)) || ({(P2a - P3a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:666: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} <= (aValIndMult2)) || ({(P2a - P3a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:666: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} <= (aValIndMult2)) || ({(P2a - P3a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:669: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} <= (aValIndMult2)) && ({(P3a - P2a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:669: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} <= (aValIndMult2)) && ({(P3a - P2a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:672: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} <= (aValIndMult2)) && ({(P3a - P2a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:672: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} <= (aValIndMult2)) && ({(P3a - P2a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:675: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} >= (aValIndMult2)) || ({(P2a - P3a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:675: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} >= (aValIndMult2)) || ({(P2a - P3a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:678: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} >= (aValIndMult2)) || ({(P2a - P3a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:678: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} >= (aValIndMult2)) || ({(P2a - P3a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:681: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} >= (aValIndMult2)) && ({(P3a - P2a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:681: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} >= (aValIndMult2)) && ({(P3a - P2a), 8\'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:684: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} >= (aValIndMult2)) && ({(P3a - P2a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:684: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe2 = (({(P3a - P2a), 8\'b0000_0000} >= (aValIndMult2)) && ({(P3a - P2a), 8\'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:706: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} <= (aValIndMult3)) && ({(P1a - P3a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:706: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} <= (aValIndMult3)) && ({(P1a - P3a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:709: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} <= (aValIndMult3)) && ({(P1a - P3a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:709: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} <= (aValIndMult3)) && ({(P1a - P3a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:712: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} <= (aValIndMult3)) || ({(P3a - P1a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:712: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} <= (aValIndMult3)) || ({(P3a - P1a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:715: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} <= (aValIndMult3)) || ({(P3a - P1a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:715: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} <= (aValIndMult3)) || ({(P3a - P1a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:718: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} >= (aValIndMult3)) && ({(P1a - P3a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:718: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} >= (aValIndMult3)) && ({(P1a - P3a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:721: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} >= (aValIndMult3)) && ({(P1a - P3a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:721: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} >= (aValIndMult3)) && ({(P1a - P3a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:724: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} >= (aValIndMult3)) || ({(P3a - P1a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:724: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} >= (aValIndMult3)) || ({(P3a - P1a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:727: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} >= (aValIndMult3)) || ({(P3a - P1a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:727: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P1a - P3a), 8\'b0000_0000} >= (aValIndMult3)) || ({(P3a - P1a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:730: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} <= (aValIndMult3)) || ({(P1a - P3a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:730: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} <= (aValIndMult3)) || ({(P1a - P3a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:733: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} <= (aValIndMult3)) || ({(P1a - P3a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:733: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} <= (aValIndMult3)) || ({(P1a - P3a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:736: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} <= (aValIndMult3)) && ({(P3a - P1a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:736: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} <= (aValIndMult3)) && ({(P3a - P1a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:739: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} <= (aValIndMult3)) && ({(P3a - P1a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:739: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} <= (aValIndMult3)) && ({(P3a - P1a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:742: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} >= (aValIndMult3)) || ({(P1a - P3a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:742: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} >= (aValIndMult3)) || ({(P1a - P3a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:745: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} >= (aValIndMult3)) || ({(P1a - P3a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:745: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} >= (aValIndMult3)) || ({(P1a - P3a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:748: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} >= (aValIndMult3)) && ({(P3a - P1a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:748: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} >= (aValIndMult3)) && ({(P3a - P1a), 8\'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:751: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} >= (aValIndMult3)) && ({(P3a - P1a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:751: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe3 = (({(P3a - P1a), 8\'b0000_0000} >= (aValIndMult3)) && ({(P3a - P1a), 8\'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:772: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} <= (aValIndMult4)) && ({(P1a - P4a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:772: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} <= (aValIndMult4)) && ({(P1a - P4a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:775: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} <= (aValIndMult4)) && ({(P1a - P4a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:775: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} <= (aValIndMult4)) && ({(P1a - P4a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:778: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} <= (aValIndMult4)) || ({(P4a - P1a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:778: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} <= (aValIndMult4)) || ({(P4a - P1a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0); \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:781: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} <= (aValIndMult4)) || ({(P4a - P1a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:781: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} <= (aValIndMult4)) || ({(P4a - P1a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:784: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} >= (aValIndMult4)) && ({(P1a - P4a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:784: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} >= (aValIndMult4)) && ({(P1a - P4a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:787: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} >= (aValIndMult4)) && ({(P1a - P4a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:787: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} >= (aValIndMult4)) && ({(P1a - P4a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:790: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} >= (aValIndMult4)) || ({(P4a - P1a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:790: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} >= (aValIndMult4)) || ({(P4a - P1a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:793: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} >= (aValIndMult4)) || ({(P4a - P1a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:793: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P1a - P4a), 8\'b0000_0000} >= (aValIndMult4)) || ({(P4a - P1a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:796: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} <= (aValIndMult4)) || ({(P1a - P4a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:796: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} <= (aValIndMult4)) || ({(P1a - P4a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:799: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} <= (aValIndMult4)) || ({(P1a - P4a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:799: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} <= (aValIndMult4)) || ({(P1a - P4a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:802: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} <= (aValIndMult4)) && ({(P4a - P1a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:802: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} <= (aValIndMult4)) && ({(P4a - P1a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:805: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} <= (aValIndMult4)) && ({(P4a - P1a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:805: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} <= (aValIndMult4)) && ({(P4a - P1a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:808: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} >= (aValIndMult4)) || ({(P1a - P4a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:808: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} >= (aValIndMult4)) || ({(P1a - P4a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:811: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} >= (aValIndMult4)) || ({(P1a - P4a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:811: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} >= (aValIndMult4)) || ({(P1a - P4a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:814: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} >= (aValIndMult4)) && ({(P4a - P1a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:814: Operator LTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} >= (aValIndMult4)) && ({(P4a - P1a), 8\'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);\n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:817: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} >= (aValIndMult4)) && ({(P4a - P1a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:817: Operator GTE expects 18 bits on the LHS, but LHS\'s REPLICATE generates 16 bits.\n                                                                                               : ... In instance FFT_Module\n                 AnalyzerConditionRe4 = (({(P4a - P1a), 8\'b0000_0000} >= (aValIndMult4)) && ({(P4a - P1a), 8\'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9\'b0010_0000_0);   \n                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:874: Operator GTE expects 24 bits on the RHS, but RHS\'s CONST \'17\'h18700\' generates 17 bits.\n                                                                                               : ... In instance FFT_Module\nassign AnalyzerOutputWE = (((FFTCount >= 17\'b1100_0011_1000_0000_0) && (FFTCount <= 18\'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7\'b0111_111));  \n                                      ^~\n%Warning-WIDTH: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:874: Operator LTE expects 24 bits on the RHS, but RHS\'s CONST \'18\'h28700\' generates 18 bits.\n                                                                                               : ... In instance FFT_Module\nassign AnalyzerOutputWE = (((FFTCount >= 17\'b1100_0011_1000_0000_0) && (FFTCount <= 18\'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7\'b0111_111));  \n                                                                                 ^~\n%Error: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:924: Cannot find file containing module: \'FFT_IFFT_IP_CORE\'\nFFT_IFFT_IP_CORE IFFT_IP_CORE_Instance (\n^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:948: Cannot find file containing module: \'Translation_Module_DM\'\nTranslation_Module_DM Translation_Module_DM_Instance1 (\n^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:959: Cannot find file containing module: \'Translation_Module_DM\'\nTranslation_Module_DM Translation_Module_DM_Instance2 (\n^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:970: Cannot find file containing module: \'Translation_Module_DM\'\nTranslation_Module_DM Translation_Module_DM_Instance3 (\n^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/42835347/EMU_Basic_Project/FFT_and_IFFT_Module.v:981: Cannot find file containing module: \'Translation_Module_DM\'\nTranslation_Module_DM Translation_Module_DM_Instance4 (\n^~~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 6 error(s), 154 warning(s)\n'
module FFT_Module(
CLK,  
DesiredDMInterfaceOutput,
DesiredDMMemoryLocationToRead,
DesiredDM,
DMLocationWritingTo,
IFFTOutputWE,
IFFTOutput,
IFFTOutputIndex,
SampleDelayZero,
rst,
FioSp
);
	 
input         CLK, SampleDelayZero, rst;
input [9:0]   DMLocationWritingTo;
input [8:0]   DesiredDMInterfaceOutput;
output [9:0]  DesiredDMMemoryLocationToRead;

input [13:0]  FioSp;


output        IFFTOutputWE;
output [1:0]  DesiredDM;
output [8:0]  IFFTOutputIndex;
output [11:0] IFFTOutput;


wire          IDONE, IRFD, IDV, IBUSY, IEDONE, IFWD_INV, IFWD_INV_WE, ISTART, IUNLOAD, IFFTOutputWE;
wire [1:0]    DesiredDM;
wire [1:0]    FFTStartNumber; 
wire [8:0]    IXN_INDEX, IXK_INDEX, IFFTOutputIndex;
wire [8:0]    IXN_RE, IXN_IM, DesiredAnalyzerOutputRe, DesiredAnalyzerOutputIm;
wire [11:0]   IFFTOutput;
wire [18:0]   IXK_RE, IXK_IM;

                             
              
reg [23:0]    FFTStoredOutput1;
                                
reg [23:0]    FFTStoredOutput2;

reg [23:0]    FFTStoredOutput3;

reg [23:0]    FFTStoredOutput4;


reg [23:0]    FFTStored1 [511:0];

reg [23:0]    FFTStored2 [511:0];     

reg [23:0]    FFTStored3 [511:0];     

reg [23:0]    FFTStored4 [511:0];     


reg [23:0]    AnalyzerStored [511:0];


reg [23:0]    FFTCount;


wire          CLK, SampleDelayZero, DONE, RFD, DV, BUSY, EDONE,  ArraySideToCalculate, FWD_INV, FWD_INV_WE, START, UNLOAD, FFTOutputWE;
wire [8:0]    XN_INDEX, XK_INDEX;
wire [9:0]    DMLocationWritingTo;
wire [8:0]    XN_RE, XN_IM, DesiredDMInterfaceOutput, FFTOutputIndex;
wire [11:0]   FFTOutputRe, FFTOutputIm;
wire [9:0]    DesiredDMMemoryLocationToRead;
wire [18:0]   XK_RE, XK_IM;








assign ArraySideToCalculate = !DMLocationWritingTo[9];

always @(posedge CLK)
begin
  if ( (~| DMLocationWritingTo[8:0]) && SampleDelayZero)
  begin
    FFTCount <= 0;
  end

  else 
  begin
    FFTCount <= FFTCount + 1;
  end
  
end

assign DesiredDM[1:0] =  {(FFTCount >= 20000), (((FFTCount < 20000) && (FFTCount >= 10000)) || (FFTCount >= 30000))};
assign START = (FFTCount == 100) || (FFTCount == 10100) || (FFTCount == 20100) || (FFTCount == 30100);
assign FWD_INV = 1;
assign FWD_INV_WE = (FFTCount == 60);



assign UNLOAD = DONE;

assign DesiredDMMemoryLocationToRead = {ArraySideToCalculate, XN_INDEX + 1};
assign XN_RE = {!DesiredDMInterfaceOutput[8], DesiredDMInterfaceOutput [7:0]};
assign XN_IM = 9'b0000_0000_0;    


assign FFTOutputRe = {XK_RE[18], XK_RE[17:7]}; 
assign FFTOutputIm = {XK_IM[18], XK_IM[17:7]};




assign FFTOutputWE = DV;
assign FFTOutputIndex = XK_INDEX[8:0];






FFT_IFFT_IP_CORE FFT_IP_CORE_Instance (
  .clk(CLK),
  .start(START),
  .unload(UNLOAD),
  .xn_re(XN_RE),
  .xn_im(XN_IM),
  .fwd_inv(FWD_INV),
  .fwd_inv_we(FWD_INV_WE),
  .rfd(RFD),
  .xn_index(XN_INDEX),
  .busy(BUSY),
  .edone(EDONE),
  .done(DONE),
  .dv(DV),
  .xk_index(XK_INDEX),
  .xk_re(XK_RE),
  .xk_im(XK_IM)
);














wire          ND1, RDY1, RFD1;
wire [9:0]    X_IN1, Y_IN1, X_OUT1, PHASE_OUT1;

wire          ND2, RDY2, RFD2;
wire [9:0]    X_IN2, Y_IN2, X_OUT2, PHASE_OUT2;

wire          ND3, RDY3, RFD3;
wire [9:0]    X_IN3, Y_IN3, X_OUT3, PHASE_OUT3;

wire          ND4, RDY4, RFD4;
wire [9:0]    X_IN4, Y_IN4, X_OUT4, PHASE_OUT4;



wire [8:0]    FFTStoredOutputIndex;

assign FFTStartNumber = DesiredDM;

always @(posedge CLK)
begin
  if (DV && !FFTStartNumber[1] && !FFTStartNumber[0])
  begin
    FFTStored1[XK_INDEX] <= {FFTOutputRe[11:0], FFTOutputIm[11:0]};
  end

  FFTStoredOutput1 <= FFTStored1[FFTStoredOutputIndex];
end



always @(posedge CLK)
begin
  if (DV && !FFTStartNumber[1] && FFTStartNumber[0])
  begin
    FFTStored2[XK_INDEX] <= {FFTOutputRe[11:0], FFTOutputIm[11:0]};
  end
                   
  FFTStoredOutput2 <= FFTStored2[FFTStoredOutputIndex];
end



always @(posedge CLK)
begin
  if (DV && FFTStartNumber[1] && !FFTStartNumber[0])
  begin
    FFTStored3[XK_INDEX] <= {FFTOutputRe[11:0], FFTOutputIm[11:0]};
  end

  FFTStoredOutput3 <= FFTStored3[FFTStoredOutputIndex];
end



always @(posedge CLK)
begin
  if (DV && FFTStartNumber[1] && FFTStartNumber[0])
  begin
    FFTStored4[XK_INDEX] <= {FFTOutputRe[11:0], FFTOutputIm[11:0]};
  end
                   
  FFTStoredOutput4 <= FFTStored4[FFTStoredOutputIndex];
end



wire          AnalyzerInterval;
wire [17:0]   FFTStoredOutputIndexMath;


assign AnalyzerInterval = ((FFTCount >= 17'b1100_0011_1000_0000_0) && (FFTCount <= 18'b1010_0001_1100_0000_00));





assign FFTStoredOutputIndex[8:0] = (FFTCount[17:7] - 10'b1100_0011_10);

assign AnalyzerCount = FFTCount[6:0];



assign X_IN1 = {FFTStoredOutput1[23], FFTStoredOutput1[23], FFTStoredOutput1[22:15]};
assign Y_IN1 = {FFTStoredOutput1[11], FFTStoredOutput1[11], FFTStoredOutput1[10:3]};
assign X_IN2 = {FFTStoredOutput2[23], FFTStoredOutput2[23], FFTStoredOutput2[22:15]};
assign Y_IN2 = {FFTStoredOutput2[11], FFTStoredOutput2[11], FFTStoredOutput2[10:3]};
assign X_IN3 = {FFTStoredOutput3[23], FFTStoredOutput3[23], FFTStoredOutput3[22:15]};
assign Y_IN3 = {FFTStoredOutput3[11], FFTStoredOutput3[11], FFTStoredOutput3[10:3]};
assign X_IN4 = {FFTStoredOutput4[23], FFTStoredOutput4[23], FFTStoredOutput4[22:15]};
assign Y_IN4 = {FFTStoredOutput4[11], FFTStoredOutput4[11], FFTStoredOutput4[10:3]};







assign ND1   = (((FFTCount >= 17'b1100_0011_1000_0000_0) && (FFTCount <= 18'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7'b0000_100));
assign ND2   = (((FFTCount >= 17'b1100_0011_1000_0000_0) && (FFTCount <= 18'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7'b0000_100));
assign ND3   = (((FFTCount >= 17'b1100_0011_1000_0000_0) && (FFTCount <= 18'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7'b0000_100));
assign ND4   = (((FFTCount >= 17'b1100_0011_1000_0000_0) && (FFTCount <= 18'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7'b0000_100));


wire [7:0] P1a, P2a, P3a, P4a;

assign P1a = {PHASE_OUT1[9], PHASE_OUT1[6:0]};
assign P2a = {PHASE_OUT2[9], PHASE_OUT2[6:0]};
assign P3a = {PHASE_OUT3[9], PHASE_OUT3[6:0]};
assign P4a = {PHASE_OUT4[9], PHASE_OUT4[6:0]};


















































wire         aValF1, bValF1, aCond1, bCond1;
wire         aValF2, bValF2, aCond2, bCond2;
wire         aValF3, bValF3, aCond3, bCond3;
wire         aValF4, bValF4, aCond4, bCond4;

reg          aValFr1, bValFr1, aValM1, bValM1;
reg          aValFr2, bValFr2, aValM2, bValM2;
reg          aValFr3, bValFr3, aValM3, bValM3;
reg          aValFr4, bValFr4, aValM4, bValM4;

reg [8:0]    aVal1, bVal1;
reg [8:0]    aVal2, bVal2;
reg [8:0]    aVal3, bVal3;
reg [8:0]    aVal4, bVal4;

wire [17:0]  aValIndMult1, bValIndMult1;
wire [17:0]  aValIndMult2, bValIndMult2;
wire [17:0]  aValIndMult3, bValIndMult3;
wire [17:0]  aValIndMult4, bValIndMult4;

reg          AnalyzerConditionRe1;
reg          AnalyzerConditionRe2;
reg          AnalyzerConditionRe3;
reg          AnalyzerConditionRe4;

wire         AnalyzerConditionRe;
wire         AnalyzerConditionIm;
wire [11:0]  AnalyzerOutputRe, AnalyzerOutputIm;





assign aCond1 = !FioSp[12] && !FioSp[11] && FioSp[10] &&  FioSp[9];
assign bCond1 = !FioSp[12] && !FioSp[11] && FioSp[10] && !FioSp[9];

assign aCond2 = !FioSp[12] &&  FioSp[11] && FioSp[10] &&  FioSp[9];
assign bCond2 = !FioSp[12] &&  FioSp[11] && FioSp[10] && !FioSp[9];

assign aCond3 =  FioSp[12] && !FioSp[11] && FioSp[10] &&  FioSp[9];
assign bCond3 =  FioSp[12] && !FioSp[11] && FioSp[10] && !FioSp[9];

assign aCond4 =  FioSp[12] &&  FioSp[11] && FioSp[10] &&  FioSp[9];
assign bCond4 =  FioSp[12] &&  FioSp[11] && FioSp[10] && !FioSp[9];





always @ (aCond1 or FioSp[8])
  begin 
    if (aCond1 == 1)
      aValFr1 = FioSp[8];
  end

always @ (aCond1 or FioSp[7])
  begin
    if (aCond1 == 1)
      aValM1 = FioSp[7];
  end

always @ (aCond1 or FioSp[6:0])
  begin
    if (aCond1 == 1)
      aVal1 = FioSp[6:0];
  end


always @ (bCond1 or FioSp[8])
  begin
    if (bCond1 == 1)
      bValFr1 = FioSp[8];
  end

always @ (bCond1 or FioSp[7])
  begin
    if (bCond1 == 1)
      bValM1 = FioSp[7];
  end

always @ (bCond1 or FioSp[6:0])
  begin
    if (bCond1 == 1)
      bVal1 = FioSp[6:0];
  end



always @ (aCond2 or FioSp[8])
  begin 
    if (aCond2 == 1)
      aValFr2 = FioSp[8];
  end

always @ (aCond2 or FioSp[7])
  begin
    if (aCond2 == 1)
      aValM2 = FioSp[7];
  end

always @ (aCond2 or FioSp[6:0])
  begin
    if (aCond2 == 1)
      aVal2 = FioSp[6:0];
  end


always @ (bCond2 or FioSp[8])
  begin
    if (bCond2 == 1)
      bValFr2 = FioSp[8];
  end

always @ (bCond2 or FioSp[7])
  begin
    if (bCond2 == 1)
      bValM2 = FioSp[7];
  end

always @ (bCond2 or FioSp[6:0])
  begin
    if (bCond2 == 1)
      bVal2 = FioSp[6:0];
  end



always @ (aCond3 or FioSp[8])
  begin 
    if (aCond3 == 1)
      aValFr3 = FioSp[8];
  end

always @ (aCond3 or FioSp[7])
  begin
    if (aCond3 == 1)
      aValM3 = FioSp[7];
  end

always @ (aCond3 or FioSp[6:0])
  begin
    if (aCond3 == 1)
      aVal3 = FioSp[6:0];
  end


always @ (bCond3 or FioSp[8])
  begin
    if (bCond3 == 1)
      bValFr3 = FioSp[8];
  end

always @ (bCond3 or FioSp[7])
  begin
    if (bCond3 == 1)
      bValM3 = FioSp[7];
  end

always @ (bCond3 or FioSp[6:0])
  begin
    if (bCond3 == 1)
      bVal3 = FioSp[6:0];
  end



always @ (aCond4 or FioSp[8])
  begin 
    if (aCond4 == 1)
      aValFr4 = FioSp[8];
  end

always @ (aCond4 or FioSp[7])
  begin
    if (aCond4 == 1)
      aValM4 = FioSp[7];
  end

always @ (aCond4 or FioSp[6:0])
  begin
    if (aCond4 == 1)
      aVal4 = FioSp[6:0];
  end


always @ (bCond4 or FioSp[8])
  begin
    if (bCond4 == 1)
      bValFr4 = FioSp[8];
  end

always @ (bCond4 or FioSp[7])
  begin
    if (bCond4 == 1)
      bValM4 = FioSp[7];
  end

always @ (bCond4 or FioSp[6:0])
  begin
    if (bCond4 == 1)
      bVal4 = FioSp[6:0];
  end






assign aValF1 = aValFr1 == (FFTStoredOutputIndex <= 9'b1000_0000_0);
assign bValF1 = bValFr1 == (FFTStoredOutputIndex <= 9'b1000_0000_0);

assign aValF2 = aValFr2 == (FFTStoredOutputIndex <= 9'b1000_0000_0);
assign bValF2 = bValFr2 == (FFTStoredOutputIndex <= 9'b1000_0000_0);

assign aValF3 = aValFr3 == (FFTStoredOutputIndex <= 9'b1000_0000_0);
assign bValF3 = bValFr3 == (FFTStoredOutputIndex <= 9'b1000_0000_0);

assign aValF4 = aValFr4 == (FFTStoredOutputIndex <= 9'b1000_0000_0);
assign bValF4 = bValFr4 == (FFTStoredOutputIndex <= 9'b1000_0000_0);






assign aValIndMult1 = aVal1 * FFTStoredOutputIndex;
assign bValIndMult1 = bVal1 * FFTStoredOutputIndex;

assign aValIndMult2 = aVal2 * FFTStoredOutputIndex;
assign bValIndMult2 = bVal2 * FFTStoredOutputIndex;

assign aValIndMult3 = aVal3 * FFTStoredOutputIndex;
assign bValIndMult3 = bVal3 * FFTStoredOutputIndex;

assign aValIndMult4 = aVal4 * FFTStoredOutputIndex;
assign bValIndMult4 = bVal4 * FFTStoredOutputIndex;




always @ (aValF1 or aValM1 or bValF1 or bValM1 or P1a or P2a or aValIndMult1 or bValIndMult1 or FFTStoredOutputIndex) 
begin
  case ({aValF1, aValM1, bValF1, bValM1}) 
    4'b0000 :  begin
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} <= (aValIndMult1)) && ({(P1a - P2a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end  
    4'b0001 :  begin
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} <= (aValIndMult1)) && ({(P1a - P2a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0010 :  begin
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} <= (aValIndMult1)) || ({(P2a - P1a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0011 :  begin
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} <= (aValIndMult1)) || ({(P2a - P1a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0100 :  begin 
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} >= (aValIndMult1)) && ({(P1a - P2a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0101 :  begin
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} >= (aValIndMult1)) && ({(P1a - P2a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0110 :  begin
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} >= (aValIndMult1)) || ({(P2a - P1a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0111 :  begin
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} >= (aValIndMult1)) || ({(P2a - P1a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1000 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} <= (aValIndMult1)) || ({(P1a - P2a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1001 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} <= (aValIndMult1)) || ({(P1a - P2a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1010 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} <= (aValIndMult1)) && ({(P2a - P1a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1011 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} <= (aValIndMult1)) && ({(P2a - P1a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1100 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} >= (aValIndMult1)) || ({(P1a - P2a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1101 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} >= (aValIndMult1)) || ({(P1a - P2a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1110 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} >= (aValIndMult1)) && ({(P2a - P1a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1111 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} >= (aValIndMult1)) && ({(P2a - P1a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    default :  begin
                 AnalyzerConditionRe1 = 0; 
               end
  endcase 
end








always @ (aValF2 or aValM2 or bValF2 or bValM2 or P2a or P3a or aValIndMult2 or bValIndMult2 or FFTStoredOutputIndex) 
begin
  case ({aValF2, aValM2, bValF2, bValM2}) 
    4'b0000 :  begin
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} <= (aValIndMult2)) && ({(P2a - P3a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end  
    4'b0001 :  begin
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} <= (aValIndMult2)) && ({(P2a - P3a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0010 :  begin
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} <= (aValIndMult2)) || ({(P3a - P2a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0011 :  begin
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} <= (aValIndMult2)) || ({(P3a - P2a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0100 :  begin 
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} >= (aValIndMult2)) && ({(P2a - P3a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0101 :  begin
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} >= (aValIndMult2)) && ({(P2a - P3a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0110 :  begin
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} >= (aValIndMult2)) || ({(P3a - P2a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0111 :  begin
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} >= (aValIndMult2)) || ({(P3a - P2a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1000 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} <= (aValIndMult2)) || ({(P2a - P3a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1001 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} <= (aValIndMult2)) || ({(P2a - P3a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1010 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} <= (aValIndMult2)) && ({(P3a - P2a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1011 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} <= (aValIndMult2)) && ({(P3a - P2a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1100 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} >= (aValIndMult2)) || ({(P2a - P3a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1101 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} >= (aValIndMult2)) || ({(P2a - P3a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1110 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} >= (aValIndMult2)) && ({(P3a - P2a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1111 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} >= (aValIndMult2)) && ({(P3a - P2a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    default :  begin
                 AnalyzerConditionRe2 = 0;        
               end
  endcase 
end











always @ (aValF3 or aValM3 or bValF3 or bValM3 or P1a or P3a or aValIndMult3 or bValIndMult3 or FFTStoredOutputIndex) 
begin
  case ({aValF3, aValM3, bValF3, bValM3}) 
    4'b0000 :  begin
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} <= (aValIndMult3)) && ({(P1a - P3a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end  
    4'b0001 :  begin
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} <= (aValIndMult3)) && ({(P1a - P3a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0010 :  begin
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} <= (aValIndMult3)) || ({(P3a - P1a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0011 :  begin
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} <= (aValIndMult3)) || ({(P3a - P1a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0100 :  begin 
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} >= (aValIndMult3)) && ({(P1a - P3a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0101 :  begin
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} >= (aValIndMult3)) && ({(P1a - P3a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0110 :  begin
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} >= (aValIndMult3)) || ({(P3a - P1a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0111 :  begin
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} >= (aValIndMult3)) || ({(P3a - P1a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1000 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} <= (aValIndMult3)) || ({(P1a - P3a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1001 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} <= (aValIndMult3)) || ({(P1a - P3a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1010 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} <= (aValIndMult3)) && ({(P3a - P1a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1011 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} <= (aValIndMult3)) && ({(P3a - P1a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1100 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} >= (aValIndMult3)) || ({(P1a - P3a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1101 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} >= (aValIndMult3)) || ({(P1a - P3a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1110 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} >= (aValIndMult3)) && ({(P3a - P1a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1111 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} >= (aValIndMult3)) && ({(P3a - P1a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    default :  begin
                 AnalyzerConditionRe3 = 0;        
               end
  endcase 
end










always @ (aValF4 or aValM4 or bValF4 or bValM4 or P1a or P4a or aValIndMult4 or bValIndMult4 or FFTStoredOutputIndex) 
begin
  case ({aValF4, aValM4, bValF4, bValM4}) 
    4'b0000 :  begin
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} <= (aValIndMult4)) && ({(P1a - P4a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end  
    4'b0001 :  begin
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} <= (aValIndMult4)) && ({(P1a - P4a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0010 :  begin
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} <= (aValIndMult4)) || ({(P4a - P1a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0011 :  begin
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} <= (aValIndMult4)) || ({(P4a - P1a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0100 :  begin 
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} >= (aValIndMult4)) && ({(P1a - P4a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0101 :  begin
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} >= (aValIndMult4)) && ({(P1a - P4a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0110 :  begin
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} >= (aValIndMult4)) || ({(P4a - P1a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0111 :  begin
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} >= (aValIndMult4)) || ({(P4a - P1a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1000 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} <= (aValIndMult4)) || ({(P1a - P4a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1001 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} <= (aValIndMult4)) || ({(P1a - P4a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1010 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} <= (aValIndMult4)) && ({(P4a - P1a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1011 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} <= (aValIndMult4)) && ({(P4a - P1a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1100 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} >= (aValIndMult4)) || ({(P1a - P4a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1101 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} >= (aValIndMult4)) || ({(P1a - P4a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1110 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} >= (aValIndMult4)) && ({(P4a - P1a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1111 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} >= (aValIndMult4)) && ({(P4a - P1a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    default :  begin
                 AnalyzerConditionRe4 = 0;        
               end
  endcase 
end









assign AnalyzerConditionRe = ((AnalyzerConditionRe1) && (AnalyzerConditionRe2) && (AnalyzerConditionRe3) && (AnalyzerConditionRe4));




















assign AnalyzerConditionIm = AnalyzerConditionRe;







assign AnalyzerOutputRe = ((AnalyzerConditionRe) || rst) ? FFTStoredOutput3[23:12] : 12'b0000_0000_0000;
assign AnalyzerOutputIm = ((AnalyzerConditionIm) || rst) ? FFTStoredOutput3[11:0]  : 12'b0000_0000_0000;










assign AnalyzerOutputWE = (((FFTCount >= 17'b1100_0011_1000_0000_0) && (FFTCount <= 18'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7'b0111_111));

reg [23:0] AnalyzerStoredOutput;



always @(posedge CLK)
begin
  if (AnalyzerOutputWE)
  begin
    AnalyzerStored[FFTStoredOutputIndex] <= {AnalyzerOutputRe[11:0], AnalyzerOutputIm[11:0]};
  end
  
  AnalyzerStoredOutput <= AnalyzerStored[IXN_INDEX + 1];
end





assign IXN_RE = ((IXN_INDEX >= 9'b00000_0100) && (IXN_INDEX <= 9'b11111_1100)) ? {AnalyzerStoredOutput[23], AnalyzerStoredOutput[19:12]} : 9'b00000_0000;
assign IXN_IM = ((IXN_INDEX >= 9'b00000_0100) && (IXN_INDEX <= 9'b11111_1100)) ? {AnalyzerStoredOutput[11], AnalyzerStoredOutput[7:0]}   : 9'b00000_0000;












assign ISTART      = (FFTCount == 200100);
assign IFWD_INV    = 0;
assign IFWD_INV_WE = (FFTCount == 60);



assign IUNLOAD = IDONE;


assign IFFTOutput      = {(!IXK_RE[18]), IXK_RE[7:0], 3'b000}; 
assign IFFTOutputWE    = IDV;
assign IFFTOutputIndex = IXK_INDEX[8:0];


	 
	 
FFT_IFFT_IP_CORE IFFT_IP_CORE_Instance (
.clk(CLK),
.start(ISTART),
.unload(IUNLOAD),
.xn_re(IXN_RE),
.xn_im(IXN_IM),
.fwd_inv(IFWD_INV),
.fwd_inv_we(IFWD_INV_WE),
.rfd(IRFD),
.xn_index(IXN_INDEX),
.busy(IBUSY),
.edone(IEDONE),
.done(IDONE),
.dv(IDV),
.xk_index(IXK_INDEX),
.xk_re(IXK_RE),
.xk_im(IXK_IM)
);






Translation_Module_DM Translation_Module_DM_Instance1 (
  .x_in(X_IN1),
  .y_in(Y_IN1),
  .nd(ND1),
  .x_out(X_OUT1),
  .phase_out(PHASE_OUT1),
  .rdy(RDY1),
  .rfd(RFD1),
  .clk(CLK)
);

Translation_Module_DM Translation_Module_DM_Instance2 (
  .x_in(X_IN2),
  .y_in(Y_IN2),
  .nd(ND2),
  .x_out(X_OUT2),
  .phase_out(PHASE_OUT2),
  .rdy(RDY2),
  .rfd(RFD2),
  .clk(CLK)
);

Translation_Module_DM Translation_Module_DM_Instance3 (
  .x_in(X_IN3),
  .y_in(Y_IN3),
  .nd(ND3),
  .x_out(X_OUT3),
  .phase_out(PHASE_OUT3),
  .rdy(RDY3),
  .rfd(RFD3),
  .clk(CLK)
);

Translation_Module_DM Translation_Module_DM_Instance4 (
  .x_in(X_IN4),
  .y_in(Y_IN4),
  .nd(ND4),
  .x_out(X_OUT4),
  .phase_out(PHASE_OUT4),
  .rdy(RDY4),
  .rfd(RFD4),
  .clk(CLK)
);












endmodule
module FFT_Module(
CLK,  
DesiredDMInterfaceOutput,
DesiredDMMemoryLocationToRead,
DesiredDM,
DMLocationWritingTo,
IFFTOutputWE,
IFFTOutput,
IFFTOutputIndex,
SampleDelayZero,
rst,
FioSp
);

	 
input         CLK, SampleDelayZero, rst;
input [9:0]   DMLocationWritingTo;
input [8:0]   DesiredDMInterfaceOutput;
output [9:0]  DesiredDMMemoryLocationToRead;

input [13:0]  FioSp;


output        IFFTOutputWE;
output [1:0]  DesiredDM;
output [8:0]  IFFTOutputIndex;
output [11:0] IFFTOutput;


wire          IDONE, IRFD, IDV, IBUSY, IEDONE, IFWD_INV, IFWD_INV_WE, ISTART, IUNLOAD, IFFTOutputWE;
wire [1:0]    DesiredDM;
wire [1:0]    FFTStartNumber; 
wire [8:0]    IXN_INDEX, IXK_INDEX, IFFTOutputIndex;
wire [8:0]    IXN_RE, IXN_IM, DesiredAnalyzerOutputRe, DesiredAnalyzerOutputIm;
wire [11:0]   IFFTOutput;
wire [18:0]   IXK_RE, IXK_IM;

                             
              
reg [23:0]    FFTStoredOutput1;
                                
reg [23:0]    FFTStoredOutput2;

reg [23:0]    FFTStoredOutput3;

reg [23:0]    FFTStoredOutput4;


reg [23:0]    FFTStored1 [511:0];

reg [23:0]    FFTStored2 [511:0];     

reg [23:0]    FFTStored3 [511:0];     

reg [23:0]    FFTStored4 [511:0];     


reg [23:0]    AnalyzerStored [511:0];


reg [23:0]    FFTCount;


wire          CLK, SampleDelayZero, DONE, RFD, DV, BUSY, EDONE,  ArraySideToCalculate, FWD_INV, FWD_INV_WE, START, UNLOAD, FFTOutputWE;
wire [8:0]    XN_INDEX, XK_INDEX;
wire [9:0]    DMLocationWritingTo;
wire [8:0]    XN_RE, XN_IM, DesiredDMInterfaceOutput, FFTOutputIndex;
wire [11:0]   FFTOutputRe, FFTOutputIm;
wire [9:0]    DesiredDMMemoryLocationToRead;
wire [18:0]   XK_RE, XK_IM;








assign ArraySideToCalculate = !DMLocationWritingTo[9];

always @(posedge CLK)
begin
  if ( (~| DMLocationWritingTo[8:0]) && SampleDelayZero)
  begin
    FFTCount <= 0;
  end

  else 
  begin
    FFTCount <= FFTCount + 1;
  end
  
end

assign DesiredDM[1:0] =  {(FFTCount >= 20000), (((FFTCount < 20000) && (FFTCount >= 10000)) || (FFTCount >= 30000))};
assign START = (FFTCount == 100) || (FFTCount == 10100) || (FFTCount == 20100) || (FFTCount == 30100);
assign FWD_INV = 1;
assign FWD_INV_WE = (FFTCount == 60);



assign UNLOAD = DONE;

assign DesiredDMMemoryLocationToRead = {ArraySideToCalculate, XN_INDEX + 1};
assign XN_RE = {!DesiredDMInterfaceOutput[8], DesiredDMInterfaceOutput [7:0]};
assign XN_IM = 9'b0000_0000_0;    


assign FFTOutputRe = {XK_RE[18], XK_RE[17:7]}; 
assign FFTOutputIm = {XK_IM[18], XK_IM[17:7]};




assign FFTOutputWE = DV;
assign FFTOutputIndex = XK_INDEX[8:0];






FFT_IFFT_IP_CORE FFT_IP_CORE_Instance (
  .clk(CLK),
  .start(START),
  .unload(UNLOAD),
  .xn_re(XN_RE),
  .xn_im(XN_IM),
  .fwd_inv(FWD_INV),
  .fwd_inv_we(FWD_INV_WE),
  .rfd(RFD),
  .xn_index(XN_INDEX),
  .busy(BUSY),
  .edone(EDONE),
  .done(DONE),
  .dv(DV),
  .xk_index(XK_INDEX),
  .xk_re(XK_RE),
  .xk_im(XK_IM)
);














wire          ND1, RDY1, RFD1;
wire [9:0]    X_IN1, Y_IN1, X_OUT1, PHASE_OUT1;

wire          ND2, RDY2, RFD2;
wire [9:0]    X_IN2, Y_IN2, X_OUT2, PHASE_OUT2;

wire          ND3, RDY3, RFD3;
wire [9:0]    X_IN3, Y_IN3, X_OUT3, PHASE_OUT3;

wire          ND4, RDY4, RFD4;
wire [9:0]    X_IN4, Y_IN4, X_OUT4, PHASE_OUT4;



wire [8:0]    FFTStoredOutputIndex;

assign FFTStartNumber = DesiredDM;

always @(posedge CLK)
begin
  if (DV && !FFTStartNumber[1] && !FFTStartNumber[0])
  begin
    FFTStored1[XK_INDEX] <= {FFTOutputRe[11:0], FFTOutputIm[11:0]};
  end

  FFTStoredOutput1 <= FFTStored1[FFTStoredOutputIndex];
end



always @(posedge CLK)
begin
  if (DV && !FFTStartNumber[1] && FFTStartNumber[0])
  begin
    FFTStored2[XK_INDEX] <= {FFTOutputRe[11:0], FFTOutputIm[11:0]};
  end
                   
  FFTStoredOutput2 <= FFTStored2[FFTStoredOutputIndex];
end



always @(posedge CLK)
begin
  if (DV && FFTStartNumber[1] && !FFTStartNumber[0])
  begin
    FFTStored3[XK_INDEX] <= {FFTOutputRe[11:0], FFTOutputIm[11:0]};
  end

  FFTStoredOutput3 <= FFTStored3[FFTStoredOutputIndex];
end



always @(posedge CLK)
begin
  if (DV && FFTStartNumber[1] && FFTStartNumber[0])
  begin
    FFTStored4[XK_INDEX] <= {FFTOutputRe[11:0], FFTOutputIm[11:0]};
  end
                   
  FFTStoredOutput4 <= FFTStored4[FFTStoredOutputIndex];
end



wire          AnalyzerInterval;
wire [17:0]   FFTStoredOutputIndexMath;


assign AnalyzerInterval = ((FFTCount >= 17'b1100_0011_1000_0000_0) && (FFTCount <= 18'b1010_0001_1100_0000_00));





assign FFTStoredOutputIndex[8:0] = (FFTCount[17:7] - 10'b1100_0011_10);

assign AnalyzerCount = FFTCount[6:0];



assign X_IN1 = {FFTStoredOutput1[23], FFTStoredOutput1[23], FFTStoredOutput1[22:15]};
assign Y_IN1 = {FFTStoredOutput1[11], FFTStoredOutput1[11], FFTStoredOutput1[10:3]};
assign X_IN2 = {FFTStoredOutput2[23], FFTStoredOutput2[23], FFTStoredOutput2[22:15]};
assign Y_IN2 = {FFTStoredOutput2[11], FFTStoredOutput2[11], FFTStoredOutput2[10:3]};
assign X_IN3 = {FFTStoredOutput3[23], FFTStoredOutput3[23], FFTStoredOutput3[22:15]};
assign Y_IN3 = {FFTStoredOutput3[11], FFTStoredOutput3[11], FFTStoredOutput3[10:3]};
assign X_IN4 = {FFTStoredOutput4[23], FFTStoredOutput4[23], FFTStoredOutput4[22:15]};
assign Y_IN4 = {FFTStoredOutput4[11], FFTStoredOutput4[11], FFTStoredOutput4[10:3]};







assign ND1   = (((FFTCount >= 17'b1100_0011_1000_0000_0) && (FFTCount <= 18'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7'b0000_100));
assign ND2   = (((FFTCount >= 17'b1100_0011_1000_0000_0) && (FFTCount <= 18'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7'b0000_100));
assign ND3   = (((FFTCount >= 17'b1100_0011_1000_0000_0) && (FFTCount <= 18'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7'b0000_100));
assign ND4   = (((FFTCount >= 17'b1100_0011_1000_0000_0) && (FFTCount <= 18'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7'b0000_100));


wire [7:0] P1a, P2a, P3a, P4a;

assign P1a = {PHASE_OUT1[9], PHASE_OUT1[6:0]};
assign P2a = {PHASE_OUT2[9], PHASE_OUT2[6:0]};
assign P3a = {PHASE_OUT3[9], PHASE_OUT3[6:0]};
assign P4a = {PHASE_OUT4[9], PHASE_OUT4[6:0]};


















































wire         aValF1, bValF1, aCond1, bCond1;
wire         aValF2, bValF2, aCond2, bCond2;
wire         aValF3, bValF3, aCond3, bCond3;
wire         aValF4, bValF4, aCond4, bCond4;

reg          aValFr1, bValFr1, aValM1, bValM1;
reg          aValFr2, bValFr2, aValM2, bValM2;
reg          aValFr3, bValFr3, aValM3, bValM3;
reg          aValFr4, bValFr4, aValM4, bValM4;

reg [8:0]    aVal1, bVal1;
reg [8:0]    aVal2, bVal2;
reg [8:0]    aVal3, bVal3;
reg [8:0]    aVal4, bVal4;

wire [17:0]  aValIndMult1, bValIndMult1;
wire [17:0]  aValIndMult2, bValIndMult2;
wire [17:0]  aValIndMult3, bValIndMult3;
wire [17:0]  aValIndMult4, bValIndMult4;

reg          AnalyzerConditionRe1;
reg          AnalyzerConditionRe2;
reg          AnalyzerConditionRe3;
reg          AnalyzerConditionRe4;

wire         AnalyzerConditionRe;
wire         AnalyzerConditionIm;
wire [11:0]  AnalyzerOutputRe, AnalyzerOutputIm;





assign aCond1 = !FioSp[12] && !FioSp[11] && FioSp[10] &&  FioSp[9];
assign bCond1 = !FioSp[12] && !FioSp[11] && FioSp[10] && !FioSp[9];

assign aCond2 = !FioSp[12] &&  FioSp[11] && FioSp[10] &&  FioSp[9];
assign bCond2 = !FioSp[12] &&  FioSp[11] && FioSp[10] && !FioSp[9];

assign aCond3 =  FioSp[12] && !FioSp[11] && FioSp[10] &&  FioSp[9];
assign bCond3 =  FioSp[12] && !FioSp[11] && FioSp[10] && !FioSp[9];

assign aCond4 =  FioSp[12] &&  FioSp[11] && FioSp[10] &&  FioSp[9];
assign bCond4 =  FioSp[12] &&  FioSp[11] && FioSp[10] && !FioSp[9];





always @ (aCond1 or FioSp[8])
  begin 
    if (aCond1 == 1)
      aValFr1 = FioSp[8];
  end

always @ (aCond1 or FioSp[7])
  begin
    if (aCond1 == 1)
      aValM1 = FioSp[7];
  end

always @ (aCond1 or FioSp[6:0])
  begin
    if (aCond1 == 1)
      aVal1 = FioSp[6:0];
  end


always @ (bCond1 or FioSp[8])
  begin
    if (bCond1 == 1)
      bValFr1 = FioSp[8];
  end

always @ (bCond1 or FioSp[7])
  begin
    if (bCond1 == 1)
      bValM1 = FioSp[7];
  end

always @ (bCond1 or FioSp[6:0])
  begin
    if (bCond1 == 1)
      bVal1 = FioSp[6:0];
  end



always @ (aCond2 or FioSp[8])
  begin 
    if (aCond2 == 1)
      aValFr2 = FioSp[8];
  end

always @ (aCond2 or FioSp[7])
  begin
    if (aCond2 == 1)
      aValM2 = FioSp[7];
  end

always @ (aCond2 or FioSp[6:0])
  begin
    if (aCond2 == 1)
      aVal2 = FioSp[6:0];
  end


always @ (bCond2 or FioSp[8])
  begin
    if (bCond2 == 1)
      bValFr2 = FioSp[8];
  end

always @ (bCond2 or FioSp[7])
  begin
    if (bCond2 == 1)
      bValM2 = FioSp[7];
  end

always @ (bCond2 or FioSp[6:0])
  begin
    if (bCond2 == 1)
      bVal2 = FioSp[6:0];
  end



always @ (aCond3 or FioSp[8])
  begin 
    if (aCond3 == 1)
      aValFr3 = FioSp[8];
  end

always @ (aCond3 or FioSp[7])
  begin
    if (aCond3 == 1)
      aValM3 = FioSp[7];
  end

always @ (aCond3 or FioSp[6:0])
  begin
    if (aCond3 == 1)
      aVal3 = FioSp[6:0];
  end


always @ (bCond3 or FioSp[8])
  begin
    if (bCond3 == 1)
      bValFr3 = FioSp[8];
  end

always @ (bCond3 or FioSp[7])
  begin
    if (bCond3 == 1)
      bValM3 = FioSp[7];
  end

always @ (bCond3 or FioSp[6:0])
  begin
    if (bCond3 == 1)
      bVal3 = FioSp[6:0];
  end



always @ (aCond4 or FioSp[8])
  begin 
    if (aCond4 == 1)
      aValFr4 = FioSp[8];
  end

always @ (aCond4 or FioSp[7])
  begin
    if (aCond4 == 1)
      aValM4 = FioSp[7];
  end

always @ (aCond4 or FioSp[6:0])
  begin
    if (aCond4 == 1)
      aVal4 = FioSp[6:0];
  end


always @ (bCond4 or FioSp[8])
  begin
    if (bCond4 == 1)
      bValFr4 = FioSp[8];
  end

always @ (bCond4 or FioSp[7])
  begin
    if (bCond4 == 1)
      bValM4 = FioSp[7];
  end

always @ (bCond4 or FioSp[6:0])
  begin
    if (bCond4 == 1)
      bVal4 = FioSp[6:0];
  end






assign aValF1 = aValFr1 == (FFTStoredOutputIndex <= 9'b1000_0000_0);
assign bValF1 = bValFr1 == (FFTStoredOutputIndex <= 9'b1000_0000_0);

assign aValF2 = aValFr2 == (FFTStoredOutputIndex <= 9'b1000_0000_0);
assign bValF2 = bValFr2 == (FFTStoredOutputIndex <= 9'b1000_0000_0);

assign aValF3 = aValFr3 == (FFTStoredOutputIndex <= 9'b1000_0000_0);
assign bValF3 = bValFr3 == (FFTStoredOutputIndex <= 9'b1000_0000_0);

assign aValF4 = aValFr4 == (FFTStoredOutputIndex <= 9'b1000_0000_0);
assign bValF4 = bValFr4 == (FFTStoredOutputIndex <= 9'b1000_0000_0);






assign aValIndMult1 = aVal1 * FFTStoredOutputIndex;
assign bValIndMult1 = bVal1 * FFTStoredOutputIndex;

assign aValIndMult2 = aVal2 * FFTStoredOutputIndex;
assign bValIndMult2 = bVal2 * FFTStoredOutputIndex;

assign aValIndMult3 = aVal3 * FFTStoredOutputIndex;
assign bValIndMult3 = bVal3 * FFTStoredOutputIndex;

assign aValIndMult4 = aVal4 * FFTStoredOutputIndex;
assign bValIndMult4 = bVal4 * FFTStoredOutputIndex;




always @ (aValF1 or aValM1 or bValF1 or bValM1 or P1a or P2a or aValIndMult1 or bValIndMult1 or FFTStoredOutputIndex) 
begin
  case ({aValF1, aValM1, bValF1, bValM1}) 
    4'b0000 :  begin
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} <= (aValIndMult1)) && ({(P1a - P2a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end  
    4'b0001 :  begin
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} <= (aValIndMult1)) && ({(P1a - P2a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0010 :  begin
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} <= (aValIndMult1)) || ({(P2a - P1a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0011 :  begin
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} <= (aValIndMult1)) || ({(P2a - P1a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0100 :  begin 
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} >= (aValIndMult1)) && ({(P1a - P2a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0101 :  begin
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} >= (aValIndMult1)) && ({(P1a - P2a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0110 :  begin
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} >= (aValIndMult1)) || ({(P2a - P1a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0111 :  begin
                 AnalyzerConditionRe1 = (({(P1a - P2a), 8'b0000_0000} >= (aValIndMult1)) || ({(P2a - P1a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1000 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} <= (aValIndMult1)) || ({(P1a - P2a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1001 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} <= (aValIndMult1)) || ({(P1a - P2a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1010 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} <= (aValIndMult1)) && ({(P2a - P1a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1011 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} <= (aValIndMult1)) && ({(P2a - P1a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1100 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} >= (aValIndMult1)) || ({(P1a - P2a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1101 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} >= (aValIndMult1)) || ({(P1a - P2a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1110 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} >= (aValIndMult1)) && ({(P2a - P1a), 8'b0000_0000} <= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1111 :  begin
                 AnalyzerConditionRe1 = (({(P2a - P1a), 8'b0000_0000} >= (aValIndMult1)) && ({(P2a - P1a), 8'b0000_0000} >= (bValIndMult1))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    default :  begin
                 AnalyzerConditionRe1 = 0; 
               end
  endcase 
end








always @ (aValF2 or aValM2 or bValF2 or bValM2 or P2a or P3a or aValIndMult2 or bValIndMult2 or FFTStoredOutputIndex) 
begin
  case ({aValF2, aValM2, bValF2, bValM2}) 
    4'b0000 :  begin
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} <= (aValIndMult2)) && ({(P2a - P3a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end  
    4'b0001 :  begin
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} <= (aValIndMult2)) && ({(P2a - P3a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0010 :  begin
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} <= (aValIndMult2)) || ({(P3a - P2a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0011 :  begin
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} <= (aValIndMult2)) || ({(P3a - P2a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0100 :  begin 
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} >= (aValIndMult2)) && ({(P2a - P3a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0101 :  begin
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} >= (aValIndMult2)) && ({(P2a - P3a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0110 :  begin
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} >= (aValIndMult2)) || ({(P3a - P2a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0111 :  begin
                 AnalyzerConditionRe2 = (({(P2a - P3a), 8'b0000_0000} >= (aValIndMult2)) || ({(P3a - P2a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1000 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} <= (aValIndMult2)) || ({(P2a - P3a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1001 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} <= (aValIndMult2)) || ({(P2a - P3a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1010 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} <= (aValIndMult2)) && ({(P3a - P2a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1011 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} <= (aValIndMult2)) && ({(P3a - P2a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1100 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} >= (aValIndMult2)) || ({(P2a - P3a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1101 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} >= (aValIndMult2)) || ({(P2a - P3a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1110 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} >= (aValIndMult2)) && ({(P3a - P2a), 8'b0000_0000} <= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1111 :  begin
                 AnalyzerConditionRe2 = (({(P3a - P2a), 8'b0000_0000} >= (aValIndMult2)) && ({(P3a - P2a), 8'b0000_0000} >= (bValIndMult2))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    default :  begin
                 AnalyzerConditionRe2 = 0;        
               end
  endcase 
end











always @ (aValF3 or aValM3 or bValF3 or bValM3 or P1a or P3a or aValIndMult3 or bValIndMult3 or FFTStoredOutputIndex) 
begin
  case ({aValF3, aValM3, bValF3, bValM3}) 
    4'b0000 :  begin
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} <= (aValIndMult3)) && ({(P1a - P3a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end  
    4'b0001 :  begin
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} <= (aValIndMult3)) && ({(P1a - P3a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0010 :  begin
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} <= (aValIndMult3)) || ({(P3a - P1a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0011 :  begin
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} <= (aValIndMult3)) || ({(P3a - P1a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0100 :  begin 
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} >= (aValIndMult3)) && ({(P1a - P3a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0101 :  begin
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} >= (aValIndMult3)) && ({(P1a - P3a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0110 :  begin
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} >= (aValIndMult3)) || ({(P3a - P1a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0111 :  begin
                 AnalyzerConditionRe3 = (({(P1a - P3a), 8'b0000_0000} >= (aValIndMult3)) || ({(P3a - P1a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1000 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} <= (aValIndMult3)) || ({(P1a - P3a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1001 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} <= (aValIndMult3)) || ({(P1a - P3a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1010 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} <= (aValIndMult3)) && ({(P3a - P1a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1011 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} <= (aValIndMult3)) && ({(P3a - P1a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1100 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} >= (aValIndMult3)) || ({(P1a - P3a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1101 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} >= (aValIndMult3)) || ({(P1a - P3a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1110 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} >= (aValIndMult3)) && ({(P3a - P1a), 8'b0000_0000} <= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1111 :  begin
                 AnalyzerConditionRe3 = (({(P3a - P1a), 8'b0000_0000} >= (aValIndMult3)) && ({(P3a - P1a), 8'b0000_0000} >= (bValIndMult3))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    default :  begin
                 AnalyzerConditionRe3 = 0;        
               end
  endcase 
end










always @ (aValF4 or aValM4 or bValF4 or bValM4 or P1a or P4a or aValIndMult4 or bValIndMult4 or FFTStoredOutputIndex) 
begin
  case ({aValF4, aValM4, bValF4, bValM4}) 
    4'b0000 :  begin
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} <= (aValIndMult4)) && ({(P1a - P4a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end  
    4'b0001 :  begin
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} <= (aValIndMult4)) && ({(P1a - P4a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0010 :  begin
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} <= (aValIndMult4)) || ({(P4a - P1a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0); 
               end
    4'b0011 :  begin
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} <= (aValIndMult4)) || ({(P4a - P1a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0100 :  begin 
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} >= (aValIndMult4)) && ({(P1a - P4a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0101 :  begin
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} >= (aValIndMult4)) && ({(P1a - P4a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0110 :  begin
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} >= (aValIndMult4)) || ({(P4a - P1a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b0111 :  begin
                 AnalyzerConditionRe4 = (({(P1a - P4a), 8'b0000_0000} >= (aValIndMult4)) || ({(P4a - P1a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1000 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} <= (aValIndMult4)) || ({(P1a - P4a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1001 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} <= (aValIndMult4)) || ({(P1a - P4a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1010 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} <= (aValIndMult4)) && ({(P4a - P1a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1011 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} <= (aValIndMult4)) && ({(P4a - P1a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1100 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} >= (aValIndMult4)) || ({(P1a - P4a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1101 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} >= (aValIndMult4)) || ({(P1a - P4a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1110 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} >= (aValIndMult4)) && ({(P4a - P1a), 8'b0000_0000} <= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    4'b1111 :  begin
                 AnalyzerConditionRe4 = (({(P4a - P1a), 8'b0000_0000} >= (aValIndMult4)) && ({(P4a - P1a), 8'b0000_0000} >= (bValIndMult4))) && (FFTStoredOutputIndex == 9'b0010_0000_0);
               end
    default :  begin
                 AnalyzerConditionRe4 = 0;        
               end
  endcase 
end









assign AnalyzerConditionRe = ((AnalyzerConditionRe1) && (AnalyzerConditionRe2) && (AnalyzerConditionRe3) && (AnalyzerConditionRe4));




















assign AnalyzerConditionIm = AnalyzerConditionRe;







assign AnalyzerOutputRe = ((AnalyzerConditionRe) || rst) ? FFTStoredOutput3[23:12] : 12'b0000_0000_0000;
assign AnalyzerOutputIm = ((AnalyzerConditionIm) || rst) ? FFTStoredOutput3[11:0]  : 12'b0000_0000_0000;










assign AnalyzerOutputWE = (((FFTCount >= 17'b1100_0011_1000_0000_0) && (FFTCount <= 18'b1010_0001_1100_0000_00)) && (FFTCount[6:0] == 7'b0111_111));

reg [23:0] AnalyzerStoredOutput;



always @(posedge CLK)
begin
  if (AnalyzerOutputWE)
  begin
    AnalyzerStored[FFTStoredOutputIndex] <= {AnalyzerOutputRe[11:0], AnalyzerOutputIm[11:0]};
  end
  
  AnalyzerStoredOutput <= AnalyzerStored[IXN_INDEX + 1];
end





assign IXN_RE = ((IXN_INDEX >= 9'b00000_0100) && (IXN_INDEX <= 9'b11111_1100)) ? {AnalyzerStoredOutput[23], AnalyzerStoredOutput[19:12]} : 9'b00000_0000;
assign IXN_IM = ((IXN_INDEX >= 9'b00000_0100) && (IXN_INDEX <= 9'b11111_1100)) ? {AnalyzerStoredOutput[11], AnalyzerStoredOutput[7:0]}   : 9'b00000_0000;












assign ISTART      = (FFTCount == 200100);
assign IFWD_INV    = 0;
assign IFWD_INV_WE = (FFTCount == 60);



assign IUNLOAD = IDONE;


assign IFFTOutput      = {(!IXK_RE[18]), IXK_RE[7:0], 3'b000}; 
assign IFFTOutputWE    = IDV;
assign IFFTOutputIndex = IXK_INDEX[8:0];


	 
	 
FFT_IFFT_IP_CORE IFFT_IP_CORE_Instance (
.clk(CLK),
.start(ISTART),
.unload(IUNLOAD),
.xn_re(IXN_RE),
.xn_im(IXN_IM),
.fwd_inv(IFWD_INV),
.fwd_inv_we(IFWD_INV_WE),
.rfd(IRFD),
.xn_index(IXN_INDEX),
.busy(IBUSY),
.edone(IEDONE),
.done(IDONE),
.dv(IDV),
.xk_index(IXK_INDEX),
.xk_re(IXK_RE),
.xk_im(IXK_IM)
);






Translation_Module_DM Translation_Module_DM_Instance1 (
  .x_in(X_IN1),
  .y_in(Y_IN1),
  .nd(ND1),
  .x_out(X_OUT1),
  .phase_out(PHASE_OUT1),
  .rdy(RDY1),
  .rfd(RFD1),
  .clk(CLK)
);

Translation_Module_DM Translation_Module_DM_Instance2 (
  .x_in(X_IN2),
  .y_in(Y_IN2),
  .nd(ND2),
  .x_out(X_OUT2),
  .phase_out(PHASE_OUT2),
  .rdy(RDY2),
  .rfd(RFD2),
  .clk(CLK)
);

Translation_Module_DM Translation_Module_DM_Instance3 (
  .x_in(X_IN3),
  .y_in(Y_IN3),
  .nd(ND3),
  .x_out(X_OUT3),
  .phase_out(PHASE_OUT3),
  .rdy(RDY3),
  .rfd(RFD3),
  .clk(CLK)
);

Translation_Module_DM Translation_Module_DM_Instance4 (
  .x_in(X_IN4),
  .y_in(Y_IN4),
  .nd(ND4),
  .x_out(X_OUT4),
  .phase_out(PHASE_OUT4),
  .rdy(RDY4),
  .rfd(RFD4),
  .clk(CLK)
);












endmodule