data/full_repos/permissive/464047355/board/terasic_de0/rtl/hdmi_test_top.sv
1: b'%Error: data/full_repos/permissive/464047355/board/terasic_de0/rtl/hdmi_test_top.sv:65: Cannot find file containing module: \'media_pll\'\n    media_pll media_pll0\n    ^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/464047355/board/terasic_de0/rtl,data/full_repos/permissive/464047355/media_pll\n             data/full_repos/permissive/464047355/board/terasic_de0/rtl,data/full_repos/permissive/464047355/media_pll.v\n             data/full_repos/permissive/464047355/board/terasic_de0/rtl,data/full_repos/permissive/464047355/media_pll.sv\n             media_pll\n             media_pll.v\n             media_pll.sv\n             obj_dir/media_pll\n             obj_dir/media_pll.v\n             obj_dir/media_pll.sv\n%Warning-WIDTH: data/full_repos/permissive/464047355/board/terasic_de0/rtl/hdmi_test_top.sv:110: Operator EQ expects 10 bits on the RHS, but RHS\'s CONST \'9\'h0\' generates 9 bits.\n                                                                                               : ... In instance hdmi_test\n            if ((cx == 9\'h0) && (cy == 9\'h0)) shift <= shift + 8\'h1;\n                    ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/464047355/board/terasic_de0/rtl/hdmi_test_top.sv:110: Operator EQ expects 10 bits on the RHS, but RHS\'s CONST \'9\'h0\' generates 9 bits.\n                                                                                               : ... In instance hdmi_test\n            if ((cx == 9\'h0) && (cy == 9\'h0)) shift <= shift + 8\'h1;\n                                    ^~\n%Error: data/full_repos/permissive/464047355/board/terasic_de0/rtl/hdmi_test_top.sv:132: Cannot find file containing module: \'hdmi\'\n    hdmi #\n    ^~~~\n%Error: Exiting due to 2 error(s), 2 warning(s)\n'
module hdmi_test
(
    input logic I_CLK,
    input logic I_RESET_N,

    output logic [2:0] O_TMDS_DATA,
    output logic O_TMDS_CLK,

    output logic O_PLL_LOCKED,

    input logic [3:0] I_AUDIO_PITCH,



    output logic O_AUDIO,
    output logic O_AUDIO_CLK,
    output logic O_VIDEO_CLK
);

    localparam VIDEO_ID_CODE = 3;
    localparam AUDIO_BIT_WIDTH = 16;
    localparam AUDIO_RATE = 48000;
    localparam bit DVI_OUTPUT = 1'b0;
    localparam real VIDEO_REFRESH_RATE = 59.94;

    localparam VIDEO_WIDTH = 10'd720;
    localparam VIDEO_HEIGHT = 10'd480;
    localparam VIDEO_HEND = VIDEO_WIDTH - 1;
    localparam VIDEO_VEND = VIDEO_HEIGHT - 1;

    logic clk;
    logic reset;
    logic video_clk;
    logic video_clk_x5;
    logic audio_clk;
    logic [7:0] r;
    logic [7:0] g;
    logic [7:0] b;
    logic [7:0] shift;
    logic [9:0] cx;
    logic [9:0] cy;
    logic [7:0] audio_sample;
    logic [AUDIO_BIT_WIDTH-1:0] audio_sample_dampened;

    assign clk = I_CLK;
    assign reset = ~I_RESET_N;
    assign audio_sample_dampened = {7'h0, audio_sample, 1'h0};

    assign O_AUDIO = audio_sample[7];
    assign O_AUDIO_CLK = audio_clk;
    assign O_VIDEO_CLK = video_clk;




    media_pll media_pll0
    (
        .areset(reset),
	    .inclk0(clk),
	    .c0(video_clk_x5),






	    .c1(video_clk),

	    .c2(audio_clk),
	    .locked(O_PLL_LOCKED)
    );






    always_ff @ (posedge reset, posedge video_clk)
    begin
        if (reset)
        begin
            r <= 8'h0;
            g <= 8'h0;
            b <= 8'h0;
            shift <= 8'h0;
        end
        else
        begin
            if ((cx == 10'd0) || (cy == 10'd0) || cx == VIDEO_HEND || (cy == VIDEO_VEND))
            begin
                r <= 8'hff;
                g <= 8'hff;
                b <= 8'hff;
            end
            else
            begin
                r <= (cx[7:0] + shift) & 8'hff;
                g <= (cy[7:0] + shift) & 8'hff;
                b <= (cx[7:0] + cy[7:0] - shift) & 8'hff;
            end
            if ((cx == 9'h0) && (cy == 9'h0)) shift <= shift + 8'h1;
        end
    end



    always_ff @ (posedge reset, posedge audio_clk)
    begin
        if (reset)
        begin
            audio_sample <= 8'h0;
        end
        else
        begin
            audio_sample <= audio_sample + {4'h0, I_AUDIO_PITCH[3:0]};
        end
    end





    hdmi #
    (
        .VIDEO_ID_CODE(VIDEO_ID_CODE),
        .DVI_OUTPUT(DVI_OUTPUT),
        .VIDEO_REFRESH_RATE(VIDEO_REFRESH_RATE),
        .AUDIO_RATE(AUDIO_RATE),
        .AUDIO_BIT_WIDTH(AUDIO_BIT_WIDTH)
    )
    hdmi0
    (
        .clk_pixel_x5(video_clk_x5),
        .clk_pixel(video_clk),
        .clk_audio(audio_clk),
        .reset(reset),
        .rgb({r, g, b}),
        .audio_sample_word('{audio_sample_dampened, audio_sample_dampened}),

        .tmds(O_TMDS_DATA),
        .tmds_clock(O_TMDS_CLK),
        .cx(cx),
        .cy(cy),
        .frame_width(),
        .frame_height(),
        .screen_width(),
        .screen_height()
    );

endmodule
module hdmi_test
(
    input logic I_CLK,
    input logic I_RESET_N,

    output logic [2:0] O_TMDS_DATA,
    output logic O_TMDS_CLK,

    output logic O_PLL_LOCKED,

    input logic [3:0] I_AUDIO_PITCH,



    output logic O_AUDIO,
    output logic O_AUDIO_CLK,
    output logic O_VIDEO_CLK
);


    localparam VIDEO_ID_CODE = 3;
    localparam AUDIO_BIT_WIDTH = 16;
    localparam AUDIO_RATE = 48000;
    localparam bit DVI_OUTPUT = 1'b0;
    localparam real VIDEO_REFRESH_RATE = 59.94;

    localparam VIDEO_WIDTH = 10'd720;
    localparam VIDEO_HEIGHT = 10'd480;
    localparam VIDEO_HEND = VIDEO_WIDTH - 1;
    localparam VIDEO_VEND = VIDEO_HEIGHT - 1;

    logic clk;
    logic reset;
    logic video_clk;
    logic video_clk_x5;
    logic audio_clk;
    logic [7:0] r;
    logic [7:0] g;
    logic [7:0] b;
    logic [7:0] shift;
    logic [9:0] cx;
    logic [9:0] cy;
    logic [7:0] audio_sample;
    logic [AUDIO_BIT_WIDTH-1:0] audio_sample_dampened;

    assign clk = I_CLK;
    assign reset = ~I_RESET_N;
    assign audio_sample_dampened = {7'h0, audio_sample, 1'h0};

    assign O_AUDIO = audio_sample[7];
    assign O_AUDIO_CLK = audio_clk;
    assign O_VIDEO_CLK = video_clk;




    media_pll media_pll0
    (
        .areset(reset),
	    .inclk0(clk),
	    .c0(video_clk_x5),






	    .c1(video_clk),

	    .c2(audio_clk),
	    .locked(O_PLL_LOCKED)
    );






    always_ff @ (posedge reset, posedge video_clk)
    begin
        if (reset)
        begin
            r <= 8'h0;
            g <= 8'h0;
            b <= 8'h0;
            shift <= 8'h0;
        end
        else
        begin
            if ((cx == 10'd0) || (cy == 10'd0) || cx == VIDEO_HEND || (cy == VIDEO_VEND))
            begin
                r <= 8'hff;
                g <= 8'hff;
                b <= 8'hff;
            end
            else
            begin
                r <= (cx[7:0] + shift) & 8'hff;
                g <= (cy[7:0] + shift) & 8'hff;
                b <= (cx[7:0] + cy[7:0] - shift) & 8'hff;
            end
            if ((cx == 9'h0) && (cy == 9'h0)) shift <= shift + 8'h1;
        end
    end



    always_ff @ (posedge reset, posedge audio_clk)
    begin
        if (reset)
        begin
            audio_sample <= 8'h0;
        end
        else
        begin
            audio_sample <= audio_sample + {4'h0, I_AUDIO_PITCH[3:0]};
        end
    end





    hdmi #
    (
        .VIDEO_ID_CODE(VIDEO_ID_CODE),
        .DVI_OUTPUT(DVI_OUTPUT),
        .VIDEO_REFRESH_RATE(VIDEO_REFRESH_RATE),
        .AUDIO_RATE(AUDIO_RATE),
        .AUDIO_BIT_WIDTH(AUDIO_BIT_WIDTH)
    )
    hdmi0
    (
        .clk_pixel_x5(video_clk_x5),
        .clk_pixel(video_clk),
        .clk_audio(audio_clk),
        .reset(reset),
        .rgb({r, g, b}),
        .audio_sample_word('{audio_sample_dampened, audio_sample_dampened}),

        .tmds(O_TMDS_DATA),
        .tmds_clock(O_TMDS_CLK),
        .cx(cx),
        .cy(cy),
        .frame_width(),
        .frame_height(),
        .screen_width(),
        .screen_height()
    );

endmodule