data/full_repos/permissive/417288846/List_1/Task_4/counter.v
1: b'%Warning-IMPLICIT: data/full_repos/permissive/417288846/List_1/Task_4/counter.v:22: Signal definition not found, creating implicitly: \'signal\'\n                                                                                  : ... Suggested alternative: \'singnal\'\n    nand (signal, num1, nq3, num3, nq1);\n          ^~~~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module counter_10(input clk, nclr, output num1, num2, num3, num4);
    wire nq1, nq2, nq3, nq4, nclr1;
    wire singnal;
    nand (signal, num1, nq3, num3, nq1);
    and (nclr1, nclr, signal);
    d_latch d1(.d(nq1), .clk(clk), .q(num4), .nq(nq1), .nclr(nclr1));
    d_latch d2(.d(nq2), .clk(nq1), .q(num3), .nq(nq2), .nclr(nclr1));
    d_latch d3(.d(nq3), .clk(nq2), .q(num2), .nq(nq3), .nclr(nclr1));
    d_latch d4(.d(nq4), .clk(nq3), .q(num1), .nq(nq4), .nclr(nclr1));
endmodule
module counter_10(input clk, nclr, output num1, num2, num3, num4);

    wire nq1, nq2, nq3, nq4, nclr1;
    wire singnal;
    nand (signal, num1, nq3, num3, nq1);
    and (nclr1, nclr, signal);
    d_latch d1(.d(nq1), .clk(clk), .q(num4), .nq(nq1), .nclr(nclr1));
    d_latch d2(.d(nq2), .clk(nq1), .q(num3), .nq(nq2), .nclr(nclr1));
    d_latch d3(.d(nq3), .clk(nq2), .q(num2), .nq(nq3), .nclr(nclr1));
    d_latch d4(.d(nq4), .clk(nq3), .q(num1), .nq(nq4), .nclr(nclr1));
endmodule