data/full_repos/permissive/499137621/CheckPoint1_32bit_ALU_project-main/MUX_2to1_32B.v
data/verilator_xmls/a71c43dd-fd94-402a-beac-3c1f36e8e137.xml
module MUX_2to1_32B(out, A, B, select);
	
	input [31:0] A, B;
	input select;
	output [31:0] out;
	
	assign out = select ? B : A;
	

		
endmodule
module MUX_2to1_32B(out, A, B, select);

	
	input [31:0] A, B;
	input select;
	output [31:0] out;
	
	assign out = select ? B : A;
	

		
endmodule