data/full_repos/permissive/512700783/Sign_extender.v
1: b'%Warning-WIDTH: data/full_repos/permissive/512700783/Sign_extender.v:5: Operator ASSIGNW expects 32 bits on the Assign RHS, but Assign RHS\'s SIGNED generates 16 bits.\n                                                                      : ... In instance Sign_extender\n     assign Out = $signed(In);    \n                ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module Sign_extender (In, Out, Clk);
	input [15:0] In;
    	input Clk;
	output [31:0] Out;
    	assign Out = $signed(In);    
endmodule
module Sign_extender (In, Out, Clk);

	input [15:0] In;
    	input Clk;
	output [31:0] Out;
    	assign Out = $signed(In);    
endmodule