data/full_repos/permissive/492140037/CPU/设计文件/erase_shake.v
1: b'%Warning-WIDTH: data/full_repos/permissive/492140037/CPU/\xe8\xae\xbe\xe8\xae\xa1\xe6\x96\x87\xe4\xbb\xb6/erase_shake.v:18: Operator ASSIGNDLY expects 22 bits on the Assign RHS, but Assign RHS\'s VARREF \'Max\' generates 21 bits.\n                                                                                      : ... In instance erase_shake\n            cnt <=Max;\n                ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/492140037/CPU/\xe8\xae\xbe\xe8\xae\xa1\xe6\x96\x87\xe4\xbb\xb6/erase_shake.v:20: Operator ADD expects 22 bits on the RHS, but RHS\'s CONST \'20\'h1\' generates 20 bits.\n                                                                                      : ... In instance erase_shake\n            cnt<=cnt+20\'d1;\n                    ^\n%Warning-WIDTH: data/full_repos/permissive/492140037/CPU/\xe8\xae\xbe\xe8\xae\xa1\xe6\x96\x87\xe4\xbb\xb6/erase_shake.v:17: Operator EQ expects 22 bits on the RHS, but RHS\'s VARREF \'Max\' generates 21 bits.\n                                                                                      : ... In instance erase_shake\n        else if (cnt==Max)\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/492140037/CPU/\xe8\xae\xbe\xe8\xae\xa1\xe6\x96\x87\xe4\xbb\xb6/erase_shake.v:26: Operator SUB expects 22 bits on the RHS, but RHS\'s CONST \'20\'h8\' generates 20 bits.\n                                                                                      : ... In instance erase_shake\n        else if(cnt >= Max-20\'d8 && cnt < Max)\n                          ^\n%Warning-WIDTH: data/full_repos/permissive/492140037/CPU/\xe8\xae\xbe\xe8\xae\xa1\xe6\x96\x87\xe4\xbb\xb6/erase_shake.v:26: Operator LT expects 22 bits on the RHS, but RHS\'s VARREF \'Max\' generates 21 bits.\n                                                                                      : ... In instance erase_shake\n        else if(cnt >= Max-20\'d8 && cnt < Max)\n                                        ^\n%Error: Exiting due to 5 warning(s)\n'
module erase_shake
#(parameter Max=21'd2000_000)(
    input clk,
    input rst,
    input key_in,
    output reg key_out
    );
    reg [21:0] cnt;
    always@(posedge clk or posedge rst)
    begin
        if(rst==1'b1)
            cnt<=22'd0;
        else if(key_in==1'b0)
            cnt<=22'd0;
        else if (cnt==Max)
            cnt <=Max;
        else
            cnt<=cnt+20'd1;
    end
    always@(posedge clk or posedge rst) 
    begin
        if(rst==1'b1)
            key_out<=1'b0;
        else if(cnt >= Max-20'd8 && cnt < Max)
            key_out<=1'b1;
        else
            key_out<=1'b0;
    end
endmodule
module erase_shake
#(parameter Max=21'd2000_000)(
    input clk,
    input rst,
    input key_in,
    output reg key_out
    );

    reg [21:0] cnt;
    always@(posedge clk or posedge rst)
    begin
        if(rst==1'b1)
            cnt<=22'd0;
        else if(key_in==1'b0)
            cnt<=22'd0;
        else if (cnt==Max)
            cnt <=Max;
        else
            cnt<=cnt+20'd1;
    end
    always@(posedge clk or posedge rst) 
    begin
        if(rst==1'b1)
            key_out<=1'b0;
        else if(cnt >= Max-20'd8 && cnt < Max)
            key_out<=1'b1;
        else
            key_out<=1'b0;
    end
endmodule