data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules/MUXDC.v
1: b'%Warning-LITENDIAN: data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules/MUXDC.v:33: Little bit endian vector: MSB < LSB of bit range: 0:167\noutput reg [0:LENGTHBUS-1] MUXDC_Muxes_Sel,\n           ^\n                    ... Use "/* verilator lint_off LITENDIAN */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules/MUXDC.v:96: Cannot find file containing module: \'SIMPLE_COUNTER\'\nSIMPLE_COUNTER  #(.BITWIDTH(8)) Counter_Bus(\n^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules,data/full_repos/permissive/436253691/SIMPLE_COUNTER\n             data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules,data/full_repos/permissive/436253691/SIMPLE_COUNTER.v\n             data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules,data/full_repos/permissive/436253691/SIMPLE_COUNTER.sv\n             SIMPLE_COUNTER\n             SIMPLE_COUNTER.v\n             SIMPLE_COUNTER.sv\n             obj_dir/SIMPLE_COUNTER\n             obj_dir/SIMPLE_COUNTER.v\n             obj_dir/SIMPLE_COUNTER.sv\n%Error: data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules/MUXDC.v:110: Cannot find file containing module: \'SIMPLE_COUNTER\'\nSIMPLE_COUNTER #(.BITWIDTH(BITWIDTH_MAX_W_SIZE)) Counter_W_Size(\n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules/MUXDC.v:125: Cannot find file containing module: \'COUNTER_POS\'\nCOUNTER_POS #(.BITWIDTH(BITWIDTH_W_COLUMS)) Counter_W_Col(\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/436253691/hardware/nios_sys/nios_system/synthesis/submodules/MUXDC.v:140: Cannot find file containing module: \'MUXDC_STATEMACHINE\'\nMUXDC_STATEMACHINE Muxdc_Statemachine(\n^~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 4 error(s), 1 warning(s)\n'
module MUXDC #(parameter LENGTHBUS=168, BITWIDTH_W_COLUMS=4, BITWIDTH_MAX_W_SIZE=9)(


input MUXDC_Clk,
input MUXDC_Reset,
input MUXDC_Set_Conf,
input MUXDC_Set_Conf_Already_Ok,
input [BITWIDTH_W_COLUMS-1:0] MUXDC_W_Colums,
input [BITWIDTH_MAX_W_SIZE-1:0] MUXDC_W_ROXCL,


output reg [0:LENGTHBUS-1] MUXDC_Muxes_Sel,
output MUXDC_Set_Conf_Already

);





localparam [7:0] Counter_Bus_Number = LENGTHBUS[7:0] -8'b1;
localparam [BITWIDTH_W_COLUMS-1:0] data1_4= 4'd1;





wire Counter_Bus_Eqn_Flag;
wire [7:0] Counter_Bus_Out;
wire [BITWIDTH_MAX_W_SIZE-1:0] Counter_W_Size_Out;
wire Counter_W_Size_Eqn_Flag;
wire [BITWIDTH_W_COLUMS-1:0] Counter_W_Col_Out;
wire Counter_W_Col_Eqn_Flag;
wire Counter_W_Col_Load;

wire Muxdc_Statemachine_Counter_W_Size_En;
wire Muxdc_Statemachine_Counter_W_Size_Clr;
wire Muxdc_Statemachine_Counter_W_Col_En;
wire Muxdc_Statemachine_Counter_W_Col_Load;
wire Muxdc_Statemachine_Counter_W_Col_Clr;
wire Muxdc_Statemachine_Counter_Bus_En;
wire Muxdc_Statemachine_Counter_Bus_Clr;
wire Muxdc_Statemachine_Conf_Rutine;


reg Counter_W_Col_Load_1;




always@(negedge MUXDC_Clk)
begin

 if(Muxdc_Statemachine_Conf_Rutine)
	begin
		
		if(Counter_W_Col_Eqn_Flag) begin
			MUXDC_Muxes_Sel[Counter_Bus_Out]<=1'b1;
			Counter_W_Col_Load_1<=1'b1;	
		end
	
		else
		begin
			MUXDC_Muxes_Sel[Counter_Bus_Out]<=1'b0;
			Counter_W_Col_Load_1<=1'b0;
		end
		
	end
end





SIMPLE_COUNTER  #(.BITWIDTH(8)) Counter_Bus(

.COUNTER_Clk(MUXDC_Clk),
.COUNTER_Clr(Muxdc_Statemachine_Counter_Bus_Clr),
.COUNTER_En(Muxdc_Statemachine_Counter_Bus_En),
.COUNTER_Number(Counter_Bus_Number),


.COUNTER_Out(Counter_Bus_Out),
.COUNTER_Eqn_Flag(Counter_Bus_Eqn_Flag)

);


SIMPLE_COUNTER #(.BITWIDTH(BITWIDTH_MAX_W_SIZE)) Counter_W_Size(

.COUNTER_Clk(MUXDC_Clk),
.COUNTER_Clr(Muxdc_Statemachine_Counter_W_Size_Clr),
.COUNTER_En(Muxdc_Statemachine_Counter_W_Size_En),
.COUNTER_Number(MUXDC_W_ROXCL),


.COUNTER_Out(Counter_W_Size_Out),
.COUNTER_Eqn_Flag(Counter_W_Size_Eqn_Flag)

);



COUNTER_POS #(.BITWIDTH(BITWIDTH_W_COLUMS)) Counter_W_Col(

.COUNTER_Clk(MUXDC_Clk),
.COUNTER_Clr(Muxdc_Statemachine_Counter_W_Col_Clr),
.COUNTER_En(Muxdc_Statemachine_Counter_W_Col_En),
.COUNTER_load(Counter_W_Col_Load),
.COUNTER_Data(data1_4),
.COUNTER_Number(MUXDC_W_Colums),


.COUNTER_Out(Counter_W_Col_Out),
.COUNTER_Eqn_Flag(Counter_W_Col_Eqn_Flag)
);


MUXDC_STATEMACHINE Muxdc_Statemachine(


.MUXDC_STATEMACHINE_Clk(MUXDC_Clk),
.MUXDC_STATEMACHINE_Reset(MUXDC_Reset),
.MUXDC_STATEMACHINE_Start_Conf(MUXDC_Set_Conf),
.MUXDC_STATEMACHINE_Conf_Already_Ok(MUXDC_Set_Conf_Already_Ok),
.MUXDC_STATEMACHINE_Counter_Bus_Flag(Counter_Bus_Eqn_Flag),
.MUXDC_STATEMACHINE_Counter_W_Size_Flag(Counter_W_Size_Eqn_Flag),



.MUXDC_STATEMACHINE_Set_Conf_Already(MUXDC_Set_Conf_Already),
.MUXDC_STATEMACHINE_Counter_W_Size_En(Muxdc_Statemachine_Counter_W_Size_En),
.MUXDC_STATEMACHINEE_Counter_W_Size_Clr(Muxdc_Statemachine_Counter_W_Size_Clr),
.MUXDC_STATEMACHINE_Counter_W_Col_En(Muxdc_Statemachine_Counter_W_Col_En),
.MUXDC_STATEMACHINE_Counter_W_Col_Load(Muxdc_Statemachine_Counter_W_Col_Load),
.MUXDC_STATEMACHINE_Counter_W_Col_Clr(Muxdc_Statemachine_Counter_W_Col_Clr),
.MUXDC_STATEMACHINE_Counter_Bus_En(Muxdc_Statemachine_Counter_Bus_En),
.MUXDC_STATEMACHINE_Counter_Bus_Clr(Muxdc_Statemachine_Counter_Bus_Clr),
.MUXDC_STATEMACHINE_Conf_Rutine(Muxdc_Statemachine_Conf_Rutine)

);


assign Counter_W_Col_Load= (Counter_W_Col_Load_1 | Muxdc_Statemachine_Counter_W_Col_Load);

endmodule
module MUXDC #(parameter LENGTHBUS=168, BITWIDTH_W_COLUMS=4, BITWIDTH_MAX_W_SIZE=9)(


input MUXDC_Clk,
input MUXDC_Reset,
input MUXDC_Set_Conf,
input MUXDC_Set_Conf_Already_Ok,
input [BITWIDTH_W_COLUMS-1:0] MUXDC_W_Colums,
input [BITWIDTH_MAX_W_SIZE-1:0] MUXDC_W_ROXCL,


output reg [0:LENGTHBUS-1] MUXDC_Muxes_Sel,
output MUXDC_Set_Conf_Already

);






localparam [7:0] Counter_Bus_Number = LENGTHBUS[7:0] -8'b1;
localparam [BITWIDTH_W_COLUMS-1:0] data1_4= 4'd1;





wire Counter_Bus_Eqn_Flag;
wire [7:0] Counter_Bus_Out;
wire [BITWIDTH_MAX_W_SIZE-1:0] Counter_W_Size_Out;
wire Counter_W_Size_Eqn_Flag;
wire [BITWIDTH_W_COLUMS-1:0] Counter_W_Col_Out;
wire Counter_W_Col_Eqn_Flag;
wire Counter_W_Col_Load;

wire Muxdc_Statemachine_Counter_W_Size_En;
wire Muxdc_Statemachine_Counter_W_Size_Clr;
wire Muxdc_Statemachine_Counter_W_Col_En;
wire Muxdc_Statemachine_Counter_W_Col_Load;
wire Muxdc_Statemachine_Counter_W_Col_Clr;
wire Muxdc_Statemachine_Counter_Bus_En;
wire Muxdc_Statemachine_Counter_Bus_Clr;
wire Muxdc_Statemachine_Conf_Rutine;


reg Counter_W_Col_Load_1;




always@(negedge MUXDC_Clk)
begin

 if(Muxdc_Statemachine_Conf_Rutine)
	begin
		
		if(Counter_W_Col_Eqn_Flag) begin
			MUXDC_Muxes_Sel[Counter_Bus_Out]<=1'b1;
			Counter_W_Col_Load_1<=1'b1;	
		end
	
		else
		begin
			MUXDC_Muxes_Sel[Counter_Bus_Out]<=1'b0;
			Counter_W_Col_Load_1<=1'b0;
		end
		
	end
end





SIMPLE_COUNTER  #(.BITWIDTH(8)) Counter_Bus(

.COUNTER_Clk(MUXDC_Clk),
.COUNTER_Clr(Muxdc_Statemachine_Counter_Bus_Clr),
.COUNTER_En(Muxdc_Statemachine_Counter_Bus_En),
.COUNTER_Number(Counter_Bus_Number),


.COUNTER_Out(Counter_Bus_Out),
.COUNTER_Eqn_Flag(Counter_Bus_Eqn_Flag)

);


SIMPLE_COUNTER #(.BITWIDTH(BITWIDTH_MAX_W_SIZE)) Counter_W_Size(

.COUNTER_Clk(MUXDC_Clk),
.COUNTER_Clr(Muxdc_Statemachine_Counter_W_Size_Clr),
.COUNTER_En(Muxdc_Statemachine_Counter_W_Size_En),
.COUNTER_Number(MUXDC_W_ROXCL),


.COUNTER_Out(Counter_W_Size_Out),
.COUNTER_Eqn_Flag(Counter_W_Size_Eqn_Flag)

);



COUNTER_POS #(.BITWIDTH(BITWIDTH_W_COLUMS)) Counter_W_Col(

.COUNTER_Clk(MUXDC_Clk),
.COUNTER_Clr(Muxdc_Statemachine_Counter_W_Col_Clr),
.COUNTER_En(Muxdc_Statemachine_Counter_W_Col_En),
.COUNTER_load(Counter_W_Col_Load),
.COUNTER_Data(data1_4),
.COUNTER_Number(MUXDC_W_Colums),


.COUNTER_Out(Counter_W_Col_Out),
.COUNTER_Eqn_Flag(Counter_W_Col_Eqn_Flag)
);


MUXDC_STATEMACHINE Muxdc_Statemachine(


.MUXDC_STATEMACHINE_Clk(MUXDC_Clk),
.MUXDC_STATEMACHINE_Reset(MUXDC_Reset),
.MUXDC_STATEMACHINE_Start_Conf(MUXDC_Set_Conf),
.MUXDC_STATEMACHINE_Conf_Already_Ok(MUXDC_Set_Conf_Already_Ok),
.MUXDC_STATEMACHINE_Counter_Bus_Flag(Counter_Bus_Eqn_Flag),
.MUXDC_STATEMACHINE_Counter_W_Size_Flag(Counter_W_Size_Eqn_Flag),



.MUXDC_STATEMACHINE_Set_Conf_Already(MUXDC_Set_Conf_Already),
.MUXDC_STATEMACHINE_Counter_W_Size_En(Muxdc_Statemachine_Counter_W_Size_En),
.MUXDC_STATEMACHINEE_Counter_W_Size_Clr(Muxdc_Statemachine_Counter_W_Size_Clr),
.MUXDC_STATEMACHINE_Counter_W_Col_En(Muxdc_Statemachine_Counter_W_Col_En),
.MUXDC_STATEMACHINE_Counter_W_Col_Load(Muxdc_Statemachine_Counter_W_Col_Load),
.MUXDC_STATEMACHINE_Counter_W_Col_Clr(Muxdc_Statemachine_Counter_W_Col_Clr),
.MUXDC_STATEMACHINE_Counter_Bus_En(Muxdc_Statemachine_Counter_Bus_En),
.MUXDC_STATEMACHINE_Counter_Bus_Clr(Muxdc_Statemachine_Counter_Bus_Clr),
.MUXDC_STATEMACHINE_Conf_Rutine(Muxdc_Statemachine_Conf_Rutine)

);


assign Counter_W_Col_Load= (Counter_W_Col_Load_1 | Muxdc_Statemachine_Counter_W_Col_Load);

endmodule