data/full_repos/permissive/430026064/inst_decompress.v
1: b"%Error: data/full_repos/permissive/430026064/inst_decompress.v:17: Define or directive not defined: '`CODE_MEMORY_WORD_SIZE'\n  reg [`CODE_MEMORY_WORD_SIZE:0] mem_array [`CODE_MEMORY_SIZE:0];\n       ^~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:17: syntax error, unexpected ':', expecting TYPE-IDENTIFIER\n  reg [`CODE_MEMORY_WORD_SIZE:0] mem_array [`CODE_MEMORY_SIZE:0];\n                             ^\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:17: Define or directive not defined: '`CODE_MEMORY_SIZE'\n  reg [`CODE_MEMORY_WORD_SIZE:0] mem_array [`CODE_MEMORY_SIZE:0];\n                                            ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:27: Define or directive not defined: '`INSTR_DICTIONARY_START_ADDR'\n      instr_dictionary_address = `INSTR_DICTIONARY_START_ADDR;\n                                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:27: syntax error, unexpected ';', expecting TYPE-IDENTIFIER\n      instr_dictionary_address = `INSTR_DICTIONARY_START_ADDR;\n                                                             ^\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:28: Define or directive not defined: '`OPCODE_DICTIONARY_START_ADDR'\n      opcode_dictionary_address = `OPCODE_DICTIONARY_START_ADDR;\n                                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:28: syntax error, unexpected ';', expecting TYPE-IDENTIFIER\n      opcode_dictionary_address = `OPCODE_DICTIONARY_START_ADDR;\n                                                               ^\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:29: Define or directive not defined: '`COMPRESSED_OR_NOT_ADDR'\n      compressed_or_not_address = `COMPRESSED_OR_NOT_ADDR;\n                                  ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:29: syntax error, unexpected ';', expecting TYPE-IDENTIFIER\n      compressed_or_not_address = `COMPRESSED_OR_NOT_ADDR;\n                                                         ^\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:31: Define or directive not defined: '`CODE_MEMORY_SIZE'\n      for (i=0; i<`CODE_MEMORY_SIZE; i=i+1) begin\n                  ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:31: syntax error, unexpected ';', expecting TYPE-IDENTIFIER\n      for (i=0; i<`CODE_MEMORY_SIZE; i=i+1) begin\n                                   ^\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:31: syntax error, unexpected ')', expecting ';'\n      for (i=0; i<`CODE_MEMORY_SIZE; i=i+1) begin\n                                          ^\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:50: syntax error, unexpected '[', expecting IDENTIFIER\n      mem_array[0] = {32'h104};   \n               ^\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:61: Define or directive not defined: '`COMPRESSED_OR_NOT_ADDR'\n      mem_array[`COMPRESSED_OR_NOT_ADDR] = {32'hFFFFFFFF};\n                ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:63: Define or directive not defined: '`INSTR_DICTIONARY_START_ADDR'\n      mem_array[`INSTR_DICTIONARY_START_ADDR] = {32'h00000000};\n                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:64: Define or directive not defined: '`INSTR_DICTIONARY_START_ADDR'\n      mem_array[`INSTR_DICTIONARY_START_ADDR+1] = {32'h00000001};\n                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:65: Define or directive not defined: '`INSTR_DICTIONARY_START_ADDR'\n      mem_array[`INSTR_DICTIONARY_START_ADDR+2] = {32'h100531};\n                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:66: Define or directive not defined: '`INSTR_DICTIONARY_START_ADDR'\n      mem_array[`INSTR_DICTIONARY_START_ADDR+3] = {32'h407485C3};\n                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:84: syntax error, unexpected '=', expecting IDENTIFIER\n        total_bit_changes = compressed_instr[1:0];\n                          ^\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:88: syntax error, unexpected '=', expecting IDENTIFIER\n            bit_location = compressed_instr[6:2];  \n                         ^\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:95: syntax error, unexpected '=', expecting IDENTIFIER\n            dictionary_index = compressed_instr[12+2 : 12];  \n                             ^\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:104: syntax error, unexpected '=', expecting IDENTIFIER\n            dictionary_index = compressed_instr[17+2 : 17];  \n                             ^\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:116: syntax error, unexpected '=', expecting IDENTIFIER\n            dictionary_index = compressed_instr[22+2 : 22];  \n                             ^\n%Error: data/full_repos/permissive/430026064/inst_decompress.v:132: syntax error, unexpected '=', expecting IDENTIFIER\n       instruction = compressed_instr;\n                   ^\n%Error: Cannot continue\n"
module instruction_memory(clk, address, instruction);
  input clk;
  input [31:0] address;
  output reg [31:0] instruction;

  reg [31:0] compressed_or_not_address;
  reg [31:0] instr_dictionary_address;
  reg [31:0] opcode_dictionary_address;
  reg [31:0] compressed_or_not_block;
  reg [31:0] compressed_instr;
  reg [1:0] total_bit_changes;
  reg [1:0] dictionary_index;
  reg [4:0] bit_location;
  reg [`CODE_MEMORY_WORD_SIZE:0] mem_array [`CODE_MEMORY_SIZE:0];
  reg [31:0] temp;
  integer is_compressed = 0;
  integer compressed_or_not_block_number = 0;
  integer compressed_or_not_block_index = 0;
  integer dict_index_location;
  integer instr_count;
  integer i;
  
	initial begin
      instr_dictionary_address = `INSTR_DICTIONARY_START_ADDR;
      opcode_dictionary_address = `OPCODE_DICTIONARY_START_ADDR;
      compressed_or_not_address = `COMPRESSED_OR_NOT_ADDR;
      
      for (i=0; i<`CODE_MEMORY_SIZE; i=i+1) begin
        mem_array[i]=32'b0;
      end
      















      mem_array[0] = {32'h104};
      mem_array[4] = {32'h66292};
      mem_array[8] = {32'h104};
      mem_array[12] = {32'h66292};
      mem_array[16] = {32'h104};
      mem_array[20] = {32'h66292};
      mem_array[24] = {32'h104};
      mem_array[28] = {32'h66292};
      mem_array[32] = {32'h104};
      mem_array[36] = {32'h66292};
      
      mem_array[`COMPRESSED_OR_NOT_ADDR] = {32'hFFFFFFFF};
      
      mem_array[`INSTR_DICTIONARY_START_ADDR] = {32'h00000000};
      mem_array[`INSTR_DICTIONARY_START_ADDR+1] = {32'h00000001};
      mem_array[`INSTR_DICTIONARY_START_ADDR+2] = {32'h100531};
      mem_array[`INSTR_DICTIONARY_START_ADDR+3] = {32'h407485C3};
      

    end
    
	always@(address) begin
      compressed_instr = mem_array[address];
      instr_count = address/4;
      compressed_or_not_block_number = instr_count / 32;
      compressed_or_not_block_index = instr_count % 32;


      
      compressed_or_not_block = mem_array[compressed_or_not_address + compressed_or_not_block_number];
      is_compressed = compressed_or_not_block[compressed_or_not_block_index];
      
      if (is_compressed == 1) begin

        total_bit_changes = compressed_instr[1:0];
        
       	case(total_bit_changes)
          2'b00: begin
            bit_location = compressed_instr[6:2];
            dictionary_index = compressed_instr[8:7];
            instruction = mem_array[instr_dictionary_address + dictionary_index];
            instruction = instruction ^ (1 << bit_location);

          end 
          2'b01: begin
            dictionary_index = compressed_instr[12+2 : 12];
            instruction = mem_array[instr_dictionary_address + dictionary_index];
            
            bit_location = compressed_instr[6:2];
            instruction = instruction ^ (1 << bit_location);
            bit_location = compressed_instr[11:7];
            instruction = instruction ^ (1 << bit_location);
          end 
          2'b10: begin
            dictionary_index = compressed_instr[17+2 : 17];
            instruction = mem_array[instr_dictionary_address + dictionary_index];
            
            bit_location = compressed_instr[6:2];
            instruction = instruction ^ (1 << bit_location);
            bit_location = compressed_instr[11:7];
            instruction = instruction ^ (1 << bit_location);
            bit_location = compressed_instr[16:12];
            instruction = instruction ^ (1 << bit_location);
            
          end 
          2'b11: begin
            dictionary_index = compressed_instr[22+2 : 22];
            instruction = mem_array[instr_dictionary_address + dictionary_index];
            
            bit_location = compressed_instr[6:2];
            instruction = instruction ^ (1 << bit_location);
            bit_location = compressed_instr[11:7];
            instruction = instruction ^ (1 << bit_location);
            bit_location = compressed_instr[16:12];
            instruction = instruction ^ (1 << bit_location);
            bit_location = compressed_instr[21:17];
            instruction = instruction ^ (1 << bit_location);
          end 
        endcase

        
	  end else begin 
      	instruction = compressed_instr;

      end
      




    end
  
endmodule
module instruction_memory(clk, address, instruction);

  input clk;
  input [31:0] address;
  output reg [31:0] instruction;

  reg [31:0] compressed_or_not_address;
  reg [31:0] instr_dictionary_address;
  reg [31:0] opcode_dictionary_address;
  reg [31:0] compressed_or_not_block;
  reg [31:0] compressed_instr;
  reg [1:0] total_bit_changes;
  reg [1:0] dictionary_index;
  reg [4:0] bit_location;
  reg [`CODE_MEMORY_WORD_SIZE:0] mem_array [`CODE_MEMORY_SIZE:0];
  reg [31:0] temp;
  integer is_compressed = 0;
  integer compressed_or_not_block_number = 0;
  integer compressed_or_not_block_index = 0;
  integer dict_index_location;
  integer instr_count;
  integer i;
  
	initial begin
      instr_dictionary_address = `INSTR_DICTIONARY_START_ADDR;
      opcode_dictionary_address = `OPCODE_DICTIONARY_START_ADDR;
      compressed_or_not_address = `COMPRESSED_OR_NOT_ADDR;
      
      for (i=0; i<`CODE_MEMORY_SIZE; i=i+1) begin
        mem_array[i]=32'b0;
      end
      















      mem_array[0] = {32'h104};
      mem_array[4] = {32'h66292};
      mem_array[8] = {32'h104};
      mem_array[12] = {32'h66292};
      mem_array[16] = {32'h104};
      mem_array[20] = {32'h66292};
      mem_array[24] = {32'h104};
      mem_array[28] = {32'h66292};
      mem_array[32] = {32'h104};
      mem_array[36] = {32'h66292};
      
      mem_array[`COMPRESSED_OR_NOT_ADDR] = {32'hFFFFFFFF};
      
      mem_array[`INSTR_DICTIONARY_START_ADDR] = {32'h00000000};
      mem_array[`INSTR_DICTIONARY_START_ADDR+1] = {32'h00000001};
      mem_array[`INSTR_DICTIONARY_START_ADDR+2] = {32'h100531};
      mem_array[`INSTR_DICTIONARY_START_ADDR+3] = {32'h407485C3};
      

    end
    
	always@(address) begin
      compressed_instr = mem_array[address];
      instr_count = address/4;
      compressed_or_not_block_number = instr_count / 32;
      compressed_or_not_block_index = instr_count % 32;


      
      compressed_or_not_block = mem_array[compressed_or_not_address + compressed_or_not_block_number];
      is_compressed = compressed_or_not_block[compressed_or_not_block_index];
      
      if (is_compressed == 1) begin

        total_bit_changes = compressed_instr[1:0];
        
       	case(total_bit_changes)
          2'b00: begin
            bit_location = compressed_instr[6:2];
            dictionary_index = compressed_instr[8:7];
            instruction = mem_array[instr_dictionary_address + dictionary_index];
            instruction = instruction ^ (1 << bit_location);

          end 
          2'b01: begin
            dictionary_index = compressed_instr[12+2 : 12];
            instruction = mem_array[instr_dictionary_address + dictionary_index];
            
            bit_location = compressed_instr[6:2];
            instruction = instruction ^ (1 << bit_location);
            bit_location = compressed_instr[11:7];
            instruction = instruction ^ (1 << bit_location);
          end 
          2'b10: begin
            dictionary_index = compressed_instr[17+2 : 17];
            instruction = mem_array[instr_dictionary_address + dictionary_index];
            
            bit_location = compressed_instr[6:2];
            instruction = instruction ^ (1 << bit_location);
            bit_location = compressed_instr[11:7];
            instruction = instruction ^ (1 << bit_location);
            bit_location = compressed_instr[16:12];
            instruction = instruction ^ (1 << bit_location);
            
          end 
          2'b11: begin
            dictionary_index = compressed_instr[22+2 : 22];
            instruction = mem_array[instr_dictionary_address + dictionary_index];
            
            bit_location = compressed_instr[6:2];
            instruction = instruction ^ (1 << bit_location);
            bit_location = compressed_instr[11:7];
            instruction = instruction ^ (1 << bit_location);
            bit_location = compressed_instr[16:12];
            instruction = instruction ^ (1 << bit_location);
            bit_location = compressed_instr[21:17];
            instruction = instruction ^ (1 << bit_location);
          end 
        endcase

        
	  end else begin 
      	instruction = compressed_instr;

      end
      




    end
  
endmodule