data/full_repos/permissive/489147019/Testcases/nvdla/rtl/nv_ram_rws_256x64.v
1: b"%Error: data/full_repos/permissive/489147019/Testcases/nvdla/rtl/nv_ram_rws_256x64.v:86: Cannot find file containing module: 'fakeram_256x64_dp'\nfakeram_256x64_dp rmod (\n^~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/489147019/Testcases/nvdla/rtl,data/full_repos/permissive/489147019/fakeram_256x64_dp\n             data/full_repos/permissive/489147019/Testcases/nvdla/rtl,data/full_repos/permissive/489147019/fakeram_256x64_dp.v\n             data/full_repos/permissive/489147019/Testcases/nvdla/rtl,data/full_repos/permissive/489147019/fakeram_256x64_dp.sv\n             fakeram_256x64_dp\n             fakeram_256x64_dp.v\n             fakeram_256x64_dp.sv\n             obj_dir/fakeram_256x64_dp\n             obj_dir/fakeram_256x64_dp.v\n             obj_dir/fakeram_256x64_dp.sv\n%Error: Exiting due to 1 error(s)\n"
module nv_ram_rws_256x64 (
  clk,
  ra,
  re,
  dout,
  wa,
  we,
  di,
  pwrbus_ram_pd
);
parameter FORCE_CONTENTION_ASSERTION_RESET_ACTIVE=1'b0;

input clk;
input [7:0] ra;
input re;
output [63:0] dout;
input [7:0] wa;
input we;
input [63:0] di;
input [31:0] pwrbus_ram_pd;











wire cena;
wire [7:0]  aa;
wire [63:0] da;

wire cenb;
wire [7:0]  ab;
wire [63:0] db;

assign  dout=da;
assign  cena=(re==1'b1)?1'b0:1'b1;
assign  aa=ra;


assign  cenb=(we==1'b1)?1'b0:1'b1;
assign  ab=wa;
assign  db=di;


wire ret1n ;	
wire stov;
wire emasa;
wire [2:0] emaa;
wire [2:0] emab;

assign stov = 1'b0;
assign emasa = 1'b0;	
assign emaa = 3'b010;
assign emab = 3'b010;
assign ret1n = 1'b1;	

















fakeram_256x64_dp rmod (
                      .QA(da), 
                      .CLKA(clk), 
                      .CENA(cena), 
                      .AA(aa), 
                      .CLKB(clk),
                      .CENB(cenb), 
                      .AB(ab), 
                      .DB(db), 
                      .STOV(stov), 
                      .EMAA(emaa), 
                      .EMASA(emasa), 
                      .EMAB(emab), 
                      .RET1N(ret1n));





endmodule
module nv_ram_rws_256x64 (
  clk,
  ra,
  re,
  dout,
  wa,
  we,
  di,
  pwrbus_ram_pd
);

parameter FORCE_CONTENTION_ASSERTION_RESET_ACTIVE=1'b0;

input clk;
input [7:0] ra;
input re;
output [63:0] dout;
input [7:0] wa;
input we;
input [63:0] di;
input [31:0] pwrbus_ram_pd;











wire cena;
wire [7:0]  aa;
wire [63:0] da;

wire cenb;
wire [7:0]  ab;
wire [63:0] db;

assign  dout=da;
assign  cena=(re==1'b1)?1'b0:1'b1;
assign  aa=ra;


assign  cenb=(we==1'b1)?1'b0:1'b1;
assign  ab=wa;
assign  db=di;


wire ret1n ;	
wire stov;
wire emasa;
wire [2:0] emaa;
wire [2:0] emab;

assign stov = 1'b0;
assign emasa = 1'b0;	
assign emaa = 3'b010;
assign emab = 3'b010;
assign ret1n = 1'b1;	

















fakeram_256x64_dp rmod (
                      .QA(da), 
                      .CLKA(clk), 
                      .CENA(cena), 
                      .AA(aa), 
                      .CLKB(clk),
                      .CENB(cenb), 
                      .AB(ab), 
                      .DB(db), 
                      .STOV(stov), 
                      .EMAA(emaa), 
                      .EMASA(emasa), 
                      .EMAB(emab), 
                      .RET1N(ret1n));





endmodule