data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl/ip_lpm.v
1: b'%Warning-IMPLICIT: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl/ip_lpm.v:270: Signal definition not found, creating implicitly: \'lpm_hit_result\'\n      lpm_hit         <= lpm_hit_result;\n                         ^~~~~~~~~~~~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Warning-IMPLICIT: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl/ip_lpm.v:276: Signal definition not found, creating implicitly: \'lpm_vld_result\'\n                                                                                                                                                              : ... Suggested alternative: \'lpm_hit_result\'\n         lpm_vld <= lpm_vld_result;\n                    ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl/ip_lpm.v:127: Cannot find file containing module: \'tcam\'\n   tcam \n   ^~~~\n        ... Looked in:\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl,data/full_repos/permissive/498471995/tcam\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl,data/full_repos/permissive/498471995/tcam.v\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl,data/full_repos/permissive/498471995/tcam.sv\n             tcam\n             tcam.v\n             tcam.sv\n             obj_dir/tcam\n             obj_dir/tcam.v\n             obj_dir/tcam.sv\n%Error: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl/ip_lpm.v:147: Cannot find file containing module: \'unencoded_cam_lut_sm\'\n   unencoded_cam_lut_sm\n   ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl/ip_lpm.v:195: Cannot find file containing module: \'fallthrough_small_fifo\'\n   fallthrough_small_fifo #(.WIDTH(32), .MAX_DEPTH_BITS  (2))\n   ^~~~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 3 error(s), 2 warning(s)\n'
module ip_lpm
    #(parameter C_S_AXIS_DATA_WIDTH	= 256,
      parameter NUM_QUEUES		= 8,
      parameter LUT_DEPTH		= 32,
      parameter LUT_DEPTH_BITS		= log2(LUT_DEPTH)
      )
    (
    input  [C_S_AXIS_DATA_WIDTH-1:0]   tdata,


    output reg [31:0]                  next_hop_ip,
    output reg [NUM_QUEUES-1:0]        lpm_output_port,
    output reg                         lpm_vld,
    output reg                         lpm_hit,

    input			       arp_done,
    output			       dest_fifo_nearly_full,


    input                              word_IP_DST_HI,
    input                              word_IP_DST_LO,



    input  [LUT_DEPTH_BITS-1:0]        lpm_rd_addr,
    input                              lpm_rd_req,
    output [31:0]                      lpm_rd_ip,
    output [31:0]                      lpm_rd_mask,
    output [NUM_QUEUES-1:0]            lpm_rd_oq,
    output [31:0]                      lpm_rd_next_hop_ip,
    output                             lpm_rd_ack,


    input [LUT_DEPTH_BITS-1:0]         lpm_wr_addr,
    input                              lpm_wr_req,
    input [NUM_QUEUES-1:0]             lpm_wr_oq,
    input [31:0]                       lpm_wr_next_hop_ip,
    input [31:0]                       lpm_wr_ip,
    input [31:0]                       lpm_wr_mask,
    output                             lpm_wr_ack,


    input                              reset,
    input                              clk
   );


   function integer log2;
      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
   endfunction


   localparam				 WAIT	= 1;
   localparam				 PROCESS= 2;



   wire					cam_busy;
   wire					cam_match;
   wire	[LUT_DEPTH-1:0]			cam_match_addr;
   wire [31:0]				cam_cmp_din, cam_cmp_data_mask;
   wire [31:0]				cam_din, cam_data_mask;
   wire					cam_we;
   wire [LUT_DEPTH_BITS-1:0]		cam_wr_addr;

   wire [NUM_QUEUES-1:0]		lookup_port_result;
   wire [31:0]				next_hop_ip_result;

   reg					dst_ip_vld;
   reg	[31:0]				dst_ip;
   wire [31:0]				lpm_rd_mask_inverted;

   reg					rd_dest;
   reg					dst_ip_ready;
   wire [31:0]				dst_ip_fifo;
   wire					dest_fifo_empty;
  
   reg [1:0]				state,state_next;


   assign lpm_rd_mask = ~lpm_rd_mask_inverted;




   tcam 
    #(	.C_TCAM_ADDR_WIDTH	(LUT_DEPTH_BITS),
	.C_TCAM_DATA_WIDTH	(32),
	.C_TCAM_ADDR_TYPE	(1),
	.C_TCAM_MATCH_ADDR_WIDTH (LUT_DEPTH)
     ) ip_lpm_tcam
      (

      .BUSY                             (cam_busy),
      .MATCH                            (cam_match),
      .MATCH_ADDR                       (cam_match_addr),

      .CLK                              (clk),
      .CMP_DIN                          (cam_cmp_din),
      .DIN                              (cam_din),
      .CMP_DATA_MASK                    (cam_cmp_data_mask),
      .DATA_MASK                        (cam_data_mask),
      .WE                               (cam_we),
      .ADDR_WR                          (cam_wr_addr));

   unencoded_cam_lut_sm
     #(.CMP_WIDTH          (32),
       .DATA_WIDTH         (32+NUM_QUEUES),
       .LUT_DEPTH          (LUT_DEPTH),
       .DEFAULT_DATA       (1)
      ) cam_lut_sm
       (
        .lookup_req          (dst_ip_ready),
        .lookup_cmp_data     (dst_ip_fifo),
        .lookup_cmp_dmask    (32'h0),
        .lookup_ack          (lpm_vld_result),
        .lookup_hit          (lpm_hit_result),
        .lookup_data         ({lookup_port_result, next_hop_ip_result}),



        .rd_addr             (lpm_rd_addr),
        .rd_req              (lpm_rd_req),
        .rd_data             ({lpm_rd_oq, lpm_rd_next_hop_ip}),
        .rd_cmp_data         (lpm_rd_ip),
        .rd_cmp_dmask        (lpm_rd_mask_inverted),
        .rd_ack              (lpm_rd_ack),


        .wr_addr             (lpm_wr_addr),
        .wr_req              (lpm_wr_req),
        .wr_data             ({lpm_wr_oq, lpm_wr_next_hop_ip}),
        .wr_cmp_data         (lpm_wr_ip),
        .wr_cmp_dmask        (~lpm_wr_mask),
        .wr_ack              (lpm_wr_ack),


        .cam_busy            (cam_busy),
        .cam_match           (cam_match),
        .cam_match_addr      (cam_match_addr),
        .cam_cmp_din         (cam_cmp_din),
        .cam_din             (cam_din),
        .cam_we              (cam_we),
        .cam_wr_addr         (cam_wr_addr),
        .cam_cmp_data_mask   (cam_cmp_data_mask),
        .cam_data_mask       (cam_data_mask),


        .reset               (reset),
        .clk                 (clk));



   fallthrough_small_fifo #(.WIDTH(32), .MAX_DEPTH_BITS  (2))
      dest_fifo
        (.din           (dst_ip),
         .wr_en         (dst_ip_vld),
         .rd_en         (rd_dest),
         .dout          (dst_ip_fifo),
         .full          (),
         .nearly_full   (dest_fifo_nearly_full),
         .prog_full     (),
         .empty         (dest_fifo_empty),
         .reset         (reset),
         .clk           (clk)
         );


    always @(*) begin
	rd_dest = 0;
	dst_ip_ready = 0;
	state_next = state;

	case(state)

		WAIT: begin
			if(!dest_fifo_empty) begin
				rd_dest		= 1;
				dst_ip_ready	= 1;
				state_next	= PROCESS;
			end
		end
	
		PROCESS: begin
			if(arp_done)
				state_next = WAIT;
		end
	endcase
     end		


   always @(posedge clk) begin
	if(reset)
		state <= WAIT;
	else
		state <= state_next;
   end




   always @(posedge clk) begin
      if(reset) begin
         dst_ip <= 0;
         dst_ip_vld <= 0;
      end
      else begin
         if(word_IP_DST_HI) begin
            dst_ip[31:16] <= tdata[15:0];
         end
         if(word_IP_DST_LO) begin
            dst_ip[15:0]  <= tdata[255:240];
            dst_ip_vld <= 1;
         end
         else begin
            dst_ip_vld <= 0;
         end
      end
   end


   always @(posedge clk) begin
      lpm_output_port <= lookup_port_result;
      next_hop_ip     <= (next_hop_ip_result == 0) ? dst_ip_fifo : next_hop_ip_result;
      lpm_hit         <= lpm_hit_result;

      if(reset) begin
         lpm_vld <= 0;
      end
      else begin
         lpm_vld <= lpm_vld_result;
      end
   end
endmodule
module ip_lpm
    #(parameter C_S_AXIS_DATA_WIDTH	= 256,
      parameter NUM_QUEUES		= 8,
      parameter LUT_DEPTH		= 32,
      parameter LUT_DEPTH_BITS		= log2(LUT_DEPTH)
      )
    (
    input  [C_S_AXIS_DATA_WIDTH-1:0]   tdata,


    output reg [31:0]                  next_hop_ip,
    output reg [NUM_QUEUES-1:0]        lpm_output_port,
    output reg                         lpm_vld,
    output reg                         lpm_hit,

    input			       arp_done,
    output			       dest_fifo_nearly_full,


    input                              word_IP_DST_HI,
    input                              word_IP_DST_LO,



    input  [LUT_DEPTH_BITS-1:0]        lpm_rd_addr,
    input                              lpm_rd_req,
    output [31:0]                      lpm_rd_ip,
    output [31:0]                      lpm_rd_mask,
    output [NUM_QUEUES-1:0]            lpm_rd_oq,
    output [31:0]                      lpm_rd_next_hop_ip,
    output                             lpm_rd_ack,


    input [LUT_DEPTH_BITS-1:0]         lpm_wr_addr,
    input                              lpm_wr_req,
    input [NUM_QUEUES-1:0]             lpm_wr_oq,
    input [31:0]                       lpm_wr_next_hop_ip,
    input [31:0]                       lpm_wr_ip,
    input [31:0]                       lpm_wr_mask,
    output                             lpm_wr_ack,


    input                              reset,
    input                              clk
   );



   function integer log2;
      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
   endfunction


   localparam				 WAIT	= 1;
   localparam				 PROCESS= 2;



   wire					cam_busy;
   wire					cam_match;
   wire	[LUT_DEPTH-1:0]			cam_match_addr;
   wire [31:0]				cam_cmp_din, cam_cmp_data_mask;
   wire [31:0]				cam_din, cam_data_mask;
   wire					cam_we;
   wire [LUT_DEPTH_BITS-1:0]		cam_wr_addr;

   wire [NUM_QUEUES-1:0]		lookup_port_result;
   wire [31:0]				next_hop_ip_result;

   reg					dst_ip_vld;
   reg	[31:0]				dst_ip;
   wire [31:0]				lpm_rd_mask_inverted;

   reg					rd_dest;
   reg					dst_ip_ready;
   wire [31:0]				dst_ip_fifo;
   wire					dest_fifo_empty;
  
   reg [1:0]				state,state_next;


   assign lpm_rd_mask = ~lpm_rd_mask_inverted;




   tcam 
    #(	.C_TCAM_ADDR_WIDTH	(LUT_DEPTH_BITS),
	.C_TCAM_DATA_WIDTH	(32),
	.C_TCAM_ADDR_TYPE	(1),
	.C_TCAM_MATCH_ADDR_WIDTH (LUT_DEPTH)
     ) ip_lpm_tcam
      (

      .BUSY                             (cam_busy),
      .MATCH                            (cam_match),
      .MATCH_ADDR                       (cam_match_addr),

      .CLK                              (clk),
      .CMP_DIN                          (cam_cmp_din),
      .DIN                              (cam_din),
      .CMP_DATA_MASK                    (cam_cmp_data_mask),
      .DATA_MASK                        (cam_data_mask),
      .WE                               (cam_we),
      .ADDR_WR                          (cam_wr_addr));

   unencoded_cam_lut_sm
     #(.CMP_WIDTH          (32),
       .DATA_WIDTH         (32+NUM_QUEUES),
       .LUT_DEPTH          (LUT_DEPTH),
       .DEFAULT_DATA       (1)
      ) cam_lut_sm
       (
        .lookup_req          (dst_ip_ready),
        .lookup_cmp_data     (dst_ip_fifo),
        .lookup_cmp_dmask    (32'h0),
        .lookup_ack          (lpm_vld_result),
        .lookup_hit          (lpm_hit_result),
        .lookup_data         ({lookup_port_result, next_hop_ip_result}),



        .rd_addr             (lpm_rd_addr),
        .rd_req              (lpm_rd_req),
        .rd_data             ({lpm_rd_oq, lpm_rd_next_hop_ip}),
        .rd_cmp_data         (lpm_rd_ip),
        .rd_cmp_dmask        (lpm_rd_mask_inverted),
        .rd_ack              (lpm_rd_ack),


        .wr_addr             (lpm_wr_addr),
        .wr_req              (lpm_wr_req),
        .wr_data             ({lpm_wr_oq, lpm_wr_next_hop_ip}),
        .wr_cmp_data         (lpm_wr_ip),
        .wr_cmp_dmask        (~lpm_wr_mask),
        .wr_ack              (lpm_wr_ack),


        .cam_busy            (cam_busy),
        .cam_match           (cam_match),
        .cam_match_addr      (cam_match_addr),
        .cam_cmp_din         (cam_cmp_din),
        .cam_din             (cam_din),
        .cam_we              (cam_we),
        .cam_wr_addr         (cam_wr_addr),
        .cam_cmp_data_mask   (cam_cmp_data_mask),
        .cam_data_mask       (cam_data_mask),


        .reset               (reset),
        .clk                 (clk));



   fallthrough_small_fifo #(.WIDTH(32), .MAX_DEPTH_BITS  (2))
      dest_fifo
        (.din           (dst_ip),
         .wr_en         (dst_ip_vld),
         .rd_en         (rd_dest),
         .dout          (dst_ip_fifo),
         .full          (),
         .nearly_full   (dest_fifo_nearly_full),
         .prog_full     (),
         .empty         (dest_fifo_empty),
         .reset         (reset),
         .clk           (clk)
         );


    always @(*) begin
	rd_dest = 0;
	dst_ip_ready = 0;
	state_next = state;

	case(state)

		WAIT: begin
			if(!dest_fifo_empty) begin
				rd_dest		= 1;
				dst_ip_ready	= 1;
				state_next	= PROCESS;
			end
		end
	
		PROCESS: begin
			if(arp_done)
				state_next = WAIT;
		end
	endcase
     end		


   always @(posedge clk) begin
	if(reset)
		state <= WAIT;
	else
		state <= state_next;
   end




   always @(posedge clk) begin
      if(reset) begin
         dst_ip <= 0;
         dst_ip_vld <= 0;
      end
      else begin
         if(word_IP_DST_HI) begin
            dst_ip[31:16] <= tdata[15:0];
         end
         if(word_IP_DST_LO) begin
            dst_ip[15:0]  <= tdata[255:240];
            dst_ip_vld <= 1;
         end
         else begin
            dst_ip_vld <= 0;
         end
      end
   end


   always @(posedge clk) begin
      lpm_output_port <= lookup_port_result;
      next_hop_ip     <= (next_hop_ip_result == 0) ? dst_ip_fifo : next_hop_ip_result;
      lpm_hit         <= lpm_hit_result;

      if(reset) begin
         lpm_vld <= 0;
      end
      else begin
         lpm_vld <= lpm_vld_result;
      end
   end
endmodule