data/full_repos/permissive/515562880/TB_Decade_Counter.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/515562880/TB_Decade_Counter.v:11: Unsupported: Ignoring delay on this delayed statement.\n   #20 en=1\'d1;\n   ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/515562880/TB_Decade_Counter.v:15: Unsupported: Ignoring delay on this delayed statement.\n    #5 clock=~clock; \n    ^\n%Error: data/full_repos/permissive/515562880/TB_Decade_Counter.v:18: Unsupported or unknown PLI call: $monitor\n    $monitor ( $time , "clock= %b, count= %d, en= %b",    clock,count, en);\n    ^~~~~~~~\n%Error: Exiting due to 1 error(s), 2 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module decadecounter_tb;
wire [3:0] count;
reg en,clock;
  
decade_counter dut(.en(en), .clock(clock), .count(count));
initial begin
$display($time, " << Starting the Simulation >>");
    en=0;
    clock=0;
   #20 en=1'd1;
end
  
  always
    #5 clock=~clock; 
  
  initial
    $monitor ( $time , "clock= %b, count= %d, en= %b",    clock,count, en);
  
endmodule
module decadecounter_tb;

wire [3:0] count;
reg en,clock;
  
decade_counter dut(.en(en), .clock(clock), .count(count));
initial begin
$display($time, " << Starting the Simulation >>");
    en=0;
    clock=0;
   #20 en=1'd1;
end
  
  always
    #5 clock=~clock; 
  
  initial
    $monitor ( $time , "clock= %b, count= %d, en= %b",    clock,count, en);
  
endmodule