data/full_repos/permissive/506562943/HDLBits/Circuits/Combinational Logic/Multiplexers/mux2to1.v
1: b'%Error: Cannot find file containing module: Logic/Multiplexers,data/full_repos/permissive/506562943\n        ... Looked in:\n             data/full_repos/permissive/506562943/HDLBits/Circuits/Combinational/Logic/Multiplexers,data/full_repos/permissive/506562943\n             data/full_repos/permissive/506562943/HDLBits/Circuits/Combinational/Logic/Multiplexers,data/full_repos/permissive/506562943.v\n             data/full_repos/permissive/506562943/HDLBits/Circuits/Combinational/Logic/Multiplexers,data/full_repos/permissive/506562943.sv\n             Logic/Multiplexers,data/full_repos/permissive/506562943\n             Logic/Multiplexers,data/full_repos/permissive/506562943.v\n             Logic/Multiplexers,data/full_repos/permissive/506562943.sv\n             obj_dir/Logic/Multiplexers,data/full_repos/permissive/506562943\n             obj_dir/Logic/Multiplexers,data/full_repos/permissive/506562943.v\n             obj_dir/Logic/Multiplexers,data/full_repos/permissive/506562943.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/506562943/HDLBits/Circuits/Combinational\n%Error: Cannot find file containing module: Logic/Multiplexers/mux2to1.v\n%Error: Exiting due to 3 error(s)\n'
module top_module( 
    input a, b, sel,
    output out ); 

    assign out = sel ? b : a;
    
endmodule
module top_module( 
    input a, b, sel,
    output out );
 

    assign out = sel ? b : a;
    
endmodule