data/full_repos/permissive/494664634/AxiMM2S2MMTest2/src/sim/AxiMM2S2MMTest2_tb.sv
1: b'%Warning-STMTDLY: data/full_repos/permissive/494664634/AxiMM2S2MMTest2/src/sim/AxiMM2S2MMTest2_tb.sv:25: Unsupported: Ignoring delay on this delayed statement.\nalways #5ns aclk = ~aclk;\n       ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/494664634/AxiMM2S2MMTest2/src/sim/AxiMM2S2MMTest2_tb.sv:31: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport axi_vip_pkg::*;\n       ^~~~~~~~~~~\n%Error: data/full_repos/permissive/494664634/AxiMM2S2MMTest2/src/sim/AxiMM2S2MMTest2_tb.sv:40: syntax error, unexpected IDENTIFIER\n    design_1_axi_vip_0_0_mst_t master_agent;\n                               ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/494664634/AxiMM2S2MMTest2/src/sim/AxiMM2S2MMTest2_tb.sv:42: Unsupported: new with arguments\n    master_agent = new("master vip agent",DUT.design_1_i.axi_vip_0.inst.IF);  \n                   ^~~\n%Error: data/full_repos/permissive/494664634/AxiMM2S2MMTest2/src/sim/AxiMM2S2MMTest2_tb.sv:47: syntax error, unexpected \'@\'\n    repeat(5) @(negedge aclk);\n              ^\n%Error: data/full_repos/permissive/494664634/AxiMM2S2MMTest2/src/sim/AxiMM2S2MMTest2_tb.sv:51: syntax error, unexpected \'@\'\n    @(negedge aclk);\n    ^\n%Error: data/full_repos/permissive/494664634/AxiMM2S2MMTest2/src/sim/AxiMM2S2MMTest2_tb.sv:93: syntax error, unexpected \'@\'\n    repeat(5) @(negedge aclk);\n              ^\n%Error: Exiting due to 6 error(s), 1 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module AxiMM2S2MMTest2_tb();
bit aclk=0;
bit aresetn = 0;
always #5ns aclk = ~aclk;

design_1_wrapper DUT(.*);
test t1(.*);
endmodule
module AxiMM2S2MMTest2_tb();

bit aclk=0;
bit aresetn = 0;
always #5ns aclk = ~aclk;

design_1_wrapper DUT(.*);
test t1(.*);
endmodule