data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:48: Unsupported: Ignoring delay on this delayed statement.\n        #1\n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:70: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:73: Unsupported: Ignoring delay on this delayed statement.\n        #5\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:77: Unsupported: Ignoring delay on this delayed statement.\n        #100\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:80: Unsupported: Ignoring delay on this delayed statement.\n        #T1H_min\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:82: Unsupported: Ignoring delay on this delayed statement.\n        #T1L_min\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:85: Unsupported: Ignoring delay on this delayed statement.\n        #T1H_max\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:87: Unsupported: Ignoring delay on this delayed statement.\n        #T1L_min\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:92: Unsupported: Ignoring delay on this delayed statement.\n        #T0H_min\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:94: Unsupported: Ignoring delay on this delayed statement.\n        #T0L_min\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:97: Unsupported: Ignoring delay on this delayed statement.\n        #T0H_max\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:99: Unsupported: Ignoring delay on this delayed statement.\n        #T0L_min\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:103: Unsupported: Ignoring delay on this delayed statement.\n        #RGB_rst\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:107: Unsupported: Ignoring delay on this delayed statement.\n        #T1H_min\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:109: Unsupported: Ignoring delay on this delayed statement.\n        #T1L_min\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:112: Unsupported: Ignoring delay on this delayed statement.\n        #T0H_max\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:114: Unsupported: Ignoring delay on this delayed statement.\n        #T0L_min\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:118: Unsupported: Ignoring delay on this delayed statement.\n        #RGB_rst\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:120: Unsupported: Ignoring delay on this delayed statement.\n        #T0L_min\n        ^\n%Error: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:129: Unsupported or unknown PLI call: $dumpfile\n        $dumpfile("rgb_sinp_tb.vcd");\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:130: Unsupported or unknown PLI call: $dumpvars\n        $dumpvars(0, rgb_sinp_tb);\n        ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/512077043/rgb_sinp/rgb_sinp_tb.v:133: Unsupported: Ignoring delay on this delayed statement.\n        #(DURATION)\n        ^\n%Error: Exiting due to 2 error(s), 20 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module rgb_sinp_tb();


    wire            sbit_value;
    

    reg             clk = 0;
    reg             rst = 0;
    reg             inp_sig = 1;





    
    

    localparam DURATION = 25000;
    localparam STREAM_RESET_CLKS = 4800;
    localparam COUNTER_MAX = STREAM_RESET_CLKS+200;
    localparam SAMPLE_TIME_CLKS = 57;

    localparam T0H_min = 48;
    localparam T0H_max = 105;
    localparam T1H_min = 124;
    localparam T1H_max = 182;
    localparam T1L_min = 57;
    localparam T1L_max = 115;
    localparam T0L_min = 134;
    localparam T0L_max = 192;
    localparam RGB_rst = 9600;



    always begin
        #1
        clk = ~clk;
    end
    

    rgb_sinp #(
        .COUNTER_MAX(COUNTER_MAX),
        .STREAM_RESET_CLKS(STREAM_RESET_CLKS),
        .SAMPLE_TIME_CLKS(SAMPLE_TIME_CLKS)
    ) uut (
        .clk(clk),
        .rst(rst),
        .sig(inp_sig),
        .strobe(strobe),
        .sbit_value(sbit_value),
        .stream_reset(stream_reset)
    );
    

    initial begin
    

        #10
        rst = 1;
        inp_sig = 0;
        #5
        rst = 0;
        

        #100

        inp_sig = 1;
        #T1H_min
        inp_sig = 0;
        #T1L_min

        inp_sig = 1;
        #T1H_max
        inp_sig = 0;
        #T1L_min



        inp_sig = 1;
        #T0H_min
        inp_sig = 0;
        #T0L_min

        inp_sig = 1;
        #T0H_max
        inp_sig = 0;
        #T0L_min
        

        inp_sig = 0;
        #RGB_rst


        inp_sig = 1;
        #T1H_min
        inp_sig = 0;
        #T1L_min

        inp_sig = 1;
        #T0H_max
        inp_sig = 0;
        #T0L_min


        inp_sig = 1;
        #RGB_rst
        inp_sig = 1;
        #T0L_min
        inp_sig = 0;

    end
    

    initial begin
    

        $dumpfile("rgb_sinp_tb.vcd");
        $dumpvars(0, rgb_sinp_tb);
        

        #(DURATION)
        

        $display("Finished!");
        $finish;
    end
    
endmodule
module rgb_sinp_tb();



    wire            sbit_value;
    

    reg             clk = 0;
    reg             rst = 0;
    reg             inp_sig = 1;





    
    

    localparam DURATION = 25000;
    localparam STREAM_RESET_CLKS = 4800;
    localparam COUNTER_MAX = STREAM_RESET_CLKS+200;
    localparam SAMPLE_TIME_CLKS = 57;

    localparam T0H_min = 48;
    localparam T0H_max = 105;
    localparam T1H_min = 124;
    localparam T1H_max = 182;
    localparam T1L_min = 57;
    localparam T1L_max = 115;
    localparam T0L_min = 134;
    localparam T0L_max = 192;
    localparam RGB_rst = 9600;



    always begin
        #1
        clk = ~clk;
    end
    

    rgb_sinp #(
        .COUNTER_MAX(COUNTER_MAX),
        .STREAM_RESET_CLKS(STREAM_RESET_CLKS),
        .SAMPLE_TIME_CLKS(SAMPLE_TIME_CLKS)
    ) uut (
        .clk(clk),
        .rst(rst),
        .sig(inp_sig),
        .strobe(strobe),
        .sbit_value(sbit_value),
        .stream_reset(stream_reset)
    );
    

    initial begin
    

        #10
        rst = 1;
        inp_sig = 0;
        #5
        rst = 0;
        

        #100

        inp_sig = 1;
        #T1H_min
        inp_sig = 0;
        #T1L_min

        inp_sig = 1;
        #T1H_max
        inp_sig = 0;
        #T1L_min



        inp_sig = 1;
        #T0H_min
        inp_sig = 0;
        #T0L_min

        inp_sig = 1;
        #T0H_max
        inp_sig = 0;
        #T0L_min
        

        inp_sig = 0;
        #RGB_rst


        inp_sig = 1;
        #T1H_min
        inp_sig = 0;
        #T1L_min

        inp_sig = 1;
        #T0H_max
        inp_sig = 0;
        #T0L_min


        inp_sig = 1;
        #RGB_rst
        inp_sig = 1;
        #T0L_min
        inp_sig = 0;

    end
    

    initial begin
    

        $dumpfile("rgb_sinp_tb.vcd");
        $dumpvars(0, rgb_sinp_tb);
        

        #(DURATION)
        

        $display("Finished!");
        $finish;
    end
    
endmodule