data/full_repos/permissive/411838135/rv/synth/vsram.v
1: b'%Error: No top level module found\n%Error: Exiting due to 1 error(s)\n'
module mul64(input clk, input [63:0]a, input [63:0]b, output[127:0]p);



	reg [127:0]pp[0:6];
	assign p = pp[0];
	wire unsigned [127:0]ua={64'b0,a};
	wire unsigned [127:0]ub={64'b0,b};
	always @(posedge clk)
 		pp[0] <= ua*ub;







endmodule
module mul64(input clk, input [63:0]a, input [63:0]b, output[127:0]p);




	reg [127:0]pp[0:6];
	assign p = pp[0];
	wire unsigned [127:0]ua={64'b0,a};
	wire unsigned [127:0]ub={64'b0,b};
	always @(posedge clk)
 		pp[0] <= ua*ub;







endmodule