data/full_repos/permissive/491135068/signExt.v
1: b'%Warning-WIDTH: data/full_repos/permissive/491135068/signExt.v:29: Operator ASSIGNDLY expects 32 bits on the Assign RHS, but Assign RHS\'s SIGNED generates 16 bits.\n                                                                 : ... In instance signExt\n        ext <= $signed(unex);\n            ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module signExt(
    input [15:0] unex,
    output reg [31:0] ext
    );
    
    always @(unex) begin
        ext <= $signed(unex);
    end
endmodule
module signExt(
    input [15:0] unex,
    output reg [31:0] ext
    );

    
    always @(unex) begin
        ext <= $signed(unex);
    end
endmodule