data/full_repos/permissive/475642691/sources/new/NSL.v
data/verilator_xmls/de03ff22-aecc-45df-a79a-146539eac89c.xml
module NSL(

input ST,RST,[1:0]CN,[3:0]b,
output [3:0]NS
    );

    assign NS[0] = (ST & ~RST & CN[0] & ~b[0]);

    assign NS[1] = (ST & ~RST & CN[0] & b[1] & ~b[0]) | (ST & ~RST & CN[1] & ~CN[0] & ~b[1]) | (ST & ~RST & CN[1] & ~CN[0] & b[3] & b[2]) | (ST & ~RST & CN[1] & b[3] & b[2] & ~b[0]) | (ST & ~RST & CN[0] & ~b[3] & ~b[1] & b[0]) | (ST & ~RST & CN[0] & ~b[2] & ~b[1] & b[0]) | (ST & ~RST & ~CN[1] & CN[0] & b[3] & b[2] & b[0]);

    assign NS[2] = (ST & ~RST & ~CN[1] & CN[0] & ~b[2] & b[1] & b[0]) | (ST & ~RST & ~CN[1] & CN[0] & b[2] & ~b[1]) | (ST & ~RST & ~CN[1] & CN[0] & b[2] & ~b[0]) | (ST & ~RST & CN[1] & ~CN[0] & ~b[2] & b[1]) | (ST & ~RST & CN[1] & ~CN[0] & b[2] & ~b[1]) | (ST & ~RST & CN[1] & CN[0] & ~b[3] & b[2] & b[1] & b[0]) | (ST & ~RST & CN[1] & CN[0] & ~b[2] & ~b[1] & b[0]) | (ST & ~RST & ~CN[1] & CN[0] & b[3] & b[1] & b[0]) | (ST & ~RST & CN[1] & ~CN[0] & b[3] & b[1]) | (ST & ~RST & CN[1] & CN[0] & ~b[3] & ~b[2] & ~b[1]) | (ST & ~RST & CN[1] & ~b[2] & b[1] & ~b[0]) | (ST & ~RST & CN[0] & b[3] & b[2] & ~b[0]);

    assign NS[3] = (ST & ~RST & ~CN[1] & CN[0] & b[3]) | (ST & ~RST & CN[1] & ~CN[0] & b[3]) | (ST & ~RST & CN[1] & CN[0] & ~b[3] & b[2]) | (ST & ~RST & ~CN[1] & CN[0] & b[2] & b[1] & b[0]) | (ST & ~RST & CN[1] & ~CN[0] & b[2] & b[1]) | (ST & ~RST & CN[0] & b[3] & ~b[2] & ~b[1] & b[0]) | (ST & ~RST & CN[0] & b[3] & b[1] & ~b[0]) | (ST & ~RST & CN[0] & b[3] & b[2] & ~b[0]);

endmodule
module NSL(

input ST,RST,[1:0]CN,[3:0]b,
output [3:0]NS
    );


    assign NS[0] = (ST & ~RST & CN[0] & ~b[0]);

    assign NS[1] = (ST & ~RST & CN[0] & b[1] & ~b[0]) | (ST & ~RST & CN[1] & ~CN[0] & ~b[1]) | (ST & ~RST & CN[1] & ~CN[0] & b[3] & b[2]) | (ST & ~RST & CN[1] & b[3] & b[2] & ~b[0]) | (ST & ~RST & CN[0] & ~b[3] & ~b[1] & b[0]) | (ST & ~RST & CN[0] & ~b[2] & ~b[1] & b[0]) | (ST & ~RST & ~CN[1] & CN[0] & b[3] & b[2] & b[0]);

    assign NS[2] = (ST & ~RST & ~CN[1] & CN[0] & ~b[2] & b[1] & b[0]) | (ST & ~RST & ~CN[1] & CN[0] & b[2] & ~b[1]) | (ST & ~RST & ~CN[1] & CN[0] & b[2] & ~b[0]) | (ST & ~RST & CN[1] & ~CN[0] & ~b[2] & b[1]) | (ST & ~RST & CN[1] & ~CN[0] & b[2] & ~b[1]) | (ST & ~RST & CN[1] & CN[0] & ~b[3] & b[2] & b[1] & b[0]) | (ST & ~RST & CN[1] & CN[0] & ~b[2] & ~b[1] & b[0]) | (ST & ~RST & ~CN[1] & CN[0] & b[3] & b[1] & b[0]) | (ST & ~RST & CN[1] & ~CN[0] & b[3] & b[1]) | (ST & ~RST & CN[1] & CN[0] & ~b[3] & ~b[2] & ~b[1]) | (ST & ~RST & CN[1] & ~b[2] & b[1] & ~b[0]) | (ST & ~RST & CN[0] & b[3] & b[2] & ~b[0]);

    assign NS[3] = (ST & ~RST & ~CN[1] & CN[0] & b[3]) | (ST & ~RST & CN[1] & ~CN[0] & b[3]) | (ST & ~RST & CN[1] & CN[0] & ~b[3] & b[2]) | (ST & ~RST & ~CN[1] & CN[0] & b[2] & b[1] & b[0]) | (ST & ~RST & CN[1] & ~CN[0] & b[2] & b[1]) | (ST & ~RST & CN[0] & b[3] & ~b[2] & ~b[1] & b[0]) | (ST & ~RST & CN[0] & b[3] & b[1] & ~b[0]) | (ST & ~RST & CN[0] & b[3] & b[2] & ~b[0]);

endmodule