data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_pad_attr.sv
1: b'%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_pad_attr.sv:6: Cannot find include file: prim_assert.sv\n`include "prim_assert.sv" \n         ^~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/ip/prim_generic/rtl,data/full_repos/permissive/509468557/prim_assert.sv\n             data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/ip/prim_generic/rtl,data/full_repos/permissive/509468557/prim_assert.sv.v\n             data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/ip/prim_generic/rtl,data/full_repos/permissive/509468557/prim_assert.sv.sv\n             prim_assert.sv\n             prim_assert.sv.v\n             prim_assert.sv.sv\n             obj_dir/prim_assert.sv\n             obj_dir/prim_assert.sv.v\n             obj_dir/prim_assert.sv.sv\n%Error: data/full_repos/permissive/509468557/generators/ibex/src/main/resources/vsrc/ibex/vendor/lowrisc_ip/ip/prim_generic/rtl/prim_generic_pad_attr.sv:9: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER\n  import prim_pad_wrapper_pkg::*;\n         ^~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n'
module prim_generic_pad_attr
  import prim_pad_wrapper_pkg::*;
#(
  parameter pad_type_e PadType = BidirStd
) (
  output pad_attr_t attr_warl_o
);

















  if (PadType == InputStd) begin : gen_input_only_warl
    always_comb begin : p_attr
      attr_warl_o = '0;
      attr_warl_o.invert = 1'b1;

  `ifndef VERILATOR
      attr_warl_o.pull_en = 1'b1;
      attr_warl_o.pull_select = 1'b1;
  `endif
    end
  end else if (PadType == BidirStd ||
               PadType == BidirTol ||
               PadType == BidirOd) begin : gen_bidir_warl
    always_comb begin : p_attr
      attr_warl_o = '0;
      attr_warl_o.invert = 1'b1;
      attr_warl_o.virt_od_en = 1'b1;
      attr_warl_o.keep_en = 1'b1;

  `ifndef VERILATOR
      attr_warl_o.pull_en = 1'b1;
      attr_warl_o.pull_select = 1'b1;

      attr_warl_o.drive_strength[0] = 1'b1;
  `endif
    end
  end else if (PadType == AnalogIn0) begin : gen_analog0_warl


    always_comb begin : p_attr
      attr_warl_o = '0;
    end
  end else begin : gen_invalid_config

    assert_static_in_generate_config_not_available
        assert_static_in_generate_config_not_available();
  end

endmodule
module prim_generic_pad_attr
  import prim_pad_wrapper_pkg::*;

#(
  parameter pad_type_e PadType = BidirStd
) (
  output pad_attr_t attr_warl_o
);

















  if (PadType == InputStd) begin : gen_input_only_warl
    always_comb begin : p_attr
      attr_warl_o = '0;
      attr_warl_o.invert = 1'b1;

  `ifndef VERILATOR
      attr_warl_o.pull_en = 1'b1;
      attr_warl_o.pull_select = 1'b1;
  `endif
    end
  end else if (PadType == BidirStd ||
               PadType == BidirTol ||
               PadType == BidirOd) begin : gen_bidir_warl
    always_comb begin : p_attr
      attr_warl_o = '0;
      attr_warl_o.invert = 1'b1;
      attr_warl_o.virt_od_en = 1'b1;
      attr_warl_o.keep_en = 1'b1;

  `ifndef VERILATOR
      attr_warl_o.pull_en = 1'b1;
      attr_warl_o.pull_select = 1'b1;

      attr_warl_o.drive_strength[0] = 1'b1;
  `endif
    end
  end else if (PadType == AnalogIn0) begin : gen_analog0_warl


    always_comb begin : p_attr
      attr_warl_o = '0;
    end
  end else begin : gen_invalid_config

    assert_static_in_generate_config_not_available
        assert_static_in_generate_config_not_available();
  end

endmodule