data/full_repos/permissive/464094143/sasebo_giii_aes/lattice_sense.v
1: b'%Error: data/full_repos/permissive/464094143/sasebo_giii_aes/lattice_sense.v:35: Cannot find file containing module: \'CARRY4\'\n    (* s = "true" *)   CARRY4 CARRY4_insti (\n                       ^~~~~~\n        ... Looked in:\n             data/full_repos/permissive/464094143/sasebo_giii_aes,data/full_repos/permissive/464094143/CARRY4\n             data/full_repos/permissive/464094143/sasebo_giii_aes,data/full_repos/permissive/464094143/CARRY4.v\n             data/full_repos/permissive/464094143/sasebo_giii_aes,data/full_repos/permissive/464094143/CARRY4.sv\n             CARRY4\n             CARRY4.v\n             CARRY4.sv\n             obj_dir/CARRY4\n             obj_dir/CARRY4.v\n             obj_dir/CARRY4.sv\n%Error: data/full_repos/permissive/464094143/sasebo_giii_aes/lattice_sense.v:46: Cannot find file containing module: \'CARRY4\'\n     (* s = "true" *)    CARRY4 CARRY4_insti (\n                         ^~~~~~\n%Error: data/full_repos/permissive/464094143/sasebo_giii_aes/lattice_sense.v:63: Cannot find file containing module: \'LDPE\'\n    (* s = "true" *)   LDPE #(\n                       ^~~~\n%Error: data/full_repos/permissive/464094143/sasebo_giii_aes/lattice_sense.v:98: Cannot find file containing module: \'LUT1\'\n    (* s = "true" *)           LUT1 #(\n                               ^~~~\n%Error: data/full_repos/permissive/464094143/sasebo_giii_aes/lattice_sense.v:106: Cannot find file containing module: \'LDCE\'\n     (* s = "true" *)   LDCE #(\n                        ^~~~\n%Error: data/full_repos/permissive/464094143/sasebo_giii_aes/lattice_sense.v:119: Cannot find file containing module: \'LUT1\'\n    (* s = "true" *) LUT1 #(\n                     ^~~~\n%Error: data/full_repos/permissive/464094143/sasebo_giii_aes/lattice_sense.v:125: Cannot find file containing module: \'LDCE\'\n    (* s = "true" *)   LDCE #(\n                       ^~~~\n%Error: Exiting due to 7 error(s)\n'
module tdc_top #(parameter size =32, parameter delsize=40)
(input clk,
output[(size*4)-1:0] out1
    );
    
  (* s = "true" *)   wire [size*4-1:0] co1;
  (* s = "true" *)   wire [size*4-1:0] do1;

  (* s = "true" *)   reg [size*4-1:0] regOut;
  (* s = "true" *)   wire [delsize-1:0] delLATCH, delLUT;     











	


 
 genvar i;
    generate
        for(i = 0; i < size; i = i+1) 
		  begin:gen_code_label1  
            
				
				if (i==0) begin
				(* s = "true" *)   CARRY4 CARRY4_insti (
            .CO(co1[(((i+1)*4)-1):(i*4)]),
            .O(),
            .CI(),
            .CYINIT(delLATCH[delsize-1]),
            .DI(4'h0),
            .S(4'hf)
            );
				end
				else begin
				
				 (* s = "true" *)    CARRY4 CARRY4_insti (
            .CO(co1[(((i+1)*4)-1):(i*4)]),
            .O(),
            .CI(co1[(i*4)-1]),
            .CYINIT(),
            .DI(4'h0),
            .S(4'hf)
            );
				end
       end  
    endgenerate 



  generate
        for(i = 0; i < size*4; i = i+1) 
		  begin:gen_code_label2
			 (* s = "true" *)   LDPE #(
            .INIT(1'b0)
            ) LDPE_insti (
            .Q(out1[i]),
            .PRE(1'b0),
            .D(co1[i]),
            .G(clk),
            .GE(1'b1)
            );
        end
    endgenerate














	 

	 

generate
        for(i = 0; i < delsize; i = i+1) 
		  begin:gen_code_label3
   
			if(i==0) begin
	
			 (* s = "true" *)           LUT1 #(
            .INIT(2'b10)
                ) LUT1_insti (
                .O(delLUT[i]),
                .I0(clk)
                );
 
 
				 (* s = "true" *)   LDCE #(
            .INIT(1'b0)
            ) LDCE_Delayi (
            .Q(delLATCH[i]),
            .CLR(1'b0),
            .D(delLUT[i]),
            .G(1'b1),
            .GE(1'b1)
            );
	
			end
			else begin
	
				(* s = "true" *) LUT1 #(
            .INIT(2'b10)
                ) LUT1_insti (
                .O(delLUT[i]),
                .I0(delLATCH[i-1])
                );
				(* s = "true" *)   LDCE #(
            .INIT(1'b0)
            ) LDCE_Delayi (
            .Q(delLATCH[i]),
            .CLR(1'b0),
            .D(delLUT[i]),
            .G(1'b1),
            .GE(1'b1)
            );	 
			end			 
        end
    endgenerate



    
endmodule
module tdc_top #(parameter size =32, parameter delsize=40)
(input clk,
output[(size*4)-1:0] out1
    );

    
  (* s = "true" *)   wire [size*4-1:0] co1;
  (* s = "true" *)   wire [size*4-1:0] do1;

  (* s = "true" *)   reg [size*4-1:0] regOut;
  (* s = "true" *)   wire [delsize-1:0] delLATCH, delLUT;     











	


 
 genvar i;
    generate
        for(i = 0; i < size; i = i+1) 
		  begin:gen_code_label1  
            
				
				if (i==0) begin
				(* s = "true" *)   CARRY4 CARRY4_insti (
            .CO(co1[(((i+1)*4)-1):(i*4)]),
            .O(),
            .CI(),
            .CYINIT(delLATCH[delsize-1]),
            .DI(4'h0),
            .S(4'hf)
            );
				end
				else begin
				
				 (* s = "true" *)    CARRY4 CARRY4_insti (
            .CO(co1[(((i+1)*4)-1):(i*4)]),
            .O(),
            .CI(co1[(i*4)-1]),
            .CYINIT(),
            .DI(4'h0),
            .S(4'hf)
            );
				end
       end  
    endgenerate 



  generate
        for(i = 0; i < size*4; i = i+1) 
		  begin:gen_code_label2
			 (* s = "true" *)   LDPE #(
            .INIT(1'b0)
            ) LDPE_insti (
            .Q(out1[i]),
            .PRE(1'b0),
            .D(co1[i]),
            .G(clk),
            .GE(1'b1)
            );
        end
    endgenerate














	 

	 

generate
        for(i = 0; i < delsize; i = i+1) 
		  begin:gen_code_label3
   
			if(i==0) begin
	
			 (* s = "true" *)           LUT1 #(
            .INIT(2'b10)
                ) LUT1_insti (
                .O(delLUT[i]),
                .I0(clk)
                );
 
 
				 (* s = "true" *)   LDCE #(
            .INIT(1'b0)
            ) LDCE_Delayi (
            .Q(delLATCH[i]),
            .CLR(1'b0),
            .D(delLUT[i]),
            .G(1'b1),
            .GE(1'b1)
            );
	
			end
			else begin
	
				(* s = "true" *) LUT1 #(
            .INIT(2'b10)
                ) LUT1_insti (
                .O(delLUT[i]),
                .I0(delLATCH[i-1])
                );
				(* s = "true" *)   LDCE #(
            .INIT(1'b0)
            ) LDCE_Delayi (
            .Q(delLATCH[i]),
            .CLR(1'b0),
            .D(delLUT[i]),
            .G(1'b1),
            .GE(1'b1)
            );	 
			end			 
        end
    endgenerate



    
endmodule