data/full_repos/permissive/440139665/src/key_expand.v
1: b"%Error: data/full_repos/permissive/440139665/src/key_expand.v:66: Cannot find file containing module: 'key_subword'\n    key_subword key_subword_i0 (.clk(clk), .key_in(key), .key_out(key_s0_reg), .rcon(8'h01));\n    ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/440139665/src,data/full_repos/permissive/440139665/key_subword\n             data/full_repos/permissive/440139665/src,data/full_repos/permissive/440139665/key_subword.v\n             data/full_repos/permissive/440139665/src,data/full_repos/permissive/440139665/key_subword.sv\n             key_subword\n             key_subword.v\n             key_subword.sv\n             obj_dir/key_subword\n             obj_dir/key_subword.v\n             obj_dir/key_subword.sv\n%Error: data/full_repos/permissive/440139665/src/key_expand.v:69: Cannot find file containing module: 'key_subword'\n    key_subword key_subword_i1 (.clk(clk), .key_in(key_s0_reg), .key_out(key_s1_reg), .rcon(8'h02));\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/440139665/src/key_expand.v:72: Cannot find file containing module: 'key_subword'\n    key_subword key_subword_i2 (.clk(clk), .key_in(key_s1_reg), .key_out(key_s2_reg), .rcon(8'h04));\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/440139665/src/key_expand.v:75: Cannot find file containing module: 'key_subword'\n    key_subword key_subword_i3 (.clk(clk), .key_in(key_s2_reg), .key_out(key_s3_reg), .rcon(8'h08));\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/440139665/src/key_expand.v:78: Cannot find file containing module: 'key_subword'\n    key_subword key_subword_i4 (.clk(clk), .key_in(key_s3_reg), .key_out(key_s4_reg), .rcon(8'h10));\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/440139665/src/key_expand.v:81: Cannot find file containing module: 'key_subword'\n    key_subword key_subword_i5 (.clk(clk), .key_in(key_s4_reg), .key_out(key_s5_reg), .rcon(8'h20));\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/440139665/src/key_expand.v:84: Cannot find file containing module: 'key_subword'\n    key_subword key_subword_i6 (.clk(clk), .key_in(key_s5_reg), .key_out(key_s6_reg), .rcon(8'h40));\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/440139665/src/key_expand.v:87: Cannot find file containing module: 'key_subword'\n    key_subword key_subword_i7 (.clk(clk), .key_in(key_s6_reg), .key_out(key_s7_reg), .rcon(8'h80));\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/440139665/src/key_expand.v:90: Cannot find file containing module: 'key_subword'\n    key_subword key_subword_i8 (.clk(clk), .key_in(key_s7_reg), .key_out(key_s8_reg), .rcon(8'h1b));\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/440139665/src/key_expand.v:93: Cannot find file containing module: 'key_subword'\n    key_subword key_subword_i9 (.clk(clk), .key_in(key_s8_reg), .key_out(key_s9_reg), .rcon(8'h36));\n    ^~~~~~~~~~~\n%Error: Exiting due to 10 error(s)\n"
module key_expand(
    input clk,
    input key_active,
    input [127:0] key,
    output [127:0] key_s,
    output [127:0] key_s0,
    output [127:0] key_s1,
    output [127:0] key_s2,
    output [127:0] key_s3,
    output [127:0] key_s4,
    output [127:0] key_s5,
    output [127:0] key_s6,
    output [127:0] key_s7,
    output [127:0] key_s8,
    output [127:0] key_s9
    );
	
    wire [127:0] key_s_reg;
    wire [127:0] key_s0_reg;
    wire [127:0] key_s1_reg;
    wire [127:0] key_s2_reg;
    wire [127:0] key_s3_reg;
    wire [127:0] key_s4_reg;
    wire [127:0] key_s5_reg;
    wire [127:0] key_s6_reg;
    wire [127:0] key_s7_reg;
    wire [127:0] key_s8_reg;
    wire [127:0] key_s9_reg;


    wire key_en_s0;
    wire key_en_s1;
    wire key_en_s2;
    wire key_en_s3;
    wire key_en_s4;
    wire key_en_s5;
    wire key_en_s6;
    wire key_en_s7;
    wire key_en_s8;
    wire key_en_s9;

    assign key_s = key;

    key_subword key_subword_i0 (.clk(clk), .key_in(key), .key_out(key_s0_reg), .rcon(8'h01));
    assign key_s0 = key_s0_reg;

    key_subword key_subword_i1 (.clk(clk), .key_in(key_s0_reg), .key_out(key_s1_reg), .rcon(8'h02));
    assign key_s1 = key_s1_reg;
    	
    key_subword key_subword_i2 (.clk(clk), .key_in(key_s1_reg), .key_out(key_s2_reg), .rcon(8'h04));
    assign key_s2 = key_s2_reg;
    	
    key_subword key_subword_i3 (.clk(clk), .key_in(key_s2_reg), .key_out(key_s3_reg), .rcon(8'h08));
    assign key_s3 = key_s3_reg;
    	
    key_subword key_subword_i4 (.clk(clk), .key_in(key_s3_reg), .key_out(key_s4_reg), .rcon(8'h10));
    assign key_s4 = key_s4_reg;
    	
    key_subword key_subword_i5 (.clk(clk), .key_in(key_s4_reg), .key_out(key_s5_reg), .rcon(8'h20));
    assign key_s5 = key_s5_reg;
    	
    key_subword key_subword_i6 (.clk(clk), .key_in(key_s5_reg), .key_out(key_s6_reg), .rcon(8'h40));
    assign key_s6 = key_s6_reg;
    	
    key_subword key_subword_i7 (.clk(clk), .key_in(key_s6_reg), .key_out(key_s7_reg), .rcon(8'h80));
    assign key_s7 = key_s7_reg;
    	
    key_subword key_subword_i8 (.clk(clk), .key_in(key_s7_reg), .key_out(key_s8_reg), .rcon(8'h1b));
    assign key_s8 = key_s8_reg;
    	
    key_subword key_subword_i9 (.clk(clk), .key_in(key_s8_reg), .key_out(key_s9_reg), .rcon(8'h36));
    assign key_s9 = key_s9_reg;
    	

	

endmodule
module key_expand(
    input clk,
    input key_active,
    input [127:0] key,
    output [127:0] key_s,
    output [127:0] key_s0,
    output [127:0] key_s1,
    output [127:0] key_s2,
    output [127:0] key_s3,
    output [127:0] key_s4,
    output [127:0] key_s5,
    output [127:0] key_s6,
    output [127:0] key_s7,
    output [127:0] key_s8,
    output [127:0] key_s9
    );

	
    wire [127:0] key_s_reg;
    wire [127:0] key_s0_reg;
    wire [127:0] key_s1_reg;
    wire [127:0] key_s2_reg;
    wire [127:0] key_s3_reg;
    wire [127:0] key_s4_reg;
    wire [127:0] key_s5_reg;
    wire [127:0] key_s6_reg;
    wire [127:0] key_s7_reg;
    wire [127:0] key_s8_reg;
    wire [127:0] key_s9_reg;


    wire key_en_s0;
    wire key_en_s1;
    wire key_en_s2;
    wire key_en_s3;
    wire key_en_s4;
    wire key_en_s5;
    wire key_en_s6;
    wire key_en_s7;
    wire key_en_s8;
    wire key_en_s9;

    assign key_s = key;

    key_subword key_subword_i0 (.clk(clk), .key_in(key), .key_out(key_s0_reg), .rcon(8'h01));
    assign key_s0 = key_s0_reg;

    key_subword key_subword_i1 (.clk(clk), .key_in(key_s0_reg), .key_out(key_s1_reg), .rcon(8'h02));
    assign key_s1 = key_s1_reg;
    	
    key_subword key_subword_i2 (.clk(clk), .key_in(key_s1_reg), .key_out(key_s2_reg), .rcon(8'h04));
    assign key_s2 = key_s2_reg;
    	
    key_subword key_subword_i3 (.clk(clk), .key_in(key_s2_reg), .key_out(key_s3_reg), .rcon(8'h08));
    assign key_s3 = key_s3_reg;
    	
    key_subword key_subword_i4 (.clk(clk), .key_in(key_s3_reg), .key_out(key_s4_reg), .rcon(8'h10));
    assign key_s4 = key_s4_reg;
    	
    key_subword key_subword_i5 (.clk(clk), .key_in(key_s4_reg), .key_out(key_s5_reg), .rcon(8'h20));
    assign key_s5 = key_s5_reg;
    	
    key_subword key_subword_i6 (.clk(clk), .key_in(key_s5_reg), .key_out(key_s6_reg), .rcon(8'h40));
    assign key_s6 = key_s6_reg;
    	
    key_subword key_subword_i7 (.clk(clk), .key_in(key_s6_reg), .key_out(key_s7_reg), .rcon(8'h80));
    assign key_s7 = key_s7_reg;
    	
    key_subword key_subword_i8 (.clk(clk), .key_in(key_s7_reg), .key_out(key_s8_reg), .rcon(8'h1b));
    assign key_s8 = key_s8_reg;
    	
    key_subword key_subword_i9 (.clk(clk), .key_in(key_s8_reg), .key_out(key_s9_reg), .rcon(8'h36));
    assign key_s9 = key_s9_reg;
    	

	

endmodule