data/full_repos/permissive/51625123/src/scores2.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/51625123/src/scores2.v:166: Multiple top level modules\n                                                                        : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                        : ... Top module \'scores\'\nmodule scores(clk, neglineclk, realx, realy, score_addA, score_addB, score_reset, scoreA, scoreB, score_scan);\n       ^~~~~~\n                                                                        : ... Top module \'mux2x4\'\nmodule mux2x4(sel, d0, d1, d2, d3, q);\n       ^~~~~~\n                                                                        : ... Top module \'counter_mod8\'\nmodule counter_mod8(c, r, q, cout);\n       ^~~~~~~~~~~~\n                                                                        : ... Top module \'counter_mod4\'\nmodule counter_mod4(c, r, q, cout);\n       ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/51625123/src/scores2.v:113: Cannot find file containing module: \'scorecopymux\'\nscorecopymux scorecopymux(score0, score1, score2, score3, textadr, textd);\n^~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/51625123/src,data/full_repos/permissive/51625123/scorecopymux\n             data/full_repos/permissive/51625123/src,data/full_repos/permissive/51625123/scorecopymux.v\n             data/full_repos/permissive/51625123/src,data/full_repos/permissive/51625123/scorecopymux.sv\n             scorecopymux\n             scorecopymux.v\n             scorecopymux.sv\n             obj_dir/scorecopymux\n             obj_dir/scorecopymux.v\n             obj_dir/scorecopymux.sv\n%Warning-WIDTH: data/full_repos/permissive/51625123/src/scores2.v:172: Logical Operator COND expects 1 bit on the Conditional Test, but Conditional Test\'s CONST \'2\'h1\' generates 2 bits.\n                                                                     : ... In instance mux2x4\n       2\'b01 ? d1 :\n             ^\n%Warning-WIDTH: data/full_repos/permissive/51625123/src/scores2.v:173: Logical Operator COND expects 1 bit on the Conditional Test, but Conditional Test\'s CONST \'2\'h2\' generates 2 bits.\n                                                                     : ... In instance mux2x4\n       2\'b10 ? d2 : d3;\n             ^\n%Error: Exiting due to 1 error(s), 3 warning(s)\n'
module counter_mod8(c, r, q, cout);
	input c, r;
	output [2:0] q;
	output reg cout;
	
	reg[2:0] ctval;
	assign q = ctval;
	always @(posedge c or posedge r) 
		if (r) 
			{cout, ctval} <= 0;
		else 
			{cout,ctval} <= ctval + 1'b1;
endmodule
module counter_mod8(c, r, q, cout);

	input c, r;
	output [2:0] q;
	output reg cout;
	
	reg[2:0] ctval;
	assign q = ctval;
	always @(posedge c or posedge r) 
		if (r) 
			{cout, ctval} <= 0;
		else 
			{cout,ctval} <= ctval + 1'b1;
endmodule