data/full_repos/permissive/472097485/Chu01/G8ter4Bit_03/TestG8ter4.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/472097485/Chu01/G8ter4Bit_03/TestG8ter4.v:19: Unsupported: Ignoring delay on this delayed statement.\n #1 a[0] = !a[0];\n ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/472097485/Chu01/G8ter4Bit_03/TestG8ter4.v:22: Unsupported: Ignoring delay on this delayed statement.\n #2 a[1] = !a[1];\n ^\n%Warning-STMTDLY: data/full_repos/permissive/472097485/Chu01/G8ter4Bit_03/TestG8ter4.v:25: Unsupported: Ignoring delay on this delayed statement.\n #4 a[2] = !a[2];\n ^\n%Warning-STMTDLY: data/full_repos/permissive/472097485/Chu01/G8ter4Bit_03/TestG8ter4.v:28: Unsupported: Ignoring delay on this delayed statement.\n #8 a[3] = !a[3];\n ^\n%Warning-STMTDLY: data/full_repos/permissive/472097485/Chu01/G8ter4Bit_03/TestG8ter4.v:31: Unsupported: Ignoring delay on this delayed statement.\n #16 b[0] = !b[0];\n ^\n%Warning-STMTDLY: data/full_repos/permissive/472097485/Chu01/G8ter4Bit_03/TestG8ter4.v:34: Unsupported: Ignoring delay on this delayed statement.\n #32 b[1] = !b[1];\n ^\n%Warning-STMTDLY: data/full_repos/permissive/472097485/Chu01/G8ter4Bit_03/TestG8ter4.v:37: Unsupported: Ignoring delay on this delayed statement.\n #64 b[2] = !b[2];\n ^\n%Warning-STMTDLY: data/full_repos/permissive/472097485/Chu01/G8ter4Bit_03/TestG8ter4.v:40: Unsupported: Ignoring delay on this delayed statement.\n #128 b[3] = !b[3];\n ^\n%Warning-STMTDLY: data/full_repos/permissive/472097485/Chu01/G8ter4Bit_03/TestG8ter4.v:49: Unsupported: Ignoring delay on this delayed statement.\n  #260;\n  ^\n%Error: data/full_repos/permissive/472097485/Chu01/G8ter4Bit_03/TestG8ter4.v:16: Cannot find file containing module: \'G8ter4\'\n G8ter4 uut ( .a(a), .b(b), .g(g) );\n ^~~~~~\n        ... Looked in:\n             data/full_repos/permissive/472097485/Chu01/G8ter4Bit_03,data/full_repos/permissive/472097485/G8ter4\n             data/full_repos/permissive/472097485/Chu01/G8ter4Bit_03,data/full_repos/permissive/472097485/G8ter4.v\n             data/full_repos/permissive/472097485/Chu01/G8ter4Bit_03,data/full_repos/permissive/472097485/G8ter4.sv\n             G8ter4\n             G8ter4.v\n             G8ter4.sv\n             obj_dir/G8ter4\n             obj_dir/G8ter4.v\n             obj_dir/G8ter4.sv\n%Error: Exiting due to 1 error(s), 9 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module TestG8ter4;


	reg [3:0] a;
	reg [3:0] b;


	wire g;


	G8ter4 uut ( .a(a), .b(b), .g(g) );

	always begin
	#1 a[0] = !a[0];
	end
	always begin
	#2 a[1] = !a[1];
	end
	always begin
	#4 a[2] = !a[2];
	end
	always begin
	#8 a[3] = !a[3];
	end
	always begin
	#16 b[0] = !b[0];
	end
	always begin
	#32 b[1] = !b[1];
	end
	always begin
	#64 b[2] = !b[2];
	end
	always begin
	#128 b[3] = !b[3];
	end

	initial begin

		a = 0;
		b = 0;


		#260;
        

		$stop;
	end
      
endmodule
module TestG8ter4;



	reg [3:0] a;
	reg [3:0] b;


	wire g;


	G8ter4 uut ( .a(a), .b(b), .g(g) );

	always begin
	#1 a[0] = !a[0];
	end
	always begin
	#2 a[1] = !a[1];
	end
	always begin
	#4 a[2] = !a[2];
	end
	always begin
	#8 a[3] = !a[3];
	end
	always begin
	#16 b[0] = !b[0];
	end
	always begin
	#32 b[1] = !b[1];
	end
	always begin
	#64 b[2] = !b[2];
	end
	always begin
	#128 b[3] = !b[3];
	end

	initial begin

		a = 0;
		b = 0;


		#260;
        

		$stop;
	end
      
endmodule