data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v
1: b'%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:23: Cannot find include file: genericIOSateliteEnv.v\n`include "genericIOSateliteEnv.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/429196919/FPGA,data/full_repos/permissive/429196919/genericIOSateliteEnv.v\n             data/full_repos/permissive/429196919/FPGA,data/full_repos/permissive/429196919/genericIOSateliteEnv.v.v\n             data/full_repos/permissive/429196919/FPGA,data/full_repos/permissive/429196919/genericIOSateliteEnv.v.sv\n             genericIOSateliteEnv.v\n             genericIOSateliteEnv.v.v\n             genericIOSateliteEnv.v.sv\n             obj_dir/genericIOSateliteEnv.v\n             obj_dir/genericIOSateliteEnv.v.v\n             obj_dir/genericIOSateliteEnv.v.sv\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:24: Cannot find include file: pulse/pulse.v\n`include "pulse/pulse.v" \n         ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:25: Cannot find include file: pwm/pwm.v\n`include "pwm/pwm.v" \n         ^~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:26: Cannot find include file: latchReg/latchReg.v\n`include "latchReg/latchReg.v" \n         ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:27: Cannot find include file: shiftReg/shiftReg.v\n`include "shiftReg/shiftReg.v" \n         ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:28: Cannot find include file: ws2811Decoder/ws2811Decoder.v\n`include "ws2811Decoder/ws2811Decoder.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:29: Cannot find include file: ws2811Encoder/ws2811Encoder.v\n`include "ws2811Encoder/ws2811Encoder.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:30: Cannot find include file: crc4/crc4.v\n`include "crc4/crc4.v" \n         ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:75: Define or directive not defined: \'`WATCHDOG_TIMEOUT_CYC\'\n reg[($clog2(`WATCHDOG_TIMEOUT_CYC))-1:0] watchdogReg = 0;\n             ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:75: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n reg[($clog2(`WATCHDOG_TIMEOUT_CYC))-1:0] watchdogReg = 0;\n                                  ^\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:101: Define or directive not defined: \'`CRC_WD\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n            ^~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:101: Define or directive not defined: \'`FEEDBACK_WD\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                      ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:101: Define or directive not defined: \'`COMMAND_WD\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                     ^~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:101: Define or directive not defined: \'`NO_ACTUATORS\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                   ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:101: syntax error, unexpected \'*\', expecting TYPE-IDENTIFIER\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                                ^\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:101: Define or directive not defined: \'`MODE_WD\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                                 ^~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:101: Define or directive not defined: \'`NO_ACTUATORS\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                                            ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:101: Define or directive not defined: \'`ACTUATOR_WD\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                                                          ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:101: Define or directive not defined: \'`SENSOR_WD\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                                                                         ^~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:106: Define or directive not defined: \'`CRC_WD\'\n   if(rxCnt>`CRC_WD + 1\'b1) begin        \n            ^~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:110: Define or directive not defined: \'`CRC_WD\'\n   else if(rxCnt == `CRC_WD + 1\'b1) begin      \n                    ^~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:115: Define or directive not defined: \'`CRC_WD\'\n   else if( rxCnt < `CRC_WD + 1\'b1 && rxCnt > 7\'b0) begin\n                    ^~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:132: Define or directive not defined: \'`CRC_WD\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n            ^~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:132: Define or directive not defined: \'`FEEDBACK_WD\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                      ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:132: Define or directive not defined: \'`COMMAND_WD\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                     ^~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:132: Define or directive not defined: \'`NO_ACTUATORS\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                   ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:132: syntax error, unexpected \'*\', expecting TYPE-IDENTIFIER\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                                ^\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:132: Define or directive not defined: \'`MODE_WD\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                                 ^~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:132: Define or directive not defined: \'`NO_ACTUATORS\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                                            ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:132: Define or directive not defined: \'`ACTUATOR_WD\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                                                          ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:132: Define or directive not defined: \'`SENSOR_WD\'\n   rxCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                                                                         ^~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:142: Define or directive not defined: \'`CRC_WD\'\n   txCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n            ^~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:142: Define or directive not defined: \'`FEEDBACK_WD\'\n   txCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                      ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:142: Define or directive not defined: \'`COMMAND_WD\'\n   txCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                     ^~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:142: Define or directive not defined: \'`NO_ACTUATORS\'\n   txCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                   ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:142: syntax error, unexpected \'*\', expecting TYPE-IDENTIFIER\n   txCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                                ^\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:142: Define or directive not defined: \'`MODE_WD\'\n   txCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                                 ^~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:142: Define or directive not defined: \'`NO_ACTUATORS\'\n   txCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                                            ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:142: Define or directive not defined: \'`ACTUATOR_WD\'\n   txCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                                                          ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:142: Define or directive not defined: \'`SENSOR_WD\'\n   txCnt <= `CRC_WD + `FEEDBACK_WD + `COMMAND_WD + `NO_ACTUATORS*`MODE_WD + `NO_ACTUATORS*`ACTUATOR_WD + `SENSOR_WD;\n                                                                                                         ^~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:149: Define or directive not defined: \'`CRC_WD\'\n   if(txCnt>`CRC_WD + 1\'b1) begin        \n            ^~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:153: Define or directive not defined: \'`CRC_WD\'\n   else if(txCnt == `CRC_WD + 1\'b1 && firstSatShift) begin  \n                    ^~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:158: Define or directive not defined: \'`CRC_WD\'\n   else if( txCnt < `CRC_WD + 1\'b1 && txCnt > 7\'b0) begin\n                    ^~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:174: Define or directive not defined: \'`WATCHDOG_TIMEOUT_CYC\'\n  else if(watchdogReg<`WATCHDOG_TIMEOUT_CYC)\n                      ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:174: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n  else if(watchdogReg<`WATCHDOG_TIMEOUT_CYC)\n                                           ^\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:176: Define or directive not defined: \'`WATCHDOG_TIMEOUT_CYC\'\n  else if(watchdogReg>=`WATCHDOG_TIMEOUT_CYC)\n                       ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:184: Define or directive not defined: \'`FEEDBACK_REMOTECRCERR\'\n    feedback[`FEEDBACK_REMOTECRCERR] <= 1\'b1;\n             ^~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:184: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n    feedback[`FEEDBACK_REMOTECRCERR] <= 1\'b1;\n                                   ^\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:186: Define or directive not defined: \'`FEEDBACK_REMOTECRCERR\'\n    feedback[`FEEDBACK_REMOTECRCERR] <= 1\'b0;\n             ^~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/429196919/FPGA/genericIOSatelite.v:186: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n    feedback[`FEEDBACK_REMOTECRCERR] <= 1\'b0;\n                                   ^\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
module actuatorPin (input serialIn,
					input serialClk,
					input enableShift,
					input wire[2:0] mode,
					input masterClk,
					output reg actuator,
					output serialOut);
	wire[7:0] actuatorData;
	wire PWM1_25KOutput;
	wire pwm100Output;
	wire pulseOutput;
	wire pulseInvOutput;
	reg prevEnableShift;
	reg[1:0] actuatorLoadDelay;
	wire actuatorLoad;

	shiftReg #(.WIDTH(8)) actuatorShift(.serialInput(serialIn), .clk(serialClk), .load(1'b0), .loaded(), .enableShift(enableShift), .masterClk(masterClk), .parallelInput(8'b0), .parallelOutput(actuatorData), .serialOutput(serialOut));
	pwm #(.PRESCALE(1)) actuatorPwm1_25K(.controlInput(actuatorData), .load(actuatorLoad), .masterClk(masterClk), .pwmOut(pwm1_25KOutput));
	pwm #(.PRESCALE(12)) actuatorPwm100(.controlInput(actuatorData), .load(actuatorLoad), .masterClk(masterClk), .pwmOut(pwm100Output));
	pulse actuatorPulse(.pulseLength(actuatorData), .trigger(actuatorLoad && (mode == `PULSE || mode == `PULSE_INV)), .masterClk(masterClk), .pulse(pulseOutput), .pulseInv(pulseInvOutput));

	always @ (posedge masterClk) begin
		prevEnableShift <= enableShift;
		if(!enableShift && prevEnableShift)
			actuatorLoadDelay <= 2'b0;
		else if(actuatorLoadDelay != 2'b11)
			actuatorLoadDelay <= actuatorLoadDelay + 1'b1;
	end
	assign actuatorLoad = actuatorLoadDelay[1] & actuatorLoadDelay[0];
	always @ (*) begin
		case (mode)
			`LOW : actuator <= 0;
			`HIGH : actuator<=1;
			`PWM1_25K : actuator<=pwm1_25KOutput;
			`PWM100 : actuator<=pwm100Output;
			`PULSE : actuator<=pulseOutput;
			`PULSE_INV : actuator<=pulseInvOutput;
			default : actuator<=0;
		endcase
	end
endmodule
module actuatorPin (input serialIn,
					input serialClk,
					input enableShift,
					input wire[2:0] mode,
					input masterClk,
					output reg actuator,
					output serialOut);

	wire[7:0] actuatorData;
	wire PWM1_25KOutput;
	wire pwm100Output;
	wire pulseOutput;
	wire pulseInvOutput;
	reg prevEnableShift;
	reg[1:0] actuatorLoadDelay;
	wire actuatorLoad;

	shiftReg #(.WIDTH(8)) actuatorShift(.serialInput(serialIn), .clk(serialClk), .load(1'b0), .loaded(), .enableShift(enableShift), .masterClk(masterClk), .parallelInput(8'b0), .parallelOutput(actuatorData), .serialOutput(serialOut));
	pwm #(.PRESCALE(1)) actuatorPwm1_25K(.controlInput(actuatorData), .load(actuatorLoad), .masterClk(masterClk), .pwmOut(pwm1_25KOutput));
	pwm #(.PRESCALE(12)) actuatorPwm100(.controlInput(actuatorData), .load(actuatorLoad), .masterClk(masterClk), .pwmOut(pwm100Output));
	pulse actuatorPulse(.pulseLength(actuatorData), .trigger(actuatorLoad && (mode == `PULSE || mode == `PULSE_INV)), .masterClk(masterClk), .pulse(pulseOutput), .pulseInv(pulseInvOutput));

	always @ (posedge masterClk) begin
		prevEnableShift <= enableShift;
		if(!enableShift && prevEnableShift)
			actuatorLoadDelay <= 2'b0;
		else if(actuatorLoadDelay != 2'b11)
			actuatorLoadDelay <= actuatorLoadDelay + 1'b1;
	end
	assign actuatorLoad = actuatorLoadDelay[1] & actuatorLoadDelay[0];
	always @ (*) begin
		case (mode)
			`LOW : actuator <= 0;
			`HIGH : actuator<=1;
			`PWM1_25K : actuator<=pwm1_25KOutput;
			`PWM100 : actuator<=pwm100Output;
			`PULSE : actuator<=pulseOutput;
			`PULSE_INV : actuator<=pulseInvOutput;
			default : actuator<=0;
		endcase
	end
endmodule