data/full_repos/permissive/433225833/Testbench/TCP_option_encoder_tb.v
1: b'%Error: data/full_repos/permissive/433225833/Testbench/TCP_option_encoder_tb.v:16: syntax error, unexpected \'@\'\n    @(negedge clk);\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/433225833/Testbench/TCP_option_encoder_tb.v:33: Unsupported: Ignoring delay on this delayed statement.\n    #40;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/433225833/Testbench/TCP_option_encoder_tb.v:41: Unsupported: Ignoring delay on this delayed statement.\n    #1 clk = ~clk;\n    ^\n%Error: data/full_repos/permissive/433225833/Testbench/TCP_option_encoder_tb.v:46: Unsupported or unknown PLI call: $monitor\n    $monitor("%3d\\t%h\\t%h\\t%h\\t%h\\t%h\\t%h\\t%h\\t%h\\t%h\\t%h\\t%h\\t%h\\t%h\\t%d", \n    ^~~~~~~~\n%Error: Exiting due to 2 error(s), 2 warning(s)\n'
module TCP_option_encoder_tb ();
  reg enable, clk, reset;
  reg [8:0] option_av;
    reg [15:0] mss;
    reg [7:0] scale_wnd;
    reg [2:0] sack_nbr;
      reg [63:0] sack_n0, sack_n1, sack_n2, sack_n3;
    reg [63:0] time_stp;
  
  wire [31:0] data_option;
  
  
  initial begin
    clk = 0;
    reset = 1;
    @(negedge clk);
    reset = 0;
    enable = 1;
    
    option_av = 9'b1_0011_1101;
    
    mss = 123;
    scale_wnd = 11;
    
    sack_nbr = 4;
    sack_n0 = 64'h1111_1111_1111_1111;
    sack_n1 = 64'h2222_2222_2222_2222;
    sack_n2 = 64'h3333_3333_3333_3333;
    sack_n3 = 64'h4444_4444_4444_4444;
    
    time_stp = 64'h1234_1234_1234_1234;
    
    #40;
    
    
    $finish;
  end
  
  
  always
    #1 clk = ~clk;
  
  
  initial begin
    $display("  T\ten\tclk\trst\topt_av\tmss\ts_wnd\tsack_n\ts0\t\t\ts1\t\t\ts2\t\t\ts3\t\t\tt_stp\t\t\td_opt\t\ts");
    $monitor("%3d\t%h\t%h\t%h\t%h\t%h\t%h\t%h\t%h\t%h\t%h\t%h\t%h\t%h\t%d", 
             $time, enable, clk, reset, option_av, mss, scale_wnd,
             sack_nbr, sack_n0, sack_n1, sack_n2, sack_n3,
             time_stp, data_option, dut.next_state);

  end
  
  TCP_option_encoder dut (.enable(enable), .clk(clk), .reset(reset), 
                          .option_av(option_av), .mss(mss), .scale_wnd(scale_wnd),
                          .sack_nbr(sack_nbr), .sack_n0(sack_n0), .sack_n1(sack_n1), 
                          .sack_n2(sack_n2), .sack_n3(sack_n3), .time_stp(time_stp), 
                          .data_option(data_option));
  
endmodule
module TCP_option_encoder_tb ();

  reg enable, clk, reset;
  reg [8:0] option_av;
    reg [15:0] mss;
    reg [7:0] scale_wnd;
    reg [2:0] sack_nbr;
      reg [63:0] sack_n0, sack_n1, sack_n2, sack_n3;
    reg [63:0] time_stp;
  
  wire [31:0] data_option;
  
  
  initial begin
    clk = 0;
    reset = 1;
    @(negedge clk);
    reset = 0;
    enable = 1;
    
    option_av = 9'b1_0011_1101;
    
    mss = 123;
    scale_wnd = 11;
    
    sack_nbr = 4;
    sack_n0 = 64'h1111_1111_1111_1111;
    sack_n1 = 64'h2222_2222_2222_2222;
    sack_n2 = 64'h3333_3333_3333_3333;
    sack_n3 = 64'h4444_4444_4444_4444;
    
    time_stp = 64'h1234_1234_1234_1234;
    
    #40;
    
    
    $finish;
  end
  
  
  always
    #1 clk = ~clk;
  
  
  initial begin
    $display("  T\ten\tclk\trst\topt_av\tmss\ts_wnd\tsack_n\ts0\t\t\ts1\t\t\ts2\t\t\ts3\t\t\tt_stp\t\t\td_opt\t\ts");
    $monitor("%3d\t%h\t%h\t%h\t%h\t%h\t%h\t%h\t%h\t%h\t%h\t%h\t%h\t%h\t%d", 
             $time, enable, clk, reset, option_av, mss, scale_wnd,
             sack_nbr, sack_n0, sack_n1, sack_n2, sack_n3,
             time_stp, data_option, dut.next_state);

  end
  
  TCP_option_encoder dut (.enable(enable), .clk(clk), .reset(reset), 
                          .option_av(option_av), .mss(mss), .scale_wnd(scale_wnd),
                          .sack_nbr(sack_nbr), .sack_n0(sack_n0), .sack_n1(sack_n1), 
                          .sack_n2(sack_n2), .sack_n3(sack_n3), .time_stp(time_stp), 
                          .data_option(data_option));
  
endmodule