data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu.v
1: b'%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu.v:45: Cannot find include file: openGFX430_defines.v\n`include "openGFX430_defines.v" \n         ^~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/531094269/verilog/rtl/src,data/full_repos/permissive/531094269/openGFX430_defines.v\n             data/full_repos/permissive/531094269/verilog/rtl/src,data/full_repos/permissive/531094269/openGFX430_defines.v.v\n             data/full_repos/permissive/531094269/verilog/rtl/src,data/full_repos/permissive/531094269/openGFX430_defines.v.sv\n             openGFX430_defines.v\n             openGFX430_defines.v.v\n             openGFX430_defines.v.sv\n             obj_dir/openGFX430_defines.v\n             obj_dir/openGFX430_defines.v.v\n             obj_dir/openGFX430_defines.v.sv\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu.v:227: Cannot find include file: openGFX430_undefines.v\n`include "openGFX430_undefines.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu.v:84: Define or directive not defined: \'`VRAM_MSB\'\noutput [`VRAM_MSB:0] vid_ram_addr_o;               \n        ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu.v:84: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\noutput [`VRAM_MSB:0] vid_ram_addr_o;               \n                 ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu.v:94: Define or directive not defined: \'`LPIX_MSB\'\ninput  [`LPIX_MSB:0] display_width_i;              \n        ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu.v:94: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\ninput  [`LPIX_MSB:0] display_width_i;              \n                 ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu.v:115: Define or directive not defined: \'`APIX_MSB\'\nwire   [`APIX_MSB:0] cfg_dst_px_addr;\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu.v:115: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nwire   [`APIX_MSB:0] cfg_dst_px_addr;\n                 ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu.v:121: Define or directive not defined: \'`LPIX_MSB\'\nwire   [`LPIX_MSB:0] cfg_rec_width;\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu.v:121: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nwire   [`LPIX_MSB:0] cfg_rec_width;\n                 ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu.v:122: Define or directive not defined: \'`LPIX_MSB\'\nwire   [`LPIX_MSB:0] cfg_rec_height;\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu.v:122: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nwire   [`LPIX_MSB:0] cfg_rec_height;\n                 ^\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu.v:123: Define or directive not defined: \'`APIX_MSB\'\nwire   [`APIX_MSB:0] cfg_src_px_addr;\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/531094269/verilog/rtl/src/ogfx_gpu.v:123: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\nwire   [`APIX_MSB:0] cfg_src_px_addr;\n                 ^\n%Error: Exiting due to 14 error(s)\n'
module  ogfx_gpu (


    gpu_cmd_done_evt_o,
    gpu_cmd_error_evt_o,
    gpu_dma_busy_o,
    gpu_get_data_o,

    vid_ram_addr_o,
    vid_ram_din_o,
    vid_ram_wen_o,
    vid_ram_cen_o,


    mclk,
    puc_rst,

    display_width_i,

    gfx_mode_i,

    gpu_data_i,
    gpu_data_avail_i,
    gpu_enable_i,

    vid_ram_dout_i,
    vid_ram_dout_rdy_nxt_i
);



output               gpu_cmd_done_evt_o;
output               gpu_cmd_error_evt_o;
output               gpu_dma_busy_o;
output               gpu_get_data_o;

output [`VRAM_MSB:0] vid_ram_addr_o;
output        [15:0] vid_ram_din_o;
output               vid_ram_wen_o;
output               vid_ram_cen_o;



input                mclk;
input                puc_rst;

input  [`LPIX_MSB:0] display_width_i;

input          [2:0] gfx_mode_i;

input         [15:0] gpu_data_i;
input                gpu_data_avail_i;
input                gpu_enable_i;

input         [15:0] vid_ram_dout_i;
input                vid_ram_dout_rdy_nxt_i;






wire                 exec_fill;
wire                 exec_copy;
wire                 exec_copy_trans;
wire                 trig_exec;

wire   [`APIX_MSB:0] cfg_dst_px_addr;
wire                 cfg_dst_cl_swp;
wire                 cfg_dst_x_swp;
wire                 cfg_dst_y_swp;
wire          [15:0] cfg_fill_color;
wire           [3:0] cfg_pix_op_sel;
wire   [`LPIX_MSB:0] cfg_rec_width;
wire   [`LPIX_MSB:0] cfg_rec_height;
wire   [`APIX_MSB:0] cfg_src_px_addr;
wire                 cfg_src_cl_swp;
wire                 cfg_src_x_swp;
wire                 cfg_src_y_swp;
wire          [15:0] cfg_transparent_color;

wire                 gpu_exec_done;






ogfx_gpu_reg ogfx_gpu_reg_inst (


    .gpu_cmd_done_evt_o      (gpu_cmd_done_evt_o    ),
    .gpu_cmd_error_evt_o     (gpu_cmd_error_evt_o   ),
    .gpu_get_data_o          (gpu_get_data_o        ),

    .exec_fill_o             (exec_fill             ),
    .exec_copy_o             (exec_copy             ),
    .exec_copy_trans_o       (exec_copy_trans       ),
    .trig_exec_o             (trig_exec             ),

    .cfg_dst_px_addr_o       (cfg_dst_px_addr       ),
    .cfg_dst_cl_swp_o        (cfg_dst_cl_swp        ),
    .cfg_dst_x_swp_o         (cfg_dst_x_swp         ),
    .cfg_dst_y_swp_o         (cfg_dst_y_swp         ),
    .cfg_fill_color_o        (cfg_fill_color        ),
    .cfg_pix_op_sel_o        (cfg_pix_op_sel        ),
    .cfg_rec_width_o         (cfg_rec_width         ),
    .cfg_rec_height_o        (cfg_rec_height        ),
    .cfg_src_px_addr_o       (cfg_src_px_addr       ),
    .cfg_src_cl_swp_o        (cfg_src_cl_swp        ),
    .cfg_src_x_swp_o         (cfg_src_x_swp         ),
    .cfg_src_y_swp_o         (cfg_src_y_swp         ),
    .cfg_transparent_color_o (cfg_transparent_color ),



    .mclk                    (mclk                  ),
    .puc_rst                 (puc_rst               ),

    .gpu_data_i              (gpu_data_i            ),
    .gpu_data_avail_i        (gpu_data_avail_i      ),
    .gfx_mode_i              (gfx_mode_i            ),
    .gpu_enable_i            (gpu_enable_i          ),

    .gpu_exec_done_i         (gpu_exec_done         )
);





ogfx_gpu_dma ogfx_gpu_dma_inst (


    .gpu_exec_done_o         (gpu_exec_done         ),
    .gpu_dma_busy_o          (gpu_dma_busy_o        ),

    .vid_ram_addr_o          (vid_ram_addr_o        ),
    .vid_ram_din_o           (vid_ram_din_o         ),
    .vid_ram_wen_o           (vid_ram_wen_o         ),
    .vid_ram_cen_o           (vid_ram_cen_o         ),


    .mclk                    (mclk                  ),
    .puc_rst                 (puc_rst               ),

    .cfg_dst_px_addr_i       (cfg_dst_px_addr       ),
    .cfg_dst_cl_swp_i        (cfg_dst_cl_swp        ),
    .cfg_dst_x_swp_i         (cfg_dst_x_swp         ),
    .cfg_dst_y_swp_i         (cfg_dst_y_swp         ),
    .cfg_fill_color_i        (cfg_fill_color        ),
    .cfg_pix_op_sel_i        (cfg_pix_op_sel        ),
    .cfg_rec_width_i         (cfg_rec_width         ),
    .cfg_rec_height_i        (cfg_rec_height        ),
    .cfg_src_px_addr_i       (cfg_src_px_addr       ),
    .cfg_src_cl_swp_i        (cfg_src_cl_swp        ),
    .cfg_src_x_swp_i         (cfg_src_x_swp         ),
    .cfg_src_y_swp_i         (cfg_src_y_swp         ),
    .cfg_transparent_color_i (cfg_transparent_color ),

    .display_width_i         (display_width_i       ),

    .gfx_mode_i              (gfx_mode_i            ),

    .gpu_enable_i            (gpu_enable_i          ),

    .exec_fill_i             (exec_fill             ),
    .exec_copy_i             (exec_copy             ),
    .exec_copy_trans_i       (exec_copy_trans       ),
    .trig_exec_i             (trig_exec             ),

    .vid_ram_dout_i          (vid_ram_dout_i        ),
    .vid_ram_dout_rdy_nxt_i  (vid_ram_dout_rdy_nxt_i)
);

endmodule
module  ogfx_gpu (


    gpu_cmd_done_evt_o,
    gpu_cmd_error_evt_o,
    gpu_dma_busy_o,
    gpu_get_data_o,

    vid_ram_addr_o,
    vid_ram_din_o,
    vid_ram_wen_o,
    vid_ram_cen_o,


    mclk,
    puc_rst,

    display_width_i,

    gfx_mode_i,

    gpu_data_i,
    gpu_data_avail_i,
    gpu_enable_i,

    vid_ram_dout_i,
    vid_ram_dout_rdy_nxt_i
);




output               gpu_cmd_done_evt_o;
output               gpu_cmd_error_evt_o;
output               gpu_dma_busy_o;
output               gpu_get_data_o;

output [`VRAM_MSB:0] vid_ram_addr_o;
output        [15:0] vid_ram_din_o;
output               vid_ram_wen_o;
output               vid_ram_cen_o;



input                mclk;
input                puc_rst;

input  [`LPIX_MSB:0] display_width_i;

input          [2:0] gfx_mode_i;

input         [15:0] gpu_data_i;
input                gpu_data_avail_i;
input                gpu_enable_i;

input         [15:0] vid_ram_dout_i;
input                vid_ram_dout_rdy_nxt_i;






wire                 exec_fill;
wire                 exec_copy;
wire                 exec_copy_trans;
wire                 trig_exec;

wire   [`APIX_MSB:0] cfg_dst_px_addr;
wire                 cfg_dst_cl_swp;
wire                 cfg_dst_x_swp;
wire                 cfg_dst_y_swp;
wire          [15:0] cfg_fill_color;
wire           [3:0] cfg_pix_op_sel;
wire   [`LPIX_MSB:0] cfg_rec_width;
wire   [`LPIX_MSB:0] cfg_rec_height;
wire   [`APIX_MSB:0] cfg_src_px_addr;
wire                 cfg_src_cl_swp;
wire                 cfg_src_x_swp;
wire                 cfg_src_y_swp;
wire          [15:0] cfg_transparent_color;

wire                 gpu_exec_done;






ogfx_gpu_reg ogfx_gpu_reg_inst (


    .gpu_cmd_done_evt_o      (gpu_cmd_done_evt_o    ),
    .gpu_cmd_error_evt_o     (gpu_cmd_error_evt_o   ),
    .gpu_get_data_o          (gpu_get_data_o        ),

    .exec_fill_o             (exec_fill             ),
    .exec_copy_o             (exec_copy             ),
    .exec_copy_trans_o       (exec_copy_trans       ),
    .trig_exec_o             (trig_exec             ),

    .cfg_dst_px_addr_o       (cfg_dst_px_addr       ),
    .cfg_dst_cl_swp_o        (cfg_dst_cl_swp        ),
    .cfg_dst_x_swp_o         (cfg_dst_x_swp         ),
    .cfg_dst_y_swp_o         (cfg_dst_y_swp         ),
    .cfg_fill_color_o        (cfg_fill_color        ),
    .cfg_pix_op_sel_o        (cfg_pix_op_sel        ),
    .cfg_rec_width_o         (cfg_rec_width         ),
    .cfg_rec_height_o        (cfg_rec_height        ),
    .cfg_src_px_addr_o       (cfg_src_px_addr       ),
    .cfg_src_cl_swp_o        (cfg_src_cl_swp        ),
    .cfg_src_x_swp_o         (cfg_src_x_swp         ),
    .cfg_src_y_swp_o         (cfg_src_y_swp         ),
    .cfg_transparent_color_o (cfg_transparent_color ),



    .mclk                    (mclk                  ),
    .puc_rst                 (puc_rst               ),

    .gpu_data_i              (gpu_data_i            ),
    .gpu_data_avail_i        (gpu_data_avail_i      ),
    .gfx_mode_i              (gfx_mode_i            ),
    .gpu_enable_i            (gpu_enable_i          ),

    .gpu_exec_done_i         (gpu_exec_done         )
);





ogfx_gpu_dma ogfx_gpu_dma_inst (


    .gpu_exec_done_o         (gpu_exec_done         ),
    .gpu_dma_busy_o          (gpu_dma_busy_o        ),

    .vid_ram_addr_o          (vid_ram_addr_o        ),
    .vid_ram_din_o           (vid_ram_din_o         ),
    .vid_ram_wen_o           (vid_ram_wen_o         ),
    .vid_ram_cen_o           (vid_ram_cen_o         ),


    .mclk                    (mclk                  ),
    .puc_rst                 (puc_rst               ),

    .cfg_dst_px_addr_i       (cfg_dst_px_addr       ),
    .cfg_dst_cl_swp_i        (cfg_dst_cl_swp        ),
    .cfg_dst_x_swp_i         (cfg_dst_x_swp         ),
    .cfg_dst_y_swp_i         (cfg_dst_y_swp         ),
    .cfg_fill_color_i        (cfg_fill_color        ),
    .cfg_pix_op_sel_i        (cfg_pix_op_sel        ),
    .cfg_rec_width_i         (cfg_rec_width         ),
    .cfg_rec_height_i        (cfg_rec_height        ),
    .cfg_src_px_addr_i       (cfg_src_px_addr       ),
    .cfg_src_cl_swp_i        (cfg_src_cl_swp        ),
    .cfg_src_x_swp_i         (cfg_src_x_swp         ),
    .cfg_src_y_swp_i         (cfg_src_y_swp         ),
    .cfg_transparent_color_i (cfg_transparent_color ),

    .display_width_i         (display_width_i       ),

    .gfx_mode_i              (gfx_mode_i            ),

    .gpu_enable_i            (gpu_enable_i          ),

    .exec_fill_i             (exec_fill             ),
    .exec_copy_i             (exec_copy             ),
    .exec_copy_trans_i       (exec_copy_trans       ),
    .trig_exec_i             (trig_exec             ),

    .vid_ram_dout_i          (vid_ram_dout_i        ),
    .vid_ram_dout_rdy_nxt_i  (vid_ram_dout_rdy_nxt_i)
);

endmodule