data/full_repos/permissive/445695969/src_rtl/protected/dom1/skinny_sbox8_dom1_rapid_non_pipelined.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/445695969/src_rtl/protected/dom1/skinny_sbox8_dom1_rapid_non_pipelined.v:135: Multiple top level modules\n                                                                                                                          : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                                                          : ... Top module \'skinny_sbox8_dom1_rapid_non_pipelined\'\nmodule skinny_sbox8_dom1_rapid_non_pipelined ( \n       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n                                                                                                                          : ... Top module \'dom1_rpd_sbox8_cfn_fr_ne\'\nmodule dom1_rpd_sbox8_cfn_fr_ne ( \n       ^~~~~~~~~~~~~~~~~~~~~~~~\n                                                                                                                          : ... Top module \'and4_dom1_ne\'\nmodule and4_dom1_ne ( \n       ^~~~~~~~~~~~\n                                                                                                                          : ... Top module \'and3_dom1_ne\'\nmodule and3_dom1_ne ( \n       ^~~~~~~~~~~~\n                                                                                                                          : ... Top module \'and2_dom1_ne\'\nmodule and2_dom1_ne ( \n       ^~~~~~~~~~~~\n%Error: Exiting due to 1 warning(s)\n'
module rapid_a4 (

   a4,

   nb3, nb2, b1, nb0, r, clk
   ) ;
   (*equivalent_register_removal = "no" *)output [1:0] a4;
   (*equivalent_register_removal = "no" *)input [1:0] 	nb3, nb2, b1, nb0;
   (*equivalent_register_removal = "no" *)input [1:0] 	r;   
   (*equivalent_register_removal = "no" *)input 	clk;

   (*equivalent_register_removal = "no" *)wire [1:0] 	t0;
   (*equivalent_register_removal = "no" *)wire [1:0] 	t1;

   (*equivalent_register_removal = "no" *)and2_dom1 g0 (t0,nb3,nb2,r[0],clk);
   (*equivalent_register_removal = "no" *)and2_dom1 g1 (t1,nb0,nb3,r[1],clk);
   
   assign a4 = t0 ^ t1 ^ b1;
   
endmodule
module rapid_a4 (

   a4,

   nb3, nb2, b1, nb0, r, clk
   ) ;

   (*equivalent_register_removal = "no" *)output [1:0] a4;
   (*equivalent_register_removal = "no" *)input [1:0] 	nb3, nb2, b1, nb0;
   (*equivalent_register_removal = "no" *)input [1:0] 	r;   
   (*equivalent_register_removal = "no" *)input 	clk;

   (*equivalent_register_removal = "no" *)wire [1:0] 	t0;
   (*equivalent_register_removal = "no" *)wire [1:0] 	t1;

   (*equivalent_register_removal = "no" *)and2_dom1 g0 (t0,nb3,nb2,r[0],clk);
   (*equivalent_register_removal = "no" *)and2_dom1 g1 (t1,nb0,nb3,r[1],clk);
   
   assign a4 = t0 ^ t1 ^ b1;
   
endmodule