data/full_repos/permissive/46522718/KEY_MUX.v
1: b'%Warning-IMPLICIT: data/full_repos/permissive/46522718/KEY_MUX.v:92: Signal definition not found, creating implicitly: \'parity\'\n assign parity = register[1]; \n        ^~~~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Warning-IMPLICIT: data/full_repos/permissive/46522718/KEY_MUX.v:17: Signal definition not found, creating implicitly: \'parity_error\'\n ps keyboard(PS2_CLK, PS2_DAT, scan_code, parity_error, rdy);\n                                          ^~~~~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/46522718/KEY_MUX.v:17: Signal definition not found, creating implicitly: \'rdy\'\n ps keyboard(PS2_CLK, PS2_DAT, scan_code, parity_error, rdy);\n                                                        ^~~\n%Error: Exiting due to 3 warning(s)\n'
module Seg7Disp
(
	input [3:0]a,
	output reg [6:0]d
);

	always@(a)
	begin
		case(a)
			4'b0000: d <= 7'b1000000;
			4'b0001: d <= 7'b1111001;
			4'b0010: d <= 7'b0100100;
			4'b0011: d <= 7'b0110000;
			4'b0100: d <= 7'b0011001;
			4'b0101: d <= 7'b0010010;
			4'b0110: d <= 7'b0000010;
			4'b0111: d <= 7'b1111000;
			4'b1000: d <= 7'b0000000;
			4'b1001: d <= 7'b0011000;
			4'b1010: d <= 7'b0001000;
			4'b1011: d <= 7'b0000011;
			4'b1100: d <= 7'b0100111;
			4'b1101: d <= 7'b0100001;
			4'b1110: d <= 7'b0000100;
			4'b1111: d <= 7'b0001110;
		endcase
	end

endmodule
module Seg7Disp
(
	input [3:0]a,
	output reg [6:0]d
);


	always@(a)
	begin
		case(a)
			4'b0000: d <= 7'b1000000;
			4'b0001: d <= 7'b1111001;
			4'b0010: d <= 7'b0100100;
			4'b0011: d <= 7'b0110000;
			4'b0100: d <= 7'b0011001;
			4'b0101: d <= 7'b0010010;
			4'b0110: d <= 7'b0000010;
			4'b0111: d <= 7'b1111000;
			4'b1000: d <= 7'b0000000;
			4'b1001: d <= 7'b0011000;
			4'b1010: d <= 7'b0001000;
			4'b1011: d <= 7'b0000011;
			4'b1100: d <= 7'b0100111;
			4'b1101: d <= 7'b0100001;
			4'b1110: d <= 7'b0000100;
			4'b1111: d <= 7'b0001110;
		endcase
	end

endmodule