data/full_repos/permissive/491573622/ext.v
data/verilator_xmls/c3350680-52b5-4264-8262-1a013166a514.xml
module ext(
    input [15:0] imm16,
    input [1:0] ext_op,
    output reg [31:0] ext32
    );
    
    always@(*)
    begin
        case(ext_op)
            2'b00: ext32 = {{16{1'b0}}, imm16};
            2'b01: ext32 = {{16{imm16[15]}}, imm16};
            2'b10: ext32 = {imm16, {16{1'b0}}};
            default: ext32 = {{16{1'b0}}, imm16};
        endcase
    end
endmodule
module ext(
    input [15:0] imm16,
    input [1:0] ext_op,
    output reg [31:0] ext32
    );

    
    always@(*)
    begin
        case(ext_op)
            2'b00: ext32 = {{16{1'b0}}, imm16};
            2'b01: ext32 = {{16{imm16[15]}}, imm16};
            2'b10: ext32 = {imm16, {16{1'b0}}};
            default: ext32 = {{16{1'b0}}, imm16};
        endcase
    end
endmodule