data/full_repos/permissive/515624136/rtl/JCU.v
data/verilator_xmls/8ecfb8aa-6452-4e90-89e4-4fa4063f4676.xml
module JCU(


JCU_En,
JCU_Opcode_b3,


JCU_Mux_b_sel,
JCU_Mux_c_sel

);




input  JCU_En;
input  JCU_Opcode_b3;
output JCU_Mux_b_sel;
output JCU_Mux_c_sel;





assign JCU_Mux_b_sel = JCU_En&(~JCU_Opcode_b3);
assign JCU_Mux_c_sel = JCU_En;

endmodule
module JCU(


JCU_En,
JCU_Opcode_b3,


JCU_Mux_b_sel,
JCU_Mux_c_sel

);





input  JCU_En;
input  JCU_Opcode_b3;
output JCU_Mux_b_sel;
output JCU_Mux_c_sel;





assign JCU_Mux_b_sel = JCU_En&(~JCU_Opcode_b3);
assign JCU_Mux_c_sel = JCU_En;

endmodule