data/full_repos/permissive/476296842/rtl/core/ctrl.v
1: b'%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:8: Cannot find include file: rtl/core/define.v\n`include "rtl/core/define.v" \n         ^~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/476296842/rtl/core,data/full_repos/permissive/476296842/rtl/core/define.v\n             data/full_repos/permissive/476296842/rtl/core,data/full_repos/permissive/476296842/rtl/core/define.v.v\n             data/full_repos/permissive/476296842/rtl/core,data/full_repos/permissive/476296842/rtl/core/define.v.sv\n             rtl/core/define.v\n             rtl/core/define.v.v\n             rtl/core/define.v.sv\n             obj_dir/rtl/core/define.v\n             obj_dir/rtl/core/define.v.v\n             obj_dir/rtl/core/define.v.sv\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:20: Define or directive not defined: \'`inst_addr_bus\'\n    input wire [`inst_addr_bus]     ex_jump_flush_addr_i,\n                ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:20: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n    input wire [`inst_addr_bus]     ex_jump_flush_addr_i,\n                              ^\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:27: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input wire                      clint_irq_flush_req_i,\n    ^~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:30: syntax error, unexpected input, expecting IDENTIFIER or do or final\n    input wire                      jtag_halt_wait_req_i,\n    ^~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:32: syntax error, unexpected output, expecting IDENTIFIER or do or final\n    output wire [`hold_ctrl_bus]    hold_ctrl_o,\n    ^~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:32: Define or directive not defined: \'`hold_ctrl_bus\'\n    output wire [`hold_ctrl_bus]    hold_ctrl_o,\n                 ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:34: syntax error, unexpected output, expecting IDENTIFIER or \'=\' or do or final\n    output reg [`inst_addr_bus]     jump_addr_o\n    ^~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:34: Define or directive not defined: \'`inst_addr_bus\'\n    output reg [`inst_addr_bus]     jump_addr_o\n                ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:37: Define or directive not defined: \'`holdpip_bus\'\n    reg [`holdpip_bus] hold_pc;\n         ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:37: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n    reg [`holdpip_bus] hold_pc;\n                     ^\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:38: Define or directive not defined: \'`holdpip_bus\'\n    reg [`holdpip_bus] hold_if_id;\n         ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:38: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n    reg [`holdpip_bus] hold_if_id;\n                     ^\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:39: Define or directive not defined: \'`holdpip_bus\'\n    reg [`holdpip_bus] hold_id_ex;\n         ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:39: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n    reg [`holdpip_bus] hold_id_ex;\n                     ^\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:40: Define or directive not defined: \'`holdpip_bus\'\n    reg [`holdpip_bus] hold_ex_memwb;\n         ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:40: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n    reg [`holdpip_bus] hold_ex_memwb;\n                     ^\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:47: Define or directive not defined: \'`inst_addr_zero\'\n        jump_addr_o = `inst_addr_zero;\n                      ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:48: Define or directive not defined: \'`jump_disable\'\n        jump_flag_o = `jump_disable;\n                      ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:49: Define or directive not defined: \'`req_enable\'\n        if (mem_wb_wr_wait_req_i == `req_enable) begin\n                                    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:50: Define or directive not defined: \'`hold_wait\'\n            hold_pc = `hold_wait;\n                      ^~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:51: Define or directive not defined: \'`hold_wait\'\n            hold_if_id = `hold_wait;\n                         ^~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:52: Define or directive not defined: \'`hold_wait\'\n            hold_id_ex = `hold_wait;\n                         ^~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:53: Define or directive not defined: \'`hold_wait\'\n            hold_ex_memwb = `hold_wait;\n                            ^~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:54: Define or directive not defined: \'`req_enable\'\n        end else if (ex_multi_clock_wait_req_i == `req_enable) begin\n                                                  ^~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:55: Define or directive not defined: \'`hold_wait\'\n            hold_pc = `hold_wait;\n                      ^~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:56: Define or directive not defined: \'`hold_wait\'\n            hold_if_id = `hold_wait;\n                         ^~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:57: Define or directive not defined: \'`hold_wait\'\n            hold_id_ex = `hold_wait;\n                         ^~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:58: Define or directive not defined: \'`hold_flush\'\n            hold_ex_memwb = `hold_flush;\n                            ^~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:59: Define or directive not defined: \'`req_enable\'\n        end else if (ex_jump_flush_req_i == `req_enable) begin\n                                            ^~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:61: Define or directive not defined: \'`jump_enable\'\n            jump_flag_o = `jump_enable;\n                          ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:62: Define or directive not defined: \'`hold_wait\'\n            hold_pc = `hold_wait;\n                      ^~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:63: Define or directive not defined: \'`hold_flush\'\n            hold_if_id = `hold_flush;\n                         ^~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:64: Define or directive not defined: \'`hold_flush\'\n            hold_id_ex = `hold_flush;\n                         ^~~~~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:65: Define or directive not defined: \'`hold_no\'\n            hold_ex_memwb = `hold_no;  \n                            ^~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:72: Define or directive not defined: \'`hold_no\'\n            hold_pc = `hold_no;\n                      ^~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:73: Define or directive not defined: \'`hold_no\'\n            hold_if_id = `hold_no;\n                         ^~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:74: Define or directive not defined: \'`hold_no\'\n            hold_id_ex = `hold_no;\n                         ^~~~~~~~\n%Error: data/full_repos/permissive/476296842/rtl/core/ctrl.v:75: Define or directive not defined: \'`hold_no\'\n            hold_ex_memwb = `hold_no;\n                            ^~~~~~~~\n%Error: Exiting due to 39 error(s)\n'
module ctrl (


    input wire                      ex_multi_clock_wait_req_i,
    



    input wire                      ex_jump_flush_req_i,
    input wire [`inst_addr_bus]     ex_jump_flush_addr_i,



    input wire                      mem_wb_wr_wait_req_i,


    input wire                      clint_irq_flush_req_i,
    

    input wire                      jtag_halt_wait_req_i,
    
    output wire [`hold_ctrl_bus]    hold_ctrl_o,
    output reg                      jump_flag_o,
    output reg [`inst_addr_bus]     jump_addr_o
);

    reg [`holdpip_bus] hold_pc;
    reg [`holdpip_bus] hold_if_id;
    reg [`holdpip_bus] hold_id_ex;
    reg [`holdpip_bus] hold_ex_memwb;


    assign hold_ctrl_o = {hold_ex_memwb, hold_id_ex, hold_if_id, hold_pc};


    always @(*) begin
        jump_addr_o = `inst_addr_zero;
        jump_flag_o = `jump_disable;
        if (mem_wb_wr_wait_req_i == `req_enable) begin
            hold_pc = `hold_wait;
            hold_if_id = `hold_wait;
            hold_id_ex = `hold_wait;
            hold_ex_memwb = `hold_wait;
        end else if (ex_multi_clock_wait_req_i == `req_enable) begin
            hold_pc = `hold_wait;
            hold_if_id = `hold_wait;
            hold_id_ex = `hold_wait;
            hold_ex_memwb = `hold_flush;
        end else if (ex_jump_flush_req_i == `req_enable) begin
            jump_addr_o = ex_jump_flush_addr_i;
            jump_flag_o = `jump_enable;
            hold_pc = `hold_wait;
            hold_if_id = `hold_flush;
            hold_id_ex = `hold_flush;
            hold_ex_memwb = `hold_no;

        end else begin
            hold_pc = `hold_no;
            hold_if_id = `hold_no;
            hold_id_ex = `hold_no;
            hold_ex_memwb = `hold_no;
        end
    end
    
endmodule
module ctrl (


    input wire                      ex_multi_clock_wait_req_i,
    



    input wire                      ex_jump_flush_req_i,
    input wire [`inst_addr_bus]     ex_jump_flush_addr_i,



    input wire                      mem_wb_wr_wait_req_i,


    input wire                      clint_irq_flush_req_i,
    

    input wire                      jtag_halt_wait_req_i,
    
    output wire [`hold_ctrl_bus]    hold_ctrl_o,
    output reg                      jump_flag_o,
    output reg [`inst_addr_bus]     jump_addr_o
);


    reg [`holdpip_bus] hold_pc;
    reg [`holdpip_bus] hold_if_id;
    reg [`holdpip_bus] hold_id_ex;
    reg [`holdpip_bus] hold_ex_memwb;


    assign hold_ctrl_o = {hold_ex_memwb, hold_id_ex, hold_if_id, hold_pc};


    always @(*) begin
        jump_addr_o = `inst_addr_zero;
        jump_flag_o = `jump_disable;
        if (mem_wb_wr_wait_req_i == `req_enable) begin
            hold_pc = `hold_wait;
            hold_if_id = `hold_wait;
            hold_id_ex = `hold_wait;
            hold_ex_memwb = `hold_wait;
        end else if (ex_multi_clock_wait_req_i == `req_enable) begin
            hold_pc = `hold_wait;
            hold_if_id = `hold_wait;
            hold_id_ex = `hold_wait;
            hold_ex_memwb = `hold_flush;
        end else if (ex_jump_flush_req_i == `req_enable) begin
            jump_addr_o = ex_jump_flush_addr_i;
            jump_flag_o = `jump_enable;
            hold_pc = `hold_wait;
            hold_if_id = `hold_flush;
            hold_id_ex = `hold_flush;
            hold_ex_memwb = `hold_no;

        end else begin
            hold_pc = `hold_no;
            hold_if_id = `hold_no;
            hold_id_ex = `hold_no;
            hold_ex_memwb = `hold_no;
        end
    end
    
endmodule