data/full_repos/permissive/487368624/Lab M/LabM7.v
1: b'%Error: Cannot find file containing module: M,data/full_repos/permissive/487368624\n        ... Looked in:\n             data/full_repos/permissive/487368624/Lab/M,data/full_repos/permissive/487368624\n             data/full_repos/permissive/487368624/Lab/M,data/full_repos/permissive/487368624.v\n             data/full_repos/permissive/487368624/Lab/M,data/full_repos/permissive/487368624.sv\n             M,data/full_repos/permissive/487368624\n             M,data/full_repos/permissive/487368624.v\n             M,data/full_repos/permissive/487368624.sv\n             obj_dir/M,data/full_repos/permissive/487368624\n             obj_dir/M,data/full_repos/permissive/487368624.v\n             obj_dir/M,data/full_repos/permissive/487368624.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/487368624/Lab\n%Error: Cannot find file containing module: M/LabM7.v\n%Error: Exiting due to 3 error(s)\n'
module labM;
reg [31:0] PCin;
reg clk;
wire [31:0] ins, PCp4;
  
yIF myIF(ins, PCp4, PCin, clk);
    
initial
begin

    PCin = 16'h28;

    repeat (11)
    begin

        clk = 1; #1;

        clk = 0; #1;

        $display("instruction = %h", ins);

        PCin = PCp4;
    end
$finish;
end
endmodule
module labM;

reg [31:0] PCin;
reg clk;
wire [31:0] ins, PCp4;
  
yIF myIF(ins, PCp4, PCin, clk);
    
initial
begin

    PCin = 16'h28;

    repeat (11)
    begin

        clk = 1; #1;

        clk = 0; #1;

        $display("instruction = %h", ins);

        PCin = PCp4;
    end
$finish;
end
endmodule