data/full_repos/permissive/421048855/Circuits/Sequential Logic/Counters/Countbcd.v
1: b'%Error: Cannot find file containing module: Logic/Counters,data/full_repos/permissive/421048855\n        ... Looked in:\n             data/full_repos/permissive/421048855/Circuits/Sequential/Logic/Counters,data/full_repos/permissive/421048855\n             data/full_repos/permissive/421048855/Circuits/Sequential/Logic/Counters,data/full_repos/permissive/421048855.v\n             data/full_repos/permissive/421048855/Circuits/Sequential/Logic/Counters,data/full_repos/permissive/421048855.sv\n             Logic/Counters,data/full_repos/permissive/421048855\n             Logic/Counters,data/full_repos/permissive/421048855.v\n             Logic/Counters,data/full_repos/permissive/421048855.sv\n             obj_dir/Logic/Counters,data/full_repos/permissive/421048855\n             obj_dir/Logic/Counters,data/full_repos/permissive/421048855.v\n             obj_dir/Logic/Counters,data/full_repos/permissive/421048855.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/421048855/Circuits/Sequential\n%Error: Cannot find file containing module: Logic/Counters/Countbcd.v\n%Error: Exiting due to 3 error(s)\n'
module count10 (input clk, input enable, input reset, output reg [3:0] q);
    always @(posedge clk) begin
        if(reset) q <= 'd0; 
        else if(enable) begin
            if(q >= 'd9) q <= 'd0;
            else q <= q + 1;
        end
        else q <= q;
    end
endmodule
module count10 (input clk, input enable, input reset, output reg [3:0] q);

    always @(posedge clk) begin
        if(reset) q <= 'd0; 
        else if(enable) begin
            if(q >= 'd9) q <= 'd0;
            else q <= q + 1;
        end
        else q <= q;
    end
endmodule