data/full_repos/permissive/501791642/src/nco/step_size_rom.v
data/verilator_xmls/aee79985-5cf4-47e5-88aa-068db6d83753.xml
module step_size_rom (
	input CLK,
	input CE,
	input [6:0] A,
	output reg [15:0] D
);


   	reg [15:0] step_size_rom [127:0];
   
   	initial
		$readmemh("step_size_rom.mem", step_size_rom );

   	always @(posedge CLK)
    	if (CE)
        	 D <= step_size_rom[A];

endmodule
module step_size_rom (
	input CLK,
	input CE,
	input [6:0] A,
	output reg [15:0] D
);



   	reg [15:0] step_size_rom [127:0];
   
   	initial
		$readmemh("step_size_rom.mem", step_size_rom );

   	always @(posedge CLK)
    	if (CE)
        	 D <= step_size_rom[A];

endmodule