data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/rsinv_test/ippackage/ipsmacge/core/ipsmacge_pause.v
1: b"%Error: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/rsinv_test/ippackage/ipsmacge/core/ipsmacge_pause.v:76: Cannot find file containing module: 'fflopx'\nfflopx #(2) ffquaivld (txclk, txrst_, {ma_ipauvld, ma_ipauvld1},\n^~~~~~\n        ... Looked in:\n             data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/rsinv_test/ippackage/ipsmacge/core,data/full_repos/permissive/530013823/fflopx\n             data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/rsinv_test/ippackage/ipsmacge/core,data/full_repos/permissive/530013823/fflopx.v\n             data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/rsinv_test/ippackage/ipsmacge/core,data/full_repos/permissive/530013823/fflopx.sv\n             fflopx\n             fflopx.v\n             fflopx.sv\n             obj_dir/fflopx\n             obj_dir/fflopx.v\n             obj_dir/fflopx.sv\n%Error: data/full_repos/permissive/530013823/LuanVan-20210617T090538Z-001/LuanVan/rtl/rsinv_test/ippackage/ipsmacge/core/ipsmacge_pause.v:111: Cannot find file containing module: 'fflopx'\nfflopx #(2) ffpppauen (txclk, txrst_, {pause_en, pause_en1}, \n^~~~~~\n%Error: Exiting due to 2 error(s)\n"
module ipsmacge_pause
    (
     txrst_,
     txclk,

     ma_ipauvld,
     ma_ipauqua,

     pau_ival,
     
     pau_oen,
     pau_off,
     pau_trandis,

     iquanta,
     pause_en,
     
     upact,
     uppaudis
     );






input               txrst_;
input               txclk;


input               ma_ipauvld;
input [15:0]        ma_ipauqua;


input               pau_ival;

output              pau_oen;
output              pau_off;
output              pau_trandis;

input [15:0]        iquanta;
input               pause_en;

input               upact;
input               uppaudis;



wire                pau_oen;
reg [5:0]           cntbyte;
wire                pau_start;
wire                pau_stop;
wire                pause_en1;
wire                pause_en2;
reg                 pau_off;




wire   ma_ipauvld1, 
       ma_ipauvld2;

fflopx #(2) ffquaivld (txclk, txrst_, {ma_ipauvld, ma_ipauvld1},
                       {ma_ipauvld1, ma_ipauvld2});

wire   rcvquanvld;
assign rcvquanvld = ma_ipauvld1 & (~ma_ipauvld2);


always @(posedge txclk or negedge txrst_)
    begin
    if (!txrst_)       cntbyte <= 6'b0;
    else if (~upact)   cntbyte <= 6'b0;
    else if (uppaudis) cntbyte <= 6'b0;
    else if (pau_ival) cntbyte <= cntbyte + 1'b1;
    end

wire        qtumena;
assign      qtumena = (&cntbyte) & pau_ival;



reg [15:0]  rcvquata;

assign      pau_trandis = |rcvquata;

always @(posedge txclk or negedge txrst_)
    begin
    if (!txrst_)        rcvquata <= 16'b0;
    else if (~upact)    rcvquata <= 16'b0;
    else if (uppaudis)  rcvquata <= 16'b0;
    else if (rcvquanvld)rcvquata <= ma_ipauqua;
    else if (qtumena)   rcvquata <= pau_trandis ? (rcvquata - 1'b1) : 16'b0;
    end



fflopx #(2) ffpppauen (txclk, txrst_, {pause_en, pause_en1}, 
                       {pause_en1, pause_en2});

assign              pau_start = (~pause_en2) &   pause_en1;
assign              pau_stop  =   pause_en2  & (~pause_en1);

reg [15:0]  genquata;
wire        gensample;

always @(posedge txclk or negedge txrst_)
    begin
    if (!txrst_)        genquata <= 16'b0;
    else if (~upact)    genquata <= 16'b0;
    else if (~pause_en2)genquata <= 16'b0;
    else if (qtumena)   genquata <= gensample ? 16'b0 : genquata + 1'b1;
    end

assign      gensample  = qtumena & (genquata >= iquanta) & (|iquanta);

assign      pau_oen = (~uppaudis) & (gensample | pau_start | pau_stop);

always @(posedge txclk or negedge txrst_)
    begin
    if (!txrst_)        pau_off <= 1'b0;
    else if (!upact)    pau_off <= 1'b0;
    else if (pau_start) pau_off <= 1'b0;
    else if (pau_stop)  pau_off <= 1'b1;
    end

endmodule
module ipsmacge_pause
    (
     txrst_,
     txclk,

     ma_ipauvld,
     ma_ipauqua,

     pau_ival,
     
     pau_oen,
     pau_off,
     pau_trandis,

     iquanta,
     pause_en,
     
     upact,
     uppaudis
     );







input               txrst_;
input               txclk;


input               ma_ipauvld;
input [15:0]        ma_ipauqua;


input               pau_ival;

output              pau_oen;
output              pau_off;
output              pau_trandis;

input [15:0]        iquanta;
input               pause_en;

input               upact;
input               uppaudis;



wire                pau_oen;
reg [5:0]           cntbyte;
wire                pau_start;
wire                pau_stop;
wire                pause_en1;
wire                pause_en2;
reg                 pau_off;




wire   ma_ipauvld1, 
       ma_ipauvld2;

fflopx #(2) ffquaivld (txclk, txrst_, {ma_ipauvld, ma_ipauvld1},
                       {ma_ipauvld1, ma_ipauvld2});

wire   rcvquanvld;
assign rcvquanvld = ma_ipauvld1 & (~ma_ipauvld2);


always @(posedge txclk or negedge txrst_)
    begin
    if (!txrst_)       cntbyte <= 6'b0;
    else if (~upact)   cntbyte <= 6'b0;
    else if (uppaudis) cntbyte <= 6'b0;
    else if (pau_ival) cntbyte <= cntbyte + 1'b1;
    end

wire        qtumena;
assign      qtumena = (&cntbyte) & pau_ival;



reg [15:0]  rcvquata;

assign      pau_trandis = |rcvquata;

always @(posedge txclk or negedge txrst_)
    begin
    if (!txrst_)        rcvquata <= 16'b0;
    else if (~upact)    rcvquata <= 16'b0;
    else if (uppaudis)  rcvquata <= 16'b0;
    else if (rcvquanvld)rcvquata <= ma_ipauqua;
    else if (qtumena)   rcvquata <= pau_trandis ? (rcvquata - 1'b1) : 16'b0;
    end



fflopx #(2) ffpppauen (txclk, txrst_, {pause_en, pause_en1}, 
                       {pause_en1, pause_en2});

assign              pau_start = (~pause_en2) &   pause_en1;
assign              pau_stop  =   pause_en2  & (~pause_en1);

reg [15:0]  genquata;
wire        gensample;

always @(posedge txclk or negedge txrst_)
    begin
    if (!txrst_)        genquata <= 16'b0;
    else if (~upact)    genquata <= 16'b0;
    else if (~pause_en2)genquata <= 16'b0;
    else if (qtumena)   genquata <= gensample ? 16'b0 : genquata + 1'b1;
    end

assign      gensample  = qtumena & (genquata >= iquanta) & (|iquanta);

assign      pau_oen = (~uppaudis) & (gensample | pau_start | pau_stop);

always @(posedge txclk or negedge txrst_)
    begin
    if (!txrst_)        pau_off <= 1'b0;
    else if (!upact)    pau_off <= 1'b0;
    else if (pau_start) pau_off <= 1'b0;
    else if (pau_stop)  pau_off <= 1'b1;
    end

endmodule