data/full_repos/permissive/500128826/HDLBits/Circuits/Sequential Logic/Latches and Flip-Flops/ece241_2013_q7/top_module_tb.v
1: b'%Error: Cannot find file containing module: Logic/Latches\n        ... Looked in:\n             data/full_repos/permissive/500128826/HDLBits/Circuits/Sequential/Logic/Latches\n             data/full_repos/permissive/500128826/HDLBits/Circuits/Sequential/Logic/Latches.v\n             data/full_repos/permissive/500128826/HDLBits/Circuits/Sequential/Logic/Latches.sv\n             Logic/Latches\n             Logic/Latches.v\n             Logic/Latches.sv\n             obj_dir/Logic/Latches\n             obj_dir/Logic/Latches.v\n             obj_dir/Logic/Latches.sv\n%Error: Cannot find file containing module: and\n%Error: Cannot find file containing module: Flip-Flops/ece241_2013_q7,data/full_repos/permissive/500128826\n%Error: Cannot find file containing module: data/full_repos/permissive/500128826/HDLBits/Circuits/Sequential\n%Error: Cannot find file containing module: Flip-Flops/ece241_2013_q7/top_module_tb.v\n%Error: Exiting due to 5 error(s)\n'
module top_module_tb ();
  wire Q;

  reg  clk = 1'd0;
  reg  j = 1'd0;
  reg  k = 1'd0;

  localparam ITERATIONS = 60;

  always begin
    #1 clk = clk + 1;
  end

  always begin
    #3 j = j + 1;
  end

  always begin
    #5 k = k + 1;
  end

  top_module uut (
      .clk(clk),
      .j  (j),
      .k  (k),
      .Q  (Q)
  );

  initial begin
    $dumpfile("top_module_tb.vcd");
    $dumpvars(0, top_module_tb);

    #(ITERATIONS) $display("Done simulating.");
    $finish;
  end

endmodule
module top_module_tb ();

  wire Q;

  reg  clk = 1'd0;
  reg  j = 1'd0;
  reg  k = 1'd0;

  localparam ITERATIONS = 60;

  always begin
    #1 clk = clk + 1;
  end

  always begin
    #3 j = j + 1;
  end

  always begin
    #5 k = k + 1;
  end

  top_module uut (
      .clk(clk),
      .j  (j),
      .k  (k),
      .Q  (Q)
  );

  initial begin
    $dumpfile("top_module_tb.vcd");
    $dumpvars(0, top_module_tb);

    #(ITERATIONS) $display("Done simulating.");
    $finish;
  end

endmodule