data/full_repos/permissive/458134463/Modules/or_32bit_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/458134463/Modules/or_32bit_tb.v:17: Unsupported: Ignoring delay on this delayed statement.\n#20 value1   = 32\'hFFFF0000; \n^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/458134463/Modules/or_32bit_tb.v:20: Unsupported: Ignoring delay on this delayed statement.\n#20 value1   = 32\'h0F0F0F0F; \n^\n%Warning-STMTDLY: data/full_repos/permissive/458134463/Modules/or_32bit_tb.v:23: Unsupported: Ignoring delay on this delayed statement.\n#20 value1   = 32\'hAAAAAAAA; \n^\n%Error: data/full_repos/permissive/458134463/Modules/or_32bit_tb.v:28: Unsupported or unknown PLI call: $monitor\n   $monitor("\\nTime   : %1d\\nvalue1 : %32b (%8h) (%10d)\\nvalue2 : %32b (%8h) (%10d)\\nresult : %32b (%8h) (%10d)", \n   ^~~~~~~~\n%Error: Exiting due to 1 error(s), 3 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module or_32bit_tb();

reg [31:0] value1;
reg [31:0] value2;

wire [31:0] result;


or_32bit or32(value1, value2, result);


initial begin
        value1   = 32'hF000F000; 
	     value2   = 32'h0F001000; 
	 
#`DELAY value1   = 32'hFFFF0000; 
	     value2   = 32'h0000FFFF; 
 
#`DELAY value1   = 32'h0F0F0F0F; 
	     value2   = 32'h0A0A0A0A; 

#`DELAY value1   = 32'hAAAAAAAA; 
        value2   = 32'hFFFFFFFF;  
end

initial begin
   $monitor("\nTime   : %1d\nvalue1 : %32b (%8h) (%10d)\nvalue2 : %32b (%8h) (%10d)\nresult : %32b (%8h) (%10d)", 
	$time,
	value1, value1, value1,
	value2, value2, value2,
	result, result, result);
end


endmodule
module or_32bit_tb();


reg [31:0] value1;
reg [31:0] value2;

wire [31:0] result;


or_32bit or32(value1, value2, result);


initial begin
        value1   = 32'hF000F000; 
	     value2   = 32'h0F001000; 
	 
#`DELAY value1   = 32'hFFFF0000; 
	     value2   = 32'h0000FFFF; 
 
#`DELAY value1   = 32'h0F0F0F0F; 
	     value2   = 32'h0A0A0A0A; 

#`DELAY value1   = 32'hAAAAAAAA; 
        value2   = 32'hFFFFFFFF;  
end

initial begin
   $monitor("\nTime   : %1d\nvalue1 : %32b (%8h) (%10d)\nvalue2 : %32b (%8h) (%10d)\nresult : %32b (%8h) (%10d)", 
	$time,
	value1, value1, value1,
	value2, value2, value2,
	result, result, result);
end


endmodule