data/full_repos/permissive/519420376/RTL/Top_design.v
1: b"%Error: data/full_repos/permissive/519420376/RTL/Top_design.v:46: Cannot find file containing module: 'Vga_controller'\nVga_controller VGA\n^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/519420376/RTL,data/full_repos/permissive/519420376/Vga_controller\n             data/full_repos/permissive/519420376/RTL,data/full_repos/permissive/519420376/Vga_controller.v\n             data/full_repos/permissive/519420376/RTL,data/full_repos/permissive/519420376/Vga_controller.sv\n             Vga_controller\n             Vga_controller.v\n             Vga_controller.sv\n             obj_dir/Vga_controller\n             obj_dir/Vga_controller.v\n             obj_dir/Vga_controller.sv\n%Error: Exiting due to 1 error(s)\n"
module Top_design(
input i_clk , 
input i_rst_n  ,
input [`N_WIDTH-1:0] d_in ,  
output H_sync , 
output V_sync , 
output [`N_WIDTH-1:0] RGB_out
);

wire vid_on ;

reg [`N_WIDTH-1:0] o_RGB;
always @(posedge i_clk or negedge i_rst_n)
    begin 
      if (i_rst_n==1'b0)
           begin
              o_RGB <= 0;
              end
            else
          begin     
       o_RGB <= d_in ;
    end
 end    
Vga_controller VGA
  (.i_clk(i_clk) , 
   .i_rst_n(i_rst_n) , 
   .H_sync(H_sync) , 
   .V_sync(V_sync) , 
   .Vid_on(vid_on) ,  
   .pix_x() ,
   .pix_y());
  
 assign RGB_out   = vid_on? o_RGB:12'b0;
 



endmodule
module Top_design(
input i_clk , 
input i_rst_n  ,
input [`N_WIDTH-1:0] d_in ,  
output H_sync , 
output V_sync , 
output [`N_WIDTH-1:0] RGB_out
);


wire vid_on ;

reg [`N_WIDTH-1:0] o_RGB;
always @(posedge i_clk or negedge i_rst_n)
    begin 
      if (i_rst_n==1'b0)
           begin
              o_RGB <= 0;
              end
            else
          begin     
       o_RGB <= d_in ;
    end
 end    
Vga_controller VGA
  (.i_clk(i_clk) , 
   .i_rst_n(i_rst_n) , 
   .H_sync(H_sync) , 
   .V_sync(V_sync) , 
   .Vid_on(vid_on) ,  
   .pix_x() ,
   .pix_y());
  
 assign RGB_out   = vid_on? o_RGB:12'b0;
 



endmodule