data/full_repos/permissive/472097485/Chu04/Counters_00/BoardTest.v
1: b"%Error: data/full_repos/permissive/472097485/Chu04/Counters_00/BoardTest.v:10: Cannot find file containing module: 'FrequencyDivider'\n FrequencyDivider #( 12000000, 24 ) frequencyDivider1 ( clk, ~bt[0], 1'b1, max_tick );\n ^~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/472097485/Chu04/Counters_00,data/full_repos/permissive/472097485/FrequencyDivider\n             data/full_repos/permissive/472097485/Chu04/Counters_00,data/full_repos/permissive/472097485/FrequencyDivider.v\n             data/full_repos/permissive/472097485/Chu04/Counters_00,data/full_repos/permissive/472097485/FrequencyDivider.sv\n             FrequencyDivider\n             FrequencyDivider.v\n             FrequencyDivider.sv\n             obj_dir/FrequencyDivider\n             obj_dir/FrequencyDivider.v\n             obj_dir/FrequencyDivider.sv\n%Error: data/full_repos/permissive/472097485/Chu04/Counters_00/BoardTest.v:12: Cannot find file containing module: 'ModMCounter'\n ModMCounter #( 256, 8 ) seconds ( clk, ~bt[0], max_tick, led[7:0] );\n ^~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module BoardTest( input wire clk, input wire [0:0] bt, output wire [7:0] led );

	wire max_tick;
	
	FrequencyDivider #( 12000000, 24 ) frequencyDivider1 ( clk, ~bt[0], 1'b1, max_tick );

	ModMCounter #( 256, 8 ) seconds ( clk, ~bt[0], max_tick, led[7:0] );

endmodule
module BoardTest( input wire clk, input wire [0:0] bt, output wire [7:0] led );


	wire max_tick;
	
	FrequencyDivider #( 12000000, 24 ) frequencyDivider1 ( clk, ~bt[0], 1'b1, max_tick );

	ModMCounter #( 256, 8 ) seconds ( clk, ~bt[0], max_tick, led[7:0] );

endmodule