data/full_repos/permissive/458737381/src/verilog-parser/tests/functions.v
data/verilator_xmls/b19a18dd-e557-4d89-a9d6-c5a8636cc0ef.xml
function  myfunction;
input a, b, c, d;
begin
  myfunction = ((a+b) + (c-d));
end
endfunction
function  myfunction;

input a, b, c, d;
begin
  myfunction = ((a+b) + (c-d));
end
endfunction