data/full_repos/permissive/423547971/College Coursework/Digital Design II Final Project/srl.v
1: b'%Error: Cannot find file containing module: Coursework/Digital\n        ... Looked in:\n             data/full_repos/permissive/423547971/College/Coursework/Digital\n             data/full_repos/permissive/423547971/College/Coursework/Digital.v\n             data/full_repos/permissive/423547971/College/Coursework/Digital.sv\n             Coursework/Digital\n             Coursework/Digital.v\n             Coursework/Digital.sv\n             obj_dir/Coursework/Digital\n             obj_dir/Coursework/Digital.v\n             obj_dir/Coursework/Digital.sv\n%Error: Cannot find file containing module: Design\n%Error: Cannot find file containing module: II\n%Error: Cannot find file containing module: Final\n%Error: Cannot find file containing module: Project,data/full_repos/permissive/423547971\n%Error: Cannot find file containing module: data/full_repos/permissive/423547971/College\n%Error: Cannot find file containing module: Project/srl.v\n%Error: Exiting due to 7 error(s)\n'
module srl(
	output Q_out,
	
	input SET,		
	input RESET
);

reg Q_out = 0 ;

wire SET, RESET;

always @(posedge SET or posedge RESET)
begin
	if(SET)
	begin
		Q_out <= 1;
	end
	
	else if(RESET)
	begin
		Q_out <= 0;
	end
end
endmodule
module srl(
	output Q_out,
	
	input SET,		
	input RESET
);


reg Q_out = 0 ;

wire SET, RESET;

always @(posedge SET or posedge RESET)
begin
	if(SET)
	begin
		Q_out <= 1;
	end
	
	else if(RESET)
	begin
		Q_out <= 0;
	end
end
endmodule