data/full_repos/permissive/505293718/AXI/verification/wrapper.v
1: b"%Error: data/full_repos/permissive/505293718/AXI/verification/wrapper.v:108: Cannot find file containing module: 'axi_protocol'\naxi_protocol #( .IDW(104), \n^~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/505293718/AXI/verification,data/full_repos/permissive/505293718/axi_protocol\n             data/full_repos/permissive/505293718/AXI/verification,data/full_repos/permissive/505293718/axi_protocol.v\n             data/full_repos/permissive/505293718/AXI/verification,data/full_repos/permissive/505293718/axi_protocol.sv\n             axi_protocol\n             axi_protocol.v\n             axi_protocol.sv\n             obj_dir/axi_protocol\n             obj_dir/axi_protocol.v\n             obj_dir/axi_protocol.sv\n%Error: data/full_repos/permissive/505293718/AXI/verification/wrapper.v:168: Cannot find file containing module: 'Write_Channel'\nWrite_Channel #( .IDW(104), \n^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/505293718/AXI/verification/wrapper.v:207: Cannot find file containing module: 'Read_Channel'\nRead_Channel #( .IDW(104), \n^~~~~~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module wrapper #(parameter IDW =  12,
    parameter AW  =  32,
    parameter DW  =  32 )
(

    input              clk,
    input              rst,

    input  [AW-1 : 0] awaddr_in,
    input  [7 : 0]    awlen_in,
    input  [2 : 0]    awsize_in,
    input  [1 : 0]    awburst_in,
    input             awvalid_in,


    input  [63 : 0]   wdata_in,
    input  [7 : 0]    wstrb_in,
    input             wvalid_in,
    input             wready_in,

    input             bready_in,


    input  [AW-1 : 0] araddr_in,
    input  [7 : 0]    arlen_in,
    input  [2 : 0]    arsize_in,
    input  [1 : 0]    arburst_in,
    input             arvalid_in,
    

    input  [63 : 0]   rdata_in,
    input             rvalid_in,
    input             rready_in

);


wire [AW-1 : 0] fsm_axi_awaddr;
wire [7 : 0]    fsm_axi_awlen;
wire [2 : 0]    fsm_axi_awsize;
wire [1 : 0]    fsm_axi_awburst;
wire            fsm_axi_awvalid;
wire            fsm_axi_awready;

wire [63 : 0]   fsm_axi_wdata;
wire [7 : 0]    fsm_axi_wstrb;
wire            fsm_axi_wlast;
wire            fsm_axi_wvalid;
wire            fsm_axi_wready;

wire [1 : 0]    fsm_axi_bresp;
wire            fsm_axi_bvalid;
wire            fsm_axi_bready;

wire [AW-1 : 0] fsm_axi_araddr;
wire [7 : 0]    fsm_axi_arlen;
wire [2 : 0]    fsm_axi_arsize;
wire [1 : 0]    fsm_axi_arburst;
wire            fsm_axi_arvalid;
wire            fsm_axi_arready;

wire [63 : 0]   fsm_axi_rdata;
wire            fsm_axi_rlast;
wire            fsm_axi_rvalid;
wire            fsm_axi_rready;


wire [AW-1 : 0] ila_axi_awaddr;
wire [7 : 0]    ila_axi_awlen;
wire [2 : 0]    ila_axi_awsize;
wire [1 : 0]    ila_axi_awburst;
wire            ila_axi_awvalid;
wire            ila_axi_awready;

wire [63 : 0]   ila_axi_wdata;
wire [7 : 0]    ila_axi_wstrb;
wire            ila_axi_wlast;
wire            ila_axi_wvalid;
wire            ila_axi_wready;

wire [1 : 0]    ila_axi_bresp;
wire            ila_axi_bvalid;
wire            ila_axi_bready;

wire [AW-1 : 0] ila_axi_araddr;
wire [7 : 0]    ila_axi_arlen;
wire [2 : 0]    ila_axi_arsize;
wire [1 : 0]    ila_axi_arburst;
wire            ila_axi_arvalid;
wire            ila_axi_arready;

wire [63 : 0]   ila_axi_rdata;
wire            ila_axi_rlast;
wire            ila_axi_rvalid;
wire            ila_axi_rready;


wire resetn;

assign resetn = ~rst;

axi_protocol #( .IDW(104), 
                .AW(32),
                .DW(32) )
fsm(
    .axi_aclk (clk),
    .rst (rst),
    
    .awaddr_in (awaddr_in), 
    .awburst_in (awburst_in), 
    .awlen_in (awlen_in), 
    .awsize_in (awsize_in), 
    .awvalid_in (awvalid_in),

    .axi_awaddr (fsm_axi_awaddr), 
    .axi_awlen (fsm_axi_awlen), 
    .axi_awsize (fsm_axi_awsize), 
    .axi_awburst (fsm_axi_awburst), 
    .axi_awvalid (fsm_axi_awvalid), 
    .axi_awready (fsm_axi_awready),

    .wdata_in (wdata_in), 
    .wstrb_in (wstrb_in), 
    .wvalid_in (wvalid_in), 
    .wready_in (wready_in),
    
    .axi_wdata (fsm_axi_wdata), 
    .axi_wlast (fsm_axi_wlast), 
    .axi_wstrb (fsm_axi_wstrb), 
    .axi_wvalid (fsm_axi_wvalid), 
    .axi_wready (fsm_axi_wready),

    .bready_in (bready_in), 
    
    .axi_bresp (fsm_axi_bresp), 
    .axi_bvalid (fsm_axi_bvalid), 
    .axi_bready (fsm_axi_bready),

    .araddr_in  (araddr_in),
    .arlen_in   (arlen_in),
    .arsize_in  (arsize_in),
    .arburst_in (arburst_in),
    .arvalid_in (arvalid_in),

    .axi_araddr (fsm_axi_araddr), 
    .axi_arlen  (fsm_axi_arlen),
    .axi_arsize (fsm_axi_arsize), 
    .axi_arburst (fsm_axi_arburst), 
    .axi_arvalid (fsm_axi_arvalid), 
    .axi_arready (fsm_axi_arready), 

    .rdata_in   (rdata_in),
    .rvalid_in  (rvalid_in),
    .rready_in  (rready_in),
    
    .axi_rdata  (fsm_axi_rdata), 
    .axi_rlast  (fsm_axi_rlast), 
    .axi_rvalid (fsm_axi_rvalid), 
    .axi_rready (fsm_axi_rready)
);

Write_Channel #( .IDW(104), 
                .AW(32),
                .DW(32) )
ila_w(
    .clk (clk),
    .resetn (resetn),
    
    .awaddr_in (awaddr_in), 
    .awburst_in (awburst_in), 
    .awlen_in (awlen_in), 
    .awsize_in (awsize_in), 
    .awvalid_in (awvalid_in),

    .axi_awaddr (ila_axi_awaddr), 
    .axi_awlen (ila_axi_awlen), 
    .axi_awsize (ila_axi_awsize), 
    .axi_awburst (ila_axi_awburst), 
    .axi_awvalid (ila_axi_awvalid), 
    .axi_awready (ila_axi_awready),

    .wdata_in (wdata_in), 
    .wstrb_in (wstrb_in), 
    .wvalid_in (wvalid_in), 
    .wready_in (wready_in),
    
    .axi_wdata (ila_axi_wdata), 
    .axi_wlast (ila_axi_wlast), 
    .axi_wstrb (ila_axi_wstrb), 
    .axi_wvalid (ila_axi_wvalid), 
    .axi_wready (ila_axi_wready),

    .bready_in (bready_in), 
    
    .axi_bresp (ila_axi_bresp), 
    .axi_bvalid (ila_axi_bvalid), 
    .axi_bready (ila_axi_bready)

);

Read_Channel #( .IDW(104), 
                .AW(32),
                .DW(32) )
ila_r(
    .clk (clk),
    .resetn (resetn),
    
    .araddr_in (araddr_in), 
    .arburst_in (arburst_in), 
    .arlen_in (arlen_in), 
    .arsize_in (arsize_in), 
    .arvalid_in (arvalid_in),

    .axi_araddr (ila_axi_araddr), 
    .axi_arlen (ila_axi_arlen), 
    .axi_arsize (ila_axi_arsize), 
    .axi_arburst (ila_axi_arburst), 
    .axi_arvalid (ila_axi_arvalid), 
    .axi_arready (ila_axi_arready),

    .rdata_in (rdata_in),
    .rvalid_in (rvalid_in), 
    .rready_in (rready_in),
    
    .axi_rdata (ila_axi_rdata), 
    .axi_rlast (ila_axi_rlast),
    .axi_rvalid (ila_axi_rvalid), 
    .axi_rready (ila_axi_rready)

);



endmodule
module wrapper #(parameter IDW =  12,
    parameter AW  =  32,
    parameter DW  =  32 )
(

    input              clk,
    input              rst,

    input  [AW-1 : 0] awaddr_in,
    input  [7 : 0]    awlen_in,
    input  [2 : 0]    awsize_in,
    input  [1 : 0]    awburst_in,
    input             awvalid_in,


    input  [63 : 0]   wdata_in,
    input  [7 : 0]    wstrb_in,
    input             wvalid_in,
    input             wready_in,

    input             bready_in,


    input  [AW-1 : 0] araddr_in,
    input  [7 : 0]    arlen_in,
    input  [2 : 0]    arsize_in,
    input  [1 : 0]    arburst_in,
    input             arvalid_in,
    

    input  [63 : 0]   rdata_in,
    input             rvalid_in,
    input             rready_in

);



wire [AW-1 : 0] fsm_axi_awaddr;
wire [7 : 0]    fsm_axi_awlen;
wire [2 : 0]    fsm_axi_awsize;
wire [1 : 0]    fsm_axi_awburst;
wire            fsm_axi_awvalid;
wire            fsm_axi_awready;

wire [63 : 0]   fsm_axi_wdata;
wire [7 : 0]    fsm_axi_wstrb;
wire            fsm_axi_wlast;
wire            fsm_axi_wvalid;
wire            fsm_axi_wready;

wire [1 : 0]    fsm_axi_bresp;
wire            fsm_axi_bvalid;
wire            fsm_axi_bready;

wire [AW-1 : 0] fsm_axi_araddr;
wire [7 : 0]    fsm_axi_arlen;
wire [2 : 0]    fsm_axi_arsize;
wire [1 : 0]    fsm_axi_arburst;
wire            fsm_axi_arvalid;
wire            fsm_axi_arready;

wire [63 : 0]   fsm_axi_rdata;
wire            fsm_axi_rlast;
wire            fsm_axi_rvalid;
wire            fsm_axi_rready;


wire [AW-1 : 0] ila_axi_awaddr;
wire [7 : 0]    ila_axi_awlen;
wire [2 : 0]    ila_axi_awsize;
wire [1 : 0]    ila_axi_awburst;
wire            ila_axi_awvalid;
wire            ila_axi_awready;

wire [63 : 0]   ila_axi_wdata;
wire [7 : 0]    ila_axi_wstrb;
wire            ila_axi_wlast;
wire            ila_axi_wvalid;
wire            ila_axi_wready;

wire [1 : 0]    ila_axi_bresp;
wire            ila_axi_bvalid;
wire            ila_axi_bready;

wire [AW-1 : 0] ila_axi_araddr;
wire [7 : 0]    ila_axi_arlen;
wire [2 : 0]    ila_axi_arsize;
wire [1 : 0]    ila_axi_arburst;
wire            ila_axi_arvalid;
wire            ila_axi_arready;

wire [63 : 0]   ila_axi_rdata;
wire            ila_axi_rlast;
wire            ila_axi_rvalid;
wire            ila_axi_rready;


wire resetn;

assign resetn = ~rst;

axi_protocol #( .IDW(104), 
                .AW(32),
                .DW(32) )
fsm(
    .axi_aclk (clk),
    .rst (rst),
    
    .awaddr_in (awaddr_in), 
    .awburst_in (awburst_in), 
    .awlen_in (awlen_in), 
    .awsize_in (awsize_in), 
    .awvalid_in (awvalid_in),

    .axi_awaddr (fsm_axi_awaddr), 
    .axi_awlen (fsm_axi_awlen), 
    .axi_awsize (fsm_axi_awsize), 
    .axi_awburst (fsm_axi_awburst), 
    .axi_awvalid (fsm_axi_awvalid), 
    .axi_awready (fsm_axi_awready),

    .wdata_in (wdata_in), 
    .wstrb_in (wstrb_in), 
    .wvalid_in (wvalid_in), 
    .wready_in (wready_in),
    
    .axi_wdata (fsm_axi_wdata), 
    .axi_wlast (fsm_axi_wlast), 
    .axi_wstrb (fsm_axi_wstrb), 
    .axi_wvalid (fsm_axi_wvalid), 
    .axi_wready (fsm_axi_wready),

    .bready_in (bready_in), 
    
    .axi_bresp (fsm_axi_bresp), 
    .axi_bvalid (fsm_axi_bvalid), 
    .axi_bready (fsm_axi_bready),

    .araddr_in  (araddr_in),
    .arlen_in   (arlen_in),
    .arsize_in  (arsize_in),
    .arburst_in (arburst_in),
    .arvalid_in (arvalid_in),

    .axi_araddr (fsm_axi_araddr), 
    .axi_arlen  (fsm_axi_arlen),
    .axi_arsize (fsm_axi_arsize), 
    .axi_arburst (fsm_axi_arburst), 
    .axi_arvalid (fsm_axi_arvalid), 
    .axi_arready (fsm_axi_arready), 

    .rdata_in   (rdata_in),
    .rvalid_in  (rvalid_in),
    .rready_in  (rready_in),
    
    .axi_rdata  (fsm_axi_rdata), 
    .axi_rlast  (fsm_axi_rlast), 
    .axi_rvalid (fsm_axi_rvalid), 
    .axi_rready (fsm_axi_rready)
);

Write_Channel #( .IDW(104), 
                .AW(32),
                .DW(32) )
ila_w(
    .clk (clk),
    .resetn (resetn),
    
    .awaddr_in (awaddr_in), 
    .awburst_in (awburst_in), 
    .awlen_in (awlen_in), 
    .awsize_in (awsize_in), 
    .awvalid_in (awvalid_in),

    .axi_awaddr (ila_axi_awaddr), 
    .axi_awlen (ila_axi_awlen), 
    .axi_awsize (ila_axi_awsize), 
    .axi_awburst (ila_axi_awburst), 
    .axi_awvalid (ila_axi_awvalid), 
    .axi_awready (ila_axi_awready),

    .wdata_in (wdata_in), 
    .wstrb_in (wstrb_in), 
    .wvalid_in (wvalid_in), 
    .wready_in (wready_in),
    
    .axi_wdata (ila_axi_wdata), 
    .axi_wlast (ila_axi_wlast), 
    .axi_wstrb (ila_axi_wstrb), 
    .axi_wvalid (ila_axi_wvalid), 
    .axi_wready (ila_axi_wready),

    .bready_in (bready_in), 
    
    .axi_bresp (ila_axi_bresp), 
    .axi_bvalid (ila_axi_bvalid), 
    .axi_bready (ila_axi_bready)

);

Read_Channel #( .IDW(104), 
                .AW(32),
                .DW(32) )
ila_r(
    .clk (clk),
    .resetn (resetn),
    
    .araddr_in (araddr_in), 
    .arburst_in (arburst_in), 
    .arlen_in (arlen_in), 
    .arsize_in (arsize_in), 
    .arvalid_in (arvalid_in),

    .axi_araddr (ila_axi_araddr), 
    .axi_arlen (ila_axi_arlen), 
    .axi_arsize (ila_axi_arsize), 
    .axi_arburst (ila_axi_arburst), 
    .axi_arvalid (ila_axi_arvalid), 
    .axi_arready (ila_axi_arready),

    .rdata_in (rdata_in),
    .rvalid_in (rvalid_in), 
    .rready_in (rready_in),
    
    .axi_rdata (ila_axi_rdata), 
    .axi_rlast (ila_axi_rlast),
    .axi_rvalid (ila_axi_rvalid), 
    .axi_rready (ila_axi_rready)

);



endmodule