data/full_repos/permissive/493847347/tests/fracturable_lut_test.v
1: b'%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:1: Cannot find include file: vcTest.v\n`include "vcTest.v" \n         ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/493847347/tests,data/full_repos/permissive/493847347/vcTest.v\n             data/full_repos/permissive/493847347/tests,data/full_repos/permissive/493847347/vcTest.v.v\n             data/full_repos/permissive/493847347/tests,data/full_repos/permissive/493847347/vcTest.v.sv\n             vcTest.v\n             vcTest.v.v\n             vcTest.v.sv\n             obj_dir/vcTest.v\n             obj_dir/vcTest.v.v\n             obj_dir/vcTest.v.sv\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:12: Define or directive not defined: \'`CLOCK_PERIOD\'\n  always #`CLOCK_PERIOD clk = ~clk;\n          ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:12: syntax error, unexpected \'=\'\n  always #`CLOCK_PERIOD clk = ~clk;\n                            ^\n%Warning-STMTDLY: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:12: Unsupported: Ignoring delay on this delayed statement.\n  always #`CLOCK_PERIOD clk = ~clk;\n         ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:35: Define or directive not defined: \'`VC_TEST_SUITE_BEGIN\'\n  `VC_TEST_SUITE_BEGIN( "FracturableLUT" )\n  ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:35: syntax error, unexpected \'(\'\n  `VC_TEST_SUITE_BEGIN( "FracturableLUT" )\n                        ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:46: Unsupported or unknown PLI call: $vcdpluson\n    $vcdpluson;\n    ^~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:47: Unsupported or unknown PLI call: $vcdplusoff\n    $vcdplusoff;\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:50: Define or directive not defined: \'`VC_TEST_CASE_BEGIN\'\n  `VC_TEST_CASE_BEGIN(0, "Fracturable LUT programming")\n  ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:50: syntax error, unexpected \'(\'\n  `VC_TEST_CASE_BEGIN(0, "Fracturable LUT programming")\n                      ^\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:53: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD reset = 1\'b1;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:54: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:55: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD reset = 1\'b0;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:56: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:59: syntax error, unexpected \'=\', expecting IDENTIFIER\n      sc_clk = 1\'b0;\n             ^\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:61: Define or directive not defined: \'`CLOCK_PERIOD\'\n      #`CLOCK_PERIOD\n       ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:63: Define or directive not defined: \'`CLOCK_PERIOD\'\n      #`CLOCK_PERIOD;\n       ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:66: syntax error, unexpected \'=\', expecting IDENTIFIER\n    sc_clk = 1\'b0;\n           ^\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:71: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:73: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:78: syntax error, unexpected $display\n      $display("FAIL: fracturing bit not correctly set");\n      ^~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:80: syntax error, unexpected $display\n      $display("OK  : fracturing bit corretly set");\n      ^~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:84: syntax error, unexpected $display\n      $display("FAIL: \\n\\tinput:\\t%b\\n\\tstored:\\t%b", mem, dut.data[N-1:0]);\n      ^~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:86: syntax error, unexpected $display\n      $display("OK  : input == output");\n      ^~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:91: Define or directive not defined: \'`VC_TEST_CASE_END\'\n  `VC_TEST_CASE_END\n  ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:93: Define or directive not defined: \'`VC_TEST_CASE_BEGIN\'\n  `VC_TEST_CASE_BEGIN(1, "Fracturable LUT read - Not fractured")\n  ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:96: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD reset = 1\'b1;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:97: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:98: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD reset = 1\'b0;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:99: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:102: syntax error, unexpected \'=\', expecting IDENTIFIER\n      sc_clk = 1\'b0;\n             ^\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:104: Define or directive not defined: \'`CLOCK_PERIOD\'\n      #`CLOCK_PERIOD\n       ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:106: Define or directive not defined: \'`CLOCK_PERIOD\'\n      #`CLOCK_PERIOD;\n       ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:109: syntax error, unexpected \'=\', expecting IDENTIFIER\n    sc_clk = 1\'b0;\n           ^\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:114: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:116: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:126: syntax error, unexpected \'=\', expecting IDENTIFIER\n      lut_select0 = i;\n                  ^\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:131: syntax error, unexpected $display\n        $display("FAIL: i: %2d; s0: %2d -> z0: %b (expected %b)",\n        ^~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:134: syntax error, unexpected $display\n        $display("OK  : i: %2d; s0: %2d -> z0: %b (expected %b)",\n        ^~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:139: syntax error, unexpected $display\n        $display("FAIL: i: %2d; s1: %2d -> z1: %b (expected %b)",\n        ^~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:142: syntax error, unexpected $display\n        $display("OK  : i: %2d; s1: %2d -> z1: %b (expected %b)",\n        ^~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:146: syntax error, unexpected \'#\'\n    #100;\n    ^\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:149: Define or directive not defined: \'`VC_TEST_CASE_END\'\n  `VC_TEST_CASE_END\n  ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:151: Define or directive not defined: \'`VC_TEST_CASE_BEGIN\'\n  `VC_TEST_CASE_BEGIN(2, "Fracturable LUT read - Fractured")\n  ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:154: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD reset = 1\'b1;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:155: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:156: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD reset = 1\'b0;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:157: Define or directive not defined: \'`CLOCK_PERIOD\'\n    #`CLOCK_PERIOD;\n     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:160: syntax error, unexpected \'=\', expecting IDENTIFIER\n      sc_clk = 1\'b0;\n             ^\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:162: Define or directive not defined: \'`CLOCK_PERIOD\'\n      #`CLOCK_PERIOD\n       ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/493847347/tests/fracturable_lut_test.v:164: Define or directive not defined: \'`CLOCK_PERIOD\'\n      #`CLOCK_PERIOD;\n       ^~~~~~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
module FracturableLUTTest;
  localparam K = 4;
  localparam N = 16;
  localparam HALF_N = N/2;

  reg reset;


  reg clk = 0;
  always #`CLOCK_PERIOD clk = ~clk;

  reg sc_clk;
  reg [K-1:0] lut_select0 = {K{1'b0}};
  reg [K-2:0] lut_select1 = {K{1'b0}};
  reg sc_data;
  reg sc_data_out;

  wire lut_out0;
  wire lut_out1;

  FracturableLUT#(K, N) dut
  (
    .reset(reset),
    .sc_clk(sc_clk),
    .sc_data(sc_data),
    .sc_data_out(),
    .s0(lut_select0),
    .s1(lut_select1),
    .z0(lut_out0),
    .z1(lut_out1)
  );

  `VC_TEST_SUITE_BEGIN( "FracturableLUT" )

  reg [N-1:0] mem;

  integer i;
  initial
  begin

    for (i = 0; i < N; i = i + 1) begin
      mem[i] = $random % 2;
    end
    $vcdpluson;
    $vcdplusoff;
  end

  `VC_TEST_CASE_BEGIN(0, "Fracturable LUT programming")
  begin

    #`CLOCK_PERIOD reset = 1'b1;
    #`CLOCK_PERIOD;
    #`CLOCK_PERIOD reset = 1'b0;
    #`CLOCK_PERIOD;

    for (i = 0; i < N; i = i + 1) begin
      sc_clk = 1'b0;
      sc_data = mem[i];
      #`CLOCK_PERIOD
      sc_clk = 1'b1;
      #`CLOCK_PERIOD;

    end
    sc_clk = 1'b0;


    sc_clk = 1'b0;
    sc_data = 1'b0;
    #`CLOCK_PERIOD;
    sc_clk = 1'b1;
    #`CLOCK_PERIOD;

    sc_clk = 1'b0;

    if (1'b0 != dut.fractured) begin
      $display("FAIL: fracturing bit not correctly set");
    end else begin
      $display("OK  : fracturing bit corretly set");
    end

    if (mem != dut.data[N-1:0]) begin
      $display("FAIL: \n\tinput:\t%b\n\tstored:\t%b", mem, dut.data[N-1:0]);
    end else begin
      $display("OK  : input == output");
    end


  end
  `VC_TEST_CASE_END

  `VC_TEST_CASE_BEGIN(1, "Fracturable LUT read - Not fractured")
  begin

    #`CLOCK_PERIOD reset = 1'b1;
    #`CLOCK_PERIOD;
    #`CLOCK_PERIOD reset = 1'b0;
    #`CLOCK_PERIOD;

    for (i = 0; i < N; i = i + 1) begin
      sc_clk = 1'b0;
      sc_data = mem[i];
      #`CLOCK_PERIOD
      sc_clk = 1'b1;
      #`CLOCK_PERIOD;

    end
    sc_clk = 1'b0;


    sc_clk = 1'b0;
    sc_data = 1'b0;
    #`CLOCK_PERIOD;
    sc_clk = 1'b1;
    #`CLOCK_PERIOD;

    sc_clk = 1'b0;


    $display("Programming: \n\tinput:\t\t%b\n\tstored:\t\t%b\n\tfractured:\t%b",
             mem, dut.data[N-1:0], dut.fractured);


    for (i = 0; i < N; i = i + 1) begin
      lut_select0 = i;
      lut_select1 = i;
      #1;

      if (lut_out0 != mem[i]) begin
        $display("FAIL: i: %2d; s0: %2d -> z0: %b (expected %b)",
                 i, lut_select0, lut_out0, mem[i]);
      end else begin
        $display("OK  : i: %2d; s0: %2d -> z0: %b (expected %b)",
                 i, lut_select0, lut_out0, mem[i]);
      end

      if (lut_out1 != 1'b0) begin
        $display("FAIL: i: %2d; s1: %2d -> z1: %b (expected %b)",
                 i, lut_select1, lut_out1, 1'b0);
      end else begin
        $display("OK  : i: %2d; s1: %2d -> z1: %b (expected %b)",
                 i, lut_select1, lut_out1, 1'b0);
      end
    end
    #100;

  end
  `VC_TEST_CASE_END

  `VC_TEST_CASE_BEGIN(2, "Fracturable LUT read - Fractured")
  begin

    #`CLOCK_PERIOD reset = 1'b1;
    #`CLOCK_PERIOD;
    #`CLOCK_PERIOD reset = 1'b0;
    #`CLOCK_PERIOD;

    for (i = 0; i < N; i = i + 1) begin
      sc_clk = 1'b0;
      sc_data = mem[i];
      #`CLOCK_PERIOD
      sc_clk = 1'b1;
      #`CLOCK_PERIOD;

    end
    sc_clk = 1'b0;


    sc_clk = 1'b0;
    sc_data = 1'b1;
    #`CLOCK_PERIOD;
    sc_clk = 1'b1;
    #`CLOCK_PERIOD;

    sc_clk = 1'b0;


    $display("Programming: \n\tinput:\t\t%b\n\tstored:\t\t%b\n\tfractured:\t%b",
             mem, dut.data[N-1:0], dut.fractured);

    $display("%b %b", dut.data1, dut.data0);

    for (i = 0; i < HALF_N; i = i + 1) begin
      lut_select0 = i;
      #1;

      if (lut_out0 != mem[i]) begin
        $display("FAIL: i: %2d; s0: %2d -> z0: %b (expected %b)",
                 i, lut_select0, lut_out0, mem[i]);
      end else begin
        $display("OK  : i: %2d; s0: %2d -> z0: %b (expected %b)",
                 i, lut_select0, lut_out0, mem[i]);
      end
    end

    for (i = 0; i < HALF_N; i = i + 1) begin
      lut_select1 = i;


      #1;
      if (lut_out1 != mem[i+HALF_N]) begin
        $display("FAIL: i: %2d; s1: %2d -> z1: %b (expected %b)",
                 i, lut_select1, lut_out1, mem[i+HALF_N]);
      end else begin
        $display("OK  : i: %2d; s1: %2d -> z1: %b (expected %b)",
                 i, lut_select1, lut_out1, mem[i+HALF_N]);
      end
    end
  end
  `VC_TEST_CASE_END

  `VC_TEST_SUITE_END( 3 )

endmodule
module FracturableLUTTest;

  localparam K = 4;
  localparam N = 16;
  localparam HALF_N = N/2;

  reg reset;


  reg clk = 0;
  always #`CLOCK_PERIOD clk = ~clk;

  reg sc_clk;
  reg [K-1:0] lut_select0 = {K{1'b0}};
  reg [K-2:0] lut_select1 = {K{1'b0}};
  reg sc_data;
  reg sc_data_out;

  wire lut_out0;
  wire lut_out1;

  FracturableLUT#(K, N) dut
  (
    .reset(reset),
    .sc_clk(sc_clk),
    .sc_data(sc_data),
    .sc_data_out(),
    .s0(lut_select0),
    .s1(lut_select1),
    .z0(lut_out0),
    .z1(lut_out1)
  );

  `VC_TEST_SUITE_BEGIN( "FracturableLUT" )

  reg [N-1:0] mem;

  integer i;
  initial
  begin

    for (i = 0; i < N; i = i + 1) begin
      mem[i] = $random % 2;
    end
    $vcdpluson;
    $vcdplusoff;
  end

  `VC_TEST_CASE_BEGIN(0, "Fracturable LUT programming")
  begin

    #`CLOCK_PERIOD reset = 1'b1;
    #`CLOCK_PERIOD;
    #`CLOCK_PERIOD reset = 1'b0;
    #`CLOCK_PERIOD;

    for (i = 0; i < N; i = i + 1) begin
      sc_clk = 1'b0;
      sc_data = mem[i];
      #`CLOCK_PERIOD
      sc_clk = 1'b1;
      #`CLOCK_PERIOD;

    end
    sc_clk = 1'b0;


    sc_clk = 1'b0;
    sc_data = 1'b0;
    #`CLOCK_PERIOD;
    sc_clk = 1'b1;
    #`CLOCK_PERIOD;

    sc_clk = 1'b0;

    if (1'b0 != dut.fractured) begin
      $display("FAIL: fracturing bit not correctly set");
    end else begin
      $display("OK  : fracturing bit corretly set");
    end

    if (mem != dut.data[N-1:0]) begin
      $display("FAIL: \n\tinput:\t%b\n\tstored:\t%b", mem, dut.data[N-1:0]);
    end else begin
      $display("OK  : input == output");
    end


  end
  `VC_TEST_CASE_END

  `VC_TEST_CASE_BEGIN(1, "Fracturable LUT read - Not fractured")
  begin

    #`CLOCK_PERIOD reset = 1'b1;
    #`CLOCK_PERIOD;
    #`CLOCK_PERIOD reset = 1'b0;
    #`CLOCK_PERIOD;

    for (i = 0; i < N; i = i + 1) begin
      sc_clk = 1'b0;
      sc_data = mem[i];
      #`CLOCK_PERIOD
      sc_clk = 1'b1;
      #`CLOCK_PERIOD;

    end
    sc_clk = 1'b0;


    sc_clk = 1'b0;
    sc_data = 1'b0;
    #`CLOCK_PERIOD;
    sc_clk = 1'b1;
    #`CLOCK_PERIOD;

    sc_clk = 1'b0;


    $display("Programming: \n\tinput:\t\t%b\n\tstored:\t\t%b\n\tfractured:\t%b",
             mem, dut.data[N-1:0], dut.fractured);


    for (i = 0; i < N; i = i + 1) begin
      lut_select0 = i;
      lut_select1 = i;
      #1;

      if (lut_out0 != mem[i]) begin
        $display("FAIL: i: %2d; s0: %2d -> z0: %b (expected %b)",
                 i, lut_select0, lut_out0, mem[i]);
      end else begin
        $display("OK  : i: %2d; s0: %2d -> z0: %b (expected %b)",
                 i, lut_select0, lut_out0, mem[i]);
      end

      if (lut_out1 != 1'b0) begin
        $display("FAIL: i: %2d; s1: %2d -> z1: %b (expected %b)",
                 i, lut_select1, lut_out1, 1'b0);
      end else begin
        $display("OK  : i: %2d; s1: %2d -> z1: %b (expected %b)",
                 i, lut_select1, lut_out1, 1'b0);
      end
    end
    #100;

  end
  `VC_TEST_CASE_END

  `VC_TEST_CASE_BEGIN(2, "Fracturable LUT read - Fractured")
  begin

    #`CLOCK_PERIOD reset = 1'b1;
    #`CLOCK_PERIOD;
    #`CLOCK_PERIOD reset = 1'b0;
    #`CLOCK_PERIOD;

    for (i = 0; i < N; i = i + 1) begin
      sc_clk = 1'b0;
      sc_data = mem[i];
      #`CLOCK_PERIOD
      sc_clk = 1'b1;
      #`CLOCK_PERIOD;

    end
    sc_clk = 1'b0;


    sc_clk = 1'b0;
    sc_data = 1'b1;
    #`CLOCK_PERIOD;
    sc_clk = 1'b1;
    #`CLOCK_PERIOD;

    sc_clk = 1'b0;


    $display("Programming: \n\tinput:\t\t%b\n\tstored:\t\t%b\n\tfractured:\t%b",
             mem, dut.data[N-1:0], dut.fractured);

    $display("%b %b", dut.data1, dut.data0);

    for (i = 0; i < HALF_N; i = i + 1) begin
      lut_select0 = i;
      #1;

      if (lut_out0 != mem[i]) begin
        $display("FAIL: i: %2d; s0: %2d -> z0: %b (expected %b)",
                 i, lut_select0, lut_out0, mem[i]);
      end else begin
        $display("OK  : i: %2d; s0: %2d -> z0: %b (expected %b)",
                 i, lut_select0, lut_out0, mem[i]);
      end
    end

    for (i = 0; i < HALF_N; i = i + 1) begin
      lut_select1 = i;


      #1;
      if (lut_out1 != mem[i+HALF_N]) begin
        $display("FAIL: i: %2d; s1: %2d -> z1: %b (expected %b)",
                 i, lut_select1, lut_out1, mem[i+HALF_N]);
      end else begin
        $display("OK  : i: %2d; s1: %2d -> z1: %b (expected %b)",
                 i, lut_select1, lut_out1, mem[i+HALF_N]);
      end
    end
  end
  `VC_TEST_CASE_END

  `VC_TEST_SUITE_END( 3 )

endmodule