data/full_repos/permissive/46343463/src/Multiplexer2Way.v
data/verilator_xmls/0bba6358-d0ac-4d95-bcd6-484f093d44b2.xml
module Multiplexer2Way #(parameter width=32) (
	input		[width-1:0]	data_1, data_2,
	input 					sel,
	output reg	[width-1:0]	data_o
);
	
	always @ (*)
	begin
		case (sel)
			1'b0	:	data_o <= data_1;
			1'b1	:	data_o <= data_2;
		endcase
	end

endmodule
module Multiplexer2Way #(parameter width=32) (
	input		[width-1:0]	data_1, data_2,
	input 					sel,
	output reg	[width-1:0]	data_o
);

	
	always @ (*)
	begin
		case (sel)
			1'b0	:	data_o <= data_1;
			1'b1	:	data_o <= data_2;
		endcase
	end

endmodule