data/full_repos/permissive/485721981/sources/synthesis/top.v
1: b'%Warning-IMPLICIT: data/full_repos/permissive/485721981/sources/synthesis/top.v:461: Signal definition not found, creating implicitly: \'wSineData\'\n                                                                                   : ... Suggested alternative: \'wSineDAta\'\n    assign ledRGB[7 : 0] = wSineData;\n                           ^~~~~~~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/485721981/sources/synthesis/top.v:223: Cannot find file containing module: \'IBUFG\'\n    IBUFG clk_inst (\n    ^~~~~\n        ... Looked in:\n             data/full_repos/permissive/485721981/sources/synthesis,data/full_repos/permissive/485721981/IBUFG\n             data/full_repos/permissive/485721981/sources/synthesis,data/full_repos/permissive/485721981/IBUFG.v\n             data/full_repos/permissive/485721981/sources/synthesis,data/full_repos/permissive/485721981/IBUFG.sv\n             IBUFG\n             IBUFG.v\n             IBUFG.sv\n             obj_dir/IBUFG\n             obj_dir/IBUFG.v\n             obj_dir/IBUFG.sv\n%Error: data/full_repos/permissive/485721981/sources/synthesis/top.v:233: Cannot find file containing module: \'debounce\'\n    debounce #(\n    ^~~~~~~~\n%Error: data/full_repos/permissive/485721981/sources/synthesis/top.v:246: Cannot find file containing module: \'debounce\'\n            debounce #(\n            ^~~~~~~~\n%Error: data/full_repos/permissive/485721981/sources/synthesis/top.v:261: Cannot find file containing module: \'debounce\'\n            debounce #(\n            ^~~~~~~~\n%Error: data/full_repos/permissive/485721981/sources/synthesis/top.v:279: Cannot find file containing module: \'UART_Rx\'\n    UART_Rx #(\n    ^~~~~~~\n%Error: data/full_repos/permissive/485721981/sources/synthesis/top.v:297: Cannot find file containing module: \'UART_Tx\'\n    UART_Tx #(\n    ^~~~~~~\n%Error: data/full_repos/permissive/485721981/sources/synthesis/top.v:315: Cannot find file containing module: \'UART_Mirror\'\n    UART_Mirror #(\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/485721981/sources/synthesis/top.v:348: Cannot find file containing module: \'UART_Hello\'\n    UART_Hello #(\n    ^~~~~~~~~~\n%Error: data/full_repos/permissive/485721981/sources/synthesis/top.v:373: Cannot find file containing module: \'sinegen\'\n    sinegen # (\n    ^~~~~~~\n%Error: data/full_repos/permissive/485721981/sources/synthesis/top.v:384: Cannot find file containing module: \'pwm\'\n    pwm # (\n    ^~~\n%Error: data/full_repos/permissive/485721981/sources/synthesis/top.v:399: Cannot find file containing module: \'blinker\'\n    blinker #(\n    ^~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/485721981/sources/synthesis/top.v:461: Operator ASSIGNW expects 8 bits on the Assign RHS, but Assign RHS\'s VARREF \'wSineData\' generates 1 bits.\n                                                                                : ... In instance top\n    assign ledRGB[7 : 0] = wSineData;\n                         ^\n%Error: Exiting due to 11 error(s), 2 warning(s)\n'
module top # (
        

        parameter C_SYSCLK_FRQ = 100_000_000,
        parameter C_DBC_INTERVAL = 10,
        parameter C_BLINK_PERIOD = 100,
        

        parameter C_UART_RATE = 115_200,

        parameter C_UART_DATA_WIDTH = 8,
        parameter C_UART_PARITY = 0,
        parameter C_UART_STOP = 1,


        parameter C_HELLO_MSG = "Hello World! ",
        parameter C_HELLO_MSG_LEN = 13,
                

        parameter C_REG_WIDTH = 4
    ) (

        input sysRstb,
        input sysClk,
                

        input [3:0] sw,
        input [3:0] btn,
        

        output [3:0] led,   
        output [11:0] ledRGB,
        

        output PWM_Out_p,
        output PWM_Out_n,
        

        output UART_Rx_cpy,
        output UART_Tx_cpy,
                

        input UART_Rx,
        output UART_Tx
    );
    




    

    localparam C_REG_COUNT_WIDTH = C_UART_DATA_WIDTH - C_REG_WIDTH;
    localparam C_REG_COUNT = 2**C_REG_COUNT_WIDTH;
        
    



    

    wire wSysRstb;
    wire wSysClk;
        

    wire [3:0] wSw;
    wire [3:0] wBtn;






    



    
    



    

    wire wMirBusyTx;
    wire wMirValidRx;
    wire wMirErrTx;
    wire wMirErrRx;
    

    wire wMirTxSend;
    wire wMirRxAck;
    wire [C_UART_DATA_WIDTH - 1 : 0] wMirTxData;
    

    wire wTxBusy;
    wire wTxErr;
    

    wire wRxValid;
    wire [C_UART_DATA_WIDTH - 1 : 0] wRxData;
    wire wRxErr;
    

    wire wHelloBusy;
    wire wHelloSend;
    wire [C_UART_DATA_WIDTH - 1 : 0] wHelloData;
        

    wire wRx;
    wire wTx;
    
    



    

    wire [7 : 0] wSineDAta;
    

    wire wPWM;
    

    wire wBlink;
    



    


    IBUFG clk_inst (
        .O(wSysClk),
        .I(sysClk)
    );
    


    genvar i;
    

    debounce #(
        .C_CLK_FRQ(C_SYSCLK_FRQ),
        .C_INTERVAL(C_DBC_INTERVAL)
    ) DBC_BTN (
        .rstb(1'b1),
        .clk(wSysClk),
        .in(sysRstb),
        .out(wSysRstb)
    );
    

    generate 
        for (i = 0; i < 4; i=i+1) begin
            debounce #(
                .C_CLK_FRQ(C_SYSCLK_FRQ),
                .C_INTERVAL(C_DBC_INTERVAL)
            ) DBC_BTN (
                .rstb(wSysRstb),
                .clk(wSysClk),
                .in(btn[i]),
                .out(wBtn[i])
            );
        end
    endgenerate
    

    generate 
        for (i = 0; i < 4; i=i+1) begin
            debounce #(
                .C_CLK_FRQ(C_SYSCLK_FRQ),
                .C_INTERVAL(C_DBC_INTERVAL)
            ) DBC_SW (
                .rstb(wSysRstb),
                .clk(wSysClk),
                .in(sw[i]),
                .out(wSw[i])
            );
        end
    endgenerate
    
    



    

    UART_Rx #(
        .C_CLK_FRQ(C_SYSCLK_FRQ),
        .C_UART_RATE(C_UART_RATE),
        .C_UART_DATA_WIDTH(C_UART_DATA_WIDTH),
        .C_UART_PARITY(C_UART_PARITY),
        .C_UART_STOP(C_UART_STOP)
    ) URx (
        .rstb(wSysRstb),
        .clk(wSysClk),
        
        .valid(wRxValid),
        .ack(wMirRxAck),
        .data(wRxData),
        .error(wRxErr),
        .rx(wRx)
    );    


    UART_Tx #(
        .C_CLK_FRQ(C_SYSCLK_FRQ),
        .C_UART_RATE(C_UART_RATE),
        .C_UART_DATA_WIDTH(C_UART_DATA_WIDTH),
        .C_UART_PARITY(C_UART_PARITY),
        .C_UART_STOP(C_UART_STOP)
    ) UTx (
        .rstb(wSysRstb),
        .clk(wSysClk),
        
        .busy(wTxBusy),
        .send(wMirTxSend),
        .data(wMirTxData),
        .error(wTxErr),
        .tx(wTx)
    );    


    UART_Mirror #(
        .C_UART_DATA_WIDTH(C_UART_DATA_WIDTH)
    ) UMir (
        .rstb(wSysRstb),
        .clk(wSysClk),
        .enable(wSw[0]),
        

        .validRx(),
        .ackRx(),
        .dataRx(),
        .errRx(),
        

        .busyTx(wMirBusy),
        .sendTx(wHelloSend),
        .dataTx(wHelloData),
        .errTx(wMirErrTx),
        

        .rxValid(wRxValid),
        .rxAck(wMirRxAck),
        .rxData(wRxData),
        .rxErr(wRxErr),
        

        .txBusy(wTxBusy),
        .txSend(wMirTxSend),
        .txData(wMirTxData),
        .txErr(wTxErr)
    ); 
    

    UART_Hello #(
        .C_UART_DATA_WIDTH(C_UART_DATA_WIDTH),
        .C_MSG(C_HELLO_MSG),
        .C_MSG_LEN(C_HELLO_MSG_LEN)
    ) UHello (
        .rstb(wSysRstb),
        .clk(wSysClk),
        

        .send(wBtn[0] && ~wHelloBusy),
        .busy(wHelloBusy),
                        

        .txBusy(wMirBusy),
        .txSend(wHelloSend),
        .txData(wHelloData),
        .txErr(wMirErrTx)
    );    
    




    

    sinegen # (
        .C_CLK_FRQ(C_SYSCLK_FRQ)
    ) SINE (
        .rstb(wSysRstb),
		.clk(wSysClk),
		.frq({16'b0000_0000_0010_0000}),
		.data(wSineData)
    );
    
    

    pwm # (
        .C_CLK_FRQ(C_SYSCLK_FRQ),
        .C_LEVEL_WIDTH(8)
    ) PWM (
        .rstb(wSysRstb),
		.clk(wSysClk),
		.level((wSw[1]) ? wSineData : wRxData),
		.out(wPWM)
    );
        
    



    
    blinker #(
        .C_CLK_FRQ(C_SYSCLK_FRQ),
        .C_PERIOD(C_BLINK_PERIOD)
    ) BLINK (
        .rstb(wSysRstb),
        .clk(wSysClk),
        .out(wBlink)
    );
      
    




    
    




    

    assign wRx = UART_Rx;
    assign UART_Tx = wTx;
    

    assign UART_Rx_cpy = wRx;
    assign UART_Tx_cpy = wTx;
    

    assign led[3] = wBlink;
    assign led[2] = wBtn[1];
    assign led[1] = wSw[1];
    assign led[0] = wSw[0];
  

    assign PWM_Out_p = wPWM;
    assign PWM_Out_n = 1'b0;
    




    assign ledRGB[7 : 0] = wSineData;
    


     





endmodule
module top # (
        

        parameter C_SYSCLK_FRQ = 100_000_000,
        parameter C_DBC_INTERVAL = 10,
        parameter C_BLINK_PERIOD = 100,
        

        parameter C_UART_RATE = 115_200,

        parameter C_UART_DATA_WIDTH = 8,
        parameter C_UART_PARITY = 0,
        parameter C_UART_STOP = 1,


        parameter C_HELLO_MSG = "Hello World! ",
        parameter C_HELLO_MSG_LEN = 13,
                

        parameter C_REG_WIDTH = 4
    ) (

        input sysRstb,
        input sysClk,
                

        input [3:0] sw,
        input [3:0] btn,
        

        output [3:0] led,   
        output [11:0] ledRGB,
        

        output PWM_Out_p,
        output PWM_Out_n,
        

        output UART_Rx_cpy,
        output UART_Tx_cpy,
                

        input UART_Rx,
        output UART_Tx
    );

    




    

    localparam C_REG_COUNT_WIDTH = C_UART_DATA_WIDTH - C_REG_WIDTH;
    localparam C_REG_COUNT = 2**C_REG_COUNT_WIDTH;
        
    



    

    wire wSysRstb;
    wire wSysClk;
        

    wire [3:0] wSw;
    wire [3:0] wBtn;






    



    
    



    

    wire wMirBusyTx;
    wire wMirValidRx;
    wire wMirErrTx;
    wire wMirErrRx;
    

    wire wMirTxSend;
    wire wMirRxAck;
    wire [C_UART_DATA_WIDTH - 1 : 0] wMirTxData;
    

    wire wTxBusy;
    wire wTxErr;
    

    wire wRxValid;
    wire [C_UART_DATA_WIDTH - 1 : 0] wRxData;
    wire wRxErr;
    

    wire wHelloBusy;
    wire wHelloSend;
    wire [C_UART_DATA_WIDTH - 1 : 0] wHelloData;
        

    wire wRx;
    wire wTx;
    
    



    

    wire [7 : 0] wSineDAta;
    

    wire wPWM;
    

    wire wBlink;
    



    


    IBUFG clk_inst (
        .O(wSysClk),
        .I(sysClk)
    );
    


    genvar i;
    

    debounce #(
        .C_CLK_FRQ(C_SYSCLK_FRQ),
        .C_INTERVAL(C_DBC_INTERVAL)
    ) DBC_BTN (
        .rstb(1'b1),
        .clk(wSysClk),
        .in(sysRstb),
        .out(wSysRstb)
    );
    

    generate 
        for (i = 0; i < 4; i=i+1) begin
            debounce #(
                .C_CLK_FRQ(C_SYSCLK_FRQ),
                .C_INTERVAL(C_DBC_INTERVAL)
            ) DBC_BTN (
                .rstb(wSysRstb),
                .clk(wSysClk),
                .in(btn[i]),
                .out(wBtn[i])
            );
        end
    endgenerate
    

    generate 
        for (i = 0; i < 4; i=i+1) begin
            debounce #(
                .C_CLK_FRQ(C_SYSCLK_FRQ),
                .C_INTERVAL(C_DBC_INTERVAL)
            ) DBC_SW (
                .rstb(wSysRstb),
                .clk(wSysClk),
                .in(sw[i]),
                .out(wSw[i])
            );
        end
    endgenerate
    
    



    

    UART_Rx #(
        .C_CLK_FRQ(C_SYSCLK_FRQ),
        .C_UART_RATE(C_UART_RATE),
        .C_UART_DATA_WIDTH(C_UART_DATA_WIDTH),
        .C_UART_PARITY(C_UART_PARITY),
        .C_UART_STOP(C_UART_STOP)
    ) URx (
        .rstb(wSysRstb),
        .clk(wSysClk),
        
        .valid(wRxValid),
        .ack(wMirRxAck),
        .data(wRxData),
        .error(wRxErr),
        .rx(wRx)
    );    


    UART_Tx #(
        .C_CLK_FRQ(C_SYSCLK_FRQ),
        .C_UART_RATE(C_UART_RATE),
        .C_UART_DATA_WIDTH(C_UART_DATA_WIDTH),
        .C_UART_PARITY(C_UART_PARITY),
        .C_UART_STOP(C_UART_STOP)
    ) UTx (
        .rstb(wSysRstb),
        .clk(wSysClk),
        
        .busy(wTxBusy),
        .send(wMirTxSend),
        .data(wMirTxData),
        .error(wTxErr),
        .tx(wTx)
    );    


    UART_Mirror #(
        .C_UART_DATA_WIDTH(C_UART_DATA_WIDTH)
    ) UMir (
        .rstb(wSysRstb),
        .clk(wSysClk),
        .enable(wSw[0]),
        

        .validRx(),
        .ackRx(),
        .dataRx(),
        .errRx(),
        

        .busyTx(wMirBusy),
        .sendTx(wHelloSend),
        .dataTx(wHelloData),
        .errTx(wMirErrTx),
        

        .rxValid(wRxValid),
        .rxAck(wMirRxAck),
        .rxData(wRxData),
        .rxErr(wRxErr),
        

        .txBusy(wTxBusy),
        .txSend(wMirTxSend),
        .txData(wMirTxData),
        .txErr(wTxErr)
    ); 
    

    UART_Hello #(
        .C_UART_DATA_WIDTH(C_UART_DATA_WIDTH),
        .C_MSG(C_HELLO_MSG),
        .C_MSG_LEN(C_HELLO_MSG_LEN)
    ) UHello (
        .rstb(wSysRstb),
        .clk(wSysClk),
        

        .send(wBtn[0] && ~wHelloBusy),
        .busy(wHelloBusy),
                        

        .txBusy(wMirBusy),
        .txSend(wHelloSend),
        .txData(wHelloData),
        .txErr(wMirErrTx)
    );    
    




    

    sinegen # (
        .C_CLK_FRQ(C_SYSCLK_FRQ)
    ) SINE (
        .rstb(wSysRstb),
		.clk(wSysClk),
		.frq({16'b0000_0000_0010_0000}),
		.data(wSineData)
    );
    
    

    pwm # (
        .C_CLK_FRQ(C_SYSCLK_FRQ),
        .C_LEVEL_WIDTH(8)
    ) PWM (
        .rstb(wSysRstb),
		.clk(wSysClk),
		.level((wSw[1]) ? wSineData : wRxData),
		.out(wPWM)
    );
        
    



    
    blinker #(
        .C_CLK_FRQ(C_SYSCLK_FRQ),
        .C_PERIOD(C_BLINK_PERIOD)
    ) BLINK (
        .rstb(wSysRstb),
        .clk(wSysClk),
        .out(wBlink)
    );
      
    




    
    




    

    assign wRx = UART_Rx;
    assign UART_Tx = wTx;
    

    assign UART_Rx_cpy = wRx;
    assign UART_Tx_cpy = wTx;
    

    assign led[3] = wBlink;
    assign led[2] = wBtn[1];
    assign led[1] = wSw[1];
    assign led[0] = wSw[0];
  

    assign PWM_Out_p = wPWM;
    assign PWM_Out_n = 1'b0;
    




    assign ledRGB[7 : 0] = wSineData;
    


     





endmodule