data/full_repos/permissive/43398611/instruction_fetch.v
1: b"%Error: data/full_repos/permissive/43398611/instruction_fetch.v:49: Cannot find file containing module: 'inst_mem'\ninst_mem i_inst_mem(\n^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/43398611,data/full_repos/permissive/43398611/inst_mem\n             data/full_repos/permissive/43398611,data/full_repos/permissive/43398611/inst_mem.v\n             data/full_repos/permissive/43398611,data/full_repos/permissive/43398611/inst_mem.sv\n             inst_mem\n             inst_mem.v\n             inst_mem.sv\n             obj_dir/inst_mem\n             obj_dir/inst_mem.v\n             obj_dir/inst_mem.sv\n%Error: Exiting due to 1 error(s)\n"
module instruction_fetch(
    input         clk_n,
    input         rst_n,
    input  [6:0]  m_branch_addr,
    input         m_branch_en,
    output [6:0]  if_next_addr,
    output [15:0] if_curr_inst
);

reg [6:0] pc;

assign if_next_addr = pc + 1;


always@(posedge clk_n or negedge rst_n) begin
  if(!rst_n) begin
    pc <= 7'b0;
  end else begin
    if(m_branch_en) begin
      pc <= m_branch_addr;
    end else begin
      pc <= if_next_addr;
    end
  end
end


inst_mem i_inst_mem(
  .clka(clk_n),
  .addra(pc),
  .douta(if_curr_inst)
);

endmodule
module instruction_fetch(
    input         clk_n,
    input         rst_n,
    input  [6:0]  m_branch_addr,
    input         m_branch_en,
    output [6:0]  if_next_addr,
    output [15:0] if_curr_inst
);


reg [6:0] pc;

assign if_next_addr = pc + 1;


always@(posedge clk_n or negedge rst_n) begin
  if(!rst_n) begin
    pc <= 7'b0;
  end else begin
    if(m_branch_en) begin
      pc <= m_branch_addr;
    end else begin
      pc <= if_next_addr;
    end
  end
end


inst_mem i_inst_mem(
  .clka(clk_n),
  .addra(pc),
  .douta(if_curr_inst)
);

endmodule