data/full_repos/permissive/506636840/sub_system_tbs/pss_tb/sequences/bridge_basic_rw_vseq.svh
1: b'%Error: data/full_repos/permissive/506636840/sub_system_tbs/pss_tb/sequences/bridge_basic_rw_vseq.svh:1: Unsupported: classes\nclass bridge_basic_rw_vseq extends uvm_sequence #(ahb_seq_item);\n^~~~~\n%Error: data/full_repos/permissive/506636840/sub_system_tbs/pss_tb/sequences/bridge_basic_rw_vseq.svh:1: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass bridge_basic_rw_vseq extends uvm_sequence #(ahb_seq_item);\n                                   ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/506636840/sub_system_tbs/pss_tb/sequences/bridge_basic_rw_vseq.svh:3: Define or directive not defined: \'`uvm_object_utils\'\n`uvm_object_utils(bridge_basic_rw_vseq)\n^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/506636840/sub_system_tbs/pss_tb/sequences/bridge_basic_rw_vseq.svh:5: Unsupported: new constructor\nfunction new(string name = "bridge_basic_rw_vseq");\n         ^~~\n%Error: data/full_repos/permissive/506636840/sub_system_tbs/pss_tb/sequences/bridge_basic_rw_vseq.svh:6: Unsupported: super\n  super.new(name);\n  ^~~~~\n%Error: data/full_repos/permissive/506636840/sub_system_tbs/pss_tb/sequences/bridge_basic_rw_vseq.svh:6: Unsupported: new with arguments\n  super.new(name);\n        ^~~\n%Error: data/full_repos/permissive/506636840/sub_system_tbs/pss_tb/sequences/bridge_basic_rw_vseq.svh:6: Unsupported: dotted new\n  super.new(name);\n  ^~~~~\n%Error: data/full_repos/permissive/506636840/sub_system_tbs/pss_tb/sequences/bridge_basic_rw_vseq.svh:10: syntax error, unexpected IDENTIFIER\n  ahb_seq_item req = ahb_seq_item::type_id::create("req");\n               ^~~\n%Error: data/full_repos/permissive/506636840/sub_system_tbs/pss_tb/sequences/bridge_basic_rw_vseq.svh:14: Unsupported: SystemVerilog 2005 reserved word not implemented: \'randomize\'\n    assert(req.randomize() with {HADDR inside {[0:32\'h18], [32\'h100:32\'h124], [32\'h200:32\'h210], [32\'h300:32\'h318]};\n               ^~~~~~~~~\n%Error: data/full_repos/permissive/506636840/sub_system_tbs/pss_tb/sequences/bridge_basic_rw_vseq.svh:14: syntax error, unexpected \'(\'\n    assert(req.randomize() with {HADDR inside {[0:32\'h18], [32\'h100:32\'h124], [32\'h200:32\'h210], [32\'h300:32\'h318]};\n                         ^\n%Error: data/full_repos/permissive/506636840/sub_system_tbs/pss_tb/sequences/bridge_basic_rw_vseq.svh:14: Unsupported: SystemVerilog 2005 reserved word not implemented: \'with\'\n    assert(req.randomize() with {HADDR inside {[0:32\'h18], [32\'h100:32\'h124], [32\'h200:32\'h210], [32\'h300:32\'h318]};\n                           ^~~~\n%Error: data/full_repos/permissive/506636840/sub_system_tbs/pss_tb/sequences/bridge_basic_rw_vseq.svh:15: syntax error, unexpected \';\'\n                                 HWRITE == AHB_READ;});\n                                                   ^\n%Error: data/full_repos/permissive/506636840/sub_system_tbs/pss_tb/sequences/bridge_basic_rw_vseq.svh:21: syntax error, unexpected endclass\nendclass:bridge_basic_rw_vseq\n^~~~~~~~\n%Error: Exiting due to 13 error(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
function new(string name = "bridge_basic_rw_vseq");
  super.new(name);
endfunction
function new(string name = "bridge_basic_rw_vseq");

  super.new(name);
endfunction