data/full_repos/permissive/42434302/ivltests/pr1587669.v
1: b'%Error: data/full_repos/permissive/42434302/ivltests/pr1587669.v:12: Unsupported or unknown PLI call: $monitor\n      $monitor("time=%0t", $time,": em=", em, ", pz=", pz, ", p=%b", p);\n      ^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/pr1587669.v:15: Unsupported: Ignoring delay on this delayed statement.\n #10 p = p+1;\n ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/42434302/ivltests/pr1587669.v:17: Unsupported: Ignoring delay on this delayed statement.\n      #1;  \n      ^\n%Error: Exiting due to 1 error(s), 2 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module nr1 (zn, a1, a2, a3);
  output zn;
  input a1, a2, a3;

  not G1(N1, a1);
  not G2(zn, N2);
  or  G3(N2, N1, a2, a3);

  specify
    (a1 +=> zn) = (0.500, 0.500);
    (a2 -=> zn) = (0.500, 0.500);
    (a3 -=> zn) = (0.500, 0.500);
  endspecify
endmodule
module nr1 (zn, a1, a2, a3);

  output zn;
  input a1, a2, a3;

  not G1(N1, a1);
  not G2(zn, N2);
  or  G3(N2, N1, a2, a3);

  specify
    (a1 +=> zn) = (0.500, 0.500);
    (a2 -=> zn) = (0.500, 0.500);
    (a3 -=> zn) = (0.500, 0.500);
  endspecify
endmodule