data/full_repos/permissive/490649362/pipeline/src/Control.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/490649362/pipeline/src/Control.v:138: Multiple top level modules\n                                                                                  : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                  : ... Top module \'Control\'\nmodule Control(inst_31_26, RegDst, Jump, Branch, MemRead, MemtoReg, ALUOp, MemWrite, ALUSrc, RegWrite);\n       ^~~~~~~\n                                                                                  : ... Top module \'ALU_control\'\nmodule ALU_control(funct, ALUOp, alu_control);\n       ^~~~~~~~~~~\n%Error: Exiting due to 1 warning(s)\n'
module ALU_control(funct, ALUOp, alu_control);

    input [5:0] funct;
    input [1:0] ALUOp;
    output [3:0] alu_control;

    reg [3:0] alu_control;

    always @(*) begin
        case (ALUOp)
            2'b00:
                alu_control = 4'b0010;
            2'b01:
                alu_control = 4'b0110;
            2'b10: begin
                case (funct)
                    6'b100000:
                        alu_control = 4'b0010;
                    6'b100010:
                        alu_control = 4'b0110;
                    6'b100100:
                        alu_control = 4'b0000;
                    6'b100101:
                        alu_control = 4'b0001;
                    6'b101010:
                        alu_control = 4'b0111;
                    default alu_control = 4'b0000;
                endcase
            end
            default alu_control = 4'b0000;
        endcase
    end

endmodule
module ALU_control(funct, ALUOp, alu_control);


    input [5:0] funct;
    input [1:0] ALUOp;
    output [3:0] alu_control;

    reg [3:0] alu_control;

    always @(*) begin
        case (ALUOp)
            2'b00:
                alu_control = 4'b0010;
            2'b01:
                alu_control = 4'b0110;
            2'b10: begin
                case (funct)
                    6'b100000:
                        alu_control = 4'b0010;
                    6'b100010:
                        alu_control = 4'b0110;
                    6'b100100:
                        alu_control = 4'b0000;
                    6'b100101:
                        alu_control = 4'b0001;
                    6'b101010:
                        alu_control = 4'b0111;
                    default alu_control = 4'b0000;
                endcase
            end
            default alu_control = 4'b0000;
        endcase
    end

endmodule