data/full_repos/permissive/495988601/block_display.sv
1: b'%Warning-MULTITOP: data/full_repos/permissive/495988601/block_display.sv:203: Multiple top level modules\n                                                                            : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                            : ... Top module \'block_state\'\nmodule  block_state   ( input            Clk,                   \n        ^~~~~~~~~~~\n                                                                            : ... Top module \'block_display\'\nmodule block_display ( input            Clk,                 \n       ^~~~~~~~~~~~~\n                                                                            : ... Top module \'rank\'\nmodule rank(input              Clk,          \n       ^~~~\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:337: Operator ASSIGNDLY expects 3 bits on the Assign RHS, but Assign RHS\'s CONST \'2\'h1\' generates 2 bits.\n                                                                         : ... In instance block_display\n    block1 <= 2\'b001;\n           ^~\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:445: Operator AND expects 200 bits on the LHS, but LHS\'s SEL generates 10 bits.\n                                                                         : ... In instance block_display\n   if((current_block_in & current_base)|(current_block[19] & {10\'b1111111111}))\n                                                           ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:445: Operator AND expects 200 bits on the RHS, but RHS\'s REPLICATE generates 10 bits.\n                                                                         : ... In instance block_display\n   if((current_block_in & current_base)|(current_block[19] & {10\'b1111111111}))\n                                                           ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:445: Logical Operator IF expects 1 bit on the If, but If\'s OR generates 200 bits.\n                                                                         : ... In instance block_display\n   if((current_block_in & current_base)|(current_block[19] & {10\'b1111111111}))\n   ^~\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:466: Operator OR expects 200 bits on the RHS, but RHS\'s EQ generates 1 bits.\n                                                                         : ... In instance block_display\n   if((current_block_in & current_base)|(blockX == 0)|(blockX == 9)|(blockY == 19))\n                                       ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:466: Operator OR expects 200 bits on the RHS, but RHS\'s EQ generates 1 bits.\n                                                                         : ... In instance block_display\n   if((current_block_in & current_base)|(blockX == 0)|(blockX == 9)|(blockY == 19))\n                                                     ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:466: Operator OR expects 200 bits on the RHS, but RHS\'s EQ generates 1 bits.\n                                                                         : ... In instance block_display\n   if((current_block_in & current_base)|(blockX == 0)|(blockX == 9)|(blockY == 19))\n                                                                   ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:466: Logical Operator IF expects 1 bit on the If, but If\'s OR generates 200 bits.\n                                                                         : ... In instance block_display\n   if((current_block_in & current_base)|(blockX == 0)|(blockX == 9)|(blockY == 19))\n   ^~\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:480: Operator OR expects 200 bits on the RHS, but RHS\'s EQ generates 1 bits.\n                                                                         : ... In instance block_display\n  if((current_block_in & current_base)|(blockX == 1)|(blockX == 9)|(blockY == 19)|(blockX == 0))\n                                      ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:480: Operator OR expects 200 bits on the RHS, but RHS\'s EQ generates 1 bits.\n                                                                         : ... In instance block_display\n  if((current_block_in & current_base)|(blockX == 1)|(blockX == 9)|(blockY == 19)|(blockX == 0))\n                                                    ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:480: Operator OR expects 200 bits on the RHS, but RHS\'s EQ generates 1 bits.\n                                                                         : ... In instance block_display\n  if((current_block_in & current_base)|(blockX == 1)|(blockX == 9)|(blockY == 19)|(blockX == 0))\n                                                                  ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:480: Operator OR expects 200 bits on the RHS, but RHS\'s EQ generates 1 bits.\n                                                                         : ... In instance block_display\n  if((current_block_in & current_base)|(blockX == 1)|(blockX == 9)|(blockY == 19)|(blockX == 0))\n                                                                                 ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:480: Logical Operator IF expects 1 bit on the If, but If\'s OR generates 200 bits.\n                                                                         : ... In instance block_display\n  if((current_block_in & current_base)|(blockX == 1)|(blockX == 9)|(blockY == 19)|(blockX == 0))\n  ^~\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:490: Logical Operator IF expects 1 bit on the If, but If\'s OR generates 200 bits.\n                                                                         : ... In instance block_display\n   if((current_block_in & current_base)|(current_block & {20{10\'b1000000000}}))\n   ^~\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:500: Logical Operator IF expects 1 bit on the If, but If\'s OR generates 200 bits.\n                                                                         : ... In instance block_display\n   if((current_block_in  & current_base)|(current_block & {20{10\'b0000000001}}))\n   ^~\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:593: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    score_h = score + score_count[0] + score_count[1] + score_count[2]+ score_count[3]+ score_count[4]+ score_count[5]+ score_count[6]\n                    ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:593: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    score_h = score + score_count[0] + score_count[1] + score_count[2]+ score_count[3]+ score_count[4]+ score_count[5]+ score_count[6]\n                                     ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:593: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    score_h = score + score_count[0] + score_count[1] + score_count[2]+ score_count[3]+ score_count[4]+ score_count[5]+ score_count[6]\n                                                      ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:593: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    score_h = score + score_count[0] + score_count[1] + score_count[2]+ score_count[3]+ score_count[4]+ score_count[5]+ score_count[6]\n                                                                      ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:593: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    score_h = score + score_count[0] + score_count[1] + score_count[2]+ score_count[3]+ score_count[4]+ score_count[5]+ score_count[6]\n                                                                                      ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:593: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    score_h = score + score_count[0] + score_count[1] + score_count[2]+ score_count[3]+ score_count[4]+ score_count[5]+ score_count[6]\n                                                                                                      ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:593: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    score_h = score + score_count[0] + score_count[1] + score_count[2]+ score_count[3]+ score_count[4]+ score_count[5]+ score_count[6]\n                                                                                                                      ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:594: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    + score_count[7]+ score_count[8]+ score_count[9]+ score_count[10]+ score_count[11]+ score_count[12]+ score_count[13]+ score_count[14]\n    ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:594: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    + score_count[7]+ score_count[8]+ score_count[9]+ score_count[10]+ score_count[11]+ score_count[12]+ score_count[13]+ score_count[14]\n                    ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:594: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    + score_count[7]+ score_count[8]+ score_count[9]+ score_count[10]+ score_count[11]+ score_count[12]+ score_count[13]+ score_count[14]\n                                    ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:594: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    + score_count[7]+ score_count[8]+ score_count[9]+ score_count[10]+ score_count[11]+ score_count[12]+ score_count[13]+ score_count[14]\n                                                    ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:594: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    + score_count[7]+ score_count[8]+ score_count[9]+ score_count[10]+ score_count[11]+ score_count[12]+ score_count[13]+ score_count[14]\n                                                                     ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:594: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    + score_count[7]+ score_count[8]+ score_count[9]+ score_count[10]+ score_count[11]+ score_count[12]+ score_count[13]+ score_count[14]\n                                                                                      ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:594: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    + score_count[7]+ score_count[8]+ score_count[9]+ score_count[10]+ score_count[11]+ score_count[12]+ score_count[13]+ score_count[14]\n                                                                                                       ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:594: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    + score_count[7]+ score_count[8]+ score_count[9]+ score_count[10]+ score_count[11]+ score_count[12]+ score_count[13]+ score_count[14]\n                                                                                                                        ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:595: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    + score_count[15]+ score_count[16];\n    ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:595: Operator ADD expects 11 bits on the RHS, but RHS\'s SEL generates 1 bits.\n                                                                         : ... In instance block_display\n    + score_count[15]+ score_count[16];\n                     ^\n%Warning-WIDTH: data/full_repos/permissive/495988601/block_display.sv:597: Logical Operator IF expects 1 bit on the If, but If\'s AND generates 200 bits.\n                                                                         : ... In instance block_display\n    if(current_base_in & {160\'b0,10\'b1111111111,30\'b0})\n    ^~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:131: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'new_block\'\n                                                                             : ... In instance block_state\n  new_block = 1\'b0;\n  ^~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:132: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_down\'\n                                                                             : ... In instance block_state\n  go_down = 1\'b0;\n  ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:133: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_right\'\n                                                                             : ... In instance block_state\n  go_right=1\'b0;\n  ^~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:134: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_left\'\n                                                                             : ... In instance block_state\n  go_left = 1\'b0;\n  ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:135: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'switch\'\n                                                                             : ... In instance block_state\n  switch = 1\'b0;\n  ^~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:136: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'clear\'\n                                                                             : ... In instance block_state\n  clear = 1\'b0;\n  ^~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:137: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'clearall\'\n                                                                             : ... In instance block_state\n  clearall = 1\'b0;\n  ^~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:138: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'fast_down\'\n                                                                             : ... In instance block_state\n   fast_down = 1\'b0;\n   ^~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:145: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'new_block\'\n                                                                             : ... In instance block_state\n    new_block = 1\'b1;\n    ^~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:149: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'new_block\'\n                                                                             : ... In instance block_state\n    new_block = 1\'b0;\n    ^~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:150: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_down\'\n                                                                             : ... In instance block_state\n    go_down = 1\'b1;\n    ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:154: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_down\'\n                                                                             : ... In instance block_state\n    go_down = 1\'b0;\n    ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:155: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'switch\'\n                                                                             : ... In instance block_state\n    switch = 1\'b1;\n    ^~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:159: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_down\'\n                                                                             : ... In instance block_state\n    go_down = 1\'b1;\n    ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:160: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'switch\'\n                                                                             : ... In instance block_state\n    switch = 1\'b0;\n    ^~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:164: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_down\'\n                                                                             : ... In instance block_state\n    go_down = 1\'b1;\n    ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:165: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'fast_down\'\n                                                                             : ... In instance block_state\n    fast_down = 1\'b1;\n    ^~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:169: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_down\'\n                                                                             : ... In instance block_state\n    go_down = 1\'b0;\n    ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:170: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_right\'\n                                                                             : ... In instance block_state\n    go_right = 1\'b1;\n    ^~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:174: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_right\'\n                                                                             : ... In instance block_state\n    go_right = 1\'b0;\n    ^~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:175: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_down\'\n                                                                             : ... In instance block_state\n    go_down = 1\'b1;\n    ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:179: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_left\'\n                                                                             : ... In instance block_state\n    go_left = 1\'b1;\n    ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:180: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_down\'\n                                                                             : ... In instance block_state\n    go_down = 1\'b0;\n    ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:184: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_left\'\n                                                                             : ... In instance block_state\n    go_left = 1\'b0;\n    ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:185: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_down\'\n                                                                             : ... In instance block_state\n    go_down = 1\'b1;\n    ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:189: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_down\'\n                                                                             : ... In instance block_state\n    go_down = 1\'b0;\n    ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:190: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'clear\'\n                                                                             : ... In instance block_state\n    clear = 1\'b1;\n    ^~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:194: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'clearall\'\n                                                                             : ... In instance block_state\n    clearall = 1\'b1;\n    ^~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:235: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'block_keep\'\n                                                                             : ... In instance block_display\n    block_keep = { 4\'b0000,\n    ^~~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:240: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'block_keep\'\n                                                                             : ... In instance block_display\n    block_keep = { 4\'b0100,\n    ^~~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:245: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'block_keep\'\n                                                                             : ... In instance block_display\n    block_keep = { 4\'b0000,\n    ^~~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:250: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'block_keep\'\n                                                                             : ... In instance block_display\n    block_keep = { 4\'b0010,\n    ^~~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:255: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'block_keep\'\n                                                                             : ... In instance block_display\n    block_keep = { 4\'b0100,\n    ^~~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:260: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'block_keep\'\n                                                                             : ... In instance block_display\n    block_keep = { 4\'b0100,\n    ^~~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:265: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'block_keep\'\n                                                                             : ... In instance block_display\n    block_keep = { 4\'b0100,\n    ^~~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:270: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'block_keep\'\n                                                                             : ... In instance block_display\n    block_keep = { 4\'b0000,\n    ^~~~~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:339: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'score\'\n                                                                             : ... In instance block_display\n    score <= 11\'b0;\n    ^~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:350: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'score\'\n                                                                             : ... In instance block_display\n    score <= score_h;\n    ^~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:367: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'touched\'\n                                                                             : ... In instance block_display\n touched = 1\'b0;\n ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:368: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'gg\'\n                                                                             : ... In instance block_display\n gg = 1\'b0;\n ^~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:369: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_next\'\n                                                                             : ... In instance block_display\n go_next = 1\'b0;\n ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:370: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'record\'\n                                                                             : ... In instance block_display\n record = 0;\n ^~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:447: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'touched\'\n                                                                             : ... In instance block_display\n    touched = 1\'b1;\n    ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:598: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'gg\'\n                                                                             : ... In instance block_display\n     gg = 1\'b1;\n     ^~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:600: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'go_next\'\n                                                                             : ... In instance block_display\n     go_next = 1\'b1;\n     ^~~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:605: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'record\'\n                                                                             : ... In instance block_display\n   record = 1;\n   ^~~~~~\n%Error-PROCASSWIRE: data/full_repos/permissive/495988601/block_display.sv:615: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): \'block_map\'\n                                                                             : ... In instance block_display\n block_map = current_base | current_block;\n ^~~~~~~~~\n%Error: Exiting due to 47 error(s), 34 warning(s)\n'
module  block_state   ( input          		Clk,
															Reset,
								input                touched,
															gg, 
															go_next,
								input  [7:0]			keycode,
								output 					new_block,
															go_down,
															fast_down,
															go_right,
															go_left,
															switch,
															clear,
															clearall
								);
			
	enum logic [3:0] {  	Halted,
								Halted_2,
								newblock,
								control,
								control_switch,
								control_switch2,
								fast_control,
								control_right,

								control_right2,
								control_left,

								control_left2,
								touch,
								over,
								over2
								}   State, Next_state;
    
	always_ff @ (posedge Clk)
	begin
		if (Reset) 
			State <= Halted;
		else
			State <= Next_state;
	end
	
	always_comb
	begin 
		Next_state = State;
		unique case (State)
			Halted : 
				if (keycode == 8'h28) 
					Next_state = Halted_2;
				else
					Next_state = Halted;
			Halted_2 : 
				if (keycode == 8'd00)
					Next_state = newblock;
			newblock :
				Next_state = control;
			control :
				if(touched)
					Next_state = touch;
				else begin
					if(keycode == 8'h04)
						Next_state = control_left;
					else if(keycode == 8'h07)
						Next_state = control_right;
					else if(keycode == 8'h16)
						Next_state = fast_control;
					else if(keycode == 8'h1a)
						Next_state = control_switch;
					else
						Next_state = control;
				end
			control_switch :
					Next_state = control_switch2;
			control_switch2 :
				if(touched)
					Next_state = touch;
				else if (keycode == 8'h00)
					Next_state = control;
				else
					Next_state = control_switch2;
				
			fast_control :
				if(touched)
					Next_state = touch;
				else if(keycode == 8'h00)
					Next_state = control;
				else 
					Next_state = fast_control;
			control_right :
					Next_state = control_right2;
			control_right2 :
				if(touched)
					Next_state = touch;
				else if (keycode == 8'h00)
					Next_state = control;
				else
					Next_state = control_right2;
			control_left :
					Next_state = control_left2;

			control_left2 :
			begin
				if(touched)
					Next_state = touch;
				else if (keycode == 8'h00)
					Next_state = control;
				else
					Next_state = control_left2;
			end
			touch :
				if(gg)
					Next_state = over;
				else if(go_next)
					Next_state = newblock;
				else
					Next_state = touch;
			over :
				if (keycode == 8'h28) 
					Next_state = over2;
				else
					Next_state = over;
			over2 :
				if (keycode == 8'd00)
					Next_state = Halted;


			default : Next_state = Halted;

		endcase
		
		new_block = 1'b0;
		go_down = 1'b0;
		go_right=1'b0;
		go_left = 1'b0;
		switch = 1'b0;
		clear = 1'b0;
		clearall = 1'b0;
 		fast_down = 1'b0;
		unique case (State)
			Halted : ;
				
			Halted_2 : ;
				
			newblock :
				new_block = 1'b1;
				
			control :
			begin
				new_block = 1'b0;
				go_down = 1'b1;
			end	
			control_switch :
			begin
				go_down = 1'b0;
				switch = 1'b1;
			end
			control_switch2 :
			begin
				go_down = 1'b1;
				switch = 1'b0;
			end
			fast_control :
			begin
				go_down = 1'b1;
				fast_down = 1'b1;
			end
			control_right :
			begin
				go_down = 1'b0;
				go_right = 1'b1;
			end
			control_right2 :
			begin
				go_right = 1'b0;
				go_down = 1'b1;
			end
			control_left :
			begin
				go_left = 1'b1;
				go_down = 1'b0;
			end
			control_left2 :
			begin
				go_left = 1'b0;
				go_down = 1'b1;
			end
			touch :
			begin	
				go_down = 1'b0;
				clear = 1'b1;
			end
			over : ;
			over2 :
				clearall = 1'b1;
			

			default : ;
		endcase
	end 
    
endmodule
module  block_state   ( input          		Clk,
															Reset,
								input                touched,
															gg, 
															go_next,
								input  [7:0]			keycode,
								output 					new_block,
															go_down,
															fast_down,
															go_right,
															go_left,
															switch,
															clear,
															clearall
								);

			
	enum logic [3:0] {  	Halted,
								Halted_2,
								newblock,
								control,
								control_switch,
								control_switch2,
								fast_control,
								control_right,

								control_right2,
								control_left,

								control_left2,
								touch,
								over,
								over2
								}   State, Next_state;
    
	always_ff @ (posedge Clk)
	begin
		if (Reset) 
			State <= Halted;
		else
			State <= Next_state;
	end
	
	always_comb
	begin 
		Next_state = State;
		unique case (State)
			Halted : 
				if (keycode == 8'h28) 
					Next_state = Halted_2;
				else
					Next_state = Halted;
			Halted_2 : 
				if (keycode == 8'd00)
					Next_state = newblock;
			newblock :
				Next_state = control;
			control :
				if(touched)
					Next_state = touch;
				else begin
					if(keycode == 8'h04)
						Next_state = control_left;
					else if(keycode == 8'h07)
						Next_state = control_right;
					else if(keycode == 8'h16)
						Next_state = fast_control;
					else if(keycode == 8'h1a)
						Next_state = control_switch;
					else
						Next_state = control;
				end
			control_switch :
					Next_state = control_switch2;
			control_switch2 :
				if(touched)
					Next_state = touch;
				else if (keycode == 8'h00)
					Next_state = control;
				else
					Next_state = control_switch2;
				
			fast_control :
				if(touched)
					Next_state = touch;
				else if(keycode == 8'h00)
					Next_state = control;
				else 
					Next_state = fast_control;
			control_right :
					Next_state = control_right2;
			control_right2 :
				if(touched)
					Next_state = touch;
				else if (keycode == 8'h00)
					Next_state = control;
				else
					Next_state = control_right2;
			control_left :
					Next_state = control_left2;

			control_left2 :
			begin
				if(touched)
					Next_state = touch;
				else if (keycode == 8'h00)
					Next_state = control;
				else
					Next_state = control_left2;
			end
			touch :
				if(gg)
					Next_state = over;
				else if(go_next)
					Next_state = newblock;
				else
					Next_state = touch;
			over :
				if (keycode == 8'h28) 
					Next_state = over2;
				else
					Next_state = over;
			over2 :
				if (keycode == 8'd00)
					Next_state = Halted;


			default : Next_state = Halted;

		endcase
		
		new_block = 1'b0;
		go_down = 1'b0;
		go_right=1'b0;
		go_left = 1'b0;
		switch = 1'b0;
		clear = 1'b0;
		clearall = 1'b0;
 		fast_down = 1'b0;
		unique case (State)
			Halted : ;
				
			Halted_2 : ;
				
			newblock :
				new_block = 1'b1;
				
			control :
			begin
				new_block = 1'b0;
				go_down = 1'b1;
			end	
			control_switch :
			begin
				go_down = 1'b0;
				switch = 1'b1;
			end
			control_switch2 :
			begin
				go_down = 1'b1;
				switch = 1'b0;
			end
			fast_control :
			begin
				go_down = 1'b1;
				fast_down = 1'b1;
			end
			control_right :
			begin
				go_down = 1'b0;
				go_right = 1'b1;
			end
			control_right2 :
			begin
				go_right = 1'b0;
				go_down = 1'b1;
			end
			control_left :
			begin
				go_left = 1'b1;
				go_down = 1'b0;
			end
			control_left2 :
			begin
				go_left = 1'b0;
				go_down = 1'b1;
			end
			touch :
			begin	
				go_down = 1'b0;
				clear = 1'b1;
			end
			over : ;
			over2 :
				clearall = 1'b1;
			

			default : ;
		endcase
	end 
    
endmodule