data/full_repos/permissive/413230008/Binary-to-BCD/Code/Sources/mq_4bit.v
data/verilator_xmls/3595d46e-722a-4996-b0d5-72a5f2bf87a2.xml
module mq_4bit(
    input [3:0] m,
    input q,
    output [3:0] mq
    );
    assign mq = {m[3] & q, m[2] & q, m[1] & q, m[0] & q};
endmodule
module mq_4bit(
    input [3:0] m,
    input q,
    output [3:0] mq
    );

    assign mq = {m[3] & q, m[2] & q, m[1] & q, m[0] & q};
endmodule