data/full_repos/permissive/423547971/College Coursework/Digital Design II Final Project/traffic_controller_TB.v
1: b'%Error: Cannot find file containing module: Coursework/Digital\n        ... Looked in:\n             data/full_repos/permissive/423547971/College/Coursework/Digital\n             data/full_repos/permissive/423547971/College/Coursework/Digital.v\n             data/full_repos/permissive/423547971/College/Coursework/Digital.sv\n             Coursework/Digital\n             Coursework/Digital.v\n             Coursework/Digital.sv\n             obj_dir/Coursework/Digital\n             obj_dir/Coursework/Digital.v\n             obj_dir/Coursework/Digital.sv\n%Error: Cannot find file containing module: Design\n%Error: Cannot find file containing module: II\n%Error: Cannot find file containing module: Final\n%Error: Cannot find file containing module: Project,data/full_repos/permissive/423547971\n%Error: Cannot find file containing module: data/full_repos/permissive/423547971/College\n%Error: Cannot find file containing module: Project/traffic_controller_TB.v\n%Error: Exiting due to 7 error(s)\n'
module traffic_controller_TB;

reg RESET;
reg CLOCK;
reg CLK_24hr;
reg WALK;
reg CAR;
reg EMERGENCY;

wire rA_Maj, rMR_Maj, yA_Maj, yLR_Maj, gA_Maj, gLR_Maj, 
	 rLR_min, yA_min, yLR_min, gA_min, gLR_min,
	 h_Maj, i_Maj,
	 W_Maj, DW_Maj, W_min, DW_min, a_min, b_min, c_min, d_min, e_min, f_min,
	 g_min, h_min, i_min, a_Maj, b_Maj, c_Maj, d_Maj, e_Maj, f_Maj, g_Maj;


traffic_controller TC0(
	.CLOCK(CLOCK),
	.RESET(RESET),	
	.CLK_24hr(CLK_24hr),
	.WALK(WALK),
	.CAR(CAR),
	.EMERGENCY(EMERGENCY),
	
	.rA_Maj(rA_Maj),
	.rMR_Maj(rMR_Maj),
	.yA_Maj(yA_Maj),
	.yLR_Maj(yLR_Maj),
	.gA_Maj(gA_Maj),
	.gLR_Maj(gLR_Maj),
	
	.rLR_min(rLR_min),
	.yA_min(yA_min),
	.yLR_min(yLR_min),
	.gA_min(gA_min),
	.gLR_min(gLR_min),
	
	.W_Maj(W_Maj),
	.DW_Maj(DW_Maj),
	
	.W_min(W_min),
	.DW_min(DW_min),
	
	.a_Maj(a_Maj),
	.b_Maj(b_Maj),
	.c_Maj(c_Maj),
	.d_Maj(d_Maj),
	.e_Maj(e_Maj),
	.f_Maj(f_Maj),
	.g_Maj(g_Maj),
	.h_Maj(h_Maj),
	.i_Maj(i_Maj),
	
	.a_min(a_min),
	.b_min(b_min),
	.c_min(c_min),
	.d_min(d_min),
	.e_min(e_min),
	.f_min(f_min),
	.g_min(g_min),
	.h_min(h_min),
	.i_min(i_min)	
);


always
  #5 CLOCK = !CLOCK ;
  

initial
begin
  $dumpfile("traffic_controller_TB.vcd") ;
  $dumpvars(0, traffic_controller_TB) ;
end


initial
begin
		EMERGENCY   = 0 ;
		WALK     	= 0 ;
		CAR  		= 0 ;
		CLK_24hr 	= 1 ;
		CLOCK    	= 0 ;
		RESET    	= 1 ;
  #6 	RESET    	= 0 ;

  #606	CLK_24hr	= 0 ;
  #45	WALK 		= 1 ;
  #1	WALK		= 0 ;
  #500  CAR			= 1 ;
  #1	CAR			= 0 ;
  #1000 EMERGENCY   = 1 ;
  #200  EMERGENCY   = 0 ;
  #200  CLK_24hr    = 1 ;
  #500  EMERGENCY   = 1 ;
  #500  EMERGENCY	= 0 ;

  #180	CLK_24hr	= 0 ;
  #100  CLK_24hr    = 1 ;


  #10000 $finish ; 
end
 
endmodule
module traffic_controller_TB;


reg RESET;
reg CLOCK;
reg CLK_24hr;
reg WALK;
reg CAR;
reg EMERGENCY;

wire rA_Maj, rMR_Maj, yA_Maj, yLR_Maj, gA_Maj, gLR_Maj, 
	 rLR_min, yA_min, yLR_min, gA_min, gLR_min,
	 h_Maj, i_Maj,
	 W_Maj, DW_Maj, W_min, DW_min, a_min, b_min, c_min, d_min, e_min, f_min,
	 g_min, h_min, i_min, a_Maj, b_Maj, c_Maj, d_Maj, e_Maj, f_Maj, g_Maj;


traffic_controller TC0(
	.CLOCK(CLOCK),
	.RESET(RESET),	
	.CLK_24hr(CLK_24hr),
	.WALK(WALK),
	.CAR(CAR),
	.EMERGENCY(EMERGENCY),
	
	.rA_Maj(rA_Maj),
	.rMR_Maj(rMR_Maj),
	.yA_Maj(yA_Maj),
	.yLR_Maj(yLR_Maj),
	.gA_Maj(gA_Maj),
	.gLR_Maj(gLR_Maj),
	
	.rLR_min(rLR_min),
	.yA_min(yA_min),
	.yLR_min(yLR_min),
	.gA_min(gA_min),
	.gLR_min(gLR_min),
	
	.W_Maj(W_Maj),
	.DW_Maj(DW_Maj),
	
	.W_min(W_min),
	.DW_min(DW_min),
	
	.a_Maj(a_Maj),
	.b_Maj(b_Maj),
	.c_Maj(c_Maj),
	.d_Maj(d_Maj),
	.e_Maj(e_Maj),
	.f_Maj(f_Maj),
	.g_Maj(g_Maj),
	.h_Maj(h_Maj),
	.i_Maj(i_Maj),
	
	.a_min(a_min),
	.b_min(b_min),
	.c_min(c_min),
	.d_min(d_min),
	.e_min(e_min),
	.f_min(f_min),
	.g_min(g_min),
	.h_min(h_min),
	.i_min(i_min)	
);


always
  #5 CLOCK = !CLOCK ;
  

initial
begin
  $dumpfile("traffic_controller_TB.vcd") ;
  $dumpvars(0, traffic_controller_TB) ;
end


initial
begin
		EMERGENCY   = 0 ;
		WALK     	= 0 ;
		CAR  		= 0 ;
		CLK_24hr 	= 1 ;
		CLOCK    	= 0 ;
		RESET    	= 1 ;
  #6 	RESET    	= 0 ;

  #606	CLK_24hr	= 0 ;
  #45	WALK 		= 1 ;
  #1	WALK		= 0 ;
  #500  CAR			= 1 ;
  #1	CAR			= 0 ;
  #1000 EMERGENCY   = 1 ;
  #200  EMERGENCY   = 0 ;
  #200  CLK_24hr    = 1 ;
  #500  EMERGENCY   = 1 ;
  #500  EMERGENCY	= 0 ;

  #180	CLK_24hr	= 0 ;
  #100  CLK_24hr    = 1 ;


  #10000 $finish ; 
end
 
endmodule