data/full_repos/permissive/458935738/encoder_test1/stepctl.v
1: b"%Error: data/full_repos/permissive/458935738/encoder_test1/stepctl.v:50: Cannot find file containing module: 'pwm'\npwm pwm_generator(clk, pwm_gen, SPEED, PWM);\n^~~\n        ... Looked in:\n             data/full_repos/permissive/458935738/encoder_test1,data/full_repos/permissive/458935738/pwm\n             data/full_repos/permissive/458935738/encoder_test1,data/full_repos/permissive/458935738/pwm.v\n             data/full_repos/permissive/458935738/encoder_test1,data/full_repos/permissive/458935738/pwm.sv\n             pwm\n             pwm.v\n             pwm.sv\n             obj_dir/pwm\n             obj_dir/pwm.v\n             obj_dir/pwm.sv\n%Error: Exiting due to 1 error(s)\n"
module stepctl (
    input clk,
    input enable,
    input encoder,
    input [15:0] ndegs,
    output wire PWM,
    output reg motor_en
);


parameter SPEED = 16'd2000;


localparam IDLE = 4'd0;
localparam COUNTDOWN = 4'd1;


reg [3:0] state, next;
reg [15:0] counter, counter_next;
reg pwm_gen;


reg enc1, enc2, enc3;
wire pulse;
always @(posedge clk) begin
    enc1 <= encoder;
    enc2 <= enc1;
    enc3 <= enc2;
end
assign pulse = ~enc3 & enc2;


pwm pwm_generator(clk, pwm_gen, SPEED, PWM);

always @(posedge clk) begin
    state <= next;
    counter <= counter_next;
end

always @(*) begin

    next = IDLE;
    pwm_gen = 0;
    counter_next = 16'd0;
    motor_en = 0;

    case (state)
        IDLE: begin
            next = enable ? COUNTDOWN : IDLE;

            pwm_gen = 0;
            counter_next = enable ? ndegs : 16'd0;
            motor_en = 0;
        end

        COUNTDOWN: begin
            next = (counter != 16'd0) ? COUNTDOWN : IDLE;

            pwm_gen = 1;
            counter_next = counter - {15'd0, pulse};
            motor_en = 1;
        end
    endcase
end

    
endmodule
module stepctl (
    input clk,
    input enable,
    input encoder,
    input [15:0] ndegs,
    output wire PWM,
    output reg motor_en
);



parameter SPEED = 16'd2000;


localparam IDLE = 4'd0;
localparam COUNTDOWN = 4'd1;


reg [3:0] state, next;
reg [15:0] counter, counter_next;
reg pwm_gen;


reg enc1, enc2, enc3;
wire pulse;
always @(posedge clk) begin
    enc1 <= encoder;
    enc2 <= enc1;
    enc3 <= enc2;
end
assign pulse = ~enc3 & enc2;


pwm pwm_generator(clk, pwm_gen, SPEED, PWM);

always @(posedge clk) begin
    state <= next;
    counter <= counter_next;
end

always @(*) begin

    next = IDLE;
    pwm_gen = 0;
    counter_next = 16'd0;
    motor_en = 0;

    case (state)
        IDLE: begin
            next = enable ? COUNTDOWN : IDLE;

            pwm_gen = 0;
            counter_next = enable ? ndegs : 16'd0;
            motor_en = 0;
        end

        COUNTDOWN: begin
            next = (counter != 16'd0) ? COUNTDOWN : IDLE;

            pwm_gen = 1;
            counter_next = counter - {15'd0, pulse};
            motor_en = 1;
        end
    endcase
end

    
endmodule