data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:31: Unsupported: Ignoring delay on this delayed statement.\n        #5;\n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:63: Unsupported: Ignoring delay on this delayed statement.\n                    #5; \n                    ^\n%Error: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:19: Cannot find file containing module: \'multiplier53Booth\'\n    multiplier53Booth #(.WIDTH(53)) mul53 (\n    ^~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/419984230/tests,data/full_repos/permissive/419984230/multiplier53Booth\n             data/full_repos/permissive/419984230/tests,data/full_repos/permissive/419984230/multiplier53Booth.v\n             data/full_repos/permissive/419984230/tests,data/full_repos/permissive/419984230/multiplier53Booth.sv\n             multiplier53Booth\n             multiplier53Booth.v\n             multiplier53Booth.sv\n             obj_dir/multiplier53Booth\n             obj_dir/multiplier53Booth.v\n             obj_dir/multiplier53Booth.sv\n%Warning-WIDTH: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:38: Operator ASSIGN expects 2 bits on the Assign RHS, but Assign RHS\'s VARREF \'k\' generates 32 bits.\n                                                                                    : ... In instance multiplier53Booth_tb\n                    mode = k;\n                         ^\n%Warning-WIDTH: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:39: Operator ASSIGN expects 27 bits on the Assign RHS, but Assign RHS\'s UNSIGNED generates 32 bits.\n                                                                                    : ... In instance multiplier53Booth_tb\n                    multiplicand[26:0] = $unsigned($random);\n                                       ^\n%Warning-WIDTH: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:40: Operator ASSIGN expects 27 bits on the Assign RHS, but Assign RHS\'s UNSIGNED generates 32 bits.\n                                                                                    : ... In instance multiplier53Booth_tb\n                    multiplier[26:0] = $unsigned($random);\n                                     ^\n%Warning-SELRANGE: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:41: Selection index out of range: 53:27 outside 52:0\n                                                                                       : ... In instance multiplier53Booth_tb\n                    multiplicand[53:27] = $unsigned($random);\n                                ^\n%Warning-WIDTH: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:41: Operator ASSIGN expects 27 bits on the Assign RHS, but Assign RHS\'s UNSIGNED generates 32 bits.\n                                                                                    : ... In instance multiplier53Booth_tb\n                    multiplicand[53:27] = $unsigned($random);\n                                        ^\n%Warning-SELRANGE: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:42: Selection index out of range: 53:27 outside 52:0\n                                                                                       : ... In instance multiplier53Booth_tb\n                    multiplier[53:27] = $unsigned($random);\n                              ^\n%Warning-WIDTH: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:42: Operator ASSIGN expects 27 bits on the Assign RHS, but Assign RHS\'s UNSIGNED generates 32 bits.\n                                                                                    : ... In instance multiplier53Booth_tb\n                    multiplier[53:27] = $unsigned($random);\n                                      ^\n%Warning-WIDTH: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:45: Operator ASSIGN expects 11 bits on the Assign RHS, but Assign RHS\'s VARREF \'i\' generates 32 bits.\n                                                                                    : ... In instance multiplier53Booth_tb\n                    multiplicand[10:0] = i;\n                                       ^\n%Warning-WIDTH: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:46: Operator ASSIGN expects 11 bits on the Assign RHS, but Assign RHS\'s VARREF \'j\' generates 32 bits.\n                                                                                    : ... In instance multiplier53Booth_tb\n                    multiplier[10:0] = j;\n                                     ^\n%Warning-WIDTH: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:47: Operator ASSIGN expects 11 bits on the Assign RHS, but Assign RHS\'s VARREF \'i\' generates 32 bits.\n                                                                                    : ... In instance multiplier53Booth_tb\n                    multiplicand[24:14] = i;\n                                        ^\n%Warning-WIDTH: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:48: Operator ASSIGN expects 11 bits on the Assign RHS, but Assign RHS\'s VARREF \'j\' generates 32 bits.\n                                                                                    : ... In instance multiplier53Booth_tb\n                    multiplier[24:14] = j;\n                                      ^\n%Warning-WIDTH: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:49: Operator ASSIGN expects 11 bits on the Assign RHS, but Assign RHS\'s VARREF \'i\' generates 32 bits.\n                                                                                    : ... In instance multiplier53Booth_tb\n                    multiplicand[38:28] = i;\n                                        ^\n%Warning-WIDTH: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:50: Operator ASSIGN expects 11 bits on the Assign RHS, but Assign RHS\'s VARREF \'j\' generates 32 bits.\n                                                                                    : ... In instance multiplier53Booth_tb\n                    multiplier[38:28] = j;\n                                      ^\n%Warning-WIDTH: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:51: Operator ASSIGN expects 11 bits on the Assign RHS, but Assign RHS\'s VARREF \'i\' generates 32 bits.\n                                                                                    : ... In instance multiplier53Booth_tb\n                    multiplicand[52:42] = i;\n                                        ^\n%Warning-WIDTH: data/full_repos/permissive/419984230/tests/multiplier53Booth_tb.v:52: Operator ASSIGN expects 11 bits on the Assign RHS, but Assign RHS\'s VARREF \'j\' generates 32 bits.\n                                                                                    : ... In instance multiplier53Booth_tb\n                    multiplier[52:42] = j;\n                                      ^\n%Error: Exiting due to 1 error(s), 17 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module multiplier53Booth_tb;

    parameter WIDTH = 53;

	reg [WIDTH-1:0] multiplier;
	reg [WIDTH-1:0] multiplicand;
    reg [1:0] mode;

	wire [2*WIDTH-1:0]   p0;
    wire [2*WIDTH-1:0]   p1;

    reg [2*WIDTH-1:0]   product_result, product_expected;
    reg is_passed;

    integer csvWrite, i, j, k, passed = 0, failed = 0;

    multiplier53Booth #(.WIDTH(53)) mul53 (
        .multiplicand(multiplicand), .multiplier(multiplier),
        .mode(mode), .p0(p0), .p1(p1)
    );

    initial begin
    


        multiplier = 0;
        multiplicand = 0;
        mode = 2'b10;
        #5;
        

        for (i = 1; i<=100_000; i= i+1) begin
            $display("Simulation Started for Iteration: %d", i);
            for (j=1; j<=100; j=j+1) begin
                for (k = 1; k <= 1; k = k+1) begin
                    mode = k;
                    multiplicand[26:0] = $unsigned($random);
                    multiplier[26:0] = $unsigned($random);
                    multiplicand[53:27] = $unsigned($random);
                    multiplier[53:27] = $unsigned($random);


                    multiplicand[10:0] = i;
                    multiplier[10:0] = j;
                    multiplicand[24:14] = i;
                    multiplier[24:14] = j;
                    multiplicand[38:28] = i;
                    multiplier[38:28] = j;
                    multiplicand[52:42] = i;
                    multiplier[52:42] = j;
                    
                    if (product_result == product_expected) begin
                        passed = passed + 1;
                        is_passed = 1'b1;
                    end else begin
                        failed = failed + 1;
                        is_passed = 1'b0; $finish();
                        $display("Test Failed on Values: Multiplicad = %h, Multiplier = %h, Product Expected = %h, Product Generated = %h", multiplicand, multiplier, product_expected, product_result);
                    end

                    #5; 
                end
            end
            $display("Total Passed: %d, Total Failed: %d", passed, failed);    
        end
        $display("Simulation Completed: Total Tests = %d, Passed = %d, Failed: %d", (passed+failed), passed, failed);

        $finish(); 
    end

    always @(p1, p0) begin
        product_result = p0 + p1;
        
        if (mode == 2) begin
            multiplier[28:24] = 5'b0;
            multiplicand[28:24] = 5'b0;
            product_result[48] = 1'b0; 
            product_expected[47:0] = multiplicand[23:0] * multiplier[23:0];
            product_expected[105:58] = multiplicand[52:29] * multiplier[52:29];
            product_expected[57:48] = 10'b0;
        end
        else if (mode == 1) begin
            multiplier[13:11] = 3'b0;
            multiplicand[13:11] = 3'b0;
            multiplier[27:25] = 3'b0;
            multiplicand[27:25] = 3'b0;
            multiplier[41:39] = 3'b0;
            multiplicand[41:39] = 3'b0;





            product_result[22] = 1'b0;
            product_result[50] = 1'b0; 
            product_result[78] = 1'b0; 
            product_expected[21:0] = multiplicand[10:0] * multiplier[10:0];
            product_expected[49:28] = multiplicand[24:14] * multiplier[24:14];
            product_expected[77:56] = multiplicand[38:28] * multiplier[38:28];
            product_expected[105:84] = multiplicand[52:42] * multiplier[52:42];
            product_expected[27:22] = 6'b0;
            product_expected[55:50] = 6'b0;
            product_expected[83:78] = 6'b0;
        end
        else begin
            product_expected = multiplicand * multiplier;
        end
        
    end
    
endmodule
module multiplier53Booth_tb;


    parameter WIDTH = 53;

	reg [WIDTH-1:0] multiplier;
	reg [WIDTH-1:0] multiplicand;
    reg [1:0] mode;

	wire [2*WIDTH-1:0]   p0;
    wire [2*WIDTH-1:0]   p1;

    reg [2*WIDTH-1:0]   product_result, product_expected;
    reg is_passed;

    integer csvWrite, i, j, k, passed = 0, failed = 0;

    multiplier53Booth #(.WIDTH(53)) mul53 (
        .multiplicand(multiplicand), .multiplier(multiplier),
        .mode(mode), .p0(p0), .p1(p1)
    );

    initial begin
    


        multiplier = 0;
        multiplicand = 0;
        mode = 2'b10;
        #5;
        

        for (i = 1; i<=100_000; i= i+1) begin
            $display("Simulation Started for Iteration: %d", i);
            for (j=1; j<=100; j=j+1) begin
                for (k = 1; k <= 1; k = k+1) begin
                    mode = k;
                    multiplicand[26:0] = $unsigned($random);
                    multiplier[26:0] = $unsigned($random);
                    multiplicand[53:27] = $unsigned($random);
                    multiplier[53:27] = $unsigned($random);


                    multiplicand[10:0] = i;
                    multiplier[10:0] = j;
                    multiplicand[24:14] = i;
                    multiplier[24:14] = j;
                    multiplicand[38:28] = i;
                    multiplier[38:28] = j;
                    multiplicand[52:42] = i;
                    multiplier[52:42] = j;
                    
                    if (product_result == product_expected) begin
                        passed = passed + 1;
                        is_passed = 1'b1;
                    end else begin
                        failed = failed + 1;
                        is_passed = 1'b0; $finish();
                        $display("Test Failed on Values: Multiplicad = %h, Multiplier = %h, Product Expected = %h, Product Generated = %h", multiplicand, multiplier, product_expected, product_result);
                    end

                    #5; 
                end
            end
            $display("Total Passed: %d, Total Failed: %d", passed, failed);    
        end
        $display("Simulation Completed: Total Tests = %d, Passed = %d, Failed: %d", (passed+failed), passed, failed);

        $finish(); 
    end

    always @(p1, p0) begin
        product_result = p0 + p1;
        
        if (mode == 2) begin
            multiplier[28:24] = 5'b0;
            multiplicand[28:24] = 5'b0;
            product_result[48] = 1'b0; 
            product_expected[47:0] = multiplicand[23:0] * multiplier[23:0];
            product_expected[105:58] = multiplicand[52:29] * multiplier[52:29];
            product_expected[57:48] = 10'b0;
        end
        else if (mode == 1) begin
            multiplier[13:11] = 3'b0;
            multiplicand[13:11] = 3'b0;
            multiplier[27:25] = 3'b0;
            multiplicand[27:25] = 3'b0;
            multiplier[41:39] = 3'b0;
            multiplicand[41:39] = 3'b0;





            product_result[22] = 1'b0;
            product_result[50] = 1'b0; 
            product_result[78] = 1'b0; 
            product_expected[21:0] = multiplicand[10:0] * multiplier[10:0];
            product_expected[49:28] = multiplicand[24:14] * multiplier[24:14];
            product_expected[77:56] = multiplicand[38:28] * multiplier[38:28];
            product_expected[105:84] = multiplicand[52:42] * multiplier[52:42];
            product_expected[27:22] = 6'b0;
            product_expected[55:50] = 6'b0;
            product_expected[83:78] = 6'b0;
        end
        else begin
            product_expected = multiplicand * multiplier;
        end
        
    end
    
endmodule