data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp_synch_cljl.v
1: b'%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/ctu_clsp_synch_cljl.v:26: Cannot find include file: sys.h\n`include "sys.h" \n         ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/sys.h\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/sys.h.v\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/sys.h.sv\n             sys.h\n             sys.h.v\n             sys.h.sv\n             obj_dir/sys.h\n             obj_dir/sys.h.v\n             obj_dir/sys.h.sv\n%Error: Exiting due to 1 error(s)\n'
module ctu_clsp_synch_cljl(

jbi_ctu_tr_jl, iob_ctu_tr_jl, iob_ctu_l2_tr_jl, dram13_ctu_tr_jl, 
dram02_ctu_tr_jl, ctu_misc_cken_jl, ctu_jbusr_cken_jl, 
ctu_jbusl_cken_jl, ctu_jbi_cken_jl, ctu_iob_cken_jl, ctu_efc_cken_jl, 
ctu_dram13_cken_jl, ctu_dram02_cken_jl, ctu_dbg_cken_jl, 
clsp_ctrl_srarm_jl, 

jbus_clk, jbi_ctu_tr, iob_ctu_tr, iob_ctu_l2_tr, io_pwron_rst_l, 
dram13_ctu_tr, dram02_ctu_tr, ctu_jbi_cken_pre_jl, 
ctu_iob_cken_pre_jl, ctu_efc_cken_pre_jl, ctu_dram13_cken_pre_jl, 
ctu_dram02_cken_pre_jl, clsp_ctrl_srarm_pre_jl, start_clk_jl, 
ctu_jbusl_cken_pre_jl, ctu_jbusr_cken_pre_jl, ctu_misc_cken_pre_jl, 
ctu_dbg_cken_pre_jl
);



input			clsp_ctrl_srarm_pre_jl;
input			ctu_dram02_cken_pre_jl;
input			ctu_dram13_cken_pre_jl;
input			ctu_efc_cken_pre_jl;
input			ctu_iob_cken_pre_jl;
input			ctu_jbi_cken_pre_jl;
input			dram02_ctu_tr;
input			dram13_ctu_tr;
input			io_pwron_rst_l;
input			iob_ctu_l2_tr;
input			iob_ctu_tr;
input			jbi_ctu_tr;
input			jbus_clk;

input                   start_clk_jl;
input 			ctu_jbusl_cken_pre_jl;
input 			ctu_jbusr_cken_pre_jl;
input 			ctu_misc_cken_pre_jl;
input                   ctu_dbg_cken_pre_jl;


output			clsp_ctrl_srarm_jl;
output			ctu_dbg_cken_jl;
output			ctu_dram02_cken_jl;
output			ctu_dram13_cken_jl;
output			ctu_efc_cken_jl;
output			ctu_iob_cken_jl;
output			ctu_jbi_cken_jl;
output			ctu_jbusl_cken_jl;
output			ctu_jbusr_cken_jl;
output			ctu_misc_cken_jl;
output			dram02_ctu_tr_jl;
output			dram13_ctu_tr_jl;
output			iob_ctu_l2_tr_jl;
output			iob_ctu_tr_jl;
output			jbi_ctu_tr_jl;




wire ctu_jbusl_cken_jl_nxt;
wire ctu_jbusr_cken_jl_nxt;
wire ctu_misc_cken_jl_nxt;
wire ctu_dbg_cken_jl_nxt;


     dffrl_ns u_clsp_ctrl_srarm_jl( .rst_l	(start_clk_jl),

				   .q	(clsp_ctrl_srarm_jl),

				   .din	(clsp_ctrl_srarm_pre_jl),
				   .clk	(jbus_clk));



     dffrl_ns u_ctu_dram02_cken_jl( .rst_l	(start_clk_jl),

				   .q	(ctu_dram02_cken_jl),

				   .din	(ctu_dram02_cken_pre_jl),
				   .clk	(jbus_clk));
     dffrl_ns u_ctu_dram13_cken_jl( .rst_l	(start_clk_jl),

				   .q	(ctu_dram13_cken_jl),

				   .din	(ctu_dram13_cken_pre_jl),
				   .clk	(jbus_clk));



     dffrl_ns u_ctu_iob_cken_jl( .rst_l	(start_clk_jl),

				.q	(ctu_iob_cken_jl),

				.din	(ctu_iob_cken_pre_jl),
				.clk	(jbus_clk));


     dffrl_ns u_ctu_efc_cken_jl( .rst_l	(start_clk_jl),

				.q	(ctu_efc_cken_jl),

				.din	(ctu_efc_cken_pre_jl),
				.clk	(jbus_clk));



     assign ctu_jbusl_cken_jl_nxt =  start_clk_jl ? ctu_jbusl_cken_pre_jl : 1'b1;
 
     dffsl_async_ns u_ctu_jbusl_cken_jl(
				   .din	(ctu_jbusl_cken_jl_nxt),


					.q(ctu_jbusl_cken_jl),

					.clk(jbus_clk),
					.set_l(io_pwron_rst_l));


     assign ctu_jbusr_cken_jl_nxt =   start_clk_jl ?  ctu_jbusr_cken_pre_jl: 1'b1;

     dffsl_async_ns u_ctu_jbusr_cken_jl( 
				   .din	(ctu_jbusr_cken_jl_nxt),


					.q(ctu_jbusr_cken_jl),

					.clk(jbus_clk),
					.set_l(io_pwron_rst_l));



     dffrl_ns u_ctu_jbi_cken_jl( .rst_l	(start_clk_jl),

				.q	(ctu_jbi_cken_jl),

				.din	(ctu_jbi_cken_pre_jl),
				.clk	(jbus_clk));


     assign ctu_dbg_cken_jl_nxt =   start_clk_jl ?  ctu_dbg_cken_pre_jl: 1'b1;


     dffsl_async_ns u_ctu_dbg_cken_jl( .set_l	(io_pwron_rst_l),

				      .q(ctu_dbg_cken_jl),

				      .din(ctu_dbg_cken_jl_nxt),
				      .clk(jbus_clk));


     assign ctu_misc_cken_jl_nxt =   start_clk_jl ?  ctu_misc_cken_pre_jl: 1'b1;


     dffsl_async_ns u_ctu_misc_cken_jl( .set_l	(io_pwron_rst_l),

				       .q(ctu_misc_cken_jl),

				       .din(ctu_misc_cken_jl_nxt),
				       .clk(jbus_clk));


     dff_ns u_iob_ctu_l2_tr_jl(

			       .q	(iob_ctu_l2_tr_jl),

			       .din	(iob_ctu_l2_tr),
			       .clk	(jbus_clk));



     dff_ns u_iob_ctu_tr_jl(

			    .q		(iob_ctu_tr_jl),

			    .din	(iob_ctu_tr),
			    .clk	(jbus_clk));


     dff_ns u_jbi_ctu_tr_jl(

			    .q		(jbi_ctu_tr_jl),

			    .din	(jbi_ctu_tr),
			    .clk	(jbus_clk));


     dff_ns u_dram02_ctu_tr_jl (

				.q	(dram02_ctu_tr_jl),

				.din	(dram02_ctu_tr),
				.clk	(jbus_clk));
     dff_ns u_dram13_ctu_tr_jl (

				.q	(dram13_ctu_tr_jl),

				.din	(dram13_ctu_tr),
				.clk	(jbus_clk));


endmodule
module ctu_clsp_synch_cljl(

jbi_ctu_tr_jl, iob_ctu_tr_jl, iob_ctu_l2_tr_jl, dram13_ctu_tr_jl, 
dram02_ctu_tr_jl, ctu_misc_cken_jl, ctu_jbusr_cken_jl, 
ctu_jbusl_cken_jl, ctu_jbi_cken_jl, ctu_iob_cken_jl, ctu_efc_cken_jl, 
ctu_dram13_cken_jl, ctu_dram02_cken_jl, ctu_dbg_cken_jl, 
clsp_ctrl_srarm_jl, 

jbus_clk, jbi_ctu_tr, iob_ctu_tr, iob_ctu_l2_tr, io_pwron_rst_l, 
dram13_ctu_tr, dram02_ctu_tr, ctu_jbi_cken_pre_jl, 
ctu_iob_cken_pre_jl, ctu_efc_cken_pre_jl, ctu_dram13_cken_pre_jl, 
ctu_dram02_cken_pre_jl, clsp_ctrl_srarm_pre_jl, start_clk_jl, 
ctu_jbusl_cken_pre_jl, ctu_jbusr_cken_pre_jl, ctu_misc_cken_pre_jl, 
ctu_dbg_cken_pre_jl
);




input			clsp_ctrl_srarm_pre_jl;
input			ctu_dram02_cken_pre_jl;
input			ctu_dram13_cken_pre_jl;
input			ctu_efc_cken_pre_jl;
input			ctu_iob_cken_pre_jl;
input			ctu_jbi_cken_pre_jl;
input			dram02_ctu_tr;
input			dram13_ctu_tr;
input			io_pwron_rst_l;
input			iob_ctu_l2_tr;
input			iob_ctu_tr;
input			jbi_ctu_tr;
input			jbus_clk;

input                   start_clk_jl;
input 			ctu_jbusl_cken_pre_jl;
input 			ctu_jbusr_cken_pre_jl;
input 			ctu_misc_cken_pre_jl;
input                   ctu_dbg_cken_pre_jl;


output			clsp_ctrl_srarm_jl;
output			ctu_dbg_cken_jl;
output			ctu_dram02_cken_jl;
output			ctu_dram13_cken_jl;
output			ctu_efc_cken_jl;
output			ctu_iob_cken_jl;
output			ctu_jbi_cken_jl;
output			ctu_jbusl_cken_jl;
output			ctu_jbusr_cken_jl;
output			ctu_misc_cken_jl;
output			dram02_ctu_tr_jl;
output			dram13_ctu_tr_jl;
output			iob_ctu_l2_tr_jl;
output			iob_ctu_tr_jl;
output			jbi_ctu_tr_jl;




wire ctu_jbusl_cken_jl_nxt;
wire ctu_jbusr_cken_jl_nxt;
wire ctu_misc_cken_jl_nxt;
wire ctu_dbg_cken_jl_nxt;


     dffrl_ns u_clsp_ctrl_srarm_jl( .rst_l	(start_clk_jl),

				   .q	(clsp_ctrl_srarm_jl),

				   .din	(clsp_ctrl_srarm_pre_jl),
				   .clk	(jbus_clk));



     dffrl_ns u_ctu_dram02_cken_jl( .rst_l	(start_clk_jl),

				   .q	(ctu_dram02_cken_jl),

				   .din	(ctu_dram02_cken_pre_jl),
				   .clk	(jbus_clk));
     dffrl_ns u_ctu_dram13_cken_jl( .rst_l	(start_clk_jl),

				   .q	(ctu_dram13_cken_jl),

				   .din	(ctu_dram13_cken_pre_jl),
				   .clk	(jbus_clk));



     dffrl_ns u_ctu_iob_cken_jl( .rst_l	(start_clk_jl),

				.q	(ctu_iob_cken_jl),

				.din	(ctu_iob_cken_pre_jl),
				.clk	(jbus_clk));


     dffrl_ns u_ctu_efc_cken_jl( .rst_l	(start_clk_jl),

				.q	(ctu_efc_cken_jl),

				.din	(ctu_efc_cken_pre_jl),
				.clk	(jbus_clk));



     assign ctu_jbusl_cken_jl_nxt =  start_clk_jl ? ctu_jbusl_cken_pre_jl : 1'b1;
 
     dffsl_async_ns u_ctu_jbusl_cken_jl(
				   .din	(ctu_jbusl_cken_jl_nxt),


					.q(ctu_jbusl_cken_jl),

					.clk(jbus_clk),
					.set_l(io_pwron_rst_l));


     assign ctu_jbusr_cken_jl_nxt =   start_clk_jl ?  ctu_jbusr_cken_pre_jl: 1'b1;

     dffsl_async_ns u_ctu_jbusr_cken_jl( 
				   .din	(ctu_jbusr_cken_jl_nxt),


					.q(ctu_jbusr_cken_jl),

					.clk(jbus_clk),
					.set_l(io_pwron_rst_l));



     dffrl_ns u_ctu_jbi_cken_jl( .rst_l	(start_clk_jl),

				.q	(ctu_jbi_cken_jl),

				.din	(ctu_jbi_cken_pre_jl),
				.clk	(jbus_clk));


     assign ctu_dbg_cken_jl_nxt =   start_clk_jl ?  ctu_dbg_cken_pre_jl: 1'b1;


     dffsl_async_ns u_ctu_dbg_cken_jl( .set_l	(io_pwron_rst_l),

				      .q(ctu_dbg_cken_jl),

				      .din(ctu_dbg_cken_jl_nxt),
				      .clk(jbus_clk));


     assign ctu_misc_cken_jl_nxt =   start_clk_jl ?  ctu_misc_cken_pre_jl: 1'b1;


     dffsl_async_ns u_ctu_misc_cken_jl( .set_l	(io_pwron_rst_l),

				       .q(ctu_misc_cken_jl),

				       .din(ctu_misc_cken_jl_nxt),
				       .clk(jbus_clk));


     dff_ns u_iob_ctu_l2_tr_jl(

			       .q	(iob_ctu_l2_tr_jl),

			       .din	(iob_ctu_l2_tr),
			       .clk	(jbus_clk));



     dff_ns u_iob_ctu_tr_jl(

			    .q		(iob_ctu_tr_jl),

			    .din	(iob_ctu_tr),
			    .clk	(jbus_clk));


     dff_ns u_jbi_ctu_tr_jl(

			    .q		(jbi_ctu_tr_jl),

			    .din	(jbi_ctu_tr),
			    .clk	(jbus_clk));


     dff_ns u_dram02_ctu_tr_jl (

				.q	(dram02_ctu_tr_jl),

				.din	(dram02_ctu_tr),
				.clk	(jbus_clk));
     dff_ns u_dram13_ctu_tr_jl (

				.q	(dram13_ctu_tr_jl),

				.din	(dram13_ctu_tr),
				.clk	(jbus_clk));


endmodule