data/full_repos/permissive/435885222/sim/NCUT_MiniSys_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/435885222/sim/NCUT_MiniSys_tb.v:14: Unsupported: Ignoring delay on this delayed statement.\n        forever #10 CLOCK_50=~CLOCK_50;\n                ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/435885222/sim/NCUT_MiniSys_tb.v:17: Define or directive not defined: \'`RstEnable\'\n        rst=`RstEnable;\n            ^~~~~~~~~~\n%Error: data/full_repos/permissive/435885222/sim/NCUT_MiniSys_tb.v:17: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        rst=`RstEnable;\n                      ^\n%Error: data/full_repos/permissive/435885222/sim/NCUT_MiniSys_tb.v:18: Define or directive not defined: \'`RstDisable\'\n        #20 rst=`RstDisable;\n                ^~~~~~~~~~~\n%Error: data/full_repos/permissive/435885222/sim/NCUT_MiniSys_tb.v:18: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        #20 rst=`RstDisable;\n                           ^\n%Warning-STMTDLY: data/full_repos/permissive/435885222/sim/NCUT_MiniSys_tb.v:18: Unsupported: Ignoring delay on this delayed statement.\n        #20 rst=`RstDisable;\n        ^\n%Error: Exiting due to 4 error(s), 2 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module NCUT_MiniSys_tb();
    reg CLOCK_50;
    reg rst;
    initial begin
        CLOCK_50=1'b0;
        forever #10 CLOCK_50=~CLOCK_50;
    end
    initial begin
        rst=`RstEnable;
        #20 rst=`RstDisable;
    end
    NCUT_MiniSys NCUT_MiniSys0(
        .clk(CLOCK_50),
        .rst(rst)
    );
endmodule
module NCUT_MiniSys_tb();

    reg CLOCK_50;
    reg rst;
    initial begin
        CLOCK_50=1'b0;
        forever #10 CLOCK_50=~CLOCK_50;
    end
    initial begin
        rst=`RstEnable;
        #20 rst=`RstDisable;
    end
    NCUT_MiniSys NCUT_MiniSys0(
        .clk(CLOCK_50),
        .rst(rst)
    );
endmodule