data/full_repos/permissive/52666593/vga/vga.v
1: b"%Error: data/full_repos/permissive/52666593/vga/vga.v:7: syntax error, unexpected '(', expecting IDENTIFIER\nclock_divider(clk,div_clk);\n              ^~~\n%Error: Exiting due to 1 error(s)\n"
module vga(clk,reset,r,g,b,h_sync,v_sync);
input clk,reset;
output reg [2:0]r,g;
output reg [1:0]b;
output reg h_sync,v_sync;

clock_divider(clk,div_clk);
h_syncer(div_clk,h_sync,frame_complete);
v_syncer(div_clk,v_sync,frame_complete);
endmodule
module vga(clk,reset,r,g,b,h_sync,v_sync);

input clk,reset;
output reg [2:0]r,g;
output reg [1:0]b;
output reg h_sync,v_sync;

clock_divider(clk,div_clk);
h_syncer(div_clk,h_sync,frame_complete);
v_syncer(div_clk,v_sync,frame_complete);
endmodule