data/full_repos/permissive/502135797/Lab8_April_20_2022/Code/top.v
1: b"%Error: data/full_repos/permissive/502135797/Lab8_April_20_2022/Code/top.v:37: Cannot find file containing module: 'CLKMANAGER'\n    CLKMANAGER clockmanager_wrapper(\n    ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/502135797/Lab8_April_20_2022/Code,data/full_repos/permissive/502135797/CLKMANAGER\n             data/full_repos/permissive/502135797/Lab8_April_20_2022/Code,data/full_repos/permissive/502135797/CLKMANAGER.v\n             data/full_repos/permissive/502135797/Lab8_April_20_2022/Code,data/full_repos/permissive/502135797/CLKMANAGER.sv\n             CLKMANAGER\n             CLKMANAGER.v\n             CLKMANAGER.sv\n             obj_dir/CLKMANAGER\n             obj_dir/CLKMANAGER.v\n             obj_dir/CLKMANAGER.sv\n%Error: data/full_repos/permissive/502135797/Lab8_April_20_2022/Code/top.v:43: Cannot find file containing module: 'UPDOWN'\n    UPDOWN udcounter_wrappera(\n    ^~~~~~\n%Error: data/full_repos/permissive/502135797/Lab8_April_20_2022/Code/top.v:52: Cannot find file containing module: 'UPDOWN'\n    UPDOWN udcounter_wrapperb(\n    ^~~~~~\n%Error: data/full_repos/permissive/502135797/Lab8_April_20_2022/Code/top.v:62: Cannot find file containing module: 'BSUPDOWN'\nBSUPDOWN bsupdown_wrapper(\n^~~~~~~~\n%Error: data/full_repos/permissive/502135797/Lab8_April_20_2022/Code/top.v:68: Cannot find file containing module: 'FSM'\n FSM fsm_wrapper(\n ^~~\n%Error: data/full_repos/permissive/502135797/Lab8_April_20_2022/Code/top.v:78: Cannot find file containing module: 'BARSHI'\nBARSHI barshi_wrappera(\n^~~~~~\n%Error: data/full_repos/permissive/502135797/Lab8_April_20_2022/Code/top.v:85: Cannot find file containing module: 'BARSHI'\nBARSHI barshi_wrapperb(\n^~~~~~\n%Error: data/full_repos/permissive/502135797/Lab8_April_20_2022/Code/top.v:93: Cannot find file containing module: 'ALU'\n    ALU alu_wrapper(\n    ^~~\n%Error: data/full_repos/permissive/502135797/Lab8_April_20_2022/Code/top.v:100: Cannot find file containing module: 'SEGDRIVE'\n   SEGDRIVE seg7driver_wrapper(\n   ^~~~~~~~\n%Error: Exiting due to 9 error(s)\n"
module top(

    input clkt,
    input rstt,
    input [3:0] asw,
    input [3:0] bsw,
    input [3:0] cont,
    input aud,
    input aload,
    input bud,
    input bload,
    input [1:0] in,
    input button,




    output [6:0] Cnode1,
    output [7:0] AN1,
    output seg
    );

    wire [31:0] seg7Digit; 

    assign seg7Digit[3:0] = asw; 
    assign seg7Digit[7:4] = bsw; 


   
    
    wire [7:0] opc;
    
    wire slowclk_out;
    CLKMANAGER clockmanager_wrapper(
        .clk(clkt),
        .SW(cont),
        .clkout(slowclk_out)
    );

    UPDOWN udcounter_wrappera(
        .rst1(rstt),
        .load(aload),
        .clk1(slowclk_out), 
        .tmp(seg7Digit[11:8]),
        .a(asw),
        .ud(aud)
    );

    UPDOWN udcounter_wrapperb(
        .rst1(rstt),
        .load(bload),
        .clk1(slowclk_out), 
        .tmp(seg7Digit[19:16]),
        .a(bsw),
        .ud(bud)
    );
wire [1:0] sel1;
wire [1:0] sel2;
BSUPDOWN bsupdown_wrapper(
        .clk1(slowclk_out),
        .s0(sel1),
        .s1(sel2)
    );
wire [1:0] amscon;
 FSM fsm_wrapper(
    .in(in),
    .but(button),

    .outasm(amscon),
    .outsra(sra),
    .outsrb(srb)
    );
wire sra;
wire srb;
BARSHI barshi_wrappera(
        .B(seg7Digit[11:8]),
        .SW(sel1),
        .sel(sra),
        .P(seg7Digit[15:12])
    );

BARSHI barshi_wrapperb(
        .B(seg7Digit[19:16]),
        .SW(sel2),
        .sel(srb),
        .P(seg7Digit[23:20])
    );


    ALU alu_wrapper(
     .opa(seg7Digit[15:12]),
     .opb(seg7Digit[23:20]),
     .asm(in),
     .opc(seg7Digit[31:24])
    );
    
   SEGDRIVE seg7driver_wrapper(
        .nexysCLK(clkt), 
        .inDigit(seg7Digit),
         .Cnode(Cnode1),
        .dp(seg),
        .AN(AN1)
    );
    
    
    
    
endmodule
module top(

    input clkt,
    input rstt,
    input [3:0] asw,
    input [3:0] bsw,
    input [3:0] cont,
    input aud,
    input aload,
    input bud,
    input bload,
    input [1:0] in,
    input button,




    output [6:0] Cnode1,
    output [7:0] AN1,
    output seg
    );


    wire [31:0] seg7Digit; 

    assign seg7Digit[3:0] = asw; 
    assign seg7Digit[7:4] = bsw; 


   
    
    wire [7:0] opc;
    
    wire slowclk_out;
    CLKMANAGER clockmanager_wrapper(
        .clk(clkt),
        .SW(cont),
        .clkout(slowclk_out)
    );

    UPDOWN udcounter_wrappera(
        .rst1(rstt),
        .load(aload),
        .clk1(slowclk_out), 
        .tmp(seg7Digit[11:8]),
        .a(asw),
        .ud(aud)
    );

    UPDOWN udcounter_wrapperb(
        .rst1(rstt),
        .load(bload),
        .clk1(slowclk_out), 
        .tmp(seg7Digit[19:16]),
        .a(bsw),
        .ud(bud)
    );
wire [1:0] sel1;
wire [1:0] sel2;
BSUPDOWN bsupdown_wrapper(
        .clk1(slowclk_out),
        .s0(sel1),
        .s1(sel2)
    );
wire [1:0] amscon;
 FSM fsm_wrapper(
    .in(in),
    .but(button),

    .outasm(amscon),
    .outsra(sra),
    .outsrb(srb)
    );
wire sra;
wire srb;
BARSHI barshi_wrappera(
        .B(seg7Digit[11:8]),
        .SW(sel1),
        .sel(sra),
        .P(seg7Digit[15:12])
    );

BARSHI barshi_wrapperb(
        .B(seg7Digit[19:16]),
        .SW(sel2),
        .sel(srb),
        .P(seg7Digit[23:20])
    );


    ALU alu_wrapper(
     .opa(seg7Digit[15:12]),
     .opb(seg7Digit[23:20]),
     .asm(in),
     .opc(seg7Digit[31:24])
    );
    
   SEGDRIVE seg7driver_wrapper(
        .nexysCLK(clkt), 
        .inDigit(seg7Digit),
         .Cnode(Cnode1),
        .dp(seg),
        .AN(AN1)
    );
    
    
    
    
endmodule