data/full_repos/permissive/502764644/mpeg_audio_video/CLOCKGEN/CLOCKGEN.v
data/verilator_xmls/8be91024-5768-4de6-a5c2-9bebafc1ba92.xml
module DCM (CLKFB, CLKIN, DSSEN, PSCLK, PSEN, PSINCDEC, RST,
            CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180,
            CLKDV, CLKFX, CLKFX180, LOCKED, PSDONE, STATUS);

input CLKFB, CLKIN, DSSEN;
input PSCLK, PSEN, PSINCDEC, RST;

output CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180;
output CLKDV, CLKFX, CLKFX180, LOCKED, PSDONE;
output [7:0] STATUS;
endmodule
module DCM (CLKFB, CLKIN, DSSEN, PSCLK, PSEN, PSINCDEC, RST,
            CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180,
            CLKDV, CLKFX, CLKFX180, LOCKED, PSDONE, STATUS);


input CLKFB, CLKIN, DSSEN;
input PSCLK, PSEN, PSINCDEC, RST;

output CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180;
output CLKDV, CLKFX, CLKFX180, LOCKED, PSDONE;
output [7:0] STATUS;
endmodule