data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl/eth_parser.v
1: b'%Warning-IMPLICIT: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl/eth_parser.v:142: Signal definition not found, creating implicitly: \'empty\'\n   assign eth_parser_info_vld = !empty;\n                                 ^~~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl/eth_parser.v:107: Cannot find file containing module: \'fallthrough_small_fifo\'\n   fallthrough_small_fifo #(.WIDTH(4+NUM_QUEUES_WIDTH), .MAX_DEPTH_BITS(2))\n   ^~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl,data/full_repos/permissive/498471995/fallthrough_small_fifo\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl,data/full_repos/permissive/498471995/fallthrough_small_fifo.v\n             data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl,data/full_repos/permissive/498471995/fallthrough_small_fifo.sv\n             fallthrough_small_fifo\n             fallthrough_small_fifo.v\n             fallthrough_small_fifo.sv\n             obj_dir/fallthrough_small_fifo\n             obj_dir/fallthrough_small_fifo.v\n             obj_dir/fallthrough_small_fifo.sv\n%Error: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl/eth_parser.v:126: Cannot find file containing module: \'fallthrough_small_fifo\'\n  fallthrough_small_fifo #(.WIDTH(48+16), .MAX_DEPTH_BITS  (2))\n  ^~~~~~~~~~~~~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/std/cores/router_output_port_lookup_v1_0_0/hdl/eth_parser.v:195: Operator ASSIGN expects 3 bits on the Assign RHS, but Assign RHS\'s DIVS generates 32 or 4 bits.\n                                                                                                                                                               : ... In instance eth_parser\n              mac_count_next = NUM_QUEUES/2;\n                             ^\n%Error: Exiting due to 2 error(s), 2 warning(s)\n'
module eth_parser
    #(parameter C_S_AXIS_DATA_WIDTH	= 256,
      parameter NUM_QUEUES		= 8,
      parameter NUM_QUEUES_WIDTH	= log2(NUM_QUEUES)
      )
   (
    input  [C_S_AXIS_DATA_WIDTH-1:0]   tdata,
   

    output                             is_arp_pkt,
    output                             is_ip_pkt,
    output                             is_for_us,
    output                             is_broadcast,
    output [NUM_QUEUES_WIDTH-1:0]      mac_dst_port_num,
    input                              eth_parser_rd_info,
    output                             eth_parser_info_vld,


    input                              word_IP_DST_HI,


    input  [47:0]                      mac_0,
    input  [47:0]                      mac_1,
    input  [47:0]                      mac_2,
    input  [47:0]                      mac_3,



    input                              reset,
    input                              clk
   );

   function integer log2;
      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
   endfunction


   localparam				ETH_ARP	= 16'h0806;
   localparam				ETH_IP 	= 16'h0800;

   localparam                           IDLE		= 1;
   localparam                           DO_SEARCH	= 2;
   localparam				FLUSH_ENTRY	= 4;


   reg [47:0]                          dst_MAC;
   reg [47:0]                          mac_sel;
   reg [15:0]                          ethertype;

   reg                                 search_req;

   reg [2:0]                           state, state_next;
   reg [log2(NUM_QUEUES/2):0]          mac_count, mac_count_next;
   reg                                 wr_en;
   reg                                 port_found;

   wire                                broadcast_bit;

   wire [47:0]			       dst_MAC_fifo;
   wire [15:0]			       ethertype_fifo;
   reg				       rd_parser;
   wire				       parser_fifo_empty;


   fallthrough_small_fifo #(.WIDTH(4+NUM_QUEUES_WIDTH), .MAX_DEPTH_BITS(2))
      eth_fifo
        (.din ({port_found,
                (ethertype==ETH_ARP),
                (ethertype==ETH_IP),
                (broadcast_bit),
                {mac_count[log2(NUM_QUEUES/2)-1:0], 1'b0}}),
         .wr_en (wr_en),
         .rd_en (eth_parser_rd_info),
         .dout ({is_for_us, is_arp_pkt, is_ip_pkt, is_broadcast, mac_dst_port_num}),
         .full (),
         .nearly_full (),
         .prog_full (),
         .empty (empty),
         .reset (reset),
         .clk (clk)
         );


  fallthrough_small_fifo #(.WIDTH(48+16), .MAX_DEPTH_BITS  (2))
      parser
        (.din           ({dst_MAC,ethertype}),
         .wr_en         (search_req),
         .rd_en         (rd_parser),
         .dout          ({dst_MAC_fifo, ethertype_fifo}),
         .full          (),
         .nearly_full   (parser_fifo_nearly_full),
         .prog_full     (),
         .empty         (parser_fifo_empty),
         .reset         (reset),
         .clk           (clk)
         );



   assign eth_parser_info_vld = !empty;
   assign broadcast_bit = dst_MAC_fifo[40];

   always @(*) begin
      mac_sel = mac_0;
      case(mac_count)
         0: mac_sel = mac_0;
         1: mac_sel = mac_1;
         2: mac_sel = mac_2;
         3: mac_sel = mac_3;
         4: mac_sel = ~48'h0;
      endcase
   end


   always @(posedge clk) begin
      if(reset) begin
         dst_MAC    <= 0;
         ethertype  <= 0;
         search_req <= 0;
      end
      else begin
	 if(word_IP_DST_HI) begin
	    dst_MAC	<= tdata[255:208];
	    ethertype	<= tdata[159:144];
	    search_req	<= 1;
	 end
         else begin
            search_req     <= 0;
         end
      end
   end


   always @(*) begin

      state_next = state;
      mac_count_next = mac_count;
      wr_en = 0;
      port_found = 0;
      rd_parser = 0;

      case(state)

        IDLE: begin
           if(!parser_fifo_empty) begin
              state_next	= DO_SEARCH;
              mac_count_next	= NUM_QUEUES/2;
           end
        end

        DO_SEARCH: begin
           mac_count_next = mac_count-1;
           if(mac_sel==dst_MAC_fifo || broadcast_bit) begin
              wr_en		= 1;
              state_next	= FLUSH_ENTRY;
              port_found	= 1;
           end
           else if(mac_count == 0) begin
              state_next	= FLUSH_ENTRY;
              wr_en 		= 1;
           end
        end

	FLUSH_ENTRY: begin
		rd_parser	= 1;
		state_next	= IDLE;
	end

      endcase

   end


   always @(posedge clk) begin
      if(reset) begin
         state		<= IDLE;
         mac_count	<= 0;
      end
      else begin
         state		<= state_next;
         mac_count	<= mac_count_next;
      end
   end

endmodule
module eth_parser
    #(parameter C_S_AXIS_DATA_WIDTH	= 256,
      parameter NUM_QUEUES		= 8,
      parameter NUM_QUEUES_WIDTH	= log2(NUM_QUEUES)
      )
   (
    input  [C_S_AXIS_DATA_WIDTH-1:0]   tdata,
   

    output                             is_arp_pkt,
    output                             is_ip_pkt,
    output                             is_for_us,
    output                             is_broadcast,
    output [NUM_QUEUES_WIDTH-1:0]      mac_dst_port_num,
    input                              eth_parser_rd_info,
    output                             eth_parser_info_vld,


    input                              word_IP_DST_HI,


    input  [47:0]                      mac_0,
    input  [47:0]                      mac_1,
    input  [47:0]                      mac_2,
    input  [47:0]                      mac_3,



    input                              reset,
    input                              clk
   );


   function integer log2;
      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
   endfunction


   localparam				ETH_ARP	= 16'h0806;
   localparam				ETH_IP 	= 16'h0800;

   localparam                           IDLE		= 1;
   localparam                           DO_SEARCH	= 2;
   localparam				FLUSH_ENTRY	= 4;


   reg [47:0]                          dst_MAC;
   reg [47:0]                          mac_sel;
   reg [15:0]                          ethertype;

   reg                                 search_req;

   reg [2:0]                           state, state_next;
   reg [log2(NUM_QUEUES/2):0]          mac_count, mac_count_next;
   reg                                 wr_en;
   reg                                 port_found;

   wire                                broadcast_bit;

   wire [47:0]			       dst_MAC_fifo;
   wire [15:0]			       ethertype_fifo;
   reg				       rd_parser;
   wire				       parser_fifo_empty;


   fallthrough_small_fifo #(.WIDTH(4+NUM_QUEUES_WIDTH), .MAX_DEPTH_BITS(2))
      eth_fifo
        (.din ({port_found,
                (ethertype==ETH_ARP),
                (ethertype==ETH_IP),
                (broadcast_bit),
                {mac_count[log2(NUM_QUEUES/2)-1:0], 1'b0}}),
         .wr_en (wr_en),
         .rd_en (eth_parser_rd_info),
         .dout ({is_for_us, is_arp_pkt, is_ip_pkt, is_broadcast, mac_dst_port_num}),
         .full (),
         .nearly_full (),
         .prog_full (),
         .empty (empty),
         .reset (reset),
         .clk (clk)
         );


  fallthrough_small_fifo #(.WIDTH(48+16), .MAX_DEPTH_BITS  (2))
      parser
        (.din           ({dst_MAC,ethertype}),
         .wr_en         (search_req),
         .rd_en         (rd_parser),
         .dout          ({dst_MAC_fifo, ethertype_fifo}),
         .full          (),
         .nearly_full   (parser_fifo_nearly_full),
         .prog_full     (),
         .empty         (parser_fifo_empty),
         .reset         (reset),
         .clk           (clk)
         );



   assign eth_parser_info_vld = !empty;
   assign broadcast_bit = dst_MAC_fifo[40];

   always @(*) begin
      mac_sel = mac_0;
      case(mac_count)
         0: mac_sel = mac_0;
         1: mac_sel = mac_1;
         2: mac_sel = mac_2;
         3: mac_sel = mac_3;
         4: mac_sel = ~48'h0;
      endcase
   end


   always @(posedge clk) begin
      if(reset) begin
         dst_MAC    <= 0;
         ethertype  <= 0;
         search_req <= 0;
      end
      else begin
	 if(word_IP_DST_HI) begin
	    dst_MAC	<= tdata[255:208];
	    ethertype	<= tdata[159:144];
	    search_req	<= 1;
	 end
         else begin
            search_req     <= 0;
         end
      end
   end


   always @(*) begin

      state_next = state;
      mac_count_next = mac_count;
      wr_en = 0;
      port_found = 0;
      rd_parser = 0;

      case(state)

        IDLE: begin
           if(!parser_fifo_empty) begin
              state_next	= DO_SEARCH;
              mac_count_next	= NUM_QUEUES/2;
           end
        end

        DO_SEARCH: begin
           mac_count_next = mac_count-1;
           if(mac_sel==dst_MAC_fifo || broadcast_bit) begin
              wr_en		= 1;
              state_next	= FLUSH_ENTRY;
              port_found	= 1;
           end
           else if(mac_count == 0) begin
              state_next	= FLUSH_ENTRY;
              wr_en 		= 1;
           end
        end

	FLUSH_ENTRY: begin
		rd_parser	= 1;
		state_next	= IDLE;
	end

      endcase

   end


   always @(posedge clk) begin
      if(reset) begin
         state		<= IDLE;
         mac_count	<= 0;
      end
      else begin
         state		<= state_next;
         mac_count	<= mac_count_next;
      end
   end

endmodule