data/full_repos/permissive/449071180/tb_position_recorder.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:38: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:40: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:42: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:53: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:55: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:63: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:65: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:73: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:75: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:79: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:81: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:89: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:91: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:93: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:95: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:97: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:105: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:107: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:115: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:117: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:125: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:127: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:135: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:138: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:140: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:142: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:150: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:152: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:160: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:162: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:170: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:172: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:175: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:177: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:185: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:187: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:195: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:197: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:205: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:207: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:215: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:217: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:225: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:227: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:233: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/449071180/tb_position_recorder.v:235: Unsupported: Ignoring delay on this delayed statement.\n#5;\n^\n%Error: data/full_repos/permissive/449071180/tb_position_recorder.v:13: Cannot find file containing module: \'position_recorder\'\nposition_recorder port_map(\n^~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/449071180,data/full_repos/permissive/449071180/position_recorder\n             data/full_repos/permissive/449071180,data/full_repos/permissive/449071180/position_recorder.v\n             data/full_repos/permissive/449071180,data/full_repos/permissive/449071180/position_recorder.sv\n             position_recorder\n             position_recorder.v\n             position_recorder.sv\n             obj_dir/position_recorder\n             obj_dir/position_recorder.v\n             obj_dir/position_recorder.sv\n%Error: Exiting due to 1 error(s), 46 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module tb_position_recorder();


 reg clk_test,reset_test;
 reg l_test,r_test,u_test,d_test;
 wire[2:0] motion_x_test;
 wire[2:0] motion_y_test;
 wire edge_collision_test;
 reg load_test;
 reg [2:0]load_x_test;
 reg [2:0] load_y_test;
  
position_recorder port_map(
.clk(clk_test),
.reset(reset_test),
.l(l_test),
.r(r_test),
.u(u_test),
.d(d_test),
.motion_x(motion_x_test),
.motion_y(motion_y_test),
.edge_collision(edge_collision_test),
.load(load_test),
.load_x(load_x_test),
.load_y(load_y_test)
);

initial begin
load_test =0;
load_x_test = 3'b0;
load_y_test = 3'b0;
clk_test = 0;
reset_test =0;
l_test = 0;
r_test = 0;
u_test = 0;
d_test = 0;
#5;
reset_test = 1;
#5;
reset_test = 0;
#5;
end

always begin 
l_test = 0;
r_test = 0;
u_test = 0;
d_test = 0;


clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 1;
r_test = 0;
u_test = 0;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 1;
r_test = 0;
u_test = 0;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;


clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 1;
r_test = 0;
u_test = 0;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

#5;
reset_test = 1;
#5;
reset_test = 0;
#5;

l_test = 0;
r_test = 1;
u_test = 0;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 1;
u_test = 0;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 1;
u_test = 0;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 1;
u_test = 0;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;

#5;
reset_test = 1;
#5;
reset_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 0;
d_test = 1;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 0;
d_test = 1;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 0;
d_test = 1;

clk_test = 1;
#5;
clk_test = 0;
#5;

reset_test = 1;
#5;
reset_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 1;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 1;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 1;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 1;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 1;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

load_x_test = 3'b011;
load_y_test = 3'b011;

load_test = 0;
#5;
load_test = 1;
#5;
load_test =0;




end



endmodule
module tb_position_recorder();



 reg clk_test,reset_test;
 reg l_test,r_test,u_test,d_test;
 wire[2:0] motion_x_test;
 wire[2:0] motion_y_test;
 wire edge_collision_test;
 reg load_test;
 reg [2:0]load_x_test;
 reg [2:0] load_y_test;
  
position_recorder port_map(
.clk(clk_test),
.reset(reset_test),
.l(l_test),
.r(r_test),
.u(u_test),
.d(d_test),
.motion_x(motion_x_test),
.motion_y(motion_y_test),
.edge_collision(edge_collision_test),
.load(load_test),
.load_x(load_x_test),
.load_y(load_y_test)
);

initial begin
load_test =0;
load_x_test = 3'b0;
load_y_test = 3'b0;
clk_test = 0;
reset_test =0;
l_test = 0;
r_test = 0;
u_test = 0;
d_test = 0;
#5;
reset_test = 1;
#5;
reset_test = 0;
#5;
end

always begin 
l_test = 0;
r_test = 0;
u_test = 0;
d_test = 0;


clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 1;
r_test = 0;
u_test = 0;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 1;
r_test = 0;
u_test = 0;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;


clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 1;
r_test = 0;
u_test = 0;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

#5;
reset_test = 1;
#5;
reset_test = 0;
#5;

l_test = 0;
r_test = 1;
u_test = 0;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 1;
u_test = 0;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 1;
u_test = 0;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 1;
u_test = 0;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;

#5;
reset_test = 1;
#5;
reset_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 0;
d_test = 1;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 0;
d_test = 1;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 0;
d_test = 1;

clk_test = 1;
#5;
clk_test = 0;
#5;

reset_test = 1;
#5;
reset_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 1;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 1;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 1;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 1;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

l_test = 0;
r_test = 0;
u_test = 1;
d_test = 0;

clk_test = 1;
#5;
clk_test = 0;
#5;

load_x_test = 3'b011;
load_y_test = 3'b011;

load_test = 0;
#5;
load_test = 1;
#5;
load_test =0;




end



endmodule