data/full_repos/permissive/482974936/MultiCycle.srcs/sources_1/new/SE.v
1: b'%Warning-SELRANGE: data/full_repos/permissive/482974936/MultiCycle.srcs/sources_1/new/SE.v:9: Selection index out of range: 32:16 outside 31:0\n                                                                                            : ... In instance SE\n    assign SImm[32:16] = Imm[15]?16\'b1111_1111_1111_1111:16\'b0;  \n               ^\n                   ... Use "/* verilator lint_off SELRANGE */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/482974936/MultiCycle.srcs/sources_1/new/SE.v:9: Operator COND expects 17 bits on the Conditional True, but Conditional True\'s CONST \'16\'hffff\' generates 16 bits.\n                                                                                         : ... In instance SE\n    assign SImm[32:16] = Imm[15]?16\'b1111_1111_1111_1111:16\'b0;  \n                                ^\n%Warning-WIDTH: data/full_repos/permissive/482974936/MultiCycle.srcs/sources_1/new/SE.v:9: Operator COND expects 17 bits on the Conditional False, but Conditional False\'s CONST \'16\'h0\' generates 16 bits.\n                                                                                         : ... In instance SE\n    assign SImm[32:16] = Imm[15]?16\'b1111_1111_1111_1111:16\'b0;  \n                                ^\n%Error: Exiting due to 3 warning(s)\n'
module SE(
    input [15:0] Imm,
    output [31:0] SImm
    );
    
    assign SImm[15:0] = Imm[15:0];
    assign SImm[32:16] = Imm[15]?16'b1111_1111_1111_1111:16'b0;
endmodule
module SE(
    input [15:0] Imm,
    output [31:0] SImm
    );

    
    assign SImm[15:0] = Imm[15:0];
    assign SImm[32:16] = Imm[15]?16'b1111_1111_1111_1111:16'b0;
endmodule