data/full_repos/permissive/405799749/amg_new/mult/Unsigned/9/5/Simple_PPG/Wallace_tree/Han-Carlson_adder/module.v
data/verilator_xmls/72e5ceb7-1230-456d-98d4-39e8ca0391a6.xml
module UBPureHCA_12_4 (S, X, Y);
  output [13:4] S;
  input [12:4] X;
  input [12:4] Y;
  wire C;
  UBPriHCA_12_4 U0 (S, X, Y, C);
  UBZero_4_4 U1 (C);
endmodule
module UBPureHCA_12_4 (S, X, Y);

  output [13:4] S;
  input [12:4] X;
  input [12:4] Y;
  wire C;
  UBPriHCA_12_4 U0 (S, X, Y, C);
  UBZero_4_4 U1 (C);
endmodule