data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/xilinx/cores/tcam_v1_1_0/sim/testbench.v
1: b'%Error: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/xilinx/cores/tcam_v1_1_0/sim/testbench.v:35: syntax error, unexpected INTEGER NUMBER\n 16\n ^~\n%Error: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/xilinx/cores/tcam_v1_1_0/sim/testbench.v:66: syntax error, unexpected \'@\'\n      @(posedge CLK);\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/xilinx/cores/tcam_v1_1_0/sim/testbench.v:71: Unsupported: Ignoring delay on this delayed statement.\nalways #2.5 CLK=~CLK;\n       ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/498471995/sume/felix/simple_sume_switch/test/ip_repo/xilinx/cores/tcam_v1_1_0/sim/testbench.v:82: syntax error, unexpected INTEGER NUMBER\n 16\n ^~\n%Error: Exiting due to 3 error(s), 1 warning(s)\n'
module testbench();

reg   CLK, RSTN;
integer i;

`ifdef 16d
localparam  ADDR_WIDTH = 5;
localparam  DATA_WIDTH = 16;
`elsif 32d
localparam  ADDR_WIDTH = 5;
localparam  DATA_WIDTH = 32;
`elsif 48d
localparam  ADDR_WIDTH = 5;
localparam  DATA_WIDTH = 48;
`else
localparam  ADDR_WIDTH = 5;
localparam  DATA_WIDTH = 16;
`endif


reg   WE;
reg   [ADDR_WIDTH-1:0]  ADDR_WR;
reg   [DATA_WIDTH-1:0]  DIN, DATA_MASK;
reg   [DATA_WIDTH-1:0]  CMP_DIN, CMP_DATA_MASK;

wire  BUSY;
wire  MATCH;
wire  [ADDR_WIDTH-1:0]  MATCH_ADDR;

reg   [7:0] match_cnt;


initial begin
   CLK = 0;
   RSTN = 0;
   for (i=0; i<100; i=i+1) begin
      @(posedge CLK);
   end
   RSTN = 1;
end

always #2.5 CLK=~CLK;

reg   [31:0]   count;
always @(posedge CLK)
   if (~RSTN) begin
      count <= 0;
   end
   else begin
      count <= count + 1;
   end

`ifdef 16d
always @(*) begin
   WE             = 0;
   ADDR_WR        = 0;
   DIN            = 0;
   DATA_MASK      = 0;
   CMP_DIN        = 0;
   CMP_DATA_MASK  = 0;

   if (count == 100) begin
      WE       = 1;
      ADDR_WR  = 5'h0;
      DIN      = 16'h1234;
   end
   if (count == 120) begin
      WE       = 1;
      ADDR_WR  = 5'hf;
      DIN      = 16'habcd;
   end
   if (count == 140) begin
      WE       = 1;
      ADDR_WR  = 5'h1e;
      DIN      = 16'h5678;
   end

   if (count == 200) begin
      CMP_DIN  = 16'h1234;
   end
   if (count == 220) begin
      CMP_DIN  = 16'habcd;
   end
   if (count == 240) begin
      CMP_DIN  = 16'h5678;
   end
   if (count == 300) begin
      if (match_cnt == 3)
         $display ("\nPASS : Three matches...!");
      else
         $display ("\nFAIL : Match failed...!");
      $display ("\n\n");
      $display ("Simulation finish...\n");
      $finish;
   end
end
`elsif 32d
always @(*) begin
   WE             = 0;
   ADDR_WR        = 0;
   DIN            = 0;
   DATA_MASK      = 0;
   CMP_DIN        = 0;
   CMP_DATA_MASK  = 0;

   if (count == 100) begin
      WE       = 1;
      ADDR_WR  = 5'h0;
      DIN      = 32'h12341234;
   end
   if (count == 120) begin
      WE       = 1;
      ADDR_WR  = 5'hf;
      DIN      = 32'habcdabcd;
   end
   if (count == 140) begin
      WE       = 1;
      ADDR_WR  = 5'h1e;
      DIN      = 32'h56785678;
   end

   if (count == 200) begin
      CMP_DIN  = 32'h12341234;
   end
   if (count == 220) begin
      CMP_DIN  = 32'habcdabcd;
   end
   if (count == 240) begin
      CMP_DIN  = 32'h56785678;
   end
   if (count == 300) begin
      if (match_cnt == 3)
         $display ("\nPASS : Three matches...!");
      else
         $display ("\nFAIL : Match failed...!");
      $display ("\n\n");
      $display ("Simulation finish...\n");
      $finish;
   end
end
`elsif 48d
always @(*) begin
   WE             = 0;
   ADDR_WR        = 0;
   DIN            = 0;
   DATA_MASK      = 0;
   CMP_DIN        = 0;
   CMP_DATA_MASK  = 0;

   if (count == 100) begin
      WE       = 1;
      ADDR_WR  = 5'h0;
      DIN      = 48'h123412341234;
   end
   if (count == 120) begin
      WE       = 1;
      ADDR_WR  = 5'hf;
      DIN      = 48'habcdabcdabcd;
   end
   if (count == 140) begin
      WE       = 1;
      ADDR_WR  = 5'h1e;
      DIN      = 48'h567856785678;
   end

   if (count == 200) begin
      CMP_DIN  = 48'h123412341234;
   end
   if (count == 220) begin
      CMP_DIN  = 48'habcdabcdabcd;
   end
   if (count == 240) begin
      CMP_DIN  = 48'h567856785678;
   end
   if (count == 300) begin
      if (match_cnt == 3)
         $display ("\nPASS : Three matches...!");
      else
         $display ("\nFAIL : Match failed...!");
      $display ("\n\n");
      $display ("Simulation finish...\n");
      $finish;
   end
end
`endif

always @(posedge CLK)
   if (~RSTN)
      match_cnt   <= 0;
   else if (MATCH)
      match_cnt   <= match_cnt + 1;


tcam 
#(
  .C_TCAM_ADDR_WIDTH   (  ADDR_WIDTH        ),
  .C_TCAM_DATA_WIDTH   (  DATA_WIDTH        )
)
sume_tcam
(
   .CLK              (  CLK               ),
   .WE               (  WE                ),
   .ADDR_WR          (  ADDR_WR           ),
   .DIN              (  DIN               ),
   .DATA_MASK        (  DATA_MASK         ),
   .BUSY             (  BUSY              ),

   .CMP_DIN          (  CMP_DIN           ),
   .CMP_DATA_MASK    (  CMP_DATA_MASK     ),
   .MATCH            (  MATCH             ),
   .MATCH_ADDR       (  MATCH_ADDR        )
);

endmodule
module testbench();


reg   CLK, RSTN;
integer i;

`ifdef 16d
localparam  ADDR_WIDTH = 5;
localparam  DATA_WIDTH = 16;
`elsif 32d
localparam  ADDR_WIDTH = 5;
localparam  DATA_WIDTH = 32;
`elsif 48d
localparam  ADDR_WIDTH = 5;
localparam  DATA_WIDTH = 48;
`else
localparam  ADDR_WIDTH = 5;
localparam  DATA_WIDTH = 16;
`endif


reg   WE;
reg   [ADDR_WIDTH-1:0]  ADDR_WR;
reg   [DATA_WIDTH-1:0]  DIN, DATA_MASK;
reg   [DATA_WIDTH-1:0]  CMP_DIN, CMP_DATA_MASK;

wire  BUSY;
wire  MATCH;
wire  [ADDR_WIDTH-1:0]  MATCH_ADDR;

reg   [7:0] match_cnt;


initial begin
   CLK = 0;
   RSTN = 0;
   for (i=0; i<100; i=i+1) begin
      @(posedge CLK);
   end
   RSTN = 1;
end

always #2.5 CLK=~CLK;

reg   [31:0]   count;
always @(posedge CLK)
   if (~RSTN) begin
      count <= 0;
   end
   else begin
      count <= count + 1;
   end

`ifdef 16d
always @(*) begin
   WE             = 0;
   ADDR_WR        = 0;
   DIN            = 0;
   DATA_MASK      = 0;
   CMP_DIN        = 0;
   CMP_DATA_MASK  = 0;

   if (count == 100) begin
      WE       = 1;
      ADDR_WR  = 5'h0;
      DIN      = 16'h1234;
   end
   if (count == 120) begin
      WE       = 1;
      ADDR_WR  = 5'hf;
      DIN      = 16'habcd;
   end
   if (count == 140) begin
      WE       = 1;
      ADDR_WR  = 5'h1e;
      DIN      = 16'h5678;
   end

   if (count == 200) begin
      CMP_DIN  = 16'h1234;
   end
   if (count == 220) begin
      CMP_DIN  = 16'habcd;
   end
   if (count == 240) begin
      CMP_DIN  = 16'h5678;
   end
   if (count == 300) begin
      if (match_cnt == 3)
         $display ("\nPASS : Three matches...!");
      else
         $display ("\nFAIL : Match failed...!");
      $display ("\n\n");
      $display ("Simulation finish...\n");
      $finish;
   end
end
`elsif 32d
always @(*) begin
   WE             = 0;
   ADDR_WR        = 0;
   DIN            = 0;
   DATA_MASK      = 0;
   CMP_DIN        = 0;
   CMP_DATA_MASK  = 0;

   if (count == 100) begin
      WE       = 1;
      ADDR_WR  = 5'h0;
      DIN      = 32'h12341234;
   end
   if (count == 120) begin
      WE       = 1;
      ADDR_WR  = 5'hf;
      DIN      = 32'habcdabcd;
   end
   if (count == 140) begin
      WE       = 1;
      ADDR_WR  = 5'h1e;
      DIN      = 32'h56785678;
   end

   if (count == 200) begin
      CMP_DIN  = 32'h12341234;
   end
   if (count == 220) begin
      CMP_DIN  = 32'habcdabcd;
   end
   if (count == 240) begin
      CMP_DIN  = 32'h56785678;
   end
   if (count == 300) begin
      if (match_cnt == 3)
         $display ("\nPASS : Three matches...!");
      else
         $display ("\nFAIL : Match failed...!");
      $display ("\n\n");
      $display ("Simulation finish...\n");
      $finish;
   end
end
`elsif 48d
always @(*) begin
   WE             = 0;
   ADDR_WR        = 0;
   DIN            = 0;
   DATA_MASK      = 0;
   CMP_DIN        = 0;
   CMP_DATA_MASK  = 0;

   if (count == 100) begin
      WE       = 1;
      ADDR_WR  = 5'h0;
      DIN      = 48'h123412341234;
   end
   if (count == 120) begin
      WE       = 1;
      ADDR_WR  = 5'hf;
      DIN      = 48'habcdabcdabcd;
   end
   if (count == 140) begin
      WE       = 1;
      ADDR_WR  = 5'h1e;
      DIN      = 48'h567856785678;
   end

   if (count == 200) begin
      CMP_DIN  = 48'h123412341234;
   end
   if (count == 220) begin
      CMP_DIN  = 48'habcdabcdabcd;
   end
   if (count == 240) begin
      CMP_DIN  = 48'h567856785678;
   end
   if (count == 300) begin
      if (match_cnt == 3)
         $display ("\nPASS : Three matches...!");
      else
         $display ("\nFAIL : Match failed...!");
      $display ("\n\n");
      $display ("Simulation finish...\n");
      $finish;
   end
end
`endif

always @(posedge CLK)
   if (~RSTN)
      match_cnt   <= 0;
   else if (MATCH)
      match_cnt   <= match_cnt + 1;


tcam 
#(
  .C_TCAM_ADDR_WIDTH   (  ADDR_WIDTH        ),
  .C_TCAM_DATA_WIDTH   (  DATA_WIDTH        )
)
sume_tcam
(
   .CLK              (  CLK               ),
   .WE               (  WE                ),
   .ADDR_WR          (  ADDR_WR           ),
   .DIN              (  DIN               ),
   .DATA_MASK        (  DATA_MASK         ),
   .BUSY             (  BUSY              ),

   .CMP_DIN          (  CMP_DIN           ),
   .CMP_DATA_MASK    (  CMP_DATA_MASK     ),
   .MATCH            (  MATCH             ),
   .MATCH_ADDR       (  MATCH_ADDR        )
);

endmodule