data/full_repos/permissive/509468557/generators/cva6/src/main/resources/vsrc/cva6/src/common_cells/test/addr_decode_tb.sv
1: b'%Warning-STMTDLY: data/full_repos/permissive/509468557/generators/cva6/src/main/resources/vsrc/cva6/src/common_cells/test/addr_decode_tb.sv:64: Unsupported: Ignoring delay on this delayed statement.\n    #500;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/509468557/generators/cva6/src/main/resources/vsrc/cva6/src/common_cells/test/addr_decode_tb.sv:70: Unsupported: Ignoring delay on this delayed statement.\n      #1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/509468557/generators/cva6/src/main/resources/vsrc/cva6/src/common_cells/test/addr_decode_tb.sv:75: Unsupported: Ignoring delay on this delayed statement.\n    #100;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/509468557/generators/cva6/src/main/resources/vsrc/cva6/src/common_cells/test/addr_decode_tb.sv:79: Unsupported: Ignoring delay on this delayed statement.\n    #100;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/509468557/generators/cva6/src/main/resources/vsrc/cva6/src/common_cells/test/addr_decode_tb.sv:84: Unsupported: Ignoring delay on this delayed statement.\n      #1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/509468557/generators/cva6/src/main/resources/vsrc/cva6/src/common_cells/test/addr_decode_tb.sv:86: Unsupported: Ignoring delay on this delayed statement.\n    #500\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/509468557/generators/cva6/src/main/resources/vsrc/cva6/src/common_cells/test/addr_decode_tb.sv:96: Unsupported: Ignoring delay on this delayed statement.\n  always @(addr) #0 begin : proc_check_decode\n                 ^\n%Warning-WIDTH: data/full_repos/permissive/509468557/generators/cva6/src/main/resources/vsrc/cva6/src/common_cells/test/addr_decode_tb.sv:100: Operator EQ expects 32 bits on the LHS, but LHS\'s VARREF \'idx\' generates 1 bits.\n                                                                                                                                             : ... In instance addr_decode_tb\n        check_decode: assert (idx == addr_map[i].idx) passed_checks++; else begin\n                                  ^~\n%Error: data/full_repos/permissive/509468557/generators/cva6/src/main/resources/vsrc/cva6/src/common_cells/test/addr_decode_tb.sv:132: Cannot find file containing module: \'addr_decode\'\n  addr_decode #(\n  ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/509468557/generators/cva6/src/main/resources/vsrc/cva6/src/common_cells/test,data/full_repos/permissive/509468557/addr_decode\n             data/full_repos/permissive/509468557/generators/cva6/src/main/resources/vsrc/cva6/src/common_cells/test,data/full_repos/permissive/509468557/addr_decode.v\n             data/full_repos/permissive/509468557/generators/cva6/src/main/resources/vsrc/cva6/src/common_cells/test,data/full_repos/permissive/509468557/addr_decode.sv\n             addr_decode\n             addr_decode.v\n             addr_decode.sv\n             obj_dir/addr_decode\n             obj_dir/addr_decode.v\n             obj_dir/addr_decode.sv\n%Error: Exiting due to 1 error(s), 8 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module addr_decode_tb;
  localparam int unsigned NoIndices =  2;
  localparam int unsigned NoRules   =  3;
  localparam int unsigned AddrWidth = 12;


  typedef logic [AddrWidth-1:0]         addr_t;
  typedef logic [$clog2(NoIndices)-1:0] idx_t;

  typedef struct packed {
    int unsigned idx;
    addr_t       start_addr;
    addr_t       end_addr;
  } tb_rule_t;


  localparam tb_rule_t [NoRules-1:0] map_0 = '{
    '{idx: 32'd0, start_addr: 12'h000, end_addr: 12'h010},
    '{idx: 32'd1, start_addr: 12'h010, end_addr: 12'h020},
    '{idx: 32'd0, start_addr: 12'hF00, end_addr: 12'hFFF}
  };


  localparam tb_rule_t [NoRules-1:0] map_1 = '{
    '{idx: 32'd0, start_addr: 12'h000, end_addr: 12'h010},
    '{idx: 32'd1, start_addr: 12'h00D, end_addr: 12'h020},
    '{idx: 32'd1, start_addr: 12'h100, end_addr: 12'hFFF}
  };


  addr_t                  addr;
  tb_rule_t [NoRules-1:0] addr_map;
  idx_t                   idx;
  logic                   dec_valid, dec_error;
  logic                   en_default_idx;
  idx_t                   default_idx;

  longint unsigned passed_checks = 0;
  longint unsigned failed_checks = 0;


  initial begin : stimulus
    passed_checks <= 0;
    failed_checks <= 0;
    addr_map       <= map_0;
    en_default_idx <= 1'b0;
    default_idx    <= idx_t'(1);
    #500;


    $info("Start address application");
    for (int i = 0; i < 2**AddrWidth; i++) begin
      addr <= addr_t'(i);
      #1;
    end

    $info("Change addr map to an overlapping one expect warning");
    addr_map <= map_1;
    #100;
    $info("Change addr map back and enable default decode to idx 1");
    addr_map       <= map_0;
    en_default_idx <= 1'b1;
    #100;


    for (int i = 0; i < 2**AddrWidth; i++) begin
      addr <= addr_t'(i);
      #1;
    end
    #500

    $info("Finished Simulation");
    $display("Passed: %d", passed_checks);
    $display("Failed: %d", failed_checks);
    $stop();
  end



  always @(addr) #0 begin : proc_check_decode
    for (int unsigned i = 0; i < NoRules; i++) begin
      if ((addr >= addr_map[i].start_addr) && (addr < addr_map[i].end_addr )) begin

        check_decode: assert (idx == addr_map[i].idx) passed_checks++; else begin
            failed_checks++;
            $warning("Decoder did not decode correctly.");
        end
        check_valid: assert (dec_valid == 1'b1 && dec_error == 1'b0) passed_checks++; else begin
            failed_checks++;
            $warning("Unexpected decode flag on assumed valid decode.");
        end
      end else begin

        if (dec_valid == 1'b0) begin
          if (en_default_idx) begin
            check_default: assert (default_idx == idx) passed_checks++; else begin
              failed_checks++;
              $warning("Enabled default index, however wrong default decoding.");
            end
            check_flags: assert (dec_error == 1'b0) passed_checks++; else begin
              failed_checks++;
              $warning("Unexpected decode flags on default decode enabled.");
            end
          end else begin
            check_error: assert (dec_error == 1'b1) passed_checks++; else begin
              failed_checks++;
              $warning("Unexpected decode flags on assumed decode error.");
            end
          end
        end
      end
    end
  end


  addr_decode #(
    .NoIndices ( NoIndices ),
    .NoRules   ( NoRules   ),
    .addr_t    ( addr_t    ),
    .rule_t    ( tb_rule_t )
  ) i_addr_decode_dut (
    .addr_i          ( addr           ),
    .addr_map_i      ( addr_map       ),
    .idx_o           ( idx            ),
    .dec_valid_o     ( dec_valid      ),
    .dec_error_o     ( dec_error      ),

    .en_default_idx_i( en_default_idx ),
    .default_idx_i   ( default_idx    )
  );
endmodule
module addr_decode_tb;

  localparam int unsigned NoIndices =  2;
  localparam int unsigned NoRules   =  3;
  localparam int unsigned AddrWidth = 12;


  typedef logic [AddrWidth-1:0]         addr_t;
  typedef logic [$clog2(NoIndices)-1:0] idx_t;

  typedef struct packed {
    int unsigned idx;
    addr_t       start_addr;
    addr_t       end_addr;
  } tb_rule_t;


  localparam tb_rule_t [NoRules-1:0] map_0 = '{
    '{idx: 32'd0, start_addr: 12'h000, end_addr: 12'h010},
    '{idx: 32'd1, start_addr: 12'h010, end_addr: 12'h020},
    '{idx: 32'd0, start_addr: 12'hF00, end_addr: 12'hFFF}
  };


  localparam tb_rule_t [NoRules-1:0] map_1 = '{
    '{idx: 32'd0, start_addr: 12'h000, end_addr: 12'h010},
    '{idx: 32'd1, start_addr: 12'h00D, end_addr: 12'h020},
    '{idx: 32'd1, start_addr: 12'h100, end_addr: 12'hFFF}
  };


  addr_t                  addr;
  tb_rule_t [NoRules-1:0] addr_map;
  idx_t                   idx;
  logic                   dec_valid, dec_error;
  logic                   en_default_idx;
  idx_t                   default_idx;

  longint unsigned passed_checks = 0;
  longint unsigned failed_checks = 0;


  initial begin : stimulus
    passed_checks <= 0;
    failed_checks <= 0;
    addr_map       <= map_0;
    en_default_idx <= 1'b0;
    default_idx    <= idx_t'(1);
    #500;


    $info("Start address application");
    for (int i = 0; i < 2**AddrWidth; i++) begin
      addr <= addr_t'(i);
      #1;
    end

    $info("Change addr map to an overlapping one expect warning");
    addr_map <= map_1;
    #100;
    $info("Change addr map back and enable default decode to idx 1");
    addr_map       <= map_0;
    en_default_idx <= 1'b1;
    #100;


    for (int i = 0; i < 2**AddrWidth; i++) begin
      addr <= addr_t'(i);
      #1;
    end
    #500

    $info("Finished Simulation");
    $display("Passed: %d", passed_checks);
    $display("Failed: %d", failed_checks);
    $stop();
  end



  always @(addr) #0 begin : proc_check_decode
    for (int unsigned i = 0; i < NoRules; i++) begin
      if ((addr >= addr_map[i].start_addr) && (addr < addr_map[i].end_addr )) begin

        check_decode: assert (idx == addr_map[i].idx) passed_checks++; else begin
            failed_checks++;
            $warning("Decoder did not decode correctly.");
        end
        check_valid: assert (dec_valid == 1'b1 && dec_error == 1'b0) passed_checks++; else begin
            failed_checks++;
            $warning("Unexpected decode flag on assumed valid decode.");
        end
      end else begin

        if (dec_valid == 1'b0) begin
          if (en_default_idx) begin
            check_default: assert (default_idx == idx) passed_checks++; else begin
              failed_checks++;
              $warning("Enabled default index, however wrong default decoding.");
            end
            check_flags: assert (dec_error == 1'b0) passed_checks++; else begin
              failed_checks++;
              $warning("Unexpected decode flags on default decode enabled.");
            end
          end else begin
            check_error: assert (dec_error == 1'b1) passed_checks++; else begin
              failed_checks++;
              $warning("Unexpected decode flags on assumed decode error.");
            end
          end
        end
      end
    end
  end


  addr_decode #(
    .NoIndices ( NoIndices ),
    .NoRules   ( NoRules   ),
    .addr_t    ( addr_t    ),
    .rule_t    ( tb_rule_t )
  ) i_addr_decode_dut (
    .addr_i          ( addr           ),
    .addr_map_i      ( addr_map       ),
    .idx_o           ( idx            ),
    .dec_valid_o     ( dec_valid      ),
    .dec_error_o     ( dec_error      ),

    .en_default_idx_i( en_default_idx ),
    .default_idx_i   ( default_idx    )
  );
endmodule