data/full_repos/permissive/515264683/vending_machine.v
data/verilator_xmls/f75de118-1543-4a2f-87e9-32bea8946526.xml
module vending_machine(input clk,rst,input [1:0]coin,output reg product,change);




reg[1:0]ps,ns;

parameter IDLE = 2'b00,
          S1   = 2'b01,
          S2   = 2'b10;


 
always@(posedge clk)
begin
 if (rst)
   ps<=IDLE;
 else
   ps<=ns;
end 



always@(ps,coin)
 begin
  ns = IDLE;
 case(ps)
  IDLE : if (coin==1)     ns = S1;
         else if(coin==2) ns = S2;
    S1 : if (coin==1)     ns = S2;
         else if(coin==2) ns = IDLE;
		 else             ns = S1;
	S2 : if ((coin==1)||(coin==2))    
                          ns = IDLE;
         else             ns = S2;
endcase
end



always@(posedge clk)
  begin
   product <= 1'b0;
   change <= 1'b0;
   case(ps)
       S1  : if (coin==2)
	         product <= 1;
	   S2  : if (coin==1)
			 product <= 1;
			else if (coin==2) 
			 begin
			 product <= 1;
			 change <= 1;
			 end
	endcase
  end
			 
endmodule
module vending_machine(input clk,rst,input [1:0]coin,output reg product,change);





reg[1:0]ps,ns;

parameter IDLE = 2'b00,
          S1   = 2'b01,
          S2   = 2'b10;


 
always@(posedge clk)
begin
 if (rst)
   ps<=IDLE;
 else
   ps<=ns;
end 



always@(ps,coin)
 begin
  ns = IDLE;
 case(ps)
  IDLE : if (coin==1)     ns = S1;
         else if(coin==2) ns = S2;
    S1 : if (coin==1)     ns = S2;
         else if(coin==2) ns = IDLE;
		 else             ns = S1;
	S2 : if ((coin==1)||(coin==2))    
                          ns = IDLE;
         else             ns = S2;
endcase
end



always@(posedge clk)
  begin
   product <= 1'b0;
   change <= 1'b0;
   case(ps)
       S1  : if (coin==2)
	         product <= 1;
	   S2  : if (coin==1)
			 product <= 1;
			else if (coin==2) 
			 begin
			 product <= 1;
			 change <= 1;
			 end
	endcase
  end
			 
endmodule