data/full_repos/permissive/441359809/test/mapper_test/output/result-with-resyn-resyn2-x10s/CM82_comb/CM82_comb.ifpga.lut.v
1: b"%Error: data/full_repos/permissive/441359809/test/mapper_test/output/result-with-resyn-resyn2-x10s/CM82_comb/CM82_comb.ifpga.lut.v:15: Cannot find file containing module: 'LUT3'\n LUT3 #(\n ^~~~\n        ... Looked in:\n             data/full_repos/permissive/441359809/test/mapper_test/output/result-with-resyn-resyn2-x10s/CM82_comb,data/full_repos/permissive/441359809/LUT3\n             data/full_repos/permissive/441359809/test/mapper_test/output/result-with-resyn-resyn2-x10s/CM82_comb,data/full_repos/permissive/441359809/LUT3.v\n             data/full_repos/permissive/441359809/test/mapper_test/output/result-with-resyn-resyn2-x10s/CM82_comb,data/full_repos/permissive/441359809/LUT3.sv\n             LUT3\n             LUT3.v\n             LUT3.sv\n             obj_dir/LUT3\n             obj_dir/LUT3.v\n             obj_dir/LUT3.sv\n%Error: data/full_repos/permissive/441359809/test/mapper_test/output/result-with-resyn-resyn2-x10s/CM82_comb/CM82_comb.ifpga.lut.v:23: Cannot find file containing module: 'LUT2'\n LUT2 #(\n ^~~~\n%Error: data/full_repos/permissive/441359809/test/mapper_test/output/result-with-resyn-resyn2-x10s/CM82_comb/CM82_comb.ifpga.lut.v:30: Cannot find file containing module: 'LUT3'\n LUT3 #(\n ^~~~\n%Error: data/full_repos/permissive/441359809/test/mapper_test/output/result-with-resyn-resyn2-x10s/CM82_comb/CM82_comb.ifpga.lut.v:38: Cannot find file containing module: 'LUT2'\n LUT2 #(\n ^~~~\n%Error: data/full_repos/permissive/441359809/test/mapper_test/output/result-with-resyn-resyn2-x10s/CM82_comb/CM82_comb.ifpga.lut.v:45: Cannot find file containing module: 'LUT3'\n LUT3 #(\n ^~~~\n%Error: Exiting due to 5 error(s)\n"
module top (a_pad, b_pad, c_pad, d_pad, e_pad, f_pad, g_pad, h_pad);
	input a_pad ;
	input b_pad ;
	input c_pad ;
	input d_pad ;
	input e_pad ;
	output f_pad ;
	output g_pad ;
	output h_pad ;
	wire _w11_ ;
	wire _w10_ ;
	wire _w9_ ;
	wire _w8_ ;
	wire _w7_ ;
	LUT3 #(
		.INIT('h96)
	) name0 (
		a_pad,
		b_pad,
		c_pad,
		_w7_
	);
	LUT2 #(
		.INIT('h6)
	) name1 (
		d_pad,
		e_pad,
		_w8_
	);
	LUT3 #(
		.INIT('h17)
	) name2 (
		a_pad,
		b_pad,
		c_pad,
		_w9_
	);
	LUT2 #(
		.INIT('h9)
	) name3 (
		_w8_,
		_w9_,
		_w10_
	);
	LUT3 #(
		.INIT('h8e)
	) name4 (
		d_pad,
		e_pad,
		_w9_,
		_w11_
	);
	assign f_pad = _w7_ ;
	assign g_pad = _w10_ ;
	assign h_pad = _w11_ ;
endmodule
module top (a_pad, b_pad, c_pad, d_pad, e_pad, f_pad, g_pad, h_pad);

	input a_pad ;
	input b_pad ;
	input c_pad ;
	input d_pad ;
	input e_pad ;
	output f_pad ;
	output g_pad ;
	output h_pad ;
	wire _w11_ ;
	wire _w10_ ;
	wire _w9_ ;
	wire _w8_ ;
	wire _w7_ ;
	LUT3 #(
		.INIT('h96)
	) name0 (
		a_pad,
		b_pad,
		c_pad,
		_w7_
	);
	LUT2 #(
		.INIT('h6)
	) name1 (
		d_pad,
		e_pad,
		_w8_
	);
	LUT3 #(
		.INIT('h17)
	) name2 (
		a_pad,
		b_pad,
		c_pad,
		_w9_
	);
	LUT2 #(
		.INIT('h9)
	) name3 (
		_w8_,
		_w9_,
		_w10_
	);
	LUT3 #(
		.INIT('h8e)
	) name4 (
		d_pad,
		e_pad,
		_w9_,
		_w11_
	);
	assign f_pad = _w7_ ;
	assign g_pad = _w10_ ;
	assign h_pad = _w11_ ;
endmodule