data/full_repos/permissive/493019833/test/testcase/firrtl/BlackBoxFloatTester/sbt/BlackBoxFloatTester.v
1: b"%Error: data/full_repos/permissive/493019833/test/testcase/firrtl/BlackBoxFloatTester/sbt/BlackBoxFloatTester.v:64: Cannot find file containing module: 'BBFAdd'\n  BBFAdd BBFAdd (  \n  ^~~~~~\n        ... Looked in:\n             data/full_repos/permissive/493019833/test/testcase/firrtl/BlackBoxFloatTester/sbt,data/full_repos/permissive/493019833/BBFAdd\n             data/full_repos/permissive/493019833/test/testcase/firrtl/BlackBoxFloatTester/sbt,data/full_repos/permissive/493019833/BBFAdd.v\n             data/full_repos/permissive/493019833/test/testcase/firrtl/BlackBoxFloatTester/sbt,data/full_repos/permissive/493019833/BBFAdd.sv\n             BBFAdd\n             BBFAdd.v\n             BBFAdd.sv\n             obj_dir/BBFAdd\n             obj_dir/BBFAdd.v\n             obj_dir/BBFAdd.sv\n%Error: data/full_repos/permissive/493019833/test/testcase/firrtl/BlackBoxFloatTester/sbt/BlackBoxFloatTester.v:69: Cannot find file containing module: 'BBFMultiply'\n  BBFMultiply BBFMultiply (  \n  ^~~~~~~~~~~\n%Error: data/full_repos/permissive/493019833/test/testcase/firrtl/BlackBoxFloatTester/sbt/BlackBoxFloatTester.v:74: Cannot find file containing module: 'BBFEquals'\n  BBFEquals BBFEquals (  \n  ^~~~~~~~~\n%Error: data/full_repos/permissive/493019833/test/testcase/firrtl/BlackBoxFloatTester/sbt/BlackBoxFloatTester.v:79: Cannot find file containing module: 'BBFEquals'\n  BBFEquals BBFEquals_1 (  \n  ^~~~~~~~~\n%Error: data/full_repos/permissive/493019833/test/testcase/firrtl/BlackBoxFloatTester/sbt/BlackBoxFloatTester.v:84: Cannot find file containing module: 'BBFEquals'\n  BBFEquals BBFEquals_2 (  \n  ^~~~~~~~~\n%Error: data/full_repos/permissive/493019833/test/testcase/firrtl/BlackBoxFloatTester/sbt/BlackBoxFloatTester.v:89: Cannot find file containing module: 'BBFEquals'\n  BBFEquals BBFEquals_3 (  \n  ^~~~~~~~~\n%Error: data/full_repos/permissive/493019833/test/testcase/firrtl/BlackBoxFloatTester/sbt/BlackBoxFloatTester.v:94: Cannot find file containing module: 'BBFEquals'\n  BBFEquals BBFEquals_4 (  \n  ^~~~~~~~~\n%Error: data/full_repos/permissive/493019833/test/testcase/firrtl/BlackBoxFloatTester/sbt/BlackBoxFloatTester.v:99: Cannot find file containing module: 'BBFEquals'\n  BBFEquals BBFEquals_5 (  \n  ^~~~~~~~~\n%Error: data/full_repos/permissive/493019833/test/testcase/firrtl/BlackBoxFloatTester/sbt/BlackBoxFloatTester.v:104: Cannot find file containing module: 'BBFEquals'\n  BBFEquals BBFEquals_6 (  \n  ^~~~~~~~~\n%Error: data/full_repos/permissive/493019833/test/testcase/firrtl/BlackBoxFloatTester/sbt/BlackBoxFloatTester.v:109: Cannot find file containing module: 'BBFEquals'\n  BBFEquals BBFEquals_7 (  \n  ^~~~~~~~~\n%Error: Exiting due to 10 error(s)\n"
module BlackBoxFloatTester(
  input   clock,
  input   reset
);
`ifdef RANDOMIZE_REG_INIT
  reg [31:0] _RAND_0;
  reg [63:0] _RAND_1;
`endif
  wire [63:0] BBFAdd_out;
  wire [63:0] BBFAdd_in2;
  wire [63:0] BBFAdd_in1;
  wire [63:0] BBFMultiply_out;
  wire [63:0] BBFMultiply_in2;
  wire [63:0] BBFMultiply_in1;
  wire  BBFEquals_out;
  wire [63:0] BBFEquals_in2;
  wire [63:0] BBFEquals_in1;
  wire  BBFEquals_1_out;
  wire [63:0] BBFEquals_1_in2;
  wire [63:0] BBFEquals_1_in1;
  wire  BBFEquals_2_out;
  wire [63:0] BBFEquals_2_in2;
  wire [63:0] BBFEquals_2_in1;
  wire  BBFEquals_3_out;
  wire [63:0] BBFEquals_3_in2;
  wire [63:0] BBFEquals_3_in1;
  wire  BBFEquals_4_out;
  wire [63:0] BBFEquals_4_in2;
  wire [63:0] BBFEquals_4_in1;
  wire  BBFEquals_5_out;
  wire [63:0] BBFEquals_5_in2;
  wire [63:0] BBFEquals_5_in1;
  wire  BBFEquals_6_out;
  wire [63:0] BBFEquals_6_in2;
  wire [63:0] BBFEquals_6_in1;
  wire  BBFEquals_7_out;
  wire [63:0] BBFEquals_7_in2;
  wire [63:0] BBFEquals_7_in1;
  reg [3:0] value;
  wire  _T_6 = value == 4'h9;
  wire [3:0] _T_9 = value + 4'h1;
  reg [63:0] accum_node;
  wire  _T_28 = ~reset;
  wire  _T_30 = value == 4'h0;
  wire  _T_34 = BBFEquals_out;
  wire  _T_42 = BBFEquals_1_out;
  wire  _T_48 = value == 4'h1;
  wire  _T_52 = BBFEquals_2_out;
  wire  _T_60 = BBFEquals_3_out;
  wire  _T_66 = value == 4'h2;
  wire  _T_70 = BBFEquals_4_out;
  wire  _T_78 = BBFEquals_5_out;
  wire  _T_84 = value == 4'h3;
  wire  _T_88 = BBFEquals_6_out;
  wire  _T_96 = BBFEquals_7_out;
  wire  _T_102 = value >= 4'h3;
  wire [63:0] addOut_node = BBFAdd_out;
  wire [63:0] mulOut_node = BBFMultiply_out;
  wire  _GEN_2 = ~_T_30;
  wire  _GEN_3 = ~_T_30 & _T_48;
  wire  _GEN_12 = _GEN_2 & ~_T_48;
  wire  _GEN_13 = _GEN_2 & ~_T_48 & _T_66;
  wire  _GEN_31 = _GEN_12 & ~_T_66 & _T_84;
  BBFAdd BBFAdd (
    .out(BBFAdd_out),
    .in2(BBFAdd_in2),
    .in1(BBFAdd_in1)
  );
  BBFMultiply BBFMultiply (
    .out(BBFMultiply_out),
    .in2(BBFMultiply_in2),
    .in1(BBFMultiply_in1)
  );
  BBFEquals BBFEquals (
    .out(BBFEquals_out),
    .in2(BBFEquals_in2),
    .in1(BBFEquals_in1)
  );
  BBFEquals BBFEquals_1 (
    .out(BBFEquals_1_out),
    .in2(BBFEquals_1_in2),
    .in1(BBFEquals_1_in1)
  );
  BBFEquals BBFEquals_2 (
    .out(BBFEquals_2_out),
    .in2(BBFEquals_2_in2),
    .in1(BBFEquals_2_in1)
  );
  BBFEquals BBFEquals_3 (
    .out(BBFEquals_3_out),
    .in2(BBFEquals_3_in2),
    .in1(BBFEquals_3_in1)
  );
  BBFEquals BBFEquals_4 (
    .out(BBFEquals_4_out),
    .in2(BBFEquals_4_in2),
    .in1(BBFEquals_4_in1)
  );
  BBFEquals BBFEquals_5 (
    .out(BBFEquals_5_out),
    .in2(BBFEquals_5_in2),
    .in1(BBFEquals_5_in1)
  );
  BBFEquals BBFEquals_6 (
    .out(BBFEquals_6_out),
    .in2(BBFEquals_6_in2),
    .in1(BBFEquals_6_in1)
  );
  BBFEquals BBFEquals_7 (
    .out(BBFEquals_7_out),
    .in2(BBFEquals_7_in2),
    .in1(BBFEquals_7_in1)
  );
  assign BBFAdd_in2 = 64'h3ff0000000000000;
  assign BBFAdd_in1 = accum_node;
  assign BBFMultiply_in2 = 64'h4000000000000000;
  assign BBFMultiply_in1 = BBFAdd_out;
  assign BBFEquals_in2 = 64'h3ff0000000000000;
  assign BBFEquals_in1 = BBFAdd_out;
  assign BBFEquals_1_in2 = 64'h4000000000000000;
  assign BBFEquals_1_in1 = BBFMultiply_out;
  assign BBFEquals_2_in2 = 64'h4000000000000000;
  assign BBFEquals_2_in1 = BBFAdd_out;
  assign BBFEquals_3_in2 = 64'h4010000000000000;
  assign BBFEquals_3_in1 = BBFMultiply_out;
  assign BBFEquals_4_in2 = 64'h4008000000000000;
  assign BBFEquals_4_in1 = BBFAdd_out;
  assign BBFEquals_5_in2 = 64'h4018000000000000;
  assign BBFEquals_5_in1 = BBFMultiply_out;
  assign BBFEquals_6_in2 = 64'h4010000000000000;
  assign BBFEquals_6_in1 = BBFAdd_out;
  assign BBFEquals_7_in2 = 64'h4020000000000000;
  assign BBFEquals_7_in1 = BBFMultiply_out;
  always @(posedge clock) begin
    if (reset) begin
      value <= 4'h0;
    end else if (_T_6) begin
      value <= 4'h0;
    end else begin
      value <= _T_9;
    end
    accum_node <= BBFAdd_out;
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (~reset) begin
          $fwrite(32'h80000002,"cnt: %x     accum: %x    add: %x    mult: %x\n",value,accum_node,addOut_node,mulOut_node
            );
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (_T_30 & ~(_T_34 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:26 assert(addOut === DspReal(1))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_T_30 & ~(_T_34 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (_T_30 & ~(_T_42 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:27 assert(mulOut === DspReal(2))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_T_30 & ~(_T_42 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (~_T_30 & _T_48 & ~(_T_52 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:29 assert(addOut === DspReal(2))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (~_T_30 & _T_48 & ~(_T_52 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (_GEN_3 & ~(_T_60 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:30 assert(mulOut === DspReal(4))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_GEN_3 & ~(_T_60 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (_GEN_2 & ~_T_48 & _T_66 & ~(_T_70 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:32 assert(addOut === DspReal(3))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_GEN_2 & ~_T_48 & _T_66 & ~(_T_70 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (_GEN_13 & ~(_T_78 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:33 assert(mulOut === DspReal(6))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_GEN_13 & ~(_T_78 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (_GEN_12 & ~_T_66 & _T_84 & ~(_T_88 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:35 assert(addOut === DspReal(4))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_GEN_12 & ~_T_66 & _T_84 & ~(_T_88 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (_GEN_31 & ~(_T_96 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:36 assert(mulOut === DspReal(8))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_GEN_31 & ~(_T_96 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_T_102 & _T_28) begin
          $finish;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
  end

`ifdef RANDOMIZE_GARBAGE_ASSIGN
`define RANDOMIZE
`endif
`ifdef RANDOMIZE_INVALID_ASSIGN
`define RANDOMIZE
`endif
`ifdef RANDOMIZE_REG_INIT
`define RANDOMIZE
`endif
`ifdef RANDOMIZE_MEM_INIT
`define RANDOMIZE
`endif
`ifndef RANDOM
`define RANDOM $random
`endif
`ifdef RANDOMIZE_MEM_INIT
  integer initvar;
`endif
`ifndef SYNTHESIS
`ifdef FIRRTL_BEFORE_INITIAL
`FIRRTL_BEFORE_INITIAL
`endif
initial begin
  `ifdef RANDOMIZE
    `ifdef INIT_RANDOM
      `INIT_RANDOM
    `endif
    `ifndef VERILATOR
      `ifdef RANDOMIZE_DELAY
        #`RANDOMIZE_DELAY begin end
      `else
        #0.002 begin end
      `endif
    `endif
`ifdef RANDOMIZE_REG_INIT
  _RAND_0 = {1{`RANDOM}};
  value = _RAND_0[3:0];
  _RAND_1 = {2{`RANDOM}};
  accum_node = _RAND_1[63:0];
`endif
  `endif
end
`ifdef FIRRTL_AFTER_INITIAL
`FIRRTL_AFTER_INITIAL
`endif
`endif
endmodule
module BlackBoxFloatTester(
  input   clock,
  input   reset
);

`ifdef RANDOMIZE_REG_INIT
  reg [31:0] _RAND_0;
  reg [63:0] _RAND_1;
`endif
  wire [63:0] BBFAdd_out;
  wire [63:0] BBFAdd_in2;
  wire [63:0] BBFAdd_in1;
  wire [63:0] BBFMultiply_out;
  wire [63:0] BBFMultiply_in2;
  wire [63:0] BBFMultiply_in1;
  wire  BBFEquals_out;
  wire [63:0] BBFEquals_in2;
  wire [63:0] BBFEquals_in1;
  wire  BBFEquals_1_out;
  wire [63:0] BBFEquals_1_in2;
  wire [63:0] BBFEquals_1_in1;
  wire  BBFEquals_2_out;
  wire [63:0] BBFEquals_2_in2;
  wire [63:0] BBFEquals_2_in1;
  wire  BBFEquals_3_out;
  wire [63:0] BBFEquals_3_in2;
  wire [63:0] BBFEquals_3_in1;
  wire  BBFEquals_4_out;
  wire [63:0] BBFEquals_4_in2;
  wire [63:0] BBFEquals_4_in1;
  wire  BBFEquals_5_out;
  wire [63:0] BBFEquals_5_in2;
  wire [63:0] BBFEquals_5_in1;
  wire  BBFEquals_6_out;
  wire [63:0] BBFEquals_6_in2;
  wire [63:0] BBFEquals_6_in1;
  wire  BBFEquals_7_out;
  wire [63:0] BBFEquals_7_in2;
  wire [63:0] BBFEquals_7_in1;
  reg [3:0] value;
  wire  _T_6 = value == 4'h9;
  wire [3:0] _T_9 = value + 4'h1;
  reg [63:0] accum_node;
  wire  _T_28 = ~reset;
  wire  _T_30 = value == 4'h0;
  wire  _T_34 = BBFEquals_out;
  wire  _T_42 = BBFEquals_1_out;
  wire  _T_48 = value == 4'h1;
  wire  _T_52 = BBFEquals_2_out;
  wire  _T_60 = BBFEquals_3_out;
  wire  _T_66 = value == 4'h2;
  wire  _T_70 = BBFEquals_4_out;
  wire  _T_78 = BBFEquals_5_out;
  wire  _T_84 = value == 4'h3;
  wire  _T_88 = BBFEquals_6_out;
  wire  _T_96 = BBFEquals_7_out;
  wire  _T_102 = value >= 4'h3;
  wire [63:0] addOut_node = BBFAdd_out;
  wire [63:0] mulOut_node = BBFMultiply_out;
  wire  _GEN_2 = ~_T_30;
  wire  _GEN_3 = ~_T_30 & _T_48;
  wire  _GEN_12 = _GEN_2 & ~_T_48;
  wire  _GEN_13 = _GEN_2 & ~_T_48 & _T_66;
  wire  _GEN_31 = _GEN_12 & ~_T_66 & _T_84;
  BBFAdd BBFAdd (
    .out(BBFAdd_out),
    .in2(BBFAdd_in2),
    .in1(BBFAdd_in1)
  );
  BBFMultiply BBFMultiply (
    .out(BBFMultiply_out),
    .in2(BBFMultiply_in2),
    .in1(BBFMultiply_in1)
  );
  BBFEquals BBFEquals (
    .out(BBFEquals_out),
    .in2(BBFEquals_in2),
    .in1(BBFEquals_in1)
  );
  BBFEquals BBFEquals_1 (
    .out(BBFEquals_1_out),
    .in2(BBFEquals_1_in2),
    .in1(BBFEquals_1_in1)
  );
  BBFEquals BBFEquals_2 (
    .out(BBFEquals_2_out),
    .in2(BBFEquals_2_in2),
    .in1(BBFEquals_2_in1)
  );
  BBFEquals BBFEquals_3 (
    .out(BBFEquals_3_out),
    .in2(BBFEquals_3_in2),
    .in1(BBFEquals_3_in1)
  );
  BBFEquals BBFEquals_4 (
    .out(BBFEquals_4_out),
    .in2(BBFEquals_4_in2),
    .in1(BBFEquals_4_in1)
  );
  BBFEquals BBFEquals_5 (
    .out(BBFEquals_5_out),
    .in2(BBFEquals_5_in2),
    .in1(BBFEquals_5_in1)
  );
  BBFEquals BBFEquals_6 (
    .out(BBFEquals_6_out),
    .in2(BBFEquals_6_in2),
    .in1(BBFEquals_6_in1)
  );
  BBFEquals BBFEquals_7 (
    .out(BBFEquals_7_out),
    .in2(BBFEquals_7_in2),
    .in1(BBFEquals_7_in1)
  );
  assign BBFAdd_in2 = 64'h3ff0000000000000;
  assign BBFAdd_in1 = accum_node;
  assign BBFMultiply_in2 = 64'h4000000000000000;
  assign BBFMultiply_in1 = BBFAdd_out;
  assign BBFEquals_in2 = 64'h3ff0000000000000;
  assign BBFEquals_in1 = BBFAdd_out;
  assign BBFEquals_1_in2 = 64'h4000000000000000;
  assign BBFEquals_1_in1 = BBFMultiply_out;
  assign BBFEquals_2_in2 = 64'h4000000000000000;
  assign BBFEquals_2_in1 = BBFAdd_out;
  assign BBFEquals_3_in2 = 64'h4010000000000000;
  assign BBFEquals_3_in1 = BBFMultiply_out;
  assign BBFEquals_4_in2 = 64'h4008000000000000;
  assign BBFEquals_4_in1 = BBFAdd_out;
  assign BBFEquals_5_in2 = 64'h4018000000000000;
  assign BBFEquals_5_in1 = BBFMultiply_out;
  assign BBFEquals_6_in2 = 64'h4010000000000000;
  assign BBFEquals_6_in1 = BBFAdd_out;
  assign BBFEquals_7_in2 = 64'h4020000000000000;
  assign BBFEquals_7_in1 = BBFMultiply_out;
  always @(posedge clock) begin
    if (reset) begin
      value <= 4'h0;
    end else if (_T_6) begin
      value <= 4'h0;
    end else begin
      value <= _T_9;
    end
    accum_node <= BBFAdd_out;
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (~reset) begin
          $fwrite(32'h80000002,"cnt: %x     accum: %x    add: %x    mult: %x\n",value,accum_node,addOut_node,mulOut_node
            );
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (_T_30 & ~(_T_34 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:26 assert(addOut === DspReal(1))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_T_30 & ~(_T_34 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (_T_30 & ~(_T_42 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:27 assert(mulOut === DspReal(2))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_T_30 & ~(_T_42 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (~_T_30 & _T_48 & ~(_T_52 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:29 assert(addOut === DspReal(2))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (~_T_30 & _T_48 & ~(_T_52 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (_GEN_3 & ~(_T_60 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:30 assert(mulOut === DspReal(4))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_GEN_3 & ~(_T_60 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (_GEN_2 & ~_T_48 & _T_66 & ~(_T_70 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:32 assert(addOut === DspReal(3))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_GEN_2 & ~_T_48 & _T_66 & ~(_T_70 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (_GEN_13 & ~(_T_78 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:33 assert(mulOut === DspReal(6))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_GEN_13 & ~(_T_78 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (_GEN_12 & ~_T_66 & _T_84 & ~(_T_88 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:35 assert(addOut === DspReal(4))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_GEN_12 & ~_T_66 & _T_84 & ~(_T_88 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef PRINTF_COND
      if (`PRINTF_COND) begin
    `endif
        if (_GEN_31 & ~(_T_96 | reset)) begin
          $fwrite(32'h80000002,"Assertion failed\n    at BlackBoxFloat.scala:36 assert(mulOut === DspReal(8))\n");
        end
    `ifdef PRINTF_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_GEN_31 & ~(_T_96 | reset)) begin
          $fatal;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
    `ifndef SYNTHESIS
    `ifdef STOP_COND
      if (`STOP_COND) begin
    `endif
        if (_T_102 & _T_28) begin
          $finish;
        end
    `ifdef STOP_COND
      end
    `endif
    `endif
  end

`ifdef RANDOMIZE_GARBAGE_ASSIGN
`define RANDOMIZE
`endif
`ifdef RANDOMIZE_INVALID_ASSIGN
`define RANDOMIZE
`endif
`ifdef RANDOMIZE_REG_INIT
`define RANDOMIZE
`endif
`ifdef RANDOMIZE_MEM_INIT
`define RANDOMIZE
`endif
`ifndef RANDOM
`define RANDOM $random
`endif
`ifdef RANDOMIZE_MEM_INIT
  integer initvar;
`endif
`ifndef SYNTHESIS
`ifdef FIRRTL_BEFORE_INITIAL
`FIRRTL_BEFORE_INITIAL
`endif
initial begin
  `ifdef RANDOMIZE
    `ifdef INIT_RANDOM
      `INIT_RANDOM
    `endif
    `ifndef VERILATOR
      `ifdef RANDOMIZE_DELAY
        #`RANDOMIZE_DELAY begin end
      `else
        #0.002 begin end
      `endif
    `endif
`ifdef RANDOMIZE_REG_INIT
  _RAND_0 = {1{`RANDOM}};
  value = _RAND_0[3:0];
  _RAND_1 = {2{`RANDOM}};
  accum_node = _RAND_1[63:0];
`endif
  `endif
end
`ifdef FIRRTL_AFTER_INITIAL
`FIRRTL_AFTER_INITIAL
`endif
`endif
endmodule