data/full_repos/permissive/457911422/Slave_TB.v
1: b'%Error: data/full_repos/permissive/457911422/Slave_TB.v:1: Cannot find include file: Slave.v\n`include "Slave.v" \n         ^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/457911422,data/full_repos/permissive/457911422/Slave.v\n             data/full_repos/permissive/457911422,data/full_repos/permissive/457911422/Slave.v.v\n             data/full_repos/permissive/457911422,data/full_repos/permissive/457911422/Slave.v.sv\n             Slave.v\n             Slave.v.v\n             Slave.v.sv\n             obj_dir/Slave.v\n             obj_dir/Slave.v.v\n             obj_dir/Slave.v.sv\n%Warning-STMTDLY: data/full_repos/permissive/457911422/Slave_TB.v:20: Unsupported: Ignoring delay on this delayed statement.\n#PERIOD CS = 0;\n^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/457911422/Slave_TB.v:22: Unsupported or unknown PLI call: $monitor\n$monitor ("%b | %b | %b", slaveDataReceived, MOSI, MISO);\n^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/457911422/Slave_TB.v:23: Unsupported: Ignoring delay on this delayed statement.\n#(PERIOD*17) if (slaveDataReceived == 8\'b10101010) begin\n^\n%Warning-STMTDLY: data/full_repos/permissive/457911422/Slave_TB.v:33: Unsupported: Ignoring delay on this delayed statement.\n #PERIOD sclk = ~sclk;\n ^\n%Error: Exiting due to 2 error(s), 3 warning(s)\n'
module Slave_tb();
reg reset;
reg sclk;
reg MOSI;
wire MISO;
reg CS;
reg [7:0] slaveDataToSend;
wire [7:0] slaveDataReceived;

localparam PERIOD = 5;

assign slaveDataToSend = 8'b11010100;

initial begin
sclk = 0;
reset = 0;
MOSI = 0;
CS = 1;
#PERIOD CS = 0;
$display ("SlaveDataToSend = %b", slaveDataToSend);
$monitor ("%b | %b | %b", slaveDataReceived, MOSI, MISO);
#(PERIOD*17) if (slaveDataReceived == 8'b10101010) begin
	$display ("Success!");
	$finish;
end
else begin
	$display ("Failed!");
	$finish;
end
end
always begin
	#PERIOD sclk = ~sclk;
	MOSI = ~MOSI;
end


Slave S(
reset,
slaveDataToSend,
slaveDataReceived,
sclk,
CS,
MOSI,
MISO
);

endmodule
module Slave_tb();

reg reset;
reg sclk;
reg MOSI;
wire MISO;
reg CS;
reg [7:0] slaveDataToSend;
wire [7:0] slaveDataReceived;

localparam PERIOD = 5;

assign slaveDataToSend = 8'b11010100;

initial begin
sclk = 0;
reset = 0;
MOSI = 0;
CS = 1;
#PERIOD CS = 0;
$display ("SlaveDataToSend = %b", slaveDataToSend);
$monitor ("%b | %b | %b", slaveDataReceived, MOSI, MISO);
#(PERIOD*17) if (slaveDataReceived == 8'b10101010) begin
	$display ("Success!");
	$finish;
end
else begin
	$display ("Failed!");
	$finish;
end
end
always begin
	#PERIOD sclk = ~sclk;
	MOSI = ~MOSI;
end


Slave S(
reset,
slaveDataToSend,
slaveDataReceived,
sclk,
CS,
MOSI,
MISO
);

endmodule