data/full_repos/permissive/469509877/rtl/libs/mux2to1.v
data/verilator_xmls/60c3900c-0319-4c2a-aa04-131d959926e6.xml
module mux2to1(
    input in0,
    input in1,
    input selector,
    output out
    );
    
    assign out = (~selector & in0) | (selector & in1);
endmodule
module mux2to1(
    input in0,
    input in1,
    input selector,
    output out
    );

    
    assign out = (~selector & in0) | (selector & in1);
endmodule