data/full_repos/permissive/439087417/arith_rsh_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/439087417/arith_rsh_tb.v:47: Unsupported: Ignoring delay on this delayed statement.\n  #100;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/439087417/arith_rsh_tb.v:51: Unsupported: Ignoring delay on this delayed statement.\n  #100;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/439087417/arith_rsh_tb.v:55: Unsupported: Ignoring delay on this delayed statement.\n  #100;\n  ^\n%Error: data/full_repos/permissive/439087417/arith_rsh_tb.v:35: Cannot find file containing module: \'arith_rsh\'\n arith_rsh uut (\n ^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/439087417,data/full_repos/permissive/439087417/arith_rsh\n             data/full_repos/permissive/439087417,data/full_repos/permissive/439087417/arith_rsh.v\n             data/full_repos/permissive/439087417,data/full_repos/permissive/439087417/arith_rsh.sv\n             arith_rsh\n             arith_rsh.v\n             arith_rsh.sv\n             obj_dir/arith_rsh\n             obj_dir/arith_rsh.v\n             obj_dir/arith_rsh.sv\n%Error: Exiting due to 1 error(s), 3 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module arith_rsh_tb;


	reg [15:0] p;
	reg [3:0] i;


	wire [15:0] o;


	arith_rsh uut (
		.p(p), 
		.i(i), 
		.o(o)
	);

	initial begin

		p = 0;
		i = 0;


		#100;
      p = -5;
		i = 2;
		
		#100;
		p = 20;
		i = 3;
		
		#100;
		p = -20;
		i = 2;


	end
      
endmodule
module arith_rsh_tb;



	reg [15:0] p;
	reg [3:0] i;


	wire [15:0] o;


	arith_rsh uut (
		.p(p), 
		.i(i), 
		.o(o)
	);

	initial begin

		p = 0;
		i = 0;


		#100;
      p = -5;
		i = 2;
		
		#100;
		p = 20;
		i = 3;
		
		#100;
		p = -20;
		i = 2;


	end
      
endmodule