data/full_repos/permissive/486598419/6.5/DataCompare8.v
data/verilator_xmls/dd652e04-ca5e-413f-b7ce-8f1b27c7934c.xml
module DataCompare4
(
    input [3:0] iData_a,
    input [3:0] iData_b,
    input [2:0] iData,
    output reg [2:0] oData
);
always @(iData_a or iData_b or iData)
    begin
    if(iData_a>iData_b)
        oData=3'b100;
    else if(iData_a<iData_b)
        oData=3'b010;
    else
        begin
        if(iData==3'b100)
            oData=3'b100;
        else if(iData==3'b010)
            oData=3'b010;  
        else 
            oData=3'b001;        
        end
    end
endmodule
module DataCompare4
(
    input [3:0] iData_a,
    input [3:0] iData_b,
    input [2:0] iData,
    output reg [2:0] oData
);

always @(iData_a or iData_b or iData)
    begin
    if(iData_a>iData_b)
        oData=3'b100;
    else if(iData_a<iData_b)
        oData=3'b010;
    else
        begin
        if(iData==3'b100)
            oData=3'b100;
        else if(iData==3'b010)
            oData=3'b010;  
        else 
            oData=3'b001;        
        end
    end
endmodule