data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dq_pscan.v
1: b"%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dq_pscan.v:47: Cannot find file containing module: 'bw_u1_inv_1x'\nbw_u1_inv_1x ps_inv1 (\n^~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/bw_u1_inv_1x\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/bw_u1_inv_1x.v\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/bw_u1_inv_1x.sv\n             bw_u1_inv_1x\n             bw_u1_inv_1x.v\n             bw_u1_inv_1x.sv\n             obj_dir/bw_u1_inv_1x\n             obj_dir/bw_u1_inv_1x.v\n             obj_dir/bw_u1_inv_1x.sv\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dq_pscan.v:50: Cannot find file containing module: 'bw_u1_inv_1x'\nbw_u1_inv_1x ps_inv2 (\n^~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dq_pscan.v:53: Cannot find file containing module: 'bw_u1_soff_1x'\nbw_u1_soff_1x psff (\n^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dq_pscan.v:60: Cannot find file containing module: 'bw_u1_inv_1x'\nbw_u1_inv_1x clk_inv (\n^~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dq_pscan.v:63: Cannot find file containing module: 'bw_u1_buf_20x'\nbw_u1_buf_20x out_buf (\n^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dq_pscan.v:66: Cannot find file containing module: 'bw_u1_muxi21_1x'\nbw_u1_muxi21_1x I48 (\n^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dq_pscan.v:71: Cannot find file containing module: 'bw_u1_muxi21_1x'\nbw_u1_muxi21_1x I52 (\n^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dq_pscan.v:76: Cannot find file containing module: 'bw_u1_inv_1x'\nbw_u1_inv_1x I53 (\n^~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dq_pscan.v:79: Cannot find file containing module: 'bw_u1_muxi21_1x'\nbw_u1_muxi21_1x ps_mux1 (\n^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dq_pscan.v:84: Cannot find file containing module: 'bw_u1_inv_1x'\nbw_u1_inv_1x I54 (\n^~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dq_pscan.v:87: Cannot find file containing module: 'bw_u1_muxi21_1x'\nbw_u1_muxi21_1x ps_mux2 (\n^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/bw_io_dq_pscan.v:92: Cannot find file containing module: 'bw_u1_inv_1x'\nbw_u1_inv_1x I55 (\n^~~~~~~~~~~~\n%Error: Exiting due to 12 error(s)\n"
module bw_io_dq_pscan(serial_in ,serial_out ,bypass_in ,out_type ,clk ,
     bypass ,ps_select ,rcv_in );
output		serial_out ;
input		serial_in ;
input		bypass_in ;
input		out_type ;
input		clk ;
input		bypass ;
input		ps_select ;
input		rcv_in ;
supply0		vss ;
 
wire		net70 ;
wire		net73 ;
wire		net80 ;
wire		net44 ;
wire		net46 ;
wire		net48 ;
wire		net50 ;
wire		net52 ;
wire		net54 ;
wire		net58 ;
wire		net62 ;
wire		net66 ;
 
 
bw_u1_inv_1x ps_inv1 (
     .z               (net48 ),
     .a               (net73 ) );
bw_u1_inv_1x ps_inv2 (
     .z               (net44 ),
     .a               (net58 ) );
bw_u1_soff_1x psff (
     .q               (net73 ),
     .so              (net80 ),
     .ck              (net54 ),
     .d               (net62 ),
     .se              (vss ),
     .sd              (vss ) );
bw_u1_inv_1x clk_inv (
     .z               (net54 ),
     .a               (clk ) );
bw_u1_buf_20x out_buf (
     .z               (serial_out ),
     .a               (net44 ) );
bw_u1_muxi21_1x I48 (
     .z               (net70 ),
     .d0              (rcv_in ),
     .d1              (serial_in ),
     .s               (out_type ) );
bw_u1_muxi21_1x I52 (
     .z               (net66 ),
     .d0              (net52 ),
     .d1              (bypass ),
     .s               (out_type ) );
bw_u1_inv_1x I53 (
     .z               (net46 ),
     .a               (net66 ) );
bw_u1_muxi21_1x ps_mux1 (
     .z               (net62 ),
     .d0              (serial_in ),
     .d1              (bypass_in ),
     .s               (out_type ) );
bw_u1_inv_1x I54 (
     .z               (net52 ),
     .a               (ps_select ) );
bw_u1_muxi21_1x ps_mux2 (
     .z               (net58 ),
     .d0              (net50 ),
     .d1              (net48 ),
     .s               (net46 ) );
bw_u1_inv_1x I55 (
     .z               (net50 ),
     .a               (net70 ) );
endmodule
module bw_io_dq_pscan(serial_in ,serial_out ,bypass_in ,out_type ,clk ,
     bypass ,ps_select ,rcv_in );

output		serial_out ;
input		serial_in ;
input		bypass_in ;
input		out_type ;
input		clk ;
input		bypass ;
input		ps_select ;
input		rcv_in ;
supply0		vss ;
 
wire		net70 ;
wire		net73 ;
wire		net80 ;
wire		net44 ;
wire		net46 ;
wire		net48 ;
wire		net50 ;
wire		net52 ;
wire		net54 ;
wire		net58 ;
wire		net62 ;
wire		net66 ;
 
 
bw_u1_inv_1x ps_inv1 (
     .z               (net48 ),
     .a               (net73 ) );
bw_u1_inv_1x ps_inv2 (
     .z               (net44 ),
     .a               (net58 ) );
bw_u1_soff_1x psff (
     .q               (net73 ),
     .so              (net80 ),
     .ck              (net54 ),
     .d               (net62 ),
     .se              (vss ),
     .sd              (vss ) );
bw_u1_inv_1x clk_inv (
     .z               (net54 ),
     .a               (clk ) );
bw_u1_buf_20x out_buf (
     .z               (serial_out ),
     .a               (net44 ) );
bw_u1_muxi21_1x I48 (
     .z               (net70 ),
     .d0              (rcv_in ),
     .d1              (serial_in ),
     .s               (out_type ) );
bw_u1_muxi21_1x I52 (
     .z               (net66 ),
     .d0              (net52 ),
     .d1              (bypass ),
     .s               (out_type ) );
bw_u1_inv_1x I53 (
     .z               (net46 ),
     .a               (net66 ) );
bw_u1_muxi21_1x ps_mux1 (
     .z               (net62 ),
     .d0              (serial_in ),
     .d1              (bypass_in ),
     .s               (out_type ) );
bw_u1_inv_1x I54 (
     .z               (net52 ),
     .a               (ps_select ) );
bw_u1_muxi21_1x ps_mux2 (
     .z               (net58 ),
     .d0              (net50 ),
     .d1              (net48 ),
     .s               (net46 ) );
bw_u1_inv_1x I55 (
     .z               (net50 ),
     .a               (net70 ) );
endmodule