data/full_repos/permissive/405799749/amg_new/mult/Unsigned/8/8/Simple_PPG/Wallace_tree/Han-Carlson_adder/module.v
data/verilator_xmls/74b3a662-b603-4a7a-b363-76cf20f363ba.xml
module UBPureHCA_15_5 (S, X, Y);
  output [16:5] S;
  input [15:5] X;
  input [15:5] Y;
  wire C;
  UBPriHCA_15_5 U0 (S, X, Y, C);
  UBZero_5_5 U1 (C);
endmodule
module UBPureHCA_15_5 (S, X, Y);

  output [16:5] S;
  input [15:5] X;
  input [15:5] Y;
  wire C;
  UBPriHCA_15_5 U0 (S, X, Y, C);
  UBZero_5_5 U1 (C);
endmodule