data/full_repos/permissive/443520440/testbench/sd_photo_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/443520440/testbench/sd_photo_tb.v:26: Unsupported: Ignoring delay on this delayed statement.\n        #50 get_photo_mode = 1;\n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/443520440/testbench/sd_photo_tb.v:27: Unsupported: Ignoring delay on this delayed statement.\n        #500 get_photo_mode = 0;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/443520440/testbench/sd_photo_tb.v:28: Unsupported: Ignoring delay on this delayed statement.\n        #50 get_photo_mode = 1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/443520440/testbench/sd_photo_tb.v:30: Unsupported: Ignoring delay on this delayed statement.\n    always #20 rd_val_en = ~rd_val_en;\n           ^\n%Warning-STMTDLY: data/full_repos/permissive/443520440/testbench/sd_photo_tb.v:31: Unsupported: Ignoring delay on this delayed statement.\n    always #1 clk = ~clk;\n           ^\n%Warning-STMTDLY: data/full_repos/permissive/443520440/testbench/sd_photo_tb.v:60: Unsupported: Ignoring delay on this delayed statement.\n        #50;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/443520440/testbench/sd_photo_tb.v:62: Unsupported: Ignoring delay on this delayed statement.\n        #500;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/443520440/testbench/sd_photo_tb.v:65: Unsupported: Ignoring delay on this delayed statement.\n    always #10 wr_req = ~wr_req;\n           ^\n%Warning-STMTDLY: data/full_repos/permissive/443520440/testbench/sd_photo_tb.v:66: Unsupported: Ignoring delay on this delayed statement.\n    always #1 clk = ~clk;\n           ^\n%Warning-MULTITOP: data/full_repos/permissive/443520440/testbench/sd_photo_tb.v:34: Multiple top level modules\n                                                                                  : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                                                                                  : ... Top module \'sd_read_photo_tb\'\nmodule sd_read_photo_tb();\n       ^~~~~~~~~~~~~~~~\n                                                                                  : ... Top module \'sd_write_photo_tb\'\nmodule sd_write_photo_tb();\n       ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/443520440/testbench/sd_photo_tb.v:44: Cannot find file containing module: \'sd_write_photo\'\n    sd_write_photo sd_write_photo_0(\n    ^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/443520440/testbench,data/full_repos/permissive/443520440/sd_write_photo\n             data/full_repos/permissive/443520440/testbench,data/full_repos/permissive/443520440/sd_write_photo.v\n             data/full_repos/permissive/443520440/testbench,data/full_repos/permissive/443520440/sd_write_photo.sv\n             sd_write_photo\n             sd_write_photo.v\n             sd_write_photo.sv\n             obj_dir/sd_write_photo\n             obj_dir/sd_write_photo.v\n             obj_dir/sd_write_photo.sv\n%Error: data/full_repos/permissive/443520440/testbench/sd_photo_tb.v:11: Cannot find file containing module: \'sd_read_photo\'\n    sd_read_photo sd_read_photo_0(\n    ^~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s), 10 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module sd_write_photo_tb();
    reg clk;
    reg [3:0] select_photo_no;
    reg caught_photo_mode;
    reg wr_req;
    reg wr_busy;
    wire wr_start_en;
    wire [31:0] wr_sec_addr;
    wire [18:0] sd_wr_ram_addr;

    sd_write_photo sd_write_photo_0(
        .clk                (clk),
        .select_photo_no    (select_photo_no),
        .caught_photo_mode  (caught_photo_mode),
        .wr_req             (wr_req),
        .wr_busy            (wr_busy),
        .wr_start_en        (wr_start_en),
        .wr_sec_addr        (wr_sec_addr),
        .sd_wr_ram_addr     (sd_wr_ram_addr)
    );
    initial begin
        caught_photo_mode = 0;
        select_photo_no = 0;
        clk = 0;
        wr_busy = 0;
        wr_req = 0;
        #50;
        caught_photo_mode = 1;
        #500;
        caught_photo_mode = 0;
    end
    always #10 wr_req = ~wr_req;
    always #1 clk = ~clk;
endmodule
module sd_write_photo_tb();

    reg clk;
    reg [3:0] select_photo_no;
    reg caught_photo_mode;
    reg wr_req;
    reg wr_busy;
    wire wr_start_en;
    wire [31:0] wr_sec_addr;
    wire [18:0] sd_wr_ram_addr;

    sd_write_photo sd_write_photo_0(
        .clk                (clk),
        .select_photo_no    (select_photo_no),
        .caught_photo_mode  (caught_photo_mode),
        .wr_req             (wr_req),
        .wr_busy            (wr_busy),
        .wr_start_en        (wr_start_en),
        .wr_sec_addr        (wr_sec_addr),
        .sd_wr_ram_addr     (sd_wr_ram_addr)
    );
    initial begin
        caught_photo_mode = 0;
        select_photo_no = 0;
        clk = 0;
        wr_busy = 0;
        wr_req = 0;
        #50;
        caught_photo_mode = 1;
        #500;
        caught_photo_mode = 0;
    end
    always #10 wr_req = ~wr_req;
    always #1 clk = ~clk;
endmodule