data/full_repos/permissive/470392519/tests/sub/ALU_Control.v
1: b'%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:1: Cannot find include file: ALU_Control.v\n`include "ALU_Control.v" \n         ^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/470392519/tests/sub,data/full_repos/permissive/470392519/ALU_Control.v\n             data/full_repos/permissive/470392519/tests/sub,data/full_repos/permissive/470392519/ALU_Control.v.v\n             data/full_repos/permissive/470392519/tests/sub,data/full_repos/permissive/470392519/ALU_Control.v.sv\n             ALU_Control.v\n             ALU_Control.v.v\n             ALU_Control.v.sv\n             obj_dir/ALU_Control.v\n             obj_dir/ALU_Control.v.v\n             obj_dir/ALU_Control.v.sv\n%Warning-STMTDLY: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:35: Unsupported: Ignoring delay on this delayed statement.\n        #20;\n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:38: Define or directive not defined: \'`OPCODE\'\n            if      (`OPCODE(instr) == `R      ) i_aluOp = `ALU_OP_R;\n                     ^~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:38: Define or directive not defined: \'`R\'\n            if      (`OPCODE(instr) == `R      ) i_aluOp = `ALU_OP_R;\n                                       ^~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:38: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n            if      (`OPCODE(instr) == `R      ) i_aluOp = `ALU_OP_R;\n                                               ^\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:38: Define or directive not defined: \'`ALU_OP_R\'\n            if      (`OPCODE(instr) == `R      ) i_aluOp = `ALU_OP_R;\n                                                           ^~~~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:39: Define or directive not defined: \'`OPCODE\'\n            else if (`OPCODE(instr) == `I_JUMP ) i_aluOp = `ALU_OP_I_JUMP;\n                     ^~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:39: Define or directive not defined: \'`I_JUMP\'\n            else if (`OPCODE(instr) == `I_JUMP ) i_aluOp = `ALU_OP_I_JUMP;\n                                       ^~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:39: Define or directive not defined: \'`ALU_OP_I_JUMP\'\n            else if (`OPCODE(instr) == `I_JUMP ) i_aluOp = `ALU_OP_I_JUMP;\n                                                           ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:40: Define or directive not defined: \'`OPCODE\'\n            else if (`OPCODE(instr) == `I_LOAD ) i_aluOp = `ALU_OP_I_LOAD;\n                     ^~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:40: Define or directive not defined: \'`I_LOAD\'\n            else if (`OPCODE(instr) == `I_LOAD ) i_aluOp = `ALU_OP_I_LOAD;\n                                       ^~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:40: Define or directive not defined: \'`ALU_OP_I_LOAD\'\n            else if (`OPCODE(instr) == `I_LOAD ) i_aluOp = `ALU_OP_I_LOAD;\n                                                           ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:41: Define or directive not defined: \'`OPCODE\'\n            else if (`OPCODE(instr) == `I_ARITH) i_aluOp = `ALU_OP_I_ARITH;\n                     ^~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:41: Define or directive not defined: \'`I_ARITH\'\n            else if (`OPCODE(instr) == `I_ARITH) i_aluOp = `ALU_OP_I_ARITH;\n                                       ^~~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:41: Define or directive not defined: \'`ALU_OP_I_ARITH\'\n            else if (`OPCODE(instr) == `I_ARITH) i_aluOp = `ALU_OP_I_ARITH;\n                                                           ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:42: Define or directive not defined: \'`OPCODE\'\n            else if (`OPCODE(instr) == `I_SYS  ) i_aluOp = `ALU_OP_I_SYS;\n                     ^~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:42: Define or directive not defined: \'`I_SYS\'\n            else if (`OPCODE(instr) == `I_SYS  ) i_aluOp = `ALU_OP_I_SYS;\n                                       ^~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:42: Define or directive not defined: \'`ALU_OP_I_SYS\'\n            else if (`OPCODE(instr) == `I_SYS  ) i_aluOp = `ALU_OP_I_SYS;\n                                                           ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:43: Define or directive not defined: \'`OPCODE\'\n            else if (`OPCODE(instr) == `I_FENCE) i_aluOp = `ALU_OP_I_FENCE;\n                     ^~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:43: Define or directive not defined: \'`I_FENCE\'\n            else if (`OPCODE(instr) == `I_FENCE) i_aluOp = `ALU_OP_I_FENCE;\n                                       ^~~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:43: Define or directive not defined: \'`ALU_OP_I_FENCE\'\n            else if (`OPCODE(instr) == `I_FENCE) i_aluOp = `ALU_OP_I_FENCE;\n                                                           ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:44: Define or directive not defined: \'`OPCODE\'\n            else if (`OPCODE(instr) == `S      ) i_aluOp = `ALU_OP_S;\n                     ^~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:44: Define or directive not defined: \'`S\'\n            else if (`OPCODE(instr) == `S      ) i_aluOp = `ALU_OP_S;\n                                       ^~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:44: Define or directive not defined: \'`ALU_OP_S\'\n            else if (`OPCODE(instr) == `S      ) i_aluOp = `ALU_OP_S;\n                                                           ^~~~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:45: Define or directive not defined: \'`OPCODE\'\n            else if (`OPCODE(instr) == `B      ) i_aluOp = `ALU_OP_B;\n                     ^~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:45: Define or directive not defined: \'`B\'\n            else if (`OPCODE(instr) == `B      ) i_aluOp = `ALU_OP_B;\n                                       ^~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:45: Define or directive not defined: \'`ALU_OP_B\'\n            else if (`OPCODE(instr) == `B      ) i_aluOp = `ALU_OP_B;\n                                                           ^~~~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:46: Define or directive not defined: \'`OPCODE\'\n            else if (`OPCODE(instr) == `U_LUI  ) i_aluOp = `ALU_OP_U_LUI;\n                     ^~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:46: Define or directive not defined: \'`U_LUI\'\n            else if (`OPCODE(instr) == `U_LUI  ) i_aluOp = `ALU_OP_U_LUI;\n                                       ^~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:46: Define or directive not defined: \'`ALU_OP_U_LUI\'\n            else if (`OPCODE(instr) == `U_LUI  ) i_aluOp = `ALU_OP_U_LUI;\n                                                           ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:47: Define or directive not defined: \'`OPCODE\'\n            else if (`OPCODE(instr) == `U_AUIPC) i_aluOp = `ALU_OP_U_AUIPC;\n                     ^~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:47: Define or directive not defined: \'`U_AUIPC\'\n            else if (`OPCODE(instr) == `U_AUIPC) i_aluOp = `ALU_OP_U_AUIPC;\n                                       ^~~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:47: Define or directive not defined: \'`ALU_OP_U_AUIPC\'\n            else if (`OPCODE(instr) == `U_AUIPC) i_aluOp = `ALU_OP_U_AUIPC;\n                                                           ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:48: Define or directive not defined: \'`OPCODE\'\n            else if (`OPCODE(instr) == `J      ) i_aluOp = `ALU_OP_J;\n                     ^~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:48: Define or directive not defined: \'`J\'\n            else if (`OPCODE(instr) == `J      ) i_aluOp = `ALU_OP_J;\n                                       ^~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:48: Define or directive not defined: \'`ALU_OP_J\'\n            else if (`OPCODE(instr) == `J      ) i_aluOp = `ALU_OP_J;\n                                                           ^~~~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:49: Define or directive not defined: \'`FUNCT3\'\n            i_funct3 = `FUNCT3(instr);\n                       ^~~~~~~\n%Error: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:50: Define or directive not defined: \'`FUNCT7\'\n            i_funct7 = `FUNCT7(instr);\n                       ^~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/470392519/tests/sub/ALU_Control.v:51: Unsupported: Ignoring delay on this delayed statement.\n            #20;\n            ^\n%Error: Exiting due to 37 error(s), 2 warning(s)\n'
module AluControl_tb;
    reg     [3:0] i_aluOp;
    reg     [6:0] i_funct7;
    reg     [2:0] i_funct3;
    wire    [4:0] o_aluControl;

    ALU_Control IAluControl_dut(.*);

`ifdef DUMP_VCD
    initial begin
        $dumpfile("obj_dir/sub/ALU_Control.vcd");
        $dumpvars(0, AluControl_tb);
    end
`endif


    reg [31:0]  test_vector         [0:39];
    reg [4:0]   test_gold_vector    [0:39];
    initial begin
        $readmemh("obj_dir/sub/sub_ALU_Control.mem", test_vector);
        $readmemb("obj_dir/sub/sub_ALU_Control_gold.mem", test_gold_vector);
    end


    reg [31:0] instr;
    reg [39:0] resultStr;
    integer i = 0, errs = 0, subfail = 0;
    initial begin
        $display("Running ALU control tests...\n");
        i_aluOp   = 'd0;
        i_funct3  = 'd0;
        i_funct7  = 'd0;
        #20;
        for (i=0; i<40; i=i+1) begin
            instr = test_vector[i];
            if      (`OPCODE(instr) == `R      ) i_aluOp = `ALU_OP_R;
            else if (`OPCODE(instr) == `I_JUMP ) i_aluOp = `ALU_OP_I_JUMP;
            else if (`OPCODE(instr) == `I_LOAD ) i_aluOp = `ALU_OP_I_LOAD;
            else if (`OPCODE(instr) == `I_ARITH) i_aluOp = `ALU_OP_I_ARITH;
            else if (`OPCODE(instr) == `I_SYS  ) i_aluOp = `ALU_OP_I_SYS;
            else if (`OPCODE(instr) == `I_FENCE) i_aluOp = `ALU_OP_I_FENCE;
            else if (`OPCODE(instr) == `S      ) i_aluOp = `ALU_OP_S;
            else if (`OPCODE(instr) == `B      ) i_aluOp = `ALU_OP_B;
            else if (`OPCODE(instr) == `U_LUI  ) i_aluOp = `ALU_OP_U_LUI;
            else if (`OPCODE(instr) == `U_AUIPC) i_aluOp = `ALU_OP_U_AUIPC;
            else if (`OPCODE(instr) == `J      ) i_aluOp = `ALU_OP_J;
            i_funct3 = `FUNCT3(instr);
            i_funct7 = `FUNCT7(instr);
            #20;
            if (o_aluControl != test_gold_vector[i]) resultStr = "ERROR";
            else                                     resultStr = "PASS ";
            $display("Test[ %2d ]: i_aluOp = %b | i_funct3 = %b | i_funct7 = %b || o_aluControl = %b ... %s",
                i, i_aluOp, i_funct3, i_funct7, o_aluControl, resultStr
            );
            if (resultStr == "ERROR") errs = errs + 1;
        end
        if (errs > 0)   $display("\nFAILED: %0d", errs);
        else            $display("\nPASSED");

    end

endmodule
module AluControl_tb;

    reg     [3:0] i_aluOp;
    reg     [6:0] i_funct7;
    reg     [2:0] i_funct3;
    wire    [4:0] o_aluControl;

    ALU_Control IAluControl_dut(.*);

`ifdef DUMP_VCD
    initial begin
        $dumpfile("obj_dir/sub/ALU_Control.vcd");
        $dumpvars(0, AluControl_tb);
    end
`endif


    reg [31:0]  test_vector         [0:39];
    reg [4:0]   test_gold_vector    [0:39];
    initial begin
        $readmemh("obj_dir/sub/sub_ALU_Control.mem", test_vector);
        $readmemb("obj_dir/sub/sub_ALU_Control_gold.mem", test_gold_vector);
    end


    reg [31:0] instr;
    reg [39:0] resultStr;
    integer i = 0, errs = 0, subfail = 0;
    initial begin
        $display("Running ALU control tests...\n");
        i_aluOp   = 'd0;
        i_funct3  = 'd0;
        i_funct7  = 'd0;
        #20;
        for (i=0; i<40; i=i+1) begin
            instr = test_vector[i];
            if      (`OPCODE(instr) == `R      ) i_aluOp = `ALU_OP_R;
            else if (`OPCODE(instr) == `I_JUMP ) i_aluOp = `ALU_OP_I_JUMP;
            else if (`OPCODE(instr) == `I_LOAD ) i_aluOp = `ALU_OP_I_LOAD;
            else if (`OPCODE(instr) == `I_ARITH) i_aluOp = `ALU_OP_I_ARITH;
            else if (`OPCODE(instr) == `I_SYS  ) i_aluOp = `ALU_OP_I_SYS;
            else if (`OPCODE(instr) == `I_FENCE) i_aluOp = `ALU_OP_I_FENCE;
            else if (`OPCODE(instr) == `S      ) i_aluOp = `ALU_OP_S;
            else if (`OPCODE(instr) == `B      ) i_aluOp = `ALU_OP_B;
            else if (`OPCODE(instr) == `U_LUI  ) i_aluOp = `ALU_OP_U_LUI;
            else if (`OPCODE(instr) == `U_AUIPC) i_aluOp = `ALU_OP_U_AUIPC;
            else if (`OPCODE(instr) == `J      ) i_aluOp = `ALU_OP_J;
            i_funct3 = `FUNCT3(instr);
            i_funct7 = `FUNCT7(instr);
            #20;
            if (o_aluControl != test_gold_vector[i]) resultStr = "ERROR";
            else                                     resultStr = "PASS ";
            $display("Test[ %2d ]: i_aluOp = %b | i_funct3 = %b | i_funct7 = %b || o_aluControl = %b ... %s",
                i, i_aluOp, i_funct3, i_funct7, o_aluControl, resultStr
            );
            if (resultStr == "ERROR") errs = errs + 1;
        end
        if (errs > 0)   $display("\nFAILED: %0d", errs);
        else            $display("\nPASSED");

    end

endmodule