data/full_repos/permissive/42061259/LIFO_FIFO/Top.v
1: b'%Error: data/full_repos/permissive/42061259/LIFO_FIFO/Top.v:1: Cannot find include file: DUT.v\n`include "DUT.v" \n         ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/42061259/LIFO_FIFO,data/full_repos/permissive/42061259/DUT.v\n             data/full_repos/permissive/42061259/LIFO_FIFO,data/full_repos/permissive/42061259/DUT.v.v\n             data/full_repos/permissive/42061259/LIFO_FIFO,data/full_repos/permissive/42061259/DUT.v.sv\n             DUT.v\n             DUT.v.v\n             DUT.v.sv\n             obj_dir/DUT.v\n             obj_dir/DUT.v.v\n             obj_dir/DUT.v.sv\n%Error: data/full_repos/permissive/42061259/LIFO_FIFO/Top.v:2: Cannot find include file: tb.v\n`include "tb.v" \n         ^~~~~~\n%Error: data/full_repos/permissive/42061259/LIFO_FIFO/Top.v:3: Cannot find include file: CLK1.v\n`include "CLK1.v" \n         ^~~~~~~~\n%Error: Exiting due to 3 error(s)\n'
module top;


wire  rst, wren, rden, full, empty, clk1, clk2;
wire [32-1:0] datain, datao;
tb test (
	.Datain(datain),
	.Rst(rst),
	.Wren(wren),
	.Rden(rden)

);

clock #(10)  Clk1 (.clock(clk1));
clock #(5) Clk2 (.clock(clk2));


DUT #(
	.MODE(0),
	.DEPTH(64)
	
) dut (.Datain(datain), 
		.Dataout(datao), 
		.Wren(wren), 
		.Rden(rden), 
		.Wrclk(clk2), 
		.Rdclk(clk1), 
		.Full(full), 
		.Empty(empty), 
		.Rst(rst));




endmodule
module top;



wire  rst, wren, rden, full, empty, clk1, clk2;
wire [32-1:0] datain, datao;
tb test (
	.Datain(datain),
	.Rst(rst),
	.Wren(wren),
	.Rden(rden)

);

clock #(10)  Clk1 (.clock(clk1));
clock #(5) Clk2 (.clock(clk2));


DUT #(
	.MODE(0),
	.DEPTH(64)
	
) dut (.Datain(datain), 
		.Dataout(datao), 
		.Wren(wren), 
		.Rden(rden), 
		.Wrclk(clk2), 
		.Rdclk(clk1), 
		.Full(full), 
		.Empty(empty), 
		.Rst(rst));




endmodule