data/full_repos/permissive/463549945/Problem_sets/Circuits/Sequential Logic/Counters/Counter 1000.v
1: b'%Error: Cannot find file containing module: Logic/Counters,data/full_repos/permissive/463549945\n        ... Looked in:\n             data/full_repos/permissive/463549945/Problem_sets/Circuits/Sequential/Logic/Counters,data/full_repos/permissive/463549945\n             data/full_repos/permissive/463549945/Problem_sets/Circuits/Sequential/Logic/Counters,data/full_repos/permissive/463549945.v\n             data/full_repos/permissive/463549945/Problem_sets/Circuits/Sequential/Logic/Counters,data/full_repos/permissive/463549945.sv\n             Logic/Counters,data/full_repos/permissive/463549945\n             Logic/Counters,data/full_repos/permissive/463549945.v\n             Logic/Counters,data/full_repos/permissive/463549945.sv\n             obj_dir/Logic/Counters,data/full_repos/permissive/463549945\n             obj_dir/Logic/Counters,data/full_repos/permissive/463549945.v\n             obj_dir/Logic/Counters,data/full_repos/permissive/463549945.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/463549945/Problem_sets/Circuits/Sequential\n%Error: Cannot find file containing module: Logic/Counters/Counter\n%Error: Cannot find file containing module: 1000.v\n%Error: Exiting due to 4 error(s)\n'
module top_module (
    input clk,
    input reset,
    output OneHertz,
    output [2:0] c_enable
);
    wire [3:0] one, ten, hundred;
    assign c_enable = {one == 4'd9 && ten == 4'd9, one == 4'd9, 1'b1};
    assign OneHertz = (one == 4'd9 && ten == 4'd9 && hundred == 4'd9);
    
    bcdcount counter0 (clk, reset, c_enable[0], one);
    bcdcount counter1 (clk, reset, c_enable[1], ten);
    bcdcount counter2 (clk, reset, c_enable[2], hundred);

endmodule
module top_module (
    input clk,
    input reset,
    output OneHertz,
    output [2:0] c_enable
);

    wire [3:0] one, ten, hundred;
    assign c_enable = {one == 4'd9 && ten == 4'd9, one == 4'd9, 1'b1};
    assign OneHertz = (one == 4'd9 && ten == 4'd9 && hundred == 4'd9);
    
    bcdcount counter0 (clk, reset, c_enable[0], one);
    bcdcount counter1 (clk, reset, c_enable[1], ten);
    bcdcount counter2 (clk, reset, c_enable[2], hundred);

endmodule