data/full_repos/permissive/439731184/simple_flip_flop.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/439731184/simple_flip_flop.v:21: Unsupported: Ignoring delay on this delayed statement.\nalways #1 q <= x;\n       ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/439731184/simple_flip_flop.v:34: Unsupported or unknown PLI call: $dumpfile\n    $dumpfile("test.vcd");\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/439731184/simple_flip_flop.v:35: Unsupported or unknown PLI call: $dumpvars\n    $dumpvars(0, d, S.z, S.y, S.x, q);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/439731184/simple_flip_flop.v:37: Unsupported or unknown PLI call: $monitor\n    $monitor("%h\\t%b\\t%b\\t%b\\t%b\\t%b", $time, d, S.z, S.y, S.x, q);\n    ^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/439731184/simple_flip_flop.v:39: Unsupported: Ignoring delay on this delayed statement.\n    #10 d = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/439731184/simple_flip_flop.v:40: Unsupported: Ignoring delay on this delayed statement.\n    #4 d = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/439731184/simple_flip_flop.v:41: Unsupported: Ignoring delay on this delayed statement.\n    #5 d = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/439731184/simple_flip_flop.v:42: Unsupported: Ignoring delay on this delayed statement.\n    #3 d = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/439731184/simple_flip_flop.v:43: Unsupported: Ignoring delay on this delayed statement.\n    #6 d = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/439731184/simple_flip_flop.v:44: Unsupported: Ignoring delay on this delayed statement.\n    #3 d = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/439731184/simple_flip_flop.v:45: Unsupported: Ignoring delay on this delayed statement.\n    #6 d = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/439731184/simple_flip_flop.v:46: Unsupported: Ignoring delay on this delayed statement.\n    #4 d = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/439731184/simple_flip_flop.v:47: Unsupported: Ignoring delay on this delayed statement.\n    #10 $finish;\n    ^\n%Error: Exiting due to 3 error(s), 10 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module sff_tb();

wire q;
reg d;

sff S (q, d);

initial begin
    $dumpfile("test.vcd");
    $dumpvars(0, d, S.z, S.y, S.x, q);
    $display("time\td\tz\ty\tx\tq");
    $monitor("%h\t%b\t%b\t%b\t%b\t%b", $time, d, S.z, S.y, S.x, q);
    d = 0;
    #10 d = 1;
    #4 d = 0;
    #5 d = 1;
    #3 d = 0;
    #6 d = 1;
    #3 d = 0;
    #6 d = 1;
    #4 d = 0;
    #10 $finish;
end

endmodule
module sff_tb();


wire q;
reg d;

sff S (q, d);

initial begin
    $dumpfile("test.vcd");
    $dumpvars(0, d, S.z, S.y, S.x, q);
    $display("time\td\tz\ty\tx\tq");
    $monitor("%h\t%b\t%b\t%b\t%b\t%b", $time, d, S.z, S.y, S.x, q);
    d = 0;
    #10 d = 1;
    #4 d = 0;
    #5 d = 1;
    #3 d = 0;
    #6 d = 1;
    #3 d = 0;
    #6 d = 1;
    #4 d = 0;
    #10 $finish;
end

endmodule