data/full_repos/permissive/460468583/data/yosys/quicklogic/pp3_latches_map.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/460468583/data/yosys/quicklogic/pp3_latches_map.v:7: Multiple top level modules\n                                                                                                 : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                                 : ... Top module \'$_DLATCH_P_\'\nmodule \\$_DLATCH_P_ (E, D, Q);\n       ^~~~~~~~~~~~\n                                                                                                 : ... Top module \'$_DLATCH_N_\'\nmodule \\$_DLATCH_N_ (E, D, Q);\n       ^~~~~~~~~~~~\n%Error: Exiting due to 1 warning(s)\n'
module \$_DLATCH_P_ (E, D, Q);
  wire [1023:0] _TECHMAP_DO_ = "simplemap; opt";
  input E, D;
  output Q = E ? D : Q;
endmodule
module \$_DLATCH_P_ (E, D, Q);

  wire [1023:0] _TECHMAP_DO_ = "simplemap; opt";
  input E, D;
  output Q = E ? D : Q;
endmodule