data/full_repos/permissive/503053625/fpga_projects/new_spgd/src/tb/GPIO_PARAMS_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/503053625/fpga_projects/new_spgd/src/tb/GPIO_PARAMS_tb.v:38: Unsupported: Ignoring delay on this delayed statement.\n  #F_period;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/503053625/fpga_projects/new_spgd/src/tb/GPIO_PARAMS_tb.v:48: Unsupported: Ignoring delay on this delayed statement.\n   #F_period;\n   ^\n%Error: data/full_repos/permissive/503053625/fpga_projects/new_spgd/src/tb/GPIO_PARAMS_tb.v:8: Cannot find file containing module: \'GPIO_PARAMS\'\n GPIO_PARAMS #(\n ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/503053625/fpga_projects/new_spgd/src/tb,data/full_repos/permissive/503053625/GPIO_PARAMS\n             data/full_repos/permissive/503053625/fpga_projects/new_spgd/src/tb,data/full_repos/permissive/503053625/GPIO_PARAMS.v\n             data/full_repos/permissive/503053625/fpga_projects/new_spgd/src/tb,data/full_repos/permissive/503053625/GPIO_PARAMS.sv\n             GPIO_PARAMS\n             GPIO_PARAMS.v\n             GPIO_PARAMS.sv\n             obj_dir/GPIO_PARAMS\n             obj_dir/GPIO_PARAMS.v\n             obj_dir/GPIO_PARAMS.sv\n%Error: Exiting due to 1 error(s), 2 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module GPIO_PARAMS_tb;
	localparam GPIO_WIDTH = 32;
	localparam H_period=2;
	localparam F_period=4;
	reg  [GPIO_WIDTH - 1 : 0] GP_IN = {GPIO_WIDTH{1'b0}};
	wire [GPIO_WIDTH - 1 : 0] GP_OUT;

	GPIO_PARAMS #(
		.GPIO_WIDTH(GPIO_WIDTH),
		.PARAM_COUNT(16),
		.SET(0)
	) PARAMS (
		.GP_IN(GP_IN),
		.GP_OUT(GP_OUT),
		.PARAMS_DATA({
			{32'h0000_0000F},
			{32'h0000_0000E},
			{32'h0000_0000D},
			{32'h0000_0000C},
			{32'h0000_0000B},
			{32'h0000_0000A},
			{32'h0000_00009},
			{32'h0000_00008},
			{32'h0000_00007},
			{32'h0000_00006},
			{32'h0000_00005},
			{32'h0000_00004},
			{32'h0000_00003},
			{32'h0000_00002},
			{32'h0000_00001},
			{32'h0000_00000}
		})
	);

	initial
	begin

		#F_period;



		GP_IN = 32'h20000000;



		repeat(16) begin

			#F_period;
			GP_IN = GP_IN + 1;
		end

		$finish;
	end
endmodule
module GPIO_PARAMS_tb;

	localparam GPIO_WIDTH = 32;
	localparam H_period=2;
	localparam F_period=4;
	reg  [GPIO_WIDTH - 1 : 0] GP_IN = {GPIO_WIDTH{1'b0}};
	wire [GPIO_WIDTH - 1 : 0] GP_OUT;

	GPIO_PARAMS #(
		.GPIO_WIDTH(GPIO_WIDTH),
		.PARAM_COUNT(16),
		.SET(0)
	) PARAMS (
		.GP_IN(GP_IN),
		.GP_OUT(GP_OUT),
		.PARAMS_DATA({
			{32'h0000_0000F},
			{32'h0000_0000E},
			{32'h0000_0000D},
			{32'h0000_0000C},
			{32'h0000_0000B},
			{32'h0000_0000A},
			{32'h0000_00009},
			{32'h0000_00008},
			{32'h0000_00007},
			{32'h0000_00006},
			{32'h0000_00005},
			{32'h0000_00004},
			{32'h0000_00003},
			{32'h0000_00002},
			{32'h0000_00001},
			{32'h0000_00000}
		})
	);

	initial
	begin

		#F_period;



		GP_IN = 32'h20000000;



		repeat(16) begin

			#F_period;
			GP_IN = GP_IN + 1;
		end

		$finish;
	end
endmodule