data/full_repos/permissive/440575220/riscv_decode.v
1: b'%Error: data/full_repos/permissive/440575220/riscv_decode.v:1: Cannot find include file: miriscv_defines.v\n`include "miriscv_defines.v" \n         ^~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/440575220,data/full_repos/permissive/440575220/miriscv_defines.v\n             data/full_repos/permissive/440575220,data/full_repos/permissive/440575220/miriscv_defines.v.v\n             data/full_repos/permissive/440575220,data/full_repos/permissive/440575220/miriscv_defines.v.sv\n             miriscv_defines.v\n             miriscv_defines.v.v\n             miriscv_defines.v.sv\n             obj_dir/miriscv_defines.v\n             obj_dir/miriscv_defines.v.v\n             obj_dir/miriscv_defines.v.sv\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:7: Define or directive not defined: \'`ALU_OP_WIDTH\'\n                     output reg [`ALU_OP_WIDTH-1:0] alu_op_o,  \n                                 ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:30: Define or directive not defined: \'`OP_OPCODE\'\n           `OP_OPCODE: begin\n           ^~~~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:30: syntax error, unexpected \':\', expecting endcase\n           `OP_OPCODE: begin\n                     ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:44: Define or directive not defined: \'`ALU_ADD\'\n                        alu_op_o <= `ALU_ADD;\n                                    ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:44: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                        alu_op_o <= `ALU_ADD;\n                                            ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:50: Define or directive not defined: \'`ALU_SLL\'\n                        alu_op_o <= `ALU_SLL;\n                                    ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:50: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                        alu_op_o <= `ALU_SLL;\n                                            ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:56: Define or directive not defined: \'`ALU_SLTS\'\n                        alu_op_o <= `ALU_SLTS;\n                                    ^~~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:56: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                        alu_op_o <= `ALU_SLTS;\n                                             ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:62: Define or directive not defined: \'`ALU_SLTU\'\n                        alu_op_o <= `ALU_SLTU;\n                                    ^~~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:62: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                        alu_op_o <= `ALU_SLTU;\n                                             ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:68: Define or directive not defined: \'`ALU_XOR\'\n                        alu_op_o <= `ALU_XOR;\n                                    ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:68: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                        alu_op_o <= `ALU_XOR;\n                                            ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:74: Define or directive not defined: \'`ALU_SRL\'\n                        alu_op_o <= `ALU_SRL;\n                                    ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:74: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                        alu_op_o <= `ALU_SRL;\n                                            ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:80: Define or directive not defined: \'`ALU_OR\'\n                        alu_op_o <= `ALU_OR;\n                                    ^~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:80: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                        alu_op_o <= `ALU_OR;\n                                           ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:86: Define or directive not defined: \'`ALU_AND\'\n                        alu_op_o <= `ALU_AND;\n                                    ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:86: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                        alu_op_o <= `ALU_AND;\n                                            ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:96: Define or directive not defined: \'`ALU_SUB\'\n                        alu_op_o <= `ALU_SUB;\n                                    ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:96: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                        alu_op_o <= `ALU_SUB;\n                                            ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:101: Define or directive not defined: \'`ALU_SRA\'\n                        alu_op_o <= `ALU_SRA;\n                                    ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:101: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                        alu_op_o <= `ALU_SRA;\n                                            ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:121: Define or directive not defined: \'`OP_IMM_OPCODE\'\n           `OP_IMM_OPCODE: begin\n           ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:121: syntax error, unexpected begin, expecting IDENTIFIER or PACKAGE-IDENTIFIER or TYPE-IDENTIFIER or new\n           `OP_IMM_OPCODE: begin\n                           ^~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:132: Define or directive not defined: \'`ALU_ADD\'\n                   alu_op_o <= `ALU_ADD;\n                               ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:132: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                   alu_op_o <= `ALU_ADD;\n                                       ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:141: Define or directive not defined: \'`ALU_SLL\'\n                        alu_op_o <= `ALU_SLL;\n                                    ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:141: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                        alu_op_o <= `ALU_SLL;\n                                            ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:156: Define or directive not defined: \'`ALU_SLTS\'\n                   alu_op_o <= `ALU_SLTS;\n                               ^~~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:156: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                   alu_op_o <= `ALU_SLTS;\n                                        ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:163: Define or directive not defined: \'`ALU_SLTU\'\n                   alu_op_o <= `ALU_SLTU;\n                               ^~~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:163: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                   alu_op_o <= `ALU_SLTU;\n                                        ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:170: Define or directive not defined: \'`ALU_XOR\'\n                   alu_op_o <= `ALU_XOR;\n                               ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:170: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                   alu_op_o <= `ALU_XOR;\n                                       ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:179: Define or directive not defined: \'`ALU_SRL\'\n                        alu_op_o <= `ALU_SRL;\n                                    ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:179: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                        alu_op_o <= `ALU_SRL;\n                                            ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:185: Define or directive not defined: \'`ALU_SRA\'\n                        alu_op_o <= `ALU_SRA;\n                                    ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:185: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                        alu_op_o <= `ALU_SRA;\n                                            ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:201: Define or directive not defined: \'`ALU_OR\'\n                   alu_op_o <= `ALU_OR;\n                               ^~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:201: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                   alu_op_o <= `ALU_OR;\n                                      ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:208: Define or directive not defined: \'`ALU_AND\'\n                   alu_op_o <= `ALU_AND;\n                               ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:208: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                   alu_op_o <= `ALU_AND;\n                                       ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:216: Define or directive not defined: \'`LOAD_OPCODE\'\n           `LOAD_OPCODE: begin\n           ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:216: syntax error, unexpected begin, expecting IDENTIFIER or PACKAGE-IDENTIFIER or TYPE-IDENTIFIER or new\n           `LOAD_OPCODE: begin\n                         ^~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:230: Define or directive not defined: \'`ALU_ADD\'\n                   alu_op_o <= `ALU_ADD;\n                               ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:230: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                   alu_op_o <= `ALU_ADD;\n                                       ^\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:240: Define or directive not defined: \'`ALU_ADD\'\n                   alu_op_o <= `ALU_ADD;\n                               ^~~~~~~~\n%Error: data/full_repos/permissive/440575220/riscv_decode.v:240: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                   alu_op_o <= `ALU_ADD;\n                                       ^\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
module riscv_decoder(
                     input [31:0]                   fetched_instr_i,
                     output reg [1:0]               ex_op_a_sel_o,
                     output reg [2:0]               ex_op_b_sel_o,
                     output reg [`ALU_OP_WIDTH-1:0] alu_op_o,
                     output reg                     mem_req_o,
                     output reg                     mem_we_o,
                     output reg [2:0]               mem_size_o,
                     output reg                     gpr_we_a_o,
                     output reg                     wb_src_sel_o,
                     output reg                     illegal_instr_o,
                     output reg                     branch_o,
                     output reg                     jal_o,
                     output reg                     jalr_o,
                     input                          stall,
                     output                         enpc
                     );
   assign enpc = ~stall;

   wire [6:0]                                       op_code = fetched_instr_i[6:0];
   wire [2:0]                                       funct3 = fetched_instr_i[14:12];
   wire [6:0]                                       funct7 = fetched_instr_i[31:25];


   always @ (*) begin
      if(op_code[1:0] == 2'b11) begin
         case (op_code[6:2])
           `OP_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 0;
              ex_op_b_sel_o <= 0;
              case (funct7)
                7'h0: begin
                   case (funct3)
                     3'h0: begin
                        alu_op_o <= `ALU_ADD;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end

                     3'h1: begin
                        alu_op_o <= `ALU_SLL;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end

                     3'h2: begin
                        alu_op_o <= `ALU_SLTS;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end

                     3'h3: begin
                        alu_op_o <= `ALU_SLTU;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end

                     3'h4: begin
                        alu_op_o <= `ALU_XOR;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end

                     3'h5: begin
                        alu_op_o <= `ALU_SRL;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end

                     3'h6: begin
                        alu_op_o <= `ALU_OR;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end

                     3'h7: begin
                        alu_op_o <= `ALU_AND;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end
                   endcase

                end
                7'h20: begin
                   case (funct3)
                     3'h0: begin
                        alu_op_o <= `ALU_SUB;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end
                     3'h5: begin
                        alu_op_o <= `ALU_SRA;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end
                     default: begin
                        alu_op_o <= 0;
                        gpr_we_a_o <= 0;
                        illegal_instr_o <= 1;
                     end
                   endcase
                end

                default: begin
                   alu_op_o <= 0;
                   gpr_we_a_o <= 0;
                   illegal_instr_o <= 1;
                end
              endcase
           end

           `OP_IMM_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 0;
              case (funct3)
                3'h0: begin
                   alu_op_o <= `ALU_ADD;
                   gpr_we_a_o <= 1;
                   ex_op_b_sel_o <= 1;
                   illegal_instr_o <= 0;
                end

                3'h1: begin
                   case (funct7)
                     7'h0: begin
                        alu_op_o <= `ALU_SLL;
                        gpr_we_a_o <= 1;
                        ex_op_b_sel_o <= 1;
                        illegal_instr_o <= 0;
                     end
                     default: begin
                        alu_op_o <= 0;
                        gpr_we_a_o <= 0;
                        ex_op_b_sel_o <= 0;
                        illegal_instr_o <= 1;
                     end
                   endcase
                end

                3'h2: begin
                   alu_op_o <= `ALU_SLTS;
                   gpr_we_a_o <= 1;
                   ex_op_b_sel_o <= 1;
                   illegal_instr_o <= 0;
                end

                3'h3: begin
                   alu_op_o <= `ALU_SLTU;
                   gpr_we_a_o <= 1;
                   ex_op_b_sel_o <= 1;
                   illegal_instr_o <= 0;
                end

                3'h4: begin
                   alu_op_o <= `ALU_XOR;
                   gpr_we_a_o <= 1;
                   ex_op_b_sel_o <= 1;
                   illegal_instr_o <= 0;
                end

                3'h5: begin
                   case (funct7)
                     7'h0: begin
                        alu_op_o <= `ALU_SRL;
                        gpr_we_a_o <= 1;
                        ex_op_b_sel_o <= 1;
                        illegal_instr_o <= 0;
                     end
                     7'h20: begin
                        alu_op_o <= `ALU_SRA;
                        gpr_we_a_o <= 1;
                        ex_op_b_sel_o <= 1;
                        illegal_instr_o <= 0;
                     end
                     default: begin
                        alu_op_o <= 0;
                        gpr_we_a_o <= 0;
                        ex_op_b_sel_o <= 0;
                        illegal_instr_o <= 1;
                     end
                   endcase

                end

                3'h6: begin
                   alu_op_o <= `ALU_OR;
                   gpr_we_a_o <= 1;
                   ex_op_b_sel_o <= 1;
                   illegal_instr_o <= 0;
                end

                3'h7: begin
                   alu_op_o <= `ALU_AND;
                   gpr_we_a_o <= 1;
                   ex_op_b_sel_o <= 1;
                   illegal_instr_o <= 0;
                end
              endcase
           end

           `LOAD_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              mem_we_o <= 0;
              ex_op_a_sel_o <= 0;

              case (funct3)
                4'h0: begin
                   mem_size_o <= 3'd0;
                   wb_src_sel_o <= 1;
                   gpr_we_a_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 1;
                   alu_op_o <= `ALU_ADD;
                   illegal_instr_o <= 0;
                end

                4'h1: begin
                   mem_size_o <= 3'd1;
                   wb_src_sel_o <= 1;
                   gpr_we_a_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 1;
                   alu_op_o <= `ALU_ADD;
                   illegal_instr_o <= 0;
                end

                4'h2: begin
                   mem_size_o <= 3'd2;
                   wb_src_sel_o <= 1;
                   gpr_we_a_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 1;
                   alu_op_o <= `ALU_ADD;
                   illegal_instr_o <= 0;
                end

                4'h4: begin
                   mem_size_o <= 3'd4;
                   wb_src_sel_o <= 1;
                   gpr_we_a_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 1;
                   alu_op_o <= `ALU_ADD;
                   illegal_instr_o <= 0;
                end

                4'h5: begin
                   mem_size_o <= 3'd5;
                   wb_src_sel_o <= 1;
                   gpr_we_a_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 1;
                   alu_op_o <= `ALU_ADD;
                   illegal_instr_o <= 0;
                end
                default: begin
                   mem_size_o <= 0;
                   wb_src_sel_o <= 0;
                   gpr_we_a_o <= 0;
                   mem_req_o <= 0;
                   ex_op_b_sel_o <= 0;
                   alu_op_o <= 0;
                   illegal_instr_o <= 1;
                end
              endcase
           end

           `STORE_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 0;
              ex_op_a_sel_o <= 0;
              case (funct3)
                4'h0: begin
                   alu_op_o <= `ALU_ADD;
                   mem_size_o <= 3'd0;
                   mem_we_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 3;
                   illegal_instr_o <= 0;
                end

                4'h1: begin
                   alu_op_o <= `ALU_ADD;
                   mem_size_o <= 3'd1;
                   mem_we_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 3;
                   illegal_instr_o <= 0;
                end

                4'h2: begin
                   alu_op_o <= `ALU_ADD;
                   mem_size_o <= 3'd2;
                   mem_we_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 3;
                   illegal_instr_o <= 0;
                end

                default: begin
                   alu_op_o <= 0;
                   mem_size_o <= 0;
                   mem_we_o <= 0;
                   mem_req_o <= 0;
                   ex_op_b_sel_o <= 0;
                   illegal_instr_o <= 1;
                end
              endcase
           end

           `BRANCH_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 0;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 0;
              ex_op_b_sel_o <= 0;
              case (funct3)
                4'h0: begin
                   alu_op_o <= `ALU_EQ;
                   branch_o <= 1;
                   illegal_instr_o <= 0;
                end

                4'h1: begin
                   alu_op_o <= `ALU_NE;
                   branch_o <= 1;
                   illegal_instr_o <= 0;
                end

                4'h4: begin
                   alu_op_o <= `ALU_LTS;
                   branch_o <= 1;
                   illegal_instr_o <= 0;
                end

                4'h5: begin
                   alu_op_o <= `ALU_GES;
                   branch_o <= 1;
                   illegal_instr_o <= 0;
                end
                4'h6: begin
                   alu_op_o <= `ALU_LTU;
                   branch_o <= 1;
                   illegal_instr_o <= 0;
                end

                4'h7: begin
                   alu_op_o <= `ALU_GEU;
                   branch_o <= 1;
                   illegal_instr_o <= 0;
                end

                default: begin
                   alu_op_o <= 0;
                   branch_o <= 0;
                   illegal_instr_o <= 1;
                end
              endcase
           end

           `JAL_OPCODE: begin
              jal_o <= 1;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 1;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 1;
              ex_op_b_sel_o <= 4;
              alu_op_o <= 0;
              illegal_instr_o <= 0;
           end

           `JALR_OPCODE: begin
              jal_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              alu_op_o <= 0;
              case (funct3)
                3'h0: begin
                   jalr_o <= 1;
                   ex_op_a_sel_o <= 1;
                   ex_op_b_sel_o <= 4;
                   gpr_we_a_o <= 1;
                   illegal_instr_o <= 0;
                end

                default: begin
                   jalr_o <= 0;
                   ex_op_a_sel_o <= 0;
                   ex_op_b_sel_o <= 0;
                   gpr_we_a_o <= 0;
                   illegal_instr_o <= 1;
                end
              endcase
           end

           `LUI_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 1;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 2;
              ex_op_b_sel_o <= 2;
              alu_op_o <= `ALU_ADD;
              illegal_instr_o <= 0;
           end

           `AUIPC_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 1;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 1;
              ex_op_b_sel_o <= 2;
              alu_op_o <= `ALU_ADD;
              illegal_instr_o <= 0;
           end

           `SYSTEM_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 0;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 0;
              ex_op_b_sel_o <= 0;
              alu_op_o <= 0;
              illegal_instr_o <= 0;
           end

           `MISC_MEM_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 0;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 0;
              ex_op_b_sel_o <= 0;
              alu_op_o <= 0;
              illegal_instr_o <= 0;
           end

           default: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 0;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 0;
              ex_op_b_sel_o <= 0;
              alu_op_o <= 0;
              illegal_instr_o <= 1;
           end

         endcase
      end
      else begin
         jal_o <= 0;
         jalr_o <= 0;
         branch_o <= 0;
         wb_src_sel_o <= 0;
         gpr_we_a_o <= 0;
         mem_we_o <= 0;
         mem_req_o <= 0;
         mem_size_o <= 0;
         ex_op_a_sel_o <= 0;
         ex_op_b_sel_o <= 0;
         alu_op_o <= 0;
         illegal_instr_o <= 1;
      end
   end
endmodule
module riscv_decoder(
                     input [31:0]                   fetched_instr_i,
                     output reg [1:0]               ex_op_a_sel_o,
                     output reg [2:0]               ex_op_b_sel_o,
                     output reg [`ALU_OP_WIDTH-1:0] alu_op_o,
                     output reg                     mem_req_o,
                     output reg                     mem_we_o,
                     output reg [2:0]               mem_size_o,
                     output reg                     gpr_we_a_o,
                     output reg                     wb_src_sel_o,
                     output reg                     illegal_instr_o,
                     output reg                     branch_o,
                     output reg                     jal_o,
                     output reg                     jalr_o,
                     input                          stall,
                     output                         enpc
                     );

   assign enpc = ~stall;

   wire [6:0]                                       op_code = fetched_instr_i[6:0];
   wire [2:0]                                       funct3 = fetched_instr_i[14:12];
   wire [6:0]                                       funct7 = fetched_instr_i[31:25];


   always @ (*) begin
      if(op_code[1:0] == 2'b11) begin
         case (op_code[6:2])
           `OP_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 0;
              ex_op_b_sel_o <= 0;
              case (funct7)
                7'h0: begin
                   case (funct3)
                     3'h0: begin
                        alu_op_o <= `ALU_ADD;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end

                     3'h1: begin
                        alu_op_o <= `ALU_SLL;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end

                     3'h2: begin
                        alu_op_o <= `ALU_SLTS;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end

                     3'h3: begin
                        alu_op_o <= `ALU_SLTU;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end

                     3'h4: begin
                        alu_op_o <= `ALU_XOR;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end

                     3'h5: begin
                        alu_op_o <= `ALU_SRL;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end

                     3'h6: begin
                        alu_op_o <= `ALU_OR;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end

                     3'h7: begin
                        alu_op_o <= `ALU_AND;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end
                   endcase

                end
                7'h20: begin
                   case (funct3)
                     3'h0: begin
                        alu_op_o <= `ALU_SUB;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end
                     3'h5: begin
                        alu_op_o <= `ALU_SRA;
                        gpr_we_a_o <= 1;
                        illegal_instr_o <= 0;
                     end
                     default: begin
                        alu_op_o <= 0;
                        gpr_we_a_o <= 0;
                        illegal_instr_o <= 1;
                     end
                   endcase
                end

                default: begin
                   alu_op_o <= 0;
                   gpr_we_a_o <= 0;
                   illegal_instr_o <= 1;
                end
              endcase
           end

           `OP_IMM_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 0;
              case (funct3)
                3'h0: begin
                   alu_op_o <= `ALU_ADD;
                   gpr_we_a_o <= 1;
                   ex_op_b_sel_o <= 1;
                   illegal_instr_o <= 0;
                end

                3'h1: begin
                   case (funct7)
                     7'h0: begin
                        alu_op_o <= `ALU_SLL;
                        gpr_we_a_o <= 1;
                        ex_op_b_sel_o <= 1;
                        illegal_instr_o <= 0;
                     end
                     default: begin
                        alu_op_o <= 0;
                        gpr_we_a_o <= 0;
                        ex_op_b_sel_o <= 0;
                        illegal_instr_o <= 1;
                     end
                   endcase
                end

                3'h2: begin
                   alu_op_o <= `ALU_SLTS;
                   gpr_we_a_o <= 1;
                   ex_op_b_sel_o <= 1;
                   illegal_instr_o <= 0;
                end

                3'h3: begin
                   alu_op_o <= `ALU_SLTU;
                   gpr_we_a_o <= 1;
                   ex_op_b_sel_o <= 1;
                   illegal_instr_o <= 0;
                end

                3'h4: begin
                   alu_op_o <= `ALU_XOR;
                   gpr_we_a_o <= 1;
                   ex_op_b_sel_o <= 1;
                   illegal_instr_o <= 0;
                end

                3'h5: begin
                   case (funct7)
                     7'h0: begin
                        alu_op_o <= `ALU_SRL;
                        gpr_we_a_o <= 1;
                        ex_op_b_sel_o <= 1;
                        illegal_instr_o <= 0;
                     end
                     7'h20: begin
                        alu_op_o <= `ALU_SRA;
                        gpr_we_a_o <= 1;
                        ex_op_b_sel_o <= 1;
                        illegal_instr_o <= 0;
                     end
                     default: begin
                        alu_op_o <= 0;
                        gpr_we_a_o <= 0;
                        ex_op_b_sel_o <= 0;
                        illegal_instr_o <= 1;
                     end
                   endcase

                end

                3'h6: begin
                   alu_op_o <= `ALU_OR;
                   gpr_we_a_o <= 1;
                   ex_op_b_sel_o <= 1;
                   illegal_instr_o <= 0;
                end

                3'h7: begin
                   alu_op_o <= `ALU_AND;
                   gpr_we_a_o <= 1;
                   ex_op_b_sel_o <= 1;
                   illegal_instr_o <= 0;
                end
              endcase
           end

           `LOAD_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              mem_we_o <= 0;
              ex_op_a_sel_o <= 0;

              case (funct3)
                4'h0: begin
                   mem_size_o <= 3'd0;
                   wb_src_sel_o <= 1;
                   gpr_we_a_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 1;
                   alu_op_o <= `ALU_ADD;
                   illegal_instr_o <= 0;
                end

                4'h1: begin
                   mem_size_o <= 3'd1;
                   wb_src_sel_o <= 1;
                   gpr_we_a_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 1;
                   alu_op_o <= `ALU_ADD;
                   illegal_instr_o <= 0;
                end

                4'h2: begin
                   mem_size_o <= 3'd2;
                   wb_src_sel_o <= 1;
                   gpr_we_a_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 1;
                   alu_op_o <= `ALU_ADD;
                   illegal_instr_o <= 0;
                end

                4'h4: begin
                   mem_size_o <= 3'd4;
                   wb_src_sel_o <= 1;
                   gpr_we_a_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 1;
                   alu_op_o <= `ALU_ADD;
                   illegal_instr_o <= 0;
                end

                4'h5: begin
                   mem_size_o <= 3'd5;
                   wb_src_sel_o <= 1;
                   gpr_we_a_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 1;
                   alu_op_o <= `ALU_ADD;
                   illegal_instr_o <= 0;
                end
                default: begin
                   mem_size_o <= 0;
                   wb_src_sel_o <= 0;
                   gpr_we_a_o <= 0;
                   mem_req_o <= 0;
                   ex_op_b_sel_o <= 0;
                   alu_op_o <= 0;
                   illegal_instr_o <= 1;
                end
              endcase
           end

           `STORE_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 0;
              ex_op_a_sel_o <= 0;
              case (funct3)
                4'h0: begin
                   alu_op_o <= `ALU_ADD;
                   mem_size_o <= 3'd0;
                   mem_we_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 3;
                   illegal_instr_o <= 0;
                end

                4'h1: begin
                   alu_op_o <= `ALU_ADD;
                   mem_size_o <= 3'd1;
                   mem_we_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 3;
                   illegal_instr_o <= 0;
                end

                4'h2: begin
                   alu_op_o <= `ALU_ADD;
                   mem_size_o <= 3'd2;
                   mem_we_o <= 1;
                   mem_req_o <= 1;
                   ex_op_b_sel_o <= 3;
                   illegal_instr_o <= 0;
                end

                default: begin
                   alu_op_o <= 0;
                   mem_size_o <= 0;
                   mem_we_o <= 0;
                   mem_req_o <= 0;
                   ex_op_b_sel_o <= 0;
                   illegal_instr_o <= 1;
                end
              endcase
           end

           `BRANCH_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 0;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 0;
              ex_op_b_sel_o <= 0;
              case (funct3)
                4'h0: begin
                   alu_op_o <= `ALU_EQ;
                   branch_o <= 1;
                   illegal_instr_o <= 0;
                end

                4'h1: begin
                   alu_op_o <= `ALU_NE;
                   branch_o <= 1;
                   illegal_instr_o <= 0;
                end

                4'h4: begin
                   alu_op_o <= `ALU_LTS;
                   branch_o <= 1;
                   illegal_instr_o <= 0;
                end

                4'h5: begin
                   alu_op_o <= `ALU_GES;
                   branch_o <= 1;
                   illegal_instr_o <= 0;
                end
                4'h6: begin
                   alu_op_o <= `ALU_LTU;
                   branch_o <= 1;
                   illegal_instr_o <= 0;
                end

                4'h7: begin
                   alu_op_o <= `ALU_GEU;
                   branch_o <= 1;
                   illegal_instr_o <= 0;
                end

                default: begin
                   alu_op_o <= 0;
                   branch_o <= 0;
                   illegal_instr_o <= 1;
                end
              endcase
           end

           `JAL_OPCODE: begin
              jal_o <= 1;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 1;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 1;
              ex_op_b_sel_o <= 4;
              alu_op_o <= 0;
              illegal_instr_o <= 0;
           end

           `JALR_OPCODE: begin
              jal_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              alu_op_o <= 0;
              case (funct3)
                3'h0: begin
                   jalr_o <= 1;
                   ex_op_a_sel_o <= 1;
                   ex_op_b_sel_o <= 4;
                   gpr_we_a_o <= 1;
                   illegal_instr_o <= 0;
                end

                default: begin
                   jalr_o <= 0;
                   ex_op_a_sel_o <= 0;
                   ex_op_b_sel_o <= 0;
                   gpr_we_a_o <= 0;
                   illegal_instr_o <= 1;
                end
              endcase
           end

           `LUI_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 1;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 2;
              ex_op_b_sel_o <= 2;
              alu_op_o <= `ALU_ADD;
              illegal_instr_o <= 0;
           end

           `AUIPC_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 1;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 1;
              ex_op_b_sel_o <= 2;
              alu_op_o <= `ALU_ADD;
              illegal_instr_o <= 0;
           end

           `SYSTEM_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 0;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 0;
              ex_op_b_sel_o <= 0;
              alu_op_o <= 0;
              illegal_instr_o <= 0;
           end

           `MISC_MEM_OPCODE: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 0;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 0;
              ex_op_b_sel_o <= 0;
              alu_op_o <= 0;
              illegal_instr_o <= 0;
           end

           default: begin
              jal_o <= 0;
              jalr_o <= 0;
              branch_o <= 0;
              wb_src_sel_o <= 0;
              gpr_we_a_o <= 0;
              mem_we_o <= 0;
              mem_req_o <= 0;
              mem_size_o <= 0;
              ex_op_a_sel_o <= 0;
              ex_op_b_sel_o <= 0;
              alu_op_o <= 0;
              illegal_instr_o <= 1;
           end

         endcase
      end
      else begin
         jal_o <= 0;
         jalr_o <= 0;
         branch_o <= 0;
         wb_src_sel_o <= 0;
         gpr_we_a_o <= 0;
         mem_we_o <= 0;
         mem_req_o <= 0;
         mem_size_o <= 0;
         ex_op_a_sel_o <= 0;
         ex_op_b_sel_o <= 0;
         alu_op_o <= 0;
         illegal_instr_o <= 1;
      end
   end
endmodule