data/full_repos/permissive/417288846/List_2/Task_1/parity_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/417288846/List_2/Task_1/parity_tb.v:18: Unsupported: Ignoring delay on this delayed statement.\n            #1 num = grey_code(i);\n            ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/417288846/List_2/Task_1/parity_tb.v:23: Unsupported or unknown PLI call: $monitor\n    initial $monitor ($time, " code: %b, parity: %d", num, out);\n            ^~~~~~~~\n%Error: Exiting due to 1 error(s), 1 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module testbench;
    function automatic integer grey_code(input integer num);
        grey_code = num ^ (num >> 1);
    endfunction

    parameter length = 10;
    integer i;
    reg [length:0] num;
    wire out;

    parity_checker #(length) pc1(.num(num), .parity(out));

    initial begin
        for (i = 0; i < 2 ** length; i = i + 1) begin
            #1 num = grey_code(i);
        end

    end

    initial $monitor ($time, " code: %b, parity: %d", num, out);
endmodule
module testbench;

    function automatic integer grey_code(input integer num);
        grey_code = num ^ (num >> 1);
    endfunction

    parameter length = 10;
    integer i;
    reg [length:0] num;
    wire out;

    parity_checker #(length) pc1(.num(num), .parity(out));

    initial begin
        for (i = 0; i < 2 ** length; i = i + 1) begin
            #1 num = grey_code(i);
        end

    end

    initial $monitor ($time, " code: %b, parity: %d", num, out);
endmodule