data/full_repos/permissive/458134463/Modules/InstructionMemory.v
data/verilator_xmls/82383730-09b9-4d59-90eb-6391324a9551.xml
module InstructionMemory(read_address, instruction);

input [31:0] read_address;

output reg [15:0] instruction;

reg [15:0] memory [29:0];


always @(*) begin
	instruction[15:0] = memory[read_address];
end
		
endmodule
module InstructionMemory(read_address, instruction);


input [31:0] read_address;

output reg [15:0] instruction;

reg [15:0] memory [29:0];


always @(*) begin
	instruction[15:0] = memory[read_address];
end
		
endmodule