data/full_repos/permissive/458737381/src/verilog-parser/tests/lsu_stb_ctl.v
1: b'%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/lsu_stb_ctl.v:29: Cannot find include file: sys.h\n`include "sys.h" // system level definition file which contains the  \n         ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/sys.h\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/sys.h.v\n             data/full_repos/permissive/458737381/src/verilog-parser/tests,data/full_repos/permissive/458737381/sys.h.sv\n             sys.h\n             sys.h.v\n             sys.h.sv\n             obj_dir/sys.h\n             obj_dir/sys.h.v\n             obj_dir/sys.h.sv\n%Error: data/full_repos/permissive/458737381/src/verilog-parser/tests/lsu_stb_ctl.v:32: Cannot find include file: iop.h\n`include "iop.h" \n         ^~~~~~~\n%Error: Exiting due to 2 error(s)\n'
module lsu_stb_ctl (

   so, stb_clk_en_l, stb_crnt_ack_id, lsu_stb_empty, stb_l2bnk_addr, 
   stb_atm_rq_type, stb_wrptr, stb_rd_for_pcx, stb_pcx_rptr, 
   stb_wrptr_prev, stb_state_ced_mod, stb_state_vld_out, 
   lsu_stbcnt, stb_rmo_st_issue, stb_full, st_pcx_rq_kill_w2, 

   rclk, grst_l, arst_l, si, se, thrd_en_g, cpx_st_ack_tid, 
   pcx_rq_for_stb, st_ack_dq_stb, stb_flush_st_g, stb_cam_wvld_m, 
   lsu_blk_st_m, tlb_pgnum_g, pcx_req_squash, flshinst_rst, 
   lsu_stbctl_flush_pipe_w, flsh_inst_m, stb_state_si_0, 
   stb_state_si_1, stb_state_si_2, stb_state_si_3, stb_state_si_4, 
   stb_state_si_5, stb_state_si_6, stb_state_si_7, stb_state_rtype_0, 
   stb_state_rtype_1, stb_state_rtype_2, stb_state_rtype_3, 
   stb_state_rtype_4, stb_state_rtype_5, stb_state_rtype_6, 
   stb_state_rtype_7, stb_state_rmo, stb_alt_sel, stb_alt_addr, 
   lsu_dtlb_bypass_e, tlb_cam_hit, lsu_outstanding_rmo_st_max,
   st_dtlb_perr_g
   ) ;	


   input rclk ;			
   input grst_l;
   input arst_l;
   
   input si;
   input se;
   output so;
   
input		thrd_en_g ;
input		cpx_st_ack_tid ;
input		pcx_rq_for_stb ;
input		st_ack_dq_stb ;
input		stb_flush_st_g ;
input		stb_cam_wvld_m ;

input		lsu_blk_st_m ;





input  [39:37]  tlb_pgnum_g ;
input		pcx_req_squash ;

input		flshinst_rst ;
input		lsu_stbctl_flush_pipe_w ;

   input flsh_inst_m;
   


   input [3:2] stb_state_si_0;
   input [3:2] stb_state_si_1;
   input [3:2] stb_state_si_2;
   input [3:2] stb_state_si_3;
   input [3:2] stb_state_si_4;
   input [3:2] stb_state_si_5;
   input [3:2] stb_state_si_6;
   input [3:2] stb_state_si_7;

   input [2:1] stb_state_rtype_0;
   input [2:1] stb_state_rtype_1;
   input [2:1] stb_state_rtype_2;
   input [2:1] stb_state_rtype_3;
   input [2:1] stb_state_rtype_4;
   input [2:1] stb_state_rtype_5;
   input [2:1] stb_state_rtype_6;
   input [2:1] stb_state_rtype_7;


   input [7:0] stb_state_rmo;

   input       stb_alt_sel ;
   input [2:0] stb_alt_addr ;

input          lsu_dtlb_bypass_e;
input          tlb_cam_hit;

input		st_dtlb_perr_g ;
 

   output [7:0] stb_clk_en_l;
  
output  [2:0]   stb_crnt_ack_id ;

output		lsu_stb_empty ;

output	[2:0]	stb_l2bnk_addr ;
output	[2:1]	stb_atm_rq_type ;

output	[2:0]	stb_wrptr ;

output		stb_rd_for_pcx ;
output	[2:0]	stb_pcx_rptr ;
output	[2:0]	stb_wrptr_prev ;
output  [7:0]   stb_state_ced_mod ;
output  [7:0]   stb_state_vld_out ;

output	[3:0]	lsu_stbcnt ;

output		stb_rmo_st_issue ;

output		stb_full ;
output		st_pcx_rq_kill_w2 ;

   input  lsu_outstanding_rmo_st_max;
   
   wire [7:0] stb_state_rst;
   
   wire [7:0] stb_state_vld;
   wire [7:0] stb_state_vld_din;
   wire [7:0] stb_state_vld_set;
   
   wire [7:0] stb_state_ced;
   wire [7:0] stb_state_ced_din;
   wire [7:0] stb_state_ced_set;

   wire [7:0] stb_state_ack;
   wire [7:0] stb_state_ack_din;
   wire [7:0] stb_state_ack_set;

   wire [3:2] stb_state_si_0;
   wire [3:2] stb_state_si_1;
   wire [3:2] stb_state_si_2;
   wire [3:2] stb_state_si_3;
   wire [3:2] stb_state_si_4;
   wire [3:2] stb_state_si_5;
   wire [3:2] stb_state_si_6;
   wire [3:2] stb_state_si_7;

   wire [7:0] stb_state_io;
   wire [7:0] stb_state_io_din;

   wire [7:0] stb_state_rmo;

   
   wire [2:1] stb_state_rtype_0;
   wire [2:1] stb_state_rtype_1;
   wire [2:1] stb_state_rtype_2;
   wire [2:1] stb_state_rtype_3;
   wire [2:1] stb_state_rtype_4;
   wire [2:1] stb_state_rtype_5;
   wire [2:1] stb_state_rtype_6;
   wire [2:1] stb_state_rtype_7;

   wire [2:0] stb_l2bnk_addr;
   wire [2:1] stb_atm_rq_type;
      



wire	[3:0]	stb_wptr_prev ;
wire		stb_rptr_dfq_en ;
wire		update_stb_wptr ;

wire	[3:0]	stb_rptr_dfq_new, stb_rptr_dfq ;
wire 	valid_entry_for_pcx ;
wire	[7:0]	dec_wptr_g, dec_rptr_dfq, dec_rptr_pcx, dec_ackptr ;
wire	[7:0]	dec_wptr_m ;




wire		ack_vld ;
wire	[3:0]	stb_wptr_new, stb_wptr ;	
wire		stb_cam_wvld_g ;
wire	[7:0] 	inflight_vld_g ;
wire		dq_vld_d1,dq_vld_d2 ;
wire	[7:0]	dqptr_d1,dqptr_d2;
wire		pcx_rq_for_stb_d1 ;
wire    	pcx_rq_for_stb_d2,pcx_req_squash_d2 ;

   wire       clk;
   assign     clk = rclk;

   wire       rst_l;
   wire       stb_ctl_rst_l;
   
   dffrl_async rstff(.din (grst_l),
                     .q   (stb_ctl_rst_l),
                     .clk (clk), .se(se), .si(), .so(),
                     .rst_l (arst_l));
   assign     rst_l = stb_ctl_rst_l;
   







   wire   reset;



   assign reset = ~rst_l | flshinst_rst ;



















dff_s #(2)  rq_stgd1       (
        .din    ({pcx_rq_for_stb_d1,pcx_req_squash}), 
        .q    	({pcx_rq_for_stb_d2,pcx_req_squash_d2}), 
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

wire	ffu_bst_wr_g ;
dff_s #(1)  ff_bstg       (
        .din    (lsu_blk_st_m),
        .q    	(ffu_bst_wr_g),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

wire	full_flush_st_g ;

assign	full_flush_st_g = (stb_flush_st_g | (lsu_stbctl_flush_pipe_w & ~ffu_bst_wr_g)) & stb_cam_wvld_g ;



wire      tlb_cam_hit_g, tlb_hit_g;
wire      dtlb_bypass_m, dtlb_bypass_g ;

dff_s #(1)  ff_dtlb_bypass_m       (
        .din    (lsu_dtlb_bypass_e),
        .q    	(dtlb_bypass_m),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

dff_s #(1)  ff_dtlb_bypass_g       (
        .din    (dtlb_bypass_m),
        .q    	(dtlb_bypass_g),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

dff_s #(1)  ff_tlb_cam_hit_g       (
        .din    (tlb_cam_hit),
        .q    	(tlb_cam_hit_g),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

assign  tlb_hit_g  =  tlb_cam_hit_g | dtlb_bypass_g | ffu_bst_wr_g;



assign	inflight_vld_g[7:0] = 
	dec_wptr_g[7:0] & {8{stb_cam_wvld_g & thrd_en_g}} ; 







wire [7:0] inflight_issue_g_tmp ;

assign  inflight_issue_g_tmp[7:0]  =  inflight_vld_g[7:0] & {8{tlb_hit_g}};

wire [7:0] inflight_issue_g ;
assign	inflight_issue_g[7:0] = 
	inflight_issue_g_tmp[7:0] & {8{~(|(stb_state_vld[7:0] & ~stb_state_ack[7:0]))}};  






wire	skid_ced, st_vld_rq_d2 ;
assign	st_vld_rq_d2 = pcx_rq_for_stb_d2 & ~pcx_req_squash_d2 ;
assign	skid_ced = pcx_rq_for_stb_d1 | st_vld_rq_d2 ;

assign	stb_state_ced_mod[7:0] =
	((dec_ackptr[7:0] & {8{st_vld_rq_d2}}) | stb_state_ced[7:0]) ;


   
wire  rmo_st_satuated;   






                          
   assign rmo_st_satuated  =  lsu_outstanding_rmo_st_max;
                      
wire	[7:0]	stb_state_ced_spec ;
assign	stb_state_ced_spec[7:0] =
	((dec_ackptr[7:0] & {8{skid_ced}}) | stb_state_ced[7:0]) | 
   (stb_state_rmo[7:0] & {8{rmo_st_satuated}});
   
assign 	dec_rptr_pcx[7:0] =
		 (inflight_issue_g[7:0] | stb_state_vld[7:0]) 

			& ~stb_state_ced_spec[7:0] &
		(({stb_state_vld[6:0],stb_state_vld[7]} &
		  {stb_state_ack[6:0],stb_state_ack[7]})
		| ~{stb_state_vld[6:0],stb_state_vld[7]}
		| dec_rptr_dfq[7:0]) ;







assign valid_entry_for_pcx = |dec_rptr_pcx[7:0] ;

wire	any_inflight_iss_g,any_inflight_iss_w2 ;
assign	any_inflight_iss_g = |inflight_vld_g[7:0] ;
wire	pick_inflight_iss_g,pick_inflight_iss_w2 ;
assign	pick_inflight_iss_g = |(dec_rptr_pcx[7:0] & inflight_issue_g[7:0]) ;

wire	st_pcx_rq_kill_g ;
assign	st_pcx_rq_kill_g = pick_inflight_iss_g & full_flush_st_g ;


wire	st_vld_squash_g,st_vld_squash_w2 ;
assign	st_vld_squash_g = any_inflight_iss_g & full_flush_st_g ;


wire st_pcx_rq_kill_tmp,st_vld_squash_tmp ;
wire st_dtlb_perr_w2 ;
dff_s #(5)  stkill_stgd1       (
        .din    ({st_pcx_rq_kill_g,st_vld_squash_g,
		any_inflight_iss_g,pick_inflight_iss_g,st_dtlb_perr_g}), 
	.q      ({st_pcx_rq_kill_tmp,st_vld_squash_tmp,
		any_inflight_iss_w2,pick_inflight_iss_w2,st_dtlb_perr_w2}), 
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

assign	st_pcx_rq_kill_w2 = 
		st_pcx_rq_kill_tmp | 
		(pick_inflight_iss_w2 & st_dtlb_perr_w2); 

assign	st_vld_squash_w2  =
		st_vld_squash_tmp  |
		(any_inflight_iss_w2 & st_dtlb_perr_w2);




assign stb_pcx_rptr[0] = dec_rptr_pcx[1] | dec_rptr_pcx[3] | dec_rptr_pcx[5] | dec_rptr_pcx[7] ;	
assign stb_pcx_rptr[1] = dec_rptr_pcx[2] | dec_rptr_pcx[3] | dec_rptr_pcx[6] | dec_rptr_pcx[7] ;	
assign stb_pcx_rptr[2] = dec_rptr_pcx[4] | dec_rptr_pcx[5] | dec_rptr_pcx[6] | dec_rptr_pcx[7] ;	



assign	stb_rd_for_pcx = valid_entry_for_pcx ; 








wire	incr_dfq_ptr ;









wire    stb_dq_rmo ;


assign	incr_dfq_ptr = st_ack_dq_stb | stb_dq_rmo ;

assign	stb_rptr_dfq_new[3:0]	=	stb_rptr_dfq[3:0]  + {3'b0, incr_dfq_ptr} ;


assign stb_rptr_dfq_en = st_ack_dq_stb | incr_dfq_ptr ; 

dffre_s #(4)  rptr_d	(
	.din		(stb_rptr_dfq_new[3:0]),.q	(stb_rptr_dfq[3:0]),
	.en		(stb_rptr_dfq_en),	.rst	(reset), 
	.clk		(clk), 
	.se		(se),	.si	(), .so	()
	);





assign	dec_rptr_dfq[0]	= ~stb_rptr_dfq[2] & ~stb_rptr_dfq[1] & ~stb_rptr_dfq[0] ;	
assign	dec_rptr_dfq[1]	= ~stb_rptr_dfq[2] & ~stb_rptr_dfq[1] &  stb_rptr_dfq[0] ;	
assign	dec_rptr_dfq[2]	= ~stb_rptr_dfq[2] &  stb_rptr_dfq[1] & ~stb_rptr_dfq[0] ;	
assign	dec_rptr_dfq[3]	= ~stb_rptr_dfq[2] &  stb_rptr_dfq[1] &  stb_rptr_dfq[0] ;	
assign	dec_rptr_dfq[4]	=  stb_rptr_dfq[2] & ~stb_rptr_dfq[1] & ~stb_rptr_dfq[0] ;	
assign	dec_rptr_dfq[5]	=  stb_rptr_dfq[2] & ~stb_rptr_dfq[1] &  stb_rptr_dfq[0] ;	
assign	dec_rptr_dfq[6]	=  stb_rptr_dfq[2] &  stb_rptr_dfq[1] & ~stb_rptr_dfq[0] ;	
assign	dec_rptr_dfq[7]	=  stb_rptr_dfq[2] &  stb_rptr_dfq[1] &  stb_rptr_dfq[0] ;


dff_s #(9)  dq_stgd1       (
        .din    ({dec_rptr_dfq[7:0],st_ack_dq_stb}), 
	.q      ({dqptr_d1[7:0],dq_vld_d1}),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

dff_s #(9)  dq_stgd2       (
        .din    ({dqptr_d1[7:0],dq_vld_d1}), 
	.q      ({dqptr_d2[7:0],dq_vld_d2}),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );













assign  update_stb_wptr         =       stb_cam_wvld_m ^  (full_flush_st_g | st_dtlb_perr_g);

assign  stb_wptr_new[3:0]       =       (full_flush_st_g | st_dtlb_perr_g) ?
                                                        stb_wptr_prev[3:0] :
                                                        stb_wptr[3:0] + {3'b0, stb_cam_wvld_m} ;

dff_s  wvld_stgg       (
        .din    (stb_cam_wvld_m), .q      (stb_cam_wvld_g),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );




dffre_s #(4)  wptr_new    (
        .din            (stb_wptr_new[3:0]),    .q      (stb_wptr[3:0]),
        .en             (update_stb_wptr),    .rst    (reset),
        .clk            (clk),
        .se             (se), .si     (), .so ()
        );

assign	stb_wrptr[2:0]	= stb_wptr[2:0] ;

wire [2:0] stb_wptr_m ;


assign  stb_wptr_m[2:0]       =      stb_wptr[2:0] ;



assign	dec_wptr_m[0] = ~stb_wptr_m[2] & ~stb_wptr_m[1] & ~stb_wptr_m[0] ;	
assign	dec_wptr_m[1] = ~stb_wptr_m[2] & ~stb_wptr_m[1] &  stb_wptr_m[0] ;	
assign	dec_wptr_m[2] = ~stb_wptr_m[2] &  stb_wptr_m[1] & ~stb_wptr_m[0] ;	
assign	dec_wptr_m[3] = ~stb_wptr_m[2] &  stb_wptr_m[1] &  stb_wptr_m[0] ;	
assign	dec_wptr_m[4] =  stb_wptr_m[2] & ~stb_wptr_m[1] & ~stb_wptr_m[0] ;	
assign	dec_wptr_m[5] =  stb_wptr_m[2] & ~stb_wptr_m[1] &  stb_wptr_m[0] ;	
assign	dec_wptr_m[6] =  stb_wptr_m[2] &  stb_wptr_m[1] & ~stb_wptr_m[0] ;	
assign	dec_wptr_m[7] =  stb_wptr_m[2] &  stb_wptr_m[1] &  stb_wptr_m[0] ;

dff_s #(8)  dwptr_stgg       (
        .din    (dec_wptr_m[7:0]), .q      (dec_wptr_g[7:0]),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );




assign	stb_wptr_prev[3:0] = stb_wptr[3:0] - {4'b0001} ;


assign	stb_wrptr_prev[2:0]	= stb_wptr_prev[2:0] ;





wire	[3:0]	stb_wptr_w2 ;


dff_s #(4)  wptr_stgw2       (
        .din    (stb_wptr[3:0]), .q      (stb_wptr_w2[3:0]),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

assign	lsu_stbcnt[3:0] =  (stb_wptr_w2[3:0] - stb_rptr_dfq[3:0]) ;


wire	stb_full_w2 ;
assign	stb_full_w2 = lsu_stbcnt[2] & lsu_stbcnt[1] & lsu_stbcnt[0] ;
dff_s   sfull (
        .din    (stb_full_w2), .q      (stb_full),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );
























dffre_s #(8)  ackptr_ff	(
	.din		(dec_rptr_pcx[7:0]), .q	(dec_ackptr[7:0]),
	.en		(pcx_rq_for_stb), .rst (reset),
	.clk		(clk), 
	.se		(se),	.si	(), .so	()
	);

   
assign 	ack_vld = cpx_st_ack_tid ;


assign  stb_crnt_ack_id[0] = dec_ackptr[1] | dec_ackptr[3] |
                                dec_ackptr[5] | dec_ackptr[7] ;
assign  stb_crnt_ack_id[1] = dec_ackptr[2] | dec_ackptr[3] |
                                dec_ackptr[6] | dec_ackptr[7] ;
assign  stb_crnt_ack_id[2] = dec_ackptr[4] | dec_ackptr[5] |
                                dec_ackptr[6] | dec_ackptr[7] ;       












wire   [2:0]  stb_alt_addr_g;
wire          stb_alt_sel_g;

dff_s #(4) ff_alt_addr_g       (
        .din    ({stb_alt_sel,stb_alt_addr[2:0]}), 
        .q      ({stb_alt_sel_g,stb_alt_addr_g[2:0]}),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

wire  flsh_inst_g;
dff_s #(1) ff_flsh_inst_g       (
        .din    (flsh_inst_m),
        .q      (flsh_inst_g),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

wire   stb_alt_io_g , tlb_pgnum_io_g ;

assign  stb_alt_io_g  =  
        stb_alt_addr_g[2] & ~(~stb_alt_addr_g[1] & stb_alt_addr_g[0]);
assign  tlb_pgnum_io_g  =  
        tlb_pgnum_g[39]  & ~(~tlb_pgnum_g[38]  & tlb_pgnum_g[37])  & ~flsh_inst_g;


wire   stb_non_l2bnk_g;
assign  stb_non_l2bnk_g  =  
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;








wire  [7:0]  stb_l2bnk_addr_b2;




assign  stb_l2bnk_addr_b2[0]  =  
     stb_state_vld[0] ? stb_state_io[0] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;

assign  stb_l2bnk_addr_b2[1]  =  
     stb_state_vld[1] ? stb_state_io[1] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;

assign  stb_l2bnk_addr_b2[2]  =  
     stb_state_vld[2] ? stb_state_io[2] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;

assign  stb_l2bnk_addr_b2[3]  =  
     stb_state_vld[3] ? stb_state_io[3] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;

assign  stb_l2bnk_addr_b2[4]  =  
     stb_state_vld[4] ? stb_state_io[4] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;

assign  stb_l2bnk_addr_b2[5]  =  
     stb_state_vld[5] ? stb_state_io[5] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;

assign  stb_l2bnk_addr_b2[6]  =  
     stb_state_vld[6] ? stb_state_io[6] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;

assign  stb_l2bnk_addr_b2[7]  =  
     stb_state_vld[7] ? stb_state_io[7] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;


dff_s  rqsel_stgg       (
        .din    (pcx_rq_for_stb), .q      (pcx_rq_for_stb_d1),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );






































			
















   wire	[7:0]	stb_issue_rmo ;
   wire	[7:0]	flush_vld_w2 ;

   assign	stb_issue_rmo[7:0] = 
	(dec_ackptr[7:0] & {8{st_vld_rq_d2}} & stb_state_rmo[7:0]) ;


   assign	stb_rmo_st_issue = |stb_issue_rmo[7:0] ;


   wire        rmo_pend,rmo_pend_d1;
   wire [7:0]  rmo_pend_ackptr , stb_dq_rmo_dfq_ptr;





   assign rmo_pend_ackptr[7:0]  =



          (dec_ackptr[7:0] & stb_state_rmo[7:0] & ~dqptr_d2[7:0]) & 

          ({stb_state_vld[6:0],stb_state_vld[7]} & ~{stb_state_rmo[6:0],stb_state_rmo[7]});

   assign rmo_pend = |rmo_pend_ackptr[7:0];

   wire   rmo_pend_rst;
   assign rmo_pend_rst  =  reset | stb_dq_rmo;

   dffre_s #(1)  ff_rmo_pend      (
         .din  (rmo_pend),
         .q    (rmo_pend_d1),
         .en   (st_vld_rq_d2),      
         .rst  (rmo_pend_rst),
         .clk  (clk),
         .se   (se), .si     (), .so ()
         );























































   assign stb_dq_rmo_dfq_ptr[7:0] = 
          (stb_issue_rmo[7:0]   & ~rmo_pend_ackptr[7:0]) |
          (dec_ackptr[7:0]      & {8{rmo_pend_d1 & ~rmo_pend}});

   assign stb_dq_rmo  =  |stb_dq_rmo_dfq_ptr[7:0];


   assign stb_state_rst[7:0] = 
	{8{reset}} | (dqptr_d2[7:0] & {8{dq_vld_d2}})

	| stb_dq_rmo_dfq_ptr[7:0] |

        flush_vld_w2[7:0] ;


   assign stb_state_vld_set[7:0] = dec_wptr_g[7:0] & {8{stb_cam_wvld_g & thrd_en_g}} ;

   assign stb_state_vld_din[7:0] = stb_state_vld_set[7:0] | 
                                  (~stb_state_rst[7:0] & stb_state_vld[7:0]);
  
   wire	[7:0] stb_state_vld_tmp ; 
   dff_s #(8)  ff_stb_state_vld       (
        .din    (stb_state_vld_din[7:0]), 
        .q      (stb_state_vld_tmp[7:0]    ),
        .clk    (clk),
        .se     (se), .si (), .so ()
        );
	
   assign stb_state_vld[7:0] = stb_state_vld_tmp[7:0] & ~flush_vld_w2[7:0] ;

   wire	[7:0] stb_state_vld_set_w2 ;
   dff_s #(8)  ff_stb_state_vld_set       (
        .din    (stb_state_vld_set[7:0]), 
        .q      (stb_state_vld_set_w2[7:0]    ),
        .clk    (clk),
        .se     (se), .si (), .so ()
        );

   assign flush_vld_w2[7:0] = stb_state_vld_set_w2[7:0] & {8{st_vld_squash_w2}} ;





   
   wire [7:0]  st_scm_vld ;
   assign st_scm_vld[7:0] = stb_state_vld_din[7:0] & ~stb_state_rmo[7:0] ;
   
   dff_s #(8)  ff_st_scm_vld       (
        .din    (st_scm_vld[7:0]), 
        .q      (stb_state_vld_out[7:0]    ),
        .clk    (clk),
        .se     (se), .si (), .so ()
        );


   assign stb_state_ced_set[7:0] = dec_ackptr[7:0] & {8{st_vld_rq_d2}} ;



   assign stb_state_ced_din[7:0] = ~stb_state_rst[7:0] & 
					(stb_state_ced_set[7:0] | stb_state_ced[7:0]);


   
   dff_s #(8)  ff_stb_state_ced       (
        .din    (stb_state_ced_din[7:0]), 
        .q      (stb_state_ced[7:0]    ),
        .clk    (clk),
        .se     (se), .si (), .so ()
        );


   assign stb_state_ack_set[7:0] = dec_ackptr[7:0] & {8{ack_vld}};
   assign stb_state_ack_din[7:0] = stb_state_ack_set[7:0] | 
                                  (~stb_state_rst[7:0] & stb_state_ack[7:0]);
   
   dff_s #(8)  ff_stb_state_ack       (
        .din    (stb_state_ack_din[7:0]), 
        .q      (stb_state_ack[7:0]    ),
        .clk    (clk),
        .se     (se), .si (), .so ()
        );


   wire [7:0] spec_wrt;   
   assign     spec_wrt [7:0] = dec_wptr_m[7:0] & {8{stb_cam_wvld_m}};
   assign     stb_clk_en_l [7:0] = ~spec_wrt[7:0];


 



  assign stb_state_io_din[7:0]  =  (stb_state_vld_set[7:0] & {8{stb_non_l2bnk_g}}) |
                                   (~stb_state_rst[7:0] & stb_state_io[7:0]);

   dff_s #(8)  ff_stb_state_io       (
        .din    (stb_state_io_din[7:0]), 
        .q      (stb_state_io[7:0]    ),
        .clk    (clk),
        .se     (se), .si (), .so ()
        );




assign	lsu_stb_empty = ~(|stb_state_vld[7:0]);






















   assign stb_l2bnk_addr[2:0] = {3{dec_rptr_pcx[0]}} & {stb_l2bnk_addr_b2[0], stb_state_si_0[3:2]} |
                                {3{dec_rptr_pcx[1]}} & {stb_l2bnk_addr_b2[1], stb_state_si_1[3:2]} |
                                {3{dec_rptr_pcx[2]}} & {stb_l2bnk_addr_b2[2], stb_state_si_2[3:2]} |
                                {3{dec_rptr_pcx[3]}} & {stb_l2bnk_addr_b2[3], stb_state_si_3[3:2]} |
                                {3{dec_rptr_pcx[4]}} & {stb_l2bnk_addr_b2[4], stb_state_si_4[3:2]} |
                                {3{dec_rptr_pcx[5]}} & {stb_l2bnk_addr_b2[5], stb_state_si_5[3:2]} |
                                {3{dec_rptr_pcx[6]}} & {stb_l2bnk_addr_b2[6], stb_state_si_6[3:2]} |
                                {3{dec_rptr_pcx[7]}} & {stb_l2bnk_addr_b2[7], stb_state_si_7[3:2]} ;
   
   assign stb_atm_rq_type[2:1]= {2{dec_rptr_pcx[0]}} &  stb_state_rtype_0[2:1] |
                                {2{dec_rptr_pcx[1]}} &  stb_state_rtype_1[2:1] |
                                {2{dec_rptr_pcx[2]}} &  stb_state_rtype_2[2:1] |
                                {2{dec_rptr_pcx[3]}} &  stb_state_rtype_3[2:1] |
                                {2{dec_rptr_pcx[4]}} &  stb_state_rtype_4[2:1] |
                                {2{dec_rptr_pcx[5]}} &  stb_state_rtype_5[2:1] |
                                {2{dec_rptr_pcx[6]}} &  stb_state_rtype_6[2:1] |
                                {2{dec_rptr_pcx[7]}} &  stb_state_rtype_7[2:1] ;
   

          
   
endmodule
module lsu_stb_ctl (

   so, stb_clk_en_l, stb_crnt_ack_id, lsu_stb_empty, stb_l2bnk_addr, 
   stb_atm_rq_type, stb_wrptr, stb_rd_for_pcx, stb_pcx_rptr, 
   stb_wrptr_prev, stb_state_ced_mod, stb_state_vld_out, 
   lsu_stbcnt, stb_rmo_st_issue, stb_full, st_pcx_rq_kill_w2, 

   rclk, grst_l, arst_l, si, se, thrd_en_g, cpx_st_ack_tid, 
   pcx_rq_for_stb, st_ack_dq_stb, stb_flush_st_g, stb_cam_wvld_m, 
   lsu_blk_st_m, tlb_pgnum_g, pcx_req_squash, flshinst_rst, 
   lsu_stbctl_flush_pipe_w, flsh_inst_m, stb_state_si_0, 
   stb_state_si_1, stb_state_si_2, stb_state_si_3, stb_state_si_4, 
   stb_state_si_5, stb_state_si_6, stb_state_si_7, stb_state_rtype_0, 
   stb_state_rtype_1, stb_state_rtype_2, stb_state_rtype_3, 
   stb_state_rtype_4, stb_state_rtype_5, stb_state_rtype_6, 
   stb_state_rtype_7, stb_state_rmo, stb_alt_sel, stb_alt_addr, 
   lsu_dtlb_bypass_e, tlb_cam_hit, lsu_outstanding_rmo_st_max,
   st_dtlb_perr_g
   ) ;
	


   input rclk ;			
   input grst_l;
   input arst_l;
   
   input si;
   input se;
   output so;
   
input		thrd_en_g ;
input		cpx_st_ack_tid ;
input		pcx_rq_for_stb ;
input		st_ack_dq_stb ;
input		stb_flush_st_g ;
input		stb_cam_wvld_m ;

input		lsu_blk_st_m ;





input  [39:37]  tlb_pgnum_g ;
input		pcx_req_squash ;

input		flshinst_rst ;
input		lsu_stbctl_flush_pipe_w ;

   input flsh_inst_m;
   


   input [3:2] stb_state_si_0;
   input [3:2] stb_state_si_1;
   input [3:2] stb_state_si_2;
   input [3:2] stb_state_si_3;
   input [3:2] stb_state_si_4;
   input [3:2] stb_state_si_5;
   input [3:2] stb_state_si_6;
   input [3:2] stb_state_si_7;

   input [2:1] stb_state_rtype_0;
   input [2:1] stb_state_rtype_1;
   input [2:1] stb_state_rtype_2;
   input [2:1] stb_state_rtype_3;
   input [2:1] stb_state_rtype_4;
   input [2:1] stb_state_rtype_5;
   input [2:1] stb_state_rtype_6;
   input [2:1] stb_state_rtype_7;


   input [7:0] stb_state_rmo;

   input       stb_alt_sel ;
   input [2:0] stb_alt_addr ;

input          lsu_dtlb_bypass_e;
input          tlb_cam_hit;

input		st_dtlb_perr_g ;
 

   output [7:0] stb_clk_en_l;
  
output  [2:0]   stb_crnt_ack_id ;

output		lsu_stb_empty ;

output	[2:0]	stb_l2bnk_addr ;
output	[2:1]	stb_atm_rq_type ;

output	[2:0]	stb_wrptr ;

output		stb_rd_for_pcx ;
output	[2:0]	stb_pcx_rptr ;
output	[2:0]	stb_wrptr_prev ;
output  [7:0]   stb_state_ced_mod ;
output  [7:0]   stb_state_vld_out ;

output	[3:0]	lsu_stbcnt ;

output		stb_rmo_st_issue ;

output		stb_full ;
output		st_pcx_rq_kill_w2 ;

   input  lsu_outstanding_rmo_st_max;
   
   wire [7:0] stb_state_rst;
   
   wire [7:0] stb_state_vld;
   wire [7:0] stb_state_vld_din;
   wire [7:0] stb_state_vld_set;
   
   wire [7:0] stb_state_ced;
   wire [7:0] stb_state_ced_din;
   wire [7:0] stb_state_ced_set;

   wire [7:0] stb_state_ack;
   wire [7:0] stb_state_ack_din;
   wire [7:0] stb_state_ack_set;

   wire [3:2] stb_state_si_0;
   wire [3:2] stb_state_si_1;
   wire [3:2] stb_state_si_2;
   wire [3:2] stb_state_si_3;
   wire [3:2] stb_state_si_4;
   wire [3:2] stb_state_si_5;
   wire [3:2] stb_state_si_6;
   wire [3:2] stb_state_si_7;

   wire [7:0] stb_state_io;
   wire [7:0] stb_state_io_din;

   wire [7:0] stb_state_rmo;

   
   wire [2:1] stb_state_rtype_0;
   wire [2:1] stb_state_rtype_1;
   wire [2:1] stb_state_rtype_2;
   wire [2:1] stb_state_rtype_3;
   wire [2:1] stb_state_rtype_4;
   wire [2:1] stb_state_rtype_5;
   wire [2:1] stb_state_rtype_6;
   wire [2:1] stb_state_rtype_7;

   wire [2:0] stb_l2bnk_addr;
   wire [2:1] stb_atm_rq_type;
      



wire	[3:0]	stb_wptr_prev ;
wire		stb_rptr_dfq_en ;
wire		update_stb_wptr ;

wire	[3:0]	stb_rptr_dfq_new, stb_rptr_dfq ;
wire 	valid_entry_for_pcx ;
wire	[7:0]	dec_wptr_g, dec_rptr_dfq, dec_rptr_pcx, dec_ackptr ;
wire	[7:0]	dec_wptr_m ;




wire		ack_vld ;
wire	[3:0]	stb_wptr_new, stb_wptr ;	
wire		stb_cam_wvld_g ;
wire	[7:0] 	inflight_vld_g ;
wire		dq_vld_d1,dq_vld_d2 ;
wire	[7:0]	dqptr_d1,dqptr_d2;
wire		pcx_rq_for_stb_d1 ;
wire    	pcx_rq_for_stb_d2,pcx_req_squash_d2 ;

   wire       clk;
   assign     clk = rclk;

   wire       rst_l;
   wire       stb_ctl_rst_l;
   
   dffrl_async rstff(.din (grst_l),
                     .q   (stb_ctl_rst_l),
                     .clk (clk), .se(se), .si(), .so(),
                     .rst_l (arst_l));
   assign     rst_l = stb_ctl_rst_l;
   







   wire   reset;



   assign reset = ~rst_l | flshinst_rst ;



















dff_s #(2)  rq_stgd1       (
        .din    ({pcx_rq_for_stb_d1,pcx_req_squash}), 
        .q    	({pcx_rq_for_stb_d2,pcx_req_squash_d2}), 
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

wire	ffu_bst_wr_g ;
dff_s #(1)  ff_bstg       (
        .din    (lsu_blk_st_m),
        .q    	(ffu_bst_wr_g),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

wire	full_flush_st_g ;

assign	full_flush_st_g = (stb_flush_st_g | (lsu_stbctl_flush_pipe_w & ~ffu_bst_wr_g)) & stb_cam_wvld_g ;



wire      tlb_cam_hit_g, tlb_hit_g;
wire      dtlb_bypass_m, dtlb_bypass_g ;

dff_s #(1)  ff_dtlb_bypass_m       (
        .din    (lsu_dtlb_bypass_e),
        .q    	(dtlb_bypass_m),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

dff_s #(1)  ff_dtlb_bypass_g       (
        .din    (dtlb_bypass_m),
        .q    	(dtlb_bypass_g),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

dff_s #(1)  ff_tlb_cam_hit_g       (
        .din    (tlb_cam_hit),
        .q    	(tlb_cam_hit_g),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

assign  tlb_hit_g  =  tlb_cam_hit_g | dtlb_bypass_g | ffu_bst_wr_g;



assign	inflight_vld_g[7:0] = 
	dec_wptr_g[7:0] & {8{stb_cam_wvld_g & thrd_en_g}} ; 







wire [7:0] inflight_issue_g_tmp ;

assign  inflight_issue_g_tmp[7:0]  =  inflight_vld_g[7:0] & {8{tlb_hit_g}};

wire [7:0] inflight_issue_g ;
assign	inflight_issue_g[7:0] = 
	inflight_issue_g_tmp[7:0] & {8{~(|(stb_state_vld[7:0] & ~stb_state_ack[7:0]))}};  






wire	skid_ced, st_vld_rq_d2 ;
assign	st_vld_rq_d2 = pcx_rq_for_stb_d2 & ~pcx_req_squash_d2 ;
assign	skid_ced = pcx_rq_for_stb_d1 | st_vld_rq_d2 ;

assign	stb_state_ced_mod[7:0] =
	((dec_ackptr[7:0] & {8{st_vld_rq_d2}}) | stb_state_ced[7:0]) ;


   
wire  rmo_st_satuated;   






                          
   assign rmo_st_satuated  =  lsu_outstanding_rmo_st_max;
                      
wire	[7:0]	stb_state_ced_spec ;
assign	stb_state_ced_spec[7:0] =
	((dec_ackptr[7:0] & {8{skid_ced}}) | stb_state_ced[7:0]) | 
   (stb_state_rmo[7:0] & {8{rmo_st_satuated}});
   
assign 	dec_rptr_pcx[7:0] =
		 (inflight_issue_g[7:0] | stb_state_vld[7:0]) 

			& ~stb_state_ced_spec[7:0] &
		(({stb_state_vld[6:0],stb_state_vld[7]} &
		  {stb_state_ack[6:0],stb_state_ack[7]})
		| ~{stb_state_vld[6:0],stb_state_vld[7]}
		| dec_rptr_dfq[7:0]) ;







assign valid_entry_for_pcx = |dec_rptr_pcx[7:0] ;

wire	any_inflight_iss_g,any_inflight_iss_w2 ;
assign	any_inflight_iss_g = |inflight_vld_g[7:0] ;
wire	pick_inflight_iss_g,pick_inflight_iss_w2 ;
assign	pick_inflight_iss_g = |(dec_rptr_pcx[7:0] & inflight_issue_g[7:0]) ;

wire	st_pcx_rq_kill_g ;
assign	st_pcx_rq_kill_g = pick_inflight_iss_g & full_flush_st_g ;


wire	st_vld_squash_g,st_vld_squash_w2 ;
assign	st_vld_squash_g = any_inflight_iss_g & full_flush_st_g ;


wire st_pcx_rq_kill_tmp,st_vld_squash_tmp ;
wire st_dtlb_perr_w2 ;
dff_s #(5)  stkill_stgd1       (
        .din    ({st_pcx_rq_kill_g,st_vld_squash_g,
		any_inflight_iss_g,pick_inflight_iss_g,st_dtlb_perr_g}), 
	.q      ({st_pcx_rq_kill_tmp,st_vld_squash_tmp,
		any_inflight_iss_w2,pick_inflight_iss_w2,st_dtlb_perr_w2}), 
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

assign	st_pcx_rq_kill_w2 = 
		st_pcx_rq_kill_tmp | 
		(pick_inflight_iss_w2 & st_dtlb_perr_w2); 

assign	st_vld_squash_w2  =
		st_vld_squash_tmp  |
		(any_inflight_iss_w2 & st_dtlb_perr_w2);




assign stb_pcx_rptr[0] = dec_rptr_pcx[1] | dec_rptr_pcx[3] | dec_rptr_pcx[5] | dec_rptr_pcx[7] ;	
assign stb_pcx_rptr[1] = dec_rptr_pcx[2] | dec_rptr_pcx[3] | dec_rptr_pcx[6] | dec_rptr_pcx[7] ;	
assign stb_pcx_rptr[2] = dec_rptr_pcx[4] | dec_rptr_pcx[5] | dec_rptr_pcx[6] | dec_rptr_pcx[7] ;	



assign	stb_rd_for_pcx = valid_entry_for_pcx ; 








wire	incr_dfq_ptr ;









wire    stb_dq_rmo ;


assign	incr_dfq_ptr = st_ack_dq_stb | stb_dq_rmo ;

assign	stb_rptr_dfq_new[3:0]	=	stb_rptr_dfq[3:0]  + {3'b0, incr_dfq_ptr} ;


assign stb_rptr_dfq_en = st_ack_dq_stb | incr_dfq_ptr ; 

dffre_s #(4)  rptr_d	(
	.din		(stb_rptr_dfq_new[3:0]),.q	(stb_rptr_dfq[3:0]),
	.en		(stb_rptr_dfq_en),	.rst	(reset), 
	.clk		(clk), 
	.se		(se),	.si	(), .so	()
	);





assign	dec_rptr_dfq[0]	= ~stb_rptr_dfq[2] & ~stb_rptr_dfq[1] & ~stb_rptr_dfq[0] ;	
assign	dec_rptr_dfq[1]	= ~stb_rptr_dfq[2] & ~stb_rptr_dfq[1] &  stb_rptr_dfq[0] ;	
assign	dec_rptr_dfq[2]	= ~stb_rptr_dfq[2] &  stb_rptr_dfq[1] & ~stb_rptr_dfq[0] ;	
assign	dec_rptr_dfq[3]	= ~stb_rptr_dfq[2] &  stb_rptr_dfq[1] &  stb_rptr_dfq[0] ;	
assign	dec_rptr_dfq[4]	=  stb_rptr_dfq[2] & ~stb_rptr_dfq[1] & ~stb_rptr_dfq[0] ;	
assign	dec_rptr_dfq[5]	=  stb_rptr_dfq[2] & ~stb_rptr_dfq[1] &  stb_rptr_dfq[0] ;	
assign	dec_rptr_dfq[6]	=  stb_rptr_dfq[2] &  stb_rptr_dfq[1] & ~stb_rptr_dfq[0] ;	
assign	dec_rptr_dfq[7]	=  stb_rptr_dfq[2] &  stb_rptr_dfq[1] &  stb_rptr_dfq[0] ;


dff_s #(9)  dq_stgd1       (
        .din    ({dec_rptr_dfq[7:0],st_ack_dq_stb}), 
	.q      ({dqptr_d1[7:0],dq_vld_d1}),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

dff_s #(9)  dq_stgd2       (
        .din    ({dqptr_d1[7:0],dq_vld_d1}), 
	.q      ({dqptr_d2[7:0],dq_vld_d2}),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );













assign  update_stb_wptr         =       stb_cam_wvld_m ^  (full_flush_st_g | st_dtlb_perr_g);

assign  stb_wptr_new[3:0]       =       (full_flush_st_g | st_dtlb_perr_g) ?
                                                        stb_wptr_prev[3:0] :
                                                        stb_wptr[3:0] + {3'b0, stb_cam_wvld_m} ;

dff_s  wvld_stgg       (
        .din    (stb_cam_wvld_m), .q      (stb_cam_wvld_g),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );




dffre_s #(4)  wptr_new    (
        .din            (stb_wptr_new[3:0]),    .q      (stb_wptr[3:0]),
        .en             (update_stb_wptr),    .rst    (reset),
        .clk            (clk),
        .se             (se), .si     (), .so ()
        );

assign	stb_wrptr[2:0]	= stb_wptr[2:0] ;

wire [2:0] stb_wptr_m ;


assign  stb_wptr_m[2:0]       =      stb_wptr[2:0] ;



assign	dec_wptr_m[0] = ~stb_wptr_m[2] & ~stb_wptr_m[1] & ~stb_wptr_m[0] ;	
assign	dec_wptr_m[1] = ~stb_wptr_m[2] & ~stb_wptr_m[1] &  stb_wptr_m[0] ;	
assign	dec_wptr_m[2] = ~stb_wptr_m[2] &  stb_wptr_m[1] & ~stb_wptr_m[0] ;	
assign	dec_wptr_m[3] = ~stb_wptr_m[2] &  stb_wptr_m[1] &  stb_wptr_m[0] ;	
assign	dec_wptr_m[4] =  stb_wptr_m[2] & ~stb_wptr_m[1] & ~stb_wptr_m[0] ;	
assign	dec_wptr_m[5] =  stb_wptr_m[2] & ~stb_wptr_m[1] &  stb_wptr_m[0] ;	
assign	dec_wptr_m[6] =  stb_wptr_m[2] &  stb_wptr_m[1] & ~stb_wptr_m[0] ;	
assign	dec_wptr_m[7] =  stb_wptr_m[2] &  stb_wptr_m[1] &  stb_wptr_m[0] ;

dff_s #(8)  dwptr_stgg       (
        .din    (dec_wptr_m[7:0]), .q      (dec_wptr_g[7:0]),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );




assign	stb_wptr_prev[3:0] = stb_wptr[3:0] - {4'b0001} ;


assign	stb_wrptr_prev[2:0]	= stb_wptr_prev[2:0] ;





wire	[3:0]	stb_wptr_w2 ;


dff_s #(4)  wptr_stgw2       (
        .din    (stb_wptr[3:0]), .q      (stb_wptr_w2[3:0]),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

assign	lsu_stbcnt[3:0] =  (stb_wptr_w2[3:0] - stb_rptr_dfq[3:0]) ;


wire	stb_full_w2 ;
assign	stb_full_w2 = lsu_stbcnt[2] & lsu_stbcnt[1] & lsu_stbcnt[0] ;
dff_s   sfull (
        .din    (stb_full_w2), .q      (stb_full),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );
























dffre_s #(8)  ackptr_ff	(
	.din		(dec_rptr_pcx[7:0]), .q	(dec_ackptr[7:0]),
	.en		(pcx_rq_for_stb), .rst (reset),
	.clk		(clk), 
	.se		(se),	.si	(), .so	()
	);

   
assign 	ack_vld = cpx_st_ack_tid ;


assign  stb_crnt_ack_id[0] = dec_ackptr[1] | dec_ackptr[3] |
                                dec_ackptr[5] | dec_ackptr[7] ;
assign  stb_crnt_ack_id[1] = dec_ackptr[2] | dec_ackptr[3] |
                                dec_ackptr[6] | dec_ackptr[7] ;
assign  stb_crnt_ack_id[2] = dec_ackptr[4] | dec_ackptr[5] |
                                dec_ackptr[6] | dec_ackptr[7] ;       












wire   [2:0]  stb_alt_addr_g;
wire          stb_alt_sel_g;

dff_s #(4) ff_alt_addr_g       (
        .din    ({stb_alt_sel,stb_alt_addr[2:0]}), 
        .q      ({stb_alt_sel_g,stb_alt_addr_g[2:0]}),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

wire  flsh_inst_g;
dff_s #(1) ff_flsh_inst_g       (
        .din    (flsh_inst_m),
        .q      (flsh_inst_g),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );

wire   stb_alt_io_g , tlb_pgnum_io_g ;

assign  stb_alt_io_g  =  
        stb_alt_addr_g[2] & ~(~stb_alt_addr_g[1] & stb_alt_addr_g[0]);
assign  tlb_pgnum_io_g  =  
        tlb_pgnum_g[39]  & ~(~tlb_pgnum_g[38]  & tlb_pgnum_g[37])  & ~flsh_inst_g;


wire   stb_non_l2bnk_g;
assign  stb_non_l2bnk_g  =  
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;








wire  [7:0]  stb_l2bnk_addr_b2;




assign  stb_l2bnk_addr_b2[0]  =  
     stb_state_vld[0] ? stb_state_io[0] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;

assign  stb_l2bnk_addr_b2[1]  =  
     stb_state_vld[1] ? stb_state_io[1] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;

assign  stb_l2bnk_addr_b2[2]  =  
     stb_state_vld[2] ? stb_state_io[2] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;

assign  stb_l2bnk_addr_b2[3]  =  
     stb_state_vld[3] ? stb_state_io[3] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;

assign  stb_l2bnk_addr_b2[4]  =  
     stb_state_vld[4] ? stb_state_io[4] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;

assign  stb_l2bnk_addr_b2[5]  =  
     stb_state_vld[5] ? stb_state_io[5] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;

assign  stb_l2bnk_addr_b2[6]  =  
     stb_state_vld[6] ? stb_state_io[6] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;

assign  stb_l2bnk_addr_b2[7]  =  
     stb_state_vld[7] ? stb_state_io[7] :
        stb_alt_sel_g ? stb_alt_io_g :
                        tlb_pgnum_io_g ;


dff_s  rqsel_stgg       (
        .din    (pcx_rq_for_stb), .q      (pcx_rq_for_stb_d1),
        .clk    (clk),
        .se     (se), .si     (), .so ()
        );






































			
















   wire	[7:0]	stb_issue_rmo ;
   wire	[7:0]	flush_vld_w2 ;

   assign	stb_issue_rmo[7:0] = 
	(dec_ackptr[7:0] & {8{st_vld_rq_d2}} & stb_state_rmo[7:0]) ;


   assign	stb_rmo_st_issue = |stb_issue_rmo[7:0] ;


   wire        rmo_pend,rmo_pend_d1;
   wire [7:0]  rmo_pend_ackptr , stb_dq_rmo_dfq_ptr;





   assign rmo_pend_ackptr[7:0]  =



          (dec_ackptr[7:0] & stb_state_rmo[7:0] & ~dqptr_d2[7:0]) & 

          ({stb_state_vld[6:0],stb_state_vld[7]} & ~{stb_state_rmo[6:0],stb_state_rmo[7]});

   assign rmo_pend = |rmo_pend_ackptr[7:0];

   wire   rmo_pend_rst;
   assign rmo_pend_rst  =  reset | stb_dq_rmo;

   dffre_s #(1)  ff_rmo_pend      (
         .din  (rmo_pend),
         .q    (rmo_pend_d1),
         .en   (st_vld_rq_d2),      
         .rst  (rmo_pend_rst),
         .clk  (clk),
         .se   (se), .si     (), .so ()
         );























































   assign stb_dq_rmo_dfq_ptr[7:0] = 
          (stb_issue_rmo[7:0]   & ~rmo_pend_ackptr[7:0]) |
          (dec_ackptr[7:0]      & {8{rmo_pend_d1 & ~rmo_pend}});

   assign stb_dq_rmo  =  |stb_dq_rmo_dfq_ptr[7:0];


   assign stb_state_rst[7:0] = 
	{8{reset}} | (dqptr_d2[7:0] & {8{dq_vld_d2}})

	| stb_dq_rmo_dfq_ptr[7:0] |

        flush_vld_w2[7:0] ;


   assign stb_state_vld_set[7:0] = dec_wptr_g[7:0] & {8{stb_cam_wvld_g & thrd_en_g}} ;

   assign stb_state_vld_din[7:0] = stb_state_vld_set[7:0] | 
                                  (~stb_state_rst[7:0] & stb_state_vld[7:0]);
  
   wire	[7:0] stb_state_vld_tmp ; 
   dff_s #(8)  ff_stb_state_vld       (
        .din    (stb_state_vld_din[7:0]), 
        .q      (stb_state_vld_tmp[7:0]    ),
        .clk    (clk),
        .se     (se), .si (), .so ()
        );
	
   assign stb_state_vld[7:0] = stb_state_vld_tmp[7:0] & ~flush_vld_w2[7:0] ;

   wire	[7:0] stb_state_vld_set_w2 ;
   dff_s #(8)  ff_stb_state_vld_set       (
        .din    (stb_state_vld_set[7:0]), 
        .q      (stb_state_vld_set_w2[7:0]    ),
        .clk    (clk),
        .se     (se), .si (), .so ()
        );

   assign flush_vld_w2[7:0] = stb_state_vld_set_w2[7:0] & {8{st_vld_squash_w2}} ;





   
   wire [7:0]  st_scm_vld ;
   assign st_scm_vld[7:0] = stb_state_vld_din[7:0] & ~stb_state_rmo[7:0] ;
   
   dff_s #(8)  ff_st_scm_vld       (
        .din    (st_scm_vld[7:0]), 
        .q      (stb_state_vld_out[7:0]    ),
        .clk    (clk),
        .se     (se), .si (), .so ()
        );


   assign stb_state_ced_set[7:0] = dec_ackptr[7:0] & {8{st_vld_rq_d2}} ;



   assign stb_state_ced_din[7:0] = ~stb_state_rst[7:0] & 
					(stb_state_ced_set[7:0] | stb_state_ced[7:0]);


   
   dff_s #(8)  ff_stb_state_ced       (
        .din    (stb_state_ced_din[7:0]), 
        .q      (stb_state_ced[7:0]    ),
        .clk    (clk),
        .se     (se), .si (), .so ()
        );


   assign stb_state_ack_set[7:0] = dec_ackptr[7:0] & {8{ack_vld}};
   assign stb_state_ack_din[7:0] = stb_state_ack_set[7:0] | 
                                  (~stb_state_rst[7:0] & stb_state_ack[7:0]);
   
   dff_s #(8)  ff_stb_state_ack       (
        .din    (stb_state_ack_din[7:0]), 
        .q      (stb_state_ack[7:0]    ),
        .clk    (clk),
        .se     (se), .si (), .so ()
        );


   wire [7:0] spec_wrt;   
   assign     spec_wrt [7:0] = dec_wptr_m[7:0] & {8{stb_cam_wvld_m}};
   assign     stb_clk_en_l [7:0] = ~spec_wrt[7:0];


 



  assign stb_state_io_din[7:0]  =  (stb_state_vld_set[7:0] & {8{stb_non_l2bnk_g}}) |
                                   (~stb_state_rst[7:0] & stb_state_io[7:0]);

   dff_s #(8)  ff_stb_state_io       (
        .din    (stb_state_io_din[7:0]), 
        .q      (stb_state_io[7:0]    ),
        .clk    (clk),
        .se     (se), .si (), .so ()
        );




assign	lsu_stb_empty = ~(|stb_state_vld[7:0]);






















   assign stb_l2bnk_addr[2:0] = {3{dec_rptr_pcx[0]}} & {stb_l2bnk_addr_b2[0], stb_state_si_0[3:2]} |
                                {3{dec_rptr_pcx[1]}} & {stb_l2bnk_addr_b2[1], stb_state_si_1[3:2]} |
                                {3{dec_rptr_pcx[2]}} & {stb_l2bnk_addr_b2[2], stb_state_si_2[3:2]} |
                                {3{dec_rptr_pcx[3]}} & {stb_l2bnk_addr_b2[3], stb_state_si_3[3:2]} |
                                {3{dec_rptr_pcx[4]}} & {stb_l2bnk_addr_b2[4], stb_state_si_4[3:2]} |
                                {3{dec_rptr_pcx[5]}} & {stb_l2bnk_addr_b2[5], stb_state_si_5[3:2]} |
                                {3{dec_rptr_pcx[6]}} & {stb_l2bnk_addr_b2[6], stb_state_si_6[3:2]} |
                                {3{dec_rptr_pcx[7]}} & {stb_l2bnk_addr_b2[7], stb_state_si_7[3:2]} ;
   
   assign stb_atm_rq_type[2:1]= {2{dec_rptr_pcx[0]}} &  stb_state_rtype_0[2:1] |
                                {2{dec_rptr_pcx[1]}} &  stb_state_rtype_1[2:1] |
                                {2{dec_rptr_pcx[2]}} &  stb_state_rtype_2[2:1] |
                                {2{dec_rptr_pcx[3]}} &  stb_state_rtype_3[2:1] |
                                {2{dec_rptr_pcx[4]}} &  stb_state_rtype_4[2:1] |
                                {2{dec_rptr_pcx[5]}} &  stb_state_rtype_5[2:1] |
                                {2{dec_rptr_pcx[6]}} &  stb_state_rtype_6[2:1] |
                                {2{dec_rptr_pcx[7]}} &  stb_state_rtype_7[2:1] ;
   

          
   
endmodule