data/full_repos/permissive/509335294/brch_add.v
data/verilator_xmls/52f759cc-4ec7-434c-96c3-51ca3c9cd8b5.xml
module brch_add(a,b,res);
	input[12:0] a,b;
	output[12:0] res;
	
	assign res = a + b;
endmodule
module brch_add(a,b,res);

	input[12:0] a,b;
	output[12:0] res;
	
	assign res = a + b;
endmodule