data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv
1: b"%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:1: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\nimport cam_types::*;\n       ^~~~~~~~~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:16: syntax error, unexpected '@', expecting ';'\ndefault clocking tb_clk @(negedge itf.clk); endclocking\n                        ^\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:19: syntax error, unexpected <=, expecting IDENTIFIER\n    itf.reset_n <= 1'b0;\n                ^~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:21: syntax error, unexpected <=, expecting IDENTIFIER\n    itf.reset_n <= 1'b1;\n                ^~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:29: syntax error, unexpected IDENTIFIER, expecting ')'\ntask write(input key_t key, input val_t val);\n                       ^~~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:30: syntax error, unexpected <=, expecting IDENTIFIER\n  itf.key <= key;\n          ^~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:31: syntax error, unexpected <=, expecting IDENTIFIER\n  itf.val_i <= val;\n            ^~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:32: syntax error, unexpected <=, expecting IDENTIFIER\n  itf.rw_n <= 1'b0;\n           ^~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:33: syntax error, unexpected <=, expecting IDENTIFIER\n  itf.valid_i <= 1'b1;\n              ^~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:38: syntax error, unexpected <=, expecting IDENTIFIER\n itf.key <= key;\n         ^~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:39: syntax error, unexpected <=, expecting IDENTIFIER\n itf.rw_n <= 1'b1;\n          ^~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:40: syntax error, unexpected <=, expecting IDENTIFIER\n itf.valid_i <= 1'b1;\n             ^~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:46: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for(int i = 0; i < camsize_p; ++i) begin\n     ^~~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:52: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for(int i = 8; i < 16; ++i) begin\n     ^~~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:60: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for(int i = 0; i < camsize_p; ++i) begin\n     ^~~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:66: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for(int i = 0; i < camsize_p; ++i) begin\n     ^~~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:72: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for(int i = 0; i < camsize_p; ++i) begin\n     ^~~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:82: syntax error, unexpected int, expecting IDENTIFIER or genvar\n for(int i = 0; i < camsize_p; ++i) begin\n     ^~~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:90: syntax error, unexpected end\n  end\n  ^~~\n%Error: data/full_repos/permissive/444559342/mp1/cam/hvl/testbench.sv:115: syntax error, unexpected '(', expecting IDENTIFIER\n    itf.finish();\n               ^\n%Error: Cannot continue\n"
module testbench(cam_itf itf);

cam dut (
    .clk_i     ( itf.clk     ),
    .reset_n_i ( itf.reset_n ),
    .rw_n_i    ( itf.rw_n    ),
    .valid_i   ( itf.valid_i ),
    .key_i     ( itf.key     ),
    .val_i     ( itf.val_i   ),
    .val_o     ( itf.val_o   ),
    .valid_o   ( itf.valid_o )
);

default clocking tb_clk @(negedge itf.clk); endclocking

task reset();
    itf.reset_n <= 1'b0;
    repeat (5) @(tb_clk);
    itf.reset_n <= 1'b1;
    repeat (5) @(tb_clk);
endtask



val_t temp;

task write(input key_t key, input val_t val);
		itf.key <= key;
		itf.val_i <= val;
		itf.rw_n <= 1'b0;
		itf.valid_i <= 1'b1;
		@(tb_clk);
endtask : write

task read(input key_t key, output val_t val);
	itf.key <= key;
	itf.rw_n <= 1'b1;
	itf.valid_i <= 1'b1;
	@(tb_clk);
	val <= itf.val_o;
endtask : read

task evict();
	for(int i = 0; i < camsize_p; ++i) begin
		write(i, i);
	end
	
	@(tb_clk);
	
	for(int i = 8; i < 16; ++i) begin
		write(i, i);
	end
	@(tb_clk);
	
endtask : evict

task test_read();
	for(int i = 0; i < camsize_p; ++i) begin
		write(i, i);
	end
	
	@(tb_clk);
	
	for(int i = 0; i < camsize_p; ++i) begin
		read(i, i);
	end
endtask : test_read

task write_write();
	for(int i = 0; i < camsize_p; ++i) begin
		write(i, i);
		@(tb_clk);
		write(i, i + 1'b1);
		@(tb_clk);
	end
endtask : write_write

task write_read();

	for(int i = 0; i < camsize_p; ++i) begin
		write(i, i);
		@(tb_clk);
		read(i, temp);
		@(tb_clk);
		assert (itf.val_o == i) else  begin
			itf.tb_report_dut_error(READ_ERROR);
			$error("%0t TB: Read %0d, expected %0d", $time, itf.val_o, temp);
		end
		@(tb_clk);
	end
	
endtask : write_read

initial begin
    $display("Starting CAM Tests");

    reset();





	 evict();
	 
	 test_read();
	 
	 write_write();
	 
	 write_read();



    itf.finish();
end

endmodule
module testbench(cam_itf itf);


cam dut (
    .clk_i     ( itf.clk     ),
    .reset_n_i ( itf.reset_n ),
    .rw_n_i    ( itf.rw_n    ),
    .valid_i   ( itf.valid_i ),
    .key_i     ( itf.key     ),
    .val_i     ( itf.val_i   ),
    .val_o     ( itf.val_o   ),
    .valid_o   ( itf.valid_o )
);

default clocking tb_clk @(negedge itf.clk); endclocking

task reset();
    itf.reset_n <= 1'b0;
    repeat (5) @(tb_clk);
    itf.reset_n <= 1'b1;
    repeat (5) @(tb_clk);
endtask



val_t temp;

task write(input key_t key, input val_t val);
		itf.key <= key;
		itf.val_i <= val;
		itf.rw_n <= 1'b0;
		itf.valid_i <= 1'b1;
		@(tb_clk);
endtask : write

task read(input key_t key, output val_t val);
	itf.key <= key;
	itf.rw_n <= 1'b1;
	itf.valid_i <= 1'b1;
	@(tb_clk);
	val <= itf.val_o;
endtask : read

task evict();
	for(int i = 0; i < camsize_p; ++i) begin
		write(i, i);
	end
	
	@(tb_clk);
	
	for(int i = 8; i < 16; ++i) begin
		write(i, i);
	end
	@(tb_clk);
	
endtask : evict

task test_read();
	for(int i = 0; i < camsize_p; ++i) begin
		write(i, i);
	end
	
	@(tb_clk);
	
	for(int i = 0; i < camsize_p; ++i) begin
		read(i, i);
	end
endtask : test_read

task write_write();
	for(int i = 0; i < camsize_p; ++i) begin
		write(i, i);
		@(tb_clk);
		write(i, i + 1'b1);
		@(tb_clk);
	end
endtask : write_write

task write_read();

	for(int i = 0; i < camsize_p; ++i) begin
		write(i, i);
		@(tb_clk);
		read(i, temp);
		@(tb_clk);
		assert (itf.val_o == i) else  begin
			itf.tb_report_dut_error(READ_ERROR);
			$error("%0t TB: Read %0d, expected %0d", $time, itf.val_o, temp);
		end
		@(tb_clk);
	end
	
endtask : write_read

initial begin
    $display("Starting CAM Tests");

    reset();





	 evict();
	 
	 test_read();
	 
	 write_write();
	 
	 write_read();



    itf.finish();
end

endmodule