data/full_repos/permissive/421030651/mdl/spi_mdl.sv
1: b'%Error: data/full_repos/permissive/421030651/mdl/spi_mdl.sv:43: Unsupported: wait statements\n    wait (rstn === 1\'b1);\n    ^~~~\n%Error: data/full_repos/permissive/421030651/mdl/spi_mdl.sv:49: Unsupported: wait statements\n        wait (NSS === 1\'b0);\n        ^~~~\n%Error: data/full_repos/permissive/421030651/mdl/spi_mdl.sv:55: syntax error, unexpected \'@\'\n            @(posedge SCLK or negedge SCLK or posedge NSS);\n            ^\n%Error: data/full_repos/permissive/421030651/mdl/spi_mdl.sv:64: syntax error, unexpected \'@\'\n                @(posedge SCLK or negedge SCLK or posedge NSS);\n                ^\n%Warning-STMTDLY: data/full_repos/permissive/421030651/mdl/spi_mdl.sv:65: Unsupported: Ignoring delay on this delayed statement.\n                #1;\n                ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/421030651/mdl/spi_mdl.sv:72: syntax error, unexpected \'@\'\n                @(posedge SCLK or negedge SCLK or posedge NSS);\n                ^\n%Warning-STMTDLY: data/full_repos/permissive/421030651/mdl/spi_mdl.sv:158: Unsupported: Ignoring delay on this delayed statement.\n    #1000000;\n    ^\n%Error: Exiting due to 5 error(s), 2 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
function logic next_miso;
    logic res;
    case ({lsbfirst_latch, dff_latch})
        2'b00: begin
            res = tx_data[7];
            tx_data = {tx_data[14:0], 1'b0};
        end
        2'b01: begin
            res = tx_data[15];
            tx_data = {tx_data[14:0], 1'b0};
        end
        2'b10: begin
            res = tx_data[0];
            tx_data = {1'b0, tx_data[15:1]};
        end
        2'b11: begin
            res = tx_data[0];
            tx_data = {1'b0, tx_data[15:1]};
        end
    endcase
    return res;
endfunction
function logic next_miso;

    logic res;
    case ({lsbfirst_latch, dff_latch})
        2'b00: begin
            res = tx_data[7];
            tx_data = {tx_data[14:0], 1'b0};
        end
        2'b01: begin
            res = tx_data[15];
            tx_data = {tx_data[14:0], 1'b0};
        end
        2'b10: begin
            res = tx_data[0];
            tx_data = {1'b0, tx_data[15:1]};
        end
        2'b11: begin
            res = tx_data[0];
            tx_data = {1'b0, tx_data[15:1]};
        end
    endcase
    return res;
endfunction