data/full_repos/permissive/527007664/openlane/pixel/src/Pixel.v
1: b'%Warning-PINMISSING: data/full_repos/permissive/527007664/openlane/pixel/src/Pixel.v:287: Cell has missing pin: \'reset\'\n loc_timer_int inst2(\n               ^~~~~\n                     ... Use "/* verilator lint_off PINMISSING */" and lint_on around source to disable this message.\n%Warning-PINMISSING: data/full_repos/permissive/527007664/openlane/pixel/src/Pixel.v:294: Cell has missing pin: \'reset\'\n adj_timer_int inst3(\n               ^~~~~\n%Error: Exiting due to 2 warning(s)\n'
module pixel (clk, reset, pxl_start_i, loc_timer_m_i, loc_timer_en, adj_timer_m_i, adj_timer_en, 
			s_p1, s_p2, s1, s2, s1_inv, s2_inv, v_b1, v_b0, pxl_done_o, 
			loc_timer_max, loc_max_clk, adj_timer_max, adj_max_clk, pxl_done_i, pxl_q, 
			kernel_done_o, data_in, data_sel, data_out);
	input clk, reset, pxl_start_i, loc_timer_m_i, adj_timer_m_i, pxl_done_i, data_in;
	input [9:0] loc_max_clk, adj_max_clk;
	output [3:0] pxl_q, data_sel;
	output loc_timer_en, adj_timer_en, s_p1, s_p2, s1, s2, s1_inv, s2_inv, v_b1, v_b0, pxl_done_o, loc_timer_max, adj_timer_max, kernel_done_o;
	output [15:0] data_out;


	wire loc_timer_m_i_net, adj_timer_m_i_net, pxl_done_i_net, s_p1_net, s_p2_net, s1_net, s2_net, s1_inv_net, s2_inv_net, v_b1_net, v_b0_net;
	wire [3:0] data_sel_net;
	assign loc_timer_m_i_net = loc_timer_max;
	assign adj_timer_m_i_net = adj_timer_max;
	assign pxl_done_i_net = pxl_done_o;
	assign data_sel_net = pxl_q;
	assign s_p1_net = s_p1;
	assign s_p2_net = s_p2;
	assign s1_net = s1;
	assign s2_net = s2;
	assign s1_inv_net = s1_inv;
	assign s2_inv_net = s2_inv;
	assign v_b1_net = v_b1;
	assign v_b0_net = v_b0;
		
	pixel_fsm inst1(
	.clk(clk),
	.reset(reset),
	.pxl_start_i(pxl_start_i),
	.pxl_done_o(pxl_done_o),
	.loc_timer_en(loc_timer_en),
	.loc_timer_m_i(loc_timer_m_i_net),
	.adj_timer_en(adj_timer_en),
	.adj_timer_m_i(adj_timer_m_i_net),
	.s_p1(s_p1),
	.s_p2(s_p2),
	.s1(s1),
	.s1_inv(s1_inv),
	.s2(s2),
	.s2_inv(s2_inv),
	.v_b1(v_b1),
	.v_b0(v_b0)
	);
	
	loc_timer_int inst2(
	.clk(clk),
	.loc_timer_en(loc_timer_en),
	.loc_max_clk(loc_max_clk),
	.loc_timer_max(loc_timer_max)
	);	
	
	adj_timer_int inst3(
	.clk(clk),
	.adj_timer_en(adj_timer_en),
	.adj_max_clk(adj_max_clk),
	.adj_timer_max(adj_timer_max)
	);

	pixel_counter inst4(
	.clk(clk),
	.reset(reset),
	.pxl_done_i(pxl_done_i_net),
	.pxl_q(pxl_q),
	.kernel_done_o(kernel_done_o)
	);
	
	demux demux_sp1(
	.data_in(s_p1_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);
	
	demux demux_sp2(
	.data_in(s_p2_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);
	
	demux demux_s1(
	.data_in(s1_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);
	
	demux demux_s2(
	.data_in(s2_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);

	demux demux_s1_inv(
	.data_in(s1_inv_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);
	
	demux demux_s2_inv(
	.data_in(s2_inv_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);
	
	demux demux_vb1(
	.data_in(v_b1_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);
	
	demux demux_vb0(
	.data_in(v_b0_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);
	
endmodule
module pixel (clk, reset, pxl_start_i, loc_timer_m_i, loc_timer_en, adj_timer_m_i, adj_timer_en, 
			s_p1, s_p2, s1, s2, s1_inv, s2_inv, v_b1, v_b0, pxl_done_o, 
			loc_timer_max, loc_max_clk, adj_timer_max, adj_max_clk, pxl_done_i, pxl_q, 
			kernel_done_o, data_in, data_sel, data_out);

	input clk, reset, pxl_start_i, loc_timer_m_i, adj_timer_m_i, pxl_done_i, data_in;
	input [9:0] loc_max_clk, adj_max_clk;
	output [3:0] pxl_q, data_sel;
	output loc_timer_en, adj_timer_en, s_p1, s_p2, s1, s2, s1_inv, s2_inv, v_b1, v_b0, pxl_done_o, loc_timer_max, adj_timer_max, kernel_done_o;
	output [15:0] data_out;


	wire loc_timer_m_i_net, adj_timer_m_i_net, pxl_done_i_net, s_p1_net, s_p2_net, s1_net, s2_net, s1_inv_net, s2_inv_net, v_b1_net, v_b0_net;
	wire [3:0] data_sel_net;
	assign loc_timer_m_i_net = loc_timer_max;
	assign adj_timer_m_i_net = adj_timer_max;
	assign pxl_done_i_net = pxl_done_o;
	assign data_sel_net = pxl_q;
	assign s_p1_net = s_p1;
	assign s_p2_net = s_p2;
	assign s1_net = s1;
	assign s2_net = s2;
	assign s1_inv_net = s1_inv;
	assign s2_inv_net = s2_inv;
	assign v_b1_net = v_b1;
	assign v_b0_net = v_b0;
		
	pixel_fsm inst1(
	.clk(clk),
	.reset(reset),
	.pxl_start_i(pxl_start_i),
	.pxl_done_o(pxl_done_o),
	.loc_timer_en(loc_timer_en),
	.loc_timer_m_i(loc_timer_m_i_net),
	.adj_timer_en(adj_timer_en),
	.adj_timer_m_i(adj_timer_m_i_net),
	.s_p1(s_p1),
	.s_p2(s_p2),
	.s1(s1),
	.s1_inv(s1_inv),
	.s2(s2),
	.s2_inv(s2_inv),
	.v_b1(v_b1),
	.v_b0(v_b0)
	);
	
	loc_timer_int inst2(
	.clk(clk),
	.loc_timer_en(loc_timer_en),
	.loc_max_clk(loc_max_clk),
	.loc_timer_max(loc_timer_max)
	);	
	
	adj_timer_int inst3(
	.clk(clk),
	.adj_timer_en(adj_timer_en),
	.adj_max_clk(adj_max_clk),
	.adj_timer_max(adj_timer_max)
	);

	pixel_counter inst4(
	.clk(clk),
	.reset(reset),
	.pxl_done_i(pxl_done_i_net),
	.pxl_q(pxl_q),
	.kernel_done_o(kernel_done_o)
	);
	
	demux demux_sp1(
	.data_in(s_p1_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);
	
	demux demux_sp2(
	.data_in(s_p2_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);
	
	demux demux_s1(
	.data_in(s1_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);
	
	demux demux_s2(
	.data_in(s2_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);

	demux demux_s1_inv(
	.data_in(s1_inv_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);
	
	demux demux_s2_inv(
	.data_in(s2_inv_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);
	
	demux demux_vb1(
	.data_in(v_b1_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);
	
	demux demux_vb0(
	.data_in(v_b0_net),
	.data_sel(data_sel_net),
	.data_out(data_out)
	);
	
endmodule