data/full_repos/permissive/437632408/NVDLA/nvdla/nocif/NV_NVDLA_cvif.v
1: b"%Error: data/full_repos/permissive/437632408/NVDLA/nvdla/nocif/NV_NVDLA_cvif.v:269: Cannot find file containing module: 'NV_NVDLA_CVIF_read'\nNV_NVDLA_CVIF_read u_read (\n^~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/437632408/NVDLA/nvdla/nocif,data/full_repos/permissive/437632408/NV_NVDLA_CVIF_read\n             data/full_repos/permissive/437632408/NVDLA/nvdla/nocif,data/full_repos/permissive/437632408/NV_NVDLA_CVIF_read.v\n             data/full_repos/permissive/437632408/NVDLA/nvdla/nocif,data/full_repos/permissive/437632408/NV_NVDLA_CVIF_read.sv\n             NV_NVDLA_CVIF_read\n             NV_NVDLA_CVIF_read.v\n             NV_NVDLA_CVIF_read.sv\n             obj_dir/NV_NVDLA_CVIF_read\n             obj_dir/NV_NVDLA_CVIF_read.v\n             obj_dir/NV_NVDLA_CVIF_read.sv\n%Error: data/full_repos/permissive/437632408/NVDLA/nvdla/nocif/NV_NVDLA_cvif.v:363: Cannot find file containing module: 'NV_NVDLA_CVIF_write'\nNV_NVDLA_CVIF_write u_write (\n^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/437632408/NVDLA/nvdla/nocif/NV_NVDLA_cvif.v:407: Cannot find file containing module: 'NV_NVDLA_CVIF_csb'\nNV_NVDLA_CVIF_csb u_csb (\n^~~~~~~~~~~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module NV_NVDLA_cvif (
   bdma2cvif_rd_cdt_lat_fifo_pop
  ,bdma2cvif_rd_req_pd
  ,bdma2cvif_rd_req_valid
  ,bdma2cvif_wr_req_pd
  ,bdma2cvif_wr_req_valid
  ,cdma_dat2cvif_rd_req_pd
  ,cdma_dat2cvif_rd_req_valid
  ,cdma_wt2cvif_rd_req_pd
  ,cdma_wt2cvif_rd_req_valid
  ,cdp2cvif_rd_cdt_lat_fifo_pop
  ,cdp2cvif_rd_req_pd
  ,cdp2cvif_rd_req_valid
  ,cdp2cvif_wr_req_pd
  ,cdp2cvif_wr_req_valid
  ,csb2cvif_req_pd
  ,csb2cvif_req_pvld
  ,cvif2bdma_rd_rsp_ready
  ,cvif2cdma_dat_rd_rsp_ready
  ,cvif2cdma_wt_rd_rsp_ready
  ,cvif2cdp_rd_rsp_ready
  ,cvif2noc_axi_ar_arready
  ,cvif2noc_axi_aw_awready
  ,cvif2noc_axi_w_wready
  ,cvif2pdp_rd_rsp_ready
  ,cvif2rbk_rd_rsp_ready
  ,cvif2sdp_b_rd_rsp_ready
  ,cvif2sdp_e_rd_rsp_ready
  ,cvif2sdp_n_rd_rsp_ready
  ,cvif2sdp_rd_rsp_ready
  ,noc2cvif_axi_b_bid
  ,noc2cvif_axi_b_bvalid
  ,noc2cvif_axi_r_rdata
  ,noc2cvif_axi_r_rid
  ,noc2cvif_axi_r_rlast
  ,noc2cvif_axi_r_rvalid
  ,nvdla_core_clk
  ,nvdla_core_rstn
  ,pdp2cvif_rd_cdt_lat_fifo_pop
  ,pdp2cvif_rd_req_pd
  ,pdp2cvif_rd_req_valid
  ,pdp2cvif_wr_req_pd
  ,pdp2cvif_wr_req_valid
  ,pwrbus_ram_pd
  ,rbk2cvif_rd_cdt_lat_fifo_pop
  ,rbk2cvif_rd_req_pd
  ,rbk2cvif_rd_req_valid
  ,rbk2cvif_wr_req_pd
  ,rbk2cvif_wr_req_valid
  ,sdp2cvif_rd_cdt_lat_fifo_pop
  ,sdp2cvif_rd_req_pd
  ,sdp2cvif_rd_req_valid
  ,sdp2cvif_wr_req_pd
  ,sdp2cvif_wr_req_valid
  ,sdp_b2cvif_rd_cdt_lat_fifo_pop
  ,sdp_b2cvif_rd_req_pd
  ,sdp_b2cvif_rd_req_valid
  ,sdp_e2cvif_rd_cdt_lat_fifo_pop
  ,sdp_e2cvif_rd_req_pd
  ,sdp_e2cvif_rd_req_valid
  ,sdp_n2cvif_rd_cdt_lat_fifo_pop
  ,sdp_n2cvif_rd_req_pd
  ,sdp_n2cvif_rd_req_valid
  ,bdma2cvif_rd_req_ready
  ,bdma2cvif_wr_req_ready
  ,cdma_dat2cvif_rd_req_ready
  ,cdma_wt2cvif_rd_req_ready
  ,cdp2cvif_rd_req_ready
  ,cdp2cvif_wr_req_ready
  ,csb2cvif_req_prdy
  ,cvif2bdma_rd_rsp_pd
  ,cvif2bdma_rd_rsp_valid
  ,cvif2bdma_wr_rsp_complete
  ,cvif2cdma_dat_rd_rsp_pd
  ,cvif2cdma_dat_rd_rsp_valid
  ,cvif2cdma_wt_rd_rsp_pd
  ,cvif2cdma_wt_rd_rsp_valid
  ,cvif2cdp_rd_rsp_pd
  ,cvif2cdp_rd_rsp_valid
  ,cvif2cdp_wr_rsp_complete
  ,cvif2csb_resp_pd
  ,cvif2csb_resp_valid
  ,cvif2noc_axi_ar_araddr
  ,cvif2noc_axi_ar_arid
  ,cvif2noc_axi_ar_arlen
  ,cvif2noc_axi_ar_arvalid
  ,cvif2noc_axi_aw_awaddr
  ,cvif2noc_axi_aw_awid
  ,cvif2noc_axi_aw_awlen
  ,cvif2noc_axi_aw_awvalid
  ,cvif2noc_axi_w_wdata
  ,cvif2noc_axi_w_wlast
  ,cvif2noc_axi_w_wstrb
  ,cvif2noc_axi_w_wvalid
  ,cvif2pdp_rd_rsp_pd
  ,cvif2pdp_rd_rsp_valid
  ,cvif2pdp_wr_rsp_complete
  ,cvif2rbk_rd_rsp_pd
  ,cvif2rbk_rd_rsp_valid
  ,cvif2rbk_wr_rsp_complete
  ,cvif2sdp_b_rd_rsp_pd
  ,cvif2sdp_b_rd_rsp_valid
  ,cvif2sdp_e_rd_rsp_pd
  ,cvif2sdp_e_rd_rsp_valid
  ,cvif2sdp_n_rd_rsp_pd
  ,cvif2sdp_n_rd_rsp_valid
  ,cvif2sdp_rd_rsp_pd
  ,cvif2sdp_rd_rsp_valid
  ,cvif2sdp_wr_rsp_complete
  ,noc2cvif_axi_b_bready
  ,noc2cvif_axi_r_rready
  ,pdp2cvif_rd_req_ready
  ,pdp2cvif_wr_req_ready
  ,rbk2cvif_rd_req_ready
  ,rbk2cvif_wr_req_ready
  ,sdp2cvif_rd_req_ready
  ,sdp2cvif_wr_req_ready
  ,sdp_b2cvif_rd_req_ready
  ,sdp_e2cvif_rd_req_ready
  ,sdp_n2cvif_rd_req_ready
  );



input nvdla_core_clk;
input nvdla_core_rstn;
input bdma2cvif_rd_cdt_lat_fifo_pop;
input bdma2cvif_rd_req_valid;
output bdma2cvif_rd_req_ready;
input [78:0] bdma2cvif_rd_req_pd;
input bdma2cvif_wr_req_valid;
output bdma2cvif_wr_req_ready;
input [514:0] bdma2cvif_wr_req_pd;
input cdma_dat2cvif_rd_req_valid;
output cdma_dat2cvif_rd_req_ready;
input [78:0] cdma_dat2cvif_rd_req_pd;
input cdma_wt2cvif_rd_req_valid;
output cdma_wt2cvif_rd_req_ready;
input [78:0] cdma_wt2cvif_rd_req_pd;
input cdp2cvif_rd_cdt_lat_fifo_pop;
input cdp2cvif_rd_req_valid;
output cdp2cvif_rd_req_ready;
input [78:0] cdp2cvif_rd_req_pd;
input cdp2cvif_wr_req_valid;
output cdp2cvif_wr_req_ready;
input [514:0] cdp2cvif_wr_req_pd;
input csb2cvif_req_pvld;
output csb2cvif_req_prdy;
input [62:0] csb2cvif_req_pd;
output cvif2bdma_rd_rsp_valid;
input cvif2bdma_rd_rsp_ready;
output [513:0] cvif2bdma_rd_rsp_pd;
output cvif2bdma_wr_rsp_complete;
output cvif2cdma_dat_rd_rsp_valid;
input cvif2cdma_dat_rd_rsp_ready;
output [513:0] cvif2cdma_dat_rd_rsp_pd;
output cvif2cdma_wt_rd_rsp_valid;
input cvif2cdma_wt_rd_rsp_ready;
output [513:0] cvif2cdma_wt_rd_rsp_pd;
output cvif2cdp_rd_rsp_valid;
input cvif2cdp_rd_rsp_ready;
output [513:0] cvif2cdp_rd_rsp_pd;
output cvif2cdp_wr_rsp_complete;
output cvif2csb_resp_valid;
output [33:0] cvif2csb_resp_pd;
output cvif2noc_axi_ar_arvalid;
input cvif2noc_axi_ar_arready;
output [7:0] cvif2noc_axi_ar_arid;
output [3:0] cvif2noc_axi_ar_arlen;
output [63:0] cvif2noc_axi_ar_araddr;
output cvif2noc_axi_aw_awvalid;
input cvif2noc_axi_aw_awready;
output [7:0] cvif2noc_axi_aw_awid;
output [3:0] cvif2noc_axi_aw_awlen;
output [63:0] cvif2noc_axi_aw_awaddr;
output cvif2noc_axi_w_wvalid;
input cvif2noc_axi_w_wready;
output [511:0] cvif2noc_axi_w_wdata;
output [63:0] cvif2noc_axi_w_wstrb;
output cvif2noc_axi_w_wlast;
output cvif2pdp_rd_rsp_valid;
input cvif2pdp_rd_rsp_ready;
output [513:0] cvif2pdp_rd_rsp_pd;
output cvif2pdp_wr_rsp_complete;
output cvif2rbk_rd_rsp_valid;
input cvif2rbk_rd_rsp_ready;
output [513:0] cvif2rbk_rd_rsp_pd;
output cvif2rbk_wr_rsp_complete;
output cvif2sdp_b_rd_rsp_valid;
input cvif2sdp_b_rd_rsp_ready;
output [513:0] cvif2sdp_b_rd_rsp_pd;
output cvif2sdp_e_rd_rsp_valid;
input cvif2sdp_e_rd_rsp_ready;
output [513:0] cvif2sdp_e_rd_rsp_pd;
output cvif2sdp_n_rd_rsp_valid;
input cvif2sdp_n_rd_rsp_ready;
output [513:0] cvif2sdp_n_rd_rsp_pd;
output cvif2sdp_rd_rsp_valid;
input cvif2sdp_rd_rsp_ready;
output [513:0] cvif2sdp_rd_rsp_pd;
output cvif2sdp_wr_rsp_complete;
input noc2cvif_axi_b_bvalid;
output noc2cvif_axi_b_bready;
input [7:0] noc2cvif_axi_b_bid;
input noc2cvif_axi_r_rvalid;
output noc2cvif_axi_r_rready;
input [7:0] noc2cvif_axi_r_rid;
input noc2cvif_axi_r_rlast;
input [511:0] noc2cvif_axi_r_rdata;
input pdp2cvif_rd_cdt_lat_fifo_pop;
input pdp2cvif_rd_req_valid;
output pdp2cvif_rd_req_ready;
input [78:0] pdp2cvif_rd_req_pd;
input pdp2cvif_wr_req_valid;
output pdp2cvif_wr_req_ready;
input [514:0] pdp2cvif_wr_req_pd;
input [31:0] pwrbus_ram_pd;
input rbk2cvif_rd_cdt_lat_fifo_pop;
input rbk2cvif_rd_req_valid;
output rbk2cvif_rd_req_ready;
input [78:0] rbk2cvif_rd_req_pd;
input rbk2cvif_wr_req_valid;
output rbk2cvif_wr_req_ready;
input [514:0] rbk2cvif_wr_req_pd;
input sdp2cvif_rd_cdt_lat_fifo_pop;
input sdp2cvif_rd_req_valid;
output sdp2cvif_rd_req_ready;
input [78:0] sdp2cvif_rd_req_pd;
input sdp2cvif_wr_req_valid;
output sdp2cvif_wr_req_ready;
input [514:0] sdp2cvif_wr_req_pd;
input sdp_b2cvif_rd_cdt_lat_fifo_pop;
input sdp_b2cvif_rd_req_valid;
output sdp_b2cvif_rd_req_ready;
input [78:0] sdp_b2cvif_rd_req_pd;
input sdp_e2cvif_rd_cdt_lat_fifo_pop;
input sdp_e2cvif_rd_req_valid;
output sdp_e2cvif_rd_req_ready;
input [78:0] sdp_e2cvif_rd_req_pd;
input sdp_n2cvif_rd_cdt_lat_fifo_pop;
input sdp_n2cvif_rd_req_valid;
output sdp_n2cvif_rd_req_ready;
input [78:0] sdp_n2cvif_rd_req_pd;
wire [7:0] reg2dp_rd_os_cnt;
wire [7:0] reg2dp_rd_weight_bdma;
wire [7:0] reg2dp_rd_weight_cdma_dat;
wire [7:0] reg2dp_rd_weight_cdma_wt;
wire [7:0] reg2dp_rd_weight_cdp;
wire [7:0] reg2dp_rd_weight_pdp;
wire [7:0] reg2dp_rd_weight_rbk;
wire [7:0] reg2dp_rd_weight_sdp;
wire [7:0] reg2dp_rd_weight_sdp_b;
wire [7:0] reg2dp_rd_weight_sdp_e;
wire [7:0] reg2dp_rd_weight_sdp_n;
wire [7:0] reg2dp_wr_os_cnt;
wire [7:0] reg2dp_wr_weight_bdma;
wire [7:0] reg2dp_wr_weight_cdp;
wire [7:0] reg2dp_wr_weight_pdp;
wire [7:0] reg2dp_wr_weight_rbk;
wire [7:0] reg2dp_wr_weight_sdp;
NV_NVDLA_CVIF_read u_read (
   .reg2dp_rd_os_cnt (reg2dp_rd_os_cnt[7:0])
  ,.reg2dp_rd_weight_bdma (reg2dp_rd_weight_bdma[7:0])
  ,.reg2dp_rd_weight_cdma_dat (reg2dp_rd_weight_cdma_dat[7:0])
  ,.reg2dp_rd_weight_cdma_wt (reg2dp_rd_weight_cdma_wt[7:0])
  ,.reg2dp_rd_weight_cdp (reg2dp_rd_weight_cdp[7:0])
  ,.reg2dp_rd_weight_pdp (reg2dp_rd_weight_pdp[7:0])
  ,.reg2dp_rd_weight_rbk (reg2dp_rd_weight_rbk[7:0])
  ,.reg2dp_rd_weight_sdp (reg2dp_rd_weight_sdp[7:0])
  ,.reg2dp_rd_weight_sdp_b (reg2dp_rd_weight_sdp_b[7:0])
  ,.reg2dp_rd_weight_sdp_e (reg2dp_rd_weight_sdp_e[7:0])
  ,.reg2dp_rd_weight_sdp_n (reg2dp_rd_weight_sdp_n[7:0])
  ,.nvdla_core_clk (nvdla_core_clk)
  ,.nvdla_core_rstn (nvdla_core_rstn)
  ,.bdma2cvif_rd_cdt_lat_fifo_pop (bdma2cvif_rd_cdt_lat_fifo_pop)
  ,.bdma2cvif_rd_req_valid (bdma2cvif_rd_req_valid)
  ,.bdma2cvif_rd_req_ready (bdma2cvif_rd_req_ready)
  ,.bdma2cvif_rd_req_pd (bdma2cvif_rd_req_pd[78:0])
  ,.cdma_dat2cvif_rd_req_valid (cdma_dat2cvif_rd_req_valid)
  ,.cdma_dat2cvif_rd_req_ready (cdma_dat2cvif_rd_req_ready)
  ,.cdma_dat2cvif_rd_req_pd (cdma_dat2cvif_rd_req_pd[78:0])
  ,.cdma_wt2cvif_rd_req_valid (cdma_wt2cvif_rd_req_valid)
  ,.cdma_wt2cvif_rd_req_ready (cdma_wt2cvif_rd_req_ready)
  ,.cdma_wt2cvif_rd_req_pd (cdma_wt2cvif_rd_req_pd[78:0])
  ,.cdp2cvif_rd_cdt_lat_fifo_pop (cdp2cvif_rd_cdt_lat_fifo_pop)
  ,.cdp2cvif_rd_req_valid (cdp2cvif_rd_req_valid)
  ,.cdp2cvif_rd_req_ready (cdp2cvif_rd_req_ready)
  ,.cdp2cvif_rd_req_pd (cdp2cvif_rd_req_pd[78:0])
  ,.cvif2bdma_rd_rsp_valid (cvif2bdma_rd_rsp_valid)
  ,.cvif2bdma_rd_rsp_ready (cvif2bdma_rd_rsp_ready)
  ,.cvif2bdma_rd_rsp_pd (cvif2bdma_rd_rsp_pd[513:0])
  ,.cvif2cdma_dat_rd_rsp_valid (cvif2cdma_dat_rd_rsp_valid)
  ,.cvif2cdma_dat_rd_rsp_ready (cvif2cdma_dat_rd_rsp_ready)
  ,.cvif2cdma_dat_rd_rsp_pd (cvif2cdma_dat_rd_rsp_pd[513:0])
  ,.cvif2cdma_wt_rd_rsp_valid (cvif2cdma_wt_rd_rsp_valid)
  ,.cvif2cdma_wt_rd_rsp_ready (cvif2cdma_wt_rd_rsp_ready)
  ,.cvif2cdma_wt_rd_rsp_pd (cvif2cdma_wt_rd_rsp_pd[513:0])
  ,.cvif2cdp_rd_rsp_valid (cvif2cdp_rd_rsp_valid)
  ,.cvif2cdp_rd_rsp_ready (cvif2cdp_rd_rsp_ready)
  ,.cvif2cdp_rd_rsp_pd (cvif2cdp_rd_rsp_pd[513:0])
  ,.cvif2noc_axi_ar_arvalid (cvif2noc_axi_ar_arvalid)
  ,.cvif2noc_axi_ar_arready (cvif2noc_axi_ar_arready)
  ,.cvif2noc_axi_ar_arid (cvif2noc_axi_ar_arid[7:0])
  ,.cvif2noc_axi_ar_arlen (cvif2noc_axi_ar_arlen[3:0])
  ,.cvif2noc_axi_ar_araddr (cvif2noc_axi_ar_araddr[63:0])
  ,.cvif2pdp_rd_rsp_valid (cvif2pdp_rd_rsp_valid)
  ,.cvif2pdp_rd_rsp_ready (cvif2pdp_rd_rsp_ready)
  ,.cvif2pdp_rd_rsp_pd (cvif2pdp_rd_rsp_pd[513:0])
  ,.cvif2rbk_rd_rsp_valid (cvif2rbk_rd_rsp_valid)
  ,.cvif2rbk_rd_rsp_ready (cvif2rbk_rd_rsp_ready)
  ,.cvif2rbk_rd_rsp_pd (cvif2rbk_rd_rsp_pd[513:0])
  ,.cvif2sdp_b_rd_rsp_valid (cvif2sdp_b_rd_rsp_valid)
  ,.cvif2sdp_b_rd_rsp_ready (cvif2sdp_b_rd_rsp_ready)
  ,.cvif2sdp_b_rd_rsp_pd (cvif2sdp_b_rd_rsp_pd[513:0])
  ,.cvif2sdp_e_rd_rsp_valid (cvif2sdp_e_rd_rsp_valid)
  ,.cvif2sdp_e_rd_rsp_ready (cvif2sdp_e_rd_rsp_ready)
  ,.cvif2sdp_e_rd_rsp_pd (cvif2sdp_e_rd_rsp_pd[513:0])
  ,.cvif2sdp_n_rd_rsp_valid (cvif2sdp_n_rd_rsp_valid)
  ,.cvif2sdp_n_rd_rsp_ready (cvif2sdp_n_rd_rsp_ready)
  ,.cvif2sdp_n_rd_rsp_pd (cvif2sdp_n_rd_rsp_pd[513:0])
  ,.cvif2sdp_rd_rsp_valid (cvif2sdp_rd_rsp_valid)
  ,.cvif2sdp_rd_rsp_ready (cvif2sdp_rd_rsp_ready)
  ,.cvif2sdp_rd_rsp_pd (cvif2sdp_rd_rsp_pd[513:0])
  ,.noc2cvif_axi_r_rvalid (noc2cvif_axi_r_rvalid)
  ,.noc2cvif_axi_r_rready (noc2cvif_axi_r_rready)
  ,.noc2cvif_axi_r_rid (noc2cvif_axi_r_rid[7:0])
  ,.noc2cvif_axi_r_rlast (noc2cvif_axi_r_rlast)
  ,.noc2cvif_axi_r_rdata (noc2cvif_axi_r_rdata[511:0])
  ,.pdp2cvif_rd_cdt_lat_fifo_pop (pdp2cvif_rd_cdt_lat_fifo_pop)
  ,.pdp2cvif_rd_req_valid (pdp2cvif_rd_req_valid)
  ,.pdp2cvif_rd_req_ready (pdp2cvif_rd_req_ready)
  ,.pdp2cvif_rd_req_pd (pdp2cvif_rd_req_pd[78:0])
  ,.pwrbus_ram_pd (pwrbus_ram_pd[31:0])
  ,.rbk2cvif_rd_cdt_lat_fifo_pop (rbk2cvif_rd_cdt_lat_fifo_pop)
  ,.rbk2cvif_rd_req_valid (rbk2cvif_rd_req_valid)
  ,.rbk2cvif_rd_req_ready (rbk2cvif_rd_req_ready)
  ,.rbk2cvif_rd_req_pd (rbk2cvif_rd_req_pd[78:0])
  ,.sdp2cvif_rd_cdt_lat_fifo_pop (sdp2cvif_rd_cdt_lat_fifo_pop)
  ,.sdp2cvif_rd_req_valid (sdp2cvif_rd_req_valid)
  ,.sdp2cvif_rd_req_ready (sdp2cvif_rd_req_ready)
  ,.sdp2cvif_rd_req_pd (sdp2cvif_rd_req_pd[78:0])
  ,.sdp_b2cvif_rd_cdt_lat_fifo_pop (sdp_b2cvif_rd_cdt_lat_fifo_pop)
  ,.sdp_b2cvif_rd_req_valid (sdp_b2cvif_rd_req_valid)
  ,.sdp_b2cvif_rd_req_ready (sdp_b2cvif_rd_req_ready)
  ,.sdp_b2cvif_rd_req_pd (sdp_b2cvif_rd_req_pd[78:0])
  ,.sdp_e2cvif_rd_cdt_lat_fifo_pop (sdp_e2cvif_rd_cdt_lat_fifo_pop)
  ,.sdp_e2cvif_rd_req_valid (sdp_e2cvif_rd_req_valid)
  ,.sdp_e2cvif_rd_req_ready (sdp_e2cvif_rd_req_ready)
  ,.sdp_e2cvif_rd_req_pd (sdp_e2cvif_rd_req_pd[78:0])
  ,.sdp_n2cvif_rd_cdt_lat_fifo_pop (sdp_n2cvif_rd_cdt_lat_fifo_pop)
  ,.sdp_n2cvif_rd_req_valid (sdp_n2cvif_rd_req_valid)
  ,.sdp_n2cvif_rd_req_ready (sdp_n2cvif_rd_req_ready)
  ,.sdp_n2cvif_rd_req_pd (sdp_n2cvif_rd_req_pd[78:0])
  );
NV_NVDLA_CVIF_write u_write (
   .nvdla_core_clk (nvdla_core_clk)
  ,.nvdla_core_rstn (nvdla_core_rstn)
  ,.bdma2cvif_wr_req_valid (bdma2cvif_wr_req_valid)
  ,.bdma2cvif_wr_req_ready (bdma2cvif_wr_req_ready)
  ,.bdma2cvif_wr_req_pd (bdma2cvif_wr_req_pd[514:0])
  ,.cdp2cvif_wr_req_valid (cdp2cvif_wr_req_valid)
  ,.cdp2cvif_wr_req_ready (cdp2cvif_wr_req_ready)
  ,.cdp2cvif_wr_req_pd (cdp2cvif_wr_req_pd[514:0])
  ,.cvif2bdma_wr_rsp_complete (cvif2bdma_wr_rsp_complete)
  ,.cvif2cdp_wr_rsp_complete (cvif2cdp_wr_rsp_complete)
  ,.cvif2noc_axi_aw_awvalid (cvif2noc_axi_aw_awvalid)
  ,.cvif2noc_axi_aw_awready (cvif2noc_axi_aw_awready)
  ,.cvif2noc_axi_aw_awid (cvif2noc_axi_aw_awid[7:0])
  ,.cvif2noc_axi_aw_awlen (cvif2noc_axi_aw_awlen[3:0])
  ,.cvif2noc_axi_aw_awaddr (cvif2noc_axi_aw_awaddr[63:0])
  ,.cvif2noc_axi_w_wvalid (cvif2noc_axi_w_wvalid)
  ,.cvif2noc_axi_w_wready (cvif2noc_axi_w_wready)
  ,.cvif2noc_axi_w_wdata (cvif2noc_axi_w_wdata[511:0])
  ,.cvif2noc_axi_w_wstrb (cvif2noc_axi_w_wstrb[63:0])
  ,.cvif2noc_axi_w_wlast (cvif2noc_axi_w_wlast)
  ,.cvif2pdp_wr_rsp_complete (cvif2pdp_wr_rsp_complete)
  ,.cvif2rbk_wr_rsp_complete (cvif2rbk_wr_rsp_complete)
  ,.cvif2sdp_wr_rsp_complete (cvif2sdp_wr_rsp_complete)
  ,.noc2cvif_axi_b_bvalid (noc2cvif_axi_b_bvalid)
  ,.noc2cvif_axi_b_bready (noc2cvif_axi_b_bready)
  ,.noc2cvif_axi_b_bid (noc2cvif_axi_b_bid[7:0])
  ,.pdp2cvif_wr_req_valid (pdp2cvif_wr_req_valid)
  ,.pdp2cvif_wr_req_ready (pdp2cvif_wr_req_ready)
  ,.pdp2cvif_wr_req_pd (pdp2cvif_wr_req_pd[514:0])
  ,.pwrbus_ram_pd (pwrbus_ram_pd[31:0])
  ,.rbk2cvif_wr_req_valid (rbk2cvif_wr_req_valid)
  ,.rbk2cvif_wr_req_ready (rbk2cvif_wr_req_ready)
  ,.rbk2cvif_wr_req_pd (rbk2cvif_wr_req_pd[514:0])
  ,.sdp2cvif_wr_req_valid (sdp2cvif_wr_req_valid)
  ,.sdp2cvif_wr_req_ready (sdp2cvif_wr_req_ready)
  ,.sdp2cvif_wr_req_pd (sdp2cvif_wr_req_pd[514:0])
  ,.reg2dp_wr_os_cnt (reg2dp_wr_os_cnt[7:0])
  ,.reg2dp_wr_weight_bdma (reg2dp_wr_weight_bdma[7:0])
  ,.reg2dp_wr_weight_cdp (reg2dp_wr_weight_cdp[7:0])
  ,.reg2dp_wr_weight_pdp (reg2dp_wr_weight_pdp[7:0])
  ,.reg2dp_wr_weight_rbk (reg2dp_wr_weight_rbk[7:0])
  ,.reg2dp_wr_weight_sdp (reg2dp_wr_weight_sdp[7:0])
  );
NV_NVDLA_CVIF_csb u_csb (
   .nvdla_core_clk (nvdla_core_clk)
  ,.nvdla_core_rstn (nvdla_core_rstn)
  ,.csb2cvif_req_pvld (csb2cvif_req_pvld)
  ,.csb2cvif_req_prdy (csb2cvif_req_prdy)
  ,.csb2cvif_req_pd (csb2cvif_req_pd[62:0])
  ,.cvif2csb_resp_valid (cvif2csb_resp_valid)
  ,.cvif2csb_resp_pd (cvif2csb_resp_pd[33:0])
  ,.dp2reg_idle ({1{1'b1}})
  ,.reg2dp_rd_os_cnt (reg2dp_rd_os_cnt[7:0])
  ,.reg2dp_rd_weight_bdma (reg2dp_rd_weight_bdma[7:0])
  ,.reg2dp_rd_weight_cdma_dat (reg2dp_rd_weight_cdma_dat[7:0])
  ,.reg2dp_rd_weight_cdma_wt (reg2dp_rd_weight_cdma_wt[7:0])
  ,.reg2dp_rd_weight_cdp (reg2dp_rd_weight_cdp[7:0])
  ,.reg2dp_rd_weight_pdp (reg2dp_rd_weight_pdp[7:0])
  ,.reg2dp_rd_weight_rbk (reg2dp_rd_weight_rbk[7:0])
  ,.reg2dp_rd_weight_rsv_0 ()
  ,.reg2dp_rd_weight_rsv_1 ()
  ,.reg2dp_rd_weight_sdp (reg2dp_rd_weight_sdp[7:0])
  ,.reg2dp_rd_weight_sdp_b (reg2dp_rd_weight_sdp_b[7:0])
  ,.reg2dp_rd_weight_sdp_e (reg2dp_rd_weight_sdp_e[7:0])
  ,.reg2dp_rd_weight_sdp_n (reg2dp_rd_weight_sdp_n[7:0])
  ,.reg2dp_wr_os_cnt (reg2dp_wr_os_cnt[7:0])
  ,.reg2dp_wr_weight_bdma (reg2dp_wr_weight_bdma[7:0])
  ,.reg2dp_wr_weight_cdp (reg2dp_wr_weight_cdp[7:0])
  ,.reg2dp_wr_weight_pdp (reg2dp_wr_weight_pdp[7:0])
  ,.reg2dp_wr_weight_rbk (reg2dp_wr_weight_rbk[7:0])
  ,.reg2dp_wr_weight_rsv_0 ()
  ,.reg2dp_wr_weight_rsv_1 ()
  ,.reg2dp_wr_weight_rsv_2 ()
  ,.reg2dp_wr_weight_sdp (reg2dp_wr_weight_sdp[7:0])
  );
endmodule
module NV_NVDLA_cvif (
   bdma2cvif_rd_cdt_lat_fifo_pop
  ,bdma2cvif_rd_req_pd
  ,bdma2cvif_rd_req_valid
  ,bdma2cvif_wr_req_pd
  ,bdma2cvif_wr_req_valid
  ,cdma_dat2cvif_rd_req_pd
  ,cdma_dat2cvif_rd_req_valid
  ,cdma_wt2cvif_rd_req_pd
  ,cdma_wt2cvif_rd_req_valid
  ,cdp2cvif_rd_cdt_lat_fifo_pop
  ,cdp2cvif_rd_req_pd
  ,cdp2cvif_rd_req_valid
  ,cdp2cvif_wr_req_pd
  ,cdp2cvif_wr_req_valid
  ,csb2cvif_req_pd
  ,csb2cvif_req_pvld
  ,cvif2bdma_rd_rsp_ready
  ,cvif2cdma_dat_rd_rsp_ready
  ,cvif2cdma_wt_rd_rsp_ready
  ,cvif2cdp_rd_rsp_ready
  ,cvif2noc_axi_ar_arready
  ,cvif2noc_axi_aw_awready
  ,cvif2noc_axi_w_wready
  ,cvif2pdp_rd_rsp_ready
  ,cvif2rbk_rd_rsp_ready
  ,cvif2sdp_b_rd_rsp_ready
  ,cvif2sdp_e_rd_rsp_ready
  ,cvif2sdp_n_rd_rsp_ready
  ,cvif2sdp_rd_rsp_ready
  ,noc2cvif_axi_b_bid
  ,noc2cvif_axi_b_bvalid
  ,noc2cvif_axi_r_rdata
  ,noc2cvif_axi_r_rid
  ,noc2cvif_axi_r_rlast
  ,noc2cvif_axi_r_rvalid
  ,nvdla_core_clk
  ,nvdla_core_rstn
  ,pdp2cvif_rd_cdt_lat_fifo_pop
  ,pdp2cvif_rd_req_pd
  ,pdp2cvif_rd_req_valid
  ,pdp2cvif_wr_req_pd
  ,pdp2cvif_wr_req_valid
  ,pwrbus_ram_pd
  ,rbk2cvif_rd_cdt_lat_fifo_pop
  ,rbk2cvif_rd_req_pd
  ,rbk2cvif_rd_req_valid
  ,rbk2cvif_wr_req_pd
  ,rbk2cvif_wr_req_valid
  ,sdp2cvif_rd_cdt_lat_fifo_pop
  ,sdp2cvif_rd_req_pd
  ,sdp2cvif_rd_req_valid
  ,sdp2cvif_wr_req_pd
  ,sdp2cvif_wr_req_valid
  ,sdp_b2cvif_rd_cdt_lat_fifo_pop
  ,sdp_b2cvif_rd_req_pd
  ,sdp_b2cvif_rd_req_valid
  ,sdp_e2cvif_rd_cdt_lat_fifo_pop
  ,sdp_e2cvif_rd_req_pd
  ,sdp_e2cvif_rd_req_valid
  ,sdp_n2cvif_rd_cdt_lat_fifo_pop
  ,sdp_n2cvif_rd_req_pd
  ,sdp_n2cvif_rd_req_valid
  ,bdma2cvif_rd_req_ready
  ,bdma2cvif_wr_req_ready
  ,cdma_dat2cvif_rd_req_ready
  ,cdma_wt2cvif_rd_req_ready
  ,cdp2cvif_rd_req_ready
  ,cdp2cvif_wr_req_ready
  ,csb2cvif_req_prdy
  ,cvif2bdma_rd_rsp_pd
  ,cvif2bdma_rd_rsp_valid
  ,cvif2bdma_wr_rsp_complete
  ,cvif2cdma_dat_rd_rsp_pd
  ,cvif2cdma_dat_rd_rsp_valid
  ,cvif2cdma_wt_rd_rsp_pd
  ,cvif2cdma_wt_rd_rsp_valid
  ,cvif2cdp_rd_rsp_pd
  ,cvif2cdp_rd_rsp_valid
  ,cvif2cdp_wr_rsp_complete
  ,cvif2csb_resp_pd
  ,cvif2csb_resp_valid
  ,cvif2noc_axi_ar_araddr
  ,cvif2noc_axi_ar_arid
  ,cvif2noc_axi_ar_arlen
  ,cvif2noc_axi_ar_arvalid
  ,cvif2noc_axi_aw_awaddr
  ,cvif2noc_axi_aw_awid
  ,cvif2noc_axi_aw_awlen
  ,cvif2noc_axi_aw_awvalid
  ,cvif2noc_axi_w_wdata
  ,cvif2noc_axi_w_wlast
  ,cvif2noc_axi_w_wstrb
  ,cvif2noc_axi_w_wvalid
  ,cvif2pdp_rd_rsp_pd
  ,cvif2pdp_rd_rsp_valid
  ,cvif2pdp_wr_rsp_complete
  ,cvif2rbk_rd_rsp_pd
  ,cvif2rbk_rd_rsp_valid
  ,cvif2rbk_wr_rsp_complete
  ,cvif2sdp_b_rd_rsp_pd
  ,cvif2sdp_b_rd_rsp_valid
  ,cvif2sdp_e_rd_rsp_pd
  ,cvif2sdp_e_rd_rsp_valid
  ,cvif2sdp_n_rd_rsp_pd
  ,cvif2sdp_n_rd_rsp_valid
  ,cvif2sdp_rd_rsp_pd
  ,cvif2sdp_rd_rsp_valid
  ,cvif2sdp_wr_rsp_complete
  ,noc2cvif_axi_b_bready
  ,noc2cvif_axi_r_rready
  ,pdp2cvif_rd_req_ready
  ,pdp2cvif_wr_req_ready
  ,rbk2cvif_rd_req_ready
  ,rbk2cvif_wr_req_ready
  ,sdp2cvif_rd_req_ready
  ,sdp2cvif_wr_req_ready
  ,sdp_b2cvif_rd_req_ready
  ,sdp_e2cvif_rd_req_ready
  ,sdp_n2cvif_rd_req_ready
  );




input nvdla_core_clk;
input nvdla_core_rstn;
input bdma2cvif_rd_cdt_lat_fifo_pop;
input bdma2cvif_rd_req_valid;
output bdma2cvif_rd_req_ready;
input [78:0] bdma2cvif_rd_req_pd;
input bdma2cvif_wr_req_valid;
output bdma2cvif_wr_req_ready;
input [514:0] bdma2cvif_wr_req_pd;
input cdma_dat2cvif_rd_req_valid;
output cdma_dat2cvif_rd_req_ready;
input [78:0] cdma_dat2cvif_rd_req_pd;
input cdma_wt2cvif_rd_req_valid;
output cdma_wt2cvif_rd_req_ready;
input [78:0] cdma_wt2cvif_rd_req_pd;
input cdp2cvif_rd_cdt_lat_fifo_pop;
input cdp2cvif_rd_req_valid;
output cdp2cvif_rd_req_ready;
input [78:0] cdp2cvif_rd_req_pd;
input cdp2cvif_wr_req_valid;
output cdp2cvif_wr_req_ready;
input [514:0] cdp2cvif_wr_req_pd;
input csb2cvif_req_pvld;
output csb2cvif_req_prdy;
input [62:0] csb2cvif_req_pd;
output cvif2bdma_rd_rsp_valid;
input cvif2bdma_rd_rsp_ready;
output [513:0] cvif2bdma_rd_rsp_pd;
output cvif2bdma_wr_rsp_complete;
output cvif2cdma_dat_rd_rsp_valid;
input cvif2cdma_dat_rd_rsp_ready;
output [513:0] cvif2cdma_dat_rd_rsp_pd;
output cvif2cdma_wt_rd_rsp_valid;
input cvif2cdma_wt_rd_rsp_ready;
output [513:0] cvif2cdma_wt_rd_rsp_pd;
output cvif2cdp_rd_rsp_valid;
input cvif2cdp_rd_rsp_ready;
output [513:0] cvif2cdp_rd_rsp_pd;
output cvif2cdp_wr_rsp_complete;
output cvif2csb_resp_valid;
output [33:0] cvif2csb_resp_pd;
output cvif2noc_axi_ar_arvalid;
input cvif2noc_axi_ar_arready;
output [7:0] cvif2noc_axi_ar_arid;
output [3:0] cvif2noc_axi_ar_arlen;
output [63:0] cvif2noc_axi_ar_araddr;
output cvif2noc_axi_aw_awvalid;
input cvif2noc_axi_aw_awready;
output [7:0] cvif2noc_axi_aw_awid;
output [3:0] cvif2noc_axi_aw_awlen;
output [63:0] cvif2noc_axi_aw_awaddr;
output cvif2noc_axi_w_wvalid;
input cvif2noc_axi_w_wready;
output [511:0] cvif2noc_axi_w_wdata;
output [63:0] cvif2noc_axi_w_wstrb;
output cvif2noc_axi_w_wlast;
output cvif2pdp_rd_rsp_valid;
input cvif2pdp_rd_rsp_ready;
output [513:0] cvif2pdp_rd_rsp_pd;
output cvif2pdp_wr_rsp_complete;
output cvif2rbk_rd_rsp_valid;
input cvif2rbk_rd_rsp_ready;
output [513:0] cvif2rbk_rd_rsp_pd;
output cvif2rbk_wr_rsp_complete;
output cvif2sdp_b_rd_rsp_valid;
input cvif2sdp_b_rd_rsp_ready;
output [513:0] cvif2sdp_b_rd_rsp_pd;
output cvif2sdp_e_rd_rsp_valid;
input cvif2sdp_e_rd_rsp_ready;
output [513:0] cvif2sdp_e_rd_rsp_pd;
output cvif2sdp_n_rd_rsp_valid;
input cvif2sdp_n_rd_rsp_ready;
output [513:0] cvif2sdp_n_rd_rsp_pd;
output cvif2sdp_rd_rsp_valid;
input cvif2sdp_rd_rsp_ready;
output [513:0] cvif2sdp_rd_rsp_pd;
output cvif2sdp_wr_rsp_complete;
input noc2cvif_axi_b_bvalid;
output noc2cvif_axi_b_bready;
input [7:0] noc2cvif_axi_b_bid;
input noc2cvif_axi_r_rvalid;
output noc2cvif_axi_r_rready;
input [7:0] noc2cvif_axi_r_rid;
input noc2cvif_axi_r_rlast;
input [511:0] noc2cvif_axi_r_rdata;
input pdp2cvif_rd_cdt_lat_fifo_pop;
input pdp2cvif_rd_req_valid;
output pdp2cvif_rd_req_ready;
input [78:0] pdp2cvif_rd_req_pd;
input pdp2cvif_wr_req_valid;
output pdp2cvif_wr_req_ready;
input [514:0] pdp2cvif_wr_req_pd;
input [31:0] pwrbus_ram_pd;
input rbk2cvif_rd_cdt_lat_fifo_pop;
input rbk2cvif_rd_req_valid;
output rbk2cvif_rd_req_ready;
input [78:0] rbk2cvif_rd_req_pd;
input rbk2cvif_wr_req_valid;
output rbk2cvif_wr_req_ready;
input [514:0] rbk2cvif_wr_req_pd;
input sdp2cvif_rd_cdt_lat_fifo_pop;
input sdp2cvif_rd_req_valid;
output sdp2cvif_rd_req_ready;
input [78:0] sdp2cvif_rd_req_pd;
input sdp2cvif_wr_req_valid;
output sdp2cvif_wr_req_ready;
input [514:0] sdp2cvif_wr_req_pd;
input sdp_b2cvif_rd_cdt_lat_fifo_pop;
input sdp_b2cvif_rd_req_valid;
output sdp_b2cvif_rd_req_ready;
input [78:0] sdp_b2cvif_rd_req_pd;
input sdp_e2cvif_rd_cdt_lat_fifo_pop;
input sdp_e2cvif_rd_req_valid;
output sdp_e2cvif_rd_req_ready;
input [78:0] sdp_e2cvif_rd_req_pd;
input sdp_n2cvif_rd_cdt_lat_fifo_pop;
input sdp_n2cvif_rd_req_valid;
output sdp_n2cvif_rd_req_ready;
input [78:0] sdp_n2cvif_rd_req_pd;
wire [7:0] reg2dp_rd_os_cnt;
wire [7:0] reg2dp_rd_weight_bdma;
wire [7:0] reg2dp_rd_weight_cdma_dat;
wire [7:0] reg2dp_rd_weight_cdma_wt;
wire [7:0] reg2dp_rd_weight_cdp;
wire [7:0] reg2dp_rd_weight_pdp;
wire [7:0] reg2dp_rd_weight_rbk;
wire [7:0] reg2dp_rd_weight_sdp;
wire [7:0] reg2dp_rd_weight_sdp_b;
wire [7:0] reg2dp_rd_weight_sdp_e;
wire [7:0] reg2dp_rd_weight_sdp_n;
wire [7:0] reg2dp_wr_os_cnt;
wire [7:0] reg2dp_wr_weight_bdma;
wire [7:0] reg2dp_wr_weight_cdp;
wire [7:0] reg2dp_wr_weight_pdp;
wire [7:0] reg2dp_wr_weight_rbk;
wire [7:0] reg2dp_wr_weight_sdp;
NV_NVDLA_CVIF_read u_read (
   .reg2dp_rd_os_cnt (reg2dp_rd_os_cnt[7:0])
  ,.reg2dp_rd_weight_bdma (reg2dp_rd_weight_bdma[7:0])
  ,.reg2dp_rd_weight_cdma_dat (reg2dp_rd_weight_cdma_dat[7:0])
  ,.reg2dp_rd_weight_cdma_wt (reg2dp_rd_weight_cdma_wt[7:0])
  ,.reg2dp_rd_weight_cdp (reg2dp_rd_weight_cdp[7:0])
  ,.reg2dp_rd_weight_pdp (reg2dp_rd_weight_pdp[7:0])
  ,.reg2dp_rd_weight_rbk (reg2dp_rd_weight_rbk[7:0])
  ,.reg2dp_rd_weight_sdp (reg2dp_rd_weight_sdp[7:0])
  ,.reg2dp_rd_weight_sdp_b (reg2dp_rd_weight_sdp_b[7:0])
  ,.reg2dp_rd_weight_sdp_e (reg2dp_rd_weight_sdp_e[7:0])
  ,.reg2dp_rd_weight_sdp_n (reg2dp_rd_weight_sdp_n[7:0])
  ,.nvdla_core_clk (nvdla_core_clk)
  ,.nvdla_core_rstn (nvdla_core_rstn)
  ,.bdma2cvif_rd_cdt_lat_fifo_pop (bdma2cvif_rd_cdt_lat_fifo_pop)
  ,.bdma2cvif_rd_req_valid (bdma2cvif_rd_req_valid)
  ,.bdma2cvif_rd_req_ready (bdma2cvif_rd_req_ready)
  ,.bdma2cvif_rd_req_pd (bdma2cvif_rd_req_pd[78:0])
  ,.cdma_dat2cvif_rd_req_valid (cdma_dat2cvif_rd_req_valid)
  ,.cdma_dat2cvif_rd_req_ready (cdma_dat2cvif_rd_req_ready)
  ,.cdma_dat2cvif_rd_req_pd (cdma_dat2cvif_rd_req_pd[78:0])
  ,.cdma_wt2cvif_rd_req_valid (cdma_wt2cvif_rd_req_valid)
  ,.cdma_wt2cvif_rd_req_ready (cdma_wt2cvif_rd_req_ready)
  ,.cdma_wt2cvif_rd_req_pd (cdma_wt2cvif_rd_req_pd[78:0])
  ,.cdp2cvif_rd_cdt_lat_fifo_pop (cdp2cvif_rd_cdt_lat_fifo_pop)
  ,.cdp2cvif_rd_req_valid (cdp2cvif_rd_req_valid)
  ,.cdp2cvif_rd_req_ready (cdp2cvif_rd_req_ready)
  ,.cdp2cvif_rd_req_pd (cdp2cvif_rd_req_pd[78:0])
  ,.cvif2bdma_rd_rsp_valid (cvif2bdma_rd_rsp_valid)
  ,.cvif2bdma_rd_rsp_ready (cvif2bdma_rd_rsp_ready)
  ,.cvif2bdma_rd_rsp_pd (cvif2bdma_rd_rsp_pd[513:0])
  ,.cvif2cdma_dat_rd_rsp_valid (cvif2cdma_dat_rd_rsp_valid)
  ,.cvif2cdma_dat_rd_rsp_ready (cvif2cdma_dat_rd_rsp_ready)
  ,.cvif2cdma_dat_rd_rsp_pd (cvif2cdma_dat_rd_rsp_pd[513:0])
  ,.cvif2cdma_wt_rd_rsp_valid (cvif2cdma_wt_rd_rsp_valid)
  ,.cvif2cdma_wt_rd_rsp_ready (cvif2cdma_wt_rd_rsp_ready)
  ,.cvif2cdma_wt_rd_rsp_pd (cvif2cdma_wt_rd_rsp_pd[513:0])
  ,.cvif2cdp_rd_rsp_valid (cvif2cdp_rd_rsp_valid)
  ,.cvif2cdp_rd_rsp_ready (cvif2cdp_rd_rsp_ready)
  ,.cvif2cdp_rd_rsp_pd (cvif2cdp_rd_rsp_pd[513:0])
  ,.cvif2noc_axi_ar_arvalid (cvif2noc_axi_ar_arvalid)
  ,.cvif2noc_axi_ar_arready (cvif2noc_axi_ar_arready)
  ,.cvif2noc_axi_ar_arid (cvif2noc_axi_ar_arid[7:0])
  ,.cvif2noc_axi_ar_arlen (cvif2noc_axi_ar_arlen[3:0])
  ,.cvif2noc_axi_ar_araddr (cvif2noc_axi_ar_araddr[63:0])
  ,.cvif2pdp_rd_rsp_valid (cvif2pdp_rd_rsp_valid)
  ,.cvif2pdp_rd_rsp_ready (cvif2pdp_rd_rsp_ready)
  ,.cvif2pdp_rd_rsp_pd (cvif2pdp_rd_rsp_pd[513:0])
  ,.cvif2rbk_rd_rsp_valid (cvif2rbk_rd_rsp_valid)
  ,.cvif2rbk_rd_rsp_ready (cvif2rbk_rd_rsp_ready)
  ,.cvif2rbk_rd_rsp_pd (cvif2rbk_rd_rsp_pd[513:0])
  ,.cvif2sdp_b_rd_rsp_valid (cvif2sdp_b_rd_rsp_valid)
  ,.cvif2sdp_b_rd_rsp_ready (cvif2sdp_b_rd_rsp_ready)
  ,.cvif2sdp_b_rd_rsp_pd (cvif2sdp_b_rd_rsp_pd[513:0])
  ,.cvif2sdp_e_rd_rsp_valid (cvif2sdp_e_rd_rsp_valid)
  ,.cvif2sdp_e_rd_rsp_ready (cvif2sdp_e_rd_rsp_ready)
  ,.cvif2sdp_e_rd_rsp_pd (cvif2sdp_e_rd_rsp_pd[513:0])
  ,.cvif2sdp_n_rd_rsp_valid (cvif2sdp_n_rd_rsp_valid)
  ,.cvif2sdp_n_rd_rsp_ready (cvif2sdp_n_rd_rsp_ready)
  ,.cvif2sdp_n_rd_rsp_pd (cvif2sdp_n_rd_rsp_pd[513:0])
  ,.cvif2sdp_rd_rsp_valid (cvif2sdp_rd_rsp_valid)
  ,.cvif2sdp_rd_rsp_ready (cvif2sdp_rd_rsp_ready)
  ,.cvif2sdp_rd_rsp_pd (cvif2sdp_rd_rsp_pd[513:0])
  ,.noc2cvif_axi_r_rvalid (noc2cvif_axi_r_rvalid)
  ,.noc2cvif_axi_r_rready (noc2cvif_axi_r_rready)
  ,.noc2cvif_axi_r_rid (noc2cvif_axi_r_rid[7:0])
  ,.noc2cvif_axi_r_rlast (noc2cvif_axi_r_rlast)
  ,.noc2cvif_axi_r_rdata (noc2cvif_axi_r_rdata[511:0])
  ,.pdp2cvif_rd_cdt_lat_fifo_pop (pdp2cvif_rd_cdt_lat_fifo_pop)
  ,.pdp2cvif_rd_req_valid (pdp2cvif_rd_req_valid)
  ,.pdp2cvif_rd_req_ready (pdp2cvif_rd_req_ready)
  ,.pdp2cvif_rd_req_pd (pdp2cvif_rd_req_pd[78:0])
  ,.pwrbus_ram_pd (pwrbus_ram_pd[31:0])
  ,.rbk2cvif_rd_cdt_lat_fifo_pop (rbk2cvif_rd_cdt_lat_fifo_pop)
  ,.rbk2cvif_rd_req_valid (rbk2cvif_rd_req_valid)
  ,.rbk2cvif_rd_req_ready (rbk2cvif_rd_req_ready)
  ,.rbk2cvif_rd_req_pd (rbk2cvif_rd_req_pd[78:0])
  ,.sdp2cvif_rd_cdt_lat_fifo_pop (sdp2cvif_rd_cdt_lat_fifo_pop)
  ,.sdp2cvif_rd_req_valid (sdp2cvif_rd_req_valid)
  ,.sdp2cvif_rd_req_ready (sdp2cvif_rd_req_ready)
  ,.sdp2cvif_rd_req_pd (sdp2cvif_rd_req_pd[78:0])
  ,.sdp_b2cvif_rd_cdt_lat_fifo_pop (sdp_b2cvif_rd_cdt_lat_fifo_pop)
  ,.sdp_b2cvif_rd_req_valid (sdp_b2cvif_rd_req_valid)
  ,.sdp_b2cvif_rd_req_ready (sdp_b2cvif_rd_req_ready)
  ,.sdp_b2cvif_rd_req_pd (sdp_b2cvif_rd_req_pd[78:0])
  ,.sdp_e2cvif_rd_cdt_lat_fifo_pop (sdp_e2cvif_rd_cdt_lat_fifo_pop)
  ,.sdp_e2cvif_rd_req_valid (sdp_e2cvif_rd_req_valid)
  ,.sdp_e2cvif_rd_req_ready (sdp_e2cvif_rd_req_ready)
  ,.sdp_e2cvif_rd_req_pd (sdp_e2cvif_rd_req_pd[78:0])
  ,.sdp_n2cvif_rd_cdt_lat_fifo_pop (sdp_n2cvif_rd_cdt_lat_fifo_pop)
  ,.sdp_n2cvif_rd_req_valid (sdp_n2cvif_rd_req_valid)
  ,.sdp_n2cvif_rd_req_ready (sdp_n2cvif_rd_req_ready)
  ,.sdp_n2cvif_rd_req_pd (sdp_n2cvif_rd_req_pd[78:0])
  );
NV_NVDLA_CVIF_write u_write (
   .nvdla_core_clk (nvdla_core_clk)
  ,.nvdla_core_rstn (nvdla_core_rstn)
  ,.bdma2cvif_wr_req_valid (bdma2cvif_wr_req_valid)
  ,.bdma2cvif_wr_req_ready (bdma2cvif_wr_req_ready)
  ,.bdma2cvif_wr_req_pd (bdma2cvif_wr_req_pd[514:0])
  ,.cdp2cvif_wr_req_valid (cdp2cvif_wr_req_valid)
  ,.cdp2cvif_wr_req_ready (cdp2cvif_wr_req_ready)
  ,.cdp2cvif_wr_req_pd (cdp2cvif_wr_req_pd[514:0])
  ,.cvif2bdma_wr_rsp_complete (cvif2bdma_wr_rsp_complete)
  ,.cvif2cdp_wr_rsp_complete (cvif2cdp_wr_rsp_complete)
  ,.cvif2noc_axi_aw_awvalid (cvif2noc_axi_aw_awvalid)
  ,.cvif2noc_axi_aw_awready (cvif2noc_axi_aw_awready)
  ,.cvif2noc_axi_aw_awid (cvif2noc_axi_aw_awid[7:0])
  ,.cvif2noc_axi_aw_awlen (cvif2noc_axi_aw_awlen[3:0])
  ,.cvif2noc_axi_aw_awaddr (cvif2noc_axi_aw_awaddr[63:0])
  ,.cvif2noc_axi_w_wvalid (cvif2noc_axi_w_wvalid)
  ,.cvif2noc_axi_w_wready (cvif2noc_axi_w_wready)
  ,.cvif2noc_axi_w_wdata (cvif2noc_axi_w_wdata[511:0])
  ,.cvif2noc_axi_w_wstrb (cvif2noc_axi_w_wstrb[63:0])
  ,.cvif2noc_axi_w_wlast (cvif2noc_axi_w_wlast)
  ,.cvif2pdp_wr_rsp_complete (cvif2pdp_wr_rsp_complete)
  ,.cvif2rbk_wr_rsp_complete (cvif2rbk_wr_rsp_complete)
  ,.cvif2sdp_wr_rsp_complete (cvif2sdp_wr_rsp_complete)
  ,.noc2cvif_axi_b_bvalid (noc2cvif_axi_b_bvalid)
  ,.noc2cvif_axi_b_bready (noc2cvif_axi_b_bready)
  ,.noc2cvif_axi_b_bid (noc2cvif_axi_b_bid[7:0])
  ,.pdp2cvif_wr_req_valid (pdp2cvif_wr_req_valid)
  ,.pdp2cvif_wr_req_ready (pdp2cvif_wr_req_ready)
  ,.pdp2cvif_wr_req_pd (pdp2cvif_wr_req_pd[514:0])
  ,.pwrbus_ram_pd (pwrbus_ram_pd[31:0])
  ,.rbk2cvif_wr_req_valid (rbk2cvif_wr_req_valid)
  ,.rbk2cvif_wr_req_ready (rbk2cvif_wr_req_ready)
  ,.rbk2cvif_wr_req_pd (rbk2cvif_wr_req_pd[514:0])
  ,.sdp2cvif_wr_req_valid (sdp2cvif_wr_req_valid)
  ,.sdp2cvif_wr_req_ready (sdp2cvif_wr_req_ready)
  ,.sdp2cvif_wr_req_pd (sdp2cvif_wr_req_pd[514:0])
  ,.reg2dp_wr_os_cnt (reg2dp_wr_os_cnt[7:0])
  ,.reg2dp_wr_weight_bdma (reg2dp_wr_weight_bdma[7:0])
  ,.reg2dp_wr_weight_cdp (reg2dp_wr_weight_cdp[7:0])
  ,.reg2dp_wr_weight_pdp (reg2dp_wr_weight_pdp[7:0])
  ,.reg2dp_wr_weight_rbk (reg2dp_wr_weight_rbk[7:0])
  ,.reg2dp_wr_weight_sdp (reg2dp_wr_weight_sdp[7:0])
  );
NV_NVDLA_CVIF_csb u_csb (
   .nvdla_core_clk (nvdla_core_clk)
  ,.nvdla_core_rstn (nvdla_core_rstn)
  ,.csb2cvif_req_pvld (csb2cvif_req_pvld)
  ,.csb2cvif_req_prdy (csb2cvif_req_prdy)
  ,.csb2cvif_req_pd (csb2cvif_req_pd[62:0])
  ,.cvif2csb_resp_valid (cvif2csb_resp_valid)
  ,.cvif2csb_resp_pd (cvif2csb_resp_pd[33:0])
  ,.dp2reg_idle ({1{1'b1}})
  ,.reg2dp_rd_os_cnt (reg2dp_rd_os_cnt[7:0])
  ,.reg2dp_rd_weight_bdma (reg2dp_rd_weight_bdma[7:0])
  ,.reg2dp_rd_weight_cdma_dat (reg2dp_rd_weight_cdma_dat[7:0])
  ,.reg2dp_rd_weight_cdma_wt (reg2dp_rd_weight_cdma_wt[7:0])
  ,.reg2dp_rd_weight_cdp (reg2dp_rd_weight_cdp[7:0])
  ,.reg2dp_rd_weight_pdp (reg2dp_rd_weight_pdp[7:0])
  ,.reg2dp_rd_weight_rbk (reg2dp_rd_weight_rbk[7:0])
  ,.reg2dp_rd_weight_rsv_0 ()
  ,.reg2dp_rd_weight_rsv_1 ()
  ,.reg2dp_rd_weight_sdp (reg2dp_rd_weight_sdp[7:0])
  ,.reg2dp_rd_weight_sdp_b (reg2dp_rd_weight_sdp_b[7:0])
  ,.reg2dp_rd_weight_sdp_e (reg2dp_rd_weight_sdp_e[7:0])
  ,.reg2dp_rd_weight_sdp_n (reg2dp_rd_weight_sdp_n[7:0])
  ,.reg2dp_wr_os_cnt (reg2dp_wr_os_cnt[7:0])
  ,.reg2dp_wr_weight_bdma (reg2dp_wr_weight_bdma[7:0])
  ,.reg2dp_wr_weight_cdp (reg2dp_wr_weight_cdp[7:0])
  ,.reg2dp_wr_weight_pdp (reg2dp_wr_weight_pdp[7:0])
  ,.reg2dp_wr_weight_rbk (reg2dp_wr_weight_rbk[7:0])
  ,.reg2dp_wr_weight_rsv_0 ()
  ,.reg2dp_wr_weight_rsv_1 ()
  ,.reg2dp_wr_weight_rsv_2 ()
  ,.reg2dp_wr_weight_sdp (reg2dp_wr_weight_sdp[7:0])
  );
endmodule