data/full_repos/permissive/468929885/verilog/rtl/rs_lat.v
data/verilator_xmls/0ac5a1af-b9ba-48a3-9a1a-9def12398d1c.xml
module rs_lat
(

	input							rst,

	input							r,
	input							s,

	output							out

);


endmodule
module rs_lat
(

	input							rst,

	input							r,
	input							s,

	output							out

);



endmodule