data/full_repos/permissive/423547971/FPGA Projects/VGA Projects/VGA Text Generation/ascii_test.v
1: b'%Error: Cannot find file containing module: Projects/VGA\n        ... Looked in:\n             data/full_repos/permissive/423547971/FPGA/Projects/VGA\n             data/full_repos/permissive/423547971/FPGA/Projects/VGA.v\n             data/full_repos/permissive/423547971/FPGA/Projects/VGA.sv\n             Projects/VGA\n             Projects/VGA.v\n             Projects/VGA.sv\n             obj_dir/Projects/VGA\n             obj_dir/Projects/VGA.v\n             obj_dir/Projects/VGA.sv\n%Error: Cannot find file containing module: Text\n%Error: Cannot find file containing module: Generation,data/full_repos/permissive/423547971\n%Error: Cannot find file containing module: data/full_repos/permissive/423547971/FPGA\n%Error: Cannot find file containing module: Generation/ascii_test.v\n%Error: Exiting due to 5 error(s)\n'
module ascii_test(
    input clk,
    input video_on,
    input [9:0] x, y,
    output reg [11:0] rgb
    );
    

    wire [10:0] rom_addr;
    wire [6:0] ascii_char;
    wire [3:0] char_row;
    wire [2:0] bit_addr;
    wire [7:0] rom_data;
    wire ascii_bit, ascii_bit_on;
    

    ascii_rom rom(.clk(clk), .addr(rom_addr), .data(rom_data));
      

    assign rom_addr = {ascii_char, char_row};
    assign ascii_bit = rom_data[~bit_addr];

    assign ascii_char = {y[5:4], x[7:3]};
    assign char_row = y[3:0];
    assign bit_addr = x[2:0];

    assign ascii_bit_on = ((x >= 192 && x < 448) && (y >= 208 && y < 272)) ? ascii_bit : 1'b0;
    

    always @*
        if(~video_on)
            rgb = 12'h000;
        else
            if(ascii_bit_on)
                rgb = 12'h00F;
            else
                rgb = 12'hFFF;
   
endmodule
module ascii_test(
    input clk,
    input video_on,
    input [9:0] x, y,
    output reg [11:0] rgb
    );

    

    wire [10:0] rom_addr;
    wire [6:0] ascii_char;
    wire [3:0] char_row;
    wire [2:0] bit_addr;
    wire [7:0] rom_data;
    wire ascii_bit, ascii_bit_on;
    

    ascii_rom rom(.clk(clk), .addr(rom_addr), .data(rom_data));
      

    assign rom_addr = {ascii_char, char_row};
    assign ascii_bit = rom_data[~bit_addr];

    assign ascii_char = {y[5:4], x[7:3]};
    assign char_row = y[3:0];
    assign bit_addr = x[2:0];

    assign ascii_bit_on = ((x >= 192 && x < 448) && (y >= 208 && y < 272)) ? ascii_bit : 1'b0;
    

    always @*
        if(~video_on)
            rgb = 12'h000;
        else
            if(ascii_bit_on)
                rgb = 12'h00F;
            else
                rgb = 12'hFFF;
   
endmodule