data/full_repos/permissive/418752214/C910_RTL_FACTORY/gen_rtl/rtu/rtl/ct_rtu_expand_8.v
data/verilator_xmls/a282ec99-9169-46cc-9adf-a5083ee04416.xml
module ct_rtu_expand_8(
  x_num,
  x_num_expand
);


input   [2:0]  x_num;       
output  [7:0]  x_num_expand; 




wire    [2:0]  x_num;       
wire    [7:0]  x_num_expand; 





assign x_num_expand[0] = (x_num[2:0] == 3'd0);
assign x_num_expand[1] = (x_num[2:0] == 3'd1);
assign x_num_expand[2] = (x_num[2:0] == 3'd2);
assign x_num_expand[3] = (x_num[2:0] == 3'd3);
assign x_num_expand[4] = (x_num[2:0] == 3'd4);
assign x_num_expand[5] = (x_num[2:0] == 3'd5);
assign x_num_expand[6] = (x_num[2:0] == 3'd6);
assign x_num_expand[7] = (x_num[2:0] == 3'd7);


endmodule
module ct_rtu_expand_8(
  x_num,
  x_num_expand
);



input   [2:0]  x_num;       
output  [7:0]  x_num_expand; 




wire    [2:0]  x_num;       
wire    [7:0]  x_num_expand; 





assign x_num_expand[0] = (x_num[2:0] == 3'd0);
assign x_num_expand[1] = (x_num[2:0] == 3'd1);
assign x_num_expand[2] = (x_num[2:0] == 3'd2);
assign x_num_expand[3] = (x_num[2:0] == 3'd3);
assign x_num_expand[4] = (x_num[2:0] == 3'd4);
assign x_num_expand[5] = (x_num[2:0] == 3'd5);
assign x_num_expand[6] = (x_num[2:0] == 3'd6);
assign x_num_expand[7] = (x_num[2:0] == 3'd7);


endmodule