data/full_repos/permissive/463549945/Problem_sets/Verilog_Language/Modules_Hierarchy/Adder-subtractor.v
1: b"%Error: data/full_repos/permissive/463549945/Problem_sets/Verilog_Language/Modules_Hierarchy/Adder-subtractor.v:21: Cannot find file containing module: 'add16'\n    add16 add_inst_l (a[15:0] , xor_b_sub[15:0] , sub, sum[15:0] , cin) ;\n    ^~~~~\n        ... Looked in:\n             data/full_repos/permissive/463549945/Problem_sets/Verilog_Language/Modules_Hierarchy,data/full_repos/permissive/463549945/add16\n             data/full_repos/permissive/463549945/Problem_sets/Verilog_Language/Modules_Hierarchy,data/full_repos/permissive/463549945/add16.v\n             data/full_repos/permissive/463549945/Problem_sets/Verilog_Language/Modules_Hierarchy,data/full_repos/permissive/463549945/add16.sv\n             add16\n             add16.v\n             add16.sv\n             obj_dir/add16\n             obj_dir/add16.v\n             obj_dir/add16.sv\n%Error: data/full_repos/permissive/463549945/Problem_sets/Verilog_Language/Modules_Hierarchy/Adder-subtractor.v:22: Cannot find file containing module: 'add16'\n    add16 add_inst_h (a[31:16], xor_b_sub[31:16], cin, sum[31:16], cout);\n    ^~~~~\n%Error: Exiting due to 2 error(s)\n"
module top_module(
    input [31:0] a,
    input [31:0] b,
    input sub,
    output [31:0] sum
);
    
    reg [31:0]   xor_b_sub;
    always @(sub, b) begin
        case (sub)
            1'b0: xor_b_sub = b ;
            1'b1: xor_b_sub = ~b;
        endcase
    end

    reg              cin ;
    reg              cout;
    add16 add_inst_l (a[15:0] , xor_b_sub[15:0] , sub, sum[15:0] , cin) ;
    add16 add_inst_h (a[31:16], xor_b_sub[31:16], cin, sum[31:16], cout);

endmodule
module top_module(
    input [31:0] a,
    input [31:0] b,
    input sub,
    output [31:0] sum
);

    
    reg [31:0]   xor_b_sub;
    always @(sub, b) begin
        case (sub)
            1'b0: xor_b_sub = b ;
            1'b1: xor_b_sub = ~b;
        endcase
    end

    reg              cin ;
    reg              cout;
    add16 add_inst_l (a[15:0] , xor_b_sub[15:0] , sub, sum[15:0] , cin) ;
    add16 add_inst_h (a[31:16], xor_b_sub[31:16], cin, sum[31:16], cout);

endmodule