data/full_repos/permissive/477054115/Mips16_singlecycle/mux.v
1: b'%Warning-IMPLICIT: data/full_repos/permissive/477054115/Mips16_singlecycle/mux.v:19: Signal definition not found, creating implicitly: \'nsel\'\n                                                                                   : ... Suggested alternative: \'sel\'\n not #(50) not1(nsel,sel);  \n                ^~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Warning-IMPLICIT: data/full_repos/permissive/477054115/Mips16_singlecycle/mux.v:20: Signal definition not found, creating implicitly: \'O1\'\n                                                                                   : ... Suggested alternative: \'O\'\n and #(50) and1(O1,A,nsel);   \n                ^~\n%Warning-IMPLICIT: data/full_repos/permissive/477054115/Mips16_singlecycle/mux.v:21: Signal definition not found, creating implicitly: \'O2\'\n                                                                                   : ... Suggested alternative: \'O\'\n and #(50) and2(O2,B,sel);  \n                ^~\n%Error: Exiting due to 3 warning(s)\n'
module mux2x5to5( AddrOut,Addr0, Addr1, Select);  
 output [4:0] AddrOut;
 input [4:0] Addr0, Addr1;
 input Select;  
 mux21 mux0(AddrOut[0],Addr0[0],Addr1[0],Select);  
 mux21 mux1(AddrOut[1],Addr0[1],Addr1[1],Select);  
 mux21 mux2(AddrOut[2],Addr0[2],Addr1[2],Select);  
 mux21 mux3(AddrOut[3],Addr0[3],Addr1[3],Select);  
 mux21 mux4(AddrOut[4],Addr0[4],Addr1[4],Select);  
 endmodule
module mux2x5to5( AddrOut,Addr0, Addr1, Select);
  
 output [4:0] AddrOut;
 input [4:0] Addr0, Addr1;
 input Select;  
 mux21 mux0(AddrOut[0],Addr0[0],Addr1[0],Select);  
 mux21 mux1(AddrOut[1],Addr0[1],Addr1[1],Select);  
 mux21 mux2(AddrOut[2],Addr0[2],Addr1[2],Select);  
 mux21 mux3(AddrOut[3],Addr0[3],Addr1[3],Select);  
 mux21 mux4(AddrOut[4],Addr0[4],Addr1[4],Select);  
 endmodule