data/full_repos/permissive/478063538/adder16.v
1: b'%Warning-WIDTH: data/full_repos/permissive/478063538/adder16.v:9: Operator ADD expects 17 bits on the RHS, but RHS\'s VARREF \'Cin\' generates 1 bits.\n                                                                : ... In instance adder16.addunit\n assign {Cout, S} = A + B + Cin;\n                          ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module adder16 (
	input [15:0] A, B,
	input Cin,
	output [15:0] S,
	output Cout
	);
	
	p_adder #(.N(16)) addunit (.A(A), .B(B), .Cin(Cin), .S(S), .Cout(Cout));
endmodule
module adder16 (
	input [15:0] A, B,
	input Cin,
	output [15:0] S,
	output Cout
	);

	
	p_adder #(.N(16)) addunit (.A(A), .B(B), .Cin(Cin), .S(S), .Cout(Cout));
endmodule