data/full_repos/permissive/488093047/Verilog Codes/LoadLogic.v
1: b'%Error: Cannot find file containing module: Codes,data/full_repos/permissive/488093047\n        ... Looked in:\n             data/full_repos/permissive/488093047/Verilog/Codes,data/full_repos/permissive/488093047\n             data/full_repos/permissive/488093047/Verilog/Codes,data/full_repos/permissive/488093047.v\n             data/full_repos/permissive/488093047/Verilog/Codes,data/full_repos/permissive/488093047.sv\n             Codes,data/full_repos/permissive/488093047\n             Codes,data/full_repos/permissive/488093047.v\n             Codes,data/full_repos/permissive/488093047.sv\n             obj_dir/Codes,data/full_repos/permissive/488093047\n             obj_dir/Codes,data/full_repos/permissive/488093047.v\n             obj_dir/Codes,data/full_repos/permissive/488093047.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/488093047/Verilog\n%Error: Cannot find file containing module: Codes/LoadLogic.v\n%Error: Exiting due to 3 error(s)\n'
module LoadLogic(WR,clk,LO,RS,RD,MaOr,AlOr,O1,O2,O3);
input WR,clk,LO;
input [2:0]RS,RD;
input [31:0]MaOr,AlOr;
output O1;
output [2:0]O2;
output [31:0]O3;
reg clkn;


Mux_2x1 #(.N(1))  DUT2(.a(WR),.b(clk),.s(LO),.y(O1));
Mux_2x1 #(.N(3))  DUT3(.a(RS),.b(RD),.s(LO),.y(O2));
Mux_2x1 #(.N(32)) DUT4(.a(MaOr),.b(AlOr),.s(LO),.y(O3));



endmodule
module LoadLogic(WR,clk,LO,RS,RD,MaOr,AlOr,O1,O2,O3);

input WR,clk,LO;
input [2:0]RS,RD;
input [31:0]MaOr,AlOr;
output O1;
output [2:0]O2;
output [31:0]O3;
reg clkn;


Mux_2x1 #(.N(1))  DUT2(.a(WR),.b(clk),.s(LO),.y(O1));
Mux_2x1 #(.N(3))  DUT3(.a(RS),.b(RD),.s(LO),.y(O2));
Mux_2x1 #(.N(32)) DUT4(.a(MaOr),.b(AlOr),.s(LO),.y(O3));



endmodule