data/full_repos/permissive/49387115/rtl/verilog/GPIA_BYTE_IN.v
1: b"%Error: data/full_repos/permissive/49387115/rtl/verilog/GPIA_BYTE_IN.v:16: Cannot find file containing module: 'GPIA_BIT_IN'\nGPIA_BIT_IN bit0(\n^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/49387115/rtl/verilog,data/full_repos/permissive/49387115/GPIA_BIT_IN\n             data/full_repos/permissive/49387115/rtl/verilog,data/full_repos/permissive/49387115/GPIA_BIT_IN.v\n             data/full_repos/permissive/49387115/rtl/verilog,data/full_repos/permissive/49387115/GPIA_BIT_IN.sv\n             GPIA_BIT_IN\n             GPIA_BIT_IN.v\n             GPIA_BIT_IN.sv\n             obj_dir/GPIA_BIT_IN\n             obj_dir/GPIA_BIT_IN.v\n             obj_dir/GPIA_BIT_IN.sv\n%Error: data/full_repos/permissive/49387115/rtl/verilog/GPIA_BYTE_IN.v:24: Cannot find file containing module: 'GPIA_BIT_IN'\nGPIA_BIT_IN bit1(\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/49387115/rtl/verilog/GPIA_BYTE_IN.v:32: Cannot find file containing module: 'GPIA_BIT_IN'\nGPIA_BIT_IN bit2(\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/49387115/rtl/verilog/GPIA_BYTE_IN.v:40: Cannot find file containing module: 'GPIA_BIT_IN'\nGPIA_BIT_IN bit3(\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/49387115/rtl/verilog/GPIA_BYTE_IN.v:48: Cannot find file containing module: 'GPIA_BIT_IN'\nGPIA_BIT_IN bit4(\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/49387115/rtl/verilog/GPIA_BYTE_IN.v:56: Cannot find file containing module: 'GPIA_BIT_IN'\nGPIA_BIT_IN bit5(\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/49387115/rtl/verilog/GPIA_BYTE_IN.v:64: Cannot find file containing module: 'GPIA_BIT_IN'\nGPIA_BIT_IN bit6(\n^~~~~~~~~~~\n%Error: data/full_repos/permissive/49387115/rtl/verilog/GPIA_BYTE_IN.v:72: Cannot find file containing module: 'GPIA_BIT_IN'\nGPIA_BIT_IN bit7(\n^~~~~~~~~~~\n%Error: Exiting due to 8 error(s)\n"
module GPIA_BYTE_IN(
	input [7:0] out_i,
	input [7:0] inp_i,
	input [7:0] ddr_i,
	input stb_i,

	output	[7:0] q_o
);


GPIA_BIT_IN bit0(
	.out_i(out_i[0]),
	.inp_i(inp_i[0]),
	.ddr_i(ddr_i[0]),
	.stb_i(stb_i),
	.q_o(q_o[0])
);

GPIA_BIT_IN bit1(
	.out_i(out_i[1]),
	.inp_i(inp_i[1]),
	.ddr_i(ddr_i[1]),
	.stb_i(stb_i),
	.q_o(q_o[1])
);

GPIA_BIT_IN bit2(
	.out_i(out_i[2]),
	.inp_i(inp_i[2]),
	.ddr_i(ddr_i[2]),
	.stb_i(stb_i),
	.q_o(q_o[2])
);

GPIA_BIT_IN bit3(
	.out_i(out_i[3]),
	.inp_i(inp_i[3]),
	.ddr_i(ddr_i[3]),
	.stb_i(stb_i),
	.q_o(q_o[3])
);

GPIA_BIT_IN bit4(
	.out_i(out_i[4]),
	.inp_i(inp_i[4]),
	.ddr_i(ddr_i[4]),
	.stb_i(stb_i),
	.q_o(q_o[4])
);

GPIA_BIT_IN bit5(
	.out_i(out_i[5]),
	.inp_i(inp_i[5]),
	.ddr_i(ddr_i[5]),
	.stb_i(stb_i),
	.q_o(q_o[5])
);

GPIA_BIT_IN bit6(
	.out_i(out_i[6]),
	.inp_i(inp_i[6]),
	.ddr_i(ddr_i[6]),
	.stb_i(stb_i),
	.q_o(q_o[6])
);

GPIA_BIT_IN bit7(
	.out_i(out_i[7]),
	.inp_i(inp_i[7]),
	.ddr_i(ddr_i[7]),
	.stb_i(stb_i),
	.q_o(q_o[7])
);


endmodule
module GPIA_BYTE_IN(
	input [7:0] out_i,
	input [7:0] inp_i,
	input [7:0] ddr_i,
	input stb_i,

	output	[7:0] q_o
);



GPIA_BIT_IN bit0(
	.out_i(out_i[0]),
	.inp_i(inp_i[0]),
	.ddr_i(ddr_i[0]),
	.stb_i(stb_i),
	.q_o(q_o[0])
);

GPIA_BIT_IN bit1(
	.out_i(out_i[1]),
	.inp_i(inp_i[1]),
	.ddr_i(ddr_i[1]),
	.stb_i(stb_i),
	.q_o(q_o[1])
);

GPIA_BIT_IN bit2(
	.out_i(out_i[2]),
	.inp_i(inp_i[2]),
	.ddr_i(ddr_i[2]),
	.stb_i(stb_i),
	.q_o(q_o[2])
);

GPIA_BIT_IN bit3(
	.out_i(out_i[3]),
	.inp_i(inp_i[3]),
	.ddr_i(ddr_i[3]),
	.stb_i(stb_i),
	.q_o(q_o[3])
);

GPIA_BIT_IN bit4(
	.out_i(out_i[4]),
	.inp_i(inp_i[4]),
	.ddr_i(ddr_i[4]),
	.stb_i(stb_i),
	.q_o(q_o[4])
);

GPIA_BIT_IN bit5(
	.out_i(out_i[5]),
	.inp_i(inp_i[5]),
	.ddr_i(ddr_i[5]),
	.stb_i(stb_i),
	.q_o(q_o[5])
);

GPIA_BIT_IN bit6(
	.out_i(out_i[6]),
	.inp_i(inp_i[6]),
	.ddr_i(ddr_i[6]),
	.stb_i(stb_i),
	.q_o(q_o[6])
);

GPIA_BIT_IN bit7(
	.out_i(out_i[7]),
	.inp_i(inp_i[7]),
	.ddr_i(ddr_i[7]),
	.stb_i(stb_i),
	.q_o(q_o[7])
);


endmodule