data/full_repos/permissive/107007139/Project/hello_playback.v
1: b"%Error: data/full_repos/permissive/107007139/Project/hello_playback.v:32: Cannot find file containing module: 'hello_data'\n    hello_data memory(index_pointer, value);\n    ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/107007139/Project,data/full_repos/permissive/107007139/hello_data\n             data/full_repos/permissive/107007139/Project,data/full_repos/permissive/107007139/hello_data.v\n             data/full_repos/permissive/107007139/Project,data/full_repos/permissive/107007139/hello_data.sv\n             hello_data\n             hello_data.v\n             hello_data.sv\n             obj_dir/hello_data\n             obj_dir/hello_data.v\n             obj_dir/hello_data.sv\n%Error: data/full_repos/permissive/107007139/Project/hello_playback.v:37: Cannot find file containing module: 'pulse_detector'\n    pulse_detector my_pulse(clk_4, pause_button, pulse_result);\n    ^~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module hello_playback(
    input clk_20k,
    input clk_4,
    input pause_button,
    output reg [11:0] out
    );

    reg [12:0] index_pointer = 0;
    wire [11:0] value;
    hello_data memory(index_pointer, value);
    

    wire pulse_result;
    reg continue_or_not = 1;
    pulse_detector my_pulse(clk_4, pause_button, pulse_result);
    always @(posedge pulse_result) begin
        continue_or_not <= ~continue_or_not;
    end
    

    always @(posedge clk_20k) begin
        index_pointer <= continue_or_not ? index_pointer + 1 : index_pointer;
        out <= continue_or_not ? value : {12{1'b0}};
    end
endmodule
module hello_playback(
    input clk_20k,
    input clk_4,
    input pause_button,
    output reg [11:0] out
    );


    reg [12:0] index_pointer = 0;
    wire [11:0] value;
    hello_data memory(index_pointer, value);
    

    wire pulse_result;
    reg continue_or_not = 1;
    pulse_detector my_pulse(clk_4, pause_button, pulse_result);
    always @(posedge pulse_result) begin
        continue_or_not <= ~continue_or_not;
    end
    

    always @(posedge clk_20k) begin
        index_pointer <= continue_or_not ? index_pointer + 1 : index_pointer;
        out <= continue_or_not ? value : {12{1'b0}};
    end
endmodule