data/full_repos/permissive/100918256/bit_timing.v
 line:29: before: "if"
1: b'%Error: data/full_repos/permissive/100918256/bit_timing.v:29: syntax error, unexpected posedge, expecting TYPE-IDENTIFIER\n if(posedge reset\n    ^~~~~~~\n%Error: Cannot continue\n'
module bit_timing(
    input rx,
    input rst,
    input clk,
	output sampled_rx,
    output baud_clk
    );

	if(posedge reset





endmodule
module bit_timing(
    input rx,
    input rst,
    input clk,
	output sampled_rx,
    output baud_clk
    );


	if(posedge reset





endmodule