data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v
1: b'%Warning-WIDTH: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:109: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS\'s CONST \'8\'hf\' generates 8 bits.\n                                                                                            : ... In instance digitalClock.seg\n        an = 8\'b1111;\n           ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:110: Bit extraction of var[7:0] requires 3 bit index, not 2 bits.\n                                                                                            : ... In instance digitalClock.seg\n        an[clkcount] = aen[clkcount];\n                          ^\n%Warning-WIDTHCONCAT: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:30: Unsized numbers/parameters not allowed in concatenations.\n                                                                                                 : ... In instance digitalClock\n    wire [3:0] H1_load={\'b0,SW[13:11]};\n                        ^~~\n%Warning-WIDTHCONCAT: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:30: Unsized numbers/parameters not allowed in replications.\n                                                                                                 : ... In instance digitalClock\n    wire [3:0] H1_load={\'b0,SW[13:11]};\n                           ^\n%Warning-WIDTHCONCAT: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:32: Unsized numbers/parameters not allowed in concatenations.\n                                                                                                 : ... In instance digitalClock\n    wire [3:0] M1_load={\'b0,SW[6:4]};\n                        ^~~\n%Warning-WIDTHCONCAT: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:32: Unsized numbers/parameters not allowed in replications.\n                                                                                                 : ... In instance digitalClock\n    wire [3:0] M1_load={\'b0,SW[6:4]};\n                           ^\n%Error: Exiting due to 6 warning(s)\n'
module seven_segment(
    input [3:0] data,
    output reg [6:0] a2g
    );
    
    always @(*)
    case(data)
        'h0: a2g = 7'b1000000; 
        'h1: a2g = 7'b1111001; 
        'h2: a2g = 7'b0100100; 
        'h3: a2g = 7'b0110000; 
        'h4: a2g = 7'b0011001; 
        'h5: a2g = 7'b0010010; 
        'h6: a2g = 7'b0000010; 
        'h7: a2g = 7'b1111000; 
        'h8: a2g = 7'b0000000; 
        'h9: a2g = 7'b0011000; 
        default: a2g = 7'b1000000;
    endcase
endmodule
module seven_segment(
    input [3:0] data,
    output reg [6:0] a2g
    );

    
    always @(*)
    case(data)
        'h0: a2g = 7'b1000000; 
        'h1: a2g = 7'b1111001; 
        'h2: a2g = 7'b0100100; 
        'h3: a2g = 7'b0110000; 
        'h4: a2g = 7'b0011001; 
        'h5: a2g = 7'b0010010; 
        'h6: a2g = 7'b0000010; 
        'h7: a2g = 7'b1111000; 
        'h8: a2g = 7'b0000000; 
        'h9: a2g = 7'b0011000; 
        default: a2g = 7'b1000000;
    endcase
endmodule