data/full_repos/permissive/154123726/3rdParty/luffa/Luffa_Chaining.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/154123726/3rdParty/luffa/Luffa_Chaining.v:113: Multiple top level modules\n                                                                                           : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                           : ... Top module \'MESSAGE_INJECTION\'\nmodule MESSAGE_INJECTION(\n       ^~~~~~~~~~~~~~~~~\n                                                                                           : ... Top module \'PERMUTATION_Q\'\nmodule PERMUTATION_Q(\n       ^~~~~~~~~~~~~\n                                                                                           : ... Top module \'GEN_CONST\'\nmodule GEN_CONST(\n       ^~~~~~~~~\n%Error: Exiting due to 1 warning(s)\n'
module PERMUTATION_Q(
	mi_0, mi_1, mi_2, mi_3, mi_4, mi_5, mi_6, mi_7,
	const_0, const_4,
	h_0, h_1, h_2, h_3, h_4, h_5, h_6, h_7
);

input  [31:0] mi_0, mi_1, mi_2, mi_3, mi_4, mi_5, mi_6, mi_7;
input  [31:0] const_0, const_4;
output [31:0] h_0, h_1, h_2, h_3, h_4, h_5, h_6, h_7;

wire [31:0] sub_0, sub_1, sub_2, sub_3, sub_4, sub_5, sub_6, sub_7;
wire [31:0] mix_0, mix_1, mix_2, mix_3, mix_4, mix_5, mix_6, mix_7;


module SUB_CRUMB(
	in0, in1, in2, in3,
	out0, out1, out2, out3
);

input  [31:0] in0, in1, in2, in3;
output [31:0] out0, out1, out2, out3;

wire [31:0] r4_0, r0_0, r2_0, r1_0, r0_1, r3_0, r1_1, r3_1, r2_1, r0_2, r2_2, r1_2;

assign r4_0 = in0;
assign r0_0 = in0 | in1;
assign r2_0 = in2 ^ in3;
assign r1_0 = ~in1;
assign r0_1 = r0_0 ^ in3;
assign r3_0 = in3 & r4_0;
assign r1_1 = r1_0 ^ r3_0;
assign r3_1 = r3_0 ^ r2_0;
assign r2_1 = r2_0 & r0_1;
assign r0_2 = ~r0_1;
assign r2_2 = r2_1 ^ r1_1;
assign r1_2 = r1_1 | r3_1;
assign out0 = r4_0 ^ r1_2;
assign out3 = r3_1 ^ r2_2;
assign out2 = r2_2 & r1_2;
assign out1 = r1_2 ^ r0_2;

endmodule
module PERMUTATION_Q(
	mi_0, mi_1, mi_2, mi_3, mi_4, mi_5, mi_6, mi_7,
	const_0, const_4,
	h_0, h_1, h_2, h_3, h_4, h_5, h_6, h_7
);


input  [31:0] mi_0, mi_1, mi_2, mi_3, mi_4, mi_5, mi_6, mi_7;
input  [31:0] const_0, const_4;
output [31:0] h_0, h_1, h_2, h_3, h_4, h_5, h_6, h_7;

wire [31:0] sub_0, sub_1, sub_2, sub_3, sub_4, sub_5, sub_6, sub_7;
wire [31:0] mix_0, mix_1, mix_2, mix_3, mix_4, mix_5, mix_6, mix_7;


module SUB_CRUMB(
	in0, in1, in2, in3,
	out0, out1, out2, out3
);

input  [31:0] in0, in1, in2, in3;
output [31:0] out0, out1, out2, out3;

wire [31:0] r4_0, r0_0, r2_0, r1_0, r0_1, r3_0, r1_1, r3_1, r2_1, r0_2, r2_2, r1_2;

assign r4_0 = in0;
assign r0_0 = in0 | in1;
assign r2_0 = in2 ^ in3;
assign r1_0 = ~in1;
assign r0_1 = r0_0 ^ in3;
assign r3_0 = in3 & r4_0;
assign r1_1 = r1_0 ^ r3_0;
assign r3_1 = r3_0 ^ r2_0;
assign r2_1 = r2_0 & r0_1;
assign r0_2 = ~r0_1;
assign r2_2 = r2_1 ^ r1_1;
assign r1_2 = r1_1 | r3_1;
assign out0 = r4_0 ^ r1_2;
assign out3 = r3_1 ^ r2_2;
assign out2 = r2_2 & r1_2;
assign out1 = r1_2 ^ r0_2;

endmodule