data/full_repos/permissive/137213315/AddRoundKey.v
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data/verilator_xmls/a0bf8a04-eb8a-4ecc-82e4-e54927e3b777.xml
module AddRoundKey #(parameter NB = 8'd128) (input [NB-1:0] in, input [NB-1:0] key, output [NB-1:0] out);
    assign out = in ^ key;
endmodule
module AddRoundKey #(parameter NB = 8'd128) (input [NB-1:0] in, input [NB-1:0] key, output [NB-1:0] out);

    assign out = in ^ key;
endmodule