data/full_repos/permissive/115837888/source-7400/74150-tb.v
 line:5: before: "tbassert"
1: b'%Error: data/full_repos/permissive/115837888/source-7400/74150-tb.v:5: Define or directive not defined: \'`TBASSERT_METHOD\'\n`TBASSERT_METHOD(tbassert)\n^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/115837888/source-7400/74150-tb.v:5: syntax error, unexpected \'(\'\n`TBASSERT_METHOD(tbassert)\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/115837888/source-7400/74150-tb.v:30: Unsupported or unknown PLI call: $dumpfile\n  $dumpfile("74150-tb.vcd");\n  ^~~~~~~~~\n%Error: data/full_repos/permissive/115837888/source-7400/74150-tb.v:31: Unsupported or unknown PLI call: $dumpvars\n  $dumpvars;\n  ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:37: Unsupported: Ignoring delay on this delayed statement.\n#6\n^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:39: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:42: Unsupported: Ignoring delay on this delayed statement.\n#6\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:44: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:47: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:49: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:52: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:54: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:57: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:59: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:62: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:64: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:67: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:69: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:72: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:74: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:77: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:79: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:82: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:85: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:87: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:90: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:92: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:95: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:97: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:100: Unsupported: Ignoring delay on this delayed statement.\n#6\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:102: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:105: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:107: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:111: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:113: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:116: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:118: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:121: Unsupported: Ignoring delay on this delayed statement.\n#6\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:123: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:126: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:129: Unsupported: Ignoring delay on this delayed statement.\n#6\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:131: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:134: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:136: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:139: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:142: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:144: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:149: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:151: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:156: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:158: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:167: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:169: Unsupported: Ignoring delay on this delayed statement.\n#0\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:174: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Warning-STMTDLY: data/full_repos/permissive/115837888/source-7400/74150-tb.v:176: Unsupported: Ignoring delay on this delayed statement.\n#10\n^\n%Error: Exiting due to 4 error(s), 51 warning(s)\n'
module test;

`TBASSERT_METHOD(tbassert)

localparam WIDTH_IN = 5;
localparam WIDTH_SELECT = $clog2(WIDTH_IN);



reg Enable_bar;
reg [WIDTH_SELECT-1:0] Select;

reg [WIDTH_IN-1:0] D;


wire Y_bar;


ttl_74150 #(.WIDTH_IN(WIDTH_IN), .DELAY_RISE(5), .DELAY_FALL(3)) dut(
  .Enable_bar(Enable_bar),
  .Select(Select),
  .D(D),
  .Y_bar(Y_bar)
);

initial
begin
  $dumpfile("74150-tb.vcd");
  $dumpvars;


  Enable_bar = 1'b0;
  Select = 3'b000;
  D = 5'b01011;
#6
  tbassert(Y_bar == 1'b0, "Test 1");
#0

  Enable_bar = 1'b1;
#6
  tbassert(Y_bar == 1'b1, "Test 2");
#0

  Select = 3'b011;
#10
  tbassert(Y_bar == 1'b1, "Test 3");
#0

  Enable_bar = 1'b0;
#10
  tbassert(Y_bar == 1'b0, "Test 4");
#0

  Select = 3'b100;
#10
  tbassert(Y_bar == 1'b1, "Test 5");
#0

  Enable_bar = 1'b1;
#10
  tbassert(Y_bar == 1'b1, "Test 6");
#0

  Select = 3'b001;
#10
  tbassert(Y_bar == 1'b1, "Test 7");
#0

  Enable_bar = 1'b0;
#10
  tbassert(Y_bar == 1'b0, "Test 8");
#0

  Select = 3'b000;
#10
  tbassert(Y_bar == 1'b0, "Test 9");
#0

  Select = 3'b001;
#10
  tbassert(Y_bar == 1'b0, "Test 10");
  Select = 3'b100;
#10
  tbassert(Y_bar == 1'b1, "Test 10");
#0

  D = 5'b11110;
#10
  tbassert(Y_bar == 1'b0, "Test 11");
#0

  Select = 3'b000;
#10
  tbassert(Y_bar == 1'b1, "Test 12");
#0

  Enable_bar = 1'b1;
#6
  tbassert(Y_bar == 1'b1, "Test 13");
#0

  Select = 3'b010;
#10
  tbassert(Y_bar == 1'b1, "Test 14");
#0

  Enable_bar = 1'b0;
  D = 5'b00000;
#10
  tbassert(Y_bar == 1'b1, "Test 15");
#0

  Select = 3'b100;
#10
  tbassert(Y_bar == 1'b1, "Test 16");
#0

  D = 5'b11111;
#6
  tbassert(Y_bar == 1'b0, "Test 17");
#0

  D = 5'b00010;
#10
  tbassert(Y_bar == 1'b1, "Test 18");
  Select = 3'b001;
#6
  tbassert(Y_bar == 1'b0, "Test 18");
#0

  Enable_bar = 1'b1;
#10
  tbassert(Y_bar == 1'b1, "Test 19");
#0

  Enable_bar = 1'b0;
#10
  tbassert(Y_bar == 1'b0, "Test 20");
  D = 5'b11110;
#10
  tbassert(Y_bar == 1'b0, "Test 20");
#0


  Select = 3'b010;
  D = 5'b10101;
#10
  tbassert(Y_bar == 1'b0, "Test 21");
#0


  Select = 3'b011;
  D = 5'b01010;
#10
  tbassert(Y_bar == 1'b0, "Test 22");
#0





  Enable_bar = 1'b0;
  Select = 3'b101;
  D = 5'b11111;
#10
  tbassert(Y_bar === 1'bx, "Test 23");
#0

  Enable_bar = 1'b0;
  Select = 3'b111;
  D = 5'b00000;
#10
  tbassert(Y_bar === 1'bx, "Test 24");
#10
  $finish;
end

endmodule
module test;


`TBASSERT_METHOD(tbassert)

localparam WIDTH_IN = 5;
localparam WIDTH_SELECT = $clog2(WIDTH_IN);



reg Enable_bar;
reg [WIDTH_SELECT-1:0] Select;

reg [WIDTH_IN-1:0] D;


wire Y_bar;


ttl_74150 #(.WIDTH_IN(WIDTH_IN), .DELAY_RISE(5), .DELAY_FALL(3)) dut(
  .Enable_bar(Enable_bar),
  .Select(Select),
  .D(D),
  .Y_bar(Y_bar)
);

initial
begin
  $dumpfile("74150-tb.vcd");
  $dumpvars;


  Enable_bar = 1'b0;
  Select = 3'b000;
  D = 5'b01011;
#6
  tbassert(Y_bar == 1'b0, "Test 1");
#0

  Enable_bar = 1'b1;
#6
  tbassert(Y_bar == 1'b1, "Test 2");
#0

  Select = 3'b011;
#10
  tbassert(Y_bar == 1'b1, "Test 3");
#0

  Enable_bar = 1'b0;
#10
  tbassert(Y_bar == 1'b0, "Test 4");
#0

  Select = 3'b100;
#10
  tbassert(Y_bar == 1'b1, "Test 5");
#0

  Enable_bar = 1'b1;
#10
  tbassert(Y_bar == 1'b1, "Test 6");
#0

  Select = 3'b001;
#10
  tbassert(Y_bar == 1'b1, "Test 7");
#0

  Enable_bar = 1'b0;
#10
  tbassert(Y_bar == 1'b0, "Test 8");
#0

  Select = 3'b000;
#10
  tbassert(Y_bar == 1'b0, "Test 9");
#0

  Select = 3'b001;
#10
  tbassert(Y_bar == 1'b0, "Test 10");
  Select = 3'b100;
#10
  tbassert(Y_bar == 1'b1, "Test 10");
#0

  D = 5'b11110;
#10
  tbassert(Y_bar == 1'b0, "Test 11");
#0

  Select = 3'b000;
#10
  tbassert(Y_bar == 1'b1, "Test 12");
#0

  Enable_bar = 1'b1;
#6
  tbassert(Y_bar == 1'b1, "Test 13");
#0

  Select = 3'b010;
#10
  tbassert(Y_bar == 1'b1, "Test 14");
#0

  Enable_bar = 1'b0;
  D = 5'b00000;
#10
  tbassert(Y_bar == 1'b1, "Test 15");
#0

  Select = 3'b100;
#10
  tbassert(Y_bar == 1'b1, "Test 16");
#0

  D = 5'b11111;
#6
  tbassert(Y_bar == 1'b0, "Test 17");
#0

  D = 5'b00010;
#10
  tbassert(Y_bar == 1'b1, "Test 18");
  Select = 3'b001;
#6
  tbassert(Y_bar == 1'b0, "Test 18");
#0

  Enable_bar = 1'b1;
#10
  tbassert(Y_bar == 1'b1, "Test 19");
#0

  Enable_bar = 1'b0;
#10
  tbassert(Y_bar == 1'b0, "Test 20");
  D = 5'b11110;
#10
  tbassert(Y_bar == 1'b0, "Test 20");
#0


  Select = 3'b010;
  D = 5'b10101;
#10
  tbassert(Y_bar == 1'b0, "Test 21");
#0


  Select = 3'b011;
  D = 5'b01010;
#10
  tbassert(Y_bar == 1'b0, "Test 22");
#0





  Enable_bar = 1'b0;
  Select = 3'b101;
  D = 5'b11111;
#10
  tbassert(Y_bar === 1'bx, "Test 23");
#0

  Enable_bar = 1'b0;
  Select = 3'b111;
  D = 5'b00000;
#10
  tbassert(Y_bar === 1'bx, "Test 24");
#10
  $finish;
end

endmodule