data/full_repos/permissive/206437232/TP3-BIP1-2019/Verilog/top_bip1.v
1: b"%Error: data/full_repos/permissive/206437232/TP3-BIP1-2019/Verilog/top_bip1.v:60: Cannot find file containing module: 'CPU'\n        CPU #(\n        ^~~\n        ... Looked in:\n             data/full_repos/permissive/206437232/TP3-BIP1-2019/Verilog,data/full_repos/permissive/206437232/CPU\n             data/full_repos/permissive/206437232/TP3-BIP1-2019/Verilog,data/full_repos/permissive/206437232/CPU.v\n             data/full_repos/permissive/206437232/TP3-BIP1-2019/Verilog,data/full_repos/permissive/206437232/CPU.sv\n             CPU\n             CPU.v\n             CPU.sv\n             obj_dir/CPU\n             obj_dir/CPU.v\n             obj_dir/CPU.sv\n%Error: data/full_repos/permissive/206437232/TP3-BIP1-2019/Verilog/top_bip1.v:84: Cannot find file containing module: 'program_mem'\n        program_mem #(\n        ^~~~~~~~~~~\n%Error: data/full_repos/permissive/206437232/TP3-BIP1-2019/Verilog/top_bip1.v:98: Cannot find file containing module: 'data_mem'\n        data_mem #(\n        ^~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module top_bip1
    #(parameter
                NB_INSTRUC      = 16,
                NB_OPCODE       = 5,
                NB_OPERAND      = 11,
                NB_ADDR         = 11,
                NB_DATA         = 16,
                

                RAM_WIDTH_PROGRAM       = 16,
                RAM_DEPTH_PROGRAM       = 2048,
                RAM_PERFORMANCE_PROGRAM = "LOW_LATENCY",
                INIT_FILE_PROGRAM       = "/home/martin/git/Arquitectura_de_Computadoras_2019/TP3-BIP1-2019/Test/init_ram_program.mem",
                

                RAM_WIDTH_DATA          = 16,
                RAM_DEPTH_DATA          = 1024, 
                RAM_PERFORMANCE_DATA    = "LOW_LATENCY",
                INIT_FILE_DATA          = "/home/martin/git/Arquitectura_de_Computadoras_2019/TP3-BIP1-2019/Test/init_ram_data.mem" 
                                







      )
      (

        input   i_clk,
        input   i_rst,



        output wire [NB_DATA - 1 : 0] o_led
      );
        

        wire    [NB_ADDR-1:0]       addr_program_mem;
        wire    [NB_INSTRUC-1:0]    instruc;
        wire                        RdRam;
        wire                        WrRam;
        wire    [NB_ADDR-1:0]       addr_data_mem;
        wire    [NB_DATA-1:0]       in_data_memory;
        wire    [NB_DATA-1:0]       out_data_memory;






        
        assign o_led [8 - 1 : 0] = in_data_memory [8-1:0];
        assign o_led [NB_DATA - 1 : 8] = addr_program_mem [8-1:0];
        

        CPU #(
            .NB_INSTRUC (NB_INSTRUC),
            .NB_OPCODE  (NB_OPCODE),
            .NB_OPERAND (NB_OPERAND),
            .NB_ADDR    (NB_ADDR),
            .NB_DATA    (NB_DATA)     
        )
        u_CPU
        (

            .i_clk              (i_clk),
            .i_rst              (i_rst),
            .i_instruc          (instruc),
            .i_data_memory      (out_data_memory),


            .o_addr_program_mem (addr_program_mem),
            .o_addr_data_mem    (addr_data_mem),
            .o_data_memory      (in_data_memory),
            .o_WrRam            (WrRam),
            .o_RdRam            (RdRam)
        );
        

        program_mem #(
            .RAM_WIDTH          (RAM_WIDTH_PROGRAM),
            .RAM_DEPTH          (RAM_DEPTH_PROGRAM),
            .RAM_PERFORMANCE    (RAM_PERFORMANCE_PROGRAM),
            .INIT_FILE          (INIT_FILE_PROGRAM)
        )
        u_program_mem
        (
            .i_addr     (addr_program_mem),
            .i_clk      (i_clk),
            .o_data     (instruc)
        );
        

        data_mem #(
            .RAM_WIDTH          (RAM_WIDTH_DATA),
            .RAM_DEPTH          (RAM_DEPTH_DATA),
            .RAM_PERFORMANCE    (RAM_PERFORMANCE_DATA),
            .INIT_FILE          (INIT_FILE_DATA)
        )
        u_data_mem
        (
            .i_addr     (addr_data_mem),
            .i_data     (in_data_memory),
            .i_clk      (i_clk),
            .wea        (WrRam),
            .o_data     (out_data_memory)
        );
        















        

    
endmodule
module top_bip1
    #(parameter
                NB_INSTRUC      = 16,
                NB_OPCODE       = 5,
                NB_OPERAND      = 11,
                NB_ADDR         = 11,
                NB_DATA         = 16,
                

                RAM_WIDTH_PROGRAM       = 16,
                RAM_DEPTH_PROGRAM       = 2048,
                RAM_PERFORMANCE_PROGRAM = "LOW_LATENCY",
                INIT_FILE_PROGRAM       = "/home/martin/git/Arquitectura_de_Computadoras_2019/TP3-BIP1-2019/Test/init_ram_program.mem",
                

                RAM_WIDTH_DATA          = 16,
                RAM_DEPTH_DATA          = 1024, 
                RAM_PERFORMANCE_DATA    = "LOW_LATENCY",
                INIT_FILE_DATA          = "/home/martin/git/Arquitectura_de_Computadoras_2019/TP3-BIP1-2019/Test/init_ram_data.mem" 
                                







      )
      (

        input   i_clk,
        input   i_rst,



        output wire [NB_DATA - 1 : 0] o_led
      );

        

        wire    [NB_ADDR-1:0]       addr_program_mem;
        wire    [NB_INSTRUC-1:0]    instruc;
        wire                        RdRam;
        wire                        WrRam;
        wire    [NB_ADDR-1:0]       addr_data_mem;
        wire    [NB_DATA-1:0]       in_data_memory;
        wire    [NB_DATA-1:0]       out_data_memory;






        
        assign o_led [8 - 1 : 0] = in_data_memory [8-1:0];
        assign o_led [NB_DATA - 1 : 8] = addr_program_mem [8-1:0];
        

        CPU #(
            .NB_INSTRUC (NB_INSTRUC),
            .NB_OPCODE  (NB_OPCODE),
            .NB_OPERAND (NB_OPERAND),
            .NB_ADDR    (NB_ADDR),
            .NB_DATA    (NB_DATA)     
        )
        u_CPU
        (

            .i_clk              (i_clk),
            .i_rst              (i_rst),
            .i_instruc          (instruc),
            .i_data_memory      (out_data_memory),


            .o_addr_program_mem (addr_program_mem),
            .o_addr_data_mem    (addr_data_mem),
            .o_data_memory      (in_data_memory),
            .o_WrRam            (WrRam),
            .o_RdRam            (RdRam)
        );
        

        program_mem #(
            .RAM_WIDTH          (RAM_WIDTH_PROGRAM),
            .RAM_DEPTH          (RAM_DEPTH_PROGRAM),
            .RAM_PERFORMANCE    (RAM_PERFORMANCE_PROGRAM),
            .INIT_FILE          (INIT_FILE_PROGRAM)
        )
        u_program_mem
        (
            .i_addr     (addr_program_mem),
            .i_clk      (i_clk),
            .o_data     (instruc)
        );
        

        data_mem #(
            .RAM_WIDTH          (RAM_WIDTH_DATA),
            .RAM_DEPTH          (RAM_DEPTH_DATA),
            .RAM_PERFORMANCE    (RAM_PERFORMANCE_DATA),
            .INIT_FILE          (INIT_FILE_DATA)
        )
        u_data_mem
        (
            .i_addr     (addr_data_mem),
            .i_data     (in_data_memory),
            .i_clk      (i_clk),
            .wea        (WrRam),
            .o_data     (out_data_memory)
        );
        















        

    
endmodule