data/full_repos/permissive/169522605/hw3_2/nor3.v
data/verilator_xmls/74a63692-1fab-4812-b17f-df42e0dd15c7.xml
module nor3 (in1,in2,in3,out);
    input  in1,in2,in3;
    output out;
    assign out = ~(in1 | in2 | in3);
endmodule
module nor3 (in1,in2,in3,out);

    input  in1,in2,in3;
    output out;
    assign out = ~(in1 | in2 | in3);
endmodule