data/full_repos/permissive/159902111/SCPU_experiment/Add_PC.v
data/verilator_xmls/adf76d28-bcca-405b-a985-5ccdc17e7203.xml
module Add_PC(
  input [31:0]  PC,
  output [31:0] new_PC_o
  );

  assign new_PC_o = PC + 4;	
endmodule
module Add_PC(
  input [31:0]  PC,
  output [31:0] new_PC_o
  );


  assign new_PC_o = PC + 4;	
endmodule