data/full_repos/permissive/102955443/rotorEncode.v
1: b'%Warning-WIDTH: data/full_repos/permissive/102955443/rotorEncode.v:11: Operator NEQ expects 80 bits on the RHS, but RHS\'s CONST \'?1?h0\' generates 1 bits.\n                                                                     : ... In instance rotorEncode\n  if (MEM_INIT_FILE != "")\n                    ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/102955443/rotorEncode.v:15: Operator ADD expects 32 or 8 bits on the RHS, but RHS\'s VARREF \'code\' generates 5 bits.\n                                                                     : ... In instance rotorEncode\n  val = rotor_data[((REVERSE) ? 208 : 0) + rotor_type*26 + code];\n                                                         ^\n%Error: Exiting due to 2 warning(s)\n'
module rotorEncode #(parameter REVERSE = 0) (code, rotor_type, val);
	input [4:0] code; 
	output reg [4:0] val;
	input [2:0] rotor_type;
	
    parameter MEM_INIT_FILE = "rotors.mem";

    reg [4:0] rotor_data[0:415];

    initial
		if (MEM_INIT_FILE != "")
			$readmemh(MEM_INIT_FILE, rotor_data);
   
	always @*
		val = rotor_data[((REVERSE) ? 208 : 0) + rotor_type*26 + code];
endmodule
module rotorEncode #(parameter REVERSE = 0) (code, rotor_type, val);

	input [4:0] code; 
	output reg [4:0] val;
	input [2:0] rotor_type;
	
    parameter MEM_INIT_FILE = "rotors.mem";

    reg [4:0] rotor_data[0:415];

    initial
		if (MEM_INIT_FILE != "")
			$readmemh(MEM_INIT_FILE, rotor_data);
   
	always @*
		val = rotor_data[((REVERSE) ? 208 : 0) + rotor_type*26 + code];
endmodule