data/full_repos/permissive/138713719/hdl/font_rom.v
data/verilator_xmls/f649a3be-fe43-44ef-b9d5-67c8406f231a.xml
module font_rom
    (
    input wire clk,
    input wire en,

    input wire [11:0] addr,
    output reg [7:0] data
    );
    
    reg [7:0] rom [0:4095];
    
    initial $readmemb("cp437.list", rom);
    
    always @(posedge clk)
        if(en)
            data = rom[addr];
    
endmodule
module font_rom
    (
    input wire clk,
    input wire en,

    input wire [11:0] addr,
    output reg [7:0] data
    );

    
    reg [7:0] rom [0:4095];
    
    initial $readmemb("cp437.list", rom);
    
    always @(posedge clk)
        if(en)
            data = rom[addr];
    
endmodule