data/full_repos/permissive/149070951/examples/user-test/echo.v
1: b'%Error: data/full_repos/permissive/149070951/examples/user-test/echo.v:8: Cannot find include file: baudgen.vh\n`include "baudgen.vh" \n         ^~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/149070951/examples/user-test,data/full_repos/permissive/149070951/baudgen.vh\n             data/full_repos/permissive/149070951/examples/user-test,data/full_repos/permissive/149070951/baudgen.vh.v\n             data/full_repos/permissive/149070951/examples/user-test,data/full_repos/permissive/149070951/baudgen.vh.sv\n             baudgen.vh\n             baudgen.vh.v\n             baudgen.vh.sv\n             obj_dir/baudgen.vh\n             obj_dir/baudgen.vh.v\n             obj_dir/baudgen.vh.sv\n%Error: data/full_repos/permissive/149070951/examples/user-test/echo.v:12: Define or directive not defined: \'`B115200\'\n         parameter BAUDRATE = `B115200\n                              ^~~~~~~~\n%Error: data/full_repos/permissive/149070951/examples/user-test/echo.v:13: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n)(\n^\n%Error: data/full_repos/permissive/149070951/examples/user-test/echo.v:15: syntax error, unexpected input, expecting IDENTIFIER or do or final\n         input wire rx,           \n         ^~~~~\n%Error: data/full_repos/permissive/149070951/examples/user-test/echo.v:16: syntax error, unexpected output, expecting IDENTIFIER or do or final\n         output wire tx,           \n         ^~~~~~\n%Error: data/full_repos/permissive/149070951/examples/user-test/echo.v:17: syntax error, unexpected output, expecting IDENTIFIER or do or final\n         output wire [7:0] ledb\n         ^~~~~~\n%Error: data/full_repos/permissive/149070951/examples/user-test/echo.v:18: syntax error, unexpected \')\', expecting \',\' or \';\'\n);\n^\n%Error: data/full_repos/permissive/149070951/examples/user-test/echo.v:29: syntax error, unexpected assign\nassign tx = rx;\n^~~~~~\n%Error: Exiting due to 8 error(s)\n'
module echo #(
         parameter BAUDRATE = `B115200
)(
         input wire clk,
         input wire rx,
         output wire tx,
         output wire [7:0] ledb
);


wire rcv;


wire [7:0] data;


wire ready;

assign tx = rx;

assign ledb = data;


uart_rx #(.BAUDRATE(BAUDRATE))
  RX0 (.clk(clk),
       .rx(rx),
       .rcv(rcv),
       .data(data)
      );

endmodule
module echo #(
         parameter BAUDRATE = `B115200
)(
         input wire clk,
         input wire rx,
         output wire tx,
         output wire [7:0] ledb
);



wire rcv;


wire [7:0] data;


wire ready;

assign tx = rx;

assign ledb = data;


uart_rx #(.BAUDRATE(BAUDRATE))
  RX0 (.clk(clk),
       .rx(rx),
       .rcv(rcv),
       .data(data)
      );

endmodule