data/full_repos/permissive/14349674/animation/svAnimation.sv
 line:211: before: "."
1: b'%Warning-WIDTH: data/full_repos/permissive/14349674/animation/svAnimation.sv:378: Operator EQ expects 32 or 8 bits on the LHS, but LHS\'s VARREF \'Q_y\' generates 7 bits.\n                                                                                : ... In instance animation.FSM\n       if(Q_y == (SIZEOF_Y - 1))\n              ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/14349674/animation/svAnimation.sv:374: Operator LT expects 32 or 9 bits on the LHS, but LHS\'s VARREF \'Q_x\' generates 8 bits.\n                                                                                : ... In instance animation.FSM\n       if(Q_x < (SIZEOF_X-1))\n              ^\n%Warning-WIDTH: data/full_repos/permissive/14349674/animation/svAnimation.sv:439: Operator ADD expects 32 or 15 bits on the RHS, but RHS\'s VARREF \'Q_x\' generates 8 bits.\n                                                                                : ... In instance animation.FSM\n  address = ((SIZEOF_X*Q_y) + Q_x) + 1;  \n                            ^\n%Warning-WIDTH: data/full_repos/permissive/14349674/animation/svAnimation.sv:279: Operator ASSIGN expects 3 bits on the Assign RHS, but Assign RHS\'s CONST \'1\'h0\' generates 1 bits.\n                                                                                : ... In instance animation.colorMux\n output reg [2:0] drawColor = 1\'b0;\n                              ^~~~\n%Warning-WIDTH: data/full_repos/permissive/14349674/animation/svAnimation.sv:106: Input port connection \'SIZEOF_X\' expects 9 bits on the pin connection, but pin connection\'s VARREF \'sizeX\' generates 8 bits.\n                                                                                : ... In instance animation\n   .SIZEOF_X(sizeX),\n    ^~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/14349674/animation/svAnimation.sv:107: Input port connection \'SIZEOF_Y\' expects 8 bits on the pin connection, but pin connection\'s VARREF \'sizeY\' generates 7 bits.\n                                                                                : ... In instance animation\n   .SIZEOF_Y(sizeY),\n    ^~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/14349674/animation/svAnimation.sv:113: Output port connection \'Q_y\' expects 7 bits on the pin connection, but pin connection\'s VARREF \'Q_Y\' generates 8 bits.\n                                                                                : ... In instance animation\n   .Q_y(Q_Y),\n    ^~~\n%Error: data/full_repos/permissive/14349674/animation/svAnimation.sv:117: Cannot find file containing module: \'gameLogic\'\n gameLogic dxBall\n ^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/14349674/animation,data/full_repos/permissive/14349674/gameLogic\n             data/full_repos/permissive/14349674/animation,data/full_repos/permissive/14349674/gameLogic.v\n             data/full_repos/permissive/14349674/animation,data/full_repos/permissive/14349674/gameLogic.sv\n             gameLogic\n             gameLogic.v\n             gameLogic.sv\n             obj_dir/gameLogic\n             obj_dir/gameLogic.v\n             obj_dir/gameLogic.sv\n%Error: data/full_repos/permissive/14349674/animation/svAnimation.sv:149: Cannot find file containing module: \'newRom\'\n newRom myRom(\n ^~~~~~\n%Error: data/full_repos/permissive/14349674/animation/svAnimation.sv:155: Cannot find file containing module: \'newRom2\'\n newRom2 blankRom(\n ^~~~~~~\n%Error: data/full_repos/permissive/14349674/animation/svAnimation.sv:160: Cannot find file containing module: \'newRom3\'\n newRom3 paddleRom(\n ^~~~~~~\n%Error: data/full_repos/permissive/14349674/animation/svAnimation.sv:165: Cannot find file containing module: \'newRom4\'\n newRom4 blockRom(\n ^~~~~~~\n%Error: data/full_repos/permissive/14349674/animation/svAnimation.sv:170: Cannot find file containing module: \'newRom5\'\n newRom5 gameStartRom(\n ^~~~~~~\n%Error: data/full_repos/permissive/14349674/animation/svAnimation.sv:175: Cannot find file containing module: \'newRom6\'\n newRom6 gameResetRom(\n ^~~~~~~\n%Error: data/full_repos/permissive/14349674/animation/svAnimation.sv:181: Cannot find file containing module: \'hex_7seg\'\n hex_7seg score1(\n ^~~~~~~~\n%Error: data/full_repos/permissive/14349674/animation/svAnimation.sv:185: Cannot find file containing module: \'hex_7seg\'\n hex_7seg score2(\n ^~~~~~~~\n%Error: data/full_repos/permissive/14349674/animation/svAnimation.sv:195: Cannot find file containing module: \'vga_adapter\'\n vga_adapter VGA(\n ^~~~~~~~~~~\n%Error: Exiting due to 10 error(s), 7 warning(s)\n'
module input_mode
	(
		switch,
		GPIO,
		KEY,
		keyLeft,
		keyRight,
		keyStart,
		usrStart,
		left,
		right,
		start
	);
	
	input [1:0] switch;
	input keyLeft, keyRight, keyStart;
	input usrStart;
	input [2:0] GPIO, KEY;
	output reg left = 1'b0, 
		right = 1'b0, 
		start = 1'b0;
	
	always@(*)
	begin
		case(switch)
			2'b00:	begin
						right = GPIO[0];
						left = GPIO[1];
						start = GPIO[2];
						end
			2'b01:	begin
						start = usrStart;
						right = ~KEY[1];
						left = ~KEY[2];
						end
			2'b10:	begin
						start = usrStart;
						right = keyRight;
						left = keyLeft;
						end
		endcase
	end
	
endmodule
module input_mode
	(
		switch,
		GPIO,
		KEY,
		keyLeft,
		keyRight,
		keyStart,
		usrStart,
		left,
		right,
		start
	);

	
	input [1:0] switch;
	input keyLeft, keyRight, keyStart;
	input usrStart;
	input [2:0] GPIO, KEY;
	output reg left = 1'b0, 
		right = 1'b0, 
		start = 1'b0;
	
	always@(*)
	begin
		case(switch)
			2'b00:	begin
						right = GPIO[0];
						left = GPIO[1];
						start = GPIO[2];
						end
			2'b01:	begin
						start = usrStart;
						right = ~KEY[1];
						left = ~KEY[2];
						end
			2'b10:	begin
						start = usrStart;
						right = keyRight;
						left = keyLeft;
						end
		endcase
	end
	
endmodule