data/full_repos/permissive/174783592/FloatAdd/Adder/sum11bit.v
None: at end of input
1: b'%Error: data/full_repos/permissive/174783592/FloatAdd/Adder/sum11bit.v:2: Cannot find include file: Adder/sum5bit.v\n`include "Adder/sum5bit.v" \n         ^~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/174783592/FloatAdd/Adder,data/full_repos/permissive/174783592/Adder/sum5bit.v\n             data/full_repos/permissive/174783592/FloatAdd/Adder,data/full_repos/permissive/174783592/Adder/sum5bit.v.v\n             data/full_repos/permissive/174783592/FloatAdd/Adder,data/full_repos/permissive/174783592/Adder/sum5bit.v.sv\n             Adder/sum5bit.v\n             Adder/sum5bit.v.v\n             Adder/sum5bit.v.sv\n             obj_dir/Adder/sum5bit.v\n             obj_dir/Adder/sum5bit.v.v\n             obj_dir/Adder/sum5bit.v.sv\n%Error: data/full_repos/permissive/174783592/FloatAdd/Adder/sum11bit.v:3: Cannot find include file: Adder/FullAdder.v\n`include "Adder/FullAdder.v" \n         ^~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n'
module sum11bit(a,b,kIn,sum);

	input [10:0] a;
        input [10:0] b;
	input [1:0] kIn;
	wire extra;
	output[11:0] sum;


	sum5bit s1(a[4:0],b[4:0],2'b00,sum[5:0]);
	
	sum5bit s2(a[9:5],b[9:5],s1.kpgOut[11:10],{extra,sum[9:5]});

	FullAdder f1(a[10],b[10],extra,sum[10],sum[11]);


	endmodule
module sum11bit(a,b,kIn,sum);


	input [10:0] a;
        input [10:0] b;
	input [1:0] kIn;
	wire extra;
	output[11:0] sum;


	sum5bit s1(a[4:0],b[4:0],2'b00,sum[5:0]);
	
	sum5bit s2(a[9:5],b[9:5],s1.kpgOut[11:10],{extra,sum[9:5]});

	FullAdder f1(a[10],b[10],extra,sum[10],sum[11]);


	endmodule