data/full_repos/permissive/153023217/mfp_ahb_seven.v
1: b'%Error: data/full_repos/permissive/153023217/mfp_ahb_seven.v:26: Cannot find include file: mfp_ahb_const.vh\n`include "mfp_ahb_const.vh" \n         ^~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/153023217,data/full_repos/permissive/153023217/mfp_ahb_const.vh\n             data/full_repos/permissive/153023217,data/full_repos/permissive/153023217/mfp_ahb_const.vh.v\n             data/full_repos/permissive/153023217,data/full_repos/permissive/153023217/mfp_ahb_const.vh.sv\n             mfp_ahb_const.vh\n             mfp_ahb_const.vh.v\n             mfp_ahb_const.vh.sv\n             obj_dir/mfp_ahb_const.vh\n             obj_dir/mfp_ahb_const.vh.v\n             obj_dir/mfp_ahb_const.vh.sv\n%Error: data/full_repos/permissive/153023217/mfp_ahb_seven.v:66: Define or directive not defined: \'`HTRANS_IDLE\'\n  assign we = (HTRANS_d != `HTRANS_IDLE) & HSEL_d & HWRITE_d;\n                           ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/153023217/mfp_ahb_seven.v:66: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n  assign we = (HTRANS_d != `HTRANS_IDLE) & HSEL_d & HWRITE_d;\n                                       ^\n%Error: data/full_repos/permissive/153023217/mfp_ahb_seven.v:81: Define or directive not defined: \'`H_7SEGEN_IONUM\'\n            `H_7SEGEN_IONUM        : H7SEG_EN    <= HWDATA[7:0];        \n            ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/153023217/mfp_ahb_seven.v:81: syntax error, unexpected \':\', expecting endcase\n            `H_7SEGEN_IONUM        : H7SEG_EN    <= HWDATA[7:0];        \n                                   ^\n%Error: data/full_repos/permissive/153023217/mfp_ahb_seven.v:82: Define or directive not defined: \'`H_7SEGEDECIMAL_IONUM\'\n            `H_7SEGEDECIMAL_IONUM  : H7SEG_DP    <= HWDATA[7:0];\n            ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/153023217/mfp_ahb_seven.v:83: Define or directive not defined: \'`H_7SEGLOWER_IONUM\'\n            `H_7SEGLOWER_IONUM     : HSEG_DIGITS[31:0] <= HWDATA; \n            ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/153023217/mfp_ahb_seven.v:84: Define or directive not defined: \'`H_7SEGUPPER_IONUM\'\n            `H_7SEGUPPER_IONUM     : HSEG_DIGITS[63:32] <= HWDATA;\n            ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/153023217/mfp_ahb_seven.v:91: syntax error, unexpected endcase\n         endcase\n         ^~~~~~~\n%Error: Exiting due to 9 error(s)\n'
module mfp_ahb_seven(
    input                        HCLK,
    input                        HRESETn,
    input      [  3          :0] HADDR,
    input      [  1          :0] HTRANS,
    input      [ 31          :0] HWDATA,
    input                        HWRITE,
    input                        HSEL,
    

    output [7:0] dispenout,
    

    output [7:0] dispout        
);

  reg  [7:0]  H7SEG_EN;
  reg  [7:0]  H7SEG_DP;
  reg  [63:0] HSEG_DIGITS;
  
  reg  [3:0]  HADDR_d;
  reg         HWRITE_d;
  reg         HSEL_d;
  reg  [1:0]  HTRANS_d;
  
  wire        we;


  always @ (posedge HCLK) 
  begin
    HADDR_d  <= HADDR;
	HWRITE_d <= HWRITE;
	HSEL_d   <= HSEL;
	HTRANS_d <= HTRANS;
  end
  
  

  assign we = (HTRANS_d != `HTRANS_IDLE) & HSEL_d & HWRITE_d;

    always @(posedge HCLK or negedge HRESETn)
    begin
    
       if (~HRESETn)
            begin
                    H7SEG_EN <= 8'hff;
                    H7SEG_DP <= 8'hff;
                    HSEG_DIGITS<=64'hffffffff;
                
            end 
       else if (we)
         case (HADDR_d)

            `H_7SEGEN_IONUM        : H7SEG_EN    <= HWDATA[7:0];        
            `H_7SEGEDECIMAL_IONUM  : H7SEG_DP    <= HWDATA[7:0];
            `H_7SEGLOWER_IONUM     : HSEG_DIGITS[31:0] <= HWDATA; 
            `H_7SEGUPPER_IONUM     : HSEG_DIGITS[63:32] <= HWDATA;
            default:
            begin
                H7SEG_EN<= H7SEG_EN;
                HSEG_DIGITS<=HSEG_DIGITS;
                H7SEG_DP<=H7SEG_DP;  
            end
         endcase

    end
  
   

    mfp_ahb_sevensegtimer seven_segment_timer (.clk(HCLK), .resetn(HRESETn),.EN(H7SEG_EN),.DIGITS({HSEG_DIGITS}),
                                               .dp(H7SEG_DP),.DISPENOUT(dispenout),.DISPOUT(dispout));
endmodule
module mfp_ahb_seven(
    input                        HCLK,
    input                        HRESETn,
    input      [  3          :0] HADDR,
    input      [  1          :0] HTRANS,
    input      [ 31          :0] HWDATA,
    input                        HWRITE,
    input                        HSEL,
    

    output [7:0] dispenout,
    

    output [7:0] dispout        
);


  reg  [7:0]  H7SEG_EN;
  reg  [7:0]  H7SEG_DP;
  reg  [63:0] HSEG_DIGITS;
  
  reg  [3:0]  HADDR_d;
  reg         HWRITE_d;
  reg         HSEL_d;
  reg  [1:0]  HTRANS_d;
  
  wire        we;


  always @ (posedge HCLK) 
  begin
    HADDR_d  <= HADDR;
	HWRITE_d <= HWRITE;
	HSEL_d   <= HSEL;
	HTRANS_d <= HTRANS;
  end
  
  

  assign we = (HTRANS_d != `HTRANS_IDLE) & HSEL_d & HWRITE_d;

    always @(posedge HCLK or negedge HRESETn)
    begin
    
       if (~HRESETn)
            begin
                    H7SEG_EN <= 8'hff;
                    H7SEG_DP <= 8'hff;
                    HSEG_DIGITS<=64'hffffffff;
                
            end 
       else if (we)
         case (HADDR_d)

            `H_7SEGEN_IONUM        : H7SEG_EN    <= HWDATA[7:0];        
            `H_7SEGEDECIMAL_IONUM  : H7SEG_DP    <= HWDATA[7:0];
            `H_7SEGLOWER_IONUM     : HSEG_DIGITS[31:0] <= HWDATA; 
            `H_7SEGUPPER_IONUM     : HSEG_DIGITS[63:32] <= HWDATA;
            default:
            begin
                H7SEG_EN<= H7SEG_EN;
                HSEG_DIGITS<=HSEG_DIGITS;
                H7SEG_DP<=H7SEG_DP;  
            end
         endcase

    end
  
   

    mfp_ahb_sevensegtimer seven_segment_timer (.clk(HCLK), .resetn(HRESETn),.EN(H7SEG_EN),.DIGITS({HSEG_DIGITS}),
                                               .dp(H7SEG_DP),.DISPENOUT(dispenout),.DISPOUT(dispout));
endmodule