data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/pci/rtl/pci_frame_crit.v
1: b'%Error: data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/pci/rtl/pci_frame_crit.v:63: Cannot find include file: timescale.v\n`include "timescale.v" \n         ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/pci/rtl,data/full_repos/permissive/137416811/timescale.v\n             data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/pci/rtl,data/full_repos/permissive/137416811/timescale.v.v\n             data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/pci/rtl,data/full_repos/permissive/137416811/timescale.v.sv\n             timescale.v\n             timescale.v.v\n             timescale.v.sv\n             obj_dir/timescale.v\n             obj_dir/timescale.v.v\n             obj_dir/timescale.v.sv\n%Error: Exiting due to 1 error(s)\n'
module pci_frame_crit
(
    pci_frame_out,
    force_frame_in,
    slow_frame_in,
    pci_stop_in
) ;

output  pci_frame_out ;
input   force_frame_in,
        slow_frame_in,
        pci_stop_in ;

assign  pci_frame_out   = force_frame_in && (slow_frame_in || ~pci_stop_in) ;

endmodule
module pci_frame_crit
(
    pci_frame_out,
    force_frame_in,
    slow_frame_in,
    pci_stop_in
) ;


output  pci_frame_out ;
input   force_frame_in,
        slow_frame_in,
        pci_stop_in ;

assign  pci_frame_out   = force_frame_in && (slow_frame_in || ~pci_stop_in) ;

endmodule