data/full_repos/permissive/147265957/src/lksumled.v
1: b"%Error: data/full_repos/permissive/147265957/src/lksumled.v:37: Cannot find file containing module: 'clkdiv'\n    clkdiv cdiv(clk,divclk);\n    ^~~~~~\n        ... Looked in:\n             data/full_repos/permissive/147265957/src,data/full_repos/permissive/147265957/clkdiv\n             data/full_repos/permissive/147265957/src,data/full_repos/permissive/147265957/clkdiv.v\n             data/full_repos/permissive/147265957/src,data/full_repos/permissive/147265957/clkdiv.sv\n             clkdiv\n             clkdiv.v\n             clkdiv.sv\n             obj_dir/clkdiv\n             obj_dir/clkdiv.v\n             obj_dir/clkdiv.sv\n%Error: data/full_repos/permissive/147265957/src/lksumled.v:39: Cannot find file containing module: 'lkfinstm'\n    lkfinstm state_machine(divclk,sw[1],sw[0],nzmark,sum_load,next_load,sum_sel,next_sel,mem_sel,iscomp,statdisp);\n    ^~~~~~~~\n%Error: data/full_repos/permissive/147265957/src/lksumled.v:40: Cannot find file containing module: 'lkdatapath'\n    lkdatapath proced(sw[1],divclk,sum_sel,sum_load,next_sel,next_load,mem_sel,nzmark,sumresult);\n    ^~~~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module lksumled(
clk,sw,led
    );
    input clk;
    input [1:0] sw;
    output [15:0] led;
    wire [31:0] sumresult;
    wire divsig;
    assign led[12:0] = sumresult[12:0];
    wire iscomp;
    wire [1:0] statdisp; 
    assign led[15] = iscomp;
    assign led[14:13] = statdisp;

    clkdiv cdiv(clk,divclk);

    lkfinstm state_machine(divclk,sw[1],sw[0],nzmark,sum_load,next_load,sum_sel,next_sel,mem_sel,iscomp,statdisp);
    lkdatapath proced(sw[1],divclk,sum_sel,sum_load,next_sel,next_load,mem_sel,nzmark,sumresult);
endmodule
module lksumled(
clk,sw,led
    );

    input clk;
    input [1:0] sw;
    output [15:0] led;
    wire [31:0] sumresult;
    wire divsig;
    assign led[12:0] = sumresult[12:0];
    wire iscomp;
    wire [1:0] statdisp; 
    assign led[15] = iscomp;
    assign led[14:13] = statdisp;

    clkdiv cdiv(clk,divclk);

    lkfinstm state_machine(divclk,sw[1],sw[0],nzmark,sum_load,next_load,sum_sel,next_sel,mem_sel,iscomp,statdisp);
    lkdatapath proced(sw[1],divclk,sum_sel,sum_load,next_sel,next_load,mem_sel,nzmark,sumresult);
endmodule