data/full_repos/permissive/169522605/hw3_2/not1.v
data/verilator_xmls/dd51d6b6-97da-4dba-881d-ac5d58b21552.xml
module not1 (in1,out);
    input in1;
    output out;
    assign out = ~in1;
endmodule
module not1 (in1,out);

    input in1;
    output out;
    assign out = ~in1;
endmodule