data/full_repos/permissive/196851857/datapath/register.v
'utf-8' codec can't decode byte 0xb1 in position 343: invalid start byte
data/verilator_xmls/3f9b8968-23dc-45ee-b3e0-bf4394b07f77.xml
module regfiles(writeEn, rw, busW, ra, rb, busA, busB, clk);
  input clk, writeEn;
  input [4:0] rw, ra, rb;
  input [31:0] busW;
  output [31:0] busA, busB;
  reg [31:0] reg_file[31:0];
  initial 
	begin
	   reg_file[0] = 0;
	end
  always@(posedge clk)
  begin 
     if(writeEn && (rw != 0))
      reg_file[rw] = busW;
  end
  assign busA = (ra != 0) ? reg_file[ra] : 0;
  assign busB = (rb != 0) ? reg_file[rb] : 0;
endmodule
module regfiles(writeEn, rw, busW, ra, rb, busA, busB, clk);

  input clk, writeEn;
  input [4:0] rw, ra, rb;
  input [31:0] busW;
  output [31:0] busA, busB;
  reg [31:0] reg_file[31:0];
  initial 
	begin
	   reg_file[0] = 0;
	end
  always@(posedge clk)
  begin 
     if(writeEn && (rw != 0))
      reg_file[rw] = busW;
  end
  assign busA = (ra != 0) ? reg_file[ra] : 0;
  assign busB = (rb != 0) ? reg_file[rb] : 0;
endmodule