data/full_repos/permissive/159244411/radiant/_sandbox/jive_bootrom/rtl/jive_bootrom.v
1: b'%Error: data/full_repos/permissive/159244411/radiant/_sandbox/jive_bootrom/rtl/jive_bootrom.v:9: Cannot find include file: core/lscc_ram_dq.v\n`include "core/lscc_ram_dq.v" \n         ^~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/159244411/radiant/_sandbox/jive_bootrom/rtl,data/full_repos/permissive/159244411/core/lscc_ram_dq.v\n             data/full_repos/permissive/159244411/radiant/_sandbox/jive_bootrom/rtl,data/full_repos/permissive/159244411/core/lscc_ram_dq.v.v\n             data/full_repos/permissive/159244411/radiant/_sandbox/jive_bootrom/rtl,data/full_repos/permissive/159244411/core/lscc_ram_dq.v.sv\n             core/lscc_ram_dq.v\n             core/lscc_ram_dq.v.v\n             core/lscc_ram_dq.v.sv\n             obj_dir/core/lscc_ram_dq.v\n             obj_dir/core/lscc_ram_dq.v.v\n             obj_dir/core/lscc_ram_dq.v.sv\n%Error: Exiting due to 1 error(s)\n'
module jive_bootrom (clk_i, clk_en_i, wr_en_i, wr_data_i, addr_i, rd_data_o);
    input  clk_i;
    input  clk_en_i;
    input  wr_en_i;
    input  [31:0]  wr_data_i;
    input  [7:0]  addr_i;
    output  [31:0]  rd_data_o;
    lscc_ram_dq #(.ADDR_DEPTH(256),
        .DATA_WIDTH(32),
        .ADDR_WIDTH(8),
        .REGMODE("noreg"),
        .RESETMODE("sync"),
        .INIT_MODE("mem_file"),
        .INIT_FILE("misc/uart_boot_jive_bootrom_copy.mem"),
        .INIT_FILE_FORMAT("hex"))
    lscc_ram_dq_inst(.clk_i(clk_i),
        .rst_i(1'b0),
        .clk_en_i(clk_en_i),
        .rd_out_clk_en_i(1'b1),
        .wr_en_i(wr_en_i),
        .wr_data_i(wr_data_i),
        .addr_i(addr_i),
        .rd_data_o(rd_data_o));
endmodule
module jive_bootrom (clk_i, clk_en_i, wr_en_i, wr_data_i, addr_i, rd_data_o);

    input  clk_i;
    input  clk_en_i;
    input  wr_en_i;
    input  [31:0]  wr_data_i;
    input  [7:0]  addr_i;
    output  [31:0]  rd_data_o;
    lscc_ram_dq #(.ADDR_DEPTH(256),
        .DATA_WIDTH(32),
        .ADDR_WIDTH(8),
        .REGMODE("noreg"),
        .RESETMODE("sync"),
        .INIT_MODE("mem_file"),
        .INIT_FILE("misc/uart_boot_jive_bootrom_copy.mem"),
        .INIT_FILE_FORMAT("hex"))
    lscc_ram_dq_inst(.clk_i(clk_i),
        .rst_i(1'b0),
        .clk_en_i(clk_en_i),
        .rd_out_clk_en_i(1'b1),
        .wr_en_i(wr_en_i),
        .wr_data_i(wr_data_i),
        .addr_i(addr_i),
        .rd_data_o(rd_data_o));
endmodule