data/full_repos/permissive/155085421/led_selector.v
data/verilator_xmls/47f653dc-995d-4ffa-8018-b1d0b8a2ee62.xml
module led_selector(
    input clock_12mhz,
    input bit_clock,
    input led_clock,
    input framerate,
    input encoder_finished,
    output led_counter_clock,
    output reg led_counter_reset,
    output reg[7:0] led_counter,
    output reg led_selected,
    output reg done
    );



reg previous_framerate;

always @(posedge clock_12mhz)
begin
    previous_framerate <= framerate;
    led_counter_reset <= (framerate && (~previous_framerate));
end


reg previous_encoder_finished;
reg previous_led_clock;


assign led_counter_clock = led_clock;










reg _done;
reg _led_selected;

always @(posedge led_counter_clock or posedge led_counter_reset)
begin
    if (led_counter_reset)
    begin


        led_counter <= 22;
        _done <= 0;
    end
    else begin
        if (led_counter == 0)
        begin
            _done <= 1;
        end
        else begin
            led_counter <= led_counter - 1;
            _led_selected <= ~_led_selected;
        end
    end
end


reg previous_led_selected;

always @(posedge clock_12mhz)
begin
    previous_led_selected <= _led_selected;
    led_selected <= (previous_led_selected && ~_led_selected) || (~previous_led_selected && _led_selected);

end


reg previous_done;

always @(posedge clock_12mhz)
begin
    previous_done <= _done;
    done <= (_done && (~previous_done));
end

endmodule
module led_selector(
    input clock_12mhz,
    input bit_clock,
    input led_clock,
    input framerate,
    input encoder_finished,
    output led_counter_clock,
    output reg led_counter_reset,
    output reg[7:0] led_counter,
    output reg led_selected,
    output reg done
    );




reg previous_framerate;

always @(posedge clock_12mhz)
begin
    previous_framerate <= framerate;
    led_counter_reset <= (framerate && (~previous_framerate));
end


reg previous_encoder_finished;
reg previous_led_clock;


assign led_counter_clock = led_clock;










reg _done;
reg _led_selected;

always @(posedge led_counter_clock or posedge led_counter_reset)
begin
    if (led_counter_reset)
    begin


        led_counter <= 22;
        _done <= 0;
    end
    else begin
        if (led_counter == 0)
        begin
            _done <= 1;
        end
        else begin
            led_counter <= led_counter - 1;
            _led_selected <= ~_led_selected;
        end
    end
end


reg previous_led_selected;

always @(posedge clock_12mhz)
begin
    previous_led_selected <= _led_selected;
    led_selected <= (previous_led_selected && ~_led_selected) || (~previous_led_selected && _led_selected);

end


reg previous_done;

always @(posedge clock_12mhz)
begin
    previous_done <= _done;
    done <= (_done && (~previous_done));
end

endmodule