data/full_repos/permissive/114811571/test/samples/simple_bus_array/simple_bus_array.sv
data/verilator_xmls/251c125d-7a36-4660-832b-f4abb95e1859.xml
module driverMod(output [3:0] out);

   assign out = 4'd3;
   
endmodule
module driverMod(output [3:0] out);


   assign out = 4'd3;
   
endmodule