data/full_repos/permissive/169639758/ice40/regressions/issue0151/top.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b"%Error: data/full_repos/permissive/169639758/ice40/regressions/issue0151/top.v:8: Cannot find file containing module: 'SB_GB_IO'\nSB_GB_IO #(\n^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/169639758/ice40/regressions/issue0151,data/full_repos/permissive/169639758/SB_GB_IO\n             data/full_repos/permissive/169639758/ice40/regressions/issue0151,data/full_repos/permissive/169639758/SB_GB_IO.v\n             data/full_repos/permissive/169639758/ice40/regressions/issue0151,data/full_repos/permissive/169639758/SB_GB_IO.sv\n             SB_GB_IO\n             SB_GB_IO.v\n             SB_GB_IO.sv\n             obj_dir/SB_GB_IO\n             obj_dir/SB_GB_IO.v\n             obj_dir/SB_GB_IO.sv\n%Error: Exiting due to 1 error(s)\n"
module top (
  input wire in_n,
  output wire out
);

wire clk;

SB_GB_IO #(
  .PIN_TYPE(6'b000000),
  .IO_STANDARD("SB_LVDS_INPUT")
) differential_clock_input (
  .PACKAGE_PIN(in_n),
  .GLOBAL_BUFFER_OUTPUT(clk)
);

assign out = cntr;
reg cntr = 1'd0;

always @(posedge clk) begin
  cntr <= !cntr;
end

endmodule
module top (
  input wire in_n,
  output wire out
);


wire clk;

SB_GB_IO #(
  .PIN_TYPE(6'b000000),
  .IO_STANDARD("SB_LVDS_INPUT")
) differential_clock_input (
  .PACKAGE_PIN(in_n),
  .GLOBAL_BUFFER_OUTPUT(clk)
);

assign out = cntr;
reg cntr = 1'd0;

always @(posedge clk) begin
  cntr <= !cntr;
end

endmodule