data/full_repos/permissive/193073090/ServoTop.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Warning-WIDTH: data/full_repos/permissive/193073090/ServoTop.v:61: Operator EQ expects 32 bits on the RHS, but RHS\'s VARREF \'channel_switch_carry\' generates 2 bits.\n                                                                  : ... In instance ServoTop\n    if (i == channel_switch_carry)begin\n          ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/193073090/ServoTop.v:77: Cannot find file containing module: \'ServoEdition3\'\n ServoEdition3 myServo(\n ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/193073090,data/full_repos/permissive/193073090/ServoEdition3\n             data/full_repos/permissive/193073090,data/full_repos/permissive/193073090/ServoEdition3.v\n             data/full_repos/permissive/193073090,data/full_repos/permissive/193073090/ServoEdition3.sv\n             ServoEdition3\n             ServoEdition3.v\n             ServoEdition3.sv\n             obj_dir/ServoEdition3\n             obj_dir/ServoEdition3.v\n             obj_dir/ServoEdition3.sv\n%Error: Exiting due to 1 error(s), 1 warning(s)\n'
module ServoTop #(
		parameter CHANNELS = 4,
		parameter ADDR_WIDTH = `clog2(CHANNELS)
	)(
	input 						clock,
	input 						clock_enable,
	input 						reset,
	input [ADDR_WIDTH-1:0]	channel_switch,
	input [7:0] 				pwm_switch,
	output [CHANNELS-1:0]   pwm_output
	);


	wire loadSignal;
	wire [ADDR_WIDTH-1:0]      channel_switch_carry;
	reg [CHANNELS-1:0]		 	pwm_output_carry;
	reg pwm_output_carry0;
	reg pwm_output_carry1;
	reg pwm_output_carry2;
	reg pwm_output_carry3;

	assign channel_switch_carry = channel_switch;





	
	assign pwm_output = pwm_output_carry;
	
	

	integer i;
	always @*begin
	if (reset)begin
		pwm_output_carry=4'b0;
	end else for (i=0;i<CHANNELS;i=i+1)begin
				if (i == channel_switch_carry)begin
						pwm_output_carry[i] = loadSignal;
				
				end

			end
	end
	

	ServoEdition3 myServo(
		.clock				(clock),
		.clock_enable		(clock_enable),
		.reset				(reset),
		.pwm_switch			(pwm_switch),
		.pwm_output			(loadSignal)
	);
	
	





	
	

	


	
	
	
	






endmodule
module ServoTop #(
		parameter CHANNELS = 4,
		parameter ADDR_WIDTH = `clog2(CHANNELS)
	)(
	input 						clock,
	input 						clock_enable,
	input 						reset,
	input [ADDR_WIDTH-1:0]	channel_switch,
	input [7:0] 				pwm_switch,
	output [CHANNELS-1:0]   pwm_output
	);



	wire loadSignal;
	wire [ADDR_WIDTH-1:0]      channel_switch_carry;
	reg [CHANNELS-1:0]		 	pwm_output_carry;
	reg pwm_output_carry0;
	reg pwm_output_carry1;
	reg pwm_output_carry2;
	reg pwm_output_carry3;

	assign channel_switch_carry = channel_switch;





	
	assign pwm_output = pwm_output_carry;
	
	

	integer i;
	always @*begin
	if (reset)begin
		pwm_output_carry=4'b0;
	end else for (i=0;i<CHANNELS;i=i+1)begin
				if (i == channel_switch_carry)begin
						pwm_output_carry[i] = loadSignal;
				
				end

			end
	end
	

	ServoEdition3 myServo(
		.clock				(clock),
		.clock_enable		(clock_enable),
		.reset				(reset),
		.pwm_switch			(pwm_switch),
		.pwm_output			(loadSignal)
	);
	
	





	
	

	


	
	
	
	






endmodule