data/full_repos/permissive/128204663/build-data/share/SB_DFFNR.v
1: b"%Error: data/full_repos/permissive/128204663/build-data/share/SB_DFFNR.v:2: Duplicate declaration of signal: 'Q'\n                                                                          : ... note: ANSI ports must have type declared with the I/O (IEEE 1800-2017 23.2.2.2)\n reg Q = 0;\n     ^\n        data/full_repos/permissive/128204663/build-data/share/SB_DFFNR.v:1: ... Location of original declaration\nmodule SB_DFFNR (output Q, input C, R, D);\n                        ^\n%Error: Exiting due to 1 error(s)\n"
module SB_DFFNR (output Q, input C, R, D);
	reg Q = 0;
	always @(negedge C, posedge R)
		if (R)
			Q <= 0;
		else
			Q <= D;
endmodule
module SB_DFFNR (output Q, input C, R, D);

	reg Q = 0;
	always @(negedge C, posedge R)
		if (R)
			Q <= 0;
		else
			Q <= D;
endmodule