data/full_repos/permissive/152917342/top.v
1: b"%Error: data/full_repos/permissive/152917342/top.v:49: Cannot find file containing module: 'cpu'\ncpu cpu0\n^~~\n        ... Looked in:\n             data/full_repos/permissive/152917342,data/full_repos/permissive/152917342/cpu\n             data/full_repos/permissive/152917342,data/full_repos/permissive/152917342/cpu.v\n             data/full_repos/permissive/152917342,data/full_repos/permissive/152917342/cpu.sv\n             cpu\n             cpu.v\n             cpu.sv\n             obj_dir/cpu\n             obj_dir/cpu.v\n             obj_dir/cpu.sv\n%Error: Exiting due to 1 error(s)\n"
module top
(
    input CLK,
    input [3:0] sw,
    output [3:0] led,
    output [7:0] ja,
    output [7:0] jb,
    output [7:0] jc,
    output [7:0] jd
);

wire clk;

clk_divider clk_divider
(
    .clk_in     ( CLK      ),
    .rst        ( sw[0] ),
    .clk_out    ( clk      )
);


cpu cpu0
(
    .clk    ( clk       ),
    .rst    ( sw[0]     ),
    .led    ( led       ),
    .ja     ( ja        ),
    .jb     ( jb        ),
    .jc     ( jc        ),
    .jd     ( jd        )
);

endmodule
module top
(
    input CLK,
    input [3:0] sw,
    output [3:0] led,
    output [7:0] ja,
    output [7:0] jb,
    output [7:0] jc,
    output [7:0] jd
);


wire clk;

clk_divider clk_divider
(
    .clk_in     ( CLK      ),
    .rst        ( sw[0] ),
    .clk_out    ( clk      )
);


cpu cpu0
(
    .clk    ( clk       ),
    .rst    ( sw[0]     ),
    .led    ( led       ),
    .ja     ( ja        ),
    .jb     ( jb        ),
    .jc     ( jc        ),
    .jd     ( jd        )
);

endmodule