data/full_repos/permissive/130536678/Single-Cycle/ARM_CPU.v
 line:98: before: "INSTRUCTION"
1: b"%Error: data/full_repos/permissive/130536678/Single-Cycle/ARM_CPU.v:506: syntax error, unexpected $end, expecting ';'\n    Data[31] = 64   h00000000;\n                 ^\n%Error: Cannot continue\n"
module ShiftLeft2
(
  input [63:0] inputData,
  output reg [63:0] outputData
);

  always @(inputData) begin
    outputData = inputData << 2;
  end
endmodule
module ShiftLeft2
(
  input [63:0] inputData,
  output reg [63:0] outputData
);


  always @(inputData) begin
    outputData = inputData << 2;
  end
endmodule