data/full_repos/permissive/208556773/src/microstepper/chargepump.v
data/verilator_xmls/728e02b4-f03a-4da9-b8f0-b6898fb54c8c.xml
module chargepump (
    input  clk,
    input  resetn,
    input  [7:0] period,
    output chargepump_pin
);

  reg [7:0] cp_counter;
  reg       chargepump;
  assign chargepump_pin = chargepump;
  always @(posedge clk) begin
    if (!resetn) begin
      cp_counter <= 0;
      chargepump <= 0;
    end else begin
      cp_counter <= cp_counter + 1'b1;

      if (cp_counter == period) begin
        cp_counter <= 0;
        chargepump <= ~chargepump;
      end
    end
  end

endmodule
module chargepump (
    input  clk,
    input  resetn,
    input  [7:0] period,
    output chargepump_pin
);


  reg [7:0] cp_counter;
  reg       chargepump;
  assign chargepump_pin = chargepump;
  always @(posedge clk) begin
    if (!resetn) begin
      cp_counter <= 0;
      chargepump <= 0;
    end else begin
      cp_counter <= cp_counter + 1'b1;

      if (cp_counter == period) begin
        cp_counter <= 0;
        chargepump <= ~chargepump;
      end
    end
  end

endmodule