data/full_repos/permissive/148206502/test.v
 line:27: before: ";"
1: b'%Error: data/full_repos/permissive/148206502/test.v:31: Unsupported: fork statements\n fork\n ^~~~\n%Warning-STMTDLY: data/full_repos/permissive/148206502/test.v:41: Unsupported: Ignoring delay on this delayed statement.\n forever #1 clk = !clk;\n         ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/148206502/test.v:48: Unsupported: Ignoring delay on this delayed statement.\n # 20\n ^\n%Warning-STMTDLY: data/full_repos/permissive/148206502/test.v:57: Unsupported: Ignoring delay on this delayed statement.\n # 600\n ^\n%Warning-STMTDLY: data/full_repos/permissive/148206502/test.v:59: Unsupported: Ignoring delay on this delayed statement.\n # 1200\n ^\n%Warning-STMTDLY: data/full_repos/permissive/148206502/test.v:61: Unsupported: Ignoring delay on this delayed statement.\n # 1200\n ^\n%Error: data/full_repos/permissive/148206502/test.v:74: Unsupported or unknown PLI call: $monitor\n $monitor("TIME = %d, reset = %b, sensor = %b, light of highway = %h, light of farm road = %h",$time,rst_n ,sensor,light_highway,light_farm );\n ^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/148206502/test.v:80: Unsupported: Ignoring delay on this delayed statement.\n #ENDTIME\n ^\n%Error: Exiting due to 2 error(s), 6 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module tb_traffic;
parameter ENDTIME  = 400000;
reg clk;
reg rst_n;
reg sensor;
wire [2:0] light_farm;
wire [2:0] light_highway;

traffic_light tb(light_highway, light_farm, sensor, clk, rst_n);

initial
 begin
 clk = 1'b0;
 rst_n = 1'b0;
 sensor = 1'b0;
 end
 
initial
 begin
 main;
 end
 
task main;
 fork
 clock_gen;
 reset_gen;
 operation_flow;
 debug_output;
 endsimulation;
 join
endtask
task clock_gen;
 begin
 forever #`DELAY clk = !clk;
 end
endtask

task reset_gen;
 begin
 rst_n = 0;
 # 20
 rst_n = 1;
 end
endtask


task operation_flow;
 begin
 sensor = 0;
 # 600
 sensor = 1;
 # 1200
 sensor = 0;
 # 1200
 sensor = 1;
 end
endtask

task debug_output;
 begin
 $display("----------------------------------------------");
        $display("------------------     -----------------------");
 $display("----------- Traffic Control ----------------");
 $display("--------------             -------------------");
 $display("----------------         ---------------------");
 $display("----------------------------------------------");
 $monitor("TIME = %d, reset = %b, sensor = %b, light of highway = %h, light of farm road = %h",$time,rst_n ,sensor,light_highway,light_farm );
 end
endtask

task endsimulation;
 begin
 #ENDTIME
 $display("-------------- TASK END ------------");
 $finish;
 end
endtask
    
endmodule
module tb_traffic;

parameter ENDTIME  = 400000;
reg clk;
reg rst_n;
reg sensor;
wire [2:0] light_farm;
wire [2:0] light_highway;

traffic_light tb(light_highway, light_farm, sensor, clk, rst_n);

initial
 begin
 clk = 1'b0;
 rst_n = 1'b0;
 sensor = 1'b0;
 end
 
initial
 begin
 main;
 end
 
task main;
 fork
 clock_gen;
 reset_gen;
 operation_flow;
 debug_output;
 endsimulation;
 join
endtask
task clock_gen;
 begin
 forever #`DELAY clk = !clk;
 end
endtask

task reset_gen;
 begin
 rst_n = 0;
 # 20
 rst_n = 1;
 end
endtask


task operation_flow;
 begin
 sensor = 0;
 # 600
 sensor = 1;
 # 1200
 sensor = 0;
 # 1200
 sensor = 1;
 end
endtask

task debug_output;
 begin
 $display("----------------------------------------------");
        $display("------------------     -----------------------");
 $display("----------- Traffic Control ----------------");
 $display("--------------             -------------------");
 $display("----------------         ---------------------");
 $display("----------------------------------------------");
 $monitor("TIME = %d, reset = %b, sensor = %b, light of highway = %h, light of farm road = %h",$time,rst_n ,sensor,light_highway,light_farm );
 end
endtask

task endsimulation;
 begin
 #ENDTIME
 $display("-------------- TASK END ------------");
 $finish;
 end
endtask
    
endmodule