data/full_repos/permissive/174642777/Experiments/Lab X6/1. TC_Moore/TC_Moore_test.v
1: b'%Error: Cannot find file containing module: X6/1.\n        ... Looked in:\n             data/full_repos/permissive/174642777/Experiments/Lab/X6/1.\n             data/full_repos/permissive/174642777/Experiments/Lab/X6/1..v\n             data/full_repos/permissive/174642777/Experiments/Lab/X6/1..sv\n             X6/1.\n             X6/1..v\n             X6/1..sv\n             obj_dir/X6/1.\n             obj_dir/X6/1..v\n             obj_dir/X6/1..sv\n%Error: Cannot find file containing module: TC_Moore,data/full_repos/permissive/174642777\n%Error: Cannot find file containing module: data/full_repos/permissive/174642777/Experiments/Lab\n%Error: Cannot find file containing module: TC_Moore/TC_Moore_test.v\n%Error: Exiting due to 4 error(s)\n'
module TC_Moore_test;


	reg CLK;
	reg R;
	reg T_A;
	reg T_B;


	wire [2:0] L_A;
	wire [2:0] L_B;
  

  reg[3:0] round;


	TC_Moore uut (
		.CLK(CLK), 
		.R(R), 
		.T_A(T_A), 
		.T_B(T_B), 
		.L_A(L_A), 
		.L_B(L_B)
	);

	initial begin

		CLK = 0;
		R = 0;
		T_A = 0;
		T_B = 0;
    round = 0;


		#100;
        


	end

  always begin
    #50 CLK = !CLK;
  end
  
  always@(negedge CLK) begin
    case(round)
      1: begin
        T_A = 0;
        T_B = 1;
      end
      5: begin
        T_A = 1;
        T_B = 0;
      end
      8: begin
        T_A = 0;
        T_B = 0;
      end
    endcase
    round = round + 1;
  end

endmodule
module TC_Moore_test;



	reg CLK;
	reg R;
	reg T_A;
	reg T_B;


	wire [2:0] L_A;
	wire [2:0] L_B;
  

  reg[3:0] round;


	TC_Moore uut (
		.CLK(CLK), 
		.R(R), 
		.T_A(T_A), 
		.T_B(T_B), 
		.L_A(L_A), 
		.L_B(L_B)
	);

	initial begin

		CLK = 0;
		R = 0;
		T_A = 0;
		T_B = 0;
    round = 0;


		#100;
        


	end

  always begin
    #50 CLK = !CLK;
  end
  
  always@(negedge CLK) begin
    case(round)
      1: begin
        T_A = 0;
        T_B = 1;
      end
      5: begin
        T_A = 1;
        T_B = 0;
      end
      8: begin
        T_A = 0;
        T_B = 0;
      end
    endcase
    round = round + 1;
  end

endmodule