data/full_repos/permissive/143278/ivltests/pr910.v
 line:15: before: ","
1: b'%Error: data/full_repos/permissive/143278/ivltests/pr910.v:15: Unsupported or unknown PLI call: $monitor\n $monitor( X00, X31, VSS, VSS,,, N2166, N1110 ) ;\n ^~~~~~~~\n%Error: data/full_repos/permissive/143278/ivltests/pr910.v:15: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n $monitor( X00, X31, VSS, VSS,,, N2166, N1110 ) ;\n                              ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/pr910.v:16: Unsupported: Ignoring delay on this delayed statement.\n #10 state = 1 ;\n ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/pr910.v:17: Unsupported: Ignoring delay on this delayed statement.\n #10 state = 0 ;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/pr910.v:18: Unsupported: Ignoring delay on this delayed statement.\n #10 state = 1 ;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/pr910.v:19: Unsupported: Ignoring delay on this delayed statement.\n #10 state = 0 ;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/pr910.v:20: Unsupported: Ignoring delay on this delayed statement.\n #10 $finish(0);\n ^\n%Error: Exiting due to 2 error(s), 5 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module ADDERXY( cin, cout, b, sum, x, y );
    input cin, b, x, y;
    output cout, sum;
    reg [1:0] total ;

    assign sum = total[0] ;
    assign cout = total[1] ;

    always @ (x or y or b or cin)
	begin
	    total = ( x & y ) + b + cin ;
	end
endmodule
module ADDERXY( cin, cout, b, sum, x, y );

    input cin, b, x, y;
    output cout, sum;
    reg [1:0] total ;

    assign sum = total[0] ;
    assign cout = total[1] ;

    always @ (x or y or b or cin)
	begin
	    total = ( x & y ) + b + cin ;
	end
endmodule