data/full_repos/permissive/117026779/src/VGA.v
1: b"%Error: data/full_repos/permissive/117026779/src/VGA.v:93: syntax error, unexpected '(', expecting IDENTIFIER\n    .clk(clk),\n    ^\n%Error: Exiting due to 1 error(s)\n"
module PixelRender
(
    input wire  enable,
    input wire  [31:0] hcount,
    input wire  [`PIXEL_WIDTH-1:0] pixels,
    output wire [`RGB_RESOLUTION-1:0] r,
    output wire [`RGB_RESOLUTION-1:0] g,
    output wire [`RGB_RESOLUTION-1:0] b,
    input wire [2:0] text,
    input wire [2:0] background
);

assign r = (pixels[7-hcount[2:0]] && enable) ? { text[0], text[0], text[0], text[0] } : { background[0], background[0], background[0], background[0] };
assign g = (pixels[7-hcount[2:0]] && enable) ? { text[1], text[1], text[1], text[1] } : { background[1], background[1], background[1], background[1] };
assign b = (pixels[7-hcount[2:0]] && enable) ? { text[2], text[2], text[2], text[2] } : { background[2], background[2], background[2], background[2] };

endmodule
module PixelRender
(
    input wire  enable,
    input wire  [31:0] hcount,
    input wire  [`PIXEL_WIDTH-1:0] pixels,
    output wire [`RGB_RESOLUTION-1:0] r,
    output wire [`RGB_RESOLUTION-1:0] g,
    output wire [`RGB_RESOLUTION-1:0] b,
    input wire [2:0] text,
    input wire [2:0] background
);


assign r = (pixels[7-hcount[2:0]] && enable) ? { text[0], text[0], text[0], text[0] } : { background[0], background[0], background[0], background[0] };
assign g = (pixels[7-hcount[2:0]] && enable) ? { text[1], text[1], text[1], text[1] } : { background[1], background[1], background[1], background[1] };
assign b = (pixels[7-hcount[2:0]] && enable) ? { text[2], text[2], text[2], text[2] } : { background[2], background[2], background[2], background[2] };

endmodule