data/full_repos/permissive/21702465/source/TRNG_RO.v
1: b"%Error: data/full_repos/permissive/21702465/source/TRNG_RO.v:25: syntax error, unexpected rand, expecting '['\n    output wire rand\n                ^~~~\n%Error: data/full_repos/permissive/21702465/source/TRNG_RO.v:32: syntax error, unexpected genvar\ngenvar k;\n^~~~~~\n%Error: data/full_repos/permissive/21702465/source/TRNG_RO.v:45: syntax error, unexpected IDENTIFIER\nXOR_tree #(N, logN ) XOR_tree1(\n^~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module TRNG_RO #(parameter n = 3, N = 32, logN = 5)(
    input wire clk,
    input wire rst,
    output wire rand
    );
	 
(* OPTIMIZE = "OFF" *)

wire [N-1:0] R;	 

genvar k;
generate
for (k = N-1; k >= 0; k = k - 1)
begin: Ring
	Osc_Ring #(n) Ring( 
    .clk(clk),
	 .rst(rst),
    .out(R[k])
    );
end
endgenerate

wire randD;
XOR_tree #(N, logN ) XOR_tree1(
    .in(R),
    .out(randD)
    );
	 
FD Capture (
	.Q (rand),
	.C (clk),
	.D (randD));


endmodule
module TRNG_RO #(parameter n = 3, N = 32, logN = 5)(
    input wire clk,
    input wire rst,
    output wire rand
    );

	 
(* OPTIMIZE = "OFF" *)

wire [N-1:0] R;	 

genvar k;
generate
for (k = N-1; k >= 0; k = k - 1)
begin: Ring
	Osc_Ring #(n) Ring( 
    .clk(clk),
	 .rst(rst),
    .out(R[k])
    );
end
endgenerate

wire randD;
XOR_tree #(N, logN ) XOR_tree1(
    .in(R),
    .out(randD)
    );
	 
FD Capture (
	.Q (rand),
	.C (clk),
	.D (randD));


endmodule