data/full_repos/permissive/162571337/multiplers/8x8_unsigned/pareto_pwr_mse/mul8u_17C8.v
[Errno 2] No such file or directory: 'preprocess.output'
data/verilator_xmls/45ab9704-a1ab-4ef4-ad63-6ed47863868e.xml
module mul8u_17C8 (
    A,
    B,
    O
);

input [7:0] A;
input [7:0] B;
output [15:0] O;

wire sig_181,sig_223,sig_267,sig_268,sig_303,sig_308,sig_328;

assign sig_181 = B[5] & A[6];
assign sig_223 = B[7] & A[5];
assign sig_267 = B[6] & A[7];
assign sig_268 = B[7] & A[7];
assign sig_303 = sig_267 | B[7];
assign sig_308 = B[6] & A[6];
assign sig_328 = B[7] ^ sig_303;

assign O[15] = sig_268;
assign O[14] = sig_308;
assign O[13] = sig_328;
assign O[12] = sig_223;
assign O[11] = sig_181;
assign O[10] = sig_181;
assign O[9] = sig_223;
assign O[8] = 1'b0;
assign O[7] = 1'b0;
assign O[6] = 1'b0;
assign O[5] = 1'b0;
assign O[4] = 1'b0;
assign O[3] = 1'b0;
assign O[2] = 1'b0;
assign O[1] = 1'b0;
assign O[0] = 1'b0;

endmodule
module mul8u_17C8 (
    A,
    B,
    O
);


input [7:0] A;
input [7:0] B;
output [15:0] O;

wire sig_181,sig_223,sig_267,sig_268,sig_303,sig_308,sig_328;

assign sig_181 = B[5] & A[6];
assign sig_223 = B[7] & A[5];
assign sig_267 = B[6] & A[7];
assign sig_268 = B[7] & A[7];
assign sig_303 = sig_267 | B[7];
assign sig_308 = B[6] & A[6];
assign sig_328 = B[7] ^ sig_303;

assign O[15] = sig_268;
assign O[14] = sig_308;
assign O[13] = sig_328;
assign O[12] = sig_223;
assign O[11] = sig_181;
assign O[10] = sig_181;
assign O[9] = sig_223;
assign O[8] = 1'b0;
assign O[7] = 1'b0;
assign O[6] = 1'b0;
assign O[5] = 1'b0;
assign O[4] = 1'b0;
assign O[3] = 1'b0;
assign O[2] = 1'b0;
assign O[1] = 1'b0;
assign O[0] = 1'b0;

endmodule