data/full_repos/permissive/181665138/verilog/capitolo_iii/D_flip_flop_Reg.v
 line:46: before: "=="
1: b'%Error: data/full_repos/permissive/181665138/verilog/capitolo_iii/D_flip_flop_Reg.v:9: Cannot find include file: Clock.v\n`include "Clock.v" \n         ^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/181665138/verilog/capitolo_iii,data/full_repos/permissive/181665138/Clock.v\n             data/full_repos/permissive/181665138/verilog/capitolo_iii,data/full_repos/permissive/181665138/Clock.v.v\n             data/full_repos/permissive/181665138/verilog/capitolo_iii,data/full_repos/permissive/181665138/Clock.v.sv\n             Clock.v\n             Clock.v.v\n             Clock.v.sv\n             obj_dir/Clock.v\n             obj_dir/Clock.v.v\n             obj_dir/Clock.v.sv\n%Error: data/full_repos/permissive/181665138/verilog/capitolo_iii/D_flip_flop_Reg.v:23: syntax error, unexpected ==, expecting \')\' or \',\' or or\n    always @(reset_ == 0) #1 D_EDGE <= 0;\n                    ^~\n%Warning-STMTDLY: data/full_repos/permissive/181665138/verilog/capitolo_iii/D_flip_flop_Reg.v:25: Unsupported: Ignoring delay on this delayed statement.\n    always @(posedge c) if (reset_ == 1) #3 D_EDGE <= (c == 1) ? d:D_EDGE;\n                                         ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 2 error(s), 1 warning(s)\n'
module D_flip_flop_Reg(d, q, reset_);
    input reset_;
    input d;
    output q;

    wire c;
    Clock clock(c);

    reg D_EDGE;

    assign q = D_EDGE;

    always @(reset_ == 0) #1 D_EDGE <= 0;

    always @(posedge c) if (reset_ == 1) #3 D_EDGE <= (c == 1) ? d:D_EDGE;
    
endmodule
module D_flip_flop_Reg(d, q, reset_);

    input reset_;
    input d;
    output q;

    wire c;
    Clock clock(c);

    reg D_EDGE;

    assign q = D_EDGE;

    always @(reset_ == 0) #1 D_EDGE <= 0;

    always @(posedge c) if (reset_ == 1) #3 D_EDGE <= (c == 1) ? d:D_EDGE;
    
endmodule