data/full_repos/permissive/203526788/GoBoard/Blinker/Blinker.v
data/verilator_xmls/ebff7fce-ad4b-4d98-9491-0068ed3e37ad.xml
module Blinker #(parameter FREQ = 1) (
	input CLK,
	output reg outPin
	);


reg [32:0] count;





always @(posedge CLK)
begin
	if (count == 25000000 / FREQ / 2 -1)
	begin
		outPin= ~outPin;
		count <= 0;
	end
	else
	begin
		count <= count + 1;
	end
end

endmodule
module Blinker #(parameter FREQ = 1) (
	input CLK,
	output reg outPin
	);



reg [32:0] count;





always @(posedge CLK)
begin
	if (count == 25000000 / FREQ / 2 -1)
	begin
		outPin= ~outPin;
		count <= 0;
	end
	else
	begin
		count <= count + 1;
	end
end

endmodule