data/full_repos/permissive/143278/ivltests/signed4.v
data/verilator_xmls/45ca722a-391a-4c64-beb9-40e9aefa3ed6.xml
module signed1();

   reg [7:0] x;
   reg signed [7:0] y;

   initial
     begin
	x = 8'b0000_0011;
	y = 8'b1111_1101;

	$display("x = %0d (should be 3)",x);
	$display("y = %0d (should be -3)",y);

	x = y;
	$display("x = %0d (should be 253)",x);


     end

endmodule
module signed1();


   reg [7:0] x;
   reg signed [7:0] y;

   initial
     begin
	x = 8'b0000_0011;
	y = 8'b1111_1101;

	$display("x = %0d (should be 3)",x);
	$display("y = %0d (should be -3)",y);

	x = y;
	$display("x = %0d (should be 253)",x);


     end

endmodule