data/full_repos/permissive/18770871/sign_ext_8_16.v
data/verilator_xmls/232e0c41-3391-462e-818f-c612d6850c3d.xml
module sign_ext_8_16(
  imm_8, imm_16);
  
  input [7:0] imm_8;
  output[15:0] imm_16;
  
  assign imm_16 = {{8{imm_8[7]}}, imm_8};
endmodule
module sign_ext_8_16(
  imm_8, imm_16);

  
  input [7:0] imm_8;
  output[15:0] imm_16;
  
  assign imm_16 = {{8{imm_8[7]}}, imm_8};
endmodule