data/full_repos/permissive/177334035/Source/Multiplexer.v
data/verilator_xmls/cca1b5ff-775f-42cd-99b4-86cf1604143a.xml
module Multiplexer
(
   input [7:0] input_1,
   input [7:0] input_2,
   input sel,
   output reg[7:0] output_1
);

	always@(*) begin
	
		if (sel == 0)
			output_1 = input_1;
		
		else
			output_1 = input_2;
	end

endmodule
module Multiplexer
(
   input [7:0] input_1,
   input [7:0] input_2,
   input sel,
   output reg[7:0] output_1
);


	always@(*) begin
	
		if (sel == 0)
			output_1 = input_1;
		
		else
			output_1 = input_2;
	end

endmodule