data/full_repos/permissive/143278/ivltests/pr632.v
1: b'%Error: data/full_repos/permissive/143278/ivltests/pr632.v:8: Unsupported or unknown PLI call: $monitor\n    $monitor ("a1[0]=%b",a1[0]);\n    ^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/pr632.v:11: Unsupported: Ignoring delay on this delayed statement.\n           #1;\n           ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 error(s), 1 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module test;

reg [15:0] a1;

initial
  begin
    $monitor ("a1[0]=%b",a1[0]);
    for (a1 = 16'h01; a1 != 16'h1f; a1 = a1 + 1)
        begin
           #1;
        end
  end
endmodule
module test;


reg [15:0] a1;

initial
  begin
    $monitor ("a1[0]=%b",a1[0]);
    for (a1 = 16'h01; a1 != 16'h1f; a1 = a1 + 1)
        begin
           #1;
        end
  end
endmodule