data/full_repos/permissive/102870077/engine/static/school_mips/irq/sm_ram.v
None: at end of input
1: b'%Warning-WIDTH: data/full_repos/permissive/102870077/engine/static/school_mips/irq/sm_ram.v:15: Bit extraction of array[63:0] requires 6 bit index, not 30 bits.\n                                                                                              : ... In instance sm_ram\n    assign rd = ram [a[31:2]];\n                    ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/102870077/engine/static/school_mips/irq/sm_ram.v:19: Bit extraction of array[63:0] requires 6 bit index, not 30 bits.\n                                                                                              : ... In instance sm_ram\n            ram[a[31:2]] <= wd;\n               ^\n%Error: Exiting due to 2 warning(s)\n'
module sm_ram
#(
    parameter SIZE = 64
)
(
    input         clk,
    input  [31:0] a,
    input         we,
    input  [31:0] wd,
    output [31:0] rd
);
    reg [31:0] ram [SIZE - 1:0];
    assign rd = ram [a[31:2]];

    always @(posedge clk)
        if (we)
            ram[a[31:2]] <= wd;

endmodule
module sm_ram
#(
    parameter SIZE = 64
)
(
    input         clk,
    input  [31:0] a,
    input         we,
    input  [31:0] wd,
    output [31:0] rd
);

    reg [31:0] ram [SIZE - 1:0];
    assign rd = ram [a[31:2]];

    always @(posedge clk)
        if (we)
            ram[a[31:2]] <= wd;

endmodule