data/full_repos/permissive/193419875/src/ControlUnitMUX.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Warning-WIDTH: data/full_repos/permissive/193419875/src/ControlUnitMUX.v:7: Operator ASSIGN expects 11 bits on the Assign RHS, but Assign RHS\'s CONST \'10\'h0\' generates 10 bits.\n                                                                           : ... In instance ControlUnitMUX\n reg [10:0] zeroData = 10\'b0;\n                       ^~~~~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module ControlUnitMUX
(
	input [10:0] controlInstruction_in,
	input ControlWire,
	output reg [10:0] controlMuxout
);
	reg [10:0] zeroData = 10'b0;

	always @(*)  case (ControlWire)
		0: controlMuxout = zeroData;
		1: controlMuxout = controlInstruction_in;
		default: controlMuxout = controlInstruction_in;
	endcase
endmodule
module ControlUnitMUX
(
	input [10:0] controlInstruction_in,
	input ControlWire,
	output reg [10:0] controlMuxout
);

	reg [10:0] zeroData = 10'b0;

	always @(*)  case (ControlWire)
		0: controlMuxout = zeroData;
		1: controlMuxout = controlInstruction_in;
		default: controlMuxout = controlInstruction_in;
	endcase
endmodule