data/full_repos/permissive/126085346/src/rom.v
data/verilator_xmls/18e90e6f-5611-49c2-9168-18768dbf05d0.xml
module Rom #(
  parameter RAM_WIDTH = 18,
  parameter RAM_DEPTH = 1024,
  parameter INIT_FILE = ""
) (
  input [clogb2(RAM_DEPTH-1)-1:0] addra,
  input clka,
  input ena,
  input oe,
  output [RAM_WIDTH-1:0] douta
);

reg [RAM_WIDTH-1:0] BRAM [RAM_DEPTH-1:0];
reg [RAM_WIDTH-1:0] ram_data = {RAM_WIDTH{1'b0}};


generate
if (INIT_FILE != "") begin: use_init_file
    initial
        $readmemh(INIT_FILE, BRAM, 0, RAM_DEPTH-1);
end
else begin: init_bram_to_zero
    integer ram_index;

    initial
    for (ram_index = 0; ram_index < RAM_DEPTH; ram_index = ram_index + 1)
        BRAM[ram_index] = {RAM_WIDTH{1'b0}};
end
endgenerate

always @(posedge clka)
if (ena) ram_data <= BRAM[addra];


reg [RAM_WIDTH-1:0] douta_reg = {RAM_WIDTH{1'b0}};

always @(posedge clka)
douta_reg <= ram_data;

assign douta = oe ? douta_reg : {RAM_WIDTH{1'bZ}};

function integer clogb2;
  input [31:0] value;
  begin
      value = value - 1;
      for (clogb2 = 0; value > 0; clogb2 = clogb2 + 1) begin
          value = value >> 1;
      end
  end
endfunction

endmodule
module Rom #(
  parameter RAM_WIDTH = 18,
  parameter RAM_DEPTH = 1024,
  parameter INIT_FILE = ""
) (
  input [clogb2(RAM_DEPTH-1)-1:0] addra,
  input clka,
  input ena,
  input oe,
  output [RAM_WIDTH-1:0] douta
);


reg [RAM_WIDTH-1:0] BRAM [RAM_DEPTH-1:0];
reg [RAM_WIDTH-1:0] ram_data = {RAM_WIDTH{1'b0}};


generate
if (INIT_FILE != "") begin: use_init_file
    initial
        $readmemh(INIT_FILE, BRAM, 0, RAM_DEPTH-1);
end
else begin: init_bram_to_zero
    integer ram_index;

    initial
    for (ram_index = 0; ram_index < RAM_DEPTH; ram_index = ram_index + 1)
        BRAM[ram_index] = {RAM_WIDTH{1'b0}};
end
endgenerate

always @(posedge clka)
if (ena) ram_data <= BRAM[addra];


reg [RAM_WIDTH-1:0] douta_reg = {RAM_WIDTH{1'b0}};

always @(posedge clka)
douta_reg <= ram_data;

assign douta = oe ? douta_reg : {RAM_WIDTH{1'bZ}};

function integer clogb2;
  input [31:0] value;
  begin
      value = value - 1;
      for (clogb2 = 0; value > 0; clogb2 = clogb2 + 1) begin
          value = value >> 1;
      end
  end
endfunction

endmodule