data/full_repos/permissive/148324174/HDLBits/Circuits/Multiplexers.v
1: b'%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/Multiplexers.v:7: Duplicate declaration of module: \'top_module\'\nmodule top_module( \n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/Multiplexers.v:1: ... Location of original declaration\nmodule top_module( \n       ^~~~~~~~~~\n                 ... Use "/* verilator lint_off MODDUP */" and lint_on around source to disable this message.\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/Multiplexers.v:28: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/Multiplexers.v:1: ... Location of original declaration\nmodule top_module( \n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/Multiplexers.v:37: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/Multiplexers.v:1: ... Location of original declaration\nmodule top_module( \n       ^~~~~~~~~~\n%Error: Exiting due to 3 warning(s)\n'
module top_module (
    input [1023:0] in,
    input [7:0] sel,
    output [3:0] out
);



    assign out = {in[sel*4+3], in[sel*4+2], in[sel*4+1], in[sel*4+0]};







endmodule
module top_module (
    input [1023:0] in,
    input [7:0] sel,
    output [3:0] out
);




    assign out = {in[sel*4+3], in[sel*4+2], in[sel*4+1], in[sel*4+0]};







endmodule