data/full_repos/permissive/154352170/Stall.v
1: b"%Error: data/full_repos/permissive/154352170/Stall.v:196: syntax error, unexpected type, expecting IDENTIFIER or '[' or do or final\n  output [2:0] type\n               ^~~~\n%Error: data/full_repos/permissive/154352170/Stall.v:203: syntax error, unexpected assign\n  assign type = type_temp;\n  ^~~~~~\n%Error: Exiting due to 2 error(s)\n"
module Type_S(
    input [31:0] IR,
	 output [2:0] type
	 );
	 
	 reg [2:0] type_temp;
	 wire [5:0] Op;
	 wire [5:0] Func;
	 
	 assign type = type_temp;
	 assign Op = IR[31:26];
	 assign Func = IR[5:0];
	 












	 
	 always @ (*) begin
	    
		 if(Op == 6'b000000) begin
		 
		    if(Func == 6'b100001) begin
			    type_temp <= 3'b001;
			 end
			 
			 if(Func == 6'b100011) begin
			    type_temp <= 3'b001;
			 end
			 
			 if(Func == 6'b001000) begin
			    type_temp <= 3'b110;
			 end
			 
			 if(Func == 6'b000000) begin
			    type_temp <= 3'b000;
			 end
			 
		 end
		 
		 else begin
		    
			 if(Op == 6'b001101) begin
			    type_temp <= 3'b010;
			 end
			 
			 if(Op == 6'b100011) begin
			    type_temp <= 3'b100;
			 end
			 
			 if(Op == 6'b101011) begin
			    type_temp <= 3'b101;
			 end
			 
			 if(Op == 6'b000100) begin
			    type_temp <= 3'b011;
			 end
			 
			 if(Op == 6'b001111) begin
			    type_temp <= 3'b010;
			 end
			 
			 if(Op == 6'b000011) begin
			    type_temp <= 3'b111;
			 end
			 
			 if(Op == 6'b111111) begin
			    type_temp <= 3'b011;
			 end
			 
			 if(Op == 6'b011111) begin
			    type_temp <= 3'b001;
			 end
 
       end
	 
	end
	
endmodule
module Type_S(
    input [31:0] IR,
	 output [2:0] type
	 );

	 
	 reg [2:0] type_temp;
	 wire [5:0] Op;
	 wire [5:0] Func;
	 
	 assign type = type_temp;
	 assign Op = IR[31:26];
	 assign Func = IR[5:0];
	 












	 
	 always @ (*) begin
	    
		 if(Op == 6'b000000) begin
		 
		    if(Func == 6'b100001) begin
			    type_temp <= 3'b001;
			 end
			 
			 if(Func == 6'b100011) begin
			    type_temp <= 3'b001;
			 end
			 
			 if(Func == 6'b001000) begin
			    type_temp <= 3'b110;
			 end
			 
			 if(Func == 6'b000000) begin
			    type_temp <= 3'b000;
			 end
			 
		 end
		 
		 else begin
		    
			 if(Op == 6'b001101) begin
			    type_temp <= 3'b010;
			 end
			 
			 if(Op == 6'b100011) begin
			    type_temp <= 3'b100;
			 end
			 
			 if(Op == 6'b101011) begin
			    type_temp <= 3'b101;
			 end
			 
			 if(Op == 6'b000100) begin
			    type_temp <= 3'b011;
			 end
			 
			 if(Op == 6'b001111) begin
			    type_temp <= 3'b010;
			 end
			 
			 if(Op == 6'b000011) begin
			    type_temp <= 3'b111;
			 end
			 
			 if(Op == 6'b111111) begin
			    type_temp <= 3'b011;
			 end
			 
			 if(Op == 6'b011111) begin
			    type_temp <= 3'b001;
			 end
 
       end
	 
	end
	
endmodule