data/full_repos/permissive/212008255/codes/serial_multiplier/serial_multiplier_tb.v
 line:56: before: "for"
1: b'%Warning-STMTDLY: data/full_repos/permissive/212008255/codes/serial_multiplier/serial_multiplier_tb.v:61: Unsupported: Ignoring delay on this delayed statement.\n                #80;\n                ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/212008255/codes/serial_multiplier/serial_multiplier_tb.v:55: Unsupported: Ignoring delay on this delayed statement.\n  #75\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/212008255/codes/serial_multiplier/serial_multiplier_tb.v:67: Unsupported: Ignoring delay on this delayed statement.\n #5 clk=~clk;\n ^\n%Error: data/full_repos/permissive/212008255/codes/serial_multiplier/serial_multiplier_tb.v:38: Cannot find file containing module: \'serial_multiplier\'\n serial_multiplier uut (\n ^~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/212008255/codes/serial_multiplier,data/full_repos/permissive/212008255/serial_multiplier\n             data/full_repos/permissive/212008255/codes/serial_multiplier,data/full_repos/permissive/212008255/serial_multiplier.v\n             data/full_repos/permissive/212008255/codes/serial_multiplier,data/full_repos/permissive/212008255/serial_multiplier.sv\n             serial_multiplier\n             serial_multiplier.v\n             serial_multiplier.sv\n             obj_dir/serial_multiplier\n             obj_dir/serial_multiplier.v\n             obj_dir/serial_multiplier.sv\n%Warning-WIDTH: data/full_repos/permissive/212008255/codes/serial_multiplier/serial_multiplier_tb.v:59: Operator ASSIGNDLY expects 4 bits on the Assign RHS, but Assign RHS\'s VARREF \'k\' generates 32 bits.\n                                                                                                      : ... In instance serial_multiplier_tb\n                a <= k; \n                  ^~\n%Warning-WIDTH: data/full_repos/permissive/212008255/codes/serial_multiplier/serial_multiplier_tb.v:60: Operator ASSIGNDLY expects 4 bits on the Assign RHS, but Assign RHS\'s VARREF \'j\' generates 32 bits.\n                                                                                                      : ... In instance serial_multiplier_tb\n                b <= j;\n                  ^~\n%Error: Exiting due to 1 error(s), 5 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module serial_multiplier_tb;


	reg [3:0] a;
	reg [3:0] b;
	reg clk;


	wire [7:0] s;
	
	wire [3:0] i;


	serial_multiplier uut (
		.a(a), 
		.b(b), 
		.clk(clk), 
		.s(s),
		.i(i)
		
	);

	initial begin
		a = 0;
		b = 0;
		clk = 0;

	end
	 integer k,j;
    initial begin
	 #75
        for(k=1;k <=15;k = k+1)
            for(j=1;j <=15;j = j+1) 
            begin
                a <= k; 
                b <= j;
                #80;
            end     
    end  
	
	
	always begin
	#5 clk=~clk;
	end
      
endmodule
module serial_multiplier_tb;



	reg [3:0] a;
	reg [3:0] b;
	reg clk;


	wire [7:0] s;
	
	wire [3:0] i;


	serial_multiplier uut (
		.a(a), 
		.b(b), 
		.clk(clk), 
		.s(s),
		.i(i)
		
	);

	initial begin
		a = 0;
		b = 0;
		clk = 0;

	end
	 integer k,j;
    initial begin
	 #75
        for(k=1;k <=15;k = k+1)
            for(j=1;j <=15;j = j+1) 
            begin
                a <= k; 
                b <= j;
                #80;
            end     
    end  
	
	
	always begin
	#5 clk=~clk;
	end
      
endmodule