data/full_repos/permissive/162571337/adders/12_unsigned/pareto_pwr_mae/add12u_1SA.v
data/verilator_xmls/d663a2fc-f0a9-4262-b574-8e87d86ed841.xml
module PDKGENFAX1( input A, input B, input C, output YS, output YC );
    assign YS = (A ^ B) ^ C;
    assign YC = (A & B) | (B & C) | (A & C);
endmodule
module PDKGENFAX1( input A, input B, input C, output YS, output YC );

    assign YS = (A ^ B) ^ C;
    assign YC = (A & B) | (B & C) | (A & C);
endmodule