data/full_repos/permissive/194781874/special_feature.v
 line:8: before: "="
data/verilator_xmls/adb98eb5-d4af-4dbb-bf98-1616d96ed52a.xml
module special_feature(
    input CLK,
    input ENABLE,
    input INCREASE,
    input DECREASE,
    output reg [4:0] OUT = 5'd10
    );
    
    always @ (posedge CLK) begin
        if (INCREASE == 1 && ENABLE == 1) OUT <= (OUT < 5'd20) ? OUT + 1 : OUT;
        else if (DECREASE == 1 && ENABLE == 1) OUT <= (OUT > 5'd0) ? OUT - 1 : OUT;
    end            
endmodule
module special_feature(
    input CLK,
    input ENABLE,
    input INCREASE,
    input DECREASE,
    output reg [4:0] OUT = 5'd10
    );

    
    always @ (posedge CLK) begin
        if (INCREASE == 1 && ENABLE == 1) OUT <= (OUT < 5'd20) ? OUT + 1 : OUT;
        else if (DECREASE == 1 && ENABLE == 1) OUT <= (OUT > 5'd0) ? OUT - 1 : OUT;
    end            
endmodule