data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v
1: b'%Warning-WIDTH: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:109: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS\'s CONST \'8\'hf\' generates 8 bits.\n                                                                                            : ... In instance digitalClock.seg\n        an = 8\'b1111;\n           ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:110: Bit extraction of var[7:0] requires 3 bit index, not 2 bits.\n                                                                                            : ... In instance digitalClock.seg\n        an[clkcount] = aen[clkcount];\n                          ^\n%Warning-WIDTHCONCAT: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:30: Unsized numbers/parameters not allowed in concatenations.\n                                                                                                 : ... In instance digitalClock\n    wire [3:0] H1_load={\'b0,SW[13:11]};\n                        ^~~\n%Warning-WIDTHCONCAT: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:30: Unsized numbers/parameters not allowed in replications.\n                                                                                                 : ... In instance digitalClock\n    wire [3:0] H1_load={\'b0,SW[13:11]};\n                           ^\n%Warning-WIDTHCONCAT: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:32: Unsized numbers/parameters not allowed in concatenations.\n                                                                                                 : ... In instance digitalClock\n    wire [3:0] M1_load={\'b0,SW[6:4]};\n                        ^~~\n%Warning-WIDTHCONCAT: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:32: Unsized numbers/parameters not allowed in replications.\n                                                                                                 : ... In instance digitalClock\n    wire [3:0] M1_load={\'b0,SW[6:4]};\n                           ^\n%Error: Exiting due to 6 warning(s)\n'
module _74LS163(
input CP,
input CR_n,
input LD_n,
input EP,
input ET,
input [3:0] D,
output reg [3:0] Q
);

always@(posedge CP)
begin
if(~CR_n) Q<=0;
else if(~LD_n) Q<=D;
else if(LD_n && EP && ET) Q<=Q+1;
end

endmodule
module _74LS163(
input CP,
input CR_n,
input LD_n,
input EP,
input ET,
input [3:0] D,
output reg [3:0] Q
);


always@(posedge CP)
begin
if(~CR_n) Q<=0;
else if(~LD_n) Q<=D;
else if(LD_n && EP && ET) Q<=Q+1;
end

endmodule