data/full_repos/permissive/181738725/wavetrace/verilog/lib/misc/util.vh
 line:20: before: "function"
data/verilator_xmls/29445f3b-8361-49e4-98f3-855415dc67de.xml
function automatic [31:0] clog2(input integer x);
  integer       tmp, res;
  begin
    tmp = 1;
    res = 0;
    while(tmp < x) begin
      tmp = tmp * 2;
      res = res + 1;
    end
    clog2 = res;
  end
endfunction
function automatic [31:0] clog2(input integer x);

  integer       tmp, res;
  begin
    tmp = 1;
    res = 0;
    while(tmp < x) begin
      tmp = tmp * 2;
      res = res + 1;
    end
    clog2 = res;
  end
endfunction