data/full_repos/permissive/155064391/demo/iceblink_example.v
 line:9: before: ")"
1: b"%Error: data/full_repos/permissive/155064391/demo/iceblink_example.v:9: syntax error, unexpected ')', expecting '['\n);\n^\n%Error: data/full_repos/permissive/155064391/demo/iceblink_example.v:14: syntax error, unexpected IDENTIFIER\n   CLK_DIVIDER_3P3MHz CLK_DIV (\n   ^~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module CLK_DIVIDER_3P3MHz (
   input        CLK_3P3MHz,
   output       LED_CLOCK
);
   reg [18:0] COUNTER = 19'b0 ;

   always @(posedge CLK_3P3MHz)
      COUNTER <= COUNTER + 1;

   assign LED_CLOCK = COUNTER[18];
endmodule
module CLK_DIVIDER_3P3MHz (
   input        CLK_3P3MHz,
   output       LED_CLOCK
);

   reg [18:0] COUNTER = 19'b0 ;

   always @(posedge CLK_3P3MHz)
      COUNTER <= COUNTER + 1;

   assign LED_CLOCK = COUNTER[18];
endmodule