data/full_repos/permissive/148324174/HDLBits/Circuits/KarnaughMap.v
1: b'%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/KarnaughMap.v:10: Duplicate declaration of module: \'top_module\'\nmodule top_module(\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/KarnaughMap.v:1: ... Location of original declaration\nmodule top_module(\n       ^~~~~~~~~~\n                 ... Use "/* verilator lint_off MODDUP */" and lint_on around source to disable this message.\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/KarnaughMap.v:20: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/KarnaughMap.v:1: ... Location of original declaration\nmodule top_module(\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/KarnaughMap.v:32: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/KarnaughMap.v:1: ... Location of original declaration\nmodule top_module(\n       ^~~~~~~~~~\n%Error: Exiting due to 3 warning(s)\n'
module top_module (
    input c,
    input d,
    output [3:0] mux_in
);
    




    assign mux_in[0] = (c ? 1 : (d ? 1 : 0));
    assign mux_in[1] = 0;
    assign mux_in[2] = d ? 0 : 1;
    assign mux_in[3] = c ? (d ? 1 : 0) : 0;
    
endmodule
module top_module (
    input c,
    input d,
    output [3:0] mux_in
);

    




    assign mux_in[0] = (c ? 1 : (d ? 1 : 0));
    assign mux_in[1] = 0;
    assign mux_in[2] = d ? 0 : 1;
    assign mux_in[3] = c ? (d ? 1 : 0) : 0;
    
endmodule