data/full_repos/permissive/214278225/1_7SegmentDisplay/display1/SevenSegOneDig.v
data/verilator_xmls/9fef5a03-fa91-4200-8e92-800077f4353d.xml
module SevenSegOneDig(in, sevenSeg);

input [3:0] in;
output reg [7:0] sevenSeg;

always @(*) begin
	sevenSeg = 8'b00000010;
	case(in[3:0])
		 0: sevenSeg = 8'b00000010;
		 1: sevenSeg = 8'b10011110;
		 2: sevenSeg = 8'b00100100;
		 3: sevenSeg = 8'b00001100;
		 default:sevenSeg = 8'b00000010;
	endcase
end

endmodule
module SevenSegOneDig(in, sevenSeg);


input [3:0] in;
output reg [7:0] sevenSeg;

always @(*) begin
	sevenSeg = 8'b00000010;
	case(in[3:0])
		 0: sevenSeg = 8'b00000010;
		 1: sevenSeg = 8'b10011110;
		 2: sevenSeg = 8'b00100100;
		 3: sevenSeg = 8'b00001100;
		 default:sevenSeg = 8'b00000010;
	endcase
end

endmodule