data/full_repos/permissive/216210370/soc/gpio0.v
1: b'%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case expression, but Case expression\'s SEL generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_SW_DIR_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_SW_HW_CTRL_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_INT_FUNC_EN_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_INT_MASK_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_INT_TYPE_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_INT_POL_SEL_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_INT_STATUS_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_RAW_INT_STATUS_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_DEBOUNCE_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_INT_LEVEL_SYNC_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_EXT_DATA_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Error: Exiting due to 12 warning(s)\n'
module gpio0_sec_top(
  gpio0_etb_trig,
  gpio_ext_porta,
  gpio_intr_flag,
  gpio_intrclk_en,
  gpio_porta_ddr,
  gpio_porta_dr,
  paddr,
  pclk,
  pclk_intr,
  penable,
  pprot,
  prdata,
  presetn,
  psel,
  pwdata,
  pwrite,
  tipc_gpio0_trust
);
input   [31:0]  gpio_ext_porta;  
input   [31:0]  paddr;           
input           pclk;            
input           pclk_intr;       
input           penable;         
input   [2 :0]  pprot;           
input           presetn;         
input           psel;            
input   [31:0]  pwdata;          
input           pwrite;          
input           tipc_gpio0_trust; 
output  [31:0]  gpio0_etb_trig;  
output          gpio_intr_flag;  
output          gpio_intrclk_en; 
output  [31:0]  gpio_porta_ddr;  
output  [31:0]  gpio_porta_dr;   
output  [31:0]  prdata;          
wire    [31:0]  gpio0_etb_trig;  
wire    [31:0]  gpio_ext_porta;  
wire            gpio_intr_flag;  
wire            gpio_intrclk_en; 
wire    [31:0]  gpio_porta_ddr;  
wire    [31:0]  gpio_porta_dr;   
wire    [31:0]  i_prdata;        
wire            i_psel;          
wire            i_pwrite;        
wire    [31:0]  paddr;           
wire            pclk;            
wire            pclk_intr;       
wire            penable;         
wire    [2 :0]  pprot;           
wire    [31:0]  prdata;          
wire            presetn;         
wire            psel;            
wire    [31:0]  pwdata;          
wire            pwrite;          
wire            tipc_gpio0_trust; 
gpio0  x_gpio0 (
  .gpio0_etb_trig  (gpio0_etb_trig ),
  .gpio_ext_porta  (gpio_ext_porta ),
  .gpio_intr_flag  (gpio_intr_flag ),
  .gpio_intrclk_en (gpio_intrclk_en),
  .gpio_porta_ddr  (gpio_porta_ddr ),
  .gpio_porta_dr   (gpio_porta_dr  ),
  .paddr           (paddr          ),
  .pclk            (pclk           ),
  .pclk_intr       (pclk_intr      ),
  .penable         (penable        ),
  .prdata          (i_prdata       ),
  .presetn         (presetn        ),
  .psel            (i_psel         ),
  .pwdata          (pwdata         ),
  .pwrite          (i_pwrite       )
);
assign prdata[31:0] = i_prdata[31:0];
assign i_pwrite = pwrite;
assign i_psel = psel;
endmodule
module gpio0_sec_top(
  gpio0_etb_trig,
  gpio_ext_porta,
  gpio_intr_flag,
  gpio_intrclk_en,
  gpio_porta_ddr,
  gpio_porta_dr,
  paddr,
  pclk,
  pclk_intr,
  penable,
  pprot,
  prdata,
  presetn,
  psel,
  pwdata,
  pwrite,
  tipc_gpio0_trust
);

input   [31:0]  gpio_ext_porta;  
input   [31:0]  paddr;           
input           pclk;            
input           pclk_intr;       
input           penable;         
input   [2 :0]  pprot;           
input           presetn;         
input           psel;            
input   [31:0]  pwdata;          
input           pwrite;          
input           tipc_gpio0_trust; 
output  [31:0]  gpio0_etb_trig;  
output          gpio_intr_flag;  
output          gpio_intrclk_en; 
output  [31:0]  gpio_porta_ddr;  
output  [31:0]  gpio_porta_dr;   
output  [31:0]  prdata;          
wire    [31:0]  gpio0_etb_trig;  
wire    [31:0]  gpio_ext_porta;  
wire            gpio_intr_flag;  
wire            gpio_intrclk_en; 
wire    [31:0]  gpio_porta_ddr;  
wire    [31:0]  gpio_porta_dr;   
wire    [31:0]  i_prdata;        
wire            i_psel;          
wire            i_pwrite;        
wire    [31:0]  paddr;           
wire            pclk;            
wire            pclk_intr;       
wire            penable;         
wire    [2 :0]  pprot;           
wire    [31:0]  prdata;          
wire            presetn;         
wire            psel;            
wire    [31:0]  pwdata;          
wire            pwrite;          
wire            tipc_gpio0_trust; 
gpio0  x_gpio0 (
  .gpio0_etb_trig  (gpio0_etb_trig ),
  .gpio_ext_porta  (gpio_ext_porta ),
  .gpio_intr_flag  (gpio_intr_flag ),
  .gpio_intrclk_en (gpio_intrclk_en),
  .gpio_porta_ddr  (gpio_porta_ddr ),
  .gpio_porta_dr   (gpio_porta_dr  ),
  .paddr           (paddr          ),
  .pclk            (pclk           ),
  .pclk_intr       (pclk_intr      ),
  .penable         (penable        ),
  .prdata          (i_prdata       ),
  .presetn         (presetn        ),
  .psel            (i_psel         ),
  .pwdata          (pwdata         ),
  .pwrite          (i_pwrite       )
);
assign prdata[31:0] = i_prdata[31:0];
assign i_pwrite = pwrite;
assign i_psel = psel;
endmodule