data/full_repos/permissive/16507090/pcm/buspcm.v
 line:3: before: "data_resolution"
1: b'%Error: data/full_repos/permissive/16507090/pcm/buspcm.v:1: Cannot find include file: pcm.v\n`include "pcm.v" \n         ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/16507090/pcm,data/full_repos/permissive/16507090/pcm.v\n             data/full_repos/permissive/16507090/pcm,data/full_repos/permissive/16507090/pcm.v.v\n             data/full_repos/permissive/16507090/pcm,data/full_repos/permissive/16507090/pcm.v.sv\n             pcm.v\n             pcm.v.v\n             pcm.v.sv\n             obj_dir/pcm.v\n             obj_dir/pcm.v.v\n             obj_dir/pcm.v.sv\n%Error: data/full_repos/permissive/16507090/pcm/buspcm.v:21: syntax error, unexpected output, expecting \')\' or \',\'\n output pcm_out\n ^~~~~~\n%Error: data/full_repos/permissive/16507090/pcm/buspcm.v:24: syntax error, unexpected wire, expecting IDENTIFIER or do or final\n wire [bus_max_devices-1:0] client_source_addr,\n ^~~~\n%Error: data/full_repos/permissive/16507090/pcm/buspcm.v:25: syntax error, unexpected wire, expecting IDENTIFIER or do or final\n wire client_read_next,\n ^~~~\n%Error: data/full_repos/permissive/16507090/pcm/buspcm.v:26: syntax error, unexpected wire, expecting IDENTIFIER or do or final\n wire client_input_buffer_empty,\n ^~~~\n%Error: data/full_repos/permissive/16507090/pcm/buspcm.v:27: syntax error, unexpected wire, expecting IDENTIFIER or do or final\n wire client_input_buffer_full,\n ^~~~\n%Error: data/full_repos/permissive/16507090/pcm/buspcm.v:30: syntax error, unexpected \'#\', expecting \',\' or \';\'\n #(\n ^\n%Error: data/full_repos/permissive/16507090/pcm/buspcm.v:51: syntax error, unexpected IDENTIFIER\n PCM\n ^~~\n%Error: Exiting due to 8 error(s)\n'
module BusPCM
#(

	parameter bus_width=32,
	parameter bus_max_devices=16,
	parameter bus_buffer_size=1,
	parameter device_id=1,
	parameter data_resolution=8
)
(

	input clk,
	inout [bus_width-1:0] bus_data,
	inout [bus_max_devices-1:0] bus_receiver,
	inout [bus_max_devices-1:0] bus_write_request,
	inout [bus_max_devices-1:0] bus_buffer_full,
	input [bus_max_devices-1:0] bus_voice

	output pcm_out
);
	wire [bus_width-1:0] client_data_in,
	wire [bus_max_devices-1:0] client_source_addr,
	wire client_read_next,
	wire client_input_buffer_empty,
	wire client_input_buffer_full,

	BusReader 
	#(
		.bus_width(bus_width),	
		.bus_max_devices(bus_max_devices),
		.bus_buffer_size(bus_buffer_size),
		.device_id(device_id)
	) reader
	(
		clk,
		bus_data,
		bus_receiver,
		bus_buffer_full,
		bus_voice,
		client_data_in,
		client_source_addr,
		client_read_next,
		client_input_buffer_empty,
		client_input_buffer_full
	);

	reg [data_resolution-1:0] pcm_in;

	PCM
	#(
		.data_resolution(data_resolution),
	)
	{
		pcm_in,
		clk,
		pcm_out
	};

	always @(posedge clk) begin
		if {~client_input_buffer_empty) begin
			pcm_in<=bus_data;
			bus_next<=1;
		end
		else begin
			bus_next<=0;
		end
	end
endmodule
module BusPCM
#(

	parameter bus_width=32,
	parameter bus_max_devices=16,
	parameter bus_buffer_size=1,
	parameter device_id=1,
	parameter data_resolution=8
)
(

	input clk,
	inout [bus_width-1:0] bus_data,
	inout [bus_max_devices-1:0] bus_receiver,
	inout [bus_max_devices-1:0] bus_write_request,
	inout [bus_max_devices-1:0] bus_buffer_full,
	input [bus_max_devices-1:0] bus_voice

	output pcm_out
);

	wire [bus_width-1:0] client_data_in,
	wire [bus_max_devices-1:0] client_source_addr,
	wire client_read_next,
	wire client_input_buffer_empty,
	wire client_input_buffer_full,

	BusReader 
	#(
		.bus_width(bus_width),	
		.bus_max_devices(bus_max_devices),
		.bus_buffer_size(bus_buffer_size),
		.device_id(device_id)
	) reader
	(
		clk,
		bus_data,
		bus_receiver,
		bus_buffer_full,
		bus_voice,
		client_data_in,
		client_source_addr,
		client_read_next,
		client_input_buffer_empty,
		client_input_buffer_full
	);

	reg [data_resolution-1:0] pcm_in;

	PCM
	#(
		.data_resolution(data_resolution),
	)
	{
		pcm_in,
		clk,
		pcm_out
	};

	always @(posedge clk) begin
		if {~client_input_buffer_empty) begin
			pcm_in<=bus_data;
			bus_next<=1;
		end
		else begin
			bus_next<=0;
		end
	end
endmodule