data/full_repos/permissive/118252043/rtl/vga_controller.v
data/verilator_xmls/d878efa9-b12d-4019-9209-d2665e9c1c52.xml
module vga_controller(
		                  input wire       i_clk_25MHz,
		                  input wire [2:0] i_rgb,
		                  output wire      o_hsync,
		                  output wire      o_vsync,
		                  output reg       o_red,
		                  output reg       o_green,
		                  output reg       o_blue,
		                  output reg [9:0] o_x,
		                  output reg [9:0] o_y
		                  );



   parameter ACTIVE_H_VIDEO = 640;
   parameter ACTIVE_V_VIDEO = 480;
   parameter HFP = 16;
   parameter H_PULSE = 96;
   parameter HBP = 48;
   parameter VFP = 10;
   parameter V_PULSE = 2;
   parameter VBP = 33;
   parameter BLACK_H = HFP + H_PULSE + HBP;
   parameter BLACK_V = VFP + V_PULSE + VBP;
   parameter H_PIXELS = BLACK_H + ACTIVE_H_VIDEO;
   parameter V_LINES = BLACK_V + ACTIVE_V_VIDEO;





   reg [9:0]                           h_counter;
   reg [9:0]                           v_counter;


   initial begin
      o_x = 0;
      o_y = 0;
      o_red = 0;
      o_green = 0;
      o_blue = 0;
      h_counter = 0;
      v_counter = 0;
   end
   always @(posedge i_clk_25MHz)
     begin

	      if (h_counter < H_PIXELS - 1)
	        h_counter <= h_counter + 1;
	      else




	        begin
	           h_counter <= 0;
	           if (v_counter < V_LINES - 1)
	             v_counter <= v_counter + 1;
	           else
	             v_counter <= 0;
	        end
     end






   wire active_video;

   assign o_hsync = (h_counter >= HFP && h_counter < HFP + H_PULSE) ? 0:1;
   assign o_vsync = (v_counter >= VFP && v_counter < VFP + V_PULSE) ? 0:1;
   assign active_video = (h_counter >= HFP + H_PULSE + HBP && v_counter >= VFP + V_PULSE + VBP) ? 1:0;











   always @(posedge i_clk_25MHz) begin
	    if (active_video == 1) begin
	       o_red <= i_rgb[2];
	       o_green <= i_rgb[1];
	       o_blue <= i_rgb[0];
	       o_x <= h_counter - HFP - H_PULSE - HBP;
	       o_y <= v_counter - VFP - V_PULSE - VBP;
	    end
	    else begin
	       o_red <= 0;
	       o_green <= 0;
	       o_blue <= 0;
	       o_x <= 0;
	       o_y <= 0;
	    end
   end
endmodule
module vga_controller(
		                  input wire       i_clk_25MHz,
		                  input wire [2:0] i_rgb,
		                  output wire      o_hsync,
		                  output wire      o_vsync,
		                  output reg       o_red,
		                  output reg       o_green,
		                  output reg       o_blue,
		                  output reg [9:0] o_x,
		                  output reg [9:0] o_y
		                  );




   parameter ACTIVE_H_VIDEO = 640;
   parameter ACTIVE_V_VIDEO = 480;
   parameter HFP = 16;
   parameter H_PULSE = 96;
   parameter HBP = 48;
   parameter VFP = 10;
   parameter V_PULSE = 2;
   parameter VBP = 33;
   parameter BLACK_H = HFP + H_PULSE + HBP;
   parameter BLACK_V = VFP + V_PULSE + VBP;
   parameter H_PIXELS = BLACK_H + ACTIVE_H_VIDEO;
   parameter V_LINES = BLACK_V + ACTIVE_V_VIDEO;





   reg [9:0]                           h_counter;
   reg [9:0]                           v_counter;


   initial begin
      o_x = 0;
      o_y = 0;
      o_red = 0;
      o_green = 0;
      o_blue = 0;
      h_counter = 0;
      v_counter = 0;
   end
   always @(posedge i_clk_25MHz)
     begin

	      if (h_counter < H_PIXELS - 1)
	        h_counter <= h_counter + 1;
	      else




	        begin
	           h_counter <= 0;
	           if (v_counter < V_LINES - 1)
	             v_counter <= v_counter + 1;
	           else
	             v_counter <= 0;
	        end
     end






   wire active_video;

   assign o_hsync = (h_counter >= HFP && h_counter < HFP + H_PULSE) ? 0:1;
   assign o_vsync = (v_counter >= VFP && v_counter < VFP + V_PULSE) ? 0:1;
   assign active_video = (h_counter >= HFP + H_PULSE + HBP && v_counter >= VFP + V_PULSE + VBP) ? 1:0;











   always @(posedge i_clk_25MHz) begin
	    if (active_video == 1) begin
	       o_red <= i_rgb[2];
	       o_green <= i_rgb[1];
	       o_blue <= i_rgb[0];
	       o_x <= h_counter - HFP - H_PULSE - HBP;
	       o_y <= v_counter - VFP - V_PULSE - VBP;
	    end
	    else begin
	       o_red <= 0;
	       o_green <= 0;
	       o_blue <= 0;
	       o_x <= 0;
	       o_y <= 0;
	    end
   end
endmodule