data/full_repos/permissive/143278/ivltests/sv_var_init1.v
 line:9: before: "$"
1: b'%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sv_var_init1.v:9: Unsupported: Ignoring delay on this delayed statement.\n  #0 $display("%0d %0d", i, j);\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module top();

integer i = 1;
integer j = 0;

always @(i) j = i;

initial begin
  #0 $display("%0d %0d", i, j);
  if ((i === 1) && (j === 0))
    $display("PASSED");
  else
    $display("FAILED");
end

endmodule
module top();


integer i = 1;
integer j = 0;

always @(i) j = i;

initial begin
  #0 $display("%0d %0d", i, j);
  if ((i === 1) && (j === 0))
    $display("PASSED");
  else
    $display("FAILED");
end

endmodule