data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v
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1: b"%Error: data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v:9: Cannot find file containing module: 'halfadder'\n    halfadder h0(p[1], h0c, a[0] & b[1], a[1] & b[0]);\n    ^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA,data/full_repos/permissive/202473002/halfadder\n             data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA,data/full_repos/permissive/202473002/halfadder.v\n             data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA,data/full_repos/permissive/202473002/halfadder.sv\n             halfadder\n             halfadder.v\n             halfadder.sv\n             obj_dir/halfadder\n             obj_dir/halfadder.v\n             obj_dir/halfadder.sv\n%Error: data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v:10: Cannot find file containing module: 'halfadder'\n    halfadder h1(h1s,  h1c, a[2] & b[3], a[3] & b[2]);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v:11: Cannot find file containing module: 'halfadder'\n    halfadder h2(p[2], h2c, f0s, h0c);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v:12: Cannot find file containing module: 'halfadder'\n    halfadder h3(h3s,  h3c, f2s, f1c);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v:13: Cannot find file containing module: 'halfadder'\n    halfadder h4(h4s,  h4c, h1s, f2c);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v:14: Cannot find file containing module: 'halfadder'\n    halfadder h5(h5s,  h5c, a[3] & b[3], h1c);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v:15: Cannot find file containing module: 'halfadder'\n    halfadder h6(p[3], h6c, f3s, h2c);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v:16: Cannot find file containing module: 'halfadder'\n    halfadder h7(p[7], , h5c, f6c);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v:18: Cannot find file containing module: 'fulladder'\n    fulladder f0(f0s,  f0c, a[0] & b[2], a[1] & b[1], a[2] & b[0]);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v:19: Cannot find file containing module: 'fulladder'\n    fulladder f1(f1s,  f1c, a[1] & b[2], a[2] & b[1], a[3] & b[0]);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v:20: Cannot find file containing module: 'fulladder'\n    fulladder f2(f2s,  f2c, a[1] & b[3], a[2] & b[2], a[3] & b[1]);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v:21: Cannot find file containing module: 'fulladder'\n    fulladder f3(f3s,  f3c, a[0] & b[3], f1s, f0c);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v:22: Cannot find file containing module: 'fulladder'\n    fulladder f4(p[4], f4c, h3s, f3c, h6c);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v:23: Cannot find file containing module: 'fulladder'\n    fulladder f5(p[5], f5c, h4s, h3c, f4c);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/202473002/Stereo.srcs/sources_1/imports/FPGA/wallace.v:24: Cannot find file containing module: 'fulladder'\n    fulladder f6(p[6], f6c, h5s, h4c, f5c);\n    ^~~~~~~~~\n%Error: Exiting due to 15 error(s)\n"
module wallace(p, a, b);
    output [7:0] p;
    input  [3:0] a, b;
    wire h1s, h3s, h4s, h5s, h0c, h1c, h2c, h3c, h4c, h5c, h6c,
         f0s, f1s, f2s, f3s, f0c, f1c, f2c, f3c, f4c, f5c, f6c;

    assign p[0] = a[0] & b[0];

    halfadder h0(p[1], h0c, a[0] & b[1], a[1] & b[0]);
    halfadder h1(h1s,  h1c, a[2] & b[3], a[3] & b[2]);
    halfadder h2(p[2], h2c, f0s, h0c);
    halfadder h3(h3s,  h3c, f2s, f1c);
    halfadder h4(h4s,  h4c, h1s, f2c);
    halfadder h5(h5s,  h5c, a[3] & b[3], h1c);
    halfadder h6(p[3], h6c, f3s, h2c);
    halfadder h7(p[7],, h5c, f6c);

    fulladder f0(f0s,  f0c, a[0] & b[2], a[1] & b[1], a[2] & b[0]);
    fulladder f1(f1s,  f1c, a[1] & b[2], a[2] & b[1], a[3] & b[0]);
    fulladder f2(f2s,  f2c, a[1] & b[3], a[2] & b[2], a[3] & b[1]);
    fulladder f3(f3s,  f3c, a[0] & b[3], f1s, f0c);
    fulladder f4(p[4], f4c, h3s, f3c, h6c);
    fulladder f5(p[5], f5c, h4s, h3c, f4c);
    fulladder f6(p[6], f6c, h5s, h4c, f5c);
endmodule
module wallace(p, a, b);

    output [7:0] p;
    input  [3:0] a, b;
    wire h1s, h3s, h4s, h5s, h0c, h1c, h2c, h3c, h4c, h5c, h6c,
         f0s, f1s, f2s, f3s, f0c, f1c, f2c, f3c, f4c, f5c, f6c;

    assign p[0] = a[0] & b[0];

    halfadder h0(p[1], h0c, a[0] & b[1], a[1] & b[0]);
    halfadder h1(h1s,  h1c, a[2] & b[3], a[3] & b[2]);
    halfadder h2(p[2], h2c, f0s, h0c);
    halfadder h3(h3s,  h3c, f2s, f1c);
    halfadder h4(h4s,  h4c, h1s, f2c);
    halfadder h5(h5s,  h5c, a[3] & b[3], h1c);
    halfadder h6(p[3], h6c, f3s, h2c);
    halfadder h7(p[7],, h5c, f6c);

    fulladder f0(f0s,  f0c, a[0] & b[2], a[1] & b[1], a[2] & b[0]);
    fulladder f1(f1s,  f1c, a[1] & b[2], a[2] & b[1], a[3] & b[0]);
    fulladder f2(f2s,  f2c, a[1] & b[3], a[2] & b[2], a[3] & b[1]);
    fulladder f3(f3s,  f3c, a[0] & b[3], f1s, f0c);
    fulladder f4(p[4], f4c, h3s, f3c, h6c);
    fulladder f5(p[5], f5c, h4s, h3c, f4c);
    fulladder f6(p[6], f6c, h5s, h4c, f5c);
endmodule