data/full_repos/permissive/18770871/control_exe.v
 line:18: before: ")"
1: b"%Error: data/full_repos/permissive/18770871/control_exe.v:18: syntax error, unexpected ')', expecting '['\n);\n^\n%Error: data/full_repos/permissive/18770871/control_exe.v:32: syntax error, unexpected output\noutput nop_alu;\n^~~~~~\n%Error: data/full_repos/permissive/18770871/control_exe.v:50: syntax error, unexpected always\nalways @ (pc_added)\n^~~~~~\n%Error: Exiting due to 3 error(s)\n"
module control_exe(
  clk,
  rst,
  branch_target,
  pc_added,
  flag,
  cond,
  branch_idex,
  jal_idex,
  jr_idex,
  exec_idex,
  branch2_idex,
  nop_alu,
  nop_lw,
  nop_sw,
  execPCadded,
  putPCback,
);
input clk;
input rst;
input [15:0] branch_target;
input [15:0] pc_added;
input branch_idex;
input jal_idex;
input jr_idex;
input exec_idex;
input [2:0] flag;
input [3:0] cond;
output branch2_idex;
reg branch2_temp;
reg branch2_temp2;
output nop_alu;
output nop_lw;
output nop_sw;
output [15:0] execPCadded;
output putPCback;
reg nop_alu_temp;
reg nop_lw_temp;
reg nop_sw_temp;
reg canBranch;
reg [2:0] NOP;
reg isBr;
reg [3:0] myCond;
reg setExec;

reg [15:0] execPCadded_temp, execPCadded_temp2;
reg [15:0] execPCadded_stored;
reg putPCback_temp2;
reg putBack_temp;
always @ (pc_added)



        begin
          putPCback_temp2=1'b0;
          if(setExec===1'b1 && (!(NOP>3'b000) || NOP === 3'bxxx)) begin 

            putPCback_temp2 = 1'b1;
            execPCadded_temp2 = execPCadded_stored;
            setExec = 1'b0;
          end
          if(exec_idex===1'b1 && putPCback_temp2 === 1'b0 && (!(NOP>3'b000) || NOP === 3'bxxx)) begin
            setExec = 1'b1;
            execPCadded_stored = pc_added;
          end
          
          else begin

          end 
          myCond=cond;
          isBr=branch_idex;

          if(isBr!==1'b0) begin
          if(flag[2] == 1'b1 && myCond==4'b000)
          begin


            canBranch = 1'b1;
          end
          else if(flag[2] == 1'b0 && myCond==4'b001)
          begin


            canBranch = 1'b1;
          end
          else if(((flag[2] == 1'b0) && (flag[0] == 1'b0)) && myCond == 4'b010)
          begin


            canBranch = 1'b1;
          end
          else if(flag[0] == 1'b1 && myCond == 4'b011)
          begin


            canBranch = 1'b1;
          end
          else if(((flag[2] == 1'b1) || ((flag[2] == 1'b0) && (flag[0] == 1'b0))) && myCond == 4'b100)
          begin



            canBranch = 1'b1;
          end
          else if(((flag[0] == 1'b1) || (flag[2] == 1'b1)) && myCond == 4'b101)
          begin


            canBranch = 1'b1;
          end
          else if(flag[1] == 1'b1 && myCond == 4'b110)
          begin


            canBranch = 1'b1;
          end
          else if(cond==4'b111)
          begin


            canBranch = 1'b1;
          end
          else
          begin
            canBranch = 1'b0;
          end
        end
        else begin
          canBranch = 1'b0;
        end

        
        if((isBr===1'b1 || (jal_idex===1'b1 || jr_idex === 1'b1 || exec_idex === 1'b1 || putPCback_temp2 === 1'b1)) && ((branch_target!==pc_added) && 
        (canBranch===1'b1 || jal_idex===1'b1 || jr_idex === 1'b1 || exec_idex === 1'b1 || putPCback_temp2 === 1'b1)))
          begin


            
            branch2_temp=1'b1;
            if(!(NOP>3'b000)|| NOP===3'bxxx)
              begin
                NOP = 3'b100;
              end 
            else
              begin





                branch2_temp=1'b0;

              end 
          end
        else if((isBr===1'b1 || jal_idex===1'b1 || jr_idex === 1'b1 || exec_idex === 1'b1 || putPCback_temp2 === 1'b1) && ((branch_target===pc_added)|| 
        (canBranch===1'b0 || jal_idex===1'b1 || jr_idex === 1'b1 || exec_idex === 1'b1 || putPCback_temp2 === 1'b1)))
          begin

            branch2_temp=1'b0;
            if(!(NOP>3'b000) || NOP===3'bxxx)
              begin
                NOP = 3'b001;
              end 
            else
              begin





              end 
          end
        else 
          begin
            branch2_temp=1'b0;
          end


        if(!(NOP>3'b000) || NOP === 3'bxxx)
          begin
            nop_alu_temp = 1'b0;
            nop_lw_temp = 1'b0;
            nop_sw_temp = 1'b0;
          end
        else
          begin
            nop_alu_temp = 1'b1;
            if(branch2_temp===1'b1) begin 
              nop_lw_temp = 1'b0; 
            end 
            else begin
              nop_lw_temp = 1'b1; 
            end
            nop_sw_temp = 1'b1;
            NOP = NOP - 3'b001;
          end
        branch2_temp2 = branch2_temp;
        execPCadded_temp = execPCadded_temp2;
        putBack_temp = putPCback_temp2;  
        end
    assign branch2_idex = branch2_temp2;
    assign nop_alu = (putPCback===1'b0)? nop_alu_temp : 1'b0;
    assign nop_lw = (putPCback===1'b0)? nop_lw_temp : 1'b0;
    assign nop_sw = (putPCback===1'b0)? nop_sw_temp : 1'b0;
    assign execPCadded = execPCadded_temp;
    assign putPCback = putBack_temp;
endmodule
module control_exe(
  clk,
  rst,
  branch_target,
  pc_added,
  flag,
  cond,
  branch_idex,
  jal_idex,
  jr_idex,
  exec_idex,
  branch2_idex,
  nop_alu,
  nop_lw,
  nop_sw,
  execPCadded,
  putPCback,
);

input clk;
input rst;
input [15:0] branch_target;
input [15:0] pc_added;
input branch_idex;
input jal_idex;
input jr_idex;
input exec_idex;
input [2:0] flag;
input [3:0] cond;
output branch2_idex;
reg branch2_temp;
reg branch2_temp2;
output nop_alu;
output nop_lw;
output nop_sw;
output [15:0] execPCadded;
output putPCback;
reg nop_alu_temp;
reg nop_lw_temp;
reg nop_sw_temp;
reg canBranch;
reg [2:0] NOP;
reg isBr;
reg [3:0] myCond;
reg setExec;

reg [15:0] execPCadded_temp, execPCadded_temp2;
reg [15:0] execPCadded_stored;
reg putPCback_temp2;
reg putBack_temp;
always @ (pc_added)



        begin
          putPCback_temp2=1'b0;
          if(setExec===1'b1 && (!(NOP>3'b000) || NOP === 3'bxxx)) begin 

            putPCback_temp2 = 1'b1;
            execPCadded_temp2 = execPCadded_stored;
            setExec = 1'b0;
          end
          if(exec_idex===1'b1 && putPCback_temp2 === 1'b0 && (!(NOP>3'b000) || NOP === 3'bxxx)) begin
            setExec = 1'b1;
            execPCadded_stored = pc_added;
          end
          
          else begin

          end 
          myCond=cond;
          isBr=branch_idex;

          if(isBr!==1'b0) begin
          if(flag[2] == 1'b1 && myCond==4'b000)
          begin


            canBranch = 1'b1;
          end
          else if(flag[2] == 1'b0 && myCond==4'b001)
          begin


            canBranch = 1'b1;
          end
          else if(((flag[2] == 1'b0) && (flag[0] == 1'b0)) && myCond == 4'b010)
          begin


            canBranch = 1'b1;
          end
          else if(flag[0] == 1'b1 && myCond == 4'b011)
          begin


            canBranch = 1'b1;
          end
          else if(((flag[2] == 1'b1) || ((flag[2] == 1'b0) && (flag[0] == 1'b0))) && myCond == 4'b100)
          begin



            canBranch = 1'b1;
          end
          else if(((flag[0] == 1'b1) || (flag[2] == 1'b1)) && myCond == 4'b101)
          begin


            canBranch = 1'b1;
          end
          else if(flag[1] == 1'b1 && myCond == 4'b110)
          begin


            canBranch = 1'b1;
          end
          else if(cond==4'b111)
          begin


            canBranch = 1'b1;
          end
          else
          begin
            canBranch = 1'b0;
          end
        end
        else begin
          canBranch = 1'b0;
        end

        
        if((isBr===1'b1 || (jal_idex===1'b1 || jr_idex === 1'b1 || exec_idex === 1'b1 || putPCback_temp2 === 1'b1)) && ((branch_target!==pc_added) && 
        (canBranch===1'b1 || jal_idex===1'b1 || jr_idex === 1'b1 || exec_idex === 1'b1 || putPCback_temp2 === 1'b1)))
          begin


            
            branch2_temp=1'b1;
            if(!(NOP>3'b000)|| NOP===3'bxxx)
              begin
                NOP = 3'b100;
              end 
            else
              begin





                branch2_temp=1'b0;

              end 
          end
        else if((isBr===1'b1 || jal_idex===1'b1 || jr_idex === 1'b1 || exec_idex === 1'b1 || putPCback_temp2 === 1'b1) && ((branch_target===pc_added)|| 
        (canBranch===1'b0 || jal_idex===1'b1 || jr_idex === 1'b1 || exec_idex === 1'b1 || putPCback_temp2 === 1'b1)))
          begin

            branch2_temp=1'b0;
            if(!(NOP>3'b000) || NOP===3'bxxx)
              begin
                NOP = 3'b001;
              end 
            else
              begin





              end 
          end
        else 
          begin
            branch2_temp=1'b0;
          end


        if(!(NOP>3'b000) || NOP === 3'bxxx)
          begin
            nop_alu_temp = 1'b0;
            nop_lw_temp = 1'b0;
            nop_sw_temp = 1'b0;
          end
        else
          begin
            nop_alu_temp = 1'b1;
            if(branch2_temp===1'b1) begin 
              nop_lw_temp = 1'b0; 
            end 
            else begin
              nop_lw_temp = 1'b1; 
            end
            nop_sw_temp = 1'b1;
            NOP = NOP - 3'b001;
          end
        branch2_temp2 = branch2_temp;
        execPCadded_temp = execPCadded_temp2;
        putBack_temp = putPCback_temp2;  
        end
    assign branch2_idex = branch2_temp2;
    assign nop_alu = (putPCback===1'b0)? nop_alu_temp : 1'b0;
    assign nop_lw = (putPCback===1'b0)? nop_lw_temp : 1'b0;
    assign nop_sw = (putPCback===1'b0)? nop_sw_temp : 1'b0;
    assign execPCadded = execPCadded_temp;
    assign putPCback = putBack_temp;
endmodule