data/full_repos/permissive/191467986/rtl/ProgramCounter.v
data/verilator_xmls/ccc50eaa-b008-4211-b258-8dab11bc503f.xml
module ProgramCounter
(
    input                           i_CLOCK,
    inout	[DATA_WIDTH - 1:0]      BUS,
    input                           i_COUNT_ENABLE,
    input                           i_CLEAR_n,
    input                           i_JUMP,
    input                           i_OUTPUT
);

    parameter   DATA_WIDTH      = 8;

    reg	[DATA_WIDTH - 1:0]  r_COUNTER   = 0;

    always @(posedge i_CLOCK, negedge i_CLEAR_n)
    begin

        if (!i_CLEAR_n)
            r_COUNTER <= 0;

        else if (i_JUMP)
            r_COUNTER <= BUS;

        else if (i_COUNT_ENABLE) begin

            if (&r_COUNTER)
                r_COUNTER <= 0;
            else
                r_COUNTER <= r_COUNTER + 1'b1;
        end
    end

    assign BUS = (i_OUTPUT) ? r_COUNTER : {DATA_WIDTH {1'bz}};
endmodule
module ProgramCounter
(
    input                           i_CLOCK,
    inout	[DATA_WIDTH - 1:0]      BUS,
    input                           i_COUNT_ENABLE,
    input                           i_CLEAR_n,
    input                           i_JUMP,
    input                           i_OUTPUT
);


    parameter   DATA_WIDTH      = 8;

    reg	[DATA_WIDTH - 1:0]  r_COUNTER   = 0;

    always @(posedge i_CLOCK, negedge i_CLEAR_n)
    begin

        if (!i_CLEAR_n)
            r_COUNTER <= 0;

        else if (i_JUMP)
            r_COUNTER <= BUS;

        else if (i_COUNT_ENABLE) begin

            if (&r_COUNTER)
                r_COUNTER <= 0;
            else
                r_COUNTER <= r_COUNTER + 1'b1;
        end
    end

    assign BUS = (i_OUTPUT) ? r_COUNTER : {DATA_WIDTH {1'bz}};
endmodule