data/full_repos/permissive/101786773/blink/blink2/blink.v
data/verilator_xmls/9cc665b0-96aa-4f30-89ee-7581937ca546.xml
module blink(input clk, output LED);

	reg [22:0] count;

	assign LED = count[22];

	always @(posedge clk)
			count <= count + 1;

endmodule
module blink(input clk, output LED);


	reg [22:0] count;

	assign LED = count[22];

	always @(posedge clk)
			count <= count + 1;

endmodule