data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v
 line:63: before: "."
1: b'%Warning-IMPLICIT: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:74: Signal definition not found, creating implicitly: \'ldx\'\n      .ld_x(ldx),\n            ^~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Warning-IMPLICIT: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:75: Signal definition not found, creating implicitly: \'ldy\'\n                                                                                  : ... Suggested alternative: \'ldx\'\n      .ld_y(ldy),\n            ^~~\n%Warning-IMPLICIT: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:76: Signal definition not found, creating implicitly: \'ldc\'\n                                                                                  : ... Suggested alternative: \'ldx\'\n      .ld_c(ldc),\n            ^~~\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:215: Operator ADD expects 7 bits on the RHS, but RHS\'s SEL generates 2 bits.\n                                                                                : ... In instance SASnake.d0\n  assign xOut = x + count[1:0];\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:216: Operator ADD expects 7 bits on the RHS, but RHS\'s SEL generates 2 bits.\n                                                                                : ... In instance SASnake.d0\n  assign yOut = y + count[3:2];\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:117: Operator COND expects 6 bits on the Conditional True, but Conditional True\'s VARREF \'S_LOAD_x_WAIT\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n                S_LOAD_x: next_state = go ? S_LOAD_x_WAIT : S_LOAD_x;  \n                                          ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:117: Operator COND expects 6 bits on the Conditional False, but Conditional False\'s VARREF \'S_LOAD_x\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n                S_LOAD_x: next_state = go ? S_LOAD_x_WAIT : S_LOAD_x;  \n                                          ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:118: Operator COND expects 6 bits on the Conditional True, but Conditional True\'s VARREF \'S_LOAD_x_WAIT\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n                S_LOAD_x_WAIT: next_state = go ? S_LOAD_x_WAIT : S_LOAD_y;  \n                                               ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:118: Operator COND expects 6 bits on the Conditional False, but Conditional False\'s VARREF \'S_LOAD_y\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n                S_LOAD_x_WAIT: next_state = go ? S_LOAD_x_WAIT : S_LOAD_y;  \n                                               ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:119: Operator COND expects 6 bits on the Conditional True, but Conditional True\'s VARREF \'S_LOAD_y_WAIT\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n                S_LOAD_y: next_state = go ? S_LOAD_y_WAIT : S_LOAD_y;  \n                                          ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:119: Operator COND expects 6 bits on the Conditional False, but Conditional False\'s VARREF \'S_LOAD_y\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n                S_LOAD_y: next_state = go ? S_LOAD_y_WAIT : S_LOAD_y;  \n                                          ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:120: Operator COND expects 6 bits on the Conditional True, but Conditional True\'s VARREF \'S_LOAD_y_WAIT\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n                S_LOAD_y_WAIT: next_state = go ? S_LOAD_y_WAIT : S_LOAD_C;  \n                                               ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:120: Operator COND expects 6 bits on the Conditional False, but Conditional False\'s VARREF \'S_LOAD_C\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n                S_LOAD_y_WAIT: next_state = go ? S_LOAD_y_WAIT : S_LOAD_C;  \n                                               ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:121: Operator COND expects 6 bits on the Conditional True, but Conditional True\'s VARREF \'S_LOAD_C_WAIT\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n                S_LOAD_C: next_state = plot ? S_LOAD_C_WAIT : S_LOAD_C;  \n                                            ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:121: Operator COND expects 6 bits on the Conditional False, but Conditional False\'s VARREF \'S_LOAD_C\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n                S_LOAD_C: next_state = plot ? S_LOAD_C_WAIT : S_LOAD_C;  \n                                            ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:122: Operator COND expects 6 bits on the Conditional True, but Conditional True\'s VARREF \'S_LOAD_C_WAIT\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n                S_LOAD_C_WAIT: next_state = plot ? S_LOAD_C_WAIT : finish;  \n                                                 ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:122: Operator COND expects 6 bits on the Conditional False, but Conditional False\'s VARREF \'finish\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n                S_LOAD_C_WAIT: next_state = plot ? S_LOAD_C_WAIT : finish;  \n                                                 ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:123: Operator COND expects 6 bits on the Conditional True, but Conditional True\'s VARREF \'S_LOAD_x\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n                finish: next_state = go ? S_LOAD_x : finish;\n                                        ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:123: Operator COND expects 6 bits on the Conditional False, but Conditional False\'s VARREF \'finish\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n                finish: next_state = go ? S_LOAD_x : finish;\n                                        ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:124: Operator ASSIGN expects 6 bits on the Assign RHS, but Assign RHS\'s VARREF \'S_LOAD_x\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n            default:  next_state = S_LOAD_x;\n                                 ^\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:116: Operator CASE expects 6 bits on the Case Item, but Case Item\'s VARREF \'S_LOAD_x\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n            case (current_state)\n            ^~~~\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:116: Operator CASE expects 6 bits on the Case Item, but Case Item\'s VARREF \'S_LOAD_x_WAIT\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n            case (current_state)\n            ^~~~\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:116: Operator CASE expects 6 bits on the Case Item, but Case Item\'s VARREF \'S_LOAD_y\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n            case (current_state)\n            ^~~~\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:116: Operator CASE expects 6 bits on the Case Item, but Case Item\'s VARREF \'S_LOAD_y_WAIT\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n            case (current_state)\n            ^~~~\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:116: Operator CASE expects 6 bits on the Case Item, but Case Item\'s VARREF \'S_LOAD_C\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n            case (current_state)\n            ^~~~\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:116: Operator CASE expects 6 bits on the Case Item, but Case Item\'s VARREF \'S_LOAD_C_WAIT\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n            case (current_state)\n            ^~~~\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:116: Operator CASE expects 6 bits on the Case Item, but Case Item\'s VARREF \'finish\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n            case (current_state)\n            ^~~~\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:138: Operator CASE expects 6 bits on the Case Item, but Case Item\'s VARREF \'S_LOAD_x\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n        case (current_state)\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:138: Operator CASE expects 6 bits on the Case Item, but Case Item\'s VARREF \'S_LOAD_y\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n        case (current_state)\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:138: Operator CASE expects 6 bits on the Case Item, but Case Item\'s VARREF \'S_LOAD_C\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n        case (current_state)\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:138: Operator CASE expects 6 bits on the Case Item, but Case Item\'s VARREF \'finish\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n        case (current_state)\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:159: Operator ASSIGNDLY expects 6 bits on the Assign RHS, but Assign RHS\'s VARREF \'S_LOAD_x\' generates 3 bits.\n                                                                                : ... In instance SASnake.c0\n            current_state <= S_LOAD_x;\n                          ^~\n%Error: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:47: Cannot find file containing module: \'vga_adapter\'\n vga_adapter VGA(\n ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/195330302/ScreamAtSnake,data/full_repos/permissive/195330302/vga_adapter\n             data/full_repos/permissive/195330302/ScreamAtSnake,data/full_repos/permissive/195330302/vga_adapter.v\n             data/full_repos/permissive/195330302/ScreamAtSnake,data/full_repos/permissive/195330302/vga_adapter.sv\n             vga_adapter\n             vga_adapter.v\n             vga_adapter.sv\n             obj_dir/vga_adapter\n             obj_dir/vga_adapter.v\n             obj_dir/vga_adapter.sv\n%Warning-WIDTH: data/full_repos/permissive/195330302/ScreamAtSnake/SASnake.v:87: Output port connection \'xOut\' expects 7 bits on the pin connection, but pin connection\'s VARREF \'x\' generates 8 bits.\n                                                                               : ... In instance SASnake\n     .xOut(x),\n      ^~~~\n%Error: Exiting due to 1 error(s), 33 warning(s)\n'
module SASnake
	(
		CLOCK_50,

        KEY,
        SW,

		VGA_CLK,
		VGA_HS,
		VGA_VS,
		VGA_BLANK_N,
		VGA_SYNC_N,
		VGA_R,
		VGA_G,
		VGA_B
	);

	input			CLOCK_50;
	input   [9:0]   SW;
	input   [3:0]   KEY;



	output			VGA_CLK;
	output			VGA_HS;
	output			VGA_VS;
	output			VGA_BLANK_N;
	output			VGA_SYNC_N;
	output	[9:0]	VGA_R;
	output	[9:0]	VGA_G;
	output	[9:0]	VGA_B;
	
	wire resetn;
	assign resetn = KEY[0];
	

	wire [2:0] colour;
	wire [7:0] x;
	wire [6:0] y;
	wire writeEn;




	vga_adapter VGA(
			.resetn(resetn),
			.clock(CLOCK_50),
			.colour(colour),
			.x(x),
			.y(y),
			.plot(writeEn),

			.VGA_R(VGA_R),
			.VGA_G(VGA_G),
			.VGA_B(VGA_B),
			.VGA_HS(VGA_HS),
			.VGA_VS(VGA_VS),
			.VGA_BLANK(VGA_BLANK_N),
			.VGA_SYNC(VGA_SYNC_N),
			.VGA_CLK(VGA_CLK));
		defparam VGA.RESOLUTION = "160x120";
		defparam VGA.MONOCHROME = "FALSE";
		defparam VGA.BITS_PER_COLOUR_CHANNEL = 1;
		defparam VGA.BACKGROUND_IMAGE = "black.mif";
			


		control c0(.clk(CLOCK_50),
						.resetn(resetn),
						.go(~KEY[3]),
						.plot(~KEY[1]),
						.ld_x(ldx),
						.ld_y(ldy),
						.ld_c(ldc),
						.enable(writeEn));
				
		 datapath d0(	
					.clk(CLOCK_50),
					.ld_x(ldx),
					.ld_y(ldy),
					.ld_c(ldc),
					.resetn(resetn),
					.colourIn(SW[9:7]),
					.coordIn(SW[6:0]),
					.xOut(x),
					.yOut(y),
					.colourOut(colour),
					.enableCounter(writeEn));
					
endmodule
module SASnake
	(
		CLOCK_50,

        KEY,
        SW,

		VGA_CLK,
		VGA_HS,
		VGA_VS,
		VGA_BLANK_N,
		VGA_SYNC_N,
		VGA_R,
		VGA_G,
		VGA_B
	);


	input			CLOCK_50;
	input   [9:0]   SW;
	input   [3:0]   KEY;



	output			VGA_CLK;
	output			VGA_HS;
	output			VGA_VS;
	output			VGA_BLANK_N;
	output			VGA_SYNC_N;
	output	[9:0]	VGA_R;
	output	[9:0]	VGA_G;
	output	[9:0]	VGA_B;
	
	wire resetn;
	assign resetn = KEY[0];
	

	wire [2:0] colour;
	wire [7:0] x;
	wire [6:0] y;
	wire writeEn;




	vga_adapter VGA(
			.resetn(resetn),
			.clock(CLOCK_50),
			.colour(colour),
			.x(x),
			.y(y),
			.plot(writeEn),

			.VGA_R(VGA_R),
			.VGA_G(VGA_G),
			.VGA_B(VGA_B),
			.VGA_HS(VGA_HS),
			.VGA_VS(VGA_VS),
			.VGA_BLANK(VGA_BLANK_N),
			.VGA_SYNC(VGA_SYNC_N),
			.VGA_CLK(VGA_CLK));
		defparam VGA.RESOLUTION = "160x120";
		defparam VGA.MONOCHROME = "FALSE";
		defparam VGA.BITS_PER_COLOUR_CHANNEL = 1;
		defparam VGA.BACKGROUND_IMAGE = "black.mif";
			


		control c0(.clk(CLOCK_50),
						.resetn(resetn),
						.go(~KEY[3]),
						.plot(~KEY[1]),
						.ld_x(ldx),
						.ld_y(ldy),
						.ld_c(ldc),
						.enable(writeEn));
				
		 datapath d0(	
					.clk(CLOCK_50),
					.ld_x(ldx),
					.ld_y(ldy),
					.ld_c(ldc),
					.resetn(resetn),
					.colourIn(SW[9:7]),
					.coordIn(SW[6:0]),
					.xOut(x),
					.yOut(y),
					.colourOut(colour),
					.enableCounter(writeEn));
					
endmodule