data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl/n64rgbv2_top.v
 line:1 column:1: Illegal character '\x00'
1: b'%Error: data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl/n64rgbv2_top.v:92: Cannot find include file: vh/n64rgb_params.vh\n`include "vh/n64rgb_params.vh" \n         ^~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl,data/full_repos/permissive/118480210/vh/n64rgb_params.vh\n             data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl,data/full_repos/permissive/118480210/vh/n64rgb_params.vh.v\n             data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl,data/full_repos/permissive/118480210/vh/n64rgb_params.vh.sv\n             vh/n64rgb_params.vh\n             vh/n64rgb_params.vh.v\n             vh/n64rgb_params.vh.sv\n             obj_dir/vh/n64rgb_params.vh\n             obj_dir/vh/n64rgb_params.vh.v\n             obj_dir/vh/n64rgb_params.vh.sv\n%Error: data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl/n64rgbv2_top.v:182: Define or directive not defined: \'`VDATA_SY_SLICE\'\n  .Sync_pre(vdata_r[0][`VDATA_SY_SLICE]),\n                       ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl/n64rgbv2_top.v:182: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n  .Sync_pre(vdata_r[0][`VDATA_SY_SLICE]),\n                                      ^\n%Error: data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl/n64rgbv2_top.v:209: Define or directive not defined: \'`VDATA_FU_SLICE\'\nwire [`VDATA_FU_SLICE] vdata_r[0:1];\n      ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl/n64rgbv2_top.v:209: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\nwire [`VDATA_FU_SLICE] vdata_r[0:1];\n                     ^\n%Error: data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl/n64rgbv2_top.v:224: Define or directive not defined: \'`VDATA_SY_SLICE\'\nassign {nVSYNC,nCLAMP,nHSYNC,nCSYNC} =  vdata_r[1][`VDATA_SY_SLICE];\n                                                   ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl/n64rgbv2_top.v:224: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\nassign {nVSYNC,nCLAMP,nHSYNC,nCSYNC} =  vdata_r[1][`VDATA_SY_SLICE];\n                                                                  ^\n%Error: data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl/n64rgbv2_top.v:225: Define or directive not defined: \'`VDATA_RE_SLICE\'\nassign  R_o                          = {vdata_r[1][`VDATA_RE_SLICE],vdata_r[1][3*color_width-1]};\n                                                   ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl/n64rgbv2_top.v:225: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\nassign  R_o                          = {vdata_r[1][`VDATA_RE_SLICE],vdata_r[1][3*color_width-1]};\n                                                                  ^\n%Error: data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl/n64rgbv2_top.v:226: Define or directive not defined: \'`VDATA_GR_SLICE\'\nassign  G_o                          = {vdata_r[1][`VDATA_GR_SLICE],vdata_r[1][2*color_width-1]};\n                                                   ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl/n64rgbv2_top.v:226: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\nassign  G_o                          = {vdata_r[1][`VDATA_GR_SLICE],vdata_r[1][2*color_width-1]};\n                                                                  ^\n%Error: data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl/n64rgbv2_top.v:227: Define or directive not defined: \'`VDATA_BL_SLICE\'\nassign  B_o                          = {vdata_r[1][`VDATA_BL_SLICE],vdata_r[1][  color_width-1]};\n                                                   ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/118480210/generalRGBmod/firmware/rtl/n64rgbv2_top.v:227: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\nassign  B_o                          = {vdata_r[1][`VDATA_BL_SLICE],vdata_r[1][  color_width-1]};\n                                                                  ^\n%Error: Exiting due to 13 error(s)\n'
module n64rgbv2_top (

  nCLK,
  nDSYNC,
  D_i,


  nRST_nManualDB,
  CTRL_nAutoDB,
  


  nSYNC_ON_GREEN,
  install_type,


  Default_nForceDeBlur,
  Default_DeBlur,
  Default_n15bit_mode,


  nHSYNC,
  nVSYNC,
  nCSYNC,
  nCLAMP,

  R_o,
  G_o,
  B_o,

  ADV712x_CLK,
  ADV712x_SYNC
);

`include "vh/n64rgb_params.vh"

input                   nCLK;
input                   nDSYNC;
input [color_width-1:0] D_i;

inout nRST_nManualDB;
input CTRL_nAutoDB;

input  nSYNC_ON_GREEN;

input install_type;



input Default_nForceDeBlur;
input Default_DeBlur;
input Default_n15bit_mode;

output nHSYNC;
output nVSYNC;
output nCSYNC;
output nCLAMP;

output [color_width:0] R_o;
output [color_width:0] G_o;
output [color_width:0] B_o;

output ADV712x_CLK;
output ADV712x_SYNC;







wire nForceDeBlur_IGR, nDeBlur_IGR, n15bit_mode_IGR;
wire nRST_IGR = install_type ? nRST_nManualDB : 1'b1;
wire DRV_RST;
wire CTRL_IGR = install_type ? CTRL_nAutoDB : 1'b1;

n64_igr igr(
  .nCLK(nCLK),
  .nRST_IGR(nRST_IGR),
  .DRV_RST(DRV_RST),
  .CTRL(CTRL_IGR),
  .Default_nForceDeBlur(Default_nForceDeBlur),
  .Default_DeBlur(Default_DeBlur),
  .Default_n15bit_mode(Default_n15bit_mode),
  .nForceDeBlur(nForceDeBlur_IGR),
  .nDeBlur(nDeBlur_IGR),
  .n15bit_mode(n15bit_mode_IGR)
);

assign nRST_nManualDB = ~install_type ? 1'bz : 
                         DRV_RST      ? 1'b0 : 1'bz;

wire nForceDeBlur = install_type ? nForceDeBlur_IGR : (~CTRL_nAutoDB & nRST_nManualDB);
wire nDeBlurMan   = install_type ? nDeBlur_IGR      :                  nRST_nManualDB;
wire n15bit_mode  = install_type ? n15bit_mode_IGR  : ~Default_DeBlur;





















wire [1:0] data_cnt;
wire       n64_480i;
wire       vmode;
wire       blurry_pixel_pos;

n64_vinfo_ext get_vinfo(
  .nCLK(nCLK),
  .nDSYNC(nDSYNC),
  .Sync_pre(vdata_r[0][`VDATA_SY_SLICE]),
  .D_i(D_i),
  .vinfo_o({data_cnt,n64_480i,vmode,blurry_pixel_pos})
);





wire nrst_deblur = install_type ? nRST_nManualDB : 1'b1;
wire ndo_deblur, nblank_rgb;
wire [1:0] deblurparams_pass;

n64_deblur deblur_management(
  .nCLK(nCLK),
  .nDSYNC(nDSYNC),
  .nRST(nrst_deblur),
  .vdata_pre(vdata_r[0]),
  .vdata_cur(D_i),
  .deblurparams_i({data_cnt,n64_480i,vmode,blurry_pixel_pos,nForceDeBlur,nDeBlurMan}),
  .deblurparams_o(deblurparams_pass)
);





wire [`VDATA_FU_SLICE] vdata_r[0:1];

n64_vdemux video_demux(
  .nCLK(nCLK),
  .nDSYNC(nDSYNC),
  .D_i(D_i),
  .demuxparams_i({data_cnt,deblurparams_pass,n15bit_mode}),
  .vdata_r_0(vdata_r[0]),
  .vdata_r_1(vdata_r[1])
);





assign {nVSYNC,nCLAMP,nHSYNC,nCSYNC} =  vdata_r[1][`VDATA_SY_SLICE];
assign  R_o                          = {vdata_r[1][`VDATA_RE_SLICE],vdata_r[1][3*color_width-1]};
assign  G_o                          = {vdata_r[1][`VDATA_GR_SLICE],vdata_r[1][2*color_width-1]};
assign  B_o                          = {vdata_r[1][`VDATA_BL_SLICE],vdata_r[1][  color_width-1]};

assign ADV712x_CLK  = data_cnt[0];
assign ADV712x_SYNC = nSYNC_ON_GREEN ? 1'b0 : vdata_r[1][vdata_width-4];

endmodule
module n64rgbv2_top (

  nCLK,
  nDSYNC,
  D_i,


  nRST_nManualDB,
  CTRL_nAutoDB,
  


  nSYNC_ON_GREEN,
  install_type,


  Default_nForceDeBlur,
  Default_DeBlur,
  Default_n15bit_mode,


  nHSYNC,
  nVSYNC,
  nCSYNC,
  nCLAMP,

  R_o,
  G_o,
  B_o,

  ADV712x_CLK,
  ADV712x_SYNC
);


`include "vh/n64rgb_params.vh"

input                   nCLK;
input                   nDSYNC;
input [color_width-1:0] D_i;

inout nRST_nManualDB;
input CTRL_nAutoDB;

input  nSYNC_ON_GREEN;

input install_type;



input Default_nForceDeBlur;
input Default_DeBlur;
input Default_n15bit_mode;

output nHSYNC;
output nVSYNC;
output nCSYNC;
output nCLAMP;

output [color_width:0] R_o;
output [color_width:0] G_o;
output [color_width:0] B_o;

output ADV712x_CLK;
output ADV712x_SYNC;







wire nForceDeBlur_IGR, nDeBlur_IGR, n15bit_mode_IGR;
wire nRST_IGR = install_type ? nRST_nManualDB : 1'b1;
wire DRV_RST;
wire CTRL_IGR = install_type ? CTRL_nAutoDB : 1'b1;

n64_igr igr(
  .nCLK(nCLK),
  .nRST_IGR(nRST_IGR),
  .DRV_RST(DRV_RST),
  .CTRL(CTRL_IGR),
  .Default_nForceDeBlur(Default_nForceDeBlur),
  .Default_DeBlur(Default_DeBlur),
  .Default_n15bit_mode(Default_n15bit_mode),
  .nForceDeBlur(nForceDeBlur_IGR),
  .nDeBlur(nDeBlur_IGR),
  .n15bit_mode(n15bit_mode_IGR)
);

assign nRST_nManualDB = ~install_type ? 1'bz : 
                         DRV_RST      ? 1'b0 : 1'bz;

wire nForceDeBlur = install_type ? nForceDeBlur_IGR : (~CTRL_nAutoDB & nRST_nManualDB);
wire nDeBlurMan   = install_type ? nDeBlur_IGR      :                  nRST_nManualDB;
wire n15bit_mode  = install_type ? n15bit_mode_IGR  : ~Default_DeBlur;





















wire [1:0] data_cnt;
wire       n64_480i;
wire       vmode;
wire       blurry_pixel_pos;

n64_vinfo_ext get_vinfo(
  .nCLK(nCLK),
  .nDSYNC(nDSYNC),
  .Sync_pre(vdata_r[0][`VDATA_SY_SLICE]),
  .D_i(D_i),
  .vinfo_o({data_cnt,n64_480i,vmode,blurry_pixel_pos})
);





wire nrst_deblur = install_type ? nRST_nManualDB : 1'b1;
wire ndo_deblur, nblank_rgb;
wire [1:0] deblurparams_pass;

n64_deblur deblur_management(
  .nCLK(nCLK),
  .nDSYNC(nDSYNC),
  .nRST(nrst_deblur),
  .vdata_pre(vdata_r[0]),
  .vdata_cur(D_i),
  .deblurparams_i({data_cnt,n64_480i,vmode,blurry_pixel_pos,nForceDeBlur,nDeBlurMan}),
  .deblurparams_o(deblurparams_pass)
);





wire [`VDATA_FU_SLICE] vdata_r[0:1];

n64_vdemux video_demux(
  .nCLK(nCLK),
  .nDSYNC(nDSYNC),
  .D_i(D_i),
  .demuxparams_i({data_cnt,deblurparams_pass,n15bit_mode}),
  .vdata_r_0(vdata_r[0]),
  .vdata_r_1(vdata_r[1])
);





assign {nVSYNC,nCLAMP,nHSYNC,nCSYNC} =  vdata_r[1][`VDATA_SY_SLICE];
assign  R_o                          = {vdata_r[1][`VDATA_RE_SLICE],vdata_r[1][3*color_width-1]};
assign  G_o                          = {vdata_r[1][`VDATA_GR_SLICE],vdata_r[1][2*color_width-1]};
assign  B_o                          = {vdata_r[1][`VDATA_BL_SLICE],vdata_r[1][  color_width-1]};

assign ADV712x_CLK  = data_cnt[0];
assign ADV712x_SYNC = nSYNC_ON_GREEN ? 1'b0 : vdata_r[1][vdata_width-4];

endmodule