data/full_repos/permissive/206670486/Modulos/MUX.v
 line:19: before: ")"
1: b"%Error: data/full_repos/permissive/206670486/Modulos/MUX.v:19: syntax error, unexpected ')', expecting '['\nmodule MUX_ALUSRC_FWDB (EX_ALUSrc_In,Saida_ForwardB_In,EX_ReadData2_In, EX_Saida_Ext_Sinal_In, WB_WriteData_In, MEM_ALUresult_In,Saida_Mux_FWRB_ALUSrc_Out,);\n                                                                                                                                                           ^\n%Error: data/full_repos/permissive/206670486/Modulos/MUX.v:28: syntax error, unexpected always\n  always@(*) begin\n  ^~~~~~\n%Error: Exiting due to 2 error(s)\n"
module MUX_32b (controle,entrada1,entrada2,saida);
  input controle;
  input [31:0]entrada1;
  input [31:0]entrada2;
  output [31:0]saida;
  assign saida = (controle == 0) ? entrada1 : entrada2;
endmodule
module MUX_32b (controle,entrada1,entrada2,saida);

  input controle;
  input [31:0]entrada1;
  input [31:0]entrada2;
  output [31:0]saida;
  assign saida = (controle == 0) ? entrada1 : entrada2;
endmodule