data/full_repos/permissive/115403704/src/SE.v
data/verilator_xmls/4b85209b-3efb-40ae-8d23-eecf82abdcca.xml
module SE(in,out);
    input [15:0] in;
    output [31:0] out;

    assign out = {{16{in[15]}},in};
endmodule
module SE(in,out);

    input [15:0] in;
    output [31:0] out;

    assign out = {{16{in[15]}},in};
endmodule