data/full_repos/permissive/157135695/signExtend.v
data/verilator_xmls/27a572a7-afb2-411a-8a05-ef2fcd2436a6.xml
module signExtend(IMM,SEXT);
	input [5:0] IMM;
	output [7:0] SEXT;
	
	assign SEXT={IMM[5], IMM[5], IMM[5:0]};

endmodule
module signExtend(IMM,SEXT);

	input [5:0] IMM;
	output [7:0] SEXT;
	
	assign SEXT={IMM[5], IMM[5], IMM[5:0]};

endmodule