data/full_repos/permissive/121277233/ons20-app52-ref_ofshw/vivado/onets_7020_4x_ref_ofshw/ip/packet_pipeline_v1_0/src/user_data_path/wildcard_lut_action.v
 line:99: before: "integer"
1: b"%Error: data/full_repos/permissive/121277233/ons20-app52-ref_ofshw/vivado/onets_7020_4x_ref_ofshw/ip/packet_pipeline_v1_0/src/user_data_path/wildcard_lut_action.v:52: Define or directive not defined: '`PRIO_WIDTH'\n    input [`PRIO_WIDTH-1:0]bram_addr,\n           ^~~~~~~~~~~\n%Error: data/full_repos/permissive/121277233/ons20-app52-ref_ofshw/vivado/onets_7020_4x_ref_ofshw/ip/packet_pipeline_v1_0/src/user_data_path/wildcard_lut_action.v:62: Define or directive not defined: '`OPENFLOW_ACTION_WIDTH'\n    reg [`OPENFLOW_ACTION_WIDTH-1:0]    lut_actions[LUT_DEPTH-1:0];\n         ^~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/121277233/ons20-app52-ref_ofshw/vivado/onets_7020_4x_ref_ofshw/ip/packet_pipeline_v1_0/src/user_data_path/wildcard_lut_action.v:63: Define or directive not defined: '`OPENFLOW_ACTION_WIDTH'\n    reg [`OPENFLOW_ACTION_WIDTH-1:0]    lut_actions_tmp;\n         ^~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/121277233/ons20-app52-ref_ofshw/vivado/onets_7020_4x_ref_ofshw/ip/packet_pipeline_v1_0/src/user_data_path/wildcard_lut_action.v:123: Define or directive not defined: '`CPCI_NF2_DATA_WIDTH'\n   localparam NUM_DATA_WORDS_USED = ceildiv(DATA_WIDTH,`CPCI_NF2_DATA_WIDTH);\n                                                       ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/121277233/ons20-app52-ref_ofshw/vivado/onets_7020_4x_ref_ofshw/ip/packet_pipeline_v1_0/src/user_data_path/wildcard_lut_action.v:124: Define or directive not defined: '`CPCI_NF2_DATA_WIDTH'\n   localparam NUM_CMP_WORDS_USED  = ceildiv(CMP_WIDTH, `CPCI_NF2_DATA_WIDTH);\n                                                       ^~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 5 error(s)\n"
module wildcard_lut_action
    #(
      parameter DATA_WIDTH = 32,
      parameter CMP_WIDTH = 64,
      parameter LUT_DEPTH  = 16,
      parameter LUT_DEPTH_BITS = 4,
      parameter CURRENT_TABLE_ID=0
      )
   (
    input                              lookup_req,
    input      [CMP_WIDTH-1:0]         lookup_cmp_data,
    output reg                         lookup_ack,
    output reg                         lookup_hit,
    output reg    [DATA_WIDTH-1:0]     lookup_data,
    output reg [LUT_DEPTH_BITS-1:0]    lookup_address,



    input                              cam_busy,
    input                              cam_match,
    input      [LUT_DEPTH_BITS-1:0]         cam_match_addr,
     output     [CMP_WIDTH-1:0]         cam_cmp_din,



    input                              table_flush,


    input                              reset,
    input                              clk,
    
    input                             skip_lookup,
    
    input bram_cs,
    input bram_we,
    input [`PRIO_WIDTH-1:0]bram_addr,
    input [319:0]lut_actions_in,  
    output [319:0]lut_actions_out
    
    
   );
    assign cam_cmp_din       = skip_lookup?0:lookup_cmp_data;
    reg [LUT_DEPTH_BITS-1:0] prio;

   
    reg [`OPENFLOW_ACTION_WIDTH-1:0]    lut_actions[LUT_DEPTH-1:0];
    reg [`OPENFLOW_ACTION_WIDTH-1:0]    lut_actions_tmp;

    reg wea;
    reg ena;
    reg [3:0]addra;
   
   reg bram_cs_en;
   reg bram_we_en;
   reg [LUT_DEPTH_BITS-1:0]bram_addr_en;
   

        lut_action_bram lut_action_bram
        (  .clka(clk),
           .ena(bram_cs_en),
           .wea(bram_we_en),
           .addra(bram_addr_en),
           .dina(lut_actions_in),
           .douta(lut_actions_out)
        );
   
    reg [LUT_DEPTH_BITS-1:0]clear_counter;
 


   function integer log2;
      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
   endfunction

   function integer ceildiv;
      input integer num;
      input integer divisor;
      begin
         if (num <= divisor)
            ceildiv = 1;
         else begin
            ceildiv = num / divisor;
            if (ceildiv * divisor < num)
               ceildiv = ceildiv + 1;
         end
      end
   endfunction 


   localparam NUM_DATA_WORDS_USED = ceildiv(DATA_WIDTH,`CPCI_NF2_DATA_WIDTH);
   localparam NUM_CMP_WORDS_USED  = ceildiv(CMP_WIDTH, `CPCI_NF2_DATA_WIDTH);
   localparam NUM_REGS_USED = (2
                               + NUM_DATA_WORDS_USED
                               + NUM_CMP_WORDS_USED
                               + NUM_CMP_WORDS_USED);

   localparam READ_ADDR  = NUM_REGS_USED-2;
   
   localparam  WAIT=0,
               MATCH_BUSY=1,
               MATCH=2,
               MATCH_WAIT=3,
               DONE=4;


   reg [3:0]cur_st,nxt_st;   
   
   always@(posedge clk)
      if(reset)
         cur_st<=0;
      else cur_st<=nxt_st;
   always@(*)
   begin
      nxt_st=cur_st;
      case(cur_st)
            WAIT:   if(!cam_busy & lookup_req & !skip_lookup)
                        begin 


                             nxt_st=MATCH;
                        end
                     else if(!cam_busy & lookup_req & skip_lookup)
                        nxt_st=DONE;
            MATCH_BUSY:nxt_st=WAIT;
            MATCH:  nxt_st=MATCH_WAIT;
            MATCH_WAIT:nxt_st=DONE;
            DONE:   nxt_st=WAIT;
            default:nxt_st=WAIT;    
        endcase
     end

     always@(posedge clk)
        if(reset)
            lookup_ack<=0;
        else if(cur_st==DONE)   
            lookup_ack<=1;
        else if(cur_st==MATCH_BUSY)
            lookup_ack<=1;
        else
            lookup_ack<=0;

     always@(posedge clk)
        if(reset)
            lookup_hit<=0;
        else if(cur_st==DONE)   
            lookup_hit<=cam_match;
        else if(MATCH_BUSY)
            lookup_hit<=0;
        else
            lookup_hit<=0;
            
      always@(posedge clk)
      if(reset)
         bram_cs_en<=0;

      else if(cur_st==MATCH)
         bram_cs_en<=1;
      else bram_cs_en<=bram_cs;
      
      always@(posedge clk)
      if(reset)
         bram_we_en<=0;

      else if(cur_st==MATCH)
         bram_we_en<=0;
      else bram_we_en<=bram_we;
      
      always@(posedge clk)
      if(reset)
         bram_addr_en<=0;

      else if(cur_st==MATCH)
         bram_addr_en<=cam_match_addr;
      else bram_addr_en<=bram_addr;

     always@(posedge clk)
        if(reset)
            lookup_data<=0;
        else
            lookup_data<=cam_match?lut_actions_out:0;
            
     always@(posedge clk)
        if(reset)
            lookup_address<=0;
        else if(cur_st==MATCH_BUSY)
            lookup_address<=0;
        else if(cur_st==DONE)   
            lookup_address<=cam_match?cam_match_addr:0;
        else lookup_address<=0;
            




endmodule
module wildcard_lut_action
    #(
      parameter DATA_WIDTH = 32,
      parameter CMP_WIDTH = 64,
      parameter LUT_DEPTH  = 16,
      parameter LUT_DEPTH_BITS = 4,
      parameter CURRENT_TABLE_ID=0
      )
   (
    input                              lookup_req,
    input      [CMP_WIDTH-1:0]         lookup_cmp_data,
    output reg                         lookup_ack,
    output reg                         lookup_hit,
    output reg    [DATA_WIDTH-1:0]     lookup_data,
    output reg [LUT_DEPTH_BITS-1:0]    lookup_address,



    input                              cam_busy,
    input                              cam_match,
    input      [LUT_DEPTH_BITS-1:0]         cam_match_addr,
     output     [CMP_WIDTH-1:0]         cam_cmp_din,



    input                              table_flush,


    input                              reset,
    input                              clk,
    
    input                             skip_lookup,
    
    input bram_cs,
    input bram_we,
    input [`PRIO_WIDTH-1:0]bram_addr,
    input [319:0]lut_actions_in,  
    output [319:0]lut_actions_out
    
    
   );

    assign cam_cmp_din       = skip_lookup?0:lookup_cmp_data;
    reg [LUT_DEPTH_BITS-1:0] prio;

   
    reg [`OPENFLOW_ACTION_WIDTH-1:0]    lut_actions[LUT_DEPTH-1:0];
    reg [`OPENFLOW_ACTION_WIDTH-1:0]    lut_actions_tmp;

    reg wea;
    reg ena;
    reg [3:0]addra;
   
   reg bram_cs_en;
   reg bram_we_en;
   reg [LUT_DEPTH_BITS-1:0]bram_addr_en;
   

        lut_action_bram lut_action_bram
        (  .clka(clk),
           .ena(bram_cs_en),
           .wea(bram_we_en),
           .addra(bram_addr_en),
           .dina(lut_actions_in),
           .douta(lut_actions_out)
        );
   
    reg [LUT_DEPTH_BITS-1:0]clear_counter;
 


   function integer log2;
      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
   endfunction

   function integer ceildiv;
      input integer num;
      input integer divisor;
      begin
         if (num <= divisor)
            ceildiv = 1;
         else begin
            ceildiv = num / divisor;
            if (ceildiv * divisor < num)
               ceildiv = ceildiv + 1;
         end
      end
   endfunction 


   localparam NUM_DATA_WORDS_USED = ceildiv(DATA_WIDTH,`CPCI_NF2_DATA_WIDTH);
   localparam NUM_CMP_WORDS_USED  = ceildiv(CMP_WIDTH, `CPCI_NF2_DATA_WIDTH);
   localparam NUM_REGS_USED = (2
                               + NUM_DATA_WORDS_USED
                               + NUM_CMP_WORDS_USED
                               + NUM_CMP_WORDS_USED);

   localparam READ_ADDR  = NUM_REGS_USED-2;
   
   localparam  WAIT=0,
               MATCH_BUSY=1,
               MATCH=2,
               MATCH_WAIT=3,
               DONE=4;


   reg [3:0]cur_st,nxt_st;   
   
   always@(posedge clk)
      if(reset)
         cur_st<=0;
      else cur_st<=nxt_st;
   always@(*)
   begin
      nxt_st=cur_st;
      case(cur_st)
            WAIT:   if(!cam_busy & lookup_req & !skip_lookup)
                        begin 


                             nxt_st=MATCH;
                        end
                     else if(!cam_busy & lookup_req & skip_lookup)
                        nxt_st=DONE;
            MATCH_BUSY:nxt_st=WAIT;
            MATCH:  nxt_st=MATCH_WAIT;
            MATCH_WAIT:nxt_st=DONE;
            DONE:   nxt_st=WAIT;
            default:nxt_st=WAIT;    
        endcase
     end

     always@(posedge clk)
        if(reset)
            lookup_ack<=0;
        else if(cur_st==DONE)   
            lookup_ack<=1;
        else if(cur_st==MATCH_BUSY)
            lookup_ack<=1;
        else
            lookup_ack<=0;

     always@(posedge clk)
        if(reset)
            lookup_hit<=0;
        else if(cur_st==DONE)   
            lookup_hit<=cam_match;
        else if(MATCH_BUSY)
            lookup_hit<=0;
        else
            lookup_hit<=0;
            
      always@(posedge clk)
      if(reset)
         bram_cs_en<=0;

      else if(cur_st==MATCH)
         bram_cs_en<=1;
      else bram_cs_en<=bram_cs;
      
      always@(posedge clk)
      if(reset)
         bram_we_en<=0;

      else if(cur_st==MATCH)
         bram_we_en<=0;
      else bram_we_en<=bram_we;
      
      always@(posedge clk)
      if(reset)
         bram_addr_en<=0;

      else if(cur_st==MATCH)
         bram_addr_en<=cam_match_addr;
      else bram_addr_en<=bram_addr;

     always@(posedge clk)
        if(reset)
            lookup_data<=0;
        else
            lookup_data<=cam_match?lut_actions_out:0;
            
     always@(posedge clk)
        if(reset)
            lookup_address<=0;
        else if(cur_st==MATCH_BUSY)
            lookup_address<=0;
        else if(cur_st==DONE)   
            lookup_address<=cam_match?cam_match_addr:0;
        else lookup_address<=0;
            




endmodule