data/full_repos/permissive/117880471/HW3/priority_encoder_4x2.v
 line:17: before: "$"
1: b'%Warning-STMTDLY: data/full_repos/permissive/117880471/HW3/priority_encoder_4x2.v:10: Unsupported: Ignoring delay on this delayed statement.\n #0 I = 4\'b0000;\n ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/117880471/HW3/priority_encoder_4x2.v:11: Unsupported: Ignoring delay on this delayed statement.\n #20 I = 4\'b0001;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/117880471/HW3/priority_encoder_4x2.v:12: Unsupported: Ignoring delay on this delayed statement.\n #20 I = 4\'b0010;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/117880471/HW3/priority_encoder_4x2.v:13: Unsupported: Ignoring delay on this delayed statement.\n #20 I = 4\'b0011;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/117880471/HW3/priority_encoder_4x2.v:14: Unsupported: Ignoring delay on this delayed statement.\n #20 I = 4\'b0101;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/117880471/HW3/priority_encoder_4x2.v:15: Unsupported: Ignoring delay on this delayed statement.\n #20 I = 4\'b1011;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/117880471/HW3/priority_encoder_4x2.v:16: Unsupported: Ignoring delay on this delayed statement.\n #20 I = 4\'b1111;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/117880471/HW3/priority_encoder_4x2.v:17: Unsupported: Ignoring delay on this delayed statement.\n #20 $stop;\n ^\n%Error: data/full_repos/permissive/117880471/HW3/priority_encoder_4x2.v:22: Unsupported or unknown PLI call: $monitor\n $monitor("time=%3d, Y=%2b, V=%b, I=%4b", $time, Y, V, I);\n ^~~~~~~~\n%Error: data/full_repos/permissive/117880471/HW3/priority_encoder_4x2.v:27: Unsupported or unknown PLI call: $dumpfile\n $dumpfile("priority_encoder_4x2.vcd");\n ^~~~~~~~~\n%Error: data/full_repos/permissive/117880471/HW3/priority_encoder_4x2.v:28: Unsupported or unknown PLI call: $dumpvars\n $dumpvars;\n ^~~~~~~~~\n%Error: Exiting due to 3 error(s), 8 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module priority_encoder_4x2(Y,V,I);
output wire [1:0] Y;
output wire V;
input wire [3:0] I;

wire i_2_bar, and_out_1, v_interm;

or O1(Y[0], I[3], I[2]);
not N1(i_2_bar, I[2]);
and A1(and_out_1, i_2_bar, I[1]);
or O2(Y[1], and_out_1, I[3]);
or O3(v_interm, Y[0], I[1]);
or O4(V, v_interm, I[0]);

endmodule
module priority_encoder_4x2(Y,V,I);

output wire [1:0] Y;
output wire V;
input wire [3:0] I;

wire i_2_bar, and_out_1, v_interm;

or O1(Y[0], I[3], I[2]);
not N1(i_2_bar, I[2]);
and A1(and_out_1, i_2_bar, I[1]);
or O2(Y[1], and_out_1, I[3]);
or O3(v_interm, Y[0], I[1]);
or O4(V, v_interm, I[0]);

endmodule