data/full_repos/permissive/152581089/Verilog/top.v
1: b'%Warning-IMPLICIT: data/full_repos/permissive/152581089/Verilog/top.v:327: Signal definition not found, creating implicitly: \'irq_port2\'\n                    irq_port2,     \n                    ^~~~~~~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Warning-IMPLICIT: data/full_repos/permissive/152581089/Verilog/top.v:328: Signal definition not found, creating implicitly: \'irq_port1\'\n                                                                         : ... Suggested alternative: \'irq_port2\'\n                    irq_port1,     \n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/152581089/Verilog/top.v:103: Cannot find file containing module: \'IBUF\'\nIBUF   ibuf_reset_n   (.O(reset_n), .I(reset));\n^~~~\n        ... Looked in:\n             data/full_repos/permissive/152581089/Verilog,data/full_repos/permissive/152581089/IBUF\n             data/full_repos/permissive/152581089/Verilog,data/full_repos/permissive/152581089/IBUF.v\n             data/full_repos/permissive/152581089/Verilog,data/full_repos/permissive/152581089/IBUF.sv\n             IBUF\n             IBUF.v\n             IBUF.sv\n             obj_dir/IBUF\n             obj_dir/IBUF.v\n             obj_dir/IBUF.sv\n%Error: data/full_repos/permissive/152581089/Verilog/top.v:107: Cannot find file containing module: \'IBUF\'\nIBUF  UART_RXD_PIN       (.O(uart_rxd),        .I(USB_RS232_RXD_DB));\n^~~~\n%Error: data/full_repos/permissive/152581089/Verilog/top.v:108: Cannot find file containing module: \'OBUF\'\nOBUF  UART_TXD_PIN       (.I(uart_txd),        .O(USB_RS232_TXD_DB));\n^~~~\n%Error: data/full_repos/permissive/152581089/Verilog/top.v:135: Cannot find file containing module: \'OBUF\'\nOBUF  LED0_PIN           (.I(led[0]),          .O(GPIO_LED0));\n^~~~\n%Error: data/full_repos/permissive/152581089/Verilog/top.v:136: Cannot find file containing module: \'IBUF\'\nIBUF  GPIO_PIN     (.O(cntrl3_insync[0]), .I(IN_GPIO));\n^~~~\n%Error: data/full_repos/permissive/152581089/Verilog/top.v:155: Cannot find file containing module: \'openMSP430\'\nopenMSP430 openMSP430_instance(\n^~~~~~~~~~\n%Error: data/full_repos/permissive/152581089/Verilog/top.v:221: Cannot find file containing module: \'RAM_16x2k\'\nRAM_16x2k DMEM_0 (\n^~~~~~~~~\n%Error: data/full_repos/permissive/152581089/Verilog/top.v:248: Cannot find file containing module: \'ROM_16x12k\'\nROM_16x12k PMEM_0 (\n^~~~~~~~~~\n%Error: data/full_repos/permissive/152581089/Verilog/top.v:260: Cannot find file containing module: \'omsp_gpio\'\nomsp_gpio #(.P1_EN(1),\n^~~~~~~~~\n%Error: Exiting due to 9 error(s), 2 warning(s)\n'
module top(
	 input dco_clk,
    output GPIO_LED0,
















    input IN_GPIO,
    input USB_RS232_RXD_DB,
    output USB_RS232_TXD_DB,
	     



    input reset
);


wire mclk_wire;

wire reset_n;
wire puc_rst;


wire [7:0] led;


wire [7:0] switch;


wire dmem_cen_wire;
wire [9:0] dmem_addr_wire;
wire [15:0] dmem_dout_wire;
wire [15:0] dmem_din_wire;
wire [1:0] dmem_wen_wire;




wire pmem_cen_wire;
wire [13:0] pmem_addr_wire;
wire [15:0] pmem_dout_wire;
wire [15:0] pmem_din_wire;
wire [1:0] pmem_wen_wire;


wire [13:0] irq_bus;
wire nmi;


wire [7:0] p1_din;
wire [7:0] p1_dout;
wire [7:0] p1_dout_en;
wire [7:0] p1_sel;
wire [7:0] p2_din;
wire [7:0] p2_dout;
wire [7:0] p2_dout_en;
wire [7:0] p2_sel;


wire [15:0] din_test;

wire [13:0] per_addr;
wire [15:0] per_din;
wire [1:0] per_we;
wire per_en;
wire [15:0] per_dout_gpio;
wire [15:0]  per_dout;

wire [15:0] cntrl3_insync;







IBUF   ibuf_reset_n   (.O(reset_n), .I(reset));



IBUF  UART_RXD_PIN       (.O(uart_rxd),        .I(USB_RS232_RXD_DB));
OBUF  UART_TXD_PIN       (.I(uart_txd),        .O(USB_RS232_TXD_DB));


























OBUF  LED0_PIN           (.I(led[0]),          .O(GPIO_LED0));
IBUF 	GPIO_PIN				 (.O(cntrl3_insync[0]), .I(IN_GPIO));


















openMSP430 openMSP430_instance(


    .aclk(),
    .aclk_en(aclk_en),
    .dbg_freeze(dbg_freeze),
    .dbg_i2c_sda_out(),
    .dbg_uart_txd(uart_txd),
    .dco_enable(),
    .dco_wkup(),
    .dmem_addr(dmem_addr_wire),
    .dmem_cen(dmem_cen_wire),
    .dmem_din(dmem_din_wire),
    .dmem_wen(dmem_wen_wire),
    .irq_acc(),
    .lfxt_enable(),
    .lfxt_wkup(),
    .mclk(mclk_wire),
    .per_addr(per_addr),
    .per_din(per_din),
    .per_we(per_we),
    .per_en(per_en),
    .pmem_addr(pmem_addr_wire),
    .pmem_cen(pmem_cen_wire),
    .pmem_din(pmem_din_wire),
    .pmem_wen(pmem_wen_wire),
    .puc_rst(puc_rst),
    .smclk(),
    .smclk_en(smclk_en),
    

    .cpu_en(1'b1),
    .dbg_en(1'b1),
    .dbg_i2c_addr(),
    .dbg_i2c_broadcast(),
    .dbg_i2c_scl(),
    .dbg_i2c_sda_in(),
    .dbg_uart_rxd(uart_rxd),
    .dco_clk(dco_clk),
    .dmem_dout(dmem_dout_wire),
    .irq(irq_bus),
    .lfxt_clk(1'b0),
    .nmi(nmi),
    .per_dout(per_dout_gpio),
    .pmem_dout(pmem_dout_wire),
    .reset_n(reset_n),
    .scan_enable(1'b0),
    .scan_mode(1'b0),
    .wkup(1'b0)
);
















RAM_16x2k DMEM_0 (
  .clka(dco_clk),
  .ena(~dmem_cen_wire),
  .wea(~dmem_wen_wire),
  .addra(dmem_addr_wire),
  .dina(dmem_din_wire),
  .douta(dmem_dout_wire)
);



















ROM_16x12k PMEM_0 (
  .clka(dco_clk),
  .ena(~pmem_cen_wire),
  .wea(~pmem_wen_wire),
  .addra(pmem_addr_wire),
  .dina(pmem_din_wire),
  .douta(pmem_dout_wire)
);




omsp_gpio #(.P1_EN(1),
            .P2_EN(1),
            .P3_EN(0),
            .P4_EN(0),
            .P5_EN(0),
            .P6_EN(0)) gpio_0 (


    .irq_port1    (irq_port1),
    .irq_port2    (irq_port2),
    .p1_dout      (p1_dout),
    .p1_dout_en   (p1_dout_en),
    .p1_sel       (p1_sel),
    .p2_dout      (p2_dout),
    .p2_dout_en   (p2_dout_en),
    .p2_sel       (p2_sel),
    .p3_dout      (),
    .p3_dout_en   (),
    .p3_sel       (),
    .p4_dout      (),
    .p4_dout_en   (),
    .p4_sel       (),
    .p5_dout      (),
    .p5_dout_en   (),
    .p5_sel       (),
    .p6_dout      (),
    .p6_dout_en   (),
    .p6_sel       (),
    .per_dout     (per_dout),
			     

    .mclk         (mclk_wire),
    .p1_din       (p1_din),
    .p2_din       (p2_din),
    .p3_din       (8'h00),
    .p4_din       (8'h00),
    .p5_din       (8'h00),
    .p6_din       (8'h00),
    .per_addr     (per_addr),
    .per_din      (per_din),
    .per_en       (per_en),
    .per_we       (per_we),
    .puc_rst      (puc_rst)
);




assign  led[7:0]         = p1_dout[7:0];


assign  p2_din[7:0]      = switch[7:0];




assign nmi      =   1'b0;
assign irq_bus  =  {1'b0,
                    1'b0,
                    1'b0,
                    1'b0,
                    1'b0,
                    1'b0,
                    1'b0,
                    1'b0,
                    1'b0,
                    1'b0,
                    irq_port2,
                    irq_port1,
                    1'b0,
                    1'b0};
						 




	wire [15:0] my_dout;
	wire [15:0] out1;
	wire [15:0] out2;
	assign cntrl3_insync[15:1] = 0;
	wire [15:0] out4;
	assign out4=0;
	
   assign my_dout = 16'd0;













	 
	 


assign  per_dout_gpio =  per_dout | my_dout;
























































endmodule
module top(
	 input dco_clk,
    output GPIO_LED0,
















    input IN_GPIO,
    input USB_RS232_RXD_DB,
    output USB_RS232_TXD_DB,
	     



    input reset
);



wire mclk_wire;

wire reset_n;
wire puc_rst;


wire [7:0] led;


wire [7:0] switch;


wire dmem_cen_wire;
wire [9:0] dmem_addr_wire;
wire [15:0] dmem_dout_wire;
wire [15:0] dmem_din_wire;
wire [1:0] dmem_wen_wire;




wire pmem_cen_wire;
wire [13:0] pmem_addr_wire;
wire [15:0] pmem_dout_wire;
wire [15:0] pmem_din_wire;
wire [1:0] pmem_wen_wire;


wire [13:0] irq_bus;
wire nmi;


wire [7:0] p1_din;
wire [7:0] p1_dout;
wire [7:0] p1_dout_en;
wire [7:0] p1_sel;
wire [7:0] p2_din;
wire [7:0] p2_dout;
wire [7:0] p2_dout_en;
wire [7:0] p2_sel;


wire [15:0] din_test;

wire [13:0] per_addr;
wire [15:0] per_din;
wire [1:0] per_we;
wire per_en;
wire [15:0] per_dout_gpio;
wire [15:0]  per_dout;

wire [15:0] cntrl3_insync;







IBUF   ibuf_reset_n   (.O(reset_n), .I(reset));



IBUF  UART_RXD_PIN       (.O(uart_rxd),        .I(USB_RS232_RXD_DB));
OBUF  UART_TXD_PIN       (.I(uart_txd),        .O(USB_RS232_TXD_DB));


























OBUF  LED0_PIN           (.I(led[0]),          .O(GPIO_LED0));
IBUF 	GPIO_PIN				 (.O(cntrl3_insync[0]), .I(IN_GPIO));


















openMSP430 openMSP430_instance(


    .aclk(),
    .aclk_en(aclk_en),
    .dbg_freeze(dbg_freeze),
    .dbg_i2c_sda_out(),
    .dbg_uart_txd(uart_txd),
    .dco_enable(),
    .dco_wkup(),
    .dmem_addr(dmem_addr_wire),
    .dmem_cen(dmem_cen_wire),
    .dmem_din(dmem_din_wire),
    .dmem_wen(dmem_wen_wire),
    .irq_acc(),
    .lfxt_enable(),
    .lfxt_wkup(),
    .mclk(mclk_wire),
    .per_addr(per_addr),
    .per_din(per_din),
    .per_we(per_we),
    .per_en(per_en),
    .pmem_addr(pmem_addr_wire),
    .pmem_cen(pmem_cen_wire),
    .pmem_din(pmem_din_wire),
    .pmem_wen(pmem_wen_wire),
    .puc_rst(puc_rst),
    .smclk(),
    .smclk_en(smclk_en),
    

    .cpu_en(1'b1),
    .dbg_en(1'b1),
    .dbg_i2c_addr(),
    .dbg_i2c_broadcast(),
    .dbg_i2c_scl(),
    .dbg_i2c_sda_in(),
    .dbg_uart_rxd(uart_rxd),
    .dco_clk(dco_clk),
    .dmem_dout(dmem_dout_wire),
    .irq(irq_bus),
    .lfxt_clk(1'b0),
    .nmi(nmi),
    .per_dout(per_dout_gpio),
    .pmem_dout(pmem_dout_wire),
    .reset_n(reset_n),
    .scan_enable(1'b0),
    .scan_mode(1'b0),
    .wkup(1'b0)
);
















RAM_16x2k DMEM_0 (
  .clka(dco_clk),
  .ena(~dmem_cen_wire),
  .wea(~dmem_wen_wire),
  .addra(dmem_addr_wire),
  .dina(dmem_din_wire),
  .douta(dmem_dout_wire)
);



















ROM_16x12k PMEM_0 (
  .clka(dco_clk),
  .ena(~pmem_cen_wire),
  .wea(~pmem_wen_wire),
  .addra(pmem_addr_wire),
  .dina(pmem_din_wire),
  .douta(pmem_dout_wire)
);




omsp_gpio #(.P1_EN(1),
            .P2_EN(1),
            .P3_EN(0),
            .P4_EN(0),
            .P5_EN(0),
            .P6_EN(0)) gpio_0 (


    .irq_port1    (irq_port1),
    .irq_port2    (irq_port2),
    .p1_dout      (p1_dout),
    .p1_dout_en   (p1_dout_en),
    .p1_sel       (p1_sel),
    .p2_dout      (p2_dout),
    .p2_dout_en   (p2_dout_en),
    .p2_sel       (p2_sel),
    .p3_dout      (),
    .p3_dout_en   (),
    .p3_sel       (),
    .p4_dout      (),
    .p4_dout_en   (),
    .p4_sel       (),
    .p5_dout      (),
    .p5_dout_en   (),
    .p5_sel       (),
    .p6_dout      (),
    .p6_dout_en   (),
    .p6_sel       (),
    .per_dout     (per_dout),
			     

    .mclk         (mclk_wire),
    .p1_din       (p1_din),
    .p2_din       (p2_din),
    .p3_din       (8'h00),
    .p4_din       (8'h00),
    .p5_din       (8'h00),
    .p6_din       (8'h00),
    .per_addr     (per_addr),
    .per_din      (per_din),
    .per_en       (per_en),
    .per_we       (per_we),
    .puc_rst      (puc_rst)
);




assign  led[7:0]         = p1_dout[7:0];


assign  p2_din[7:0]      = switch[7:0];




assign nmi      =   1'b0;
assign irq_bus  =  {1'b0,
                    1'b0,
                    1'b0,
                    1'b0,
                    1'b0,
                    1'b0,
                    1'b0,
                    1'b0,
                    1'b0,
                    1'b0,
                    irq_port2,
                    irq_port1,
                    1'b0,
                    1'b0};
						 




	wire [15:0] my_dout;
	wire [15:0] out1;
	wire [15:0] out2;
	assign cntrl3_insync[15:1] = 0;
	wire [15:0] out4;
	assign out4=0;
	
   assign my_dout = 16'd0;













	 
	 


assign  per_dout_gpio =  per_dout | my_dout;
























































endmodule