data/full_repos/permissive/179980995/Lab1/FA_4b_Structural/FA_4b_Structural.v
data/verilator_xmls/ea349f38-7cd9-49af-88ac-e2d7b8bbb93c.xml
module full_adder_4b(a, b, cin, sum, cout);
input [3:0] a, b;
input cin;
output [3:0] sum;
output cout;
wire [2:0] transfer;
fa fa1(a[0], b[0], cin, sum[0], transfer[0]);
fa fa2(a[1], b[1], transfer[0], sum[1], transfer[1]);
fa fa3(a[2], b[2], transfer[1], sum[2], transfer[2]);
fa fa4(a[3], b[3], transfer[2], sum[3], cout);
endmodule
module full_adder_4b(a, b, cin, sum, cout);

input [3:0] a, b;
input cin;
output [3:0] sum;
output cout;
wire [2:0] transfer;
fa fa1(a[0], b[0], cin, sum[0], transfer[0]);
fa fa2(a[1], b[1], transfer[0], sum[1], transfer[1]);
fa fa3(a[2], b[2], transfer[1], sum[2], transfer[2]);
fa fa4(a[3], b[3], transfer[2], sum[3], cout);
endmodule