data/full_repos/permissive/100331186/tarea4/modulos/salidaSerial.v
1: b"%Error: data/full_repos/permissive/100331186/tarea4/modulos/salidaSerial.v:11: Duplicate declaration of signal: 'modo'\n                                                                             : ... note: ANSI ports must have type declared with the I/O (IEEE 1800-2017 23.2.2.2)\n  wire [1:0] modo;\n             ^~~~\n        data/full_repos/permissive/100331186/tarea4/modulos/salidaSerial.v:2: ... Location of original declaration\n  input [1:0] modo,\n              ^~~~\n%Error: data/full_repos/permissive/100331186/tarea4/modulos/salidaSerial.v:12: Duplicate declaration of signal: 's_der'\n  wire s_der, s_izq, s_out, dir;\n       ^~~~~\n        data/full_repos/permissive/100331186/tarea4/modulos/salidaSerial.v:3: ... Location of original declaration\n  input s_der,\n        ^~~~~\n%Error: data/full_repos/permissive/100331186/tarea4/modulos/salidaSerial.v:12: Duplicate declaration of signal: 's_izq'\n  wire s_der, s_izq, s_out, dir;\n              ^~~~~\n        data/full_repos/permissive/100331186/tarea4/modulos/salidaSerial.v:4: ... Location of original declaration\n  input s_izq,\n        ^~~~~\n%Error: data/full_repos/permissive/100331186/tarea4/modulos/salidaSerial.v:12: Duplicate declaration of signal: 's_out'\n  wire s_der, s_izq, s_out, dir;\n                     ^~~~~\n        data/full_repos/permissive/100331186/tarea4/modulos/salidaSerial.v:6: ... Location of original declaration\n  output s_out\n         ^~~~~\n%Error: data/full_repos/permissive/100331186/tarea4/modulos/salidaSerial.v:12: Duplicate declaration of signal: 'dir'\n  wire s_der, s_izq, s_out, dir;\n                            ^~~\n        data/full_repos/permissive/100331186/tarea4/modulos/salidaSerial.v:5: ... Location of original declaration\n  input dir,\n        ^~~\n%Error: Exiting due to 5 error(s)\n"
module salidaSerial (
  input [1:0] modo,
  input s_der,
  input s_izq,
  input dir,
  output s_out
);



  wire [1:0] modo;
  wire s_der, s_izq, s_out, dir;
  wire outMux;
  wire [1:0] canalesMux;

  assign canalesMux[0] = s_izq;
  assign canalesMux[1] = s_der;



parameter notoe = 1'b0;

  mux derOizq(
	  .s(dir),
	  .a(canalesMux),
	  .notoe(notoe),
	  .y(outMux)
  );

  serialOcontiguo salida(
	  .usual(1'b0),
	  .s_in(outMux),
	  .modo(modo),
	  .out(s_out)
);

endmodule
module salidaSerial (
  input [1:0] modo,
  input s_der,
  input s_izq,
  input dir,
  output s_out
);




  wire [1:0] modo;
  wire s_der, s_izq, s_out, dir;
  wire outMux;
  wire [1:0] canalesMux;

  assign canalesMux[0] = s_izq;
  assign canalesMux[1] = s_der;



parameter notoe = 1'b0;

  mux derOizq(
	  .s(dir),
	  .a(canalesMux),
	  .notoe(notoe),
	  .y(outMux)
  );

  serialOcontiguo salida(
	  .usual(1'b0),
	  .s_in(outMux),
	  .modo(modo),
	  .out(s_out)
);

endmodule