data/full_repos/permissive/162696624/Traffic Light.v
 line:32: before: "["
1: b'%Error: Cannot find file containing module: data/full_repos/permissive/162696624/Traffic\n        ... Looked in:\n             data/full_repos/permissive/162696624,data/full_repos/permissive/162696624/data/full_repos/permissive/162696624/Traffic\n             data/full_repos/permissive/162696624,data/full_repos/permissive/162696624/data/full_repos/permissive/162696624/Traffic.v\n             data/full_repos/permissive/162696624,data/full_repos/permissive/162696624/data/full_repos/permissive/162696624/Traffic.sv\n             data/full_repos/permissive/162696624/Traffic\n             data/full_repos/permissive/162696624/Traffic.v\n             data/full_repos/permissive/162696624/Traffic.sv\n             obj_dir/data/full_repos/permissive/162696624/Traffic\n             obj_dir/data/full_repos/permissive/162696624/Traffic.v\n             obj_dir/data/full_repos/permissive/162696624/Traffic.sv\n%Error: Cannot find file containing module: Light.v\n%Error: Exiting due to 2 error(s)\n'
module test_main ;
    
   reg A , B , RST,CLK;
   wire AL,BL,finished;
   wire [3:0] L;
  
   main my_main (A,B,RST,CLK,L,BL,AL,finished);
   
  
    initial 
     begin
      RST=0;
      CLK=0;
      #10
      RST=1;
      
      repeat(400)
      #2  
      CLK=~CLK;
    
    end
  
    initial 
      begin
      
       A=0;
       B=0;
  
      end
    
 endmodule
module test_main ;

    
   reg A , B , RST,CLK;
   wire AL,BL,finished;
   wire [3:0] L;
  
   main my_main (A,B,RST,CLK,L,BL,AL,finished);
   
  
    initial 
     begin
      RST=0;
      CLK=0;
      #10
      RST=1;
      
      repeat(400)
      #2  
      CLK=~CLK;
    
    end
  
    initial 
      begin
      
       A=0;
       B=0;
  
      end
    
 endmodule