data/full_repos/permissive/128781882/FPGA_implementation/IPUF/src/veriolg/apuf/switch_2to2.v
1: b"%Error: data/full_repos/permissive/128781882/FPGA_implementation/IPUF/src/veriolg/apuf/switch_2to2.v:27: Cannot find file containing module: 'mux_n21'\n    mux_n21 #(.nCTRL(1)) MUXU(\n    ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/128781882/FPGA_implementation/IPUF/src/veriolg/apuf,data/full_repos/permissive/128781882/mux_n21\n             data/full_repos/permissive/128781882/FPGA_implementation/IPUF/src/veriolg/apuf,data/full_repos/permissive/128781882/mux_n21.v\n             data/full_repos/permissive/128781882/FPGA_implementation/IPUF/src/veriolg/apuf,data/full_repos/permissive/128781882/mux_n21.sv\n             mux_n21\n             mux_n21.v\n             mux_n21.sv\n             obj_dir/mux_n21\n             obj_dir/mux_n21.v\n             obj_dir/mux_n21.sv\n%Error: data/full_repos/permissive/128781882/FPGA_implementation/IPUF/src/veriolg/apuf/switch_2to2.v:34: Cannot find file containing module: 'mux_n21'\n    mux_n21 #(.nCTRL(1)) MUXL(\n    ^~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module switch_2to2(
		inT,
		inB,
		cT,
      cB,
		outT,
		outB
	);
	
	input  inT;
	input  inB;
	input  cT;
	input  cB;
	output outT;
	output outB;
	
	(*LOCK_PINS = "all"*)
    mux_n21 #(.nCTRL(1)) MUXU(
        .ins({inB,inT}),
        .ctrls(cT),
        .out(outT)
    );
    
    (*LOCK_PINS = "all"*)
    mux_n21 #(.nCTRL(1)) MUXL(
        .ins({inT,inB}),
        .ctrls(cB),
        .out(outB)
    );
    
endmodule
module switch_2to2(
		inT,
		inB,
		cT,
      cB,
		outT,
		outB
	);

	
	input  inT;
	input  inB;
	input  cT;
	input  cB;
	output outT;
	output outB;
	
	(*LOCK_PINS = "all"*)
    mux_n21 #(.nCTRL(1)) MUXU(
        .ins({inB,inT}),
        .ctrls(cT),
        .out(outT)
    );
    
    (*LOCK_PINS = "all"*)
    mux_n21 #(.nCTRL(1)) MUXL(
        .ins({inT,inB}),
        .ctrls(cB),
        .out(outB)
    );
    
endmodule