data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v
1: b'%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:41: Cannot find include file: spi_defines.v\n`include "spi_defines.v" \n         ^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl,data/full_repos/permissive/117851934/spi_defines.v\n             data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl,data/full_repos/permissive/117851934/spi_defines.v.v\n             data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl,data/full_repos/permissive/117851934/spi_defines.v.sv\n             spi_defines.v\n             spi_defines.v.v\n             spi_defines.v.sv\n             obj_dir/spi_defines.v\n             obj_dir/spi_defines.v.v\n             obj_dir/spi_defines.v.sv\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:42: Cannot find include file: timescale.v\n`include "timescale.v" \n         ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:55: Define or directive not defined: \'`SPI_CHAR_LEN_BITS\'\n  input [`SPI_CHAR_LEN_BITS-1:0] len;           \n         ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:65: Define or directive not defined: \'`SPI_MAX_CHAR\'\n  output     [`SPI_MAX_CHAR-1:0] p_out;         \n              ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:73: Define or directive not defined: \'`SPI_CHAR_LEN_BITS\'\n  reg     [`SPI_CHAR_LEN_BITS:0] cnt;           \n           ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:73: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\n  reg     [`SPI_CHAR_LEN_BITS:0] cnt;           \n                             ^\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:74: Define or directive not defined: \'`SPI_MAX_CHAR\'\n  reg        [`SPI_MAX_CHAR-1:0] data;          \n              ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:75: Define or directive not defined: \'`SPI_CHAR_LEN_BITS\'\n  wire    [`SPI_CHAR_LEN_BITS:0] tx_bit_pos;    \n           ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:75: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\n  wire    [`SPI_CHAR_LEN_BITS:0] tx_bit_pos;    \n                             ^\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:76: Define or directive not defined: \'`SPI_CHAR_LEN_BITS\'\n  wire    [`SPI_CHAR_LEN_BITS:0] rx_bit_pos;    \n           ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:76: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\n  wire    [`SPI_CHAR_LEN_BITS:0] rx_bit_pos;    \n                             ^\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:82: Define or directive not defined: \'`SPI_CHAR_LEN_BITS\'\n  assign tx_bit_pos = lsb ? {!(|len), len} - cnt : cnt - {{`SPI_CHAR_LEN_BITS{1\'b0}},1\'b1};\n                                                           ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:83: Define or directive not defined: \'`SPI_CHAR_LEN_BITS\'\n  assign rx_bit_pos = lsb ? {!(|len), len} - (rx_negedge ? cnt + {{`SPI_CHAR_LEN_BITS{1\'b0}},1\'b1} : cnt) : \n                                                                   ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:84: Define or directive not defined: \'`SPI_CHAR_LEN_BITS\'\n                            (rx_negedge ? cnt : cnt - {{`SPI_CHAR_LEN_BITS{1\'b0}},1\'b1});\n                                                        ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:95: Define or directive not defined: \'`SPI_CHAR_LEN_BITS\'\n      cnt <= #Tp {`SPI_CHAR_LEN_BITS+1{1\'b0}};\n                  ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:99: Define or directive not defined: \'`SPI_CHAR_LEN_BITS\'\n          cnt <= #Tp pos_edge ? (cnt - {{`SPI_CHAR_LEN_BITS{1\'b0}}, 1\'b1}) : cnt;\n                                         ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:101: Define or directive not defined: \'`SPI_CHAR_LEN_BITS\'\n          cnt <= #Tp !(|len) ? {1\'b1, {`SPI_CHAR_LEN_BITS{1\'b0}}} : {1\'b0, len};\n                                       ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:122: Define or directive not defined: \'`SPI_CHAR_LEN_BITS\'\n      s_out <= #Tp (tx_clk || !tip) ? data[tx_bit_pos[`SPI_CHAR_LEN_BITS-1:0]] : s_out;\n                                                      ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:129: Define or directive not defined: \'`SPI_MAX_CHAR\'\n      data   <= #Tp {`SPI_MAX_CHAR{1\'b0}};\n                     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:234: Define or directive not defined: \'`SPI_CHAR_LEN_BITS\'\n      data[rx_bit_pos[`SPI_CHAR_LEN_BITS-1:0]] <= #Tp rx_clk ? s_in : data[rx_bit_pos[`SPI_CHAR_LEN_BITS-1:0]];\n                      ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/117851934/ddr_layout_V5/ip/oc_spi/hdl/spi_shift.v:234: Define or directive not defined: \'`SPI_CHAR_LEN_BITS\'\n      data[rx_bit_pos[`SPI_CHAR_LEN_BITS-1:0]] <= #Tp rx_clk ? s_in : data[rx_bit_pos[`SPI_CHAR_LEN_BITS-1:0]];\n                                                                                      ^~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 21 error(s)\n'
module spi_shift (clk, rst, latch, byte_sel, len, lsb, go,
                  pos_edge, neg_edge, rx_negedge, tx_negedge,
                  tip, last, 
                  p_in, p_out, s_clk, s_in, s_out);

  parameter Tp = 1;
  
  input                          clk;
  input                          rst;
  input                    [3:0] latch;
  input                    [3:0] byte_sel;
  input [`SPI_CHAR_LEN_BITS-1:0] len;
  input                          lsb;
  input                          go;
  input                          pos_edge;
  input                          neg_edge;
  input                          rx_negedge;
  input                          tx_negedge;
  output                         tip;
  output                         last;
  input                   [31:0] p_in;
  output     [`SPI_MAX_CHAR-1:0] p_out;
  input                          s_clk;
  input                          s_in;
  output                         s_out;
                                               
  reg                            s_out;        
  reg                            tip;
                              
  reg     [`SPI_CHAR_LEN_BITS:0] cnt;
  reg        [`SPI_MAX_CHAR-1:0] data;
  wire    [`SPI_CHAR_LEN_BITS:0] tx_bit_pos;
  wire    [`SPI_CHAR_LEN_BITS:0] rx_bit_pos;
  wire                           rx_clk;
  wire                           tx_clk;
  
  assign p_out = data;
  
  assign tx_bit_pos = lsb ? {!(|len), len} - cnt : cnt - {{`SPI_CHAR_LEN_BITS{1'b0}},1'b1};
  assign rx_bit_pos = lsb ? {!(|len), len} - (rx_negedge ? cnt + {{`SPI_CHAR_LEN_BITS{1'b0}},1'b1} : cnt) : 
                            (rx_negedge ? cnt : cnt - {{`SPI_CHAR_LEN_BITS{1'b0}},1'b1});
  
  assign last = !(|cnt);
  
  assign rx_clk = (rx_negedge ? neg_edge : pos_edge) && (!last || s_clk);
  assign tx_clk = (tx_negedge ? neg_edge : pos_edge) && !last;
  

  always @(posedge clk or posedge rst)
  begin
    if(rst)
      cnt <= #Tp {`SPI_CHAR_LEN_BITS+1{1'b0}};
    else
      begin
        if(tip)
          cnt <= #Tp pos_edge ? (cnt - {{`SPI_CHAR_LEN_BITS{1'b0}}, 1'b1}) : cnt;
        else
          cnt <= #Tp !(|len) ? {1'b1, {`SPI_CHAR_LEN_BITS{1'b0}}} : {1'b0, len};
      end
  end
  

  always @(posedge clk or posedge rst)
  begin
    if(rst)
      tip <= #Tp 1'b0;
  else if(go && ~tip)
    tip <= #Tp 1'b1;
  else if(tip && last && pos_edge)
    tip <= #Tp 1'b0;
  end
  

  always @(posedge clk or posedge rst)
  begin
    if (rst)
      s_out   <= #Tp 1'b0;
    else
      s_out <= #Tp (tx_clk || !tip) ? data[tx_bit_pos[`SPI_CHAR_LEN_BITS-1:0]] : s_out;
  end
  

  always @(posedge clk or posedge rst)
  begin
    if (rst)
      data   <= #Tp {`SPI_MAX_CHAR{1'b0}};
`ifdef SPI_MAX_CHAR_128
    else if (latch[0] && !tip)
      begin
        if (byte_sel[3])
          data[31:24] <= #Tp p_in[31:24];
        if (byte_sel[2])
          data[23:16] <= #Tp p_in[23:16];
        if (byte_sel[1])
          data[15:8] <= #Tp p_in[15:8];
        if (byte_sel[0])
          data[7:0] <= #Tp p_in[7:0];
      end
    else if (latch[1] && !tip)
      begin
        if (byte_sel[3])
          data[63:56] <= #Tp p_in[31:24];
        if (byte_sel[2])
          data[55:48] <= #Tp p_in[23:16];
        if (byte_sel[1])
          data[47:40] <= #Tp p_in[15:8];
        if (byte_sel[0])
          data[39:32] <= #Tp p_in[7:0];
      end
    else if (latch[2] && !tip)
      begin
        if (byte_sel[3])
          data[95:88] <= #Tp p_in[31:24];
        if (byte_sel[2])
          data[87:80] <= #Tp p_in[23:16];
        if (byte_sel[1])
          data[79:72] <= #Tp p_in[15:8];
        if (byte_sel[0])
          data[71:64] <= #Tp p_in[7:0];
      end
    else if (latch[3] && !tip)
      begin
        if (byte_sel[3])
          data[127:120] <= #Tp p_in[31:24];
        if (byte_sel[2])
          data[119:112] <= #Tp p_in[23:16];
        if (byte_sel[1])
          data[111:104] <= #Tp p_in[15:8];
        if (byte_sel[0])
          data[103:96] <= #Tp p_in[7:0];
      end
`else
`ifdef SPI_MAX_CHAR_64
    else if (latch[0] && !tip)
      begin
        if (byte_sel[3])
          data[31:24] <= #Tp p_in[31:24];
        if (byte_sel[2])
          data[23:16] <= #Tp p_in[23:16];
        if (byte_sel[1])
          data[15:8] <= #Tp p_in[15:8];
        if (byte_sel[0])
          data[7:0] <= #Tp p_in[7:0];
      end
    else if (latch[1] && !tip)
      begin
        if (byte_sel[3])
          data[63:56] <= #Tp p_in[31:24];
        if (byte_sel[2])
          data[55:48] <= #Tp p_in[23:16];
        if (byte_sel[1])
          data[47:40] <= #Tp p_in[15:8];
        if (byte_sel[0])
          data[39:32] <= #Tp p_in[7:0];
      end
`else
    else if (latch[0] && !tip)
      begin
      `ifdef SPI_MAX_CHAR_8
        if (byte_sel[0])
          data[`SPI_MAX_CHAR-1:0] <= #Tp p_in[`SPI_MAX_CHAR-1:0];
      `endif
      `ifdef SPI_MAX_CHAR_16
        if (byte_sel[0])
          data[7:0] <= #Tp p_in[7:0];
        if (byte_sel[1])
          data[`SPI_MAX_CHAR-1:8] <= #Tp p_in[`SPI_MAX_CHAR-1:8];
      `endif
      `ifdef SPI_MAX_CHAR_24
        if (byte_sel[0])
          data[7:0] <= #Tp p_in[7:0];
        if (byte_sel[1])
          data[15:8] <= #Tp p_in[15:8];
        if (byte_sel[2])
          data[`SPI_MAX_CHAR-1:16] <= #Tp p_in[`SPI_MAX_CHAR-1:16];
      `endif
      `ifdef SPI_MAX_CHAR_32
        if (byte_sel[0])
          data[7:0] <= #Tp p_in[7:0];
        if (byte_sel[1])
          data[15:8] <= #Tp p_in[15:8];
        if (byte_sel[2])
          data[23:16] <= #Tp p_in[23:16];
        if (byte_sel[3])
          data[`SPI_MAX_CHAR-1:24] <= #Tp p_in[`SPI_MAX_CHAR-1:24];
      `endif
      end
`endif
`endif
    else
      data[rx_bit_pos[`SPI_CHAR_LEN_BITS-1:0]] <= #Tp rx_clk ? s_in : data[rx_bit_pos[`SPI_CHAR_LEN_BITS-1:0]];
  end
  
endmodule
module spi_shift (clk, rst, latch, byte_sel, len, lsb, go,
                  pos_edge, neg_edge, rx_negedge, tx_negedge,
                  tip, last, 
                  p_in, p_out, s_clk, s_in, s_out);


  parameter Tp = 1;
  
  input                          clk;
  input                          rst;
  input                    [3:0] latch;
  input                    [3:0] byte_sel;
  input [`SPI_CHAR_LEN_BITS-1:0] len;
  input                          lsb;
  input                          go;
  input                          pos_edge;
  input                          neg_edge;
  input                          rx_negedge;
  input                          tx_negedge;
  output                         tip;
  output                         last;
  input                   [31:0] p_in;
  output     [`SPI_MAX_CHAR-1:0] p_out;
  input                          s_clk;
  input                          s_in;
  output                         s_out;
                                               
  reg                            s_out;        
  reg                            tip;
                              
  reg     [`SPI_CHAR_LEN_BITS:0] cnt;
  reg        [`SPI_MAX_CHAR-1:0] data;
  wire    [`SPI_CHAR_LEN_BITS:0] tx_bit_pos;
  wire    [`SPI_CHAR_LEN_BITS:0] rx_bit_pos;
  wire                           rx_clk;
  wire                           tx_clk;
  
  assign p_out = data;
  
  assign tx_bit_pos = lsb ? {!(|len), len} - cnt : cnt - {{`SPI_CHAR_LEN_BITS{1'b0}},1'b1};
  assign rx_bit_pos = lsb ? {!(|len), len} - (rx_negedge ? cnt + {{`SPI_CHAR_LEN_BITS{1'b0}},1'b1} : cnt) : 
                            (rx_negedge ? cnt : cnt - {{`SPI_CHAR_LEN_BITS{1'b0}},1'b1});
  
  assign last = !(|cnt);
  
  assign rx_clk = (rx_negedge ? neg_edge : pos_edge) && (!last || s_clk);
  assign tx_clk = (tx_negedge ? neg_edge : pos_edge) && !last;
  

  always @(posedge clk or posedge rst)
  begin
    if(rst)
      cnt <= #Tp {`SPI_CHAR_LEN_BITS+1{1'b0}};
    else
      begin
        if(tip)
          cnt <= #Tp pos_edge ? (cnt - {{`SPI_CHAR_LEN_BITS{1'b0}}, 1'b1}) : cnt;
        else
          cnt <= #Tp !(|len) ? {1'b1, {`SPI_CHAR_LEN_BITS{1'b0}}} : {1'b0, len};
      end
  end
  

  always @(posedge clk or posedge rst)
  begin
    if(rst)
      tip <= #Tp 1'b0;
  else if(go && ~tip)
    tip <= #Tp 1'b1;
  else if(tip && last && pos_edge)
    tip <= #Tp 1'b0;
  end
  

  always @(posedge clk or posedge rst)
  begin
    if (rst)
      s_out   <= #Tp 1'b0;
    else
      s_out <= #Tp (tx_clk || !tip) ? data[tx_bit_pos[`SPI_CHAR_LEN_BITS-1:0]] : s_out;
  end
  

  always @(posedge clk or posedge rst)
  begin
    if (rst)
      data   <= #Tp {`SPI_MAX_CHAR{1'b0}};
`ifdef SPI_MAX_CHAR_128
    else if (latch[0] && !tip)
      begin
        if (byte_sel[3])
          data[31:24] <= #Tp p_in[31:24];
        if (byte_sel[2])
          data[23:16] <= #Tp p_in[23:16];
        if (byte_sel[1])
          data[15:8] <= #Tp p_in[15:8];
        if (byte_sel[0])
          data[7:0] <= #Tp p_in[7:0];
      end
    else if (latch[1] && !tip)
      begin
        if (byte_sel[3])
          data[63:56] <= #Tp p_in[31:24];
        if (byte_sel[2])
          data[55:48] <= #Tp p_in[23:16];
        if (byte_sel[1])
          data[47:40] <= #Tp p_in[15:8];
        if (byte_sel[0])
          data[39:32] <= #Tp p_in[7:0];
      end
    else if (latch[2] && !tip)
      begin
        if (byte_sel[3])
          data[95:88] <= #Tp p_in[31:24];
        if (byte_sel[2])
          data[87:80] <= #Tp p_in[23:16];
        if (byte_sel[1])
          data[79:72] <= #Tp p_in[15:8];
        if (byte_sel[0])
          data[71:64] <= #Tp p_in[7:0];
      end
    else if (latch[3] && !tip)
      begin
        if (byte_sel[3])
          data[127:120] <= #Tp p_in[31:24];
        if (byte_sel[2])
          data[119:112] <= #Tp p_in[23:16];
        if (byte_sel[1])
          data[111:104] <= #Tp p_in[15:8];
        if (byte_sel[0])
          data[103:96] <= #Tp p_in[7:0];
      end
`else
`ifdef SPI_MAX_CHAR_64
    else if (latch[0] && !tip)
      begin
        if (byte_sel[3])
          data[31:24] <= #Tp p_in[31:24];
        if (byte_sel[2])
          data[23:16] <= #Tp p_in[23:16];
        if (byte_sel[1])
          data[15:8] <= #Tp p_in[15:8];
        if (byte_sel[0])
          data[7:0] <= #Tp p_in[7:0];
      end
    else if (latch[1] && !tip)
      begin
        if (byte_sel[3])
          data[63:56] <= #Tp p_in[31:24];
        if (byte_sel[2])
          data[55:48] <= #Tp p_in[23:16];
        if (byte_sel[1])
          data[47:40] <= #Tp p_in[15:8];
        if (byte_sel[0])
          data[39:32] <= #Tp p_in[7:0];
      end
`else
    else if (latch[0] && !tip)
      begin
      `ifdef SPI_MAX_CHAR_8
        if (byte_sel[0])
          data[`SPI_MAX_CHAR-1:0] <= #Tp p_in[`SPI_MAX_CHAR-1:0];
      `endif
      `ifdef SPI_MAX_CHAR_16
        if (byte_sel[0])
          data[7:0] <= #Tp p_in[7:0];
        if (byte_sel[1])
          data[`SPI_MAX_CHAR-1:8] <= #Tp p_in[`SPI_MAX_CHAR-1:8];
      `endif
      `ifdef SPI_MAX_CHAR_24
        if (byte_sel[0])
          data[7:0] <= #Tp p_in[7:0];
        if (byte_sel[1])
          data[15:8] <= #Tp p_in[15:8];
        if (byte_sel[2])
          data[`SPI_MAX_CHAR-1:16] <= #Tp p_in[`SPI_MAX_CHAR-1:16];
      `endif
      `ifdef SPI_MAX_CHAR_32
        if (byte_sel[0])
          data[7:0] <= #Tp p_in[7:0];
        if (byte_sel[1])
          data[15:8] <= #Tp p_in[15:8];
        if (byte_sel[2])
          data[23:16] <= #Tp p_in[23:16];
        if (byte_sel[3])
          data[`SPI_MAX_CHAR-1:24] <= #Tp p_in[`SPI_MAX_CHAR-1:24];
      `endif
      end
`endif
`endif
    else
      data[rx_bit_pos[`SPI_CHAR_LEN_BITS-1:0]] <= #Tp rx_clk ? s_in : data[rx_bit_pos[`SPI_CHAR_LEN_BITS-1:0]];
  end
  
endmodule