data/full_repos/permissive/170019407/hw3_1/mux2_1.v
1: b"%Error: data/full_repos/permissive/170019407/hw3_1/mux2_1.v:14: Cannot find file containing module: 'nand2'\n nand2 m1( .in1(S), .in2(InA), .out(n2));\n ^~~~~\n        ... Looked in:\n             data/full_repos/permissive/170019407/hw3_1,data/full_repos/permissive/170019407/nand2\n             data/full_repos/permissive/170019407/hw3_1,data/full_repos/permissive/170019407/nand2.v\n             data/full_repos/permissive/170019407/hw3_1,data/full_repos/permissive/170019407/nand2.sv\n             nand2\n             nand2.v\n             nand2.sv\n             obj_dir/nand2\n             obj_dir/nand2.v\n             obj_dir/nand2.sv\n%Error: data/full_repos/permissive/170019407/hw3_1/mux2_1.v:15: Cannot find file containing module: 'not1'\n not1 m2( .in1(n2), .out(n4));\n ^~~~\n%Error: data/full_repos/permissive/170019407/hw3_1/mux2_1.v:16: Cannot find file containing module: 'not1'\n not1 m3( .in1(S), .out(n1));\n ^~~~\n%Error: data/full_repos/permissive/170019407/hw3_1/mux2_1.v:17: Cannot find file containing module: 'nand2'\n nand2 m4( .in1(n1), .in2(InB), .out(n3));\n ^~~~~\n%Error: data/full_repos/permissive/170019407/hw3_1/mux2_1.v:18: Cannot find file containing module: 'not1'\n not1 m5( .in1(n3), .out(n5));\n ^~~~\n%Error: data/full_repos/permissive/170019407/hw3_1/mux2_1.v:19: Cannot find file containing module: 'nor2'\n nor2 m6( .in1(n4), .in2(n5), .out(n6));\n ^~~~\n%Error: data/full_repos/permissive/170019407/hw3_1/mux2_1.v:20: Cannot find file containing module: 'not1'\n not1 m7( .in1(n6), .out(Out));\n ^~~~\n%Error: Exiting due to 7 error(s)\n"
module mux2_1(InA, InB, S, Out);
	input   InA, InB;
	input   S;
	output  Out;
	wire	n1, n2, n3, n4, n5, n6;


	nand2 m1( .in1(S), .in2(InA), .out(n2));
	not1 m2( .in1(n2), .out(n4));
	not1 m3( .in1(S), .out(n1));
	nand2 m4( .in1(n1), .in2(InB), .out(n3));
	not1 m5( .in1(n3), .out(n5));
	nor2 m6( .in1(n4), .in2(n5), .out(n6));
	not1 m7( .in1(n6), .out(Out));
	
endmodule
module mux2_1(InA, InB, S, Out);

	input   InA, InB;
	input   S;
	output  Out;
	wire	n1, n2, n3, n4, n5, n6;


	nand2 m1( .in1(S), .in2(InA), .out(n2));
	not1 m2( .in1(n2), .out(n4));
	not1 m3( .in1(S), .out(n1));
	nand2 m4( .in1(n1), .in2(InB), .out(n3));
	not1 m5( .in1(n3), .out(n5));
	nor2 m6( .in1(n4), .in2(n5), .out(n6));
	not1 m7( .in1(n6), .out(Out));
	
endmodule