data/full_repos/permissive/109846502/bin2bcd_test.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/109846502/bin2bcd_test.v:50: Unsupported: Ignoring delay on this delayed statement.\n  #100;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/109846502/bin2bcd_test.v:52: Unsupported: Ignoring delay on this delayed statement.\n  #20\n  ^\n%Error: data/full_repos/permissive/109846502/bin2bcd_test.v:37: Cannot find file containing module: \'bin2bcd\'\n bin2bcd uut (\n ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/109846502,data/full_repos/permissive/109846502/bin2bcd\n             data/full_repos/permissive/109846502,data/full_repos/permissive/109846502/bin2bcd.v\n             data/full_repos/permissive/109846502,data/full_repos/permissive/109846502/bin2bcd.sv\n             bin2bcd\n             bin2bcd.v\n             bin2bcd.sv\n             obj_dir/bin2bcd\n             obj_dir/bin2bcd.v\n             obj_dir/bin2bcd.sv\n%Error: Exiting due to 1 error(s), 2 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module bin2bcd_test;


	reg [13:0] bin;


	wire [3:0] thousands;
	wire [3:0] hundreds;
	wire [3:0] tens;
	wire [3:0] ones;


	bin2bcd uut (
		.bin(bin), 
		.thousands(thousands), 
		.hundreds(hundreds), 
		.tens(tens), 
		.ones(ones)
	);

	initial begin

		bin = 14'd0;


		#100;
      bin = 14'd9999;
		#20
		bin = 14'd10;


	end
      
endmodule
module bin2bcd_test;



	reg [13:0] bin;


	wire [3:0] thousands;
	wire [3:0] hundreds;
	wire [3:0] tens;
	wire [3:0] ones;


	bin2bcd uut (
		.bin(bin), 
		.thousands(thousands), 
		.hundreds(hundreds), 
		.tens(tens), 
		.ones(ones)
	);

	initial begin

		bin = 14'd0;


		#100;
      bin = 14'd9999;
		#20
		bin = 14'd10;


	end
      
endmodule