data/full_repos/permissive/181665138/verilog/capitolo_vi/sEP8.v
 line:491: before: "=="
1: b"%Error: data/full_repos/permissive/181665138/verilog/capitolo_vi/sEP8.v:491: syntax error, unexpected ==, expecting ')' or ',' or or\n    always @(reset_ == 0) #1\n                    ^~\n%Error: Cannot continue\n"
function [7:0] alu_result;
        input [7:0] opcode, operando1, operando2;
        alu_result = 'B00000000;


    endfunction
function [7:0] alu_result;

        input [7:0] opcode, operando1, operando2;
        alu_result = 'B00000000;


    endfunction