data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v
1: b'%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:2: Cannot find include file: Constants.v\n`include "Constants.v" \n         ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/100975158/MIPS32_Full/Processor,data/full_repos/permissive/100975158/Constants.v\n             data/full_repos/permissive/100975158/MIPS32_Full/Processor,data/full_repos/permissive/100975158/Constants.v.v\n             data/full_repos/permissive/100975158/MIPS32_Full/Processor,data/full_repos/permissive/100975158/Constants.v.sv\n             Constants.v\n             Constants.v.v\n             Constants.v.sv\n             obj_dir/Constants.v\n             obj_dir/Constants.v.v\n             obj_dir/Constants.v.sv\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:28: Define or directive not defined: \'`ALUOP_ADD\'\n        operation = `ALUOP_ADD;\n                    ^~~~~~~~~~\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:28: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        operation = `ALUOP_ADD;\n                              ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:27: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:29: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:34: Define or directive not defined: \'`ALUOP_SUB\'\n        operation = `ALUOP_SUB;\n                    ^~~~~~~~~~\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:34: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        operation = `ALUOP_SUB;\n                              ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:33: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:35: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:40: Define or directive not defined: \'`ALUOP_MUL\'\n        operation = `ALUOP_MUL;\n                    ^~~~~~~~~~\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:40: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        operation = `ALUOP_MUL;\n                              ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:39: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:41: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:46: Define or directive not defined: \'`ALUOP_SLT\'\n        operation = `ALUOP_SLT;\n                    ^~~~~~~~~~\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:46: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        operation = `ALUOP_SLT;\n                              ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:45: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:47: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:51: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:56: Define or directive not defined: \'`ALUOP_OR\'\n        operation = `ALUOP_OR;\n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:56: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        operation = `ALUOP_OR;\n                             ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:55: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:57: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:62: Define or directive not defined: \'`ALUOP_AND\'\n        operation = `ALUOP_AND;\n                    ^~~~~~~~~~\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:62: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        operation = `ALUOP_AND;\n                              ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:61: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:63: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:68: Define or directive not defined: \'`ALUOP_NOR\'\n        operation = `ALUOP_NOR;\n                    ^~~~~~~~~~\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:68: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        operation = `ALUOP_NOR;\n                              ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:67: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:69: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:73: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:78: Define or directive not defined: \'`ALUOP_ADD\'\n        operation = `ALUOP_ADD;\n                    ^~~~~~~~~~\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:78: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        operation = `ALUOP_ADD;\n                              ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:77: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:79: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:84: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:90: Define or directive not defined: \'`ALUOP_SUB\'\n        operation = `ALUOP_SUB;\n                    ^~~~~~~~~~\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:90: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        operation = `ALUOP_SUB;\n                              ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:89: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:91: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:96: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:102: Define or directive not defined: \'`ALUOP_SLL\'\n        operation = `ALUOP_SLL;\n                    ^~~~~~~~~~\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:102: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        operation = `ALUOP_SLL;\n                              ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:101: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:103: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:108: Define or directive not defined: \'`ALUOP_SRL\'\n        operation = `ALUOP_SRL;\n                    ^~~~~~~~~~\n%Error: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:108: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        operation = `ALUOP_SRL;\n                              ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:107: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/100975158/MIPS32_Full/Processor/TB_ArithmeticLogicUnit.v:109: Unsupported: Ignoring delay on this delayed statement.\n        #10\n        ^\n%Error: Exiting due to 23 error(s), 26 warning(s)\n'
module TB_ArithmeticLogicUnit ();
    reg [31:0] A;
    reg [31:0] B;
    reg [4:0]  operation;
    reg [4:0]  shamt;

    wire [31:0] result;
    wire        overflow;

    ArithmeticLogicUnit ALU (
        .A          (A),
        .B          (B),
        .operation  (operation),
        .shamt      (shamt),
        .result     (result),
        .overflow   (overflow)
    );

    initial begin
        shamt = 0;
        A = 20;
        B = 10;

        #10
        operation = `ALUOP_ADD;
        #10
        if (result == 32'd30)
            $display("Add Passed");

        #10
        operation = `ALUOP_SUB;
        #10
        if (result == 32'd10)
            $display("Sub Passed");

        #10
        operation = `ALUOP_MUL;
        #10
        if (result == 32'd200)
            $display("Mul Passed");

        #10
        operation = `ALUOP_SLT;
        #10
        if (result == 32'd0)
            $display("Slower Than Passed");

        #10
        A = 5'b01010;
        B = 5'b10010;

        #10
        operation = `ALUOP_OR;
        #10
        if (result == 5'b11010)
            $display("Or Passed");

        #10
        operation = `ALUOP_AND;
        #10
        if (result == 5'b00010)
            $display("And Passed");

        #10
        operation = `ALUOP_NOR;
        #10
        if (result == 32'b11111111111111111111111111100101)
            $display("Nor Passed");

        #10
        A = 32'b10000000000000000000000000000001;
        B = 32'b10000000000000000000000000000001;

        #10
        operation = `ALUOP_ADD;
        #10
        if (overflow == 1'b1)
            $display("Overflow Add Passed");


        #10
        A = 32'b01111111111111111111111111111111;
        B = 32'b10000000000000000000000000000001;
        shamt = 2;

        #10
        operation = `ALUOP_SUB;
        #10
        if (overflow == 1'b1)
            $display("Overflow Sub Passed");


        #10
        A = 32'b11111111111111111111111111111111;
        B = 32'b01111111111111111111111111111111;
        shamt = 2;

        #10
        operation = `ALUOP_SLL;
        #10
        if (result == 32'b11111111111111111111111111111100)
            $display("Sll Passed");

        #10
        operation = `ALUOP_SRL;
        #10
        if (result == 32'b00011111111111111111111111111111)
            $display("Srl Passed");

    end


endmodule
module TB_ArithmeticLogicUnit ();

    reg [31:0] A;
    reg [31:0] B;
    reg [4:0]  operation;
    reg [4:0]  shamt;

    wire [31:0] result;
    wire        overflow;

    ArithmeticLogicUnit ALU (
        .A          (A),
        .B          (B),
        .operation  (operation),
        .shamt      (shamt),
        .result     (result),
        .overflow   (overflow)
    );

    initial begin
        shamt = 0;
        A = 20;
        B = 10;

        #10
        operation = `ALUOP_ADD;
        #10
        if (result == 32'd30)
            $display("Add Passed");

        #10
        operation = `ALUOP_SUB;
        #10
        if (result == 32'd10)
            $display("Sub Passed");

        #10
        operation = `ALUOP_MUL;
        #10
        if (result == 32'd200)
            $display("Mul Passed");

        #10
        operation = `ALUOP_SLT;
        #10
        if (result == 32'd0)
            $display("Slower Than Passed");

        #10
        A = 5'b01010;
        B = 5'b10010;

        #10
        operation = `ALUOP_OR;
        #10
        if (result == 5'b11010)
            $display("Or Passed");

        #10
        operation = `ALUOP_AND;
        #10
        if (result == 5'b00010)
            $display("And Passed");

        #10
        operation = `ALUOP_NOR;
        #10
        if (result == 32'b11111111111111111111111111100101)
            $display("Nor Passed");

        #10
        A = 32'b10000000000000000000000000000001;
        B = 32'b10000000000000000000000000000001;

        #10
        operation = `ALUOP_ADD;
        #10
        if (overflow == 1'b1)
            $display("Overflow Add Passed");


        #10
        A = 32'b01111111111111111111111111111111;
        B = 32'b10000000000000000000000000000001;
        shamt = 2;

        #10
        operation = `ALUOP_SUB;
        #10
        if (overflow == 1'b1)
            $display("Overflow Sub Passed");


        #10
        A = 32'b11111111111111111111111111111111;
        B = 32'b01111111111111111111111111111111;
        shamt = 2;

        #10
        operation = `ALUOP_SLL;
        #10
        if (result == 32'b11111111111111111111111111111100)
            $display("Sll Passed");

        #10
        operation = `ALUOP_SRL;
        #10
        if (result == 32'b00011111111111111111111111111111)
            $display("Srl Passed");

    end


endmodule