data/full_repos/permissive/160156794/top_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/160156794/top_tb.v:14: Unsupported: Ignoring delay on this delayed statement.\n  always #1 clk = ~clk;\n         ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/160156794/top_tb.v:17: Unsupported or unknown PLI call: $dumpfile\n    $dumpfile("dump.vcd");\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/160156794/top_tb.v:18: Unsupported or unknown PLI call: $dumpvars\n    $dumpvars(0, TOP);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/160156794/top_tb.v:31: Unsupported: wait statements\n    wait(TOP.dh1 == 0 & TOP.dh0 == 0)\n    ^~~~\n%Error: data/full_repos/permissive/160156794/top_tb.v:30: Unsupported: wait statements\n    wait(TOP.dh1 == 1 & TOP.dh0 == 2)\n    ^~~~\n%Error: data/full_repos/permissive/160156794/top_tb.v:34: Unsupported: wait statements\n    wait(TOP.dh1 == 0 & TOP.dh0 == 2)\n    ^~~~\n%Error: Exiting due to 5 error(s), 1 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module test;
  reg  clk;
  reg  btn;
  wire [4:0] leds;
  wire ws_data;

  top #(.MAIN_CLK(2)) TOP(.CLK(clk), .CLK_1HZ(clk), .BTN(btn), .LED(leds), .WS2812_DATA(ws_data));

  always #1 clk = ~clk;

  initial begin
    $dumpfile("dump.vcd");
    $dumpvars(0, TOP);


    clk = 1'b0;
    btn = 1'b1;
  end

  initial begin
    $display("Binary Clock Demo Crunching...");
  end

  initial begin
    wait(TOP.dh1 == 1 & TOP.dh0 == 2)
    wait(TOP.dh1 == 0 & TOP.dh0 == 0)
    $display("testing set button...");
    btn = 1'b0;
    wait(TOP.dh1 == 0 & TOP.dh0 == 2)
    $finish;
  end

endmodule
module test;

  reg  clk;
  reg  btn;
  wire [4:0] leds;
  wire ws_data;

  top #(.MAIN_CLK(2)) TOP(.CLK(clk), .CLK_1HZ(clk), .BTN(btn), .LED(leds), .WS2812_DATA(ws_data));

  always #1 clk = ~clk;

  initial begin
    $dumpfile("dump.vcd");
    $dumpvars(0, TOP);


    clk = 1'b0;
    btn = 1'b1;
  end

  initial begin
    $display("Binary Clock Demo Crunching...");
  end

  initial begin
    wait(TOP.dh1 == 1 & TOP.dh0 == 2)
    wait(TOP.dh1 == 0 & TOP.dh0 == 0)
    $display("testing set button...");
    btn = 1'b0;
    wait(TOP.dh1 == 0 & TOP.dh0 == 2)
    $finish;
  end

endmodule