data/full_repos/permissive/175197601/hdl/jtpopeye_roh_model.v
1: b"%Error: data/full_repos/permissive/175197601/hdl/jtpopeye_roh_model.v:39: Cannot find file containing module: 'jt7474'\njt7474 u_2D0(\n^~~~~~\n        ... Looked in:\n             data/full_repos/permissive/175197601/hdl,data/full_repos/permissive/175197601/jt7474\n             data/full_repos/permissive/175197601/hdl,data/full_repos/permissive/175197601/jt7474.v\n             data/full_repos/permissive/175197601/hdl,data/full_repos/permissive/175197601/jt7474.sv\n             jt7474\n             jt7474.v\n             jt7474.sv\n             obj_dir/jt7474\n             obj_dir/jt7474.v\n             obj_dir/jt7474.sv\n%Error: data/full_repos/permissive/175197601/hdl/jtpopeye_roh_model.v:48: Cannot find file containing module: 'jt7474'\njt7474 u_2D1(\n^~~~~~\n%Error: data/full_repos/permissive/175197601/hdl/jtpopeye_roh_model.v:59: Cannot find file containing module: 'jt7474'\njt7474 u_1L(\n^~~~~~\n%Error: data/full_repos/permissive/175197601/hdl/jtpopeye_roh_model.v:73: Cannot find file containing module: 'jt7474'\njt7474 u_1C0(\n^~~~~~\n%Error: data/full_repos/permissive/175197601/hdl/jtpopeye_roh_model.v:85: Cannot find file containing module: 'jt7474'\njt7474 u_1C1(\n^~~~~~\n%Error: data/full_repos/permissive/175197601/hdl/jtpopeye_roh_model.v:106: Cannot find file containing module: 'jt74161'\njt74161 u_1F(\n^~~~~~~\n%Error: data/full_repos/permissive/175197601/hdl/jtpopeye_roh_model.v:117: Cannot find file containing module: 'jt74161'\njt74161 u_2F(\n^~~~~~~\n%Error: data/full_repos/permissive/175197601/hdl/jtpopeye_roh_model.v:128: Cannot find file containing module: 'jt74161'\njt74161 u_2E(\n^~~~~~~\n%Error: Exiting due to 8 error(s)\n"
module jtpopeye_roh_model(
    input       VB_n,
    input       AI_n,
    input       BI_n,
    input       HBD_n,
    input       busak,
    output      ROHVS,
    output      ROHVCK,
    output      dma_cs,
    output      busrq_n,
    output [10:0] DM
);

wire MR_n;
wire busak_d;
wire DM10, H1l;


jt7474 u_2D0(
    .d      ( ~BI_n ),
    .pr_b   ( 1'b1  ),
    .cl_b   ( 1'b1  ),
    .clk    ( ~AI_n ),
    .q      ( H1l   ),
    .q_b    (       )
);

jt7474 u_2D1(
    .d      ( busak     ),
    .pr_b   ( 1'b1      ),
    .cl_b   ( 1'b1      ),
    .clk    ( BI_n      ),
    .q      ( busak_d   ),
    .q_b    (           )
);

assign dma_cs = busak_d;

jt7474 u_1L(
    .d      ( 1'b1      ),
    .pr_b   ( 1'b1      ),
    .cl_b   ( ~DM10     ),
    .clk    ( ~VB_n     ),
    .q      (           ),
    .q_b    ( busrq_n   )
);


wire ff_1c0;
wire ff_1c0_clr_n = ~(~busrq_n & ~busak_d);
wire ff_1c0_din   = ~(~busak_d & HBD_n);

jt7474 u_1C0(
    .d      ( ff_1c0_din   ),
    .pr_b   ( 1'b1         ),
    .cl_b   ( ff_1c0_clr_n ),
    .clk    ( H1l          ),
    .q      ( ff_1c0       ),
    .q_b    (              )
);

wire ff_1c1;
wire ff_1c1_din = ~( ~ff_1c0 & ff_1c0_din );

jt7474 u_1C1(
    .d      ( ff_1c1_din ),
    .pr_b   ( 1'b1       ),
    .cl_b   ( 1'b1       ),
    .clk    ( ~AI_n      ),
    .q      ( ff_1c1     ),
    .q_b    (            )
);

assign ROHVS  = ~ff_1c1 | ~ff_1c1_din;
assign ROHVCK = ~( ~ff_1c1 & ~BI_n );
assign MR_n   = ff_1c1_din;

wire [11:0] DMAcnt;
wire [1:0]  carry;
assign DM10 = DMAcnt[10];
assign DM = DMAcnt[10:0];

wire cnt_clk = AI_n;
wire cnt_en  = ~( H1l &  busak_d );

jt74161 u_1F(
    .cet    ( cnt_en      ),
    .cep    ( cnt_en      ),
    .ld_b   ( 1'b1        ),
    .clk    ( cnt_clk     ),
    .cl_b   ( MR_n        ),
    .d      ( 4'd0        ),
    .q      ( DMAcnt[3:0] ),
    .ca     ( carry[0]    )
 );

jt74161 u_2F(
    .cet    ( carry[0]    ),
    .cep    ( 1'b1        ),
    .ld_b   ( 1'b1        ),
    .clk    ( cnt_clk     ),
    .cl_b   ( MR_n        ),
    .d      ( 4'd0        ),
    .q      ( DMAcnt[7:4] ),
    .ca     ( carry[1]    )
 );

jt74161 u_2E(
    .cet    ( carry[1]    ),
    .cep    ( 1'b1        ),
    .ld_b   ( 1'b1        ),
    .clk    ( cnt_clk     ),
    .cl_b   ( MR_n        ),
    .d      ( 4'd0        ),
    .q      ( DMAcnt[11:8]),
    .ca     (             )
 );


endmodule
module jtpopeye_roh_model(
    input       VB_n,
    input       AI_n,
    input       BI_n,
    input       HBD_n,
    input       busak,
    output      ROHVS,
    output      ROHVCK,
    output      dma_cs,
    output      busrq_n,
    output [10:0] DM
);


wire MR_n;
wire busak_d;
wire DM10, H1l;


jt7474 u_2D0(
    .d      ( ~BI_n ),
    .pr_b   ( 1'b1  ),
    .cl_b   ( 1'b1  ),
    .clk    ( ~AI_n ),
    .q      ( H1l   ),
    .q_b    (       )
);

jt7474 u_2D1(
    .d      ( busak     ),
    .pr_b   ( 1'b1      ),
    .cl_b   ( 1'b1      ),
    .clk    ( BI_n      ),
    .q      ( busak_d   ),
    .q_b    (           )
);

assign dma_cs = busak_d;

jt7474 u_1L(
    .d      ( 1'b1      ),
    .pr_b   ( 1'b1      ),
    .cl_b   ( ~DM10     ),
    .clk    ( ~VB_n     ),
    .q      (           ),
    .q_b    ( busrq_n   )
);


wire ff_1c0;
wire ff_1c0_clr_n = ~(~busrq_n & ~busak_d);
wire ff_1c0_din   = ~(~busak_d & HBD_n);

jt7474 u_1C0(
    .d      ( ff_1c0_din   ),
    .pr_b   ( 1'b1         ),
    .cl_b   ( ff_1c0_clr_n ),
    .clk    ( H1l          ),
    .q      ( ff_1c0       ),
    .q_b    (              )
);

wire ff_1c1;
wire ff_1c1_din = ~( ~ff_1c0 & ff_1c0_din );

jt7474 u_1C1(
    .d      ( ff_1c1_din ),
    .pr_b   ( 1'b1       ),
    .cl_b   ( 1'b1       ),
    .clk    ( ~AI_n      ),
    .q      ( ff_1c1     ),
    .q_b    (            )
);

assign ROHVS  = ~ff_1c1 | ~ff_1c1_din;
assign ROHVCK = ~( ~ff_1c1 & ~BI_n );
assign MR_n   = ff_1c1_din;

wire [11:0] DMAcnt;
wire [1:0]  carry;
assign DM10 = DMAcnt[10];
assign DM = DMAcnt[10:0];

wire cnt_clk = AI_n;
wire cnt_en  = ~( H1l &  busak_d );

jt74161 u_1F(
    .cet    ( cnt_en      ),
    .cep    ( cnt_en      ),
    .ld_b   ( 1'b1        ),
    .clk    ( cnt_clk     ),
    .cl_b   ( MR_n        ),
    .d      ( 4'd0        ),
    .q      ( DMAcnt[3:0] ),
    .ca     ( carry[0]    )
 );

jt74161 u_2F(
    .cet    ( carry[0]    ),
    .cep    ( 1'b1        ),
    .ld_b   ( 1'b1        ),
    .clk    ( cnt_clk     ),
    .cl_b   ( MR_n        ),
    .d      ( 4'd0        ),
    .q      ( DMAcnt[7:4] ),
    .ca     ( carry[1]    )
 );

jt74161 u_2E(
    .cet    ( carry[1]    ),
    .cep    ( 1'b1        ),
    .ld_b   ( 1'b1        ),
    .clk    ( cnt_clk     ),
    .cl_b   ( MR_n        ),
    .d      ( 4'd0        ),
    .q      ( DMAcnt[11:8]),
    .ca     (             )
 );


endmodule