data/full_repos/permissive/159001439/src/intr_to_msi.v
 line:17: before: "("
1: b'%Warning-WIDTH: data/full_repos/permissive/159001439/src/intr_to_msi.v:57: Operator ASSIGNDLY expects 2 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 3 bits.\n                                                                         : ... In instance intr_to_msi\n   intr_sync <= {intr_sync,1\'b1};\n             ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/159001439/src/intr_to_msi.v:66: Operator ASSIGNDLY expects 2 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 3 bits.\n                                                                         : ... In instance intr_to_msi\n   intr_r <= {intr_r, !intr_sync[1]};\n          ^~\n%Error: Exiting due to 2 warning(s)\n'
function integer clogb2 (input integer size);
begin
	size = size - 1;
	for (clogb2=1; size>1; clogb2=clogb2+1)
		size = size >> 1;
end
endfunction
function integer clogb2 (input integer size);

begin
	size = size - 1;
	for (clogb2=1; size>1; clogb2=clogb2+1)
		size = size >> 1;
end
endfunction