data/full_repos/permissive/18770871/sign_ext_4_16.v
data/verilator_xmls/62a3d413-d4cb-4b83-91c6-b8dc4de9e130.xml
module sign_ext_4_16(
  imm_4, imm_16);
  
  input [3:0] imm_4;
  output[15:0] imm_16;
  
  assign imm_16 = {{12{imm_4[3]}}, imm_4};
endmodule
module sign_ext_4_16(
  imm_4, imm_16);

  
  input [3:0] imm_4;
  output[15:0] imm_16;
  
  assign imm_16 = {{12{imm_4[3]}}, imm_4};
endmodule