data/full_repos/permissive/137261528/vga01/square.v
 line:8: before: "H_SIZE"
data/verilator_xmls/11c209db-1873-42e9-b102-7829c312d510.xml
module square #(
    H_SIZE=80,
    IX=320,
    IY=240,
    IX_DIR=1,
    IY_DIR=1,
    D_WIDTH=640,
    D_HEIGHT=480
    )
    (
    input wire i_clk,
    input wire i_ani_stb,
    input wire i_rst,
    input wire i_animate,
    output wire [11:0] o_x1,
    output wire [11:0] o_x2,
    output wire [11:0] o_y1,
    output wire [11:0] o_y2
    );

    reg [11:0] x = IX;
    reg [11:0] y = IY;
    reg x_dir = IX_DIR;
    reg y_dir = IY_DIR;

    assign o_x1 = x - H_SIZE;
    assign o_x2 = x + H_SIZE;
    assign o_y1 = y - H_SIZE;
    assign o_y2 = y + H_SIZE;

    always @ (posedge i_clk)
    begin
        if (i_rst)
        begin
            x <= IX;
            y <= IY;
            x_dir <= IX_DIR;
            y_dir <= IY_DIR;
        end
        if (i_animate && i_ani_stb)
        begin
            x <= (x_dir) ? x + 1 : x - 1;
            y <= (y_dir) ? y + 1 : y - 1;

            if (x <= H_SIZE + 1)
                x_dir <= 1;
            if (x >= (D_WIDTH - H_SIZE - 1))
                x_dir <= 0;
            if (y <= H_SIZE + 1)
                y_dir <= 1;
            if (y >= (D_HEIGHT - H_SIZE - 1))
                y_dir <= 0;
        end
    end
endmodule
module square #(
    H_SIZE=80,
    IX=320,
    IY=240,
    IX_DIR=1,
    IY_DIR=1,
    D_WIDTH=640,
    D_HEIGHT=480
    )
    (
    input wire i_clk,
    input wire i_ani_stb,
    input wire i_rst,
    input wire i_animate,
    output wire [11:0] o_x1,
    output wire [11:0] o_x2,
    output wire [11:0] o_y1,
    output wire [11:0] o_y2
    );


    reg [11:0] x = IX;
    reg [11:0] y = IY;
    reg x_dir = IX_DIR;
    reg y_dir = IY_DIR;

    assign o_x1 = x - H_SIZE;
    assign o_x2 = x + H_SIZE;
    assign o_y1 = y - H_SIZE;
    assign o_y2 = y + H_SIZE;

    always @ (posedge i_clk)
    begin
        if (i_rst)
        begin
            x <= IX;
            y <= IY;
            x_dir <= IX_DIR;
            y_dir <= IY_DIR;
        end
        if (i_animate && i_ani_stb)
        begin
            x <= (x_dir) ? x + 1 : x - 1;
            y <= (y_dir) ? y + 1 : y - 1;

            if (x <= H_SIZE + 1)
                x_dir <= 1;
            if (x >= (D_WIDTH - H_SIZE - 1))
                x_dir <= 0;
            if (y <= H_SIZE + 1)
                y_dir <= 1;
            if (y >= (D_HEIGHT - H_SIZE - 1))
                y_dir <= 0;
        end
    end
endmodule