data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv
 line:15: before: "CHDR_W"
1: b'%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:20: Cannot find include file: test_exec.svh\n  `include "test_exec.svh" \n           ^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard,data/full_repos/permissive/214858095/test_exec.svh\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard,data/full_repos/permissive/214858095/test_exec.svh.v\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard,data/full_repos/permissive/214858095/test_exec.svh.sv\n             test_exec.svh\n             test_exec.svh.v\n             test_exec.svh.sv\n             obj_dir/test_exec.svh\n             obj_dir/test_exec.svh.v\n             obj_dir/test_exec.svh.sv\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:27: Cannot find include file: rfnoc_block_switchboard_regs.vh\n  `include "rfnoc_block_switchboard_regs.vh" \n           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:22: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\n  import PkgTestExec::*;\n         ^~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:76: syntax error, unexpected \'=\', expecting \',\' or \';\'\n  RfnocBlockCtrlBfm #(CHDR_W, ITEM_W) blk_ctrl = new(backend, m_ctrl, s_ctrl);\n                                               ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:79: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n  typedef ChdrData #(CHDR_W, ITEM_W)::chdr_word_t chdr_word_t;\n                   ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:80: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n  typedef ChdrData #(CHDR_W, ITEM_W)::item_t      item_t;\n                   ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:96: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n  typedef ChdrPacket #(CHDR_W) ChdrPacket_t;\n                     ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:175: Unsupported: classes\n  class Rand #(WIDTH = 32);\n  ^~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:176: Unsupported: \'static\' class item\n    static function logic [WIDTH-1:0] rand_logic();\n    ^~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:180: Unsupported or unknown PLI call: $urandom\n        result = {result, $urandom()};\n                          ^~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:187: syntax error, unexpected IDENTIFIER, expecting \'(\' or \';\'\n  function automatic ChdrPacket_t gen_rand_chdr_pkt(int num_samps);\n                                  ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:188: syntax error, unexpected \'=\', expecting \',\' or \';\'\n    ChdrPacket_t  packet = new();\n                         ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:197: syntax error, unexpected \'=\', expecting IDENTIFIER\n    header = Rand#($bits(header))::rand_logic();\n           ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:198: syntax error, unexpected \'=\', expecting IDENTIFIER\n    header.pkt_type  = CHDR_DATA_NO_TS;\n                     ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:199: syntax error, unexpected \'=\', expecting IDENTIFIER\n    header.num_mdata = 0;\n                     ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:200: syntax error, unexpected \'=\', expecting IDENTIFIER\n    header.length    = CHDR_W/8 + num_samps*ITEM_W/8;   \n                     ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:207: syntax error, unexpected \'(\', expecting IDENTIFIER\n      data.push_back(Rand#(CHDR_W)::rand_logic());\n                     ^~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:210: syntax error, unexpected \'(\', expecting IDENTIFIER\n    packet.write_raw(header, data);\n                     ^~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:235: syntax error, unexpected \'=\', expecting \',\' or \';\'\n    mailbox #(ChdrPacket_t) packets = new();\n                                    ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:251: Unsupported or unknown PLI call: $urandom_range\n          packet = gen_rand_chdr_pkt($urandom_range(max_samps));\n                                     ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:252: syntax error, unexpected \'(\', expecting IDENTIFIER\n          packets.put(packet);\n                      ^~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:253: syntax error, unexpected \'(\', expecting IDENTIFIER\n          master_bfm.put_chdr(packet); \n                              ^~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:266: syntax error, unexpected \'(\', expecting IDENTIFIER\n          slave_bfm.get_chdr(packet);\n                             ^~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:267: Define or directive not defined: \'`ASSERT_ERROR\'\n          `ASSERT_ERROR(packet.equal(expected), "Does not match");\n          ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:295: Unsupported or unknown PLI call: $urandom_range\n    int rand_select = $urandom_range(0, limit);\n                      ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:297: syntax error, unexpected \'(\', expecting IDENTIFIER\n    write_reg(port, offset, 0);\n              ^~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:299: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(read_output == 0, "Register data does not match");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:303: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(read_output == rand_select, "Register data does not match");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:307: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(read_output == limit, "Register data does not match");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:322: syntax error, unexpected \'(\', expecting IDENTIFIER\n    test.start_tb(tb_name);\n                  ^~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:327: syntax error, unexpected \'(\', expecting IDENTIFIER\n    rfnoc_chdr_clk_gen.start();\n                             ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:328: syntax error, unexpected \'(\', expecting IDENTIFIER\n    rfnoc_ctrl_clk_gen.start();\n                             ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:331: syntax error, unexpected \'(\', expecting IDENTIFIER\n    blk_ctrl.run();\n                 ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:337: syntax error, unexpected \'(\', expecting IDENTIFIER\n    test.start_test("Flush block then reset it", 10us);\n                    ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:338: syntax error, unexpected \'(\', expecting IDENTIFIER\n    blk_ctrl.flush_and_reset();\n                             ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:339: syntax error, unexpected \'(\', expecting IDENTIFIER\n    test.end_test();\n                  ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:345: syntax error, unexpected \'(\', expecting IDENTIFIER\n    test.start_test("Verify Block Info", 2us);\n                    ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:346: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(blk_ctrl.get_noc_id() == NOC_ID, "Incorrect NOC_ID Value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:347: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(blk_ctrl.get_num_data_i() == NUM_PORTS_I, "Incorrect NUM_DATA_I Value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:348: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(blk_ctrl.get_num_data_o() == NUM_PORTS_O, "Incorrect NUM_DATA_O Value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:349: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(blk_ctrl.get_mtu() == MTU, "Incorrect MTU Value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:350: syntax error, unexpected \'(\', expecting IDENTIFIER\n    test.end_test();\n                  ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:358: syntax error, unexpected \'(\', expecting IDENTIFIER\n    test.start_test("Test Register RW", 10us);\n                    ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:363: syntax error, unexpected \'(\', expecting IDENTIFIER\n    test.end_test();\n                  ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:367: syntax error, unexpected \'(\', expecting IDENTIFIER\n    test.start_test("Test short packets", 1ms);\n                    ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:368: Unsupported or unknown PLI call: $urandom_range\n    test_stream($urandom_range(0, NUM_INPUTS-1), $urandom_range(0, NUM_OUTPUTS-1), \n                ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:368: Unsupported or unknown PLI call: $urandom_range\n    test_stream($urandom_range(0, NUM_INPUTS-1), $urandom_range(0, NUM_OUTPUTS-1), \n                                                 ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:370: Unsupported or unknown PLI call: $urandom_range\n    test_stream($urandom_range(0, NUM_INPUTS-1), $urandom_range(0, NUM_OUTPUTS-1), \n                ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:370: Unsupported or unknown PLI call: $urandom_range\n    test_stream($urandom_range(0, NUM_INPUTS-1), $urandom_range(0, NUM_OUTPUTS-1), \n                                                 ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_switchboard/rfnoc_block_switchboard_tb.sv:372: Unsupported or unknown PLI call: $urandom_range\n    test_stream($urandom_range(0, NUM_INPUTS-1), $urandom_range(0, NUM_OUTPUTS-1), \n                ^~~~~~~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
function logic [WIDTH-1:0] rand_logic();
      logic [WIDTH-1:0] result;
      int num_rand32 = (WIDTH + 31) / 32;
      for (int i = 0; i < num_rand32; i++) begin
        result = {result, $urandom()};
      end
      return result;
    endfunction
function logic [WIDTH-1:0] rand_logic();

      logic [WIDTH-1:0] result;
      int num_rand32 = (WIDTH + 31) / 32;
      for (int i = 0; i < num_rand32; i++) begin
        result = {result, $urandom()};
      end
      return result;
    endfunction