data/full_repos/permissive/188434311/verilog/fifo/async_fifo/async_fifo_grey_code.vh
 line:9: before: "localparam"
1: b"%Error: data/full_repos/permissive/188434311/verilog/fifo/async_fifo/async_fifo_grey_code.vh:98: syntax error, unexpected ':'\n    { GREY_6 , GREY_0 } :\n                        ^\n%Error: data/full_repos/permissive/188434311/verilog/fifo/async_fifo/async_fifo_grey_code.vh:121: syntax error, unexpected ':'\n    { GREY_1  , GREY_1 } : \n                         ^\n%Error: Exiting due to 2 error(s)\n"
function next_grey;
  input [ 3 : 0 ] ingrey;
  case( ingrey )
    GREY_0 : next_grey = GREY_1;
    GREY_1 : next_grey = GREY_2;
    GREY_2 : next_grey = GREY_3;
    GREY_3 : next_grey = GREY_4;
    GREY_4 : next_grey = GREY_5;
    GREY_5 : next_grey = GREY_6;
    GREY_6 : next_grey = GREY_7;
    GREY_7 : next_grey = GREY_8;
    GREY_8 : next_grey = GREY_9;
    GREY_9 : next_grey = GREY_10;
    GREY_10 : next_grey = GREY_11;
    GREY_11 : next_grey = GREY_0;
    default : next_grey = GREY_0;
  endcase
endfunction
function next_grey;

  input [ 3 : 0 ] ingrey;
  case( ingrey )
    GREY_0 : next_grey = GREY_1;
    GREY_1 : next_grey = GREY_2;
    GREY_2 : next_grey = GREY_3;
    GREY_3 : next_grey = GREY_4;
    GREY_4 : next_grey = GREY_5;
    GREY_5 : next_grey = GREY_6;
    GREY_6 : next_grey = GREY_7;
    GREY_7 : next_grey = GREY_8;
    GREY_8 : next_grey = GREY_9;
    GREY_9 : next_grey = GREY_10;
    GREY_10 : next_grey = GREY_11;
    GREY_11 : next_grey = GREY_0;
    default : next_grey = GREY_0;
  endcase
endfunction