data/full_repos/permissive/214176324/simulation/video_scaler_tb.v
 line:43: before: "while"
1: b'%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:44: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:42: Unsupported: Ignoring delay on this delayed statement.\n #10\n ^\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:98: Unsupported: Ignoring delay on this delayed statement.\n    #10    \n    ^\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:100: Unsupported: Ignoring delay on this delayed statement.\n    #5 forever #5 clk = !clk;\n               ^\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:100: Unsupported: Ignoring delay on this delayed statement.\n    #5 forever #5 clk = !clk;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:106: Unsupported: Ignoring delay on this delayed statement.\n    #10  \n    ^\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:108: Unsupported: Ignoring delay on this delayed statement.\n    #20 rst_n = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:109: Unsupported: Ignoring delay on this delayed statement.\n    #20 rst_n = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:118: Unsupported: Ignoring delay on this delayed statement.\n  #10                   \n  ^\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:124: Unsupported: Ignoring delay on this delayed statement.\n #10\n ^\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:127: Unsupported: Ignoring delay on this delayed statement.\n #80\n ^\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:135: Unsupported: Ignoring delay on this delayed statement.\n  #10           \n  ^\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:149: Unsupported: Ignoring delay on this delayed statement.\n  #10  \n  ^\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:154: Unsupported: Ignoring delay on this delayed statement.\n  #(10*(OUTPUT_X_RES+1))\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:151: Unsupported: Ignoring delay on this delayed statement.\n #140000\n ^\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:164: Unsupported: Ignoring delay on this delayed statement.\n  #10  \n  ^\n%Warning-STMTDLY: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:170: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Error: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:191: Cannot find file containing module: \'video_scaler\'\nvideo_scaler video_scaler_inst(\n^~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/214176324/simulation,data/full_repos/permissive/214176324/video_scaler\n             data/full_repos/permissive/214176324/simulation,data/full_repos/permissive/214176324/video_scaler.v\n             data/full_repos/permissive/214176324/simulation,data/full_repos/permissive/214176324/video_scaler.sv\n             video_scaler\n             video_scaler.v\n             video_scaler.sv\n             obj_dir/video_scaler\n             obj_dir/video_scaler.v\n             obj_dir/video_scaler.sv\n%Warning-WIDTH: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:30: Input port connection \'inputFilename\' expects 401 bits on the pin connection, but pin connection\'s CONST \'112\'h707572655f636f6c6f722e626d70\' generates 112 bits.\n                                                                                    : ... In instance video_scaler_tb\n .inputFilename( "pure_color.bmp" ),\n  ^~~~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/214176324/simulation/video_scaler_tb.v:31: Input port connection \'outputFilename\' expects 401 bits on the pin connection, but pin connection\'s CONST \'272\'h6f757470757436343078343830746f3130323478373638426943756269632e726177\' generates 272 bits.\n                                                                                    : ... In instance video_scaler_tb\n .outputFilename( "output640x480to1024x768BiCubic.raw" ),\n  ^~~~~~~~~~~~~~\n%Error: Exiting due to 1 error(s), 19 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module scalerTest #(
	parameter INPUT_X_RES = 640-1,
	parameter INPUT_Y_RES = 480-1,
	parameter OUTPUT_X_RES = 640-1,
	parameter OUTPUT_Y_RES = 480-1,
	parameter X_SCALE = 32'h4000 * (INPUT_X_RES) / (OUTPUT_X_RES)-1,
	parameter Y_SCALE = 32'h4000 * (INPUT_Y_RES) / (OUTPUT_Y_RES)-1,
	
	parameter DATA_WIDTH = 8,
	parameter CHANNELS = 3,
	parameter DISCARD_CNT_WIDTH = 8,
	parameter INPUT_X_RES_WIDTH = 11,
	parameter INPUT_Y_RES_WIDTH = 11,
	parameter OUTPUT_X_RES_WIDTH = 11,
	parameter OUTPUT_Y_RES_WIDTH = 11,
	parameter BUFFER_SIZE = 8
)(
input wire [50*8:0] inputFilename, outputFilename,


input wire [DISCARD_CNT_WIDTH-1:0]	inputDiscardCnt,
input wire [INPUT_X_RES_WIDTH+14-1:0] leftOffset,
input wire [14-1:0]	topFracOffset,

output reg done
);


reg clk;
reg rst_n;


reg [DATA_WIDTH*CHANNELS-1:0] dIn;
reg		dInValid;
wire	nextDin;
reg		start;


wire [DATA_WIDTH*CHANNELS-1:0] dOut;
wire	dOutValid;
reg		nextDout;

integer r, rfile, wfile;

initial
  begin
    #10
    clk = 0;
    #5 forever #5 clk = !clk;
  end

initial
  begin
	done = 0;
    #10
    rst_n = 0;
    #20 rst_n = 1;
    #20 rst_n = 0;

  end

reg eof;

reg [DATA_WIDTH*CHANNELS-1:0] readMem [0:0];
initial
begin
  #10
	rfile = $fopen(inputFilename, "rb");
	
	dIn = 0;
	dInValid = 0;

	#10
	start = 0;

	#80
	r = $fread(readMem, rfile);
	dIn = readMem[0];
	
	while(! $feof(rfile))
	begin
		dInValid = 1;
		
		#10
		if(nextDin)
		begin
			r = $fread(readMem, rfile);
			dIn = readMem[0];
		end
	end

  $fclose(rfile);
end


initial
begin
  #10
	nextDout = 0;
	#140000
	forever
	begin
		#(10*(OUTPUT_X_RES+1))
		nextDout = 1;
		
	end
end


integer dOutCount;
initial
begin
  #10
	wfile = $fopen(outputFilename, "wb");
	nextDout = 0;
	dOutCount = 0;
	while(dOutCount < (OUTPUT_X_RES+1) * (OUTPUT_Y_RES+1))
	begin
		#10
		if(dOutValid == 1)
		begin
			$fwrite(wfile, "%c", dOut[23:16]);
			$fwrite(wfile, "%c", dOut[15:8]);
			$fwrite(wfile, "%c", dOut[7:0]);
			dOutCount = dOutCount + 1;
		end
	end
	$fclose(wfile);
	done = 1;
end

reg [23:0] dIn_0;
reg dInValid_0;
always@(posedge clk)
begin
	dIn_0 <= dIn;
	dInValid_0 <= dInValid;
end

video_scaler video_scaler_inst(
.clk( clk ),
.rst( rst_n ),

.dIn( dIn_0 ),
.dInValid( dInValid_0 ),
.din_Enable( nextDin ),
.start( start ),

.scaler_done(),

.dOut( dOut ),
.dOutValid( dOutValid ),
.dout_Enable( nextDout ),


.inputDiscardCnt( inputDiscardCnt ),
.inputXRes( INPUT_X_RES ),
.inputYRes( INPUT_Y_RES ),

.outputXRes( OUTPUT_X_RES ),
.outputYRes( OUTPUT_Y_RES ),
.xScale( X_SCALE ),
.yScale( Y_SCALE ),

.leftOffset( leftOffset ),
.topFracOffset( topFracOffset )
);

endmodule
module scalerTest #(
	parameter INPUT_X_RES = 640-1,
	parameter INPUT_Y_RES = 480-1,
	parameter OUTPUT_X_RES = 640-1,
	parameter OUTPUT_Y_RES = 480-1,
	parameter X_SCALE = 32'h4000 * (INPUT_X_RES) / (OUTPUT_X_RES)-1,
	parameter Y_SCALE = 32'h4000 * (INPUT_Y_RES) / (OUTPUT_Y_RES)-1,
	
	parameter DATA_WIDTH = 8,
	parameter CHANNELS = 3,
	parameter DISCARD_CNT_WIDTH = 8,
	parameter INPUT_X_RES_WIDTH = 11,
	parameter INPUT_Y_RES_WIDTH = 11,
	parameter OUTPUT_X_RES_WIDTH = 11,
	parameter OUTPUT_Y_RES_WIDTH = 11,
	parameter BUFFER_SIZE = 8
)(
input wire [50*8:0] inputFilename, outputFilename,


input wire [DISCARD_CNT_WIDTH-1:0]	inputDiscardCnt,
input wire [INPUT_X_RES_WIDTH+14-1:0] leftOffset,
input wire [14-1:0]	topFracOffset,

output reg done
);



reg clk;
reg rst_n;


reg [DATA_WIDTH*CHANNELS-1:0] dIn;
reg		dInValid;
wire	nextDin;
reg		start;


wire [DATA_WIDTH*CHANNELS-1:0] dOut;
wire	dOutValid;
reg		nextDout;

integer r, rfile, wfile;

initial
  begin
    #10
    clk = 0;
    #5 forever #5 clk = !clk;
  end

initial
  begin
	done = 0;
    #10
    rst_n = 0;
    #20 rst_n = 1;
    #20 rst_n = 0;

  end

reg eof;

reg [DATA_WIDTH*CHANNELS-1:0] readMem [0:0];
initial
begin
  #10
	rfile = $fopen(inputFilename, "rb");
	
	dIn = 0;
	dInValid = 0;

	#10
	start = 0;

	#80
	r = $fread(readMem, rfile);
	dIn = readMem[0];
	
	while(! $feof(rfile))
	begin
		dInValid = 1;
		
		#10
		if(nextDin)
		begin
			r = $fread(readMem, rfile);
			dIn = readMem[0];
		end
	end

  $fclose(rfile);
end


initial
begin
  #10
	nextDout = 0;
	#140000
	forever
	begin
		#(10*(OUTPUT_X_RES+1))
		nextDout = 1;
		
	end
end


integer dOutCount;
initial
begin
  #10
	wfile = $fopen(outputFilename, "wb");
	nextDout = 0;
	dOutCount = 0;
	while(dOutCount < (OUTPUT_X_RES+1) * (OUTPUT_Y_RES+1))
	begin
		#10
		if(dOutValid == 1)
		begin
			$fwrite(wfile, "%c", dOut[23:16]);
			$fwrite(wfile, "%c", dOut[15:8]);
			$fwrite(wfile, "%c", dOut[7:0]);
			dOutCount = dOutCount + 1;
		end
	end
	$fclose(wfile);
	done = 1;
end

reg [23:0] dIn_0;
reg dInValid_0;
always@(posedge clk)
begin
	dIn_0 <= dIn;
	dInValid_0 <= dInValid;
end

video_scaler video_scaler_inst(
.clk( clk ),
.rst( rst_n ),

.dIn( dIn_0 ),
.dInValid( dInValid_0 ),
.din_Enable( nextDin ),
.start( start ),

.scaler_done(),

.dOut( dOut ),
.dOutValid( dOutValid ),
.dout_Enable( nextDout ),


.inputDiscardCnt( inputDiscardCnt ),
.inputXRes( INPUT_X_RES ),
.inputYRes( INPUT_Y_RES ),

.outputXRes( OUTPUT_X_RES ),
.outputYRes( OUTPUT_Y_RES ),
.xScale( X_SCALE ),
.yScale( Y_SCALE ),

.leftOffset( leftOffset ),
.topFracOffset( topFracOffset )
);

endmodule