data/full_repos/permissive/143278/ivltests/udp_lfsr.v
 line:55: before: "$"
1: b'%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:38: Unsupported: Ignoring delay on this delayed statement.\n #2 reset = 1;\n ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:39: Unsupported: Ignoring delay on this delayed statement.\n #2 reset = 0;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:40: Unsupported: Ignoring delay on this delayed statement.\n #1;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:42: Unsupported: Ignoring delay on this delayed statement.\n   #5 cp = ~cp;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:46: Unsupported: Ignoring delay on this delayed statement.\n #2 reset = 1;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:47: Unsupported: Ignoring delay on this delayed statement.\n #2 reset = 0;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:48: Unsupported: Ignoring delay on this delayed statement.\n #1;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:50: Unsupported: Ignoring delay on this delayed statement.\n   #5 cp <= ~cp;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:52: Unsupported: Ignoring delay on this delayed statement.\n #5;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:55: Unsupported: Ignoring delay on this delayed statement.\n #10 $finish;\n ^\n%Error: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:61: syntax error, unexpected new, expecting IDENTIFIER or \'=\' or do or final\n   reg [7:0] new;\n                ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:67: Unsupported: Ignoring delay on this delayed statement.\n   #1;\n   ^\n%Error: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:82: syntax error, unexpected \'@\'\n @(posedge cp) old = {out, sr.s};\n ^\n%Error: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:84: syntax error, unexpected \'@\'\n @(negedge cp) new = {out, sr.s};\n ^\n%Error: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:85: syntax error, unexpected new, expecting TYPE-IDENTIFIER\n if (old != here || new !== next)\n                        ^~~\n%Error: data/full_repos/permissive/143278/ivltests/udp_lfsr.v:90: syntax error, unexpected else\n else\n ^~~~\n%Error: Exiting due to 5 error(s), 11 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module lfsr (clk, reset, in, out);

   parameter	  P = 8'b 1101_1001;

   input	  clk;
   input	  reset;
   input	  in;

   output	  out;
   wire [6:0]	  s;
   wire		  i = ^{P & {out,s}} ^ in;

   jkff ff1 (s[0], clk, i,    ~i,    reset, 0);
   jkff ff2 (s[1], clk, s[0], ~s[0], 0, reset);
   jkff ff3 (s[2], clk, s[1], ~s[1], 0, reset);
   jkff ff4 (s[3], clk, s[2], ~s[2], 0, reset);

   jkff ff8 (out,  clk, s[6], ~s[6], 0, reset);
   jkff ff7 (s[6], clk, s[5], ~s[5], 0, reset);
   jkff ff6 (s[5], clk, s[4], ~s[4], 0, reset);
   jkff ff5 (s[4], clk, s[3], ~s[3], 0, reset);

endmodule
module lfsr (clk, reset, in, out);


   parameter	  P = 8'b 1101_1001;

   input	  clk;
   input	  reset;
   input	  in;

   output	  out;
   wire [6:0]	  s;
   wire		  i = ^{P & {out,s}} ^ in;

   jkff ff1 (s[0], clk, i,    ~i,    reset, 0);
   jkff ff2 (s[1], clk, s[0], ~s[0], 0, reset);
   jkff ff3 (s[2], clk, s[1], ~s[1], 0, reset);
   jkff ff4 (s[3], clk, s[2], ~s[2], 0, reset);

   jkff ff8 (out,  clk, s[6], ~s[6], 0, reset);
   jkff ff7 (s[6], clk, s[5], ~s[5], 0, reset);
   jkff ff6 (s[5], clk, s[4], ~s[4], 0, reset);
   jkff ff5 (s[4], clk, s[3], ~s[3], 0, reset);

endmodule