data/full_repos/permissive/10301314/novena-sd.srcs/sources_1/imports/common/sync_reset.v
1: b"%Error: data/full_repos/permissive/10301314/novena-sd.srcs/sources_1/imports/common/sync_reset.v:54: Cannot find file containing module: 'FDPE'\n   FDPE fdres0( .Q(reschain[0]), .C(clk), .CE(1'b1), .D(1'b0), .PRE(glbl_reset) );\n   ^~~~\n        ... Looked in:\n             data/full_repos/permissive/10301314/novena-sd.srcs/sources_1/imports/common,data/full_repos/permissive/10301314/FDPE\n             data/full_repos/permissive/10301314/novena-sd.srcs/sources_1/imports/common,data/full_repos/permissive/10301314/FDPE.v\n             data/full_repos/permissive/10301314/novena-sd.srcs/sources_1/imports/common,data/full_repos/permissive/10301314/FDPE.sv\n             FDPE\n             FDPE.v\n             FDPE.sv\n             obj_dir/FDPE\n             obj_dir/FDPE.v\n             obj_dir/FDPE.sv\n%Error: data/full_repos/permissive/10301314/novena-sd.srcs/sources_1/imports/common/sync_reset.v:55: Cannot find file containing module: 'FDPE'\n   FDPE fdres1( .Q(reschain[1]), .C(clk), .CE(1'b1), .D(reschain[0]), .PRE(glbl_reset) );\n   ^~~~\n%Error: data/full_repos/permissive/10301314/novena-sd.srcs/sources_1/imports/common/sync_reset.v:56: Cannot find file containing module: 'FDPE'\n   FDPE fdres2( .Q(reschain[2]), .C(clk), .CE(1'b1), .D(reschain[1]), .PRE(glbl_reset) );\n   ^~~~\n%Error: data/full_repos/permissive/10301314/novena-sd.srcs/sources_1/imports/common/sync_reset.v:57: Cannot find file containing module: 'FDPE'\n   FDPE fdres3( .Q(reschain[3]), .C(clk), .CE(1'b1), .D(reschain[2]), .PRE(glbl_reset) );\n   ^~~~\n%Error: Exiting due to 4 error(s)\n"
module sync_reset (
		   input wire glbl_reset,
		   input wire clk,
		   output wire reset 
	      );

   wire [3:0]       reschain;
   
   FDPE fdres0( .Q(reschain[0]), .C(clk), .CE(1'b1), .D(1'b0), .PRE(glbl_reset) );
   FDPE fdres1( .Q(reschain[1]), .C(clk), .CE(1'b1), .D(reschain[0]), .PRE(glbl_reset) );
   FDPE fdres2( .Q(reschain[2]), .C(clk), .CE(1'b1), .D(reschain[1]), .PRE(glbl_reset) );
   FDPE fdres3( .Q(reschain[3]), .C(clk), .CE(1'b1), .D(reschain[2]), .PRE(glbl_reset) );

   assign reset = reschain[3];

endmodule
module sync_reset (
		   input wire glbl_reset,
		   input wire clk,
		   output wire reset 
	      );


   wire [3:0]       reschain;
   
   FDPE fdres0( .Q(reschain[0]), .C(clk), .CE(1'b1), .D(1'b0), .PRE(glbl_reset) );
   FDPE fdres1( .Q(reschain[1]), .C(clk), .CE(1'b1), .D(reschain[0]), .PRE(glbl_reset) );
   FDPE fdres2( .Q(reschain[2]), .C(clk), .CE(1'b1), .D(reschain[1]), .PRE(glbl_reset) );
   FDPE fdres3( .Q(reschain[3]), .C(clk), .CE(1'b1), .D(reschain[2]), .PRE(glbl_reset) );

   assign reset = reschain[3];

endmodule