data/full_repos/permissive/104053853/vending.v
1: b'%Warning-WIDTH: data/full_repos/permissive/104053853/vending.v:164: Operator NEQ expects 5 bits on the RHS, but RHS\'s CONST \'4\'h0\' generates 4 bits.\n                                                                  : ... In instance top_module.controller\n      if (coin_val != 4\'b0000)\n                   ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/104053853/vending.v:40: Cannot find file containing module: \'frequency_divider\'\nfrequency_divider devider(clock, new_clock);\n^~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/104053853,data/full_repos/permissive/104053853/frequency_divider\n             data/full_repos/permissive/104053853,data/full_repos/permissive/104053853/frequency_divider.v\n             data/full_repos/permissive/104053853,data/full_repos/permissive/104053853/frequency_divider.sv\n             frequency_divider\n             frequency_divider.v\n             frequency_divider.sv\n             obj_dir/frequency_divider\n             obj_dir/frequency_divider.v\n             obj_dir/frequency_divider.sv\n%Error: data/full_repos/permissive/104053853/vending.v:44: Cannot find file containing module: \'hello_printer\'\nhello_printer hello((~hold_ind & reset), new_clock, seq1, an1);\n^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/104053853/vending.v:45: Cannot find file containing module: \'digit_printer\'\ndigit_printer goods(((hold_ind | coin_ind) & (~charge_ind) & (~drinktk_ind)), new_clock, goods_val_now, seq2, an2);\n^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/104053853/vending.v:46: Cannot find file containing module: \'bi_printer\'\nbi_printer goods_coin(seq2, (~((~an2) >> 5)), seq3, an3, new_clock, seq2_3, an2_3);\n^~~~~~~~~~\n%Error: data/full_repos/permissive/104053853/vending.v:47: Cannot find file containing module: \'digit_printer\'\ndigit_printer coin(coin_ind, new_clock, coin_val, seq3, an3);\n^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/104053853/vending.v:48: Cannot find file containing module: \'digit_printer\'\ndigit_printer charge(charge_ind, new_clock, charge_val, seq4, an4);\n^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/104053853/vending.v:49: Cannot find file containing module: \'fin_printer\'\nfin_printer fin(drinktk_ind, new_clock, seq5, an5);\n^~~~~~~~~~~\n%Error: Exiting due to 7 error(s), 1 warning(s)\n'
module top_module (input clock,
                   input reset,
                   input op_start,
                   input goods_mark,
                   input val_mark,
                   input coin_confirm,
                   input cancel_flag,
                   output reset_led,
                   output hold_led,
                   output coin_led,
                   output drinktk_led,
                   output charge_led,
                   output reg [7:0] seq,
                   output reg [7:0] an);

wire [4:0] coin_val;
wire [4:0] goods_val;
wire [4:0] goods_val_now;
wire hold_ind;
wire coin_ind;
wire drinktk_ind;
wire charge_ind;
wire [4:0] charge_val;
wire new_clock;
wire [7:0] seq1;
wire [7:0] seq2;
wire [7:0] seq3;
wire [7:0] seq4;
wire [7:0] seq5;
wire [7:0] seq2_3;
wire [7:0] an1;
wire [7:0] an2;
wire [7:0] an2_3;
wire [7:0] an3;
wire [7:0] an4;
wire [7:0] an5;
wire drinktk_signal;
wire charge_signal;

frequency_divider devider(clock, new_clock);
main_controller controller(reset, clock, op_start, coin_val, goods_val, cancel_flag, drinktk_signal, charge_signal, hold_ind, coin_ind, drinktk_ind, charge_ind, goods_val_now, charge_val);
coin_inserter inserter(hold_ind, (hold_ind | coin_ind) & (~drinktk_ind) & (~charge_ind) , coin_confirm, val_mark, coin_val);
goods_picker picker(goods_mark, goods_val);
hello_printer hello((~hold_ind & reset), new_clock, seq1, an1);
digit_printer goods(((hold_ind | coin_ind) & (~charge_ind) & (~drinktk_ind)), new_clock, goods_val_now, seq2, an2);
bi_printer goods_coin(seq2, (~((~an2) >> 5)), seq3, an3, new_clock, seq2_3, an2_3);
digit_printer coin(coin_ind, new_clock, coin_val, seq3, an3);
digit_printer charge(charge_ind, new_clock, charge_val, seq4, an4);
fin_printer fin(drinktk_ind, new_clock, seq5, an5);
delay_timer drinktk_timer(drinktk_ind, clock, drinktk_signal);
delay_timer charge_timer(charge_ind, clock, charge_signal);

assign reset_led = reset;
assign hold_led = hold_ind;
assign coin_led = coin_ind;
assign drinktk_led = drinktk_ind;
assign charge_led = charge_ind;

always @ (*)
begin
  seq = ~((~seq1) | (~seq2_3) | (~seq4) | (~seq5));
  an = ~((~an1) | (~an2_3) | (~an4) | (~an5));
end
endmodule
module top_module (input clock,
                   input reset,
                   input op_start,
                   input goods_mark,
                   input val_mark,
                   input coin_confirm,
                   input cancel_flag,
                   output reset_led,
                   output hold_led,
                   output coin_led,
                   output drinktk_led,
                   output charge_led,
                   output reg [7:0] seq,
                   output reg [7:0] an);


wire [4:0] coin_val;
wire [4:0] goods_val;
wire [4:0] goods_val_now;
wire hold_ind;
wire coin_ind;
wire drinktk_ind;
wire charge_ind;
wire [4:0] charge_val;
wire new_clock;
wire [7:0] seq1;
wire [7:0] seq2;
wire [7:0] seq3;
wire [7:0] seq4;
wire [7:0] seq5;
wire [7:0] seq2_3;
wire [7:0] an1;
wire [7:0] an2;
wire [7:0] an2_3;
wire [7:0] an3;
wire [7:0] an4;
wire [7:0] an5;
wire drinktk_signal;
wire charge_signal;

frequency_divider devider(clock, new_clock);
main_controller controller(reset, clock, op_start, coin_val, goods_val, cancel_flag, drinktk_signal, charge_signal, hold_ind, coin_ind, drinktk_ind, charge_ind, goods_val_now, charge_val);
coin_inserter inserter(hold_ind, (hold_ind | coin_ind) & (~drinktk_ind) & (~charge_ind) , coin_confirm, val_mark, coin_val);
goods_picker picker(goods_mark, goods_val);
hello_printer hello((~hold_ind & reset), new_clock, seq1, an1);
digit_printer goods(((hold_ind | coin_ind) & (~charge_ind) & (~drinktk_ind)), new_clock, goods_val_now, seq2, an2);
bi_printer goods_coin(seq2, (~((~an2) >> 5)), seq3, an3, new_clock, seq2_3, an2_3);
digit_printer coin(coin_ind, new_clock, coin_val, seq3, an3);
digit_printer charge(charge_ind, new_clock, charge_val, seq4, an4);
fin_printer fin(drinktk_ind, new_clock, seq5, an5);
delay_timer drinktk_timer(drinktk_ind, clock, drinktk_signal);
delay_timer charge_timer(charge_ind, clock, charge_signal);

assign reset_led = reset;
assign hold_led = hold_ind;
assign coin_led = coin_ind;
assign drinktk_led = drinktk_ind;
assign charge_led = charge_ind;

always @ (*)
begin
  seq = ~((~seq1) | (~seq2_3) | (~seq4) | (~seq5));
  an = ~((~an1) | (~an2_3) | (~an4) | (~an5));
end
endmodule