data/full_repos/permissive/143278/ivltests/unary_minus2.v
 line:49: before: "begin"
1: b'%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/unary_minus2.v:49: Unsupported: Ignoring delay on this delayed statement.\n   initial #1 begin\n           ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module U1 (OUT);

   parameter VALUE = -384;

   output [9:0] OUT;

   assign	OUT = VALUE;

endmodule
module U1 (OUT);


   parameter VALUE = -384;

   output [9:0] OUT;

   assign	OUT = VALUE;

endmodule