data/full_repos/permissive/113036182/OtherUnits.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Warning-MULTITOP: data/full_repos/permissive/113036182/OtherUnits.v:5: Multiple top level modules\n                                                                      : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                      : ... Top module \'tristate_buffer\'\nmodule tristate_buffer(input x, enable, output z);\n       ^~~~~~~~~~~~~~~\n                                                                      : ... Top module \'reg_32bit\'\nmodule reg_32bit (input[31:0] d, input en,wr,clk, output[31:0] q);\n       ^~~~~~~~~\n                                                                      : ... Top module \'decoder_32bit\'\nmodule decoder_32bit (input [4:0]x, output [31:0]y);\n       ^~~~~~~~~~~~~\n                                                                      : ... Top module \'mux_2x5\'\nmodule mux_2x5 (input [4:0]O1,O2, input select, output [4:0]out1);\n       ^~~~~~~\n                                                                      : ... Top module \'mux_4x5\'\n   module mux_4x5 (input [4:0]O1,O2,O3,O4, input [1:0]select, output [4:0]out3);\n          ^~~~~~~\n                                                                      : ... Top module \'mux_2x32\'\nmodule mux_2x32 (input [31:0]O1,O2, input select, output [31:0]out1);\n       ^~~~~~~~\n                                                                      : ... Top module \'mux_4x32\'\n  module mux_4x32 (input [31:0]O1,O2,O3,O4, input [1:0]select, output [31:0]out3);\n         ^~~~~~~~\n                                                                      : ... Top module \'Latch_32bit\'\nmodule Latch_32bit (input [31:0]D,input clk,output [31:0]Q);\n       ^~~~~~~~~~~\n                                                                      : ... Top module \'SignExtend16\'\nmodule SignExtend16 (input [15:0]x, output [31:0]y);\n       ^~~~~~~~~~~~\n                                                                      : ... Top module \'Latch_5bit\'\nmodule Latch_5bit (input [4:0]D,input clk,output [4:0]Q);\n       ^~~~~~~~~~\n                                                                      : ... Top module \'Latch_2bit\'\nmodule Latch_2bit (input [1:0]D,input clk,output [1:0]Q);\n       ^~~~~~~~~~\n%Error: data/full_repos/permissive/113036182/OtherUnits.v:114: Cannot find file containing module: \'mux\'\nmux m1 (O1[0],O2[0],select[0],out1[0]),\n^~~\n        ... Looked in:\n             data/full_repos/permissive/113036182,data/full_repos/permissive/113036182/mux\n             data/full_repos/permissive/113036182,data/full_repos/permissive/113036182/mux.v\n             data/full_repos/permissive/113036182,data/full_repos/permissive/113036182/mux.sv\n             mux\n             mux.v\n             mux.sv\n             obj_dir/mux\n             obj_dir/mux.v\n             obj_dir/mux.sv\n%Error: data/full_repos/permissive/113036182/OtherUnits.v:78: Cannot find file containing module: \'mux\'\nmux m1 (O1[0],O2[0],select,out1[0]),\n^~~\n%Error: data/full_repos/permissive/113036182/OtherUnits.v:60: Cannot find file containing module: \'mux\'\nmux q1 (O1[0],O2[0],select[0],out1[0]),\n^~~\n%Error: data/full_repos/permissive/113036182/OtherUnits.v:51: Cannot find file containing module: \'mux\'\nmux m1 (O1[0],O2[0],select,out1[0]),\n^~~\n%Warning-WIDTH: data/full_repos/permissive/113036182/OtherUnits.v:2: Operator COND expects 32 bits on the Conditional True, but Conditional True\'s VARREF \'x\' generates 1 bits.\n                                                                   : ... In instance tristate_buffer\nassign z = enable? x : \'bz;\n                 ^\n%Warning-WIDTH: data/full_repos/permissive/113036182/OtherUnits.v:2: Operator ASSIGNW expects 1 bits on the Assign RHS, but Assign RHS\'s COND generates 32 bits.\n                                                                   : ... In instance tristate_buffer\nassign z = enable? x : \'bz;\n         ^\n%Error: Exiting due to 4 error(s), 3 warning(s)\n'
module mux_2x32 (input [31:0]O1,O2, input select, output [31:0]out1);
mux m1 (O1[0],O2[0],select,out1[0]),
    m2 (O1[1],O2[1],select,out1[1]),
    m3 (O1[2],O2[2],select,out1[2]),
    m4 (O1[3],O2[3],select,out1[3]),
    m5 (O1[4],O2[4],select,out1[4]),
    m6 (O1[5],O2[5],select,out1[5]),
    m7 (O1[6],O2[6],select,out1[6]),
    m8 (O1[7],O2[7],select,out1[7]),
    m9 (O1[8],O2[8],select,out1[8]),
    m10 (O1[9],O2[9],select,out1[9]),
    m11 (O1[10],O2[10],select,out1[10]),
    m12 (O1[11],O2[11],select,out1[11]),
    m13 (O1[12],O2[12],select,out1[12]),
    m14 (O1[13],O2[13],select,out1[13]),
    m15 (O1[14],O2[14],select,out1[14]),
    m16 (O1[15],O2[15],select,out1[15]),
    m17 (O1[16],O2[16],select,out1[16]),
    m18 (O1[17],O2[17],select,out1[17]),
    m19 (O1[18],O2[18],select,out1[18]),
    m20 (O1[19],O2[19],select,out1[19]),
    m21 (O1[20],O2[20],select,out1[20]),
    m22 (O1[21],O2[21],select,out1[21]),
    m23 (O1[22],O2[22],select,out1[22]),
    m24 (O1[23],O2[23],select,out1[23]),
    m25 (O1[24],O2[24],select,out1[24]),
    m26 (O1[25],O2[25],select,out1[25]),
    m27 (O1[26],O2[26],select,out1[26]),
    m28 (O1[27],O2[27],select,out1[27]),
    m29 (O1[28],O2[28],select,out1[28]),
    m30 (O1[29],O2[29],select,out1[29]),
    m31 (O1[30],O2[30],select,out1[30]),
    m32 (O1[31],O2[31],select,out1[31]);
  endmodule
module mux_2x32 (input [31:0]O1,O2, input select, output [31:0]out1);

mux m1 (O1[0],O2[0],select,out1[0]),
    m2 (O1[1],O2[1],select,out1[1]),
    m3 (O1[2],O2[2],select,out1[2]),
    m4 (O1[3],O2[3],select,out1[3]),
    m5 (O1[4],O2[4],select,out1[4]),
    m6 (O1[5],O2[5],select,out1[5]),
    m7 (O1[6],O2[6],select,out1[6]),
    m8 (O1[7],O2[7],select,out1[7]),
    m9 (O1[8],O2[8],select,out1[8]),
    m10 (O1[9],O2[9],select,out1[9]),
    m11 (O1[10],O2[10],select,out1[10]),
    m12 (O1[11],O2[11],select,out1[11]),
    m13 (O1[12],O2[12],select,out1[12]),
    m14 (O1[13],O2[13],select,out1[13]),
    m15 (O1[14],O2[14],select,out1[14]),
    m16 (O1[15],O2[15],select,out1[15]),
    m17 (O1[16],O2[16],select,out1[16]),
    m18 (O1[17],O2[17],select,out1[17]),
    m19 (O1[18],O2[18],select,out1[18]),
    m20 (O1[19],O2[19],select,out1[19]),
    m21 (O1[20],O2[20],select,out1[20]),
    m22 (O1[21],O2[21],select,out1[21]),
    m23 (O1[22],O2[22],select,out1[22]),
    m24 (O1[23],O2[23],select,out1[23]),
    m25 (O1[24],O2[24],select,out1[24]),
    m26 (O1[25],O2[25],select,out1[25]),
    m27 (O1[26],O2[26],select,out1[26]),
    m28 (O1[27],O2[27],select,out1[27]),
    m29 (O1[28],O2[28],select,out1[28]),
    m30 (O1[29],O2[29],select,out1[29]),
    m31 (O1[30],O2[30],select,out1[30]),
    m32 (O1[31],O2[31],select,out1[31]);
  endmodule