data/full_repos/permissive/213361049/Mult.v
1: b'%Warning-WIDTH: data/full_repos/permissive/213361049/Mult.v:11: Operator SHIFTL expects 32 bits on the LHS, but LHS\'s VARREF \'multiplicand\' generates 16 bits.\n                                                              : ... In instance mult\n    product = product + ( multiplicand << i );  \n                                       ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module mult(product,multiplier,multiplicand); 
   input[15:0]  multiplier, multiplicand;
   output reg[31:0] product;
   integer i;

	always @( multiplier or multiplicand )
	begin        
        product = 0;            
        for(i=0; i<16; i=i+1)
			if( multiplier[i] == 1'b1 ) 
				product = product + ( multiplicand << i );  
		end     
	endmodule
module mult(product,multiplier,multiplicand);
 
   input[15:0]  multiplier, multiplicand;
   output reg[31:0] product;
   integer i;

	always @( multiplier or multiplicand )
	begin        
        product = 0;            
        for(i=0; i<16; i=i+1)
			if( multiplier[i] == 1'b1 ) 
				product = product + ( multiplicand << i );  
		end     
	endmodule