data/full_repos/permissive/152249767/src/mem_simple/picosoc.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/152249767/src/mem_simple/picosoc.v:54: Unsupported: Ignoring delay on this delayed statement.\n always #5 clk=~clk;\n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/152249767/src/mem_simple/picosoc.v:55: Unsupported: Ignoring delay on this delayed statement.\n always #30 resetn=1;\n        ^\n%Warning-WIDTH: data/full_repos/permissive/152249767/src/mem_simple/picosoc.v:107: Bit extraction of array[1023:0] requires 10 bit index, not 22 bits.\n                                                                                 : ... In instance picosoc.internal_sram\n  rdata <= mem[addr];\n              ^\n%Warning-WIDTH: data/full_repos/permissive/152249767/src/mem_simple/picosoc.v:108: Bit extraction of array[1023:0] requires 10 bit index, not 22 bits.\n                                                                                 : ... In instance picosoc.internal_sram\n  if (wen[0]) mem[addr][ 7: 0] <= wdata[ 7: 0];\n                 ^\n%Warning-WIDTH: data/full_repos/permissive/152249767/src/mem_simple/picosoc.v:109: Bit extraction of array[1023:0] requires 10 bit index, not 22 bits.\n                                                                                 : ... In instance picosoc.internal_sram\n  if (wen[1]) mem[addr][15: 8] <= wdata[15: 8];\n                 ^\n%Warning-WIDTH: data/full_repos/permissive/152249767/src/mem_simple/picosoc.v:110: Bit extraction of array[1023:0] requires 10 bit index, not 22 bits.\n                                                                                 : ... In instance picosoc.internal_sram\n  if (wen[2]) mem[addr][23:16] <= wdata[23:16];\n                 ^\n%Warning-WIDTH: data/full_repos/permissive/152249767/src/mem_simple/picosoc.v:111: Bit extraction of array[1023:0] requires 10 bit index, not 22 bits.\n                                                                                 : ... In instance picosoc.internal_sram\n  if (wen[3]) mem[addr][31:24] <= wdata[31:24];\n                 ^\n%Error: data/full_repos/permissive/152249767/src/mem_simple/picosoc.v:62: Cannot find file containing module: \'picorv32\'\n picorv32 #(\n ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/152249767/src/mem_simple,data/full_repos/permissive/152249767/picorv32\n             data/full_repos/permissive/152249767/src/mem_simple,data/full_repos/permissive/152249767/picorv32.v\n             data/full_repos/permissive/152249767/src/mem_simple,data/full_repos/permissive/152249767/picorv32.sv\n             picorv32\n             picorv32.v\n             picorv32.sv\n             obj_dir/picorv32\n             obj_dir/picorv32.v\n             obj_dir/picorv32.sv\n%Error: Exiting due to 1 error(s), 7 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module picosoc_mem #(
        parameter integer WORDS = 1024
    )(
		input clk,
		input [3:0] wen,
		input [21:0] addr,
		input [31:0] wdata,
		output reg [31:0] rdata
	);

	reg [31:0] mem [0:WORDS-1];		

	always @(posedge clk) begin
		rdata <= mem[addr];
		if (wen[0]) mem[addr][ 7: 0] <= wdata[ 7: 0];
		if (wen[1]) mem[addr][15: 8] <= wdata[15: 8];
		if (wen[2]) mem[addr][23:16] <= wdata[23:16];
		if (wen[3]) mem[addr][31:24] <= wdata[31:24];
	end
endmodule
module picosoc_mem #(
        parameter integer WORDS = 1024
    )(
		input clk,
		input [3:0] wen,
		input [21:0] addr,
		input [31:0] wdata,
		output reg [31:0] rdata
	);


	reg [31:0] mem [0:WORDS-1];		

	always @(posedge clk) begin
		rdata <= mem[addr];
		if (wen[0]) mem[addr][ 7: 0] <= wdata[ 7: 0];
		if (wen[1]) mem[addr][15: 8] <= wdata[15: 8];
		if (wen[2]) mem[addr][23:16] <= wdata[23:16];
		if (wen[3]) mem[addr][31:24] <= wdata[31:24];
	end
endmodule