data/full_repos/permissive/169496369/mux_5.v
 line:30 column:11: Illegal character '`'
data/verilator_xmls/7a7db4e4-0cc8-494b-9a7c-dcd179d1a864.xml
module mux_5(a, b, s, c);
    input [4:0] a, b;
    input s;
    
    output [4:0] c;
    
    assign c = (s ? b : a);
endmodule
module mux_5(a, b, s, c);

    input [4:0] a, b;
    input s;
    
    output [4:0] c;
    
    assign c = (s ? b : a);
endmodule