data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Error: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:210: Cannot find file containing module: \'bsg_priority_encode\'\n  bsg_priority_encode\n  ^~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64,data/full_repos/permissive/217060808/bsg_priority_encode\n             data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64,data/full_repos/permissive/217060808/bsg_priority_encode.v\n             data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64,data/full_repos/permissive/217060808/bsg_priority_encode.sv\n             bsg_priority_encode\n             bsg_priority_encode.v\n             bsg_priority_encode.sv\n             obj_dir/bsg_priority_encode\n             obj_dir/bsg_priority_encode.v\n             obj_dir/bsg_priority_encode.sv\n%Error: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:219: Cannot find file containing module: \'bsg_lru_pseudo_tree_encode\'\n  bsg_lru_pseudo_tree_encode\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:227: Cannot find file containing module: \'bsg_lru_pseudo_tree_decode\'\n  bsg_lru_pseudo_tree_decode\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:236: Cannot find file containing module: \'bsg_priority_encode\'\n  bsg_priority_encode\n  ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:244: Cannot find file containing module: \'bsg_decode\'\n  bsg_decode\n  ^~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:369: Operator COND expects 3 bits on the Conditional False, but Conditional False\'s CONST \'1\'h0\' generates 1 bits.\n                                                                                                                                                                                 : ... In instance top.wrapper\n                             (N66)? { 1\'b1, 1\'b0, 1\'b0 } : 1\'b0;\n                                  ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:372: Operator COND expects 3 bits on the Conditional False, but Conditional False\'s CONST \'1\'h0\' generates 1 bits.\n                                                                                                                                                                                 : ... In instance top.wrapper\n                             (N6)? { 1\'b0, 1\'b0, 1\'b0 } : 1\'b0;\n                                 ^\n%Warning-WIDTH: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:381: Operator COND expects 2 bits on the Conditional False, but Conditional False\'s CONST \'1\'h0\' generates 1 bits.\n                                                                                                                                                                                 : ... In instance top.wrapper\n                        (N9)? { 1\'b1, 1\'b0 } : 1\'b0;\n                            ^\n%Warning-WIDTH: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:419: Operator COND expects 4 bits on the Conditional False, but Conditional False\'s CONST \'1\'h0\' generates 1 bits.\n                                                                                                                                                                                 : ... In instance top.wrapper\n                        (N20)? { 1\'b0, 1\'b0, 1\'b0, 1\'b0 } : 1\'b0;\n                             ^\n%Warning-WIDTH: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:435: Operator COND expects 2 bits on the Conditional False, but Conditional False\'s CONST \'1\'h0\' generates 1 bits.\n                                                                                                                                                                                 : ... In instance top.wrapper\n                           (N139)? { 1\'b0, 1\'b0 } : 1\'b0;\n                                 ^\n%Warning-WIDTH: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:445: Operator COND expects 24 bits on the Conditional False, but Conditional False\'s CONST \'1\'h0\' generates 1 bits.\n                                                                                                                                                                                 : ... In instance top.wrapper\n                            (N20)? { 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0 } : 1\'b0;\n                                 ^\n%Warning-WIDTH: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:465: Operator COND expects 3 bits on the Conditional False, but Conditional False\'s CONST \'1\'h0\' generates 1 bits.\n                                                                                                                                                                                 : ... In instance top.wrapper\n                           (N20)? { 1\'b0, 1\'b0, 1\'b0 } : 1\'b0;\n                                ^\n%Warning-WIDTH: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:475: Operator COND expects 3 bits on the Conditional False, but Conditional False\'s CONST \'1\'h0\' generates 1 bits.\n                                                                                                                                                                                 : ... In instance top.wrapper\n                             (N20)? { 1\'b0, 1\'b0, 1\'b0 } : 1\'b0;\n                                  ^\n%Warning-WIDTH: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:497: Operator COND expects 36 bits on the Conditional False, but Conditional False\'s CONST \'1\'h0\' generates 1 bits.\n                                                                                                                                                                                 : ... In instance top.wrapper\n                                                               (N138)? { 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0 } : 1\'b0;\n                                                                     ^\n%Warning-WIDTH: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:507: Operator COND expects 4 bits on the Conditional False, but Conditional False\'s CONST \'1\'h0\' generates 1 bits.\n                                                                                                                                                                                 : ... In instance top.wrapper\n                                                                (N20)? { 1\'b0, 1\'b0, 1\'b0, 1\'b0 } : 1\'b0;\n                                                                     ^\n%Warning-WIDTH: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:509: Operator COND expects 36 bits on the Conditional False, but Conditional False\'s CONST \'1\'h0\' generates 1 bits.\n                                                                                                                                                                                 : ... In instance top.wrapper\n                                                           (N138)? { 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0, 1\'b0 } : 1\'b0;\n                                                                 ^\n%Warning-WIDTH: data/full_repos/permissive/217060808/bsg_cache/bsg_cache_miss/bsg_cache_miss_ways_p_2_addr_width_p_28_data_width_p_32_block_size_in_words_p_4_sets_p_64/top.v:519: Operator COND expects 2 bits on the Conditional False, but Conditional False\'s CONST \'1\'h0\' generates 1 bits.\n                                                                                                                                                                                 : ... In instance top.wrapper\n                                                            (N20)? { 1\'b0, 1\'b0 } : 1\'b0;\n                                                                 ^\n%Error: Exiting due to 5 error(s), 12 warning(s)\n'
module top
(
  clk_i,
  reset_i,
  miss_v_i,
  decode_v_i,
  addr_v_i,
  tag_v_i,
  valid_v_i,
  lock_v_i,
  tag_hit_way_id_i,
  tag_hit_found_i,
  sbuf_empty_i,
  dma_cmd_o,
  dma_way_o,
  dma_addr_o,
  dma_done_i,
  stat_info_i,
  stat_mem_v_o,
  stat_mem_w_o,
  stat_mem_addr_o,
  stat_mem_data_o,
  stat_mem_w_mask_o,
  tag_mem_v_o,
  tag_mem_w_o,
  tag_mem_addr_o,
  tag_mem_data_o,
  tag_mem_w_mask_o,
  done_o,
  recover_o,
  chosen_way_o,
  ack_i
);

  input [15:0] decode_v_i;
  input [27:0] addr_v_i;
  input [35:0] tag_v_i;
  input [1:0] valid_v_i;
  input [1:0] lock_v_i;
  input [0:0] tag_hit_way_id_i;
  output [3:0] dma_cmd_o;
  output [0:0] dma_way_o;
  output [27:0] dma_addr_o;
  input [2:0] stat_info_i;
  output [5:0] stat_mem_addr_o;
  output [2:0] stat_mem_data_o;
  output [2:0] stat_mem_w_mask_o;
  output [5:0] tag_mem_addr_o;
  output [39:0] tag_mem_data_o;
  output [39:0] tag_mem_w_mask_o;
  output [0:0] chosen_way_o;
  input clk_i;
  input reset_i;
  input miss_v_i;
  input tag_hit_found_i;
  input sbuf_empty_i;
  input dma_done_i;
  input ack_i;
  output stat_mem_v_o;
  output stat_mem_w_o;
  output tag_mem_v_o;
  output tag_mem_w_o;
  output done_o;
  output recover_o;

  bsg_cache_miss
  wrapper
  (
    .decode_v_i(decode_v_i),
    .addr_v_i(addr_v_i),
    .tag_v_i(tag_v_i),
    .valid_v_i(valid_v_i),
    .lock_v_i(lock_v_i),
    .tag_hit_way_id_i(tag_hit_way_id_i),
    .dma_cmd_o(dma_cmd_o),
    .dma_way_o(dma_way_o),
    .dma_addr_o(dma_addr_o),
    .stat_info_i(stat_info_i),
    .stat_mem_addr_o(stat_mem_addr_o),
    .stat_mem_data_o(stat_mem_data_o),
    .stat_mem_w_mask_o(stat_mem_w_mask_o),
    .tag_mem_addr_o(tag_mem_addr_o),
    .tag_mem_data_o(tag_mem_data_o),
    .tag_mem_w_mask_o(tag_mem_w_mask_o),
    .chosen_way_o(chosen_way_o),
    .clk_i(clk_i),
    .reset_i(reset_i),
    .miss_v_i(miss_v_i),
    .tag_hit_found_i(tag_hit_found_i),
    .sbuf_empty_i(sbuf_empty_i),
    .dma_done_i(dma_done_i),
    .ack_i(ack_i),
    .stat_mem_v_o(stat_mem_v_o),
    .stat_mem_w_o(stat_mem_w_o),
    .tag_mem_v_o(tag_mem_v_o),
    .tag_mem_w_o(tag_mem_w_o),
    .done_o(done_o),
    .recover_o(recover_o)
  );


endmodule
module top
(
  clk_i,
  reset_i,
  miss_v_i,
  decode_v_i,
  addr_v_i,
  tag_v_i,
  valid_v_i,
  lock_v_i,
  tag_hit_way_id_i,
  tag_hit_found_i,
  sbuf_empty_i,
  dma_cmd_o,
  dma_way_o,
  dma_addr_o,
  dma_done_i,
  stat_info_i,
  stat_mem_v_o,
  stat_mem_w_o,
  stat_mem_addr_o,
  stat_mem_data_o,
  stat_mem_w_mask_o,
  tag_mem_v_o,
  tag_mem_w_o,
  tag_mem_addr_o,
  tag_mem_data_o,
  tag_mem_w_mask_o,
  done_o,
  recover_o,
  chosen_way_o,
  ack_i
);


  input [15:0] decode_v_i;
  input [27:0] addr_v_i;
  input [35:0] tag_v_i;
  input [1:0] valid_v_i;
  input [1:0] lock_v_i;
  input [0:0] tag_hit_way_id_i;
  output [3:0] dma_cmd_o;
  output [0:0] dma_way_o;
  output [27:0] dma_addr_o;
  input [2:0] stat_info_i;
  output [5:0] stat_mem_addr_o;
  output [2:0] stat_mem_data_o;
  output [2:0] stat_mem_w_mask_o;
  output [5:0] tag_mem_addr_o;
  output [39:0] tag_mem_data_o;
  output [39:0] tag_mem_w_mask_o;
  output [0:0] chosen_way_o;
  input clk_i;
  input reset_i;
  input miss_v_i;
  input tag_hit_found_i;
  input sbuf_empty_i;
  input dma_done_i;
  input ack_i;
  output stat_mem_v_o;
  output stat_mem_w_o;
  output tag_mem_v_o;
  output tag_mem_w_o;
  output done_o;
  output recover_o;

  bsg_cache_miss
  wrapper
  (
    .decode_v_i(decode_v_i),
    .addr_v_i(addr_v_i),
    .tag_v_i(tag_v_i),
    .valid_v_i(valid_v_i),
    .lock_v_i(lock_v_i),
    .tag_hit_way_id_i(tag_hit_way_id_i),
    .dma_cmd_o(dma_cmd_o),
    .dma_way_o(dma_way_o),
    .dma_addr_o(dma_addr_o),
    .stat_info_i(stat_info_i),
    .stat_mem_addr_o(stat_mem_addr_o),
    .stat_mem_data_o(stat_mem_data_o),
    .stat_mem_w_mask_o(stat_mem_w_mask_o),
    .tag_mem_addr_o(tag_mem_addr_o),
    .tag_mem_data_o(tag_mem_data_o),
    .tag_mem_w_mask_o(tag_mem_w_mask_o),
    .chosen_way_o(chosen_way_o),
    .clk_i(clk_i),
    .reset_i(reset_i),
    .miss_v_i(miss_v_i),
    .tag_hit_found_i(tag_hit_found_i),
    .sbuf_empty_i(sbuf_empty_i),
    .dma_done_i(dma_done_i),
    .ack_i(ack_i),
    .stat_mem_v_o(stat_mem_v_o),
    .stat_mem_w_o(stat_mem_w_o),
    .tag_mem_v_o(tag_mem_v_o),
    .tag_mem_w_o(tag_mem_w_o),
    .done_o(done_o),
    .recover_o(recover_o)
  );


endmodule