data/full_repos/permissive/102388603/pwm2digit.v
data/verilator_xmls/7bdcb843-be75-49b8-9c71-3d14afe7e87a.xml
module pwm2digit#(parameter N=8)
	(
    input in,
    output reg [N-1:0] out,
    input clk,
    input rst
    );
	
	reg [N-1:0]count;
	reg [N-1:0] countPeriod;
	

	always @(posedge clk, posedge rst)
	if(rst)
		count <= 0;
	else
		count <= count + 1;
		

	always @(posedge clk, posedge rst)
	if(rst)
	begin
		out <= 0;
		countPeriod <= 0;
	end
	else
	begin
	if(count == 0)
	begin
		countPeriod <= 0;
		out <= countPeriod;
	end
	else if(in)
		countPeriod <= countPeriod + 1;
	end
endmodule
module pwm2digit#(parameter N=8)
	(
    input in,
    output reg [N-1:0] out,
    input clk,
    input rst
    );

	
	reg [N-1:0]count;
	reg [N-1:0] countPeriod;
	

	always @(posedge clk, posedge rst)
	if(rst)
		count <= 0;
	else
		count <= count + 1;
		

	always @(posedge clk, posedge rst)
	if(rst)
	begin
		out <= 0;
		countPeriod <= 0;
	end
	else
	begin
	if(count == 0)
	begin
		countPeriod <= 0;
		out <= countPeriod;
	end
	else if(in)
		countPeriod <= countPeriod + 1;
	end
endmodule