data/full_repos/permissive/184332405/full_adder_tb.v
 line:21: before: "$"
1: b'%Error: data/full_repos/permissive/184332405/full_adder_tb.v:9: Unsupported or unknown PLI call: $dumpfile\n  $dumpfile("FullAdder.vcd");\n  ^~~~~~~~~\n%Error: data/full_repos/permissive/184332405/full_adder_tb.v:10: Unsupported or unknown PLI call: $dumpvars\n  $dumpvars(0,Jacub);\n  ^~~~~~~~~\n%Error: data/full_repos/permissive/184332405/full_adder_tb.v:12: Unsupported or unknown PLI call: $monitor\n  $monitor("%b  %b  %b  | %b  %b", a, b, cin, s, cout);\n  ^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/184332405/full_adder_tb.v:13: Unsupported: Ignoring delay on this delayed statement.\n  #0  a = 1\'b0; b = 1\'b0; cin = 1\'b0;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/184332405/full_adder_tb.v:14: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 1\'b0; b = 1\'b0; cin = 1\'b1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/full_adder_tb.v:15: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 1\'b0; b = 1\'b1; cin = 1\'b0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/full_adder_tb.v:16: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 1\'b0; b = 1\'b1; cin = 1\'b1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/full_adder_tb.v:17: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 1\'b1; b = 1\'b0; cin = 1\'b0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/full_adder_tb.v:18: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 1\'b1; b = 1\'b0; cin = 1\'b1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/full_adder_tb.v:19: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 1\'b1; b = 1\'b1; cin = 1\'b0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/full_adder_tb.v:20: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 1\'b1; b = 1\'b1; cin = 1\'b1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/full_adder_tb.v:21: Unsupported: Ignoring delay on this delayed statement.\n  #50 $finish;\n  ^\n%Error: Exiting due to 3 error(s), 9 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module full_adder_tb;
reg  a,b,cin;
wire s,cout;

initial
	begin
		$dumpfile("FullAdder.vcd");
		$dumpvars(0,Jacub);
		$display("a  b cin   s cout");
		$monitor("%b  %b  %b  | %b  %b", a, b, cin, s, cout);
		#0  a = 1'b0; b = 1'b0; cin = 1'b0;
		#50 a = 1'b0; b = 1'b0; cin = 1'b1;
		#50 a = 1'b0; b = 1'b1; cin = 1'b0;
		#50 a = 1'b0; b = 1'b1; cin = 1'b1;
		#50 a = 1'b1; b = 1'b0; cin = 1'b0;
		#50 a = 1'b1; b = 1'b0; cin = 1'b1;
		#50 a = 1'b1; b = 1'b1; cin = 1'b0;
		#50 a = 1'b1; b = 1'b1; cin = 1'b1;
		#50 $finish;
	end

full_adder Jacub(s,cout,a,b,cin);

endmodule
module full_adder_tb;

reg  a,b,cin;
wire s,cout;

initial
	begin
		$dumpfile("FullAdder.vcd");
		$dumpvars(0,Jacub);
		$display("a  b cin   s cout");
		$monitor("%b  %b  %b  | %b  %b", a, b, cin, s, cout);
		#0  a = 1'b0; b = 1'b0; cin = 1'b0;
		#50 a = 1'b0; b = 1'b0; cin = 1'b1;
		#50 a = 1'b0; b = 1'b1; cin = 1'b0;
		#50 a = 1'b0; b = 1'b1; cin = 1'b1;
		#50 a = 1'b1; b = 1'b0; cin = 1'b0;
		#50 a = 1'b1; b = 1'b0; cin = 1'b1;
		#50 a = 1'b1; b = 1'b1; cin = 1'b0;
		#50 a = 1'b1; b = 1'b1; cin = 1'b1;
		#50 $finish;
	end

full_adder Jacub(s,cout,a,b,cin);

endmodule