data/full_repos/permissive/143278/ivltests/pr1921332.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Warning-IMPLICIT: data/full_repos/permissive/143278/ivltests/pr1921332.v:5: Signal definition not found, creating implicitly: \'a\'\n   prim  p (a, D, D, D);\n            ^\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module test (D);

   input D;

   prim  p (a, D, D, D);

endmodule
module test (D);


   input D;

   prim  p (a, D, D, D);

endmodule