data/full_repos/permissive/190595283/Modulos/Somador4.v
1: b'%Warning-WIDTH: data/full_repos/permissive/190595283/Modulos/Somador4.v:4: Operator ADD expects 32 bits on the RHS, but RHS\'s CONST \'4\'h4\' generates 4 bits.\n                                                                         : ... In instance Somador4\n  assign saida = a+4\'b0100;  \n                  ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module Somador4 (a,saida);
  input [31:0]a;
  output [31:0]saida;
  assign saida = a+4'b0100;
endmodule
module Somador4 (a,saida);

  input [31:0]a;
  output [31:0]saida;
  assign saida = a+4'b0100;
endmodule