data/full_repos/permissive/200142067/bin/synth/yosys-abc/share/yosys/anlogic/eagle_bb.v
1: b"%Error: data/full_repos/permissive/200142067/bin/synth/yosys-abc/share/yosys/anlogic/eagle_bb.v:170: Unexpected 'do': 'do' is a SystemVerilog keyword misused as an identifier.\n        ... Suggest modify the Verilog-2001 code to avoid SV keywords, or use `begin_keywords or --language.\n  output [DATA_WIDTH_R-1:0] do,\n                            ^~\n%Error: data/full_repos/permissive/200142067/bin/synth/yosys-abc/share/yosys/anlogic/eagle_bb.v:206: Unexpected 'do': 'do' is a SystemVerilog keyword misused as an identifier.\n  output [DATA_WIDTH_R-1:0] do,\n                            ^~\n%Error: data/full_repos/permissive/200142067/bin/synth/yosys-abc/share/yosys/anlogic/eagle_bb.v:225: Unexpected 'do': 'do' is a SystemVerilog keyword misused as an identifier.\n  output [3:0]do\n              ^~\n%Error: data/full_repos/permissive/200142067/bin/synth/yosys-abc/share/yosys/anlogic/eagle_bb.v:759: Unexpected 'do': 'do' is a SystemVerilog keyword misused as an identifier.\n  input [3:0] do,\n              ^~\n%Error: data/full_repos/permissive/200142067/bin/synth/yosys-abc/share/yosys/anlogic/eagle_bb.v:893: Unexpected 'do': 'do' is a SystemVerilog keyword misused as an identifier.\n  output [7:0] do,\n               ^~\n%Error: Exiting due to 5 error(s)\n"
module EG_PHY_MULT18(
  output [17:0] acout,
  output [17:0] bcout,
  output [35:0] p,
  input signeda,
  input signedb,
  input [17:0] a,
  input [17:0] b,
  input [17:0] acin,
  input [17:0] bcin,
  input cea,
  input ceb,
  input cepd,
  input clk,
  input rstan,
  input rstbn,
  input rstpdn,
  input sourcea,
  input sourceb  
); 
  parameter INPUTREGA = "ENABLE";
  parameter INPUTREGB = "ENABLE";
  parameter OUTPUTREG = "ENABLE";
  parameter SRMODE = "ASYNC";
  parameter MODE = "MULT18X18C";
  parameter CEAMUX = "SIG";
  parameter CEBMUX = "SIG";
  parameter CEPDMUX = "SIG";
  parameter RSTANMUX = "SIG";
  parameter RSTBNMUX = "SIG";
  parameter RSTPDNMUX = "SIG";
  parameter CLKMUX = "SIG";
  parameter SIGNEDAMUX = "SIG";
  parameter SIGNEDBMUX = "SIG";
  parameter SOURCEAMUX = "SIG";
  parameter SOURCEBMUX = "SIG";
endmodule
module EG_PHY_MULT18(
  output [17:0] acout,
  output [17:0] bcout,
  output [35:0] p,
  input signeda,
  input signedb,
  input [17:0] a,
  input [17:0] b,
  input [17:0] acin,
  input [17:0] bcin,
  input cea,
  input ceb,
  input cepd,
  input clk,
  input rstan,
  input rstbn,
  input rstpdn,
  input sourcea,
  input sourceb  
);
 
  parameter INPUTREGA = "ENABLE";
  parameter INPUTREGB = "ENABLE";
  parameter OUTPUTREG = "ENABLE";
  parameter SRMODE = "ASYNC";
  parameter MODE = "MULT18X18C";
  parameter CEAMUX = "SIG";
  parameter CEBMUX = "SIG";
  parameter CEPDMUX = "SIG";
  parameter RSTANMUX = "SIG";
  parameter RSTBNMUX = "SIG";
  parameter RSTPDNMUX = "SIG";
  parameter CLKMUX = "SIG";
  parameter SIGNEDAMUX = "SIG";
  parameter SIGNEDBMUX = "SIG";
  parameter SOURCEAMUX = "SIG";
  parameter SOURCEBMUX = "SIG";
endmodule