data/full_repos/permissive/160424330/cpu_tb.v
 line:36: before: "="
1: b'%Error: data/full_repos/permissive/160424330/cpu_tb.v:1: Cannot find include file: cpu.v\n`include "cpu.v" \n         ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/160424330,data/full_repos/permissive/160424330/cpu.v\n             data/full_repos/permissive/160424330,data/full_repos/permissive/160424330/cpu.v.v\n             data/full_repos/permissive/160424330,data/full_repos/permissive/160424330/cpu.v.sv\n             cpu.v\n             cpu.v.v\n             cpu.v.sv\n             obj_dir/cpu.v\n             obj_dir/cpu.v.v\n             obj_dir/cpu.v.sv\n%Error: data/full_repos/permissive/160424330/cpu_tb.v:2: Cannot find include file: utils.v\n`include "utils.v" \n         ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/160424330/cpu_tb.v:19: Unsupported: Ignoring delay on this delayed statement.\n    forever #1 clk = ~clk;\n            ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/160424330/cpu_tb.v:23: Unsupported: Ignoring delay on this delayed statement.\n      #98 tick_60hz = 1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/160424330/cpu_tb.v:24: Unsupported: Ignoring delay on this delayed statement.\n      #2 tick_60hz = 0;\n      ^\n%Error: data/full_repos/permissive/160424330/cpu_tb.v:54: Unsupported or unknown PLI call: $dumpfile\n    $dumpfile(`VCD_FILE);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/160424330/cpu_tb.v:54: Define or directive not defined: \'`VCD_FILE\'\n    $dumpfile(`VCD_FILE);\n              ^~~~~~~~~\n%Error: data/full_repos/permissive/160424330/cpu_tb.v:55: Unsupported or unknown PLI call: $dumpvars\n    $dumpvars;\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/160424330/cpu_tb.v:57: Unsupported: wait statements\n  wait (cpu0.state == cpu0.STATE_STOP);;\n  ^~~~\n%Error: data/full_repos/permissive/160424330/cpu_tb.v:60: Unsupported: wait statements\n  wait (cpu0.state == cpu0.STATE_STOP);;\n  ^~~~\n%Error: data/full_repos/permissive/160424330/cpu_tb.v:63: Unsupported: wait statements\n  wait (cpu0.state == cpu0.STATE_STOP);;\n  ^~~~\n%Error: data/full_repos/permissive/160424330/cpu_tb.v:66: Unsupported: wait statements\n  wait (cpu0.state == cpu0.STATE_STOP);;\n  ^~~~\n%Error: data/full_repos/permissive/160424330/cpu_tb.v:69: Unsupported: wait statements\n  wait (cpu0.state == cpu0.STATE_STOP);;\n  ^~~~\n%Error: data/full_repos/permissive/160424330/cpu_tb.v:73: Unsupported: wait statements\n  wait (cpu0.state == cpu0.STATE_STOP);;\n  ^~~~\n%Error: data/full_repos/permissive/160424330/cpu_tb.v:77: Unsupported: wait statements\n  wait (cpu0.state == cpu0.STATE_STOP);;\n  ^~~~\n%Error: data/full_repos/permissive/160424330/cpu_tb.v:81: Unsupported: wait statements\n  wait (cpu0.state == cpu0.STATE_STOP);;\n  ^~~~\n%Error: data/full_repos/permissive/160424330/cpu_tb.v:98: Unsupported: wait statements\n  wait (cpu0.state == cpu0.STATE_STOP);;\n  ^~~~\n%Error: data/full_repos/permissive/160424330/cpu_tb.v:103: Unsupported: wait statements\n  wait (cpu0.state == cpu0.STATE_STOP);;\n  ^~~~\n%Error: Exiting due to 15 error(s), 3 warning(s)\n'
module top;
  reg clk = 1;
  reg tick_60hz = 0;
  reg [15:0] keys = 0;
  wire out;

  cpu cpu0(.clk(clk),
           .tick_60hz(tick_60hz),
           .tick_next(1'b1),
           .keys(keys),
           .out(out),
           .scr_busy(1'b0),
           .scr_read(1'b0));

  initial
    forever #1 clk = ~clk;

  initial
    forever begin
      #98 tick_60hz = 1;
      #2 tick_60hz = 0;
    end

  initial utils.timeout(10000);

  task reset;
    integer i;
    begin
      for (i = 0; i < 'h1000; i++)
        cpu0.mem0.data[i] = 0;
      $readmemh("font.hex", cpu0.mem0.data, 'h030, 'h07f);

      cpu0.addr = 0;
      cpu0.pc = 'h200;
      cpu0.dt = 0;
      cpu0.st = 0;

      cpu0.state = cpu0.STATE_NEXT;
    end
  endtask

  integer i;

`define run(name) \
  $display("Running %s", name); \
  reset; \
  $readmemh(name, cpu0.mem0.data, 'h200, 'hFFF); \
  wait (cpu0.state == cpu0.STATE_STOP);

  initial begin
    $dumpfile(`VCD_FILE);
    $dumpvars;

    `run("build/test_jump.hex");
    utils.assert_equal(cpu0.mem0.data['h020], 'h42);

    `run("build/test_call.hex");
    utils.assert_equal(cpu0.mem0.data['h020], 'h42);

    `run("build/test_add.hex");
    utils.assert_equal(cpu0.mem0.data['h020], 'h42);

    `run("build/test_mem.hex");
    utils.assert_equal(cpu0.mem0.data['h020], 'h42);

    `run("build/test_jump_v0.hex");
    utils.assert_equal(cpu0.mem0.data['h020], 'h42);

    keys <= 'b10101010;
    `run("build/test_keys.hex");
    keys <= 'b00000000;
    utils.assert_equal(cpu0.mem0.data['h020], 'b10101010);

    `run("build/test_screen.hex");
    for (i = 'h100; i < 'h200; i++)
      utils.assert_equal(cpu0.mem0.data[i], 0);

    `run("build/test_drw.hex");

    utils.assert_equal(cpu0.mem0.data['h138], 'b00100000);
    utils.assert_equal(cpu0.mem0.data['h140], 'b01100000);
    utils.assert_equal(cpu0.mem0.data['h148], 'b00100000);
    utils.assert_equal(cpu0.mem0.data['h150], 'b00100000);
    utils.assert_equal(cpu0.mem0.data['h158], 'b01110000);

    utils.assert_equal({cpu0.mem0.data['h110], cpu0.mem0.data['h111]}, 'b00110000_00110000);
    utils.assert_equal({cpu0.mem0.data['h118], cpu0.mem0.data['h119]}, 'b00111100_11110000);
    utils.assert_equal({cpu0.mem0.data['h120], cpu0.mem0.data['h121]}, 'b00111100_11110000);
    utils.assert_equal({cpu0.mem0.data['h128], cpu0.mem0.data['h129]}, 'b00111100_11110000);
    utils.assert_equal({cpu0.mem0.data['h130], cpu0.mem0.data['h131]}, 'b00110000_00110000);


    utils.assert_equal(cpu0.mem0.data['h02f], 1);

    `run("build/test_bcd.hex");
    utils.assert_equal(cpu0.mem0.data['h020], 'h42);


    i = $time;
    `run("build/test_timers.hex");
    utils.assert_equal(($time - i) / 100, 5);
    utils.assert_equal(out, 1);

    $finish;
  end
endmodule
module top;

  reg clk = 1;
  reg tick_60hz = 0;
  reg [15:0] keys = 0;
  wire out;

  cpu cpu0(.clk(clk),
           .tick_60hz(tick_60hz),
           .tick_next(1'b1),
           .keys(keys),
           .out(out),
           .scr_busy(1'b0),
           .scr_read(1'b0));

  initial
    forever #1 clk = ~clk;

  initial
    forever begin
      #98 tick_60hz = 1;
      #2 tick_60hz = 0;
    end

  initial utils.timeout(10000);

  task reset;
    integer i;
    begin
      for (i = 0; i < 'h1000; i++)
        cpu0.mem0.data[i] = 0;
      $readmemh("font.hex", cpu0.mem0.data, 'h030, 'h07f);

      cpu0.addr = 0;
      cpu0.pc = 'h200;
      cpu0.dt = 0;
      cpu0.st = 0;

      cpu0.state = cpu0.STATE_NEXT;
    end
  endtask

  integer i;

`define run(name) \
  $display("Running %s", name); \
  reset; \
  $readmemh(name, cpu0.mem0.data, 'h200, 'hFFF); \
  wait (cpu0.state == cpu0.STATE_STOP);

  initial begin
    $dumpfile(`VCD_FILE);
    $dumpvars;

    `run("build/test_jump.hex");
    utils.assert_equal(cpu0.mem0.data['h020], 'h42);

    `run("build/test_call.hex");
    utils.assert_equal(cpu0.mem0.data['h020], 'h42);

    `run("build/test_add.hex");
    utils.assert_equal(cpu0.mem0.data['h020], 'h42);

    `run("build/test_mem.hex");
    utils.assert_equal(cpu0.mem0.data['h020], 'h42);

    `run("build/test_jump_v0.hex");
    utils.assert_equal(cpu0.mem0.data['h020], 'h42);

    keys <= 'b10101010;
    `run("build/test_keys.hex");
    keys <= 'b00000000;
    utils.assert_equal(cpu0.mem0.data['h020], 'b10101010);

    `run("build/test_screen.hex");
    for (i = 'h100; i < 'h200; i++)
      utils.assert_equal(cpu0.mem0.data[i], 0);

    `run("build/test_drw.hex");

    utils.assert_equal(cpu0.mem0.data['h138], 'b00100000);
    utils.assert_equal(cpu0.mem0.data['h140], 'b01100000);
    utils.assert_equal(cpu0.mem0.data['h148], 'b00100000);
    utils.assert_equal(cpu0.mem0.data['h150], 'b00100000);
    utils.assert_equal(cpu0.mem0.data['h158], 'b01110000);

    utils.assert_equal({cpu0.mem0.data['h110], cpu0.mem0.data['h111]}, 'b00110000_00110000);
    utils.assert_equal({cpu0.mem0.data['h118], cpu0.mem0.data['h119]}, 'b00111100_11110000);
    utils.assert_equal({cpu0.mem0.data['h120], cpu0.mem0.data['h121]}, 'b00111100_11110000);
    utils.assert_equal({cpu0.mem0.data['h128], cpu0.mem0.data['h129]}, 'b00111100_11110000);
    utils.assert_equal({cpu0.mem0.data['h130], cpu0.mem0.data['h131]}, 'b00110000_00110000);


    utils.assert_equal(cpu0.mem0.data['h02f], 1);

    `run("build/test_bcd.hex");
    utils.assert_equal(cpu0.mem0.data['h020], 'h42);


    i = $time;
    `run("build/test_timers.hex");
    utils.assert_equal(($time - i) / 100, 5);
    utils.assert_equal(out, 1);

    $finish;
  end
endmodule