data/full_repos/permissive/199632300/HDLBits/Circuits/Combiantional_Logic/Arithmetic_Circuits/bcdadd4.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b"%Error: data/full_repos/permissive/199632300/HDLBits/Circuits/Combiantional_Logic/Arithmetic_Circuits/bcdadd4.v:10: Cannot find file containing module: 'bcd_fadd'\n  bcd_fadd bcd_fadd0_inst\n  ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/199632300/HDLBits/Circuits/Combiantional_Logic/Arithmetic_Circuits,data/full_repos/permissive/199632300/bcd_fadd\n             data/full_repos/permissive/199632300/HDLBits/Circuits/Combiantional_Logic/Arithmetic_Circuits,data/full_repos/permissive/199632300/bcd_fadd.v\n             data/full_repos/permissive/199632300/HDLBits/Circuits/Combiantional_Logic/Arithmetic_Circuits,data/full_repos/permissive/199632300/bcd_fadd.sv\n             bcd_fadd\n             bcd_fadd.v\n             bcd_fadd.sv\n             obj_dir/bcd_fadd\n             obj_dir/bcd_fadd.v\n             obj_dir/bcd_fadd.sv\n%Error: data/full_repos/permissive/199632300/HDLBits/Circuits/Combiantional_Logic/Arithmetic_Circuits/bcdadd4.v:22: Cannot find file containing module: 'bcd_fadd'\n      bcd_fadd bcd_fadd_insts\n      ^~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module top_module (
  input [15:0] a, b,
  input cin,
  output cout,
  output [15:0] sum
);

  wire [3:0] inter_cout;

  bcd_fadd bcd_fadd0_inst
  (
    .a(a[3:0]),
    .b(b[3:0]),
    .cin(cin),
    .cout(inter_cout[0]),
    .sum(sum[3:0])
  );

  genvar i;
  generate
    for (i = 1; i <=3; i = i + 1) begin: gen_bcd_adders
      bcd_fadd bcd_fadd_insts
      (
        .a(a[4*(i+1)-1 : 4*i]),
        .b(b[4*(i+1)-1 : 4*i]),
        .cin(inter_cout[i-1]),
        .cout(inter_cout[i]),
        .sum(sum[4*(i+1)-1 : 4*i])
      );
    end
  endgenerate

  assign cout = inter_cout[3];

endmodule
module top_module (
  input [15:0] a, b,
  input cin,
  output cout,
  output [15:0] sum
);


  wire [3:0] inter_cout;

  bcd_fadd bcd_fadd0_inst
  (
    .a(a[3:0]),
    .b(b[3:0]),
    .cin(cin),
    .cout(inter_cout[0]),
    .sum(sum[3:0])
  );

  genvar i;
  generate
    for (i = 1; i <=3; i = i + 1) begin: gen_bcd_adders
      bcd_fadd bcd_fadd_insts
      (
        .a(a[4*(i+1)-1 : 4*i]),
        .b(b[4*(i+1)-1 : 4*i]),
        .cin(inter_cout[i-1]),
        .cout(inter_cout[i]),
        .sum(sum[4*(i+1)-1 : 4*i])
      );
    end
  endgenerate

  assign cout = inter_cout[3];

endmodule