data/full_repos/permissive/146246005/ALU/ALU_TB.sv
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:16: syntax error, unexpected begin\n   begin\n   ^~~~~\n%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:19: syntax error, unexpected end\n  end\n  ^~~\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:26: Unsupported: Ignoring delay on this delayed statement.\n    forever #20 CLK=~CLK;\n            ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:29: Unsupported or unknown PLI call: $monitor\n  initial $monitor("OPCODE = %b  A =%4d  B =%4d  EN =%b  OE =%b \\n\\t\\tALU_OUT =%4d  CF =%b  OF =%b  SF =%b  ZF =%b", OPCODE, A, B, EN, OE, ALU_OUT, CF, OF, SF, ZF);\n          ^~~~~~~~\n%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:32: Unsupported or unknown PLI call: $vcdpluson\n    $vcdpluson;\n    ^~~~~~~~~~\n%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:35: Unsupported or unknown PLI call: $monitoroff\n  $monitoroff; OE=1; EN=1; OPCODE = 4\'b0010; #10 $monitoron;\n  ^~~~~~~~~~~\n%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:35: Unsupported or unknown PLI call: $monitoron\n  $monitoroff; OE=1; EN=1; OPCODE = 4\'b0010; #10 $monitoron;\n                                                 ^~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:35: Unsupported: Ignoring delay on this delayed statement.\n  $monitoroff; OE=1; EN=1; OPCODE = 4\'b0010; #10 $monitoron;\n                                             ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:36: Unsupported: Ignoring delay on this delayed statement.\n  #20 $display("ADD"); A=8\'d6; B=8\'d5;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:37: Unsupported: Ignoring delay on this delayed statement.\n  #40 $display("ADD, Zero flag"); A=8\'d0; B=8\'d0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:38: Unsupported: Ignoring delay on this delayed statement.\n  #40 $display("ADD, Overflow and Carry flags"); A=8\'d150; B=8\'d106;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:39: Unsupported: Ignoring delay on this delayed statement.\n  #40 $display("ADD, Signed flag"); A=8\'d128; B=8\'d1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:41: Unsupported: Ignoring delay on this delayed statement.\n  #60 $display("\\n\\t\\t\\t Testing SUB");\n  ^\n%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:42: Unsupported or unknown PLI call: $monitoroff\n  $monitoroff; OE=1; EN=1; OPCODE = 4\'b0011; $monitoron;\n  ^~~~~~~~~~~\n%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:42: Unsupported or unknown PLI call: $monitoron\n  $monitoroff; OE=1; EN=1; OPCODE = 4\'b0011; $monitoron;\n                                             ^~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:43: Unsupported: Ignoring delay on this delayed statement.\n  #40 $display("SUB"); A=8\'d60; B=8\'d43;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:44: Unsupported: Ignoring delay on this delayed statement.\n  #40 $display("SUB, Zero flag"); A=8\'d20; B=8\'d20;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:45: Unsupported: Ignoring delay on this delayed statement.\n  #40 $display("SUB, Overflow flag"); A=8\'d128; B=-8\'d1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:46: Unsupported: Ignoring delay on this delayed statement.\n  #40 $display("SUB, Signed and Carry flags"); A=8\'d50; B=8\'d100;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:48: Unsupported: Ignoring delay on this delayed statement.\n  #60 $display("\\n\\t\\t\\t Testing AND");\n  ^\n%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:49: Unsupported or unknown PLI call: $monitoroff\n  $monitoroff; OE=1; EN=1; OPCODE = 4\'b0100; $monitoron;\n  ^~~~~~~~~~~\n%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:49: Unsupported or unknown PLI call: $monitoron\n  $monitoroff; OE=1; EN=1; OPCODE = 4\'b0100; $monitoron;\n                                             ^~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:50: Unsupported: Ignoring delay on this delayed statement.\n  #60 $display("AND"); A=8\'d10; B=8\'d10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:51: Unsupported: Ignoring delay on this delayed statement.\n  #40 $display("AND, Zero flag"); A=8\'d20; B=8\'d10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:52: Unsupported: Ignoring delay on this delayed statement.\n  #40 $display("AND, Signed flags"); A=8\'d128; B=8\'d128;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:54: Unsupported: Ignoring delay on this delayed statement.\n  #60 $display("\\n\\t\\t\\t Testing OR");\n  ^\n%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:55: Unsupported or unknown PLI call: $monitoroff\n  $monitoroff; OE=1; EN=1; OPCODE = 4\'b0101; $monitoron;\n  ^~~~~~~~~~~\n%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:55: Unsupported or unknown PLI call: $monitoron\n  $monitoroff; OE=1; EN=1; OPCODE = 4\'b0101; $monitoron;\n                                             ^~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:56: Unsupported: Ignoring delay on this delayed statement.\n  #60 $display("OR"); A=8\'d20; B=8\'d10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:57: Unsupported: Ignoring delay on this delayed statement.\n  #40 $display("OR, Zero flag"); A=8\'d0; B=8\'d0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:58: Unsupported: Ignoring delay on this delayed statement.\n  #40 $display("OR, Signed flags"); A=8\'d10; B=-8\'d5;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:60: Unsupported: Ignoring delay on this delayed statement.\n  #60 $display("\\n\\t\\t\\t Testing XOR");\n  ^\n%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:61: Unsupported or unknown PLI call: $monitoroff\n  $monitoroff; OE=1; EN=1; OPCODE = 4\'b0110; $monitoron;\n  ^~~~~~~~~~~\n%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:61: Unsupported or unknown PLI call: $monitoron\n  $monitoroff; OE=1; EN=1; OPCODE = 4\'b0110; $monitoron;\n                                             ^~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:62: Unsupported: Ignoring delay on this delayed statement.\n  #60 $display("XOR"); A=8\'d37; B=8\'d90;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:63: Unsupported: Ignoring delay on this delayed statement.\n  #40 $display("XOR, Zero flag"); A=8\'d255; B=8\'d255;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:64: Unsupported: Ignoring delay on this delayed statement.\n  #40 $display("XOR, Signed flags"); A=8\'d128; B=8\'d0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:66: Unsupported: Ignoring delay on this delayed statement.\n  #60 $display("\\n\\t\\t\\t Testing NOT");\n  ^\n%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:67: Unsupported or unknown PLI call: $monitoroff\n  $monitoroff; OE=1; EN=1; OPCODE = 4\'b0111; $monitoron;\n  ^~~~~~~~~~~\n%Error: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:67: Unsupported or unknown PLI call: $monitoron\n  $monitoroff; OE=1; EN=1; OPCODE = 4\'b0111; $monitoron;\n                                             ^~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:68: Unsupported: Ignoring delay on this delayed statement.\n  #60 $display("NOT"); A=8\'d37;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:69: Unsupported: Ignoring delay on this delayed statement.\n  #40 $display("NOT, Zero flag"); A=8\'d255;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:70: Unsupported: Ignoring delay on this delayed statement.\n  #40 $display("NOT, Signed flags"); A=8\'d127;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/ALU/ALU_TB.sv:72: Unsupported: Ignoring delay on this delayed statement.\n  #40 $finish;\n  ^\n%Error: Exiting due to 16 error(s), 28 warning(s)\n'
module ALU_TB();
  parameter WIDTH = 8;
  reg CF, OF, SF, ZF;
  reg [3:0] OPCODE;
  reg CLK, EN, OE;
  
  `ifdef SignedINTs begin
    reg signed [ WIDTH-1 : 0] ALU_OUT;
    reg signed [ WIDTH-1 : 0] A, B;
  end
  
  `else begin
    reg [ WIDTH-1 : 0] ALU_OUT;
    reg [ WIDTH-1 : 0] A, B;  
  end
  `endif
  
  ALU UUT(CLK, EN, OE, OPCODE, A, B, ALU_OUT, CF, OF, SF, ZF);
  
  initial begin
    CLK=1'b0;
    forever #20 CLK=~CLK;
  end
  
  initial $monitor("OPCODE = %b  A =%4d  B =%4d  EN =%b  OE =%b \n\t\tALU_OUT =%4d  CF =%b  OF =%b  SF =%b  ZF =%b", OPCODE, A, B, EN, OE, ALU_OUT, CF, OF, SF, ZF);
  
  initial begin
    $vcdpluson;
  
  $display("\n\t\t\t Testing ADD");
  $monitoroff; OE=1; EN=1; OPCODE = 4'b0010; #10 $monitoron;
  #20 $display("ADD"); A=8'd6; B=8'd5;
  #40 $display("ADD, Zero flag"); A=8'd0; B=8'd0;
  #40 $display("ADD, Overflow and Carry flags"); A=8'd150; B=8'd106;
  #40 $display("ADD, Signed flag"); A=8'd128; B=8'd1;
  
  #60 $display("\n\t\t\t Testing SUB");
  $monitoroff; OE=1; EN=1; OPCODE = 4'b0011; $monitoron;
  #40 $display("SUB"); A=8'd60; B=8'd43;
  #40 $display("SUB, Zero flag"); A=8'd20; B=8'd20;
  #40 $display("SUB, Overflow flag"); A=8'd128; B=-8'd1;
  #40 $display("SUB, Signed and Carry flags"); A=8'd50; B=8'd100;

  #60 $display("\n\t\t\t Testing AND");
  $monitoroff; OE=1; EN=1; OPCODE = 4'b0100; $monitoron;
  #60 $display("AND"); A=8'd10; B=8'd10;
  #40 $display("AND, Zero flag"); A=8'd20; B=8'd10;
  #40 $display("AND, Signed flags"); A=8'd128; B=8'd128;

  #60 $display("\n\t\t\t Testing OR");
  $monitoroff; OE=1; EN=1; OPCODE = 4'b0101; $monitoron;
  #60 $display("OR"); A=8'd20; B=8'd10;
  #40 $display("OR, Zero flag"); A=8'd0; B=8'd0;
  #40 $display("OR, Signed flags"); A=8'd10; B=-8'd5;

  #60 $display("\n\t\t\t Testing XOR");
  $monitoroff; OE=1; EN=1; OPCODE = 4'b0110; $monitoron;
  #60 $display("XOR"); A=8'd37; B=8'd90;
  #40 $display("XOR, Zero flag"); A=8'd255; B=8'd255;
  #40 $display("XOR, Signed flags"); A=8'd128; B=8'd0;

  #60 $display("\n\t\t\t Testing NOT");
  $monitoroff; OE=1; EN=1; OPCODE = 4'b0111; $monitoron;
  #60 $display("NOT"); A=8'd37;
  #40 $display("NOT, Zero flag"); A=8'd255;
  #40 $display("NOT, Signed flags"); A=8'd127;

  #40 $finish;
  end
endmodule
module ALU_TB();

  parameter WIDTH = 8;
  reg CF, OF, SF, ZF;
  reg [3:0] OPCODE;
  reg CLK, EN, OE;
  
  `ifdef SignedINTs begin
    reg signed [ WIDTH-1 : 0] ALU_OUT;
    reg signed [ WIDTH-1 : 0] A, B;
  end
  
  `else begin
    reg [ WIDTH-1 : 0] ALU_OUT;
    reg [ WIDTH-1 : 0] A, B;  
  end
  `endif
  
  ALU UUT(CLK, EN, OE, OPCODE, A, B, ALU_OUT, CF, OF, SF, ZF);
  
  initial begin
    CLK=1'b0;
    forever #20 CLK=~CLK;
  end
  
  initial $monitor("OPCODE = %b  A =%4d  B =%4d  EN =%b  OE =%b \n\t\tALU_OUT =%4d  CF =%b  OF =%b  SF =%b  ZF =%b", OPCODE, A, B, EN, OE, ALU_OUT, CF, OF, SF, ZF);
  
  initial begin
    $vcdpluson;
  
  $display("\n\t\t\t Testing ADD");
  $monitoroff; OE=1; EN=1; OPCODE = 4'b0010; #10 $monitoron;
  #20 $display("ADD"); A=8'd6; B=8'd5;
  #40 $display("ADD, Zero flag"); A=8'd0; B=8'd0;
  #40 $display("ADD, Overflow and Carry flags"); A=8'd150; B=8'd106;
  #40 $display("ADD, Signed flag"); A=8'd128; B=8'd1;
  
  #60 $display("\n\t\t\t Testing SUB");
  $monitoroff; OE=1; EN=1; OPCODE = 4'b0011; $monitoron;
  #40 $display("SUB"); A=8'd60; B=8'd43;
  #40 $display("SUB, Zero flag"); A=8'd20; B=8'd20;
  #40 $display("SUB, Overflow flag"); A=8'd128; B=-8'd1;
  #40 $display("SUB, Signed and Carry flags"); A=8'd50; B=8'd100;

  #60 $display("\n\t\t\t Testing AND");
  $monitoroff; OE=1; EN=1; OPCODE = 4'b0100; $monitoron;
  #60 $display("AND"); A=8'd10; B=8'd10;
  #40 $display("AND, Zero flag"); A=8'd20; B=8'd10;
  #40 $display("AND, Signed flags"); A=8'd128; B=8'd128;

  #60 $display("\n\t\t\t Testing OR");
  $monitoroff; OE=1; EN=1; OPCODE = 4'b0101; $monitoron;
  #60 $display("OR"); A=8'd20; B=8'd10;
  #40 $display("OR, Zero flag"); A=8'd0; B=8'd0;
  #40 $display("OR, Signed flags"); A=8'd10; B=-8'd5;

  #60 $display("\n\t\t\t Testing XOR");
  $monitoroff; OE=1; EN=1; OPCODE = 4'b0110; $monitoron;
  #60 $display("XOR"); A=8'd37; B=8'd90;
  #40 $display("XOR, Zero flag"); A=8'd255; B=8'd255;
  #40 $display("XOR, Signed flags"); A=8'd128; B=8'd0;

  #60 $display("\n\t\t\t Testing NOT");
  $monitoroff; OE=1; EN=1; OPCODE = 4'b0111; $monitoron;
  #60 $display("NOT"); A=8'd37;
  #40 $display("NOT, Zero flag"); A=8'd255;
  #40 $display("NOT, Signed flags"); A=8'd127;

  #40 $finish;
  end
endmodule