data/full_repos/permissive/206783267/SPI/DUT/spi_daisy.v
1: b"%Error: data/full_repos/permissive/206783267/SPI/DUT/spi_daisy.v:23: Cannot find file containing module: 'spi_master'\nspi_master\n^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/206783267/SPI/DUT,data/full_repos/permissive/206783267/spi_master\n             data/full_repos/permissive/206783267/SPI/DUT,data/full_repos/permissive/206783267/spi_master.v\n             data/full_repos/permissive/206783267/SPI/DUT,data/full_repos/permissive/206783267/spi_master.sv\n             spi_master\n             spi_master.v\n             spi_master.sv\n             obj_dir/spi_master\n             obj_dir/spi_master.v\n             obj_dir/spi_master.sv\n%Error: data/full_repos/permissive/206783267/SPI/DUT/spi_daisy.v:46: Cannot find file containing module: 'spi_slave'\nspi_slave\n^~~~~~~~~\n%Error: data/full_repos/permissive/206783267/SPI/DUT/spi_daisy.v:68: Cannot find file containing module: 'spi_slave'\nspi_slave\n^~~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module spi_daisy
#(
	parameter	CLK_FREQ = 50_000_000,
				SPI_FREQ = 5_000_000,
				DATA_WIDTH = 8,
				CPOL = 0,
				CPHA = 0
)
(
	input	clk, arstn,
	input	spi_m_start,
	input	[DATA_WIDTH-1:0]	data_m_send, data_s1_send, data_s2_send,
	output	spi_m_done, spi_s1_done, spi_s2_done,
	output	[DATA_WIDTH-1:0]	data_m_recv, data_s1_recv, data_s2_recv
);


wire	sclk, csn, mosi, miso, s1_miso_s2_mosi;


spi_master
#(
	.CLK_FREQ(CLK_FREQ),
	.SPI_FREQ(SPI_FREQ),
	.DATA_WIDTH(DATA_WIDTH),
	.CPOL(CPOL),
	.CPHA(CPHA)
)
spi_master_inst
(
	.clk(clk),
	.arstn(arstn),
	.data_send(data_m_send),
	.spi_start(spi_m_start),
	.sclk(sclk),
	.csn(csn),
	.miso(miso),
	.mosi(mosi),
	.spi_done(spi_m_done),
	.data_recv(data_m_recv)
);


spi_slave
#(
	.CLK_FREQ(CLK_FREQ),
	.SPI_FREQ(SPI_FREQ),
	.DATA_WIDTH(DATA_WIDTH),
	.CPOL(CPOL),
	.CPHA(CPHA)
)
spi_slave_1_inst
(
	.clk(clk),
	.arstn(arstn),
	.data_send(data_s1_send),
	.sclk(sclk),
	.csn(csn),
	.miso(s1_miso_s2_mosi),
	.mosi(mosi),
	.spi_done(spi_s1_done),
	.data_recv(data_s1_recv)
);


spi_slave
#(
	.CLK_FREQ(CLK_FREQ),
	.SPI_FREQ(SPI_FREQ),
	.DATA_WIDTH(DATA_WIDTH),
	.CPOL(CPOL),
	.CPHA(CPHA)
)
spi_slave_2_inst
(
	.clk(clk),
	.arstn(arstn),
	.data_send(data_s2_send),
	.sclk(sclk),
	.csn(csn),
	.miso(miso),
	.mosi(s1_miso_s2_mosi),
	.spi_done(spi_s2_done),
	.data_recv(data_s2_recv)
);

endmodule
module spi_daisy
#(
	parameter	CLK_FREQ = 50_000_000,
				SPI_FREQ = 5_000_000,
				DATA_WIDTH = 8,
				CPOL = 0,
				CPHA = 0
)
(
	input	clk, arstn,
	input	spi_m_start,
	input	[DATA_WIDTH-1:0]	data_m_send, data_s1_send, data_s2_send,
	output	spi_m_done, spi_s1_done, spi_s2_done,
	output	[DATA_WIDTH-1:0]	data_m_recv, data_s1_recv, data_s2_recv
);



wire	sclk, csn, mosi, miso, s1_miso_s2_mosi;


spi_master
#(
	.CLK_FREQ(CLK_FREQ),
	.SPI_FREQ(SPI_FREQ),
	.DATA_WIDTH(DATA_WIDTH),
	.CPOL(CPOL),
	.CPHA(CPHA)
)
spi_master_inst
(
	.clk(clk),
	.arstn(arstn),
	.data_send(data_m_send),
	.spi_start(spi_m_start),
	.sclk(sclk),
	.csn(csn),
	.miso(miso),
	.mosi(mosi),
	.spi_done(spi_m_done),
	.data_recv(data_m_recv)
);


spi_slave
#(
	.CLK_FREQ(CLK_FREQ),
	.SPI_FREQ(SPI_FREQ),
	.DATA_WIDTH(DATA_WIDTH),
	.CPOL(CPOL),
	.CPHA(CPHA)
)
spi_slave_1_inst
(
	.clk(clk),
	.arstn(arstn),
	.data_send(data_s1_send),
	.sclk(sclk),
	.csn(csn),
	.miso(s1_miso_s2_mosi),
	.mosi(mosi),
	.spi_done(spi_s1_done),
	.data_recv(data_s1_recv)
);


spi_slave
#(
	.CLK_FREQ(CLK_FREQ),
	.SPI_FREQ(SPI_FREQ),
	.DATA_WIDTH(DATA_WIDTH),
	.CPOL(CPOL),
	.CPHA(CPHA)
)
spi_slave_2_inst
(
	.clk(clk),
	.arstn(arstn),
	.data_send(data_s2_send),
	.sclk(sclk),
	.csn(csn),
	.miso(miso),
	.mosi(s1_miso_s2_mosi),
	.spi_done(spi_s2_done),
	.data_recv(data_s2_recv)
);

endmodule