data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v
 line:8 column:27: Illegal character "'"
1: b'%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:6: Unsupported: Ignoring delay on this delayed statement.\n    #1 clk = ~clk;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:19: Unsupported or unknown PLI call: $dumpfile\n    $dumpfile("gost89_mac_tb.vcd");\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:20: Unsupported or unknown PLI call: $dumpvars\n    $dumpvars(0, gost89_mac_tb);\n    ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:30: Unsupported: Ignoring delay on this delayed statement.\n    #1\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:32: Unsupported: Ignoring delay on this delayed statement.\n    #2\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:34: Unsupported: Ignoring delay on this delayed statement.\n    #2\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:37: Unsupported: Ignoring delay on this delayed statement.\n    #2;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:40: Unsupported: Ignoring delay on this delayed statement.\n    #34;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:43: Unsupported: Ignoring delay on this delayed statement.\n    #2;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:46: Unsupported: Ignoring delay on this delayed statement.\n    #34;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:49: Unsupported: Ignoring delay on this delayed statement.\n    #2;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:52: Unsupported: Ignoring delay on this delayed statement.\n    #34;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:62: Unsupported: Ignoring delay on this delayed statement.\n    #2\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:64: Unsupported: Ignoring delay on this delayed statement.\n    #2\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:67: Unsupported: Ignoring delay on this delayed statement.\n    #2;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:69: Unsupported: Ignoring delay on this delayed statement.\n    #10\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:71: Unsupported: Ignoring delay on this delayed statement.\n    #2\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:74: Unsupported: Ignoring delay on this delayed statement.\n    #4\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:77: Unsupported: Ignoring delay on this delayed statement.\n    #2;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:80: Unsupported: Ignoring delay on this delayed statement.\n    #34;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:83: Unsupported: Ignoring delay on this delayed statement.\n    #2;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:86: Unsupported: Ignoring delay on this delayed statement.\n    #34;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:89: Unsupported: Ignoring delay on this delayed statement.\n    #2;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:92: Unsupported: Ignoring delay on this delayed statement.\n    #34;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:101: Unsupported: Ignoring delay on this delayed statement.\n    #2\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:105: Unsupported: Ignoring delay on this delayed statement.\n    #2;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:109: Unsupported: Ignoring delay on this delayed statement.\n    #34;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:112: Unsupported: Ignoring delay on this delayed statement.\n    #2;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:115: Unsupported: Ignoring delay on this delayed statement.\n    #34;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:118: Unsupported: Ignoring delay on this delayed statement.\n    #2;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:121: Unsupported: Ignoring delay on this delayed statement.\n    #34;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/17590431/testbench/gost89_mac_tb.v:126: Unsupported: Ignoring delay on this delayed statement.\n    #10;\n    ^\n%Error: Exiting due to 2 error(s), 30 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module gost89_mac_tb;
  reg clk;
  always
    #1 clk = ~clk;

  reg  [511:0] sbox = 512'h 4a92d80e6b1c7f53eb4c6dfa23810759581da342efc7609b7da1089fe46cb2536c715fd84a9e03b24ba0721d36859cfedb413f590ae7682c1fd057a4923e6b8c;
  reg  [255:0] key  = 256'h 0475f6e05038fbfad2c7c390edb3ca3d1547124291ae1e8a2f79cd9ed2bcefbd;
  reg          reset, load_data;
  reg  [63:0]  in;
  wire [31:0]  out;
  wire         busy;
  wire [31:0]  result = out[31:0];

  gost89_mac mac1(clk, reset, load_data, sbox, key, in, out, busy);

  initial begin
    $dumpfile("gost89_mac_tb.vcd");
    $dumpvars(0, gost89_mac_tb);

    clk       = 0;
    reset     = 0;
    load_data = 0;


    #1
    reset = 1;
    #2
    reset = 0;
    #2
    in = 64'h 4b657e2ef0d2dfa2;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    in = 64'h af36b591bbd96c85;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    in = 64'h 3569faad243d6fa4;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    if (result !== 32'h b4a50c2c)
      begin $display("E"); $finish; end
    $display("OK");


    reset = 1;
    #2
    reset = 0;
    #2
    in = 64'h 4b657e2ef0d2dfa2;
    load_data = 1;
    #2;
    load_data = 0;
    #10
    reset = 1;
    #2
    reset = 0;

    #4
    in = 64'h 845fbd32d185bbf2;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    in = 64'h 387172424b8518a3;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    in = 64'h ba95eadaa69ed200;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    if (result !== 32'h 7acc77a2)
      begin $display("E"); $finish; end
    $display("OK");


    #2
    in = 64'h ba3d8a2c8fe0307a;
    load_data = 1;
    reset = 1;
    #2;
    load_data = 0;
    reset = 0;

    #34;
    in = 64'h c1fe2bf562c45b53;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    in = 64'h c066169b334014e0;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    if (result !== 32'h c9541f28)
      begin $display("E"); $finish; end
    $display("OK");

    #10;
    $display("All passed");
    $finish;
  end
endmodule
module gost89_mac_tb;

  reg clk;
  always
    #1 clk = ~clk;

  reg  [511:0] sbox = 512'h 4a92d80e6b1c7f53eb4c6dfa23810759581da342efc7609b7da1089fe46cb2536c715fd84a9e03b24ba0721d36859cfedb413f590ae7682c1fd057a4923e6b8c;
  reg  [255:0] key  = 256'h 0475f6e05038fbfad2c7c390edb3ca3d1547124291ae1e8a2f79cd9ed2bcefbd;
  reg          reset, load_data;
  reg  [63:0]  in;
  wire [31:0]  out;
  wire         busy;
  wire [31:0]  result = out[31:0];

  gost89_mac mac1(clk, reset, load_data, sbox, key, in, out, busy);

  initial begin
    $dumpfile("gost89_mac_tb.vcd");
    $dumpvars(0, gost89_mac_tb);

    clk       = 0;
    reset     = 0;
    load_data = 0;


    #1
    reset = 1;
    #2
    reset = 0;
    #2
    in = 64'h 4b657e2ef0d2dfa2;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    in = 64'h af36b591bbd96c85;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    in = 64'h 3569faad243d6fa4;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    if (result !== 32'h b4a50c2c)
      begin $display("E"); $finish; end
    $display("OK");


    reset = 1;
    #2
    reset = 0;
    #2
    in = 64'h 4b657e2ef0d2dfa2;
    load_data = 1;
    #2;
    load_data = 0;
    #10
    reset = 1;
    #2
    reset = 0;

    #4
    in = 64'h 845fbd32d185bbf2;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    in = 64'h 387172424b8518a3;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    in = 64'h ba95eadaa69ed200;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    if (result !== 32'h 7acc77a2)
      begin $display("E"); $finish; end
    $display("OK");


    #2
    in = 64'h ba3d8a2c8fe0307a;
    load_data = 1;
    reset = 1;
    #2;
    load_data = 0;
    reset = 0;

    #34;
    in = 64'h c1fe2bf562c45b53;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    in = 64'h c066169b334014e0;
    load_data = 1;
    #2;
    load_data = 0;

    #34;
    if (result !== 32'h c9541f28)
      begin $display("E"); $finish; end
    $display("OK");

    #10;
    $display("All passed");
    $finish;
  end
endmodule