data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v
1: b'%Warning-WIDTH: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:109: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS\'s CONST \'8\'hf\' generates 8 bits.\n                                                                                            : ... In instance digitalClock.seg\n        an = 8\'b1111;\n           ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:110: Bit extraction of var[7:0] requires 3 bit index, not 2 bits.\n                                                                                            : ... In instance digitalClock.seg\n        an[clkcount] = aen[clkcount];\n                          ^\n%Warning-WIDTHCONCAT: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:30: Unsized numbers/parameters not allowed in concatenations.\n                                                                                                 : ... In instance digitalClock\n    wire [3:0] H1_load={\'b0,SW[13:11]};\n                        ^~~\n%Warning-WIDTHCONCAT: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:30: Unsized numbers/parameters not allowed in replications.\n                                                                                                 : ... In instance digitalClock\n    wire [3:0] H1_load={\'b0,SW[13:11]};\n                           ^\n%Warning-WIDTHCONCAT: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:32: Unsized numbers/parameters not allowed in concatenations.\n                                                                                                 : ... In instance digitalClock\n    wire [3:0] M1_load={\'b0,SW[6:4]};\n                        ^~~\n%Warning-WIDTHCONCAT: data/full_repos/permissive/211316121/lab6_2/sources_1/new/digitalClock.v:32: Unsized numbers/parameters not allowed in replications.\n                                                                                                 : ... In instance digitalClock\n    wire [3:0] M1_load={\'b0,SW[6:4]};\n                           ^\n%Error: Exiting due to 6 warning(s)\n'
module BCD_7Seg(
    input [15:0] bcd,
    input [1:0] clkcount,
    output [6:0] a2g,
    output reg [3:0] an
    );
    
    reg [3:0] digit;
    parameter aen = 8'b0000;
    
    always @ (*)
    case(clkcount)
        2'b00:  digit = bcd[3:0];
        2'b01:  digit = bcd[7:4];
        2'b10:  digit = bcd[11:8];
        2'b11:  digit = bcd[15:12];
        default: digit = bcd[3:0];
    endcase
    
    always @ (*)
    begin
        an = 8'b1111;
        an[clkcount] = aen[clkcount];
    end
    
    seven_segment seg0(digit, a2g);
endmodule
module BCD_7Seg(
    input [15:0] bcd,
    input [1:0] clkcount,
    output [6:0] a2g,
    output reg [3:0] an
    );

    
    reg [3:0] digit;
    parameter aen = 8'b0000;
    
    always @ (*)
    case(clkcount)
        2'b00:  digit = bcd[3:0];
        2'b01:  digit = bcd[7:4];
        2'b10:  digit = bcd[11:8];
        2'b11:  digit = bcd[15:12];
        default: digit = bcd[3:0];
    endcase
    
    always @ (*)
    begin
        an = 8'b1111;
        an[clkcount] = aen[clkcount];
    end
    
    seven_segment seg0(digit, a2g);
endmodule