data/full_repos/permissive/214823094/submissions/lab_4/project_1/ALU.v
data/verilator_xmls/e26a1419-41f2-47e6-a198-f0be3fa3fb27.xml
module ALU(a,b,cin,m,s,ans,cout);
    input [3:0] a,b;
    input cin,m;
    input [1:0] s;
    output reg [3:0] ans;
    output reg cout;
    
    wire [3:0] ans1,ans2;
    wire cout1,cout2;
    
    carry_look_ahead_adder_4 plus1(a[3:0],b[3:0],cin,ans1[3:0],cout1);
    carry_look_ahead_adder_4 plus2(a[3:0],~b[3:0],~cin,ans2[3:0],cout2);
    
    always@(a,b,cin,m,s,ans1,ans2,cout1,cout2)
    begin
    if(m)
        begin
        case(s)
            2'b00:
                begin
                ans[3:0]=ans1[3:0];
                cout=cout1;
                end
            2'b01:
                begin
                ans[3:0]=ans2[3:0];
                cout=~cout2;
                end
            default:
                begin
                ans[3:0]=4'b0000;
                cout=0;
                end
        endcase
        end
    else
        begin
        case(s)
            2'b00:ans[3:0]=~a[3:0];
            2'b01:ans[3:0]=a[3:0]&b[3:0];
            2'b10:ans[3:0]=a[3:0]|b[3:0];
            2'b11:ans[3:0]=a[3:0]^b[3:0];
        endcase
        cout=0;
        end
    end
    
endmodule
module ALU(a,b,cin,m,s,ans,cout);

    input [3:0] a,b;
    input cin,m;
    input [1:0] s;
    output reg [3:0] ans;
    output reg cout;
    
    wire [3:0] ans1,ans2;
    wire cout1,cout2;
    
    carry_look_ahead_adder_4 plus1(a[3:0],b[3:0],cin,ans1[3:0],cout1);
    carry_look_ahead_adder_4 plus2(a[3:0],~b[3:0],~cin,ans2[3:0],cout2);
    
    always@(a,b,cin,m,s,ans1,ans2,cout1,cout2)
    begin
    if(m)
        begin
        case(s)
            2'b00:
                begin
                ans[3:0]=ans1[3:0];
                cout=cout1;
                end
            2'b01:
                begin
                ans[3:0]=ans2[3:0];
                cout=~cout2;
                end
            default:
                begin
                ans[3:0]=4'b0000;
                cout=0;
                end
        endcase
        end
    else
        begin
        case(s)
            2'b00:ans[3:0]=~a[3:0];
            2'b01:ans[3:0]=a[3:0]&b[3:0];
            2'b10:ans[3:0]=a[3:0]|b[3:0];
            2'b11:ans[3:0]=a[3:0]^b[3:0];
        endcase
        cout=0;
        end
    end
    
endmodule