data/full_repos/permissive/166023910/multipliers_8/source_v/mul8_471.v
data/verilator_xmls/c74c839e-1fd7-447b-ac25-6d858c7d000b.xml
module PDKGENNAND3X1(input A, input B, input C, output Y );
     assign Y = ~((A & B) & C);
endmodule
module PDKGENNAND3X1(input A, input B, input C, output Y );

     assign Y = ~((A & B) & C);
endmodule