data/full_repos/permissive/146618947/compuertas/libreria.v
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1: b'%Warning-STMTDLY: data/full_repos/permissive/146618947/compuertas/libreria.v:49: Unsupported: Ignoring delay on this delayed statement.\n        #(1.4:3:4.6) Q <= D;  \n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-MULTITOP: data/full_repos/permissive/146618947/compuertas/libreria.v:114: Multiple top level modules\n                                                                                 : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                                                                                 : ... Top module \'flip_flop_delay\'\nmodule flip_flop_delay (\n       ^~~~~~~~~~~~~~~\n                                                                                 : ... Top module \'mux_21_4_delay\'\nmodule mux_21_4_delay (\n       ^~~~~~~~~~~~~~\n%Error: Exiting due to 2 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module flip_flop_delay (
                        output reg Q,
                        input D,
                        input clk
                        );

   parameter PwrC = 0.00003;
   parameter setup = 1.5;
   parameter hold  = 0.5;

   realtime             posedge_time, dchange_time;

   initial
     begin
        Q <= 1'b0;
     end

   always @ (posedge clk)
     begin
        posedge_time = $realtime;
        #(1.4:3:4.6) Q <= D;
        if (posedge_time - dchange_time < setup )
          begin
             $display("Error de setup a los %t", posedge_time);
          end
     end

   always @ (D)
     begin
        dchange_time = $realtime;
        if (dchange_time - posedge_time < hold)
          begin
             $display("Error de hold a los %t", dchange_time);
          end
     end

endmodule
module flip_flop_delay (
                        output reg Q,
                        input D,
                        input clk
                        );


   parameter PwrC = 0.00003;
   parameter setup = 1.5;
   parameter hold  = 0.5;

   realtime             posedge_time, dchange_time;

   initial
     begin
        Q <= 1'b0;
     end

   always @ (posedge clk)
     begin
        posedge_time = $realtime;
        #(1.4:3:4.6) Q <= D;
        if (posedge_time - dchange_time < setup )
          begin
             $display("Error de setup a los %t", posedge_time);
          end
     end

   always @ (D)
     begin
        dchange_time = $realtime;
        if (dchange_time - posedge_time < hold)
          begin
             $display("Error de hold a los %t", dchange_time);
          end
     end

endmodule