data/full_repos/permissive/119209630/src/cpu_example_rom.v
None: at end of input
1: b'%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:20: Cannot find include file: cpu_example_instructions.h\n`include "cpu_example_instructions.h" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/119209630/src,data/full_repos/permissive/119209630/cpu_example_instructions.h\n             data/full_repos/permissive/119209630/src,data/full_repos/permissive/119209630/cpu_example_instructions.h.v\n             data/full_repos/permissive/119209630/src,data/full_repos/permissive/119209630/cpu_example_instructions.h.sv\n             cpu_example_instructions.h\n             cpu_example_instructions.h.v\n             cpu_example_instructions.h.sv\n             obj_dir/cpu_example_instructions.h\n             obj_dir/cpu_example_instructions.h.v\n             obj_dir/cpu_example_instructions.h.sv\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:32: Define or directive not defined: \'`SET\'\n assign rom_data[0] = {`SET, 4\'d2, 8\'d1};               \n                       ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:32: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[0] = {`SET, 4\'d2, 8\'d1};               \n                           ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:34: Define or directive not defined: \'`SET\'\n assign rom_data[1] = {`SET, 4\'d1, 8\'d128};             \n                       ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:34: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[1] = {`SET, 4\'d1, 8\'d128};             \n                           ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:35: Define or directive not defined: \'`STORE\'\n assign rom_data[2] = {`STORE, 4\'d2, 4\'d1, 4\'d0};       \n                       ^~~~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:35: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[2] = {`STORE, 4\'d2, 4\'d1, 4\'d0};       \n                             ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:36: Define or directive not defined: \'`SET\'\n assign rom_data[3] = {`SET, 4\'d1, 8\'d1};               \n                       ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:36: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[3] = {`SET, 4\'d1, 8\'d1};               \n                           ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:37: Define or directive not defined: \'`ADD\'\n assign rom_data[4] = {`ADD, 4\'d2, 4\'d2, 4\'d1};         \n                       ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:37: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[4] = {`ADD, 4\'d2, 4\'d2, 4\'d1};         \n                           ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:38: Define or directive not defined: \'`SET\'\n assign rom_data[5] = {`SET, 4\'d15, 8\'d1};              \n                       ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:38: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[5] = {`SET, 4\'d15, 8\'d1};              \n                           ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:39: Define or directive not defined: \'`SET\'\n assign rom_data[6] = {`SET, 4\'d0, 8\'d7};               \n                       ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:39: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[6] = {`SET, 4\'d0, 8\'d7};               \n                           ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:41: Define or directive not defined: \'`SET\'\n assign rom_data[7] = {`SET, 4\'d11, 8\'d0};              \n                       ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:41: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[7] = {`SET, 4\'d11, 8\'d0};              \n                           ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:42: Define or directive not defined: \'`SET\'\n assign rom_data[8] = {`SET, 4\'d12, 8\'d0};              \n                       ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:42: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[8] = {`SET, 4\'d12, 8\'d0};              \n                           ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:43: Define or directive not defined: \'`SET\'\n assign rom_data[9] = {`SET, 4\'d13, 8\'d0};              \n                       ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:43: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[9] = {`SET, 4\'d13, 8\'d0};              \n                           ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:44: Define or directive not defined: \'`SET\'\n assign rom_data[10] = {`SET, 4\'d1, 8\'d1};              \n                        ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:44: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[10] = {`SET, 4\'d1, 8\'d1};              \n                            ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:46: Define or directive not defined: \'`ADD\'\n assign rom_data[11] = {`ADD, 4\'d11, 4\'d11, 4\'d1};      \n                        ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:46: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[11] = {`ADD, 4\'d11, 4\'d11, 4\'d1};      \n                            ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:47: Define or directive not defined: \'`BEQ\'\n assign rom_data[12] = {`BEQ, 4\'d11, 8\'d0};             \n                        ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:47: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[12] = {`BEQ, 4\'d11, 8\'d0};             \n                            ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:48: Define or directive not defined: \'`SET\'\n assign rom_data[13] = {`SET, 4\'d0, 8\'d11};             \n                        ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:48: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[13] = {`SET, 4\'d0, 8\'d11};             \n                            ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:49: Define or directive not defined: \'`ADD\'\n assign rom_data[14] = {`ADD, 4\'d12, 4\'d12, 4\'d1};      \n                        ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:49: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[14] = {`ADD, 4\'d12, 4\'d12, 4\'d1};      \n                            ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:50: Define or directive not defined: \'`BEQ\'\n assign rom_data[15] = {`BEQ, 4\'d12, 8\'d0};             \n                        ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:50: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[15] = {`BEQ, 4\'d12, 8\'d0};             \n                            ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:51: Define or directive not defined: \'`SET\'\n assign rom_data[16] = {`SET, 4\'d0, 8\'d11};             \n                        ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:51: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[16] = {`SET, 4\'d0, 8\'d11};             \n                            ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:52: Define or directive not defined: \'`ADD\'\n assign rom_data[17] = {`ADD, 4\'d13, 4\'d13, 4\'d1};      \n                        ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:52: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[17] = {`ADD, 4\'d13, 4\'d13, 4\'d1};      \n                            ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:53: Define or directive not defined: \'`BEQ\'\n assign rom_data[18] = {`BEQ, 4\'d13, 8\'d0};             \n                        ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:53: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[18] = {`BEQ, 4\'d13, 8\'d0};             \n                            ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:54: Define or directive not defined: \'`SET\'\n assign rom_data[19] = {`SET, 4\'d0, 8\'d11};             \n                        ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:54: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[19] = {`SET, 4\'d0, 8\'d11};             \n                            ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:55: Define or directive not defined: \'`SET\'\n assign rom_data[20] = {`SET, 4\'d1, 8\'d0};              \n                        ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:55: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[20] = {`SET, 4\'d1, 8\'d0};              \n                            ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:56: Define or directive not defined: \'`ADD\'\n assign rom_data[21] = {`ADD, 4\'d0, 4\'d15, 4\'d1};       \n                        ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:56: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n assign rom_data[21] = {`ADD, 4\'d0, 4\'d15, 4\'d1};       \n                            ^\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:60: Define or directive not defined: \'`NOP\'\n   data = {`NOP, 12\'b0};\n           ^~~~\n%Error: data/full_repos/permissive/119209630/src/cpu_example_rom.v:60: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n   data = {`NOP, 12\'b0};\n               ^\n%Error: Exiting due to 47 error(s)\n'
module cpu_example_rom(
		input clk,
		input [7:0] addr,
		output [15:0] data
	);

	reg [15:0] data;

	wire [15:0] rom_data [21:0];

	assign rom_data[0] = {`SET, 4'd2, 8'd1};

	assign rom_data[1] = {`SET, 4'd1, 8'd128};
	assign rom_data[2] = {`STORE, 4'd2, 4'd1, 4'd0};
	assign rom_data[3] = {`SET, 4'd1, 8'd1};
	assign rom_data[4] = {`ADD, 4'd2, 4'd2, 4'd1};
	assign rom_data[5] = {`SET, 4'd15, 8'd1};
	assign rom_data[6] = {`SET, 4'd0, 8'd7};

	assign rom_data[7] = {`SET, 4'd11, 8'd0};
	assign rom_data[8] = {`SET, 4'd12, 8'd0};
	assign rom_data[9] = {`SET, 4'd13, 8'd0};
	assign rom_data[10] = {`SET, 4'd1, 8'd1};

	assign rom_data[11] = {`ADD, 4'd11, 4'd11, 4'd1};
	assign rom_data[12] = {`BEQ, 4'd11, 8'd0};
	assign rom_data[13] = {`SET, 4'd0, 8'd11};
	assign rom_data[14] = {`ADD, 4'd12, 4'd12, 4'd1};
	assign rom_data[15] = {`BEQ, 4'd12, 8'd0};
	assign rom_data[16] = {`SET, 4'd0, 8'd11};
	assign rom_data[17] = {`ADD, 4'd13, 4'd13, 4'd1};
	assign rom_data[18] = {`BEQ, 4'd13, 8'd0};
	assign rom_data[19] = {`SET, 4'd0, 8'd11};
	assign rom_data[20] = {`SET, 4'd1, 8'd0};
	assign rom_data[21] = {`ADD, 4'd0, 4'd15, 4'd1};

	always @(*) begin
		if (addr > 8'd21)
			data = {`NOP, 12'b0};
		else
			data = rom_data[addr];
	end

endmodule
module cpu_example_rom(
		input clk,
		input [7:0] addr,
		output [15:0] data
	);


	reg [15:0] data;

	wire [15:0] rom_data [21:0];

	assign rom_data[0] = {`SET, 4'd2, 8'd1};

	assign rom_data[1] = {`SET, 4'd1, 8'd128};
	assign rom_data[2] = {`STORE, 4'd2, 4'd1, 4'd0};
	assign rom_data[3] = {`SET, 4'd1, 8'd1};
	assign rom_data[4] = {`ADD, 4'd2, 4'd2, 4'd1};
	assign rom_data[5] = {`SET, 4'd15, 8'd1};
	assign rom_data[6] = {`SET, 4'd0, 8'd7};

	assign rom_data[7] = {`SET, 4'd11, 8'd0};
	assign rom_data[8] = {`SET, 4'd12, 8'd0};
	assign rom_data[9] = {`SET, 4'd13, 8'd0};
	assign rom_data[10] = {`SET, 4'd1, 8'd1};

	assign rom_data[11] = {`ADD, 4'd11, 4'd11, 4'd1};
	assign rom_data[12] = {`BEQ, 4'd11, 8'd0};
	assign rom_data[13] = {`SET, 4'd0, 8'd11};
	assign rom_data[14] = {`ADD, 4'd12, 4'd12, 4'd1};
	assign rom_data[15] = {`BEQ, 4'd12, 8'd0};
	assign rom_data[16] = {`SET, 4'd0, 8'd11};
	assign rom_data[17] = {`ADD, 4'd13, 4'd13, 4'd1};
	assign rom_data[18] = {`BEQ, 4'd13, 8'd0};
	assign rom_data[19] = {`SET, 4'd0, 8'd11};
	assign rom_data[20] = {`SET, 4'd1, 8'd0};
	assign rom_data[21] = {`ADD, 4'd0, 4'd15, 4'd1};

	always @(*) begin
		if (addr > 8'd21)
			data = {`NOP, 12'b0};
		else
			data = rom_data[addr];
	end

endmodule