data/full_repos/permissive/123339956/Lab1_Dataflow_Modelling/full_adder.v
 line:20: before: "$"
1: b'%Warning-STMTDLY: data/full_repos/permissive/123339956/Lab1_Dataflow_Modelling/full_adder.v:12: Unsupported: Ignoring delay on this delayed statement.\n #00 a=1\'b0 ; b=1\'b0 ; cin=1\'b0 ;\n ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/123339956/Lab1_Dataflow_Modelling/full_adder.v:13: Unsupported: Ignoring delay on this delayed statement.\n #20 a=1\'b0 ; b=1\'b1 ; cin=1\'b0 ;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/123339956/Lab1_Dataflow_Modelling/full_adder.v:14: Unsupported: Ignoring delay on this delayed statement.\n #20 a=1\'b1 ; b=1\'b0 ; cin=1\'b0 ;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/123339956/Lab1_Dataflow_Modelling/full_adder.v:15: Unsupported: Ignoring delay on this delayed statement.\n #20 a=1\'b1 ; b=1\'b1 ; cin=1\'b0 ;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/123339956/Lab1_Dataflow_Modelling/full_adder.v:16: Unsupported: Ignoring delay on this delayed statement.\n #20 a=1\'b0 ; b=1\'b0 ; cin=1\'b1 ;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/123339956/Lab1_Dataflow_Modelling/full_adder.v:17: Unsupported: Ignoring delay on this delayed statement.\n #20 a=1\'b0 ; b=1\'b1 ; cin=1\'b1 ;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/123339956/Lab1_Dataflow_Modelling/full_adder.v:18: Unsupported: Ignoring delay on this delayed statement.\n #20 a=1\'b1 ; b=1\'b0 ; cin=1\'b1 ;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/123339956/Lab1_Dataflow_Modelling/full_adder.v:19: Unsupported: Ignoring delay on this delayed statement.\n #20 a=1\'b1 ; b=1\'b1 ; cin=1\'b1 ;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/123339956/Lab1_Dataflow_Modelling/full_adder.v:20: Unsupported: Ignoring delay on this delayed statement.\n #20 $stop;\n ^\n%Error: data/full_repos/permissive/123339956/Lab1_Dataflow_Modelling/full_adder.v:26: Unsupported or unknown PLI call: $monitor\n $monitor("time=%3d, a=%b, b=%b, cin=%b, cout=%b, sum=%b ",$time,a,b,cin,cout,sum);\n ^~~~~~~~\n%Error: data/full_repos/permissive/123339956/Lab1_Dataflow_Modelling/full_adder.v:32: Unsupported or unknown PLI call: $dumpfile\n $dumpfile("full_adder.vcd");\n ^~~~~~~~~\n%Error: data/full_repos/permissive/123339956/Lab1_Dataflow_Modelling/full_adder.v:33: Unsupported or unknown PLI call: $dumpvars\n $dumpvars;\n ^~~~~~~~~\n%Error: Exiting due to 3 error(s), 9 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module  full_adder(sum,cout,a,b,cin);

	output sum,cout;
	input a,b,cin;

	assign sum = a^b^cin;
	assign cout = (a&b)|(a&cin)|(b&cin);



endmodule
module  full_adder(sum,cout,a,b,cin);


	output sum,cout;
	input a,b,cin;

	assign sum = a^b^cin;
	assign cout = (a&b)|(a&cin)|(b&cin);



endmodule