data/full_repos/permissive/117026779/src/PWMCaptureTop.v
1: b'%Error: data/full_repos/permissive/117026779/src/PWMCaptureTop.v:36: syntax error, unexpected \';\', expecting IDENTIFIER or do or final\nwire   int;\n          ^\n%Error: data/full_repos/permissive/117026779/src/PWMCaptureTop.v:41: syntax error, unexpected \';\', expecting "\'{"\nassign leds[15]  = int;\n                      ^\n%Error: data/full_repos/permissive/117026779/src/PWMCaptureTop.v:50: syntax error, unexpected int\n    .int(int),    \n     ^~~\n%Error: Exiting due to 3 error(s)\n'
module PWMCaptureTop(
	input wire clk,
	input wire rst,
	input wire ext_pwm,
	input wire switch,
	input wire select,
	input wire trigger,
	input wire int_clr,
	input wire oe,
	output wire [15:0] leds
);

wire 		pwm;
wire 		int;
wire [31:0] data;

assign pwm 			= (select) ? ext_pwm : switch;
assign leds[14:0] 	= (oe) ? data[31:17] : 0;
assign leds[15] 	= int;

PWMCapture U0 (
    .clk(clk),
    .rst(rst),
    .oe(oe),
    .trigger(trigger),
    .ext_pwm(pwm),
    .int_clr(int_clr),
    .int(int),
    .data(data)
);

endmodule
module PWMCaptureTop(
	input wire clk,
	input wire rst,
	input wire ext_pwm,
	input wire switch,
	input wire select,
	input wire trigger,
	input wire int_clr,
	input wire oe,
	output wire [15:0] leds
);


wire 		pwm;
wire 		int;
wire [31:0] data;

assign pwm 			= (select) ? ext_pwm : switch;
assign leds[14:0] 	= (oe) ? data[31:17] : 0;
assign leds[15] 	= int;

PWMCapture U0 (
    .clk(clk),
    .rst(rst),
    .oe(oe),
    .trigger(trigger),
    .ext_pwm(pwm),
    .int_clr(int_clr),
    .int(int),
    .data(data)
);

endmodule