data/full_repos/permissive/149553056/sim/fsm_sim.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:25: Unsupported: Ignoring delay on this delayed statement.\nalways #5 clk = ~clk;\n       ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/149553056/sim/fsm_sim.v:27: Unsupported: fork statements\ninitial fork\n        ^~~~\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:29: Unsupported: Ignoring delay on this delayed statement.\n#0 rst=0;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:30: Unsupported: Ignoring delay on this delayed statement.\n#0 coin_value=0;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:31: Unsupported: Ignoring delay on this delayed statement.\n#40 rst=1;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:32: Unsupported: Ignoring delay on this delayed statement.\n#60 op_start=1;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:33: Unsupported: Ignoring delay on this delayed statement.\n#70 op_start=0;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:34: Unsupported: Ignoring delay on this delayed statement.\n#100 coin_value=4;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:35: Unsupported: Ignoring delay on this delayed statement.\n#120 coin_value=5;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:36: Unsupported: Ignoring delay on this delayed statement.\n#140 coin_value=10;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:37: Unsupported: Ignoring delay on this delayed statement.\n#160 coin_value=20;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:39: Unsupported: Ignoring delay on this delayed statement.\n#210 buy_g1=1;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:40: Unsupported: Ignoring delay on this delayed statement.\n#240 buy_g1=0;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:41: Unsupported: Ignoring delay on this delayed statement.\n#290 buy_g2=1;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:42: Unsupported: Ignoring delay on this delayed statement.\n#320 buy_g2=0;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:43: Unsupported: Ignoring delay on this delayed statement.\n#370 buy_g1=1;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:44: Unsupported: Ignoring delay on this delayed statement.\n#400 buy_g1=0;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:46: Unsupported: Ignoring delay on this delayed statement.\n#730 cancel=1;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:47: Unsupported: Ignoring delay on this delayed statement.\n#760 cancel=0;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:48: Unsupported: Ignoring delay on this delayed statement.\n#790 rst=0;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:49: Unsupported: Ignoring delay on this delayed statement.\n#840 rst=1;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:50: Unsupported: Ignoring delay on this delayed statement.\n#870 op_start=1;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:51: Unsupported: Ignoring delay on this delayed statement.\n#890 op_start=0;\n^\n%Warning-STMTDLY: data/full_repos/permissive/149553056/sim/fsm_sim.v:52: Unsupported: Ignoring delay on this delayed statement.\n#920 rst=0;\n^\n%Error: Exiting due to 1 error(s), 23 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module fsm_sim();
reg rst=0;
reg clk=0;
reg op_start=0;
reg [7:0] coin_value=0;
reg cancel=0;
reg buy_g1=0;
reg buy_g2=0;

wire on;
wire occupy;
wire get_good;
wire ret_coin;
wire [7:0] ret_value;
wire good1;
wire good2;
wire g1_bought;
wire g2_bought;

wire [3:0] status;
wire [3:0] display_mode;

always #5 clk = ~clk;

initial fork

#0 rst=0;
#0 coin_value=0;
#40 rst=1;
#60 op_start=1;
#70 op_start=0;
#100 coin_value=4;
#120 coin_value=5;
#140 coin_value=10;
#160 coin_value=20;

#210 buy_g1=1;
#240 buy_g1=0;
#290 buy_g2=1;
#320 buy_g2=0;
#370 buy_g1=1;
#400 buy_g1=0;

#730 cancel=1;
#760 cancel=0;
#790 rst=0;
#840 rst=1;
#870 op_start=1;
#890 op_start=0;
#920 rst=0;


join

VMControl con(rst, clk, op_start, coin_value, cancel, buy_g1, buy_g2, on, occupy, get_good, ret_coin, ret_value, good1, good2, status, display_mode, g1_bought, g2_bought);
endmodule
module fsm_sim();

reg rst=0;
reg clk=0;
reg op_start=0;
reg [7:0] coin_value=0;
reg cancel=0;
reg buy_g1=0;
reg buy_g2=0;

wire on;
wire occupy;
wire get_good;
wire ret_coin;
wire [7:0] ret_value;
wire good1;
wire good2;
wire g1_bought;
wire g2_bought;

wire [3:0] status;
wire [3:0] display_mode;

always #5 clk = ~clk;

initial fork

#0 rst=0;
#0 coin_value=0;
#40 rst=1;
#60 op_start=1;
#70 op_start=0;
#100 coin_value=4;
#120 coin_value=5;
#140 coin_value=10;
#160 coin_value=20;

#210 buy_g1=1;
#240 buy_g1=0;
#290 buy_g2=1;
#320 buy_g2=0;
#370 buy_g1=1;
#400 buy_g1=0;

#730 cancel=1;
#760 cancel=0;
#790 rst=0;
#840 rst=1;
#870 op_start=1;
#890 op_start=0;
#920 rst=0;


join

VMControl con(rst, clk, op_start, coin_value, cancel, buy_g1, buy_g2, on, occupy, get_good, ret_coin, ret_value, good1, good2, status, display_mode, g1_bought, g2_bought);
endmodule