data/full_repos/permissive/212041933/rtl/uart.v
1: b"%Error: data/full_repos/permissive/212041933/rtl/uart.v:16: Cannot find file containing module: 'baudrate'\n    baudrate #(\n    ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/212041933/rtl,data/full_repos/permissive/212041933/baudrate\n             data/full_repos/permissive/212041933/rtl,data/full_repos/permissive/212041933/baudrate.v\n             data/full_repos/permissive/212041933/rtl,data/full_repos/permissive/212041933/baudrate.sv\n             baudrate\n             baudrate.v\n             baudrate.sv\n             obj_dir/baudrate\n             obj_dir/baudrate.v\n             obj_dir/baudrate.sv\n%Error: data/full_repos/permissive/212041933/rtl/uart.v:27: Cannot find file containing module: 'transmitter'\n    transmitter U_TX(\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/212041933/rtl/uart.v:39: Cannot find file containing module: 'receiver'\n    receiver #(\n    ^~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module uart (
    input           clk,
    input           rstb,
    input [7:0]     baudrate_cfg, 
    input           rx,
    output          tx,
    input           tx_valid,
    input [7:0]     tx_data,
    output          tx_busy,
    output          rx_valid,
    output [7:0]    rx_data
);

    localparam SAMPLE_RATE = 62;

    baudrate #(
        .CLK_FREQ(50000000),
        .SAMPLE_RATE(SAMPLE_RATE)
    )U_BAUDRATE(
        .clk(clk),
        .rstb(rstb),
        .baudrate_cfg(baudrate_cfg),
        .rx_clk_en(rx_clk_en),
        .tx_clk_en(tx_clk_en)
    );

    transmitter U_TX(
        .clk(clk),
        .clk_en(tx_clk_en),
        .rstb(rstb),
    
        .wr_en(tx_valid),
        .data(tx_data),
    
        .tx(tx),
        .tx_busy(tx_busy)
    );

    receiver #(
        .SAMPLE_RATE(SAMPLE_RATE)
    )U_RX(
        .clk(clk),
        .clk_en(rx_clk_en),
        .rstb(rstb),
    
        .rx(rx),
    
        .rx_valid(rx_valid),
        .data(rx_data)
    );

endmodule
module uart (
    input           clk,
    input           rstb,
    input [7:0]     baudrate_cfg, 
    input           rx,
    output          tx,
    input           tx_valid,
    input [7:0]     tx_data,
    output          tx_busy,
    output          rx_valid,
    output [7:0]    rx_data
);


    localparam SAMPLE_RATE = 62;

    baudrate #(
        .CLK_FREQ(50000000),
        .SAMPLE_RATE(SAMPLE_RATE)
    )U_BAUDRATE(
        .clk(clk),
        .rstb(rstb),
        .baudrate_cfg(baudrate_cfg),
        .rx_clk_en(rx_clk_en),
        .tx_clk_en(tx_clk_en)
    );

    transmitter U_TX(
        .clk(clk),
        .clk_en(tx_clk_en),
        .rstb(rstb),
    
        .wr_en(tx_valid),
        .data(tx_data),
    
        .tx(tx),
        .tx_busy(tx_busy)
    );

    receiver #(
        .SAMPLE_RATE(SAMPLE_RATE)
    )U_RX(
        .clk(clk),
        .clk_en(rx_clk_en),
        .rstb(rstb),
    
        .rx(rx),
    
        .rx_valid(rx_valid),
        .data(rx_data)
    );

endmodule