data/full_repos/permissive/153866423/_magiccubeImageProcess.srcs/magiccubeImageProcess.srcs_18_12_07/sources_1/imports/MyScripts/sram/image_out_sramdetect.v
1: b"%Error: data/full_repos/permissive/153866423/_magiccubeImageProcess.srcs/magiccubeImageProcess.srcs_18_12_07/sources_1/imports/MyScripts/sram/image_out_sramdetect.v:35: syntax error, unexpected continue, expecting '['\n    input continue,  \n          ^~~~~~~~\n%Error: data/full_repos/permissive/153866423/_magiccubeImageProcess.srcs/magiccubeImageProcess.srcs_18_12_07/sources_1/imports/MyScripts/sram/image_out_sramdetect.v:38: syntax error, unexpected output, expecting IDENTIFIER or '=' or do or final\n    output reg write_out_sram,\n    ^~~~~~\n%Error: data/full_repos/permissive/153866423/_magiccubeImageProcess.srcs/magiccubeImageProcess.srcs_18_12_07/sources_1/imports/MyScripts/sram/image_out_sramdetect.v:39: syntax error, unexpected output, expecting IDENTIFIER or '=' or do or final\n    output reg read_out_sram,\n    ^~~~~~\n%Error: data/full_repos/permissive/153866423/_magiccubeImageProcess.srcs/magiccubeImageProcess.srcs_18_12_07/sources_1/imports/MyScripts/sram/image_out_sramdetect.v:40: syntax error, unexpected output, expecting IDENTIFIER or '=' or do or final\n    output reg[18:0] addr_wr_out_sram,\n    ^~~~~~\n%Error: data/full_repos/permissive/153866423/_magiccubeImageProcess.srcs/magiccubeImageProcess.srcs_18_12_07/sources_1/imports/MyScripts/sram/image_out_sramdetect.v:41: syntax error, unexpected input, expecting IDENTIFIER or '=' or do or final\n    input[15:0] data_wr_out_out_sram,\n    ^~~~~\n%Error: data/full_repos/permissive/153866423/_magiccubeImageProcess.srcs/magiccubeImageProcess.srcs_18_12_07/sources_1/imports/MyScripts/sram/image_out_sramdetect.v:44: syntax error, unexpected output, expecting IDENTIFIER or '=' or do or final\n    output reg[8:0] position_coding,\n    ^~~~~~\n%Error: data/full_repos/permissive/153866423/_magiccubeImageProcess.srcs/magiccubeImageProcess.srcs_18_12_07/sources_1/imports/MyScripts/sram/image_out_sramdetect.v:46: syntax error, unexpected output, expecting IDENTIFIER or '=' or do or final\n    output reg find,\n    ^~~~~~\n%Error: data/full_repos/permissive/153866423/_magiccubeImageProcess.srcs/magiccubeImageProcess.srcs_18_12_07/sources_1/imports/MyScripts/sram/image_out_sramdetect.v:47: syntax error, unexpected output, expecting IDENTIFIER or '=' or do or final\n    output reg done\n    ^~~~~~\n%Error: data/full_repos/permissive/153866423/_magiccubeImageProcess.srcs/magiccubeImageProcess.srcs_18_12_07/sources_1/imports/MyScripts/sram/image_out_sramdetect.v:93: syntax error, unexpected always\nalways@(posedge wclk) begin\n^~~~~~\n%Error: Exiting due to 9 error(s)\n"
module image_out_sramdetect #(parameter H_cnt_max = 320,
                              parameter V_cnt_max = 240) (
    input wclk, 
    input rst,

    input enable,
    input continue,

    output reg selec_out_sram,
    output reg write_out_sram,
    output reg read_out_sram,
    output reg[18:0] addr_wr_out_sram,
    input[15:0] data_wr_out_out_sram,

    output reg[15:0] rgb565,
    output reg[8:0] position_coding,
    
    output reg find,
    output reg done
);

reg[6:0] r_7;
reg[7:0] g_8;
reg[6:0] b_7;
reg search_finish;
reg[2:0] count_sum_residue;
reg[15:0] data_wr_out_reg;

reg[9:0] V_cnt,H_cnt;

localparam pixel_dis = 50;
localparam[9:0] h_zuoshang=pixel_dis,
                h_zhongshang=2*pixel_dis, 
                h_youshang=3*pixel_dis,     
                h_zuozhong=pixel_dis,
                h_zhongzhong=2*pixel_dis,
                h_youzhong=3*pixel_dis,
                h_zuoxia=pixel_dis,
                h_zhongxia=2*pixel_dis, 
                h_youxia=3*pixel_dis;
localparam[9:0] v_zuoshang=pixel_dis,
                v_zhongshang=pixel_dis,
                v_youshang=pixel_dis,
                v_zuozhong=2*pixel_dis,
                v_zhongzhong=2*pixel_dis,
                v_youzhong=2*pixel_dis,
                v_zuoxia=3*pixel_dis,
                v_zhongxia=3*pixel_dis,
                v_youxia=3*pixel_dis;


localparam s_idle           = 4'b0000;
localparam s_init_enable    = 4'b0001;
localparam s_init_notfind   = 4'b0011;
localparam s_read           = 4'b0111;
localparam s_detect         = 4'b1111;
localparam s_find           = 4'b1110;
localparam s_done           = 4'b1100;
localparam s_ready          = 4'b1000;
localparam s_residue        = 4'b1001;
localparam s_dataready      = 4'b1011;
reg [3:0] status = s_idle;


always@(posedge wclk) begin
    if(rst) begin
        selec_out_sram <= 0;
        write_out_sram <= 0;
        read_out_sram  <= 0;
        addr_wr_out_sram <= 0;
        V_cnt <= 0;
        H_cnt <= 0;
        rgb565 <= 0;
        position_coding <= 0;
        count_sum_residue <= 0;
        r_7 <= 0;
        g_8 <= 0;
        b_7 <= 0;
        search_finish <= 0;
        find <= 0;
        done <= 0;

        status <= s_idle;
    end else begin
        case(status) 
            s_idle: begin
                done <= 0;            
                find <= 0;
                selec_out_sram <= 0;
                write_out_sram <= 0;
                read_out_sram  <= 0;
                addr_wr_out_sram <= 0;
                V_cnt <= 0;
                H_cnt <= 0;
                count_sum_residue <= 0;
                search_finish <= 0;

                if(enable) begin
                    status <= s_init_enable;
                end else begin
                    status <= s_idle;                    
                end
            end
            s_init_enable: begin
                find <= 0;
                selec_out_sram <= 0;
                write_out_sram <= 0;
                read_out_sram  <= 0;  

                if(enable) begin
                    addr_wr_out_sram <= 0;
                    V_cnt <= 0;
                    H_cnt <= 0;

                    status <= s_init_enable;
                end else if(addr_wr_out_sram == 0 || continue) begin
                    status <= s_init_notfind;
                end else begin
                    status <= s_init_enable;    
                end
            end
            s_init_notfind: begin
                selec_out_sram <= 1;
                write_out_sram <= 0;
                read_out_sram  <= 1;
                
                status <= s_read;
            end
            s_read: begin
                data_wr_out_reg <= data_wr_out_out_sram;
                selec_out_sram <= 0;
                write_out_sram <= 0;
                read_out_sram  <= 0;                  
                addr_wr_out_sram <= addr_wr_out_sram + 1;

                if(H_cnt == H_cnt_max - 1) begin
                    if(V_cnt == V_cnt_max - 1) begin
                        H_cnt <= 0;
                        V_cnt <= 0;
                        status <= done;
                    end else begin
                        H_cnt <= 0;
                        V_cnt <= V_cnt + 1;

                        if(count_sum_residue == 0) begin
                            status <= s_detect;    
                        end else begin
                            status <= s_residue; 
                        end
                    end
                end else begin
                    H_cnt <= H_cnt + 1;

                    if(count_sum_residue == 0) begin
                        status <= s_detect;    
                    end else begin
                        status <= s_residue;
                    end
                end
            end
            s_detect: begin
                if(H_cnt==h_zuoshang&&V_cnt==v_zuoshang) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;
                    position_coding <= 9'd1;
                    status <= s_residue;
                end else if(H_cnt==h_zhongshang&&V_cnt==v_zhongshang) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;
                    position_coding <= 9'd2;
                    status <= s_residue;
                end else if(H_cnt==h_youshang&&V_cnt==v_youshang) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;
                    position_coding <= 9'd3;
                    status <= s_residue;
                end else if(H_cnt==h_zuozhong&&V_cnt==v_zuozhong) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;            
                    position_coding <= 9'd4;
                    status <= s_residue;
                end else if(H_cnt==h_zhongzhong&&V_cnt==v_zhongzhong) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;          
                    position_coding <= 9'd5;
                    status <= s_residue;
                end else if(H_cnt==h_youzhong&&V_cnt==v_youzhong) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0; 
                    position_coding <= 9'd6;
                    status <= s_residue;
                end else if(H_cnt==h_zuoxia&&V_cnt==v_zuoxia) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;       
                    position_coding <= 9'd7;
                    status <= s_residue;                  
                end else if(H_cnt==h_zhongxia&&V_cnt==v_zhongxia) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;       
                    position_coding <= 9'd8;
                    status <= s_residue;            
                end else if(H_cnt==h_youxia&&V_cnt==v_youxia) begin
                    search_finish <= 1;
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;          
                    position_coding <= 9'd9;
                    status <= s_residue;
                end else begin
                    status <= s_init_notfind;
                end
            end
            s_residue: begin
                if(count_sum_residue == 4) begin
                    r_7 <= {2'b0,data_wr_out_reg[15:11]};
                    g_8 <= {2'b0,data_wr_out_reg[10:5]};
                    b_7 <= {2'b0,data_wr_out_reg[4:0]};
                    status <= s_init_notfind;
                end else if(count_sum_residue == 1) begin
                    r_7 <= r_7 + {2'b0,data_wr_out_reg[15:11]};
                    g_8 <= g_8 + {2'b0,data_wr_out_reg[10:5]};
                    b_7 <= b_7 + {2'b0,data_wr_out_reg[4:0]};
                    status <= s_dataready;
                end else begin
                    r_7 <= r_7 + {2'b0,data_wr_out_reg[15:11]};
                    g_8 <= g_8 + {2'b0,data_wr_out_reg[10:5]};
                    b_7 <= b_7 + {2'b0,data_wr_out_reg[4:0]};
                    status <= s_init_notfind;
                end
                count_sum_residue <= count_sum_residue - 1;
            end
            s_dataready: begin

                rgb565 <= {r_7[4:0],g_8[5:0],b_7[4:0]};
                status <= s_find;
            end
            s_find: begin
                find <= 1;
                if(search_finish) begin
                    done <= 1;
                    search_finish <= 0;

                    status <= s_ready;
                end else begin
                    status <= s_init_enable;
                end
            end
            s_done: begin
                done <= 1;

                status <= s_ready;
            end
            s_ready: begin
                done <= 0;
                
                status <= s_idle;
            end
            default: begin
                status <= s_idle;
            end
        endcase
    end
end

endmodule
module image_out_sramdetect #(parameter H_cnt_max = 320,
                              parameter V_cnt_max = 240) (
    input wclk, 
    input rst,

    input enable,
    input continue,

    output reg selec_out_sram,
    output reg write_out_sram,
    output reg read_out_sram,
    output reg[18:0] addr_wr_out_sram,
    input[15:0] data_wr_out_out_sram,

    output reg[15:0] rgb565,
    output reg[8:0] position_coding,
    
    output reg find,
    output reg done
);


reg[6:0] r_7;
reg[7:0] g_8;
reg[6:0] b_7;
reg search_finish;
reg[2:0] count_sum_residue;
reg[15:0] data_wr_out_reg;

reg[9:0] V_cnt,H_cnt;

localparam pixel_dis = 50;
localparam[9:0] h_zuoshang=pixel_dis,
                h_zhongshang=2*pixel_dis, 
                h_youshang=3*pixel_dis,     
                h_zuozhong=pixel_dis,
                h_zhongzhong=2*pixel_dis,
                h_youzhong=3*pixel_dis,
                h_zuoxia=pixel_dis,
                h_zhongxia=2*pixel_dis, 
                h_youxia=3*pixel_dis;
localparam[9:0] v_zuoshang=pixel_dis,
                v_zhongshang=pixel_dis,
                v_youshang=pixel_dis,
                v_zuozhong=2*pixel_dis,
                v_zhongzhong=2*pixel_dis,
                v_youzhong=2*pixel_dis,
                v_zuoxia=3*pixel_dis,
                v_zhongxia=3*pixel_dis,
                v_youxia=3*pixel_dis;


localparam s_idle           = 4'b0000;
localparam s_init_enable    = 4'b0001;
localparam s_init_notfind   = 4'b0011;
localparam s_read           = 4'b0111;
localparam s_detect         = 4'b1111;
localparam s_find           = 4'b1110;
localparam s_done           = 4'b1100;
localparam s_ready          = 4'b1000;
localparam s_residue        = 4'b1001;
localparam s_dataready      = 4'b1011;
reg [3:0] status = s_idle;


always@(posedge wclk) begin
    if(rst) begin
        selec_out_sram <= 0;
        write_out_sram <= 0;
        read_out_sram  <= 0;
        addr_wr_out_sram <= 0;
        V_cnt <= 0;
        H_cnt <= 0;
        rgb565 <= 0;
        position_coding <= 0;
        count_sum_residue <= 0;
        r_7 <= 0;
        g_8 <= 0;
        b_7 <= 0;
        search_finish <= 0;
        find <= 0;
        done <= 0;

        status <= s_idle;
    end else begin
        case(status) 
            s_idle: begin
                done <= 0;            
                find <= 0;
                selec_out_sram <= 0;
                write_out_sram <= 0;
                read_out_sram  <= 0;
                addr_wr_out_sram <= 0;
                V_cnt <= 0;
                H_cnt <= 0;
                count_sum_residue <= 0;
                search_finish <= 0;

                if(enable) begin
                    status <= s_init_enable;
                end else begin
                    status <= s_idle;                    
                end
            end
            s_init_enable: begin
                find <= 0;
                selec_out_sram <= 0;
                write_out_sram <= 0;
                read_out_sram  <= 0;  

                if(enable) begin
                    addr_wr_out_sram <= 0;
                    V_cnt <= 0;
                    H_cnt <= 0;

                    status <= s_init_enable;
                end else if(addr_wr_out_sram == 0 || continue) begin
                    status <= s_init_notfind;
                end else begin
                    status <= s_init_enable;    
                end
            end
            s_init_notfind: begin
                selec_out_sram <= 1;
                write_out_sram <= 0;
                read_out_sram  <= 1;
                
                status <= s_read;
            end
            s_read: begin
                data_wr_out_reg <= data_wr_out_out_sram;
                selec_out_sram <= 0;
                write_out_sram <= 0;
                read_out_sram  <= 0;                  
                addr_wr_out_sram <= addr_wr_out_sram + 1;

                if(H_cnt == H_cnt_max - 1) begin
                    if(V_cnt == V_cnt_max - 1) begin
                        H_cnt <= 0;
                        V_cnt <= 0;
                        status <= done;
                    end else begin
                        H_cnt <= 0;
                        V_cnt <= V_cnt + 1;

                        if(count_sum_residue == 0) begin
                            status <= s_detect;    
                        end else begin
                            status <= s_residue; 
                        end
                    end
                end else begin
                    H_cnt <= H_cnt + 1;

                    if(count_sum_residue == 0) begin
                        status <= s_detect;    
                    end else begin
                        status <= s_residue;
                    end
                end
            end
            s_detect: begin
                if(H_cnt==h_zuoshang&&V_cnt==v_zuoshang) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;
                    position_coding <= 9'd1;
                    status <= s_residue;
                end else if(H_cnt==h_zhongshang&&V_cnt==v_zhongshang) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;
                    position_coding <= 9'd2;
                    status <= s_residue;
                end else if(H_cnt==h_youshang&&V_cnt==v_youshang) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;
                    position_coding <= 9'd3;
                    status <= s_residue;
                end else if(H_cnt==h_zuozhong&&V_cnt==v_zuozhong) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;            
                    position_coding <= 9'd4;
                    status <= s_residue;
                end else if(H_cnt==h_zhongzhong&&V_cnt==v_zhongzhong) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;          
                    position_coding <= 9'd5;
                    status <= s_residue;
                end else if(H_cnt==h_youzhong&&V_cnt==v_youzhong) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0; 
                    position_coding <= 9'd6;
                    status <= s_residue;
                end else if(H_cnt==h_zuoxia&&V_cnt==v_zuoxia) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;       
                    position_coding <= 9'd7;
                    status <= s_residue;                  
                end else if(H_cnt==h_zhongxia&&V_cnt==v_zhongxia) begin
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;       
                    position_coding <= 9'd8;
                    status <= s_residue;            
                end else if(H_cnt==h_youxia&&V_cnt==v_youxia) begin
                    search_finish <= 1;
                    count_sum_residue <= 1;
                    r_7 <= 0;
                    g_8 <= 0;
                    b_7 <= 0;          
                    position_coding <= 9'd9;
                    status <= s_residue;
                end else begin
                    status <= s_init_notfind;
                end
            end
            s_residue: begin
                if(count_sum_residue == 4) begin
                    r_7 <= {2'b0,data_wr_out_reg[15:11]};
                    g_8 <= {2'b0,data_wr_out_reg[10:5]};
                    b_7 <= {2'b0,data_wr_out_reg[4:0]};
                    status <= s_init_notfind;
                end else if(count_sum_residue == 1) begin
                    r_7 <= r_7 + {2'b0,data_wr_out_reg[15:11]};
                    g_8 <= g_8 + {2'b0,data_wr_out_reg[10:5]};
                    b_7 <= b_7 + {2'b0,data_wr_out_reg[4:0]};
                    status <= s_dataready;
                end else begin
                    r_7 <= r_7 + {2'b0,data_wr_out_reg[15:11]};
                    g_8 <= g_8 + {2'b0,data_wr_out_reg[10:5]};
                    b_7 <= b_7 + {2'b0,data_wr_out_reg[4:0]};
                    status <= s_init_notfind;
                end
                count_sum_residue <= count_sum_residue - 1;
            end
            s_dataready: begin

                rgb565 <= {r_7[4:0],g_8[5:0],b_7[4:0]};
                status <= s_find;
            end
            s_find: begin
                find <= 1;
                if(search_finish) begin
                    done <= 1;
                    search_finish <= 0;

                    status <= s_ready;
                end else begin
                    status <= s_init_enable;
                end
            end
            s_done: begin
                done <= 1;

                status <= s_ready;
            end
            s_ready: begin
                done <= 0;
                
                status <= s_idle;
            end
            default: begin
                status <= s_idle;
            end
        endcase
    end
end

endmodule