data/full_repos/permissive/205926239/ISE_project/cursor.v
data/verilator_xmls/088b56d6-a7d9-48d0-9753-5db2932a44e3.xml
module cursor(clk, addr_cursor, addr_display, char_in, char_n_cursor);
    input clk;
    input [10:0] addr_cursor;
    input [10:0] addr_display;
    input [7:0]  char_in;
    output [7:0] char_n_cursor;

	reg [7:0] char_n_cursor;
	
	always @(posedge clk)
		if (addr_display==addr_cursor)
			char_n_cursor<=8'hFF;
		else
			char_n_cursor<=char_in;

endmodule
module cursor(clk, addr_cursor, addr_display, char_in, char_n_cursor);

    input clk;
    input [10:0] addr_cursor;
    input [10:0] addr_display;
    input [7:0]  char_in;
    output [7:0] char_n_cursor;

	reg [7:0] char_n_cursor;
	
	always @(posedge clk)
		if (addr_display==addr_cursor)
			char_n_cursor<=8'hFF;
		else
			char_n_cursor<=char_in;

endmodule