data/full_repos/permissive/174783592/FloatAdd/Adder/sum4bit.sv
None: at end of input
1: b'%Error: data/full_repos/permissive/174783592/FloatAdd/Adder/sum4bit.sv:1: Cannot find include file: Adder/kpgGen.v\n`include "Adder/kpgGen.v" \n         ^~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/174783592/FloatAdd/Adder,data/full_repos/permissive/174783592/Adder/kpgGen.v\n             data/full_repos/permissive/174783592/FloatAdd/Adder,data/full_repos/permissive/174783592/Adder/kpgGen.v.v\n             data/full_repos/permissive/174783592/FloatAdd/Adder,data/full_repos/permissive/174783592/Adder/kpgGen.v.sv\n             Adder/kpgGen.v\n             Adder/kpgGen.v.v\n             Adder/kpgGen.v.sv\n             obj_dir/Adder/kpgGen.v\n             obj_dir/Adder/kpgGen.v.v\n             obj_dir/Adder/kpgGen.v.sv\n%Error: data/full_repos/permissive/174783592/FloatAdd/Adder/sum4bit.sv:2: Cannot find include file: Adder/prefixCircuit.v\n`include "Adder/prefixCircuit.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n'
module sum4bit(a,b,kIn,  sum);
    input [3:0] a;
    input  [3:0] b;
    input  [1:0] kIn;

    wire [7:0] kpgIn;
    wire [7:0] kpgOut;

    output reg [3:0] sum;
 
    



	
    assign kpgIn[1:0] = kIn;


    
    kpgGen g1(a[0],b[0],kpgIn[3:2]);
    kpgGen g2(a[1],b[1],kpgIn[5:4]);
    kpgGen g3(a[2],b[2],kpgIn[7:6]);
    

    



    prefixCircuit pc1(kpgIn,kpgOut);



    always @( *)
    begin
	    


   

			sum[0] <=  a[0]^b[0]^(kpgOut[0]| kpgOut[1]);






   




			sum[1] <=  a[1]^b[1]^(kpgOut[3]| kpgOut[2]);




	   
   




	     
			sum[2] <=  a[2]^b[2]^(kpgOut[5]| kpgOut[4]);





	   
   




	
			sum[3] <=  a[3]^b[3]^(kpgOut[7]| kpgOut[6]);






    end	  
  


endmodule
module sum4bit(a,b,kIn,  sum);

    input [3:0] a;
    input  [3:0] b;
    input  [1:0] kIn;

    wire [7:0] kpgIn;
    wire [7:0] kpgOut;

    output reg [3:0] sum;
 
    



	
    assign kpgIn[1:0] = kIn;


    
    kpgGen g1(a[0],b[0],kpgIn[3:2]);
    kpgGen g2(a[1],b[1],kpgIn[5:4]);
    kpgGen g3(a[2],b[2],kpgIn[7:6]);
    

    



    prefixCircuit pc1(kpgIn,kpgOut);



    always @( *)
    begin
	    


   

			sum[0] <=  a[0]^b[0]^(kpgOut[0]| kpgOut[1]);






   




			sum[1] <=  a[1]^b[1]^(kpgOut[3]| kpgOut[2]);




	   
   




	     
			sum[2] <=  a[2]^b[2]^(kpgOut[5]| kpgOut[4]);





	   
   




	
			sum[3] <=  a[3]^b[3]^(kpgOut[7]| kpgOut[6]);






    end	  
  


endmodule