data/full_repos/permissive/129155059/03-library/library_tb.v
 line:21: before: ":"
1: b'%Error: data/full_repos/permissive/129155059/03-library/library_tb.v:5: Cannot find include file: library.v\n`include "library.v" \n         ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/129155059/03-library,data/full_repos/permissive/129155059/library.v\n             data/full_repos/permissive/129155059/03-library,data/full_repos/permissive/129155059/library.v.v\n             data/full_repos/permissive/129155059/03-library,data/full_repos/permissive/129155059/library.v.sv\n             library.v\n             library.v.v\n             library.v.sv\n             obj_dir/library.v\n             obj_dir/library.v.v\n             obj_dir/library.v.sv\n%Error: data/full_repos/permissive/129155059/03-library/library_tb.v:6: Cannot find include file: tester.v\n`include "tester.v" \n         ^~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n'
module testbench;

   wire iA, iB, D, s0, ENB, CLK, oNand, oNor, oNot, oMux, Q, Qn;
   wire [31:0] dato;
   wire [`Ndir:0] dir;


   parameter PwrC = 0;


   nand_ti #(0) nand0(.iA       (iA),
                      .iB       (iB),
                      .oNand (oNand)
                      );

   nor_ti  #(1) nor0( .iA     (iA),
                      .iB     (iB),
                      .oNor (oNor)
                      );

   not_ti  #(2) not0( .iA     (iA),
                      .oNot (oNot)
                      );

   mux_2a1 #(3) mux0(.oMux   (oMux),
                        .iA     (iA),
                        .iB     (iB),
                        .s0     (s0)
                       );

   ff_d    #(4) ffd0( .D      (D),
                      .ENB    (ENB),
                      .CLK    (CLK),
                      .Q      (Q),
                      .Qn     (Qn)
                      );

   tester     letest(.iA       (iA),
                     .iB       (iB),
                     .D        (D),
                     .SEL      (s0),
                     .ENB      (ENB),
                     .NAND     (oNand),
                     .NOT      (oNot),
                     .NOR      (oNor),
                     .MUX      (oMux),
                     .Q        (Q),
                     .Qn       (Qn),
                     .CLK      (CLK)
                     );






endmodule
module testbench;


   wire iA, iB, D, s0, ENB, CLK, oNand, oNor, oNot, oMux, Q, Qn;
   wire [31:0] dato;
   wire [`Ndir:0] dir;


   parameter PwrC = 0;


   nand_ti #(0) nand0(.iA       (iA),
                      .iB       (iB),
                      .oNand (oNand)
                      );

   nor_ti  #(1) nor0( .iA     (iA),
                      .iB     (iB),
                      .oNor (oNor)
                      );

   not_ti  #(2) not0( .iA     (iA),
                      .oNot (oNot)
                      );

   mux_2a1 #(3) mux0(.oMux   (oMux),
                        .iA     (iA),
                        .iB     (iB),
                        .s0     (s0)
                       );

   ff_d    #(4) ffd0( .D      (D),
                      .ENB    (ENB),
                      .CLK    (CLK),
                      .Q      (Q),
                      .Qn     (Qn)
                      );

   tester     letest(.iA       (iA),
                     .iB       (iB),
                     .D        (D),
                     .SEL      (s0),
                     .ENB      (ENB),
                     .NAND     (oNand),
                     .NOT      (oNot),
                     .NOR      (oNor),
                     .MUX      (oMux),
                     .Q        (Q),
                     .Qn       (Qn),
                     .CLK      (CLK)
                     );






endmodule