data/full_repos/permissive/160976968/adder.v
1: b"%Error: data/full_repos/permissive/160976968/adder.v:10: syntax error, unexpected '(', expecting IDENTIFIER\n comparator(SW[3:0], 0, X_EC);\n            ^~\n%Error: Exiting due to 1 error(s)\n"
module adder(SW, HEX0, HEX1, HEX3, HEX5, LEDR);
	input [8:0]SW;
	output [0:6]HEX0, HEX1, HEX3, HEX5;

	output [9:0]LEDR;
	
	wire[4:0] ra_out;
	wire X_EC, Y_EC;
	
	comparator(SW[3:0], 0, X_EC);
	comparator(SW[7:4], 0, Y_EC);
	assign LEDR[9] = X_EC|Y_EC;
	

	to_hex th_x(SW[3:0], HEX5);
	to_hex th_y(SW[7:4], HEX3);
	


	ripple_add ra(SW[8:0], ra_out);
	assign LEDR[0] = ra_out[0];
	assign LEDR[1] = ra_out[1];
	assign LEDR[2] = ra_out[2];
	assign LEDR[3] = ra_out[3];
	assign LEDR[4] = ra_out[4];
	
	SW_in_to_2dig_dec S2D(ra_out[3:0], HEX1, HEX0, ra_out[4]);
endmodule
module adder(SW, HEX0, HEX1, HEX3, HEX5, LEDR);

	input [8:0]SW;
	output [0:6]HEX0, HEX1, HEX3, HEX5;

	output [9:0]LEDR;
	
	wire[4:0] ra_out;
	wire X_EC, Y_EC;
	
	comparator(SW[3:0], 0, X_EC);
	comparator(SW[7:4], 0, Y_EC);
	assign LEDR[9] = X_EC|Y_EC;
	

	to_hex th_x(SW[3:0], HEX5);
	to_hex th_y(SW[7:4], HEX3);
	


	ripple_add ra(SW[8:0], ra_out);
	assign LEDR[0] = ra_out[0];
	assign LEDR[1] = ra_out[1];
	assign LEDR[2] = ra_out[2];
	assign LEDR[3] = ra_out[3];
	assign LEDR[4] = ra_out[4];
	
	SW_in_to_2dig_dec S2D(ra_out[3:0], HEX1, HEX0, ra_out[4]);
endmodule