data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:123: Unsupported: Ignoring delay on this delayed statement.\n    #1000\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:126: Unsupported: Ignoring delay on this delayed statement.\n    #200000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:133: Unsupported: Ignoring delay on this delayed statement.\n    #10\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:136: Unsupported: Ignoring delay on this delayed statement.\n    #300000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:142: Unsupported: Ignoring delay on this delayed statement.\n    #10\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:144: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:145: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:146: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hFF; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:147: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hFF; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:148: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hFF; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:149: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hFF; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:150: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hFF; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:151: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hFF; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:152: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:153: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h5A; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:154: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h63; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:155: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h2F; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:156: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hCE; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:157: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h01; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:158: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h01; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:159: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h01; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:160: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h01; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:161: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:163: Unsupported: Ignoring delay on this delayed statement.\n    #300000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:169: Unsupported: Ignoring delay on this delayed statement.\n    #10\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:171: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:172: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h29; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:173: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h18; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:174: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h01; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:175: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h04; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:176: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hB5; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:177: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h3E; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:178: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h22; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:179: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h78; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:180: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h3A; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:181: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h08; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:182: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hA5; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:183: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hA2; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:184: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h57; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:185: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h4F; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:186: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hA2; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:187: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h28; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:188: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:190: Unsupported: Ignoring delay on this delayed statement.\n    #300000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:196: Unsupported: Ignoring delay on this delayed statement.\n    #10\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:198: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:199: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h0F; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:200: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h50; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:201: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h54; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:202: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hA5; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:203: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h4B; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:204: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:205: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h71; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:206: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h4F; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:207: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h81; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:208: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:209: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h81; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:210: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h80; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:211: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hA9; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:212: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h40; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:213: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hB3; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:214: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:215: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:217: Unsupported: Ignoring delay on this delayed statement.\n    #300000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:223: Unsupported: Ignoring delay on this delayed statement.\n    #10\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:225: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:226: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hD1; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:227: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hC0; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:228: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hD1; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:229: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:230: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h01; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:231: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h01; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:232: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hA3; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:233: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h66; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:234: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:235: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hA0; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:236: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hF0; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:237: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h70; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:238: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h1f; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:239: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h80; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:240: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h30; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:241: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h20; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:242: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:244: Unsupported: Ignoring delay on this delayed statement.\n    #300000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:250: Unsupported: Ignoring delay on this delayed statement.\n    #10\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:252: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:253: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h35; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:254: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:255: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h6D; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:256: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h55; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:257: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h21; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:258: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:259: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:260: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h1A; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:261: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:262: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:263: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:264: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hFF; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:265: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:266: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h55; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:267: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h32; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:268: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h4E; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:269: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:272: Unsupported: Ignoring delay on this delayed statement.\n    #300000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:278: Unsupported: Ignoring delay on this delayed statement.\n    #10\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:280: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:281: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h31; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:282: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h34; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:283: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h34; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:284: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h31; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:285: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h30; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:286: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h30; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:287: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h30; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:288: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h38; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:289: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h38; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:290: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h0A; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:291: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:292: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:293: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:294: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hFC; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:295: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:296: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h56; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:297: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:300: Unsupported: Ignoring delay on this delayed statement.\n    #300000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:306: Unsupported: Ignoring delay on this delayed statement.\n    #10\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:308: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:309: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h58; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:310: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h32; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:311: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h38; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:312: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h38; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:313: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h30; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:314: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h4D; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:315: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h4C; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:316: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h0A; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:317: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h20; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:318: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h20; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:319: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h20; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:320: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h20; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:321: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:322: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:323: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:324: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hFD; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:325: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:328: Unsupported: Ignoring delay on this delayed statement.\n    #300000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:334: Unsupported: Ignoring delay on this delayed statement.\n    #10\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:336: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:337: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:338: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h18; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:339: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h55; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:340: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h1F; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:341: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h72; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:342: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h1E; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:343: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:344: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h0A; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:345: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h20; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:346: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h20; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:347: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h20; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:348: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h20; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:349: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h20; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:350: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h20; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:351: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h01; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:352: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h42; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:353: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:355: Unsupported: Ignoring delay on this delayed statement.\n    #300000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:361: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:362: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:363: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h01; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:364: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:366: Unsupported: Ignoring delay on this delayed statement.\n    #200000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:373: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:374: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:375: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h11; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:376: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h0A; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:377: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'hA4; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:378: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h01; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:379: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h01; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:380: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:381: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h01; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:382: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h81; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:383: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:384: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:385: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:386: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:387: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:389: Unsupported: Ignoring delay on this delayed statement.\n    #200000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:395: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:396: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:397: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:399: Unsupported: Ignoring delay on this delayed statement.\n    #200000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:405: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:406: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:407: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:409: Unsupported: Ignoring delay on this delayed statement.\n    #200000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:415: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:416: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:417: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:419: Unsupported: Ignoring delay on this delayed statement.\n    #200000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:425: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:426: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:427: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:429: Unsupported: Ignoring delay on this delayed statement.\n    #200000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:435: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:436: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:437: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:439: Unsupported: Ignoring delay on this delayed statement.\n    #200000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:445: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:446: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h20; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:447: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:449: Unsupported: Ignoring delay on this delayed statement.\n    #200000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:455: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:456: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:457: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:459: Unsupported: Ignoring delay on this delayed statement.\n    #200000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:465: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:466: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:467: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:468: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:469: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h01; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:470: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:471: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h80; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:472: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:473: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:474: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:475: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:477: Unsupported: Ignoring delay on this delayed statement.\n    #200000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:483: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:484: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:485: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:486: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:487: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:489: Unsupported: Ignoring delay on this delayed statement.\n    #300000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:495: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:496: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:497: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:499: Unsupported: Ignoring delay on this delayed statement.\n    #200000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:505: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:506: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:507: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:509: Unsupported: Ignoring delay on this delayed statement.\n    #600000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:515: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:516: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:517: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:518: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:519: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h07; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:520: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:521: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h81; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:522: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:523: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:524: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:525: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:527: Unsupported: Ignoring delay on this delayed statement.\n    #200000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:533: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:534: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:535: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:536: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:537: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:539: Unsupported: Ignoring delay on this delayed statement.\n    #400000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:545: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_abort  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:546: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_data   = 8\'h00; sender_wr_en  = 1\'b1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:547: Unsupported: Ignoring delay on this delayed statement.\n    #10 sender_wr_en  = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:549: Unsupported: Ignoring delay on this delayed statement.\n    #200000\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:556: Unsupported: Ignoring delay on this delayed statement.\n    #200000000\n    ^\n%Error: data/full_repos/permissive/172201645/test_benches/tb_dummy_sink.v:92: Cannot find file containing module: \'aux_interface\'\naux_interface sender(\n^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/172201645/test_benches,data/full_repos/permissive/172201645/aux_interface\n             data/full_repos/permissive/172201645/test_benches,data/full_repos/permissive/172201645/aux_interface.v\n             data/full_repos/permissive/172201645/test_benches,data/full_repos/permissive/172201645/aux_interface.sv\n             aux_interface\n             aux_interface.v\n             aux_interface.sv\n             obj_dir/aux_interface\n             obj_dir/aux_interface.v\n             obj_dir/aux_interface.sv\n%Error: Exiting due to 1 error(s), 262 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module tb_dummy_sink(
    input clk100,
    output auxch_data,
    output reg   hotplug_detect
    );

wire [7:0] sender_debug_pmod;
wire       sender_aux_tri;
 
reg        sender_wr_en;
reg [7:0]  sender_wr_data;
wire       sender_wr_full;

reg        sender_rd_en;
wire [7:0] sender_rd_data;
wire       sender_rd_empty;
wire       sender_busy;
wire       sender_timeout;
reg        sender_abort;

aux_interface sender(
       .clk         (clk100),
       .debug_pmod  (sender_debug_pmod),

       .aux_in      (1'b1),
       .aux_out     (auxch_data),
       .aux_tri     (sender_aux_tri),

       .tx_wr_en    (sender_wr_en),
       .tx_data     (sender_wr_data),
       .tx_full     (sender_wr_full),

       .rx_rd_en    (sender_rd_en),
       .rx_data     (sender_rd_data),
       .rx_empty    (sender_rd_empty),

       .busy        (sender_busy),
       .abort       (sender_abort),
       .timeout     (sender_timeout)
     );

initial begin
    hotplug_detect  = 1'b0;
    sender_wr_en    = 1'b0;
    sender_wr_data  = 8'h00;
    sender_rd_en    = 1'b0;
    sender_abort    = 1'b0;
    sender_rd_en = 1'b0;
    sender_wr_en = 1'b0;
    sender_abort = 1'b0;
    
    #1000
    hotplug_detect = 1'b1;
    
    #200000
    



    sender_wr_data   = 8'h00;
    sender_wr_en  = 1'b1;
    #10
    sender_wr_en  = 1'b0;

    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFF; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFF; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFF; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFF; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFF; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFF; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h5A; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h63; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h2F; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hCE; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h29; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h18; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h04; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hB5; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h3E; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h22; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h78; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h3A; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h08; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA5; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA2; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h57; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h4F; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA2; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h28; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h0F; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h50; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h54; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA5; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h4B; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h71; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h4F; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h81; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h81; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h80; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA9; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h40; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hB3; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hD1; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hC0; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hD1; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA3; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h66; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA0; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hF0; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h70; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h1f; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h80; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h30; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h35; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h6D; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h55; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h21; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h1A; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFF; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h55; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h32; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h4E; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;


    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h31; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h34; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h34; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h31; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h30; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h30; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h30; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h38; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h38; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h0A; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFC; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h56; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;


    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h58; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h32; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h38; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h38; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h30; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h4D; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h4C; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h0A; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFD; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;


    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h18; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h55; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h1F; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h72; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h1E; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h0A; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h42; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #300000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000





    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h11; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h0A; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA4; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h81; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h80; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #300000




    sender_abort = 1'b1;
    #10 sender_abort  = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #600000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h07; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h81; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #400000




    sender_abort = 1'b1;
    #10 sender_abort  = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_wr_en  = 1'b0;

    #200000000
    sender_wr_en  = 1'b0;

end     

endmodule
module tb_dummy_sink(
    input clk100,
    output auxch_data,
    output reg   hotplug_detect
    );


wire [7:0] sender_debug_pmod;
wire       sender_aux_tri;
 
reg        sender_wr_en;
reg [7:0]  sender_wr_data;
wire       sender_wr_full;

reg        sender_rd_en;
wire [7:0] sender_rd_data;
wire       sender_rd_empty;
wire       sender_busy;
wire       sender_timeout;
reg        sender_abort;

aux_interface sender(
       .clk         (clk100),
       .debug_pmod  (sender_debug_pmod),

       .aux_in      (1'b1),
       .aux_out     (auxch_data),
       .aux_tri     (sender_aux_tri),

       .tx_wr_en    (sender_wr_en),
       .tx_data     (sender_wr_data),
       .tx_full     (sender_wr_full),

       .rx_rd_en    (sender_rd_en),
       .rx_data     (sender_rd_data),
       .rx_empty    (sender_rd_empty),

       .busy        (sender_busy),
       .abort       (sender_abort),
       .timeout     (sender_timeout)
     );

initial begin
    hotplug_detect  = 1'b0;
    sender_wr_en    = 1'b0;
    sender_wr_data  = 8'h00;
    sender_rd_en    = 1'b0;
    sender_abort    = 1'b0;
    sender_rd_en = 1'b0;
    sender_wr_en = 1'b0;
    sender_abort = 1'b0;
    
    #1000
    hotplug_detect = 1'b1;
    
    #200000
    



    sender_wr_data   = 8'h00;
    sender_wr_en  = 1'b1;
    #10
    sender_wr_en  = 1'b0;

    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFF; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFF; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFF; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFF; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFF; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFF; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h5A; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h63; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h2F; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hCE; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h29; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h18; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h04; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hB5; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h3E; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h22; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h78; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h3A; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h08; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA5; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA2; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h57; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h4F; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA2; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h28; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h0F; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h50; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h54; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA5; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h4B; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h71; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h4F; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h81; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h81; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h80; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA9; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h40; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hB3; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hD1; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hC0; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hD1; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA3; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h66; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA0; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hF0; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h70; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h1f; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h80; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h30; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h35; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h6D; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h55; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h21; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h1A; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFF; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h55; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h32; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h4E; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;


    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h31; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h34; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h34; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h31; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h30; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h30; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h30; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h38; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h38; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h0A; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFC; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h56; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;


    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h58; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h32; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h38; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h38; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h30; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h4D; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h4C; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h0A; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hFD; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;


    #300000




    sender_abort = 1'b1;
    #10
    sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h18; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h55; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h1F; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h72; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h1E; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h0A; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h42; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #300000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000





    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h11; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h0A; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'hA4; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h81; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h20; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h01; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h80; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #300000




    sender_abort = 1'b1;
    #10 sender_abort  = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #600000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h07; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h81; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_abort = 1'b1;
    #10 sender_abort = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #400000




    sender_abort = 1'b1;
    #10 sender_abort  = 1'b0;
    #10 sender_wr_data   = 8'h00; sender_wr_en  = 1'b1;
    #10 sender_wr_en  = 1'b0;

    #200000




    sender_wr_en  = 1'b0;

    #200000000
    sender_wr_en  = 1'b0;

end     

endmodule