data/full_repos/permissive/119715647/sim/Utilities/ButtonShaper.v
data/verilator_xmls/7a30d378-4f94-4b2f-91cb-ee7b2d8eeeff.xml
module ButtonShaper(clk, RawInput, ShapedOutput);
	input clk, RawInput; 
	output reg ShapedOutput; 

	parameter OFF_STATE = 0,
		ON_STATE = 1, 
		DELAY_STATE = 2;

	reg [1:0] State, StateNext; 

	always @ (State, RawInput)begin
		case(State)
			OFF_STATE: begin
				ShapedOutput = 0; 
				if(RawInput == 0) begin
					StateNext = ON_STATE; 
				end 
				else begin
					StateNext = OFF_STATE; 
				end
			end
			ON_STATE: begin
				ShapedOutput = 1;
				StateNext = DELAY_STATE;
			end
			DELAY_STATE: begin
				ShapedOutput = 0; 
				if(RawInput == 0) begin
					StateNext = DELAY_STATE;  
				end 
				else begin
					StateNext = OFF_STATE;
				end
			end
			default: begin
				ShapedOutput = 0; 
				StateNext = OFF_STATE; 
			end
		endcase
	end 

	always @ (posedge clk) begin
		State <= StateNext;
	end

endmodule
module ButtonShaper(clk, RawInput, ShapedOutput);

	input clk, RawInput; 
	output reg ShapedOutput; 

	parameter OFF_STATE = 0,
		ON_STATE = 1, 
		DELAY_STATE = 2;

	reg [1:0] State, StateNext; 

	always @ (State, RawInput)begin
		case(State)
			OFF_STATE: begin
				ShapedOutput = 0; 
				if(RawInput == 0) begin
					StateNext = ON_STATE; 
				end 
				else begin
					StateNext = OFF_STATE; 
				end
			end
			ON_STATE: begin
				ShapedOutput = 1;
				StateNext = DELAY_STATE;
			end
			DELAY_STATE: begin
				ShapedOutput = 0; 
				if(RawInput == 0) begin
					StateNext = DELAY_STATE;  
				end 
				else begin
					StateNext = OFF_STATE;
				end
			end
			default: begin
				ShapedOutput = 0; 
				StateNext = OFF_STATE; 
			end
		endcase
	end 

	always @ (posedge clk) begin
		State <= StateNext;
	end

endmodule