data/full_repos/permissive/175132042/rtl/system_controller/system_controller.v
data/verilator_xmls/5c77d663-8a08-4700-86ed-e5e2146f1abe.xml
module system_controller (

   clk_i, rst_i, nrst_i,

   clk_sys_i, rst_sys_i
   ) ;
   input wire clk_sys_i;
   input wire rst_sys_i;

   output wire clk_i;
   output wire rst_i;
   output wire nrst_i;
   

`ifdef RTL
   initial begin
      $display("RTL SYSCON!");

   end
   
   assign clk_i = clk_sys_i;
   
   reg [4:0] reset_count =0;
   assign rst_i = |reset_count; 
   assign nrst_i = ~rst_i;
   
   always @(posedge clk_sys_i or posedge rst_sys_i)
     if (rst_sys_i) begin
        reset_count <= 1;        
     end else begin
        if (reset_count)
          reset_count <= reset_count + 1;
     end
`else
 `ifdef XILINX

   initial begin
      $display("XILINX SYSCON!");

   end

   system_controller_xilinx sys_con_xil(

                                        .clk_i          (clk_i),
                                        .rst_i          (rst_i),
                                        .nrst_i         (nrst_i),

                                        .clk_sys_i      (clk_sys_i),
                                        .rst_sys_i      (rst_sys_i));
   
 `endif
   
 `ifdef ALTERA
   initial begin
      $display("ALTERA SYSCON");
   end
      system_controller_altera sys_con_alt(

                                           .clk_i               (clk_i),
                                           .rst_i               (rst_i),
                                           .nrst_i              (nrst_i),

                                           .clk_sys_i           (clk_sys_i),
                                           .rst_sys_i           (rst_sys_i));
      
      
 `endif

   initial begin
      $error("SYSCON WON'T WORK");      
   end
   
`endif

   
   
endmodule
module system_controller (

   clk_i, rst_i, nrst_i,

   clk_sys_i, rst_sys_i
   ) ;

   input wire clk_sys_i;
   input wire rst_sys_i;

   output wire clk_i;
   output wire rst_i;
   output wire nrst_i;
   

`ifdef RTL
   initial begin
      $display("RTL SYSCON!");

   end
   
   assign clk_i = clk_sys_i;
   
   reg [4:0] reset_count =0;
   assign rst_i = |reset_count; 
   assign nrst_i = ~rst_i;
   
   always @(posedge clk_sys_i or posedge rst_sys_i)
     if (rst_sys_i) begin
        reset_count <= 1;        
     end else begin
        if (reset_count)
          reset_count <= reset_count + 1;
     end
`else
 `ifdef XILINX

   initial begin
      $display("XILINX SYSCON!");

   end

   system_controller_xilinx sys_con_xil(

                                        .clk_i          (clk_i),
                                        .rst_i          (rst_i),
                                        .nrst_i         (nrst_i),

                                        .clk_sys_i      (clk_sys_i),
                                        .rst_sys_i      (rst_sys_i));
   
 `endif
   
 `ifdef ALTERA
   initial begin
      $display("ALTERA SYSCON");
   end
      system_controller_altera sys_con_alt(

                                           .clk_i               (clk_i),
                                           .rst_i               (rst_i),
                                           .nrst_i              (nrst_i),

                                           .clk_sys_i           (clk_sys_i),
                                           .rst_sys_i           (rst_sys_i));
      
      
 `endif

   initial begin
      $error("SYSCON WON'T WORK");      
   end
   
`endif

   
   
endmodule