data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:434: Unsupported: Ignoring delay on this delayed statement.\n  #100;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:436: Unsupported: Ignoring delay on this delayed statement.\n  #5000;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:438: Unsupported: Ignoring delay on this delayed statement.\n  #2;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:440: Unsupported: Ignoring delay on this delayed statement.\n  #50;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:442: Unsupported: Ignoring delay on this delayed statement.\n  #8;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:444: Unsupported: Ignoring delay on this delayed statement.\n  #50;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:446: Unsupported: Ignoring delay on this delayed statement.\n  #30;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:450: Unsupported: Ignoring delay on this delayed statement.\n  #1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:452: Unsupported: Ignoring delay on this delayed statement.\n  #1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:456: Unsupported: Ignoring delay on this delayed statement.\n  #1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:458: Unsupported: Ignoring delay on this delayed statement.\n  #1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:462: Unsupported: Ignoring delay on this delayed statement.\n  #10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:464: Unsupported: Ignoring delay on this delayed statement.\n  #10;\n  ^\n%Warning-PINMISSING: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:398: Cell has missing pin: \'local_clock50_in_p\'\n mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea uut (\n                                                                            ^~~\n%Warning-PINMISSING: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:398: Cell has missing pin: \'local_clock50_in_n\'\n mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea uut (\n                                                                            ^~~\n%Warning-PINMISSING: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:398: Cell has missing pin: \'local_clock509_in_p\'\n mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea uut (\n                                                                            ^~~\n%Warning-PINMISSING: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:398: Cell has missing pin: \'local_clock509_in_n\'\n mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea uut (\n                                                                            ^~~\n%Warning-MULTITOP: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:361: Multiple top level modules\n                                                                                                                                                         : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                                                                                                                                                         : ... Top module \'ssynchronizer_90_270\'\nmodule ssynchronizer_90_270 #(\n       ^~~~~~~~~~~~~~~~~~~~\n                                                                                                                                                         : ... Top module \'mything_tb\'\nmodule mything_tb;\n       ^~~~~~~~~~\n                                                                                                                                                         : ... Top module \'mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea_top\'\nmodule mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea_top (\n       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:494: Signal definition not found, creating implicitly: \'f_p\'\n                                                                                                                                                         : ... Suggested alternative: \'e_p\'\n  .trg_out_p(f_p), .trg_out_n(f_n),\n             ^~~\n%Warning-IMPLICIT: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:494: Signal definition not found, creating implicitly: \'f_n\'\n                                                                                                                                                         : ... Suggested alternative: \'d_n\'\n  .trg_out_p(f_p), .trg_out_n(f_n),\n                              ^~~\n%Error: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:399: Pin not found: \'remote_clock50_in_p\'\n                                                                                                                                              : ... Suggested alternative: \'remote_clock509_in_p\'\n  .remote_clock50_in_p(remote_clock50_in_p), .remote_clock50_in_n(remote_clock50_in_n),\n   ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:399: Pin not found: \'remote_clock50_in_n\'\n                                                                                                                                              : ... Suggested alternative: \'remote_clock509_in_n\'\n  .remote_clock50_in_p(remote_clock50_in_p), .remote_clock50_in_n(remote_clock50_in_n),\n                                              ^~~~~~~~~~~~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:409: Signal definition not found, creating implicitly: \'l_p\'\n  .led_revo(l_p),\n            ^~~\n%Warning-IMPLICIT: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:410: Signal definition not found, creating implicitly: \'l_n\'\n                                                                                                                                                         : ... Suggested alternative: \'l_p\'\n  .led_rfclock(l_n),\n               ^~~\n%Error: Exiting due to 2 error(s), 22 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea_top (
	input clock50_p, clock50_n,
	input a_p, a_n,
	output b_p, b_n,
	output c_p, c_n,
	output d_p, d_n,
	output e_p, e_n,
	input h_p, h_n,
	input j_p, j_n,
	input k_p, k_n,
	input lemo,
	output l_p, l_n,
	input g_n, output g_p,
	output led_0, output led_1, output led_2, output led_3,
	output led_4, output led_5, output led_6, output led_7
);
	mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea mything (
		.local_clock50_in_p(clock50_p), .local_clock50_in_n(clock50_n),
		.local_clock509_in_p(j_p), .local_clock509_in_n(j_n),
		.remote_clock509_in_p(k_p), .remote_clock509_in_n(k_n),
		.remote_revo_in_p(h_p), .remote_revo_in_n(h_n),
		.clock127_out_p(d_p), .clock127_out_n(d_n),
		.trg_out_p(f_p), .trg_out_n(f_n),
		.rsv_p(c_p), .rsv_n(c_n),
		.ack_p(a_p), .ack_n(a_n),
		.out1_p(e_p), .out1_n(e_n),
		.outa_p(b_p), .outa_n(b_n),
		.lemo(lemo),
		.led_revo(l_p),
		.led_rfclock(l_n),
		.driven_high(g_p), .clock_select(g_n),
		.led_0(led_0), .led_1(led_1), .led_2(led_2), .led_3(led_3),
		.led_4(led_4), .led_5(led_5), .led_6(led_6), .led_7(led_7)
	);
endmodule
module mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea_top (
	input clock50_p, clock50_n,
	input a_p, a_n,
	output b_p, b_n,
	output c_p, c_n,
	output d_p, d_n,
	output e_p, e_n,
	input h_p, h_n,
	input j_p, j_n,
	input k_p, k_n,
	input lemo,
	output l_p, l_n,
	input g_n, output g_p,
	output led_0, output led_1, output led_2, output led_3,
	output led_4, output led_5, output led_6, output led_7
);

	mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea mything (
		.local_clock50_in_p(clock50_p), .local_clock50_in_n(clock50_n),
		.local_clock509_in_p(j_p), .local_clock509_in_n(j_n),
		.remote_clock509_in_p(k_p), .remote_clock509_in_n(k_n),
		.remote_revo_in_p(h_p), .remote_revo_in_n(h_n),
		.clock127_out_p(d_p), .clock127_out_n(d_n),
		.trg_out_p(f_p), .trg_out_n(f_n),
		.rsv_p(c_p), .rsv_n(c_n),
		.ack_p(a_p), .ack_n(a_n),
		.out1_p(e_p), .out1_n(e_n),
		.outa_p(b_p), .outa_n(b_n),
		.lemo(lemo),
		.led_revo(l_p),
		.led_rfclock(l_n),
		.driven_high(g_p), .clock_select(g_n),
		.led_0(led_0), .led_1(led_1), .led_2(led_2), .led_3(led_3),
		.led_4(led_4), .led_5(led_5), .led_6(led_6), .led_7(led_7)
	);
endmodule