data/full_repos/permissive/20270692/labs/lab6/sample/encoder83_tb.v
 line:66: before: ","
1: b'%Error: data/full_repos/permissive/20270692/labs/lab6/sample/encoder83_tb.v:7: Cannot find include file: encoder83.v\n`include "encoder83.v" \n         ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/20270692/labs/lab6/sample,data/full_repos/permissive/20270692/encoder83.v\n             data/full_repos/permissive/20270692/labs/lab6/sample,data/full_repos/permissive/20270692/encoder83.v.v\n             data/full_repos/permissive/20270692/labs/lab6/sample,data/full_repos/permissive/20270692/encoder83.v.sv\n             encoder83.v\n             encoder83.v.v\n             encoder83.v.sv\n             obj_dir/encoder83.v\n             obj_dir/encoder83.v.v\n             obj_dir/encoder83.v.sv\n%Warning-STMTDLY: data/full_repos/permissive/20270692/labs/lab6/sample/encoder83_tb.v:23: Unsupported: Ignoring delay on this delayed statement.\n      #100\n      ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/20270692/labs/lab6/sample/encoder83_tb.v:25: Unsupported: Ignoring delay on this delayed statement.\n      #100\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/20270692/labs/lab6/sample/encoder83_tb.v:27: Unsupported: Ignoring delay on this delayed statement.\n      #100\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/20270692/labs/lab6/sample/encoder83_tb.v:29: Unsupported: Ignoring delay on this delayed statement.\n      #100\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/20270692/labs/lab6/sample/encoder83_tb.v:31: Unsupported: Ignoring delay on this delayed statement.\n      #100\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/20270692/labs/lab6/sample/encoder83_tb.v:33: Unsupported: Ignoring delay on this delayed statement.\n      #100\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/20270692/labs/lab6/sample/encoder83_tb.v:35: Unsupported: Ignoring delay on this delayed statement.\n      #100\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/20270692/labs/lab6/sample/encoder83_tb.v:37: Unsupported: Ignoring delay on this delayed statement.\n      #100\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/20270692/labs/lab6/sample/encoder83_tb.v:39: Unsupported: Ignoring delay on this delayed statement.\n      #100\n      ^\n%Error: data/full_repos/permissive/20270692/labs/lab6/sample/encoder83_tb.v:45: Unsupported or unknown PLI call: $monitor\n    $monitor("time=%03d", $time,, "A=%h B=%d F=%d", D, Y, V);\n    ^~~~~~~~\n%Error: data/full_repos/permissive/20270692/labs/lab6/sample/encoder83_tb.v:45: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n    $monitor("time=%03d", $time,, "A=%h B=%d F=%d", D, Y, V);\n                                ^\n%Warning-STMTDLY: data/full_repos/permissive/20270692/labs/lab6/sample/encoder83_tb.v:48: Unsupported: Ignoring delay on this delayed statement.\ninitial #900 $finish;\n        ^\n%Error: Exiting due to 3 error(s), 10 warning(s)\n'
module encoder83_tb (D);

  output [0:7] D;
  reg D;

  wire V;
  wire [0:2] Y;

  encoder83 I1 (D, Y, V);

  initial
    begin
      D=8'h88;
      #100
      D=8'h80;
      #100
      D=8'h40;
      #100
      D=8'h20;
      #100
      D=8'h10;
      #100
      D=8'h08;
      #100
      D=8'h04;
      #100
      D=8'h02;
      #100
      D=8'h01;
      #100
      D=8'h00;
    end

  initial
  begin
    $monitor("time=%03d", $time,, "A=%h B=%d F=%d", D, Y, V);
  end

initial #900 $finish;

endmodule
module encoder83_tb (D);


  output [0:7] D;
  reg D;

  wire V;
  wire [0:2] Y;

  encoder83 I1 (D, Y, V);

  initial
    begin
      D=8'h88;
      #100
      D=8'h80;
      #100
      D=8'h40;
      #100
      D=8'h20;
      #100
      D=8'h10;
      #100
      D=8'h08;
      #100
      D=8'h04;
      #100
      D=8'h02;
      #100
      D=8'h01;
      #100
      D=8'h00;
    end

  initial
  begin
    $monitor("time=%03d", $time,, "A=%h B=%d F=%d", D, Y, V);
  end

initial #900 $finish;

endmodule