data/full_repos/permissive/180413071/common_sources/mux4.v
1: b'%Error: data/full_repos/permissive/180413071/common_sources/mux4.v:2: Cannot find include file: constants.vh\n`include "constants.vh" \n         ^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/180413071/common_sources,data/full_repos/permissive/180413071/constants.vh\n             data/full_repos/permissive/180413071/common_sources,data/full_repos/permissive/180413071/constants.vh.v\n             data/full_repos/permissive/180413071/common_sources,data/full_repos/permissive/180413071/constants.vh.sv\n             constants.vh\n             constants.vh.v\n             constants.vh.sv\n             obj_dir/constants.vh\n             obj_dir/constants.vh.v\n             obj_dir/constants.vh.sv\n%Error: data/full_repos/permissive/180413071/common_sources/mux4.v:5: Define or directive not defined: \'`WORD\'\nmodule mux4 #(parameter SIZE=`WORD)(\n                             ^~~~~\n%Error: data/full_repos/permissive/180413071/common_sources/mux4.v:5: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\nmodule mux4 #(parameter SIZE=`WORD)(\n                                  ^\n%Error: data/full_repos/permissive/180413071/common_sources/mux4.v:12: syntax error, unexpected \')\', expecting \',\' or \';\'\n);\n^\n%Error: Exiting due to 4 error(s)\n'
module mux4 #(parameter SIZE=`WORD)(
    input      [SIZE-1:0] a, 
    input      [SIZE-1:0] b,
    input      [SIZE-1:0] c,
    input      [SIZE-1:0] d,
    input      [1:0]      control,
    output reg [SIZE-1:0] out
);

    always @*
        case(control)
            'b00: out <= a;
            'b01: out <= b;
            'b10: out <= c;
            'b11: out <= d;
        endcase

endmodule
module mux4 #(parameter SIZE=`WORD)(
    input      [SIZE-1:0] a, 
    input      [SIZE-1:0] b,
    input      [SIZE-1:0] c,
    input      [SIZE-1:0] d,
    input      [1:0]      control,
    output reg [SIZE-1:0] out
);


    always @*
        case(control)
            'b00: out <= a;
            'b01: out <= b;
            'b10: out <= c;
            'b11: out <= d;
        endcase

endmodule