data/full_repos/permissive/138208056/Dual_CSI-2_Camera_to_HDMI_Bridge_Demo/ECP5_Raw10toParallel/source/hdmi_i2c_top.v
1: b'%Warning-IMPLICIT: data/full_repos/permissive/138208056/Dual_CSI-2_Camera_to_HDMI_Bridge_Demo/ECP5_Raw10toParallel/source/hdmi_i2c_top.v:65: Signal definition not found, creating implicitly: \'i2c_data_rd\'\n                                                                                                                                           : ... Suggested alternative: \'data_rd\'\nassign i2c_data_rd= data_rd;\n       ^~~~~~~~~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/138208056/Dual_CSI-2_Camera_to_HDMI_Bridge_Demo/ECP5_Raw10toParallel/source/hdmi_i2c_top.v:32: Cannot find file containing module: \'hdmi_i2c_ctrl\'\n   hdmi_i2c_ctrl hdmi_i2c_ctrl_inst (     \n   ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/138208056/Dual_CSI-2_Camera_to_HDMI_Bridge_Demo/ECP5_Raw10toParallel/source,data/full_repos/permissive/138208056/hdmi_i2c_ctrl\n             data/full_repos/permissive/138208056/Dual_CSI-2_Camera_to_HDMI_Bridge_Demo/ECP5_Raw10toParallel/source,data/full_repos/permissive/138208056/hdmi_i2c_ctrl.v\n             data/full_repos/permissive/138208056/Dual_CSI-2_Camera_to_HDMI_Bridge_Demo/ECP5_Raw10toParallel/source,data/full_repos/permissive/138208056/hdmi_i2c_ctrl.sv\n             hdmi_i2c_ctrl\n             hdmi_i2c_ctrl.v\n             hdmi_i2c_ctrl.sv\n             obj_dir/hdmi_i2c_ctrl\n             obj_dir/hdmi_i2c_ctrl.v\n             obj_dir/hdmi_i2c_ctrl.sv\n%Error: data/full_repos/permissive/138208056/Dual_CSI-2_Camera_to_HDMI_Bridge_Demo/ECP5_Raw10toParallel/source/hdmi_i2c_top.v:48: Cannot find file containing module: \'hdmi_i2c_core\'\n   hdmi_i2c_core hdmi_i2c_core_inst ( \n   ^~~~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/138208056/Dual_CSI-2_Camera_to_HDMI_Bridge_Demo/ECP5_Raw10toParallel/source/hdmi_i2c_top.v:65: Operator ASSIGNW expects 1 bits on the Assign RHS, but Assign RHS\'s VARREF \'data_rd\' generates 8 bits.\n                                                                                                                                        : ... In instance hdmi_i2c_top\nassign i2c_data_rd= data_rd;\n                  ^\n%Error: Exiting due to 2 error(s), 2 warning(s)\n'
module hdmi_i2c_top (
   input  wire       rst_n,
   input  wire       clk, 
   inout  wire       scl,
   inout  wire       sda,
   output wire  	 config_done
   );

   wire       i2c_done;
   wire        cmd;
   wire [6:0]  addr_dev;
   wire [7:0]  addr_reg_H;
   wire [7:0]  addr_reg_L;
   wire [7:0]  data_wr_H;
   wire [7:0]  data_wr_L;
   wire [7:0]  data_rd;
   wire        i2c_rqt;
   

   hdmi_i2c_ctrl hdmi_i2c_ctrl_inst (     
      .rst_n         (rst_n       ),
      .clk           ( clk        ),
      .config_done   (config_done ),
      .cmd           (cmd         ),
      .addr_dev      (addr_dev    ),
      .addr_reg_H    (addr_reg_H  ),
      .addr_reg_L    (addr_reg_L  ),
      .data_wr_H     (data_wr_H   ),
      .data_wr_L     (data_wr_L   ),
      .data_rdy      (data_rdy    ),
      .data_rd       (data_rd     ),
      .i2c_done      (i2c_done    ),
      .i2c_rqt       (i2c_rqt     )    
        );
   
   hdmi_i2c_core hdmi_i2c_core_inst ( 
      .rst_n            (rst_n      ),                             
      .clk              ( clk       ),                                
      .scl              (scl        ),                                 
      .sda              (sda        ),                                 
      .i2c_rqt          (i2c_rqt    ),                     
      .cmd              (cmd        ),                             
      .addr_dev         (addr_dev   ),                   
      .addr_reg_H       (addr_reg_H ),
      .addr_reg_L       (addr_reg_L ),
      .data_wr_H        (data_wr_H  ),
      .data_wr_L        (data_wr_L  ),
      .data_rd          (data_rd    ),                         
      .data_rdy         (data_rdy   ),                       
      .i2c_done         (i2c_done   )                        
        );                                       
		
assign i2c_data_rd= data_rd;

endmodule
module hdmi_i2c_top (
   input  wire       rst_n,
   input  wire       clk, 
   inout  wire       scl,
   inout  wire       sda,
   output wire  	 config_done
   );


   wire       i2c_done;
   wire        cmd;
   wire [6:0]  addr_dev;
   wire [7:0]  addr_reg_H;
   wire [7:0]  addr_reg_L;
   wire [7:0]  data_wr_H;
   wire [7:0]  data_wr_L;
   wire [7:0]  data_rd;
   wire        i2c_rqt;
   

   hdmi_i2c_ctrl hdmi_i2c_ctrl_inst (     
      .rst_n         (rst_n       ),
      .clk           ( clk        ),
      .config_done   (config_done ),
      .cmd           (cmd         ),
      .addr_dev      (addr_dev    ),
      .addr_reg_H    (addr_reg_H  ),
      .addr_reg_L    (addr_reg_L  ),
      .data_wr_H     (data_wr_H   ),
      .data_wr_L     (data_wr_L   ),
      .data_rdy      (data_rdy    ),
      .data_rd       (data_rd     ),
      .i2c_done      (i2c_done    ),
      .i2c_rqt       (i2c_rqt     )    
        );
   
   hdmi_i2c_core hdmi_i2c_core_inst ( 
      .rst_n            (rst_n      ),                             
      .clk              ( clk       ),                                
      .scl              (scl        ),                                 
      .sda              (sda        ),                                 
      .i2c_rqt          (i2c_rqt    ),                     
      .cmd              (cmd        ),                             
      .addr_dev         (addr_dev   ),                   
      .addr_reg_H       (addr_reg_H ),
      .addr_reg_L       (addr_reg_L ),
      .data_wr_H        (data_wr_H  ),
      .data_wr_L        (data_wr_L  ),
      .data_rd          (data_rd    ),                         
      .data_rdy         (data_rdy   ),                       
      .i2c_done         (i2c_done   )                        
        );                                       
		
assign i2c_data_rd= data_rd;

endmodule