data/full_repos/permissive/19818566/software/host/davester_combinational_extractor/simple.v
None: at end of input
1: b"%Error: data/full_repos/permissive/19818566/software/host/davester_combinational_extractor/simple.v:11: Cannot find file containing module: 'DFFX1'\n   DFFX1 A_Reg (.CLK(clk),.D(IN1),.Q(IN1_reg));\n   ^~~~~\n        ... Looked in:\n             data/full_repos/permissive/19818566/software/host/davester_combinational_extractor,data/full_repos/permissive/19818566/DFFX1\n             data/full_repos/permissive/19818566/software/host/davester_combinational_extractor,data/full_repos/permissive/19818566/DFFX1.v\n             data/full_repos/permissive/19818566/software/host/davester_combinational_extractor,data/full_repos/permissive/19818566/DFFX1.sv\n             DFFX1\n             DFFX1.v\n             DFFX1.sv\n             obj_dir/DFFX1\n             obj_dir/DFFX1.v\n             obj_dir/DFFX1.sv\n%Error: data/full_repos/permissive/19818566/software/host/davester_combinational_extractor/simple.v:12: Cannot find file containing module: 'DFFX1'\n   DFFX1 B_Reg (.CLK(clk),.D(IN2),.Q(IN2_reg));\n   ^~~~~\n%Error: data/full_repos/permissive/19818566/software/host/davester_combinational_extractor/simple.v:13: Cannot find file containing module: 'DFFX1'\n   DFFX1 C_Reg (.CLK(clk),.D(IN3),.Q(IN3_reg));\n   ^~~~~\n%Error: data/full_repos/permissive/19818566/software/host/davester_combinational_extractor/simple.v:18: Cannot find file containing module: 'NAND2X1'\n   NAND2X1 nand1 (IN1_reg,IN2_reg,N1);\n   ^~~~~~~\n%Error: data/full_repos/permissive/19818566/software/host/davester_combinational_extractor/simple.v:19: Cannot find file containing module: 'AND2X1'\n   AND2X1 and1 (N1,IN3_reg,N2);\n   ^~~~~~\n%Error: data/full_repos/permissive/19818566/software/host/davester_combinational_extractor/simple.v:21: Cannot find file containing module: 'DFFX1'\n   DFFX1 D_Reg (.CLK(clk),.D(N2),.Q(Q));\n   ^~~~~\n%Error: Exiting due to 6 error(s)\n"
module simple (clk,IN1,IN2,IN3,Q,N2);
   
   
   input clk,IN1,IN2,IN3;
   output Q,N2;

   wire   IN1_reg,IN2_reg,IN3_reg;
   
   

   DFFX1 A_Reg (.CLK(clk),.D(IN1),.Q(IN1_reg));
   DFFX1 B_Reg (.CLK(clk),.D(IN2),.Q(IN2_reg));
   DFFX1 C_Reg (.CLK(clk),.D(IN3),.Q(IN3_reg));

   wire   N1;
   
   
   NAND2X1 nand1 (IN1_reg,IN2_reg,N1);
   AND2X1 and1 (N1,IN3_reg,N2);

   DFFX1 D_Reg (.CLK(clk),.D(N2),.Q(Q));

   
endmodule
module simple (clk,IN1,IN2,IN3,Q,N2);

   
   
   input clk,IN1,IN2,IN3;
   output Q,N2;

   wire   IN1_reg,IN2_reg,IN3_reg;
   
   

   DFFX1 A_Reg (.CLK(clk),.D(IN1),.Q(IN1_reg));
   DFFX1 B_Reg (.CLK(clk),.D(IN2),.Q(IN2_reg));
   DFFX1 C_Reg (.CLK(clk),.D(IN3),.Q(IN3_reg));

   wire   N1;
   
   
   NAND2X1 nand1 (IN1_reg,IN2_reg,N1);
   AND2X1 and1 (N1,IN3_reg,N2);

   DFFX1 D_Reg (.CLK(clk),.D(N2),.Q(Q));

   
endmodule