data/full_repos/permissive/160794640/example/interface1.v
 line:14: before: "."
data/verilator_xmls/6105db1a-e950-46e5-9c6b-787b6e764037.xml
module submodule (simple.dir1 conn);

   assign conn.simple1 = 32'h55AA;
   
   subsubmodule x1(.conn(conn), .rslt());
      
endmodule
module submodule (simple.dir1 conn);


   assign conn.simple1 = 32'h55AA;
   
   subsubmodule x1(.conn(conn), .rslt());
      
endmodule