data/full_repos/permissive/107735152/src/error/error_overload_block_TB.v
 line:2: before: "_block_TB"
1: b'%Error: data/full_repos/permissive/107735152/src/error/error_overload_block_TB.v:9: syntax error, unexpected \'(\', expecting IDENTIFIER\nerror_overload_block(reset, samplePoint, eofErro, crcErro, stuffErro, overloadFlag, erro, interframe);\n                     ^~~~~\n%Warning-STMTDLY: data/full_repos/permissive/107735152/src/error/error_overload_block_TB.v:17: Unsupported: Ignoring delay on this delayed statement.\n #5 samplePoint = ~samplePoint;\n ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/107735152/src/error/error_overload_block_TB.v:21: Unsupported: Ignoring delay on this delayed statement.\n  reset = 1\'b0; stuffErro = 1\'b1; eofErro = 1\'b1; crcErro = 1\'b1;  #5;\n                                                                   ^\n%Warning-STMTDLY: data/full_repos/permissive/107735152/src/error/error_overload_block_TB.v:22: Unsupported: Ignoring delay on this delayed statement.\n  reset = 1\'b0; stuffErro = 1\'b0; eofErro = 1\'b1; crcErro = 1\'b1;  #5;\n                                                                   ^\n%Warning-STMTDLY: data/full_repos/permissive/107735152/src/error/error_overload_block_TB.v:23: Unsupported: Ignoring delay on this delayed statement.\n  reset = 1\'b0; stuffErro = 1\'b1; eofErro = 1\'b1; crcErro = 1\'b1;  #5;\n                                                                   ^\n%Warning-STMTDLY: data/full_repos/permissive/107735152/src/error/error_overload_block_TB.v:24: Unsupported: Ignoring delay on this delayed statement.\n  reset = 1\'b0; stuffErro = 1\'b1; eofErro = 1\'b0; crcErro = 1\'b1;  #5;\n                                                                   ^\n%Warning-STMTDLY: data/full_repos/permissive/107735152/src/error/error_overload_block_TB.v:25: Unsupported: Ignoring delay on this delayed statement.\n  reset = 1\'b0; stuffErro = 1\'b1; eofErro = 1\'b1; crcErro = 1\'b1;  #5;\n                                                                   ^\n%Warning-STMTDLY: data/full_repos/permissive/107735152/src/error/error_overload_block_TB.v:26: Unsupported: Ignoring delay on this delayed statement.\n  reset = 1\'b0; stuffErro = 1\'b1; eofErro = 1\'b1; crcErro = 1\'b0;  #5;\n                                                                   ^\n%Warning-STMTDLY: data/full_repos/permissive/107735152/src/error/error_overload_block_TB.v:27: Unsupported: Ignoring delay on this delayed statement.\n  reset = 1\'b0; stuffErro = 1\'b1; eofErro = 1\'b1; crcErro = 1\'b1;  #5;\n                                                                   ^\n%Warning-STMTDLY: data/full_repos/permissive/107735152/src/error/error_overload_block_TB.v:28: Unsupported: Ignoring delay on this delayed statement.\n  reset = 1\'b0; stuffErro = 1\'b1; eofErro = 1\'b1; crcErro = 1\'b1;  #5;\n                                                                   ^\n%Warning-STMTDLY: data/full_repos/permissive/107735152/src/error/error_overload_block_TB.v:29: Unsupported: Ignoring delay on this delayed statement.\n  reset = 1\'b0; stuffErro = 1\'b1; eofErro = 1\'b1; crcErro = 1\'b1;  #5;\n                                                                   ^\n%Warning-STMTDLY: data/full_repos/permissive/107735152/src/error/error_overload_block_TB.v:30: Unsupported: Ignoring delay on this delayed statement.\n  reset = 1\'b0; stuffErro = 1\'b1; eofErro = 1\'b1; crcErro = 1\'b1;  #5;\n                                                                   ^\n%Warning-STMTDLY: data/full_repos/permissive/107735152/src/error/error_overload_block_TB.v:31: Unsupported: Ignoring delay on this delayed statement.\n  reset = 1\'b0; stuffErro = 1\'b1; eofErro = 1\'b1; crcErro = 1\'b1;  #5;\n                                                                   ^\n%Warning-STMTDLY: data/full_repos/permissive/107735152/src/error/error_overload_block_TB.v:32: Unsupported: Ignoring delay on this delayed statement.\n  reset = 1\'b0; stuffErro = 1\'b1; eofErro = 1\'b1; crcErro = 1\'b1;  #5;\n                                                                   ^\n%Error: Exiting due to 1 error(s), 13 warning(s)\n'
module error_overload_block_TB;

reg reset, samplePoint, 
	eofErro, crcErro, stuffErro, overloadFlag;
	
reg erro;
wire saida;

error_overload_block(reset, samplePoint, eofErro, crcErro, stuffErro, overloadFlag, erro, interframe);

	initial begin
		reset = 1;
		samplePoint = 0;
	end
	
	always
	#5 samplePoint = ~samplePoint;
	
	initial begin
		
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b0; eofErro = 1'b1; crcErro = 1'b1;	 #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b0; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b0;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		
		$stop;
		
	end
endmodule
module error_overload_block_TB;


reg reset, samplePoint, 
	eofErro, crcErro, stuffErro, overloadFlag;
	
reg erro;
wire saida;

error_overload_block(reset, samplePoint, eofErro, crcErro, stuffErro, overloadFlag, erro, interframe);

	initial begin
		reset = 1;
		samplePoint = 0;
	end
	
	always
	#5 samplePoint = ~samplePoint;
	
	initial begin
		
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b0; eofErro = 1'b1; crcErro = 1'b1;	 #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b0; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b0;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		reset = 1'b0; stuffErro = 1'b1; eofErro = 1'b1; crcErro = 1'b1;  #5;
		
		$stop;
		
	end
endmodule