data/full_repos/permissive/207890020/cmp_tb.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Error: data/full_repos/permissive/207890020/cmp_tb.v:14: Cannot find include file: Compare10.vh\n`include "Compare10.vh" \n         ^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/207890020,data/full_repos/permissive/207890020/Compare10.vh\n             data/full_repos/permissive/207890020,data/full_repos/permissive/207890020/Compare10.vh.v\n             data/full_repos/permissive/207890020,data/full_repos/permissive/207890020/Compare10.vh.sv\n             Compare10.vh\n             Compare10.vh.v\n             Compare10.vh.sv\n             obj_dir/Compare10.vh\n             obj_dir/Compare10.vh.v\n             obj_dir/Compare10.vh.sv\n%Warning-STMTDLY: data/full_repos/permissive/207890020/cmp_tb.v:59: Unsupported: Ignoring delay on this delayed statement.\n  #1;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/207890020/cmp_tb.v:79: Define or directive not defined: \'`CMP10_ULT\'\n  TestOneFcn(`CMP10_ULT, "ULT", a < b);\n             ^~~~~~~~~~\n%Error: data/full_repos/permissive/207890020/cmp_tb.v:80: Define or directive not defined: \'`CMP10_ULE\'\n  TestOneFcn(`CMP10_ULE, "ULE", a <= b);\n             ^~~~~~~~~~\n%Error: data/full_repos/permissive/207890020/cmp_tb.v:81: Define or directive not defined: \'`CMP10_SLT\'\n  TestOneFcn(`CMP10_SLT, "SLT", sa < sb);\n             ^~~~~~~~~~\n%Error: data/full_repos/permissive/207890020/cmp_tb.v:82: Define or directive not defined: \'`CMP10_SLE\'\n  TestOneFcn(`CMP10_SLE, "SLE", sa <= sb);\n             ^~~~~~~~~~\n%Error: data/full_repos/permissive/207890020/cmp_tb.v:83: Define or directive not defined: \'`CMP10_EQU\'\n  TestOneFcn(`CMP10_EQU, "EQU", a == b);\n             ^~~~~~~~~~\n%Error: data/full_repos/permissive/207890020/cmp_tb.v:84: Define or directive not defined: \'`CMP10_UGE\'\n  TestOneFcn(`CMP10_UGE, "UGE", a >= b);\n             ^~~~~~~~~~\n%Error: data/full_repos/permissive/207890020/cmp_tb.v:85: Define or directive not defined: \'`CMP10_UGT\'\n  TestOneFcn(`CMP10_UGT, "UGT", a > b);\n             ^~~~~~~~~~\n%Error: data/full_repos/permissive/207890020/cmp_tb.v:86: Define or directive not defined: \'`CMP10_SGE\'\n  TestOneFcn(`CMP10_SGE, "SGE", sa >= sb);\n             ^~~~~~~~~~\n%Error: data/full_repos/permissive/207890020/cmp_tb.v:87: Define or directive not defined: \'`CMP10_SGT\'\n  TestOneFcn(`CMP10_SGT, "SGT", sa > sb);\n             ^~~~~~~~~~\n%Error: data/full_repos/permissive/207890020/cmp_tb.v:88: Define or directive not defined: \'`CMP10_NEQ\'\n  TestOneFcn(`CMP10_NEQ, "NEQ", a != b);\n             ^~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/207890020/cmp_tb.v:107: Unsupported: Ignoring delay on this delayed statement.\n  #100;\n  ^\n%Error: data/full_repos/permissive/207890020/cmp_tb.v:111: Unsupported or unknown PLI call: $timeformat\n  $timeformat (-9, 0, " ns", 7);\n  ^~~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/207890020/cmp_tb.v:130: Unsupported: Ignoring delay on this delayed statement.\n  #10;\n  ^\n%Error: data/full_repos/permissive/207890020/cmp_tb.v:135: Unsupported: Seeding $random doesn\'t map to C++, use $c("srand")\n    ra = {$random(SEED)} % LIMIT;\n          ^~~~~~~\n%Error: Internal Error: data/full_repos/permissive/207890020/cmp_tb.v:135: ../V3Ast.cpp:358: Null item passed to setOp1p\n    ra = {$random(SEED)} % LIMIT;\n         ^\n'
module cmp_tb;
	parameter	W = 8;
	parameter	SEED = 20190909;
	parameter	COUNT = 100;

	localparam	N = W - 1;
	localparam	LIMIT = (2 ** W);


	reg [3:0]	fcn;
	reg [N:0]	a;
	reg [N:0]	b;


	wire			o;


	reg [N:0]	z0, p1, n1;
	reg [N:0]	ra, rb;


	task TestOneFcn;
		input [ 3:0]	fcn_i;
		input [23:0]	name_i;
		input				answer_i;
	begin
		fcn = fcn_i;
		#1;
		$display("%t: %s(%x,%x) expected %b actual %b",
					$time, name_i, a, b, answer_i, o);
		if (o != answer_i)
			$stop;
	end
	endtask

	task TestBenchTask;
		input[N:0] a_i;
		input[N:0] b_i;
	begin : TBT
		reg signed	[N:0] sa, sb;
		sa = $signed(a_i);
		sb = $signed(b_i);


		a = a_i;
		b = b_i;

		TestOneFcn(`CMP10_ULT, "ULT", a < b);
		TestOneFcn(`CMP10_ULE, "ULE", a <= b);
		TestOneFcn(`CMP10_SLT, "SLT", sa < sb);
		TestOneFcn(`CMP10_SLE, "SLE", sa <= sb);
		TestOneFcn(`CMP10_EQU, "EQU", a == b);
		TestOneFcn(`CMP10_UGE, "UGE", a >= b);
		TestOneFcn(`CMP10_UGT, "UGT", a > b);
		TestOneFcn(`CMP10_SGE, "SGE", sa >= sb);
		TestOneFcn(`CMP10_SGT, "SGT", sa > sb);
		TestOneFcn(`CMP10_NEQ, "NEQ", a != b);
	end : TBT
	endtask


	Compare10 #(W) uut (
		.fcn(fcn), 
		.a(a), 
		.b(b), 
		.o(o)
	);

	initial begin

		fcn = 0;
		a = 0;
		b = 0;


		#100;
		  

		$display("\nPOSITIVE TESTS:  No $stop expected (yet) ...");
		$timeformat (-9, 0, " ns", 7);

		z0 = {W{1'b0}};
		n1 = {W{1'b1}};
		p1 = { {N{1'b0}}, 1'b1 };

		TestBenchTask(z0, z0);
		TestBenchTask(z0, p1);
		TestBenchTask(z0, n1);
		TestBenchTask(p1, z0);
		TestBenchTask(p1, p1);
		TestBenchTask(p1, n1);
		TestBenchTask(n1, z0);
		TestBenchTask(n1, p1);
		TestBenchTask(n1, n1);

		$display("\nNEGATIVE TEST:  Bad function should cause a $stop inside");
		$display("\tCompare10 (then you can click Run to finish testing) ...");
		fcn = 4'hF;
		#10;

		$display("\nRANDOM TESTS:  Operands by $random(%1d) ...", SEED);
		if (W < 32) begin
			repeat(COUNT) begin
				ra = {$random(SEED)} % LIMIT;
				rb = {$random(SEED)} % LIMIT;
				TestBenchTask(ra, rb);
			end
		end
		else if (W == 32) begin
			repeat(COUNT) begin
				ra = $random(SEED);
				rb = $random(SEED);
				TestBenchTask(ra, rb);
			end
		end
		else begin
			$display("ERROR: $random tests not supported for WIDTH > 32!\n");
		end

		$display("\nTests Complete at simulation time %t.\n", $time);
		$finish;
	end
      
endmodule
module cmp_tb;

	parameter	W = 8;
	parameter	SEED = 20190909;
	parameter	COUNT = 100;

	localparam	N = W - 1;
	localparam	LIMIT = (2 ** W);


	reg [3:0]	fcn;
	reg [N:0]	a;
	reg [N:0]	b;


	wire			o;


	reg [N:0]	z0, p1, n1;
	reg [N:0]	ra, rb;


	task TestOneFcn;
		input [ 3:0]	fcn_i;
		input [23:0]	name_i;
		input				answer_i;
	begin
		fcn = fcn_i;
		#1;
		$display("%t: %s(%x,%x) expected %b actual %b",
					$time, name_i, a, b, answer_i, o);
		if (o != answer_i)
			$stop;
	end
	endtask

	task TestBenchTask;
		input[N:0] a_i;
		input[N:0] b_i;
	begin : TBT
		reg signed	[N:0] sa, sb;
		sa = $signed(a_i);
		sb = $signed(b_i);


		a = a_i;
		b = b_i;

		TestOneFcn(`CMP10_ULT, "ULT", a < b);
		TestOneFcn(`CMP10_ULE, "ULE", a <= b);
		TestOneFcn(`CMP10_SLT, "SLT", sa < sb);
		TestOneFcn(`CMP10_SLE, "SLE", sa <= sb);
		TestOneFcn(`CMP10_EQU, "EQU", a == b);
		TestOneFcn(`CMP10_UGE, "UGE", a >= b);
		TestOneFcn(`CMP10_UGT, "UGT", a > b);
		TestOneFcn(`CMP10_SGE, "SGE", sa >= sb);
		TestOneFcn(`CMP10_SGT, "SGT", sa > sb);
		TestOneFcn(`CMP10_NEQ, "NEQ", a != b);
	end : TBT
	endtask


	Compare10 #(W) uut (
		.fcn(fcn), 
		.a(a), 
		.b(b), 
		.o(o)
	);

	initial begin

		fcn = 0;
		a = 0;
		b = 0;


		#100;
		  

		$display("\nPOSITIVE TESTS:  No $stop expected (yet) ...");
		$timeformat (-9, 0, " ns", 7);

		z0 = {W{1'b0}};
		n1 = {W{1'b1}};
		p1 = { {N{1'b0}}, 1'b1 };

		TestBenchTask(z0, z0);
		TestBenchTask(z0, p1);
		TestBenchTask(z0, n1);
		TestBenchTask(p1, z0);
		TestBenchTask(p1, p1);
		TestBenchTask(p1, n1);
		TestBenchTask(n1, z0);
		TestBenchTask(n1, p1);
		TestBenchTask(n1, n1);

		$display("\nNEGATIVE TEST:  Bad function should cause a $stop inside");
		$display("\tCompare10 (then you can click Run to finish testing) ...");
		fcn = 4'hF;
		#10;

		$display("\nRANDOM TESTS:  Operands by $random(%1d) ...", SEED);
		if (W < 32) begin
			repeat(COUNT) begin
				ra = {$random(SEED)} % LIMIT;
				rb = {$random(SEED)} % LIMIT;
				TestBenchTask(ra, rb);
			end
		end
		else if (W == 32) begin
			repeat(COUNT) begin
				ra = $random(SEED);
				rb = $random(SEED);
				TestBenchTask(ra, rb);
			end
		end
		else begin
			$display("ERROR: $random tests not supported for WIDTH > 32!\n");
		end

		$display("\nTests Complete at simulation time %t.\n", $time);
		$finish;
	end
      
endmodule