data/full_repos/permissive/157979234/Semester III/Digital Design and Computer Organization/Session 05/my_mods.v
1: b'%Error: Cannot find file containing module: III/Digital\n        ... Looked in:\n             data/full_repos/permissive/157979234/Semester/III/Digital\n             data/full_repos/permissive/157979234/Semester/III/Digital.v\n             data/full_repos/permissive/157979234/Semester/III/Digital.sv\n             III/Digital\n             III/Digital.v\n             III/Digital.sv\n             obj_dir/III/Digital\n             obj_dir/III/Digital.v\n             obj_dir/III/Digital.sv\n%Error: Cannot find file containing module: Design\n%Error: Cannot find file containing module: and\n%Error: Cannot find file containing module: Computer\n%Error: Cannot find file containing module: Organization/Session\n%Error: Cannot find file containing module: 05,data/full_repos/permissive/157979234\n%Error: Cannot find file containing module: data/full_repos/permissive/157979234/Semester\n%Error: Cannot find file containing module: 05/my_mods.v\n%Error: Exiting due to 8 error(s)\n'
module mux_2
(
input wire[0:15]
q0,
q1,
input wire
j,
output wire[0:15]
o
);

mux2 m0(q0[0], q1[0], j, o[0]);
mux2 m1(q0[1], q1[1], j, o[1]);
mux2 m2(q0[2], q1[2], j, o[2]);
mux2 m3(q0[3], q1[3], j, o[3]);
mux2 m4(q0[4], q1[4], j, o[4]);
mux2 m5(q0[5], q1[5], j, o[5]);
mux2 m6(q0[6], q1[6], j, o[6]);
mux2 m7(q0[7], q1[7], j, o[7]);
mux2 m8(q0[8], q1[8], j, o[8]);
mux2 m9(q0[9], q1[9], j, o[9]);
mux2 m10(q0[10], q1[10], j, o[10]);
mux2 m11(q0[11], q1[11], j, o[11]);
mux2 m12(q0[12], q1[12], j, o[12]);
mux2 m13(q0[13], q1[13], j, o[13]);
mux2 m14(q0[14], q1[14], j, o[14]);
mux2 m15(q0[15], q1[15], j, o[15]);

endmodule
module mux_2
(
input wire[0:15]
q0,
q1,
input wire
j,
output wire[0:15]
o
);


mux2 m0(q0[0], q1[0], j, o[0]);
mux2 m1(q0[1], q1[1], j, o[1]);
mux2 m2(q0[2], q1[2], j, o[2]);
mux2 m3(q0[3], q1[3], j, o[3]);
mux2 m4(q0[4], q1[4], j, o[4]);
mux2 m5(q0[5], q1[5], j, o[5]);
mux2 m6(q0[6], q1[6], j, o[6]);
mux2 m7(q0[7], q1[7], j, o[7]);
mux2 m8(q0[8], q1[8], j, o[8]);
mux2 m9(q0[9], q1[9], j, o[9]);
mux2 m10(q0[10], q1[10], j, o[10]);
mux2 m11(q0[11], q1[11], j, o[11]);
mux2 m12(q0[12], q1[12], j, o[12]);
mux2 m13(q0[13], q1[13], j, o[13]);
mux2 m14(q0[14], q1[14], j, o[14]);
mux2 m15(q0[15], q1[15], j, o[15]);

endmodule