data/full_repos/permissive/210844779/lab1/1.2.2/mux2x1.v
data/verilator_xmls/0af9d612-2873-435c-95db-bc792e2f8c46.xml
module mux2x1(I,S,Y);

input [1:0]I;
input S;
output Y;

assign Y=S?I[1]:I[0];

endmodule
module mux2x1(I,S,Y);


input [1:0]I;
input S;
output Y;

assign Y=S?I[1]:I[0];

endmodule