data/full_repos/permissive/140493787/src/hdl/mux.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/140493787/src/hdl/mux.v:40: Multiple top level modules\n                                                                        : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                        : ... Top module \'bus_mux_2_1\'\nmodule bus_mux_2_1 #(parameter WIDTH = 64) (\n       ^~~~~~~~~~~\n                                                                        : ... Top module \'mux_4_1\'\nmodule mux_4_1 (\n       ^~~~~~~\n%Error: Exiting due to 1 warning(s)\n'
module bus_mux_2_1 #(parameter WIDTH = 64) (
   output wire [WIDTH - 1 : 0] out,
   input  wire [WIDTH - 1 : 0] in0,
   input  wire [WIDTH - 1 : 0] in1,
   input  wire                 sel
);

   genvar i;
   generate
      for (i = 0; i < WIDTH; i = i + 1) begin : muxes
         mux_2_1 m (.out(out[i]), .in0(in0[i]), .in1(in1[i]), .sel(sel));
      end
   endgenerate
endmodule
module bus_mux_2_1 #(parameter WIDTH = 64) (
   output wire [WIDTH - 1 : 0] out,
   input  wire [WIDTH - 1 : 0] in0,
   input  wire [WIDTH - 1 : 0] in1,
   input  wire                 sel
);


   genvar i;
   generate
      for (i = 0; i < WIDTH; i = i + 1) begin : muxes
         mux_2_1 m (.out(out[i]), .in0(in0[i]), .in1(in1[i]), .sel(sel));
      end
   endgenerate
endmodule