data/full_repos/permissive/143278/ivltests/iint_test.v
 line:13: before: "bu"
1: b'%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/iint_test.v:32: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/iint_test.v:34: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/iint_test.v:41: Unsupported: Ignoring delay on this delayed statement.\n    # 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/iint_test.v:45: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/iint_test.v:49: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/iint_test.v:56: Unsupported: Ignoring delay on this delayed statement.\n    # 1;\n    ^\n%Error: Exiting due to 6 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
function [31:0] xz_expected (input [31:0] value_xz);
      integer i;
      begin
        for (i=0; i<32; i=i+1)
          begin
             if (value_xz[i] === 1'bx || value_xz[i] === 1'bz )
                 value_xz[i] = 1'b0;
          end
          xz_expected = value_xz;
      end
  endfunction
function [31:0] xz_expected (input [31:0] value_xz);

      integer i;
      begin
        for (i=0; i<32; i=i+1)
          begin
             if (value_xz[i] === 1'bx || value_xz[i] === 1'bz )
                 value_xz[i] = 1'b0;
          end
          xz_expected = value_xz;
      end
  endfunction