data/full_repos/permissive/138713719/hdl/ntsc_sync.v
1: b'%Warning-WIDTH: data/full_repos/permissive/138713719/hdl/ntsc_sync.v:177: Operator COND expects 10 bits on the Conditional False, but Conditional False\'s CONST \'9\'h0\' generates 9 bits.\n                                                                        : ... In instance ntsc_sync\n    assign y = (active_video) ? (line_ff - VS_ACTIVE_TOP) : 9\'d0;\n                              ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/138713719/hdl/ntsc_sync.v:177: Operator ASSIGNW expects 9 bits on the Assign RHS, but Assign RHS\'s COND generates 10 bits.\n                                                                        : ... In instance ntsc_sync\n    assign y = (active_video) ? (line_ff - VS_ACTIVE_TOP) : 9\'d0;\n             ^\n%Error: Exiting due to 2 warning(s)\n'
module ntsc_sync
    (
    input wire clk,
    input wire rst,

    input wire pixel_tick,
    
    output wire [9:0] x,
    output wire [8:0] y,
    
    output wire active_video,    
    
    output wire hsync,
    output wire vsync
    );
	
	

   

    localparam HS_FRONT_PORCH  = 10'd19,
               HS_SYNC_TIP     = 10'd59,
               HS_HALF_LINE    = 10'd397,
               HS_FULL_LINE    = 10'd794,
               HS_EQUAL_PULSE  = 10'd29,
               HS_SERRATION    = 10'd59;
    

    localparam VS_SERRATION    = 10'd6,
               VS_POST_EQUAL   = 10'd12,
               VS_BLANK        = 10'd18;
    

    localparam HS_ACTIVE_LEFT  = 10'd165,
               HS_ACTIVE_RIGHT = 10'd764,
               VS_ACTIVE_TOP   = 10'd58,
               VS_ACTIVE_BTM   = 10'd507;
    

    localparam HALF_LINE_EVEN  = 10'd18,
               HALF_LINE_ODD   = 10'd525;
    

    localparam FIELD_END_EVEN  = 10'd524,
               FIELD_END_ODD   = 10'd525;
    
    

    

    reg [9:0] h_count_ff, h_count_ns;
    reg [9:0] line_ff, line_ns;
    

    wire half_line, end_of_line;


    wire hsync_equalizing_en, hsync_equalizing;
    wire hsync_serration_en, hsync_serration;
    wire hsync_tip_en, hsync_tip;
    
    




    always @(posedge clk, posedge rst)
        if(rst)
            begin
                h_count_ff <= 10'd0;
                line_ff <= 10'd1;
            end
        else
            begin
                h_count_ff <= h_count_ns;
                line_ff <= line_ns;
            end
    

    assign half_line = (line_ff == HALF_LINE_EVEN) ||
                       (line_ff == HALF_LINE_ODD);
    assign end_of_line = ((h_count_ff == HS_FULL_LINE - 10'd1) && !half_line) ||
                         ((h_count_ff == HS_HALF_LINE - 10'd1) && half_line);
        

    always @*
        begin
            h_count_ns = h_count_ff;
            line_ns = line_ff;
            
            if(pixel_tick)
                if(end_of_line)
                    begin
                        h_count_ns = 10'd0;
                        
                        if(line_ff == FIELD_END_EVEN)
                            line_ns = 10'd1;
                        else if(line_ff == FIELD_END_ODD)
                            line_ns = 10'd0;
                        else
                            line_ns = line_ff + 10'd2;
                    end
                else
                    h_count_ns = h_count_ff + 10'd1;
        end
    
    



    assign hsync_equalizing_en = (line_ff < VS_SERRATION) ||
                                 ((line_ff >= VS_POST_EQUAL) &&
                                  (line_ff < VS_BLANK));
    assign hsync_equalizing = (h_count_ff < HS_EQUAL_PULSE) ||
                              ((h_count_ff >= HS_HALF_LINE) &&
                               (h_count_ff < (HS_HALF_LINE + HS_EQUAL_PULSE)));
    

    assign hsync_serration_en = (line_ff >= VS_SERRATION) &&
                                (line_ff < VS_POST_EQUAL);
    assign hsync_serration = ((h_count_ff >= (HS_HALF_LINE - HS_SERRATION)) &&
                              (h_count_ff < HS_HALF_LINE)) ||
                             (h_count_ff >= HS_FULL_LINE - HS_SERRATION);
    

    assign hsync_tip_en = line_ff > VS_BLANK;
    assign hsync_tip = (h_count_ff >= HS_FRONT_PORCH) &&
                       (h_count_ff < (HS_FRONT_PORCH + HS_SYNC_TIP));
	
	



    assign x = (active_video) ? (h_count_ff - HS_ACTIVE_LEFT) : 10'd0;
    assign y = (active_video) ? (line_ff - VS_ACTIVE_TOP) : 9'd0;
    
    assign active_video = ((h_count_ff >= HS_ACTIVE_LEFT) &&
                           (h_count_ff <= HS_ACTIVE_RIGHT)) &&
                          ((line_ff >= VS_ACTIVE_TOP) &&
                           (line_ff <= VS_ACTIVE_BTM));
    
    assign hsync = (hsync_equalizing_en & hsync_equalizing) |
                   (hsync_serration_en & hsync_serration) |
                   (hsync_tip_en & hsync_tip);
    assign vsync = (line_ff >= VS_SERRATION) && (line_ff < VS_POST_EQUAL);
    
endmodule
module ntsc_sync
    (
    input wire clk,
    input wire rst,

    input wire pixel_tick,
    
    output wire [9:0] x,
    output wire [8:0] y,
    
    output wire active_video,    
    
    output wire hsync,
    output wire vsync
    );

	
	

   

    localparam HS_FRONT_PORCH  = 10'd19,
               HS_SYNC_TIP     = 10'd59,
               HS_HALF_LINE    = 10'd397,
               HS_FULL_LINE    = 10'd794,
               HS_EQUAL_PULSE  = 10'd29,
               HS_SERRATION    = 10'd59;
    

    localparam VS_SERRATION    = 10'd6,
               VS_POST_EQUAL   = 10'd12,
               VS_BLANK        = 10'd18;
    

    localparam HS_ACTIVE_LEFT  = 10'd165,
               HS_ACTIVE_RIGHT = 10'd764,
               VS_ACTIVE_TOP   = 10'd58,
               VS_ACTIVE_BTM   = 10'd507;
    

    localparam HALF_LINE_EVEN  = 10'd18,
               HALF_LINE_ODD   = 10'd525;
    

    localparam FIELD_END_EVEN  = 10'd524,
               FIELD_END_ODD   = 10'd525;
    
    

    

    reg [9:0] h_count_ff, h_count_ns;
    reg [9:0] line_ff, line_ns;
    

    wire half_line, end_of_line;


    wire hsync_equalizing_en, hsync_equalizing;
    wire hsync_serration_en, hsync_serration;
    wire hsync_tip_en, hsync_tip;
    
    




    always @(posedge clk, posedge rst)
        if(rst)
            begin
                h_count_ff <= 10'd0;
                line_ff <= 10'd1;
            end
        else
            begin
                h_count_ff <= h_count_ns;
                line_ff <= line_ns;
            end
    

    assign half_line = (line_ff == HALF_LINE_EVEN) ||
                       (line_ff == HALF_LINE_ODD);
    assign end_of_line = ((h_count_ff == HS_FULL_LINE - 10'd1) && !half_line) ||
                         ((h_count_ff == HS_HALF_LINE - 10'd1) && half_line);
        

    always @*
        begin
            h_count_ns = h_count_ff;
            line_ns = line_ff;
            
            if(pixel_tick)
                if(end_of_line)
                    begin
                        h_count_ns = 10'd0;
                        
                        if(line_ff == FIELD_END_EVEN)
                            line_ns = 10'd1;
                        else if(line_ff == FIELD_END_ODD)
                            line_ns = 10'd0;
                        else
                            line_ns = line_ff + 10'd2;
                    end
                else
                    h_count_ns = h_count_ff + 10'd1;
        end
    
    



    assign hsync_equalizing_en = (line_ff < VS_SERRATION) ||
                                 ((line_ff >= VS_POST_EQUAL) &&
                                  (line_ff < VS_BLANK));
    assign hsync_equalizing = (h_count_ff < HS_EQUAL_PULSE) ||
                              ((h_count_ff >= HS_HALF_LINE) &&
                               (h_count_ff < (HS_HALF_LINE + HS_EQUAL_PULSE)));
    

    assign hsync_serration_en = (line_ff >= VS_SERRATION) &&
                                (line_ff < VS_POST_EQUAL);
    assign hsync_serration = ((h_count_ff >= (HS_HALF_LINE - HS_SERRATION)) &&
                              (h_count_ff < HS_HALF_LINE)) ||
                             (h_count_ff >= HS_FULL_LINE - HS_SERRATION);
    

    assign hsync_tip_en = line_ff > VS_BLANK;
    assign hsync_tip = (h_count_ff >= HS_FRONT_PORCH) &&
                       (h_count_ff < (HS_FRONT_PORCH + HS_SYNC_TIP));
	
	



    assign x = (active_video) ? (h_count_ff - HS_ACTIVE_LEFT) : 10'd0;
    assign y = (active_video) ? (line_ff - VS_ACTIVE_TOP) : 9'd0;
    
    assign active_video = ((h_count_ff >= HS_ACTIVE_LEFT) &&
                           (h_count_ff <= HS_ACTIVE_RIGHT)) &&
                          ((line_ff >= VS_ACTIVE_TOP) &&
                           (line_ff <= VS_ACTIVE_BTM));
    
    assign hsync = (hsync_equalizing_en & hsync_equalizing) |
                   (hsync_serration_en & hsync_serration) |
                   (hsync_tip_en & hsync_tip);
    assign vsync = (line_ff >= VS_SERRATION) && (line_ff < VS_POST_EQUAL);
    
endmodule