data/full_repos/permissive/143278/ivltests/always_comb.v
 line:5: before: "("
1: b'%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/always_comb.v:26: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/always_comb.v:34: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/always_comb.v:42: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/always_comb.v:50: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/always_comb.v:59: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/always_comb.v:68: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n%Error: Exiting due to 6 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
function f_and (input i1, i2);
    reg  partial;
    begin
      partial = i1 & i2;
      f_and = partial | hidden;
    end
  endfunction
function f_and (input i1, i2);

    reg  partial;
    begin
      partial = i1 & i2;
      f_and = partial | hidden;
    end
  endfunction