data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v
 line:8: before: "]"
1: b'%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:31: Bit extraction of var[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n  if (clk_locked) coaxinreg[i]<=coax_in[i];\n                           ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:31: Bit extraction of var[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n  if (clk_locked) coaxinreg[i]<=coax_in[i];\n                                       ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:32: Bit extraction of var[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n  else coaxinreg[i]<=0;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:33: Bit extraction of var[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n  if (i<4) coax_out[i] <= (Tin[i][0]>0);  \n                   ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:33: Bit extraction of array[3:0] requires 2 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n  if (i<4) coax_out[i] <= (Tin[i][0]>0);  \n                              ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:34: Bit extraction of var[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n  else coax_out[i] <= coaxinreg[i];  \n               ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:34: Bit extraction of var[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n  else coax_out[i] <= coaxinreg[i];  \n                               ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:35: Bit extraction of array[7:0] requires 3 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n  if (i<8) histosout[i]<=histos[i][histostosend2];\n                    ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:35: Bit extraction of array[7:0] requires 3 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n  if (i<8) histosout[i]<=histos[i][histostosend2];\n                               ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:35: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n  if (i<8) histosout[i]<=histos[i][histostosend2];\n                                  ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:85: Bit extraction of array[3:0] requires 2 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n     if (coaxinreg[j] && Pulsecounter==i) Trecovery[i][j] <= Trecovery[i][j]+1;\n                                                   ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:85: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n     if (coaxinreg[j] && Pulsecounter==i) Trecovery[i][j] <= Trecovery[i][j]+1;\n                                                      ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:85: Bit extraction of array[3:0] requires 2 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n     if (coaxinreg[j] && Pulsecounter==i) Trecovery[i][j] <= Trecovery[i][j]+1;\n                                                                      ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:85: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n     if (coaxinreg[j] && Pulsecounter==i) Trecovery[i][j] <= Trecovery[i][j]+1;\n                                                                         ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:85: Bit extraction of var[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n     if (coaxinreg[j] && Pulsecounter==i) Trecovery[i][j] <= Trecovery[i][j]+1;\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:85: Operator EQ expects 8 bits on the LHS, but LHS\'s VARREF \'Pulsecounter\' generates 2 bits.\n                                                                                                    : ... In instance LED_4\n     if (coaxinreg[j] && Pulsecounter==i) Trecovery[i][j] <= Trecovery[i][j]+1;\n                                     ^~\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:86: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n     if (Trecovery[i][j]/2==27 && Trecovery[(i+1)%4][j]==0 && Trecovery[(i+2)%4][j]==0 && Trecovery[(i+3)%4][j]==0) delaycounter[j] <= i+1;\n                                                                                                                                ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:86: Operator ASSIGNDLY expects 3 bits on the Assign RHS, but Assign RHS\'s ADD generates 32 or 8 bits.\n                                                                                                    : ... In instance LED_4\n     if (Trecovery[i][j]/2==27 && Trecovery[(i+1)%4][j]==0 && Trecovery[(i+2)%4][j]==0 && Trecovery[(i+3)%4][j]==0) delaycounter[j] <= i+1;\n                                                                                                                                    ^~\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:86: Bit extraction of array[3:0] requires 2 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n     if (Trecovery[i][j]/2==27 && Trecovery[(i+1)%4][j]==0 && Trecovery[(i+2)%4][j]==0 && Trecovery[(i+3)%4][j]==0) delaycounter[j] <= i+1;\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:86: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n     if (Trecovery[i][j]/2==27 && Trecovery[(i+1)%4][j]==0 && Trecovery[(i+2)%4][j]==0 && Trecovery[(i+3)%4][j]==0) delaycounter[j] <= i+1;\n                     ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:86: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n     if (Trecovery[i][j]/2==27 && Trecovery[(i+1)%4][j]==0 && Trecovery[(i+2)%4][j]==0 && Trecovery[(i+3)%4][j]==0) delaycounter[j] <= i+1;\n                                                    ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:86: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n     if (Trecovery[i][j]/2==27 && Trecovery[(i+1)%4][j]==0 && Trecovery[(i+2)%4][j]==0 && Trecovery[(i+3)%4][j]==0) delaycounter[j] <= i+1;\n                                                                                ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:86: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n     if (Trecovery[i][j]/2==27 && Trecovery[(i+1)%4][j]==0 && Trecovery[(i+2)%4][j]==0 && Trecovery[(i+3)%4][j]==0) delaycounter[j] <= i+1;\n                                                                                                            ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:87: Bit extraction of array[7:0] requires 3 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n     histos[i][j] <= Trecovery[i][j];\n           ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:87: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n     histos[i][j] <= Trecovery[i][j];\n              ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:87: Bit extraction of array[3:0] requires 2 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n     histos[i][j] <= Trecovery[i][j];\n                              ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:87: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n     histos[i][j] <= Trecovery[i][j];\n                                 ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:87: Operator ASSIGNDLY expects 32 bits on the Assign RHS, but Assign RHS\'s ARRAYSEL generates 6 bits.\n                                                                                                    : ... In instance LED_4\n     histos[i][j] <= Trecovery[i][j];\n                  ^~\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:95: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                    : ... In instance LED_4\n    delaycounter[j] <= 0;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:103: Bit extraction of array[3:0] requires 2 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n    Trecovery[i][j] <= 0;\n             ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:103: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n    Trecovery[i][j] <= 0;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:110: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n   thebin[j] <= (Pulsecounter-delaycounter[j]+2)%4;  \n         ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:110: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n   thebin[j] <= (Pulsecounter-delaycounter[j]+2)%4;  \n                                          ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:110: Operator ASSIGNDLY expects 2 bits on the Assign RHS, but Assign RHS\'s MODDIV generates 32 or 3 bits.\n                                                                                                     : ... In instance LED_4\n   thebin[j] <= (Pulsecounter-delaycounter[j]+2)%4;  \n             ^~\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:113: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n     Tin[thebin[j]][j] <= 3;  \n               ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:113: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n     Tin[thebin[j]][j] <= 3;  \n                   ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:114: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n     histos[4+thebin[j]][j] <= histos[4+thebin[j]][j]+1;  \n                    ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:114: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n     histos[4+thebin[j]][j] <= histos[4+thebin[j]][j]+1;  \n                        ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:114: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n     histos[4+thebin[j]][j] <= histos[4+thebin[j]][j]+1;  \n                                              ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:114: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n     histos[4+thebin[j]][j] <= histos[4+thebin[j]][j]+1;  \n                                                  ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:112: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n    if (delaycounter[j]>0) begin  \n                    ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:122: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n    if (Tin[thebin[j]][j]>0) Tin[thebin[j]][j] <= Tin[thebin[j]][j]-1;\n                                       ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:122: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n    if (Tin[thebin[j]][j]>0) Tin[thebin[j]][j] <= Tin[thebin[j]][j]-1;\n                                           ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:122: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n    if (Tin[thebin[j]][j]>0) Tin[thebin[j]][j] <= Tin[thebin[j]][j]-1;\n                                                            ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:122: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n    if (Tin[thebin[j]][j]>0) Tin[thebin[j]][j] <= Tin[thebin[j]][j]-1;\n                                                                ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:122: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n    if (Tin[thebin[j]][j]>0) Tin[thebin[j]][j] <= Tin[thebin[j]][j]-1;\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:122: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n    if (Tin[thebin[j]][j]>0) Tin[thebin[j]][j] <= Tin[thebin[j]][j]-1;\n                      ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:111: Bit extraction of var[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n   if (coaxinreg[j]) begin\n                ^\n%Warning-WIDTH: data/full_repos/permissive/135622446/trig3_board_trigger_de0nano-firmware/LED_4.v:126: Bit extraction of array[15:0] requires 4 bit index, not 8 bits.\n                                                                                                     : ... In instance LED_4\n     histos[4+i][j] <= 0;\n                ^\n%Error: Exiting due to 49 warning(s)\n'
module LED_4(
	input nrst,
	input clk,
	output reg [3:0] led,
	input [16-1:0] coax_in,
	output [16-1:0] coax_out,	
	input [7:0] calibticks, input [7:0] histostosend,
	input clk_adc, output reg[31:0] histosout[8], input resethist, output spareleft, output reg [2:0] delaycounter[16],
	input clk_locked,
	output ext_trig_out,
	input reg[31:0] randnum, input reg[31:0] prescale, input dorolling
	);

reg[7:0] i;
reg[7:0] j;
reg[31:0] histos[8][16];
reg [16-1:0] coaxinreg;
reg pass_prescale;
reg[7:0] triedtofire=0;
reg[7:0] ext_trig_out_counter=0;
reg[31:0] autocounter=0;
reg [7:0] histostosend2;
reg [7:0] calibticks2;
reg [31:0] prescale2;
always@(posedge clk_adc) begin
	pass_prescale <= (randnum<=prescale2);
	histostosend2<=histostosend;
	calibticks2<=calibticks;
	prescale2<=prescale;
	i=0; while (i<16) begin
		if (clk_locked) coaxinreg[i]<=coax_in[i];
		else coaxinreg[i]<=0;
		if (i<4) coax_out[i] <= (Tin[i][0]>0);
		else coax_out[i] <= coaxinreg[i];
		if (i<8) histosout[i]<=histos[i][histostosend2];





		i=i+1;
	end
	if (triedtofire==0 && (Tin[1][0]>0 && Tin[1][6]>0)) begin
		if (pass_prescale) begin
			ext_trig_out_counter <= 4;
			autocounter <= 0;
		end
		else begin
			if (ext_trig_out_counter>0) ext_trig_out_counter <= ext_trig_out_counter - 1;
		end
		triedtofire <= 20;
	end
	else begin
		if (autocounter[25]) begin
			if (dorolling) ext_trig_out_counter <= 4;
			autocounter <= 0;
		end
		else begin
			if (ext_trig_out_counter>0) ext_trig_out_counter <= ext_trig_out_counter - 1;
			autocounter <= autocounter+1;
		end
		if (triedtofire>0) triedtofire <= triedtofire-1;
	end
	ext_trig_out <= (ext_trig_out_counter>0);
end

reg[31:0] spareleftcounter=0;
always@(posedge clk_adc) begin
	if (spareleftcounter<655) spareleft<=1;
	else spareleft<=0;
	if (spareleftcounter[17+calibticks2]) spareleftcounter<=0;
	else spareleftcounter<=spareleftcounter+1;
end


reg[1:0] Pulsecounter=0;
reg[5:0] Trecovery[3:0][16];
reg[3:0] Tin[4][16];
reg[1:0] thebin[16];
always @(posedge clk_adc) begin
	if (spareleft) begin
		if (spareleftcounter>200) begin
			i=0; while (i<4) begin
				j=0; while (j<16) begin
					if (coaxinreg[j] && Pulsecounter==i) Trecovery[i][j] <= Trecovery[i][j]+1;
					if (Trecovery[i][j]/2==27 && Trecovery[(i+1)%4][j]==0 && Trecovery[(i+2)%4][j]==0 && Trecovery[(i+3)%4][j]==0) delaycounter[j] <= i+1;
					histos[i][j] <= Trecovery[i][j];
					j=j+1;
				end
				i=i+1;
			end
		end
		else begin
			j=0; while (j<16) begin
				delaycounter[j] <= 0;
				j=j+1;
			end
		end
	end
	else begin
		i=0; while (i<4) begin
			j=0; while (j<16) begin
				Trecovery[i][j] <= 0;
				j=j+1;
			end
			i=i+1;
		end
		
		j=0; while (j<16) begin
			thebin[j] <= (Pulsecounter-delaycounter[j]+2)%4;
			if (coaxinreg[j]) begin
				if (delaycounter[j]>0) begin
					Tin[thebin[j]][j] <= 3;
					histos[4+thebin[j]][j] <= histos[4+thebin[j]][j]+1;
				end
				else begin

				end
			end
			else begin

				if (Tin[thebin[j]][j]>0) Tin[thebin[j]][j] <= Tin[thebin[j]][j]-1;
			end
			if (resethist) begin
				i=0; while (i<4) begin
					histos[4+i][j] <= 0;
					i=i+1;
				end
			end
			j=j+1;
		end
	
	end
	Pulsecounter <= Pulsecounter+1;
end



reg [1:0] ledi=0;
reg[31:0] counter=0;
always@(posedge clk) begin
	counter<=counter+1;
	if (counter[25]) begin			
		counter<=0;
		ledi<=ledi+2'b01;
		case (ledi)
		0:	begin led <= 4'b0001; end
		1:	begin led <= 4'b0010; end
		2:	begin led <= 4'b0100; end
		3:	begin led <= 4'b1000; end
		endcase
	end
end
	
endmodule
module LED_4(
	input nrst,
	input clk,
	output reg [3:0] led,
	input [16-1:0] coax_in,
	output [16-1:0] coax_out,	
	input [7:0] calibticks, input [7:0] histostosend,
	input clk_adc, output reg[31:0] histosout[8], input resethist, output spareleft, output reg [2:0] delaycounter[16],
	input clk_locked,
	output ext_trig_out,
	input reg[31:0] randnum, input reg[31:0] prescale, input dorolling
	);


reg[7:0] i;
reg[7:0] j;
reg[31:0] histos[8][16];
reg [16-1:0] coaxinreg;
reg pass_prescale;
reg[7:0] triedtofire=0;
reg[7:0] ext_trig_out_counter=0;
reg[31:0] autocounter=0;
reg [7:0] histostosend2;
reg [7:0] calibticks2;
reg [31:0] prescale2;
always@(posedge clk_adc) begin
	pass_prescale <= (randnum<=prescale2);
	histostosend2<=histostosend;
	calibticks2<=calibticks;
	prescale2<=prescale;
	i=0; while (i<16) begin
		if (clk_locked) coaxinreg[i]<=coax_in[i];
		else coaxinreg[i]<=0;
		if (i<4) coax_out[i] <= (Tin[i][0]>0);
		else coax_out[i] <= coaxinreg[i];
		if (i<8) histosout[i]<=histos[i][histostosend2];





		i=i+1;
	end
	if (triedtofire==0 && (Tin[1][0]>0 && Tin[1][6]>0)) begin
		if (pass_prescale) begin
			ext_trig_out_counter <= 4;
			autocounter <= 0;
		end
		else begin
			if (ext_trig_out_counter>0) ext_trig_out_counter <= ext_trig_out_counter - 1;
		end
		triedtofire <= 20;
	end
	else begin
		if (autocounter[25]) begin
			if (dorolling) ext_trig_out_counter <= 4;
			autocounter <= 0;
		end
		else begin
			if (ext_trig_out_counter>0) ext_trig_out_counter <= ext_trig_out_counter - 1;
			autocounter <= autocounter+1;
		end
		if (triedtofire>0) triedtofire <= triedtofire-1;
	end
	ext_trig_out <= (ext_trig_out_counter>0);
end

reg[31:0] spareleftcounter=0;
always@(posedge clk_adc) begin
	if (spareleftcounter<655) spareleft<=1;
	else spareleft<=0;
	if (spareleftcounter[17+calibticks2]) spareleftcounter<=0;
	else spareleftcounter<=spareleftcounter+1;
end


reg[1:0] Pulsecounter=0;
reg[5:0] Trecovery[3:0][16];
reg[3:0] Tin[4][16];
reg[1:0] thebin[16];
always @(posedge clk_adc) begin
	if (spareleft) begin
		if (spareleftcounter>200) begin
			i=0; while (i<4) begin
				j=0; while (j<16) begin
					if (coaxinreg[j] && Pulsecounter==i) Trecovery[i][j] <= Trecovery[i][j]+1;
					if (Trecovery[i][j]/2==27 && Trecovery[(i+1)%4][j]==0 && Trecovery[(i+2)%4][j]==0 && Trecovery[(i+3)%4][j]==0) delaycounter[j] <= i+1;
					histos[i][j] <= Trecovery[i][j];
					j=j+1;
				end
				i=i+1;
			end
		end
		else begin
			j=0; while (j<16) begin
				delaycounter[j] <= 0;
				j=j+1;
			end
		end
	end
	else begin
		i=0; while (i<4) begin
			j=0; while (j<16) begin
				Trecovery[i][j] <= 0;
				j=j+1;
			end
			i=i+1;
		end
		
		j=0; while (j<16) begin
			thebin[j] <= (Pulsecounter-delaycounter[j]+2)%4;
			if (coaxinreg[j]) begin
				if (delaycounter[j]>0) begin
					Tin[thebin[j]][j] <= 3;
					histos[4+thebin[j]][j] <= histos[4+thebin[j]][j]+1;
				end
				else begin

				end
			end
			else begin

				if (Tin[thebin[j]][j]>0) Tin[thebin[j]][j] <= Tin[thebin[j]][j]-1;
			end
			if (resethist) begin
				i=0; while (i<4) begin
					histos[4+i][j] <= 0;
					i=i+1;
				end
			end
			j=j+1;
		end
	
	end
	Pulsecounter <= Pulsecounter+1;
end



reg [1:0] ledi=0;
reg[31:0] counter=0;
always@(posedge clk) begin
	counter<=counter+1;
	if (counter[25]) begin			
		counter<=0;
		ledi<=ledi+2'b01;
		case (ledi)
		0:	begin led <= 4'b0001; end
		1:	begin led <= 4'b0010; end
		2:	begin led <= 4'b0100; end
		3:	begin led <= 4'b1000; end
		endcase
	end
end
	
endmodule