data/full_repos/permissive/209422257/rtl/rams.v
 line:31: before: ","
1: b'%Warning-MULTITOP: data/full_repos/permissive/209422257/rtl/rams.v:31: Multiple top level modules\n                                                                     : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                     : ... Top module \'LINEBUF1024_9\'\nmodule LINEBUF1024_9\n       ^~~~~~~~~~~~~\n                                                                     : ... Top module \'GSPRAM\'\nmodule GSPRAM #(parameter AW,parameter DW)\n       ^~~~~~\n                                                                     : ... Top module \'GDPRAM\'\nmodule GDPRAM #(parameter AW,parameter DW)\n       ^~~~~~\n                                                                     : ... Top module \'GLINEBUF\'\nmodule GLINEBUF #(parameter AW,parameter DW)\n       ^~~~~~~~\n                                                                     : ... Top module \'DLROM\'\nmodule DLROM #(parameter AW,parameter DW)\n       ^~~~~\n%Error: data/full_repos/permissive/209422257/rtl/rams.v:31: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): \'AW\'\n                                                          : ... In instance GSPRAM\nmodule GSPRAM #(parameter AW,parameter DW)\n                          ^~\n%Error: data/full_repos/permissive/209422257/rtl/rams.v:31: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): \'DW\'\n                                                          : ... In instance GSPRAM\nmodule GSPRAM #(parameter AW,parameter DW)\n                                       ^~\n%Error: data/full_repos/permissive/209422257/rtl/rams.v:50: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): \'AW\'\n                                                          : ... In instance GDPRAM\nmodule GDPRAM #(parameter AW,parameter DW)\n                          ^~\n%Error: data/full_repos/permissive/209422257/rtl/rams.v:50: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): \'DW\'\n                                                          : ... In instance GDPRAM\nmodule GDPRAM #(parameter AW,parameter DW)\n                                       ^~\n%Error: data/full_repos/permissive/209422257/rtl/rams.v:71: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): \'AW\'\n                                                          : ... In instance GLINEBUF\nmodule GLINEBUF #(parameter AW,parameter DW)\n                            ^~\n%Error: data/full_repos/permissive/209422257/rtl/rams.v:71: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): \'DW\'\n                                                          : ... In instance GLINEBUF\nmodule GLINEBUF #(parameter AW,parameter DW)\n                                         ^~\n%Error: data/full_repos/permissive/209422257/rtl/rams.v:92: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): \'AW\'\n                                                          : ... In instance DLROM\nmodule DLROM #(parameter AW,parameter DW)\n                         ^~\n%Error: data/full_repos/permissive/209422257/rtl/rams.v:92: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): \'DW\'\n                                                          : ... In instance DLROM\nmodule DLROM #(parameter AW,parameter DW)\n                                      ^~\n%Error: Exiting due to 8 error(s), 1 warning(s)\n'
module LINEBUF1024_9
(
	input				CL0,
	input	 [9:0]	AD0,
	input				WE0,
	output [8:0]	DO0,

	input				CL1,
	input	 [9:0]	AD1,
	input				WE1,
	input	 [8:0]	DI1
);

LINEBUF lbcore (
	.clock_a(CL0),
	.address_a(AD0),
	.data_a(9'h0),
	.wren_a(WE0),
	.q_a(DO0),

	.clock_b(CL1),
	.address_b(AD1),
	.data_b(DI1),
	.wren_b(WE1)
);

endmodule
module LINEBUF1024_9
(
	input				CL0,
	input	 [9:0]	AD0,
	input				WE0,
	output [8:0]	DO0,

	input				CL1,
	input	 [9:0]	AD1,
	input				WE1,
	input	 [8:0]	DI1
);


LINEBUF lbcore (
	.clock_a(CL0),
	.address_a(AD0),
	.data_a(9'h0),
	.wren_a(WE0),
	.q_a(DO0),

	.clock_b(CL1),
	.address_b(AD1),
	.data_b(DI1),
	.wren_b(WE1)
);

endmodule