data/full_repos/permissive/2084115/testbench/sim/library/tb_capacity_async/tb_capacity_async.v
1: b'%Error: data/full_repos/permissive/2084115/testbench/sim/library/tb_capacity_async/tb_capacity_async.v:12: Unsupported or unknown PLI call: $dumpfile\n        $dumpfile("tb_capacity_async.vcd");\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/2084115/testbench/sim/library/tb_capacity_async/tb_capacity_async.v:13: Unsupported or unknown PLI call: $dumpvars\n        $dumpvars(0, tb_capacity_async);\n        ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/2084115/testbench/sim/library/tb_capacity_async/tb_capacity_async.v:21: Unsupported: Ignoring delay on this delayed statement.\n    always #(S_RATE/2.0)  s_clk = ~s_clk;\n           ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/2084115/testbench/sim/library/tb_capacity_async/tb_capacity_async.v:24: Unsupported: Ignoring delay on this delayed statement.\n    always #(M_RATE/2.0)  m_clk = ~m_clk;\n           ^\n%Warning-STMTDLY: data/full_repos/permissive/2084115/testbench/sim/library/tb_capacity_async/tb_capacity_async.v:27: Unsupported: Ignoring delay on this delayed statement.\n    initial #(S_RATE*100) reset = 1\'b0;\n            ^\n%Error: Exiting due to 2 error(s), 3 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module tb_capacity_async();
    localparam S_RATE = 1000.0/200.0;

    localparam M_RATE = 1000.0/1500.1;
    
    initial begin
        $dumpfile("tb_capacity_async.vcd");
        $dumpvars(0, tb_capacity_async);
        


    end
    
    
    reg     s_clk = 1'b1;
    always #(S_RATE/2.0)  s_clk = ~s_clk;
    
    reg     m_clk = 1'b1;
    always #(M_RATE/2.0)  m_clk = ~m_clk;
    
    reg     reset = 1'b1;
    initial #(S_RATE*100) reset = 1'b0;
    
    
    
    parameter   ASYNC               = 1;
    parameter   CAPACITY_WIDTH      = 32;
    parameter   REQUEST_WIDTH       = CAPACITY_WIDTH;
    parameter   ISSUE_WIDTH         = CAPACITY_WIDTH;
    parameter   REQUEST_SIZE_OFFSET = 1'b0;
    parameter   ISSUE_SIZE_OFFSET   = 1'b0;
    parameter   INIT_REQUEST        = {CAPACITY_WIDTH{1'b0}};
    
    reg     [REQUEST_WIDTH-1:0]     s_request_size  = 0;
    reg                             s_request_valid = 0;
    wire    [CAPACITY_WIDTH-1:0]    s_queued_request;
    
    wire    [ISSUE_WIDTH-1:0]       m_issue_size;
    wire                            m_issue_valid;
    reg                             m_issue_ready = 1;
    wire    [CAPACITY_WIDTH-1:0]    m_queued_request;
    
    jelly_capacity_async
            #(
                .ASYNC                  (ASYNC),
                .CAPACITY_WIDTH         (CAPACITY_WIDTH),
                .REQUEST_WIDTH          (REQUEST_WIDTH),
                .ISSUE_WIDTH            (ISSUE_WIDTH),
                .REQUEST_SIZE_OFFSET    (REQUEST_SIZE_OFFSET),
                .ISSUE_SIZE_OFFSET      (ISSUE_SIZE_OFFSET),
                .INIT_REQUEST           (INIT_REQUEST)
            )
        i_capacity_async
            (
                .s_reset                (reset),
                .s_clk                  (s_clk),
                .s_request_size         (s_request_size),
                .s_request_valid        (s_request_valid),
                .s_queued_request       (s_queued_request),
                
                .m_reset                (reset),
                .m_clk                  (m_clk),
                .m_issue_size           (m_issue_size),
                .m_issue_valid          (m_issue_valid),
                .m_issue_ready          (m_issue_ready),
                .m_queued_request       (m_queued_request)
            );
    
    integer     i = 0;
    
    integer     request_count = 0;
    integer     issue_count   = 0;
    
    always @(posedge s_clk) begin
        if ( reset ) begin
            s_request_size  <= 0;
            s_request_valid <= 0;
        end
        else begin
            i = i + 1;
            if ( i < 2000 ) begin
                s_request_size  <= {$random()} & 32'hff;
                s_request_valid <= ({$random()} % 2 == 0);
            end
            else begin
                s_request_valid <= 1'b0;
            end
            
            
            if ( s_request_valid ) begin
                request_count = request_count + s_request_size + REQUEST_SIZE_OFFSET;
            end
            
            if ( i > 3000 ) begin
                $display("request_count = %d, issue_count=%d", request_count, issue_count);
                if ( request_count == issue_count ) begin
                    $display("OK");
                end
                else begin
                    $display("NG");
                end
                
                $finish();
            end
        end
    end
    
    always @(posedge m_clk) begin
        if ( reset ) begin
            m_issue_ready <= 0;
        end
        else begin
            m_issue_ready <= {$random()};
            
            if ( m_issue_valid && m_issue_ready ) begin
                issue_count = issue_count + m_issue_size + ISSUE_SIZE_OFFSET;
            end
        end
    end
    
    
    
endmodule
module tb_capacity_async();

    localparam S_RATE = 1000.0/200.0;

    localparam M_RATE = 1000.0/1500.1;
    
    initial begin
        $dumpfile("tb_capacity_async.vcd");
        $dumpvars(0, tb_capacity_async);
        


    end
    
    
    reg     s_clk = 1'b1;
    always #(S_RATE/2.0)  s_clk = ~s_clk;
    
    reg     m_clk = 1'b1;
    always #(M_RATE/2.0)  m_clk = ~m_clk;
    
    reg     reset = 1'b1;
    initial #(S_RATE*100) reset = 1'b0;
    
    
    
    parameter   ASYNC               = 1;
    parameter   CAPACITY_WIDTH      = 32;
    parameter   REQUEST_WIDTH       = CAPACITY_WIDTH;
    parameter   ISSUE_WIDTH         = CAPACITY_WIDTH;
    parameter   REQUEST_SIZE_OFFSET = 1'b0;
    parameter   ISSUE_SIZE_OFFSET   = 1'b0;
    parameter   INIT_REQUEST        = {CAPACITY_WIDTH{1'b0}};
    
    reg     [REQUEST_WIDTH-1:0]     s_request_size  = 0;
    reg                             s_request_valid = 0;
    wire    [CAPACITY_WIDTH-1:0]    s_queued_request;
    
    wire    [ISSUE_WIDTH-1:0]       m_issue_size;
    wire                            m_issue_valid;
    reg                             m_issue_ready = 1;
    wire    [CAPACITY_WIDTH-1:0]    m_queued_request;
    
    jelly_capacity_async
            #(
                .ASYNC                  (ASYNC),
                .CAPACITY_WIDTH         (CAPACITY_WIDTH),
                .REQUEST_WIDTH          (REQUEST_WIDTH),
                .ISSUE_WIDTH            (ISSUE_WIDTH),
                .REQUEST_SIZE_OFFSET    (REQUEST_SIZE_OFFSET),
                .ISSUE_SIZE_OFFSET      (ISSUE_SIZE_OFFSET),
                .INIT_REQUEST           (INIT_REQUEST)
            )
        i_capacity_async
            (
                .s_reset                (reset),
                .s_clk                  (s_clk),
                .s_request_size         (s_request_size),
                .s_request_valid        (s_request_valid),
                .s_queued_request       (s_queued_request),
                
                .m_reset                (reset),
                .m_clk                  (m_clk),
                .m_issue_size           (m_issue_size),
                .m_issue_valid          (m_issue_valid),
                .m_issue_ready          (m_issue_ready),
                .m_queued_request       (m_queued_request)
            );
    
    integer     i = 0;
    
    integer     request_count = 0;
    integer     issue_count   = 0;
    
    always @(posedge s_clk) begin
        if ( reset ) begin
            s_request_size  <= 0;
            s_request_valid <= 0;
        end
        else begin
            i = i + 1;
            if ( i < 2000 ) begin
                s_request_size  <= {$random()} & 32'hff;
                s_request_valid <= ({$random()} % 2 == 0);
            end
            else begin
                s_request_valid <= 1'b0;
            end
            
            
            if ( s_request_valid ) begin
                request_count = request_count + s_request_size + REQUEST_SIZE_OFFSET;
            end
            
            if ( i > 3000 ) begin
                $display("request_count = %d, issue_count=%d", request_count, issue_count);
                if ( request_count == issue_count ) begin
                    $display("OK");
                end
                else begin
                    $display("NG");
                end
                
                $finish();
            end
        end
    end
    
    always @(posedge m_clk) begin
        if ( reset ) begin
            m_issue_ready <= 0;
        end
        else begin
            m_issue_ready <= {$random()};
            
            if ( m_issue_valid && m_issue_ready ) begin
                issue_count = issue_count + m_issue_size + ISSUE_SIZE_OFFSET;
            end
        end
    end
    
    
    
endmodule