data/full_repos/permissive/19384863/fulladder.v
data/verilator_xmls/075dda8a-b604-40e7-91db-3d69aeb1b25a.xml
module fulladder(a, b, cin, cout, sum);
	input a, b, cin;
	output cout, sum;

	wire carry_int;
	wire sum_int;
	wire carry_res;

	assign carry_int = a & b;
	assign sum_int = a ^ b;

    assign carry_res = sum_int & cin;
    assign sum = sum_int ^ cin;

	assign cout = carry_res | carry_int;
endmodule
module fulladder(a, b, cin, cout, sum);

	input a, b, cin;
	output cout, sum;

	wire carry_int;
	wire sum_int;
	wire carry_res;

	assign carry_int = a & b;
	assign sum_int = a ^ b;

    assign carry_res = sum_int & cin;
    assign sum = sum_int ^ cin;

	assign cout = carry_res | carry_int;
endmodule