data/full_repos/permissive/123627914/src/main/modules/program-counter-calculator/programCounterCalculator.v
data/verilator_xmls/7b3af804-e138-4ff4-b22d-6be4a0fa7f7a.xml
module programCounterCalculator(
PC          ,
IADDR       ,
ILO         ,
BO          ,
OADDR
);

parameter ADDR_WIDTH = 11;


input   [ADDR_WIDTH-1:0]    PC;
input   [ADDR_WIDTH-1:0] 	IADDR;
input                       ILO;
input                       BO;


output reg [ADDR_WIDTH-1:0] OADDR;


localparam INCREMENT = 1'b0;
localparam LOAD = 1'b1;



always @ (PC or IADDR or ILO or BO) begin
    case (ILO)
		INCREMENT: OADDR = PC + 1'b1;
		LOAD: begin
		    if (BO) begin
		        OADDR = IADDR;
		    end else begin
		        OADDR = PC + 1'b1;
		    end
		end
		default: OADDR = PC + 1'b1;
	endcase
end

endmodule
module programCounterCalculator(
PC          ,
IADDR       ,
ILO         ,
BO          ,
OADDR
);


parameter ADDR_WIDTH = 11;


input   [ADDR_WIDTH-1:0]    PC;
input   [ADDR_WIDTH-1:0] 	IADDR;
input                       ILO;
input                       BO;


output reg [ADDR_WIDTH-1:0] OADDR;


localparam INCREMENT = 1'b0;
localparam LOAD = 1'b1;



always @ (PC or IADDR or ILO or BO) begin
    case (ILO)
		INCREMENT: OADDR = PC + 1'b1;
		LOAD: begin
		    if (BO) begin
		        OADDR = IADDR;
		    end else begin
		        OADDR = PC + 1'b1;
		    end
		end
		default: OADDR = PC + 1'b1;
	endcase
end

endmodule