data/full_repos/permissive/114814262/IC 2015-2016/HARDWARE/[DEPRECATED] sistema_controle_alarme v1.0.0/[FPGA] sistema_para_controle_de_alarme/v1.0.0/controle.v
1: b'%Error: Cannot find file containing module: 2015-2016/HARDWARE/[DEPRECATED]\n        ... Looked in:\n             data/full_repos/permissive/114814262/IC/2015-2016/HARDWARE/[DEPRECATED]\n             data/full_repos/permissive/114814262/IC/2015-2016/HARDWARE/[DEPRECATED].v\n             data/full_repos/permissive/114814262/IC/2015-2016/HARDWARE/[DEPRECATED].sv\n             2015-2016/HARDWARE/[DEPRECATED]\n             2015-2016/HARDWARE/[DEPRECATED].v\n             2015-2016/HARDWARE/[DEPRECATED].sv\n             obj_dir/2015-2016/HARDWARE/[DEPRECATED]\n             obj_dir/2015-2016/HARDWARE/[DEPRECATED].v\n             obj_dir/2015-2016/HARDWARE/[DEPRECATED].sv\n%Error: Cannot find file containing module: sistema_controle_alarme\n%Error: Cannot find file containing module: v1.0.0/[FPGA]\n%Error: Cannot find file containing module: sistema_para_controle_de_alarme/v1.0.0,data/full_repos/permissive/114814262\n%Error: Cannot find file containing module: data/full_repos/permissive/114814262/IC\n%Error: Cannot find file containing module: sistema_para_controle_de_alarme/v1.0.0/controle.v\n%Error: Exiting due to 6 error(s)\n'
module controle(
		input clk,
		input button,
		input RxD,
		input communication,
		output wire[2:0] saida,
		output wire led
		);
		
wire[7:0] GPout,GPin;
wire TxD;
wire crianca;
wire clk_out;


clock_atraso clock_atraso(clk,clk_out);
controle2 control(saida, RxD, communication, button, clk_out);



assign led = communication;

endmodule
module controle(
		input clk,
		input button,
		input RxD,
		input communication,
		output wire[2:0] saida,
		output wire led
		);

		
wire[7:0] GPout,GPin;
wire TxD;
wire crianca;
wire clk_out;


clock_atraso clock_atraso(clk,clk_out);
controle2 control(saida, RxD, communication, button, clk_out);



assign led = communication;

endmodule