data/full_repos/permissive/169522605/hw3_1/nor3.v
data/verilator_xmls/0e3eab01-cd9a-4fc5-a9ca-807aa7e27c42.xml
module nor3 (in1,in2,in3,out);
    input  in1,in2,in3;
    output out;
    assign out = ~(in1 | in2 | in3);
endmodule
module nor3 (in1,in2,in3,out);

    input  in1,in2,in3;
    output out;
    assign out = ~(in1 | in2 | in3);
endmodule