data/full_repos/permissive/172908596/BEQ instruction/cu.v
1: b'%Error: Cannot find file containing module: instruction,data/full_repos/permissive/172908596\n        ... Looked in:\n             data/full_repos/permissive/172908596/BEQ/instruction,data/full_repos/permissive/172908596\n             data/full_repos/permissive/172908596/BEQ/instruction,data/full_repos/permissive/172908596.v\n             data/full_repos/permissive/172908596/BEQ/instruction,data/full_repos/permissive/172908596.sv\n             instruction,data/full_repos/permissive/172908596\n             instruction,data/full_repos/permissive/172908596.v\n             instruction,data/full_repos/permissive/172908596.sv\n             obj_dir/instruction,data/full_repos/permissive/172908596\n             obj_dir/instruction,data/full_repos/permissive/172908596.v\n             obj_dir/instruction,data/full_repos/permissive/172908596.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/172908596/BEQ\n%Error: Cannot find file containing module: instruction/cu.v\n%Error: Exiting due to 3 error(s)\n'
module cu(op3,op2,op1,op0,a1,a0,cs);	
input op3,op2,op1,op0,a1,a0;
output [3:0]cs;
wire f7,f30,f31,f32,w1,w2,w3,w4,w5,wop3,wop0,wa1,wa0,wop2;

not(wop3,op3);
not(wop2,op2);
not(wop0,op0);
not(wa1,a1);
not(wa0,a0);

and(cs[3],op3,op2,a1,wa0);
and(w2,wa1,(a0));
and(w3,op3,wop2,wop0,a1,wa0);
or(cs[2],w2,w3,cs[3]);
and(w1,a1,wa0,wop2,wop0);
or(cs[1],wa1,w1);
and(w5,a1,wa0,wop3,op1,wop0);
and(w4,cs[3],wop0);
or(cs[0],w4,w5);
endmodule
module cu(op3,op2,op1,op0,a1,a0,cs);
	
input op3,op2,op1,op0,a1,a0;
output [3:0]cs;
wire f7,f30,f31,f32,w1,w2,w3,w4,w5,wop3,wop0,wa1,wa0,wop2;

not(wop3,op3);
not(wop2,op2);
not(wop0,op0);
not(wa1,a1);
not(wa0,a0);

and(cs[3],op3,op2,a1,wa0);
and(w2,wa1,(a0));
and(w3,op3,wop2,wop0,a1,wa0);
or(cs[2],w2,w3,cs[3]);
and(w1,a1,wa0,wop2,wop0);
or(cs[1],wa1,w1);
and(w5,a1,wa0,wop3,op1,wop0);
and(w4,cs[3],wop0);
or(cs[0],w4,w5);
endmodule