data/full_repos/permissive/150214807/lab4.v
 line:123: before: "$"
1: b'%Error: data/full_repos/permissive/150214807/lab4.v:114: Unsupported or unknown PLI call: $monitor\n$monitor(,$time,"a = %h, b =%h, bin = %b, op = %b, cin = %b, res = %h, cout = %b",a,b,Binvert,Operation,Carryin,Result,CarryOut);\n^~~~~~~~\n%Error: data/full_repos/permissive/150214807/lab4.v:114: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n$monitor(,$time,"a = %h, b =%h, bin = %b, op = %b, cin = %b, res = %h, cout = %b",a,b,Binvert,Operation,Carryin,Result,CarryOut);\n         ^\n%Warning-STMTDLY: data/full_repos/permissive/150214807/lab4.v:120: Unsupported: Ignoring delay on this delayed statement.\n#100 Operation=2\'b01;  \n^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/150214807/lab4.v:121: Unsupported: Ignoring delay on this delayed statement.\n#100 Operation=2\'b10;  \n^\n%Warning-STMTDLY: data/full_repos/permissive/150214807/lab4.v:122: Unsupported: Ignoring delay on this delayed statement.\n#100 Binvert=1\'b1; \n^\n%Warning-STMTDLY: data/full_repos/permissive/150214807/lab4.v:123: Unsupported: Ignoring delay on this delayed statement.\n#200 $finish;\n^\n%Error: Exiting due to 2 error(s), 4 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module bit32_FA(cout,sum,in1,in2,cin);
 input [31:0] in1,in2;
 input cin;
 output [31:0] sum;
 output cout;
 wire [32:0] carry;
 assign carry[0] = cin;
 genvar j;
 generate for (j=0;j<32;j=j+1) begin: adder_seq
 FA_dataflow faj(carry[j+1],sum[j],in1[j],in2[j],carry[j]);
 end
 endgenerate
 assign cout = carry[32];
endmodule
module bit32_FA(cout,sum,in1,in2,cin);

 input [31:0] in1,in2;
 input cin;
 output [31:0] sum;
 output cout;
 wire [32:0] carry;
 assign carry[0] = cin;
 genvar j;
 generate for (j=0;j<32;j=j+1) begin: adder_seq
 FA_dataflow faj(carry[j+1],sum[j],in1[j],in2[j],carry[j]);
 end
 endgenerate
 assign cout = carry[32];
endmodule