data/full_repos/permissive/143278/ivltests/const4.v
 line:12 column:7: Illegal character "'"
1: b'%Error: data/full_repos/permissive/143278/ivltests/const4.v:32: syntax error, unexpected INTEGER NUMBER, expecting \';\'\n i = # 9_7 \'D 3;\n           ^~~~\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/const4.v:33: Unsupported: Ignoring delay on this delayed statement.\n #100;\n ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/const4.v:40: Unsupported: Ignoring delay on this delayed statement.\n #100;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/const4.v:47: Unsupported: Ignoring delay on this delayed statement.\n #100;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/const4.v:54: Unsupported: Ignoring delay on this delayed statement.\n #100;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/const4.v:61: Unsupported: Ignoring delay on this delayed statement.\n #100;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/const4.v:68: Unsupported: Ignoring delay on this delayed statement.\n #100;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/const4.v:75: Unsupported: Ignoring delay on this delayed statement.\n #100;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/const4.v:82: Unsupported: Ignoring delay on this delayed statement.\n #100;\n ^\n%Error: Exiting due to 1 error(s), 8 warning(s)\n'
module test;

    integer err;
    reg [31:0] i;


    initial begin
	i = 659;
	i = 'h 837FF;
	i = 'o7460;
	i = 4'b1001;
	i = 5 'D 3;
	i = 3'b01x;
	i = 12'hx;
	i = 16'hz;
	i = -8 'd 6;
	i = 4 'shf;
	i = -4 'sd15;
    end




    initial begin
	err = 0;

       i = # 9  1'd0;

	i = # 9_7 'D 3;
	#100;
	if (i != 'd3) begin
	    $display("'d3 != %0d", i);
	    err = 1;
	end

	i = # 1 'h 123;
	#100;
	if (i != 'h123) begin
	    $display("'h123 != %0h", i);
	    err = 1;
	end

	i = #(5 'D 3) 'D 3;
	#100;
	if (i != 'd3) begin
	    $display("'d3 != %0d", i);
	    err = 1;
	end

	i = # 93 'h 837FF;
	#100;
	if (i != 'h837ff) begin
	    $display("'h837ff != %0h", i);
	    err = 1;
	end

	i = # 33 20 'h 837ff - 1;
	#100;
	if (i != 'h837fe) begin
	    $display("'h837fe != %0h", i);
	    err = 1;
	end

	i = # 69  - 20 'd 255 + 20'd1;
	#100;
	if (i[19:0] != 20'hf_ff_02) begin
	    $display("- 'd254 != %0d (%h)", i, i);
	    err = 1;
	end

	i = #(27 - 20)'d 254 + 1;
	#100;
	if (i != 10'd255) begin
	    $display("'d255 != %0d", i);
	    err = 1;
	end

	i = # 97.4 'h abcd;
	#100;
	if (i != 'habcd) begin
	    $display("'abcd != %0h", i);
	    err = 1;
	end


	if (err)
	    $display("FAILED");
	else
	    $display("PASSED");
    end
endmodule
module test;


    integer err;
    reg [31:0] i;


    initial begin
	i = 659;
	i = 'h 837FF;
	i = 'o7460;
	i = 4'b1001;
	i = 5 'D 3;
	i = 3'b01x;
	i = 12'hx;
	i = 16'hz;
	i = -8 'd 6;
	i = 4 'shf;
	i = -4 'sd15;
    end




    initial begin
	err = 0;

       i = # 9  1'd0;

	i = # 9_7 'D 3;
	#100;
	if (i != 'd3) begin
	    $display("'d3 != %0d", i);
	    err = 1;
	end

	i = # 1 'h 123;
	#100;
	if (i != 'h123) begin
	    $display("'h123 != %0h", i);
	    err = 1;
	end

	i = #(5 'D 3) 'D 3;
	#100;
	if (i != 'd3) begin
	    $display("'d3 != %0d", i);
	    err = 1;
	end

	i = # 93 'h 837FF;
	#100;
	if (i != 'h837ff) begin
	    $display("'h837ff != %0h", i);
	    err = 1;
	end

	i = # 33 20 'h 837ff - 1;
	#100;
	if (i != 'h837fe) begin
	    $display("'h837fe != %0h", i);
	    err = 1;
	end

	i = # 69  - 20 'd 255 + 20'd1;
	#100;
	if (i[19:0] != 20'hf_ff_02) begin
	    $display("- 'd254 != %0d (%h)", i, i);
	    err = 1;
	end

	i = #(27 - 20)'d 254 + 1;
	#100;
	if (i != 10'd255) begin
	    $display("'d255 != %0d", i);
	    err = 1;
	end

	i = # 97.4 'h abcd;
	#100;
	if (i != 'habcd) begin
	    $display("'abcd != %0h", i);
	    err = 1;
	end


	if (err)
	    $display("FAILED");
	else
	    $display("PASSED");
    end
endmodule