data/full_repos/permissive/174323821/hdl/ver/fast_pll.v
 line:33: before: "real"
1: b'%Error: data/full_repos/permissive/174323821/hdl/ver/fast_pll.v:33: Define or directive not defined: \'`JTFRAME_PLLSIM\'\n    localparam real BASE_CLK=`JTFRAME_PLLSIM;\n                             ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/174323821/hdl/ver/fast_pll.v:33: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n    localparam real BASE_CLK=`JTFRAME_PLLSIM;\n                                            ^\n%Warning-STMTDLY: data/full_repos/permissive/174323821/hdl/ver/fast_pll.v:37: Unsupported: Ignoring delay on this delayed statement.\n        #30 locked = 1;\n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 2 error(s), 1 warning(s)\n'
module jtframe_pll6671(
    input        inclk0,
    output       c0,
    output       locked
);
    jtframe_pll0 pll(
        .inclk0 ( inclk0    ),
        .c0     ( c0        ),
        .c1     (           ),
        .c2     (           ),
        .c3     (           ),
        .c4     (           ),
        .locked ( locked    )
    );
endmodule
module jtframe_pll6671(
    input        inclk0,
    output       c0,
    output       locked
);

    jtframe_pll0 pll(
        .inclk0 ( inclk0    ),
        .c0     ( c0        ),
        .c1     (           ),
        .c2     (           ),
        .c3     (           ),
        .c4     (           ),
        .locked ( locked    )
    );
endmodule