data/full_repos/permissive/120518070/main/source/layout_tester.sv
1: b"%Error: data/full_repos/permissive/120518070/main/source/layout_tester.sv:22: Cannot find file containing module: 'lab7_usb_transmitter'\n lab7_usb_transmitter LD\n ^~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/120518070/main/source,data/full_repos/permissive/120518070/lab7_usb_transmitter\n             data/full_repos/permissive/120518070/main/source,data/full_repos/permissive/120518070/lab7_usb_transmitter.v\n             data/full_repos/permissive/120518070/main/source,data/full_repos/permissive/120518070/lab7_usb_transmitter.sv\n             lab7_usb_transmitter\n             lab7_usb_transmitter.v\n             lab7_usb_transmitter.sv\n             obj_dir/lab7_usb_transmitter\n             obj_dir/lab7_usb_transmitter.v\n             obj_dir/lab7_usb_transmitter.sv\n%Error: Exiting due to 1 error(s)\n"
module layout_tester
(
	input  wire clk,
	input  wire n_rst, 
	output wire d_plus,
	output wire d_minus,
	input  wire transmit,
	input  wire write_enable,
	input  wire [7:0] write_data,
	output wire fifo_empty,
	output wire fifo_full
);
	
	lab7_usb_transmitter LD
	(
		.clk(clk),
		.n_rst(n_rst),
		.d_plus(d_plus),
		.d_minus(d_minus),
		.transmit(transmit),
		.write_enable(write_enable),
		.write_data(write_data),
		.fifo_empty(fifo_empty),
		.fifo_full(fifo_full)
	);
	
endmodule
module layout_tester
(
	input  wire clk,
	input  wire n_rst, 
	output wire d_plus,
	output wire d_minus,
	input  wire transmit,
	input  wire write_enable,
	input  wire [7:0] write_data,
	output wire fifo_empty,
	output wire fifo_full
);

	
	lab7_usb_transmitter LD
	(
		.clk(clk),
		.n_rst(n_rst),
		.d_plus(d_plus),
		.d_minus(d_minus),
		.transmit(transmit),
		.write_enable(write_enable),
		.write_data(write_data),
		.fifo_empty(fifo_empty),
		.fifo_full(fifo_full)
	);
	
endmodule