data/full_repos/permissive/142844950/rtl/p_mul/p_mul_ftb.v
1: b"%Error: data/full_repos/permissive/142844950/rtl/p_mul/p_mul_ftb.v:23: Cannot find file containing module: 'p_mul'\np_mul i_p_mul(\n^~~~~\n        ... Looked in:\n             data/full_repos/permissive/142844950/rtl/p_mul,data/full_repos/permissive/142844950/p_mul\n             data/full_repos/permissive/142844950/rtl/p_mul,data/full_repos/permissive/142844950/p_mul.v\n             data/full_repos/permissive/142844950/rtl/p_mul,data/full_repos/permissive/142844950/p_mul.sv\n             p_mul\n             p_mul.v\n             p_mul.sv\n             obj_dir/p_mul\n             obj_dir/p_mul.v\n             obj_dir/p_mul.sv\n%Error: Exiting due to 1 error(s)\n"
module p_mul_ftb (
    input clock,
    input resetn
);

reg           valid  ;
wire [ 0:0]   ready  ;
reg           mul_l  ;
reg           mul_h  ;
reg           clmul  ;
reg  [4:0]    pw     ;
reg  [31:0]   crs1   ;
reg  [31:0]   crs2   ;
wire [31:0]   result ;


p_mul i_p_mul(
.clock (clock )  ,
.resetn(resetn)  ,
.valid (valid )  ,
.ready (ready )  ,
.mul_l (mul_l )  ,
.mul_h (mul_h )  ,
.clmul (clmul )  ,
.pw    (pw    )  ,
.crs1  (crs1  )  ,
.crs2  (crs2  )  ,
.result(result)
);

endmodule
module p_mul_ftb (
    input clock,
    input resetn
);


reg           valid  ;
wire [ 0:0]   ready  ;
reg           mul_l  ;
reg           mul_h  ;
reg           clmul  ;
reg  [4:0]    pw     ;
reg  [31:0]   crs1   ;
reg  [31:0]   crs2   ;
wire [31:0]   result ;


p_mul i_p_mul(
.clock (clock )  ,
.resetn(resetn)  ,
.valid (valid )  ,
.ready (ready )  ,
.mul_l (mul_l )  ,
.mul_h (mul_h )  ,
.clmul (clmul )  ,
.pw    (pw    )  ,
.crs1  (crs1  )  ,
.crs2  (crs2  )  ,
.result(result)
);

endmodule