data/full_repos/permissive/105681119/src/clk_gen.v
1: b'%Error: data/full_repos/permissive/105681119/src/clk_gen.v:32: Cannot find include file: definition.v\n`include "definition.v" \n         ^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/105681119/src,data/full_repos/permissive/105681119/definition.v\n             data/full_repos/permissive/105681119/src,data/full_repos/permissive/105681119/definition.v.v\n             data/full_repos/permissive/105681119/src,data/full_repos/permissive/105681119/definition.v.sv\n             definition.v\n             definition.v.v\n             definition.v.sv\n             obj_dir/definition.v\n             obj_dir/definition.v.v\n             obj_dir/definition.v.sv\n%Error: data/full_repos/permissive/105681119/src/clk_gen.v:44: Define or directive not defined: \'`SYS_CLK_HALF_PERIOD\'\n  #`SYS_CLK_HALF_PERIOD CLK = ~CLK;\n   ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/105681119/src/clk_gen.v:44: syntax error, unexpected \'=\'\n  #`SYS_CLK_HALF_PERIOD CLK = ~CLK;\n                            ^\n%Warning-STMTDLY: data/full_repos/permissive/105681119/src/clk_gen.v:44: Unsupported: Ignoring delay on this delayed statement.\n  #`SYS_CLK_HALF_PERIOD CLK = ~CLK;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 3 error(s), 1 warning(s)\n'
module CLK_GENERATOR(CLK);

	output reg CLK;

	initial begin
		CLK = 1'b1;
	end


	always begin
		#`SYS_CLK_HALF_PERIOD CLK = ~CLK;
	end
endmodule
module CLK_GENERATOR(CLK);


	output reg CLK;

	initial begin
		CLK = 1'b1;
	end


	always begin
		#`SYS_CLK_HALF_PERIOD CLK = ~CLK;
	end
endmodule