data/full_repos/permissive/172912857/project_alu_basys3/alu_basys3.v
1: b'%Warning-IMPLICIT: data/full_repos/permissive/172912857/project_alu_basys3/alu_basys3.v:31: Signal definition not found, creating implicitly: \'zr\'\n            .zr(zr),\n                ^~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Warning-IMPLICIT: data/full_repos/permissive/172912857/project_alu_basys3/alu_basys3.v:32: Signal definition not found, creating implicitly: \'ng\'\n            .ng(ng)\n                ^~\n%Warning-LITENDIAN: data/full_repos/permissive/172912857/project_alu_basys3/alu_basys3.v:87: Little bit endian vector: MSB < LSB of bit range: 1:6\n    input [1:6] c,\n          ^\n%Error: Exiting due to 3 warning(s)\n'
module ALU_case(
    input [1:6] c,
    input [15:0] x,
    input [15:0] y,
    output reg [15:0] out,
    output zr,
    output ng
    );
    

     
endmodule
module ALU_case(
    input [1:6] c,
    input [15:0] x,
    input [15:0] y,
    output reg [15:0] out,
    output zr,
    output ng
    );

    

     
endmodule