data/full_repos/permissive/156539908/include/led-pwm-gamma.v
1: b'%Warning-PINMISSING: data/full_repos/permissive/156539908/include/led-pwm-gamma.v:192: Cell has missing pin: \'rising_edge\'\n            button_debouncer db (\n                             ^~\n                     ... Use "/* verilator lint_off PINMISSING */" and lint_on around source to disable this message.\n%Warning-PINMISSING: data/full_repos/permissive/156539908/include/led-pwm-gamma.v:192: Cell has missing pin: \'falling_edge\'\n            button_debouncer db (\n                             ^~\n%Error: data/full_repos/permissive/156539908/include/led-pwm-gamma.v:56: Duplicate declaration of signal: \'pll_clk\'\n                                                                       : ... note: ANSI ports must have type declared with the I/O (IEEE 1800-2017 23.2.2.2)\n    wire        pll_clk;\n                ^~~~~~~\n        data/full_repos/permissive/156539908/include/led-pwm-gamma.v:23: ... Location of original declaration\n        output pll_clk,\n               ^~~~~~~\n%Error: data/full_repos/permissive/156539908/include/led-pwm-gamma.v:450: Duplicate declaration of signal: \'color8_g\'\n    reg [7:0] color8_g;\n              ^~~~~~~~\n        data/full_repos/permissive/156539908/include/led-pwm-gamma.v:445: ... Location of original declaration\n        output [7:0] color8_g);\n                     ^~~~~~~~\n%Error: Exiting due to 2 error(s), 2 warning(s)\n'
module button_debouncer (
        input  clk,
        input  button_pin,
        output level,
        output rising_edge,
        output falling_edge);

    localparam COUNT_BITS = 15;

    reg                  is_high;
    reg                  was_high;
    reg                  level_r;
    reg                  rising_edge_r;
    reg                  falling_edge_r;
    reg [COUNT_BITS-1:0] counter = 0;

    assign level        = level_r;
    assign falling_edge = rising_edge_r;
    assign rising_edge  = falling_edge_r;

    always @(posedge clk)
        if (counter) begin
            counter            <= counter + 1;
            rising_edge_r      <= 0;
            falling_edge_r     <= 0;
            was_high           <= is_high;
        end
        else begin

            is_high            <= button_pin;
            level_r            <= is_high;
            if (is_high != was_high) begin
                counter        <= 1;
                rising_edge_r  <= is_high;
                falling_edge_r <= ~is_high;
            end
        end

endmodule
module button_debouncer (
        input  clk,
        input  button_pin,
        output level,
        output rising_edge,
        output falling_edge);


    localparam COUNT_BITS = 15;

    reg                  is_high;
    reg                  was_high;
    reg                  level_r;
    reg                  rising_edge_r;
    reg                  falling_edge_r;
    reg [COUNT_BITS-1:0] counter = 0;

    assign level        = level_r;
    assign falling_edge = rising_edge_r;
    assign rising_edge  = falling_edge_r;

    always @(posedge clk)
        if (counter) begin
            counter            <= counter + 1;
            rising_edge_r      <= 0;
            falling_edge_r     <= 0;
            was_high           <= is_high;
        end
        else begin

            is_high            <= button_pin;
            level_r            <= is_high;
            if (is_high != was_high) begin
                counter        <= 1;
                rising_edge_r  <= is_high;
                falling_edge_r <= ~is_high;
            end
        end

endmodule