data/full_repos/permissive/2084115/rtl/video/jelly_video_binarizer.v
 line:77: before: "("
1: b'%Warning-WIDTH: data/full_repos/permissive/2084115/rtl/video/jelly_video_binarizer.v:98: Operator FUNCREF \'reg_mask\' expects 32 bits on the Function Argument, but Function Argument\'s VARREF \'reg_param_th\' generates 8 bits.\n                                                                                       : ... In instance jelly_video_binarizer\n                ADR_PARAM_TH:   reg_param_th  <= reg_mask(reg_param_th,  s_wb_dat_i, s_wb_sel_i);\n                                                 ^~~~~~~~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/2084115/rtl/video/jelly_video_binarizer.v:98: Operator ASSIGNDLY expects 8 bits on the Assign RHS, but Assign RHS\'s FUNCREF \'reg_mask\' generates 32 bits.\n                                                                                       : ... In instance jelly_video_binarizer\n                ADR_PARAM_TH:   reg_param_th  <= reg_mask(reg_param_th,  s_wb_dat_i, s_wb_sel_i);\n                                              ^~\n%Warning-WIDTH: data/full_repos/permissive/2084115/rtl/video/jelly_video_binarizer.v:99: Operator FUNCREF \'reg_mask\' expects 32 bits on the Function Argument, but Function Argument\'s VARREF \'reg_param_inv\' generates 1 bits.\n                                                                                       : ... In instance jelly_video_binarizer\n                ADR_PARAM_INV:  reg_param_inv <= reg_mask(reg_param_inv, s_wb_dat_i, s_wb_sel_i);\n                                                 ^~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/2084115/rtl/video/jelly_video_binarizer.v:99: Operator ASSIGNDLY expects 1 bits on the Assign RHS, but Assign RHS\'s FUNCREF \'reg_mask\' generates 32 bits.\n                                                                                       : ... In instance jelly_video_binarizer\n                ADR_PARAM_INV:  reg_param_inv <= reg_mask(reg_param_inv, s_wb_dat_i, s_wb_sel_i);\n                                              ^~\n%Warning-WIDTH: data/full_repos/permissive/2084115/rtl/video/jelly_video_binarizer.v:108: Operator COND expects 32 bits on the Conditional True, but Conditional True\'s VARREF \'reg_param_th\' generates 8 bits.\n                                                                                        : ... In instance jelly_video_binarizer\n                        (s_wb_adr_i == ADR_PARAM_TH)     ? reg_param_th  :\n                                                         ^\n%Warning-WIDTH: data/full_repos/permissive/2084115/rtl/video/jelly_video_binarizer.v:109: Operator COND expects 32 bits on the Conditional True, but Conditional True\'s VARREF \'reg_param_inv\' generates 1 bits.\n                                                                                        : ... In instance jelly_video_binarizer\n                        (s_wb_adr_i == ADR_PARAM_INV)    ? reg_param_inv :\n                                                         ^\n%Error: data/full_repos/permissive/2084115/rtl/video/jelly_video_binarizer.v:116: Cannot find file containing module: \'jelly_video_binarizer_core\'\n    jelly_video_binarizer_core\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/2084115/rtl/video,data/full_repos/permissive/2084115/jelly_video_binarizer_core\n             data/full_repos/permissive/2084115/rtl/video,data/full_repos/permissive/2084115/jelly_video_binarizer_core.v\n             data/full_repos/permissive/2084115/rtl/video,data/full_repos/permissive/2084115/jelly_video_binarizer_core.sv\n             jelly_video_binarizer_core\n             jelly_video_binarizer_core.v\n             jelly_video_binarizer_core.sv\n             obj_dir/jelly_video_binarizer_core\n             obj_dir/jelly_video_binarizer_core.v\n             obj_dir/jelly_video_binarizer_core.sv\n%Error: Exiting due to 1 error(s), 6 warning(s)\n'
function [WB_DAT_WIDTH-1:0] reg_mask(
                                        input [WB_DAT_WIDTH-1:0] org,
                                        input [WB_DAT_WIDTH-1:0] wdat,
                                        input [WB_SEL_WIDTH-1:0] msk
                                    );
    integer i;
    begin
        for ( i = 0; i < WB_DAT_WIDTH; i = i+1 ) begin
            reg_mask[i] = msk[i/8] ? wdat[i] : org[i];
        end
    end
    endfunction
function [WB_DAT_WIDTH-1:0] reg_mask(
                                        input [WB_DAT_WIDTH-1:0] org,
                                        input [WB_DAT_WIDTH-1:0] wdat,
                                        input [WB_SEL_WIDTH-1:0] msk
                                    );

    integer i;
    begin
        for ( i = 0; i < WB_DAT_WIDTH; i = i+1 ) begin
            reg_mask[i] = msk[i/8] ? wdat[i] : org[i];
        end
    end
    endfunction