data/full_repos/permissive/158845296/pc_src.v
1: b'%Error: data/full_repos/permissive/158845296/pc_src.v:11: Cannot find include file: parameters.v\n    `include "parameters.v" \n             ^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/158845296,data/full_repos/permissive/158845296/parameters.v\n             data/full_repos/permissive/158845296,data/full_repos/permissive/158845296/parameters.v.v\n             data/full_repos/permissive/158845296,data/full_repos/permissive/158845296/parameters.v.sv\n             parameters.v\n             parameters.v.v\n             parameters.v.sv\n             obj_dir/parameters.v\n             obj_dir/parameters.v.v\n             obj_dir/parameters.v.sv\n%Error: data/full_repos/permissive/158845296/pc_src.v:17: Define or directive not defined: \'`OP_BEQ\'\n        if ((opcode == `OP_BEQ) && operands_equal)\n                       ^~~~~~~\n%Error: data/full_repos/permissive/158845296/pc_src.v:17: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n        if ((opcode == `OP_BEQ) && operands_equal)\n                              ^\n%Error: data/full_repos/permissive/158845296/pc_src.v:19: Define or directive not defined: \'`OP_JMP\'\n        else if (opcode == `OP_JMP)\n                           ^~~~~~~\n%Error: Exiting due to 4 error(s)\n'
module pc_src
(
    input clock,

    input [6:0] opcode,
    input operands_equal,

    output reg [1:0] pc_src
);

    `include "parameters.v"

    initial
        pc_src = 2'b00;

    always @(posedge clock) begin
        if ((opcode == `OP_BEQ) && operands_equal)
            pc_src <= 2'b01;
        else if (opcode == `OP_JMP)
            pc_src <= 2'b10;
        else
            pc_src <= 2'b00;
    end

endmodule
module pc_src
(
    input clock,

    input [6:0] opcode,
    input operands_equal,

    output reg [1:0] pc_src
);


    `include "parameters.v"

    initial
        pc_src = 2'b00;

    always @(posedge clock) begin
        if ((opcode == `OP_BEQ) && operands_equal)
            pc_src <= 2'b01;
        else if (opcode == `OP_JMP)
            pc_src <= 2'b10;
        else
            pc_src <= 2'b00;
    end

endmodule