data/full_repos/permissive/146399661/src/vedic/vedic8.v
1: b'%Warning-WIDTH: data/full_repos/permissive/146399661/src/vedic/vedic8.v:31: Output port connection \'c\' expects 8 bits on the pin connection, but pin connection\'s SEL generates 16 bits.\n                                                                          : ... In instance vedic8\nvedic4 z1(a[3:0],b[3:0],q0[15:0]);\n                          ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/146399661/src/vedic/vedic8.v:32: Output port connection \'c\' expects 8 bits on the pin connection, but pin connection\'s SEL generates 16 bits.\n                                                                          : ... In instance vedic8\nvedic4 z2(a[7:4],b[3:0],q1[15:0]);\n                          ^\n%Warning-WIDTH: data/full_repos/permissive/146399661/src/vedic/vedic8.v:33: Output port connection \'c\' expects 8 bits on the pin connection, but pin connection\'s SEL generates 16 bits.\n                                                                          : ... In instance vedic8\nvedic4 z3(a[3:0],b[7:4],q2[15:0]);\n                          ^\n%Warning-WIDTH: data/full_repos/permissive/146399661/src/vedic/vedic8.v:34: Output port connection \'c\' expects 8 bits on the pin connection, but pin connection\'s SEL generates 16 bits.\n                                                                          : ... In instance vedic8\nvedic4 z4(a[7:4],b[7:4],q3[15:0]);\n                          ^\n%Error: Exiting due to 4 warning(s)\n'
module ha(x,y,sum,carry);
input x,y;
output sum,carry;
assign carry=x&y;
assign sum=x^y;
endmodule
module ha(x,y,sum,carry);

input x,y;
output sum,carry;
assign carry=x&y;
assign sum=x^y;
endmodule