data/full_repos/permissive/147265957/src/sdpselector7f.v
 line:33: before: "/"
data/verilator_xmls/7e9732fa-fdaf-43ea-a9f6-b9e9a3062180.xml
module sdpselector7f(
  sw, an
);
    input [2:0] sw;
    output reg [7:0] an;
    
    always @(sw,an) begin
        an = 8'b11111111;
        an[sw] = 0;
    end

endmodule
module sdpselector7f(
  sw, an
);

    input [2:0] sw;
    output reg [7:0] an;
    
    always @(sw,an) begin
        an = 8'b11111111;
        an[sw] = 0;
    end

endmodule