data/full_repos/permissive/172908596/Load and store Instruction/alu+cu.v
1: b'%Error: Cannot find file containing module: and\n        ... Looked in:\n             data/full_repos/permissive/172908596/Load/and\n             data/full_repos/permissive/172908596/Load/and.v\n             data/full_repos/permissive/172908596/Load/and.sv\n             and\n             and.v\n             and.sv\n             obj_dir/and\n             obj_dir/and.v\n             obj_dir/and.sv\n%Error: Cannot find file containing module: store\n%Error: Cannot find file containing module: Instruction,data/full_repos/permissive/172908596\n%Error: Cannot find file containing module: data/full_repos/permissive/172908596/Load\n%Error: Cannot find file containing module: Instruction/alu+cu.v\n%Error: Exiting due to 5 error(s)\n'
module ALU(a,b,cs,alu,result,cout,zero,overflow);
	input [63:0]a;
	input [63:0]b;
	output [63:0] result;
	wire [3:0] control;
	input [1:0] alu;
	input [3:0] cs;
	wire cin;
	output cout;
	output zero;
	output overflow;
	cu M(cs[3],cs[2],cs[1],cs[0],alu[1],alu[0],control);
	assign cin = (~control[3])&(control[2])&(control[1])&(~control[0]);	
	alu64 m2(a,b,cin,control,result,cout);
	assign zero = ~|result;
	assign overflow = control[1] & ((a[63] & b[63] & ~result[63]) | (~a[63] & ~b[63] & result[63]));
endmodule
module ALU(a,b,cs,alu,result,cout,zero,overflow);

	input [63:0]a;
	input [63:0]b;
	output [63:0] result;
	wire [3:0] control;
	input [1:0] alu;
	input [3:0] cs;
	wire cin;
	output cout;
	output zero;
	output overflow;
	cu M(cs[3],cs[2],cs[1],cs[0],alu[1],alu[0],control);
	assign cin = (~control[3])&(control[2])&(control[1])&(~control[0]);	
	alu64 m2(a,b,cin,control,result,cout);
	assign zero = ~|result;
	assign overflow = control[1] & ((a[63] & b[63] & ~result[63]) | (~a[63] & ~b[63] & result[63]));
endmodule