data/full_repos/permissive/167274925/SignExtension_tb.v
 line:22: before: "$"
1: b'%Warning-STMTDLY: data/full_repos/permissive/167274925/SignExtension_tb.v:21: Unsupported: Ignoring delay on this delayed statement.\n   #100 in <= 16\'h0004;\n   ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/167274925/SignExtension_tb.v:22: Unsupported: Ignoring delay on this delayed statement.\n   #20 $display("in=%h, out=%h", in, out);\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/167274925/SignExtension_tb.v:24: Unsupported: Ignoring delay on this delayed statement.\n   #100 in <= 16\'h7000;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/167274925/SignExtension_tb.v:25: Unsupported: Ignoring delay on this delayed statement.\n   #20 $display("in=%h, out=%h", in, out);\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/167274925/SignExtension_tb.v:27: Unsupported: Ignoring delay on this delayed statement.\n   #100 in <= 16\'h9000;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/167274925/SignExtension_tb.v:28: Unsupported: Ignoring delay on this delayed statement.\n   #20 $display("in=%h, out=%h", in, out);\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/167274925/SignExtension_tb.v:30: Unsupported: Ignoring delay on this delayed statement.\n   #100 in <= 16\'hF000;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/167274925/SignExtension_tb.v:31: Unsupported: Ignoring delay on this delayed statement.\n   #20 $display("in=%h, out=%h", in, out);\n   ^\n%Error: data/full_repos/permissive/167274925/SignExtension_tb.v:15: Cannot find file containing module: \'SignExtension\'\n    SignExtension u0(\n    ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/167274925,data/full_repos/permissive/167274925/SignExtension\n             data/full_repos/permissive/167274925,data/full_repos/permissive/167274925/SignExtension.v\n             data/full_repos/permissive/167274925,data/full_repos/permissive/167274925/SignExtension.sv\n             SignExtension\n             SignExtension.v\n             SignExtension.sv\n             obj_dir/SignExtension\n             obj_dir/SignExtension.v\n             obj_dir/SignExtension.sv\n%Error: Exiting due to 1 error(s), 8 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module SignExtension_tb();

    reg	[15:0] in;
    wire [31:0]	out;

    SignExtension u0(
        .in(in), .out(out)
    );
        
    initial begin

			#100 in <= 16'h0004;
			#20 $display("in=%h, out=%h", in, out);

			#100 in <= 16'h7000;
			#20 $display("in=%h, out=%h", in, out);

			#100 in <= 16'h9000;
			#20 $display("in=%h, out=%h", in, out);
			
			#100 in <= 16'hF000;
			#20 $display("in=%h, out=%h", in, out);
			
	 end

endmodule
module SignExtension_tb();


    reg	[15:0] in;
    wire [31:0]	out;

    SignExtension u0(
        .in(in), .out(out)
    );
        
    initial begin

			#100 in <= 16'h0004;
			#20 $display("in=%h, out=%h", in, out);

			#100 in <= 16'h7000;
			#20 $display("in=%h, out=%h", in, out);

			#100 in <= 16'h9000;
			#20 $display("in=%h, out=%h", in, out);
			
			#100 in <= 16'hF000;
			#20 $display("in=%h, out=%h", in, out);
			
	 end

endmodule