data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v
 line:132: before: "if"
1: b'%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:3: Cannot find include file: cpu.v\n`include "cpu.v" \n         ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/200314387/verilog/cpu,data/full_repos/permissive/200314387/cpu.v\n             data/full_repos/permissive/200314387/verilog/cpu,data/full_repos/permissive/200314387/cpu.v.v\n             data/full_repos/permissive/200314387/verilog/cpu,data/full_repos/permissive/200314387/cpu.v.sv\n             cpu.v\n             cpu.v.v\n             cpu.v.sv\n             obj_dir/cpu.v\n             obj_dir/cpu.v.v\n             obj_dir/cpu.v.sv\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:4: Cannot find include file: ../lib/assertion.v\n`include "../lib/assertion.v" \n         ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:5: Cannot find include file: ../lib/util.v\n`include "../lib/util.v" \n         ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:6: Cannot find include file: psuedo_assembler.sv\n`include "psuedo_assembler.sv" \n         ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:7: Cannot find include file: control_lines.v\n`include "control_lines.v" \n         ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:22: Cannot find include file: ../lib/display_snippet.sv\n   `include "../lib/display_snippet.sv" \n            ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:18: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\n    import alu_ops::*;\n           ^~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:33: Define or directive not defined: \'`DEFINE_CODE_VARS\'\n    `DEFINE_CODE_VARS(MAX_PC)\n    ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:33: syntax error, unexpected \'(\'\n    `DEFINE_CODE_VARS(MAX_PC)\n                      ^~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:79: Define or directive not defined: \'`DEV_EQ_IMMED8\'\n        `DEV_EQ_IMMED8(icount, rega, 0); \n        ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:79: syntax error, unexpected \',\'\n        `DEV_EQ_IMMED8(icount, rega, 0); \n                             ^\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:80: Define or directive not defined: \'`DEV_EQ_IMMED8\'\n        `DEV_EQ_IMMED8(icount, regb, 0); \n        ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:80: syntax error, unexpected \',\'\n        `DEV_EQ_IMMED8(icount, regb, 0); \n                             ^\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:84: Define or directive not defined: \'`INSTRUCTION\'\n        `INSTRUCTION(icount, B, pchitmp, not_used, immed, A,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, (wait_input>>8)); \n        ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:84: syntax error, unexpected \',\'\n        `INSTRUCTION(icount, B, pchitmp, not_used, immed, A,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, (wait_input>>8)); \n                           ^\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:84: Define or directive not defined: \'`SET_FLAGS\'\n        `INSTRUCTION(icount, B, pchitmp, not_used, immed, A,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, (wait_input>>8)); \n                                                              ^~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:84: Define or directive not defined: \'`CM_STD\'\n        `INSTRUCTION(icount, B, pchitmp, not_used, immed, A,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, (wait_input>>8)); \n                                                                          ^~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:84: Define or directive not defined: \'`NA_AMODE\'\n        `INSTRUCTION(icount, B, pchitmp, not_used, immed, A,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, (wait_input>>8)); \n                                                                                   ^~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:85: Define or directive not defined: \'`INSTRUCTION\'\n        `INSTRUCTION(icount, B, pc,      not_used, immed, DI, `SET_FLAGS, `CM_INV, `NA_AMODE, \'z, (wait_input)); \n        ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:85: syntax error, unexpected \',\'\n        `INSTRUCTION(icount, B, pc,      not_used, immed, DI, `SET_FLAGS, `CM_INV, `NA_AMODE, \'z, (wait_input)); \n                           ^\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:85: Define or directive not defined: \'`SET_FLAGS\'\n        `INSTRUCTION(icount, B, pc,      not_used, immed, DI, `SET_FLAGS, `CM_INV, `NA_AMODE, \'z, (wait_input)); \n                                                              ^~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:85: Define or directive not defined: \'`CM_INV\'\n        `INSTRUCTION(icount, B, pc,      not_used, immed, DI, `SET_FLAGS, `CM_INV, `NA_AMODE, \'z, (wait_input)); \n                                                                          ^~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:85: Define or directive not defined: \'`NA_AMODE\'\n        `INSTRUCTION(icount, B, pc,      not_used, immed, DI, `SET_FLAGS, `CM_INV, `NA_AMODE, \'z, (wait_input)); \n                                                                                   ^~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:88: Define or directive not defined: \'`INSTRUCTION\'\n        `INSTRUCTION(icount, A, rega,    uart,     not_used, DI,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, \'z); \n        ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:88: syntax error, unexpected \',\'\n        `INSTRUCTION(icount, A, rega,    uart,     not_used, DI,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, \'z); \n                           ^\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:88: Define or directive not defined: \'`SET_FLAGS\'\n        `INSTRUCTION(icount, A, rega,    uart,     not_used, DI,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, \'z); \n                                                                  ^~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:88: Define or directive not defined: \'`CM_STD\'\n        `INSTRUCTION(icount, A, rega,    uart,     not_used, DI,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, \'z); \n                                                                              ^~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:88: Define or directive not defined: \'`NA_AMODE\'\n        `INSTRUCTION(icount, A, rega,    uart,     not_used, DI,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, \'z); \n                                                                                       ^~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:92: Define or directive not defined: \'`INSTRUCTION\'\n        `INSTRUCTION(icount, B, pchitmp, not_used, immed,    A,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, (wait_output>>8)); \n        ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:92: syntax error, unexpected \',\'\n        `INSTRUCTION(icount, B, pchitmp, not_used, immed,    A,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, (wait_output>>8)); \n                           ^\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:92: Define or directive not defined: \'`SET_FLAGS\'\n        `INSTRUCTION(icount, B, pchitmp, not_used, immed,    A,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, (wait_output>>8)); \n                                                                 ^~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:92: Define or directive not defined: \'`CM_STD\'\n        `INSTRUCTION(icount, B, pchitmp, not_used, immed,    A,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, (wait_output>>8)); \n                                                                             ^~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:92: Define or directive not defined: \'`NA_AMODE\'\n        `INSTRUCTION(icount, B, pchitmp, not_used, immed,    A,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, (wait_output>>8)); \n                                                                                      ^~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:93: Define or directive not defined: \'`INSTRUCTION\'\n        `INSTRUCTION(icount, B, pc,      not_used, immed,    DO, `SET_FLAGS, `CM_INV, `NA_AMODE, \'z, (wait_output)); \n        ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:93: syntax error, unexpected \',\'\n        `INSTRUCTION(icount, B, pc,      not_used, immed,    DO, `SET_FLAGS, `CM_INV, `NA_AMODE, \'z, (wait_output)); \n                           ^\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:93: Define or directive not defined: \'`SET_FLAGS\'\n        `INSTRUCTION(icount, B, pc,      not_used, immed,    DO, `SET_FLAGS, `CM_INV, `NA_AMODE, \'z, (wait_output)); \n                                                                 ^~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:93: Define or directive not defined: \'`CM_INV\'\n        `INSTRUCTION(icount, B, pc,      not_used, immed,    DO, `SET_FLAGS, `CM_INV, `NA_AMODE, \'z, (wait_output)); \n                                                                             ^~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:93: Define or directive not defined: \'`NA_AMODE\'\n        `INSTRUCTION(icount, B, pc,      not_used, immed,    DO, `SET_FLAGS, `CM_INV, `NA_AMODE, \'z, (wait_output)); \n                                                                                      ^~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:96: Define or directive not defined: \'`INSTRUCTION\'\n        `INSTRUCTION(icount, A, uart,    rega,     not_used, A,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, \'z);\n        ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:96: syntax error, unexpected \',\'\n        `INSTRUCTION(icount, A, uart,    rega,     not_used, A,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, \'z);\n                           ^\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:96: Define or directive not defined: \'`SET_FLAGS\'\n        `INSTRUCTION(icount, A, uart,    rega,     not_used, A,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, \'z);\n                                                                 ^~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:96: Define or directive not defined: \'`CM_STD\'\n        `INSTRUCTION(icount, A, uart,    rega,     not_used, A,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, \'z);\n                                                                             ^~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:96: Define or directive not defined: \'`NA_AMODE\'\n        `INSTRUCTION(icount, A, uart,    rega,     not_used, A,  `SET_FLAGS, `CM_STD, `NA_AMODE, \'z, \'z);\n                                                                                      ^~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:97: Define or directive not defined: \'`JMP_IMMED16\'\n        `JMP_IMMED16(icount, wait_input); \n        ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:97: syntax error, unexpected \',\'\n        `JMP_IMMED16(icount, wait_input); \n                           ^\n%Warning-STMTDLY: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:104: Unsupported: Ignoring delay on this delayed statement.\n            #1000\n            ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:108: Unsupported: Ignoring delay on this delayed statement.\n            #TCLK;\n            ^\n%Warning-STMTDLY: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:112: Unsupported: Ignoring delay on this delayed statement.\n                #TCLK\n                ^\n%Warning-STMTDLY: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:116: Unsupported: Ignoring delay on this delayed statement.\n                #TCLK;\n                ^\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:136: Define or directive not defined: \'`ROM\'\n            data = `ROM(addr);\n                   ^~~~\n%Warning-STMTDLY: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:138: Unsupported: Ignoring delay on this delayed statement.\n            #1000\n            ^\n%Error: data/full_repos/permissive/200314387/verilog/cpu/prog_hardware_echo.v:155: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n                );\n                ^\n%Error: Exiting due to 47 error(s), 5 warning(s)\n'
module test();
    bit doSim = 1; 

    import alu_ops::*;
    import control::*;
    import util::*;

   `include "../lib/display_snippet.sv"

    logic clk=0;
    bit _RESET_SWITCH = 0;
    cpu CPU(_RESET_SWITCH, clk);





    localparam MAX_PC=65536;
    `DEFINE_CODE_VARS(MAX_PC)


    logic [47:0] data =0;
    int addr;
    string rom1 = "roms/pattern1.rom";
    string rom2 = "roms/pattern2.rom";
    string rom3 = "roms/pattern3.rom";
    string rom4 = "roms/pattern4.rom";
    string rom5 = "roms/pattern5.rom";
    string rom6 = "roms/pattern6.rom";
    int n_file1;
    int n_file2;
    int n_file3;
    int n_file4;
    int n_file5;
    int n_file6;

    integer icount=0;

    
    wire [7:0] cH = "H";
    wire [7:0] cE = "e";
    wire [7:0] cL = "l";
    wire [7:0] cO = "o";

    string NL=8'h0A;

    string hello = {"Hello!", NL};
    string bye = {"Bye!", NL};
    int idx;
    int loop_addr;
    int write_addr;

    int start;
    int write_loop;


    int TCLK=1000;
    int wait_input, wait_output;

    initial begin

        icount=0;

        start=icount;
        `DEV_EQ_IMMED8(icount, rega, 0); 
        `DEV_EQ_IMMED8(icount, regb, 0); 


        wait_input = icount;
        `INSTRUCTION(icount, B, pchitmp, not_used, immed, A,  `SET_FLAGS, `CM_STD, `NA_AMODE, 'z, (wait_input>>8)); 
        `INSTRUCTION(icount, B, pc,      not_used, immed, DI, `SET_FLAGS, `CM_INV, `NA_AMODE, 'z, (wait_input)); 


        `INSTRUCTION(icount, A, rega,    uart,     not_used, DI,  `SET_FLAGS, `CM_STD, `NA_AMODE, 'z, 'z); 


        wait_output = icount;
        `INSTRUCTION(icount, B, pchitmp, not_used, immed,    A,  `SET_FLAGS, `CM_STD, `NA_AMODE, 'z, (wait_output>>8)); 
        `INSTRUCTION(icount, B, pc,      not_used, immed,    DO, `SET_FLAGS, `CM_INV, `NA_AMODE, 'z, (wait_output)); 


        `INSTRUCTION(icount, A, uart,    rega,     not_used, A,  `SET_FLAGS, `CM_STD, `NA_AMODE, 'z, 'z);
        `JMP_IMMED16(icount, wait_input); 


        if (doSim) begin

            _RESET_SWITCH = 0;
            clk=0;
            #1000
            $display("RELEASE");
            _RESET_SWITCH = 1;
            clk = 1;
            #TCLK;

            while (1==1) begin
                sleep(1000);
                #TCLK
                $display("");
                $display("%9t ", $time, " CLOCK DOWN - EXEC ", CPU.disasmCur());
                clk=0;
                #TCLK;
                $display("CLOCK UP - PC INC");
                clk = 1;
                $display("%9t RT", $realtime);
            end
        end



        n_file1 = $fopen(rom1, "wb");
        n_file2 = $fopen(rom2, "wb");
        n_file3 = $fopen(rom3, "wb");
        n_file4 = $fopen(rom4, "wb");
        n_file5 = $fopen(rom5, "wb");
        n_file6 = $fopen(rom6, "wb");

        for (addr=0; addr < icount; addr++) begin



            data = `ROM(addr);

            #1000

            $fwrite(n_file1, "%c", data[7:0]);
            $fwrite(n_file2, "%c", data[15:8]);
            $fwrite(n_file3, "%c", data[23:16]);
            $fwrite(n_file4, "%c", data[31:24]);
            $fwrite(n_file5, "%c", data[39:32]);
            $fwrite(n_file6, "%c", data[47:40]);

            $display("written %d", addr, " = %8b %8b %8b %8b %8b %8b(%c)", 
                data[47:40],
                data[39:32],
                data[31:24],
                data[23:16],
                data[15:8],
                data[7:0],
                printable(data[7:0]),
                );
            $display("CODE : %-s" , CPU.disasm(data), "(%c)(%d)",
                printable(data[7:0]),
                data[7:0]
             );
            $display("");
        end    

        $fclose(n_file1);
        $fclose(n_file2);
        $fclose(n_file3);
        $fclose(n_file4);
        $fclose(n_file5);
        $fclose(n_file6);

        $display("DONE");
        $finish();
    end

    function [7:0] printable([7:0] c);
        if (c == 0) return 32;
        else if ($isunknown(c)) return 32; 
        else if (c < 32 ) return 32; 
        else if (c >= 128) return 32;
        return c;
    endfunction

endmodule
module test();

    bit doSim = 1; 

    import alu_ops::*;
    import control::*;
    import util::*;

   `include "../lib/display_snippet.sv"

    logic clk=0;
    bit _RESET_SWITCH = 0;
    cpu CPU(_RESET_SWITCH, clk);





    localparam MAX_PC=65536;
    `DEFINE_CODE_VARS(MAX_PC)


    logic [47:0] data =0;
    int addr;
    string rom1 = "roms/pattern1.rom";
    string rom2 = "roms/pattern2.rom";
    string rom3 = "roms/pattern3.rom";
    string rom4 = "roms/pattern4.rom";
    string rom5 = "roms/pattern5.rom";
    string rom6 = "roms/pattern6.rom";
    int n_file1;
    int n_file2;
    int n_file3;
    int n_file4;
    int n_file5;
    int n_file6;

    integer icount=0;

    
    wire [7:0] cH = "H";
    wire [7:0] cE = "e";
    wire [7:0] cL = "l";
    wire [7:0] cO = "o";

    string NL=8'h0A;

    string hello = {"Hello!", NL};
    string bye = {"Bye!", NL};
    int idx;
    int loop_addr;
    int write_addr;

    int start;
    int write_loop;


    int TCLK=1000;
    int wait_input, wait_output;

    initial begin

        icount=0;

        start=icount;
        `DEV_EQ_IMMED8(icount, rega, 0); 
        `DEV_EQ_IMMED8(icount, regb, 0); 


        wait_input = icount;
        `INSTRUCTION(icount, B, pchitmp, not_used, immed, A,  `SET_FLAGS, `CM_STD, `NA_AMODE, 'z, (wait_input>>8)); 
        `INSTRUCTION(icount, B, pc,      not_used, immed, DI, `SET_FLAGS, `CM_INV, `NA_AMODE, 'z, (wait_input)); 


        `INSTRUCTION(icount, A, rega,    uart,     not_used, DI,  `SET_FLAGS, `CM_STD, `NA_AMODE, 'z, 'z); 


        wait_output = icount;
        `INSTRUCTION(icount, B, pchitmp, not_used, immed,    A,  `SET_FLAGS, `CM_STD, `NA_AMODE, 'z, (wait_output>>8)); 
        `INSTRUCTION(icount, B, pc,      not_used, immed,    DO, `SET_FLAGS, `CM_INV, `NA_AMODE, 'z, (wait_output)); 


        `INSTRUCTION(icount, A, uart,    rega,     not_used, A,  `SET_FLAGS, `CM_STD, `NA_AMODE, 'z, 'z);
        `JMP_IMMED16(icount, wait_input); 


        if (doSim) begin

            _RESET_SWITCH = 0;
            clk=0;
            #1000
            $display("RELEASE");
            _RESET_SWITCH = 1;
            clk = 1;
            #TCLK;

            while (1==1) begin
                sleep(1000);
                #TCLK
                $display("");
                $display("%9t ", $time, " CLOCK DOWN - EXEC ", CPU.disasmCur());
                clk=0;
                #TCLK;
                $display("CLOCK UP - PC INC");
                clk = 1;
                $display("%9t RT", $realtime);
            end
        end



        n_file1 = $fopen(rom1, "wb");
        n_file2 = $fopen(rom2, "wb");
        n_file3 = $fopen(rom3, "wb");
        n_file4 = $fopen(rom4, "wb");
        n_file5 = $fopen(rom5, "wb");
        n_file6 = $fopen(rom6, "wb");

        for (addr=0; addr < icount; addr++) begin



            data = `ROM(addr);

            #1000

            $fwrite(n_file1, "%c", data[7:0]);
            $fwrite(n_file2, "%c", data[15:8]);
            $fwrite(n_file3, "%c", data[23:16]);
            $fwrite(n_file4, "%c", data[31:24]);
            $fwrite(n_file5, "%c", data[39:32]);
            $fwrite(n_file6, "%c", data[47:40]);

            $display("written %d", addr, " = %8b %8b %8b %8b %8b %8b(%c)", 
                data[47:40],
                data[39:32],
                data[31:24],
                data[23:16],
                data[15:8],
                data[7:0],
                printable(data[7:0]),
                );
            $display("CODE : %-s" , CPU.disasm(data), "(%c)(%d)",
                printable(data[7:0]),
                data[7:0]
             );
            $display("");
        end    

        $fclose(n_file1);
        $fclose(n_file2);
        $fclose(n_file3);
        $fclose(n_file4);
        $fclose(n_file5);
        $fclose(n_file6);

        $display("DONE");
        $finish();
    end

    function [7:0] printable([7:0] c);
        if (c == 0) return 32;
        else if ($isunknown(c)) return 32; 
        else if (c < 32 ) return 32; 
        else if (c >= 128) return 32;
        return c;
    endfunction

endmodule