data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/top_address_converter.sv
'utf-8' codec can't decode byte 0xa9 in position 185: invalid start byte
1: b'%Error: data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/top_address_converter.sv:24: Cannot find include file: ../sonic_address_converter.sv\n`include "../sonic_address_converter.sv" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic,data/full_repos/permissive/18477150/../sonic_address_converter.sv\n             data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic,data/full_repos/permissive/18477150/../sonic_address_converter.sv.v\n             data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic,data/full_repos/permissive/18477150/../sonic_address_converter.sv.sv\n             ../sonic_address_converter.sv\n             ../sonic_address_converter.sv.v\n             ../sonic_address_converter.sv.sv\n             obj_dir/../sonic_address_converter.sv\n             obj_dir/../sonic_address_converter.sv.v\n             obj_dir/../sonic_address_converter.sv.sv\n%Error: data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/top_address_converter.sv:25: Cannot find include file: ../definitions.sv\n`include "../definitions.sv" \n         ^~~~~~~~~~~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/top_address_converter.sv:58: Unsupported: Ignoring delay on this delayed statement.\nalways #4 clk_in <= ~clk_in;\n       ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 2 error(s), 1 warning(s)\n'
module top;
  
timeunit 1ns; timeprecision 1ps;


logic            clk_in;
logic   [12:0]   address_in;

AddressConverterInterface ac_intf();


sonic_address_converter  _sonic_address_converter(
		.clk_in (clk_in),
        .address_in (address_in),
		.ac_intf(ac_intf.DUT)
		);


test_sonic_address_converter  test (
		.clk (clk_in),
        .address_out (address_in),
		.ac_intf(ac_intf.TB)
	);


initial begin
  clk_in <= 1'b1;
end


always #4 clk_in <= ~clk_in;

endmodule
module top;

  
timeunit 1ns; timeprecision 1ps;


logic            clk_in;
logic   [12:0]   address_in;

AddressConverterInterface ac_intf();


sonic_address_converter  _sonic_address_converter(
		.clk_in (clk_in),
        .address_in (address_in),
		.ac_intf(ac_intf.DUT)
		);


test_sonic_address_converter  test (
		.clk (clk_in),
        .address_out (address_in),
		.ac_intf(ac_intf.TB)
	);


initial begin
  clk_in <= 1'b1;
end


always #4 clk_in <= ~clk_in;

endmodule