data/full_repos/permissive/115487336/mycode/Whac-A-Mole/muxer.v
data/verilator_xmls/55a7eec7-ee4e-41c6-9cf2-6a55777d2618.xml
module muxer(
	input [4:0] state,
	input [15:0] delay,
	
	input [7:0] resttime,
	input [7:0] score,
	
	input timeover,
	input scorezero,
	output [15:0] data
);


wire [15:0] temp;
wire [15:0] halt;

assign temp[15:8] = scorezero == 1 ? 8'b0 : score[7:0];
assign temp[7:0] = timeover == 1 ? 8'b0 : resttime;


assign data = (state==5'd2 ? delay: temp );

endmodule
module muxer(
	input [4:0] state,
	input [15:0] delay,
	
	input [7:0] resttime,
	input [7:0] score,
	
	input timeover,
	input scorezero,
	output [15:0] data
);



wire [15:0] temp;
wire [15:0] halt;

assign temp[15:8] = scorezero == 1 ? 8'b0 : score[7:0];
assign temp[7:0] = timeover == 1 ? 8'b0 : resttime;


assign data = (state==5'd2 ? delay: temp );

endmodule