data/full_repos/permissive/159001439/src/axi_ram.v
 line:52: before: "("
data/verilator_xmls/68e6dc2a-d829-4341-b98d-d754fb140c47.xml
function [DATA_WIDTH-1:0] read(input [MEM_ADDR_MSB:0] addr);
begin
	read = mem[addr[MEM_ADDR_MSB:MEM_ADDR_LSB]];
end
endfunction
function [DATA_WIDTH-1:0] read(input [MEM_ADDR_MSB:0] addr);

begin
	read = mem[addr[MEM_ADDR_MSB:MEM_ADDR_LSB]];
end
endfunction