data/full_repos/permissive/147265957/src/sdpselector7e.v
None: at end of input
data/verilator_xmls/55510902-8836-467d-b945-7415b420f277.xml
module sdpselector7e(
  sw, an
);
    input [15:0] sw;
    output reg [7:0] an;
    
    always @(sw,an) begin
        an = 8'b11111111;
        an[sw[15:13]] = 0;
    end

endmodule
module sdpselector7e(
  sw, an
);

    input [15:0] sw;
    output reg [7:0] an;
    
    always @(sw,an) begin
        an = 8'b11111111;
        an[sw[15:13]] = 0;
    end

endmodule