data/full_repos/permissive/162672365/InstructionMemory32.v
data/verilator_xmls/eac681da-77d1-4923-be2a-6d4126f1be3c.xml
module InstructionMemory32(instruction, ProgramCounter, clk);
	input[31:0] ProgramCounter;
	input clk;
	output[31:0] instruction;
	reg [31:0] memory [0:31];
	reg [31:0] instruction;
	integer addr;
	
	initial
		begin
			memory[0] = 32'b00000001000010010101000000100000;
			memory[1] = 32'b00000001000010010101000000100001;
			memory[2] = 32'b00100001000010010001100100100110;
			memory[3] = 32'b00100101000010010001100100100110;
			memory[4] = 32'b00000001000010010101000000100100;
			memory[5] = 32'b00110001000010010001100100100110;
			memory[6] = 32'b00000001000010010101000000011010;
			memory[7] = 32'b00000001000010010101000000011011;
			memory[8] = 32'b00000001000010010101000000011000;
			memory[9] = 32'b00000001000010010101000000011001;
			memory[10] = 32'b00000001000010010101000000100111;
			memory[11] = 32'b00000001000010010101000000100101;
			memory[12] = 32'b00110101000010010001100100100110;
			memory[13] = 32'b00000001000010010101000000100010;
			memory[14] = 32'b00000001000010010101000000100011;
			memory[15] = 32'b00000001000010010101000000100110;
			memory[16] = 32'b00111001000010010001100100100110;
			memory[17] = 32'b00000001000010010101000000101010;
			memory[18] = 32'b00000001000010010101000000101011;
			memory[19] = 32'b00101001000010010001100100100110;
			memory[20] = 32'b00101101000010010001100100100110;
			memory[21] = 32'b00010001000010010001100100100110;
			memory[22] = 32'b00000101000010010001100100100110;
			memory[23] = 32'b00001000000000000001100100100110;
			memory[24] = 32'b00000100000000000001100100100110;
			memory[25] = 32'b00000000000000000000000000001001;
			memory[26] = 32'b00000001000000000000000000001000;
			memory[27] = 32'b10001101000010010001100100100110;
			memory[28] = 32'b10101101000010010001100100100110;
			memory[29] = 32'b01101000000000000000000000000000;
			memory[30] = 32'b00000000000000000000000000000000;
			memory[31] = 32'b00000000000000000000000000000000;
		end
  
	always @(posedge clk) begin
		addr = ProgramCounter[31:0];
		instruction = memory[addr/4];
	end
	
endmodule
module InstructionMemory32(instruction, ProgramCounter, clk);

	input[31:0] ProgramCounter;
	input clk;
	output[31:0] instruction;
	reg [31:0] memory [0:31];
	reg [31:0] instruction;
	integer addr;
	
	initial
		begin
			memory[0] = 32'b00000001000010010101000000100000;
			memory[1] = 32'b00000001000010010101000000100001;
			memory[2] = 32'b00100001000010010001100100100110;
			memory[3] = 32'b00100101000010010001100100100110;
			memory[4] = 32'b00000001000010010101000000100100;
			memory[5] = 32'b00110001000010010001100100100110;
			memory[6] = 32'b00000001000010010101000000011010;
			memory[7] = 32'b00000001000010010101000000011011;
			memory[8] = 32'b00000001000010010101000000011000;
			memory[9] = 32'b00000001000010010101000000011001;
			memory[10] = 32'b00000001000010010101000000100111;
			memory[11] = 32'b00000001000010010101000000100101;
			memory[12] = 32'b00110101000010010001100100100110;
			memory[13] = 32'b00000001000010010101000000100010;
			memory[14] = 32'b00000001000010010101000000100011;
			memory[15] = 32'b00000001000010010101000000100110;
			memory[16] = 32'b00111001000010010001100100100110;
			memory[17] = 32'b00000001000010010101000000101010;
			memory[18] = 32'b00000001000010010101000000101011;
			memory[19] = 32'b00101001000010010001100100100110;
			memory[20] = 32'b00101101000010010001100100100110;
			memory[21] = 32'b00010001000010010001100100100110;
			memory[22] = 32'b00000101000010010001100100100110;
			memory[23] = 32'b00001000000000000001100100100110;
			memory[24] = 32'b00000100000000000001100100100110;
			memory[25] = 32'b00000000000000000000000000001001;
			memory[26] = 32'b00000001000000000000000000001000;
			memory[27] = 32'b10001101000010010001100100100110;
			memory[28] = 32'b10101101000010010001100100100110;
			memory[29] = 32'b01101000000000000000000000000000;
			memory[30] = 32'b00000000000000000000000000000000;
			memory[31] = 32'b00000000000000000000000000000000;
		end
  
	always @(posedge clk) begin
		addr = ProgramCounter[31:0];
		instruction = memory[addr/4];
	end
	
endmodule