data/full_repos/permissive/178052224/Tarea8/contador_gray_cond.v
1: b'%Warning-WIDTH: data/full_repos/permissive/178052224/Tarea8/contador_gray_cond.v:20: Operator LT expects 32 or 6 bits on the LHS, but LHS\'s VARREF \'counter\' generates 5 bits.\n                                                                                   : ... In instance contador_gray_cond\n            if(counter < (SIZE -1) )begin\n                       ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module contador_gray_cond(
                input               clk,
                input               enable,
                input               reset_L,
                output reg  [4:0]   salida_gray );


    reg [4:0] counter;


    parameter SIZE = 32;
    integer iteracion = 1;
    always@(posedge clk)begin


        if( !reset_L )begin
               counter<= 'b0;
        end else if (enable) begin

            if(counter < (SIZE -1) )begin
                counter <= counter + 1;
            end else begin
                counter <= 'b0;
                iteracion <= iteracion + 1;
            end
        end
    end

    always@(*)begin
        salida_gray = counter ^ (counter >> 1);
    end
endmodule
module contador_gray_cond(
                input               clk,
                input               enable,
                input               reset_L,
                output reg  [4:0]   salida_gray );



    reg [4:0] counter;


    parameter SIZE = 32;
    integer iteracion = 1;
    always@(posedge clk)begin


        if( !reset_L )begin
               counter<= 'b0;
        end else if (enable) begin

            if(counter < (SIZE -1) )begin
                counter <= counter + 1;
            end else begin
                counter <= 'b0;
                iteracion <= iteracion + 1;
            end
        end
    end

    always@(*)begin
        salida_gray = counter ^ (counter >> 1);
    end
endmodule