data/full_repos/permissive/122497324/assignment_4/assignment_4.v
 line:593: before: "("
1: b'%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:238: Cell has missing pin: \'store_mux_stall\'\n  reservation_station #(.BUS_LENGTH(2),.ID(3\'b010)) FP_add_station\n                                                    ^~~~~~~~~~~~~~\n                     ... Use "/* verilator lint_off PINMISSING */" and lint_on around source to disable this message.\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:238: Cell has missing pin: \'trigger_exes\'\n  reservation_station #(.BUS_LENGTH(2),.ID(3\'b010)) FP_add_station\n                                                    ^~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:238: Cell has missing pin: \'memory_offset_out\'\n  reservation_station #(.BUS_LENGTH(2),.ID(3\'b010)) FP_add_station\n                                                    ^~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:238: Cell has missing pin: \'valid_data\'\n  reservation_station #(.BUS_LENGTH(2),.ID(3\'b010)) FP_add_station\n                                                    ^~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:254: Cell has missing pin: \'store_mux_stall\'\n  reservation_station #(.BUS_LENGTH(1),.ID(3\'b001)) FP_mult_station\n                                                    ^~~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:254: Cell has missing pin: \'trigger_exes\'\n  reservation_station #(.BUS_LENGTH(1),.ID(3\'b001)) FP_mult_station\n                                                    ^~~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:254: Cell has missing pin: \'memory_offset_out\'\n  reservation_station #(.BUS_LENGTH(1),.ID(3\'b001)) FP_mult_station\n                                                    ^~~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:254: Cell has missing pin: \'valid_data\'\n  reservation_station #(.BUS_LENGTH(1),.ID(3\'b001)) FP_mult_station\n                                                    ^~~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:270: Cell has missing pin: \'trigger_exes\'\n  reservation_station #(.BUS_LENGTH(2),.ID(3\'b011)) store_station\n                                                    ^~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:286: Cell has missing pin: \'store_mux_stall\'\n  reservation_station #(.BUS_LENGTH(2),.ID(3\'b100)) load_station\n                                                    ^~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:315: Cell has missing pin: \'bbus_data_in\'\n  execution_unit #(.CYCLE_TIME(2),.ID(2\'b11)) load_store_unit\n                                              ^~~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:315: Cell has missing pin: \'fake_clock\'\n  execution_unit #(.CYCLE_TIME(2),.ID(2\'b11)) load_store_unit\n                                              ^~~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:329: Cell has missing pin: \'offset_in\'\n  execution_unit #(.CYCLE_TIME(3),.ID(2\'b10)) FP_add_unit\n                                              ^~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:329: Cell has missing pin: \'memory_in\'\n  execution_unit #(.CYCLE_TIME(3),.ID(2\'b10)) FP_add_unit\n                                              ^~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:329: Cell has missing pin: \'store_dbus_data_in\'\n  execution_unit #(.CYCLE_TIME(3),.ID(2\'b10)) FP_add_unit\n                                              ^~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:329: Cell has missing pin: \'fake_clock\'\n  execution_unit #(.CYCLE_TIME(3),.ID(2\'b10)) FP_add_unit\n                                              ^~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:329: Cell has missing pin: \'memory_address\'\n  execution_unit #(.CYCLE_TIME(3),.ID(2\'b10)) FP_add_unit\n                                              ^~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:329: Cell has missing pin: \'memory_out\'\n  execution_unit #(.CYCLE_TIME(3),.ID(2\'b10)) FP_add_unit\n                                              ^~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:329: Cell has missing pin: \'op_code_out\'\n  execution_unit #(.CYCLE_TIME(3),.ID(2\'b10)) FP_add_unit\n                                              ^~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:341: Cell has missing pin: \'offset_in\'\n  execution_unit #(.CYCLE_TIME(5),.ID(2\'b01)) FP_mult_unit\n                                              ^~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:341: Cell has missing pin: \'memory_in\'\n  execution_unit #(.CYCLE_TIME(5),.ID(2\'b01)) FP_mult_unit\n                                              ^~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:341: Cell has missing pin: \'store_dbus_data_in\'\n  execution_unit #(.CYCLE_TIME(5),.ID(2\'b01)) FP_mult_unit\n                                              ^~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:341: Cell has missing pin: \'memory_address\'\n  execution_unit #(.CYCLE_TIME(5),.ID(2\'b01)) FP_mult_unit\n                                              ^~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:341: Cell has missing pin: \'memory_out\'\n  execution_unit #(.CYCLE_TIME(5),.ID(2\'b01)) FP_mult_unit\n                                              ^~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:341: Cell has missing pin: \'op_code_out\'\n  execution_unit #(.CYCLE_TIME(5),.ID(2\'b01)) FP_mult_unit\n                                              ^~~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:962: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s CONST \'31\'bzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz\' generates 31 bits.\n                                                                                    : ... In instance assignment_4.load_store_unit\n    memory_address = 31\'bz;\n                   ^\n%Warning-WIDTH: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:1007: Operator ADD expects 32 bits on the RHS, but RHS\'s VARREF \'offset_in\' generates 3 bits.\n                                                                                     : ... In instance assignment_4.load_store_unit\n              memory_address = abus_data_in + offset_in;\n                                            ^\n%Warning-WIDTH: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:1014: Operator ADD expects 32 bits on the RHS, but RHS\'s VARREF \'offset_in\' generates 3 bits.\n                                                                                     : ... In instance assignment_4.load_store_unit\n              memory_address = abus_data_in + offset_in;\n                                            ^\n%Warning-WIDTH: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:583: Operator ASSIGN expects 3 bits on the Assign RHS, but Assign RHS\'s CONST \'8\'bzzzzzzzz\' generates 8 bits.\n                                                                                    : ... In instance assignment_4.FP_add_station\n    d_select_out = 8\'bz;\n                 ^\n%Warning-UNSIGNED: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:463: Comparison is constant due to unsigned arithmetic\n                                                                                       : ... In instance assignment_4\n    if((memory_address >= 0) && (load_store > 3\'b000)) begin\n                       ^~\n%Error: Exiting due to 30 warning(s)\n'
module regfile(
  input [7:0] AselectAdd,
  input [7:0] AselectInt,
  input [7:0] AselectMult,
  input [7:0] AselectLdSt,
  input [7:0] BselectAdd,
  input [7:0] BselectInt,
  input [7:0] BselectMult,
  input [7:0] BselectLdSt,
  input [7:0] Dselect,
  input [7:0] busySelect,
  input [31:0] dbus,
  output [31:0] abusAdd,
  output [31:0] abusInt,
  output [31:0] abusMult,
  output [31:0] abusLdSt,
  output [31:0] bbusAdd,
  output [31:0] bbusInt,
  output [31:0] bbusMult,
  output [31:0] bbusLdSt,
  output [7:0] busyBus,
  input clk,
  input validData
  );

  assign abusAdd = AselectAdd[0] ? 32'b0 : 32'bz;
  assign bbusLdSt = BselectLdSt[0] ? 32'b0 : 32'bz;
  assign abusInt = AselectInt[0] ? 32'b0 : 32'bz;
  assign bbusAdd = BselectAdd[0] ? 32'b0 : 32'bz;
  assign abusLdSt = AselectLdSt[0] ? 32'b0 : 32'bz;
  assign bbusInt = BselectInt[0] ? 32'b0 : 32'bz;
  assign abusMult = AselectMult[0] ? 32'b0 : 32'bz;
  assign bbusMult = BselectMult[0] ? 32'b0 : 32'bz;
  assign busyBus[0] = 0;

  DNegflipFlop myFlips[6:0](
    .dbus(dbus),
    .abusAdd(abusAdd),
    .abusInt(abusInt),
    .abusMult(abusMult),
    .abusLdSt(abusLdSt),
    .Dselect(Dselect[7:1]),
    .BselectLdSt(BselectLdSt[7:1]),
    .BselectAdd(BselectAdd[7:1]),
    .BselectInt(BselectInt[7:1]),
    .BselectMult(BselectMult[7:1]),
    .AselectAdd(AselectAdd[7:1]),
    .AselectInt(AselectInt[7:1]),
    .AselectLdSt(AselectLdSt[7:1]),
    .AselectMult(AselectMult[7:1]),
    .busySelect(busySelect[7:1]),
    .bbusAdd(bbusAdd),
    .bbusInt(bbusInt),
    .bbusMult(bbusMult),
    .bbusLdSt(bbusLdSt),
    .isBusy(busyBus[7:1]),
    .clk(clk),
    .validData(validData)
    );
endmodule
module regfile(
  input [7:0] AselectAdd,
  input [7:0] AselectInt,
  input [7:0] AselectMult,
  input [7:0] AselectLdSt,
  input [7:0] BselectAdd,
  input [7:0] BselectInt,
  input [7:0] BselectMult,
  input [7:0] BselectLdSt,
  input [7:0] Dselect,
  input [7:0] busySelect,
  input [31:0] dbus,
  output [31:0] abusAdd,
  output [31:0] abusInt,
  output [31:0] abusMult,
  output [31:0] abusLdSt,
  output [31:0] bbusAdd,
  output [31:0] bbusInt,
  output [31:0] bbusMult,
  output [31:0] bbusLdSt,
  output [7:0] busyBus,
  input clk,
  input validData
  );


  assign abusAdd = AselectAdd[0] ? 32'b0 : 32'bz;
  assign bbusLdSt = BselectLdSt[0] ? 32'b0 : 32'bz;
  assign abusInt = AselectInt[0] ? 32'b0 : 32'bz;
  assign bbusAdd = BselectAdd[0] ? 32'b0 : 32'bz;
  assign abusLdSt = AselectLdSt[0] ? 32'b0 : 32'bz;
  assign bbusInt = BselectInt[0] ? 32'b0 : 32'bz;
  assign abusMult = AselectMult[0] ? 32'b0 : 32'bz;
  assign bbusMult = BselectMult[0] ? 32'b0 : 32'bz;
  assign busyBus[0] = 0;

  DNegflipFlop myFlips[6:0](
    .dbus(dbus),
    .abusAdd(abusAdd),
    .abusInt(abusInt),
    .abusMult(abusMult),
    .abusLdSt(abusLdSt),
    .Dselect(Dselect[7:1]),
    .BselectLdSt(BselectLdSt[7:1]),
    .BselectAdd(BselectAdd[7:1]),
    .BselectInt(BselectInt[7:1]),
    .BselectMult(BselectMult[7:1]),
    .AselectAdd(AselectAdd[7:1]),
    .AselectInt(AselectInt[7:1]),
    .AselectLdSt(AselectLdSt[7:1]),
    .AselectMult(AselectMult[7:1]),
    .busySelect(busySelect[7:1]),
    .bbusAdd(bbusAdd),
    .bbusInt(bbusInt),
    .bbusMult(bbusMult),
    .bbusLdSt(bbusLdSt),
    .isBusy(busyBus[7:1]),
    .clk(clk),
    .validData(validData)
    );
endmodule