data/full_repos/permissive/101793969/messbauer_test_environment/tests/messbauer_generator_testbench_channelafter.v
None: at end of input
1: b'%Warning-STMTDLY: data/full_repos/permissive/101793969/messbauer_test_environment/tests/messbauer_generator_testbench_channelafter.v:51: Unsupported: Ignoring delay on this delayed statement.\n        #100;\n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/101793969/messbauer_test_environment/tests/messbauer_generator_testbench_channelafter.v:58: Unsupported: Ignoring delay on this delayed statement.\n        #20 aclk = ~aclk;\n        ^\n%Error: data/full_repos/permissive/101793969/messbauer_test_environment/tests/messbauer_generator_testbench_channelafter.v:36: Cannot find file containing module: \'messbauer_generator\'\n    messbauer_generator # (.CHANNEL_TYPE(2))   \n    ^~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/101793969/messbauer_test_environment/tests,data/full_repos/permissive/101793969/messbauer_generator\n             data/full_repos/permissive/101793969/messbauer_test_environment/tests,data/full_repos/permissive/101793969/messbauer_generator.v\n             data/full_repos/permissive/101793969/messbauer_test_environment/tests,data/full_repos/permissive/101793969/messbauer_generator.sv\n             messbauer_generator\n             messbauer_generator.v\n             messbauer_generator.sv\n             obj_dir/messbauer_generator\n             obj_dir/messbauer_generator.v\n             obj_dir/messbauer_generator.sv\n%Error: Exiting due to 1 error(s), 2 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module messbauer_generator_testbench_channelafter;


    reg aclk;
    reg areset_n;


    wire start;
    wire channel;


    messbauer_generator # (.CHANNEL_TYPE(2))
    uut 
    (
        .aclk(aclk), 
        .areset_n(areset_n), 
        .start(start), 
        .channel(channel)
    );

    initial begin

        aclk = 0;
        areset_n = 0;


        #100;
      areset_n = 1;

    end
    
    always 
    begin
        #20 aclk = ~aclk;
    end
      
endmodule
module messbauer_generator_testbench_channelafter;



    reg aclk;
    reg areset_n;


    wire start;
    wire channel;


    messbauer_generator # (.CHANNEL_TYPE(2))
    uut 
    (
        .aclk(aclk), 
        .areset_n(areset_n), 
        .start(start), 
        .channel(channel)
    );

    initial begin

        aclk = 0;
        areset_n = 0;


        #100;
      areset_n = 1;

    end
    
    always 
    begin
        #20 aclk = ~aclk;
    end
      
endmodule