data/full_repos/permissive/143278/ivltests/bitsel9.v
1: b'%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/bitsel9.v:37: Bit extraction of var[31:0] requires 5 bit index, not 9 bits.\n                                                                       : ... In instance main\n     t = {17\'d0,INIT_00[c]}<<1;\n                       ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/bitsel9.v:45: Bit extraction of var[31:0] requires 5 bit index, not 9 bits.\n                                                                       : ... In instance main\n     t = {17\'d0,INIT_00[c]}<<1;\n                       ^\n%Error: Exiting due to 2 warning(s)\n'
module main();
  parameter INIT_00 = 32'hffffffff;
  reg [17:0] t;
  reg [8:0] c;

  initial begin
     t = {17'd0,INIT_00[0]}<<1;
     $display("%b",t);
     if (t !== 18'b00_0000_0000_0000_0010) begin
	$display("FAILED");
	$finish;
     end

     c = 0;
     t = {17'd0,INIT_00[c]}<<1;
     $display("%b",t);
     if (t !== 18'b00_0000_0000_0000_0010) begin
	$display("FAILED");
	$finish;
     end

     c = 16;
     t = {17'd0,INIT_00[c]}<<1;
     $display("%b",t);
     if (t !== 18'b00_0000_0000_0000_0010) begin
	$display("FAILED");
	$finish;
     end

     $display("PASSED");
  end
endmodule
module main();

  parameter INIT_00 = 32'hffffffff;
  reg [17:0] t;
  reg [8:0] c;

  initial begin
     t = {17'd0,INIT_00[0]}<<1;
     $display("%b",t);
     if (t !== 18'b00_0000_0000_0000_0010) begin
	$display("FAILED");
	$finish;
     end

     c = 0;
     t = {17'd0,INIT_00[c]}<<1;
     $display("%b",t);
     if (t !== 18'b00_0000_0000_0000_0010) begin
	$display("FAILED");
	$finish;
     end

     c = 16;
     t = {17'd0,INIT_00[c]}<<1;
     $display("%b",t);
     if (t !== 18'b00_0000_0000_0000_0010) begin
	$display("FAILED");
	$finish;
     end

     $display("PASSED");
  end
endmodule