data/full_repos/permissive/125379288/pbs.v
 line:57: before: ")"
1: b'%Warning-MULTITOP: data/full_repos/permissive/125379288/pbs.v:123: Multiple top level modules\n                                                                 : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                 : ... Top module \'pbs\'\nmodule pbs(SW, LEDR, LEDG, CLOCK_50, KEY, HEX0, HEX1, HEX2, HEX3, HEX4, HEX5, HEX6, HEX7);\n       ^~~\n                                                                 : ... Top module \'hex_display\'\nmodule hex_display(IN, OUT);\n       ^~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:161: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h40\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1000000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:162: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h40\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       ONES_DGT = 7\'b1000000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:165: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h40\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1000000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:166: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h79\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       ONES_DGT = 7\'b1111001;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:169: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h40\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n     TENS_DGT = 7\'b1000000;\n              ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:170: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h24\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       ONES_DGT = 7\'b0100100;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:173: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h40\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1000000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:174: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h30\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       ONES_DGT = 7\'b0110000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:177: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h40\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1000000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:178: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h19\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       ONES_DGT = 7\'b0011001;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:181: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h40\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1000000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:182: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h12\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       ONES_DGT = 7\'b0010010;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:185: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h40\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1000000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:186: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h2\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       ONES_DGT = 7\'b0000010;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:189: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h40\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1000000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:190: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h78\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       ONES_DGT = 7\'b1111000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:193: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h40\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1000000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:194: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h0\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       ONES_DGT = 7\'b0000000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:197: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h40\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1000000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:198: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h18\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       ONES_DGT = 7\'b0011000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:201: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h79\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1111001;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:202: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h40\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       ONES_DGT = 7\'b1000000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:205: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h79\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1111001;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:206: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h79\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n     ONES_DGT = 7\'b1111001;\n              ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:209: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h79\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1111001;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:210: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h24\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       ONES_DGT = 7\'b0100100;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:213: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h79\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1111001;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:214: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h30\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       ONES_DGT = 7\'b0110000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:217: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h79\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1111001;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:218: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h19\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       ONES_DGT = 7\'b0011001;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:221: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h79\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1111001;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:222: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h12\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n     ONES_DGT = 7\'b0010010;\n              ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:226: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h40\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       TENS_DGT = 7\'b1000000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:227: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h40\' generates 7 bits.\n                                                              : ... In instance pbs.ai_hp_disp2\n       ONES_DGT = 7\'b1000000;\n                ^\n%Error: data/full_repos/permissive/125379288/pbs.v:39: Cannot find file containing module: \'pbs_dp\'\n pbs_dp dp (\n ^~~~~~\n        ... Looked in:\n             data/full_repos/permissive/125379288,data/full_repos/permissive/125379288/pbs_dp\n             data/full_repos/permissive/125379288,data/full_repos/permissive/125379288/pbs_dp.v\n             data/full_repos/permissive/125379288,data/full_repos/permissive/125379288/pbs_dp.sv\n             pbs_dp\n             pbs_dp.v\n             pbs_dp.sv\n             obj_dir/pbs_dp\n             obj_dir/pbs_dp.v\n             obj_dir/pbs_dp.sv\n%Error: data/full_repos/permissive/125379288/pbs.v:59: Cannot find file containing module: \'control\'\n control fsm (\n ^~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:98: Output port connection \'ONES_DGT\' expects 8 bits on the pin connection, but pin connection\'s SEL generates 7 bits.\n                                                             : ... In instance pbs\n       .ONES_DGT(HEX0[6:0]), \n        ^~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:99: Output port connection \'TENS_DGT\' expects 8 bits on the pin connection, but pin connection\'s SEL generates 7 bits.\n                                                             : ... In instance pbs\n       .TENS_DGT(HEX1[6:0])\n        ^~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:104: Output port connection \'ONES_DGT\' expects 8 bits on the pin connection, but pin connection\'s SEL generates 7 bits.\n                                                              : ... In instance pbs\n       .ONES_DGT(HEX2[6:0]), \n        ^~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:105: Output port connection \'TENS_DGT\' expects 8 bits on the pin connection, but pin connection\'s SEL generates 7 bits.\n                                                              : ... In instance pbs\n       .TENS_DGT(HEX3[6:0])\n        ^~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:110: Output port connection \'ONES_DGT\' expects 8 bits on the pin connection, but pin connection\'s SEL generates 7 bits.\n                                                              : ... In instance pbs\n       .ONES_DGT(HEX4[6:0]), \n        ^~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:111: Output port connection \'TENS_DGT\' expects 8 bits on the pin connection, but pin connection\'s SEL generates 7 bits.\n                                                              : ... In instance pbs\n       .TENS_DGT(HEX5[6:0])\n        ^~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:116: Output port connection \'ONES_DGT\' expects 8 bits on the pin connection, but pin connection\'s SEL generates 7 bits.\n                                                              : ... In instance pbs\n       .ONES_DGT(HEX6[6:0]), \n        ^~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:117: Output port connection \'TENS_DGT\' expects 8 bits on the pin connection, but pin connection\'s SEL generates 7 bits.\n                                                              : ... In instance pbs\n       .TENS_DGT(HEX7[6:0])\n        ^~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:130: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h40\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b0000: OUT = 7\'b1000000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:131: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h79\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b0001: OUT = 7\'b1111001;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:132: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h24\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b0010: OUT = 7\'b0100100;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:133: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h30\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b0011: OUT = 7\'b0110000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:134: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h19\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b0100: OUT = 7\'b0011001;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:135: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h12\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b0101: OUT = 7\'b0010010;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:136: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h2\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b0110: OUT = 7\'b0000010;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:137: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h78\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b0111: OUT = 7\'b1111000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:138: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h0\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b1000: OUT = 7\'b0000000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:139: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h18\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b1001: OUT = 7\'b0011000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:140: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h8\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b1010: OUT = 7\'b0001000;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:141: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h3\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b1011: OUT = 7\'b0000011;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:142: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h46\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b1100: OUT = 7\'b1000110;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:143: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h21\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b1101: OUT = 7\'b0100001;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:144: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h6\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b1110: OUT = 7\'b0000110;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:145: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'he\' generates 7 bits.\n                                                              : ... In instance hex_display\n   4\'b1111: OUT = 7\'b0001110;\n                ^\n%Warning-WIDTH: data/full_repos/permissive/125379288/pbs.v:147: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s CONST \'7\'h3f\' generates 7 bits.\n                                                              : ... In instance hex_display\n   default: OUT = 7\'b0111111;\n                ^\n%Error: Exiting due to 2 error(s), 60 warning(s)\n'
module hex_display(IN, OUT);
    input [3:0] IN;
	 output reg [7:0] OUT;
	 
	 always @(*)
	 begin
		case(IN[3:0])
			4'b0000: OUT = 7'b1000000;
			4'b0001: OUT = 7'b1111001;
			4'b0010: OUT = 7'b0100100;
			4'b0011: OUT = 7'b0110000;
			4'b0100: OUT = 7'b0011001;
			4'b0101: OUT = 7'b0010010;
			4'b0110: OUT = 7'b0000010;
			4'b0111: OUT = 7'b1111000;
			4'b1000: OUT = 7'b0000000;
			4'b1001: OUT = 7'b0011000;
			4'b1010: OUT = 7'b0001000;
			4'b1011: OUT = 7'b0000011;
			4'b1100: OUT = 7'b1000110;
			4'b1101: OUT = 7'b0100001;
			4'b1110: OUT = 7'b0000110;
			4'b1111: OUT = 7'b0001110;
			
			default: OUT = 7'b0111111;
		endcase

	end
endmodule
module hex_display(IN, OUT);

    input [3:0] IN;
	 output reg [7:0] OUT;
	 
	 always @(*)
	 begin
		case(IN[3:0])
			4'b0000: OUT = 7'b1000000;
			4'b0001: OUT = 7'b1111001;
			4'b0010: OUT = 7'b0100100;
			4'b0011: OUT = 7'b0110000;
			4'b0100: OUT = 7'b0011001;
			4'b0101: OUT = 7'b0010010;
			4'b0110: OUT = 7'b0000010;
			4'b0111: OUT = 7'b1111000;
			4'b1000: OUT = 7'b0000000;
			4'b1001: OUT = 7'b0011000;
			4'b1010: OUT = 7'b0001000;
			4'b1011: OUT = 7'b0000011;
			4'b1100: OUT = 7'b1000110;
			4'b1101: OUT = 7'b0100001;
			4'b1110: OUT = 7'b0000110;
			4'b1111: OUT = 7'b0001110;
			
			default: OUT = 7'b0111111;
		endcase

	end
endmodule