data/full_repos/permissive/219917900/rx_rtl_files/majority_top.sv
1: b"%Error: data/full_repos/permissive/219917900/rx_rtl_files/majority_top.sv:30: Cannot find file containing module: 'pkt8to256out'\npkt8to256out #(.whereis_segnum(34), .whereis_id(36)) pktcnv_i (\n^~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/219917900/rx_rtl_files,data/full_repos/permissive/219917900/pkt8to256out\n             data/full_repos/permissive/219917900/rx_rtl_files,data/full_repos/permissive/219917900/pkt8to256out.v\n             data/full_repos/permissive/219917900/rx_rtl_files,data/full_repos/permissive/219917900/pkt8to256out.sv\n             pkt8to256out\n             pkt8to256out.v\n             pkt8to256out.sv\n             obj_dir/pkt8to256out\n             obj_dir/pkt8to256out.v\n             obj_dir/pkt8to256out.sv\n%Error: Exiting due to 1 error(s)\n"
module majority_top #(parameter whereis_segment_num = 34, whereis_id = 36) (
    input  wire RST,
    input  wire [7:0] rx_data,
    input  wire rx_en,
    input  wire dclk,


    input  wire ui_clk,
    input  wire wr_busy,
    input  wire rd_busy,
    input  wire [255:0] rd_data,
    input  wire rd_data_valid,
    output wire wr_en,
    output wire rd_en,
    output wire [255:0] wr_data,
    output wire [24:0] wr_addr,
    output wire [24:0] rd_addr

);


wire [255:0] rx256b;
wire en256b;
wire [3:0] id256b;
wire [15:0] segnum256b;

pkt8to256out #(.whereis_segnum(34), .whereis_id(36)) pktcnv_i (
    .RST(RST),
    .rxd(rx_data),
    .clk(dclk),
    .rxen(rx_en),

    .out256b_r(rx256b),
    .en_out_r(en256b),
    .id_r(id256b),
    .segnum_r(segnum256b)
);








assign wr_addr[24] = 1'b0;
assign rd_addr[24] = 1'b0;
assign wr_addr[23:8] = segnum256b;
assign rd_addr[23:8] = segnum256b;



endmodule
module majority_top #(parameter whereis_segment_num = 34, whereis_id = 36) (
    input  wire RST,
    input  wire [7:0] rx_data,
    input  wire rx_en,
    input  wire dclk,


    input  wire ui_clk,
    input  wire wr_busy,
    input  wire rd_busy,
    input  wire [255:0] rd_data,
    input  wire rd_data_valid,
    output wire wr_en,
    output wire rd_en,
    output wire [255:0] wr_data,
    output wire [24:0] wr_addr,
    output wire [24:0] rd_addr

);



wire [255:0] rx256b;
wire en256b;
wire [3:0] id256b;
wire [15:0] segnum256b;

pkt8to256out #(.whereis_segnum(34), .whereis_id(36)) pktcnv_i (
    .RST(RST),
    .rxd(rx_data),
    .clk(dclk),
    .rxen(rx_en),

    .out256b_r(rx256b),
    .en_out_r(en256b),
    .id_r(id256b),
    .segnum_r(segnum256b)
);








assign wr_addr[24] = 1'b0;
assign rd_addr[24] = 1'b0;
assign wr_addr[23:8] = segnum256b;
assign rd_addr[23:8] = segnum256b;



endmodule