data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v
1: b'%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:3: Cannot find include file: ../../define/global_def.v\n`include "../../define/global_def.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/147520230/src/cpu/stage/ID,data/full_repos/permissive/147520230/../../define/global_def.v\n             data/full_repos/permissive/147520230/src/cpu/stage/ID,data/full_repos/permissive/147520230/../../define/global_def.v.v\n             data/full_repos/permissive/147520230/src/cpu/stage/ID,data/full_repos/permissive/147520230/../../define/global_def.v.sv\n             ../../define/global_def.v\n             ../../define/global_def.v.v\n             ../../define/global_def.v.sv\n             obj_dir/../../define/global_def.v\n             obj_dir/../../define/global_def.v.v\n             obj_dir/../../define/global_def.v.sv\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:4: Cannot find include file: ../../define/op_def.v\n`include "../../define/op_def.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:5: Cannot find include file: ../../define/funct_def.v\n`include "../../define/funct_def.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:6: Cannot find include file: ../../define/regimm_def.v\n`include "../../define/regimm_def.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:9: Define or directive not defined: \'`INST_OP_BUS\'\n    input   wire[`INST_OP_BUS]    op,\n                 ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:9: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n    input   wire[`INST_OP_BUS]    op,\n                             ^\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:10: Define or directive not defined: \'`FUNCT_BUS\'\n    input   wire[`FUNCT_BUS]      funct_in,\n                 ^~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:11: Define or directive not defined: \'`REG_ADDR_BUS\'\n    input   wire[`REG_ADDR_BUS]   rt,\n                 ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:12: Define or directive not defined: \'`FUNCT_BUS\'\n    output  reg [`FUNCT_BUS]      funct\n                 ^~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:18: Define or directive not defined: \'`OP_SPECIAL\'\n            `OP_SPECIAL:    funct <= funct_in;\n            ^~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:19: Define or directive not defined: \'`OP_SPECIAL2\'\n            `OP_SPECIAL2:   begin\n            ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:21: Define or directive not defined: \'`FUNCT_MADD\'\n                    `FUNCT_MADD:    funct   <= `FUNCT2_MADD;\n                    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:21: Define or directive not defined: \'`FUNCT2_MADD\'\n                    `FUNCT_MADD:    funct   <= `FUNCT2_MADD;\n                                               ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:22: Define or directive not defined: \'`FUNCT_MADDU\'\n                    `FUNCT_MADDU:   funct   <= `FUNCT2_MADDU;\n                    ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:22: Define or directive not defined: \'`FUNCT2_MADDU\'\n                    `FUNCT_MADDU:   funct   <= `FUNCT2_MADDU;\n                                               ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:23: Define or directive not defined: \'`FUNCT_MUL\'\n                    `FUNCT_MUL:     funct   <= `FUNCT2_MUL;\n                    ^~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:23: Define or directive not defined: \'`FUNCT2_MUL\'\n                    `FUNCT_MUL:     funct   <= `FUNCT2_MUL;\n                                               ^~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:24: Define or directive not defined: \'`FUNCT_MSUB\'\n                    `FUNCT_MSUB:    funct   <= `FUNCT2_MSUB;\n                    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:24: Define or directive not defined: \'`FUNCT2_MSUB\'\n                    `FUNCT_MSUB:    funct   <= `FUNCT2_MSUB;\n                                               ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:25: Define or directive not defined: \'`FUNCT_MSUBU\'\n                    `FUNCT_MSUBU:   funct   <= `FUNCT2_MSUBU;\n                    ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:25: Define or directive not defined: \'`FUNCT2_MSUBU\'\n                    `FUNCT_MSUBU:   funct   <= `FUNCT2_MSUBU;\n                                               ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:26: Define or directive not defined: \'`FUNCT_CLZ\'\n                    `FUNCT_CLZ:     funct   <= `FUNCT2_CLZ;\n                    ^~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:26: Define or directive not defined: \'`FUNCT2_CLZ\'\n                    `FUNCT_CLZ:     funct   <= `FUNCT2_CLZ;\n                                               ^~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:27: Define or directive not defined: \'`FUNCT_CLO\'\n                    `FUNCT_CLO:     funct   <= `FUNCT2_CLO;\n                    ^~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:27: Define or directive not defined: \'`FUNCT2_CLO\'\n                    `FUNCT_CLO:     funct   <= `FUNCT2_CLO;\n                                               ^~~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:28: Define or directive not defined: \'`FUNCT_NOP\'\n                    default:        funct   <= `FUNCT_NOP;\n                                               ^~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:31: Define or directive not defined: \'`OP_ORI\'\n            `OP_ORI:        funct <= `FUNCT_OR;\n            ^~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:31: Define or directive not defined: \'`FUNCT_OR\'\n            `OP_ORI:        funct <= `FUNCT_OR;\n                                     ^~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:32: Define or directive not defined: \'`OP_ANDI\'\n            `OP_ANDI:       funct <= `FUNCT_AND;\n            ^~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:32: Define or directive not defined: \'`FUNCT_AND\'\n            `OP_ANDI:       funct <= `FUNCT_AND;\n                                     ^~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:33: Define or directive not defined: \'`OP_XORI\'\n            `OP_XORI:       funct <= `FUNCT_XOR;\n            ^~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:33: Define or directive not defined: \'`FUNCT_XOR\'\n            `OP_XORI:       funct <= `FUNCT_XOR;\n                                     ^~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:34: Define or directive not defined: \'`OP_LUI\'\n            `OP_LUI:        funct <= `FUNCT_OR;\n            ^~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:34: Define or directive not defined: \'`FUNCT_OR\'\n            `OP_LUI:        funct <= `FUNCT_OR;\n                                     ^~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:35: Define or directive not defined: \'`OP_LB\'\n            `OP_LB, `OP_LBU, `OP_LH, `OP_LHU,\n            ^~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:35: Define or directive not defined: \'`OP_LBU\'\n            `OP_LB, `OP_LBU, `OP_LH, `OP_LHU,\n                    ^~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:35: Define or directive not defined: \'`OP_LH\'\n            `OP_LB, `OP_LBU, `OP_LH, `OP_LHU,\n                             ^~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:35: Define or directive not defined: \'`OP_LHU\'\n            `OP_LB, `OP_LBU, `OP_LH, `OP_LHU,\n                                     ^~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:36: Define or directive not defined: \'`OP_LW\'\n            `OP_LW, `OP_LWL, `OP_LWR,\n            ^~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:36: Define or directive not defined: \'`OP_LWL\'\n            `OP_LW, `OP_LWL, `OP_LWR,\n                    ^~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:36: Define or directive not defined: \'`OP_LWR\'\n            `OP_LW, `OP_LWL, `OP_LWR,\n                             ^~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:37: Define or directive not defined: \'`OP_SB\'\n            `OP_SB, `OP_SH, `OP_SW, \n            ^~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:37: Define or directive not defined: \'`OP_SH\'\n            `OP_SB, `OP_SH, `OP_SW, \n                    ^~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:37: Define or directive not defined: \'`OP_SW\'\n            `OP_SB, `OP_SH, `OP_SW, \n                            ^~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:38: Define or directive not defined: \'`OP_SWL\'\n            `OP_SWL, `OP_SWR,\n            ^~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:38: Define or directive not defined: \'`OP_SWR\'\n            `OP_SWL, `OP_SWR,\n                     ^~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:39: Define or directive not defined: \'`OP_ADDI\'\n            `OP_ADDI:       funct <= `FUNCT_ADD;\n            ^~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:39: Define or directive not defined: \'`FUNCT_ADD\'\n            `OP_ADDI:       funct <= `FUNCT_ADD;\n                                     ^~~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:40: Define or directive not defined: \'`OP_ADDIU\'\n            `OP_ADDIU:      funct <= `FUNCT_ADDU;\n            ^~~~~~~~~\n%Error: data/full_repos/permissive/147520230/src/cpu/stage/ID/FunctGen.v:40: Define or directive not defined: \'`FUNCT_ADDU\'\n            `OP_ADDIU:      funct <= `FUNCT_ADDU;\n                                     ^~~~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
module FunctGen(
    input   wire[`INST_OP_BUS]    op,
    input   wire[`FUNCT_BUS]      funct_in,
    input   wire[`REG_ADDR_BUS]   rt,
    output  reg [`FUNCT_BUS]      funct
);


    always @(*) begin
        case (op)
            `OP_SPECIAL:    funct <= funct_in;
            `OP_SPECIAL2:   begin
                case (funct_in)
                    `FUNCT_MADD:    funct   <= `FUNCT2_MADD;
                    `FUNCT_MADDU:   funct   <= `FUNCT2_MADDU;
                    `FUNCT_MUL:     funct   <= `FUNCT2_MUL;
                    `FUNCT_MSUB:    funct   <= `FUNCT2_MSUB;
                    `FUNCT_MSUBU:   funct   <= `FUNCT2_MSUBU;
                    `FUNCT_CLZ:     funct   <= `FUNCT2_CLZ;
                    `FUNCT_CLO:     funct   <= `FUNCT2_CLO;
                    default:        funct   <= `FUNCT_NOP;
                endcase
            end
            `OP_ORI:        funct <= `FUNCT_OR;
            `OP_ANDI:       funct <= `FUNCT_AND;
            `OP_XORI:       funct <= `FUNCT_XOR;
            `OP_LUI:        funct <= `FUNCT_OR;
            `OP_LB, `OP_LBU, `OP_LH, `OP_LHU,
            `OP_LW, `OP_LWL, `OP_LWR,
            `OP_SB, `OP_SH, `OP_SW, 
            `OP_SWL, `OP_SWR,
            `OP_ADDI:       funct <= `FUNCT_ADD;
            `OP_ADDIU:      funct <= `FUNCT_ADDU;
            `OP_SLTI:       funct <= `FUNCT_SLT;
            `OP_SLTIU:      funct <= `FUNCT_SLTU;
            `OP_JAL:        funct <= `FUNCT_OR;
            `OP_REGIMM: begin
                case (rt)
                    `REGIMM_BLTZAL, `REGIMM_BGEZAL: funct <= `FUNCT_OR;
                    default: funct <= `FUNCT_NOP;
                endcase
            end
            default:        funct <= `FUNCT_NOP;
        endcase
    end

endmodule
module FunctGen(
    input   wire[`INST_OP_BUS]    op,
    input   wire[`FUNCT_BUS]      funct_in,
    input   wire[`REG_ADDR_BUS]   rt,
    output  reg [`FUNCT_BUS]      funct
);



    always @(*) begin
        case (op)
            `OP_SPECIAL:    funct <= funct_in;
            `OP_SPECIAL2:   begin
                case (funct_in)
                    `FUNCT_MADD:    funct   <= `FUNCT2_MADD;
                    `FUNCT_MADDU:   funct   <= `FUNCT2_MADDU;
                    `FUNCT_MUL:     funct   <= `FUNCT2_MUL;
                    `FUNCT_MSUB:    funct   <= `FUNCT2_MSUB;
                    `FUNCT_MSUBU:   funct   <= `FUNCT2_MSUBU;
                    `FUNCT_CLZ:     funct   <= `FUNCT2_CLZ;
                    `FUNCT_CLO:     funct   <= `FUNCT2_CLO;
                    default:        funct   <= `FUNCT_NOP;
                endcase
            end
            `OP_ORI:        funct <= `FUNCT_OR;
            `OP_ANDI:       funct <= `FUNCT_AND;
            `OP_XORI:       funct <= `FUNCT_XOR;
            `OP_LUI:        funct <= `FUNCT_OR;
            `OP_LB, `OP_LBU, `OP_LH, `OP_LHU,
            `OP_LW, `OP_LWL, `OP_LWR,
            `OP_SB, `OP_SH, `OP_SW, 
            `OP_SWL, `OP_SWR,
            `OP_ADDI:       funct <= `FUNCT_ADD;
            `OP_ADDIU:      funct <= `FUNCT_ADDU;
            `OP_SLTI:       funct <= `FUNCT_SLT;
            `OP_SLTIU:      funct <= `FUNCT_SLTU;
            `OP_JAL:        funct <= `FUNCT_OR;
            `OP_REGIMM: begin
                case (rt)
                    `REGIMM_BLTZAL, `REGIMM_BGEZAL: funct <= `FUNCT_OR;
                    default: funct <= `FUNCT_NOP;
                endcase
            end
            default:        funct <= `FUNCT_NOP;
        endcase
    end

endmodule