data/full_repos/permissive/211866113/word_gen.v
data/verilator_xmls/5b640ded-22db-45db-a3b7-c8627c244b72.xml
module word_gen (gen_next, word);
    parameter Word_size = 3;

    input wire gen_next;
    output wire [Word_size-1:0] word;
    reg [1:0] 			count = 2'b00;


    assign word = (count == 2'b00) ? 3'b010 :
		  (count == 2'b01) ? 3'b111 :
		  (count == 2'b10) ? 3'b011 :
		  (count == 2'b11) ? 3'b100 :
		  {Word_size{1'bz}};

    always @ ( posedge gen_next ) begin
        count = count + 1;
    end

endmodule
module word_gen (gen_next, word);

    parameter Word_size = 3;

    input wire gen_next;
    output wire [Word_size-1:0] word;
    reg [1:0] 			count = 2'b00;


    assign word = (count == 2'b00) ? 3'b010 :
		  (count == 2'b01) ? 3'b111 :
		  (count == 2'b10) ? 3'b011 :
		  (count == 2'b11) ? 3'b100 :
		  {Word_size{1'bz}};

    always @ ( posedge gen_next ) begin
        count = count + 1;
    end

endmodule