data/full_repos/permissive/197356760/FIFO/read_ptr_module.v
data/verilator_xmls/dd4ac0ff-5f3b-43d7-9548-fa45ca03dab9.xml
module read_ptr_module (input clk, rst, rd_en,
                        output reg [2:0] read_ptr);
  
  always @ (posedge clk) begin
    if (rst)
    	read_ptr <= 0;
  	else if (rd_en)
   		read_ptr <= read_ptr +1;
    else 
      	read_ptr <= read_ptr;
  end 
endmodule
module read_ptr_module (input clk, rst, rd_en,
                        output reg [2:0] read_ptr);

  
  always @ (posedge clk) begin
    if (rst)
    	read_ptr <= 0;
  	else if (rd_en)
   		read_ptr <= read_ptr +1;
    else 
      	read_ptr <= read_ptr;
  end 
endmodule