data/full_repos/permissive/13196823/fpga/DE4_Ethernet_0/src/rm_hdr.v
 line:49: before: "."
1: b"%Error: data/full_repos/permissive/13196823/fpga/DE4_Ethernet_0/src/rm_hdr.v:106: Cannot find file containing module: 'hdr_fifo'\n hdr_fifo hdr_fifo_inst (\n ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/13196823/fpga/DE4_Ethernet_0/src,data/full_repos/permissive/13196823/hdr_fifo\n             data/full_repos/permissive/13196823/fpga/DE4_Ethernet_0/src,data/full_repos/permissive/13196823/hdr_fifo.v\n             data/full_repos/permissive/13196823/fpga/DE4_Ethernet_0/src,data/full_repos/permissive/13196823/hdr_fifo.sv\n             hdr_fifo\n             hdr_fifo.v\n             hdr_fifo.sv\n             obj_dir/hdr_fifo\n             obj_dir/hdr_fifo.v\n             obj_dir/hdr_fifo.sv\n%Error: Exiting due to 1 error(s)\n"
function integer log2;
      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
   endfunction
function integer log2;

      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
   endfunction