data/full_repos/permissive/123690745/RAMAddrTranslator.v
data/verilator_xmls/ac83f155-8dec-4463-ad7b-9ad5a595b2f0.xml
module RAMAddrTranslator(
    input [31:0] In,
    output [10:0] Out,
	 output [1:0] Low
    );
	assign Out = In[12:2];
	assign Low = In[1:0];
endmodule
module RAMAddrTranslator(
    input [31:0] In,
    output [10:0] Out,
	 output [1:0] Low
    );

	assign Out = In[12:2];
	assign Low = In[1:0];
endmodule