data/full_repos/permissive/169885920/hw3_1/mux4_1_4b.v
1: b"%Error: data/full_repos/permissive/169885920/hw3_1/mux4_1_4b.v:16: Cannot find file containing module: 'mux4_1'\n    mux4_1 bit_0(InA[0], InB[0], InC[0], InD[0], S, Out[0]);\n    ^~~~~~\n        ... Looked in:\n             data/full_repos/permissive/169885920/hw3_1,data/full_repos/permissive/169885920/mux4_1\n             data/full_repos/permissive/169885920/hw3_1,data/full_repos/permissive/169885920/mux4_1.v\n             data/full_repos/permissive/169885920/hw3_1,data/full_repos/permissive/169885920/mux4_1.sv\n             mux4_1\n             mux4_1.v\n             mux4_1.sv\n             obj_dir/mux4_1\n             obj_dir/mux4_1.v\n             obj_dir/mux4_1.sv\n%Error: data/full_repos/permissive/169885920/hw3_1/mux4_1_4b.v:17: Cannot find file containing module: 'mux4_1'\n    mux4_1 bit_1(InA[1], InB[1], InC[1], InD[1], S, Out[1]);\n    ^~~~~~\n%Error: data/full_repos/permissive/169885920/hw3_1/mux4_1_4b.v:18: Cannot find file containing module: 'mux4_1'\n    mux4_1 bit_2(InA[2], InB[2], InC[2], InD[2], S, Out[2]);\n    ^~~~~~\n%Error: data/full_repos/permissive/169885920/hw3_1/mux4_1_4b.v:19: Cannot find file containing module: 'mux4_1'\n    mux4_1 bit_3(InA[3], InB[3], InC[3], InD[3], S, Out[3]);\n    ^~~~~~\n%Error: Exiting due to 4 error(s)\n"
module mux4_1_4b(InA, InB, InC, InD, S, Out);


    parameter N = 4;

    input [N-1:0]   InA, InB, InC, InD;
    input [1:0]     S;
    output [N-1:0]  Out;

    mux4_1 bit_0(InA[0], InB[0], InC[0], InD[0], S, Out[0]);
    mux4_1 bit_1(InA[1], InB[1], InC[1], InD[1], S, Out[1]);
    mux4_1 bit_2(InA[2], InB[2], InC[2], InD[2], S, Out[2]);
    mux4_1 bit_3(InA[3], InB[3], InC[3], InD[3], S, Out[3]);

    
endmodule
module mux4_1_4b(InA, InB, InC, InD, S, Out);



    parameter N = 4;

    input [N-1:0]   InA, InB, InC, InD;
    input [1:0]     S;
    output [N-1:0]  Out;

    mux4_1 bit_0(InA[0], InB[0], InC[0], InD[0], S, Out[0]);
    mux4_1 bit_1(InA[1], InB[1], InC[1], InD[1], S, Out[1]);
    mux4_1 bit_2(InA[2], InB[2], InC[2], InD[2], S, Out[2]);
    mux4_1 bit_3(InA[3], InB[3], InC[3], InD[3], S, Out[3]);

    
endmodule