data/full_repos/permissive/100331186/tarea3/pruebas/testNotGate.v
None: at end of input
1: b'%Error: data/full_repos/permissive/100331186/tarea3/pruebas/testNotGate.v:23: Cannot find include file: modulos/notGate.v\n`include "modulos/notGate.v" \n         ^~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/100331186/tarea3/pruebas,data/full_repos/permissive/100331186/modulos/notGate.v\n             data/full_repos/permissive/100331186/tarea3/pruebas,data/full_repos/permissive/100331186/modulos/notGate.v.v\n             data/full_repos/permissive/100331186/tarea3/pruebas,data/full_repos/permissive/100331186/modulos/notGate.v.sv\n             modulos/notGate.v\n             modulos/notGate.v.v\n             modulos/notGate.v.sv\n             obj_dir/modulos/notGate.v\n             obj_dir/modulos/notGate.v.v\n             obj_dir/modulos/notGate.v.sv\n%Error: data/full_repos/permissive/100331186/tarea3/pruebas/testNotGate.v:28: Unsupported or unknown PLI call: $dumpfile\n    $dumpfile("tests/testNotGate.vcd");\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/100331186/tarea3/pruebas/testNotGate.v:29: Unsupported or unknown PLI call: $dumpvars\n    $dumpvars(0, testNotGate);\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/100331186/tarea3/pruebas/testNotGate.v:39: Unsupported or unknown PLI call: $monitor\n    $monitor("%t | %b | %b | %f ns", $time, a, y, retardo);\n    ^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/100331186/tarea3/pruebas/testNotGate.v:49: Unsupported: Ignoring delay on this delayed statement.\n    # 1000 a = 0;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/100331186/tarea3/pruebas/testNotGate.v:50: Unsupported: Ignoring delay on this delayed statement.\n    # 0 retardo = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/100331186/tarea3/pruebas/testNotGate.v:51: Unsupported: Ignoring delay on this delayed statement.\n    # 0 inicio = $realtime;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/100331186/tarea3/pruebas/testNotGate.v:54: Unsupported: Ignoring delay on this delayed statement.\n    # 1000 a = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/100331186/tarea3/pruebas/testNotGate.v:55: Unsupported: Ignoring delay on this delayed statement.\n    # 0 retardo = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/100331186/tarea3/pruebas/testNotGate.v:56: Unsupported: Ignoring delay on this delayed statement.\n    # 0 inicio = $realtime;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/100331186/tarea3/pruebas/testNotGate.v:59: Unsupported: Ignoring delay on this delayed statement.\n    # 1000 $finish;\n    ^\n%Error: Exiting due to 4 error(s), 7 warning(s)\n'
module testNotGate;
  initial begin
    $display ("testNotGate");
    $dumpfile("tests/testNotGate.vcd");
    $dumpvars(0, testNotGate);
  end

  reg a;
  wire y;

  realtime inicio, retardo;

  initial begin
    inicio = $realtime;
    $monitor("%t | %b | %b | %f ns", $time, a, y, retardo);

    $display("--------------------------------------");
    $display("Test para el Inversor");
    $display("---------------------+---+---+--------");
    $display("              Tiempo | a | y | Retardo");
    $display("---------------------+---+---+--------");

    $display("not x = x");

    # 1000 a = 0;
    # 0 retardo = 0;
    # 0 inicio = $realtime;
    $display("not 0 = 1");

    # 1000 a = 1'bx;
    # 0 retardo = 0;
    # 0 inicio = $realtime;
    $display("not 1 = 0");

    # 1000 $finish;
  end

  always @ (y) begin
    retardo = $realtime-inicio;
  end

  notGate notGate1 (.a(a), .y(y));
endmodule
module testNotGate;

  initial begin
    $display ("testNotGate");
    $dumpfile("tests/testNotGate.vcd");
    $dumpvars(0, testNotGate);
  end

  reg a;
  wire y;

  realtime inicio, retardo;

  initial begin
    inicio = $realtime;
    $monitor("%t | %b | %b | %f ns", $time, a, y, retardo);

    $display("--------------------------------------");
    $display("Test para el Inversor");
    $display("---------------------+---+---+--------");
    $display("              Tiempo | a | y | Retardo");
    $display("---------------------+---+---+--------");

    $display("not x = x");

    # 1000 a = 0;
    # 0 retardo = 0;
    # 0 inicio = $realtime;
    $display("not 0 = 1");

    # 1000 a = 1'bx;
    # 0 retardo = 0;
    # 0 inicio = $realtime;
    $display("not 1 = 0");

    # 1000 $finish;
  end

  always @ (y) begin
    retardo = $realtime-inicio;
  end

  notGate notGate1 (.a(a), .y(y));
endmodule