data/full_repos/permissive/21051978/processor/spare/build1/prog_counter2.v
1: b'%Warning-LITENDIAN: data/full_repos/permissive/21051978/processor/spare/build1/prog_counter2.v:19: Little bit endian vector: MSB < LSB of bit range: 0:31\n output [0:31] next_pc;\n        ^\n                    ... Use "/* verilator lint_off LITENDIAN */" and lint_on around source to disable this message.\n%Warning-LITENDIAN: data/full_repos/permissive/21051978/processor/spare/build1/prog_counter2.v:51: Little bit endian vector: MSB < LSB of bit range: 0:31\n reg [0:31] temp_pc;   \n     ^\n%Error: Exiting due to 2 warning(s)\n'
module program_counter2 (next_pc,rst,clk);



	output [0:31] next_pc;
	
	
	
	



	input clk;

	input rst;

	
	
	
	
	



	



	


	reg [0:31] next_pc;
	reg [0:31] temp_pc;
	
	
	

	
	always @(posedge clk)
	begin

		if(rst)
		begin

			next_pc<=32'd0;
			temp_pc<=32'd0;
		end
		else
		begin
			temp_pc<=temp_pc+32'd4;
			next_pc<=temp_pc>>2;
		end
	end
	
	
	
	
endmodule
module program_counter2 (next_pc,rst,clk);




	output [0:31] next_pc;
	
	
	
	



	input clk;

	input rst;

	
	
	
	
	



	



	


	reg [0:31] next_pc;
	reg [0:31] temp_pc;
	
	
	

	
	always @(posedge clk)
	begin

		if(rst)
		begin

			next_pc<=32'd0;
			temp_pc<=32'd0;
		end
		else
		begin
			temp_pc<=temp_pc+32'd4;
			next_pc<=temp_pc>>2;
		end
	end
	
	
	
	
endmodule