data/full_repos/permissive/199632300/HDLBits/Circuits/Combiantional_Logic/Arithmetic_Circuits/adder3.v
data/verilator_xmls/c6da6939-9013-4bbf-928e-51884f1b07a0.xml
module FullAdder(
    input a, b, cin,
    output cout, sum
);
    assign {cout, sum} = a + b + cin;
endmodule
module FullAdder(
    input a, b, cin,
    output cout, sum
);

    assign {cout, sum} = a + b + cin;
endmodule