data/full_repos/permissive/166023910/adders_8/source_v/add8_007.v
data/verilator_xmls/1a3037b0-6ceb-445b-a3d4-16200afc4211.xml
module PDKGENAND2X1(input A, input B, output Y );
     assign Y = A & B;
endmodule
module PDKGENAND2X1(input A, input B, output Y );

     assign Y = A & B;
endmodule