data/full_repos/permissive/148200700/Quartus/designFiles/ip/KBandIPsubPro/KBandIPsubPro_onchip_mem_LW2/KBandIPsubPro_onchip_mem_LW2_bb.v
data/verilator_xmls/7c50c359-98ab-4ead-8c4b-c7e5501721ee.xml
module KBandIPsubPro_onchip_mem_LW2 (
		input  wire        clk,
		input  wire [12:0] address,
		input  wire        clken,
		input  wire        chipselect,
		input  wire        write,
		output wire [31:0] readdata,
		input  wire [31:0] writedata,
		input  wire [3:0]  byteenable,
		input  wire        reset,
		input  wire        reset_req
	);
endmodule
module KBandIPsubPro_onchip_mem_LW2 (
		input  wire        clk,
		input  wire [12:0] address,
		input  wire        clken,
		input  wire        chipselect,
		input  wire        write,
		output wire [31:0] readdata,
		input  wire [31:0] writedata,
		input  wire [3:0]  byteenable,
		input  wire        reset,
		input  wire        reset_req
	);

endmodule