data/full_repos/permissive/174323821/hdl/clocking/jtframe_cen48.v
 line:147: before: ","
1: b'%Warning-MULTITOP: data/full_repos/permissive/174323821/hdl/clocking/jtframe_cen48.v:76: Multiple top level modules\n                                                                                       : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                       : ... Top module \'jtframe_cen48\'\nmodule jtframe_cen48(\n       ^~~~~~~~~~~~~\n                                                                                       : ... Top module \'jtframe_cen3p57\'\nmodule jtframe_cen3p57(\n       ^~~~~~~~~~~~~~~\n                                                                                       : ... Top module \'jtframe_cenp384\'\nmodule jtframe_cenp384(\n       ^~~~~~~~~~~~~~~\n                                                                                       : ... Top module \'jtframe_cen10\'\nmodule jtframe_cen10(\n       ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/174323821/hdl/clocking/jtframe_cen48.v:105: Cannot find file containing module: \'jtframe_frac_cen\'\n    jtframe_frac_cen #(.W(2),.WC(16)) u_frac(\n    ^~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/174323821/hdl/clocking,data/full_repos/permissive/174323821/jtframe_frac_cen\n             data/full_repos/permissive/174323821/hdl/clocking,data/full_repos/permissive/174323821/jtframe_frac_cen.v\n             data/full_repos/permissive/174323821/hdl/clocking,data/full_repos/permissive/174323821/jtframe_frac_cen.sv\n             jtframe_frac_cen\n             jtframe_frac_cen.v\n             jtframe_frac_cen.sv\n             obj_dir/jtframe_frac_cen\n             obj_dir/jtframe_frac_cen.v\n             obj_dir/jtframe_frac_cen.sv\n%Error: Exiting due to 1 error(s), 1 warning(s)\n'
module jtframe_cen3p57(
    input  clk,
    output cen_3p57,
    output cen_1p78
);
    parameter CLK24=0;

    localparam [15:0] STEP =
`ifdef JTFRAME_PLL6144
        16'd1048;
`elsif JTFRAME_PLL6293
        16'd35;
`elsif JTFRAME_PLL6671
        16'd105;
`else
        16'd3758;
`endif

    localparam [15:0] LIM  =
`ifdef JTFRAME_PLL6144
        16'd14391;
`elsif JTFRAME_PLL6293
        16'd492;
`elsif JTFRAME_PLL6671
        16'd1566;
`else
        16'd50393;
`endif

    jtframe_frac_cen #(.W(2),.WC(16)) u_frac(
        .clk    ( clk   ),
        .n      ( STEP<<CLK24 ),
        .m      ( LIM   ),
        .cen    ( { cen_1p78, cen_3p57 } ),
        .cenb   (       )
    );
endmodule
module jtframe_cen3p57(
    input  clk,
    output cen_3p57,
    output cen_1p78
);

    parameter CLK24=0;

    localparam [15:0] STEP =
`ifdef JTFRAME_PLL6144
        16'd1048;
`elsif JTFRAME_PLL6293
        16'd35;
`elsif JTFRAME_PLL6671
        16'd105;
`else
        16'd3758;
`endif

    localparam [15:0] LIM  =
`ifdef JTFRAME_PLL6144
        16'd14391;
`elsif JTFRAME_PLL6293
        16'd492;
`elsif JTFRAME_PLL6671
        16'd1566;
`else
        16'd50393;
`endif

    jtframe_frac_cen #(.W(2),.WC(16)) u_frac(
        .clk    ( clk   ),
        .n      ( STEP<<CLK24 ),
        .m      ( LIM   ),
        .cen    ( { cen_1p78, cen_3p57 } ),
        .cenb   (       )
    );
endmodule