data/full_repos/permissive/168395472/problems/07_cpu_v1/control.v
 line:10: before: "wire"
1: b'%Error: data/full_repos/permissive/168395472/problems/07_cpu_v1/control.v:10: syntax error, unexpected wire, expecting TYPE-IDENTIFIER\nwire [2:0]funct3 =  \n^~~~\n%Error: Cannot continue\n'
module control(
    input [31:0]instr,

    output reg [11:0]imm12,
    output reg rf_we,
    output reg [2:0]alu_op
);

wire [6:0]opcode =
wire [2:0]funct3 =

always @(*) begin
    rf_we = 1'b0;
    alu_op = 3'b0;
    imm12 = 12'b0;

    casez ({funct3, opcode})
        10'b000_0010011: begin
            rf_we = 1'b1;
            alu_op = 3'b1;
            imm12 = instr[31:20];
        end
        default: ;
    endcase
end

endmodule
module control(
    input [31:0]instr,

    output reg [11:0]imm12,
    output reg rf_we,
    output reg [2:0]alu_op
);


wire [6:0]opcode =
wire [2:0]funct3 =

always @(*) begin
    rf_we = 1'b0;
    alu_op = 3'b0;
    imm12 = 12'b0;

    casez ({funct3, opcode})
        10'b000_0010011: begin
            rf_we = 1'b1;
            alu_op = 3'b1;
            imm12 = instr[31:20];
        end
        default: ;
    endcase
end

endmodule