data/full_repos/permissive/173814379/implementation/core/core_v5r0.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/173814379/implementation/core/core_v5r0.v:74: Multiple top level modules\n                                                                                          : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                          : ... Top module \'epRISC_gprM\'\nmodule epRISC_gprM(iAddrA, iAddrB, iClk, iDInA, iDInB, iWriteA, iWriteB, oDOutA, oDOutB);\n       ^~~~~~~~~~~\n                                                                                          : ... Top module \'epRISC_coreM\'\nmodule epRISC_coreM(iClk, iRst, oAddr, bData, oWrite, iMaskInt, iNonMaskInt, oHalt, oFlg, oAccess, iReady, oAcknowledge);  \n       ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/173814379/implementation/core/core_v5r0.v:221: Cannot find file containing module: \'OnChipRegs\'\n    OnChipRegs registers((fCSRegisterPage<<4)+((rPipeState==2||rPipeState==1)?wBusInAddrA:wBusOutAddrA), (fCSRegisterPage<<4)+((rPipeState==2||rPipeState==1)?wBusInAddrB:wBusOutAddrB), wClkInt, wBusOutA, wBusOutB, wBusOutWriteA, wBusOutWriteB, wBusRegA, wBusRegB);\n    ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/173814379/implementation/core,data/full_repos/permissive/173814379/OnChipRegs\n             data/full_repos/permissive/173814379/implementation/core,data/full_repos/permissive/173814379/OnChipRegs.v\n             data/full_repos/permissive/173814379/implementation/core,data/full_repos/permissive/173814379/OnChipRegs.sv\n             OnChipRegs\n             OnChipRegs.v\n             OnChipRegs.sv\n             obj_dir/OnChipRegs\n             obj_dir/OnChipRegs.v\n             obj_dir/OnChipRegs.sv\n%Error: Exiting due to 1 error(s), 1 warning(s)\n'
module epRISC_gprM(iAddrA, iAddrB, iClk, iDInA, iDInB, iWriteA, iWriteB, oDOutA, oDOutB);

    input iClk, iWriteA, iWriteB;
    input [7:0] iAddrA, iAddrB;
    input [31:0] iDInA, iDInB;
    output reg [31:0] oDOutA, oDOutB;
    
    reg [8:0] rClr;
    reg [31:0] rContents[0:255];
    
    wire debug;
    assign debug = (rContents[5] < 10) ? 1 : 0;

    initial begin
        for(rClr=0;rClr<256;rClr=rClr+1)
            rContents[rClr] = 0;
    end
    
    always @(posedge iClk) begin
        if(iWriteA) begin
            rContents[iAddrA] <= iDInA;
        end
        
        if(iWriteB) begin
            rContents[iAddrB] <= iDInB;
        end
    end
    
    always @(posedge iClk) begin
        if(!iWriteA) begin
            oDOutA <= rContents[iAddrA];
        end
    end
    
    always @(posedge iClk) begin
        if(!iWriteB) begin
            oDOutB <= rContents[iAddrB];
        end
    end
            
endmodule
module epRISC_gprM(iAddrA, iAddrB, iClk, iDInA, iDInB, iWriteA, iWriteB, oDOutA, oDOutB);


    input iClk, iWriteA, iWriteB;
    input [7:0] iAddrA, iAddrB;
    input [31:0] iDInA, iDInB;
    output reg [31:0] oDOutA, oDOutB;
    
    reg [8:0] rClr;
    reg [31:0] rContents[0:255];
    
    wire debug;
    assign debug = (rContents[5] < 10) ? 1 : 0;

    initial begin
        for(rClr=0;rClr<256;rClr=rClr+1)
            rContents[rClr] = 0;
    end
    
    always @(posedge iClk) begin
        if(iWriteA) begin
            rContents[iAddrA] <= iDInA;
        end
        
        if(iWriteB) begin
            rContents[iAddrB] <= iDInB;
        end
    end
    
    always @(posedge iClk) begin
        if(!iWriteA) begin
            oDOutA <= rContents[iAddrA];
        end
    end
    
    always @(posedge iClk) begin
        if(!iWriteB) begin
            oDOutB <= rContents[iAddrB];
        end
    end
            
endmodule