data/full_repos/permissive/143278/ivltests/drive_strength1.v
 line:27: before: "("
1: b'%Error: data/full_repos/permissive/143278/ivltests/drive_strength1.v:27: Unsupported: Verilog 1995 strength specifiers\n   wire (weak0, weak1) value = pullval;\n         ^~~~~\n%Error: data/full_repos/permissive/143278/ivltests/drive_strength1.v:27: Unsupported: Verilog 1995 strength specifiers\n   wire (weak0, weak1) value = pullval;\n                ^~~~~\n%Error: data/full_repos/permissive/143278/ivltests/drive_strength1.v:33: syntax error, unexpected (-for-strength, expecting \'(\'\n   buf (highz0, strong1) drive0(value, en0);\n        ^~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/drive_strength1.v:47: Unsupported: Ignoring delay on this delayed statement.\n      #1 if (value !== 1\'b1) begin\n      ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/drive_strength1.v:53: Unsupported: Ignoring delay on this delayed statement.\n      #1 if (value !== 1\'b0) begin\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/drive_strength1.v:62: Unsupported: Ignoring delay on this delayed statement.\n      #1 if (value !== 1\'b1) begin\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/drive_strength1.v:69: Unsupported: Ignoring delay on this delayed statement.\n      #1 if (value !== 1\'b1) begin\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/drive_strength1.v:80: Unsupported: Ignoring delay on this delayed statement.\n      #1 if (value !== 1\'b0) begin\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/drive_strength1.v:87: Unsupported: Ignoring delay on this delayed statement.\n      #1 if (value !== 1\'b0) begin\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/drive_strength1.v:98: Unsupported: Ignoring delay on this delayed statement.\n      #1 if (value !== 1\'bx) begin\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/drive_strength1.v:105: Unsupported: Ignoring delay on this delayed statement.\n      #1 if (value !== 1\'bx) begin\n      ^\n%Error: Exiting due to 3 error(s), 8 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module main();

   reg pullval;
   wire (weak0, weak1) value = pullval;

   reg	en0, en1;


   buf (highz0, strong1) drive0(value, en0);


   not (strong0, highz1) drive1(value, en1);


   initial begin
      en0 = 0;
      en1 = 0;


      pullval = 1;
      #1 if (value !== 1'b1) begin
	 $display("FAILED -- value is %b", value);
	 $finish;
      end

      pullval = 0;
      #1 if (value !== 1'b0) begin
	 $display("FAILED -- value is %b", value);
	 $finish;
      end


      en0 = 1;
      pullval = 1;
      #1 if (value !== 1'b1) begin
	 $display("FAILED -- en0==%b en1==%b pull==%b value==%b",
		  en0, en1, pullval, value);
	 $finish;
      end

      pullval = 0;
      #1 if (value !== 1'b1) begin
	 $display("FAILED -- en0==%b en1==%b pull=0%b value==%b",
		  en0, en1, pullval, value);
	 $finish;
      end


      en0 = 0;
      en1 = 1;
      pullval = 1;
      #1 if (value !== 1'b0) begin
	 $display("FAILED -- en0==%b en1==%b pull=0%b value==%b",
		  en0, en1, pullval, value);
	 $finish;
      end

      pullval = 0;
      #1 if (value !== 1'b0) begin
	 $display("FAILED -- en0==%b en1==%b pull=0%b value==%b",
		  en0, en1, pullval, value);
	 $finish;
      end


      en0 = 1;
      en1 = 1;
      pullval = 1;
      #1 if (value !== 1'bx) begin
	 $display("FAILED -- en0==%b en1==%b pull=0%b value==%b",
		  en0, en1, pullval, value);
	 $finish;
      end

      pullval = 0;
      #1 if (value !== 1'bx) begin
	 $display("FAILED -- en0==%b en1==%b pull=0%b value==%b",
		  en0, en1, pullval, value);
	 $finish;
      end


      $display("PASSED");
   end

endmodule
module main();


   reg pullval;
   wire (weak0, weak1) value = pullval;

   reg	en0, en1;


   buf (highz0, strong1) drive0(value, en0);


   not (strong0, highz1) drive1(value, en1);


   initial begin
      en0 = 0;
      en1 = 0;


      pullval = 1;
      #1 if (value !== 1'b1) begin
	 $display("FAILED -- value is %b", value);
	 $finish;
      end

      pullval = 0;
      #1 if (value !== 1'b0) begin
	 $display("FAILED -- value is %b", value);
	 $finish;
      end


      en0 = 1;
      pullval = 1;
      #1 if (value !== 1'b1) begin
	 $display("FAILED -- en0==%b en1==%b pull==%b value==%b",
		  en0, en1, pullval, value);
	 $finish;
      end

      pullval = 0;
      #1 if (value !== 1'b1) begin
	 $display("FAILED -- en0==%b en1==%b pull=0%b value==%b",
		  en0, en1, pullval, value);
	 $finish;
      end


      en0 = 0;
      en1 = 1;
      pullval = 1;
      #1 if (value !== 1'b0) begin
	 $display("FAILED -- en0==%b en1==%b pull=0%b value==%b",
		  en0, en1, pullval, value);
	 $finish;
      end

      pullval = 0;
      #1 if (value !== 1'b0) begin
	 $display("FAILED -- en0==%b en1==%b pull=0%b value==%b",
		  en0, en1, pullval, value);
	 $finish;
      end


      en0 = 1;
      en1 = 1;
      pullval = 1;
      #1 if (value !== 1'bx) begin
	 $display("FAILED -- en0==%b en1==%b pull=0%b value==%b",
		  en0, en1, pullval, value);
	 $finish;
      end

      pullval = 0;
      #1 if (value !== 1'bx) begin
	 $display("FAILED -- en0==%b en1==%b pull=0%b value==%b",
		  en0, en1, pullval, value);
	 $finish;
      end


      $display("PASSED");
   end

endmodule