data/full_repos/permissive/131358616/design/perceptron/perceptron_iceZUM_alhambra.v
1: b"%Error: data/full_repos/permissive/131358616/design/perceptron/perceptron_iceZUM_alhambra.v:39: Cannot find file containing module: 'perceptron_top'\nperceptron_top #(\n^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/131358616/design/perceptron,data/full_repos/permissive/131358616/perceptron_top\n             data/full_repos/permissive/131358616/design/perceptron,data/full_repos/permissive/131358616/perceptron_top.v\n             data/full_repos/permissive/131358616/design/perceptron,data/full_repos/permissive/131358616/perceptron_top.sv\n             perceptron_top\n             perceptron_top.v\n             perceptron_top.sv\n             obj_dir/perceptron_top\n             obj_dir/perceptron_top.v\n             obj_dir/perceptron_top.sv\n%Error: Exiting due to 1 error(s)\n"
module perceptron_iceZUM_alhambra (

    input wire SW1,
    input wire CLK12MHZ,

    output wire LED0,
    output wire LED1,
    output wire LED2,
    output wire LED3,
    output wire LED4,
    output wire LED5,
    output wire LED6,
    output wire LED7,
	
    input wire FTDI_RX,
	output wire FTDI_TX
);

localparam fp_integer_width = 2;
localparam fp_fract_width = 10;

localparam clock_frequency	= 12000000;
localparam uart_baud_rate	= 9600;

wire rst_n;
wire [4:0] cont_state;

assign rst_n = !SW1;

perceptron_top #(
    .fp_integer_width(fp_integer_width),
    .fp_fract_width(fp_fract_width),
	.clock_frequency(clock_frequency),
	.uart_baud_rate(uart_baud_rate)
) perceptron_top (
	.rst_n(rst_n),
	.clk(CLK12MHZ),
    .cont_state(cont_state),
	.rx(FTDI_RX),
	.tx(FTDI_TX)
);

assign {LED7, LED6, LED5, LED4, LED3, LED2, LED1, LED0} = {3'b0, cont_state};



endmodule
module perceptron_iceZUM_alhambra (

    input wire SW1,
    input wire CLK12MHZ,

    output wire LED0,
    output wire LED1,
    output wire LED2,
    output wire LED3,
    output wire LED4,
    output wire LED5,
    output wire LED6,
    output wire LED7,
	
    input wire FTDI_RX,
	output wire FTDI_TX
);


localparam fp_integer_width = 2;
localparam fp_fract_width = 10;

localparam clock_frequency	= 12000000;
localparam uart_baud_rate	= 9600;

wire rst_n;
wire [4:0] cont_state;

assign rst_n = !SW1;

perceptron_top #(
    .fp_integer_width(fp_integer_width),
    .fp_fract_width(fp_fract_width),
	.clock_frequency(clock_frequency),
	.uart_baud_rate(uart_baud_rate)
) perceptron_top (
	.rst_n(rst_n),
	.clk(CLK12MHZ),
    .cont_state(cont_state),
	.rx(FTDI_RX),
	.tx(FTDI_TX)
);

assign {LED7, LED6, LED5, LED4, LED3, LED2, LED1, LED0} = {3'b0, cont_state};



endmodule