data/full_repos/permissive/128426084/src/sources_1/new/cardata.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:44: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    assign rgb = 12\'h111*((direction == 0)?rom[{UP,{ypos,xpos}}]:\n                                          ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:45: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    (direction == 1)? rom[{leftsdeg,{ypos,xpos}}]:\n                    ^\n%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:46: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    (direction == 2)? rom[{leftdeg,{ypos,xpos}}]:\n                    ^\n%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:47: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    (direction == 3)? rom[{lefthdeg,{ypos,xpos}}]:\n                    ^\n%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:48: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    (direction == 4)? rom[{UP,{subs-xpos,ypos}}]:\n                    ^\n%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:49: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    (direction == 5)? rom[{lefthdeg,{subs-ypos,xpos}}]:\n                    ^\n%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:50: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    (direction == 6)? rom[{leftdeg,{subs-ypos,xpos}}]:\n                    ^\n%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:51: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    (direction == 7)? rom[{leftsdeg,{subs-ypos,xpos}}]:\n                    ^\n%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:52: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    (direction == 8)? rom[{UP,{subs-ypos,xpos}}]:\n                    ^\n%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:53: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    (direction == 9)? rom[{leftsdeg,{subs-ypos,subs-xpos}}]:\n                    ^\n%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:54: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    (direction == 10)? rom[{leftdeg,{subs-ypos,subs-xpos}}]:\n                     ^\n%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:55: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    (direction == 11)? rom[{lefthdeg,{subs-ypos,subs-xpos}}]:\n                     ^\n%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:56: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    (direction == 12)? rom[{UP,{xpos,subs-ypos}}]:\n                     ^\n%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:57: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    (direction == 13)? rom[{lefthdeg,{ypos,subs-xpos}}]:\n                     ^\n%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:58: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    (direction == 14)? rom[{leftdeg,{ypos,subs-xpos}}]:\n                     ^\n%Warning-WIDTH: data/full_repos/permissive/128426084/src/sources_1/new/cardata.v:59: Operator COND expects 32 or 12 bits on the Conditional True, but Conditional True\'s ARRAYSEL generates 4 bits.\n                                                                                   : ... In instance cardata\n    (direction == 15)? rom[{leftsdeg,{ypos,subs-xpos}}]:0);\n                     ^\n%Error: Exiting due to 16 warning(s)\n'
module cardata(

    input wire [3:0] direction,
    input wire [4:0] xpos,
    input wire [4:0] ypos,
    output wire [11:0] rgb
);

localparam UP = 2'b00;
localparam leftsdeg = 2'b01;
localparam leftdeg = 2'b10;
localparam lefthdeg = 2'b11;
localparam subs = 5'b11111;


reg [3:0] rom [0:4095];
reg [3:0] rgb_out;

initial $readmemh("./datacar.data", rom); 
      
                
    assign rgb = 12'h111*((direction == 0)?rom[{UP,{ypos,xpos}}]:
    (direction == 1)? rom[{leftsdeg,{ypos,xpos}}]:
    (direction == 2)? rom[{leftdeg,{ypos,xpos}}]:
    (direction == 3)? rom[{lefthdeg,{ypos,xpos}}]:
    (direction == 4)? rom[{UP,{subs-xpos,ypos}}]:
    (direction == 5)? rom[{lefthdeg,{subs-ypos,xpos}}]:
    (direction == 6)? rom[{leftdeg,{subs-ypos,xpos}}]:
    (direction == 7)? rom[{leftsdeg,{subs-ypos,xpos}}]:
    (direction == 8)? rom[{UP,{subs-ypos,xpos}}]:
    (direction == 9)? rom[{leftsdeg,{subs-ypos,subs-xpos}}]:
    (direction == 10)? rom[{leftdeg,{subs-ypos,subs-xpos}}]:
    (direction == 11)? rom[{lefthdeg,{subs-ypos,subs-xpos}}]:
    (direction == 12)? rom[{UP,{xpos,subs-ypos}}]:
    (direction == 13)? rom[{lefthdeg,{ypos,subs-xpos}}]:
    (direction == 14)? rom[{leftdeg,{ypos,subs-xpos}}]:
    (direction == 15)? rom[{leftsdeg,{ypos,subs-xpos}}]:0);

endmodule
module cardata(

    input wire [3:0] direction,
    input wire [4:0] xpos,
    input wire [4:0] ypos,
    output wire [11:0] rgb
);


localparam UP = 2'b00;
localparam leftsdeg = 2'b01;
localparam leftdeg = 2'b10;
localparam lefthdeg = 2'b11;
localparam subs = 5'b11111;


reg [3:0] rom [0:4095];
reg [3:0] rgb_out;

initial $readmemh("./datacar.data", rom); 
      
                
    assign rgb = 12'h111*((direction == 0)?rom[{UP,{ypos,xpos}}]:
    (direction == 1)? rom[{leftsdeg,{ypos,xpos}}]:
    (direction == 2)? rom[{leftdeg,{ypos,xpos}}]:
    (direction == 3)? rom[{lefthdeg,{ypos,xpos}}]:
    (direction == 4)? rom[{UP,{subs-xpos,ypos}}]:
    (direction == 5)? rom[{lefthdeg,{subs-ypos,xpos}}]:
    (direction == 6)? rom[{leftdeg,{subs-ypos,xpos}}]:
    (direction == 7)? rom[{leftsdeg,{subs-ypos,xpos}}]:
    (direction == 8)? rom[{UP,{subs-ypos,xpos}}]:
    (direction == 9)? rom[{leftsdeg,{subs-ypos,subs-xpos}}]:
    (direction == 10)? rom[{leftdeg,{subs-ypos,subs-xpos}}]:
    (direction == 11)? rom[{lefthdeg,{subs-ypos,subs-xpos}}]:
    (direction == 12)? rom[{UP,{xpos,subs-ypos}}]:
    (direction == 13)? rom[{lefthdeg,{ypos,subs-xpos}}]:
    (direction == 14)? rom[{leftdeg,{ypos,subs-xpos}}]:
    (direction == 15)? rom[{leftsdeg,{ypos,subs-xpos}}]:0);

endmodule