data/full_repos/permissive/193790231/B_timers.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/193790231/B_timers.v:25: Multiple top level modules\n                                                                     : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                     : ... Top module \'clock_1s\'\nmodule clock_1s(\n       ^~~~~~~~\n                                                                     : ... Top module \'clock_1ms\'\nmodule clock_1ms(\n       ^~~~~~~~~\n%Error: Exiting due to 1 warning(s)\n'
module clock_1s(

	output reg flagEnable,
	input CLKcount
);
	reg [25:0]countVal;
	always@(posedge CLKcount) begin
		if(countVal == 26'd50000000) begin
			flagEnable = 1'b1;
			countVal <= 26'd0;
		end
		else if(countVal < 26'd50000000) begin
			flagEnable = 1'b0;
			countVal <= countVal + 1'b1;
		end
		else begin
			countVal <= 26'd0;
		end
	end
endmodule
module clock_1s(

	output reg flagEnable,
	input CLKcount
);

	reg [25:0]countVal;
	always@(posedge CLKcount) begin
		if(countVal == 26'd50000000) begin
			flagEnable = 1'b1;
			countVal <= 26'd0;
		end
		else if(countVal < 26'd50000000) begin
			flagEnable = 1'b0;
			countVal <= countVal + 1'b1;
		end
		else begin
			countVal <= 26'd0;
		end
	end
endmodule