data/full_repos/permissive/205673649/MIPS/Source/adder_fetch.v
data/verilator_xmls/2265dfff-dd25-4060-8bb3-a723e5498cbb.xml
module adder_fetch
    #(
        parameter LEN=32
    )
    (
        input [LEN-1:0] i_a,
        input [LEN-1:0] i_b,
        input i_enable,
        output [LEN-1:0] o_adder
    );
    
    assign o_adder = i_enable==1'b1 ? i_a + i_b : i_a; 
endmodule
module adder_fetch
    #(
        parameter LEN=32
    )
    (
        input [LEN-1:0] i_a,
        input [LEN-1:0] i_b,
        input i_enable,
        output [LEN-1:0] o_adder
    );

    
    assign o_adder = i_enable==1'b1 ? i_a + i_b : i_a; 
endmodule