data/full_repos/permissive/147265957/src/comparator.v
data/verilator_xmls/ba296c49-416d-4c36-b298-b1814528318f.xml
module comparator(
a,b,iseq
    );
    parameter WIDTH = 8;
    input [WIDTH-1:0] a,b;
    output iseq;
    assign iseq = (a == b);
endmodule
module comparator(
a,b,iseq
    );

    parameter WIDTH = 8;
    input [WIDTH-1:0] a,b;
    output iseq;
    assign iseq = (a == b);
endmodule