data/full_repos/permissive/125927162/PIPO/pipo_tb.v
 line:56: before: "$"
1: b'%Error: data/full_repos/permissive/125927162/PIPO/pipo_tb.v:31: Unsupported or unknown PLI call: $dumpfile\n      $dumpfile("pipo.vcd");\n      ^~~~~~~~~\n%Error: data/full_repos/permissive/125927162/PIPO/pipo_tb.v:32: Unsupported or unknown PLI call: $dumpvars\n      $dumpvars(0, DUT);\n      ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/125927162/PIPO/pipo_tb.v:36: Unsupported: Ignoring delay on this delayed statement.\n      #1\n      ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/125927162/PIPO/pipo_tb.v:38: Unsupported: Ignoring delay on this delayed statement.\n      #1\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/125927162/PIPO/pipo_tb.v:40: Unsupported: Ignoring delay on this delayed statement.\n      #1\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/125927162/PIPO/pipo_tb.v:44: Unsupported: Ignoring delay on this delayed statement.\n      #1\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/125927162/PIPO/pipo_tb.v:46: Unsupported: Ignoring delay on this delayed statement.\n      #1\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/125927162/PIPO/pipo_tb.v:48: Unsupported: Ignoring delay on this delayed statement.\n      #10\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/125927162/PIPO/pipo_tb.v:51: Unsupported: Ignoring delay on this delayed statement.\n      #2\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/125927162/PIPO/pipo_tb.v:53: Unsupported: Ignoring delay on this delayed statement.\n      #5\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/125927162/PIPO/pipo_tb.v:55: Unsupported: Ignoring delay on this delayed statement.\n      #100\n      ^\n%Error: Exiting due to 2 error(s), 9 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module pipo_tb ();
   localparam WIDTH = 8;
   reg oe_n;
   reg le;
   reg [WIDTH-1:0] data;
   wire [WIDTH-1:0] out;

   pipo #(.WIDTH(WIDTH)) DUT(
				.oe_n(oe_n),
				.le(le),
				.in(data),
				.out(out)
				);
   
   initial begin
      $dumpfile("pipo.vcd");
      $dumpvars(0, DUT);
      oe_n = 1;
      data = 0;
      le = 0;
      #1
	le = 1;
      #1
	le = 0;
      #1
	data = 8'h55;
      le = 1;
      oe_n = 0;
      #1
	le = 0;
      #1
	data = 0;
      #10
	data = 8'hAA;
      le = 0;
      #2
	le = 1;
      #5
	oe_n = 1;
      #100
	$finish;
   end

endmodule
module pipo_tb ();

   localparam WIDTH = 8;
   reg oe_n;
   reg le;
   reg [WIDTH-1:0] data;
   wire [WIDTH-1:0] out;

   pipo #(.WIDTH(WIDTH)) DUT(
				.oe_n(oe_n),
				.le(le),
				.in(data),
				.out(out)
				);
   
   initial begin
      $dumpfile("pipo.vcd");
      $dumpvars(0, DUT);
      oe_n = 1;
      data = 0;
      le = 0;
      #1
	le = 1;
      #1
	le = 0;
      #1
	data = 8'h55;
      le = 1;
      oe_n = 0;
      #1
	le = 0;
      #1
	data = 0;
      #10
	data = 8'hAA;
      le = 0;
      #2
	le = 1;
      #5
	oe_n = 1;
      #100
	$finish;
   end

endmodule