data/full_repos/permissive/203650831/hd44780_nybsen.v
None: at end of input
1: b'%Error: data/full_repos/permissive/203650831/hd44780_nybsen.v:9: Cannot find include file: ./hd44780_build_config.inc\n`include "./hd44780_build_config.inc" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/203650831,data/full_repos/permissive/203650831/./hd44780_build_config.inc\n             data/full_repos/permissive/203650831,data/full_repos/permissive/203650831/./hd44780_build_config.inc.v\n             data/full_repos/permissive/203650831,data/full_repos/permissive/203650831/./hd44780_build_config.inc.sv\n             ./hd44780_build_config.inc\n             ./hd44780_build_config.inc.v\n             ./hd44780_build_config.inc.sv\n             obj_dir/./hd44780_build_config.inc\n             obj_dir/./hd44780_build_config.inc.v\n             obj_dir/./hd44780_build_config.inc.sv\n%Error: data/full_repos/permissive/203650831/hd44780_nybsen.v:43: Define or directive not defined: \'`H4NS_COUNT_BITS\'\n    reg[`H4NS_COUNT_BITS-1:0] STDC = 0;\n        ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/203650831/hd44780_nybsen.v:63: Define or directive not defined: \'`H4NS_COUNT_TOP\'\n            STDC <= `H4NS_COUNT_TOP;  \n                    ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/203650831/hd44780_nybsen.v:63: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n            STDC <= `H4NS_COUNT_TOP;  \n                                   ^\n%Error: data/full_repos/permissive/203650831/hd44780_nybsen.v:129: Define or directive not defined: \'`H4NS_COUNT_TOP\'\n            if(STDC == `H4NS_COUNT_TOP - `H4NS_TICKS_TAS) begin       \n                       ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/203650831/hd44780_nybsen.v:129: Define or directive not defined: \'`H4NS_TICKS_TAS\'\n            if(STDC == `H4NS_COUNT_TOP - `H4NS_TICKS_TAS) begin       \n                                         ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/203650831/hd44780_nybsen.v:129: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n            if(STDC == `H4NS_COUNT_TOP - `H4NS_TICKS_TAS) begin       \n                                                        ^\n%Error: data/full_repos/permissive/203650831/hd44780_nybsen.v:131: Define or directive not defined: \'`H4NS_COUNT_TOP\'\n            end else if(STDC == `H4NS_COUNT_TOP - `H4NS_TICKS_TAS - `H4NS_TICKS_PWEH) begin       \n                                ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/203650831/hd44780_nybsen.v:131: Define or directive not defined: \'`H4NS_TICKS_TAS\'\n            end else if(STDC == `H4NS_COUNT_TOP - `H4NS_TICKS_TAS - `H4NS_TICKS_PWEH) begin       \n                                                  ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/203650831/hd44780_nybsen.v:131: Define or directive not defined: \'`H4NS_TICKS_PWEH\'\n            end else if(STDC == `H4NS_COUNT_TOP - `H4NS_TICKS_TAS - `H4NS_TICKS_PWEH) begin       \n                                                                    ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/203650831/hd44780_nybsen.v:131: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n            end else if(STDC == `H4NS_COUNT_TOP - `H4NS_TICKS_TAS - `H4NS_TICKS_PWEH) begin       \n                                                                                    ^\n%Error: Exiting due to 11 error(s)\n'
module hd44780_nybble_sender(
    input RST_I,
    input CLK_I,
    input STB_I,
    input i_rs,
    input wire[3:0] i_nybble,
    output wire o_busy,
    output wire [3:0] o_lcd_data,

    output wire o_rs,
    output wire o_e
    );

    reg[`H4NS_COUNT_BITS-1:0] STDC = 0;
    reg e_reg = 0;
    reg busy_reg = 0;
    reg[3:0] o_lcd_reg = 0;

    reg rs_reg = 0;

    always @(posedge CLK_I) begin
        if(RST_I) begin

            e_reg <= 0;
            STDC <= 0;
            o_lcd_reg <= 0;
            busy_reg <= 0;
            rs_reg <= 0;
        end else if (STB_I & ~busy_reg) begin

            e_reg <= 0;
            o_lcd_reg <= i_nybble;
            rs_reg <= i_rs;
            STDC <= `H4NS_COUNT_TOP;
            busy_reg <= 1;

        end else if (~STB_I & |STDC) begin
            STDC <= STDC - 1;














































            if(STDC == `H4NS_COUNT_TOP - `H4NS_TICKS_TAS) begin
                e_reg <= 1;
            end else if(STDC == `H4NS_COUNT_TOP - `H4NS_TICKS_TAS - `H4NS_TICKS_PWEH) begin
                e_reg <= 0;
            end


        end else if(~STB_I) begin

            busy_reg <= 0;
        end



    end

    assign o_lcd_data = o_lcd_reg;

    assign o_rs = rs_reg;
    assign o_e = e_reg;
    assign o_busy = busy_reg;

endmodule
module hd44780_nybble_sender(
    input RST_I,
    input CLK_I,
    input STB_I,
    input i_rs,
    input wire[3:0] i_nybble,
    output wire o_busy,
    output wire [3:0] o_lcd_data,

    output wire o_rs,
    output wire o_e
    );


    reg[`H4NS_COUNT_BITS-1:0] STDC = 0;
    reg e_reg = 0;
    reg busy_reg = 0;
    reg[3:0] o_lcd_reg = 0;

    reg rs_reg = 0;

    always @(posedge CLK_I) begin
        if(RST_I) begin

            e_reg <= 0;
            STDC <= 0;
            o_lcd_reg <= 0;
            busy_reg <= 0;
            rs_reg <= 0;
        end else if (STB_I & ~busy_reg) begin

            e_reg <= 0;
            o_lcd_reg <= i_nybble;
            rs_reg <= i_rs;
            STDC <= `H4NS_COUNT_TOP;
            busy_reg <= 1;

        end else if (~STB_I & |STDC) begin
            STDC <= STDC - 1;














































            if(STDC == `H4NS_COUNT_TOP - `H4NS_TICKS_TAS) begin
                e_reg <= 1;
            end else if(STDC == `H4NS_COUNT_TOP - `H4NS_TICKS_TAS - `H4NS_TICKS_PWEH) begin
                e_reg <= 0;
            end


        end else if(~STB_I) begin

            busy_reg <= 0;
        end



    end

    assign o_lcd_data = o_lcd_reg;

    assign o_rs = rs_reg;
    assign o_e = e_reg;
    assign o_busy = busy_reg;

endmodule