data/full_repos/permissive/194652065/.drl_src_code/filt_ppd/rtl/filt_ppd.v
1: b"%Error: data/full_repos/permissive/194652065/.drl_src_code/filt_ppd/rtl/filt_ppd.v:31: Cannot find file containing module: 'commutator'\n  commutator #(\n  ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/194652065/.drl_src_code/filt_ppd/rtl,data/full_repos/permissive/194652065/commutator\n             data/full_repos/permissive/194652065/.drl_src_code/filt_ppd/rtl,data/full_repos/permissive/194652065/commutator.v\n             data/full_repos/permissive/194652065/.drl_src_code/filt_ppd/rtl,data/full_repos/permissive/194652065/commutator.sv\n             commutator\n             commutator.v\n             commutator.sv\n             obj_dir/commutator\n             obj_dir/commutator.v\n             obj_dir/commutator.sv\n%Error: data/full_repos/permissive/194652065/.drl_src_code/filt_ppd/rtl/filt_ppd.v:47: Cannot find file containing module: 'mul_add'\n  mul_add #(\n  ^~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module filt_ppd #(  
  parameter gp_idata_width       = 6,
  parameter gp_decimation_factor = 31,
  parameter gp_coeff_length      = 53,
  parameter gp_coeff_width       = 16,
  parameter gp_tf_df             = 0,
  parameter gp_comm_reg_oup      = 1,
  parameter gp_comm_ccw          = 1,
  parameter gp_mul_ccw           = 0,
  parameter gp_comm_phase        = 0,
  parameter gp_odata_width       = gp_idata_width+gp_coeff_width+$clog2(gp_decimation_factor)+$clog2(`DIV(gp_coeff_length,gp_decimation_factor))

) (
  input  wire                             i_rst_an,
  input  wire                             i_ena,
  input  wire                             i_clk,
  input  wire signed [gp_idata_width-1:0] i_data,
  output wire signed [gp_odata_width-1:0] o_data,
  output wire                             o_sclk
);


  wire                                           s_clk;
  wire [gp_decimation_factor*gp_idata_width-1:0] comm_data;

  commutator #(
    .gp_ccw               (gp_comm_ccw         ),
    .gp_idata_width       (gp_idata_width      ),
    .gp_decimation_factor (gp_decimation_factor),
    .gp_reg_oup           (gp_comm_reg_oup     ),                     
    .gp_phase             (gp_comm_phase       )
  ) ppd_commutator                             
  (
    .i_rst_an (i_rst_an ),
    .i_ena    (i_ena    ),
    .i_clk    (i_clk    ),
    .i_data   (i_data   ),
    .o_data   (comm_data),     
    .o_clk    (s_clk    ) 
  );
        
  mul_add #(
    .gp_idata_width       (gp_idata_width      ),   
    .gp_decimation_factor (gp_decimation_factor),
    .gp_coeff_length      (gp_coeff_length     ),
    .gp_coeff_width       (gp_coeff_width      ),
    .gp_tf_df	          (gp_tf_df            ),
    .gp_ccw	          (gp_mul_ccw          ),
    .gp_odata_width       (gp_odata_width      )
  ) ppd_mul_add (
    .i_rst_an (i_rst_an ),
    .i_ena    (i_ena    ),
    .i_clk    (s_clk    ),
    .i_data   (comm_data),
    .o_data   (o_data   )
  );

  assign o_sclk = s_clk;
  
endmodule
module filt_ppd #(  
  parameter gp_idata_width       = 6,
  parameter gp_decimation_factor = 31,
  parameter gp_coeff_length      = 53,
  parameter gp_coeff_width       = 16,
  parameter gp_tf_df             = 0,
  parameter gp_comm_reg_oup      = 1,
  parameter gp_comm_ccw          = 1,
  parameter gp_mul_ccw           = 0,
  parameter gp_comm_phase        = 0,
  parameter gp_odata_width       = gp_idata_width+gp_coeff_width+$clog2(gp_decimation_factor)+$clog2(`DIV(gp_coeff_length,gp_decimation_factor))

) (
  input  wire                             i_rst_an,
  input  wire                             i_ena,
  input  wire                             i_clk,
  input  wire signed [gp_idata_width-1:0] i_data,
  output wire signed [gp_odata_width-1:0] o_data,
  output wire                             o_sclk
);



  wire                                           s_clk;
  wire [gp_decimation_factor*gp_idata_width-1:0] comm_data;

  commutator #(
    .gp_ccw               (gp_comm_ccw         ),
    .gp_idata_width       (gp_idata_width      ),
    .gp_decimation_factor (gp_decimation_factor),
    .gp_reg_oup           (gp_comm_reg_oup     ),                     
    .gp_phase             (gp_comm_phase       )
  ) ppd_commutator                             
  (
    .i_rst_an (i_rst_an ),
    .i_ena    (i_ena    ),
    .i_clk    (i_clk    ),
    .i_data   (i_data   ),
    .o_data   (comm_data),     
    .o_clk    (s_clk    ) 
  );
        
  mul_add #(
    .gp_idata_width       (gp_idata_width      ),   
    .gp_decimation_factor (gp_decimation_factor),
    .gp_coeff_length      (gp_coeff_length     ),
    .gp_coeff_width       (gp_coeff_width      ),
    .gp_tf_df	          (gp_tf_df            ),
    .gp_ccw	          (gp_mul_ccw          ),
    .gp_odata_width       (gp_odata_width      )
  ) ppd_mul_add (
    .i_rst_an (i_rst_an ),
    .i_ena    (i_ena    ),
    .i_clk    (s_clk    ),
    .i_data   (comm_data),
    .o_data   (o_data   )
  );

  assign o_sclk = s_clk;
  
endmodule