data/full_repos/permissive/102039998/tests.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Error: data/full_repos/permissive/102039998/tests.v:1: Cannot find include file: processor.v\n`include "processor.v" \n         ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/102039998,data/full_repos/permissive/102039998/processor.v\n             data/full_repos/permissive/102039998,data/full_repos/permissive/102039998/processor.v.v\n             data/full_repos/permissive/102039998,data/full_repos/permissive/102039998/processor.v.sv\n             processor.v\n             processor.v.v\n             processor.v.sv\n             obj_dir/processor.v\n             obj_dir/processor.v.v\n             obj_dir/processor.v.sv\n%Error: data/full_repos/permissive/102039998/tests.v:2: Cannot find include file: mips.h\n`include "mips.h" \n         ^~~~~~~~\n%Error: data/full_repos/permissive/102039998/tests.v:35: Define or directive not defined: \'`op\'\n  control control(instruction[`op], regdst, jump, branch, memread, memtoreg,\n                              ^~~\n%Error: data/full_repos/permissive/102039998/tests.v:35: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n  control control(instruction[`op], regdst, jump, branch, memread, memtoreg,\n                                 ^\n%Error: data/full_repos/permissive/102039998/tests.v:40: Define or directive not defined: \'`rs\'\n  registers register_file(instruction[`rs], instruction[`rt],\n                                      ^~~\n%Error: data/full_repos/permissive/102039998/tests.v:40: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n  registers register_file(instruction[`rs], instruction[`rt],\n                                         ^\n%Error: data/full_repos/permissive/102039998/tests.v:40: Define or directive not defined: \'`rt\'\n  registers register_file(instruction[`rs], instruction[`rt],\n                                                        ^~~\n%Error: data/full_repos/permissive/102039998/tests.v:45: Define or directive not defined: \'`rd\'\n  mux5_2 regdst_mux(instruction[`rd], instruction[`rt], regdst, regdst_mux_output);\n                                ^~~\n%Error: data/full_repos/permissive/102039998/tests.v:45: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n  mux5_2 regdst_mux(instruction[`rd], instruction[`rt], regdst, regdst_mux_output);\n                                   ^\n%Error: data/full_repos/permissive/102039998/tests.v:45: Define or directive not defined: \'`rt\'\n  mux5_2 regdst_mux(instruction[`rd], instruction[`rt], regdst, regdst_mux_output);\n                                                  ^~~\n%Error: data/full_repos/permissive/102039998/tests.v:50: Define or directive not defined: \'`function\'\n  ALU_control alu_control(aluop_from_control, instruction[`function], rtype, aluop_to_alu);\n                                                          ^~~~~~~~~\n%Error: data/full_repos/permissive/102039998/tests.v:50: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n  ALU_control alu_control(aluop_from_control, instruction[`function], rtype, aluop_to_alu);\n                                                                   ^\n%Error: data/full_repos/permissive/102039998/tests.v:57: Define or directive not defined: \'`target\'\n  jump_address_constructor jump_constructor(instruction[`target], pc_adder_mux[31:28], jump_address);\n                                                        ^~~~~~~\n%Error: data/full_repos/permissive/102039998/tests.v:57: syntax error, unexpected \']\', expecting TYPE-IDENTIFIER\n  jump_address_constructor jump_constructor(instruction[`target], pc_adder_mux[31:28], jump_address);\n                                                               ^\n%Error: data/full_repos/permissive/102039998/tests.v:77: Unsupported or unknown PLI call: $dumpfile\n    $dumpfile("processor.vcd");\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/102039998/tests.v:78: Unsupported or unknown PLI call: $dumpvars\n    $dumpvars(0, processor);\n    ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/102039998/tests.v:80: Unsupported: Ignoring delay on this delayed statement.\n    #2000; $finish;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 16 error(s), 1 warning(s)\n'
module test;
  wire [31:0] instruction;
  wire clock;
  complete_processor processor(instruction, clock);
  initial begin

    $dumpfile("processor.vcd");
    $dumpvars(0, processor);

    #2000; $finish;
  end





endmodule
module test;

  wire [31:0] instruction;
  wire clock;
  complete_processor processor(instruction, clock);
  initial begin

    $dumpfile("processor.vcd");
    $dumpvars(0, processor);

    #2000; $finish;
  end





endmodule