data/full_repos/permissive/143278/ivltests/test_enumsystem.v
 line:23: before: "("
1: b'%Error: data/full_repos/permissive/143278/ivltests/test_enumsystem.v:23: syntax error, unexpected \'@\'\n    repeat (100) @(posedge clk);\n                 ^\n%Error: data/full_repos/permissive/143278/ivltests/test_enumsystem.v:32: syntax error, unexpected \'@\'\n  @(posedge reset);\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/test_enumsystem.v:39: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/test_enumsystem.v:47: Unsupported: Ignoring delay on this delayed statement.\n      #2;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/test_enumsystem.v:87: Unsupported: Ignoring delay on this delayed statement.\ninitial forever #(T) clk = !clk;\n                ^\n%Error: data/full_repos/permissive/143278/ivltests/test_enumsystem.v:90: syntax error, unexpected \'@\'\n    @(negedge clk);\n    ^\n%Error: data/full_repos/permissive/143278/ivltests/test_enumsystem.v:92: syntax error, unexpected \'@\'\n    repeat(6) @(negedge clk);\n              ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/test_enumsystem.v:101: Unsupported: Ignoring delay on this delayed statement.\n    #S;\n    ^\n%Error: Exiting due to 4 error(s), 4 warning(s)\n'
module test;
parameter T = 10;
parameter S = 2*10*150;

bit clk = 0, reset = 0;
wire en;
wire [2:0] count;
wire [0:3] y;


initial forever #(T) clk = !clk;

 initial begin
    @(negedge clk);
    reset = 1'b1;
    repeat(6) @(negedge clk);
    reset = 1'b0;
  end

stim stim (.clk(clk), .reset(reset), .en(en), .count(count) );
enumsystem duv (.clk(clk), .reset(reset), .en(en), .y(y) );
scoreboard check (.en(en), .reset(reset), .count(count), .y(y) );

initial begin
    #S;
    $display("PASSED");
    $finish;
end


endmodule
module test;

parameter T = 10;
parameter S = 2*10*150;

bit clk = 0, reset = 0;
wire en;
wire [2:0] count;
wire [0:3] y;


initial forever #(T) clk = !clk;

 initial begin
    @(negedge clk);
    reset = 1'b1;
    repeat(6) @(negedge clk);
    reset = 1'b0;
  end

stim stim (.clk(clk), .reset(reset), .en(en), .count(count) );
enumsystem duv (.clk(clk), .reset(reset), .en(en), .y(y) );
scoreboard check (.en(en), .reset(reset), .count(count), .y(y) );

initial begin
    #S;
    $display("PASSED");
    $finish;
end


endmodule