data/full_repos/permissive/13196823/fpga/DE4_Ethernet_0/lock_key.sv
None: at end of input
data/verilator_xmls/337d4505-6ec1-4f4e-b2f2-dbc9f04eb080.xml
function integer log2;
      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
endfunction
function integer log2;

      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
endfunction