data/full_repos/permissive/104269513/generic_regs.v
 line:162: before: "integer"
1: b'%Warning-IMPLICIT: data/full_repos/permissive/104269513/generic_regs.v:291: Signal definition not found, creating implicitly: \'sofware_regs\'\n                                                                          : ... Suggested alternative: \'software_regs\'\n   assign sofware_regs         = \'h0;\n          ^~~~~~~~~~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/104269513/generic_regs.v:211: Cannot find file containing module: \'generic_cntr_regs\'\n   generic_cntr_regs\n   ^~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/104269513,data/full_repos/permissive/104269513/generic_cntr_regs\n             data/full_repos/permissive/104269513,data/full_repos/permissive/104269513/generic_cntr_regs.v\n             data/full_repos/permissive/104269513,data/full_repos/permissive/104269513/generic_cntr_regs.sv\n             generic_cntr_regs\n             generic_cntr_regs.v\n             generic_cntr_regs.sv\n             obj_dir/generic_cntr_regs\n             obj_dir/generic_cntr_regs.v\n             obj_dir/generic_cntr_regs.sv\n%Error: data/full_repos/permissive/104269513/generic_regs.v:256: Cannot find file containing module: \'generic_sw_regs\'\n   generic_sw_regs\n   ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/104269513/generic_regs.v:297: Cannot find file containing module: \'generic_hw_regs\'\n   generic_hw_regs\n   ^~~~~~~~~~~~~~~\n%Error: Exiting due to 3 error(s), 1 warning(s)\n'
module generic_regs
   #( 
      parameter UDP_REG_SRC_WIDTH     = 2,
      parameter TAG                   = 0,
      parameter REG_ADDR_WIDTH        = 5,
      parameter NUM_COUNTERS          = 8,
      parameter NUM_SOFTWARE_REGS     = 8,
      parameter NUM_HARDWARE_REGS     = 8,
      parameter NUM_INSTANCES         = 1,
      parameter COUNTER_INPUT_WIDTH   = 1,
      parameter MIN_UPDATE_INTERVAL   = 8,
      parameter COUNTER_WIDTH         = `CPCI_NF2_DATA_WIDTH,
      parameter RESET_ON_READ         = 0,
      parameter REG_START_ADDR        = 0,
      parameter ACK_UNFOUND_ADDRESSES = 1,

      parameter REVERSE_WORD_ORDER    = 0,



      parameter INSTANCES = 
         NUM_INSTANCES > 1 ? 2 ** log2(NUM_INSTANCES) : 1,
      parameter INST_WIDTH = 
         NUM_INSTANCES > 1 ? log2(NUM_INSTANCES) : 0,           
      parameter COUNTER_UPDATE_WIDTH = 
         NUM_COUNTERS > 0 ? NUM_COUNTERS * COUNTER_INPUT_WIDTH * INSTANCES : INSTANCES,
      parameter COUNTER_DECREMENT_WIDTH = 
         NUM_COUNTERS > 0 ? NUM_COUNTERS * INSTANCES : INSTANCES,
      parameter SOFTWARE_REGS_WIDTH = 
         NUM_SOFTWARE_REGS > 0 ? NUM_SOFTWARE_REGS * `CPCI_NF2_DATA_WIDTH * INSTANCES : INSTANCES,
      parameter HARDWARE_REGS_WIDTH = 
         NUM_HARDWARE_REGS > 0 ? NUM_HARDWARE_REGS * `CPCI_NF2_DATA_WIDTH * INSTANCES : INSTANCES
   )
   (
      input                                  reg_req_in,
      input                                  reg_ack_in,
      input                                  reg_rd_wr_L_in,
      input  [`UDP_REG_ADDR_WIDTH-1:0]       reg_addr_in,
      input  [`CPCI_NF2_DATA_WIDTH-1:0]      reg_data_in,
      input  [UDP_REG_SRC_WIDTH-1:0]         reg_src_in,

      output reg                             reg_req_out,
      output reg                             reg_ack_out,
      output reg                             reg_rd_wr_L_out,
      output reg [`UDP_REG_ADDR_WIDTH-1:0]   reg_addr_out,
      output reg [`CPCI_NF2_DATA_WIDTH-1:0]  reg_data_out,
      output reg [UDP_REG_SRC_WIDTH-1:0]     reg_src_out,


      input [COUNTER_UPDATE_WIDTH - 1 :0]    counter_updates,
      input [COUNTER_DECREMENT_WIDTH - 1:0]  counter_decrement,


      output [SOFTWARE_REGS_WIDTH - 1 : 0]   software_regs,


      input  [HARDWARE_REGS_WIDTH - 1 : 0]   hardware_regs,

      input                                clk,
      input                                reset
    );
   

  function integer log2;
      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
   endfunction



   wire                                   cntr_reg_req_out;
   wire                                   cntr_reg_ack_out;
   wire                                   cntr_reg_rd_wr_L_out;
   wire [`UDP_REG_ADDR_WIDTH-1:0]         cntr_reg_addr_out;
   wire [`CPCI_NF2_DATA_WIDTH-1:0]        cntr_reg_data_out;
   wire [UDP_REG_SRC_WIDTH-1:0]           cntr_reg_src_out;
   
   wire                                   sw_reg_req_out;
   wire                                   sw_reg_ack_out;
   wire                                   sw_reg_rd_wr_L_out;
   wire [`UDP_REG_ADDR_WIDTH-1:0]         sw_reg_addr_out;
   wire [`CPCI_NF2_DATA_WIDTH-1:0]        sw_reg_data_out;
   wire [UDP_REG_SRC_WIDTH-1:0]           sw_reg_src_out;

   wire                                   hw_reg_req_out;
   wire                                   hw_reg_ack_out;
   wire                                   hw_reg_rd_wr_L_out;
   wire [`UDP_REG_ADDR_WIDTH-1:0]         hw_reg_addr_out;
   wire [`CPCI_NF2_DATA_WIDTH-1:0]        hw_reg_data_out;
   wire [UDP_REG_SRC_WIDTH-1:0]           hw_reg_src_out;

   wire [`UDP_REG_ADDR_WIDTH-1:0]         reg_addr_in_swapped;
   wire [`UDP_REG_ADDR_WIDTH-1:0]         hw_reg_addr_out_swapped;

   wire [COUNTER_UPDATE_WIDTH - 1 :0]     counter_updates_ordered;
   wire [COUNTER_DECREMENT_WIDTH - 1:0]   counter_decrement_ordered;
   wire [SOFTWARE_REGS_WIDTH - 1 : 0]     software_regs_ordered;
   wire [HARDWARE_REGS_WIDTH - 1 : 0]     hardware_regs_ordered;
   
   wire [COUNTER_UPDATE_WIDTH - 1 :0]     counter_updates_expanded;
   wire [COUNTER_DECREMENT_WIDTH - 1:0]   counter_decrement_expanded;
   wire [SOFTWARE_REGS_WIDTH - 1 : 0]     software_regs_expanded;
   wire [HARDWARE_REGS_WIDTH - 1 : 0]     hardware_regs_expanded;
   


generate 
if (NUM_COUNTERS > 0) begin
   generic_cntr_regs
     #(.UDP_REG_SRC_WIDTH     (UDP_REG_SRC_WIDTH),
       .TAG                   (TAG),
       .REG_ADDR_WIDTH        (REG_ADDR_WIDTH),
       .NUM_REGS_USED         (NUM_COUNTERS * INSTANCES),
       .REG_WIDTH             (COUNTER_WIDTH),
       .MIN_UPDATE_INTERVAL   (MIN_UPDATE_INTERVAL),
       .RESET_ON_READ         (RESET_ON_READ),
       .INPUT_WIDTH           (COUNTER_INPUT_WIDTH),
       .REG_START_ADDR        (REG_START_ADDR))
   generic_cntr_regs
     (
      .reg_req_in        (reg_req_in),
      .reg_ack_in        (reg_ack_in),
      .reg_rd_wr_L_in    (reg_rd_wr_L_in),
      .reg_addr_in       (reg_addr_in_swapped),
      .reg_data_in       (reg_data_in),
      .reg_src_in        (reg_src_in),
                         
      .reg_req_out       (cntr_reg_req_out),
      .reg_ack_out       (cntr_reg_ack_out),
      .reg_rd_wr_L_out   (cntr_reg_rd_wr_L_out),
      .reg_addr_out      (cntr_reg_addr_out),
      .reg_data_out      (cntr_reg_data_out),
      .reg_src_out       (cntr_reg_src_out),
                         

      .updates           (counter_updates_expanded),
      .decrement         (counter_decrement_expanded),
                         
      .clk               (clk),
      .reset             (reset));
end
else begin
   assign cntr_reg_req_out       = reg_req_in;
   assign cntr_reg_ack_out       = reg_ack_in;
   assign cntr_reg_rd_wr_L_out   = reg_rd_wr_L_in;
   assign cntr_reg_addr_out      = reg_addr_in_swapped;
   assign cntr_reg_data_out      = reg_data_in;
   assign cntr_reg_src_out       = reg_src_in;
end
endgenerate

generate 
if (NUM_SOFTWARE_REGS > 0) begin
   generic_sw_regs
     #(.UDP_REG_SRC_WIDTH   (UDP_REG_SRC_WIDTH),
       .TAG                 (TAG),
       .REG_ADDR_WIDTH      (REG_ADDR_WIDTH),
       .NUM_REGS_USED       (NUM_SOFTWARE_REGS * INSTANCES),
       .REG_START_ADDR      (REG_START_ADDR + NUM_COUNTERS * INSTANCES))
   generic_sw_regs
     (
      .reg_req_in        (cntr_reg_req_out),
      .reg_ack_in        (cntr_reg_ack_out),
      .reg_rd_wr_L_in    (cntr_reg_rd_wr_L_out),
      .reg_addr_in       (cntr_reg_addr_out),
      .reg_data_in       (cntr_reg_data_out),
      .reg_src_in        (cntr_reg_src_out),
                         
      .reg_req_out       (sw_reg_req_out),
      .reg_ack_out       (sw_reg_ack_out),
      .reg_rd_wr_L_out   (sw_reg_rd_wr_L_out),
      .reg_addr_out      (sw_reg_addr_out),
      .reg_data_out      (sw_reg_data_out),
      .reg_src_out       (sw_reg_src_out),
                         
      .software_regs     (software_regs_expanded),
                         
      .clk               (clk),
      .reset             (reset));
end
else begin
   assign sw_reg_req_out       = cntr_reg_req_out;
   assign sw_reg_ack_out       = cntr_reg_ack_out;
   assign sw_reg_rd_wr_L_out   = cntr_reg_rd_wr_L_out;
   assign sw_reg_addr_out      = cntr_reg_addr_out;
   assign sw_reg_data_out      = cntr_reg_data_out;
   assign sw_reg_src_out       = cntr_reg_src_out;

   assign sofware_regs         = 'h0;
end
endgenerate

generate 
if (NUM_HARDWARE_REGS > 0) begin
   generic_hw_regs
     #(.UDP_REG_SRC_WIDTH   (UDP_REG_SRC_WIDTH),
       .TAG                 (TAG),
       .REG_ADDR_WIDTH      (REG_ADDR_WIDTH),
       .NUM_REGS_USED       (NUM_HARDWARE_REGS * INSTANCES),
       .REG_START_ADDR      (REG_START_ADDR + (NUM_COUNTERS+NUM_SOFTWARE_REGS) * INSTANCES))
   generic_hw_regs
     (
      .reg_req_in        (sw_reg_req_out),
      .reg_ack_in        (sw_reg_ack_out),
      .reg_rd_wr_L_in    (sw_reg_rd_wr_L_out),
      .reg_addr_in       (sw_reg_addr_out),
      .reg_data_in       (sw_reg_data_out),
      .reg_src_in        (sw_reg_src_out),
                         
      .reg_req_out       (hw_reg_req_out),
      .reg_ack_out       (hw_reg_ack_out),
      .reg_rd_wr_L_out   (hw_reg_rd_wr_L_out),
      .reg_addr_out      (hw_reg_addr_out_swapped),
      .reg_data_out      (hw_reg_data_out),
      .reg_src_out       (hw_reg_src_out),
                         
      .hardware_regs     (hardware_regs_expanded),
                         
      .clk               (clk),
      .reset             (reset));
end
else begin
   assign hw_reg_req_out       = sw_reg_req_out;
   assign hw_reg_ack_out       = sw_reg_ack_out;
   assign hw_reg_rd_wr_L_out   = sw_reg_rd_wr_L_out;
   assign hw_reg_addr_out_swapped      = sw_reg_addr_out;
   assign hw_reg_data_out      = sw_reg_data_out;
   assign hw_reg_src_out       = sw_reg_src_out;
end
endgenerate




   always @(posedge clk) begin
      if (reset) begin
         reg_req_out        <= 0;
         reg_ack_out        <= 0;
         reg_rd_wr_L_out    <= 0;
         reg_addr_out       <= 0;
         reg_data_out       <= 0;
         reg_src_out        <= 0;
      end
      else begin
         if (ACK_UNFOUND_ADDRESSES 
             && hw_reg_req_out 
             && !hw_reg_ack_out

				) begin
            reg_ack_out        <= 1'b1;
            reg_data_out       <= hw_reg_rd_wr_L_out ? 32'hDEADBEEF : hw_reg_data_out;
         end
         else begin
            reg_ack_out        <= hw_reg_ack_out;
            reg_data_out       <= hw_reg_data_out;
         end
         reg_req_out        <= hw_reg_req_out;
         reg_rd_wr_L_out    <= hw_reg_rd_wr_L_out;
         reg_addr_out       <= hw_reg_addr_out;
         reg_src_out        <= hw_reg_src_out;
      end
   end


   generate
      genvar i;
      if(NUM_COUNTERS>1 && REVERSE_WORD_ORDER) begin
         for(i=0; i<NUM_COUNTERS; i=i+1) begin:gen_ordered_cntrs
            assign counter_updates_ordered[(i+1)*COUNTER_INPUT_WIDTH - 1: i*COUNTER_INPUT_WIDTH]
                                           = counter_updates[(NUM_COUNTERS-i)*COUNTER_INPUT_WIDTH - 1:(NUM_COUNTERS-i-1)*COUNTER_INPUT_WIDTH];
            assign counter_decrement_ordered[i] = counter_decrement[NUM_COUNTERS-i-1];
         end
      end
      else begin
         assign counter_updates_ordered = counter_updates;
         assign counter_decrement_ordered = counter_decrement;
      end
                   
      if(NUM_SOFTWARE_REGS>1 && REVERSE_WORD_ORDER) begin
         for(i=0; i<NUM_SOFTWARE_REGS; i=i+1) begin:gen_ordered_sw_regs
            assign software_regs[(i+1)*`CPCI_NF2_DATA_WIDTH - 1: i*`CPCI_NF2_DATA_WIDTH]
                                           = software_regs_ordered[(NUM_SOFTWARE_REGS-i)*`CPCI_NF2_DATA_WIDTH - 1:(NUM_SOFTWARE_REGS-i-1)*`CPCI_NF2_DATA_WIDTH];
         end
      end
      else begin
         assign software_regs = software_regs_ordered;
      end
      
      if(NUM_HARDWARE_REGS>1 && REVERSE_WORD_ORDER) begin
         for(i=0; i<NUM_HARDWARE_REGS; i=i+1) begin:gen_ordered_hw_regs
            assign hardware_regs_ordered[(i+1)*`CPCI_NF2_DATA_WIDTH - 1: i*`CPCI_NF2_DATA_WIDTH]
                                           = hardware_regs[(NUM_HARDWARE_REGS-i)*`CPCI_NF2_DATA_WIDTH - 1:(NUM_HARDWARE_REGS-i-1)*`CPCI_NF2_DATA_WIDTH];
         end
      end
      else begin
         assign hardware_regs_ordered = hardware_regs;
      end
   endgenerate











   generate
      genvar j;
      if(INSTANCES != 1 && INSTANCES != NUM_INSTANCES) begin
         if (NUM_COUNTERS>0) begin
            for(j=0; j<NUM_COUNTERS; j=j+1) begin:gen_expanded_cntrs
               assign counter_updates_expanded[j*COUNTER_INPUT_WIDTH*INSTANCES + 
                                               NUM_INSTANCES*COUNTER_INPUT_WIDTH - 1 : 
                                               j*COUNTER_INPUT_WIDTH*INSTANCES] = 
                      counter_updates_ordered[(j+1)*COUNTER_INPUT_WIDTH*NUM_INSTANCES + 
                                               j*COUNTER_INPUT_WIDTH*NUM_INSTANCES];
               assign counter_updates_expanded[(j+1)*COUNTER_INPUT_WIDTH*INSTANCES - 1 : 
                                               j*COUNTER_INPUT_WIDTH*INSTANCES + 
                                               NUM_INSTANCES*COUNTER_INPUT_WIDTH] = 0;

               assign counter_decrement_expanded[j*INSTANCES + NUM_INSTANCES - 1 : j*INSTANCES] = 
                      counter_decrement_ordered[(j+1)*NUM_INSTANCES + j*NUM_INSTANCES];
               assign counter_decrement_expanded[(j+1)*INSTANCES - 1 : j*INSTANCES + NUM_INSTANCES] = 0;
            end
         end

         if (NUM_SOFTWARE_REGS>0) begin
            for(j=0; j<NUM_SOFTWARE_REGS; j=j+1) begin:gen_ordered_sw_regs
               assign software_regs_ordered[(j+1)*`CPCI_NF2_DATA_WIDTH - 1: j*`CPCI_NF2_DATA_WIDTH] =
                      software_regs_expanded[j*`CPCI_NF2_DATA_WIDTH*INSTANCES +
                                             NUM_INSTANCES*`CPCI_NF2_DATA_WIDTH - 1: 
                                             j*`CPCI_NF2_DATA_WIDTH];
            end
         end
         
         if (NUM_HARDWARE_REGS>0) begin
            for(j=0; j<NUM_HARDWARE_REGS; j=j+1) begin:gen_ordered_hw_regs
               assign hardware_regs_expanded[j*`CPCI_NF2_DATA_WIDTH*INSTANCES +
                                             NUM_INSTANCES*`CPCI_NF2_DATA_WIDTH - 1 : 
                                             j*`CPCI_NF2_DATA_WIDTH*INSTANCES] = 
                      hardware_regs_ordered[(j+1)*`CPCI_NF2_DATA_WIDTH*NUM_INSTANCES:
                                            j*`CPCI_NF2_DATA_WIDTH*NUM_INSTANCES];
               assign hardware_regs_expanded[(j+1)*`CPCI_NF2_DATA_WIDTH*INSTANCES - 1 : 
                                             j*`CPCI_NF2_DATA_WIDTH*INSTANCES +
                                             NUM_INSTANCES*`CPCI_NF2_DATA_WIDTH] = 0;
            end
         end
      end
      else begin
         assign counter_updates_expanded = counter_updates_ordered;
         assign counter_decrement_expanded = counter_decrement_ordered;
         assign software_regs_ordered = software_regs_expanded;
         assign hardware_regs_expanded = hardware_regs_ordered;
      end
   endgenerate

   generate
      if (NUM_INSTANCES > 1) begin
         assign reg_addr_in_swapped = {reg_addr_in[`UDP_REG_ADDR_WIDTH-1:REG_ADDR_WIDTH],
                                       reg_addr_in[REG_ADDR_WIDTH-INST_WIDTH-1:0],
                                       reg_addr_in[REG_ADDR_WIDTH-1:REG_ADDR_WIDTH-INST_WIDTH]};
         assign hw_reg_addr_out = {hw_reg_addr_out_swapped[`UDP_REG_ADDR_WIDTH-1:REG_ADDR_WIDTH],
                                   hw_reg_addr_out_swapped[INST_WIDTH-1:0],
                                   hw_reg_addr_out_swapped[REG_ADDR_WIDTH-1:INST_WIDTH]};
      end
      else begin
         assign reg_addr_in_swapped = reg_addr_in;
         assign hw_reg_addr_out = hw_reg_addr_out_swapped;
      end
   endgenerate
                                                                                                  
endmodule
module generic_regs
   #( 
      parameter UDP_REG_SRC_WIDTH     = 2,
      parameter TAG                   = 0,
      parameter REG_ADDR_WIDTH        = 5,
      parameter NUM_COUNTERS          = 8,
      parameter NUM_SOFTWARE_REGS     = 8,
      parameter NUM_HARDWARE_REGS     = 8,
      parameter NUM_INSTANCES         = 1,
      parameter COUNTER_INPUT_WIDTH   = 1,
      parameter MIN_UPDATE_INTERVAL   = 8,
      parameter COUNTER_WIDTH         = `CPCI_NF2_DATA_WIDTH,
      parameter RESET_ON_READ         = 0,
      parameter REG_START_ADDR        = 0,
      parameter ACK_UNFOUND_ADDRESSES = 1,

      parameter REVERSE_WORD_ORDER    = 0,



      parameter INSTANCES = 
         NUM_INSTANCES > 1 ? 2 ** log2(NUM_INSTANCES) : 1,
      parameter INST_WIDTH = 
         NUM_INSTANCES > 1 ? log2(NUM_INSTANCES) : 0,           
      parameter COUNTER_UPDATE_WIDTH = 
         NUM_COUNTERS > 0 ? NUM_COUNTERS * COUNTER_INPUT_WIDTH * INSTANCES : INSTANCES,
      parameter COUNTER_DECREMENT_WIDTH = 
         NUM_COUNTERS > 0 ? NUM_COUNTERS * INSTANCES : INSTANCES,
      parameter SOFTWARE_REGS_WIDTH = 
         NUM_SOFTWARE_REGS > 0 ? NUM_SOFTWARE_REGS * `CPCI_NF2_DATA_WIDTH * INSTANCES : INSTANCES,
      parameter HARDWARE_REGS_WIDTH = 
         NUM_HARDWARE_REGS > 0 ? NUM_HARDWARE_REGS * `CPCI_NF2_DATA_WIDTH * INSTANCES : INSTANCES
   )
   (
      input                                  reg_req_in,
      input                                  reg_ack_in,
      input                                  reg_rd_wr_L_in,
      input  [`UDP_REG_ADDR_WIDTH-1:0]       reg_addr_in,
      input  [`CPCI_NF2_DATA_WIDTH-1:0]      reg_data_in,
      input  [UDP_REG_SRC_WIDTH-1:0]         reg_src_in,

      output reg                             reg_req_out,
      output reg                             reg_ack_out,
      output reg                             reg_rd_wr_L_out,
      output reg [`UDP_REG_ADDR_WIDTH-1:0]   reg_addr_out,
      output reg [`CPCI_NF2_DATA_WIDTH-1:0]  reg_data_out,
      output reg [UDP_REG_SRC_WIDTH-1:0]     reg_src_out,


      input [COUNTER_UPDATE_WIDTH - 1 :0]    counter_updates,
      input [COUNTER_DECREMENT_WIDTH - 1:0]  counter_decrement,


      output [SOFTWARE_REGS_WIDTH - 1 : 0]   software_regs,


      input  [HARDWARE_REGS_WIDTH - 1 : 0]   hardware_regs,

      input                                clk,
      input                                reset
    );

   

  function integer log2;
      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
   endfunction



   wire                                   cntr_reg_req_out;
   wire                                   cntr_reg_ack_out;
   wire                                   cntr_reg_rd_wr_L_out;
   wire [`UDP_REG_ADDR_WIDTH-1:0]         cntr_reg_addr_out;
   wire [`CPCI_NF2_DATA_WIDTH-1:0]        cntr_reg_data_out;
   wire [UDP_REG_SRC_WIDTH-1:0]           cntr_reg_src_out;
   
   wire                                   sw_reg_req_out;
   wire                                   sw_reg_ack_out;
   wire                                   sw_reg_rd_wr_L_out;
   wire [`UDP_REG_ADDR_WIDTH-1:0]         sw_reg_addr_out;
   wire [`CPCI_NF2_DATA_WIDTH-1:0]        sw_reg_data_out;
   wire [UDP_REG_SRC_WIDTH-1:0]           sw_reg_src_out;

   wire                                   hw_reg_req_out;
   wire                                   hw_reg_ack_out;
   wire                                   hw_reg_rd_wr_L_out;
   wire [`UDP_REG_ADDR_WIDTH-1:0]         hw_reg_addr_out;
   wire [`CPCI_NF2_DATA_WIDTH-1:0]        hw_reg_data_out;
   wire [UDP_REG_SRC_WIDTH-1:0]           hw_reg_src_out;

   wire [`UDP_REG_ADDR_WIDTH-1:0]         reg_addr_in_swapped;
   wire [`UDP_REG_ADDR_WIDTH-1:0]         hw_reg_addr_out_swapped;

   wire [COUNTER_UPDATE_WIDTH - 1 :0]     counter_updates_ordered;
   wire [COUNTER_DECREMENT_WIDTH - 1:0]   counter_decrement_ordered;
   wire [SOFTWARE_REGS_WIDTH - 1 : 0]     software_regs_ordered;
   wire [HARDWARE_REGS_WIDTH - 1 : 0]     hardware_regs_ordered;
   
   wire [COUNTER_UPDATE_WIDTH - 1 :0]     counter_updates_expanded;
   wire [COUNTER_DECREMENT_WIDTH - 1:0]   counter_decrement_expanded;
   wire [SOFTWARE_REGS_WIDTH - 1 : 0]     software_regs_expanded;
   wire [HARDWARE_REGS_WIDTH - 1 : 0]     hardware_regs_expanded;
   


generate 
if (NUM_COUNTERS > 0) begin
   generic_cntr_regs
     #(.UDP_REG_SRC_WIDTH     (UDP_REG_SRC_WIDTH),
       .TAG                   (TAG),
       .REG_ADDR_WIDTH        (REG_ADDR_WIDTH),
       .NUM_REGS_USED         (NUM_COUNTERS * INSTANCES),
       .REG_WIDTH             (COUNTER_WIDTH),
       .MIN_UPDATE_INTERVAL   (MIN_UPDATE_INTERVAL),
       .RESET_ON_READ         (RESET_ON_READ),
       .INPUT_WIDTH           (COUNTER_INPUT_WIDTH),
       .REG_START_ADDR        (REG_START_ADDR))
   generic_cntr_regs
     (
      .reg_req_in        (reg_req_in),
      .reg_ack_in        (reg_ack_in),
      .reg_rd_wr_L_in    (reg_rd_wr_L_in),
      .reg_addr_in       (reg_addr_in_swapped),
      .reg_data_in       (reg_data_in),
      .reg_src_in        (reg_src_in),
                         
      .reg_req_out       (cntr_reg_req_out),
      .reg_ack_out       (cntr_reg_ack_out),
      .reg_rd_wr_L_out   (cntr_reg_rd_wr_L_out),
      .reg_addr_out      (cntr_reg_addr_out),
      .reg_data_out      (cntr_reg_data_out),
      .reg_src_out       (cntr_reg_src_out),
                         

      .updates           (counter_updates_expanded),
      .decrement         (counter_decrement_expanded),
                         
      .clk               (clk),
      .reset             (reset));
end
else begin
   assign cntr_reg_req_out       = reg_req_in;
   assign cntr_reg_ack_out       = reg_ack_in;
   assign cntr_reg_rd_wr_L_out   = reg_rd_wr_L_in;
   assign cntr_reg_addr_out      = reg_addr_in_swapped;
   assign cntr_reg_data_out      = reg_data_in;
   assign cntr_reg_src_out       = reg_src_in;
end
endgenerate

generate 
if (NUM_SOFTWARE_REGS > 0) begin
   generic_sw_regs
     #(.UDP_REG_SRC_WIDTH   (UDP_REG_SRC_WIDTH),
       .TAG                 (TAG),
       .REG_ADDR_WIDTH      (REG_ADDR_WIDTH),
       .NUM_REGS_USED       (NUM_SOFTWARE_REGS * INSTANCES),
       .REG_START_ADDR      (REG_START_ADDR + NUM_COUNTERS * INSTANCES))
   generic_sw_regs
     (
      .reg_req_in        (cntr_reg_req_out),
      .reg_ack_in        (cntr_reg_ack_out),
      .reg_rd_wr_L_in    (cntr_reg_rd_wr_L_out),
      .reg_addr_in       (cntr_reg_addr_out),
      .reg_data_in       (cntr_reg_data_out),
      .reg_src_in        (cntr_reg_src_out),
                         
      .reg_req_out       (sw_reg_req_out),
      .reg_ack_out       (sw_reg_ack_out),
      .reg_rd_wr_L_out   (sw_reg_rd_wr_L_out),
      .reg_addr_out      (sw_reg_addr_out),
      .reg_data_out      (sw_reg_data_out),
      .reg_src_out       (sw_reg_src_out),
                         
      .software_regs     (software_regs_expanded),
                         
      .clk               (clk),
      .reset             (reset));
end
else begin
   assign sw_reg_req_out       = cntr_reg_req_out;
   assign sw_reg_ack_out       = cntr_reg_ack_out;
   assign sw_reg_rd_wr_L_out   = cntr_reg_rd_wr_L_out;
   assign sw_reg_addr_out      = cntr_reg_addr_out;
   assign sw_reg_data_out      = cntr_reg_data_out;
   assign sw_reg_src_out       = cntr_reg_src_out;

   assign sofware_regs         = 'h0;
end
endgenerate

generate 
if (NUM_HARDWARE_REGS > 0) begin
   generic_hw_regs
     #(.UDP_REG_SRC_WIDTH   (UDP_REG_SRC_WIDTH),
       .TAG                 (TAG),
       .REG_ADDR_WIDTH      (REG_ADDR_WIDTH),
       .NUM_REGS_USED       (NUM_HARDWARE_REGS * INSTANCES),
       .REG_START_ADDR      (REG_START_ADDR + (NUM_COUNTERS+NUM_SOFTWARE_REGS) * INSTANCES))
   generic_hw_regs
     (
      .reg_req_in        (sw_reg_req_out),
      .reg_ack_in        (sw_reg_ack_out),
      .reg_rd_wr_L_in    (sw_reg_rd_wr_L_out),
      .reg_addr_in       (sw_reg_addr_out),
      .reg_data_in       (sw_reg_data_out),
      .reg_src_in        (sw_reg_src_out),
                         
      .reg_req_out       (hw_reg_req_out),
      .reg_ack_out       (hw_reg_ack_out),
      .reg_rd_wr_L_out   (hw_reg_rd_wr_L_out),
      .reg_addr_out      (hw_reg_addr_out_swapped),
      .reg_data_out      (hw_reg_data_out),
      .reg_src_out       (hw_reg_src_out),
                         
      .hardware_regs     (hardware_regs_expanded),
                         
      .clk               (clk),
      .reset             (reset));
end
else begin
   assign hw_reg_req_out       = sw_reg_req_out;
   assign hw_reg_ack_out       = sw_reg_ack_out;
   assign hw_reg_rd_wr_L_out   = sw_reg_rd_wr_L_out;
   assign hw_reg_addr_out_swapped      = sw_reg_addr_out;
   assign hw_reg_data_out      = sw_reg_data_out;
   assign hw_reg_src_out       = sw_reg_src_out;
end
endgenerate




   always @(posedge clk) begin
      if (reset) begin
         reg_req_out        <= 0;
         reg_ack_out        <= 0;
         reg_rd_wr_L_out    <= 0;
         reg_addr_out       <= 0;
         reg_data_out       <= 0;
         reg_src_out        <= 0;
      end
      else begin
         if (ACK_UNFOUND_ADDRESSES 
             && hw_reg_req_out 
             && !hw_reg_ack_out

				) begin
            reg_ack_out        <= 1'b1;
            reg_data_out       <= hw_reg_rd_wr_L_out ? 32'hDEADBEEF : hw_reg_data_out;
         end
         else begin
            reg_ack_out        <= hw_reg_ack_out;
            reg_data_out       <= hw_reg_data_out;
         end
         reg_req_out        <= hw_reg_req_out;
         reg_rd_wr_L_out    <= hw_reg_rd_wr_L_out;
         reg_addr_out       <= hw_reg_addr_out;
         reg_src_out        <= hw_reg_src_out;
      end
   end


   generate
      genvar i;
      if(NUM_COUNTERS>1 && REVERSE_WORD_ORDER) begin
         for(i=0; i<NUM_COUNTERS; i=i+1) begin:gen_ordered_cntrs
            assign counter_updates_ordered[(i+1)*COUNTER_INPUT_WIDTH - 1: i*COUNTER_INPUT_WIDTH]
                                           = counter_updates[(NUM_COUNTERS-i)*COUNTER_INPUT_WIDTH - 1:(NUM_COUNTERS-i-1)*COUNTER_INPUT_WIDTH];
            assign counter_decrement_ordered[i] = counter_decrement[NUM_COUNTERS-i-1];
         end
      end
      else begin
         assign counter_updates_ordered = counter_updates;
         assign counter_decrement_ordered = counter_decrement;
      end
                   
      if(NUM_SOFTWARE_REGS>1 && REVERSE_WORD_ORDER) begin
         for(i=0; i<NUM_SOFTWARE_REGS; i=i+1) begin:gen_ordered_sw_regs
            assign software_regs[(i+1)*`CPCI_NF2_DATA_WIDTH - 1: i*`CPCI_NF2_DATA_WIDTH]
                                           = software_regs_ordered[(NUM_SOFTWARE_REGS-i)*`CPCI_NF2_DATA_WIDTH - 1:(NUM_SOFTWARE_REGS-i-1)*`CPCI_NF2_DATA_WIDTH];
         end
      end
      else begin
         assign software_regs = software_regs_ordered;
      end
      
      if(NUM_HARDWARE_REGS>1 && REVERSE_WORD_ORDER) begin
         for(i=0; i<NUM_HARDWARE_REGS; i=i+1) begin:gen_ordered_hw_regs
            assign hardware_regs_ordered[(i+1)*`CPCI_NF2_DATA_WIDTH - 1: i*`CPCI_NF2_DATA_WIDTH]
                                           = hardware_regs[(NUM_HARDWARE_REGS-i)*`CPCI_NF2_DATA_WIDTH - 1:(NUM_HARDWARE_REGS-i-1)*`CPCI_NF2_DATA_WIDTH];
         end
      end
      else begin
         assign hardware_regs_ordered = hardware_regs;
      end
   endgenerate











   generate
      genvar j;
      if(INSTANCES != 1 && INSTANCES != NUM_INSTANCES) begin
         if (NUM_COUNTERS>0) begin
            for(j=0; j<NUM_COUNTERS; j=j+1) begin:gen_expanded_cntrs
               assign counter_updates_expanded[j*COUNTER_INPUT_WIDTH*INSTANCES + 
                                               NUM_INSTANCES*COUNTER_INPUT_WIDTH - 1 : 
                                               j*COUNTER_INPUT_WIDTH*INSTANCES] = 
                      counter_updates_ordered[(j+1)*COUNTER_INPUT_WIDTH*NUM_INSTANCES + 
                                               j*COUNTER_INPUT_WIDTH*NUM_INSTANCES];
               assign counter_updates_expanded[(j+1)*COUNTER_INPUT_WIDTH*INSTANCES - 1 : 
                                               j*COUNTER_INPUT_WIDTH*INSTANCES + 
                                               NUM_INSTANCES*COUNTER_INPUT_WIDTH] = 0;

               assign counter_decrement_expanded[j*INSTANCES + NUM_INSTANCES - 1 : j*INSTANCES] = 
                      counter_decrement_ordered[(j+1)*NUM_INSTANCES + j*NUM_INSTANCES];
               assign counter_decrement_expanded[(j+1)*INSTANCES - 1 : j*INSTANCES + NUM_INSTANCES] = 0;
            end
         end

         if (NUM_SOFTWARE_REGS>0) begin
            for(j=0; j<NUM_SOFTWARE_REGS; j=j+1) begin:gen_ordered_sw_regs
               assign software_regs_ordered[(j+1)*`CPCI_NF2_DATA_WIDTH - 1: j*`CPCI_NF2_DATA_WIDTH] =
                      software_regs_expanded[j*`CPCI_NF2_DATA_WIDTH*INSTANCES +
                                             NUM_INSTANCES*`CPCI_NF2_DATA_WIDTH - 1: 
                                             j*`CPCI_NF2_DATA_WIDTH];
            end
         end
         
         if (NUM_HARDWARE_REGS>0) begin
            for(j=0; j<NUM_HARDWARE_REGS; j=j+1) begin:gen_ordered_hw_regs
               assign hardware_regs_expanded[j*`CPCI_NF2_DATA_WIDTH*INSTANCES +
                                             NUM_INSTANCES*`CPCI_NF2_DATA_WIDTH - 1 : 
                                             j*`CPCI_NF2_DATA_WIDTH*INSTANCES] = 
                      hardware_regs_ordered[(j+1)*`CPCI_NF2_DATA_WIDTH*NUM_INSTANCES:
                                            j*`CPCI_NF2_DATA_WIDTH*NUM_INSTANCES];
               assign hardware_regs_expanded[(j+1)*`CPCI_NF2_DATA_WIDTH*INSTANCES - 1 : 
                                             j*`CPCI_NF2_DATA_WIDTH*INSTANCES +
                                             NUM_INSTANCES*`CPCI_NF2_DATA_WIDTH] = 0;
            end
         end
      end
      else begin
         assign counter_updates_expanded = counter_updates_ordered;
         assign counter_decrement_expanded = counter_decrement_ordered;
         assign software_regs_ordered = software_regs_expanded;
         assign hardware_regs_expanded = hardware_regs_ordered;
      end
   endgenerate

   generate
      if (NUM_INSTANCES > 1) begin
         assign reg_addr_in_swapped = {reg_addr_in[`UDP_REG_ADDR_WIDTH-1:REG_ADDR_WIDTH],
                                       reg_addr_in[REG_ADDR_WIDTH-INST_WIDTH-1:0],
                                       reg_addr_in[REG_ADDR_WIDTH-1:REG_ADDR_WIDTH-INST_WIDTH]};
         assign hw_reg_addr_out = {hw_reg_addr_out_swapped[`UDP_REG_ADDR_WIDTH-1:REG_ADDR_WIDTH],
                                   hw_reg_addr_out_swapped[INST_WIDTH-1:0],
                                   hw_reg_addr_out_swapped[REG_ADDR_WIDTH-1:INST_WIDTH]};
      end
      else begin
         assign reg_addr_in_swapped = reg_addr_in;
         assign hw_reg_addr_out = hw_reg_addr_out_swapped;
      end
   endgenerate
                                                                                                  
endmodule