data/full_repos/permissive/114811571/test/samples/inout_inst/inout_inst.v
data/verilator_xmls/21f7934b-4d83-47ee-b413-a5878e8b74f8.xml
module io1bit_unq1 (
                    clk, 
                    pad,
                    p2f,
                    f2p,
                    mode
                    );


   input  clk;
   inout pad;
   output p2f;
   input f2p;
   input mode;
   
   assign pad = (mode == 1'b1) ? f2p : 1'bz;

   assign p2f = pad;

endmodule
module io1bit_unq1 (
                    clk, 
                    pad,
                    p2f,
                    f2p,
                    mode
                    );



   input  clk;
   inout pad;
   output p2f;
   input f2p;
   input mode;
   
   assign pad = (mode == 1'b1) ? f2p : 1'bz;

   assign p2f = pad;

endmodule