data/full_repos/permissive/1122957/libsrc/hdl/vhd/mkBiasWorker4B.v
1: b"%Error: data/full_repos/permissive/1122957/libsrc/hdl/vhd/mkBiasWorker4B.v:39: Cannot find file containing module: 'bias_vhdl'\n  bias_vhdl bias_vi(\n  ^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/1122957/libsrc/hdl/vhd,data/full_repos/permissive/1122957/bias_vhdl\n             data/full_repos/permissive/1122957/libsrc/hdl/vhd,data/full_repos/permissive/1122957/bias_vhdl.v\n             data/full_repos/permissive/1122957/libsrc/hdl/vhd,data/full_repos/permissive/1122957/bias_vhdl.sv\n             bias_vhdl\n             bias_vhdl.v\n             bias_vhdl.sv\n             obj_dir/bias_vhdl\n             obj_dir/bias_vhdl.v\n             obj_dir/bias_vhdl.sv\n%Error: Exiting due to 1 error(s)\n"
module mkBiasWorker4B(
  input           wciS0_Clk,
  input           wciS0_MReset_n,
  input  [2 : 0]  wciS0_MCmd,
  input           wciS0_MAddrSpace,
  input  [3 : 0]  wciS0_MByteEn,
  input  [31 : 0] wciS0_MAddr,
  input  [31 : 0] wciS0_MData,
  output [1 : 0]  wciS0_SResp,
  output [31 : 0] wciS0_SData,
  output          wciS0_SThreadBusy,
  output [1 : 0]  wciS0_SFlag,
  input  [1 : 0]  wciS0_MFlag,
  input  [2 : 0]  wsiS0_MCmd,
  input           wsiS0_MReqLast,
  input           wsiS0_MBurstPrecise,
  input  [11 : 0] wsiS0_MBurstLength,
  input  [31 : 0] wsiS0_MData,
  input  [3 : 0]  wsiS0_MByteEn,
  input  [7 : 0]  wsiS0_MReqInfo,
  output          wsiS0_SThreadBusy,
  output          wsiS0_SReset_n,
  input           wsiS0_MReset_n,
  output [2 : 0]  wsiM0_MCmd,
  output          wsiM0_MReqLast,
  output          wsiM0_MBurstPrecise,
  output [11 : 0] wsiM0_MBurstLength,
  output [31 : 0] wsiM0_MData,
  output [3 : 0]  wsiM0_MByteEn,
  output [7 : 0]  wsiM0_MReqInfo,
  input           wsiM0_SThreadBusy,
  output          wsiM0_MReset_n,
  input           wsiM0_SReset_n );


  bias_vhdl bias_vi(
    .ctl_Clk               (wciS0_Clk),
    .ctl_MAddr             (wciS0_MAddr[4:0]),
    .ctl_MAddrSpace        (wciS0_MAddrSpace),
    .ctl_MCmd              (wciS0_MCmd),
    .ctl_MData             (wciS0_MData),
    .ctl_MFlag             (wciS0_MFlag),
    .ctl_MReset_n          (wciS0_MReset_n),
    .ctl_SData             (wciS0_SData),
    .ctl_SFlag             (wciS0_SFlag),
    .ctl_SResp             (wciS0_SResp),
    .ctl_SThreadBusy       (wciS0_SThreadBusy),

    .in_MBurstLength       (wsiS0_MBurstLength),
    .in_MByteEn            (wsiS0_MByteEn),
    .in_MCmd               (wsiS0_MCmd),
    .in_MData              (wsiS0_MData),
    .in_MBurstPrecise      (wsiS0_MBurstPrecise),
    .in_MReqInfo           (wsiS0_MReqInfo),
    .in_MReqLast           (wsiS0_MReqLast),
    .in_MReset_n           (wsiS0_MReset_n),
    .in_SReset_n           (wsiS0_SReset_n),
    .in_SThreadBusy        (wsiS0_SThreadBusy),

    .out_SReset_n          (wsiM0_SReset_n),
    .out_SThreadBusy       (wsiM0_SThreadBusy),
    .out_MBurstLength      (wsiM0_MBurstLength),
    .out_MByteEn           (wsiM0_MByteEn),
    .out_MCmd              (wsiM0_MCmd),
    .out_MData             (wsiM0_MData),
    .out_MBurstPrecise     (wsiM0_MBurstPrecise),
    .out_MReqInfo          (wsiM0_MReqInfo),
    .out_MReqLast          (wsiM0_MReqLast),
    .out_MReset_n          (wsiM0_MReset_n)
  );

endmodule
module mkBiasWorker4B(
  input           wciS0_Clk,
  input           wciS0_MReset_n,
  input  [2 : 0]  wciS0_MCmd,
  input           wciS0_MAddrSpace,
  input  [3 : 0]  wciS0_MByteEn,
  input  [31 : 0] wciS0_MAddr,
  input  [31 : 0] wciS0_MData,
  output [1 : 0]  wciS0_SResp,
  output [31 : 0] wciS0_SData,
  output          wciS0_SThreadBusy,
  output [1 : 0]  wciS0_SFlag,
  input  [1 : 0]  wciS0_MFlag,
  input  [2 : 0]  wsiS0_MCmd,
  input           wsiS0_MReqLast,
  input           wsiS0_MBurstPrecise,
  input  [11 : 0] wsiS0_MBurstLength,
  input  [31 : 0] wsiS0_MData,
  input  [3 : 0]  wsiS0_MByteEn,
  input  [7 : 0]  wsiS0_MReqInfo,
  output          wsiS0_SThreadBusy,
  output          wsiS0_SReset_n,
  input           wsiS0_MReset_n,
  output [2 : 0]  wsiM0_MCmd,
  output          wsiM0_MReqLast,
  output          wsiM0_MBurstPrecise,
  output [11 : 0] wsiM0_MBurstLength,
  output [31 : 0] wsiM0_MData,
  output [3 : 0]  wsiM0_MByteEn,
  output [7 : 0]  wsiM0_MReqInfo,
  input           wsiM0_SThreadBusy,
  output          wsiM0_MReset_n,
  input           wsiM0_SReset_n );



  bias_vhdl bias_vi(
    .ctl_Clk               (wciS0_Clk),
    .ctl_MAddr             (wciS0_MAddr[4:0]),
    .ctl_MAddrSpace        (wciS0_MAddrSpace),
    .ctl_MCmd              (wciS0_MCmd),
    .ctl_MData             (wciS0_MData),
    .ctl_MFlag             (wciS0_MFlag),
    .ctl_MReset_n          (wciS0_MReset_n),
    .ctl_SData             (wciS0_SData),
    .ctl_SFlag             (wciS0_SFlag),
    .ctl_SResp             (wciS0_SResp),
    .ctl_SThreadBusy       (wciS0_SThreadBusy),

    .in_MBurstLength       (wsiS0_MBurstLength),
    .in_MByteEn            (wsiS0_MByteEn),
    .in_MCmd               (wsiS0_MCmd),
    .in_MData              (wsiS0_MData),
    .in_MBurstPrecise      (wsiS0_MBurstPrecise),
    .in_MReqInfo           (wsiS0_MReqInfo),
    .in_MReqLast           (wsiS0_MReqLast),
    .in_MReset_n           (wsiS0_MReset_n),
    .in_SReset_n           (wsiS0_SReset_n),
    .in_SThreadBusy        (wsiS0_SThreadBusy),

    .out_SReset_n          (wsiM0_SReset_n),
    .out_SThreadBusy       (wsiM0_SThreadBusy),
    .out_MBurstLength      (wsiM0_MBurstLength),
    .out_MByteEn           (wsiM0_MByteEn),
    .out_MCmd              (wsiM0_MCmd),
    .out_MData             (wsiM0_MData),
    .out_MBurstPrecise     (wsiM0_MBurstPrecise),
    .out_MReqInfo          (wsiM0_MReqInfo),
    .out_MReqLast          (wsiM0_MReqLast),
    .out_MReset_n          (wsiM0_MReset_n)
  );

endmodule