data/full_repos/permissive/159001439/src/fifo_async.v
 line:27: before: "("
1: b'%Warning-WIDTH: data/full_repos/permissive/159001439/src/fifo_async.v:124: Operator AND expects 5 bits on the LHS, but LHS\'s VARREF \'rd_en\' generates 1 bits.\n                                                                         : ... In instance fifo_async\nassign rbinnext = rbin + (rd_en & ~empty);\n                                ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/159001439/src/fifo_async.v:124: Operator NOT expects 5 bits on the LHS, but LHS\'s VARREF \'empty\' generates 1 bits.\n                                                                         : ... In instance fifo_async\nassign rbinnext = rbin + (rd_en & ~empty);\n                                  ^\n%Warning-WIDTH: data/full_repos/permissive/159001439/src/fifo_async.v:165: Operator AND expects 5 bits on the LHS, but LHS\'s VARREF \'wr_en\' generates 1 bits.\n                                                                         : ... In instance fifo_async\nassign wbinnext = wbin + (wr_en & ~full);\n                                ^\n%Warning-WIDTH: data/full_repos/permissive/159001439/src/fifo_async.v:165: Operator NOT expects 5 bits on the LHS, but LHS\'s VARREF \'full\' generates 1 bits.\n                                                                         : ... In instance fifo_async\nassign wbinnext = wbin + (wr_en & ~full);\n                                  ^\n%Error: Exiting due to 4 warning(s)\n'
function [ASIZE:0] gray_encode(input [ASIZE:0] binary);
begin
	gray_encode = (binary>>1) ^ binary;
end
endfunction
function [ASIZE:0] gray_encode(input [ASIZE:0] binary);

begin
	gray_encode = (binary>>1) ^ binary;
end
endfunction