data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv
None: at end of input
1: b'%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:21: Cannot find include file: test_exec.svh\n  `include "test_exec.svh" \n           ^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb,data/full_repos/permissive/214858095/test_exec.svh\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb,data/full_repos/permissive/214858095/test_exec.svh.v\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb,data/full_repos/permissive/214858095/test_exec.svh.sv\n             test_exec.svh\n             test_exec.svh.v\n             test_exec.svh.sv\n             obj_dir/test_exec.svh\n             obj_dir/test_exec.svh.v\n             obj_dir/test_exec.svh.sv\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:48: Cannot find include file: ../eth_regs.vh\n  `include "../eth_regs.vh" \n           ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:886: Cannot find include file: ../../core/rfnoc_chdr_utils.vh\n  `include "../../core/rfnoc_chdr_utils.vh" \n           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:887: Cannot find include file: ../../core/rfnoc_chdr_internal_utils.vh\n  `include "../../core/rfnoc_chdr_internal_utils.vh" \n           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:888: Cannot find include file: ../../xport/rfnoc_xport_types.vh\n  `include "../../xport/rfnoc_xport_types.vh" \n           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:22: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\n  import PkgAxiStreamBfm::*;\n         ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:59: syntax error, unexpected IDENTIFIER, expecting \';\'\n  localparam ipv4_hdr_t DEFAULT_IPV4_HDR = \'{\n                        ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:109: syntax error, unexpected \'=\', expecting \',\' or \';\'\n                 .MAX_PACKET_BYTES(MAX_PACKET_BYTES)) eth =\n                                                          ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:111: syntax error, unexpected \'=\', expecting \',\' or \';\'\n  AxiStreamBfm #(.DATA_WIDTH(CHDR_W),.USER_WIDTH(CHDR_USER_W),.TKEEP(0),.TUSER(0)) v =\n                                                                                     ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:113: syntax error, unexpected \'=\', expecting \',\' or \';\'\n  AxiStreamBfm #(.DATA_WIDTH(CPU_W),.USER_WIDTH(CPU_USER_W),.TKEEP(0)) cpu =\n                                                                           ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:243: syntax error, unexpected \'@\'\n    @(posedge clk);\n    ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:247: syntax error, unexpected \'@\'\n    @(posedge clk);\n    ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:257: syntax error, unexpected \'@\'\n    @(posedge clk);\n    ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:260: syntax error, unexpected \'@\'\n    @(negedge clk);  \n    ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:267: syntax error, unexpected \'@\'\n    @(posedge clk);\n    ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:269: syntax error, unexpected \'@\'\n    @(negedge clk);\n    ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:272: syntax error, unexpected \'@\'\n    @(posedge clk);\n    ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:284: Unsupported: wait statements\n    wait(!reset);\n    ^~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:285: syntax error, unexpected \'@\'\n    repeat (10) @(posedge clk);\n                ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:294: syntax error, unexpected TIME NUMBER, expecting \')\'\n    test.start_test({TEST_NAME,"::Test/Setup Registers"}, 10us);\n                                                          ^~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:305: syntax error, unexpected \'@\'\n    repeat (3) @(posedge clk);\n               ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:307: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(my_mac==DEF_DEST_MAC_ADDR,     "my mac mismatched!");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:307: syntax error, unexpected \',\'\n    `ASSERT_ERROR(my_mac==DEF_DEST_MAC_ADDR,     "my mac mismatched!");\n                                           ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:308: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(my_ip==DEF_DEST_IP_ADDR,       "my ip mismatched!");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:308: syntax error, unexpected \',\'\n    `ASSERT_ERROR(my_ip==DEF_DEST_IP_ADDR,       "my ip mismatched!");\n                                         ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:309: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(my_udp_chdr_port==DEF_DEST_UDP_PORT,"my udp mismatched!");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:309: syntax error, unexpected \',\'\n    `ASSERT_ERROR(my_udp_chdr_port==DEF_DEST_UDP_PORT,"my udp mismatched!");\n                                                     ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:317: syntax error, unexpected \'@\'\n    repeat (3) @(posedge clk);\n               ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:318: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(my_mac==DEF_BRIDGE_MAC_ADDR,     "my mac mismatched!");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:318: syntax error, unexpected \',\'\n    `ASSERT_ERROR(my_mac==DEF_BRIDGE_MAC_ADDR,     "my mac mismatched!");\n                                             ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:319: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(my_ip==DEF_BRIDGE_IP_ADDR,       "my ip mismatched!");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:319: syntax error, unexpected \',\'\n    `ASSERT_ERROR(my_ip==DEF_BRIDGE_IP_ADDR,       "my ip mismatched!");\n                                           ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:320: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(my_udp_chdr_port==DEF_BRIDGE_UDP_PORT,"my udp mismatched!");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:320: syntax error, unexpected \',\'\n    `ASSERT_ERROR(my_udp_chdr_port==DEF_BRIDGE_UDP_PORT,"my udp mismatched!");\n                                                       ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:344: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n    typedef ChdrData #(CHDR_W)::chdr_word_t chdr_word_t;\n                     ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:345: syntax error, unexpected IDENTIFIER, expecting \'.\' or \';\'\n    typedef chdr_word_t word_queue_t[$];\n                        ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:347: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n    typedef XportStreamPacket #(ENET_W)             EthXportPacket_t;\n                              ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:348: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n    typedef AxiStreamPacket   #(ENET_W,ENET_USER_W) EthAxisPacket_t;\n                              ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:350: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n    typedef XportStreamPacket #(CPU_W)            CpuXportPacket_t;\n                              ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:351: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n    typedef AxiStreamPacket   #(CPU_W,CPU_USER_W) CpuAxisPacket_t;\n                              ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:353: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n    typedef XportStreamPacket #(CHDR_W) ChdrXportPacket_t;\n                              ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:354: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n    typedef AxiStreamPacket   #(CHDR_W,CHDR_USER_W) ChdrAxisPacket_t;\n                              ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:355: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n    typedef ChdrPacket        #(CHDR_W,CHDR_USER_W) ChdrPacket_t;\n                              ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:358: syntax error, unexpected IDENTIFIER\n    TestExec test_e2c = new();\n             ^~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:363: syntax error, unexpected TIME NUMBER, expecting \')\'\n    test_e2c.start_test({TEST_NAME,"::Ethernet to CPU"}, 60us);\n                                                         ^~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:376: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\n      automatic eth_hdr_t    eth_hdr;\n                ^~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:422: Unsupported: fork statements\n    fork\n    ^~~~\n%Warning-STMTDLY: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:425: Unsupported: Ignoring delay on this delayed statement.\n          #1 eth.put(send[i]);\n          ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:433: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\n            automatic CpuAxisPacket_t  actual_a;\n                      ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:443: Define or directive not defined: \'`ASSERT_ERROR\'\n              `ASSERT_ERROR(drop_count < EXPECT_DROPS,"Exceeded anticipated number of dropped packets e2c");\n              ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/xport_sv/eth_interface_tb/eth_ifc_tb.sv:443: syntax error, unexpected \',\'\n              `ASSERT_ERROR(drop_count < EXPECT_DROPS,"Exceeded anticipated number of dropped packets e2c");\n                                                     ^\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
function automatic word_queue_t bytes_to_words(raw_pkt_t pay);
    automatic ChdrXportPacket_t axis_pkt = new();

    axis_pkt.push_bytes(pay);
    return axis_pkt.data;

  endfunction
function automatic word_queue_t bytes_to_words(raw_pkt_t pay);

    automatic ChdrXportPacket_t axis_pkt = new();

    axis_pkt.push_bytes(pay);
    return axis_pkt.data;

  endfunction