data/full_repos/permissive/150947952/scratch/cyclone10/projects/MKRVIDOR4000_template/MKRVIDOR4000_top.v
1: b"%Error: data/full_repos/permissive/150947952/scratch/cyclone10/projects/MKRVIDOR4000_template/MKRVIDOR4000_top.v:155: Cannot find file containing module: 'IntOsc8Mhz'\nIntOsc8Mhz   osc\n^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/150947952/scratch/cyclone10/projects/MKRVIDOR4000_template,data/full_repos/permissive/150947952/IntOsc8Mhz\n             data/full_repos/permissive/150947952/scratch/cyclone10/projects/MKRVIDOR4000_template,data/full_repos/permissive/150947952/IntOsc8Mhz.v\n             data/full_repos/permissive/150947952/scratch/cyclone10/projects/MKRVIDOR4000_template,data/full_repos/permissive/150947952/IntOsc8Mhz.sv\n             IntOsc8Mhz\n             IntOsc8Mhz.v\n             IntOsc8Mhz.sv\n             obj_dir/IntOsc8Mhz\n             obj_dir/IntOsc8Mhz.v\n             obj_dir/IntOsc8Mhz.sv\n%Error: data/full_repos/permissive/150947952/scratch/cyclone10/projects/MKRVIDOR4000_template/MKRVIDOR4000_top.v:161: Cannot find file containing module: 'SYSTEM_PLL'\nSYSTEM_PLL PLL_inst(\n^~~~~~~~~~\n%Error: data/full_repos/permissive/150947952/scratch/cyclone10/projects/MKRVIDOR4000_template/MKRVIDOR4000_top.v:172: Cannot find file containing module: 'Counter'\nCounter cnt_ints (\n^~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module MKRVIDOR4000_top
(

  input         iCLK,
  input         iRESETn,
  input         iSAM_INT,
  output        oSAM_INT,
  

  output        oSDRAM_CLK,
  output [11:0] oSDRAM_ADDR,
  output [1:0]  oSDRAM_BA,
  output        oSDRAM_CASn,
  output        oSDRAM_CKE,
  output        oSDRAM_CSn,
  inout  [15:0] bSDRAM_DQ,
  output [1:0]  oSDRAM_DQM,
  output        oSDRAM_RASn,
  output        oSDRAM_WEn,


  inout         bMKR_AREF,
  inout  [6:0]  bMKR_A,
  inout  [14:0] bMKR_D,
  

  inout         bPEX_RST,
  inout         bPEX_PIN6,
  inout         bPEX_PIN8,
  inout         bPEX_PIN10,
  input         iPEX_PIN11,
  inout         bPEX_PIN12,
  input         iPEX_PIN13,
  inout         bPEX_PIN14,
  inout         bPEX_PIN16,
  inout         bPEX_PIN20,
  input         iPEX_PIN23,
  input         iPEX_PIN25,
  inout         bPEX_PIN28,
  inout         bPEX_PIN30,
  input         iPEX_PIN31,
  inout         bPEX_PIN32,
  input         iPEX_PIN33,
  inout         bPEX_PIN42,
  inout         bPEX_PIN44,
  inout         bPEX_PIN45,
  inout         bPEX_PIN46,
  inout         bPEX_PIN47,
  inout         bPEX_PIN48,
  inout         bPEX_PIN49,
  inout         bPEX_PIN51,


  inout         bWM_PIO1,
  inout         bWM_PIO2,
  inout         bWM_PIO3,
  inout         bWM_PIO4,
  inout         bWM_PIO5,
  inout         bWM_PIO7,
  inout         bWM_PIO8,
  inout         bWM_PIO18,
  inout         bWM_PIO20,
  inout         bWM_PIO21,
  inout         bWM_PIO27,
  inout         bWM_PIO28,
  inout         bWM_PIO29,
  inout         bWM_PIO31,
  input         iWM_PIO32,
  inout         bWM_PIO34,
  inout         bWM_PIO35,
  inout         bWM_PIO36,
  input         iWM_TX,
  inout         oWM_RX,
  inout         oWM_RESET,


  output [2:0]  oHDMI_TX,
  output        oHDMI_CLK,

  inout         bHDMI_SDA,
  inout         bHDMI_SCL,
  
  input         iHDMI_HPD,
  

  input  [1:0]  iMIPI_D,
  input         iMIPI_CLK,
  inout         bMIPI_SDA,
  inout         bMIPI_SCL,
  inout  [1:0]  bMIPI_GP,


  output        oFLASH_SCK,
  output        oFLASH_CS,
  inout         oFLASH_MOSI,
  inout         iFLASH_MISO,
  inout         oFLASH_HOLD,
  inout         oFLASH_WP

);



wire        wOSC_CLK;

wire        wCLK8,wCLK24, wCLK64, wCLK80, wCLK120;

wire [31:0] wJTAG_ADDRESS, wJTAG_READ_DATA, wJTAG_WRITE_DATA, wDPRAM_READ_DATA;
wire        wJTAG_READ, wJTAG_WRITE, wJTAG_WAIT_REQUEST, wJTAG_READ_DATAVALID;
wire [4:0]  wJTAG_BURST_COUNT;
wire        wDPRAM_CS;

wire [7:0]  wDVI_RED,wDVI_GRN,wDVI_BLU;
wire        wDVI_HS, wDVI_VS, wDVI_DE;

wire        wVID_CLK, wVID_CLKx5;
wire        wMEM_CLK;

assign wVID_CLK   = wCLK24;
assign wVID_CLKx5 = wCLK120;
assign wCLK8      = iCLK;

wire [7:0] LEDs;

assign bMKR_D[0]	= LEDs[0];
assign bMKR_D[1]	= LEDs[1];
assign bMKR_D[2]	= LEDs[2];
assign bMKR_D[3]	= LEDs[3];
assign bMKR_D[4]	= LEDs[4];
assign bMKR_D[5]	= LEDs[5];
assign bMKR_D[13]	= LEDs[6];
assign bMKR_D[14]	= LEDs[7];


IntOsc8Mhz   osc
  ( 
  .clkout(wOSC_CLK),
  .oscena(1'b1));


SYSTEM_PLL PLL_inst(
  .areset(1'b0),
  .inclk0(wCLK8),
  .c0(wCLK24),
  .c1(wCLK120),
  .c2(wMEM_CLK),
   .c3(oSDRAM_CLK),
  .c4(wFLASH_CLK),
   
  .locked());

Counter cnt_ints (
	.wClk(wOSC_CLK),
	.wRst(1'b0),
	.rOutCount(LEDs)
);

  
reg [5:0] rRESETCNT;

always @(posedge wMEM_CLK)
begin
  if (!rRESETCNT[5])
  begin
  rRESETCNT<=rRESETCNT+1;
  end
end

endmodule
module MKRVIDOR4000_top
(

  input         iCLK,
  input         iRESETn,
  input         iSAM_INT,
  output        oSAM_INT,
  

  output        oSDRAM_CLK,
  output [11:0] oSDRAM_ADDR,
  output [1:0]  oSDRAM_BA,
  output        oSDRAM_CASn,
  output        oSDRAM_CKE,
  output        oSDRAM_CSn,
  inout  [15:0] bSDRAM_DQ,
  output [1:0]  oSDRAM_DQM,
  output        oSDRAM_RASn,
  output        oSDRAM_WEn,


  inout         bMKR_AREF,
  inout  [6:0]  bMKR_A,
  inout  [14:0] bMKR_D,
  

  inout         bPEX_RST,
  inout         bPEX_PIN6,
  inout         bPEX_PIN8,
  inout         bPEX_PIN10,
  input         iPEX_PIN11,
  inout         bPEX_PIN12,
  input         iPEX_PIN13,
  inout         bPEX_PIN14,
  inout         bPEX_PIN16,
  inout         bPEX_PIN20,
  input         iPEX_PIN23,
  input         iPEX_PIN25,
  inout         bPEX_PIN28,
  inout         bPEX_PIN30,
  input         iPEX_PIN31,
  inout         bPEX_PIN32,
  input         iPEX_PIN33,
  inout         bPEX_PIN42,
  inout         bPEX_PIN44,
  inout         bPEX_PIN45,
  inout         bPEX_PIN46,
  inout         bPEX_PIN47,
  inout         bPEX_PIN48,
  inout         bPEX_PIN49,
  inout         bPEX_PIN51,


  inout         bWM_PIO1,
  inout         bWM_PIO2,
  inout         bWM_PIO3,
  inout         bWM_PIO4,
  inout         bWM_PIO5,
  inout         bWM_PIO7,
  inout         bWM_PIO8,
  inout         bWM_PIO18,
  inout         bWM_PIO20,
  inout         bWM_PIO21,
  inout         bWM_PIO27,
  inout         bWM_PIO28,
  inout         bWM_PIO29,
  inout         bWM_PIO31,
  input         iWM_PIO32,
  inout         bWM_PIO34,
  inout         bWM_PIO35,
  inout         bWM_PIO36,
  input         iWM_TX,
  inout         oWM_RX,
  inout         oWM_RESET,


  output [2:0]  oHDMI_TX,
  output        oHDMI_CLK,

  inout         bHDMI_SDA,
  inout         bHDMI_SCL,
  
  input         iHDMI_HPD,
  

  input  [1:0]  iMIPI_D,
  input         iMIPI_CLK,
  inout         bMIPI_SDA,
  inout         bMIPI_SCL,
  inout  [1:0]  bMIPI_GP,


  output        oFLASH_SCK,
  output        oFLASH_CS,
  inout         oFLASH_MOSI,
  inout         iFLASH_MISO,
  inout         oFLASH_HOLD,
  inout         oFLASH_WP

);




wire        wOSC_CLK;

wire        wCLK8,wCLK24, wCLK64, wCLK80, wCLK120;

wire [31:0] wJTAG_ADDRESS, wJTAG_READ_DATA, wJTAG_WRITE_DATA, wDPRAM_READ_DATA;
wire        wJTAG_READ, wJTAG_WRITE, wJTAG_WAIT_REQUEST, wJTAG_READ_DATAVALID;
wire [4:0]  wJTAG_BURST_COUNT;
wire        wDPRAM_CS;

wire [7:0]  wDVI_RED,wDVI_GRN,wDVI_BLU;
wire        wDVI_HS, wDVI_VS, wDVI_DE;

wire        wVID_CLK, wVID_CLKx5;
wire        wMEM_CLK;

assign wVID_CLK   = wCLK24;
assign wVID_CLKx5 = wCLK120;
assign wCLK8      = iCLK;

wire [7:0] LEDs;

assign bMKR_D[0]	= LEDs[0];
assign bMKR_D[1]	= LEDs[1];
assign bMKR_D[2]	= LEDs[2];
assign bMKR_D[3]	= LEDs[3];
assign bMKR_D[4]	= LEDs[4];
assign bMKR_D[5]	= LEDs[5];
assign bMKR_D[13]	= LEDs[6];
assign bMKR_D[14]	= LEDs[7];


IntOsc8Mhz   osc
  ( 
  .clkout(wOSC_CLK),
  .oscena(1'b1));


SYSTEM_PLL PLL_inst(
  .areset(1'b0),
  .inclk0(wCLK8),
  .c0(wCLK24),
  .c1(wCLK120),
  .c2(wMEM_CLK),
   .c3(oSDRAM_CLK),
  .c4(wFLASH_CLK),
   
  .locked());

Counter cnt_ints (
	.wClk(wOSC_CLK),
	.wRst(1'b0),
	.rOutCount(LEDs)
);

  
reg [5:0] rRESETCNT;

always @(posedge wMEM_CLK)
begin
  if (!rRESETCNT[5])
  begin
  rRESETCNT<=rRESETCNT+1;
  end
end

endmodule