data/full_repos/permissive/143278/ivltests/size_cast3.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/size_cast3.v:15: Operator ADD expects 32 bits on the LHS, but LHS\'s SEL generates 4 bits.\n                                                                          : ... In instance test\n  result = size1\'(value1) + \'d0;\n                          ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/size_cast3.v:19: Operator ADD expects 32 bits on the LHS, but LHS\'s SEL generates 4 bits.\n                                                                          : ... In instance test\n  result = size1\'(value1) + \'sd0;\n                          ^\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/size_cast3.v:23: Operator ADD expects 32 bits on the LHS, but LHS\'s SEL generates 4 bits.\n                                                                          : ... In instance test\n  result = size1\'(value2) + \'d0;\n                          ^\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/size_cast3.v:27: Operator ADD expects 32 bits on the LHS, but LHS\'s SEL generates 4 bits.\n                                                                          : ... In instance test\n  result = size1\'(value2) + \'sd0;\n                          ^\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/size_cast3.v:31: Operator ADD expects 32 bits on the LHS, but LHS\'s VARREF \'value1\' generates 6 bits.\n                                                                          : ... In instance test\n  result = size2\'(value1) + \'d0;\n                          ^\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/size_cast3.v:35: Operator ADD expects 32 bits on the LHS, but LHS\'s VARREF \'value1\' generates 6 bits.\n                                                                          : ... In instance test\n  result = size2\'(value1) + \'sd0;\n                          ^\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/size_cast3.v:39: Operator ADD expects 32 bits on the LHS, but LHS\'s VARREF \'value2\' generates 6 bits.\n                                                                          : ... In instance test\n  result = size2\'(value2) + \'d0;\n                          ^\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/size_cast3.v:43: Operator ADD expects 32 bits on the LHS, but LHS\'s VARREF \'value2\' generates 6 bits.\n                                                                          : ... In instance test\n  result = size2\'(value2) + \'sd0;\n                          ^\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/size_cast3.v:47: Operator ADD expects 32 bits on the LHS, but LHS\'s EXTEND generates 8 bits.\n                                                                          : ... In instance test\n  result = size3\'(value1) + \'d0;\n                          ^\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/size_cast3.v:51: Operator ADD expects 32 bits on the LHS, but LHS\'s EXTEND generates 8 bits.\n                                                                          : ... In instance test\n  result = size3\'(value1) + \'sd0;\n                          ^\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/size_cast3.v:55: Operator ADD expects 32 bits on the LHS, but LHS\'s EXTENDS generates 8 bits.\n                                                                          : ... In instance test\n  result = size3\'(value2) + \'d0;\n                          ^\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/size_cast3.v:59: Operator ADD expects 32 bits on the LHS, but LHS\'s EXTENDS generates 8 bits.\n                                                                          : ... In instance test\n  result = size3\'(value2) + \'sd0;\n                          ^\n%Error: Exiting due to 12 warning(s)\n'
module test();

localparam size1 = 4;
localparam size2 = 6;
localparam size3 = 8;

localparam        [5:0] value1 = 6'h3f;
localparam signed [5:0] value2 = 6'h3f;

reg [31:0] result;

reg failed = 0;

initial begin
  result = size1'(value1) + 'd0;
  $display("%h", result);
  if (result !== 32'h0000000f) failed = 1;

  result = size1'(value1) + 'sd0;
  $display("%h", result);
  if (result !== 32'h0000000f) failed = 1;

  result = size1'(value2) + 'd0;
  $display("%h", result);
  if (result !== 32'h0000000f) failed = 1;

  result = size1'(value2) + 'sd0;
  $display("%h", result);
  if (result !== 32'hffffffff) failed = 1;

  result = size2'(value1) + 'd0;
  $display("%h", result);
  if (result !== 32'h0000003f) failed = 1;

  result = size2'(value1) + 'sd0;
  $display("%h", result);
  if (result !== 32'h0000003f) failed = 1;

  result = size2'(value2) + 'd0;
  $display("%h", result);
  if (result !== 32'h0000003f) failed = 1;

  result = size2'(value2) + 'sd0;
  $display("%h", result);
  if (result !== 32'hffffffff) failed = 1;

  result = size3'(value1) + 'd0;
  $display("%h", result);
  if (result !== 32'h0000003f) failed = 1;

  result = size3'(value1) + 'sd0;
  $display("%h", result);
  if (result !== 32'h0000003f) failed = 1;

  result = size3'(value2) + 'd0;
  $display("%h", result);
  if (result !== 32'h000000ff) failed = 1;

  result = size3'(value2) + 'sd0;
  $display("%h", result);
  if (result !== 32'hffffffff) failed = 1;

  if (failed)
    $display("FAILED");
  else
    $display("PASSED");
end

endmodule
module test();


localparam size1 = 4;
localparam size2 = 6;
localparam size3 = 8;

localparam        [5:0] value1 = 6'h3f;
localparam signed [5:0] value2 = 6'h3f;

reg [31:0] result;

reg failed = 0;

initial begin
  result = size1'(value1) + 'd0;
  $display("%h", result);
  if (result !== 32'h0000000f) failed = 1;

  result = size1'(value1) + 'sd0;
  $display("%h", result);
  if (result !== 32'h0000000f) failed = 1;

  result = size1'(value2) + 'd0;
  $display("%h", result);
  if (result !== 32'h0000000f) failed = 1;

  result = size1'(value2) + 'sd0;
  $display("%h", result);
  if (result !== 32'hffffffff) failed = 1;

  result = size2'(value1) + 'd0;
  $display("%h", result);
  if (result !== 32'h0000003f) failed = 1;

  result = size2'(value1) + 'sd0;
  $display("%h", result);
  if (result !== 32'h0000003f) failed = 1;

  result = size2'(value2) + 'd0;
  $display("%h", result);
  if (result !== 32'h0000003f) failed = 1;

  result = size2'(value2) + 'sd0;
  $display("%h", result);
  if (result !== 32'hffffffff) failed = 1;

  result = size3'(value1) + 'd0;
  $display("%h", result);
  if (result !== 32'h0000003f) failed = 1;

  result = size3'(value1) + 'sd0;
  $display("%h", result);
  if (result !== 32'h0000003f) failed = 1;

  result = size3'(value2) + 'd0;
  $display("%h", result);
  if (result !== 32'h000000ff) failed = 1;

  result = size3'(value2) + 'sd0;
  $display("%h", result);
  if (result !== 32'hffffffff) failed = 1;

  if (failed)
    $display("FAILED");
  else
    $display("PASSED");
end

endmodule