data/full_repos/permissive/169382915/rtl/integration/scarv_integ_prv_pcpi2cop.v
data/verilator_xmls/e5817675-3416-4bc4-832a-4f63621e3f5b.xml
module scarv_integ_prv_pcpi2cop (


input         pcpi_valid    ,
input  [31:0] pcpi_insn     ,
input  [31:0] pcpi_rs1      ,
input  [31:0] pcpi_rs2      ,
output        pcpi_wr       ,
output [31:0] pcpi_rd       ,
output        pcpi_wait     ,
output        pcpi_ready    ,


output        cpu_insn_req  ,
input         cop_insn_ack  ,
output [31:0] cpu_insn_enc  ,
output [31:0] cpu_rs1       ,
output [31:0] cpu_rs2       ,

input         cop_wen       ,
input  [ 4:0] cop_waddr     ,
input  [31:0] cop_wdata     ,
input  [ 2:0] cop_result    ,
input         cop_insn_rsp  ,
output        cpu_insn_ack

);









assign cpu_insn_req  = pcpi_valid;
assign cpu_insn_enc  = pcpi_insn;
assign cpu_rs1       = pcpi_rs1;
assign cpu_rs2       = pcpi_rs2;




assign cpu_insn_ack  = 1'b1;









assign pcpi_wr       =  cop_wen;
assign pcpi_rd       =  cop_wdata;
assign pcpi_wait     = !cop_insn_rsp && pcpi_valid;
assign pcpi_ready    =  cop_insn_rsp && cop_result != 3'b010;

endmodule
module scarv_integ_prv_pcpi2cop (


input         pcpi_valid    ,
input  [31:0] pcpi_insn     ,
input  [31:0] pcpi_rs1      ,
input  [31:0] pcpi_rs2      ,
output        pcpi_wr       ,
output [31:0] pcpi_rd       ,
output        pcpi_wait     ,
output        pcpi_ready    ,


output        cpu_insn_req  ,
input         cop_insn_ack  ,
output [31:0] cpu_insn_enc  ,
output [31:0] cpu_rs1       ,
output [31:0] cpu_rs2       ,

input         cop_wen       ,
input  [ 4:0] cop_waddr     ,
input  [31:0] cop_wdata     ,
input  [ 2:0] cop_result    ,
input         cop_insn_rsp  ,
output        cpu_insn_ack

);










assign cpu_insn_req  = pcpi_valid;
assign cpu_insn_enc  = pcpi_insn;
assign cpu_rs1       = pcpi_rs1;
assign cpu_rs2       = pcpi_rs2;




assign cpu_insn_ack  = 1'b1;









assign pcpi_wr       =  cop_wen;
assign pcpi_rd       =  cop_wdata;
assign pcpi_wait     = !cop_insn_rsp && pcpi_valid;
assign pcpi_ready    =  cop_insn_rsp && cop_result != 3'b010;

endmodule