data/full_repos/permissive/127585421/hardware/rtl/anton_neopixel_apb.v
1: b'%Error: data/full_repos/permissive/127585421/hardware/rtl/anton_neopixel_apb.v:1: Cannot find include file: anton_common.v\n`include "anton_common.v" \n         ^~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/127585421/hardware/rtl,data/full_repos/permissive/127585421/anton_common.v\n             data/full_repos/permissive/127585421/hardware/rtl,data/full_repos/permissive/127585421/anton_common.v.v\n             data/full_repos/permissive/127585421/hardware/rtl,data/full_repos/permissive/127585421/anton_common.v.sv\n             anton_common.v\n             anton_common.v.v\n             anton_common.v.sv\n             obj_dir/anton_common.v\n             obj_dir/anton_common.v.v\n             obj_dir/anton_common.v.sv\n%Error: data/full_repos/permissive/127585421/hardware/rtl/anton_neopixel_apb.v:22: Define or directive not defined: \'`CLOG2\'\n  localparam PIXELS_BITS = `CLOG2(PIXELS_MAX);    \n                           ^~~~~~\n%Error: Exiting due to 2 error(s)\n'
module anton_neopixel_apb (
  input clk10mhz,
  output neoData,
  output neoState,

  input apbPenable,
  input [PIXELS_BITS+2-1:0]apbPaddr,
  input [7:0]apbPwData,
  input apbPclk,
  input apbPselx,
  input apbPresern,
  input apbPwrite,

  output [7:0]apbPrData,
  output apbPready,
  output apbPslverr
  );

  parameter  PIXELS_MAX  = 66;
  localparam PIXELS_BITS = `CLOG2(PIXELS_MAX);

  wire wr_enable;
  wire rd_enable;
  wire [PIXELS_BITS-1:0]address;

  assign apbPready  = 1'd1;
  assign apbPslverr = 1'd0;
  
  assign wr_enable = (apbPenable && apbPwrite && apbPselx);
  assign rd_enable = (!apbPwrite && apbPselx);
  assign address   = apbPaddr[PIXELS_BITS+2-1:2];

  anton_neopixel_raw #(
    .PIXELS_MAX(PIXELS_MAX)
  ) neopixel(
    .clk10mhz(clk10mhz),
    .neoData(neoData),
    .neoState(neoState),
    .busAddr(address),
    .busDataIn(apbPwData),
    .busClk(apbPclk),
    .busWrite(wr_enable),
    .busRead(rd_enable),
    .busDataOut(apbPrData)
  );

endmodule
module anton_neopixel_apb (
  input clk10mhz,
  output neoData,
  output neoState,

  input apbPenable,
  input [PIXELS_BITS+2-1:0]apbPaddr,
  input [7:0]apbPwData,
  input apbPclk,
  input apbPselx,
  input apbPresern,
  input apbPwrite,

  output [7:0]apbPrData,
  output apbPready,
  output apbPslverr
  );


  parameter  PIXELS_MAX  = 66;
  localparam PIXELS_BITS = `CLOG2(PIXELS_MAX);

  wire wr_enable;
  wire rd_enable;
  wire [PIXELS_BITS-1:0]address;

  assign apbPready  = 1'd1;
  assign apbPslverr = 1'd0;
  
  assign wr_enable = (apbPenable && apbPwrite && apbPselx);
  assign rd_enable = (!apbPwrite && apbPselx);
  assign address   = apbPaddr[PIXELS_BITS+2-1:2];

  anton_neopixel_raw #(
    .PIXELS_MAX(PIXELS_MAX)
  ) neopixel(
    .clk10mhz(clk10mhz),
    .neoData(neoData),
    .neoState(neoState),
    .busAddr(address),
    .busDataIn(apbPwData),
    .busClk(apbPclk),
    .busWrite(wr_enable),
    .busRead(rd_enable),
    .busDataOut(apbPrData)
  );

endmodule