data/full_repos/permissive/196705942/src/adder8in16out.v
data/verilator_xmls/2afaaf88-cac3-48db-b831-c51b5f77e54d.xml
module ADDER8IN16OUT(input [7:0]X, input [7:0]Y, input [7:0]Z, output[15:0]W);
  wire [15:0]XM = { 8'b0,X };
  wire [15:0]YM = { 4'b0,Y,4'b0};
  wire [15:0]ZM = { Z,8'b0};
  assign W = XM + YM + ZM;
endmodule
module ADDER8IN16OUT(input [7:0]X, input [7:0]Y, input [7:0]Z, output[15:0]W);

  wire [15:0]XM = { 8'b0,X };
  wire [15:0]YM = { 4'b0,Y,4'b0};
  wire [15:0]ZM = { Z,8'b0};
  assign W = XM + YM + ZM;
endmodule