data/full_repos/permissive/174263347/scanconv/designer/scanconv.v
1: b"%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:328: Cannot find file containing module: 'DFC1B'\n    DFC1B riseZ0Z_1 (.D(rise[0]), .CLK(clk_c), .CLR(nReset_c), .Q(\n    ^~~~~\n        ... Looked in:\n             data/full_repos/permissive/174263347/scanconv/designer,data/full_repos/permissive/174263347/DFC1B\n             data/full_repos/permissive/174263347/scanconv/designer,data/full_repos/permissive/174263347/DFC1B.v\n             data/full_repos/permissive/174263347/scanconv/designer,data/full_repos/permissive/174263347/DFC1B.sv\n             DFC1B\n             DFC1B.v\n             DFC1B.sv\n             obj_dir/DFC1B\n             obj_dir/DFC1B.v\n             obj_dir/DFC1B.sv\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:330: Cannot find file containing module: 'DFC1B'\n    DFC1B riseZ0Z_0 (.D(vsync_c), .CLK(clk_c), .CLR(nReset_c), .Q(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:313: Cannot find file containing module: 'OR2A'\n    OR2A out_0 (.A(riseZ0Z_1), .B(riseZ0Z_0), .Y(hsync_0));\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:314: Cannot find file containing module: 'DFC1B'\n    DFC1B rise_1 (.D(riseZ0Z_0), .CLK(clk_c), .CLR(nReset_c), .Q(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:316: Cannot find file containing module: 'DFC1B'\n    DFC1B rise_0 (.D(hsync_c), .CLK(clk_c), .CLR(nReset_c), .Q(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:318: Cannot find file containing module: 'OR2A'\n    OR2A out (.A(riseZ0Z_1), .B(riseZ0Z_0), .Y(hsync));\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:367: Cannot find file containing module: 'DFE3C'\n    DFE3C v_5 (.D(y_33), .CLK(clk_c), .CLR(y_45), .E(y_39), .Q(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:369: Cannot find file containing module: 'DFE3C'\n    DFE3C nline_2 (.D(y_47), .CLK(clk_c), .CLR(nReset_c), .E(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:371: Cannot find file containing module: 'DFE1B'\n    DFE1B h_2 (.D(y_35), .CLK(clk_c), .E(y_42), .Q(aVga[2]));\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:374: Cannot find file containing module: 'CM8INV'\n    CM8INV G_308_cm8i (.A(aVga[11]), .Y(G_308_cm8iZ0));\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:375: Cannot find file containing module: 'CM8'\n    CM8 G_16_i_0 (.D0(GNDZ0), .D1(VCCZ0), .D2(GNDZ0), .D3(N_372_1), \n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:378: Cannot find file containing module: 'CM8'\n    CM8 pixel_n3_0_xor2 (.D0(GNDZ0), .D1(pixelZ0Z_0), .D2(VCCZ0), .D3(\n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:381: Cannot find file containing module: 'DFC1B'\n    DFC1B pixel_3 (.D(pixel_n3), .CLK(clk_c), .CLR(hsync), .Q(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:383: Cannot find file containing module: 'CM8INV'\n    CM8INV v_n5_0_xor2_i_cm8i (.A(aVga[11]), .Y(v_n5_0_xor2_i_cm8iZ0));\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:384: Cannot find file containing module: 'DFE4F'\n    DFE4F hdelay_2 (.D(N_377), .CLK(clk_c), .PRE(nReset_c), .E(y_38), \n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:386: Cannot find file containing module: 'AND2'\n    AND2 un1_hsync_3_i_0_and2_209 (.A(aVga[13]), .B(aVga[10]), .Y(y_5));\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:387: Cannot find file containing module: 'CM8'\n    CM8 h_l5_i_0 (.D0(hsync), .D1(GNDZ0), .D2(GNDZ0), .D3(hsync), .S00(\n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:390: Cannot find file containing module: 'CM8'\n    CM8 G_55_i_and2_0_and2 (.D0(VCCZ0), .D1(N_221_n), .D2(VCCZ0), .D3(\n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:393: Cannot find file containing module: 'CM8INV'\n    CM8INV un1_un1_un1_hsync_1_i_0_0_cm8i (.A(vdelayZ0Z_3), .Y(\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:395: Cannot find file containing module: 'DFC1B'\n    DFC1B pixel8 (.D(pixel8_3), .CLK(clk_c), .CLR(hsync), .Q(pixelZ0Z8)\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:397: Cannot find file containing module: 'CM8INV'\n    CM8INV pixel_n2_0_xor2_cm8i (.A(pixelZ0Z_1), .Y(\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:399: Cannot find file containing module: 'XNOR2'\n    XNOR2 G_200_0 (.A(y_51), .B(aVga[11]), .Y(y_36));\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:400: Cannot find file containing module: 'AND3'\n    AND3 wrVga_0_and2_0_and2 (.A(pixelZ0Z8), .B(lineZ0), .C(frameZ0), \n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:402: Cannot find file containing module: 'CM8INV'\n    CM8INV v_n2_0_xor2_i_cm8i (.A(aVga[8]), .Y(v_n2_0_xor2_i_cm8iZ0));\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:403: Cannot find file containing module: 'DFE1B'\n    DFE1B h_6 (.D(N_165), .CLK(clk_c), .E(y_42), .Q(aVga[6]));\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:404: Cannot find file containing module: 'CM8'\n    CM8 G_10_i_0 (.D0(N_114_0), .D1(un1_hsync_2_i), .D2(un1_hsync_2_i), \n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:407: Cannot find file containing module: 'CM8'\n    CM8 vdelay_l1_0_and2_0_and2 (.D0(N_114_0), .D1(GNDZ0), .D2(GNDZ0), \n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:410: Cannot find file containing module: 'OR2A'\n    OR2A G_95_0 (.A(rise_1), .B(rise_0), .Y(N_114_0));\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:411: Cannot find file containing module: 'OR2A'\n    OR2A G_95 (.A(rise_1), .B(rise_0), .Y(y_45));\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:412: Cannot find file containing module: 'OR2B'\n    OR2B G_55_i_and2_0_and2_192_n (.A(aVga[12]), .B(aVga[13]), .Y(\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:414: Cannot find file containing module: 'XOR2'\n    XOR2 G_114 (.A(pixelZ0Z_0), .B(pixelZ0Z_1), .Y(y_44));\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:417: Cannot find file containing module: 'DFE3C'\n    DFE3C v_3 (.D(y_30), .CLK(clk_c), .CLR(y_45), .E(y_39), .Q(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:419: Cannot find file containing module: 'AND2'\n    AND2 line_8_0_and2_i (.A(hsync_0), .B(nlineZ0Z_0), .Y(y_31));\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:420: Cannot find file containing module: 'CM8INV'\n    CM8INV hdelay_l2_i_and2_0_and2_cm8i (.A(hsync_0), .Y(\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:422: Cannot find file containing module: 'OR2B'\n    OR2B vdelay_l0_i_and2_0_and2 (.A(vdelayZ0Z_0), .B(N_114_0), .Y(\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:424: Cannot find file containing module: 'CM8INV'\n    CM8INV nline_9_i_0_cm8i_1 (.A(nlineZ0Z_1), .Y(\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:426: Cannot find file containing module: 'CM8INV'\n    CM8INV h_l5_i_0_cm8i (.A(aVga[4]), .Y(h_l5_i_0_cm8iZ0));\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:427: Cannot find file containing module: 'CM8INV'\n    CM8INV G_310_cm8i (.A(y_51), .Y(G_310_cm8iZ0));\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:428: Cannot find file containing module: 'DFE3C'\n    DFE3C v_1 (.D(y_37), .CLK(clk_c), .CLR(y_45), .E(y_39), .Q(aVga[8])\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:430: Cannot find file containing module: 'VCC'\n    VCC VCC (.Y(VCCZ0));\n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:431: Cannot find file containing module: 'CM8'\n    CM8 h_l4_0_and3_0_and2 (.D0(hsync_0), .D1(GNDZ0), .D2(GNDZ0), .D3(\n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:434: Cannot find file containing module: 'CM8'\n    CM8 v_n5_0_xor2_i (.D0(VCCZ0), .D1(GNDZ0), .D2(GNDZ0), .D3(VCCZ0), \n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:437: Cannot find file containing module: 'CM8'\n    CM8 hdelay_l2_i_and2_0_and2 (.D0(VCCZ0), .D1(\n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:441: Cannot find file containing module: 'DFE4F'\n    DFE4F nline_0 (.D(y_27), .CLK(clk_c), .PRE(nReset_c), .E(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:443: Cannot find file containing module: 'DFE1B'\n    DFE1B h_3 (.D(h_l3), .CLK(clk_c), .E(y_42), .Q(aVga[3]));\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:444: Cannot find file containing module: 'DFE3C'\n    DFE3C v_6 (.D(y_34), .CLK(clk_c), .CLR(y_45), .E(y_39), .Q(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:446: Cannot find file containing module: 'DFE3C'\n    DFE3C v_2 (.D(y_32), .CLK(clk_c), .CLR(y_45), .E(y_39), .Q(aVga[9])\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:448: Cannot find file containing module: 'CM8'\n    CM8 pixel_n2_0_xor2 (.D0(VCCZ0), .D1(GNDZ0), .D2(GNDZ0), .D3(VCCZ0)\n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:451: Cannot find file containing module: 'CM8INV'\n    CM8INV nline_9_i_0_cm8i_2 (.A(nlineZ0Z_2), .Y(\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:453: Cannot find file containing module: 'AND3C'\n    AND3C G_16_i_0_and2_0_1 (.A(hdelayZ0Z_0), .B(hdelayZ0Z_1), .C(\n    ^~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n"
module memory(dMemOut, dVga, dCga, dMem_in, \state_1[1] , \state[1] , 
        wrVga_i, nOe_c, nCs_c, y_72, wrVga, nWe_c, dirout_i, halfclk_i, 
        halfclk, dirout, nReset_c, clk_c, access_i, dirout_0, access);
output  [7:0] dMemOut;
input  [7:0] dVga;
output  [7:0] dCga;
input  [7:0] dMem_in;
input  \state_1[1] ;
output  \state[1] ;
input  wrVga_i;
output  nOe_c, nCs_c;
input  y_72, wrVga;
output  nWe_c, dirout_i, halfclk_i, halfclk, dirout;
input  nReset_c, clk_c, access_i;
output  dirout_0;
input  access;

    wire y_73, wrRequestZ0, y_74, rdBuf6, VCCZ0, GNDZ0, 
        un1_t3_1_0_cm8iZ0;
    
    DFE1B dMemOutZ0Z_2 (.D(dVga[2]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[2]));
    DFE1B dMemOutZ0Z_1 (.D(dVga[1]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[1]));
    DF1 state_0 (.D(halfclk_i), .CLK(clk_c), .Q(halfclk));
    DFE1B dMemOutZ0Z_7 (.D(dVga[7]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[7]));
    DFE3C dCgaZ0Z_1 (.D(dMem_in[1]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[1]));
    DFE3C dCgaZ0Z_6 (.D(dMem_in[6]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[6]));
    DFE1B dMemOutZ0Z_6 (.D(dVga[6]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[6]));
    DFE1B dMemOutZ0Z_0 (.D(dVga[0]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[0]));
    DFE3C wrRequest (.D(wrVga), .CLK(clk_c), .CLR(nReset_c), .E(y_72), 
        .Q(wrRequestZ0));
    GND GND (.Y(GNDZ0));
    DFE1B dMemOutZ0Z_4 (.D(dVga[4]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[4]));
    DFE3C dCgaZ0Z_7 (.D(dMem_in[7]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[7]));
    OR2A rdBuf6_0_and2 (.A(access), .B(dirout_0), .Y(rdBuf6));
    DFE3C dCgaZ0Z_4 (.D(dMem_in[4]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[4]));
    DF1 stateZ0Z_1 (.D(\state_1[1] ), .CLK(clk_c), .Q(\state[1] ));
    DFE3C diroutZ0 (.D(wrRequestZ0), .CLK(clk_c), .CLR(nReset_c), .E(
        access_i), .Q(dirout));
    CM8 dirout_iZ0 (.D0(VCCZ0), .D1(GNDZ0), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(dirout), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(
        dirout_i));
    CM8 un1_t3_1_0 (.D0(un1_t3_1_0_cm8iZ0), .D1(VCCZ0), .D2(VCCZ0), 
        .D3(GNDZ0), .S00(halfclk), .S01(VCCZ0), .S10(\state[1] ), .S11(
        GNDZ0), .Y(y_73));
    CM8 un1_t3_0 (.D0(dirout), .D1(VCCZ0), .D2(VCCZ0), .D3(GNDZ0), 
        .S00(halfclk), .S01(VCCZ0), .S10(\state[1] ), .S11(GNDZ0), .Y(
        y_74));
    DFE3C dCgaZ0Z_3 (.D(dMem_in[3]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[3]));
    DFE4F nWeMem (.D(halfclk), .CLK(clk_c), .PRE(nReset_c), .E(y_73), 
        .Q(nWe_c));
    DFE1B dMemOutZ0Z_5 (.D(dVga[5]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[5]));
    DFE4F nCsMem (.D(halfclk), .CLK(clk_c), .PRE(nReset_c), .E(
        \state_1[1] ), .Q(nCs_c));
    DFE3C dCgaZ0Z_2 (.D(dMem_in[2]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[2]));
    VCC VCC (.Y(VCCZ0));
    CM8 halfclk_iZ0 (.D0(VCCZ0), .D1(GNDZ0), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(halfclk), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(
        halfclk_i));
    DFE3C dCgaZ0Z_0 (.D(dMem_in[0]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[0]));
    DFE3C diroutZ0Z_0 (.D(wrRequestZ0), .CLK(clk_c), .CLR(nReset_c), 
        .E(access_i), .Q(dirout_0));
    CM8INV un1_t3_1_0_cm8i (.A(dirout), .Y(un1_t3_1_0_cm8iZ0));
    DFE3C dCgaZ0Z_5 (.D(dMem_in[5]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[5]));
    DFE1B dMemOutZ0Z_3 (.D(dVga[3]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[3]));
    DFE4F nOeMem (.D(halfclk), .CLK(clk_c), .PRE(nReset_c), .E(y_74), 
        .Q(nOe_c));
    
endmodule
module memory(dMemOut, dVga, dCga, dMem_in, \state_1[1] , \state[1] , 
        wrVga_i, nOe_c, nCs_c, y_72, wrVga, nWe_c, dirout_i, halfclk_i, 
        halfclk, dirout, nReset_c, clk_c, access_i, dirout_0, access);

output  [7:0] dMemOut;
input  [7:0] dVga;
output  [7:0] dCga;
input  [7:0] dMem_in;
input  \state_1[1] ;
output  \state[1] ;
input  wrVga_i;
output  nOe_c, nCs_c;
input  y_72, wrVga;
output  nWe_c, dirout_i, halfclk_i, halfclk, dirout;
input  nReset_c, clk_c, access_i;
output  dirout_0;
input  access;

    wire y_73, wrRequestZ0, y_74, rdBuf6, VCCZ0, GNDZ0, 
        un1_t3_1_0_cm8iZ0;
    
    DFE1B dMemOutZ0Z_2 (.D(dVga[2]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[2]));
    DFE1B dMemOutZ0Z_1 (.D(dVga[1]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[1]));
    DF1 state_0 (.D(halfclk_i), .CLK(clk_c), .Q(halfclk));
    DFE1B dMemOutZ0Z_7 (.D(dVga[7]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[7]));
    DFE3C dCgaZ0Z_1 (.D(dMem_in[1]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[1]));
    DFE3C dCgaZ0Z_6 (.D(dMem_in[6]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[6]));
    DFE1B dMemOutZ0Z_6 (.D(dVga[6]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[6]));
    DFE1B dMemOutZ0Z_0 (.D(dVga[0]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[0]));
    DFE3C wrRequest (.D(wrVga), .CLK(clk_c), .CLR(nReset_c), .E(y_72), 
        .Q(wrRequestZ0));
    GND GND (.Y(GNDZ0));
    DFE1B dMemOutZ0Z_4 (.D(dVga[4]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[4]));
    DFE3C dCgaZ0Z_7 (.D(dMem_in[7]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[7]));
    OR2A rdBuf6_0_and2 (.A(access), .B(dirout_0), .Y(rdBuf6));
    DFE3C dCgaZ0Z_4 (.D(dMem_in[4]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[4]));
    DF1 stateZ0Z_1 (.D(\state_1[1] ), .CLK(clk_c), .Q(\state[1] ));
    DFE3C diroutZ0 (.D(wrRequestZ0), .CLK(clk_c), .CLR(nReset_c), .E(
        access_i), .Q(dirout));
    CM8 dirout_iZ0 (.D0(VCCZ0), .D1(GNDZ0), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(dirout), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(
        dirout_i));
    CM8 un1_t3_1_0 (.D0(un1_t3_1_0_cm8iZ0), .D1(VCCZ0), .D2(VCCZ0), 
        .D3(GNDZ0), .S00(halfclk), .S01(VCCZ0), .S10(\state[1] ), .S11(
        GNDZ0), .Y(y_73));
    CM8 un1_t3_0 (.D0(dirout), .D1(VCCZ0), .D2(VCCZ0), .D3(GNDZ0), 
        .S00(halfclk), .S01(VCCZ0), .S10(\state[1] ), .S11(GNDZ0), .Y(
        y_74));
    DFE3C dCgaZ0Z_3 (.D(dMem_in[3]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[3]));
    DFE4F nWeMem (.D(halfclk), .CLK(clk_c), .PRE(nReset_c), .E(y_73), 
        .Q(nWe_c));
    DFE1B dMemOutZ0Z_5 (.D(dVga[5]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[5]));
    DFE4F nCsMem (.D(halfclk), .CLK(clk_c), .PRE(nReset_c), .E(
        \state_1[1] ), .Q(nCs_c));
    DFE3C dCgaZ0Z_2 (.D(dMem_in[2]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[2]));
    VCC VCC (.Y(VCCZ0));
    CM8 halfclk_iZ0 (.D0(VCCZ0), .D1(GNDZ0), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(halfclk), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(
        halfclk_i));
    DFE3C dCgaZ0Z_0 (.D(dMem_in[0]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[0]));
    DFE3C diroutZ0Z_0 (.D(wrRequestZ0), .CLK(clk_c), .CLR(nReset_c), 
        .E(access_i), .Q(dirout_0));
    CM8INV un1_t3_1_0_cm8i (.A(dirout), .Y(un1_t3_1_0_cm8iZ0));
    DFE3C dCgaZ0Z_5 (.D(dMem_in[5]), .CLK(clk_c), .CLR(nReset_c), .E(
        rdBuf6), .Q(dCga[5]));
    DFE1B dMemOutZ0Z_3 (.D(dVga[3]), .CLK(clk_c), .E(wrVga_i), .Q(
        dMemOut[3]));
    DFE4F nOeMem (.D(halfclk), .CLK(clk_c), .PRE(nReset_c), .E(y_74), 
        .Q(nOe_c));
    
endmodule