data/full_repos/permissive/193753641/test_subbytes.v
1: b'%Error: data/full_repos/permissive/193753641/test_subbytes.v:34: Cannot find file containing module: \'subbytes\'\n subbytes uut (\n ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/193753641,data/full_repos/permissive/193753641/subbytes\n             data/full_repos/permissive/193753641,data/full_repos/permissive/193753641/subbytes.v\n             data/full_repos/permissive/193753641,data/full_repos/permissive/193753641/subbytes.sv\n             subbytes\n             subbytes.v\n             subbytes.sv\n             obj_dir/subbytes\n             obj_dir/subbytes.v\n             obj_dir/subbytes.sv\n%Warning-WIDTH: data/full_repos/permissive/193753641/test_subbytes.v:48: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s VARREF \'res\' generates 128 bits.\n                                                                       : ... In instance test_subbytes\n  i=res;\n   ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 error(s), 1 warning(s)\n'
module test_subbytes;


	reg [127:0] a;


	wire [127:0] res;


	subbytes uut (
		.a(a), 
		.res(res)
	);
	integer i;
	initial begin





        

		a=128'h19a09ae93df4c6f8e3e28d48be2b2a08;
		i=res;
		$display("%h",i);
	end
      
endmodule
module test_subbytes;



	reg [127:0] a;


	wire [127:0] res;


	subbytes uut (
		.a(a), 
		.res(res)
	);
	integer i;
	initial begin





        

		a=128'h19a09ae93df4c6f8e3e28d48be2b2a08;
		i=res;
		$display("%h",i);
	end
      
endmodule