data/full_repos/permissive/175958895/concat31_testbench.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/175958895/concat31_testbench.v:10: Unsupported: Ignoring delay on this delayed statement.\n #20;\n ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/175958895/concat31_testbench.v:12: Unsupported: Ignoring delay on this delayed statement.\n #20;\n ^\n%Error: data/full_repos/permissive/175958895/concat31_testbench.v:18: Unsupported or unknown PLI call: $monitor\n $monitor("time = %2d, res = %32b", $time, result);  \n ^~~~~~~~\n%Error: Exiting due to 1 error(s), 2 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module concat31_testbench(); 
    reg inp;
    wire [31:0] result;

	concat31 c(result, inp);

	initial begin
	inp = 1'b1;
	#`DELAY;
	inp = 1'b0;
	#`DELAY;
	end
	 
	 
	initial
	begin
	$monitor("time = %2d, res = %32b", $time, result);
	end
 
endmodule
module concat31_testbench();
 
    reg inp;
    wire [31:0] result;

	concat31 c(result, inp);

	initial begin
	inp = 1'b1;
	#`DELAY;
	inp = 1'b0;
	#`DELAY;
	end
	 
	 
	initial
	begin
	$monitor("time = %2d, res = %32b", $time, result);
	end
 
endmodule