data/full_repos/permissive/200893858/Adders/RecursiveDoublingAdder/recursiveDouble_tb.v
1: b'%Error: data/full_repos/permissive/200893858/Adders/RecursiveDoublingAdder/recursiveDouble_tb.v:1: Cannot find include file: recursiveDouble.v\n`include "recursiveDouble.v" \n         ^~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/200893858/Adders/RecursiveDoublingAdder,data/full_repos/permissive/200893858/recursiveDouble.v\n             data/full_repos/permissive/200893858/Adders/RecursiveDoublingAdder,data/full_repos/permissive/200893858/recursiveDouble.v.v\n             data/full_repos/permissive/200893858/Adders/RecursiveDoublingAdder,data/full_repos/permissive/200893858/recursiveDouble.v.sv\n             recursiveDouble.v\n             recursiveDouble.v.v\n             recursiveDouble.v.sv\n             obj_dir/recursiveDouble.v\n             obj_dir/recursiveDouble.v.v\n             obj_dir/recursiveDouble.v.sv\n%Warning-STMTDLY: data/full_repos/permissive/200893858/Adders/RecursiveDoublingAdder/recursiveDouble_tb.v:13: Unsupported: Ignoring delay on this delayed statement.\n   #5 A[15:0]=16\'d45000; B[15:0]=16\'d4; iniC = 1;\n   ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/200893858/Adders/RecursiveDoublingAdder/recursiveDouble_tb.v:14: Unsupported: Ignoring delay on this delayed statement.\n   #5 A[15:0]= 16\'d1; B[15:0]=16\'d999; iniC = 1;\n   ^\n%Error: data/full_repos/permissive/200893858/Adders/RecursiveDoublingAdder/recursiveDouble_tb.v:19: Unsupported or unknown PLI call: $monitor\n   $monitor($time, ": A=%d B=%d Cin=%d, Sum=%d Carry=%d", A,B,iniC,Sum,Carry);\n   ^~~~~~~~\n%Error: data/full_repos/permissive/200893858/Adders/RecursiveDoublingAdder/recursiveDouble_tb.v:20: Unsupported or unknown PLI call: $dumpfile\n   $dumpfile("cla.vcd");\n   ^~~~~~~~~\n%Error: data/full_repos/permissive/200893858/Adders/RecursiveDoublingAdder/recursiveDouble_tb.v:21: Unsupported or unknown PLI call: $dumpvars\n   $dumpvars;\n   ^~~~~~~~~\n%Error: Exiting due to 4 error(s), 2 warning(s)\n'
module top;
	reg [15:0] A,B;
	wire [15:0] Sum;
	wire Carry;
	reg iniC;

	CLA cr(A,B,Sum,iniC,Carry);
	initial
		begin
			A[15:0]=16'd10000; B[15:0]=16'd20000; iniC = 1;
			#5 A[15:0]=16'd45000; B[15:0]=16'd4; iniC = 1;
			#5 A[15:0]= 16'd1; B[15:0]=16'd999; iniC = 1;
		end

	initial
		begin
			$monitor($time, ": A=%d B=%d Cin=%d, Sum=%d Carry=%d", A,B,iniC,Sum,Carry);
			$dumpfile("cla.vcd");
			$dumpvars;
		end

endmodule
module top;

	reg [15:0] A,B;
	wire [15:0] Sum;
	wire Carry;
	reg iniC;

	CLA cr(A,B,Sum,iniC,Carry);
	initial
		begin
			A[15:0]=16'd10000; B[15:0]=16'd20000; iniC = 1;
			#5 A[15:0]=16'd45000; B[15:0]=16'd4; iniC = 1;
			#5 A[15:0]= 16'd1; B[15:0]=16'd999; iniC = 1;
		end

	initial
		begin
			$monitor($time, ": A=%d B=%d Cin=%d, Sum=%d Carry=%d", A,B,iniC,Sum,Carry);
			$dumpfile("cla.vcd");
			$dumpvars;
		end

endmodule