data/full_repos/permissive/160794640/example/genvarexample.v
 line:1: before: "NUM_SOURCES"
data/verilator_xmls/ab9d56d2-1683-49df-8fb1-d21debdaaeb6.xml
module test(input clk, input rst, input [31:0] counter, output tst);

   assign tst = ^counter;
   
endmodule
module test(input clk, input rst, input [31:0] counter, output tst);


   assign tst = ^counter;
   
endmodule