data/full_repos/permissive/159724743/Digital Osciloscope/timediv.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Error: Cannot find file containing module: Osciloscope,data/full_repos/permissive/159724743\n        ... Looked in:\n             data/full_repos/permissive/159724743/Digital/Osciloscope,data/full_repos/permissive/159724743\n             data/full_repos/permissive/159724743/Digital/Osciloscope,data/full_repos/permissive/159724743.v\n             data/full_repos/permissive/159724743/Digital/Osciloscope,data/full_repos/permissive/159724743.sv\n             Osciloscope,data/full_repos/permissive/159724743\n             Osciloscope,data/full_repos/permissive/159724743.v\n             Osciloscope,data/full_repos/permissive/159724743.sv\n             obj_dir/Osciloscope,data/full_repos/permissive/159724743\n             obj_dir/Osciloscope,data/full_repos/permissive/159724743.v\n             obj_dir/Osciloscope,data/full_repos/permissive/159724743.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/159724743/Digital\n%Error: Cannot find file containing module: Osciloscope/timediv.v\n%Error: Exiting due to 3 error(s)\n'
module timediv (input clk,input [1:0] sel, output clock);
reg [15:0] c;
always@(posedge clk) begin

	c=c+1;
	end
	assign 	clock= (sel==2'b00) ? c[6] :
						 (sel==2'b01) ? c[7] :
						 (sel==2'b10) ? c[8] : c[9];
endmodule
module timediv (input clk,input [1:0] sel, output clock);

reg [15:0] c;
always@(posedge clk) begin

	c=c+1;
	end
	assign 	clock= (sel==2'b00) ? c[6] :
						 (sel==2'b01) ? c[7] :
						 (sel==2'b10) ? c[8] : c[9];
endmodule