data/full_repos/permissive/181738725/wavetrace/verilog/lib/misc/util.vh
 line:20: before: "function"
data/verilator_xmls/29445f3b-8361-49e4-98f3-855415dc67de.xml
function automatic integer onehot2bin (input integer one_hot, input integer bits);
  integer i;
  begin
    onehot2bin = 0;
    for (i = 0; i < bits; i=i+1) begin
      if (one_hot[i]) begin

        onehot2bin = onehot2bin | i;
      end
    end
  end
endfunction
function automatic integer onehot2bin (input integer one_hot, input integer bits);

  integer i;
  begin
    onehot2bin = 0;
    for (i = 0; i < bits; i=i+1) begin
      if (one_hot[i]) begin

        onehot2bin = onehot2bin | i;
      end
    end
  end
endfunction