data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v
1: b'%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:35: Little bit endian vector: MSB < LSB of bit range: 0:9\ninput [0:9] chanx_left_in;\n      ^\n                    ... Use "/* verilator lint_off LITENDIAN */" and lint_on around source to disable this message.\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:37: Little bit endian vector: MSB < LSB of bit range: 0:9\ninput [0:9] chanx_right_in;\n      ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:41: Little bit endian vector: MSB < LSB of bit range: 0:9\noutput [0:9] chanx_left_out;\n       ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:43: Little bit endian vector: MSB < LSB of bit range: 0:9\noutput [0:9] chanx_right_out;\n       ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:77: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_tree_tapbuf_size2_0_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:78: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_tree_tapbuf_size2_0_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:80: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_0_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:81: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_0_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:82: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_1_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:83: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_1_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:84: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_2_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:85: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_2_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:86: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_3_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:87: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_3_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:88: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_4_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:89: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_4_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:90: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_5_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:91: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_5_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:92: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_6_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:93: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_6_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:94: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_7_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:95: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_7_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:96: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_8_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:97: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_8_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:98: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_9_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:99: Little bit endian vector: MSB < LSB of bit range: 0:2\nwire [0:2] mux_tree_tapbuf_size4_9_sram_inv;\n     ^\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:195: Cannot find file containing module: \'mux_tree_tapbuf_size4\'\n mux_tree_tapbuf_size4 mux_bottom_ipin_0 (\n ^~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing,data/full_repos/permissive/137416811/mux_tree_tapbuf_size4\n             data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing,data/full_repos/permissive/137416811/mux_tree_tapbuf_size4.v\n             data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing,data/full_repos/permissive/137416811/mux_tree_tapbuf_size4.sv\n             mux_tree_tapbuf_size4\n             mux_tree_tapbuf_size4.v\n             mux_tree_tapbuf_size4.sv\n             obj_dir/mux_tree_tapbuf_size4\n             obj_dir/mux_tree_tapbuf_size4.v\n             obj_dir/mux_tree_tapbuf_size4.sv\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:201: Cannot find file containing module: \'mux_tree_tapbuf_size4\'\n mux_tree_tapbuf_size4 mux_bottom_ipin_2 (\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:207: Cannot find file containing module: \'mux_tree_tapbuf_size4\'\n mux_tree_tapbuf_size4 mux_top_ipin_0 (\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:213: Cannot find file containing module: \'mux_tree_tapbuf_size4\'\n mux_tree_tapbuf_size4 mux_top_ipin_1 (\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:219: Cannot find file containing module: \'mux_tree_tapbuf_size4\'\n mux_tree_tapbuf_size4 mux_top_ipin_2 (\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:225: Cannot find file containing module: \'mux_tree_tapbuf_size4\'\n mux_tree_tapbuf_size4 mux_top_ipin_3 (\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:231: Cannot find file containing module: \'mux_tree_tapbuf_size4\'\n mux_tree_tapbuf_size4 mux_top_ipin_4 (\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:237: Cannot find file containing module: \'mux_tree_tapbuf_size4\'\n mux_tree_tapbuf_size4 mux_top_ipin_5 (\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:243: Cannot find file containing module: \'mux_tree_tapbuf_size4\'\n mux_tree_tapbuf_size4 mux_top_ipin_6 (\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:249: Cannot find file containing module: \'mux_tree_tapbuf_size4\'\n mux_tree_tapbuf_size4 mux_top_ipin_7 (\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:255: Cannot find file containing module: \'mux_tree_tapbuf_size4_mem\'\n mux_tree_tapbuf_size4_mem mem_bottom_ipin_0 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:262: Cannot find file containing module: \'mux_tree_tapbuf_size4_mem\'\n mux_tree_tapbuf_size4_mem mem_bottom_ipin_2 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:269: Cannot find file containing module: \'mux_tree_tapbuf_size4_mem\'\n mux_tree_tapbuf_size4_mem mem_top_ipin_0 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:276: Cannot find file containing module: \'mux_tree_tapbuf_size4_mem\'\n mux_tree_tapbuf_size4_mem mem_top_ipin_1 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:283: Cannot find file containing module: \'mux_tree_tapbuf_size4_mem\'\n mux_tree_tapbuf_size4_mem mem_top_ipin_2 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:290: Cannot find file containing module: \'mux_tree_tapbuf_size4_mem\'\n mux_tree_tapbuf_size4_mem mem_top_ipin_3 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:297: Cannot find file containing module: \'mux_tree_tapbuf_size4_mem\'\n mux_tree_tapbuf_size4_mem mem_top_ipin_4 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:304: Cannot find file containing module: \'mux_tree_tapbuf_size4_mem\'\n mux_tree_tapbuf_size4_mem mem_top_ipin_5 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:311: Cannot find file containing module: \'mux_tree_tapbuf_size4_mem\'\n mux_tree_tapbuf_size4_mem mem_top_ipin_6 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:318: Cannot find file containing module: \'mux_tree_tapbuf_size4_mem\'\n mux_tree_tapbuf_size4_mem mem_top_ipin_7 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:325: Cannot find file containing module: \'mux_tree_tapbuf_size2\'\n mux_tree_tapbuf_size2 mux_bottom_ipin_1 (\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/routing/cbx_1__0_.v:331: Cannot find file containing module: \'mux_tree_tapbuf_size2_mem\'\n mux_tree_tapbuf_size2_mem mem_bottom_ipin_1 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 22 error(s), 26 warning(s)\n'
module cbx_1__0_(prog_clk,
                 chanx_left_in,
                 chanx_right_in,
                 ccff_head,
                 chanx_left_out,
                 chanx_right_out,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_2_,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_6_,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_clk_0_,
                 bottom_grid_top_width_0_height_0_subtile_0__pin_outpad_0_,
                 bottom_grid_top_width_0_height_0_subtile_1__pin_outpad_0_,
                 bottom_grid_top_width_0_height_0_subtile_2__pin_outpad_0_,
                 bottom_grid_top_width_0_height_0_subtile_3__pin_outpad_0_,
                 bottom_grid_top_width_0_height_0_subtile_4__pin_outpad_0_,
                 bottom_grid_top_width_0_height_0_subtile_5__pin_outpad_0_,
                 bottom_grid_top_width_0_height_0_subtile_6__pin_outpad_0_,
                 bottom_grid_top_width_0_height_0_subtile_7__pin_outpad_0_,
                 ccff_tail);

input [0:0] prog_clk;

input [0:9] chanx_left_in;

input [0:9] chanx_right_in;

input [0:0] ccff_head;

output [0:9] chanx_left_out;

output [0:9] chanx_right_out;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_2_;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_6_;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_clk_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_0__pin_outpad_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_1__pin_outpad_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_2__pin_outpad_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_3__pin_outpad_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_4__pin_outpad_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_5__pin_outpad_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_6__pin_outpad_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_7__pin_outpad_0_;

output [0:0] ccff_tail;









wire [0:1] mux_tree_tapbuf_size2_0_sram;
wire [0:1] mux_tree_tapbuf_size2_0_sram_inv;
wire [0:0] mux_tree_tapbuf_size2_mem_0_ccff_tail;
wire [0:2] mux_tree_tapbuf_size4_0_sram;
wire [0:2] mux_tree_tapbuf_size4_0_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_1_sram;
wire [0:2] mux_tree_tapbuf_size4_1_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_2_sram;
wire [0:2] mux_tree_tapbuf_size4_2_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_3_sram;
wire [0:2] mux_tree_tapbuf_size4_3_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_4_sram;
wire [0:2] mux_tree_tapbuf_size4_4_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_5_sram;
wire [0:2] mux_tree_tapbuf_size4_5_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_6_sram;
wire [0:2] mux_tree_tapbuf_size4_6_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_7_sram;
wire [0:2] mux_tree_tapbuf_size4_7_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_8_sram;
wire [0:2] mux_tree_tapbuf_size4_8_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_9_sram;
wire [0:2] mux_tree_tapbuf_size4_9_sram_inv;
wire [0:0] mux_tree_tapbuf_size4_mem_0_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_1_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_2_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_3_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_4_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_5_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_6_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_7_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_8_ccff_tail;





	assign chanx_right_out[0] = chanx_left_in[0];



	assign chanx_right_out[1] = chanx_left_in[1];



	assign chanx_right_out[2] = chanx_left_in[2];



	assign chanx_right_out[3] = chanx_left_in[3];



	assign chanx_right_out[4] = chanx_left_in[4];



	assign chanx_right_out[5] = chanx_left_in[5];



	assign chanx_right_out[6] = chanx_left_in[6];



	assign chanx_right_out[7] = chanx_left_in[7];



	assign chanx_right_out[8] = chanx_left_in[8];



	assign chanx_right_out[9] = chanx_left_in[9];



	assign chanx_left_out[0] = chanx_right_in[0];



	assign chanx_left_out[1] = chanx_right_in[1];



	assign chanx_left_out[2] = chanx_right_in[2];



	assign chanx_left_out[3] = chanx_right_in[3];



	assign chanx_left_out[4] = chanx_right_in[4];



	assign chanx_left_out[5] = chanx_right_in[5];



	assign chanx_left_out[6] = chanx_right_in[6];



	assign chanx_left_out[7] = chanx_right_in[7];



	assign chanx_left_out[8] = chanx_right_in[8];



	assign chanx_left_out[9] = chanx_right_in[9];




	mux_tree_tapbuf_size4 mux_bottom_ipin_0 (
		.in({chanx_left_in[0], chanx_right_in[0], chanx_left_in[5], chanx_right_in[5]}),
		.sram(mux_tree_tapbuf_size4_0_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_0_sram_inv[0:2]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_2_));

	mux_tree_tapbuf_size4 mux_bottom_ipin_2 (
		.in({chanx_left_in[2], chanx_right_in[2], chanx_left_in[7], chanx_right_in[7]}),
		.sram(mux_tree_tapbuf_size4_1_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_1_sram_inv[0:2]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_clk_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_0 (
		.in({chanx_left_in[3], chanx_right_in[3], chanx_left_in[8], chanx_right_in[8]}),
		.sram(mux_tree_tapbuf_size4_2_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_2_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_0__pin_outpad_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_1 (
		.in({chanx_left_in[4], chanx_right_in[4], chanx_left_in[9], chanx_right_in[9]}),
		.sram(mux_tree_tapbuf_size4_3_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_3_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_1__pin_outpad_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_2 (
		.in({chanx_left_in[0], chanx_right_in[0], chanx_left_in[5], chanx_right_in[5]}),
		.sram(mux_tree_tapbuf_size4_4_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_4_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_2__pin_outpad_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_3 (
		.in({chanx_left_in[1], chanx_right_in[1], chanx_left_in[6], chanx_right_in[6]}),
		.sram(mux_tree_tapbuf_size4_5_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_5_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_3__pin_outpad_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_4 (
		.in({chanx_left_in[2], chanx_right_in[2], chanx_left_in[7], chanx_right_in[7]}),
		.sram(mux_tree_tapbuf_size4_6_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_6_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_4__pin_outpad_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_5 (
		.in({chanx_left_in[3], chanx_right_in[3], chanx_left_in[8], chanx_right_in[8]}),
		.sram(mux_tree_tapbuf_size4_7_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_7_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_5__pin_outpad_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_6 (
		.in({chanx_left_in[4], chanx_right_in[4], chanx_left_in[9], chanx_right_in[9]}),
		.sram(mux_tree_tapbuf_size4_8_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_8_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_6__pin_outpad_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_7 (
		.in({chanx_left_in[0], chanx_right_in[0], chanx_left_in[5], chanx_right_in[5]}),
		.sram(mux_tree_tapbuf_size4_9_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_9_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_7__pin_outpad_0_));

	mux_tree_tapbuf_size4_mem mem_bottom_ipin_0 (
		.prog_clk(prog_clk),
		.ccff_head(ccff_head),
		.ccff_tail(mux_tree_tapbuf_size4_mem_0_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_0_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_0_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_bottom_ipin_2 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size2_mem_0_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_1_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_1_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_1_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_0 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_1_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_2_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_2_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_2_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_1 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_2_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_3_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_3_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_3_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_2 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_3_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_4_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_4_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_4_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_3 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_4_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_5_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_5_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_5_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_4 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_5_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_6_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_6_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_6_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_5 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_6_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_7_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_7_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_7_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_6 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_7_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_8_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_8_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_8_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_7 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_8_ccff_tail),
		.ccff_tail(ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_9_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_9_sram_inv[0:2]));

	mux_tree_tapbuf_size2 mux_bottom_ipin_1 (
		.in({chanx_left_in[1], chanx_right_in[1]}),
		.sram(mux_tree_tapbuf_size2_0_sram[0:1]),
		.sram_inv(mux_tree_tapbuf_size2_0_sram_inv[0:1]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_6_));

	mux_tree_tapbuf_size2_mem mem_bottom_ipin_1 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_0_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size2_mem_0_ccff_tail),
		.mem_out(mux_tree_tapbuf_size2_0_sram[0:1]),
		.mem_outb(mux_tree_tapbuf_size2_0_sram_inv[0:1]));

endmodule
module cbx_1__0_(prog_clk,
                 chanx_left_in,
                 chanx_right_in,
                 ccff_head,
                 chanx_left_out,
                 chanx_right_out,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_2_,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_6_,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_clk_0_,
                 bottom_grid_top_width_0_height_0_subtile_0__pin_outpad_0_,
                 bottom_grid_top_width_0_height_0_subtile_1__pin_outpad_0_,
                 bottom_grid_top_width_0_height_0_subtile_2__pin_outpad_0_,
                 bottom_grid_top_width_0_height_0_subtile_3__pin_outpad_0_,
                 bottom_grid_top_width_0_height_0_subtile_4__pin_outpad_0_,
                 bottom_grid_top_width_0_height_0_subtile_5__pin_outpad_0_,
                 bottom_grid_top_width_0_height_0_subtile_6__pin_outpad_0_,
                 bottom_grid_top_width_0_height_0_subtile_7__pin_outpad_0_,
                 ccff_tail);


input [0:0] prog_clk;

input [0:9] chanx_left_in;

input [0:9] chanx_right_in;

input [0:0] ccff_head;

output [0:9] chanx_left_out;

output [0:9] chanx_right_out;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_2_;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_6_;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_clk_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_0__pin_outpad_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_1__pin_outpad_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_2__pin_outpad_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_3__pin_outpad_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_4__pin_outpad_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_5__pin_outpad_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_6__pin_outpad_0_;

output [0:0] bottom_grid_top_width_0_height_0_subtile_7__pin_outpad_0_;

output [0:0] ccff_tail;









wire [0:1] mux_tree_tapbuf_size2_0_sram;
wire [0:1] mux_tree_tapbuf_size2_0_sram_inv;
wire [0:0] mux_tree_tapbuf_size2_mem_0_ccff_tail;
wire [0:2] mux_tree_tapbuf_size4_0_sram;
wire [0:2] mux_tree_tapbuf_size4_0_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_1_sram;
wire [0:2] mux_tree_tapbuf_size4_1_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_2_sram;
wire [0:2] mux_tree_tapbuf_size4_2_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_3_sram;
wire [0:2] mux_tree_tapbuf_size4_3_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_4_sram;
wire [0:2] mux_tree_tapbuf_size4_4_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_5_sram;
wire [0:2] mux_tree_tapbuf_size4_5_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_6_sram;
wire [0:2] mux_tree_tapbuf_size4_6_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_7_sram;
wire [0:2] mux_tree_tapbuf_size4_7_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_8_sram;
wire [0:2] mux_tree_tapbuf_size4_8_sram_inv;
wire [0:2] mux_tree_tapbuf_size4_9_sram;
wire [0:2] mux_tree_tapbuf_size4_9_sram_inv;
wire [0:0] mux_tree_tapbuf_size4_mem_0_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_1_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_2_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_3_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_4_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_5_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_6_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_7_ccff_tail;
wire [0:0] mux_tree_tapbuf_size4_mem_8_ccff_tail;





	assign chanx_right_out[0] = chanx_left_in[0];



	assign chanx_right_out[1] = chanx_left_in[1];



	assign chanx_right_out[2] = chanx_left_in[2];



	assign chanx_right_out[3] = chanx_left_in[3];



	assign chanx_right_out[4] = chanx_left_in[4];



	assign chanx_right_out[5] = chanx_left_in[5];



	assign chanx_right_out[6] = chanx_left_in[6];



	assign chanx_right_out[7] = chanx_left_in[7];



	assign chanx_right_out[8] = chanx_left_in[8];



	assign chanx_right_out[9] = chanx_left_in[9];



	assign chanx_left_out[0] = chanx_right_in[0];



	assign chanx_left_out[1] = chanx_right_in[1];



	assign chanx_left_out[2] = chanx_right_in[2];



	assign chanx_left_out[3] = chanx_right_in[3];



	assign chanx_left_out[4] = chanx_right_in[4];



	assign chanx_left_out[5] = chanx_right_in[5];



	assign chanx_left_out[6] = chanx_right_in[6];



	assign chanx_left_out[7] = chanx_right_in[7];



	assign chanx_left_out[8] = chanx_right_in[8];



	assign chanx_left_out[9] = chanx_right_in[9];




	mux_tree_tapbuf_size4 mux_bottom_ipin_0 (
		.in({chanx_left_in[0], chanx_right_in[0], chanx_left_in[5], chanx_right_in[5]}),
		.sram(mux_tree_tapbuf_size4_0_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_0_sram_inv[0:2]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_2_));

	mux_tree_tapbuf_size4 mux_bottom_ipin_2 (
		.in({chanx_left_in[2], chanx_right_in[2], chanx_left_in[7], chanx_right_in[7]}),
		.sram(mux_tree_tapbuf_size4_1_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_1_sram_inv[0:2]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_clk_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_0 (
		.in({chanx_left_in[3], chanx_right_in[3], chanx_left_in[8], chanx_right_in[8]}),
		.sram(mux_tree_tapbuf_size4_2_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_2_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_0__pin_outpad_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_1 (
		.in({chanx_left_in[4], chanx_right_in[4], chanx_left_in[9], chanx_right_in[9]}),
		.sram(mux_tree_tapbuf_size4_3_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_3_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_1__pin_outpad_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_2 (
		.in({chanx_left_in[0], chanx_right_in[0], chanx_left_in[5], chanx_right_in[5]}),
		.sram(mux_tree_tapbuf_size4_4_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_4_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_2__pin_outpad_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_3 (
		.in({chanx_left_in[1], chanx_right_in[1], chanx_left_in[6], chanx_right_in[6]}),
		.sram(mux_tree_tapbuf_size4_5_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_5_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_3__pin_outpad_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_4 (
		.in({chanx_left_in[2], chanx_right_in[2], chanx_left_in[7], chanx_right_in[7]}),
		.sram(mux_tree_tapbuf_size4_6_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_6_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_4__pin_outpad_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_5 (
		.in({chanx_left_in[3], chanx_right_in[3], chanx_left_in[8], chanx_right_in[8]}),
		.sram(mux_tree_tapbuf_size4_7_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_7_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_5__pin_outpad_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_6 (
		.in({chanx_left_in[4], chanx_right_in[4], chanx_left_in[9], chanx_right_in[9]}),
		.sram(mux_tree_tapbuf_size4_8_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_8_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_6__pin_outpad_0_));

	mux_tree_tapbuf_size4 mux_top_ipin_7 (
		.in({chanx_left_in[0], chanx_right_in[0], chanx_left_in[5], chanx_right_in[5]}),
		.sram(mux_tree_tapbuf_size4_9_sram[0:2]),
		.sram_inv(mux_tree_tapbuf_size4_9_sram_inv[0:2]),
		.out(bottom_grid_top_width_0_height_0_subtile_7__pin_outpad_0_));

	mux_tree_tapbuf_size4_mem mem_bottom_ipin_0 (
		.prog_clk(prog_clk),
		.ccff_head(ccff_head),
		.ccff_tail(mux_tree_tapbuf_size4_mem_0_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_0_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_0_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_bottom_ipin_2 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size2_mem_0_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_1_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_1_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_1_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_0 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_1_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_2_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_2_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_2_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_1 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_2_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_3_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_3_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_3_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_2 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_3_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_4_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_4_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_4_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_3 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_4_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_5_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_5_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_5_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_4 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_5_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_6_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_6_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_6_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_5 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_6_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_7_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_7_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_7_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_6 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_7_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size4_mem_8_ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_8_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_8_sram_inv[0:2]));

	mux_tree_tapbuf_size4_mem mem_top_ipin_7 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_8_ccff_tail),
		.ccff_tail(ccff_tail),
		.mem_out(mux_tree_tapbuf_size4_9_sram[0:2]),
		.mem_outb(mux_tree_tapbuf_size4_9_sram_inv[0:2]));

	mux_tree_tapbuf_size2 mux_bottom_ipin_1 (
		.in({chanx_left_in[1], chanx_right_in[1]}),
		.sram(mux_tree_tapbuf_size2_0_sram[0:1]),
		.sram_inv(mux_tree_tapbuf_size2_0_sram_inv[0:1]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_6_));

	mux_tree_tapbuf_size2_mem mem_bottom_ipin_1 (
		.prog_clk(prog_clk),
		.ccff_head(mux_tree_tapbuf_size4_mem_0_ccff_tail),
		.ccff_tail(mux_tree_tapbuf_size2_mem_0_ccff_tail),
		.mem_out(mux_tree_tapbuf_size2_0_sram[0:1]),
		.mem_outb(mux_tree_tapbuf_size2_0_sram_inv[0:1]));

endmodule