data/full_repos/permissive/181158585/simple_platform.srcs/sources_1/new/wishbone_bus_selector.v
data/verilator_xmls/c33d0e7e-2bb1-4301-a371-b0884b998f86.xml
module wishbone_bus_selector
#( parameter SLAVES=1)
(  input  logic [31:0] address,
   output logic [31:0] slave
);




function in_range;
    input [31:0] address;
    input [31:0] base_address;
    input [31:0] last_address;
begin
    in_range = (address >= base_address && address <= last_address)? 1 : 0;
end
endfunction


assign slave = in_range ( address, 32'h0,  32'h37 )? 32'b0 :
               in_range ( address, 32'h60, 32'h60 )? 32'b1 :
               SLAVES;
endmodule
module wishbone_bus_selector
#( parameter SLAVES=1)
(  input  logic [31:0] address,
   output logic [31:0] slave
);





function in_range;
    input [31:0] address;
    input [31:0] base_address;
    input [31:0] last_address;
begin
    in_range = (address >= base_address && address <= last_address)? 1 : 0;
end
endfunction


assign slave = in_range ( address, 32'h0,  32'h37 )? 32'b0 :
               in_range ( address, 32'h60, 32'h60 )? 32'b1 :
               SLAVES;
endmodule