data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v
None: at end of input
1: b'%Error: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:2: Cannot find include file: ../../src/sccomp_dataflow.v\n`include "../../src/sccomp_dataflow.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test,data/full_repos/permissive/159596577/../../src/sccomp_dataflow.v\n             data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test,data/full_repos/permissive/159596577/../../src/sccomp_dataflow.v.v\n             data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test,data/full_repos/permissive/159596577/../../src/sccomp_dataflow.v.sv\n             ../../src/sccomp_dataflow.v\n             ../../src/sccomp_dataflow.v.v\n             ../../src/sccomp_dataflow.v.sv\n             obj_dir/../../src/sccomp_dataflow.v\n             obj_dir/../../src/sccomp_dataflow.v.v\n             obj_dir/../../src/sccomp_dataflow.v.sv\n%Error: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:3: Cannot find include file: ../../src/clu.v\n`include "../../src/clu.v" \n         ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:4: Cannot find include file: ../../src/dff32.v\n`include "../../src/dff32.v" \n         ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:5: Cannot find include file: ../../src/mux2x32.v\n`include "../../src/mux2x32.v" \n         ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:6: Cannot find include file: ../../src/cla32.v\n`include "../../src/cla32.v" \n         ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:7: Cannot find include file: ../../src/mux2x5.v\n`include "../../src/mux2x5.v" \n         ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:8: Cannot find include file: ../../src/alu.v\n`include "../../src/alu.v" \n         ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:9: Cannot find include file: ../../src/regfile.v\n`include "../../src/regfile.v" \n         ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:10: Cannot find include file: ../../src/shifter.v\n`include "../../src/shifter.v" \n         ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:11: Cannot find include file: ../../src/mux4x32.v\n`include "../../src/mux4x32.v" \n         ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:12: Cannot find include file: ../../src/scinstmem.v\n`include "../../src/scinstmem.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:13: Cannot find include file: ../../src/scdatamem.v\n`include "../../src/scdatamem.v"  \n         ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:14: Cannot find include file: ../../src/sccpu_dataflow.v\n`include "../../src/sccpu_dataflow.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:22: Unsupported or unknown PLI call: $dumpfile\n      $dumpfile("sccomp_dataflow.vcd");\n      ^~~~~~~~~\n%Error: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:23: Unsupported or unknown PLI call: $dumpvars\n      $dumpvars;\n      ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:27: Unsupported: Ignoring delay on this delayed statement.\n       forever #10 clock = ~clock;\n               ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:31: Unsupported: Ignoring delay on this delayed statement.\n       #5 resetn = 1\'b1;\n       ^\n%Warning-STMTDLY: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:35: Unsupported: Ignoring delay on this delayed statement.\n       forever #5 mem_clk = ~mem_clk;\n               ^\n%Warning-STMTDLY: data/full_repos/permissive/159596577/testbench/soccomp_dataflow_test/sccomp_dataflow_tb.v:38: Unsupported: Ignoring delay on this delayed statement.\n       #2000 $finish;\n       ^\n%Error: Exiting due to 15 error(s), 4 warning(s)\n'
module test_tb;
   reg clock,mem_clk,resetn;
   wire [31:0] inst,pc,aluout,memout;
   sccomp_dataflow sc0 (clock,resetn,mem_clk,inst,pc,aluout,memout);

   initial begin
      $dumpfile("sccomp_dataflow.vcd");
      $dumpvars;
   end
   initial begin    
       clock = 1'b1;
       forever #10 clock = ~clock;
   end
   initial begin
       resetn = 1'b0;
       #5 resetn = 1'b1;
   end
   initial begin
       mem_clk = 1'b0;
       forever #5 mem_clk = ~mem_clk;
   end
   initial begin
       #2000 $finish;
   end
endmodule
module test_tb;

   reg clock,mem_clk,resetn;
   wire [31:0] inst,pc,aluout,memout;
   sccomp_dataflow sc0 (clock,resetn,mem_clk,inst,pc,aluout,memout);

   initial begin
      $dumpfile("sccomp_dataflow.vcd");
      $dumpvars;
   end
   initial begin    
       clock = 1'b1;
       forever #10 clock = ~clock;
   end
   initial begin
       resetn = 1'b0;
       #5 resetn = 1'b1;
   end
   initial begin
       mem_clk = 1'b0;
       forever #5 mem_clk = ~mem_clk;
   end
   initial begin
       #2000 $finish;
   end
endmodule