data/full_repos/permissive/136510272/projects/06_multest/marsohod2.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Error: data/full_repos/permissive/136510272/projects/06_multest/marsohod2.v:66: Cannot find file containing module: \'PS2_Controller\'\nPS2_Controller Keyboard(\n^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/136510272/projects/06_multest,data/full_repos/permissive/136510272/PS2_Controller\n             data/full_repos/permissive/136510272/projects/06_multest,data/full_repos/permissive/136510272/PS2_Controller.v\n             data/full_repos/permissive/136510272/projects/06_multest,data/full_repos/permissive/136510272/PS2_Controller.sv\n             PS2_Controller\n             PS2_Controller.v\n             PS2_Controller.sv\n             obj_dir/PS2_Controller\n             obj_dir/PS2_Controller.v\n             obj_dir/PS2_Controller.sv\n%Warning-WIDTH: data/full_repos/permissive/136510272/projects/06_multest/marsohod2.v:99: Operator CASE expects 8 bits on the Case expression, but Case expression\'s SEL generates 7 bits.\n                                                                                       : ... In instance marsohod2\n            case (ps2_data[6:0])\n            ^~~~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 error(s), 1 warning(s)\n'
module marsohod2(




    input   wire        clk,


    output  reg  [3:0]  led,


    input   wire [1:0]  keys,


    output  wire        adc_clock_20mhz,
    input   wire [7:0]  adc_input,


    output  wire        sdram_clock,
    output  wire [11:0] sdram_addr,
    output  wire [1:0]  sdram_bank,
    inout   wire [15:0] sdram_dq,
    output  wire        sdram_ldqm,
    output  wire        sdram_udqm,
    output  wire        sdram_ras,
    output  wire        sdram_cas,
    output  wire        sdram_we,


    output  wire [4:0]  vga_red,
    output  wire [5:0]  vga_green,
    output  wire [4:0]  vga_blue,
    output  wire        vga_hs,
    output  wire        vga_vs,


    input   wire        ftdi_rx,
    output  wire        ftdi_tx,




    inout   wire [1:0]  usb,


    output  wire        sound_left,
    output  wire        sound_right,


    inout   wire [1:0]  ps2_keyb,
    inout   wire [1:0]  ps2_mouse
);


reg  kbd_reset = 1'b0;
reg  div; always @(posedge clk) div <= !div;
wire ps2_command_was_sent;
wire ps2_error_communication_timed_out;
wire [7:0] ps2_data;
wire       ps2_data_clk;

PS2_Controller Keyboard(


    .CLOCK_50       (div),
	.reset          (1'b0),
	.the_command    (1'b0),
	.send_command   (1'b0),


	.PS2_CLK(ps2_keyb[1]),
 	.PS2_DAT(ps2_keyb[0]),


	.command_was_sent  (ps2_command_was_sent),
	.error_communication_timed_out (ps2_error_communication_timed_out),


	.received_data      (ps2_data),
	.received_data_en   (ps2_data_clk)

);

reg unlocked = 1'b0;

always @(posedge div) begin

    if (ps2_data_clk) begin
    

        if (ps2_data == 8'hF0) begin               
            unlocked <= 1'b1;            
        end else begin
            
            case (ps2_data[6:0])
            
                8'h01: led[0] <= !unlocked;

            endcase
        
            unlocked <= 1'b0;
        end
    
    end

end
    
endmodule
module marsohod2(




    input   wire        clk,


    output  reg  [3:0]  led,


    input   wire [1:0]  keys,


    output  wire        adc_clock_20mhz,
    input   wire [7:0]  adc_input,


    output  wire        sdram_clock,
    output  wire [11:0] sdram_addr,
    output  wire [1:0]  sdram_bank,
    inout   wire [15:0] sdram_dq,
    output  wire        sdram_ldqm,
    output  wire        sdram_udqm,
    output  wire        sdram_ras,
    output  wire        sdram_cas,
    output  wire        sdram_we,


    output  wire [4:0]  vga_red,
    output  wire [5:0]  vga_green,
    output  wire [4:0]  vga_blue,
    output  wire        vga_hs,
    output  wire        vga_vs,


    input   wire        ftdi_rx,
    output  wire        ftdi_tx,




    inout   wire [1:0]  usb,


    output  wire        sound_left,
    output  wire        sound_right,


    inout   wire [1:0]  ps2_keyb,
    inout   wire [1:0]  ps2_mouse
);



reg  kbd_reset = 1'b0;
reg  div; always @(posedge clk) div <= !div;
wire ps2_command_was_sent;
wire ps2_error_communication_timed_out;
wire [7:0] ps2_data;
wire       ps2_data_clk;

PS2_Controller Keyboard(


    .CLOCK_50       (div),
	.reset          (1'b0),
	.the_command    (1'b0),
	.send_command   (1'b0),


	.PS2_CLK(ps2_keyb[1]),
 	.PS2_DAT(ps2_keyb[0]),


	.command_was_sent  (ps2_command_was_sent),
	.error_communication_timed_out (ps2_error_communication_timed_out),


	.received_data      (ps2_data),
	.received_data_en   (ps2_data_clk)

);

reg unlocked = 1'b0;

always @(posedge div) begin

    if (ps2_data_clk) begin
    

        if (ps2_data == 8'hF0) begin               
            unlocked <= 1'b1;            
        end else begin
            
            case (ps2_data[6:0])
            
                8'h01: led[0] <= !unlocked;

            endcase
        
            unlocked <= 1'b0;
        end
    
    end

end
    
endmodule