data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/ac97_ctrl/rtl/ac97_rst.v
1: b'%Error: data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/ac97_ctrl/rtl/ac97_rst.v:62: Cannot find include file: ac97_defines.v\n`include "ac97_defines.v" \n         ^~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/ac97_ctrl/rtl,data/full_repos/permissive/137416811/ac97_defines.v\n             data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/ac97_ctrl/rtl,data/full_repos/permissive/137416811/ac97_defines.v.v\n             data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/ac97_ctrl/rtl,data/full_repos/permissive/137416811/ac97_defines.v.sv\n             ac97_defines.v\n             ac97_defines.v.v\n             ac97_defines.v.sv\n             obj_dir/ac97_defines.v\n             obj_dir/ac97_defines.v.v\n             obj_dir/ac97_defines.v.sv\n%Error: data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/ac97_ctrl/rtl/ac97_rst.v:84: Define or directive not defined: \'`AC97_RST_DEL\'\nassign to = (cnt == `AC97_RST_DEL);\n                    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/ac97_ctrl/rtl/ac97_rst.v:84: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\nassign to = (cnt == `AC97_RST_DEL);\n                                 ^\n%Error: data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/ac97_ctrl/rtl/ac97_rst.v:93: Define or directive not defined: \'`AC97_RST_DEL\'\nassign ce = ps_ce & (cnt != `AC97_RST_DEL);\n                            ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/ac97_ctrl/rtl/ac97_rst.v:93: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\nassign ce = ps_ce & (cnt != `AC97_RST_DEL);\n                                         ^\n%Error: data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/ac97_ctrl/rtl/ac97_rst.v:101: Define or directive not defined: \'`AC97_250_PS\'\nassign ps_ce = (ps_cnt == `AC97_250_PS);\n                          ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/benchmarks/iwls2005/ac97_ctrl/rtl/ac97_rst.v:101: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\nassign ps_ce = (ps_cnt == `AC97_250_PS);\n                                      ^\n%Error: Exiting due to 7 error(s)\n'
module ac97_rst(clk, rst, rst_force, ps_ce, ac97_rst_);
input		clk, rst;
input		rst_force;
output		ps_ce;
output		ac97_rst_;

reg		ac97_rst_;
reg	[2:0]	cnt;
wire		ce;
wire		to;
reg	[5:0]	ps_cnt;
wire		ps_ce;

always @(posedge clk or negedge rst)
	if(!rst)	ac97_rst_ <= #1 0;
	else
	if(rst_force)	ac97_rst_ <= #1 0;
	else
	if(to)		ac97_rst_ <= #1 1;

assign to = (cnt == `AC97_RST_DEL);

always @(posedge clk or negedge rst)
	if(!rst)	cnt <= #1 0;
	else
	if(rst_force)	cnt <= #1 0;
	else
	if(ce)		cnt <= #1 cnt + 1;

assign ce = ps_ce & (cnt != `AC97_RST_DEL);

always @(posedge clk or negedge rst)
	if(!rst)		ps_cnt <= #1 0;
	else
	if(ps_ce | rst_force)	ps_cnt <= #1 0;
	else			ps_cnt <= #1 ps_cnt + 1;

assign ps_ce = (ps_cnt == `AC97_250_PS);

endmodule
module ac97_rst(clk, rst, rst_force, ps_ce, ac97_rst_);

input		clk, rst;
input		rst_force;
output		ps_ce;
output		ac97_rst_;

reg		ac97_rst_;
reg	[2:0]	cnt;
wire		ce;
wire		to;
reg	[5:0]	ps_cnt;
wire		ps_ce;

always @(posedge clk or negedge rst)
	if(!rst)	ac97_rst_ <= #1 0;
	else
	if(rst_force)	ac97_rst_ <= #1 0;
	else
	if(to)		ac97_rst_ <= #1 1;

assign to = (cnt == `AC97_RST_DEL);

always @(posedge clk or negedge rst)
	if(!rst)	cnt <= #1 0;
	else
	if(rst_force)	cnt <= #1 0;
	else
	if(ce)		cnt <= #1 cnt + 1;

assign ce = ps_ce & (cnt != `AC97_RST_DEL);

always @(posedge clk or negedge rst)
	if(!rst)		ps_cnt <= #1 0;
	else
	if(ps_ce | rst_force)	ps_cnt <= #1 0;
	else			ps_cnt <= #1 ps_cnt + 1;

assign ps_ce = (ps_cnt == `AC97_250_PS);

endmodule