data/full_repos/permissive/173670949/abcd-serial/tostr.v
1: b'%Warning-WIDTH: data/full_repos/permissive/173670949/abcd-serial/tostr.v:6: Operator ADD expects 32 or 8 bits on the LHS, but LHS\'s VARREF \'i_number\' generates 4 bits.\n                                                                          : ... In instance ToStr\n    assign asciiout = (0 <= i_number && i_number <= 9) ? i_number + 48 : 0;\n                                                                  ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-UNSIGNED: data/full_repos/permissive/173670949/abcd-serial/tostr.v:6: Comparison is constant due to unsigned arithmetic\n                                                                             : ... In instance ToStr\n    assign asciiout = (0 <= i_number && i_number <= 9) ? i_number + 48 : 0;\n                         ^~\n%Error: Exiting due to 2 warning(s)\n'
module ToStr (
    input  [3:0] i_number,
    output [7:0] asciiout
);

    assign asciiout = (0 <= i_number && i_number <= 9) ? i_number + 48 : 0;

endmodule
module ToStr (
    input  [3:0] i_number,
    output [7:0] asciiout
);


    assign asciiout = (0 <= i_number && i_number <= 9) ? i_number + 48 : 0;

endmodule