data/full_repos/permissive/143278/ivltests/pr1960596.v
data/verilator_xmls/2e79bce1-617a-4b30-afa8-49cc733e5661.xml
module test;
   initial begin
      $write("expected 32'h55555552; got 32'h%0h\n", (-(32'h9) / 32'h3));
      $write("expected 1; got %0d\n", (-(32'h9) % 32'h3));
   end
endmodule
module test;

   initial begin
      $write("expected 32'h55555552; got 32'h%0h\n", (-(32'h9) / 32'h3));
      $write("expected 1; got %0d\n", (-(32'h9) % 32'h3));
   end
endmodule