data/full_repos/permissive/143278/ivltests/array_packed_2d.v
 line:24: before: "["
1: b'%Warning-LITENDIAN: data/full_repos/permissive/143278/ivltests/array_packed_2d.v:24: Little bit endian vector: MSB < LSB of bit range: 1:4\nreg [1:4][7:0] vec;\n    ^\n                    ... Use "/* verilator lint_off LITENDIAN */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/array_packed_2d.v:31: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s MULS generates 32 bits.\n                                                                               : ... In instance array_packed_2d\n    vec[i] = i * 2;\n           ^\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/array_packed_2d.v:70: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s MULS generates 32 bits.\n                                                                               : ... In instance array_packed_2d\n    vec2[i] = i * 2;\n            ^\n%Error: Exiting due to 3 warning(s)\n'
module array_packed_2d();

reg [1:4][7:0] vec;
reg [4:1][7:0] vec2;
integer i;

initial begin

for(i = 1; i <= 4; i = i + 1)
    vec[i] = i * 2;


$display("%h", vec);


for(i = 1; i <= 4; i = i + 1)
    $display(vec[i]);


$display(vec[1]);
$display(vec[2]);
$display(vec[3]);
$display(vec[4]);



vec[1] = 2;
vec[2] = 4;
vec[3] = 6;
vec[4] = 8;


$display("%h", vec);


for(i = 1; i <= 4; i = i + 1)
    $display(vec[i]);


$display(vec[1]);
$display(vec[2]);
$display(vec[3]);
$display(vec[4]);




for(i = 1; i <= 4; i = i + 1)
    vec2[i] = i * 2;


$display("%h", vec2);


for(i = 1; i <= 4; i = i + 1)
    $display(vec2[i]);


$display(vec2[1]);
$display(vec2[2]);
$display(vec2[3]);
$display(vec2[4]);



vec2[1] = 2;
vec2[2] = 4;
vec2[3] = 6;
vec2[4] = 8;


$display("%h", vec2);


for(i = 1; i <= 4; i = i + 1)
    $display(vec2[i]);


$display(vec2[1]);
$display(vec2[2]);
$display(vec2[3]);
$display(vec2[4]);
end

endmodule
module array_packed_2d();


reg [1:4][7:0] vec;
reg [4:1][7:0] vec2;
integer i;

initial begin

for(i = 1; i <= 4; i = i + 1)
    vec[i] = i * 2;


$display("%h", vec);


for(i = 1; i <= 4; i = i + 1)
    $display(vec[i]);


$display(vec[1]);
$display(vec[2]);
$display(vec[3]);
$display(vec[4]);



vec[1] = 2;
vec[2] = 4;
vec[3] = 6;
vec[4] = 8;


$display("%h", vec);


for(i = 1; i <= 4; i = i + 1)
    $display(vec[i]);


$display(vec[1]);
$display(vec[2]);
$display(vec[3]);
$display(vec[4]);




for(i = 1; i <= 4; i = i + 1)
    vec2[i] = i * 2;


$display("%h", vec2);


for(i = 1; i <= 4; i = i + 1)
    $display(vec2[i]);


$display(vec2[1]);
$display(vec2[2]);
$display(vec2[3]);
$display(vec2[4]);



vec2[1] = 2;
vec2[2] = 4;
vec2[3] = 6;
vec2[4] = 8;


$display("%h", vec2);


for(i = 1; i <= 4; i = i + 1)
    $display(vec2[i]);


$display(vec2[1]);
$display(vec2[2]);
$display(vec2[3]);
$display(vec2[4]);
end

endmodule