data/full_repos/permissive/181738725/wavetrace/verilog/lib/stream/sim/stream_common.vh
 line:23: before: "function"
1: b'%Warning-WIDTH: data/full_repos/permissive/181738725/wavetrace/verilog/lib/stream/sim/stream_common.vh:31: Operator ADD expects 2048 bits on the LHS, but LHS\'s VARREF \'calc_total\' generates 32 bits.\n      calc_total  = calc_total + (col_bits >> (i*32)) & 32\'hFFFFFFFF;\n                               ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/181738725/wavetrace/verilog/lib/stream/sim/stream_common.vh:31: Operator AND expects 2048 bits on the RHS, but RHS\'s CONST \'32\'hffffffff\' generates 32 bits.\n      calc_total  = calc_total + (col_bits >> (i*32)) & 32\'hFFFFFFFF;\n                                                      ^\n%Warning-WIDTH: data/full_repos/permissive/181738725/wavetrace/verilog/lib/stream/sim/stream_common.vh:31: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s AND generates 2048 bits.\n      calc_total  = calc_total + (col_bits >> (i*32)) & 32\'hFFFFFFFF;\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/181738725/wavetrace/verilog/lib/stream/sim/stream_common.vh:43: Operator AND expects 2048 bits on the RHS, but RHS\'s CONST \'32\'hffffffff\' generates 32 bits.\n    get_symbol_width = (col_bits >> (index*32)) & 32\'hFFFFFFFF;\n                                                ^\n%Warning-WIDTH: data/full_repos/permissive/181738725/wavetrace/verilog/lib/stream/sim/stream_common.vh:43: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s AND generates 2048 bits.\n    get_symbol_width = (col_bits >> (index*32)) & 32\'hFFFFFFFF;\n                     ^\n%Error: Exiting due to 5 warning(s)\n'
function integer calc_total;
  input integer num_cols;
  input [2047:0] col_bits;
  integer        i;
  begin
    calc_total = 0;
    for (i=0; i < num_cols; i=i+1)
    begin
      calc_total  = calc_total + (col_bits >> (i*32)) & 32'hFFFFFFFF;
    end
  end
endfunction
function integer calc_total;

  input integer num_cols;
  input [2047:0] col_bits;
  integer        i;
  begin
    calc_total = 0;
    for (i=0; i < num_cols; i=i+1)
    begin
      calc_total  = calc_total + (col_bits >> (i*32)) & 32'hFFFFFFFF;
    end
  end
endfunction