data/full_repos/permissive/143278/ivltests/event_list3.v
 line:49: before: "e"
1: b'%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/event_list3.v:26: Unsupported: Ignoring delay on this delayed statement.\n  #30;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/event_list3.v:28: Unsupported: Ignoring delay on this delayed statement.\n  #60;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/event_list3.v:35: Unsupported: Ignoring delay on this delayed statement.\n  #10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/event_list3.v:37: Unsupported: Ignoring delay on this delayed statement.\n  #10;\n  ^\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/event_list3.v:46: Operator ADD expects 4 bits on the LHS, but LHS\'s VARREF \'A\' generates 1 bits.\n                                                                           : ... In instance sensitivity_list\n    B = A+C;\n         ^\n%Error: Exiting due to 5 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module sensitivity_list ();
parameter ii = 4;
reg CLK;
reg A;
reg [ii-1:0] B,C;
initial
begin
  #30;
  C <= {ii{1'b0}};
  #60;
  $finish(0);
end

always
begin
  CLK = 1'b0;
  #10;
  CLK = 1'b1;
  #10;
  $display ($time);
end

always @(A or C) begin
    A = 1'b0;
    $display ("combinatorial process ", A, " time:",$time);
    A = 1'b1;
    $display ("combinatorial process ", A, " time:",$time);
    B = A+C;
  end
endmodule
module sensitivity_list ();

parameter ii = 4;
reg CLK;
reg A;
reg [ii-1:0] B,C;
initial
begin
  #30;
  C <= {ii{1'b0}};
  #60;
  $finish(0);
end

always
begin
  CLK = 1'b0;
  #10;
  CLK = 1'b1;
  #10;
  $display ($time);
end

always @(A or C) begin
    A = 1'b0;
    $display ("combinatorial process ", A, " time:",$time);
    A = 1'b1;
    $display ("combinatorial process ", A, " time:",$time);
    B = A+C;
  end
endmodule