data/full_repos/permissive/146246005/RISC-y Processor/RISCY_CPU.sv
 line:3: before: "package"
1: b'%Error: Cannot find file containing module: Processor,data/full_repos/permissive/146246005\n        ... Looked in:\n             data/full_repos/permissive/146246005/RISC-y/Processor,data/full_repos/permissive/146246005\n             data/full_repos/permissive/146246005/RISC-y/Processor,data/full_repos/permissive/146246005.v\n             data/full_repos/permissive/146246005/RISC-y/Processor,data/full_repos/permissive/146246005.sv\n             Processor,data/full_repos/permissive/146246005\n             Processor,data/full_repos/permissive/146246005.v\n             Processor,data/full_repos/permissive/146246005.sv\n             obj_dir/Processor,data/full_repos/permissive/146246005\n             obj_dir/Processor,data/full_repos/permissive/146246005.v\n             obj_dir/Processor,data/full_repos/permissive/146246005.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/146246005/RISC-y\n%Error: Cannot find file containing module: Processor/RISCY_CPU.sv\n%Error: Exiting due to 3 error(s)\n'
module ProgCount(Count, CLOCK, RESET, Enable, Load, Data); 
	parameter PCSize = 1;
	output reg [PCSize-1:0] Count; 
	input  [PCSize-1:0] Data; 
	input  CLOCK, Enable, RESET, Load; 
	
	always @ (posedge CLOCK or negedge RESET)
		if(!RESET)
			Count <= 0;
		else if(Enable)
			begin
				if(Load)
					Count <= Data;
				else
					Count <= Count+ 1;
	end
endmodule
module ProgCount(Count, CLOCK, RESET, Enable, Load, Data);
 
	parameter PCSize = 1;
	output reg [PCSize-1:0] Count; 
	input  [PCSize-1:0] Data; 
	input  CLOCK, Enable, RESET, Load; 
	
	always @ (posedge CLOCK or negedge RESET)
		if(!RESET)
			Count <= 0;
		else if(Enable)
			begin
				if(Load)
					Count <= Data;
				else
					Count <= Count+ 1;
	end
endmodule