data/full_repos/permissive/18921956/HardwareLab/Lab6/Lab6.v
1: b"%Error: data/full_repos/permissive/18921956/HardwareLab/Lab6/Lab6.v:39: Cannot find file containing module: 'clock_divisor'\n clock_divisor cd(clk_15, clk);\n ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/18921956/HardwareLab/Lab6,data/full_repos/permissive/18921956/clock_divisor\n             data/full_repos/permissive/18921956/HardwareLab/Lab6,data/full_repos/permissive/18921956/clock_divisor.v\n             data/full_repos/permissive/18921956/HardwareLab/Lab6,data/full_repos/permissive/18921956/clock_divisor.sv\n             clock_divisor\n             clock_divisor.v\n             clock_divisor.sv\n             obj_dir/clock_divisor\n             obj_dir/clock_divisor.v\n             obj_dir/clock_divisor.sv\n%Error: data/full_repos/permissive/18921956/HardwareLab/Lab6/Lab6.v:40: Cannot find file containing module: 'debounce'\n debounce db1(DB_reset_n, reset_n, clk_15);\n ^~~~~~~~\n%Error: data/full_repos/permissive/18921956/HardwareLab/Lab6/Lab6.v:41: Cannot find file containing module: 'debounce'\n debounce db2(DB_operator[0], operator[0], clk_15);\n ^~~~~~~~\n%Error: data/full_repos/permissive/18921956/HardwareLab/Lab6/Lab6.v:42: Cannot find file containing module: 'debounce'\n debounce db3(DB_operator[1], operator[1], clk_15);\n ^~~~~~~~\n%Error: data/full_repos/permissive/18921956/HardwareLab/Lab6/Lab6.v:43: Cannot find file containing module: 'KeyBoard_ctrl'\n KeyBoard_ctrl kc(ROW, KEY_IN, COLUMN, clk, DB_reset_n);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/18921956/HardwareLab/Lab6/Lab6.v:44: Cannot find file containing module: 'ADD_SUB'\n ADD_SUB as(A, B, value_result_tens, value_result_units, sign_result, KEY_IN, clk, DB_reset_n, DB_operator);\n ^~~~~~~\n%Error: data/full_repos/permissive/18921956/HardwareLab/Lab6/Lab6.v:45: Cannot find file containing module: 'LED7SEG'\n LED7SEG led(DIGIT, DISPLAY, A, B, value_result_tens, value_result_units, sign_result, 0, 0, clk_15);\n ^~~~~~~\n%Error: Exiting due to 7 error(s)\n"
module Lab6( DIGIT, DISPLAY, ROW, COLUMN, operator, clk, reset_n);
	output [3:0] DIGIT;
	output [8:0] DISPLAY;
	output [3:0] ROW;
	input [3:0] COLUMN;
	input [1:0] operator;
	input clk;
	input reset_n;
	
	wire clk_15;
	wire DB_reset_n;
	wire [3:0] KEY_IN;
	wire [3:0] A,B;
	wire [3:0] value_result_tens,value_result_units;
	wire [1:0] DB_operator;
   wire sign_result;
	

	clock_divisor cd(clk_15, clk);
	debounce db1(DB_reset_n, reset_n, clk_15);
	debounce db2(DB_operator[0], operator[0], clk_15);
	debounce db3(DB_operator[1], operator[1], clk_15);
	KeyBoard_ctrl kc(ROW, KEY_IN, COLUMN, clk, DB_reset_n);
	ADD_SUB as(A, B, value_result_tens, value_result_units, sign_result, KEY_IN, clk, DB_reset_n, DB_operator);
	LED7SEG led(DIGIT, DISPLAY, A, B, value_result_tens, value_result_units, sign_result, 0, 0, clk_15);
endmodule
module Lab6( DIGIT, DISPLAY, ROW, COLUMN, operator, clk, reset_n);

	output [3:0] DIGIT;
	output [8:0] DISPLAY;
	output [3:0] ROW;
	input [3:0] COLUMN;
	input [1:0] operator;
	input clk;
	input reset_n;
	
	wire clk_15;
	wire DB_reset_n;
	wire [3:0] KEY_IN;
	wire [3:0] A,B;
	wire [3:0] value_result_tens,value_result_units;
	wire [1:0] DB_operator;
   wire sign_result;
	

	clock_divisor cd(clk_15, clk);
	debounce db1(DB_reset_n, reset_n, clk_15);
	debounce db2(DB_operator[0], operator[0], clk_15);
	debounce db3(DB_operator[1], operator[1], clk_15);
	KeyBoard_ctrl kc(ROW, KEY_IN, COLUMN, clk, DB_reset_n);
	ADD_SUB as(A, B, value_result_tens, value_result_units, sign_result, KEY_IN, clk, DB_reset_n, DB_operator);
	LED7SEG led(DIGIT, DISPLAY, A, B, value_result_tens, value_result_units, sign_result, 0, 0, clk_15);
endmodule