data/full_repos/permissive/159555381/mux.v
 line:39: before: ","
1: b'%Error: data/full_repos/permissive/159555381/mux.v:37: Unsupported or unknown PLI call: $dumpfile\n  $dumpfile ("mux.vcd");\n  ^~~~~~~~~\n%Error: data/full_repos/permissive/159555381/mux.v:38: Unsupported or unknown PLI call: $dumpvars\n                $dumpvars (0, Test);\n                ^~~~~~~~~\n%Error: data/full_repos/permissive/159555381/mux.v:39: Unsupported or unknown PLI call: $monitor\n  $monitor($time,, "D = %b s = %b out = %b", d, s, i1);\n  ^~~~~~~~\n%Error: data/full_repos/permissive/159555381/mux.v:39: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n  $monitor($time,, "D = %b s = %b out = %b", d, s, i1);\n                 ^\n%Warning-STMTDLY: data/full_repos/permissive/159555381/mux.v:42: Unsupported: Ignoring delay on this delayed statement.\n  #5 {s1, s2, s3} = {1\'b0, 1\'b0, 1\'b1};\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/159555381/mux.v:43: Unsupported: Ignoring delay on this delayed statement.\n  #5 {s1, s2, s3} = {1\'b0, 1\'b1, 1\'b0};\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/159555381/mux.v:44: Unsupported: Ignoring delay on this delayed statement.\n  #5 {s1, s2, s3} = {1\'b0, 1\'b1, 1\'b1};\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/159555381/mux.v:45: Unsupported: Ignoring delay on this delayed statement.\n  #5 {s1, s2, s3} = {1\'b1, 1\'b0, 1\'b0};\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/159555381/mux.v:46: Unsupported: Ignoring delay on this delayed statement.\n  #5 {s1, s2, s3} = {1\'b1, 1\'b0, 1\'b1};\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/159555381/mux.v:47: Unsupported: Ignoring delay on this delayed statement.\n  #5 {s1, s2, s3} = {1\'b1, 1\'b1, 1\'b0};\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/159555381/mux.v:48: Unsupported: Ignoring delay on this delayed statement.\n  #5 {s1, s2, s3} = {1\'b1, 1\'b1, 1\'b1};\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/159555381/mux.v:49: Unsupported: Ignoring delay on this delayed statement.\n  #5 $finish;\n  ^\n%Error: Exiting due to 4 error(s), 8 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module Test(
	output reg s1, s2, s3, b1, b2, b3, b4, b5, b6, b7, b8,
	input i1);
	wire [7:0] d;
	wire [2:0] s;
	assign d = {b1, b2, b3, b4, b5, b6, b7, b8};
	assign s = {s1, s2, s3};
	initial begin 
		$dumpfile ("mux.vcd");
                $dumpvars (0, Test);
		$monitor($time,, "D = %b s = %b out = %b", d, s, i1);
		{s1, s2, s3} = {1'b0,  1'b0, 1'b0};
		{b1, b2, b3, b4, b5, b6, b7, b8} = {1'b1, 1'b0, 1'b0, 1'b1, 1'b0, 1'b1, 1'b1, 1'b1};
		#5 {s1, s2, s3} = {1'b0, 1'b0, 1'b1};
		#5 {s1, s2, s3} = {1'b0, 1'b1, 1'b0};
		#5 {s1, s2, s3} = {1'b0, 1'b1, 1'b1};
		#5 {s1, s2, s3} = {1'b1, 1'b0, 1'b0};
		#5 {s1, s2, s3} = {1'b1, 1'b0, 1'b1};
		#5 {s1, s2, s3} = {1'b1, 1'b1, 1'b0};
		#5 {s1, s2, s3} = {1'b1, 1'b1, 1'b1};
		#5 $finish;
	end
endmodule
module Test(
	output reg s1, s2, s3, b1, b2, b3, b4, b5, b6, b7, b8,
	input i1);

	wire [7:0] d;
	wire [2:0] s;
	assign d = {b1, b2, b3, b4, b5, b6, b7, b8};
	assign s = {s1, s2, s3};
	initial begin 
		$dumpfile ("mux.vcd");
                $dumpvars (0, Test);
		$monitor($time,, "D = %b s = %b out = %b", d, s, i1);
		{s1, s2, s3} = {1'b0,  1'b0, 1'b0};
		{b1, b2, b3, b4, b5, b6, b7, b8} = {1'b1, 1'b0, 1'b0, 1'b1, 1'b0, 1'b1, 1'b1, 1'b1};
		#5 {s1, s2, s3} = {1'b0, 1'b0, 1'b1};
		#5 {s1, s2, s3} = {1'b0, 1'b1, 1'b0};
		#5 {s1, s2, s3} = {1'b0, 1'b1, 1'b1};
		#5 {s1, s2, s3} = {1'b1, 1'b0, 1'b0};
		#5 {s1, s2, s3} = {1'b1, 1'b0, 1'b1};
		#5 {s1, s2, s3} = {1'b1, 1'b1, 1'b0};
		#5 {s1, s2, s3} = {1'b1, 1'b1, 1'b1};
		#5 $finish;
	end
endmodule