data/full_repos/permissive/143278/ivltests/pr985.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/pr985.v:12: Unsupported: Ignoring delay on this delayed statement.\n  #1 ;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module top ( ) ;



child_module #(`ADDR_DEC_W, `ADDR_DEVICE0, `ADDR_DEVICE1) my_module ( );

initial begin
  #1 ;
end

endmodule
module top ( ) ;




child_module #(`ADDR_DEC_W, `ADDR_DEVICE0, `ADDR_DEVICE1) my_module ( );

initial begin
  #1 ;
end

endmodule