data/full_repos/permissive/159891569/waveChannel.v
 line:23: before: "["
1: b'%Warning-IMPLICIT: data/full_repos/permissive/159891569/waveChannel.v:32: Signal definition not found, creating implicitly: \'posClk\'\n always @(posedge posClk) begin\n                  ^~~~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Warning-IMPLICIT: data/full_repos/permissive/159891569/waveChannel.v:39: Signal definition not found, creating implicitly: \'chanEnable\'\n                                                                        : ... Suggested alternative: \'lenEnable\'\n assign signal = (enable == 0 || chanEnable == 0 || vol == 0) ? 0 : ( samples[pos] >> (vol-1) );\n                                 ^~~~~~~~~~\n%Error: data/full_repos/permissive/159891569/waveChannel.v:31: Cannot find file containing module: \'varTimer\'\n varTimer #(12) posTimer(clk, {11\'b0 - freq, 1\'b0}, posClk);\n ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/159891569,data/full_repos/permissive/159891569/varTimer\n             data/full_repos/permissive/159891569,data/full_repos/permissive/159891569/varTimer.v\n             data/full_repos/permissive/159891569,data/full_repos/permissive/159891569/varTimer.sv\n             varTimer\n             varTimer.v\n             varTimer.sv\n             obj_dir/varTimer\n             obj_dir/varTimer.v\n             obj_dir/varTimer.sv\n%Error: data/full_repos/permissive/159891569/waveChannel.v:37: Cannot find file containing module: \'lenCounter\'\n lenCounter lc(clk256, lenLoad, trigger, lenEnable, chanEnable);\n ^~~~~~~~~~\n%Error: Exiting due to 2 error(s), 2 warning(s)\n'
module waveChannel(
	input clk, clk256, enable, 
	input [1:0] vol,
	input [5:0] lenLoad, 
	input trigger, lenEnable,
	input [10:0] freq,
	input [31:0] [3:0] samples,
	output [3:0] signal
);

	
	reg [4:0] pos;
	initial pos = 0;
	
	varTimer #(12) posTimer(clk, {11'b0 - freq, 1'b0}, posClk);
	always @(posedge posClk) begin
		pos += 1;

	end
	
	lenCounter lc(clk256, lenLoad, trigger, lenEnable, chanEnable);

	assign signal = (enable == 0 || chanEnable == 0 || vol == 0) ? 0 : ( samples[pos] >> (vol-1) );

endmodule
module waveChannel(
	input clk, clk256, enable, 
	input [1:0] vol,
	input [5:0] lenLoad, 
	input trigger, lenEnable,
	input [10:0] freq,
	input [31:0] [3:0] samples,
	output [3:0] signal
);


	
	reg [4:0] pos;
	initial pos = 0;
	
	varTimer #(12) posTimer(clk, {11'b0 - freq, 1'b0}, posClk);
	always @(posedge posClk) begin
		pos += 1;

	end
	
	lenCounter lc(clk256, lenLoad, trigger, lenEnable, chanEnable);

	assign signal = (enable == 0 || chanEnable == 0 || vol == 0) ? 0 : ( samples[pos] >> (vol-1) );

endmodule