data/full_repos/permissive/206670486/Modulos/MUX.v
 line:19: before: ")"
1: b"%Error: data/full_repos/permissive/206670486/Modulos/MUX.v:19: syntax error, unexpected ')', expecting '['\nmodule MUX_ALUSRC_FWDB (EX_ALUSrc_In,Saida_ForwardB_In,EX_ReadData2_In, EX_Saida_Ext_Sinal_In, WB_WriteData_In, MEM_ALUresult_In,Saida_Mux_FWRB_ALUSrc_Out,);\n                                                                                                                                                           ^\n%Error: data/full_repos/permissive/206670486/Modulos/MUX.v:28: syntax error, unexpected always\n  always@(*) begin\n  ^~~~~~\n%Error: Exiting due to 2 error(s)\n"
module MUX_ALUSRC_FWDB (EX_ALUSrc_In,Saida_ForwardB_In,EX_ReadData2_In, EX_Saida_Ext_Sinal_In, WB_WriteData_In, MEM_ALUresult_In,Saida_Mux_FWRB_ALUSrc_Out,);
  input[31:0]EX_ReadData2_In;
  input[31:0]EX_Saida_Ext_Sinal_In;
  input EX_ALUSrc_In;
  input[31:0]WB_WriteData_In;
  input[31:0]MEM_ALUresult_In;
  input[1:0]Saida_ForwardB_In;
  output reg[31:0]Saida_Mux_FWRB_ALUSrc_Out;

  always@(*) begin
  case(Saida_ForwardB_In)
          2'b00:
              Saida_Mux_FWRB_ALUSrc_Out = (EX_ALUSrc_In == 0) ? EX_ReadData2_In : EX_Saida_Ext_Sinal_In;
          2'b10:
              Saida_Mux_FWRB_ALUSrc_Out = MEM_ALUresult_In;
          2'b11:
              Saida_Mux_FWRB_ALUSrc_Out = WB_WriteData_In;

  endcase
  end
endmodule
module MUX_ALUSRC_FWDB (EX_ALUSrc_In,Saida_ForwardB_In,EX_ReadData2_In, EX_Saida_Ext_Sinal_In, WB_WriteData_In, MEM_ALUresult_In,Saida_Mux_FWRB_ALUSrc_Out,);

  input[31:0]EX_ReadData2_In;
  input[31:0]EX_Saida_Ext_Sinal_In;
  input EX_ALUSrc_In;
  input[31:0]WB_WriteData_In;
  input[31:0]MEM_ALUresult_In;
  input[1:0]Saida_ForwardB_In;
  output reg[31:0]Saida_Mux_FWRB_ALUSrc_Out;

  always@(*) begin
  case(Saida_ForwardB_In)
          2'b00:
              Saida_Mux_FWRB_ALUSrc_Out = (EX_ALUSrc_In == 0) ? EX_ReadData2_In : EX_Saida_Ext_Sinal_In;
          2'b10:
              Saida_Mux_FWRB_ALUSrc_Out = MEM_ALUresult_In;
          2'b11:
              Saida_Mux_FWRB_ALUSrc_Out = WB_WriteData_In;

  endcase
  end
endmodule