data/full_repos/permissive/173943530/jt_gng/modules/jt12/hdl/jt03.v
 line:73: before: "/"
1: b"%Error: data/full_repos/permissive/173943530/jt_gng/modules/jt12/hdl/jt03.v:48: Cannot find file containing module: 'jt12_top'\njt12_top #(.use_lfo(0),.use_ssg(1), .num_ch(3), .use_pcm(0), .use_lr(0)) \n^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/173943530/jt_gng/modules/jt12/hdl,data/full_repos/permissive/173943530/jt12_top\n             data/full_repos/permissive/173943530/jt_gng/modules/jt12/hdl,data/full_repos/permissive/173943530/jt12_top.v\n             data/full_repos/permissive/173943530/jt_gng/modules/jt12/hdl,data/full_repos/permissive/173943530/jt12_top.sv\n             jt12_top\n             jt12_top.v\n             jt12_top.sv\n             obj_dir/jt12_top\n             obj_dir/jt12_top.v\n             obj_dir/jt12_top.sv\n%Error: Exiting due to 1 error(s)\n"
module jt03(
    input           rst,
    input           clk,
    input           cen,
    input   [7:0]   din,
    input           addr,
    input           cs_n,
    input           wr_n,
    
    output  [7:0]   dout,
    output          irq_n,

    output          [ 7:0] psg_A,
    output          [ 7:0] psg_B,
    output          [ 7:0] psg_C,
    output  signed  [15:0] fm_snd,

    output          [ 9:0] psg_snd,    
    output  signed  [15:0] snd,
    output          snd_sample
);

jt12_top #(.use_lfo(0),.use_ssg(1), .num_ch(3), .use_pcm(0), .use_lr(0)) 
u_jt12(
    .rst            ( rst          ),
    .clk            ( clk          ),
    .cen            ( cen          ),
    .din            ( din          ),
    .addr           ( {1'b0, addr} ),
    .cs_n           ( cs_n         ),
    .wr_n           ( wr_n         ),
    
    .dout           ( dout         ),
    .irq_n          ( irq_n        ),

    .psg_A          ( psg_A        ),
    .psg_B          ( psg_B        ),
    .psg_C          ( psg_C        ),
    .psg_snd        ( psg_snd      ),    
    .fm_snd_left    ( fm_snd       ),
    .fm_snd_right   (),

    .snd_right      ( snd          ),
    .snd_left       (),
    .snd_sample     ( snd_sample   )
);

endmodule
module jt03(
    input           rst,
    input           clk,
    input           cen,
    input   [7:0]   din,
    input           addr,
    input           cs_n,
    input           wr_n,
    
    output  [7:0]   dout,
    output          irq_n,

    output          [ 7:0] psg_A,
    output          [ 7:0] psg_B,
    output          [ 7:0] psg_C,
    output  signed  [15:0] fm_snd,

    output          [ 9:0] psg_snd,    
    output  signed  [15:0] snd,
    output          snd_sample
);


jt12_top #(.use_lfo(0),.use_ssg(1), .num_ch(3), .use_pcm(0), .use_lr(0)) 
u_jt12(
    .rst            ( rst          ),
    .clk            ( clk          ),
    .cen            ( cen          ),
    .din            ( din          ),
    .addr           ( {1'b0, addr} ),
    .cs_n           ( cs_n         ),
    .wr_n           ( wr_n         ),
    
    .dout           ( dout         ),
    .irq_n          ( irq_n        ),

    .psg_A          ( psg_A        ),
    .psg_B          ( psg_B        ),
    .psg_C          ( psg_C        ),
    .psg_snd        ( psg_snd      ),    
    .fm_snd_left    ( fm_snd       ),
    .fm_snd_right   (),

    .snd_right      ( snd          ),
    .snd_left       (),
    .snd_sample     ( snd_sample   )
);

endmodule