data/full_repos/permissive/216210370/soc/gpio0.v
1: b'%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case expression, but Case expression\'s SEL generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_SW_DIR_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_SW_HW_CTRL_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_INT_FUNC_EN_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_INT_MASK_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_INT_TYPE_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_INT_POL_SEL_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_INT_STATUS_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_RAW_INT_STATUS_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_DEBOUNCE_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_INT_LEVEL_SYNC_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Warning-WIDTH: data/full_repos/permissive/216210370/soc/gpio0.v:506: Operator CASE expects 32 bits on the Case Item, but Case Item\'s VARREF \'GPIO_EXT_DATA_OFFSET\' generates 5 bits.\n                                                                    : ... In instance gpio0_sec_top.x_gpio0.x_gpio_top.U_GPIO_APBIF\n        case (paddr[5\'h6:2])\n        ^~~~\n%Error: Exiting due to 12 warning(s)\n'
module gpio0(
  gpio0_etb_trig,
  gpio_ext_porta,
  gpio_intr_flag,
  gpio_intrclk_en,
  gpio_porta_ddr,
  gpio_porta_dr,
  paddr,
  pclk,
  pclk_intr,
  penable,
  prdata,
  presetn,
  psel,
  pwdata,
  pwrite
);
input   [31:0]  gpio_ext_porta; 
input   [31:0]  paddr;          
input           pclk;           
input           pclk_intr;      
input           penable;        
input           presetn;        
input           psel;           
input   [31:0]  pwdata;         
input           pwrite;         
output  [31:0]  gpio0_etb_trig; 
output          gpio_intr_flag; 
output          gpio_intrclk_en; 
output  [31:0]  gpio_porta_ddr; 
output  [31:0]  gpio_porta_dr;  
output  [31:0]  prdata;         
wire    [31:0]  gpio0_etb_trig; 
wire    [31:0]  gpio0_prdata;   
wire    [31:0]  gpio_ext_porta; 
wire            gpio_intr_flag; 
wire            gpio_intrclk_en; 
wire    [31:0]  gpio_porta_ddr; 
wire    [31:0]  gpio_porta_dr;  
wire    [31:0]  paddr;          
wire            pclk;           
wire            pclk_intr;      
wire            penable;        
wire    [31:0]  prdata;         
wire            presetn;        
wire            psel;           
wire    [31:0]  pwdata;         
wire            pwrite;         
gpio_top  x_gpio_top (
  .dbclk           (pclk           ),
  .dbclk_rstn      (presetn        ),
  .gpio_etb_trig   (gpio0_etb_trig ),
  .gpio_in_data    (gpio_ext_porta ),
  .gpio_int_clk_en (gpio_intrclk_en),
  .gpio_int_flag   (gpio_intr_flag ),
  .gpio_out_data   (gpio_porta_dr  ),
  .gpio_out_en     (gpio_porta_ddr ),
  .paddr           (paddr[6:0]     ),
  .pclk            (pclk           ),
  .pclk_int        (pclk_intr      ),
  .penable         (penable        ),
  .prdata          (gpio0_prdata   ),
  .presetn         (presetn        ),
  .psel            (psel           ),
  .pwdata          (pwdata         ),
  .pwrite          (pwrite         ),
  .scan_mode       (1'b0           )
);
assign prdata[31:0] = gpio0_prdata[31:0];
endmodule
module gpio0(
  gpio0_etb_trig,
  gpio_ext_porta,
  gpio_intr_flag,
  gpio_intrclk_en,
  gpio_porta_ddr,
  gpio_porta_dr,
  paddr,
  pclk,
  pclk_intr,
  penable,
  prdata,
  presetn,
  psel,
  pwdata,
  pwrite
);

input   [31:0]  gpio_ext_porta; 
input   [31:0]  paddr;          
input           pclk;           
input           pclk_intr;      
input           penable;        
input           presetn;        
input           psel;           
input   [31:0]  pwdata;         
input           pwrite;         
output  [31:0]  gpio0_etb_trig; 
output          gpio_intr_flag; 
output          gpio_intrclk_en; 
output  [31:0]  gpio_porta_ddr; 
output  [31:0]  gpio_porta_dr;  
output  [31:0]  prdata;         
wire    [31:0]  gpio0_etb_trig; 
wire    [31:0]  gpio0_prdata;   
wire    [31:0]  gpio_ext_porta; 
wire            gpio_intr_flag; 
wire            gpio_intrclk_en; 
wire    [31:0]  gpio_porta_ddr; 
wire    [31:0]  gpio_porta_dr;  
wire    [31:0]  paddr;          
wire            pclk;           
wire            pclk_intr;      
wire            penable;        
wire    [31:0]  prdata;         
wire            presetn;        
wire            psel;           
wire    [31:0]  pwdata;         
wire            pwrite;         
gpio_top  x_gpio_top (
  .dbclk           (pclk           ),
  .dbclk_rstn      (presetn        ),
  .gpio_etb_trig   (gpio0_etb_trig ),
  .gpio_in_data    (gpio_ext_porta ),
  .gpio_int_clk_en (gpio_intrclk_en),
  .gpio_int_flag   (gpio_intr_flag ),
  .gpio_out_data   (gpio_porta_dr  ),
  .gpio_out_en     (gpio_porta_ddr ),
  .paddr           (paddr[6:0]     ),
  .pclk            (pclk           ),
  .pclk_int        (pclk_intr      ),
  .penable         (penable        ),
  .prdata          (gpio0_prdata   ),
  .presetn         (presetn        ),
  .psel            (psel           ),
  .pwdata          (pwdata         ),
  .pwrite          (pwrite         ),
  .scan_mode       (1'b0           )
);
assign prdata[31:0] = gpio0_prdata[31:0];
endmodule