data/full_repos/permissive/135820056/rtl/jt12/jt12_eg_comb.v
 line:139: before: "/"
1: b"%Error: data/full_repos/permissive/135820056/rtl/jt12/jt12_eg_comb.v:76: Cannot find file containing module: 'jt12_eg_ctrl'\njt12_eg_ctrl u_ctrl(    \n^~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/135820056/rtl/jt12,data/full_repos/permissive/135820056/jt12_eg_ctrl\n             data/full_repos/permissive/135820056/rtl/jt12,data/full_repos/permissive/135820056/jt12_eg_ctrl.v\n             data/full_repos/permissive/135820056/rtl/jt12,data/full_repos/permissive/135820056/jt12_eg_ctrl.sv\n             jt12_eg_ctrl\n             jt12_eg_ctrl.v\n             jt12_eg_ctrl.sv\n             obj_dir/jt12_eg_ctrl\n             obj_dir/jt12_eg_ctrl.v\n             obj_dir/jt12_eg_ctrl.sv\n%Error: data/full_repos/permissive/135820056/rtl/jt12/jt12_eg_comb.v:101: Cannot find file containing module: 'jt12_eg_step'\njt12_eg_step u_step(\n^~~~~~~~~~~~\n%Error: data/full_repos/permissive/135820056/rtl/jt12/jt12_eg_comb.v:117: Cannot find file containing module: 'jt12_eg_pure'\njt12_eg_pure u_pure(\n^~~~~~~~~~~~\n%Error: data/full_repos/permissive/135820056/rtl/jt12/jt12_eg_comb.v:129: Cannot find file containing module: 'jt12_eg_final'\njt12_eg_final u_final(\n^~~~~~~~~~~~~\n%Error: Exiting due to 4 error(s)\n"
module jt12_eg_comb(
    input               keyon_now,
    input               keyoff_now,
    input       [2:0]   state_in,
    input       [9:0]   eg_in,

    input       [4:0]   arate,
    input       [4:0]   rate1,
    input       [4:0]   rate2,
    input       [3:0]   rrate,
    input       [3:0]   sl,

    input               ssg_en,
    input       [2:0]   ssg_eg,

    input               ssg_inv_in,
    output          ssg_inv_out,

    output  [4:0]   base_rate,
    output  [2:0]   state_next,
    output          pg_rst,


    input           step_attack,
    input [ 4:0]    step_rate_in,
    input [ 4:0]    keycode,
    input [14:0]    eg_cnt,
    input           cnt_in,
    input [ 1:0]    ks,
    output          cnt_lsb,
    output        step,
    output  [5:0] step_rate_out,
    output          sum_up_out,


    input           pure_attack,
    input           pure_step,
    input [ 5:1]    pure_rate,
    input           pure_ssg_en,
    input [ 9:0]    pure_eg_in,
    output   [9:0]  pure_eg_out,
    input           sum_up_in,


    input [ 6:0]    lfo_mod,
    input           amsen,
    input [ 1:0]    ams,
    input [ 6:0]    tl,
    input [ 9:0]    final_eg_in,
    input           final_ssg_inv,
    output  [9:0] final_eg_out
);


jt12_eg_ctrl u_ctrl(    
    .keyon_now      ( keyon_now     ),
    .keyoff_now     ( keyoff_now    ),
    .state_in       ( state_in      ),
    .eg             ( eg_in         ),

    .arate          ( arate         ),
    .rate1          ( rate1         ),
    .rate2          ( rate2         ),
    .rrate          ( rrate         ),
    .sl             ( sl            ),

    .ssg_en         ( ssg_en        ),
    .ssg_eg         ( ssg_eg        ),

    .ssg_inv_in     ( ssg_inv_in    ),
    .ssg_inv_out    ( ssg_inv_out   ),

    .base_rate      ( base_rate     ),
    .state_next     ( state_next    ),
    .pg_rst         ( pg_rst        )
);



jt12_eg_step u_step(
    .attack     ( step_attack   ),
    .base_rate  ( step_rate_in  ),
    .keycode    ( keycode       ),
    .eg_cnt     ( eg_cnt        ),
    .cnt_in     ( cnt_in        ),
    .ks         ( ks            ),
    .cnt_lsb    ( cnt_lsb       ),
    .step       ( step          ),
    .rate       ( step_rate_out ),
    .sum_up     ( sum_up_out    )
);



wire [9:0] egin, egout;
jt12_eg_pure u_pure(
    .attack ( pure_attack   ),
    .step   ( pure_step     ),
    .rate   ( pure_rate     ),
    .ssg_en ( pure_ssg_en   ),
    .eg_in  ( pure_eg_in    ),
    .eg_pure( pure_eg_out   ),
    .sum_up ( sum_up_in     )
);



jt12_eg_final u_final(
    .lfo_mod    ( lfo_mod       ),
    .amsen      ( amsen         ),
    .ams        ( ams           ),
    .tl         ( tl            ),
    .ssg_inv    ( final_ssg_inv ),
    .eg_pure_in ( final_eg_in   ),
    .eg_limited ( final_eg_out  )
);

endmodule
module jt12_eg_comb(
    input               keyon_now,
    input               keyoff_now,
    input       [2:0]   state_in,
    input       [9:0]   eg_in,

    input       [4:0]   arate,
    input       [4:0]   rate1,
    input       [4:0]   rate2,
    input       [3:0]   rrate,
    input       [3:0]   sl,

    input               ssg_en,
    input       [2:0]   ssg_eg,

    input               ssg_inv_in,
    output          ssg_inv_out,

    output  [4:0]   base_rate,
    output  [2:0]   state_next,
    output          pg_rst,


    input           step_attack,
    input [ 4:0]    step_rate_in,
    input [ 4:0]    keycode,
    input [14:0]    eg_cnt,
    input           cnt_in,
    input [ 1:0]    ks,
    output          cnt_lsb,
    output        step,
    output  [5:0] step_rate_out,
    output          sum_up_out,


    input           pure_attack,
    input           pure_step,
    input [ 5:1]    pure_rate,
    input           pure_ssg_en,
    input [ 9:0]    pure_eg_in,
    output   [9:0]  pure_eg_out,
    input           sum_up_in,


    input [ 6:0]    lfo_mod,
    input           amsen,
    input [ 1:0]    ams,
    input [ 6:0]    tl,
    input [ 9:0]    final_eg_in,
    input           final_ssg_inv,
    output  [9:0] final_eg_out
);



jt12_eg_ctrl u_ctrl(    
    .keyon_now      ( keyon_now     ),
    .keyoff_now     ( keyoff_now    ),
    .state_in       ( state_in      ),
    .eg             ( eg_in         ),

    .arate          ( arate         ),
    .rate1          ( rate1         ),
    .rate2          ( rate2         ),
    .rrate          ( rrate         ),
    .sl             ( sl            ),

    .ssg_en         ( ssg_en        ),
    .ssg_eg         ( ssg_eg        ),

    .ssg_inv_in     ( ssg_inv_in    ),
    .ssg_inv_out    ( ssg_inv_out   ),

    .base_rate      ( base_rate     ),
    .state_next     ( state_next    ),
    .pg_rst         ( pg_rst        )
);



jt12_eg_step u_step(
    .attack     ( step_attack   ),
    .base_rate  ( step_rate_in  ),
    .keycode    ( keycode       ),
    .eg_cnt     ( eg_cnt        ),
    .cnt_in     ( cnt_in        ),
    .ks         ( ks            ),
    .cnt_lsb    ( cnt_lsb       ),
    .step       ( step          ),
    .rate       ( step_rate_out ),
    .sum_up     ( sum_up_out    )
);



wire [9:0] egin, egout;
jt12_eg_pure u_pure(
    .attack ( pure_attack   ),
    .step   ( pure_step     ),
    .rate   ( pure_rate     ),
    .ssg_en ( pure_ssg_en   ),
    .eg_in  ( pure_eg_in    ),
    .eg_pure( pure_eg_out   ),
    .sum_up ( sum_up_in     )
);



jt12_eg_final u_final(
    .lfo_mod    ( lfo_mod       ),
    .amsen      ( amsen         ),
    .ams        ( ams           ),
    .tl         ( tl            ),
    .ssg_inv    ( final_ssg_inv ),
    .eg_pure_in ( final_eg_in   ),
    .eg_limited ( final_eg_out  )
);

endmodule