data/full_repos/permissive/119107706/Xilinx Project/SourceCode/Multication/floating_point/flot_mul_pipe.v
 line:27: before: "integer"
1: b'%Error: Cannot find file containing module: Project/SourceCode/Multication/floating_point,data/full_repos/permissive/119107706\n        ... Looked in:\n             data/full_repos/permissive/119107706/Xilinx/Project/SourceCode/Multication/floating_point,data/full_repos/permissive/119107706\n             data/full_repos/permissive/119107706/Xilinx/Project/SourceCode/Multication/floating_point,data/full_repos/permissive/119107706.v\n             data/full_repos/permissive/119107706/Xilinx/Project/SourceCode/Multication/floating_point,data/full_repos/permissive/119107706.sv\n             Project/SourceCode/Multication/floating_point,data/full_repos/permissive/119107706\n             Project/SourceCode/Multication/floating_point,data/full_repos/permissive/119107706.v\n             Project/SourceCode/Multication/floating_point,data/full_repos/permissive/119107706.sv\n             obj_dir/Project/SourceCode/Multication/floating_point,data/full_repos/permissive/119107706\n             obj_dir/Project/SourceCode/Multication/floating_point,data/full_repos/permissive/119107706.v\n             obj_dir/Project/SourceCode/Multication/floating_point,data/full_repos/permissive/119107706.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/119107706/Xilinx\n%Error: Cannot find file containing module: Project/SourceCode/Multication/floating_point/flot_mul_pipe.v\n%Error: Exiting due to 3 error(s)\n'
module flot_mul_pipe
				#(parameter 		  WIDTH = 64,
										  WIDTH_exp = 11,
										  WIDTH_mat = 52)
				( input 				  CLK,
										  nRST,
				  input [WIDTH-1:0] OP1,
										  OP2,
				  input 			 exce_in,
				  output reg 	exce_out,
				  output [WIDTH_mat+WIDTH_exp:0] result);


function integer log2;
	input integer n;
	begin
		log2 = 0;
		while (2**log2<n) begin
			log2 = log2 + 1;
		end
	end
endfunction





reg [WIDTH_exp:0]   sum_exp, sum_exp_0, sum_exp_1, sum_exp_2;
reg [WIDTH_exp-1:0] BIAS = (2**(WIDTH_exp-1))-1;




localparam WIDTH_mm  = (WIDTH_mat+1)*2;
localparam WIDTH_poi = log2(WIDTH_mm);
reg [WIDTH_mm-1 :0]  mul_mat, mul_mat_0, mul_mat_1, mul_mat_2;
reg [WIDTH_poi-1:0] 	pointer;
reg [WIDTH_exp  :0]  tmp_exp;
reg 						exception;

reg [WIDTH_mm-1 :0]  tmp_mat;
reg [WIDTH_mat  :0]  tmp_mat_r;

reg [WIDTH_exp-1:0]  tmp_exp_r;
reg sign_L;





always @(posedge CLK) begin
		if(!nRST) begin
			sum_exp  <= 0;
			mul_mat	<= 0;
			sum_exp_0 <= 0;
			mul_mat_0 <= 0;
			sign_L <= 0;

		end else begin

			sum_exp_0 <= OP1[WIDTH-2:WIDTH-(WIDTH_exp+1)] + OP2[WIDTH-2:WIDTH-(WIDTH_exp+1)] - BIAS;
			sum_exp <= sum_exp_0;


			(* USE_dsp48 = "no" *)
			mul_mat_0 <= {1'b1, OP1[WIDTH_mat-1:0]} * {1'b1, OP2[WIDTH_mat-1:0]};
			mul_mat <= mul_mat_0;


			if(OP1[WIDTH-1]^OP2[WIDTH-1])
				sign_L <= 1'b1;
			else
				sign_L <= 1'b0;
						
		end
end






always @(posedge CLK) begin
		if(!nRST) begin
			tmp_exp  <= 0;
			tmp_mat	<= 0;
		end else begin


			if (mul_mat[WIDTH_mm-1] == 1'b1) begin
				tmp_exp <= sum_exp[WIDTH_exp-1:0] + 1;
				tmp_mat <= mul_mat;
			end
			else begin
				tmp_exp <= sum_exp[WIDTH_exp-1:0];
				tmp_mat <= mul_mat << 1;	
			end
		end
end





always @ (posedge CLK) begin



	if(!nRST) begin
		tmp_exp_r <= 0;
		tmp_exp_r <= 0;
	end
	else begin
		if (tmp_mat[WIDTH_mm-(WIDTH_mat+1)-1]==1'b1) begin
			if(tmp_mat[WIDTH_mm-(WIDTH_mat+1)-2:0]!=0) begin
				tmp_mat_r <= tmp_mat[WIDTH_mm-1:WIDTH_mm-(WIDTH_mat+1)] + 1;
			end
			else begin
				tmp_mat_r <= tmp_mat[WIDTH_mm-1:WIDTH_mm-(WIDTH_mat+1)];
			end
		end
		else begin
			tmp_mat_r <= tmp_mat[WIDTH_mm-1:WIDTH_mm-(WIDTH_mat+1)];
		end

		tmp_exp_r <= tmp_exp[WIDTH_exp-1:0];	
	end

end




always @(posedge CLK) begin
	if(!nRST)
		exce_out <= 1'b0;
	else if(buffer_exce_in[PIP_exce_in]==1) 
		exce_out <= 1'b1;
	else
		exce_out <= 1'b0;
end



	localparam PIP_sign_L = 3;
	localparam PIP_exce_in = 5;
	
	localparam PIP_result = 2;



	reg [WIDTH-1:0] buffer_result [1: PIP_result];
	reg [1:PIP_exce_in] buffer_exce_in;
	reg [1:PIP_sign_L] buffer_sign_L;

	integer i;
	
	always @(posedge CLK) begin
		if (!nRST) begin
			for (i=1; i<=PIP_result; i=i+1)
				buffer_result[i] <= 0;

			for (i=1; i<=PIP_sign_L; i=i+1)
				buffer_sign_L[i] <= 0;

			for (i=1; i<=PIP_exce_in; i=i+1)
				buffer_exce_in[i] <= 0;

		end else begin
			buffer_result[1] <= {buffer_sign_L[PIP_sign_L], tmp_exp_r, tmp_mat_r[WIDTH_mat-1:0]};
			for (i=2; i<=PIP_result; i=i+1)
				buffer_result[i] <= buffer_result[i-1];

			buffer_sign_L[1] <= sign_L;
			for (i=2; i<=PIP_sign_L; i=i+1)
				buffer_sign_L[i] <= buffer_sign_L[i-1];

			buffer_exce_in[1] <= exce_in;
			for (i=2; i<=PIP_exce_in; i=i+1)
				buffer_exce_in[i] <= buffer_exce_in[i-1];
		end
	end

	assign result = buffer_result[PIP_result];






endmodule
module flot_mul_pipe
				#(parameter 		  WIDTH = 64,
										  WIDTH_exp = 11,
										  WIDTH_mat = 52)
				( input 				  CLK,
										  nRST,
				  input [WIDTH-1:0] OP1,
										  OP2,
				  input 			 exce_in,
				  output reg 	exce_out,
				  output [WIDTH_mat+WIDTH_exp:0] result);



function integer log2;
	input integer n;
	begin
		log2 = 0;
		while (2**log2<n) begin
			log2 = log2 + 1;
		end
	end
endfunction





reg [WIDTH_exp:0]   sum_exp, sum_exp_0, sum_exp_1, sum_exp_2;
reg [WIDTH_exp-1:0] BIAS = (2**(WIDTH_exp-1))-1;




localparam WIDTH_mm  = (WIDTH_mat+1)*2;
localparam WIDTH_poi = log2(WIDTH_mm);
reg [WIDTH_mm-1 :0]  mul_mat, mul_mat_0, mul_mat_1, mul_mat_2;
reg [WIDTH_poi-1:0] 	pointer;
reg [WIDTH_exp  :0]  tmp_exp;
reg 						exception;

reg [WIDTH_mm-1 :0]  tmp_mat;
reg [WIDTH_mat  :0]  tmp_mat_r;

reg [WIDTH_exp-1:0]  tmp_exp_r;
reg sign_L;





always @(posedge CLK) begin
		if(!nRST) begin
			sum_exp  <= 0;
			mul_mat	<= 0;
			sum_exp_0 <= 0;
			mul_mat_0 <= 0;
			sign_L <= 0;

		end else begin

			sum_exp_0 <= OP1[WIDTH-2:WIDTH-(WIDTH_exp+1)] + OP2[WIDTH-2:WIDTH-(WIDTH_exp+1)] - BIAS;
			sum_exp <= sum_exp_0;


			(* USE_dsp48 = "no" *)
			mul_mat_0 <= {1'b1, OP1[WIDTH_mat-1:0]} * {1'b1, OP2[WIDTH_mat-1:0]};
			mul_mat <= mul_mat_0;


			if(OP1[WIDTH-1]^OP2[WIDTH-1])
				sign_L <= 1'b1;
			else
				sign_L <= 1'b0;
						
		end
end






always @(posedge CLK) begin
		if(!nRST) begin
			tmp_exp  <= 0;
			tmp_mat	<= 0;
		end else begin


			if (mul_mat[WIDTH_mm-1] == 1'b1) begin
				tmp_exp <= sum_exp[WIDTH_exp-1:0] + 1;
				tmp_mat <= mul_mat;
			end
			else begin
				tmp_exp <= sum_exp[WIDTH_exp-1:0];
				tmp_mat <= mul_mat << 1;	
			end
		end
end





always @ (posedge CLK) begin



	if(!nRST) begin
		tmp_exp_r <= 0;
		tmp_exp_r <= 0;
	end
	else begin
		if (tmp_mat[WIDTH_mm-(WIDTH_mat+1)-1]==1'b1) begin
			if(tmp_mat[WIDTH_mm-(WIDTH_mat+1)-2:0]!=0) begin
				tmp_mat_r <= tmp_mat[WIDTH_mm-1:WIDTH_mm-(WIDTH_mat+1)] + 1;
			end
			else begin
				tmp_mat_r <= tmp_mat[WIDTH_mm-1:WIDTH_mm-(WIDTH_mat+1)];
			end
		end
		else begin
			tmp_mat_r <= tmp_mat[WIDTH_mm-1:WIDTH_mm-(WIDTH_mat+1)];
		end

		tmp_exp_r <= tmp_exp[WIDTH_exp-1:0];	
	end

end




always @(posedge CLK) begin
	if(!nRST)
		exce_out <= 1'b0;
	else if(buffer_exce_in[PIP_exce_in]==1) 
		exce_out <= 1'b1;
	else
		exce_out <= 1'b0;
end



	localparam PIP_sign_L = 3;
	localparam PIP_exce_in = 5;
	
	localparam PIP_result = 2;



	reg [WIDTH-1:0] buffer_result [1: PIP_result];
	reg [1:PIP_exce_in] buffer_exce_in;
	reg [1:PIP_sign_L] buffer_sign_L;

	integer i;
	
	always @(posedge CLK) begin
		if (!nRST) begin
			for (i=1; i<=PIP_result; i=i+1)
				buffer_result[i] <= 0;

			for (i=1; i<=PIP_sign_L; i=i+1)
				buffer_sign_L[i] <= 0;

			for (i=1; i<=PIP_exce_in; i=i+1)
				buffer_exce_in[i] <= 0;

		end else begin
			buffer_result[1] <= {buffer_sign_L[PIP_sign_L], tmp_exp_r, tmp_mat_r[WIDTH_mat-1:0]};
			for (i=2; i<=PIP_result; i=i+1)
				buffer_result[i] <= buffer_result[i-1];

			buffer_sign_L[1] <= sign_L;
			for (i=2; i<=PIP_sign_L; i=i+1)
				buffer_sign_L[i] <= buffer_sign_L[i-1];

			buffer_exce_in[1] <= exce_in;
			for (i=2; i<=PIP_exce_in; i=i+1)
				buffer_exce_in[i] <= buffer_exce_in[i-1];
		end
	end

	assign result = buffer_result[PIP_result];






endmodule