data/full_repos/permissive/122125962/floodcasting/verilog/ahb_int_fifo.v
1: b'%Warning-WIDTH: data/full_repos/permissive/122125962/floodcasting/verilog/ahb_int_fifo.v:160: Logical Operator IF expects 1 bit on the If, but If\'s VARREF \'audio_cnt\' generates 11 bits.\n                                                                                            : ... In instance ahb_int_fifo\n    if (audio_cnt)\n    ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/122125962/floodcasting/verilog/ahb_int_fifo.v:169: Cannot find file containing module: \'audio_dac_write\'\naudio_dac_write dac0(\n^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/122125962/floodcasting/verilog,data/full_repos/permissive/122125962/audio_dac_write\n             data/full_repos/permissive/122125962/floodcasting/verilog,data/full_repos/permissive/122125962/audio_dac_write.v\n             data/full_repos/permissive/122125962/floodcasting/verilog,data/full_repos/permissive/122125962/audio_dac_write.sv\n             audio_dac_write\n             audio_dac_write.v\n             audio_dac_write.sv\n             obj_dir/audio_dac_write\n             obj_dir/audio_dac_write.v\n             obj_dir/audio_dac_write.sv\n%Error: data/full_repos/permissive/122125962/floodcasting/verilog/ahb_int_fifo.v:189: Cannot find file containing module: \'fifo128x32\'\nfifo128x32 f0(\n^~~~~~~~~~\n%Error: Exiting due to 2 error(s), 1 warning(s)\n'
function integer log2;
	input [31:0] value;
	for (log2=0; value>0; log2=log2+1)
	value = value>>1;
endfunction
function integer log2;

	input [31:0] value;
	for (log2=0; value>0; log2=log2+1)
	value = value>>1;
endfunction