data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v
1: b"%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:14: Cannot find file containing module: 'nextPC'\n nextPC P(PC,PCnext,clk);\n ^~~~~~\n        ... Looked in:\n             data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files,data/full_repos/permissive/159823067/nextPC\n             data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files,data/full_repos/permissive/159823067/nextPC.v\n             data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files,data/full_repos/permissive/159823067/nextPC.sv\n             nextPC\n             nextPC.v\n             nextPC.sv\n             obj_dir/nextPC\n             obj_dir/nextPC.v\n             obj_dir/nextPC.sv\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:16: Cannot find file containing module: 'adder32bit'\n adder32bit PCPLUS4(PCplusFour,PCnext,32'd1);\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:18: Cannot find file containing module: 'signExtend'\n signExtend Sign(instruction[15:0],signExtended);\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:20: Cannot find file containing module: 'zeroExtend'\n zeroExtend ZE(instruction[15:0],zeroExtended);\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:22: Cannot find file containing module: 'adder32bit'\n adder32bit ALSL(signExtAdded,PCplusFour,signExtended);\n ^~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:24: Cannot find file containing module: 'jumpedAddress'\n jumpedAddress JMP(JumpTarget,instruction[25:0]);\n ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:26: Cannot find file containing module: 'control_unit'\n control_unit CU(instruction[31:26],RegDst,MemRead,MemtoReg,ALUOp1,ALUOp0,MemWrite,ALUSrc,RegWrite,Branch,jumpSignal,andi,addiu,ori);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:30: Cannot find file containing module: 'allmuxer2to1'\n allmuxer2to1 JJ(tempPC,signExtAdded,PCplusFour,Branched);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:32: Cannot find file containing module: 'allmuxer2to1'\n allmuxer2to1 JB(PC,JumpTarget,tempPC,jumpSignal);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:34: Cannot find file containing module: 'mux2to1'\n mux2to1 REGDEST0(RegDstRes[0],instruction[11],instruction[16],RegDst);\n ^~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:35: Cannot find file containing module: 'mux2to1'\n mux2to1 REGDEST1(RegDstRes[1],instruction[12],instruction[17],RegDst);\n ^~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:36: Cannot find file containing module: 'mux2to1'\n mux2to1 REGDEST2(RegDstRes[2],instruction[13],instruction[18],RegDst);\n ^~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:37: Cannot find file containing module: 'mux2to1'\n mux2to1 REGDEST3(RegDstRes[3],instruction[14],instruction[19],RegDst);\n ^~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:38: Cannot find file containing module: 'mux2to1'\n mux2to1 REGDEST4(RegDstRes[4],instruction[15],instruction[20],RegDst);\n ^~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:40: Cannot find file containing module: 'mips_registers'\n mips_registers Reg(A, B, result, instruction[25:21], instruction[20:16], RegDstRes, RegWrite, clk );  \n ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:42: Cannot find file containing module: 'alu_control_unit'\n alu_control_unit ALUCU(ALUselector,instruction[5:0],ALUOp1,ALUOp0,andi,addiu,ori);   \n ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:44: Cannot find file containing module: 'shamt32bit'\n shamt32bit Sham(shamtResult, instruction[10:6]);  \n ^~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:48: Cannot find file containing module: 'allmuxer2to1'\n allmuxer2to1 M0(shiftResA, B, A, ShamtSelector);     \n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:49: Cannot find file containing module: 'allmuxer2to1'\n allmuxer2to1 M2(shiftResB, shamtResult, B, ShamtSelector);  \n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:53: Cannot find file containing module: 'allmuxer2to1'\n allmuxer2to1 SignZero(SgZr,zeroExtended,signExtended,SignorZero);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:54: Cannot find file containing module: 'allmuxer2to1'\n allmuxer2to1 RI(RTypeImm,SgZr,shiftResB,ALUSrc);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:56: Cannot find file containing module: 'alu32'\n alu32 ALU32(ALUselector[2], ALUselector[1], ALUselector[0], shiftResA, RTypeImm, tempResult, zero, ovf);  \n ^~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:58: Cannot find file containing module: 'buffer32bit'\n buffer32bit S(sltuResult, tempResult[31]);  \n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:65: Cannot find file containing module: 'allmuxer2to1'\n allmuxer2to1 M1(ALUResult, sltuResult, tempResult, sltuSgn);  \n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:67: Cannot find file containing module: 'mips_memory'\n mips_memory MM(ALUResult, shiftResB, MemOut, MemWrite, MemRead, clk);\n ^~~~~~~~~~~\n%Error: data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_single_cycle.v:69: Cannot find file containing module: 'allmuxer2to1'\n allmuxer2to1 RRR(result,MemOut,ALUResult,MemtoReg);\n ^~~~~~~~~~~~\n%Error: Exiting due to 26 error(s)\n"
module mips32_single_cycle(instruction, result, clk, zero, ovf, jumpSignal, Branched, MemRead, MemWrite, RegWrite, RegDst, MemtoReg, ALUSrc, ALUselector);
	
	input [31:0] instruction;
	input clk;
	output [31:0] result;
	output zero, ovf, jumpSignal, Branched, MemRead, MemWrite, RegWrite, RegDst, MemtoReg, ALUSrc;
	output [2:0] ALUselector;
	wire [31:0] A, B, sltuResult, tempResult, shamtResult, shiftResA, shiftResB, signExtended, ALUResult;
	wire [31:0] MemOut, signExtAdded, tempPC, PC, PCnext, PCplusFour, RTypeImm, JumpTarget, zeroExtended, SgZr;
	wire [4:0] RegDstRes;
	wire ShamtSelector, ShamtXor, Branch, andi, addiu, ori, NI1, NI2, NI4, sltuSgn, SignorZero;
	wire ALUOp1,ALUOp0;
	
	nextPC P(PC,PCnext,clk);
			
	adder32bit PCPLUS4(PCplusFour,PCnext,32'd1);
		
	signExtend Sign(instruction[15:0],signExtended);
	
	zeroExtend ZE(instruction[15:0],zeroExtended);
		
	adder32bit ALSL(signExtAdded,PCplusFour,signExtended);
	
	jumpedAddress JMP(JumpTarget,instruction[25:0]);

	control_unit CU(instruction[31:26],RegDst,MemRead,MemtoReg,ALUOp1,ALUOp0,MemWrite,ALUSrc,RegWrite,Branch,jumpSignal,andi,addiu,ori);
	
	and BB(Branched,Branch,zero);

	allmuxer2to1 JJ(tempPC,signExtAdded,PCplusFour,Branched);
	
	allmuxer2to1 JB(PC,JumpTarget,tempPC,jumpSignal);
	
	mux2to1 REGDEST0(RegDstRes[0],instruction[11],instruction[16],RegDst);
	mux2to1 REGDEST1(RegDstRes[1],instruction[12],instruction[17],RegDst);
	mux2to1 REGDEST2(RegDstRes[2],instruction[13],instruction[18],RegDst);
	mux2to1 REGDEST3(RegDstRes[3],instruction[14],instruction[19],RegDst);
	mux2to1 REGDEST4(RegDstRes[4],instruction[15],instruction[20],RegDst);
	
	mips_registers Reg(A, B, result, instruction[25:21], instruction[20:16], RegDstRes, RegWrite, clk );
		
	alu_control_unit ALUCU(ALUselector,instruction[5:0],ALUOp1,ALUOp0,andi,addiu,ori);
	
	shamt32bit Sham(shamtResult, instruction[10:6]);
	
	xor ShamtX(ShamtXor, ALUselector[0], ALUselector[1]);
	and ShamtAnd(ShamtSelector, ShamtXor, ALUselector[2]);
	allmuxer2to1 M0(shiftResA, B, A, ShamtSelector);
	allmuxer2to1 M2(shiftResB, shamtResult, B, ShamtSelector);
	
	or SZ(SignorZero, andi, ori);
	
	allmuxer2to1 SignZero(SgZr,zeroExtended,signExtended,SignorZero);
	allmuxer2to1 RI(RTypeImm,SgZr,shiftResB,ALUSrc);
	
	alu32 ALU32(ALUselector[2], ALUselector[1], ALUselector[0], shiftResA, RTypeImm, tempResult, zero, ovf);
	
	buffer32bit S(sltuResult, tempResult[31]);
	
	not I1(NI1,instruction[1]);
	not I2(NI2,instruction[2]);
	not I4(NI4,instruction[4]);
	and sltuSS(sltuSgn,instruction[0],NI1,NI2,instruction[3],NI4,instruction[5]);
	
	allmuxer2to1 M1(ALUResult, sltuResult, tempResult, sltuSgn);
	
	mips_memory MM(ALUResult, shiftResB, MemOut, MemWrite, MemRead, clk);
	
	allmuxer2to1 RRR(result,MemOut,ALUResult,MemtoReg);
	
endmodule
module mips32_single_cycle(instruction, result, clk, zero, ovf, jumpSignal, Branched, MemRead, MemWrite, RegWrite, RegDst, MemtoReg, ALUSrc, ALUselector);

	
	input [31:0] instruction;
	input clk;
	output [31:0] result;
	output zero, ovf, jumpSignal, Branched, MemRead, MemWrite, RegWrite, RegDst, MemtoReg, ALUSrc;
	output [2:0] ALUselector;
	wire [31:0] A, B, sltuResult, tempResult, shamtResult, shiftResA, shiftResB, signExtended, ALUResult;
	wire [31:0] MemOut, signExtAdded, tempPC, PC, PCnext, PCplusFour, RTypeImm, JumpTarget, zeroExtended, SgZr;
	wire [4:0] RegDstRes;
	wire ShamtSelector, ShamtXor, Branch, andi, addiu, ori, NI1, NI2, NI4, sltuSgn, SignorZero;
	wire ALUOp1,ALUOp0;
	
	nextPC P(PC,PCnext,clk);
			
	adder32bit PCPLUS4(PCplusFour,PCnext,32'd1);
		
	signExtend Sign(instruction[15:0],signExtended);
	
	zeroExtend ZE(instruction[15:0],zeroExtended);
		
	adder32bit ALSL(signExtAdded,PCplusFour,signExtended);
	
	jumpedAddress JMP(JumpTarget,instruction[25:0]);

	control_unit CU(instruction[31:26],RegDst,MemRead,MemtoReg,ALUOp1,ALUOp0,MemWrite,ALUSrc,RegWrite,Branch,jumpSignal,andi,addiu,ori);
	
	and BB(Branched,Branch,zero);

	allmuxer2to1 JJ(tempPC,signExtAdded,PCplusFour,Branched);
	
	allmuxer2to1 JB(PC,JumpTarget,tempPC,jumpSignal);
	
	mux2to1 REGDEST0(RegDstRes[0],instruction[11],instruction[16],RegDst);
	mux2to1 REGDEST1(RegDstRes[1],instruction[12],instruction[17],RegDst);
	mux2to1 REGDEST2(RegDstRes[2],instruction[13],instruction[18],RegDst);
	mux2to1 REGDEST3(RegDstRes[3],instruction[14],instruction[19],RegDst);
	mux2to1 REGDEST4(RegDstRes[4],instruction[15],instruction[20],RegDst);
	
	mips_registers Reg(A, B, result, instruction[25:21], instruction[20:16], RegDstRes, RegWrite, clk );
		
	alu_control_unit ALUCU(ALUselector,instruction[5:0],ALUOp1,ALUOp0,andi,addiu,ori);
	
	shamt32bit Sham(shamtResult, instruction[10:6]);
	
	xor ShamtX(ShamtXor, ALUselector[0], ALUselector[1]);
	and ShamtAnd(ShamtSelector, ShamtXor, ALUselector[2]);
	allmuxer2to1 M0(shiftResA, B, A, ShamtSelector);
	allmuxer2to1 M2(shiftResB, shamtResult, B, ShamtSelector);
	
	or SZ(SignorZero, andi, ori);
	
	allmuxer2to1 SignZero(SgZr,zeroExtended,signExtended,SignorZero);
	allmuxer2to1 RI(RTypeImm,SgZr,shiftResB,ALUSrc);
	
	alu32 ALU32(ALUselector[2], ALUselector[1], ALUselector[0], shiftResA, RTypeImm, tempResult, zero, ovf);
	
	buffer32bit S(sltuResult, tempResult[31]);
	
	not I1(NI1,instruction[1]);
	not I2(NI2,instruction[2]);
	not I4(NI4,instruction[4]);
	and sltuSS(sltuSgn,instruction[0],NI1,NI2,instruction[3],NI4,instruction[5]);
	
	allmuxer2to1 M1(ALUResult, sltuResult, tempResult, sltuSgn);
	
	mips_memory MM(ALUResult, shiftResB, MemOut, MemWrite, MemRead, clk);
	
	allmuxer2to1 RRR(result,MemOut,ALUResult,MemtoReg);
	
endmodule