data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv
Syntax Error
1: b'%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:202: Operator EQ expects 32 bits on the RHS, but RHS\'s VARREF \'shift_amt\' generates 6 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n        if(inn == shift_amt) begin\n               ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:214: Operator EQ expects 32 bits on the RHS, but RHS\'s VARREF \'shift_amt\' generates 6 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n        if(inn == shift_amt) begin\n               ^~\n%Error: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:222: Cannot find file containing module: \'FIFO\'\nFIFO#(\n^~~~\n        ... Looked in:\n             data/full_repos/permissive/160991228/src/hdl/GACTX,data/full_repos/permissive/160991228/FIFO\n             data/full_repos/permissive/160991228/src/hdl/GACTX,data/full_repos/permissive/160991228/FIFO.v\n             data/full_repos/permissive/160991228/src/hdl/GACTX,data/full_repos/permissive/160991228/FIFO.sv\n             FIFO\n             FIFO.v\n             FIFO.sv\n             obj_dir/FIFO\n             obj_dir/FIFO.v\n             obj_dir/FIFO.sv\n%Error: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:236: Cannot find file containing module: \'FIFO\'\nFIFO#(\n^~~~\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:266: Operator ASSIGNDLY expects 512 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                data2 <= {C_M_AXI_DATA_WIDTH{1\'b0}};\n                      ^~\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:267: Operator ASSIGNDLY expects 512 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                data_reg <= {C_M_AXI_DATA_WIDTH{1\'b0}};\n                         ^~\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:284: Operator ASSIGNDLY expects 6 bits on the Assign RHS, but Assign RHS\'s AND generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                    right_shift_num <= (ref_off & MASK);\n                                    ^~\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:295: Operator SUB expects 32 bits on the RHS, but RHS\'s VARREF \'right_shift_num\' generates 6 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                left_shift_num <= DATA_WIDTH_BYTE - right_shift_num;\n                                                  ^\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:295: Operator ASSIGNDLY expects 6 bits on the Assign RHS, but Assign RHS\'s SUB generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                left_shift_num <= DATA_WIDTH_BYTE - right_shift_num;\n                               ^~\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:328: Operator EQ expects 7 bits on the LHS, but LHS\'s VARREF \'right_shift_num\' generates 6 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                if(right_shift_num == 7\'d0) begin\n                                   ^~\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:353: Operator ASSIGNDLY expects 512 bits on the Assign RHS, but Assign RHS\'s REPLICATE generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                data2 <= {C_M_AXI_DATA_WIDTH{1\'b0}};\n                      ^~\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:362: Operator ASSIGNDLY expects 6 bits on the Assign RHS, but Assign RHS\'s AND generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                right_shift_num <= (query_off & MASK);\n                                ^~\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:367: Operator SUB expects 32 bits on the RHS, but RHS\'s VARREF \'right_shift_num\' generates 6 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                left_shift_num <= DATA_WIDTH_BYTE - right_shift_num;\n                                                  ^\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:367: Operator ASSIGNDLY expects 6 bits on the Assign RHS, but Assign RHS\'s SUB generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                left_shift_num <= DATA_WIDTH_BYTE - right_shift_num;\n                               ^~\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:399: Operator EQ expects 7 bits on the LHS, but LHS\'s VARREF \'right_shift_num\' generates 6 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                if(right_shift_num == 7\'d0) begin\n                                   ^~\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:502: Operator EQ expects 32 bits on the LHS, but LHS\'s VARREF \'iter_ref\' generates 4 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                if(iter_ref == NUM_BRAM_LOOPS-1) begin\n                            ^~\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:560: Operator EQ expects 32 bits on the LHS, but LHS\'s VARREF \'iter_query\' generates 4 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                if(iter_query == NUM_BRAM_LOOPS-1) begin\n                              ^~\n%Error: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:594: Cannot find file containing module: \'GACTX_ArrayWrapper\'\nGACTX_ArrayWrapper #(\n^~~~~~~~~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:649: Operator ADD expects 64 bits on the LHS, but LHS\'s VARREF \'ref_len\' generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                read_byte_length_logic[0] <= ref_len + (ref_off & MASK);\n                                                     ^\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:649: Operator AND expects 64 bits on the LHS, but LHS\'s VARREF \'ref_off\' generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                read_byte_length_logic[0] <= ref_len + (ref_off & MASK);\n                                                                ^\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:649: Operator AND expects 64 bits on the RHS, but RHS\'s VARREF \'MASK\' generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                read_byte_length_logic[0] <= ref_len + (ref_off & MASK);\n                                                                ^\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:650: Operator ADD expects 64 bits on the RHS, but RHS\'s VARREF \'ref_off\' generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                read_addr_offset_reg[0] <= ref_seq + ref_off;\n                                                   ^\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:759: Operator ADD expects 64 bits on the LHS, but LHS\'s VARREF \'query_len\' generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                read_byte_length_logic[1] <= query_len + (query_off & MASK);\n                                                       ^\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:759: Operator AND expects 64 bits on the LHS, but LHS\'s VARREF \'query_off\' generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                read_byte_length_logic[1] <= query_len + (query_off & MASK);\n                                                                    ^\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:759: Operator AND expects 64 bits on the RHS, but RHS\'s VARREF \'MASK\' generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                read_byte_length_logic[1] <= query_len + (query_off & MASK);\n                                                                    ^\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:760: Operator ADD expects 64 bits on the RHS, but RHS\'s VARREF \'query_off\' generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                read_addr_offset_reg[1] <= query_seq + query_off;\n                                                     ^\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:867: Operator ASSIGNDLY expects 64 bits on the Assign RHS, but Assign RHS\'s CONST \'32\'h40\' generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                write_byte_length_logic[0] <= 32\'d64;\n                                           ^~\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:873: Operator ASSIGNDLY expects 64 bits on the Assign RHS, but Assign RHS\'s CONST \'32\'h0\' generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                write_byte_length_logic[0] <= 32\'d0;\n                                           ^~\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:958: Operator SHIFTL expects 64 bits on the LHS, but LHS\'s VARREF \'dir_out_count\' generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                write_byte_length_logic[1] <= (dir_out_count << 6);\n                                                             ^~\n%Warning-WIDTH: data/full_repos/permissive/160991228/src/hdl/GACTX/GACTX_KernelControl.sv:964: Operator ASSIGNDLY expects 64 bits on the Assign RHS, but Assign RHS\'s CONST \'32\'h0\' generates 32 bits.\n                                                                                             : ... In instance GACTX_KernelControl\n                write_byte_length_logic[1] <= 32\'d0;\n                                           ^~\n%Error: Exiting due to 3 error(s), 27 warning(s)\n'
function [C_AXIS_TDATA_WIDTH-1:0] left_shift(input [C_AXIS_TDATA_WIDTH-1:0] inp, input [SHIFT_LEN-1:0] shift_amt);
    logic  [C_AXIS_TDATA_WIDTH-1:0] outp;

    for(inn = 0; inn < 64; inn = inn+1) begin
        if(inn == shift_amt) begin
            outp = (inp << (BYTE_WIDTH*inn));
        end
    end

    return outp;
endfunction
function [C_AXIS_TDATA_WIDTH-1:0] left_shift(input [C_AXIS_TDATA_WIDTH-1:0] inp, input [SHIFT_LEN-1:0] shift_amt);

    logic  [C_AXIS_TDATA_WIDTH-1:0] outp;

    for(inn = 0; inn < 64; inn = inn+1) begin
        if(inn == shift_amt) begin
            outp = (inp << (BYTE_WIDTH*inn));
        end
    end

    return outp;
endfunction