data/full_repos/permissive/104269513/generic_cntr_regs.v
 line:86: before: "integer"
1: b'%Warning-IMPLICIT: data/full_repos/permissive/104269513/generic_cntr_regs.v:179: Signal definition not found, creating implicitly: \'addr_good\'\n   assign addr_good = addr < REG_END_ADDR && addr >= REG_START_ADDR;\n          ^~~~~~~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Warning-IMPLICIT: data/full_repos/permissive/104269513/generic_cntr_regs.v:180: Signal definition not found, creating implicitly: \'tag_hit\'\n   assign tag_hit = tag_addr == TAG;\n          ^~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/104269513/generic_cntr_regs.v:181: Signal definition not found, creating implicitly: \'reg_rd_req_good\'\n                                                                               : ... Suggested alternative: \'reg_rd_req_good_d1\'\n   assign reg_rd_req_good = (tag_hit && addr_good && reg_req_in && reg_rd_wr_L_in);\n          ^~~~~~~~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/104269513/generic_cntr_regs.v:182: Signal definition not found, creating implicitly: \'reg_wr_req_good\'\n                                                                               : ... Suggested alternative: \'reg_rd_req_good\'\n   assign reg_wr_req_good = (tag_hit && addr_good && reg_req_in && ~reg_rd_wr_L_in);\n          ^~~~~~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/104269513/generic_cntr_regs.v:185: Bit extraction of array[7:0] requires 3 bit index, not 5 bits.\n                                                                            : ... In instance generic_cntr_regs\n   assign delta = deltas[reg_cnt_d1];\n                        ^\n%Warning-WIDTH: data/full_repos/permissive/104269513/generic_cntr_regs.v:225: Bit extraction of array[7:0] requires 3 bit index, not 5 bits.\n                                                                            : ... In instance generic_cntr_regs\n         reg_file[reg_file_wr_addr] <= reg_file_in;\n                 ^\n%Warning-WIDTH: data/full_repos/permissive/104269513/generic_cntr_regs.v:229: Bit extraction of array[7:0] requires 3 bit index, not 5 bits.\n                                                                            : ... In instance generic_cntr_regs\n   assign reg_file_out = reg_file[reg_file_rd_addr_ram];\n                                 ^\n%Warning-WIDTH: data/full_repos/permissive/104269513/generic_cntr_regs.v:295: Operator EQ expects 32 bits on the RHS, but RHS\'s VARREF \'reg_cnt_d1\' generates 5 bits.\n                                                                            : ... In instance generic_cntr_regs\n               if ((i==reg_cnt_d1)            \n                     ^~\n%Warning-UNSIGNED: data/full_repos/permissive/104269513/generic_cntr_regs.v:179: Comparison is constant due to unsigned arithmetic\n                                                                               : ... In instance generic_cntr_regs\n   assign addr_good = addr < REG_END_ADDR && addr >= REG_START_ADDR;\n                                                  ^~\n%Error: Exiting due to 9 warning(s)\n'
function integer log2;
      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
   endfunction
function integer log2;

      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
   endfunction