data/full_repos/permissive/181665138/verilog/capitolo_i/Sistema.v
1: b'%Warning-IMPLICIT: data/full_repos/permissive/181665138/verilog/capitolo_i/Sistema.v:45: Signal definition not found, creating implicitly: \'x\'\n    Ricevitore      R(x);\n                      ^\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module Trasmettitore(z);


    output z;


endmodule
module Trasmettitore(z);



    output z;


endmodule