data/full_repos/permissive/123304708/src/common/ext.v
None: at end of input
1: b'%Error: data/full_repos/permissive/123304708/src/common/ext.v:1: Cannot find include file: ././define/ctrl_def.v\n`include "././define/ctrl_def.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/123304708/src/common,data/full_repos/permissive/123304708/././define/ctrl_def.v\n             data/full_repos/permissive/123304708/src/common,data/full_repos/permissive/123304708/././define/ctrl_def.v.v\n             data/full_repos/permissive/123304708/src/common,data/full_repos/permissive/123304708/././define/ctrl_def.v.sv\n             ././define/ctrl_def.v\n             ././define/ctrl_def.v.v\n             ././define/ctrl_def.v.sv\n             obj_dir/././define/ctrl_def.v\n             obj_dir/././define/ctrl_def.v.v\n             obj_dir/././define/ctrl_def.v.sv\n%Error: data/full_repos/permissive/123304708/src/common/ext.v:15: Define or directive not defined: \'`EXTOP_ZERO\'\n      `EXTOP_ZERO:    \n      ^~~~~~~~~~~\n%Error: data/full_repos/permissive/123304708/src/common/ext.v:15: syntax error, unexpected \':\', expecting endcase\n      `EXTOP_ZERO:    \n                 ^\n%Error: data/full_repos/permissive/123304708/src/common/ext.v:17: Define or directive not defined: \'`EXTOP_SIGN\'\n      `EXTOP_SIGN:    \n      ^~~~~~~~~~~\n%Error: data/full_repos/permissive/123304708/src/common/ext.v:19: Define or directive not defined: \'`EXTOP_HIGH\'\n      `EXTOP_HIGH:    \n      ^~~~~~~~~~~\n%Error: Cannot continue\n'
module ext(
  input [1:0] EXTOp,  
  input [15:0] Imm16,
  output reg[31:0] Imm32
  );
  
  initial 
    Imm32 = 32'b0;
  
  always@(*)
  begin
    case(EXTOp)
      `EXTOP_ZERO:
        Imm32 = {16'b0,Imm16};
      `EXTOP_SIGN:
        Imm32 = {{16{Imm16[15]}},Imm16};
      `EXTOP_HIGH:
        Imm32 = {Imm16,16'b0};
      default:
        Imm32 = {16'b0,Imm16};
    endcase
  end
  
endmodule
module ext(
  input [1:0] EXTOp,  
  input [15:0] Imm16,
  output reg[31:0] Imm32
  );

  
  initial 
    Imm32 = 32'b0;
  
  always@(*)
  begin
    case(EXTOp)
      `EXTOP_ZERO:
        Imm32 = {16'b0,Imm16};
      `EXTOP_SIGN:
        Imm32 = {{16{Imm16[15]}},Imm16};
      `EXTOP_HIGH:
        Imm32 = {Imm16,16'b0};
      default:
        Imm32 = {16'b0,Imm16};
    endcase
  end
  
endmodule