data/full_repos/permissive/114811571/test/samples/inout_inst/inout_inst.v
data/verilator_xmls/21f7934b-4d83-47ee-b413-a5878e8b74f8.xml
module user(
            input clk, 
            inout in_pad,
            output p2f,
            input f2p,
            input mode
            );

   io1bit_unq1 iobit(.clk(clk),
                     .pad(in_pad),
                     .p2f(p2f),
                     .f2p(f2p),
                     .mode(mode));
   
endmodule
module user(
            input clk, 
            inout in_pad,
            output p2f,
            input f2p,
            input mode
            );


   io1bit_unq1 iobit(.clk(clk),
                     .pad(in_pad),
                     .p2f(p2f),
                     .f2p(f2p),
                     .mode(mode));
   
endmodule