data/full_repos/permissive/123339956/Labtest_2/bcd_adder.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/123339956/Labtest_2/bcd_adder.v:15: Unsupported: Ignoring delay on this delayed statement.\n  #10 a = 8\'b10011001; b = 8\'b10001000;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/123339956/Labtest_2/bcd_adder.v:16: Unsupported: Ignoring delay on this delayed statement.\n  #10 a = 8\'b10010011; b = 8\'b00010010;\n  ^\n%Error: data/full_repos/permissive/123339956/Labtest_2/bcd_adder.v:19: Unsupported or unknown PLI call: $monitor\n initial $monitor("t=%3d, a=%8b, b=%8b, cout=%b, s=%8b",$time,a,b,cout,s); \n         ^~~~~~~~\n%Error: data/full_repos/permissive/123339956/Labtest_2/bcd_adder.v:23: Unsupported or unknown PLI call: $dumpfile\n  $dumpfile("bcd_adder.vcd");\n  ^~~~~~~~~\n%Error: data/full_repos/permissive/123339956/Labtest_2/bcd_adder.v:24: Unsupported or unknown PLI call: $dumpvars\n  $dumpvars;\n  ^~~~~~~~~\n%Error: Exiting due to 3 error(s), 2 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module bcd_adjustment(cout,y,p,q);
	input [4:0]p,q ; 
	output cout ; 
	output [7:0]y ; 
	assign y = {p[3:0] + {3'b000, q[4]}, q[3:0]};
	assign cout = p[4];

endmodule
module bcd_adjustment(cout,y,p,q);

	input [4:0]p,q ; 
	output cout ; 
	output [7:0]y ; 
	assign y = {p[3:0] + {3'b000, q[4]}, q[3:0]};
	assign cout = p[4];

endmodule