data/full_repos/permissive/186676986/main.v
1: b"%Error: data/full_repos/permissive/186676986/main.v:31: Cannot find file containing module: 'clockdiv'\n clockdiv m1(clk,reset,slowclk);\n ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/186676986,data/full_repos/permissive/186676986/clockdiv\n             data/full_repos/permissive/186676986,data/full_repos/permissive/186676986/clockdiv.v\n             data/full_repos/permissive/186676986,data/full_repos/permissive/186676986/clockdiv.sv\n             clockdiv\n             clockdiv.v\n             clockdiv.sv\n             obj_dir/clockdiv\n             obj_dir/clockdiv.v\n             obj_dir/clockdiv.sv\n%Error: data/full_repos/permissive/186676986/main.v:32: Cannot find file containing module: 'tlc'\n tlc m2(X,slowclk,clr,hwy,cntry); \n ^~~\n%Error: Exiting due to 2 error(s)\n"
module main(
input X,
    input clk,
    input clr,
	 input reset,
    output  [1:0] hwy,
    output  [1:0] cntry
    );
	 
	wire slowclk;
	clockdiv m1(clk,reset,slowclk);
	tlc m2(X,slowclk,clr,hwy,cntry); 



endmodule
module main(
input X,
    input clk,
    input clr,
	 input reset,
    output  [1:0] hwy,
    output  [1:0] cntry
    );

	 
	wire slowclk;
	clockdiv m1(clk,reset,slowclk);
	tlc m2(X,slowclk,clr,hwy,cntry); 



endmodule