data/full_repos/permissive/206783267/I2C/DUT/i2c_master.v
 line:285: before: "("
1: b'%Warning-WIDTH: data/full_repos/permissive/206783267/I2C/DUT/i2c_master.v:288: Logical Operator WHILE expects 1 bit on the For Test Condition, but For Test Condition\'s SHIFTR generates 32 bits.\n                                                                             : ... In instance i2c_master\n while(x >> log2)\n ^~~~~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/206783267/I2C/DUT/i2c_master.v:57: Operator EQ expects 32 or 26 bits on the LHS, but LHS\'s VARREF \'clk_count\' generates 5 bits.\n                                                                            : ... In instance i2c_master\n   if(clk_count == FREQ_COUNT)\n                ^~\n%Warning-WIDTH: data/full_repos/permissive/206783267/I2C/DUT/i2c_master.v:250: Operator EQ expects 32 or 26 bits on the LHS, but LHS\'s VARREF \'clk_count\' generates 5 bits.\n                                                                             : ... In instance i2c_master\n else if(current_state == STOP && clk_sda == 1\'b0 && clk_scl == 1\'b0 && clk_count == FREQ_COUNT)\n                                                                                  ^~\n%Error: Exiting due to 3 warning(s)\n'
function integer log2(input integer x);
begin
	log2 = 0;
	while(x >> log2)
		log2 = log2 + 1;
end
endfunction
function integer log2(input integer x);

begin
	log2 = 0;
	while(x >> log2)
		log2 = log2 + 1;
end
endfunction