data/full_repos/permissive/147974511/src_old/subByte_inv.v
1: b"%Error: data/full_repos/permissive/147974511/src_old/subByte_inv.v:29: Cannot find file containing module: 's_box_inv'\n     s_box_inv sboxInv (state[itr +:8] , state_out[itr +:8]);\n     ^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/147974511/src_old,data/full_repos/permissive/147974511/s_box_inv\n             data/full_repos/permissive/147974511/src_old,data/full_repos/permissive/147974511/s_box_inv.v\n             data/full_repos/permissive/147974511/src_old,data/full_repos/permissive/147974511/s_box_inv.sv\n             s_box_inv\n             s_box_inv.v\n             s_box_inv.sv\n             obj_dir/s_box_inv\n             obj_dir/s_box_inv.v\n             obj_dir/s_box_inv.sv\n%Error: Exiting due to 1 error(s)\n"
module subByte_inv
	(
	input wire [31:0] state,
	output wire  [31:0]state_out
	);








genvar itr;
genvar jtr;
generate
		for (itr = 0 ; itr <= 31; itr = itr+8)
					s_box_inv sboxInv (state[itr +:8] , state_out[itr +:8]);
endgenerate






endmodule
module subByte_inv
	(
	input wire [31:0] state,
	output wire  [31:0]state_out
	);









genvar itr;
genvar jtr;
generate
		for (itr = 0 ; itr <= 31; itr = itr+8)
					s_box_inv sboxInv (state[itr +:8] , state_out[itr +:8]);
endgenerate






endmodule