data/full_repos/permissive/148324174/HDLBits/Circuits/Counter.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/Counter.v:15: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/Counter.v:1: ... Location of original declaration\nmodule top_module(\n       ^~~~~~~~~~\n                 ... Use "/* verilator lint_off MODDUP */" and lint_on around source to disable this message.\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/Counter.v:29: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/Counter.v:1: ... Location of original declaration\nmodule top_module(\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/Counter.v:43: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/Counter.v:1: ... Location of original declaration\nmodule top_module(\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/Counter.v:60: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/Counter.v:1: ... Location of original declaration\nmodule top_module(\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/Counter.v:77: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/Counter.v:1: ... Location of original declaration\nmodule top_module(\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/Counter.v:93: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/Counter.v:1: ... Location of original declaration\nmodule top_module(\n       ^~~~~~~~~~\n%Warning-MULTITOP: data/full_repos/permissive/148324174/HDLBits/Circuits/Counter.v:106: Multiple top level modules\n                                                                                      : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                                                                                      : ... Top module \'top_module\'\nmodule top_module(\n       ^~~~~~~~~~\n                                                                                      : ... Top module \'decade\'\nmodule decade(\n       ^~~~~~\n%Error: Exiting due to 7 warning(s)\n'
module decade(
    input clk,
    input reset,
    input add,
    output reg [3:0] q
    );
    always @(posedge clk) begin
        if (reset) begin
            q <= 4'd0;
        end
        else if (add) begin
            if (q[3:0] == 4'h9)
                q <= 4'h0;
            else
                q <= q+1;
        end
    end
endmodule
module decade(
    input clk,
    input reset,
    input add,
    output reg [3:0] q
    );

    always @(posedge clk) begin
        if (reset) begin
            q <= 4'd0;
        end
        else if (add) begin
            if (q[3:0] == 4'h9)
                q <= 4'h0;
            else
                q <= q+1;
        end
    end
endmodule