data/full_repos/permissive/118895561/Project 2/btdecoder.v
 line:1 column:1: Illegal character '\x00'
1: b'%Error: Cannot find file containing module: 2,data/full_repos/permissive/118895561\n        ... Looked in:\n             data/full_repos/permissive/118895561/Project/2,data/full_repos/permissive/118895561\n             data/full_repos/permissive/118895561/Project/2,data/full_repos/permissive/118895561.v\n             data/full_repos/permissive/118895561/Project/2,data/full_repos/permissive/118895561.sv\n             2,data/full_repos/permissive/118895561\n             2,data/full_repos/permissive/118895561.v\n             2,data/full_repos/permissive/118895561.sv\n             obj_dir/2,data/full_repos/permissive/118895561\n             obj_dir/2,data/full_repos/permissive/118895561.v\n             obj_dir/2,data/full_repos/permissive/118895561.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/118895561/Project\n%Error: Cannot find file containing module: 2/btdecoder.v\n%Error: Exiting due to 3 error(s)\n'
module btdecoder(
    input [31:0] ALU_Out_M,
    input [31:0] Instr_M,
	 input Write_Enabled,
    output [3:0] Bit_Type,
	 output DM_EXP
    );
	 
	 wire [31:0] Op, Func;
	 
	 assign Op  = Instr_M[31:26];
	 
	 assign DM_EXP = (Write_Enabled && (`ad || `co)) ? 1'b1 :
																		1'b0 ;
	 
	 assign Bit_Type = (Write_Enabled && (`ad || `co)) ? 4'bx	 :
							 (`sh && ALU_Out_M[1])				? 4'b1100 :
							 (`sh && !ALU_Out_M[1])				? 4'b0011 :
							 (`sb && ALU_Out_M[1:0] == 2'b00)? 4'b0001 :
							 (`sb && ALU_Out_M[1:0] == 2'b01)? 4'b0010 :
							 (`sb && ALU_Out_M[1:0] == 2'b10)? 4'b0100 :
							 (`sb && ALU_Out_M[1:0] == 2'b11)? 4'b1000 :
							 (`sw)									? 4'b1111 :
																		  4'bx    ;
							 
endmodule
module btdecoder(
    input [31:0] ALU_Out_M,
    input [31:0] Instr_M,
	 input Write_Enabled,
    output [3:0] Bit_Type,
	 output DM_EXP
    );

	 
	 wire [31:0] Op, Func;
	 
	 assign Op  = Instr_M[31:26];
	 
	 assign DM_EXP = (Write_Enabled && (`ad || `co)) ? 1'b1 :
																		1'b0 ;
	 
	 assign Bit_Type = (Write_Enabled && (`ad || `co)) ? 4'bx	 :
							 (`sh && ALU_Out_M[1])				? 4'b1100 :
							 (`sh && !ALU_Out_M[1])				? 4'b0011 :
							 (`sb && ALU_Out_M[1:0] == 2'b00)? 4'b0001 :
							 (`sb && ALU_Out_M[1:0] == 2'b01)? 4'b0010 :
							 (`sb && ALU_Out_M[1:0] == 2'b10)? 4'b0100 :
							 (`sb && ALU_Out_M[1:0] == 2'b11)? 4'b1000 :
							 (`sw)									? 4'b1111 :
																		  4'bx    ;
							 
endmodule