data/full_repos/permissive/157979234/Semester III/Digital Design and Computer Organization/Session 05/reg_alu.v
1: b'%Error: Cannot find file containing module: III/Digital\n        ... Looked in:\n             data/full_repos/permissive/157979234/Semester/III/Digital\n             data/full_repos/permissive/157979234/Semester/III/Digital.v\n             data/full_repos/permissive/157979234/Semester/III/Digital.sv\n             III/Digital\n             III/Digital.v\n             III/Digital.sv\n             obj_dir/III/Digital\n             obj_dir/III/Digital.v\n             obj_dir/III/Digital.sv\n%Error: Cannot find file containing module: Design\n%Error: Cannot find file containing module: and\n%Error: Cannot find file containing module: Computer\n%Error: Cannot find file containing module: Organization/Session\n%Error: Cannot find file containing module: 05,data/full_repos/permissive/157979234\n%Error: Cannot find file containing module: data/full_repos/permissive/157979234/Semester\n%Error: Cannot find file containing module: 05/reg_alu.v\n%Error: Exiting due to 8 error(s)\n'
module reg_alu (input wire clk, reset, sel, wr, input wire [1:0] op, input wire [2:0] rd_addr_a, rd_addr_b, wr_addr, input wire [15:0] d_in, output wire [15:0] d_out_a, d_out_b, output wire cout);

wire [15:0] o, d_in_temp;
wire alu_out;

reg_file rf1(clk, reset, wr, rd_addr_a, rd_addr_b, wr_addr, d_in_temp, d_out_a, d_out_b);
alu a1(op, d_out_a, d_out_b, o, alu_out);
dfr d1(clk, reset, alu_out, cout);
mux_2 m1(o, d_in_temp, sel, d_in);

endmodule
module reg_alu (input wire clk, reset, sel, wr, input wire [1:0] op, input wire [2:0] rd_addr_a, rd_addr_b, wr_addr, input wire [15:0] d_in, output wire [15:0] d_out_a, d_out_b, output wire cout);


wire [15:0] o, d_in_temp;
wire alu_out;

reg_file rf1(clk, reset, wr, rd_addr_a, rd_addr_b, wr_addr, d_in_temp, d_out_a, d_out_b);
alu a1(op, d_out_a, d_out_b, o, alu_out);
dfr d1(clk, reset, alu_out, cout);
mux_2 m1(o, d_in_temp, sel, d_in);

endmodule