data/full_repos/permissive/205926239/ISE_project/Sources/char_map.v
1: b'%Warning-WIDTH: data/full_repos/permissive/205926239/ISE_project/Sources/char_map.v:33: Operator ADD expects 32 or 6 bits on the RHS, but RHS\'s VARREF \'char_h\' generates 3 bits.\n                                                                                      : ... In instance char_map\n   char_bit <= 63 - ( (char_v * 8) + char_h );\n                                   ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module char_map(clk, char_h, char_v, char, dot);
    input clk;
    input [2:0] char_h;
    input [2:0] char_v;
	 input [63:0] char;
    output dot;

	reg dot;
	reg [5:0] char_bit;
	
	always @(posedge clk)
		begin
			char_bit <= 63 - ( (char_v * 8) + char_h );
			dot <= char[char_bit];
		end

endmodule
module char_map(clk, char_h, char_v, char, dot);

    input clk;
    input [2:0] char_h;
    input [2:0] char_v;
	 input [63:0] char;
    output dot;

	reg dot;
	reg [5:0] char_bit;
	
	always @(posedge clk)
		begin
			char_bit <= 63 - ( (char_v * 8) + char_h );
			dot <= char[char_bit];
		end

endmodule