data/full_repos/permissive/160024456/lib/bit_counter.v
 line:18: before: "["
1: b"%Error: data/full_repos/permissive/160024456/lib/bit_counter.v:25: Cannot find file containing module: 'half_adder'\n  half_adder t (.a(data[i*2]), .b(data[i*2+1]), .r(layer1[i][0]), .c(layer1[i][1]));\n  ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/160024456/lib,data/full_repos/permissive/160024456/half_adder\n             data/full_repos/permissive/160024456/lib,data/full_repos/permissive/160024456/half_adder.v\n             data/full_repos/permissive/160024456/lib,data/full_repos/permissive/160024456/half_adder.sv\n             half_adder\n             half_adder.v\n             half_adder.sv\n             obj_dir/half_adder\n             obj_dir/half_adder.v\n             obj_dir/half_adder.sv\n%Error: Exiting due to 1 error(s)\n"
module bit_counter (
  data,
  r
);

input [31:0] data;
output [5:0] r;







wire [15:0][1:0] layer1;
wire [7:0][2:0] layer2;
wire [3:0][3:0] layer3;
wire [2:0][4:0] layer4;

genvar i;
for (i=0; i<16; i = i + 1) begin
  half_adder t (.a(data[i*2]), .b(data[i*2+1]), .r(layer1[i][0]), .c(layer1[i][1]));
end
for (i=0; i<8; i = i + 1) begin
  assign layer2[i] = layer1[i*2] + layer1[i*2+1];
end
for (i=0; i<4; i = i + 1) begin
  assign layer3[i] = layer2[i*2] + layer2[i*2+1];
end
for (i=0; i<2; i = i + 1) begin
  assign layer4[i] = layer3[i*2] + layer3[i*2+1];
end
assign r = layer4[0] + layer4[1];

endmodule
module bit_counter (
  data,
  r
);


input [31:0] data;
output [5:0] r;







wire [15:0][1:0] layer1;
wire [7:0][2:0] layer2;
wire [3:0][3:0] layer3;
wire [2:0][4:0] layer4;

genvar i;
for (i=0; i<16; i = i + 1) begin
  half_adder t (.a(data[i*2]), .b(data[i*2+1]), .r(layer1[i][0]), .c(layer1[i][1]));
end
for (i=0; i<8; i = i + 1) begin
  assign layer2[i] = layer1[i*2] + layer1[i*2+1];
end
for (i=0; i<4; i = i + 1) begin
  assign layer3[i] = layer2[i*2] + layer2[i*2+1];
end
for (i=0; i<2; i = i + 1) begin
  assign layer4[i] = layer3[i*2] + layer3[i*2+1];
end
assign r = layer4[0] + layer4[1];

endmodule