data/full_repos/permissive/135820056/rtl/genesis_lpf.v
 line:102: before: "/"
1: b'%Warning-MULTITOP: data/full_repos/permissive/135820056/rtl/genesis_lpf.v:84: Multiple top level modules\n                                                                            : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                            : ... Top module \'genesis_lpf\'\nmodule genesis_lpf(\n       ^~~~~~~~~~~\n                                                                            : ... Top module \'genesis_fm_lpf\'\nmodule genesis_fm_lpf(\n       ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/135820056/rtl/genesis_lpf.v:92: Cannot find file containing module: \'iir_2nd_order\'\n iir_2nd_order fm2(.clk(clk),\n ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/135820056/rtl,data/full_repos/permissive/135820056/iir_2nd_order\n             data/full_repos/permissive/135820056/rtl,data/full_repos/permissive/135820056/iir_2nd_order.v\n             data/full_repos/permissive/135820056/rtl,data/full_repos/permissive/135820056/iir_2nd_order.sv\n             iir_2nd_order\n             iir_2nd_order.v\n             iir_2nd_order.sv\n             obj_dir/iir_2nd_order\n             obj_dir/iir_2nd_order.v\n             obj_dir/iir_2nd_order.sv\n%Error: data/full_repos/permissive/135820056/rtl/genesis_lpf.v:69: Cannot find file containing module: \'iir_1st_order\'\n iir_1st_order lpf6db(.clk(clk),\n ^~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s), 1 warning(s)\n'
module genesis_fm_lpf(
	input clk,
	input reset,
   input signed [15:0] in,
   output signed [15:0] out);

	wire signed [15:0] middle;
	 
	iir_2nd_order fm2(.clk(clk),
							.reset(reset),
							.div(10'd504),
							.A2(-18'sd24704),
							.A3(18'sd10728),
							.B1(18'sd1083),
							.B2(18'sd1204),
							.B3(18'sd121),
							.in(in),
						.out(out));
endmodule
module genesis_fm_lpf(
	input clk,
	input reset,
   input signed [15:0] in,
   output signed [15:0] out);


	wire signed [15:0] middle;
	 
	iir_2nd_order fm2(.clk(clk),
							.reset(reset),
							.div(10'd504),
							.A2(-18'sd24704),
							.A3(18'sd10728),
							.B1(18'sd1083),
							.B2(18'sd1204),
							.B3(18'sd121),
							.in(in),
						.out(out));
endmodule