data/full_repos/permissive/184332405/andornot_tb.v
 line:46: before: "$"
1: b'%Error: data/full_repos/permissive/184332405/andornot_tb.v:11: Unsupported or unknown PLI call: $dumpfile\n  $dumpfile("andornot.vcd");\n  ^~~~~~~~~\n%Error: data/full_repos/permissive/184332405/andornot_tb.v:12: Unsupported or unknown PLI call: $dumpvars\n  $dumpvars(0,Johnson);\n  ^~~~~~~~~\n%Error: data/full_repos/permissive/184332405/andornot_tb.v:14: Unsupported or unknown PLI call: $monitor\n  $monitor("%d %d  %d  | %d  %d", a, b, ctrl, s, ctrl);\n  ^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:17: Unsupported: Ignoring delay on this delayed statement.\n  #0  a = 8\'b101 ; b =  8\'b000;  ctrl = 2\'b00;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:18: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b001;  ctrl = 2\'b00;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:19: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b010;  ctrl = 2\'b00;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:20: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b100;  ctrl = 2\'b00;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:21: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b100;  ctrl = 2\'b00;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:22: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b101;  ctrl = 2\'b00;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:23: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  -8\'b110;  ctrl = 2\'b00;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:24: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  -8\'b111;  ctrl = 2\'b00;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:27: Unsupported: Ignoring delay on this delayed statement.\n  #50  a = 8\'b101 ; b =  8\'b000;   ctrl = 2\'b01;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:28: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b001;   ctrl = 2\'b01;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:29: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b010;   ctrl = 2\'b01;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:30: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b100;   ctrl = 2\'b01;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:31: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b100;   ctrl = 2\'b01;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:32: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b101;   ctrl = 2\'b01;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:33: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  -8\'b110;  ctrl = 2\'b01;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:34: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  -8\'b111;  ctrl = 2\'b01;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:37: Unsupported: Ignoring delay on this delayed statement.\n  #50  a = 8\'b101 ; b =  8\'b000;   ctrl = 2\'b10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:38: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b001;   ctrl = 2\'b10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:39: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b010;   ctrl = 2\'b10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:40: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b100;   ctrl = 2\'b10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:41: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b100;   ctrl = 2\'b10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:42: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b101;   ctrl = 2\'b10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:43: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  -8\'b110;  ctrl = 2\'b10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:44: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  -8\'b111;  ctrl = 2\'b10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/andornot_tb.v:46: Unsupported: Ignoring delay on this delayed statement.\n  #50 $finish;\n  ^\n%Error: Exiting due to 3 error(s), 25 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module andornot_tb;
reg signed [7:0] a;
reg signed [7:0] b;
reg [1:0] ctrl;
wire signed [7:0] s;

initial
	begin
		$dumpfile("andornot.vcd");
		$dumpvars(0,Johnson);
		$display("  a   b ctrl   s  overflow");
		$monitor("%d %d  %d  | %d  %d", a, b, ctrl, s, ctrl);
		

		#0  a = 8'b101	; b =  8'b000;  ctrl = 2'b00;
		#50 a = 8'b101	; b =  8'b001;  ctrl = 2'b00;
		#50 a = 8'b101	; b =  8'b010;  ctrl = 2'b00;
		#50 a = 8'b101	; b =  8'b100;  ctrl = 2'b00;
		#50 a = 8'b101	; b =  8'b100;  ctrl = 2'b00;
		#50 a = 8'b101	; b =  8'b101;  ctrl = 2'b00;
		#50 a = 8'b101	; b =  -8'b110;  ctrl = 2'b00;
		#50 a = 8'b101	; b =  -8'b111;  ctrl = 2'b00;
		

		#50  a = 8'b101	; b =  8'b000;   ctrl = 2'b01;
		#50 a = 8'b101	; b =  8'b001;   ctrl = 2'b01;
		#50 a = 8'b101	; b =  8'b010;   ctrl = 2'b01;
		#50 a = 8'b101	; b =  8'b100;   ctrl = 2'b01;
		#50 a = 8'b101	; b =  8'b100;   ctrl = 2'b01;
		#50 a = 8'b101	; b =  8'b101;   ctrl = 2'b01;
		#50 a = 8'b101	; b =  -8'b110;  ctrl = 2'b01;
		#50 a = 8'b101	; b =  -8'b111;  ctrl = 2'b01;
		

		#50  a = 8'b101	; b =  8'b000;   ctrl = 2'b10;
		#50 a = 8'b101	; b =  8'b001;   ctrl = 2'b10;
		#50 a = 8'b101	; b =  8'b010;   ctrl = 2'b10;
		#50 a = 8'b101	; b =  8'b100;   ctrl = 2'b10;
		#50 a = 8'b101	; b =  8'b100;   ctrl = 2'b10;
		#50 a = 8'b101	; b =  8'b101;   ctrl = 2'b10;
		#50 a = 8'b101	; b =  -8'b110;  ctrl = 2'b10;
		#50 a = 8'b101	; b =  -8'b111;  ctrl = 2'b10;
		
		#50 $finish;
	end

andornot Johnson( s, a, b, ctrl );

endmodule
module andornot_tb;

reg signed [7:0] a;
reg signed [7:0] b;
reg [1:0] ctrl;
wire signed [7:0] s;

initial
	begin
		$dumpfile("andornot.vcd");
		$dumpvars(0,Johnson);
		$display("  a   b ctrl   s  overflow");
		$monitor("%d %d  %d  | %d  %d", a, b, ctrl, s, ctrl);
		

		#0  a = 8'b101	; b =  8'b000;  ctrl = 2'b00;
		#50 a = 8'b101	; b =  8'b001;  ctrl = 2'b00;
		#50 a = 8'b101	; b =  8'b010;  ctrl = 2'b00;
		#50 a = 8'b101	; b =  8'b100;  ctrl = 2'b00;
		#50 a = 8'b101	; b =  8'b100;  ctrl = 2'b00;
		#50 a = 8'b101	; b =  8'b101;  ctrl = 2'b00;
		#50 a = 8'b101	; b =  -8'b110;  ctrl = 2'b00;
		#50 a = 8'b101	; b =  -8'b111;  ctrl = 2'b00;
		

		#50  a = 8'b101	; b =  8'b000;   ctrl = 2'b01;
		#50 a = 8'b101	; b =  8'b001;   ctrl = 2'b01;
		#50 a = 8'b101	; b =  8'b010;   ctrl = 2'b01;
		#50 a = 8'b101	; b =  8'b100;   ctrl = 2'b01;
		#50 a = 8'b101	; b =  8'b100;   ctrl = 2'b01;
		#50 a = 8'b101	; b =  8'b101;   ctrl = 2'b01;
		#50 a = 8'b101	; b =  -8'b110;  ctrl = 2'b01;
		#50 a = 8'b101	; b =  -8'b111;  ctrl = 2'b01;
		

		#50  a = 8'b101	; b =  8'b000;   ctrl = 2'b10;
		#50 a = 8'b101	; b =  8'b001;   ctrl = 2'b10;
		#50 a = 8'b101	; b =  8'b010;   ctrl = 2'b10;
		#50 a = 8'b101	; b =  8'b100;   ctrl = 2'b10;
		#50 a = 8'b101	; b =  8'b100;   ctrl = 2'b10;
		#50 a = 8'b101	; b =  8'b101;   ctrl = 2'b10;
		#50 a = 8'b101	; b =  -8'b110;  ctrl = 2'b10;
		#50 a = 8'b101	; b =  -8'b111;  ctrl = 2'b10;
		
		#50 $finish;
	end

andornot Johnson( s, a, b, ctrl );

endmodule