data/full_repos/permissive/122497324/assignment_4/assignment_4.v
 line:593: before: "("
1: b'%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:238: Cell has missing pin: \'store_mux_stall\'\n  reservation_station #(.BUS_LENGTH(2),.ID(3\'b010)) FP_add_station\n                                                    ^~~~~~~~~~~~~~\n                     ... Use "/* verilator lint_off PINMISSING */" and lint_on around source to disable this message.\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:238: Cell has missing pin: \'trigger_exes\'\n  reservation_station #(.BUS_LENGTH(2),.ID(3\'b010)) FP_add_station\n                                                    ^~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:238: Cell has missing pin: \'memory_offset_out\'\n  reservation_station #(.BUS_LENGTH(2),.ID(3\'b010)) FP_add_station\n                                                    ^~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:238: Cell has missing pin: \'valid_data\'\n  reservation_station #(.BUS_LENGTH(2),.ID(3\'b010)) FP_add_station\n                                                    ^~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:254: Cell has missing pin: \'store_mux_stall\'\n  reservation_station #(.BUS_LENGTH(1),.ID(3\'b001)) FP_mult_station\n                                                    ^~~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:254: Cell has missing pin: \'trigger_exes\'\n  reservation_station #(.BUS_LENGTH(1),.ID(3\'b001)) FP_mult_station\n                                                    ^~~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:254: Cell has missing pin: \'memory_offset_out\'\n  reservation_station #(.BUS_LENGTH(1),.ID(3\'b001)) FP_mult_station\n                                                    ^~~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:254: Cell has missing pin: \'valid_data\'\n  reservation_station #(.BUS_LENGTH(1),.ID(3\'b001)) FP_mult_station\n                                                    ^~~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:270: Cell has missing pin: \'trigger_exes\'\n  reservation_station #(.BUS_LENGTH(2),.ID(3\'b011)) store_station\n                                                    ^~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:286: Cell has missing pin: \'store_mux_stall\'\n  reservation_station #(.BUS_LENGTH(2),.ID(3\'b100)) load_station\n                                                    ^~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:315: Cell has missing pin: \'bbus_data_in\'\n  execution_unit #(.CYCLE_TIME(2),.ID(2\'b11)) load_store_unit\n                                              ^~~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:315: Cell has missing pin: \'fake_clock\'\n  execution_unit #(.CYCLE_TIME(2),.ID(2\'b11)) load_store_unit\n                                              ^~~~~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:329: Cell has missing pin: \'offset_in\'\n  execution_unit #(.CYCLE_TIME(3),.ID(2\'b10)) FP_add_unit\n                                              ^~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:329: Cell has missing pin: \'memory_in\'\n  execution_unit #(.CYCLE_TIME(3),.ID(2\'b10)) FP_add_unit\n                                              ^~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:329: Cell has missing pin: \'store_dbus_data_in\'\n  execution_unit #(.CYCLE_TIME(3),.ID(2\'b10)) FP_add_unit\n                                              ^~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:329: Cell has missing pin: \'fake_clock\'\n  execution_unit #(.CYCLE_TIME(3),.ID(2\'b10)) FP_add_unit\n                                              ^~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:329: Cell has missing pin: \'memory_address\'\n  execution_unit #(.CYCLE_TIME(3),.ID(2\'b10)) FP_add_unit\n                                              ^~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:329: Cell has missing pin: \'memory_out\'\n  execution_unit #(.CYCLE_TIME(3),.ID(2\'b10)) FP_add_unit\n                                              ^~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:329: Cell has missing pin: \'op_code_out\'\n  execution_unit #(.CYCLE_TIME(3),.ID(2\'b10)) FP_add_unit\n                                              ^~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:341: Cell has missing pin: \'offset_in\'\n  execution_unit #(.CYCLE_TIME(5),.ID(2\'b01)) FP_mult_unit\n                                              ^~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:341: Cell has missing pin: \'memory_in\'\n  execution_unit #(.CYCLE_TIME(5),.ID(2\'b01)) FP_mult_unit\n                                              ^~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:341: Cell has missing pin: \'store_dbus_data_in\'\n  execution_unit #(.CYCLE_TIME(5),.ID(2\'b01)) FP_mult_unit\n                                              ^~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:341: Cell has missing pin: \'memory_address\'\n  execution_unit #(.CYCLE_TIME(5),.ID(2\'b01)) FP_mult_unit\n                                              ^~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:341: Cell has missing pin: \'memory_out\'\n  execution_unit #(.CYCLE_TIME(5),.ID(2\'b01)) FP_mult_unit\n                                              ^~~~~~~~~~~~\n%Warning-PINMISSING: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:341: Cell has missing pin: \'op_code_out\'\n  execution_unit #(.CYCLE_TIME(5),.ID(2\'b01)) FP_mult_unit\n                                              ^~~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:962: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s CONST \'31\'bzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz\' generates 31 bits.\n                                                                                    : ... In instance assignment_4.load_store_unit\n    memory_address = 31\'bz;\n                   ^\n%Warning-WIDTH: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:1007: Operator ADD expects 32 bits on the RHS, but RHS\'s VARREF \'offset_in\' generates 3 bits.\n                                                                                     : ... In instance assignment_4.load_store_unit\n              memory_address = abus_data_in + offset_in;\n                                            ^\n%Warning-WIDTH: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:1014: Operator ADD expects 32 bits on the RHS, but RHS\'s VARREF \'offset_in\' generates 3 bits.\n                                                                                     : ... In instance assignment_4.load_store_unit\n              memory_address = abus_data_in + offset_in;\n                                            ^\n%Warning-WIDTH: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:583: Operator ASSIGN expects 3 bits on the Assign RHS, but Assign RHS\'s CONST \'8\'bzzzzzzzz\' generates 8 bits.\n                                                                                    : ... In instance assignment_4.FP_add_station\n    d_select_out = 8\'bz;\n                 ^\n%Warning-UNSIGNED: data/full_repos/permissive/122497324/assignment_4/assignment_4.v:463: Comparison is constant due to unsigned arithmetic\n                                                                                       : ... In instance assignment_4\n    if((memory_address >= 0) && (load_store > 3\'b000)) begin\n                       ^~\n%Error: Exiting due to 30 warning(s)\n'
module DNegflipFlop
(
  dbus, abusAdd, abusInt, abusMult, abusLdSt, Dselect, BselectLdSt, BselectAdd, BselectInt, BselectMult, AselectAdd,
  AselectInt, AselectLdSt, AselectMult, bbusAdd, bbusInt, bbusMult, bbusLdSt, clk, busySelect, isBusy, validData
);
  input [31:0] dbus;
  input Dselect;
  input BselectLdSt;
  input BselectAdd;
  input BselectInt;
  input BselectMult;
  input AselectAdd;
  input AselectInt;
  input AselectLdSt;
  input AselectMult;
  input busySelect;
  input clk;
  output  [31:0] abusAdd;
  output  [31:0] abusInt;
  output  [31:0] abusMult;
  output  [31:0] abusLdSt;
  output  [31:0] bbusAdd;
  output  [31:0] bbusInt;
  output  [31:0] bbusMult;
  output  [31:0] bbusLdSt;
  reg [31:0] data;
  output reg isBusy;
  input validData;
  
  initial begin

  data = 32'h00000001;
  isBusy = 0;
  end
  

  always @(posedge busySelect) begin
    isBusy = 1;
  end
  
  always @(negedge clk) begin

    if(Dselect && validData) begin
      data = dbus;
      isBusy = 0;
    end
  end

  assign abusAdd = AselectAdd? data : 32'hzzzzzzzz;
  assign abusInt = AselectInt? data : 32'hzzzzzzzz;
  assign abusMult = AselectMult? data : 32'hzzzzzzzz;
  assign abusLdSt = AselectLdSt? data : 32'hzzzzzzzz;
  assign bbusAdd = BselectAdd? data : 32'hzzzzzzzz;
  assign bbusInt = BselectInt? data : 32'hzzzzzzzz;
  assign bbusMult = BselectMult? data : 32'hzzzzzzzz;
  assign bbusLdSt = BselectLdSt? data : 32'hzzzzzzzz;

endmodule
module DNegflipFlop
(
  dbus, abusAdd, abusInt, abusMult, abusLdSt, Dselect, BselectLdSt, BselectAdd, BselectInt, BselectMult, AselectAdd,
  AselectInt, AselectLdSt, AselectMult, bbusAdd, bbusInt, bbusMult, bbusLdSt, clk, busySelect, isBusy, validData
);

  input [31:0] dbus;
  input Dselect;
  input BselectLdSt;
  input BselectAdd;
  input BselectInt;
  input BselectMult;
  input AselectAdd;
  input AselectInt;
  input AselectLdSt;
  input AselectMult;
  input busySelect;
  input clk;
  output  [31:0] abusAdd;
  output  [31:0] abusInt;
  output  [31:0] abusMult;
  output  [31:0] abusLdSt;
  output  [31:0] bbusAdd;
  output  [31:0] bbusInt;
  output  [31:0] bbusMult;
  output  [31:0] bbusLdSt;
  reg [31:0] data;
  output reg isBusy;
  input validData;
  
  initial begin

  data = 32'h00000001;
  isBusy = 0;
  end
  

  always @(posedge busySelect) begin
    isBusy = 1;
  end
  
  always @(negedge clk) begin

    if(Dselect && validData) begin
      data = dbus;
      isBusy = 0;
    end
  end

  assign abusAdd = AselectAdd? data : 32'hzzzzzzzz;
  assign abusInt = AselectInt? data : 32'hzzzzzzzz;
  assign abusMult = AselectMult? data : 32'hzzzzzzzz;
  assign abusLdSt = AselectLdSt? data : 32'hzzzzzzzz;
  assign bbusAdd = BselectAdd? data : 32'hzzzzzzzz;
  assign bbusInt = BselectInt? data : 32'hzzzzzzzz;
  assign bbusMult = BselectMult? data : 32'hzzzzzzzz;
  assign bbusLdSt = BselectLdSt? data : 32'hzzzzzzzz;

endmodule