data/full_repos/permissive/162874044/HDL Files/ROM Project/dataWrite.v
 line:52: before: "("
1: b'%Error: Cannot find file containing module: Files/ROM\n        ... Looked in:\n             data/full_repos/permissive/162874044/HDL/Files/ROM\n             data/full_repos/permissive/162874044/HDL/Files/ROM.v\n             data/full_repos/permissive/162874044/HDL/Files/ROM.sv\n             Files/ROM\n             Files/ROM.v\n             Files/ROM.sv\n             obj_dir/Files/ROM\n             obj_dir/Files/ROM.v\n             obj_dir/Files/ROM.sv\n%Error: Cannot find file containing module: Project,data/full_repos/permissive/162874044\n%Error: Cannot find file containing module: data/full_repos/permissive/162874044/HDL\n%Error: Cannot find file containing module: Project/dataWrite.v\n%Error: Exiting due to 4 error(s)\n'
module dataWrite #(
	parameter 									hLength 			= 11,
	parameter 									vLength 			= 11, 
	parameter [ ( hLength - 1 ) : 0 ] 	resHorizontal 	= 1280,
	parameter [ ( vLength - 1 ) : 0 ] 	resVertical 	= 720
)
(
	input 				clock,
	input 				key0,
	input 				key1,
	input 	[7:0] 	romData,
	output 	[23:0] 	dataOutput,
	output 	[10:0] 	romAddress
);


	parameter 	[1:0] 	keyState 			= 2'b00;
	parameter 	[1:0] 	romWrite 			= 2'b01;
	parameter 	[1:0] 	writeBlank 			= 2'b10;
	parameter 	[1:0] 	state4 				= 2'b11;


	reg 		[1:0] 					currentState 	= romWrite;
	reg 		[1:0] 					nextState 		= romWrite;
	reg 		[23:0]					outputReg		= 24'h000000;
	reg [ ( hLength - 1 ) : 0 ] 	xLocation 		= 1'b0;
	reg [ ( vLength - 1 ) : 0 ] 	yLocation 		= 1'b0;
	reg [3:0] 							dataLocation 	= 4'b1000;
	reg [11:0] 							pixelRemainder = 0;
	reg [11:0] 							verticalPixelRemainder = resVertical;
	reg [5:0] 							alphabetCount 	= 1'b0;
	reg [10:0] 							romAddressReg 	= 0;


	assign dataOutput = outputReg;
	assign romAddress = romAddressReg;


	always @( posedge(clock) )
		begin: stateChange
			currentState <= nextState;
		end


	always @( posedge(clock) )
	begin: currentStateLogic
		
		case(currentState)

			
			keyState:
				begin
					
				end

			romWrite:
				begin
					
					if(dataLocation > 0)
						begin
							
							if(romData[dataLocation-1] == 1'b1)
								begin
									outputReg = 24'h000000;
									pixelRemainder = pixelRemainder + 1'b1;
									dataLocation = dataLocation - 1'b1;
								end
							else if(romData[dataLocation-1] == 1'b0)
								begin
									outputReg = 24'hffffff;
									pixelRemainder = pixelRemainder + 1'b1;
									dataLocation = dataLocation - 1'b1;
								end
							else
								outputReg = 24'hffffff;
						end
						
				end
				
			writeBlank:
				begin
					if(pixelRemainder < resHorizontal)
						begin
							outputReg = 24'hffffff;
							pixelRemainder = pixelRemainder + 1'b1;
						end
					else if(pixelRemainder == resHorizontal)
						begin
							verticalPixelRemainder = verticalPixelRemainder + 1'b1;
							pixelRemainder = 0;
							dataLocation = 4'b1000;
						end
				end

			default: 
				begin
					outputReg = 24'hffffff;

				end

		endcase

	end
	

	always @( posedge(clock) )
	begin: nextStateLogic
		
		case(currentState)
			default:
				begin
				end
				
			keyState:
				begin
					
				end
				

			romWrite:
				begin
					if(key0 == 0)
						begin
							alphabetCount = alphabetCount + 1'b1;
							romAddressReg = alphabetCount * 3'b101;
							nextState <= romWrite;
						end
					else if(dataLocation == 0)
						begin
							nextState <= writeBlank;
						end
					else if(romAddressReg == (alphabetCount + 1'b1) * 3'b101)
						begin
							nextState <= writeBlank;
						end
					else
						nextState <= romWrite;
				end
				
			writeBlank:
				begin
					if(key0 == 0)
						begin
							alphabetCount = alphabetCount + 1'b1;
							romAddressReg = alphabetCount * 3'b101;
							nextState <= romWrite;
						end
					else if(pixelRemainder == resHorizontal)
						begin
							if(romAddressReg == (alphabetCount + 1'b1) * 3'b101)
								begin
									nextState = writeBlank;
								end
							else
								begin
									nextState <= romWrite;
									romAddressReg = romAddressReg + 1'b1;
								end
						end
					else
						nextState <= writeBlank;
				end
		
		endcase
	end


	
	
	
	
	
	
	
	
	
	
endmodule
module dataWrite #(
	parameter 									hLength 			= 11,
	parameter 									vLength 			= 11, 
	parameter [ ( hLength - 1 ) : 0 ] 	resHorizontal 	= 1280,
	parameter [ ( vLength - 1 ) : 0 ] 	resVertical 	= 720
)
(
	input 				clock,
	input 				key0,
	input 				key1,
	input 	[7:0] 	romData,
	output 	[23:0] 	dataOutput,
	output 	[10:0] 	romAddress
);



	parameter 	[1:0] 	keyState 			= 2'b00;
	parameter 	[1:0] 	romWrite 			= 2'b01;
	parameter 	[1:0] 	writeBlank 			= 2'b10;
	parameter 	[1:0] 	state4 				= 2'b11;


	reg 		[1:0] 					currentState 	= romWrite;
	reg 		[1:0] 					nextState 		= romWrite;
	reg 		[23:0]					outputReg		= 24'h000000;
	reg [ ( hLength - 1 ) : 0 ] 	xLocation 		= 1'b0;
	reg [ ( vLength - 1 ) : 0 ] 	yLocation 		= 1'b0;
	reg [3:0] 							dataLocation 	= 4'b1000;
	reg [11:0] 							pixelRemainder = 0;
	reg [11:0] 							verticalPixelRemainder = resVertical;
	reg [5:0] 							alphabetCount 	= 1'b0;
	reg [10:0] 							romAddressReg 	= 0;


	assign dataOutput = outputReg;
	assign romAddress = romAddressReg;


	always @( posedge(clock) )
		begin: stateChange
			currentState <= nextState;
		end


	always @( posedge(clock) )
	begin: currentStateLogic
		
		case(currentState)

			
			keyState:
				begin
					
				end

			romWrite:
				begin
					
					if(dataLocation > 0)
						begin
							
							if(romData[dataLocation-1] == 1'b1)
								begin
									outputReg = 24'h000000;
									pixelRemainder = pixelRemainder + 1'b1;
									dataLocation = dataLocation - 1'b1;
								end
							else if(romData[dataLocation-1] == 1'b0)
								begin
									outputReg = 24'hffffff;
									pixelRemainder = pixelRemainder + 1'b1;
									dataLocation = dataLocation - 1'b1;
								end
							else
								outputReg = 24'hffffff;
						end
						
				end
				
			writeBlank:
				begin
					if(pixelRemainder < resHorizontal)
						begin
							outputReg = 24'hffffff;
							pixelRemainder = pixelRemainder + 1'b1;
						end
					else if(pixelRemainder == resHorizontal)
						begin
							verticalPixelRemainder = verticalPixelRemainder + 1'b1;
							pixelRemainder = 0;
							dataLocation = 4'b1000;
						end
				end

			default: 
				begin
					outputReg = 24'hffffff;

				end

		endcase

	end
	

	always @( posedge(clock) )
	begin: nextStateLogic
		
		case(currentState)
			default:
				begin
				end
				
			keyState:
				begin
					
				end
				

			romWrite:
				begin
					if(key0 == 0)
						begin
							alphabetCount = alphabetCount + 1'b1;
							romAddressReg = alphabetCount * 3'b101;
							nextState <= romWrite;
						end
					else if(dataLocation == 0)
						begin
							nextState <= writeBlank;
						end
					else if(romAddressReg == (alphabetCount + 1'b1) * 3'b101)
						begin
							nextState <= writeBlank;
						end
					else
						nextState <= romWrite;
				end
				
			writeBlank:
				begin
					if(key0 == 0)
						begin
							alphabetCount = alphabetCount + 1'b1;
							romAddressReg = alphabetCount * 3'b101;
							nextState <= romWrite;
						end
					else if(pixelRemainder == resHorizontal)
						begin
							if(romAddressReg == (alphabetCount + 1'b1) * 3'b101)
								begin
									nextState = writeBlank;
								end
							else
								begin
									nextState <= romWrite;
									romAddressReg = romAddressReg + 1'b1;
								end
						end
					else
						nextState <= writeBlank;
				end
		
		endcase
	end


	
	
	
	
	
	
	
	
	
	
endmodule