data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv
None: at end of input
1: b'%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:16: Cannot find include file: test_exec.svh\n  `include "test_exec.svh" \n           ^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor,data/full_repos/permissive/214858095/test_exec.svh\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor,data/full_repos/permissive/214858095/test_exec.svh.v\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor,data/full_repos/permissive/214858095/test_exec.svh.sv\n             test_exec.svh\n             test_exec.svh.v\n             test_exec.svh.sv\n             obj_dir/test_exec.svh\n             obj_dir/test_exec.svh.v\n             obj_dir/test_exec.svh.sv\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:23: Cannot find include file: rfnoc_block_fosphor_regs.vh\n  `include "rfnoc_block_fosphor_regs.vh" \n           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:18: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\n  import PkgTestExec::*;\n         ^~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:75: syntax error, unexpected \'=\', expecting \',\' or \';\'\n  RfnocBlockCtrlBfm #(CHDR_W, ITEM_W) blk_ctrl = new(backend, m_ctrl, s_ctrl);\n                                               ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:78: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n  typedef ChdrData #(CHDR_W, ITEM_W)::chdr_word_t chdr_word_t;\n                   ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:79: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n  typedef ChdrData #(CHDR_W, ITEM_W)::item_t      item_t;\n                   ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:202: Unsupported: classes\n  class Rand #(WIDTH = 32);\n  ^~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:204: Unsupported: \'static\' class item\n    static function logic [WIDTH-1:0] rand_bits();\n    ^~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:208: Unsupported or unknown PLI call: $urandom\n        result = {result, $urandom()};\n                          ^~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:239: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value[1] == cfg.en_wf, "REG_ENABLE[1] didn\'t have expected value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:239: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value[1] == cfg.en_wf, "REG_ENABLE[1] didn\'t have expected value");\n                                       ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:240: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value[0] == cfg.en_hist, "REG_ENABLE[0] didn\'t have expected value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:240: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value[0] == cfg.en_hist, "REG_ENABLE[0] didn\'t have expected value");\n                                         ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:243: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value == 0, "REG_CLEAR didn\'t have expected value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:243: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value == 0, "REG_CLEAR didn\'t have expected value");\n                            ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:246: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value[1] == cfg.en_noise, "REG_RANDOM[1] didn\'t have expected value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:246: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value[1] == cfg.en_noise, "REG_RANDOM[1] didn\'t have expected value");\n                                          ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:247: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value[0] == cfg.en_dither, "REG_RANDOM[0] didn\'t have expected value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:247: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value[0] == cfg.en_dither, "REG_RANDOM[0] didn\'t have expected value");\n                                           ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:250: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value == cfg.hist_decim, "REG_HIST_DECIM didn\'t have expected value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:250: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value == cfg.hist_decim, "REG_HIST_DECIM didn\'t have expected value");\n                                         ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:253: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value == cfg.offset, "REG_OFFSET didn\'t have expected value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:253: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value == cfg.offset, "REG_OFFSET didn\'t have expected value");\n                                     ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:256: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value == cfg.scale, "REG_SCALE didn\'t have expected value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:256: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value == cfg.scale, "REG_SCALE didn\'t have expected value");\n                                    ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:259: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value == cfg.trise, "REG_TRISE didn\'t have expected value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:259: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value == cfg.trise, "REG_TRISE didn\'t have expected value");\n                                    ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:262: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value == cfg.tdecay, "REG_TDECAY didn\'t have expected value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:262: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value == cfg.tdecay, "REG_TDECAY didn\'t have expected value");\n                                     ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:265: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value == cfg.alpha, "REG_ALPHA didn\'t have expected value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:265: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value == cfg.alpha, "REG_ALPHA didn\'t have expected value");\n                                    ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:268: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value == cfg.epsilon, "REG_EPSILON didn\'t have expected value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:268: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value == cfg.epsilon, "REG_EPSILON didn\'t have expected value");\n                                      ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:271: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value[7] == cfg.wf_mode, "REG_WF_CTRL didn\'t have expected value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:271: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value[7] == cfg.wf_mode, "REG_WF_CTRL didn\'t have expected value");\n                                         ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:272: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value[1:0] == cfg.wf_div, "REG_WF_CTRL didn\'t have expected value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:272: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value[1:0] == cfg.wf_div, "REG_WF_CTRL didn\'t have expected value");\n                                          ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:275: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value == cfg.wf_decim, "REG_WF_DECIM didn\'t have expected value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:275: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value == cfg.wf_decim, "REG_WF_DECIM didn\'t have expected value");\n                                       ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:283: Unsupported or unknown PLI call: $urandom_range\n    spp = 2**$urandom_range(4, $clog2(SPP));\n             ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:286: Unsupported: Parameterized classes\n    cfg = Rand #($bits(cfg))::rand_bits();\n                 ^~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:286: Unsupported: Hierarchical class references\n    cfg = Rand #($bits(cfg))::rand_bits();\n                            ^~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:286: Unsupported: scoped class reference\n    cfg = Rand #($bits(cfg))::rand_bits();\n                              ^~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:283: Unsupported: scoped class reference\n    spp = 2**$urandom_range(4, $clog2(SPP));\n           ^~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:286: syntax error, unexpected \'(\', expecting \';\'\n    cfg = Rand #($bits(cfg))::rand_bits();\n                                        ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:289: Unsupported or unknown PLI call: $urandom_range\n    cfg.hist_decim = $urandom_range(0, 8);\n                     ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:292: Unsupported or unknown PLI call: $urandom_range\n    cfg.wf_mode = wf_mode_t\'($urandom_range(cfg.wf_mode.num()-1));\n                             ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:293: Unsupported or unknown PLI call: $urandom_range\n    cfg.wf_div  = wf_div_t\'($urandom_range(cfg.wf_div.num()-1));\n                            ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:300: syntax error, unexpected IDENTIFIER\n    item_t fft_items[$];\n           ^~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fosphor/rfnoc_block_fosphor_tb.sv:317: Unsupported: empty queues ("{ }")\n    fft_items = {};\n                ^\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
function logic [WIDTH-1:0] rand_bits();
      bit [WIDTH-1:0] result;
      int num_rand32 = (WIDTH + 31) / 32;
      for (int i = 0; i < num_rand32; i++) begin
        result = {result, $urandom()};
      end
      return result;
    endfunction
function logic [WIDTH-1:0] rand_bits();

      bit [WIDTH-1:0] result;
      int num_rand32 = (WIDTH + 31) / 32;
      for (int i = 0; i < num_rand32; i++) begin
        result = {result, $urandom()};
      end
      return result;
    endfunction