data/full_repos/permissive/214823094/submissions/lab_4/project_1/ALU.v
data/verilator_xmls/e26a1419-41f2-47e6-a198-f0be3fa3fb27.xml
module carry_look_ahead_adder_4(a,b,cin,ans,cout);
    input [3:0] a;
    input [3:0] b;
    input cin;
    output [3:0] ans;
    output cout;
    
    wire [3:0] g;
    wire [3:0] p;
    wire [3:1] c;
    

    assign g[3:0]=a[3:0]&b[3:0];
    

    assign p[3:0]=a[3:0]^b[3:0];
    

    assign c[1]=g[0]|p[0]&cin;
    assign c[2]=g[1]|p[1]&g[0]|p[1]&p[0]&cin;
    assign c[3]=g[2]|p[2]&g[1]|p[2]&p[1]&g[0]|p[2]&p[1]&p[0]&cin;
    assign cout=g[3]|p[3]&g[2]|p[3]&p[2]&g[1]|p[3]&p[2]&p[1]&g[0]|p[3]&p[2]&p[1]&p[0]&cin;
    

    xor_ xor1(p[3:0],{c[3:1],cin},ans[3:0]);
    
endmodule
module carry_look_ahead_adder_4(a,b,cin,ans,cout);

    input [3:0] a;
    input [3:0] b;
    input cin;
    output [3:0] ans;
    output cout;
    
    wire [3:0] g;
    wire [3:0] p;
    wire [3:1] c;
    

    assign g[3:0]=a[3:0]&b[3:0];
    

    assign p[3:0]=a[3:0]^b[3:0];
    

    assign c[1]=g[0]|p[0]&cin;
    assign c[2]=g[1]|p[1]&g[0]|p[1]&p[0]&cin;
    assign c[3]=g[2]|p[2]&g[1]|p[2]&p[1]&g[0]|p[2]&p[1]&p[0]&cin;
    assign cout=g[3]|p[3]&g[2]|p[3]&p[2]&g[1]|p[3]&p[2]&p[1]&g[0]|p[3]&p[2]&p[1]&p[0]&cin;
    

    xor_ xor1(p[3:0],{c[3:1],cin},ans[3:0]);
    
endmodule