data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fir_filter/rfnoc_fir_filter_core.v
1: b'%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fir_filter/rfnoc_fir_filter_core.v:108: Cannot find include file: rfnoc_fir_filter_regs.vh\n  `include "rfnoc_fir_filter_regs.vh" \n           ^~~~~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fir_filter,data/full_repos/permissive/214858095/rfnoc_fir_filter_regs.vh\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fir_filter,data/full_repos/permissive/214858095/rfnoc_fir_filter_regs.vh.v\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_fir_filter,data/full_repos/permissive/214858095/rfnoc_fir_filter_regs.vh.sv\n             rfnoc_fir_filter_regs.vh\n             rfnoc_fir_filter_regs.vh.v\n             rfnoc_fir_filter_regs.vh.sv\n             obj_dir/rfnoc_fir_filter_regs.vh\n             obj_dir/rfnoc_fir_filter_regs.vh.v\n             obj_dir/rfnoc_fir_filter_regs.vh.sv\n%Error: Exiting due to 1 error(s)\n'
module rfnoc_fir_filter_core #(
  parameter        DATA_W            = 32,
  parameter [19:0] BASE_ADDR         = 0,


  parameter COEFF_WIDTH              = 16,
  parameter NUM_COEFFS               = 41,
  parameter [NUM_COEFFS*COEFF_WIDTH-1:0] COEFFS_VEC =
    { 
      {1'b0, {(COEFF_WIDTH-1){1'b1}} },
      {(COEFF_WIDTH*(NUM_COEFFS-1)){1'b0}}
    },
  parameter RELOADABLE_COEFFS        = 1,
  parameter SYMMETRIC_COEFFS         = 0,
  parameter SKIP_ZERO_COEFFS         = 0,
  parameter USE_EMBEDDED_REGS_COEFFS = 1
) (

  input  wire clk,
  input  wire rst,






  input  wire        s_ctrlport_req_wr,
  input  wire        s_ctrlport_req_rd,
  input  wire [19:0] s_ctrlport_req_addr,
  input  wire [31:0] s_ctrlport_req_data,
  output reg         s_ctrlport_resp_ack,
  output reg  [31:0] s_ctrlport_resp_data,






  input  wire [DATA_W-1:0] s_axis_tdata,
  input  wire              s_axis_tlast,
  input  wire              s_axis_tvalid,
  output wire              s_axis_tready,


  output wire [DATA_W-1:0] m_axis_tdata,
  output wire              m_axis_tlast,
  output wire              m_axis_tvalid,
  input  wire              m_axis_tready
);

  reg  [COEFF_WIDTH-1:0] m_axis_reload_tdata;
  reg                    m_axis_reload_tvalid;
  reg                    m_axis_reload_tlast;
  wire                   m_axis_reload_tready;






  `include "rfnoc_fir_filter_regs.vh"



  wire [20:0] block_addr = s_ctrlport_req_addr[19:FIR_FILTER_ADDR_W];
  wire [19:0] reg_addr   = { s_ctrlport_req_addr[FIR_FILTER_ADDR_W:2], 2'b0 };

  always @(posedge clk) begin
    if (rst) begin
      s_ctrlport_resp_ack  <= 0;
      m_axis_reload_tvalid <= 0;
      s_ctrlport_resp_data <= {32{1'bX}};
      m_axis_reload_tdata  <= {DATA_W{1'bX}};
      m_axis_reload_tlast  <= 1'bX;
    end else if (block_addr == BASE_ADDR) begin

      s_ctrlport_resp_ack  <= 0;
      s_ctrlport_resp_data <= 0;



      if (m_axis_reload_tvalid && m_axis_reload_tready) begin
        m_axis_reload_tvalid <= 1'b0;
        s_ctrlport_resp_ack  <= 1'b1;
      end


      if (s_ctrlport_req_wr) begin
        if (reg_addr == REG_FIR_LOAD_COEFF) begin
          m_axis_reload_tdata  <= s_ctrlport_req_data[COEFF_WIDTH-1:0];
          m_axis_reload_tvalid <= 1'b1;
          m_axis_reload_tlast  <= 1'b0;
        end else if (reg_addr == REG_FIR_LOAD_COEFF_LAST) begin
          m_axis_reload_tdata  <= s_ctrlport_req_data[COEFF_WIDTH-1:0];
          m_axis_reload_tvalid <= 1'b1;
          m_axis_reload_tlast  <= 1'b1;
        end
      end


      if (s_ctrlport_req_rd) begin

        if (reg_addr == REG_FIR_NUM_COEFFS) begin
          s_ctrlport_resp_data <= NUM_COEFFS;
          s_ctrlport_resp_ack  <= 1;
        end
      end
    end
  end






  localparam IN_WIDTH  = DATA_W/2;
  localparam OUT_WIDTH = DATA_W/2;


  axi_fir_filter #(
    .IN_WIDTH                 (IN_WIDTH),
    .COEFF_WIDTH              (COEFF_WIDTH),
    .OUT_WIDTH                (OUT_WIDTH),
    .NUM_COEFFS               (NUM_COEFFS),
    .COEFFS_VEC               (COEFFS_VEC),
    .RELOADABLE_COEFFS        (RELOADABLE_COEFFS),
    .BLANK_OUTPUT             (1),

    .SYMMETRIC_COEFFS         (SYMMETRIC_COEFFS),
    .SKIP_ZERO_COEFFS         (SKIP_ZERO_COEFFS),
    .USE_EMBEDDED_REGS_COEFFS (USE_EMBEDDED_REGS_COEFFS)
  ) inst_axi_fir_filter_i (
    .clk                  (clk),
    .reset                (rst),
    .clear                (1'b0),
    .s_axis_data_tdata    (s_axis_tdata[2*IN_WIDTH-1:IN_WIDTH]),
    .s_axis_data_tlast    (s_axis_tlast),
    .s_axis_data_tvalid   (s_axis_tvalid),
    .s_axis_data_tready   (s_axis_tready),
    .m_axis_data_tdata    (m_axis_tdata[2*OUT_WIDTH-1:OUT_WIDTH]),
    .m_axis_data_tlast    (m_axis_tlast),
    .m_axis_data_tvalid   (m_axis_tvalid),
    .m_axis_data_tready   (m_axis_tready),
    .s_axis_reload_tdata  (m_axis_reload_tdata),
    .s_axis_reload_tlast  (m_axis_reload_tlast),
    .s_axis_reload_tvalid (m_axis_reload_tvalid),
    .s_axis_reload_tready (m_axis_reload_tready)
  );


  axi_fir_filter #(
    .IN_WIDTH                 (IN_WIDTH),
    .COEFF_WIDTH              (COEFF_WIDTH),
    .OUT_WIDTH                (OUT_WIDTH),
    .NUM_COEFFS               (NUM_COEFFS),
    .COEFFS_VEC               (COEFFS_VEC),
    .RELOADABLE_COEFFS        (RELOADABLE_COEFFS),
    .BLANK_OUTPUT             (1),

    .SYMMETRIC_COEFFS         (SYMMETRIC_COEFFS),
    .SKIP_ZERO_COEFFS         (SKIP_ZERO_COEFFS),
    .USE_EMBEDDED_REGS_COEFFS (USE_EMBEDDED_REGS_COEFFS)
  ) inst_axi_fir_filter_q (
    .clk                  (clk),
    .reset                (rst),
    .clear                (1'b0),
    .s_axis_data_tdata    (s_axis_tdata[IN_WIDTH-1:0]),
    .s_axis_data_tlast    (s_axis_tlast),
    .s_axis_data_tvalid   (s_axis_tvalid),
    .s_axis_data_tready   (),
    .m_axis_data_tdata    (m_axis_tdata[OUT_WIDTH-1:0]),
    .m_axis_data_tlast    (),
    .m_axis_data_tvalid   (),
    .m_axis_data_tready   (m_axis_tready),
    .s_axis_reload_tdata  (m_axis_reload_tdata),
    .s_axis_reload_tlast  (m_axis_reload_tlast),
    .s_axis_reload_tvalid (m_axis_reload_tvalid),
    .s_axis_reload_tready ()
  );

endmodule
module rfnoc_fir_filter_core #(
  parameter        DATA_W            = 32,
  parameter [19:0] BASE_ADDR         = 0,


  parameter COEFF_WIDTH              = 16,
  parameter NUM_COEFFS               = 41,
  parameter [NUM_COEFFS*COEFF_WIDTH-1:0] COEFFS_VEC =
    { 
      {1'b0, {(COEFF_WIDTH-1){1'b1}} },
      {(COEFF_WIDTH*(NUM_COEFFS-1)){1'b0}}
    },
  parameter RELOADABLE_COEFFS        = 1,
  parameter SYMMETRIC_COEFFS         = 0,
  parameter SKIP_ZERO_COEFFS         = 0,
  parameter USE_EMBEDDED_REGS_COEFFS = 1
) (

  input  wire clk,
  input  wire rst,






  input  wire        s_ctrlport_req_wr,
  input  wire        s_ctrlport_req_rd,
  input  wire [19:0] s_ctrlport_req_addr,
  input  wire [31:0] s_ctrlport_req_data,
  output reg         s_ctrlport_resp_ack,
  output reg  [31:0] s_ctrlport_resp_data,






  input  wire [DATA_W-1:0] s_axis_tdata,
  input  wire              s_axis_tlast,
  input  wire              s_axis_tvalid,
  output wire              s_axis_tready,


  output wire [DATA_W-1:0] m_axis_tdata,
  output wire              m_axis_tlast,
  output wire              m_axis_tvalid,
  input  wire              m_axis_tready
);


  reg  [COEFF_WIDTH-1:0] m_axis_reload_tdata;
  reg                    m_axis_reload_tvalid;
  reg                    m_axis_reload_tlast;
  wire                   m_axis_reload_tready;






  `include "rfnoc_fir_filter_regs.vh"



  wire [20:0] block_addr = s_ctrlport_req_addr[19:FIR_FILTER_ADDR_W];
  wire [19:0] reg_addr   = { s_ctrlport_req_addr[FIR_FILTER_ADDR_W:2], 2'b0 };

  always @(posedge clk) begin
    if (rst) begin
      s_ctrlport_resp_ack  <= 0;
      m_axis_reload_tvalid <= 0;
      s_ctrlport_resp_data <= {32{1'bX}};
      m_axis_reload_tdata  <= {DATA_W{1'bX}};
      m_axis_reload_tlast  <= 1'bX;
    end else if (block_addr == BASE_ADDR) begin

      s_ctrlport_resp_ack  <= 0;
      s_ctrlport_resp_data <= 0;



      if (m_axis_reload_tvalid && m_axis_reload_tready) begin
        m_axis_reload_tvalid <= 1'b0;
        s_ctrlport_resp_ack  <= 1'b1;
      end


      if (s_ctrlport_req_wr) begin
        if (reg_addr == REG_FIR_LOAD_COEFF) begin
          m_axis_reload_tdata  <= s_ctrlport_req_data[COEFF_WIDTH-1:0];
          m_axis_reload_tvalid <= 1'b1;
          m_axis_reload_tlast  <= 1'b0;
        end else if (reg_addr == REG_FIR_LOAD_COEFF_LAST) begin
          m_axis_reload_tdata  <= s_ctrlport_req_data[COEFF_WIDTH-1:0];
          m_axis_reload_tvalid <= 1'b1;
          m_axis_reload_tlast  <= 1'b1;
        end
      end


      if (s_ctrlport_req_rd) begin

        if (reg_addr == REG_FIR_NUM_COEFFS) begin
          s_ctrlport_resp_data <= NUM_COEFFS;
          s_ctrlport_resp_ack  <= 1;
        end
      end
    end
  end






  localparam IN_WIDTH  = DATA_W/2;
  localparam OUT_WIDTH = DATA_W/2;


  axi_fir_filter #(
    .IN_WIDTH                 (IN_WIDTH),
    .COEFF_WIDTH              (COEFF_WIDTH),
    .OUT_WIDTH                (OUT_WIDTH),
    .NUM_COEFFS               (NUM_COEFFS),
    .COEFFS_VEC               (COEFFS_VEC),
    .RELOADABLE_COEFFS        (RELOADABLE_COEFFS),
    .BLANK_OUTPUT             (1),

    .SYMMETRIC_COEFFS         (SYMMETRIC_COEFFS),
    .SKIP_ZERO_COEFFS         (SKIP_ZERO_COEFFS),
    .USE_EMBEDDED_REGS_COEFFS (USE_EMBEDDED_REGS_COEFFS)
  ) inst_axi_fir_filter_i (
    .clk                  (clk),
    .reset                (rst),
    .clear                (1'b0),
    .s_axis_data_tdata    (s_axis_tdata[2*IN_WIDTH-1:IN_WIDTH]),
    .s_axis_data_tlast    (s_axis_tlast),
    .s_axis_data_tvalid   (s_axis_tvalid),
    .s_axis_data_tready   (s_axis_tready),
    .m_axis_data_tdata    (m_axis_tdata[2*OUT_WIDTH-1:OUT_WIDTH]),
    .m_axis_data_tlast    (m_axis_tlast),
    .m_axis_data_tvalid   (m_axis_tvalid),
    .m_axis_data_tready   (m_axis_tready),
    .s_axis_reload_tdata  (m_axis_reload_tdata),
    .s_axis_reload_tlast  (m_axis_reload_tlast),
    .s_axis_reload_tvalid (m_axis_reload_tvalid),
    .s_axis_reload_tready (m_axis_reload_tready)
  );


  axi_fir_filter #(
    .IN_WIDTH                 (IN_WIDTH),
    .COEFF_WIDTH              (COEFF_WIDTH),
    .OUT_WIDTH                (OUT_WIDTH),
    .NUM_COEFFS               (NUM_COEFFS),
    .COEFFS_VEC               (COEFFS_VEC),
    .RELOADABLE_COEFFS        (RELOADABLE_COEFFS),
    .BLANK_OUTPUT             (1),

    .SYMMETRIC_COEFFS         (SYMMETRIC_COEFFS),
    .SKIP_ZERO_COEFFS         (SKIP_ZERO_COEFFS),
    .USE_EMBEDDED_REGS_COEFFS (USE_EMBEDDED_REGS_COEFFS)
  ) inst_axi_fir_filter_q (
    .clk                  (clk),
    .reset                (rst),
    .clear                (1'b0),
    .s_axis_data_tdata    (s_axis_tdata[IN_WIDTH-1:0]),
    .s_axis_data_tlast    (s_axis_tlast),
    .s_axis_data_tvalid   (s_axis_tvalid),
    .s_axis_data_tready   (),
    .m_axis_data_tdata    (m_axis_tdata[OUT_WIDTH-1:0]),
    .m_axis_data_tlast    (),
    .m_axis_data_tvalid   (),
    .m_axis_data_tready   (m_axis_tready),
    .s_axis_reload_tdata  (m_axis_reload_tdata),
    .s_axis_reload_tlast  (m_axis_reload_tlast),
    .s_axis_reload_tvalid (m_axis_reload_tvalid),
    .s_axis_reload_tready ()
  );

endmodule