data/full_repos/permissive/136794488/source/ledmodule.v
1: b'%Warning-WIDTH: data/full_repos/permissive/136794488/source/ledmodule.v:17: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s CONST \'4\'h0\' generates 4 bits.\n                                                                          : ... In instance ledmodule\n  in0 = 4\'b0;\n      ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/136794488/source/ledmodule.v:18: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s CONST \'4\'h0\' generates 4 bits.\n                                                                          : ... In instance ledmodule\n  in1 = 4\'b0;\n      ^\n%Error: Exiting due to 2 warning(s)\n'
module  sevenseg ( data, ledsegments);  
input [3:0] data;  
output [6:0] ledsegments;  
reg [6:0] ledsegments; 

always @ (*)      
		case(data)

			0: ledsegments = 7'b100_0000;
			1: ledsegments = 7'b111_1001;        
			2: ledsegments = 7'b010_0100;        
			3: ledsegments = 7'b011_0000;        
			4: ledsegments = 7'b001_1001;        
			5: ledsegments = 7'b001_0010;        
			6: ledsegments = 7'b000_0010;        
			7: ledsegments = 7'b111_1000;        
			8: ledsegments = 7'b000_0000;        
			9: ledsegments = 7'b001_0000;  
			4'b1010: ledsegments = 7'b000_1000;  
			4'b1011: ledsegments = 7'b000_0011;  
			4'b1100: ledsegments = 7'b010_0111;  
			4'b1101: ledsegments = 7'b010_0001;  
			4'b1110: ledsegments = 7'b000_0110;  
			4'b1111: ledsegments = 7'b000_1110;
			default: ledsegments = 7'b111_1111;
		endcase   
endmodule
module  sevenseg ( data, ledsegments);
  
input [3:0] data;  
output [6:0] ledsegments;  
reg [6:0] ledsegments; 

always @ (*)      
		case(data)

			0: ledsegments = 7'b100_0000;
			1: ledsegments = 7'b111_1001;        
			2: ledsegments = 7'b010_0100;        
			3: ledsegments = 7'b011_0000;        
			4: ledsegments = 7'b001_1001;        
			5: ledsegments = 7'b001_0010;        
			6: ledsegments = 7'b000_0010;        
			7: ledsegments = 7'b111_1000;        
			8: ledsegments = 7'b000_0000;        
			9: ledsegments = 7'b001_0000;  
			4'b1010: ledsegments = 7'b000_1000;  
			4'b1011: ledsegments = 7'b000_0011;  
			4'b1100: ledsegments = 7'b010_0111;  
			4'b1101: ledsegments = 7'b010_0001;  
			4'b1110: ledsegments = 7'b000_0110;  
			4'b1111: ledsegments = 7'b000_1110;
			default: ledsegments = 7'b111_1111;
		endcase   
endmodule