data/full_repos/permissive/196257568/neural_net_verilog/testing_code/mult_test.v
data/verilator_xmls/80468b87-1140-4ac4-9873-61ab54fc70f0.xml
module mult_test(x,y,z,w);


	input  signed [8:0] x, y;
	output signed [17:0] w;
	output signed [8:0] z;
		
	assign w = x*y;
	assign z = {w[17],w[11:4]};

endmodule
module mult_test(x,y,z,w);



	input  signed [8:0] x, y;
	output signed [17:0] w;
	output signed [8:0] z;
		
	assign w = x*y;
	assign z = {w[17],w[11:4]};

endmodule