data/full_repos/permissive/205055389/test/verga/minmax.v
 line:6: before: ":"
1: b'%Error: data/full_repos/permissive/205055389/test/verga/minmax.v:6: syntax error, unexpected \':\'\n #1:2:3 $display("%t: done",$time); \n   ^\n%Warning-STMTDLY: data/full_repos/permissive/205055389/test/verga/minmax.v:6: Unsupported: Ignoring delay on this delayed statement.\n #1:2:3 $display("%t: done",$time); \n ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 error(s), 1 warning(s)\n'
module top;
  real n,a,b,c;

  initial
    begin
	#1:2:3 $display("%t: done",$time);	
    end
endmodule
module top;

  real n,a,b,c;

  initial
    begin
	#1:2:3 $display("%t: done",$time);	
    end
endmodule