data/full_repos/permissive/143278/ivltests/pr2138682.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/pr2138682.v:16: Unsupported: Ignoring delay on this delayed statement.\n  #1;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module bug();

wire [2:0] Value1 = 0;

generate
  genvar i;

  for (i = 0; i < 8; i = i + 1) begin:Block
    wire [2:0] Value2;

    assign Value2 = Value1 + 7 - i;
  end
endgenerate

initial begin
  #1;
  $display("Block 0 value = %0d", Block[0].Value2);
  $display("Block 1 value = %0d", Block[1].Value2);
  $display("Block 2 value = %0d", Block[2].Value2);
  $display("Block 3 value = %0d", Block[3].Value2);
  $display("Block 4 value = %0d", Block[4].Value2);
  $display("Block 5 value = %0d", Block[5].Value2);
  $display("Block 6 value = %0d", Block[6].Value2);
  $display("Block 7 value = %0d", Block[7].Value2);
end

endmodule
module bug();


wire [2:0] Value1 = 0;

generate
  genvar i;

  for (i = 0; i < 8; i = i + 1) begin:Block
    wire [2:0] Value2;

    assign Value2 = Value1 + 7 - i;
  end
endgenerate

initial begin
  #1;
  $display("Block 0 value = %0d", Block[0].Value2);
  $display("Block 1 value = %0d", Block[1].Value2);
  $display("Block 2 value = %0d", Block[2].Value2);
  $display("Block 3 value = %0d", Block[3].Value2);
  $display("Block 4 value = %0d", Block[4].Value2);
  $display("Block 5 value = %0d", Block[5].Value2);
  $display("Block 6 value = %0d", Block[6].Value2);
  $display("Block 7 value = %0d", Block[7].Value2);
end

endmodule