data/full_repos/permissive/18477150/lib/shared/circbuf/sonic_rx_circular_buffer.sv
None: at end of input
1: b'%Error: data/full_repos/permissive/18477150/lib/shared/circbuf/sonic_rx_circular_buffer.sv:5: Cannot find include file: sonic_constants.sv\n`include "sonic_constants.sv" \n         ^~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/18477150/lib/shared/circbuf,data/full_repos/permissive/18477150/sonic_constants.sv\n             data/full_repos/permissive/18477150/lib/shared/circbuf,data/full_repos/permissive/18477150/sonic_constants.sv.v\n             data/full_repos/permissive/18477150/lib/shared/circbuf,data/full_repos/permissive/18477150/sonic_constants.sv.sv\n             sonic_constants.sv\n             sonic_constants.sv.v\n             sonic_constants.sv.sv\n             obj_dir/sonic_constants.sv\n             obj_dir/sonic_constants.sv.v\n             obj_dir/sonic_constants.sv.sv\n%Error: data/full_repos/permissive/18477150/lib/shared/circbuf/sonic_rx_circular_buffer.sv:36: Define or directive not defined: \'`RX_READ_ADDR_WIDTH\'\n  input logic [`RX_READ_ADDR_WIDTH-1:0] rd_address_owords,  \n               ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/18477150/lib/shared/circbuf/sonic_rx_circular_buffer.sv:53: Define or directive not defined: \'`USED_QWORDS_WIDTH\'\n  output logic [`USED_QWORDS_WIDTH-1:0] rdusedqwords,\n                ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/18477150/lib/shared/circbuf/sonic_rx_circular_buffer.sv:54: Define or directive not defined: \'`USED_QWORDS_WIDTH\'\n  output logic [`USED_QWORDS_WIDTH-1:0] rx_ring_wptr\n                ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/18477150/lib/shared/circbuf/sonic_rx_circular_buffer.sv:62: Define or directive not defined: \'`RX_WRITE_ADDR_WIDTH\'\n logic [`RX_WRITE_ADDR_WIDTH-1:0] wrptr_qwords;\n        ^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/18477150/lib/shared/circbuf/sonic_rx_circular_buffer.sv:107: Define or directive not defined: \'`USED_QWORDS_WIDTH\'\n wire [`USED_QWORDS_WIDTH-1:0] wrusedqwords;\n       ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/18477150/lib/shared/circbuf/sonic_rx_circular_buffer.sv:130: Define or directive not defined: \'`USED_QWORDS_WIDTH\'\n defparam usedw_calculator.WIDTH = `USED_QWORDS_WIDTH,\n                                   ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/18477150/lib/shared/circbuf/sonic_rx_circular_buffer.sv:130: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n defparam usedw_calculator.WIDTH = `USED_QWORDS_WIDTH,\n                                                     ^\n%Error: data/full_repos/permissive/18477150/lib/shared/circbuf/sonic_rx_circular_buffer.sv:131: Define or directive not defined: \'`RING_DEPTH_QWORDS\'\n    usedw_calculator.QWORD_DEPTH = `RING_DEPTH_QWORDS,\n                                   ^~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 9 error(s)\n'
module sonic_rx_circular_buffer # (
		parameter INPUT_WIDTH		= 40,
		parameter BUFFER_WIDTH		= 64,
		parameter OUTPUT_WIDTH		= 128
	)(

		input logic	wrena,
		input logic	wrreq,	
		input logic [INPUT_WIDTH-1:0] data_in,


		output logic [OUTPUT_WIDTH-1:0]	  read_data,
		input logic [`RX_READ_ADDR_WIDTH-1:0] rd_address_owords,
		input logic rdena,
		input logic rdreq,
		input logic	waitrequest,


		input logic reset,
		input logic rdclock,
		input logic wrclock,


		output logic empty,
		output logic full,
		output logic almost_full,
		output logic almost_empty,


		output logic [`USED_QWORDS_WIDTH-1:0] rdusedqwords,
		output logic [`USED_QWORDS_WIDTH-1:0] rx_ring_wptr
	);
	
	localparam READ_BYTE_WIDTH	= OUTPUT_WIDTH/8;




	logic [`RX_WRITE_ADDR_WIDTH-1:0] wrptr_qwords;
	
	logic [BUFFER_WIDTH-1:0] gearbox_out;

	logic gearbox_datavalid;





	sonic_dpram_async_64_128 circbuf_dpram(
		.data(gearbox_out),
		.wraddress(wrptr_qwords),
		.wrclock(wrclock),
		.wren(gearbox_datavalid),
		.rdaddress(rd_address_owords),
		.rdclock(rdclock),
		.rden(1'b1),
		.q(read_data)
	);















	always @ (posedge reset or posedge wrclock) begin
		if (reset == 1'b1) begin

			wrptr_qwords <= 0;	
		end
		else if ((wrena == 1'b1) && (wrreq == 1'b1) && (full != 1'b1) && gearbox_datavalid) begin
			wrptr_qwords <= wrptr_qwords + 1;
		end
	end

	wire [`USED_QWORDS_WIDTH-1:0] wrusedqwords;



	sonic_common_fifo_usedw_calculator usedw_calculator (
		.rdclock(rdclock),
		.wrclock(wrclock),
		.reset(reset),
		.wrena(wrena),
		.wrreq(wrreq & gearbox_datavalid),	


		.rdreq(rdreq),
		.rdena(rdena),
		.wrusedqwords(wrusedqwords),
		.full(full),
		.almost_full(almost_full),
		.rdusedqwords(rdusedqwords),
		.clock_crossed_wptr(rx_ring_wptr),
		.clock_crossed_rptr(),
		.empty(empty),
		.almost_empty(almost_empty)
	);
	defparam usedw_calculator.WIDTH = `USED_QWORDS_WIDTH,
			 usedw_calculator.QWORD_DEPTH = `RING_DEPTH_QWORDS,
			 usedw_calculator.UPSTREAM = 1,
			 usedw_calculator.READ_TO_WRITE_DELAY = 0,
			 usedw_calculator.WRITE_TO_READ_DELAY = 0;
	



	sonic_upstream_gearbox gearbox_upstream (
		.clk(wrclock),
		.reset(reset),	
		.data_in(data_in),
		.data_out(gearbox_out),
		.data_valid(gearbox_datavalid)
	);
	defparam gearbox_upstream.INPUT_WIDTH=INPUT_WIDTH,
			 gearbox_upstream.OUTPUT_WIDTH=BUFFER_WIDTH;
endmodule
module sonic_rx_circular_buffer # (
		parameter INPUT_WIDTH		= 40,
		parameter BUFFER_WIDTH		= 64,
		parameter OUTPUT_WIDTH		= 128
	)(

		input logic	wrena,
		input logic	wrreq,	
		input logic [INPUT_WIDTH-1:0] data_in,


		output logic [OUTPUT_WIDTH-1:0]	  read_data,
		input logic [`RX_READ_ADDR_WIDTH-1:0] rd_address_owords,
		input logic rdena,
		input logic rdreq,
		input logic	waitrequest,


		input logic reset,
		input logic rdclock,
		input logic wrclock,


		output logic empty,
		output logic full,
		output logic almost_full,
		output logic almost_empty,


		output logic [`USED_QWORDS_WIDTH-1:0] rdusedqwords,
		output logic [`USED_QWORDS_WIDTH-1:0] rx_ring_wptr
	);

	
	localparam READ_BYTE_WIDTH	= OUTPUT_WIDTH/8;




	logic [`RX_WRITE_ADDR_WIDTH-1:0] wrptr_qwords;
	
	logic [BUFFER_WIDTH-1:0] gearbox_out;

	logic gearbox_datavalid;





	sonic_dpram_async_64_128 circbuf_dpram(
		.data(gearbox_out),
		.wraddress(wrptr_qwords),
		.wrclock(wrclock),
		.wren(gearbox_datavalid),
		.rdaddress(rd_address_owords),
		.rdclock(rdclock),
		.rden(1'b1),
		.q(read_data)
	);















	always @ (posedge reset or posedge wrclock) begin
		if (reset == 1'b1) begin

			wrptr_qwords <= 0;	
		end
		else if ((wrena == 1'b1) && (wrreq == 1'b1) && (full != 1'b1) && gearbox_datavalid) begin
			wrptr_qwords <= wrptr_qwords + 1;
		end
	end

	wire [`USED_QWORDS_WIDTH-1:0] wrusedqwords;



	sonic_common_fifo_usedw_calculator usedw_calculator (
		.rdclock(rdclock),
		.wrclock(wrclock),
		.reset(reset),
		.wrena(wrena),
		.wrreq(wrreq & gearbox_datavalid),	


		.rdreq(rdreq),
		.rdena(rdena),
		.wrusedqwords(wrusedqwords),
		.full(full),
		.almost_full(almost_full),
		.rdusedqwords(rdusedqwords),
		.clock_crossed_wptr(rx_ring_wptr),
		.clock_crossed_rptr(),
		.empty(empty),
		.almost_empty(almost_empty)
	);
	defparam usedw_calculator.WIDTH = `USED_QWORDS_WIDTH,
			 usedw_calculator.QWORD_DEPTH = `RING_DEPTH_QWORDS,
			 usedw_calculator.UPSTREAM = 1,
			 usedw_calculator.READ_TO_WRITE_DELAY = 0,
			 usedw_calculator.WRITE_TO_READ_DELAY = 0;
	



	sonic_upstream_gearbox gearbox_upstream (
		.clk(wrclock),
		.reset(reset),	
		.data_in(data_in),
		.data_out(gearbox_out),
		.data_valid(gearbox_datavalid)
	);
	defparam gearbox_upstream.INPUT_WIDTH=INPUT_WIDTH,
			 gearbox_upstream.OUTPUT_WIDTH=BUFFER_WIDTH;
endmodule