data/full_repos/permissive/210844779/lab4/4.3.2/decoder.v
1: b'%Warning-WIDTH: data/full_repos/permissive/210844779/lab4/4.3.2/decoder.v:10: Operator AND expects 16 bits on the RHS, but RHS\'s VARREF \'en\' generates 1 bits.\n                                                                            : ... In instance decoder\n  assign temp=16\'b01 & en;\n                     ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module decoder(sel,en,op);
  parameter m=4;
  
  input [m-1:0]sel;
  input en;
  output [2**m-1:0]op;
  
  wire [2**m-1:0]temp;
  
  assign temp=16'b01 & en;
  
  assign op=temp << sel;
  
endmodule
module decoder(sel,en,op);

  parameter m=4;
  
  input [m-1:0]sel;
  input en;
  output [2**m-1:0]op;
  
  wire [2**m-1:0]temp;
  
  assign temp=16'b01 & en;
  
  assign op=temp << sel;
  
endmodule