data/full_repos/permissive/172908596/Instruction Memory/IM_with_pc_tb.v
 line:55: before: ","
1: b'%Error: Cannot find file containing module: Memory,data/full_repos/permissive/172908596\n        ... Looked in:\n             data/full_repos/permissive/172908596/Instruction/Memory,data/full_repos/permissive/172908596\n             data/full_repos/permissive/172908596/Instruction/Memory,data/full_repos/permissive/172908596.v\n             data/full_repos/permissive/172908596/Instruction/Memory,data/full_repos/permissive/172908596.sv\n             Memory,data/full_repos/permissive/172908596\n             Memory,data/full_repos/permissive/172908596.v\n             Memory,data/full_repos/permissive/172908596.sv\n             obj_dir/Memory,data/full_repos/permissive/172908596\n             obj_dir/Memory,data/full_repos/permissive/172908596.v\n             obj_dir/Memory,data/full_repos/permissive/172908596.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/172908596/Instruction\n%Error: Cannot find file containing module: Memory/IM_with_pc_tb.v\n%Error: Exiting due to 3 error(s)\n'
module test_IM;
initial
begin
    $dumpfile("IM_with_pc.vcd");
    $dumpvars(0,test_IM);
end
  wire [31:0] IMout;
  reg clock=1,reset=0;
  IM_with_pc IM(IMout,clock,reset);
  always
  begin
    #20 clock=~clock;
  end
  always
  begin
  #160 reset=~reset;
  end
initial
begin
#2000 $finish;
end
endmodule
module test_IM;

initial
begin
    $dumpfile("IM_with_pc.vcd");
    $dumpvars(0,test_IM);
end
  wire [31:0] IMout;
  reg clock=1,reset=0;
  IM_with_pc IM(IMout,clock,reset);
  always
  begin
    #20 clock=~clock;
  end
  always
  begin
  #160 reset=~reset;
  end
initial
begin
#2000 $finish;
end
endmodule