data/full_repos/permissive/206169433/single cycle/control.v
1: b'%Error: Cannot find file containing module: cycle,data/full_repos/permissive/206169433\n        ... Looked in:\n             data/full_repos/permissive/206169433/single/cycle,data/full_repos/permissive/206169433\n             data/full_repos/permissive/206169433/single/cycle,data/full_repos/permissive/206169433.v\n             data/full_repos/permissive/206169433/single/cycle,data/full_repos/permissive/206169433.sv\n             cycle,data/full_repos/permissive/206169433\n             cycle,data/full_repos/permissive/206169433.v\n             cycle,data/full_repos/permissive/206169433.sv\n             obj_dir/cycle,data/full_repos/permissive/206169433\n             obj_dir/cycle,data/full_repos/permissive/206169433.v\n             obj_dir/cycle,data/full_repos/permissive/206169433.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/206169433/single\n%Error: Cannot find file containing module: cycle/control.v\n%Error: Exiting due to 3 error(s)\n'
module control(opcode,
                    regdst, jump, branch_beq,
                    branch_bne, memread, memtoreg,
                    memwrite, regwrite, alusrc, aluop);
    
    input [5:0] opcode;
    output regdst, jump, branch_beq,
                branch_bne, memread, memtoreg,
                memwrite, regwrite, alusrc;
    output [1:0] aluop;

    reg regdst, jump, branch_beq,
                branch_bne, memread, memtoreg,
                memwrite, regwrite, alusrc;

    reg [1:0] aluop;



    initial begin
        regdst <= 1'b0;
        jump <= 1'b0;
        branch_beq <= 1'b0;
        branch_bne <= 1'b0;
        memread <= 1'b0;
        memtoreg <= 1'b0;
        memwrite <= 1'b0;
        regwrite <= 1'b0;
        alusrc <= 1'b0;
        aluop <= 2'b00;
    end


    always @(opcode) begin
        case (opcode)
            6'b000000: begin
                regdst <= 1'b1;
                jump <= 1'b0;
                branch_beq <= 1'b0;
                branch_bne <= 1'b0;
                memread <= 1'b0;
                memtoreg <= 1'b0;
                memwrite <= 1'b0;
                regwrite <= 1'b1;
                alusrc <= 1'b0;
                aluop <= 2'b10;
            end
            6'b100011: begin
                regdst <= 1'b0;
                jump <= 1'b0;
                branch_beq <= 1'b0;
                branch_bne <= 1'b0;
                memread <= 1'b1;
                memtoreg <= 1'b1;
                memwrite <= 1'b0;
                regwrite <= 1'b1;
                alusrc <= 1'b1;
                aluop <= 2'b00;
            end            
            6'b101011: begin
                regdst <= 1'b0;
                jump <= 1'b0;
                branch_beq <= 1'b0;
                branch_bne <= 1'b0;
                memread <= 1'b0;
                memtoreg <= 1'b0;
                memwrite <= 1'b1;
                regwrite <= 1'b0;
                alusrc <= 1'b1;
                aluop <= 2'b00;
            end
            6'b001000: begin
                regdst <= 1'b0;
                jump <= 1'b0;
                branch_beq <= 1'b0;
                branch_bne <= 1'b0;
                memread <= 1'b0;
                memtoreg <= 1'b0;
                memwrite <= 1'b0;
                regwrite <= 1'b1;
                alusrc <= 1'b1;
                aluop <= 2'b00;
            end
            6'b001100: begin
                regdst <= 1'b0;
                jump <= 1'b0;
                branch_beq <= 1'b0;
                branch_bne <= 1'b0;
                memread <= 1'b0;
                memtoreg <= 1'b0;
                memwrite <= 1'b0;
                regwrite <= 1'b1;
                alusrc <= 1'b1;
                aluop <= 2'b11;
            end
            6'b000100: begin
                regdst <= 1'b0;
                jump <= 1'b0;
                branch_beq <= 1'b1;
                branch_bne <= 1'b0;
                memread <= 1'b0;
                memtoreg <= 1'b0;
                memwrite <= 1'b0;
                regwrite <= 1'b0;
                alusrc <= 1'b0;
                aluop <= 2'b01;
            end
            6'b000101: begin
                regdst <= 1'b0;
                jump <= 1'b0;
                branch_beq <= 1'b0;
                branch_bne <= 1'b1;
                memread <= 1'b0;
                memtoreg <= 1'b0;
                memwrite <= 1'b0;
                regwrite <= 1'b0;
                alusrc <= 1'b0;
                aluop <= 2'b01;
            end
            6'b000010: begin
                regdst <= 1'b0;
                jump <= 1'b1;
                branch_beq <= 1'b0;
                branch_bne <= 1'b0;
                memread <= 1'b0;
                memtoreg <= 1'b0;
                memwrite <= 1'b0;
                regwrite <= 1'b0;
                alusrc <= 1'b0;
                aluop <= 2'b10;
            end
        endcase
    end

endmodule
module control(opcode,
                    regdst, jump, branch_beq,
                    branch_bne, memread, memtoreg,
                    memwrite, regwrite, alusrc, aluop);

    
    input [5:0] opcode;
    output regdst, jump, branch_beq,
                branch_bne, memread, memtoreg,
                memwrite, regwrite, alusrc;
    output [1:0] aluop;

    reg regdst, jump, branch_beq,
                branch_bne, memread, memtoreg,
                memwrite, regwrite, alusrc;

    reg [1:0] aluop;



    initial begin
        regdst <= 1'b0;
        jump <= 1'b0;
        branch_beq <= 1'b0;
        branch_bne <= 1'b0;
        memread <= 1'b0;
        memtoreg <= 1'b0;
        memwrite <= 1'b0;
        regwrite <= 1'b0;
        alusrc <= 1'b0;
        aluop <= 2'b00;
    end


    always @(opcode) begin
        case (opcode)
            6'b000000: begin
                regdst <= 1'b1;
                jump <= 1'b0;
                branch_beq <= 1'b0;
                branch_bne <= 1'b0;
                memread <= 1'b0;
                memtoreg <= 1'b0;
                memwrite <= 1'b0;
                regwrite <= 1'b1;
                alusrc <= 1'b0;
                aluop <= 2'b10;
            end
            6'b100011: begin
                regdst <= 1'b0;
                jump <= 1'b0;
                branch_beq <= 1'b0;
                branch_bne <= 1'b0;
                memread <= 1'b1;
                memtoreg <= 1'b1;
                memwrite <= 1'b0;
                regwrite <= 1'b1;
                alusrc <= 1'b1;
                aluop <= 2'b00;
            end            
            6'b101011: begin
                regdst <= 1'b0;
                jump <= 1'b0;
                branch_beq <= 1'b0;
                branch_bne <= 1'b0;
                memread <= 1'b0;
                memtoreg <= 1'b0;
                memwrite <= 1'b1;
                regwrite <= 1'b0;
                alusrc <= 1'b1;
                aluop <= 2'b00;
            end
            6'b001000: begin
                regdst <= 1'b0;
                jump <= 1'b0;
                branch_beq <= 1'b0;
                branch_bne <= 1'b0;
                memread <= 1'b0;
                memtoreg <= 1'b0;
                memwrite <= 1'b0;
                regwrite <= 1'b1;
                alusrc <= 1'b1;
                aluop <= 2'b00;
            end
            6'b001100: begin
                regdst <= 1'b0;
                jump <= 1'b0;
                branch_beq <= 1'b0;
                branch_bne <= 1'b0;
                memread <= 1'b0;
                memtoreg <= 1'b0;
                memwrite <= 1'b0;
                regwrite <= 1'b1;
                alusrc <= 1'b1;
                aluop <= 2'b11;
            end
            6'b000100: begin
                regdst <= 1'b0;
                jump <= 1'b0;
                branch_beq <= 1'b1;
                branch_bne <= 1'b0;
                memread <= 1'b0;
                memtoreg <= 1'b0;
                memwrite <= 1'b0;
                regwrite <= 1'b0;
                alusrc <= 1'b0;
                aluop <= 2'b01;
            end
            6'b000101: begin
                regdst <= 1'b0;
                jump <= 1'b0;
                branch_beq <= 1'b0;
                branch_bne <= 1'b1;
                memread <= 1'b0;
                memtoreg <= 1'b0;
                memwrite <= 1'b0;
                regwrite <= 1'b0;
                alusrc <= 1'b0;
                aluop <= 2'b01;
            end
            6'b000010: begin
                regdst <= 1'b0;
                jump <= 1'b1;
                branch_beq <= 1'b0;
                branch_bne <= 1'b0;
                memread <= 1'b0;
                memtoreg <= 1'b0;
                memwrite <= 1'b0;
                regwrite <= 1'b0;
                alusrc <= 1'b0;
                aluop <= 2'b10;
            end
        endcase
    end

endmodule