data/full_repos/permissive/129155059/03-library/cosa.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Warning-STMTDLY: data/full_repos/permissive/129155059/03-library/cosa.v:120: Unsupported: Ignoring delay on this delayed statement.\n    #1 LE = 0;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/129155059/03-library/cosa.v:123: Unsupported: Ignoring delay on this delayed statement.\n      #1 Contador = 0;\n      ^\n%Error: data/full_repos/permissive/129155059/03-library/cosa.v:128: Unsupported: Seeding $random doesn\'t map to C++, use $c("srand")\n    oprA = $random(semilla);\n           ^~~~~~~\n%Error: Internal Error: data/full_repos/permissive/129155059/03-library/cosa.v:128: ../V3Ast.cpp:358: Null item passed to setOp1p\n    oprA = $random(semilla);\n         ^\n                        ... See the manual and https://verilator.org for more assistance.\n'
module Sum_comp (a, b, ci, s, co);
  parameter PwrC = 0;
  input a, b, ci;
  output s, co;


  xor2_p #(PwrC) g1(x, a, b);
  xor2_p #(PwrC) g2(s, x, ci);


  and2_p #(PwrC) g3(z1,a, b);
  and2_p #(PwrC) g4(z2,a, ci);
  and2_p #(PwrC) g5(z3,b, ci);
  or2_p #(PwrC) g6(z4,z1, z2);
  or2_p #(PwrC) g7(co,z3, z4);

endmodule
module Sum_comp (a, b, ci, s, co);

  parameter PwrC = 0;
  input a, b, ci;
  output s, co;


  xor2_p #(PwrC) g1(x, a, b);
  xor2_p #(PwrC) g2(s, x, ci);


  and2_p #(PwrC) g3(z1,a, b);
  and2_p #(PwrC) g4(z2,a, ci);
  and2_p #(PwrC) g5(z3,b, ci);
  or2_p #(PwrC) g6(z4,z1, z2);
  or2_p #(PwrC) g7(co,z3, z4);

endmodule