data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/combinational_unsigned_integer_multiplier.v
1: b"%Error: data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/combinational_unsigned_integer_multiplier.v:50: Cannot find file containing module: 'AND5'\nAND5 AND0 (A, B[0], PP_from_AND0);  \n^~~~\n        ... Looked in:\n             data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new,data/full_repos/permissive/124604849/AND5\n             data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new,data/full_repos/permissive/124604849/AND5.v\n             data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new,data/full_repos/permissive/124604849/AND5.sv\n             AND5\n             AND5.v\n             AND5.sv\n             obj_dir/AND5\n             obj_dir/AND5.v\n             obj_dir/AND5.sv\n%Error: data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/combinational_unsigned_integer_multiplier.v:51: Cannot find file containing module: 'AND5'\nAND5 AND1 (A, B[1], PP_from_AND1);  \n^~~~\n%Error: data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/combinational_unsigned_integer_multiplier.v:52: Cannot find file containing module: 'AND5'\nAND5 AND2 (A, B[2], PP_from_AND2);  \n^~~~\n%Error: data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/combinational_unsigned_integer_multiplier.v:53: Cannot find file containing module: 'AND5'\nAND5 AND3 (A, B[3], PP_from_AND3);  \n^~~~\n%Error: data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/combinational_unsigned_integer_multiplier.v:55: Cannot find file containing module: 'bit_shifter_rotator'\nbit_shifter_rotator SHIFT0 (2'b000, PP_from_AND0, PP0);  \n^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/combinational_unsigned_integer_multiplier.v:56: Cannot find file containing module: 'bit_shifter_rotator'\nbit_shifter_rotator SHIFT1 (2'b001, PP_from_AND1, PP1);  \n^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/combinational_unsigned_integer_multiplier.v:57: Cannot find file containing module: 'bit_shifter_rotator'\nbit_shifter_rotator SHIFT2 (2'b010, PP_from_AND2, PP2);  \n^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/combinational_unsigned_integer_multiplier.v:58: Cannot find file containing module: 'bit_shifter_rotator'\nbit_shifter_rotator SHIFT3 (2'b011, PP_from_AND3, PP3);  \n^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/combinational_unsigned_integer_multiplier.v:60: Cannot find file containing module: 'CLA_adder_8bit'\nCLA_adder_8bit ADD_PP0_PP1 (\n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/combinational_unsigned_integer_multiplier.v:67: Cannot find file containing module: 'CLA_adder_8bit'\nCLA_adder_8bit ADD_PP2_PP3 (\n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/combinational_unsigned_integer_multiplier.v:74: Cannot find file containing module: 'CLA_adder_8bit'\nCLA_adder_8bit ADD_TOTAL (\n^~~~~~~~~~~~~~\n%Error: Exiting due to 11 error(s)\n"
module combinational_unsigned_integer_multiplier(
input  [3:0] A,
input  [3:0] B,
output reg [7:0] P,
output reg overflow
);

wire [7:0] PP_from_AND0;
wire [7:0] PP_from_AND1;
wire [7:0] PP_from_AND2;
wire [7:0] PP_from_AND3;

wire [7:0] PP0;
wire [7:0] PP1;
wire [7:0] PP2;
wire [7:0] PP3;

wire [7:0] PP0_plus_PP1;
wire [7:0] PP2_plus_PP3;
wire [7:0] P_final;
wire overflow_final;

wire carry_from_PP0_plus_PP1;
wire carry_from_PP2_plus_PP3;



AND5 AND0 (A, B[0], PP_from_AND0);
AND5 AND1 (A, B[1], PP_from_AND1);
AND5 AND2 (A, B[2], PP_from_AND2);
AND5 AND3 (A, B[3], PP_from_AND3);

bit_shifter_rotator SHIFT0 (2'b000, PP_from_AND0, PP0);
bit_shifter_rotator SHIFT1 (2'b001, PP_from_AND1, PP1);
bit_shifter_rotator SHIFT2 (2'b010, PP_from_AND2, PP2);
bit_shifter_rotator SHIFT3 (2'b011, PP_from_AND3, PP3);

CLA_adder_8bit ADD_PP0_PP1 (
    .A(PP0), 
    .B(PP1), 
    .c_in(1'b0), 
    .SUM(PP0_plus_PP1), 
    .c_out(carry_from_PP0_plus_PP1));

CLA_adder_8bit ADD_PP2_PP3 (
    .A(PP2), 
    .B(PP3), 
    .c_in(carry_from_PP0_plus_PP1), 
    .SUM(PP2_plus_PP3), 
    .c_out(carry_from_PP2_plus_PP3));
    
CLA_adder_8bit ADD_TOTAL (
    .A(PP0_plus_PP1), 
    .B(PP2_plus_PP3), 
    .c_in(carry_from_PP0_plus_PP1), 
    .SUM(P_final), 
    .c_out(overflow_final));

always @ (*)
begin
P <= P_final;
overflow <= overflow_final;
end



endmodule
module combinational_unsigned_integer_multiplier(
input  [3:0] A,
input  [3:0] B,
output reg [7:0] P,
output reg overflow
);


wire [7:0] PP_from_AND0;
wire [7:0] PP_from_AND1;
wire [7:0] PP_from_AND2;
wire [7:0] PP_from_AND3;

wire [7:0] PP0;
wire [7:0] PP1;
wire [7:0] PP2;
wire [7:0] PP3;

wire [7:0] PP0_plus_PP1;
wire [7:0] PP2_plus_PP3;
wire [7:0] P_final;
wire overflow_final;

wire carry_from_PP0_plus_PP1;
wire carry_from_PP2_plus_PP3;



AND5 AND0 (A, B[0], PP_from_AND0);
AND5 AND1 (A, B[1], PP_from_AND1);
AND5 AND2 (A, B[2], PP_from_AND2);
AND5 AND3 (A, B[3], PP_from_AND3);

bit_shifter_rotator SHIFT0 (2'b000, PP_from_AND0, PP0);
bit_shifter_rotator SHIFT1 (2'b001, PP_from_AND1, PP1);
bit_shifter_rotator SHIFT2 (2'b010, PP_from_AND2, PP2);
bit_shifter_rotator SHIFT3 (2'b011, PP_from_AND3, PP3);

CLA_adder_8bit ADD_PP0_PP1 (
    .A(PP0), 
    .B(PP1), 
    .c_in(1'b0), 
    .SUM(PP0_plus_PP1), 
    .c_out(carry_from_PP0_plus_PP1));

CLA_adder_8bit ADD_PP2_PP3 (
    .A(PP2), 
    .B(PP3), 
    .c_in(carry_from_PP0_plus_PP1), 
    .SUM(PP2_plus_PP3), 
    .c_out(carry_from_PP2_plus_PP3));
    
CLA_adder_8bit ADD_TOTAL (
    .A(PP0_plus_PP1), 
    .B(PP2_plus_PP3), 
    .c_in(carry_from_PP0_plus_PP1), 
    .SUM(P_final), 
    .c_out(overflow_final));

always @ (*)
begin
P <= P_final;
overflow <= overflow_final;
end



endmodule