data/full_repos/permissive/160895047/Control_Unit.v
1: b'%Error: data/full_repos/permissive/160895047/Control_Unit.v:3: Cannot find include file: Instructions.v\n`include "Instructions.v" \n         ^~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/160895047,data/full_repos/permissive/160895047/Instructions.v\n             data/full_repos/permissive/160895047,data/full_repos/permissive/160895047/Instructions.v.v\n             data/full_repos/permissive/160895047,data/full_repos/permissive/160895047/Instructions.v.sv\n             Instructions.v\n             Instructions.v.v\n             Instructions.v.sv\n             obj_dir/Instructions.v\n             obj_dir/Instructions.v.v\n             obj_dir/Instructions.v.sv\n%Error: data/full_repos/permissive/160895047/Control_Unit.v:4: Cannot find include file: ALU_Decoder.v\n`include "ALU_Decoder.v" \n         ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/160895047/Control_Unit.v:45: Define or directive not defined: \'`R_TYPE\'\n  `R_TYPE:\n  ^~~~~~~\n%Error: data/full_repos/permissive/160895047/Control_Unit.v:45: syntax error, unexpected \':\', expecting endcase\n  `R_TYPE:\n         ^\n%Error: data/full_repos/permissive/160895047/Control_Unit.v:65: Define or directive not defined: \'`LW\'\n  `LW:\n  ^~~\n%Error: data/full_repos/permissive/160895047/Control_Unit.v:66: syntax error, unexpected begin, expecting IDENTIFIER or PACKAGE-IDENTIFIER or TYPE-IDENTIFIER or new\n  begin\n  ^~~~~\n%Error: data/full_repos/permissive/160895047/Control_Unit.v:77: Define or directive not defined: \'`SW\'\n  `SW:\n  ^~~\n%Error: data/full_repos/permissive/160895047/Control_Unit.v:78: syntax error, unexpected begin, expecting IDENTIFIER or PACKAGE-IDENTIFIER or TYPE-IDENTIFIER or new\n  begin\n  ^~~~~\n%Error: data/full_repos/permissive/160895047/Control_Unit.v:88: Define or directive not defined: \'`NOOP\'\n  `NOOP:\n  ^~~~~\n%Error: data/full_repos/permissive/160895047/Control_Unit.v:89: syntax error, unexpected begin, expecting IDENTIFIER or PACKAGE-IDENTIFIER or TYPE-IDENTIFIER or new\n  begin\n  ^~~~~\n%Error: data/full_repos/permissive/160895047/Control_Unit.v:96: syntax error, unexpected \':\', expecting clocking\n  default:\n         ^\n%Error: Exiting due to 11 error(s)\n'
module Control_Unit(
	Op,
	Funct,
	Jump,
	MemToReg,
	MemWrite,
	Branch,
	ALUControl,
	ALUSrc,
	RegDst,
	RegWrite
);
input [5:0] Op;
input [5:0] Funct;
output Jump;
output MemToReg;
output MemWrite;
output Branch;
output [2:0] ALUControl;
output ALUSrc;
output RegDst;
output RegWrite;

wire [5:0] Op;
wire [5:0] Funct;
reg Jump;
reg MemToReg;
reg MemWrite;
reg Branch;
wire [2:0] ALUControl;
reg ALUSrc;
reg RegDst;
reg RegWrite;

reg [1:0] ALUOp;

always @*
begin

	case (Op)
		`R_TYPE:
		begin

			Jump <= 0;
			MemToReg <= 0;
			MemWrite <= 0;
			Branch <= 0;
			ALUOp <= 2'b10;
			ALUSrc <= 0;
			RegDst <= 1;
			RegWrite <= 1;
		end








		`LW:
		begin

			Jump <= 0;
			MemToReg <= 1;
			MemWrite <= 0;
			Branch <= 0;
			ALUOp <= 2'b00;
			ALUSrc <= 1;
			RegDst <= 0;
			RegWrite <= 1;
		end
		`SW:
		begin

			Jump <= 0;
			MemToReg <= 0;
			MemWrite <= 1;
			Branch <= 0;
			ALUOp <= 2'b00;
			ALUSrc <= 1;
			RegDst <= 1'bx;
		end
		`NOOP:
		begin
			Jump <= 0;
			MemToReg <= 0;
			MemWrite <= 0;
			Branch <= 0;
		end

		default:
			$display ("Unsupported instruction %b", Op);
	endcase
end

ALU_Decoder U_ALU_DECODER (
	ALUOp,
	Funct,
	ALUControl
);

endmodule
module Control_Unit(
	Op,
	Funct,
	Jump,
	MemToReg,
	MemWrite,
	Branch,
	ALUControl,
	ALUSrc,
	RegDst,
	RegWrite
);

input [5:0] Op;
input [5:0] Funct;
output Jump;
output MemToReg;
output MemWrite;
output Branch;
output [2:0] ALUControl;
output ALUSrc;
output RegDst;
output RegWrite;

wire [5:0] Op;
wire [5:0] Funct;
reg Jump;
reg MemToReg;
reg MemWrite;
reg Branch;
wire [2:0] ALUControl;
reg ALUSrc;
reg RegDst;
reg RegWrite;

reg [1:0] ALUOp;

always @*
begin

	case (Op)
		`R_TYPE:
		begin

			Jump <= 0;
			MemToReg <= 0;
			MemWrite <= 0;
			Branch <= 0;
			ALUOp <= 2'b10;
			ALUSrc <= 0;
			RegDst <= 1;
			RegWrite <= 1;
		end








		`LW:
		begin

			Jump <= 0;
			MemToReg <= 1;
			MemWrite <= 0;
			Branch <= 0;
			ALUOp <= 2'b00;
			ALUSrc <= 1;
			RegDst <= 0;
			RegWrite <= 1;
		end
		`SW:
		begin

			Jump <= 0;
			MemToReg <= 0;
			MemWrite <= 1;
			Branch <= 0;
			ALUOp <= 2'b00;
			ALUSrc <= 1;
			RegDst <= 1'bx;
		end
		`NOOP:
		begin
			Jump <= 0;
			MemToReg <= 0;
			MemWrite <= 0;
			Branch <= 0;
		end

		default:
			$display ("Unsupported instruction %b", Op);
	endcase
end

ALU_Decoder U_ALU_DECODER (
	ALUOp,
	Funct,
	ALUControl
);

endmodule