data/full_repos/permissive/146618947/compuertas/testbench_con_vs_est.v
 line:12: before: ":"
1: b'%Error: data/full_repos/permissive/146618947/compuertas/testbench_con_vs_est.v:2: Cannot find include file: mux_estructural.v\n`include "mux_estructural.v" \n         ^~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/146618947/compuertas,data/full_repos/permissive/146618947/mux_estructural.v\n             data/full_repos/permissive/146618947/compuertas,data/full_repos/permissive/146618947/mux_estructural.v.v\n             data/full_repos/permissive/146618947/compuertas,data/full_repos/permissive/146618947/mux_estructural.v.sv\n             mux_estructural.v\n             mux_estructural.v.v\n             mux_estructural.v.sv\n             obj_dir/mux_estructural.v\n             obj_dir/mux_estructural.v.v\n             obj_dir/mux_estructural.v.sv\n%Error: data/full_repos/permissive/146618947/compuertas/testbench_con_vs_est.v:3: Cannot find include file: mux_tester.v\n`include "mux_tester.v" \n         ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/146618947/compuertas/testbench_con_vs_est.v:4: Cannot find include file: mux_conductual.v\n`include "mux_conductual.v" \n         ^~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 3 error(s)\n'
module testbench_con_vs_est;
   wire reset_L, clk;
   wire [3:0] data_0;
   wire [3:0] data_1;
   wire [3:0] data_out_conductual;
   wire [3:0] data_out_estructural;

   mux_conductual mux_conductual_( .reset_L (reset_L),
                                   .clk (clk),
                                   .data_0 (data_0),
                                   .data_1 (data_1),
                                   .data_out (data_out_conductual)
                                   );

   mux_estructural mux_estructural_ (
                                     .reset_L (reset_L),
                                     .clk (clk),
                                     .data_0 (data_0),
                                     .data_1 (data_1),
                                     .data_out (data_out_estructural)
                                     );

   mux_tester mux_tester_(.reset_L (reset_L),
                          .clk (clk),
                          .data_0 (data_0),
                          .data_1 (data_1),
                          .data_out_conductual (data_out_conductual),
                          .data_out_estructural (data_out_estructural)
                          );
endmodule
module testbench_con_vs_est;

   wire reset_L, clk;
   wire [3:0] data_0;
   wire [3:0] data_1;
   wire [3:0] data_out_conductual;
   wire [3:0] data_out_estructural;

   mux_conductual mux_conductual_( .reset_L (reset_L),
                                   .clk (clk),
                                   .data_0 (data_0),
                                   .data_1 (data_1),
                                   .data_out (data_out_conductual)
                                   );

   mux_estructural mux_estructural_ (
                                     .reset_L (reset_L),
                                     .clk (clk),
                                     .data_0 (data_0),
                                     .data_1 (data_1),
                                     .data_out (data_out_estructural)
                                     );

   mux_tester mux_tester_(.reset_L (reset_L),
                          .clk (clk),
                          .data_0 (data_0),
                          .data_1 (data_1),
                          .data_out_conductual (data_out_conductual),
                          .data_out_estructural (data_out_estructural)
                          );
endmodule