data/full_repos/permissive/143278/ivltests/redef_net_error.v
[Errno 2] No such file or directory: 'preprocess.output'
data/verilator_xmls/9dd126e3-7053-4bfe-aa34-ebc829329f9c.xml
module test;

wire [7:0] value, value;

endmodule
module test;


wire [7:0] value, value;

endmodule