data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v
None: at end of input
1: b'%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:40: Cannot find include file: defines.v\n`include "defines.v" \n         ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl,data/full_repos/permissive/150152921/defines.v\n             data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl,data/full_repos/permissive/150152921/defines.v.v\n             data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl,data/full_repos/permissive/150152921/defines.v.sv\n             defines.v\n             defines.v.v\n             defines.v.sv\n             obj_dir/defines.v\n             obj_dir/defines.v.v\n             obj_dir/defines.v.sv\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:91: Define or directive not defined: \'`cavlc_idle_s\'\n    state   <= `cavlc_idle_s;\n               ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:91: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n    state   <= `cavlc_idle_s;\n                            ^\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:97: Define or directive not defined: \'`cavlc_idle_s\'\n    `cavlc_idle_s : begin\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:97: syntax error, unexpected \':\', expecting endcase\n    `cavlc_idle_s : begin\n                  ^\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:99: Define or directive not defined: \'`cavlc_read_total_coeffs_s\'\n            state <= `cavlc_read_total_coeffs_s;\n                     ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:103: Define or directive not defined: \'`cavlc_idle_s\'\n            state <= `cavlc_idle_s;\n                     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:106: Define or directive not defined: \'`cavlc_read_total_coeffs_s\'\n    `cavlc_read_total_coeffs_s : begin\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:109: syntax error, unexpected <=, expecting IDENTIFIER\n            state <= `cavlc_read_t1s_flags_s;\n                  ^~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:109: Define or directive not defined: \'`cavlc_read_t1s_flags_s\'\n            state <= `cavlc_read_t1s_flags_s;\n                     ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:111: syntax error, unexpected <=, expecting IDENTIFIER\n            state <= `cavlc_read_level_prefix_s;\n                  ^~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:111: Define or directive not defined: \'`cavlc_read_level_prefix_s\'\n            state <= `cavlc_read_level_prefix_s;\n                     ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:113: syntax error, unexpected <=, expecting IDENTIFIER\n            state <= `cavlc_idle_s;     \n                  ^~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:113: Define or directive not defined: \'`cavlc_idle_s\'\n            state <= `cavlc_idle_s;     \n                     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:117: Define or directive not defined: \'`cavlc_read_t1s_flags_s\'\n    `cavlc_read_t1s_flags_s : begin\n    ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:119: Define or directive not defined: \'`cavlc_read_total_zeros_s\'\n            state <= `cavlc_read_total_zeros_s;         \n                     ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:121: Define or directive not defined: \'`cavlc_read_level_prefix_s\'\n            state <= `cavlc_read_level_prefix_s;\n                     ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:125: Define or directive not defined: \'`cavlc_read_level_prefix_s\'\n    `cavlc_read_level_prefix_s : begin\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:126: Define or directive not defined: \'`cavlc_read_level_suffix_s\'\n        state <= `cavlc_read_level_suffix_s;        \n                 ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:128: Define or directive not defined: \'`cavlc_read_level_suffix_s\'\n    `cavlc_read_level_suffix_s : begin\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:129: Define or directive not defined: \'`cavlc_calc_level_s\'\n        state <= `cavlc_calc_level_s;       \n                 ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:131: Define or directive not defined: \'`cavlc_calc_level_s\'\n    `cavlc_calc_level_s : begin\n    ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:133: Define or directive not defined: \'`cavlc_read_total_zeros_s\'\n            state <= `cavlc_read_total_zeros_s;\n                     ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:135: Define or directive not defined: \'`cavlc_read_run_befores_s\'\n            state <= `cavlc_read_run_befores_s;\n                     ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:139: Define or directive not defined: \'`cavlc_read_level_prefix_s\'\n            state <= `cavlc_read_level_prefix_s;\n                     ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:143: Define or directive not defined: \'`cavlc_read_total_zeros_s\'\n    `cavlc_read_total_zeros_s : begin\n    ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:144: Define or directive not defined: \'`cavlc_read_run_befores_s\'\n        state <= `cavlc_read_run_befores_s;\n                 ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:147: Define or directive not defined: \'`cavlc_read_run_befores_s\'\n    `cavlc_read_run_befores_s : begin\n    ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:149: Define or directive not defined: \'`cavlc_idle_s\'\n            state <= `cavlc_idle_s;\n                     ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:153: Define or directive not defined: \'`cavlc_read_run_befores_s\'\n            state <= `cavlc_read_run_befores_s;\n                     ^~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/cavlc/baseline/rtl/cavlc_fsm.v:159: Define or directive not defined: \'`cavlc_idle_bit\'\nassign idle = state[`cavlc_idle_bit];\n                    ^~~~~~~~~~~~~~~\n%Error: Exiting due to 31 error(s)\n'
module cavlc_fsm
(
    clk,
    rst_n,
    ena,
    start,
    max_coeff_num,
    TotalCoeff,
    TotalCoeff_comb,
    TrailingOnes,
    TrailingOnes_comb,
    ZeroLeft,
    state,
    i,
    idle,
    valid
);



input  clk;
input  rst_n;
input  ena;
input  start;

input  [4:0]  max_coeff_num;
input  [4:0]  TotalCoeff;
input  [4:0]  TotalCoeff_comb;
input  [1:0]  TrailingOnes;
input  [1:0]  TrailingOnes_comb;
input  [3:0]  ZeroLeft;

output [7:0]  state;
output [3:0]  i;
output idle;
output valid;




reg  [7:0]  state;
reg  [3:0]  i;
reg  valid;




always @(posedge clk)
if (!rst_n) begin
    state   <= `cavlc_idle_s;
    i <= 0;
    valid <= 0;
end
else if (ena)
case(state)
    `cavlc_idle_s : begin
        if (start) begin
            state <= `cavlc_read_total_coeffs_s;
            valid <= 0;
        end
        else begin
            state <= `cavlc_idle_s;
        end     
    end
    `cavlc_read_total_coeffs_s : begin
        i <= TotalCoeff_comb -1;
        if (TrailingOnes_comb > 0 && TotalCoeff_comb > 0)
            state <= `cavlc_read_t1s_flags_s;
        else if (TotalCoeff_comb > 0)
            state <= `cavlc_read_level_prefix_s;
        else begin
            state <= `cavlc_idle_s;     
            valid <= 1;
        end
    end
    `cavlc_read_t1s_flags_s : begin
        if (TrailingOnes == TotalCoeff)
            state <= `cavlc_read_total_zeros_s;         
        else begin
            state <= `cavlc_read_level_prefix_s;
            i <= i - TrailingOnes;
        end
    end
    `cavlc_read_level_prefix_s : begin
        state <= `cavlc_read_level_suffix_s;        
    end
    `cavlc_read_level_suffix_s : begin
        state <= `cavlc_calc_level_s;       
    end
    `cavlc_calc_level_s : begin
        if ( i == 0  && TotalCoeff < max_coeff_num)
            state <= `cavlc_read_total_zeros_s;
        else if (i == 0) begin
            state <= `cavlc_read_run_befores_s;
            i <= TotalCoeff - 1;
        end
        else begin
            state <= `cavlc_read_level_prefix_s;
            i <= i - 1;
        end
    end 
    `cavlc_read_total_zeros_s : begin
        state <= `cavlc_read_run_befores_s;
        i <= TotalCoeff - 1;
    end
    `cavlc_read_run_befores_s : begin
        if (i == 0 || ZeroLeft == 0) begin
            state <= `cavlc_idle_s;
            valid <= 1;
        end
        else begin
            state <= `cavlc_read_run_befores_s;
            i <= i - 1;
        end
    end     
endcase

assign idle = state[`cavlc_idle_bit];

endmodule
module cavlc_fsm
(
    clk,
    rst_n,
    ena,
    start,
    max_coeff_num,
    TotalCoeff,
    TotalCoeff_comb,
    TrailingOnes,
    TrailingOnes_comb,
    ZeroLeft,
    state,
    i,
    idle,
    valid
);




input  clk;
input  rst_n;
input  ena;
input  start;

input  [4:0]  max_coeff_num;
input  [4:0]  TotalCoeff;
input  [4:0]  TotalCoeff_comb;
input  [1:0]  TrailingOnes;
input  [1:0]  TrailingOnes_comb;
input  [3:0]  ZeroLeft;

output [7:0]  state;
output [3:0]  i;
output idle;
output valid;




reg  [7:0]  state;
reg  [3:0]  i;
reg  valid;




always @(posedge clk)
if (!rst_n) begin
    state   <= `cavlc_idle_s;
    i <= 0;
    valid <= 0;
end
else if (ena)
case(state)
    `cavlc_idle_s : begin
        if (start) begin
            state <= `cavlc_read_total_coeffs_s;
            valid <= 0;
        end
        else begin
            state <= `cavlc_idle_s;
        end     
    end
    `cavlc_read_total_coeffs_s : begin
        i <= TotalCoeff_comb -1;
        if (TrailingOnes_comb > 0 && TotalCoeff_comb > 0)
            state <= `cavlc_read_t1s_flags_s;
        else if (TotalCoeff_comb > 0)
            state <= `cavlc_read_level_prefix_s;
        else begin
            state <= `cavlc_idle_s;     
            valid <= 1;
        end
    end
    `cavlc_read_t1s_flags_s : begin
        if (TrailingOnes == TotalCoeff)
            state <= `cavlc_read_total_zeros_s;         
        else begin
            state <= `cavlc_read_level_prefix_s;
            i <= i - TrailingOnes;
        end
    end
    `cavlc_read_level_prefix_s : begin
        state <= `cavlc_read_level_suffix_s;        
    end
    `cavlc_read_level_suffix_s : begin
        state <= `cavlc_calc_level_s;       
    end
    `cavlc_calc_level_s : begin
        if ( i == 0  && TotalCoeff < max_coeff_num)
            state <= `cavlc_read_total_zeros_s;
        else if (i == 0) begin
            state <= `cavlc_read_run_befores_s;
            i <= TotalCoeff - 1;
        end
        else begin
            state <= `cavlc_read_level_prefix_s;
            i <= i - 1;
        end
    end 
    `cavlc_read_total_zeros_s : begin
        state <= `cavlc_read_run_befores_s;
        i <= TotalCoeff - 1;
    end
    `cavlc_read_run_befores_s : begin
        if (i == 0 || ZeroLeft == 0) begin
            state <= `cavlc_idle_s;
            valid <= 1;
        end
        else begin
            state <= `cavlc_read_run_befores_s;
            i <= i - 1;
        end
    end     
endcase

assign idle = state[`cavlc_idle_bit];

endmodule