data/full_repos/permissive/170402453/RISC_DIVIDER/Instruction32BitMemory.v
1: b'%Error: data/full_repos/permissive/170402453/RISC_DIVIDER/Instruction32BitMemory.v:47: Unsupported: $fopen/$fclose/$f* descriptor must be a simple variable\n   $fread(file, mem[0], 0, 32);\n   ^~~~~~\n%Error: Exiting due to 1 error(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module Instruction32BitMemory(
    input clk,
    input [31:0] Addr,
    output wire [31:0] DataOut
    );
	 
	 parameter SIZE = 64;
	 
	 reg [31:0] mem [SIZE-1:0];
	 integer i;
	 integer file, eof;

	 initial begin


		for(i=0;i<SIZE;i=i+1) begin
			mem[i] = 0;
		end
		



		
		file = $fopen("Cpp/Div.bin", "r");
		i=0;
		while(!$feof(file)) begin
			$fread(file, mem[0], 0, 32);
			i=i+32;
		end
		


	end

	 assign DataOut = mem[Addr];
endmodule
module Instruction32BitMemory(
    input clk,
    input [31:0] Addr,
    output wire [31:0] DataOut
    );

	 
	 parameter SIZE = 64;
	 
	 reg [31:0] mem [SIZE-1:0];
	 integer i;
	 integer file, eof;

	 initial begin


		for(i=0;i<SIZE;i=i+1) begin
			mem[i] = 0;
		end
		



		
		file = $fopen("Cpp/Div.bin", "r");
		i=0;
		while(!$feof(file)) begin
			$fread(file, mem[0], 0, 32);
			i=i+32;
		end
		


	end

	 assign DataOut = mem[Addr];
endmodule