data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/test_sonic_dma_circular_buffer_rx.sv
'utf-8' codec can't decode byte 0xa9 in position 215: invalid start byte
1: b'%Error: data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/test_sonic_dma_circular_buffer_rx.sv:33: Unsupported: event data types\n event           start_Monitor;\n ^~~~~\n%Error: data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/test_sonic_dma_circular_buffer_rx.sv:51: syntax error, unexpected ->\n  ->start_Monitor;               \n  ^~\n%Warning-STMTDLY: data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/test_sonic_dma_circular_buffer_rx.sv:50: Unsupported: Ignoring delay on this delayed statement.\n  #100\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/test_sonic_dma_circular_buffer_rx.sv:55: Unsupported: $fopen with multichannel descriptor.  Add ,"w" as second argument to open a file descriptor.\n  results_file=$fopen("../out/top_results.txt");\n               ^~~~~~\n%Error: data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/test_sonic_dma_circular_buffer_rx.sv:75: syntax error, unexpected \'@\'\n   @(posedge cb_intf.clk_wr);\n   ^\n%Error: data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/test_sonic_dma_circular_buffer_rx.sv:80: syntax error, unexpected \'@\'\n  repeat(10) @ (negedge cb_intf.clk_rd);\n             ^\n%Error: data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/test_sonic_dma_circular_buffer_rx.sv:85: syntax error, unexpected \'@\'\n   @(posedge cb_intf.clk_rd);\n   ^\n%Error: data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/test_sonic_dma_circular_buffer_rx.sv:96: Unsupported or unknown PLI call: $timeformat\n   $timeformat(-9, 0, " ns", 9);\n   ^~~~~~~~~~~\n%Error: data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/test_sonic_dma_circular_buffer_rx.sv:97: syntax error, unexpected \'@\'\n   @(start_Monitor)\n   ^\n%Error: data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/test_sonic_dma_circular_buffer_rx.sv:109: syntax error, unexpected endtask\n endtask    \n ^~~~~~~\n%Error: data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/test_sonic_dma_circular_buffer_rx.sv:115: syntax error, unexpected \'@\'\n  @ (posedge cb_intf.clk_wr);\n  ^\n%Error: data/full_repos/permissive/18477150/lib/sonic/pcie/examples/sonic_chaining_dma/testbench/sonic/test_sonic_dma_circular_buffer_rx.sv:117: syntax error, unexpected \'@\'\n  @ (posedge cb_intf.clk_wr);\n  ^\n%Error: Cannot continue\n        ... See the manual and https://verilator.org for more assistance.\n'
module test_sonic_dma_circular_buffer_rx (
	CircularBufferInterface cb_intf   
    );

	event           start_Monitor;


	integer		results_file;

	int cnt;
	int index;
	int result;
	logic [7:0] dt_in [0:4];

	initial
	begin

		$display("Initialize Signals");
		cb_intf.rstn <= 0;

		$display("Wait for 100 ns");
		#100
		->start_Monitor;

		

		results_file=$fopen("../out/top_results.txt");
		$fdisplay(results_file, " test_sonic_dma_circular_buffer_rx testbench results");
		$fwrite(results_file, "\n");
		DisplayHeader;

		cb_intf.data_in <= 0;
		cb_intf.rden <= 0;
		cb_intf.wren <= 0;		


		for (cnt = 0; cnt < 100; cnt = cnt + 1) begin
			cb_intf.data_in[39:0] <= {dt_in[4], dt_in[3], dt_in[2], dt_in[1], dt_in[0]};
			
			dt_in[0] <= cnt[7:0] * 5;
			dt_in[1] <= cnt[7:0] * 5 + 1;
			dt_in[2] <= cnt[7:0] * 5 + 2;
			dt_in[3] <= cnt[7:0] * 5 + 3;
			dt_in[4] <= cnt[7:0] * 5 + 4;
			
			cb_intf.wren <= 1;
			@(posedge cb_intf.clk_wr);
		end
		
		$display("At: %t, finished writing", $realtime);
	
		repeat(10) @ (negedge cb_intf.clk_rd);

		for (cnt = 0; cnt < 100; cnt = cnt+1) begin
			result <= cb_intf.data_out;
			cb_intf.rden <= 1;
			@(posedge cb_intf.clk_rd);
		end
		$display("At: %t, finished reading", $realtime);	
	
		$fclose(results_file);
		$stop;
	end


	always 
	begin: Monitor
	  $timeformat(-9, 0, " ns", 9);
	  @(start_Monitor)
	  forever @(negedge cb_intf.clk_wr)
	  begin

	  end
	end



	task DisplayHeader;
	  $fdisplay(results_file,"                       data_in      data_out ");
	  $fdisplay(results_file,"                 ============================");
	endtask    

	task CpuReset;
	begin
		@ (posedge cb_intf.clk_wr);
		cb_intf.rstn = 0;
		@ (posedge cb_intf.clk_wr);
		cb_intf.rstn = 1;
		@ (posedge cb_intf.clk_wr);
	end
	endtask

endmodule
module test_sonic_dma_circular_buffer_rx (
	CircularBufferInterface cb_intf   
    );


	event           start_Monitor;


	integer		results_file;

	int cnt;
	int index;
	int result;
	logic [7:0] dt_in [0:4];

	initial
	begin

		$display("Initialize Signals");
		cb_intf.rstn <= 0;

		$display("Wait for 100 ns");
		#100
		->start_Monitor;

		

		results_file=$fopen("../out/top_results.txt");
		$fdisplay(results_file, " test_sonic_dma_circular_buffer_rx testbench results");
		$fwrite(results_file, "\n");
		DisplayHeader;

		cb_intf.data_in <= 0;
		cb_intf.rden <= 0;
		cb_intf.wren <= 0;		


		for (cnt = 0; cnt < 100; cnt = cnt + 1) begin
			cb_intf.data_in[39:0] <= {dt_in[4], dt_in[3], dt_in[2], dt_in[1], dt_in[0]};
			
			dt_in[0] <= cnt[7:0] * 5;
			dt_in[1] <= cnt[7:0] * 5 + 1;
			dt_in[2] <= cnt[7:0] * 5 + 2;
			dt_in[3] <= cnt[7:0] * 5 + 3;
			dt_in[4] <= cnt[7:0] * 5 + 4;
			
			cb_intf.wren <= 1;
			@(posedge cb_intf.clk_wr);
		end
		
		$display("At: %t, finished writing", $realtime);
	
		repeat(10) @ (negedge cb_intf.clk_rd);

		for (cnt = 0; cnt < 100; cnt = cnt+1) begin
			result <= cb_intf.data_out;
			cb_intf.rden <= 1;
			@(posedge cb_intf.clk_rd);
		end
		$display("At: %t, finished reading", $realtime);	
	
		$fclose(results_file);
		$stop;
	end


	always 
	begin: Monitor
	  $timeformat(-9, 0, " ns", 9);
	  @(start_Monitor)
	  forever @(negedge cb_intf.clk_wr)
	  begin

	  end
	end



	task DisplayHeader;
	  $fdisplay(results_file,"                       data_in      data_out ");
	  $fdisplay(results_file,"                 ============================");
	endtask    

	task CpuReset;
	begin
		@ (posedge cb_intf.clk_wr);
		cb_intf.rstn = 0;
		@ (posedge cb_intf.clk_wr);
		cb_intf.rstn = 1;
		@ (posedge cb_intf.clk_wr);
	end
	endtask

endmodule