data/full_repos/permissive/135822174/api/static/F721000/109_1/1/lab11.v
 line:238: before: "begin"
1: b'%Warning-WIDTH: data/full_repos/permissive/135822174/api/static/F721000/109_1/1/lab11.v:289: Operator ASSIGNDLY expects 32 bits on the Assign RHS, but Assign RHS\'s CONST \'31\'h0\' generates 31 bits.\n                                                                                           : ... In instance lab11.keypad_detect\n   keypadDelay <= 31\'d0;\n               ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/135822174/api/static/F721000/109_1/1/lab11.v:295: Operator ASSIGNDLY expects 32 bits on the Assign RHS, but Assign RHS\'s CONST \'31\'h0\' generates 31 bits.\n                                                                                           : ... In instance lab11.keypad_detect\n    keypadDelay <= 31\'d0;\n                ^~\n%Error: Exiting due to 2 warning(s)\n'
module checkkeypad (clk,rst,keypadRow,keypadCol,keypadBuf);
	input clk,rst;
	input [3:0]keypadCol;
	output reg[3:0]keypadRow;
	output reg [4:0]keypadBuf;
	reg [31:0]keypadDelay;
	
	always @(posedge clk or negedge rst)
	begin 
		if (!rst)
		begin
			keypadRow <= 4'b1110;
			keypadBuf <= 5'b11111;
			keypadDelay <= 31'd0;
		end
		else
		begin
			if (keypadDelay == 32'd250000) 
			begin 
				keypadDelay <= 31'd0;
				case ({keypadRow, keypadCol})
					8'b1110_1110: keypadBuf <= 5'h7;
					8'b1110_1101: keypadBuf <= 5'h4;
					8'b1110_1011: keypadBuf <= 5'h1;
					8'b1110_0111: keypadBuf <= 5'h0;
					8'b1101_1110: keypadBuf <= 5'h8;
					8'b1101_1101: keypadBuf <= 5'h5;
					8'b1101_1011: keypadBuf <= 5'h2;
					8'b1101_0111: keypadBuf <= 5'ha;
					8'b1011_1110: keypadBuf <= 5'h9;
					8'b1011_1101: keypadBuf <= 5'h6;
					8'b1011_1011: keypadBuf <= 5'h3;
					8'b1011_0111: keypadBuf <= 5'hb;
					8'b0111_1110: keypadBuf <= 5'hc;
					8'b0111_1101: keypadBuf <= 5'hd;
					8'b0111_1011: keypadBuf <= 5'he;
					8'b0111_0111: keypadBuf <= 5'hf;
					default: keypadBuf <= keypadBuf;
				endcase
				case (keypadRow)
					4'b1110: keypadRow <= 4'b1101;
					4'b1101: keypadRow <= 4'b1011;
					4'b1011: keypadRow <= 4'b0111;
					4'b0111: keypadRow <= 4'b1110;
					default: keypadRow <= 4'b1110;
				endcase
			end
			else
				keypadDelay <= keypadDelay + 1'b1;
		end
	end
endmodule
module checkkeypad (clk,rst,keypadRow,keypadCol,keypadBuf);

	input clk,rst;
	input [3:0]keypadCol;
	output reg[3:0]keypadRow;
	output reg [4:0]keypadBuf;
	reg [31:0]keypadDelay;
	
	always @(posedge clk or negedge rst)
	begin 
		if (!rst)
		begin
			keypadRow <= 4'b1110;
			keypadBuf <= 5'b11111;
			keypadDelay <= 31'd0;
		end
		else
		begin
			if (keypadDelay == 32'd250000) 
			begin 
				keypadDelay <= 31'd0;
				case ({keypadRow, keypadCol})
					8'b1110_1110: keypadBuf <= 5'h7;
					8'b1110_1101: keypadBuf <= 5'h4;
					8'b1110_1011: keypadBuf <= 5'h1;
					8'b1110_0111: keypadBuf <= 5'h0;
					8'b1101_1110: keypadBuf <= 5'h8;
					8'b1101_1101: keypadBuf <= 5'h5;
					8'b1101_1011: keypadBuf <= 5'h2;
					8'b1101_0111: keypadBuf <= 5'ha;
					8'b1011_1110: keypadBuf <= 5'h9;
					8'b1011_1101: keypadBuf <= 5'h6;
					8'b1011_1011: keypadBuf <= 5'h3;
					8'b1011_0111: keypadBuf <= 5'hb;
					8'b0111_1110: keypadBuf <= 5'hc;
					8'b0111_1101: keypadBuf <= 5'hd;
					8'b0111_1011: keypadBuf <= 5'he;
					8'b0111_0111: keypadBuf <= 5'hf;
					default: keypadBuf <= keypadBuf;
				endcase
				case (keypadRow)
					4'b1110: keypadRow <= 4'b1101;
					4'b1101: keypadRow <= 4'b1011;
					4'b1011: keypadRow <= 4'b0111;
					4'b0111: keypadRow <= 4'b1110;
					default: keypadRow <= 4'b1110;
				endcase
			end
			else
				keypadDelay <= keypadDelay + 1'b1;
		end
	end
endmodule