data/full_repos/permissive/209997170/7. decimal selector/work/planAhead/7. decimal selector/7. decimal selector.srcs/sources_1/imports/verilog/eight_fsm_2.v
 line:16: before: "="
1: b'%Error: Cannot find file containing module: decimal\n        ... Looked in:\n             data/full_repos/permissive/209997170/7./decimal\n             data/full_repos/permissive/209997170/7./decimal.v\n             data/full_repos/permissive/209997170/7./decimal.sv\n             decimal\n             decimal.v\n             decimal.sv\n             obj_dir/decimal\n             obj_dir/decimal.v\n             obj_dir/decimal.sv\n%Error: Cannot find file containing module: selector/work/planAhead/7.\n%Error: Cannot find file containing module: selector/7.\n%Error: Cannot find file containing module: selector.srcs/sources_1/imports/verilog,data/full_repos/permissive/209997170\n%Error: Cannot find file containing module: data/full_repos/permissive/209997170/7.\n%Error: Cannot find file containing module: selector.srcs/sources_1/imports/verilog/eight_fsm_2.v\n%Error: Exiting due to 6 error(s)\n'
module eight_fsm_2 (
    input clk,
    input rst,
    input [4:0] io_button,
    output reg [7:0] led
  );
  
  
  
  reg [26:0] M_counter_d, M_counter_q = 1'h0;
  localparam ONE_state = 2'd0;
  localparam TWO_state = 2'd1;
  localparam THREE_state = 2'd2;
  
  reg [1:0] M_state_d, M_state_q = ONE_state;
  
  always @* begin
    M_state_d = M_state_q;
    M_counter_d = M_counter_q;
    
    M_counter_d = M_counter_q + 1'h1;
    led = 1'h0;
    
    case (M_state_q)
      ONE_state: begin
        led = 8'h01;
        if (io_button[2+0-:1] == 1'h1) begin
          M_state_d = TWO_state;
        end else begin
          if (io_button[0+0-:1] == 1'h1) begin
            M_state_d = THREE_state;
          end
        end
      end
      TWO_state: begin
        led = 8'h02;
        if (io_button[2+0-:1] == 1'h1) begin
          M_state_d = THREE_state;
        end else begin
          if (io_button[0+0-:1] == 1'h1) begin
            M_state_d = ONE_state;
          end
        end
      end
      THREE_state: begin
        led = 8'h04;
        if (io_button[2+0-:1] == 1'h1) begin
          M_state_d = ONE_state;
        end else begin
          if (io_button[0+0-:1] == 1'h1) begin
            M_state_d = TWO_state;
          end
        end
      end
    endcase
  end
  
  always @(posedge clk) begin
    if (rst == 1'b1) begin
      M_counter_q <= 1'h0;
      M_state_q <= 1'h0;
    end else begin
      M_counter_q <= M_counter_d;
      M_state_q <= M_state_d;
    end
  end
  
endmodule
module eight_fsm_2 (
    input clk,
    input rst,
    input [4:0] io_button,
    output reg [7:0] led
  );

  
  
  
  reg [26:0] M_counter_d, M_counter_q = 1'h0;
  localparam ONE_state = 2'd0;
  localparam TWO_state = 2'd1;
  localparam THREE_state = 2'd2;
  
  reg [1:0] M_state_d, M_state_q = ONE_state;
  
  always @* begin
    M_state_d = M_state_q;
    M_counter_d = M_counter_q;
    
    M_counter_d = M_counter_q + 1'h1;
    led = 1'h0;
    
    case (M_state_q)
      ONE_state: begin
        led = 8'h01;
        if (io_button[2+0-:1] == 1'h1) begin
          M_state_d = TWO_state;
        end else begin
          if (io_button[0+0-:1] == 1'h1) begin
            M_state_d = THREE_state;
          end
        end
      end
      TWO_state: begin
        led = 8'h02;
        if (io_button[2+0-:1] == 1'h1) begin
          M_state_d = THREE_state;
        end else begin
          if (io_button[0+0-:1] == 1'h1) begin
            M_state_d = ONE_state;
          end
        end
      end
      THREE_state: begin
        led = 8'h04;
        if (io_button[2+0-:1] == 1'h1) begin
          M_state_d = ONE_state;
        end else begin
          if (io_button[0+0-:1] == 1'h1) begin
            M_state_d = TWO_state;
          end
        end
      end
    endcase
  end
  
  always @(posedge clk) begin
    if (rst == 1'b1) begin
      M_counter_q <= 1'h0;
      M_state_q <= 1'h0;
    end else begin
      M_counter_q <= M_counter_d;
      M_state_q <= M_state_d;
    end
  end
  
endmodule