data/full_repos/permissive/191638444/project_hxf5071_pbc5080.srcs/sources_1/imports/new/mux2x1.v
data/verilator_xmls/8e55adc3-32f9-4939-87ab-af871e8a7b32.xml
module mux2x1(Input1, Input0, selector, D);
   
   input [4:0] Input1, Input0;
   input selector;
   output reg [4:0] D;

   always @(Input1, Input0, selector)
   begin
      if (!selector) begin
         D <= Input0;
      end
      else begin
         D <= Input1;
      end
   end
   
endmodule
module mux2x1(Input1, Input0, selector, D);

   
   input [4:0] Input1, Input0;
   input selector;
   output reg [4:0] D;

   always @(Input1, Input0, selector)
   begin
      if (!selector) begin
         D <= Input0;
      end
      else begin
         D <= Input1;
      end
   end
   
endmodule