data/full_repos/permissive/173670949/ws2812/top.v
1: b"%Error: data/full_repos/permissive/173670949/ws2812/top.v:15: Cannot find file containing module: 'BitController'\n    BitController #(\n    ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/173670949/ws2812,data/full_repos/permissive/173670949/BitController\n             data/full_repos/permissive/173670949/ws2812,data/full_repos/permissive/173670949/BitController.v\n             data/full_repos/permissive/173670949/ws2812,data/full_repos/permissive/173670949/BitController.sv\n             BitController\n             BitController.v\n             BitController.sv\n             obj_dir/BitController\n             obj_dir/BitController.v\n             obj_dir/BitController.sv\n%Error: Exiting due to 1 error(s)\n"
module Top (
    input CLK_IN,
    output Ws2812_Dat,
    output Ws2812_Done,
    output reg Ws2812_Reset
);

    parameter F_CLK = 12_000_000;

    reg [23:0] indata = 0;
    wire       done;

    BitController #(
        .F_CLK(F_CLK)
    ) ws2812_bitcontroller (
        CLK_IN,
        indata,
        Ws2812_Reset,
        Ws2812_Dat,
        Ws2812_Done
    );



    always @(posedge CLK_IN) begin
        if (Ws2812_Done) begin
            Ws2812_Reset  <= 1;
            indata <= indata + 1;
        end
        else begin
            Ws2812_Reset  <= 0;
            indata <= indata;
        end
    end

endmodule
module Top (
    input CLK_IN,
    output Ws2812_Dat,
    output Ws2812_Done,
    output reg Ws2812_Reset
);


    parameter F_CLK = 12_000_000;

    reg [23:0] indata = 0;
    wire       done;

    BitController #(
        .F_CLK(F_CLK)
    ) ws2812_bitcontroller (
        CLK_IN,
        indata,
        Ws2812_Reset,
        Ws2812_Dat,
        Ws2812_Done
    );



    always @(posedge CLK_IN) begin
        if (Ws2812_Done) begin
            Ws2812_Reset  <= 1;
            indata <= indata + 1;
        end
        else begin
            Ws2812_Reset  <= 0;
            indata <= indata;
        end
    end

endmodule