data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_axi_ram_fifo/axi_ram_fifo_bist.v
 line:88: before: "if"
1: b"%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_axi_ram_fifo/axi_ram_fifo_bist.v:89: syntax error, unexpected '(', expecting IDENTIFIER\n    DATA_W_must_be_a_multiple_of_WORD_W();\n                                        ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_axi_ram_fifo/axi_ram_fifo_bist.v:94: syntax error, unexpected '(', expecting IDENTIFIER\n    WORD_W_not_supported();\n                         ^\n%Error: Exiting due to 2 error(s)\n"
function [WORD_W-1:0] lfsr(input [WORD_W-1:0] din);
    reg new_bit;
    begin
      case (WORD_W)
        8  : new_bit = din[7]  ^ din[5]  ^ din[4]  ^ din[3];
        16 : new_bit = din[15] ^ din[14] ^ din[12] ^ din[3];
        32 : new_bit = din[31] ^ din[21] ^ din[1]  ^ din[0];
      endcase
      lfsr = { din[WORD_W-2:0], new_bit };
    end
  endfunction
function [WORD_W-1:0] lfsr(input [WORD_W-1:0] din);

    reg new_bit;
    begin
      case (WORD_W)
        8  : new_bit = din[7]  ^ din[5]  ^ din[4]  ^ din[3];
        16 : new_bit = din[15] ^ din[14] ^ din[12] ^ din[3];
        32 : new_bit = din[31] ^ din[21] ^ din[1]  ^ din[0];
      endcase
      lfsr = { din[WORD_W-2:0], new_bit };
    end
  endfunction