data/full_repos/permissive/162106151/picorv32_cyc10/pico_cyc10_qys/pico_cyc10_qys_bb.v
data/verilator_xmls/525ebc4e-09dc-4500-ad7c-41af7a7adedc.xml
module pico_cyc10_qys (
	clk_clk,
	led_export,
	reset_reset_n,
	seg_export,
	trap_export,
	uart_rxd,
	uart_txd);	

	input		clk_clk;
	output	[7:0]	led_export;
	input		reset_reset_n;
	output	[7:0]	seg_export;
	output		trap_export;
	input		uart_rxd;
	output		uart_txd;
endmodule
module pico_cyc10_qys (
	clk_clk,
	led_export,
	reset_reset_n,
	seg_export,
	trap_export,
	uart_rxd,
	uart_txd);
	

	input		clk_clk;
	output	[7:0]	led_export;
	input		reset_reset_n;
	output	[7:0]	seg_export;
	output		trap_export;
	input		uart_rxd;
	output		uart_txd;
endmodule