data/full_repos/permissive/218126213/spi_flash_memory.v
1: b"%Error: data/full_repos/permissive/218126213/spi_flash_memory.v:24: Cannot find file containing module: 'spi_ip_core'\nspi_ip_core spi_module(\n^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/218126213,data/full_repos/permissive/218126213/spi_ip_core\n             data/full_repos/permissive/218126213,data/full_repos/permissive/218126213/spi_ip_core.v\n             data/full_repos/permissive/218126213,data/full_repos/permissive/218126213/spi_ip_core.sv\n             spi_ip_core\n             spi_ip_core.v\n             spi_ip_core.sv\n             obj_dir/spi_ip_core\n             obj_dir/spi_ip_core.v\n             obj_dir/spi_ip_core.sv\n%Error: data/full_repos/permissive/218126213/spi_flash_memory.v:38: Cannot find file containing module: 'memory'\nmemory memory_module(\n^~~~~~\n%Error: Exiting due to 2 error(s)\n"
module spi_flash_memory
(
	input clk,
	output wire Q,
	input D,
	input SCK,
	input S,
	input RESET,
	input W_ENABLE
);

reg SPI_S;
wire [7:0] SPI_D_MEM;
wire SPI_RESET_MEM;
wire SPI_S_MEM;
wire DATA_DONE_SPI;
reg DATA_DONE_MEM;
reg [7:0] MEM_Q_SPI;
wire [7:0] MEM_Q;
reg [7:0] MEM_D;
reg MEM_S;
reg MEM_RESET;

spi_ip_core spi_module(
	.clk(clk),
	.MOSI(D),
	.SPI_SCK(SCK),
	.SPI_RESET(RESET),
	.SPI_S(S),
	.MISO(Q),
	.D(SPI_D_MEM),
   .RESET(SPI_RESET_MEM),
	.S(SPI_S_MEM),
	.DATA_DONE(DATA_DONE_SPI),
	.Q(MEM_Q_SPI)
);

memory memory_module(
	.Q(MEM_Q),
	.D(MEM_D),
	.SCK(SCK),
	.S(MEM_S),
	.RESET(MEM_RESET),
	.W_ENABLE(W_ENABLE),
	.DATA_DONE(DATA_DONE_MEM)
);

always @ (*)
begin
	MEM_D<=SPI_D_MEM;
	MEM_Q_SPI<=MEM_Q;
	DATA_DONE_MEM<=DATA_DONE_SPI;
	MEM_S<=SPI_S_MEM;
end

endmodule
module spi_flash_memory
(
	input clk,
	output wire Q,
	input D,
	input SCK,
	input S,
	input RESET,
	input W_ENABLE
);


reg SPI_S;
wire [7:0] SPI_D_MEM;
wire SPI_RESET_MEM;
wire SPI_S_MEM;
wire DATA_DONE_SPI;
reg DATA_DONE_MEM;
reg [7:0] MEM_Q_SPI;
wire [7:0] MEM_Q;
reg [7:0] MEM_D;
reg MEM_S;
reg MEM_RESET;

spi_ip_core spi_module(
	.clk(clk),
	.MOSI(D),
	.SPI_SCK(SCK),
	.SPI_RESET(RESET),
	.SPI_S(S),
	.MISO(Q),
	.D(SPI_D_MEM),
   .RESET(SPI_RESET_MEM),
	.S(SPI_S_MEM),
	.DATA_DONE(DATA_DONE_SPI),
	.Q(MEM_Q_SPI)
);

memory memory_module(
	.Q(MEM_Q),
	.D(MEM_D),
	.SCK(SCK),
	.S(MEM_S),
	.RESET(MEM_RESET),
	.W_ENABLE(W_ENABLE),
	.DATA_DONE(DATA_DONE_MEM)
);

always @ (*)
begin
	MEM_D<=SPI_D_MEM;
	MEM_Q_SPI<=MEM_Q;
	DATA_DONE_MEM<=DATA_DONE_SPI;
	MEM_S<=SPI_S_MEM;
end

endmodule