data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:434: Unsupported: Ignoring delay on this delayed statement.\n  #100;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:436: Unsupported: Ignoring delay on this delayed statement.\n  #5000;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:438: Unsupported: Ignoring delay on this delayed statement.\n  #2;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:440: Unsupported: Ignoring delay on this delayed statement.\n  #50;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:442: Unsupported: Ignoring delay on this delayed statement.\n  #8;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:444: Unsupported: Ignoring delay on this delayed statement.\n  #50;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:446: Unsupported: Ignoring delay on this delayed statement.\n  #30;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:450: Unsupported: Ignoring delay on this delayed statement.\n  #1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:452: Unsupported: Ignoring delay on this delayed statement.\n  #1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:456: Unsupported: Ignoring delay on this delayed statement.\n  #1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:458: Unsupported: Ignoring delay on this delayed statement.\n  #1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:462: Unsupported: Ignoring delay on this delayed statement.\n  #10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:464: Unsupported: Ignoring delay on this delayed statement.\n  #10;\n  ^\n%Warning-PINMISSING: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:398: Cell has missing pin: \'local_clock50_in_p\'\n mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea uut (\n                                                                            ^~~\n%Warning-PINMISSING: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:398: Cell has missing pin: \'local_clock50_in_n\'\n mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea uut (\n                                                                            ^~~\n%Warning-PINMISSING: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:398: Cell has missing pin: \'local_clock509_in_p\'\n mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea uut (\n                                                                            ^~~\n%Warning-PINMISSING: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:398: Cell has missing pin: \'local_clock509_in_n\'\n mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea uut (\n                                                                            ^~~\n%Warning-MULTITOP: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:361: Multiple top level modules\n                                                                                                                                                         : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                                                                                                                                                         : ... Top module \'ssynchronizer_90_270\'\nmodule ssynchronizer_90_270 #(\n       ^~~~~~~~~~~~~~~~~~~~\n                                                                                                                                                         : ... Top module \'mything_tb\'\nmodule mything_tb;\n       ^~~~~~~~~~\n                                                                                                                                                         : ... Top module \'mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea_top\'\nmodule mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea_top (\n       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:494: Signal definition not found, creating implicitly: \'f_p\'\n                                                                                                                                                         : ... Suggested alternative: \'e_p\'\n  .trg_out_p(f_p), .trg_out_n(f_n),\n             ^~~\n%Warning-IMPLICIT: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:494: Signal definition not found, creating implicitly: \'f_n\'\n                                                                                                                                                         : ... Suggested alternative: \'d_n\'\n  .trg_out_p(f_p), .trg_out_n(f_n),\n                              ^~~\n%Error: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:399: Pin not found: \'remote_clock50_in_p\'\n                                                                                                                                              : ... Suggested alternative: \'remote_clock509_in_p\'\n  .remote_clock50_in_p(remote_clock50_in_p), .remote_clock50_in_n(remote_clock50_in_n),\n   ^~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:399: Pin not found: \'remote_clock50_in_n\'\n                                                                                                                                              : ... Suggested alternative: \'remote_clock509_in_n\'\n  .remote_clock50_in_p(remote_clock50_in_p), .remote_clock50_in_n(remote_clock50_in_n),\n                                              ^~~~~~~~~~~~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:409: Signal definition not found, creating implicitly: \'l_p\'\n  .led_revo(l_p),\n            ^~~\n%Warning-IMPLICIT: data/full_repos/permissive/115035459/verilog/src/mza-test029.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.revA.v:410: Signal definition not found, creating implicitly: \'l_n\'\n                                                                                                                                                         : ... Suggested alternative: \'l_p\'\n  .led_rfclock(l_n),\n               ^~~\n%Error: Exiting due to 2 error(s), 22 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module mything_tb;

	reg remote_clock50_in_p;
	reg remote_clock50_in_n;
	reg remote_clock509_in_p;
	reg remote_clock509_in_n;
	reg local_clock509_in_p;
	reg local_clock509_in_n;
	reg remote_revo_in_p;
	reg remote_revo_in_n;

	wire clock127_out_p;
	wire clock127_out_n;
	wire trg_out_p;
	wire trg_out_n;
	wire out1_p;
	wire out1_n;
	wire outa_p;
	wire outa_n;
	wire rsv_p;
	wire rsv_n;
	reg lemo;
	reg ack_p;
	reg ack_n;
	wire led_revo;
	wire led_rfclock;
	wire driven_high;
	reg clock_select = 0;
	wire led_0;
	wire led_1;
	wire led_2;
	wire led_3;
	wire led_4;
	wire led_5;
	wire led_6;
	wire led_7;

	mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea uut (
		.remote_clock50_in_p(remote_clock50_in_p), .remote_clock50_in_n(remote_clock50_in_n),
		.remote_clock509_in_p(remote_clock509_in_p), .remote_clock509_in_n(remote_clock509_in_n),
		.remote_revo_in_p(remote_revo_in_p), .remote_revo_in_n(remote_revo_in_n),
		.clock127_out_p(clock127_out_p), .clock127_out_n(clock127_out_n),
		.trg_out_p(trg_out_p), .trg_out_n(trg_out_n),
		.rsv_p(rsv_p), .rsv_n(rsv_n),
		.ack_p(ack_p), .ack_n(ack_n),
		.out1_p(out1_p), .out1_n(out1_n),
		.outa_p(outa_p), .outa_n(outa_n),
		.lemo(lemo),
		.led_revo(l_p),
		.led_rfclock(l_n),
		.clock_select(clock_select),
		.driven_high(driven_high),
		.led_0(led_0),
		.led_1(led_1),
		.led_2(led_2),
		.led_3(led_3),
		.led_4(led_4),
		.led_5(led_5),
		.led_6(led_6),
		.led_7(led_7)
	);
	wire raw_recovered_revo;
	assign raw_recovered_revo = clock127_out_p ^ trg_out_p;
	reg recovered_revo;
	initial begin

		remote_clock50_in_p <= 0; remote_clock50_in_n <= 1;
		remote_clock509_in_p <= 0; remote_clock509_in_n <= 1;
		local_clock509_in_p <= 0; local_clock509_in_n <= 1;
		remote_revo_in_p <= 0; remote_revo_in_n <= 1;
		recovered_revo <= 0; lemo <= 0; ack_p <= 0; ack_n <= 1;
		clock_select <= 0;

		#100;

		#5000;
		remote_revo_in_p = 1; remote_revo_in_n = 0;
		#2;
		remote_revo_in_p = 0; remote_revo_in_n = 1;
		#50;
		remote_revo_in_p = 1; remote_revo_in_n = 0;
		#8;
		remote_revo_in_p = 0; remote_revo_in_n = 1;
		#50;
		remote_revo_in_p = 1; remote_revo_in_n = 0;
		#30;
		remote_revo_in_p = 0; remote_revo_in_n = 1;
	end
	always begin
		#1;
		local_clock509_in_p <= ~local_clock509_in_p;
		#1;
		local_clock509_in_n <= ~local_clock509_in_n;
	end
	always begin
		#1;
		remote_clock509_in_p <= ~remote_clock509_in_p;
		#1;
		remote_clock509_in_n <= ~remote_clock509_in_n;
	end
	always begin
		#10;
		remote_clock50_in_p <= ~remote_clock50_in_p;
		#10;
		remote_clock50_in_n <= ~remote_clock50_in_n;
	end
	always @(negedge clock127_out_p) begin
		recovered_revo <= raw_recovered_revo;
	end
endmodule
module mything_tb;


	reg remote_clock50_in_p;
	reg remote_clock50_in_n;
	reg remote_clock509_in_p;
	reg remote_clock509_in_n;
	reg local_clock509_in_p;
	reg local_clock509_in_n;
	reg remote_revo_in_p;
	reg remote_revo_in_n;

	wire clock127_out_p;
	wire clock127_out_n;
	wire trg_out_p;
	wire trg_out_n;
	wire out1_p;
	wire out1_n;
	wire outa_p;
	wire outa_n;
	wire rsv_p;
	wire rsv_n;
	reg lemo;
	reg ack_p;
	reg ack_n;
	wire led_revo;
	wire led_rfclock;
	wire driven_high;
	reg clock_select = 0;
	wire led_0;
	wire led_1;
	wire led_2;
	wire led_3;
	wire led_4;
	wire led_5;
	wire led_6;
	wire led_7;

	mza_test029_pll_509divider_and_revo_encoder_plus_calibration_serdes_althea uut (
		.remote_clock50_in_p(remote_clock50_in_p), .remote_clock50_in_n(remote_clock50_in_n),
		.remote_clock509_in_p(remote_clock509_in_p), .remote_clock509_in_n(remote_clock509_in_n),
		.remote_revo_in_p(remote_revo_in_p), .remote_revo_in_n(remote_revo_in_n),
		.clock127_out_p(clock127_out_p), .clock127_out_n(clock127_out_n),
		.trg_out_p(trg_out_p), .trg_out_n(trg_out_n),
		.rsv_p(rsv_p), .rsv_n(rsv_n),
		.ack_p(ack_p), .ack_n(ack_n),
		.out1_p(out1_p), .out1_n(out1_n),
		.outa_p(outa_p), .outa_n(outa_n),
		.lemo(lemo),
		.led_revo(l_p),
		.led_rfclock(l_n),
		.clock_select(clock_select),
		.driven_high(driven_high),
		.led_0(led_0),
		.led_1(led_1),
		.led_2(led_2),
		.led_3(led_3),
		.led_4(led_4),
		.led_5(led_5),
		.led_6(led_6),
		.led_7(led_7)
	);
	wire raw_recovered_revo;
	assign raw_recovered_revo = clock127_out_p ^ trg_out_p;
	reg recovered_revo;
	initial begin

		remote_clock50_in_p <= 0; remote_clock50_in_n <= 1;
		remote_clock509_in_p <= 0; remote_clock509_in_n <= 1;
		local_clock509_in_p <= 0; local_clock509_in_n <= 1;
		remote_revo_in_p <= 0; remote_revo_in_n <= 1;
		recovered_revo <= 0; lemo <= 0; ack_p <= 0; ack_n <= 1;
		clock_select <= 0;

		#100;

		#5000;
		remote_revo_in_p = 1; remote_revo_in_n = 0;
		#2;
		remote_revo_in_p = 0; remote_revo_in_n = 1;
		#50;
		remote_revo_in_p = 1; remote_revo_in_n = 0;
		#8;
		remote_revo_in_p = 0; remote_revo_in_n = 1;
		#50;
		remote_revo_in_p = 1; remote_revo_in_n = 0;
		#30;
		remote_revo_in_p = 0; remote_revo_in_n = 1;
	end
	always begin
		#1;
		local_clock509_in_p <= ~local_clock509_in_p;
		#1;
		local_clock509_in_n <= ~local_clock509_in_n;
	end
	always begin
		#1;
		remote_clock509_in_p <= ~remote_clock509_in_p;
		#1;
		remote_clock509_in_n <= ~remote_clock509_in_n;
	end
	always begin
		#10;
		remote_clock50_in_p <= ~remote_clock50_in_p;
		#10;
		remote_clock50_in_n <= ~remote_clock50_in_n;
	end
	always @(negedge clock127_out_p) begin
		recovered_revo <= raw_recovered_revo;
	end
endmodule