data/full_repos/permissive/143278/ivltests/vhdl_concat_func.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/vhdl_concat_func.v:29: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/143278/ivltests/vhdl_concat_func.v:25: Cannot find file containing module: \'concat_func\'\n  concat_func dut(in_word, out_word);\n  ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/143278/ivltests,data/full_repos/permissive/143278/concat_func\n             data/full_repos/permissive/143278/ivltests,data/full_repos/permissive/143278/concat_func.v\n             data/full_repos/permissive/143278/ivltests,data/full_repos/permissive/143278/concat_func.sv\n             concat_func\n             concat_func.v\n             concat_func.sv\n             obj_dir/concat_func\n             obj_dir/concat_func.v\n             obj_dir/concat_func.sv\n%Error: Exiting due to 1 error(s), 1 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module test_concat_func();
  logic [7:0] in_word, out_word;

  concat_func dut(in_word, out_word);

  initial begin
    in_word = 8'b11101010;
    #1;

    if(out_word !== 8'b11010010) begin
        $display("FAILED out_word = %b", out_word);
        $finish();
    end

    $display("PASSED");
  end
endmodule
module test_concat_func();

  logic [7:0] in_word, out_word;

  concat_func dut(in_word, out_word);

  initial begin
    in_word = 8'b11101010;
    #1;

    if(out_word !== 8'b11010010) begin
        $display("FAILED out_word = %b", out_word);
        $finish();
    end

    $display("PASSED");
  end
endmodule