data/full_repos/permissive/138243369/f2_keyproc.v
data/verilator_xmls/8a7de768-426b-4f51-bff8-7a6f1e2b4d64.xml
module f2_keyproc(
input wire [4:0] func2_keys,
input wire sysclk,
output reg [2:0] instruction,
output reg auto_switch);








initial begin

	instruction = 3'd0;
end

always @(*) begin

	auto_switch = func2_keys[4];

	if (func2_keys[3]) begin
		instruction = 3'd2;
	end
	else if (func2_keys[2]) begin
		instruction = 3'd1;
	end
	else if (func2_keys[1]) begin
		instruction = 3'd3;
	end
	else if (func2_keys[0]) begin
		instruction = 3'd4;
	end
	else begin
		instruction = 3'd0;
	end
end

endmodule
module f2_keyproc(
input wire [4:0] func2_keys,
input wire sysclk,
output reg [2:0] instruction,
output reg auto_switch);









initial begin

	instruction = 3'd0;
end

always @(*) begin

	auto_switch = func2_keys[4];

	if (func2_keys[3]) begin
		instruction = 3'd2;
	end
	else if (func2_keys[2]) begin
		instruction = 3'd1;
	end
	else if (func2_keys[1]) begin
		instruction = 3'd3;
	end
	else if (func2_keys[0]) begin
		instruction = 3'd4;
	end
	else begin
		instruction = 3'd0;
	end
end

endmodule