data/full_repos/permissive/211634836/ws2811.v
 line:32: before: "integer"
1: b'%Warning-REALCVT: data/full_repos/permissive/211634836/ws2811.v:49: Implicit conversion of real to integer\n   localparam integer H0_CYCLE_COUNT      = 0.32 * CYCLE_COUNT;\n                                                 ^\n                  ... Use "/* verilator lint_off REALCVT */" and lint_on around source to disable this message.\n%Warning-REALCVT: data/full_repos/permissive/211634836/ws2811.v:50: Implicit conversion of real to integer\n   localparam integer H1_CYCLE_COUNT      = 0.64 * CYCLE_COUNT;\n                                                 ^\n%Warning-WIDTH: data/full_repos/permissive/211634836/ws2811.v:81: Operator EQ expects 32 bits on the LHS, but LHS\'s VARREF \'reset_counter\' generates 13 bits.\n                                                                : ... In instance ws2811\n   assign reset_almost_done = (state == STATE_RESET) && (reset_counter == RESET_COUNT-1);\n                                                                       ^~\n%Warning-WIDTH: data/full_repos/permissive/211634836/ws2811.v:101: Operator EQ expects 32 bits on the LHS, but LHS\'s VARREF \'reset_counter\' generates 13 bits.\n                                                                 : ... In instance ws2811\n              if (reset_counter == RESET_COUNT-1) begin\n                                ^~\n%Warning-WIDTH: data/full_repos/permissive/211634836/ws2811.v:141: Operator GTE expects 32 bits on the LHS, but LHS\'s VARREF \'clock_div\' generates 7 bits.\n                                                                 : ... In instance ws2811\n              else if (current_byte[7] == 1 && clock_div >= H1_CYCLE_COUNT) begin\n                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/211634836/ws2811.v:138: Operator GTE expects 32 bits on the LHS, but LHS\'s VARREF \'clock_div\' generates 7 bits.\n                                                                 : ... In instance ws2811\n              if (current_byte[7] == 0 && clock_div >= H0_CYCLE_COUNT) begin\n                                                    ^~\n%Warning-WIDTH: data/full_repos/permissive/211634836/ws2811.v:145: Operator EQ expects 32 bits on the LHS, but LHS\'s VARREF \'clock_div\' generates 7 bits.\n                                                                 : ... In instance ws2811\n              if (clock_div == CYCLE_COUNT-1) begin\n                            ^~\n%Error: Exiting due to 7 warning(s)\n'
function integer log2;
      input integer                    value;
      begin
         value = value-1;
         for (log2=0; value>0; log2=log2+1)
           value = value>>1;
      end
   endfunction
function integer log2;

      input integer                    value;
      begin
         value = value-1;
         for (log2=0; value>0; log2=log2+1)
           value = value>>1;
      end
   endfunction