data/full_repos/permissive/139213403/FPGA/timer_counter.v
1: b"%Error: data/full_repos/permissive/139213403/FPGA/timer_counter.v:15: Cannot find file containing module: 'mod_m_counter'\n mod_m_counter #(.M_BITS(M_BITS)) counter_m(.clk(clk), .reset(reset), .m(m), .max_tick(max_tick), .q());\n ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/139213403/FPGA,data/full_repos/permissive/139213403/mod_m_counter\n             data/full_repos/permissive/139213403/FPGA,data/full_repos/permissive/139213403/mod_m_counter.v\n             data/full_repos/permissive/139213403/FPGA,data/full_repos/permissive/139213403/mod_m_counter.sv\n             mod_m_counter\n             mod_m_counter.v\n             mod_m_counter.sv\n             obj_dir/mod_m_counter\n             obj_dir/mod_m_counter.v\n             obj_dir/mod_m_counter.sv\n%Error: data/full_repos/permissive/139213403/FPGA/timer_counter.v:16: Cannot find file containing module: 'tick_counter'\n tick_counter #(.N(N_BITS)) counter_n(.clk(clk), .reset(reset), .tick(max_tick), .counter(counter), .of(of));\n ^~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module timer_counter
#(
	parameter M_BITS=8,
	          N_BITS=4
)
(
	input wire clk, reset,
	input wire [M_BITS-1:0] m,
	output wire [N_BITS-1:0] counter,
	output wire of
);
	wire max_tick;

	mod_m_counter #(.M_BITS(M_BITS)) counter_m(.clk(clk), .reset(reset), .m(m), .max_tick(max_tick), .q());
	tick_counter #(.N(N_BITS)) counter_n(.clk(clk), .reset(reset), .tick(max_tick), .counter(counter), .of(of));
endmodule
module timer_counter
#(
	parameter M_BITS=8,
	          N_BITS=4
)
(
	input wire clk, reset,
	input wire [M_BITS-1:0] m,
	output wire [N_BITS-1:0] counter,
	output wire of
);

	wire max_tick;

	mod_m_counter #(.M_BITS(M_BITS)) counter_m(.clk(clk), .reset(reset), .m(m), .max_tick(max_tick), .q());
	tick_counter #(.N(N_BITS)) counter_n(.clk(clk), .reset(reset), .tick(max_tick), .counter(counter), .of(of));
endmodule