data/full_repos/permissive/169870504/count.v
data/verilator_xmls/fb3560ef-23e1-4bb6-9802-3f7f982fff56.xml
module Count(input CLK_IN, output GLED5, output RLED1, output RLED2, output RLED3, output RLED4);


	localparam WIDTH = 24;
	reg [WIDTH-1:0] counter;


	always @(posedge CLK_IN)
		counter <= counter + 1;


	assign GLED5 = 1'b1;

	assign RLED1 = counter[WIDTH-1];
	assign RLED2 = counter[WIDTH-2];
	assign RLED3 = counter[WIDTH-3];
	assign RLED4 = counter[WIDTH-4];

endmodule
module Count(input CLK_IN, output GLED5, output RLED1, output RLED2, output RLED3, output RLED4);



	localparam WIDTH = 24;
	reg [WIDTH-1:0] counter;


	always @(posedge CLK_IN)
		counter <= counter + 1;


	assign GLED5 = 1'b1;

	assign RLED1 = counter[WIDTH-1];
	assign RLED2 = counter[WIDTH-2];
	assign RLED3 = counter[WIDTH-3];
	assign RLED4 = counter[WIDTH-4];

endmodule