data/full_repos/permissive/107499099/mips_de2-115/MIPS/mux32_32_32.v
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data/verilator_xmls/0988f8e0-052d-46e0-96a1-c0f2e974bfee.xml
module mux32_32_32 (d0, d1, s, y);
  input  [31:0] d0;
  input  [31:0] d1;
  input          s;
  output [31:0]  y;




  assign y = (s == 1'b0) ? d0 : d1;
endmodule
module mux32_32_32 (d0, d1, s, y);

  input  [31:0] d0;
  input  [31:0] d1;
  input          s;
  output [31:0]  y;




  assign y = (s == 1'b0) ? d0 : d1;
endmodule