data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv
 line:19: before: "class"
1: b'%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:19: Unsupported: classes\nclass host_mem_model extends uvm_object;\n^~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:19: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass host_mem_model extends uvm_object;\n                             ^~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:21: Define or directive not defined: \'`uvm_object_utils_begin\'\n    `uvm_object_utils_begin(host_mem_model)\n    ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:22: Define or directive not defined: \'`uvm_object_utils_end\'\n    `uvm_object_utils_end\n    ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:29: Unsupported: new constructor\n    function new(string name="host_mem_model");\n             ^~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:30: Unsupported: super\n        super.new(name);\n        ^~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:30: Unsupported: new with arguments\n        super.new(name);\n              ^~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:30: Unsupported: dotted new\n        super.new(name);\n        ^~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:48: Define or directive not defined: \'`uvm_error\'\n                                                                                                     : ... Suggested alternative: \'`error\'\n                `uvm_error(get_type_name(),"data_queue size not match length")\n                ^~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:48: syntax error, unexpected \',\'\n                `uvm_error(get_type_name(),"data_queue size not match length")\n                                          ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:57: syntax error, unexpected endfunction\n    endfunction: exist_byte\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:61: Define or directive not defined: \'`uvm_info\'\n            `uvm_info(get_type_name(),$psprintf("Memory addr:%h,data:%h", i, memory_model[i]), UVM_MEDIUM);\n            ^~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:61: syntax error, unexpected \',\'\n            `uvm_info(get_type_name(),$psprintf("Memory addr:%h,data:%h", i, memory_model[i]), UVM_MEDIUM);\n                                     ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:61: Unsupported or unknown PLI call: $psprintf\n            `uvm_info(get_type_name(),$psprintf("Memory addr:%h,data:%h", i, memory_model[i]), UVM_MEDIUM);\n                                      ^~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:66: syntax error, unexpected endfunction\n    endfunction\n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:70: syntax error, unexpected IDENTIFIER, expecting "\'{"\n        longint unsigned addr;\n                         ^~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:71: syntax error, unexpected IDENTIFIER, expecting "\'{"\n        int unsigned byte_num;    \n                     ^~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:72: syntax error, unexpected IDENTIFIER, expecting "\'{"\n        bit[7:0] byte_packet[256];\n                 ^~~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:73: Unsupported or unknown PLI call: $cast\n        $cast(write_cmd_item,write_cmd.clone());\n        ^~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:79: syntax error, unexpected ::, expecting \',\' or \':\'\n            tl_rx_trans::DMA_W: begin\n                       ^~\n                                                                                                     : ... Perhaps \'tl_rx_trans\' is a package which needs to be predeclared? (IEEE 1800-2017 26.3)\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:84: Define or directive not defined: \'`uvm_error\'\n                                                                                                     : ... Suggested alternative: \'`error\'\n                    default: `uvm_error(get_type_name(),"Reserved resp dlegnth for DMA_W command")\n                             ^~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:86: syntax error, unexpected \';\'\n                for(int i=resp_dpart*64; i<byte_num; i++) begin\n                                                   ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:86: syntax error, unexpected \')\', expecting \';\'\n                for(int i=resp_dpart*64; i<byte_num; i++) begin\n                                                        ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:98: Define or directive not defined: \'`uvm_error\'\n                                                                                                     : ... Suggested alternative: \'`error\'\n                    default: `uvm_error(get_type_name(),"Reserved plegnth for DMA_PR_W command")\n                             ^~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:100: syntax error, unexpected \';\'\n                for(int i=0; i<byte_num; i++) begin\n                                       ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:100: syntax error, unexpected \')\', expecting \';\'\n                for(int i=0; i<byte_num; i++) begin\n                                            ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:111: syntax error, unexpected end\n            end\n            ^~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:112: Define or directive not defined: \'`uvm_error\'\n                                                                                                      : ... Suggested alternative: \'`error\'\n            default: `uvm_error(get_type_name(),"Unsupported cmd tends to update memory_model")\n                     ^~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:118: syntax error, unexpected IDENTIFIER, expecting "\'{"\n        bit[7:0] byte_packet[256];\n                 ^~~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:119: Unsupported or unknown PLI call: $cast\n        $cast(write_cmd,write_cmd_raw.clone());\n        ^~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:122: syntax error, unexpected ::, expecting \',\' or \':\'\n            tl_rx_trans::DMA_PR_W, tl_rx_trans::DMA_W_BE: begin\n                       ^~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:123: syntax error, unexpected \';\'\n                for(int i=0;i<8;i++)begin\n                               ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:123: syntax error, unexpected \')\', expecting \';\'\n                for(int i=0;i<8;i++)begin\n                                   ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:124: syntax error, unexpected \';\'\n                    for(int j=0; j<8;j++)begin\n                                    ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:124: syntax error, unexpected \')\', expecting \';\'\n                    for(int j=0; j<8;j++)begin\n                                        ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:133: syntax error, unexpected end\n                    end\n                    ^~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:138: syntax error, unexpected end\n                    end\n                    ^~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:139: Define or directive not defined: \'`uvm_error\'\n                                                                                                      : ... Suggested alternative: \'`error\'\n                    default: `uvm_error(get_type_name(),"Unsupported data_carrier_type")\n                             ^~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:143: syntax error, unexpected \';\'\n                for(int i=0;i<32;i++)begin\n                                ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:143: syntax error, unexpected \')\', expecting \';\'\n                for(int i=0;i<32;i++)begin\n                                    ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:144: syntax error, unexpected \';\'\n                    for(int j=0; j<8;j++)begin\n                                    ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:144: syntax error, unexpected \')\', expecting \';\'\n                    for(int j=0; j<8;j++)begin\n                                        ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:149: Define or directive not defined: \'`uvm_error\'\n                                                                                                      : ... Suggested alternative: \'`error\'\n            default: `uvm_error(get_type_name(),"Unsupported write cmd tends to abstract data")\n                     ^~~~~~~~~~\n%Warning-ENDLABEL: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:152: End label \'get_data_from_write_cmd\' does not match begin label \'set_memory_by_length\'\n    endfunction :get_data_from_write_cmd\n                 ^~~~~~~~~~~~~~~~~~~~~~~\n                   ... Use "/* verilator lint_off ENDLABEL */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:154: syntax error, unexpected IDENTIFIER, expecting \')\'\n    function void read_memory_by_cmd(input tl_rx_trans read_cmd_raw, ref bit[63:0] data_carrier[32], input bit[1:0] resp_dlength=0, input bit[1:0] resp_dpart=0);\n                                                       ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:154: syntax error, unexpected input, expecting IDENTIFIER or \'=\' or do or final\n    function void read_memory_by_cmd(input tl_rx_trans read_cmd_raw, ref bit[63:0] data_carrier[32], input bit[1:0] resp_dlength=0, input bit[1:0] resp_dpart=0);\n                                                                                                     ^~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:154: syntax error, unexpected input, expecting IDENTIFIER or \'=\' or do or final\n    function void read_memory_by_cmd(input tl_rx_trans read_cmd_raw, ref bit[63:0] data_carrier[32], input bit[1:0] resp_dlength=0, input bit[1:0] resp_dpart=0);\n                                                                                                                                    ^~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:154: syntax error, unexpected \')\', expecting \',\' or \';\'\n    function void read_memory_by_cmd(input tl_rx_trans read_cmd_raw, ref bit[63:0] data_carrier[32], input bit[1:0] resp_dlength=0, input bit[1:0] resp_dpart=0);\n                                                                                                                                                               ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:159: Unsupported or unknown PLI call: $cast\n        $cast(read_cmd,read_cmd_raw.clone());\n        ^~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:159: syntax error, unexpected ${ignored-bbox-sys}\n        $cast(read_cmd,read_cmd_raw.clone());\n             ^\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/tl_bfm/util/host_mem_model.sv:168: Define or directive not defined: \'`uvm_error\'\n                                                                                                      : ... Suggested alternative: \'`error\'\n                    default: `uvm_error(get_type_name(),"Reserved resp dlegnth for RD_WNITC command")\n                             ^~~~~~~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n        ... See the manual and https://verilator.org for more assistance.\n'
function void set_byte(longint unsigned addr, bit[7:0] data);
        memory_model[addr]=data;
    endfunction
function void set_byte(longint unsigned addr, bit[7:0] data);

        memory_model[addr]=data;
    endfunction