data/full_repos/permissive/155217800/Part 4/Part4.v
 line:178: before: ")"
1: b'%Error: Cannot find file containing module: 4,data/full_repos/permissive/155217800\n        ... Looked in:\n             data/full_repos/permissive/155217800/Part/4,data/full_repos/permissive/155217800\n             data/full_repos/permissive/155217800/Part/4,data/full_repos/permissive/155217800.v\n             data/full_repos/permissive/155217800/Part/4,data/full_repos/permissive/155217800.sv\n             4,data/full_repos/permissive/155217800\n             4,data/full_repos/permissive/155217800.v\n             4,data/full_repos/permissive/155217800.sv\n             obj_dir/4,data/full_repos/permissive/155217800\n             obj_dir/4,data/full_repos/permissive/155217800.v\n             obj_dir/4,data/full_repos/permissive/155217800.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/155217800/Part\n%Error: Cannot find file containing module: 4/Part4.v\n%Error: Exiting due to 3 error(s)\n'
module Part4(
	SW,
	HEX0,
	HEX1,
);

input [7:0] SW;
output [6:0] HEX0;
output [6:0] HEX1;


wire [3:0] x;
wire [7:4] y;
wire [4:0] sum;
wire [6:0] display0;
wire [6:0] display1;
wire [3:0] mux_out;

assign x = SW[3:0];
assign y = SW[7:4];

four_bit_adder(x, y, sum);

display_unit(sum, HEX0, HEX1, mux_out);

endmodule
module Part4(
	SW,
	HEX0,
	HEX1,
);


input [7:0] SW;
output [6:0] HEX0;
output [6:0] HEX1;


wire [3:0] x;
wire [7:4] y;
wire [4:0] sum;
wire [6:0] display0;
wire [6:0] display1;
wire [3:0] mux_out;

assign x = SW[3:0];
assign y = SW[7:4];

four_bit_adder(x, y, sum);

display_unit(sum, HEX0, HEX1, mux_out);

endmodule