data/full_repos/permissive/157101210/regWrLUT.v
data/verilator_xmls/22f90ed4-35a3-48eb-abbb-6d09b5c1c9a5.xml
module regWrLUT

(
output reg regwr,
input[5:0] opcode,
input[5:0] funct
);

always @(opcode or funct) begin
	case (opcode)
		`LW_OP:   regwr=1;
		`SW_OP:   regwr=0;
		`J_OP:    regwr=0;
		`JAL_OP:  regwr=1;
		`BEQ_OP:  regwr=0;
		`BNE_OP:  regwr=0;
		`XORI_OP: regwr=1;
		`ADDI_OP: regwr=1;

		`RTYPE_OP: begin
			case (funct)
				`JR_FUNCT:  regwr = 0;
				`ADD_FUNCT: regwr = 1;
				`SUB_FUNCT: regwr = 1;
				`SLT_FUNCT: regwr = 1;
				default: $display("Error in regWrLUT: Invalid funct");
			endcase
		end

		default: $display("Error in regWrLUT: Invalid opcode");


	endcase
end
endmodule
module regWrLUT

(
output reg regwr,
input[5:0] opcode,
input[5:0] funct
);


always @(opcode or funct) begin
	case (opcode)
		`LW_OP:   regwr=1;
		`SW_OP:   regwr=0;
		`J_OP:    regwr=0;
		`JAL_OP:  regwr=1;
		`BEQ_OP:  regwr=0;
		`BNE_OP:  regwr=0;
		`XORI_OP: regwr=1;
		`ADDI_OP: regwr=1;

		`RTYPE_OP: begin
			case (funct)
				`JR_FUNCT:  regwr = 0;
				`ADD_FUNCT: regwr = 1;
				`SUB_FUNCT: regwr = 1;
				`SLT_FUNCT: regwr = 1;
				default: $display("Error in regWrLUT: Invalid funct");
			endcase
		end

		default: $display("Error in regWrLUT: Invalid opcode");


	endcase
end
endmodule