data/full_repos/permissive/117439233/hdl/src/MCU.v
data/verilator_xmls/66e492ba-80c8-4e88-92bc-7d07a700d50f.xml
module MCU(
    input [1:0] A,
	input [2:0] S,
	output result
	);
	assign result = (((A[0]&S[2] | A[1]&(~S[2])) ^ S[1]) & S[0] );	
endmodule
module MCU(
    input [1:0] A,
	input [2:0] S,
	output result
	);

	assign result = (((A[0]&S[2] | A[1]&(~S[2])) ^ S[1]) & S[0] );	
endmodule