data/full_repos/permissive/136009613/rom.v
data/verilator_xmls/02403c32-df04-4468-b2d1-51c76289e97a.xml
module rom(address,data);
input [7:0] address;
output reg[7:0] data;
always @*
	case (address)
		8'b00000000: data = 8'b00011000; 
		8'b00000001: data = 8'b01101111;
		default: data = 8'b00000000;
	endcase
endmodule
module rom(address,data);

input [7:0] address;
output reg[7:0] data;
always @*
	case (address)
		8'b00000000: data = 8'b00011000; 
		8'b00000001: data = 8'b01101111;
		default: data = 8'b00000000;
	endcase
endmodule