data/full_repos/permissive/152917342/top.v
1: b"%Error: data/full_repos/permissive/152917342/top.v:49: Cannot find file containing module: 'cpu'\ncpu cpu0\n^~~\n        ... Looked in:\n             data/full_repos/permissive/152917342,data/full_repos/permissive/152917342/cpu\n             data/full_repos/permissive/152917342,data/full_repos/permissive/152917342/cpu.v\n             data/full_repos/permissive/152917342,data/full_repos/permissive/152917342/cpu.sv\n             cpu\n             cpu.v\n             cpu.sv\n             obj_dir/cpu\n             obj_dir/cpu.v\n             obj_dir/cpu.sv\n%Error: Exiting due to 1 error(s)\n"
module clk_divider
#(
    parameter constantNumber = 10000000
)
(
    input clk_in,
    input rst,
    output reg clk_out
);

    reg [31:0] count;

    always @ (posedge clk_in or negedge rst) begin
        if (~rst == 1'b1)
            count <= 32'b0;
        else if (count == constantNumber - 1)
            count <= 32'b0;
        else
            count <= count + 1;
    end

    always @ (posedge clk_in or negedge rst) begin
        if (~rst == 1'b1)
            clk_out <= 1'b0;
        else if (count == constantNumber - 1)
            clk_out <= ~clk_out;
        else
            clk_out <= clk_out;
    end

endmodule
module clk_divider
#(
    parameter constantNumber = 10000000
)
(
    input clk_in,
    input rst,
    output reg clk_out
);


    reg [31:0] count;

    always @ (posedge clk_in or negedge rst) begin
        if (~rst == 1'b1)
            count <= 32'b0;
        else if (count == constantNumber - 1)
            count <= 32'b0;
        else
            count <= count + 1;
    end

    always @ (posedge clk_in or negedge rst) begin
        if (~rst == 1'b1)
            clk_out <= 1'b0;
        else if (count == constantNumber - 1)
            clk_out <= ~clk_out;
        else
            clk_out <= clk_out;
    end

endmodule