data/full_repos/permissive/209997170/2. blinker/work/planAhead/blinker/blinker.srcs/sources_1/imports/verilog/mojo_top_0.v
1: b'%Error: Cannot find file containing module: blinker/work/planAhead/blinker/blinker.srcs/sources_1/imports/verilog,data/full_repos/permissive/209997170\n        ... Looked in:\n             data/full_repos/permissive/209997170/2./blinker/work/planAhead/blinker/blinker.srcs/sources_1/imports/verilog,data/full_repos/permissive/209997170\n             data/full_repos/permissive/209997170/2./blinker/work/planAhead/blinker/blinker.srcs/sources_1/imports/verilog,data/full_repos/permissive/209997170.v\n             data/full_repos/permissive/209997170/2./blinker/work/planAhead/blinker/blinker.srcs/sources_1/imports/verilog,data/full_repos/permissive/209997170.sv\n             blinker/work/planAhead/blinker/blinker.srcs/sources_1/imports/verilog,data/full_repos/permissive/209997170\n             blinker/work/planAhead/blinker/blinker.srcs/sources_1/imports/verilog,data/full_repos/permissive/209997170.v\n             blinker/work/planAhead/blinker/blinker.srcs/sources_1/imports/verilog,data/full_repos/permissive/209997170.sv\n             obj_dir/blinker/work/planAhead/blinker/blinker.srcs/sources_1/imports/verilog,data/full_repos/permissive/209997170\n             obj_dir/blinker/work/planAhead/blinker/blinker.srcs/sources_1/imports/verilog,data/full_repos/permissive/209997170.v\n             obj_dir/blinker/work/planAhead/blinker/blinker.srcs/sources_1/imports/verilog,data/full_repos/permissive/209997170.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/209997170/2.\n%Error: Cannot find file containing module: blinker/work/planAhead/blinker/blinker.srcs/sources_1/imports/verilog/mojo_top_0.v\n%Error: Exiting due to 3 error(s)\n'
module mojo_top_0 (
    input clk,
    input rst_n,
    output reg [7:0] led,
    input cclk,
    output reg spi_miso,
    input spi_ss,
    input spi_mosi,
    input spi_sck,
    output reg [3:0] spi_channel,
    input avr_tx,
    output reg avr_rx,
    input avr_rx_busy
  );
  
  
  
  reg rst;
  
  wire [1-1:0] M_reset_cond_out;
  reg [1-1:0] M_reset_cond_in;
  reset_conditioner_1 reset_cond (
    .clk(clk),
    .in(M_reset_cond_in),
    .out(M_reset_cond_out)
  );
  wire [1-1:0] M_myBlinker_blink;
  blinker_2 myBlinker (
    .clk(clk),
    .rst(rst),
    .blink(M_myBlinker_blink)
  );
  
  always @* begin
    M_reset_cond_in = ~rst_n;
    rst = M_reset_cond_out;
    led = {4'h8{M_myBlinker_blink}};
    spi_miso = 1'bz;
    spi_channel = 4'bzzzz;
    avr_rx = 1'bz;
  end
endmodule
module mojo_top_0 (
    input clk,
    input rst_n,
    output reg [7:0] led,
    input cclk,
    output reg spi_miso,
    input spi_ss,
    input spi_mosi,
    input spi_sck,
    output reg [3:0] spi_channel,
    input avr_tx,
    output reg avr_rx,
    input avr_rx_busy
  );

  
  
  
  reg rst;
  
  wire [1-1:0] M_reset_cond_out;
  reg [1-1:0] M_reset_cond_in;
  reset_conditioner_1 reset_cond (
    .clk(clk),
    .in(M_reset_cond_in),
    .out(M_reset_cond_out)
  );
  wire [1-1:0] M_myBlinker_blink;
  blinker_2 myBlinker (
    .clk(clk),
    .rst(rst),
    .blink(M_myBlinker_blink)
  );
  
  always @* begin
    M_reset_cond_in = ~rst_n;
    rst = M_reset_cond_out;
    led = {4'h8{M_myBlinker_blink}};
    spi_miso = 1'bz;
    spi_channel = 4'bzzzz;
    avr_rx = 1'bz;
  end
endmodule