data/full_repos/permissive/129155059/05-yosys_register/registro_tb.v
 line:34: before: ":"
1: b'%Error: data/full_repos/permissive/129155059/05-yosys_register/registro_tb.v:5: Cannot find include file: registro_struct.v\n`include "registro_struct.v" \n         ^~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/129155059/05-yosys_register,data/full_repos/permissive/129155059/registro_struct.v\n             data/full_repos/permissive/129155059/05-yosys_register,data/full_repos/permissive/129155059/registro_struct.v.v\n             data/full_repos/permissive/129155059/05-yosys_register,data/full_repos/permissive/129155059/registro_struct.v.sv\n             registro_struct.v\n             registro_struct.v.v\n             registro_struct.v.sv\n             obj_dir/registro_struct.v\n             obj_dir/registro_struct.v.v\n             obj_dir/registro_struct.v.sv\n%Error: data/full_repos/permissive/129155059/05-yosys_register/registro_tb.v:6: Cannot find include file: registro_cond.v\n`include "registro_cond.v" \n         ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/129155059/05-yosys_register/registro_tb.v:7: Cannot find include file: tester.v\n`include "tester.v" \n         ^~~~~~~~~~\n%Error: data/full_repos/permissive/129155059/05-yosys_register/registro_tb.v:8: Cannot find include file: verifier.v\n`include "verifier.v" \n         ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/129155059/05-yosys_register/registro_tb.v:9: Cannot find include file: synth.v\n`include "synth.v" \n         ^~~~~~~~~\n%Error: data/full_repos/permissive/129155059/05-yosys_register/registro_tb.v:10: Cannot find include file: synthA.v\n`include "synthA.v" \n         ^~~~~~~~~~\n%Error: data/full_repos/permissive/129155059/05-yosys_register/registro_tb.v:11: Cannot find include file: synth_delay.v\n`include "synth_delay.v" \n         ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/129155059/05-yosys_register/registro_tb.v:30: Define or directive not defined: \'`Ndir\'\n   wire [`Ndir:0] dir;\n         ^~~~~\n%Error: data/full_repos/permissive/129155059/05-yosys_register/registro_tb.v:30: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\n   wire [`Ndir:0] dir;\n              ^\n%Error: Exiting due to 9 error(s)\n'
module testbench;


   wire ENB_tb, CLK_tb, DIR_tb, S_IN_tb;
   wire S_OUTstruct_tb, S_OUTnstruct_tb, S_OUTcond_tb;
   wire S_OUTyosA_tb, S_OUTyos_tb, S_OUTdelay_tb;
   wire [3:0] Qcond_tb;
   wire [3:0] Qstruct_tb;
   wire [3:0] Qnstruct_tb;
   wire [3:0] Qyos_tb;
   wire [3:0] QA_tb;
   wire [3:0] Qdelay_tb;
   wire [3:0] D_tb;
   wire [1:0] MODO_tb;


   wire [31:0] dato;
   wire [`Ndir:0] dir;

   parameter PwrC = 0;

   tester     letest( .Qcond        (Qcond_tb),
                      .Qstruct      (Qstruct_tb),
                      .QA           (QA_tb),
                      .Qyos         (Qyos_tb),
                      .Qdelay       (Qdelay_tb),
                      .S_OUTcond    (S_OUTcond_tb),
                      .S_OUTstruct  (S_OUTstruct_tb),
                      .S_OUTnstruct (S_OUTnstruct_tb),
                      .S_OUTA       (S_OUTyosA_tb),
                      .S_OUTyos     (S_OUTyos_tb),
                      .S_OUTdelay   (S_OUTdelay_tb),
                      .MODO         (MODO_tb),
                      .DIR          (DIR_tb),
                      .D            (D_tb),
                      .S_IN         (S_IN_tb),
                      .ENB          (ENB_tb),
                      .CLK          (CLK_tb)
                      );

  registro_struct    r_struct(  .Q          (Qstruct_tb),
                                .Qn         (Qnstruct_tb),
                                .S_OUT      (S_OUTstruct_tb),
                                .S_OUTn     (S_OUTnstruct_tb),
                                .D          (D_tb),
                                .MODO       (MODO_tb),
                                .CLK        (CLK_tb),
                                .ENB        (ENB_tb),
                                .DIR        (DIR_tb),
                                .S_IN       (S_IN_tb)
                                );

  registro_cond #(4, 0) r_cond(   .Q        (Qcond_tb),
                                  .S_OUT    (S_OUTcond_tb),
                                  .D        (D_tb),
                                  .MODO     (MODO_tb),
                                  .CLK      (CLK_tb),
                                  .ENB      (ENB_tb),
                                  .DIR      (DIR_tb),
                                  .S_IN     (S_IN_tb)
                              );

  registro_yosys      r_yosys (   .Q        (Qyos_tb),
                                  .S_OUT    (S_OUTyos_tb),
                                  .D        (D_tb),
                                  .MODO     (MODO_tb),
                                  .CLK      (CLK_tb),
                                  .ENB      (ENB_tb),
                                  .DIR      (DIR_tb),
                                  .S_IN     (S_IN_tb)
                                  );

  registro_A      r_A         (   .Q        (QA_tb),
                                  .S_OUT    (S_OUTyosA_tb),
                                  .D        (D_tb),
                                  .MODO     (MODO_tb),
                                  .CLK      (CLK_tb),
                                  .ENB      (ENB_tb),
                                  .DIR      (DIR_tb),
                                  .S_IN     (S_IN_tb)
                                  );

  registro_yosys_delay r_delay(   .Q        (Qdelay_tb),
                                  .S_OUT    (S_OUTdelay_tb),
                                  .D        (D_tb),
                                  .MODO     (MODO_tb),
                                  .CLK      (CLK_tb),
                                  .ENB      (ENB_tb),
                                  .DIR      (DIR_tb),
                                  .S_IN     (S_IN_tb)
                                  );

  verifier          leverifier(   .Qcond        (Qcond_tb),
                                  .Qstruct      (Qstruct_tb),
                                  .Qyos         (Qyos_tb),
                                  .QA           (QA_tb),
                                  .Qdelay       (Qdelay_tb),
                                  .S_OUTcond    (S_OUTcond_tb),
                                  .S_OUTstruct  (S_OUTstruct_tb),
                                  .S_OUTyosA    (S_OUTyosA_tb),
                                  .S_OUTyos     (S_OUTyos_tb),
                                  .S_OUTdelay   (S_OUTdelay_tb)
                                  );

endmodule
module testbench;



   wire ENB_tb, CLK_tb, DIR_tb, S_IN_tb;
   wire S_OUTstruct_tb, S_OUTnstruct_tb, S_OUTcond_tb;
   wire S_OUTyosA_tb, S_OUTyos_tb, S_OUTdelay_tb;
   wire [3:0] Qcond_tb;
   wire [3:0] Qstruct_tb;
   wire [3:0] Qnstruct_tb;
   wire [3:0] Qyos_tb;
   wire [3:0] QA_tb;
   wire [3:0] Qdelay_tb;
   wire [3:0] D_tb;
   wire [1:0] MODO_tb;


   wire [31:0] dato;
   wire [`Ndir:0] dir;

   parameter PwrC = 0;

   tester     letest( .Qcond        (Qcond_tb),
                      .Qstruct      (Qstruct_tb),
                      .QA           (QA_tb),
                      .Qyos         (Qyos_tb),
                      .Qdelay       (Qdelay_tb),
                      .S_OUTcond    (S_OUTcond_tb),
                      .S_OUTstruct  (S_OUTstruct_tb),
                      .S_OUTnstruct (S_OUTnstruct_tb),
                      .S_OUTA       (S_OUTyosA_tb),
                      .S_OUTyos     (S_OUTyos_tb),
                      .S_OUTdelay   (S_OUTdelay_tb),
                      .MODO         (MODO_tb),
                      .DIR          (DIR_tb),
                      .D            (D_tb),
                      .S_IN         (S_IN_tb),
                      .ENB          (ENB_tb),
                      .CLK          (CLK_tb)
                      );

  registro_struct    r_struct(  .Q          (Qstruct_tb),
                                .Qn         (Qnstruct_tb),
                                .S_OUT      (S_OUTstruct_tb),
                                .S_OUTn     (S_OUTnstruct_tb),
                                .D          (D_tb),
                                .MODO       (MODO_tb),
                                .CLK        (CLK_tb),
                                .ENB        (ENB_tb),
                                .DIR        (DIR_tb),
                                .S_IN       (S_IN_tb)
                                );

  registro_cond #(4, 0) r_cond(   .Q        (Qcond_tb),
                                  .S_OUT    (S_OUTcond_tb),
                                  .D        (D_tb),
                                  .MODO     (MODO_tb),
                                  .CLK      (CLK_tb),
                                  .ENB      (ENB_tb),
                                  .DIR      (DIR_tb),
                                  .S_IN     (S_IN_tb)
                              );

  registro_yosys      r_yosys (   .Q        (Qyos_tb),
                                  .S_OUT    (S_OUTyos_tb),
                                  .D        (D_tb),
                                  .MODO     (MODO_tb),
                                  .CLK      (CLK_tb),
                                  .ENB      (ENB_tb),
                                  .DIR      (DIR_tb),
                                  .S_IN     (S_IN_tb)
                                  );

  registro_A      r_A         (   .Q        (QA_tb),
                                  .S_OUT    (S_OUTyosA_tb),
                                  .D        (D_tb),
                                  .MODO     (MODO_tb),
                                  .CLK      (CLK_tb),
                                  .ENB      (ENB_tb),
                                  .DIR      (DIR_tb),
                                  .S_IN     (S_IN_tb)
                                  );

  registro_yosys_delay r_delay(   .Q        (Qdelay_tb),
                                  .S_OUT    (S_OUTdelay_tb),
                                  .D        (D_tb),
                                  .MODO     (MODO_tb),
                                  .CLK      (CLK_tb),
                                  .ENB      (ENB_tb),
                                  .DIR      (DIR_tb),
                                  .S_IN     (S_IN_tb)
                                  );

  verifier          leverifier(   .Qcond        (Qcond_tb),
                                  .Qstruct      (Qstruct_tb),
                                  .Qyos         (Qyos_tb),
                                  .QA           (QA_tb),
                                  .Qdelay       (Qdelay_tb),
                                  .S_OUTcond    (S_OUTcond_tb),
                                  .S_OUTstruct  (S_OUTstruct_tb),
                                  .S_OUTyosA    (S_OUTyosA_tb),
                                  .S_OUTyos     (S_OUTyos_tb),
                                  .S_OUTdelay   (S_OUTdelay_tb)
                                  );

endmodule