data/full_repos/permissive/112823543/Avalon_LedPanel _Client_Server/LedMemoryClient_Avalon.v
1: b'%Error: Cannot find file containing module: _Client_Server,data/full_repos/permissive/112823543\n        ... Looked in:\n             data/full_repos/permissive/112823543/Avalon_LedPanel/_Client_Server,data/full_repos/permissive/112823543\n             data/full_repos/permissive/112823543/Avalon_LedPanel/_Client_Server,data/full_repos/permissive/112823543.v\n             data/full_repos/permissive/112823543/Avalon_LedPanel/_Client_Server,data/full_repos/permissive/112823543.sv\n             _Client_Server,data/full_repos/permissive/112823543\n             _Client_Server,data/full_repos/permissive/112823543.v\n             _Client_Server,data/full_repos/permissive/112823543.sv\n             obj_dir/_Client_Server,data/full_repos/permissive/112823543\n             obj_dir/_Client_Server,data/full_repos/permissive/112823543.v\n             obj_dir/_Client_Server,data/full_repos/permissive/112823543.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/112823543/Avalon_LedPanel\n%Error: Cannot find file containing module: _Client_Server/LedMemoryClient_Avalon.v\n%Error: Exiting due to 3 error(s)\n'
module LedPanelClient_Avalon #(

		parameter	DISPLAY_ROWS_LINES = 4,
		parameter	DISPLAY_COLS_LINES = 6,
		parameter	COLOR_BITS		   = 8
	) 
	(

		input 	wire				clock,
		input	wire				reset,


		input	wire 	[DISPLAY_ROWS_LINES+DISPLAY_COLS_LINES:0]	s1_address,
		input	wire				s1_write,
		input	wire	[31:0]		s1_writedata,


		input	wire 	[COLOR_BITS-1:0]	s2_address,
		input	wire				s2_write,
		input	wire	[31:0]		s2_writedata,


		output	reg 	[1:0]		led_red,
		output	reg 	[1:0]		led_green,
		output	reg 	[1:0]		led_blue,
		output	reg 	[3:0]		led_addr,
		output	reg  				led_clock,
		output	reg 				led_blank,
		output	reg 				led_latch,


		input 	wire				ext_clock200,


		input wire [DISPLAY_ROWS_LINES+DISPLAY_COLS_LINES-1:0]		memAddrMst,
		input wire [2:0]			bitplaneMst,
		input wire					backbufferMst,

		input wire [3:0]			ADDR_MST,
		input wire					LATCH_MST,
		input wire					CLK_LED_MST,
		input wire					BLANK_MST
);


	wire 	[31:0]				rgb_upper, rgb_lower;
	wire	[COLOR_BITS-1:0]	red_upper, red_lower, green_upper, green_lower, blue_upper, blue_lower;
	reg 	[COLOR_BITS-1:0]	red_upper_q, red_lower_q, green_upper_q, green_lower_q, blue_upper_q, blue_lower_q;
	wire	[COLOR_BITS-1:0]	red_upper_gamma, red_lower_gamma, green_upper_gamma, green_lower_gamma, blue_upper_gamma, blue_lower_gamma;
	wire 	[1:0]				led_red_s, led_green_s, led_blue_s;
	wire	[3:0]				led_addr_s;
	wire						led_clock_s, led_blank_s, led_latch_s;


	reg		[1:0]				led_red_q, led_green_q, led_blue_q;
	reg 	[3:0]				led_addr_q;
	reg							led_clock_q, led_blank_q, led_latch_q;



	wire	wren_upper	= !s1_address[DISPLAY_COLS_LINES+DISPLAY_ROWS_LINES] & s1_write;
	wire	wren_lower	=  s1_address[DISPLAY_COLS_LINES+DISPLAY_ROWS_LINES] & s1_write;

	onchipmem	#(.ADRESS_WIDTH(11)) upper_memory(
		.wrclock(clock),
		.wren(wren_upper),
		.wraddress({backbufferMst, s1_address[DISPLAY_COLS_LINES+DISPLAY_ROWS_LINES-1:0]}),
		.data(s1_writedata),

		.rdclock(ext_clock200),
		.rdaddress({!backbufferMst,memAddrMst}),
		.q(rgb_upper)
	);

	onchipmem	#(.ADRESS_WIDTH(11)) lower_memory(
		.wrclock(clock),
		.wren(wren_lower),
		.wraddress({backbufferMst, s1_address[DISPLAY_COLS_LINES+DISPLAY_ROWS_LINES-1:0]}),
		.data(s1_writedata),

		.rdclock(ext_clock200),
		.rdaddress({!backbufferMst,memAddrMst}),
		.q(rgb_lower)
	);



	assign	red_upper 		= rgb_upper[COLOR_BITS-1:0];
	assign	red_lower		= rgb_lower[COLOR_BITS-1:0];
	assign	green_upper		= rgb_upper[2*COLOR_BITS-1:COLOR_BITS];
	assign	green_lower		= rgb_lower[2*COLOR_BITS-1:COLOR_BITS];
	assign	blue_upper		= rgb_upper[3*COLOR_BITS-1:2*COLOR_BITS];
	assign 	blue_lower		= rgb_lower[3*COLOR_BITS-1:2*COLOR_BITS];


	onchipmem	#(.ADRESS_WIDTH(COLOR_BITS))	gamma_red_upper(
			.wrclock(clock),
			.wren(s2_write),
			.wraddress(s2_address),
			.data(s2_writedata[COLOR_BITS-1:0]),

			.rdclock(ext_clock200),
			.rdaddress(red_upper),
			.q(red_upper_gamma)
	);
	onchipmem	#(.ADRESS_WIDTH(COLOR_BITS)) gamma_green_upper(
			.wrclock(clock),
			.wren(s2_write),
			.wraddress(s2_address),
			.data(s2_writedata[COLOR_BITS-1:0]),

			.rdclock(ext_clock200),
			.rdaddress(green_upper),
			.q(green_upper_gamma)
	);
	onchipmem	#(.ADRESS_WIDTH(COLOR_BITS))	gamma_blue_upper(
			.wrclock(clock),
			.wren(s2_write),
			.wraddress(s2_address),
			.data(s2_writedata[COLOR_BITS-1:0]),

			.rdclock(ext_clock200),
			.rdaddress(blue_upper),
			.q(blue_upper_gamma)
	);
	onchipmem	#(.ADRESS_WIDTH(COLOR_BITS))	gamma_red_lower(
			.wrclock(clock),
			.wren(s2_write),
			.wraddress(s2_address),
			.data(s2_writedata[COLOR_BITS-1:0]),

			.rdclock(ext_clock200),
			.rdaddress(red_lower),
			.q(red_lower_gamma)
	);
	onchipmem	#(.ADRESS_WIDTH(COLOR_BITS)) gamma_green_lower(
			.wrclock(clock),
			.wren(s2_write),
			.wraddress(s2_address),
			.data(s2_writedata[COLOR_BITS-1:0]),

			.rdclock(ext_clock200),
			.rdaddress(green_lower),
			.q(green_lower_gamma)
	);
	onchipmem	#(.ADRESS_WIDTH(COLOR_BITS))	gamma_blue_lower(
			.wrclock(clock),
			.wren(s2_write),
			.wraddress(s2_address),
			.data(s2_writedata[COLOR_BITS-1:0]),

			.rdclock(ext_clock200),
			.rdaddress(blue_lower),
			.q(blue_lower_gamma)
	);








	always @(posedge CLK_LED_MST)
		begin
			led_red		<= {red_lower_gamma[bitplaneMst], red_upper_gamma[bitplaneMst]};
			led_green	<= {green_lower_gamma[bitplaneMst], green_upper_gamma[bitplaneMst]};
			led_blue	<= {blue_lower_gamma[bitplaneMst], blue_upper_gamma[bitplaneMst]};
		end

	always @(posedge ext_clock200)
		begin
			if (reset) begin



				led_addr <= 4'b0;
				led_latch <= 1'b0;
				led_blank <= 1'b1;
				led_clock <= 1'b0;
				led_red_q <= 2'b0;
				led_green_q <= 2'b0;
				led_blue_q <= 2'b0;
				led_latch_q <= 1'b0;
				led_clock_q <= 1'b0;
				led_blank_q <= 1'b0;
			end else  begin



				led_addr_q <= ADDR_MST;
				led_clock_q <= CLK_LED_MST;
				led_blank_q <= BLANK_MST;
				led_latch_q <= LATCH_MST;






				led_addr <= led_addr_q;
				led_blank <= led_blank_q;
				led_latch <= led_latch_q;
				led_clock <= led_clock_q;
			end
		end

endmodule
module LedPanelClient_Avalon #(

		parameter	DISPLAY_ROWS_LINES = 4,
		parameter	DISPLAY_COLS_LINES = 6,
		parameter	COLOR_BITS		   = 8
	) 
	(

		input 	wire				clock,
		input	wire				reset,


		input	wire 	[DISPLAY_ROWS_LINES+DISPLAY_COLS_LINES:0]	s1_address,
		input	wire				s1_write,
		input	wire	[31:0]		s1_writedata,


		input	wire 	[COLOR_BITS-1:0]	s2_address,
		input	wire				s2_write,
		input	wire	[31:0]		s2_writedata,


		output	reg 	[1:0]		led_red,
		output	reg 	[1:0]		led_green,
		output	reg 	[1:0]		led_blue,
		output	reg 	[3:0]		led_addr,
		output	reg  				led_clock,
		output	reg 				led_blank,
		output	reg 				led_latch,


		input 	wire				ext_clock200,


		input wire [DISPLAY_ROWS_LINES+DISPLAY_COLS_LINES-1:0]		memAddrMst,
		input wire [2:0]			bitplaneMst,
		input wire					backbufferMst,

		input wire [3:0]			ADDR_MST,
		input wire					LATCH_MST,
		input wire					CLK_LED_MST,
		input wire					BLANK_MST
);



	wire 	[31:0]				rgb_upper, rgb_lower;
	wire	[COLOR_BITS-1:0]	red_upper, red_lower, green_upper, green_lower, blue_upper, blue_lower;
	reg 	[COLOR_BITS-1:0]	red_upper_q, red_lower_q, green_upper_q, green_lower_q, blue_upper_q, blue_lower_q;
	wire	[COLOR_BITS-1:0]	red_upper_gamma, red_lower_gamma, green_upper_gamma, green_lower_gamma, blue_upper_gamma, blue_lower_gamma;
	wire 	[1:0]				led_red_s, led_green_s, led_blue_s;
	wire	[3:0]				led_addr_s;
	wire						led_clock_s, led_blank_s, led_latch_s;


	reg		[1:0]				led_red_q, led_green_q, led_blue_q;
	reg 	[3:0]				led_addr_q;
	reg							led_clock_q, led_blank_q, led_latch_q;



	wire	wren_upper	= !s1_address[DISPLAY_COLS_LINES+DISPLAY_ROWS_LINES] & s1_write;
	wire	wren_lower	=  s1_address[DISPLAY_COLS_LINES+DISPLAY_ROWS_LINES] & s1_write;

	onchipmem	#(.ADRESS_WIDTH(11)) upper_memory(
		.wrclock(clock),
		.wren(wren_upper),
		.wraddress({backbufferMst, s1_address[DISPLAY_COLS_LINES+DISPLAY_ROWS_LINES-1:0]}),
		.data(s1_writedata),

		.rdclock(ext_clock200),
		.rdaddress({!backbufferMst,memAddrMst}),
		.q(rgb_upper)
	);

	onchipmem	#(.ADRESS_WIDTH(11)) lower_memory(
		.wrclock(clock),
		.wren(wren_lower),
		.wraddress({backbufferMst, s1_address[DISPLAY_COLS_LINES+DISPLAY_ROWS_LINES-1:0]}),
		.data(s1_writedata),

		.rdclock(ext_clock200),
		.rdaddress({!backbufferMst,memAddrMst}),
		.q(rgb_lower)
	);



	assign	red_upper 		= rgb_upper[COLOR_BITS-1:0];
	assign	red_lower		= rgb_lower[COLOR_BITS-1:0];
	assign	green_upper		= rgb_upper[2*COLOR_BITS-1:COLOR_BITS];
	assign	green_lower		= rgb_lower[2*COLOR_BITS-1:COLOR_BITS];
	assign	blue_upper		= rgb_upper[3*COLOR_BITS-1:2*COLOR_BITS];
	assign 	blue_lower		= rgb_lower[3*COLOR_BITS-1:2*COLOR_BITS];


	onchipmem	#(.ADRESS_WIDTH(COLOR_BITS))	gamma_red_upper(
			.wrclock(clock),
			.wren(s2_write),
			.wraddress(s2_address),
			.data(s2_writedata[COLOR_BITS-1:0]),

			.rdclock(ext_clock200),
			.rdaddress(red_upper),
			.q(red_upper_gamma)
	);
	onchipmem	#(.ADRESS_WIDTH(COLOR_BITS)) gamma_green_upper(
			.wrclock(clock),
			.wren(s2_write),
			.wraddress(s2_address),
			.data(s2_writedata[COLOR_BITS-1:0]),

			.rdclock(ext_clock200),
			.rdaddress(green_upper),
			.q(green_upper_gamma)
	);
	onchipmem	#(.ADRESS_WIDTH(COLOR_BITS))	gamma_blue_upper(
			.wrclock(clock),
			.wren(s2_write),
			.wraddress(s2_address),
			.data(s2_writedata[COLOR_BITS-1:0]),

			.rdclock(ext_clock200),
			.rdaddress(blue_upper),
			.q(blue_upper_gamma)
	);
	onchipmem	#(.ADRESS_WIDTH(COLOR_BITS))	gamma_red_lower(
			.wrclock(clock),
			.wren(s2_write),
			.wraddress(s2_address),
			.data(s2_writedata[COLOR_BITS-1:0]),

			.rdclock(ext_clock200),
			.rdaddress(red_lower),
			.q(red_lower_gamma)
	);
	onchipmem	#(.ADRESS_WIDTH(COLOR_BITS)) gamma_green_lower(
			.wrclock(clock),
			.wren(s2_write),
			.wraddress(s2_address),
			.data(s2_writedata[COLOR_BITS-1:0]),

			.rdclock(ext_clock200),
			.rdaddress(green_lower),
			.q(green_lower_gamma)
	);
	onchipmem	#(.ADRESS_WIDTH(COLOR_BITS))	gamma_blue_lower(
			.wrclock(clock),
			.wren(s2_write),
			.wraddress(s2_address),
			.data(s2_writedata[COLOR_BITS-1:0]),

			.rdclock(ext_clock200),
			.rdaddress(blue_lower),
			.q(blue_lower_gamma)
	);








	always @(posedge CLK_LED_MST)
		begin
			led_red		<= {red_lower_gamma[bitplaneMst], red_upper_gamma[bitplaneMst]};
			led_green	<= {green_lower_gamma[bitplaneMst], green_upper_gamma[bitplaneMst]};
			led_blue	<= {blue_lower_gamma[bitplaneMst], blue_upper_gamma[bitplaneMst]};
		end

	always @(posedge ext_clock200)
		begin
			if (reset) begin



				led_addr <= 4'b0;
				led_latch <= 1'b0;
				led_blank <= 1'b1;
				led_clock <= 1'b0;
				led_red_q <= 2'b0;
				led_green_q <= 2'b0;
				led_blue_q <= 2'b0;
				led_latch_q <= 1'b0;
				led_clock_q <= 1'b0;
				led_blank_q <= 1'b0;
			end else  begin



				led_addr_q <= ADDR_MST;
				led_clock_q <= CLK_LED_MST;
				led_blank_q <= BLANK_MST;
				led_latch_q <= LATCH_MST;






				led_addr <= led_addr_q;
				led_blank <= led_blank_q;
				led_latch <= led_latch_q;
				led_clock <= led_clock_q;
			end
		end

endmodule