data/full_repos/permissive/143278/ivltests/sshortint_test.v
 line:14: before: "signed"
1: b'%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:66: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:68: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:75: Unsupported: Ignoring delay on this delayed statement.\n    # 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:80: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:84: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:95: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:97: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Error: data/full_repos/permissive/143278/ivltests/sshortint_test.v:98: Unsupported: Verilog 1995 force\n        force bu = ui;\n        ^~~~~\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:99: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Error: data/full_repos/permissive/143278/ivltests/sshortint_test.v:106: Unsupported: Verilog 1995 release\n    release bu;\n    ^~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:111: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:113: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Error: data/full_repos/permissive/143278/ivltests/sshortint_test.v:114: Unsupported: Verilog 1995 force\n        force bu = si;\n        ^~~~~\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:115: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Error: data/full_repos/permissive/143278/ivltests/sshortint_test.v:122: Unsupported: Verilog 1995 release\n    release bu;\n    ^~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:128: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:133: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Error: data/full_repos/permissive/143278/ivltests/sshortint_test.v:134: Unsupported: Verilog 1995 force\n        force bu_xz = si;\n        ^~~~~\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:135: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Error: data/full_repos/permissive/143278/ivltests/sshortint_test.v:142: Unsupported: Verilog 1995 release\n    release bu_xz;\n    ^~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:146: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:149: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:151: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:180: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:183: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:185: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:191: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:194: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:196: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:219: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:222: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:254: Unsupported: Ignoring delay on this delayed statement.\n    # 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:258: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Error: data/full_repos/permissive/143278/ivltests/sshortint_test.v:260: Unsupported: Verilog 1995 force\n        force bu = slice;\n        ^~~~~\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:262: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Error: data/full_repos/permissive/143278/ivltests/sshortint_test.v:269: Unsupported: Verilog 1995 release\n    release bu;\n    ^~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:273: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:276: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:278: Unsupported: Ignoring delay on this delayed statement.\n        #1;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/sshortint_test.v:285: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n%Error: Exiting due to 8 error(s), 32 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
function [LEN-1:0] xz_inject (input signed [LEN-1:0] value);
      integer i, temp;
      begin
        temp = {$random} % 2*(UMAX+1);
        for (i=0; i<LEN; i=i+1)
          begin
             if (temp[i] == 1'b1)
               begin
                 temp = $random % UMAX;
                 if (temp <= 0)
                    value[i] = 1'bx;
                 else
                    value[i] = 1'bz;
               end
          end
          xz_inject = value;
      end
  endfunction
function [LEN-1:0] xz_inject (input signed [LEN-1:0] value);

      integer i, temp;
      begin
        temp = {$random} % 2*(UMAX+1);
        for (i=0; i<LEN; i=i+1)
          begin
             if (temp[i] == 1'b1)
               begin
                 temp = $random % UMAX;
                 if (temp <= 0)
                    value[i] = 1'bx;
                 else
                    value[i] = 1'bz;
               end
          end
          xz_inject = value;
      end
  endfunction