data/full_repos/permissive/174263347/scanconv/designer/scanconv.v
1: b"%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:328: Cannot find file containing module: 'DFC1B'\n    DFC1B riseZ0Z_1 (.D(rise[0]), .CLK(clk_c), .CLR(nReset_c), .Q(\n    ^~~~~\n        ... Looked in:\n             data/full_repos/permissive/174263347/scanconv/designer,data/full_repos/permissive/174263347/DFC1B\n             data/full_repos/permissive/174263347/scanconv/designer,data/full_repos/permissive/174263347/DFC1B.v\n             data/full_repos/permissive/174263347/scanconv/designer,data/full_repos/permissive/174263347/DFC1B.sv\n             DFC1B\n             DFC1B.v\n             DFC1B.sv\n             obj_dir/DFC1B\n             obj_dir/DFC1B.v\n             obj_dir/DFC1B.sv\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:330: Cannot find file containing module: 'DFC1B'\n    DFC1B riseZ0Z_0 (.D(vsync_c), .CLK(clk_c), .CLR(nReset_c), .Q(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:313: Cannot find file containing module: 'OR2A'\n    OR2A out_0 (.A(riseZ0Z_1), .B(riseZ0Z_0), .Y(hsync_0));\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:314: Cannot find file containing module: 'DFC1B'\n    DFC1B rise_1 (.D(riseZ0Z_0), .CLK(clk_c), .CLR(nReset_c), .Q(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:316: Cannot find file containing module: 'DFC1B'\n    DFC1B rise_0 (.D(hsync_c), .CLK(clk_c), .CLR(nReset_c), .Q(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:318: Cannot find file containing module: 'OR2A'\n    OR2A out (.A(riseZ0Z_1), .B(riseZ0Z_0), .Y(hsync));\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:367: Cannot find file containing module: 'DFE3C'\n    DFE3C v_5 (.D(y_33), .CLK(clk_c), .CLR(y_45), .E(y_39), .Q(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:369: Cannot find file containing module: 'DFE3C'\n    DFE3C nline_2 (.D(y_47), .CLK(clk_c), .CLR(nReset_c), .E(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:371: Cannot find file containing module: 'DFE1B'\n    DFE1B h_2 (.D(y_35), .CLK(clk_c), .E(y_42), .Q(aVga[2]));\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:374: Cannot find file containing module: 'CM8INV'\n    CM8INV G_308_cm8i (.A(aVga[11]), .Y(G_308_cm8iZ0));\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:375: Cannot find file containing module: 'CM8'\n    CM8 G_16_i_0 (.D0(GNDZ0), .D1(VCCZ0), .D2(GNDZ0), .D3(N_372_1), \n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:378: Cannot find file containing module: 'CM8'\n    CM8 pixel_n3_0_xor2 (.D0(GNDZ0), .D1(pixelZ0Z_0), .D2(VCCZ0), .D3(\n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:381: Cannot find file containing module: 'DFC1B'\n    DFC1B pixel_3 (.D(pixel_n3), .CLK(clk_c), .CLR(hsync), .Q(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:383: Cannot find file containing module: 'CM8INV'\n    CM8INV v_n5_0_xor2_i_cm8i (.A(aVga[11]), .Y(v_n5_0_xor2_i_cm8iZ0));\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:384: Cannot find file containing module: 'DFE4F'\n    DFE4F hdelay_2 (.D(N_377), .CLK(clk_c), .PRE(nReset_c), .E(y_38), \n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:386: Cannot find file containing module: 'AND2'\n    AND2 un1_hsync_3_i_0_and2_209 (.A(aVga[13]), .B(aVga[10]), .Y(y_5));\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:387: Cannot find file containing module: 'CM8'\n    CM8 h_l5_i_0 (.D0(hsync), .D1(GNDZ0), .D2(GNDZ0), .D3(hsync), .S00(\n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:390: Cannot find file containing module: 'CM8'\n    CM8 G_55_i_and2_0_and2 (.D0(VCCZ0), .D1(N_221_n), .D2(VCCZ0), .D3(\n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:393: Cannot find file containing module: 'CM8INV'\n    CM8INV un1_un1_un1_hsync_1_i_0_0_cm8i (.A(vdelayZ0Z_3), .Y(\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:395: Cannot find file containing module: 'DFC1B'\n    DFC1B pixel8 (.D(pixel8_3), .CLK(clk_c), .CLR(hsync), .Q(pixelZ0Z8)\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:397: Cannot find file containing module: 'CM8INV'\n    CM8INV pixel_n2_0_xor2_cm8i (.A(pixelZ0Z_1), .Y(\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:399: Cannot find file containing module: 'XNOR2'\n    XNOR2 G_200_0 (.A(y_51), .B(aVga[11]), .Y(y_36));\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:400: Cannot find file containing module: 'AND3'\n    AND3 wrVga_0_and2_0_and2 (.A(pixelZ0Z8), .B(lineZ0), .C(frameZ0), \n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:402: Cannot find file containing module: 'CM8INV'\n    CM8INV v_n2_0_xor2_i_cm8i (.A(aVga[8]), .Y(v_n2_0_xor2_i_cm8iZ0));\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:403: Cannot find file containing module: 'DFE1B'\n    DFE1B h_6 (.D(N_165), .CLK(clk_c), .E(y_42), .Q(aVga[6]));\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:404: Cannot find file containing module: 'CM8'\n    CM8 G_10_i_0 (.D0(N_114_0), .D1(un1_hsync_2_i), .D2(un1_hsync_2_i), \n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:407: Cannot find file containing module: 'CM8'\n    CM8 vdelay_l1_0_and2_0_and2 (.D0(N_114_0), .D1(GNDZ0), .D2(GNDZ0), \n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:410: Cannot find file containing module: 'OR2A'\n    OR2A G_95_0 (.A(rise_1), .B(rise_0), .Y(N_114_0));\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:411: Cannot find file containing module: 'OR2A'\n    OR2A G_95 (.A(rise_1), .B(rise_0), .Y(y_45));\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:412: Cannot find file containing module: 'OR2B'\n    OR2B G_55_i_and2_0_and2_192_n (.A(aVga[12]), .B(aVga[13]), .Y(\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:414: Cannot find file containing module: 'XOR2'\n    XOR2 G_114 (.A(pixelZ0Z_0), .B(pixelZ0Z_1), .Y(y_44));\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:417: Cannot find file containing module: 'DFE3C'\n    DFE3C v_3 (.D(y_30), .CLK(clk_c), .CLR(y_45), .E(y_39), .Q(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:419: Cannot find file containing module: 'AND2'\n    AND2 line_8_0_and2_i (.A(hsync_0), .B(nlineZ0Z_0), .Y(y_31));\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:420: Cannot find file containing module: 'CM8INV'\n    CM8INV hdelay_l2_i_and2_0_and2_cm8i (.A(hsync_0), .Y(\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:422: Cannot find file containing module: 'OR2B'\n    OR2B vdelay_l0_i_and2_0_and2 (.A(vdelayZ0Z_0), .B(N_114_0), .Y(\n    ^~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:424: Cannot find file containing module: 'CM8INV'\n    CM8INV nline_9_i_0_cm8i_1 (.A(nlineZ0Z_1), .Y(\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:426: Cannot find file containing module: 'CM8INV'\n    CM8INV h_l5_i_0_cm8i (.A(aVga[4]), .Y(h_l5_i_0_cm8iZ0));\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:427: Cannot find file containing module: 'CM8INV'\n    CM8INV G_310_cm8i (.A(y_51), .Y(G_310_cm8iZ0));\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:428: Cannot find file containing module: 'DFE3C'\n    DFE3C v_1 (.D(y_37), .CLK(clk_c), .CLR(y_45), .E(y_39), .Q(aVga[8])\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:430: Cannot find file containing module: 'VCC'\n    VCC VCC (.Y(VCCZ0));\n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:431: Cannot find file containing module: 'CM8'\n    CM8 h_l4_0_and3_0_and2 (.D0(hsync_0), .D1(GNDZ0), .D2(GNDZ0), .D3(\n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:434: Cannot find file containing module: 'CM8'\n    CM8 v_n5_0_xor2_i (.D0(VCCZ0), .D1(GNDZ0), .D2(GNDZ0), .D3(VCCZ0), \n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:437: Cannot find file containing module: 'CM8'\n    CM8 hdelay_l2_i_and2_0_and2 (.D0(VCCZ0), .D1(\n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:441: Cannot find file containing module: 'DFE4F'\n    DFE4F nline_0 (.D(y_27), .CLK(clk_c), .PRE(nReset_c), .E(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:443: Cannot find file containing module: 'DFE1B'\n    DFE1B h_3 (.D(h_l3), .CLK(clk_c), .E(y_42), .Q(aVga[3]));\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:444: Cannot find file containing module: 'DFE3C'\n    DFE3C v_6 (.D(y_34), .CLK(clk_c), .CLR(y_45), .E(y_39), .Q(\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:446: Cannot find file containing module: 'DFE3C'\n    DFE3C v_2 (.D(y_32), .CLK(clk_c), .CLR(y_45), .E(y_39), .Q(aVga[9])\n    ^~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:448: Cannot find file containing module: 'CM8'\n    CM8 pixel_n2_0_xor2 (.D0(VCCZ0), .D1(GNDZ0), .D2(GNDZ0), .D3(VCCZ0)\n    ^~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:451: Cannot find file containing module: 'CM8INV'\n    CM8INV nline_9_i_0_cm8i_2 (.A(nlineZ0Z_2), .Y(\n    ^~~~~~\n%Error: data/full_repos/permissive/174263347/scanconv/designer/scanconv.v:453: Cannot find file containing module: 'AND3C'\n    AND3C G_16_i_0_and2_0_1 (.A(hdelayZ0Z_0), .B(hdelayZ0Z_1), .C(\n    ^~~~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n"
module scanconv(aMem, dMem, clk, nReset, hsync, vsync, ega, iVideo, 
        oVideo, csync, relay, nCs, nOe, nWe);
output  [15:0] aMem;
inout  [7:0] dMem;
input  clk, nReset, hsync, vsync, ega, iVideo;
output  oVideo, csync, relay, nCs, nOe, nWe;

    wire dVga_0, dVga_1, dVga_2, dVga_3, dVga_4, dVga_5, dVga_6, 
        dVga_7, aVga_0, aVga_1, aVga_2, aVga_3, aVga_4, aVga_5, aVga_6, 
        aVga_7, aVga_8, aVga_9, aVga_10, aVga_11, aVga_12, aVga_13, 
        aVga_14, aVga_15, wrVga, dCga_0, dCga_1, dCga_2, dCga_3, 
        dCga_4, dCga_5, dCga_6, dCga_7, aCga_0, aCga_1, aCga_2, aCga_3, 
        aCga_4, aCga_5, aCga_6, aCga_7, aCga_8, aCga_9, aCga_10, 
        aCga_11, aCga_12, aCga_13, aCga_14, aCga_15, dMemOut_0, 
        dMemOut_1, dMemOut_2, dMemOut_3, dMemOut_4, dMemOut_5, 
        dMemOut_6, dMemOut_7, dirout, halfclk, imemory_state_1, 
        imemory_state_1_1, access, GNDZ0, VCCZ0, clk_c, nReset_c, 
        hsync_c, vsync_c, ega_c, iVideo_c, oVideo_c, csync_c, relay_c, 
        dMem_in_0, dMem_in_1, dMem_in_2, dMem_in_3, dMem_in_4, 
        dMem_in_5, dMem_in_6, dMem_in_7, nCs_c, nOe_c, nWe_c, wrVga_i, 
        halfclk_i, access_iZ0, dirout_i, dirout_0, y_10, y_11, y_12, 
        y_13, y_14, y_15, y_16, y_17, y_18, y_19, y_20, y_21, y_22, 
        y_23, y_24, y_25, y_72;
    
    CM8 G_160 (.D0(aCga_5), .D1(aVga_5), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_20));
    BIBUF dMem_pad_5 (.PAD(dMem[5]), .D(dMemOut_5), .E(dirout_i), .Y(
        dMem_in_5));
    CM8 G_150 (.D0(aCga_15), .D1(aVga_15), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(dirout), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_10));
    OUTBUF relay_pad (.PAD(relay), .D(relay_c));
    OUTBUF oVideo_pad (.PAD(oVideo), .D(oVideo_c));
    INBUF iVideo_pad (.PAD(iVideo), .Y(iVideo_c));
    OUTBUF aMem_pad_3 (.PAD(aMem[3]), .D(y_22));
    AND2 G_114 (.A(halfclk), .B(imemory_state_1), .Y(access));
    CM8 G_156 (.D0(aCga_9), .D1(aVga_9), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_16));
    OUTBUF nWe_pad (.PAD(nWe), .D(nWe_c));
    VCC VCC (.Y(VCCZ0));
    BIBUF dMem_pad_3 (.PAD(dMem[3]), .D(dMemOut_3), .E(dirout_i), .Y(
        dMem_in_3));
    OUTBUF aMem_pad_6 (.PAD(aMem[6]), .D(y_19));
    OUTBUF aMem_pad_1 (.PAD(aMem[1]), .D(y_24));
    INBUF ega_pad (.PAD(ega), .Y(ega_c));
    CM8 G_157 (.D0(aCga_8), .D1(aVga_8), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_17));
    BIBUF dMem_pad_6 (.PAD(dMem[6]), .D(dMemOut_6), .E(dirout_i), .Y(
        dMem_in_6));
    BIBUF dMem_pad_1 (.PAD(dMem[1]), .D(dMemOut_1), .E(dirout_i), .Y(
        dMem_in_1));
    CM8 G_163 (.D0(aCga_2), .D1(aVga_2), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_23));
    CM8 G_153 (.D0(aCga_12), .D1(aVga_12), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(dirout), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_13));
    OUTBUF nOe_pad (.PAD(nOe), .D(nOe_c));
    OUTBUF nCs_pad (.PAD(nCs), .D(nCs_c));
    XOR2 I_56_s1_s0 (.A(halfclk), .B(imemory_state_1), .Y(
        imemory_state_1_1));
    GND GND (.Y(GNDZ0));
    OUTBUF aMem_pad_10 (.PAD(aMem[10]), .D(y_15));
    OUTBUF aMem_pad_11 (.PAD(aMem[11]), .D(y_14));
    INBUF vsync_pad (.PAD(vsync), .Y(vsync_c));
    OUTBUF aMem_pad_8 (.PAD(aMem[8]), .D(y_17));
    OUTBUF aMem_pad_13 (.PAD(aMem[13]), .D(y_12));
    memory imemory (.dMemOut({dMemOut_7, dMemOut_6, dMemOut_5, 
        dMemOut_4, dMemOut_3, dMemOut_2, dMemOut_1, dMemOut_0}), .dVga({
        dVga_7, dVga_6, dVga_5, dVga_4, dVga_3, dVga_2, dVga_1, dVga_0})
        , .dCga({dCga_7, dCga_6, dCga_5, dCga_4, dCga_3, dCga_2, 
        dCga_1, dCga_0}), .dMem_in({dMem_in_7, dMem_in_6, dMem_in_5, 
        dMem_in_4, dMem_in_3, dMem_in_2, dMem_in_1, dMem_in_0}), 
        .\state_1[1] (imemory_state_1_1), .\state[1] (imemory_state_1), 
        .wrVga_i(wrVga_i), .nOe_c(nOe_c), .nCs_c(nCs_c), .y_72(y_72), 
        .wrVga(wrVga), .nWe_c(nWe_c), .dirout_i(dirout_i), .halfclk_i(
        halfclk_i), .halfclk(halfclk), .dirout(dirout), .nReset_c(
        nReset_c), .clk_c(clk_c), .access_i(access_iZ0), .dirout_0(
        dirout_0), .access(access));
    OUTBUF aMem_pad_9 (.PAD(aMem[9]), .D(y_16));
    OUTBUF aMem_pad_2 (.PAD(aMem[2]), .D(y_23));
    OUTBUF aMem_pad_14 (.PAD(aMem[14]), .D(y_11));
    CM8 G_159 (.D0(aCga_6), .D1(aVga_6), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_19));
    INBUF hsync_pad (.PAD(hsync), .Y(hsync_c));
    OUTBUF aMem_pad_15 (.PAD(aMem[15]), .D(y_10));
    CM8 G_161 (.D0(aCga_4), .D1(aVga_4), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_21));
    BIBUF dMem_pad_2 (.PAD(dMem[2]), .D(dMemOut_2), .E(dirout_i), .Y(
        dMem_in_2));
    OUTBUF aMem_pad_7 (.PAD(aMem[7]), .D(y_18));
    OUTBUF aMem_pad_12 (.PAD(aMem[12]), .D(y_13));
    CM8 G_164 (.D0(aCga_1), .D1(aVga_1), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_24));
    CM8 G_151 (.D0(aCga_14), .D1(aVga_14), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(dirout), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_11));
    OUTBUF aMem_pad_0 (.PAD(aMem[0]), .D(y_25));
    CM8 G_154 (.D0(aCga_11), .D1(aVga_11), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(dirout), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_14));
    CM8 access_i (.D0(VCCZ0), .D1(GNDZ0), .D2(GNDZ0), .D3(GNDZ0), .S00(
        access), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(access_iZ0));
    CM8 G_158 (.D0(aCga_7), .D1(aVga_7), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_18));
    XNOR2 G_148 (.A(dirout), .B(wrVga), .Y(y_72));
    CLKBUF nReset_pad (.PAD(nReset), .Y(nReset_c));
    cgaega icgaega (.dCga({dCga_7, dCga_6, dCga_5, dCga_4, dCga_3, 
        dCga_2, dCga_1, dCga_0}), .aCga({aCga_15, aCga_14, aCga_13, 
        aCga_12, aCga_11, aCga_10, aCga_9, aCga_8, aCga_7, aCga_6, 
        aCga_5, aCga_4, aCga_3, aCga_2, aCga_1, aCga_0}), .halfclk_i(
        halfclk_i), .access_i(access_iZ0), .nReset_c(nReset_c), .clk_c(
        clk_c), .ega_c(ega_c), .csync_c(csync_c), .access(access), 
        .oVideo_c(oVideo_c));
    OUTBUF aMem_pad_4 (.PAD(aMem[4]), .D(y_21));
    BIBUF dMem_pad_7 (.PAD(dMem[7]), .D(dMemOut_7), .E(dirout_i), .Y(
        dMem_in_7));
    CM8 G_162 (.D0(aCga_3), .D1(aVga_3), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_22));
    OUTBUF csync_pad (.PAD(csync), .D(csync_c));
    BIBUF dMem_pad_0 (.PAD(dMem[0]), .D(dMemOut_0), .E(dirout_i), .Y(
        dMem_in_0));
    CM8 G_152 (.D0(aCga_13), .D1(aVga_13), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(dirout), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_12));
    OUTBUF aMem_pad_5 (.PAD(aMem[5]), .D(y_20));
    CM8 G_165 (.D0(aCga_0), .D1(aVga_0), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_25));
    CM8 G_155 (.D0(aCga_10), .D1(aVga_10), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(dirout), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_15));
    BIBUF dMem_pad_4 (.PAD(dMem[4]), .D(dMemOut_4), .E(dirout_i), .Y(
        dMem_in_4));
    vga ivga (.dVga({dVga_7, dVga_6, dVga_5, dVga_4, dVga_3, dVga_2, 
        dVga_1, dVga_0}), .aVga({aVga_15, aVga_14, aVga_13, aVga_12, 
        aVga_11, aVga_10, aVga_9, aVga_8, aVga_7, aVga_6, aVga_5, 
        aVga_4, aVga_3, aVga_2, aVga_1, aVga_0}), .hsync_c(hsync_c), 
        .vsync_c(vsync_c), .iVideo_c(iVideo_c), .nReset_c(nReset_c), 
        .relay_c(relay_c), .clk_c(clk_c), .dirout_0(dirout_0), .access(
        access), .wrVga(wrVga), .wrVga_i(wrVga_i));
    HCLKBUF clk_pad (.PAD(clk), .Y(clk_c));
    
endmodule
module scanconv(aMem, dMem, clk, nReset, hsync, vsync, ega, iVideo, 
        oVideo, csync, relay, nCs, nOe, nWe);

output  [15:0] aMem;
inout  [7:0] dMem;
input  clk, nReset, hsync, vsync, ega, iVideo;
output  oVideo, csync, relay, nCs, nOe, nWe;

    wire dVga_0, dVga_1, dVga_2, dVga_3, dVga_4, dVga_5, dVga_6, 
        dVga_7, aVga_0, aVga_1, aVga_2, aVga_3, aVga_4, aVga_5, aVga_6, 
        aVga_7, aVga_8, aVga_9, aVga_10, aVga_11, aVga_12, aVga_13, 
        aVga_14, aVga_15, wrVga, dCga_0, dCga_1, dCga_2, dCga_3, 
        dCga_4, dCga_5, dCga_6, dCga_7, aCga_0, aCga_1, aCga_2, aCga_3, 
        aCga_4, aCga_5, aCga_6, aCga_7, aCga_8, aCga_9, aCga_10, 
        aCga_11, aCga_12, aCga_13, aCga_14, aCga_15, dMemOut_0, 
        dMemOut_1, dMemOut_2, dMemOut_3, dMemOut_4, dMemOut_5, 
        dMemOut_6, dMemOut_7, dirout, halfclk, imemory_state_1, 
        imemory_state_1_1, access, GNDZ0, VCCZ0, clk_c, nReset_c, 
        hsync_c, vsync_c, ega_c, iVideo_c, oVideo_c, csync_c, relay_c, 
        dMem_in_0, dMem_in_1, dMem_in_2, dMem_in_3, dMem_in_4, 
        dMem_in_5, dMem_in_6, dMem_in_7, nCs_c, nOe_c, nWe_c, wrVga_i, 
        halfclk_i, access_iZ0, dirout_i, dirout_0, y_10, y_11, y_12, 
        y_13, y_14, y_15, y_16, y_17, y_18, y_19, y_20, y_21, y_22, 
        y_23, y_24, y_25, y_72;
    
    CM8 G_160 (.D0(aCga_5), .D1(aVga_5), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_20));
    BIBUF dMem_pad_5 (.PAD(dMem[5]), .D(dMemOut_5), .E(dirout_i), .Y(
        dMem_in_5));
    CM8 G_150 (.D0(aCga_15), .D1(aVga_15), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(dirout), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_10));
    OUTBUF relay_pad (.PAD(relay), .D(relay_c));
    OUTBUF oVideo_pad (.PAD(oVideo), .D(oVideo_c));
    INBUF iVideo_pad (.PAD(iVideo), .Y(iVideo_c));
    OUTBUF aMem_pad_3 (.PAD(aMem[3]), .D(y_22));
    AND2 G_114 (.A(halfclk), .B(imemory_state_1), .Y(access));
    CM8 G_156 (.D0(aCga_9), .D1(aVga_9), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_16));
    OUTBUF nWe_pad (.PAD(nWe), .D(nWe_c));
    VCC VCC (.Y(VCCZ0));
    BIBUF dMem_pad_3 (.PAD(dMem[3]), .D(dMemOut_3), .E(dirout_i), .Y(
        dMem_in_3));
    OUTBUF aMem_pad_6 (.PAD(aMem[6]), .D(y_19));
    OUTBUF aMem_pad_1 (.PAD(aMem[1]), .D(y_24));
    INBUF ega_pad (.PAD(ega), .Y(ega_c));
    CM8 G_157 (.D0(aCga_8), .D1(aVga_8), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_17));
    BIBUF dMem_pad_6 (.PAD(dMem[6]), .D(dMemOut_6), .E(dirout_i), .Y(
        dMem_in_6));
    BIBUF dMem_pad_1 (.PAD(dMem[1]), .D(dMemOut_1), .E(dirout_i), .Y(
        dMem_in_1));
    CM8 G_163 (.D0(aCga_2), .D1(aVga_2), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_23));
    CM8 G_153 (.D0(aCga_12), .D1(aVga_12), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(dirout), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_13));
    OUTBUF nOe_pad (.PAD(nOe), .D(nOe_c));
    OUTBUF nCs_pad (.PAD(nCs), .D(nCs_c));
    XOR2 I_56_s1_s0 (.A(halfclk), .B(imemory_state_1), .Y(
        imemory_state_1_1));
    GND GND (.Y(GNDZ0));
    OUTBUF aMem_pad_10 (.PAD(aMem[10]), .D(y_15));
    OUTBUF aMem_pad_11 (.PAD(aMem[11]), .D(y_14));
    INBUF vsync_pad (.PAD(vsync), .Y(vsync_c));
    OUTBUF aMem_pad_8 (.PAD(aMem[8]), .D(y_17));
    OUTBUF aMem_pad_13 (.PAD(aMem[13]), .D(y_12));
    memory imemory (.dMemOut({dMemOut_7, dMemOut_6, dMemOut_5, 
        dMemOut_4, dMemOut_3, dMemOut_2, dMemOut_1, dMemOut_0}), .dVga({
        dVga_7, dVga_6, dVga_5, dVga_4, dVga_3, dVga_2, dVga_1, dVga_0})
        , .dCga({dCga_7, dCga_6, dCga_5, dCga_4, dCga_3, dCga_2, 
        dCga_1, dCga_0}), .dMem_in({dMem_in_7, dMem_in_6, dMem_in_5, 
        dMem_in_4, dMem_in_3, dMem_in_2, dMem_in_1, dMem_in_0}), 
        .\state_1[1] (imemory_state_1_1), .\state[1] (imemory_state_1), 
        .wrVga_i(wrVga_i), .nOe_c(nOe_c), .nCs_c(nCs_c), .y_72(y_72), 
        .wrVga(wrVga), .nWe_c(nWe_c), .dirout_i(dirout_i), .halfclk_i(
        halfclk_i), .halfclk(halfclk), .dirout(dirout), .nReset_c(
        nReset_c), .clk_c(clk_c), .access_i(access_iZ0), .dirout_0(
        dirout_0), .access(access));
    OUTBUF aMem_pad_9 (.PAD(aMem[9]), .D(y_16));
    OUTBUF aMem_pad_2 (.PAD(aMem[2]), .D(y_23));
    OUTBUF aMem_pad_14 (.PAD(aMem[14]), .D(y_11));
    CM8 G_159 (.D0(aCga_6), .D1(aVga_6), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_19));
    INBUF hsync_pad (.PAD(hsync), .Y(hsync_c));
    OUTBUF aMem_pad_15 (.PAD(aMem[15]), .D(y_10));
    CM8 G_161 (.D0(aCga_4), .D1(aVga_4), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_21));
    BIBUF dMem_pad_2 (.PAD(dMem[2]), .D(dMemOut_2), .E(dirout_i), .Y(
        dMem_in_2));
    OUTBUF aMem_pad_7 (.PAD(aMem[7]), .D(y_18));
    OUTBUF aMem_pad_12 (.PAD(aMem[12]), .D(y_13));
    CM8 G_164 (.D0(aCga_1), .D1(aVga_1), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_24));
    CM8 G_151 (.D0(aCga_14), .D1(aVga_14), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(dirout), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_11));
    OUTBUF aMem_pad_0 (.PAD(aMem[0]), .D(y_25));
    CM8 G_154 (.D0(aCga_11), .D1(aVga_11), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(dirout), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_14));
    CM8 access_i (.D0(VCCZ0), .D1(GNDZ0), .D2(GNDZ0), .D3(GNDZ0), .S00(
        access), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(access_iZ0));
    CM8 G_158 (.D0(aCga_7), .D1(aVga_7), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_18));
    XNOR2 G_148 (.A(dirout), .B(wrVga), .Y(y_72));
    CLKBUF nReset_pad (.PAD(nReset), .Y(nReset_c));
    cgaega icgaega (.dCga({dCga_7, dCga_6, dCga_5, dCga_4, dCga_3, 
        dCga_2, dCga_1, dCga_0}), .aCga({aCga_15, aCga_14, aCga_13, 
        aCga_12, aCga_11, aCga_10, aCga_9, aCga_8, aCga_7, aCga_6, 
        aCga_5, aCga_4, aCga_3, aCga_2, aCga_1, aCga_0}), .halfclk_i(
        halfclk_i), .access_i(access_iZ0), .nReset_c(nReset_c), .clk_c(
        clk_c), .ega_c(ega_c), .csync_c(csync_c), .access(access), 
        .oVideo_c(oVideo_c));
    OUTBUF aMem_pad_4 (.PAD(aMem[4]), .D(y_21));
    BIBUF dMem_pad_7 (.PAD(dMem[7]), .D(dMemOut_7), .E(dirout_i), .Y(
        dMem_in_7));
    CM8 G_162 (.D0(aCga_3), .D1(aVga_3), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_22));
    OUTBUF csync_pad (.PAD(csync), .D(csync_c));
    BIBUF dMem_pad_0 (.PAD(dMem[0]), .D(dMemOut_0), .E(dirout_i), .Y(
        dMem_in_0));
    CM8 G_152 (.D0(aCga_13), .D1(aVga_13), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(dirout), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_12));
    OUTBUF aMem_pad_5 (.PAD(aMem[5]), .D(y_20));
    CM8 G_165 (.D0(aCga_0), .D1(aVga_0), .D2(GNDZ0), .D3(GNDZ0), .S00(
        dirout_0), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_25));
    CM8 G_155 (.D0(aCga_10), .D1(aVga_10), .D2(GNDZ0), .D3(GNDZ0), 
        .S00(dirout), .S01(VCCZ0), .S10(GNDZ0), .S11(GNDZ0), .Y(y_15));
    BIBUF dMem_pad_4 (.PAD(dMem[4]), .D(dMemOut_4), .E(dirout_i), .Y(
        dMem_in_4));
    vga ivga (.dVga({dVga_7, dVga_6, dVga_5, dVga_4, dVga_3, dVga_2, 
        dVga_1, dVga_0}), .aVga({aVga_15, aVga_14, aVga_13, aVga_12, 
        aVga_11, aVga_10, aVga_9, aVga_8, aVga_7, aVga_6, aVga_5, 
        aVga_4, aVga_3, aVga_2, aVga_1, aVga_0}), .hsync_c(hsync_c), 
        .vsync_c(vsync_c), .iVideo_c(iVideo_c), .nReset_c(nReset_c), 
        .relay_c(relay_c), .clk_c(clk_c), .dirout_0(dirout_0), .access(
        access), .wrVga(wrVga), .wrVga_i(wrVga_i));
    HCLKBUF clk_pad (.PAD(clk), .Y(clk_c));
    
endmodule