data/full_repos/permissive/193419875/src/RegisterMux.v
data/verilator_xmls/3b6fa3dc-fd3d-4a36-af15-7bcccf79cb3a.xml
module RegisterMux
(
	input [4:0] instructionMemory,
	input [4:0] targetAddress,
	input reg2Loc,
	output reg [4:0] registerMUXout
);

	always @(*) case (reg2Loc)
		0: registerMUXout = instructionMemory;
		1: registerMUXout = targetAddress;
		default: registerMUXout = instructionMemory;
	endcase
endmodule
module RegisterMux
(
	input [4:0] instructionMemory,
	input [4:0] targetAddress,
	input reg2Loc,
	output reg [4:0] registerMUXout
);


	always @(*) case (reg2Loc)
		0: registerMUXout = instructionMemory;
		1: registerMUXout = targetAddress;
		default: registerMUXout = instructionMemory;
	endcase
endmodule