data/full_repos/permissive/160024456/lib/data_exporter_test.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/160024456/lib/data_exporter_test.v:10: Unsupported: Ignoring delay on this delayed statement.\n  always #5 clk = !clk;\n         ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/160024456/lib/data_exporter_test.v:14: Unsupported: Ignoring delay on this delayed statement.\n    #10 en = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/160024456/lib/data_exporter_test.v:15: Unsupported: Ignoring delay on this delayed statement.\n    #10\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/160024456/lib/data_exporter_test.v:18: Unsupported: Ignoring delay on this delayed statement.\n    #50\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/160024456/lib/data_exporter_test.v:21: Unsupported: Ignoring delay on this delayed statement.\n    #50\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/160024456/lib/data_exporter_test.v:24: Unsupported: Ignoring delay on this delayed statement.\n    #50\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/160024456/lib/data_exporter_test.v:27: Unsupported: Ignoring delay on this delayed statement.\n    #50\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/160024456/lib/data_exporter_test.v:30: Unsupported: Ignoring delay on this delayed statement.\n    #50\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/160024456/lib/data_exporter_test.v:33: Unsupported: Ignoring delay on this delayed statement.\n    #50\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/160024456/lib/data_exporter_test.v:36: Unsupported: Ignoring delay on this delayed statement.\n    #50\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/160024456/lib/data_exporter_test.v:39: Unsupported: Ignoring delay on this delayed statement.\n    #50\n    ^\n%Error: data/full_repos/permissive/160024456/lib/data_exporter_test.v:8: Cannot find file containing module: \'data_exporter\'\n  data_exporter #(.WIDTH(4), .VAL(5)) dut (.clk(clk), .en(en), .data(data), .leds(leds));\n  ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/160024456/lib,data/full_repos/permissive/160024456/data_exporter\n             data/full_repos/permissive/160024456/lib,data/full_repos/permissive/160024456/data_exporter.v\n             data/full_repos/permissive/160024456/lib,data/full_repos/permissive/160024456/data_exporter.sv\n             data_exporter\n             data_exporter.v\n             data_exporter.sv\n             obj_dir/data_exporter\n             obj_dir/data_exporter.v\n             obj_dir/data_exporter.sv\n%Error: Exiting due to 1 error(s), 11 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module data_exporter_test;

  reg clk = 0;
  reg en = 0;
  reg [27:0] data = 28'b1000_0010_0001_1110_1101_0011_0100;
  wire [7:0] leds;

  data_exporter #(.WIDTH(4), .VAL(5)) dut (.clk(clk), .en(en), .data(data), .leds(leds));

  always #5 clk = !clk;

  initial begin
    $display("start");
    #10 en = 1;
    #10
    if (leds != 8'b1111_1111)
      $display("failed 0: leds=", leds);
    #50
    if (leds != 8'b0011_0100)
      $display("failed 1: leds=", leds);
    #50
    if (leds != 8'b1000_0000)
      $display("failed 2: leds=", leds);
    #50
    if (leds != 8'b0101_1010)
      $display("failed 3: leds=", leds);
    #50
    if (leds != 8'b1000_0000)
      $display("failed 4: leds=", leds);
    #50
    if (leds != 8'b0000_0111)
      $display("failed 5: leds=", leds);
    #50
    if (leds != 8'b1000_0000)
      $display("failed 6: leds=", leds);
    #50
    if (leds != 8'b0100_0001)
      $display("failed 7: leds=", leds);
    #50
    if (leds != 8'b1111_1111)
      $display("failed 8: leds=", leds);

    $display("done");
    $finish;
  end
endmodule
module data_exporter_test;


  reg clk = 0;
  reg en = 0;
  reg [27:0] data = 28'b1000_0010_0001_1110_1101_0011_0100;
  wire [7:0] leds;

  data_exporter #(.WIDTH(4), .VAL(5)) dut (.clk(clk), .en(en), .data(data), .leds(leds));

  always #5 clk = !clk;

  initial begin
    $display("start");
    #10 en = 1;
    #10
    if (leds != 8'b1111_1111)
      $display("failed 0: leds=", leds);
    #50
    if (leds != 8'b0011_0100)
      $display("failed 1: leds=", leds);
    #50
    if (leds != 8'b1000_0000)
      $display("failed 2: leds=", leds);
    #50
    if (leds != 8'b0101_1010)
      $display("failed 3: leds=", leds);
    #50
    if (leds != 8'b1000_0000)
      $display("failed 4: leds=", leds);
    #50
    if (leds != 8'b0000_0111)
      $display("failed 5: leds=", leds);
    #50
    if (leds != 8'b1000_0000)
      $display("failed 6: leds=", leds);
    #50
    if (leds != 8'b0100_0001)
      $display("failed 7: leds=", leds);
    #50
    if (leds != 8'b1111_1111)
      $display("failed 8: leds=", leds);

    $display("done");
    $finish;
  end
endmodule