data/full_repos/permissive/217441787/fpga/picosoc_mem.v
None: at end of input
1: b'%Warning-WIDTH: data/full_repos/permissive/217441787/fpga/picosoc_mem.v:23: Bit extraction of array[511:0] requires 9 bit index, not 22 bits.\n                                                                          : ... In instance picosoc_mem\n        if (wen[0]) mem_0[addr] <= wdata[ 7: 0];\n                         ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/217441787/fpga/picosoc_mem.v:24: Bit extraction of array[511:0] requires 9 bit index, not 22 bits.\n                                                                          : ... In instance picosoc_mem\n        if (wen[1]) mem_1[addr] <= wdata[15: 8];\n                         ^\n%Warning-WIDTH: data/full_repos/permissive/217441787/fpga/picosoc_mem.v:25: Bit extraction of array[511:0] requires 9 bit index, not 22 bits.\n                                                                          : ... In instance picosoc_mem\n        if (wen[2]) mem_2[addr] <= wdata[23:16];\n                         ^\n%Warning-WIDTH: data/full_repos/permissive/217441787/fpga/picosoc_mem.v:26: Bit extraction of array[511:0] requires 9 bit index, not 22 bits.\n                                                                          : ... In instance picosoc_mem\n        if (wen[3]) mem_3[addr] <= wdata[31:24];\n                         ^\n%Warning-WIDTH: data/full_repos/permissive/217441787/fpga/picosoc_mem.v:30: Bit extraction of array[511:0] requires 9 bit index, not 22 bits.\n                                                                          : ... In instance picosoc_mem\n        rdata[ 7: 0] <= mem_0[addr];\n                             ^\n%Warning-WIDTH: data/full_repos/permissive/217441787/fpga/picosoc_mem.v:31: Bit extraction of array[511:0] requires 9 bit index, not 22 bits.\n                                                                          : ... In instance picosoc_mem\n        rdata[15: 8] <= mem_1[addr];\n                             ^\n%Warning-WIDTH: data/full_repos/permissive/217441787/fpga/picosoc_mem.v:32: Bit extraction of array[511:0] requires 9 bit index, not 22 bits.\n                                                                          : ... In instance picosoc_mem\n        rdata[23:16] <= mem_2[addr];\n                             ^\n%Warning-WIDTH: data/full_repos/permissive/217441787/fpga/picosoc_mem.v:33: Bit extraction of array[511:0] requires 9 bit index, not 22 bits.\n                                                                          : ... In instance picosoc_mem\n        rdata[31:24] <= mem_3[addr];\n                             ^\n%Error: Exiting due to 8 warning(s)\n'
module picosoc_mem #(
    parameter integer WORDS = 512
) (
    input wire clk,
    input wire [3:0] wen,
    input wire [21:0] addr,
    input wire [31:0] wdata,
    output reg [31:0] rdata
);
    reg [7:0] mem_0 [0:WORDS-1];
    reg [7:0] mem_1 [0:WORDS-1];
    reg [7:0] mem_2 [0:WORDS-1];
    reg [7:0] mem_3 [0:WORDS-1];

    initial begin
        $readmemh("picorv_bl_0.mif", mem_0, 0, WORDS-1);
        $readmemh("picorv_bl_1.mif", mem_1, 0, WORDS-1);
        $readmemh("picorv_bl_2.mif", mem_2, 0, WORDS-1);
        $readmemh("picorv_bl_3.mif", mem_3, 0, WORDS-1);
    end

    always @(posedge clk) begin
        if (wen[0]) mem_0[addr] <= wdata[ 7: 0];
        if (wen[1]) mem_1[addr] <= wdata[15: 8];
        if (wen[2]) mem_2[addr] <= wdata[23:16];
        if (wen[3]) mem_3[addr] <= wdata[31:24];
    end
    
    always @(posedge clk) begin
        rdata[ 7: 0] <= mem_0[addr];
        rdata[15: 8] <= mem_1[addr];
        rdata[23:16] <= mem_2[addr];
        rdata[31:24] <= mem_3[addr];
    end
endmodule
module picosoc_mem #(
    parameter integer WORDS = 512
) (
    input wire clk,
    input wire [3:0] wen,
    input wire [21:0] addr,
    input wire [31:0] wdata,
    output reg [31:0] rdata
);

    reg [7:0] mem_0 [0:WORDS-1];
    reg [7:0] mem_1 [0:WORDS-1];
    reg [7:0] mem_2 [0:WORDS-1];
    reg [7:0] mem_3 [0:WORDS-1];

    initial begin
        $readmemh("picorv_bl_0.mif", mem_0, 0, WORDS-1);
        $readmemh("picorv_bl_1.mif", mem_1, 0, WORDS-1);
        $readmemh("picorv_bl_2.mif", mem_2, 0, WORDS-1);
        $readmemh("picorv_bl_3.mif", mem_3, 0, WORDS-1);
    end

    always @(posedge clk) begin
        if (wen[0]) mem_0[addr] <= wdata[ 7: 0];
        if (wen[1]) mem_1[addr] <= wdata[15: 8];
        if (wen[2]) mem_2[addr] <= wdata[23:16];
        if (wen[3]) mem_3[addr] <= wdata[31:24];
    end
    
    always @(posedge clk) begin
        rdata[ 7: 0] <= mem_0[addr];
        rdata[15: 8] <= mem_1[addr];
        rdata[23:16] <= mem_2[addr];
        rdata[31:24] <= mem_3[addr];
    end
endmodule