data/full_repos/permissive/208113388/afu/afp/afp3_eng_fsm_wkhstthrd.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b"%Error: data/full_repos/permissive/208113388/afu/afp/afp3_eng_fsm_wkhstthrd.v:155: Cannot find file containing module: 'mcp3_ohc03'\n  mcp3_ohc03  wkhstthrd_seq_err (\n  ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/208113388/afu/afp,data/full_repos/permissive/208113388/mcp3_ohc03\n             data/full_repos/permissive/208113388/afu/afp,data/full_repos/permissive/208113388/mcp3_ohc03.v\n             data/full_repos/permissive/208113388/afu/afp,data/full_repos/permissive/208113388/mcp3_ohc03.sv\n             mcp3_ohc03\n             mcp3_ohc03.v\n             mcp3_ohc03.sv\n             obj_dir/mcp3_ohc03\n             obj_dir/mcp3_ohc03.v\n             obj_dir/mcp3_ohc03.sv\n%Error: data/full_repos/permissive/208113388/afu/afp/afp3_eng_fsm_wkhstthrd.v:217: Cannot find file containing module: 'mcp3_ohc04'\n  mcp3_ohc04  wkhstthrd_rtry_seq_err (\n  ^~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module afp3_eng_fsm_wkhstthrd 
  (

    input                 clock                                           
  , input                 reset


  , input                 rtry_backoff_timer_disable_q








  , input          [15:0] mmio_eng_wkhstthrd_tid
  , input                 mmio_eng_wkhstthrd_flag

  , input           [5:0] eng_num
  , input          [11:0] eng_actag
  , input           [7:0] cfg_afu_bdf_bus 
  , input           [4:0] cfg_afu_bdf_device
  , input           [2:0] cfg_afu_bdf_function


  , input                 start_wkhstthrd_seq
  , input                 rspi_wkhstthrd_resp_val_q

  , output                wkhstthrd_req
  , input                 arb_eng_misc_gnt


  , output                wkhstthrd_seq_done
  , output                wkhstthrd_seq_error

  , output          [2:0] wkhstthrd_state
  , output                wkhstthrd_idle_st
  , output                wkhstthrd_wt4gnt_st
  , output                wkhstthrd_wt4rsp_st


  , input                 start_wkhstthrd_rtry_seq
  , input                 rtry_decode_is_immediate
  , input                 rtry_decode_is_backoff
  , input                 rtry_decode_is_abort
  , input                 wkhstthrd_rtry_backoff_done
  , input                 wkhstthrd_rtry_backoff_done_q

  , output                wkhstthrd_rtry_req
  , input                 arb_eng_rtry_misc_gnt


  , output                wkhstthrd_rtry_seq_error

  , output          [3:0] wkhstthrd_rtry_state
  , output                wkhstthrd_rtry_idle_st
  , output                wkhstthrd_rtry_wt4bckoff_st
  , output                wkhstthrd_rtry_wt4gnt_st
  , output                wkhstthrd_rtry_abort_st


  , output reg            wkhstthrd_valid
  , output reg      [7:0] wkhstthrd_opcode
  , output reg     [11:0] wkhstthrd_actag
  , output reg      [3:0] wkhstthrd_stream_id 
  , output reg     [67:0] wkhstthrd_ea_or_obj
  , output reg     [15:0] wkhstthrd_afutag
  , output reg      [1:0] wkhstthrd_dl
  , output reg      [2:0] wkhstthrd_pl
  , output reg            wkhstthrd_os
  , output reg     [63:0] wkhstthrd_be
  , output reg      [3:0] wkhstthrd_flag
  , output reg            wkhstthrd_endian
  , output reg     [15:0] wkhstthrd_bdf

  , output reg      [5:0] wkhstthrd_pg_size

  );






  wire      [5:0] wkhstthrd_seq_sel;
  reg       [4:0] wkhstthrd_seq;
  wire            wkhstthrd_seq_err_int;

  wire            wkhstthrd_idle_state;
  wire            wkhstthrd_wt4gnt_state;
  wire            wkhstthrd_wt4rsp_state;


  wire     [10:0] wkhstthrd_rtry_seq_sel;
  reg       [4:0] wkhstthrd_rtry_seq;
  wire            wkhstthrd_rtry_seq_err_int;

  wire            wkhstthrd_rtry_idle_state;
  wire            wkhstthrd_rtry_wt4bckoff_state;
  wire            wkhstthrd_rtry_wt4gnt_state;
  wire            wkhstthrd_rtry_abort_state;







  wire      [2:0] wkhstthrd_seq_d;
  reg       [2:0] wkhstthrd_seq_q;

  wire      [3:0] wkhstthrd_rtry_seq_d;
  reg       [3:0] wkhstthrd_rtry_seq_q;







  localparam    [4:0] WKHSTTHRD_AFUTAG_ENCODE                  = 5'b00110;


  localparam    [7:0] AFU_TLX_CMD_ENCODE_WAKE_HOST_THREAD      = 8'b01011100;







  mcp3_ohc03  wkhstthrd_seq_err (
    .one_hot_vector   ( wkhstthrd_seq_q[2:0] ),
    .one_hot_error    ( wkhstthrd_seq_err_int )
  );


  assign  wkhstthrd_idle_state   =  wkhstthrd_seq_q[0];
  assign  wkhstthrd_wt4gnt_state =  wkhstthrd_seq_q[1];
  assign  wkhstthrd_wt4rsp_state =  wkhstthrd_seq_q[2];


  assign  wkhstthrd_seq_sel[5:0] = { start_wkhstthrd_seq, arb_eng_misc_gnt, rspi_wkhstthrd_resp_val_q, wkhstthrd_seq_q[2:0] };

  always @*
    begin
      casez ( wkhstthrd_seq_sel[5:0] )










            6'b0??_001 :  wkhstthrd_seq[4:0] =  5'b00_001 ;
            6'b1??_001 :  wkhstthrd_seq[4:0] =  5'b10_010 ;

            6'b?0?_010 :  wkhstthrd_seq[4:0] =  5'b00_010 ;
            6'b?1?_010 :  wkhstthrd_seq[4:0] =  5'b00_100 ;

            6'b??0_100 :  wkhstthrd_seq[4:0] =  5'b00_100 ;
            6'b??1_100 :  wkhstthrd_seq[4:0] =  5'b01_001 ;

            default    :  wkhstthrd_seq[4:0] =  5'b01_001 ;

      endcase
    end


  assign  wkhstthrd_req      =  wkhstthrd_seq[4];
  assign  wkhstthrd_seq_done =  wkhstthrd_seq[3];


  assign  wkhstthrd_state[2:0] =  wkhstthrd_seq_q[2:0]; 
  assign  wkhstthrd_idle_st    =  wkhstthrd_idle_state;
  assign  wkhstthrd_wt4gnt_st  =  wkhstthrd_wt4gnt_state;
  assign  wkhstthrd_wt4rsp_st  =  wkhstthrd_wt4rsp_state;


  assign  wkhstthrd_seq_error =  wkhstthrd_seq_err_int;


  assign  wkhstthrd_seq_d[2:0] = ( reset || wkhstthrd_seq_err_int ) ? 3'b1 :  wkhstthrd_seq[2:0];







  mcp3_ohc04  wkhstthrd_rtry_seq_err (
    .one_hot_vector   ( wkhstthrd_rtry_seq_q[3:0] ),
    .one_hot_error    ( wkhstthrd_rtry_seq_err_int )
  );


  assign  wkhstthrd_rtry_idle_state      =  wkhstthrd_rtry_seq_q[0];
  assign  wkhstthrd_rtry_wt4bckoff_state =  wkhstthrd_rtry_seq_q[1];
  assign  wkhstthrd_rtry_wt4gnt_state    =  wkhstthrd_rtry_seq_q[2];
  assign  wkhstthrd_rtry_abort_state     =  wkhstthrd_rtry_seq_q[3];


  assign  wkhstthrd_rtry_seq_sel[10:0] = { start_wkhstthrd_rtry_seq, ( rtry_decode_is_immediate || rtry_backoff_timer_disable_q ), rtry_decode_is_backoff, rtry_decode_is_abort,
                                           wkhstthrd_rtry_backoff_done_q,  wkhstthrd_rtry_backoff_done, arb_eng_rtry_misc_gnt, wkhstthrd_rtry_seq_q[3:0] };

  always @*
    begin
      casez ( wkhstthrd_rtry_seq_sel[10:0] )














           11'b0??????_0001 :  wkhstthrd_rtry_seq[4:0] =  5'b0_0001 ;
           11'b11?????_0001 :  wkhstthrd_rtry_seq[4:0] =  5'b1_0100 ;
           11'b101?00?_0001 :  wkhstthrd_rtry_seq[4:0] =  5'b0_0010 ;
           11'b101?1??_0001 :  wkhstthrd_rtry_seq[4:0] =  5'b1_0100 ;
           11'b101?01?_0001 :  wkhstthrd_rtry_seq[4:0] =  5'b1_0100 ;
           11'b1001???_0001 :  wkhstthrd_rtry_seq[4:0] =  5'b0_1000 ;

           11'b?????0?_0010 :  wkhstthrd_rtry_seq[4:0] =  5'b0_0010 ;
           11'b?????1?_0010 :  wkhstthrd_rtry_seq[4:0] =  5'b1_0100 ;

           11'b??????0_0100 :  wkhstthrd_rtry_seq[4:0] =  5'b0_0100 ;
           11'b??????1_0100 :  wkhstthrd_rtry_seq[4:0] =  5'b0_0001 ;

           11'b???????_1000 :  wkhstthrd_rtry_seq[4:0] =  5'b0_0001 ;

            default         :  wkhstthrd_rtry_seq[4:0] =  5'b0_0001 ;

      endcase
    end


  assign  wkhstthrd_rtry_req =  wkhstthrd_rtry_seq[4];


  assign  wkhstthrd_rtry_state[3:0]   =  wkhstthrd_rtry_seq_q[3:0]; 
  assign  wkhstthrd_rtry_idle_st      =  wkhstthrd_rtry_idle_state;     
  assign  wkhstthrd_rtry_wt4bckoff_st =  wkhstthrd_rtry_wt4bckoff_state;
  assign  wkhstthrd_rtry_wt4gnt_st    =  wkhstthrd_rtry_wt4gnt_state;   
  assign  wkhstthrd_rtry_abort_st     =  wkhstthrd_rtry_abort_state;


  assign  wkhstthrd_rtry_seq_error    =  wkhstthrd_rtry_seq_err_int;


  assign  wkhstthrd_rtry_seq_d[3:0] = ( reset || wkhstthrd_rtry_seq_err_int ) ? 4'b1 : wkhstthrd_rtry_seq[3:0];







  always @*
    begin

      if ( wkhstthrd_wt4gnt_state || wkhstthrd_rtry_wt4gnt_state )
        begin
          wkhstthrd_valid           =  (( wkhstthrd_wt4gnt_state && arb_eng_misc_gnt ) || ( wkhstthrd_rtry_wt4gnt_state && arb_eng_rtry_misc_gnt ));
          wkhstthrd_opcode[7:0]     =     AFU_TLX_CMD_ENCODE_WAKE_HOST_THREAD[7:0];
          wkhstthrd_actag[11:0]     =     eng_actag[11:0];
          wkhstthrd_stream_id[3:0]  =     4'b0;


          if ( mmio_eng_wkhstthrd_flag )
            wkhstthrd_ea_or_obj[67:0] =  { 52'b0, mmio_eng_wkhstthrd_tid[15:0] };
          else
            wkhstthrd_ea_or_obj[67:0] =    68'b0;
          wkhstthrd_afutag[15:0]    =  {  2'b00, 3'b001, eng_num[5:0], WKHSTTHRD_AFUTAG_ENCODE[4:0] }; 
          wkhstthrd_dl[1:0]         =     2'b00;
          wkhstthrd_pl[2:0]         =     3'b000;
          wkhstthrd_os              =     1'b0;
          wkhstthrd_be[63:0]        =    64'b0;

          wkhstthrd_flag[3:0]       =  {  3'b0, mmio_eng_wkhstthrd_flag };
          wkhstthrd_endian          =     1'b0;
          wkhstthrd_bdf[15:0]       =  { cfg_afu_bdf_bus[7:0], cfg_afu_bdf_device[4:0], cfg_afu_bdf_function[2:0] };

          wkhstthrd_pg_size[5:0]    =     6'b0;
        end
      else
        begin
          wkhstthrd_valid           =    1'b0;
          wkhstthrd_opcode[7:0]     =    8'b0;
          wkhstthrd_actag[11:0]     =   12'b0;
          wkhstthrd_stream_id[3:0]  =    4'b0;
          wkhstthrd_ea_or_obj[67:0] =   68'b0;
          wkhstthrd_afutag[15:0]    =   16'b0;
          wkhstthrd_dl[1:0]         =    2'b0;
          wkhstthrd_pl[2:0]         =    3'b0;
          wkhstthrd_os              =    1'b0;
          wkhstthrd_be[63:0]        =   64'b0;
          wkhstthrd_flag[3:0]       =    4'b0;
          wkhstthrd_endian          =    1'b0;
          wkhstthrd_bdf[15:0]       =   16'b0;

          wkhstthrd_pg_size[5:0]    =    6'b0;
        end

    end






  always @ ( posedge clock )
    begin

      wkhstthrd_seq_q[2:0]                            <= wkhstthrd_seq_d[2:0];        
      wkhstthrd_rtry_seq_q[3:0]                       <= wkhstthrd_rtry_seq_d[3:0];        

    end

endmodule
module afp3_eng_fsm_wkhstthrd 
  (

    input                 clock                                           
  , input                 reset


  , input                 rtry_backoff_timer_disable_q








  , input          [15:0] mmio_eng_wkhstthrd_tid
  , input                 mmio_eng_wkhstthrd_flag

  , input           [5:0] eng_num
  , input          [11:0] eng_actag
  , input           [7:0] cfg_afu_bdf_bus 
  , input           [4:0] cfg_afu_bdf_device
  , input           [2:0] cfg_afu_bdf_function


  , input                 start_wkhstthrd_seq
  , input                 rspi_wkhstthrd_resp_val_q

  , output                wkhstthrd_req
  , input                 arb_eng_misc_gnt


  , output                wkhstthrd_seq_done
  , output                wkhstthrd_seq_error

  , output          [2:0] wkhstthrd_state
  , output                wkhstthrd_idle_st
  , output                wkhstthrd_wt4gnt_st
  , output                wkhstthrd_wt4rsp_st


  , input                 start_wkhstthrd_rtry_seq
  , input                 rtry_decode_is_immediate
  , input                 rtry_decode_is_backoff
  , input                 rtry_decode_is_abort
  , input                 wkhstthrd_rtry_backoff_done
  , input                 wkhstthrd_rtry_backoff_done_q

  , output                wkhstthrd_rtry_req
  , input                 arb_eng_rtry_misc_gnt


  , output                wkhstthrd_rtry_seq_error

  , output          [3:0] wkhstthrd_rtry_state
  , output                wkhstthrd_rtry_idle_st
  , output                wkhstthrd_rtry_wt4bckoff_st
  , output                wkhstthrd_rtry_wt4gnt_st
  , output                wkhstthrd_rtry_abort_st


  , output reg            wkhstthrd_valid
  , output reg      [7:0] wkhstthrd_opcode
  , output reg     [11:0] wkhstthrd_actag
  , output reg      [3:0] wkhstthrd_stream_id 
  , output reg     [67:0] wkhstthrd_ea_or_obj
  , output reg     [15:0] wkhstthrd_afutag
  , output reg      [1:0] wkhstthrd_dl
  , output reg      [2:0] wkhstthrd_pl
  , output reg            wkhstthrd_os
  , output reg     [63:0] wkhstthrd_be
  , output reg      [3:0] wkhstthrd_flag
  , output reg            wkhstthrd_endian
  , output reg     [15:0] wkhstthrd_bdf

  , output reg      [5:0] wkhstthrd_pg_size

  );







  wire      [5:0] wkhstthrd_seq_sel;
  reg       [4:0] wkhstthrd_seq;
  wire            wkhstthrd_seq_err_int;

  wire            wkhstthrd_idle_state;
  wire            wkhstthrd_wt4gnt_state;
  wire            wkhstthrd_wt4rsp_state;


  wire     [10:0] wkhstthrd_rtry_seq_sel;
  reg       [4:0] wkhstthrd_rtry_seq;
  wire            wkhstthrd_rtry_seq_err_int;

  wire            wkhstthrd_rtry_idle_state;
  wire            wkhstthrd_rtry_wt4bckoff_state;
  wire            wkhstthrd_rtry_wt4gnt_state;
  wire            wkhstthrd_rtry_abort_state;







  wire      [2:0] wkhstthrd_seq_d;
  reg       [2:0] wkhstthrd_seq_q;

  wire      [3:0] wkhstthrd_rtry_seq_d;
  reg       [3:0] wkhstthrd_rtry_seq_q;







  localparam    [4:0] WKHSTTHRD_AFUTAG_ENCODE                  = 5'b00110;


  localparam    [7:0] AFU_TLX_CMD_ENCODE_WAKE_HOST_THREAD      = 8'b01011100;







  mcp3_ohc03  wkhstthrd_seq_err (
    .one_hot_vector   ( wkhstthrd_seq_q[2:0] ),
    .one_hot_error    ( wkhstthrd_seq_err_int )
  );


  assign  wkhstthrd_idle_state   =  wkhstthrd_seq_q[0];
  assign  wkhstthrd_wt4gnt_state =  wkhstthrd_seq_q[1];
  assign  wkhstthrd_wt4rsp_state =  wkhstthrd_seq_q[2];


  assign  wkhstthrd_seq_sel[5:0] = { start_wkhstthrd_seq, arb_eng_misc_gnt, rspi_wkhstthrd_resp_val_q, wkhstthrd_seq_q[2:0] };

  always @*
    begin
      casez ( wkhstthrd_seq_sel[5:0] )










            6'b0??_001 :  wkhstthrd_seq[4:0] =  5'b00_001 ;
            6'b1??_001 :  wkhstthrd_seq[4:0] =  5'b10_010 ;

            6'b?0?_010 :  wkhstthrd_seq[4:0] =  5'b00_010 ;
            6'b?1?_010 :  wkhstthrd_seq[4:0] =  5'b00_100 ;

            6'b??0_100 :  wkhstthrd_seq[4:0] =  5'b00_100 ;
            6'b??1_100 :  wkhstthrd_seq[4:0] =  5'b01_001 ;

            default    :  wkhstthrd_seq[4:0] =  5'b01_001 ;

      endcase
    end


  assign  wkhstthrd_req      =  wkhstthrd_seq[4];
  assign  wkhstthrd_seq_done =  wkhstthrd_seq[3];


  assign  wkhstthrd_state[2:0] =  wkhstthrd_seq_q[2:0]; 
  assign  wkhstthrd_idle_st    =  wkhstthrd_idle_state;
  assign  wkhstthrd_wt4gnt_st  =  wkhstthrd_wt4gnt_state;
  assign  wkhstthrd_wt4rsp_st  =  wkhstthrd_wt4rsp_state;


  assign  wkhstthrd_seq_error =  wkhstthrd_seq_err_int;


  assign  wkhstthrd_seq_d[2:0] = ( reset || wkhstthrd_seq_err_int ) ? 3'b1 :  wkhstthrd_seq[2:0];







  mcp3_ohc04  wkhstthrd_rtry_seq_err (
    .one_hot_vector   ( wkhstthrd_rtry_seq_q[3:0] ),
    .one_hot_error    ( wkhstthrd_rtry_seq_err_int )
  );


  assign  wkhstthrd_rtry_idle_state      =  wkhstthrd_rtry_seq_q[0];
  assign  wkhstthrd_rtry_wt4bckoff_state =  wkhstthrd_rtry_seq_q[1];
  assign  wkhstthrd_rtry_wt4gnt_state    =  wkhstthrd_rtry_seq_q[2];
  assign  wkhstthrd_rtry_abort_state     =  wkhstthrd_rtry_seq_q[3];


  assign  wkhstthrd_rtry_seq_sel[10:0] = { start_wkhstthrd_rtry_seq, ( rtry_decode_is_immediate || rtry_backoff_timer_disable_q ), rtry_decode_is_backoff, rtry_decode_is_abort,
                                           wkhstthrd_rtry_backoff_done_q,  wkhstthrd_rtry_backoff_done, arb_eng_rtry_misc_gnt, wkhstthrd_rtry_seq_q[3:0] };

  always @*
    begin
      casez ( wkhstthrd_rtry_seq_sel[10:0] )














           11'b0??????_0001 :  wkhstthrd_rtry_seq[4:0] =  5'b0_0001 ;
           11'b11?????_0001 :  wkhstthrd_rtry_seq[4:0] =  5'b1_0100 ;
           11'b101?00?_0001 :  wkhstthrd_rtry_seq[4:0] =  5'b0_0010 ;
           11'b101?1??_0001 :  wkhstthrd_rtry_seq[4:0] =  5'b1_0100 ;
           11'b101?01?_0001 :  wkhstthrd_rtry_seq[4:0] =  5'b1_0100 ;
           11'b1001???_0001 :  wkhstthrd_rtry_seq[4:0] =  5'b0_1000 ;

           11'b?????0?_0010 :  wkhstthrd_rtry_seq[4:0] =  5'b0_0010 ;
           11'b?????1?_0010 :  wkhstthrd_rtry_seq[4:0] =  5'b1_0100 ;

           11'b??????0_0100 :  wkhstthrd_rtry_seq[4:0] =  5'b0_0100 ;
           11'b??????1_0100 :  wkhstthrd_rtry_seq[4:0] =  5'b0_0001 ;

           11'b???????_1000 :  wkhstthrd_rtry_seq[4:0] =  5'b0_0001 ;

            default         :  wkhstthrd_rtry_seq[4:0] =  5'b0_0001 ;

      endcase
    end


  assign  wkhstthrd_rtry_req =  wkhstthrd_rtry_seq[4];


  assign  wkhstthrd_rtry_state[3:0]   =  wkhstthrd_rtry_seq_q[3:0]; 
  assign  wkhstthrd_rtry_idle_st      =  wkhstthrd_rtry_idle_state;     
  assign  wkhstthrd_rtry_wt4bckoff_st =  wkhstthrd_rtry_wt4bckoff_state;
  assign  wkhstthrd_rtry_wt4gnt_st    =  wkhstthrd_rtry_wt4gnt_state;   
  assign  wkhstthrd_rtry_abort_st     =  wkhstthrd_rtry_abort_state;


  assign  wkhstthrd_rtry_seq_error    =  wkhstthrd_rtry_seq_err_int;


  assign  wkhstthrd_rtry_seq_d[3:0] = ( reset || wkhstthrd_rtry_seq_err_int ) ? 4'b1 : wkhstthrd_rtry_seq[3:0];







  always @*
    begin

      if ( wkhstthrd_wt4gnt_state || wkhstthrd_rtry_wt4gnt_state )
        begin
          wkhstthrd_valid           =  (( wkhstthrd_wt4gnt_state && arb_eng_misc_gnt ) || ( wkhstthrd_rtry_wt4gnt_state && arb_eng_rtry_misc_gnt ));
          wkhstthrd_opcode[7:0]     =     AFU_TLX_CMD_ENCODE_WAKE_HOST_THREAD[7:0];
          wkhstthrd_actag[11:0]     =     eng_actag[11:0];
          wkhstthrd_stream_id[3:0]  =     4'b0;


          if ( mmio_eng_wkhstthrd_flag )
            wkhstthrd_ea_or_obj[67:0] =  { 52'b0, mmio_eng_wkhstthrd_tid[15:0] };
          else
            wkhstthrd_ea_or_obj[67:0] =    68'b0;
          wkhstthrd_afutag[15:0]    =  {  2'b00, 3'b001, eng_num[5:0], WKHSTTHRD_AFUTAG_ENCODE[4:0] }; 
          wkhstthrd_dl[1:0]         =     2'b00;
          wkhstthrd_pl[2:0]         =     3'b000;
          wkhstthrd_os              =     1'b0;
          wkhstthrd_be[63:0]        =    64'b0;

          wkhstthrd_flag[3:0]       =  {  3'b0, mmio_eng_wkhstthrd_flag };
          wkhstthrd_endian          =     1'b0;
          wkhstthrd_bdf[15:0]       =  { cfg_afu_bdf_bus[7:0], cfg_afu_bdf_device[4:0], cfg_afu_bdf_function[2:0] };

          wkhstthrd_pg_size[5:0]    =     6'b0;
        end
      else
        begin
          wkhstthrd_valid           =    1'b0;
          wkhstthrd_opcode[7:0]     =    8'b0;
          wkhstthrd_actag[11:0]     =   12'b0;
          wkhstthrd_stream_id[3:0]  =    4'b0;
          wkhstthrd_ea_or_obj[67:0] =   68'b0;
          wkhstthrd_afutag[15:0]    =   16'b0;
          wkhstthrd_dl[1:0]         =    2'b0;
          wkhstthrd_pl[2:0]         =    3'b0;
          wkhstthrd_os              =    1'b0;
          wkhstthrd_be[63:0]        =   64'b0;
          wkhstthrd_flag[3:0]       =    4'b0;
          wkhstthrd_endian          =    1'b0;
          wkhstthrd_bdf[15:0]       =   16'b0;

          wkhstthrd_pg_size[5:0]    =    6'b0;
        end

    end






  always @ ( posedge clock )
    begin

      wkhstthrd_seq_q[2:0]                            <= wkhstthrd_seq_d[2:0];        
      wkhstthrd_rtry_seq_q[3:0]                       <= wkhstthrd_rtry_seq_d[3:0];        

    end

endmodule