data/full_repos/permissive/148200700/Quartus/designFiles/ip/KBandIPsubPro/KBandIPsubPro_clk_internal/KBandIPsubPro_clk_internal_bb.v
data/verilator_xmls/03fedc07-e484-4925-9702-f0080a86ef3d.xml
module KBandIPsubPro_clk_internal (
		input  wire  in_clk,
		input  wire  reset_n,
		output wire  clk_out,
		output wire  reset_n_out
	);
endmodule
module KBandIPsubPro_clk_internal (
		input  wire  in_clk,
		input  wire  reset_n,
		output wire  clk_out,
		output wire  reset_n_out
	);

endmodule