data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v
None: at end of input
1: b'%Error: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:53: Cannot find file containing module: \'clk_wiz_0\'\nclk_wiz_0 clk_wiz_0\n^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/152455180,data/full_repos/permissive/152455180/clk_wiz_0\n             data/full_repos/permissive/152455180,data/full_repos/permissive/152455180/clk_wiz_0.v\n             data/full_repos/permissive/152455180,data/full_repos/permissive/152455180/clk_wiz_0.sv\n             clk_wiz_0\n             clk_wiz_0.v\n             clk_wiz_0.sv\n             obj_dir/clk_wiz_0\n             obj_dir/clk_wiz_0.v\n             obj_dir/clk_wiz_0.sv\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:138: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n      memory[addr_DM]   <= IMG_DOUT;\n            ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:299: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign center= memory[centerAddr];       \n                     ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:300: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign above  = memory[aboveAddr]; \n                      ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:301: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign below  = memory[belowAddr]; \n                      ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:310: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+ memory[crnt_Star_addr-FRAME_WIDTH_2]+memory[crnt_Star_addr-FRAME_WIDTH_2-6]\n        ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:311: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+ memory[crnt_Star_addr-FRAME_WIDTH_3]+memory[crnt_Star_addr-FRAME_WIDTH_3-6]\n        ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:312: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+ memory[crnt_Star_addr-FRAME_WIDTH_4]+memory[crnt_Star_addr-FRAME_WIDTH_4-6]\n        ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:308: Operator ADD expects 14 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign background_sum = memory[crnt_Star_addr-2]+ memory[crnt_Star_addr-3]+memory[crnt_Star_addr-4]\n                                                ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:308: Operator ADD expects 14 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign background_sum = memory[crnt_Star_addr-2]+ memory[crnt_Star_addr-3]+memory[crnt_Star_addr-4]\n                                                ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:308: Operator ADD expects 14 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign background_sum = memory[crnt_Star_addr-2]+ memory[crnt_Star_addr-3]+memory[crnt_Star_addr-4]\n                                                                          ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:309: Operator ADD expects 14 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+ memory[crnt_Star_addr-FRAME_WIDTH_1-1]+memory[crnt_Star_addr-FRAME_WIDTH_1-5]\n^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:309: Operator ADD expects 14 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+ memory[crnt_Star_addr-FRAME_WIDTH_1-1]+memory[crnt_Star_addr-FRAME_WIDTH_1-5]\n                                        ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:310: Operator ADD expects 14 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+ memory[crnt_Star_addr-FRAME_WIDTH_2]+memory[crnt_Star_addr-FRAME_WIDTH_2-6]\n^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:310: Operator ADD expects 14 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+ memory[crnt_Star_addr-FRAME_WIDTH_2]+memory[crnt_Star_addr-FRAME_WIDTH_2-6]\n                                      ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:311: Operator ADD expects 14 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+ memory[crnt_Star_addr-FRAME_WIDTH_3]+memory[crnt_Star_addr-FRAME_WIDTH_3-6]\n^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:311: Operator ADD expects 14 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+ memory[crnt_Star_addr-FRAME_WIDTH_3]+memory[crnt_Star_addr-FRAME_WIDTH_3-6]\n                                      ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:312: Operator ADD expects 14 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+ memory[crnt_Star_addr-FRAME_WIDTH_4]+memory[crnt_Star_addr-FRAME_WIDTH_4-6]\n^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:312: Operator ADD expects 14 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+ memory[crnt_Star_addr-FRAME_WIDTH_4]+memory[crnt_Star_addr-FRAME_WIDTH_4-6]\n                                      ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:313: Operator ADD expects 14 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+ memory[crnt_Star_addr-FRAME_WIDTH_5-1]+memory[crnt_Star_addr-FRAME_WIDTH_5-5]\n^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:313: Operator ADD expects 14 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+ memory[crnt_Star_addr-FRAME_WIDTH_5-1]+memory[crnt_Star_addr-FRAME_WIDTH_5-5]\n                                        ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:314: Operator ADD expects 14 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+  memory[crnt_Star_addr-FRAME_WIDTH_6-2]+ memory[crnt_Star_addr-FRAME_WIDTH_6-3]+ memory[crnt_Star_addr-FRAME_WIDTH_6-4];\n^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:314: Operator ADD expects 14 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+  memory[crnt_Star_addr-FRAME_WIDTH_6-2]+ memory[crnt_Star_addr-FRAME_WIDTH_6-3]+ memory[crnt_Star_addr-FRAME_WIDTH_6-4];\n                                         ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:314: Operator ADD expects 14 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+  memory[crnt_Star_addr-FRAME_WIDTH_6-2]+ memory[crnt_Star_addr-FRAME_WIDTH_6-3]+ memory[crnt_Star_addr-FRAME_WIDTH_6-4];\n                                                                                 ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:318: Operator ADD expects 15 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign centroid_sum  = memory[crnt_Star_addr-FRAME_WIDTH_1-2]+ memory[crnt_Star_addr-FRAME_WIDTH_1-3]+ memory[crnt_Star_addr-FRAME_WIDTH_1-4]\n                                                             ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:318: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign centroid_sum  = memory[crnt_Star_addr-FRAME_WIDTH_1-2]+ memory[crnt_Star_addr-FRAME_WIDTH_1-3]+ memory[crnt_Star_addr-FRAME_WIDTH_1-4]\n                                                             ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:318: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign centroid_sum  = memory[crnt_Star_addr-FRAME_WIDTH_1-2]+ memory[crnt_Star_addr-FRAME_WIDTH_1-3]+ memory[crnt_Star_addr-FRAME_WIDTH_1-4]\n                                                                                                     ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:319: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+memory[crnt_Star_addr-FRAME_WIDTH_2-2]+ memory[crnt_Star_addr-FRAME_WIDTH_2-3]+ memory[crnt_Star_addr-FRAME_WIDTH_2-4]+memory[crnt_Star_addr-FRAME_WIDTH_2-5]\n^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:319: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+memory[crnt_Star_addr-FRAME_WIDTH_2-2]+ memory[crnt_Star_addr-FRAME_WIDTH_2-3]+ memory[crnt_Star_addr-FRAME_WIDTH_2-4]+memory[crnt_Star_addr-FRAME_WIDTH_2-5]\n                                       ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:319: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+memory[crnt_Star_addr-FRAME_WIDTH_2-2]+ memory[crnt_Star_addr-FRAME_WIDTH_2-3]+ memory[crnt_Star_addr-FRAME_WIDTH_2-4]+memory[crnt_Star_addr-FRAME_WIDTH_2-5]\n                                                                              ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:319: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+memory[crnt_Star_addr-FRAME_WIDTH_2-2]+ memory[crnt_Star_addr-FRAME_WIDTH_2-3]+ memory[crnt_Star_addr-FRAME_WIDTH_2-4]+memory[crnt_Star_addr-FRAME_WIDTH_2-5]\n                                                                                                                      ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:319: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+memory[crnt_Star_addr-FRAME_WIDTH_2-2]+ memory[crnt_Star_addr-FRAME_WIDTH_2-3]+ memory[crnt_Star_addr-FRAME_WIDTH_2-4]+memory[crnt_Star_addr-FRAME_WIDTH_2-5]\n                                                                                                                                                              ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:320: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+memory[crnt_Star_addr-FRAME_WIDTH_3-2]+ memory[crnt_Star_addr-FRAME_WIDTH_3-3]+ memory[crnt_Star_addr-FRAME_WIDTH_3-4]+memory[crnt_Star_addr-FRAME_WIDTH_3-5]\n^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:320: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+memory[crnt_Star_addr-FRAME_WIDTH_3-2]+ memory[crnt_Star_addr-FRAME_WIDTH_3-3]+ memory[crnt_Star_addr-FRAME_WIDTH_3-4]+memory[crnt_Star_addr-FRAME_WIDTH_3-5]\n                                       ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:320: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+memory[crnt_Star_addr-FRAME_WIDTH_3-2]+ memory[crnt_Star_addr-FRAME_WIDTH_3-3]+ memory[crnt_Star_addr-FRAME_WIDTH_3-4]+memory[crnt_Star_addr-FRAME_WIDTH_3-5]\n                                                                              ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:320: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+memory[crnt_Star_addr-FRAME_WIDTH_3-2]+ memory[crnt_Star_addr-FRAME_WIDTH_3-3]+ memory[crnt_Star_addr-FRAME_WIDTH_3-4]+memory[crnt_Star_addr-FRAME_WIDTH_3-5]\n                                                                                                                      ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:320: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+memory[crnt_Star_addr-FRAME_WIDTH_3-2]+ memory[crnt_Star_addr-FRAME_WIDTH_3-3]+ memory[crnt_Star_addr-FRAME_WIDTH_3-4]+memory[crnt_Star_addr-FRAME_WIDTH_3-5]\n                                                                                                                                                              ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:321: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+memory[crnt_Star_addr-FRAME_WIDTH_4-2]+ memory[crnt_Star_addr-FRAME_WIDTH_4-3]+ memory[crnt_Star_addr-FRAME_WIDTH_4-4]+memory[crnt_Star_addr-FRAME_WIDTH_4-5]\n^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:321: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+memory[crnt_Star_addr-FRAME_WIDTH_4-2]+ memory[crnt_Star_addr-FRAME_WIDTH_4-3]+ memory[crnt_Star_addr-FRAME_WIDTH_4-4]+memory[crnt_Star_addr-FRAME_WIDTH_4-5]\n                                       ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:321: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+memory[crnt_Star_addr-FRAME_WIDTH_4-2]+ memory[crnt_Star_addr-FRAME_WIDTH_4-3]+ memory[crnt_Star_addr-FRAME_WIDTH_4-4]+memory[crnt_Star_addr-FRAME_WIDTH_4-5]\n                                                                              ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:321: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+memory[crnt_Star_addr-FRAME_WIDTH_4-2]+ memory[crnt_Star_addr-FRAME_WIDTH_4-3]+ memory[crnt_Star_addr-FRAME_WIDTH_4-4]+memory[crnt_Star_addr-FRAME_WIDTH_4-5]\n                                                                                                                      ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:321: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+memory[crnt_Star_addr-FRAME_WIDTH_4-2]+ memory[crnt_Star_addr-FRAME_WIDTH_4-3]+ memory[crnt_Star_addr-FRAME_WIDTH_4-4]+memory[crnt_Star_addr-FRAME_WIDTH_4-5]\n                                                                                                                                                              ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:322: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_5-2]+ memory[crnt_Star_addr-FRAME_WIDTH_5-3]+ memory[crnt_Star_addr-FRAME_WIDTH_5-4];\n^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:322: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_5-2]+ memory[crnt_Star_addr-FRAME_WIDTH_5-3]+ memory[crnt_Star_addr-FRAME_WIDTH_5-4];\n                                       ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:322: Operator ADD expects 15 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_5-2]+ memory[crnt_Star_addr-FRAME_WIDTH_5-3]+ memory[crnt_Star_addr-FRAME_WIDTH_5-4];\n                                                                               ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:328: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign x_weighted_sum  = (memory[crnt_Star_addr-FRAME_WIDTH_1-2] << 1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_1-3]+(memory[crnt_Star_addr-FRAME_WIDTH_1-3] << 1))+ (memory[crnt_Star_addr-FRAME_WIDTH_1-4]<<2)\n                                                                 ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:328: Operator ADD expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign x_weighted_sum  = (memory[crnt_Star_addr-FRAME_WIDTH_1-2] << 1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_1-3]+(memory[crnt_Star_addr-FRAME_WIDTH_1-3] << 1))+ (memory[crnt_Star_addr-FRAME_WIDTH_1-4]<<2)\n                                                                                                                ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:328: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign x_weighted_sum  = (memory[crnt_Star_addr-FRAME_WIDTH_1-2] << 1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_1-3]+(memory[crnt_Star_addr-FRAME_WIDTH_1-3] << 1))+ (memory[crnt_Star_addr-FRAME_WIDTH_1-4]<<2)\n                                                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:328: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign x_weighted_sum  = (memory[crnt_Star_addr-FRAME_WIDTH_1-2] << 1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_1-3]+(memory[crnt_Star_addr-FRAME_WIDTH_1-3] << 1))+ (memory[crnt_Star_addr-FRAME_WIDTH_1-4]<<2)\n                                                                                                                                                                                                        ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:329: Operator ADD expects 16 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]+(memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2))\n^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:329: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]+(memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2))\n                                                                               ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:329: Operator ADD expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]+(memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2))\n                                                                                                                             ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:329: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]+(memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2))\n                                                                                                                                                                     ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:329: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]+(memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2))\n                                                                                                                                                                                                                   ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:329: Operator ADD expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]+(memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2))\n                                                                                                                                                                                                                                                               ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:329: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]+(memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2))\n                                                                                                                                                                                                                                                                                                       ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:330: Operator ADD expects 16 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+(memory[crnt_Star_addr-FRAME_WIDTH_3-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_3-3]+(memory[crnt_Star_addr-FRAME_WIDTH_3-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_3-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]<<2))\n^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:330: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+(memory[crnt_Star_addr-FRAME_WIDTH_3-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_3-3]+(memory[crnt_Star_addr-FRAME_WIDTH_3-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_3-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]<<2))\n                                                                               ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:330: Operator ADD expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+(memory[crnt_Star_addr-FRAME_WIDTH_3-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_3-3]+(memory[crnt_Star_addr-FRAME_WIDTH_3-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_3-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]<<2))\n                                                                                                                             ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:330: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+(memory[crnt_Star_addr-FRAME_WIDTH_3-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_3-3]+(memory[crnt_Star_addr-FRAME_WIDTH_3-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_3-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]<<2))\n                                                                                                                                                                     ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:330: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+(memory[crnt_Star_addr-FRAME_WIDTH_3-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_3-3]+(memory[crnt_Star_addr-FRAME_WIDTH_3-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_3-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]<<2))\n                                                                                                                                                                                                                   ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:330: Operator ADD expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+(memory[crnt_Star_addr-FRAME_WIDTH_3-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_3-3]+(memory[crnt_Star_addr-FRAME_WIDTH_3-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_3-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]<<2))\n                                                                                                                                                                                                                                                               ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:330: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+(memory[crnt_Star_addr-FRAME_WIDTH_3-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_3-3]+(memory[crnt_Star_addr-FRAME_WIDTH_3-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_3-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]<<2))\n                                                                                                                                                                                                                                                                                                       ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:331: Operator ADD expects 16 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_4-3]+(memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<2))\n^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:331: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_4-3]+(memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<2))\n                                                                               ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:331: Operator ADD expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_4-3]+(memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<2))\n                                                                                                                             ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:331: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_4-3]+(memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<2))\n                                                                                                                                                                     ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:331: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_4-3]+(memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<2))\n                                                                                                                                                                                                                   ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:331: Operator ADD expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_4-3]+(memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<2))\n                                                                                                                                                                                                                                                               ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:331: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_4-3]+(memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<2))\n                                                                                                                                                                                                                                                                                                       ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:332: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_5-2]<<2)+ (memory[crnt_Star_addr-FRAME_WIDTH_5-3]+(memory[crnt_Star_addr-FRAME_WIDTH_5-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_5-4]<<2);\n                                        ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:332: Operator ADD expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_5-2]<<2)+ (memory[crnt_Star_addr-FRAME_WIDTH_5-3]+(memory[crnt_Star_addr-FRAME_WIDTH_5-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_5-4]<<2);\n                                                                                     ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:332: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_5-2]<<2)+ (memory[crnt_Star_addr-FRAME_WIDTH_5-3]+(memory[crnt_Star_addr-FRAME_WIDTH_5-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_5-4]<<2);\n                                                                                                                             ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:332: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_5-2]<<2)+ (memory[crnt_Star_addr-FRAME_WIDTH_5-3]+(memory[crnt_Star_addr-FRAME_WIDTH_5-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_5-4]<<2);\n                                                                                                                                                                           ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:334: Operator ADD expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign y_weighted_sum  = (memory[crnt_Star_addr-FRAME_WIDTH_1-2]+(memory[crnt_Star_addr-FRAME_WIDTH_1-2] << 2))+ ( memory[crnt_Star_addr-FRAME_WIDTH_1-3]+(memory[crnt_Star_addr-FRAME_WIDTH_1-3] << 2))+ (memory[crnt_Star_addr-FRAME_WIDTH_1-4]+(memory[crnt_Star_addr-FRAME_WIDTH_1-4]<<2))\n                                                                ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:334: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign y_weighted_sum  = (memory[crnt_Star_addr-FRAME_WIDTH_1-2]+(memory[crnt_Star_addr-FRAME_WIDTH_1-2] << 2))+ ( memory[crnt_Star_addr-FRAME_WIDTH_1-3]+(memory[crnt_Star_addr-FRAME_WIDTH_1-3] << 2))+ (memory[crnt_Star_addr-FRAME_WIDTH_1-4]+(memory[crnt_Star_addr-FRAME_WIDTH_1-4]<<2))\n                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:334: Operator ADD expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign y_weighted_sum  = (memory[crnt_Star_addr-FRAME_WIDTH_1-2]+(memory[crnt_Star_addr-FRAME_WIDTH_1-2] << 2))+ ( memory[crnt_Star_addr-FRAME_WIDTH_1-3]+(memory[crnt_Star_addr-FRAME_WIDTH_1-3] << 2))+ (memory[crnt_Star_addr-FRAME_WIDTH_1-4]+(memory[crnt_Star_addr-FRAME_WIDTH_1-4]<<2))\n                                                                                                                                                         ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:334: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign y_weighted_sum  = (memory[crnt_Star_addr-FRAME_WIDTH_1-2]+(memory[crnt_Star_addr-FRAME_WIDTH_1-2] << 2))+ ( memory[crnt_Star_addr-FRAME_WIDTH_1-3]+(memory[crnt_Star_addr-FRAME_WIDTH_1-3] << 2))+ (memory[crnt_Star_addr-FRAME_WIDTH_1-4]+(memory[crnt_Star_addr-FRAME_WIDTH_1-4]<<2))\n                                                                                                                                                                                                  ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:334: Operator ADD expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign y_weighted_sum  = (memory[crnt_Star_addr-FRAME_WIDTH_1-2]+(memory[crnt_Star_addr-FRAME_WIDTH_1-2] << 2))+ ( memory[crnt_Star_addr-FRAME_WIDTH_1-3]+(memory[crnt_Star_addr-FRAME_WIDTH_1-3] << 2))+ (memory[crnt_Star_addr-FRAME_WIDTH_1-4]+(memory[crnt_Star_addr-FRAME_WIDTH_1-4]<<2))\n                                                                                                                                                                                                                                                 ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:334: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\nassign y_weighted_sum  = (memory[crnt_Star_addr-FRAME_WIDTH_1-2]+(memory[crnt_Star_addr-FRAME_WIDTH_1-2] << 2))+ ( memory[crnt_Star_addr-FRAME_WIDTH_1-3]+(memory[crnt_Star_addr-FRAME_WIDTH_1-3] << 2))+ (memory[crnt_Star_addr-FRAME_WIDTH_1-4]+(memory[crnt_Star_addr-FRAME_WIDTH_1-4]<<2))\n                                                                                                                                                                                                                                                                                         ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:335: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_2-1]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<2)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<2)+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2)\n                                        ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:335: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_2-1]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<2)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<2)+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2)\n                                                                                    ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:335: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_2-1]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<2)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<2)+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2)\n                                                                                                                                  ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:335: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_2-1]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<2)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<2)+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2)\n                                                                                                                                                                               ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:335: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_2-1]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<2)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<2)+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2)\n                                                                                                                                                                                                                           ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:336: Operator ADD expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:336: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:337: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_4-1]<<1)+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ (memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1)+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<1)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<1)\n                                        ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:337: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_4-1]<<1)+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ (memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1)+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<1)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<1)\n                                                                                    ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:337: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_4-1]<<1)+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ (memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1)+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<1)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<1)\n                                                                                                                                 ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:337: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_4-1]<<1)+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ (memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1)+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<1)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<1)\n                                                                                                                                                                              ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:337: Operator SHIFTL expects 16 bits on the LHS, but LHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_4-1]<<1)+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ (memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1)+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<1)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<1)\n                                                                                                                                                                                                                          ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:338: Operator ADD expects 16 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_5-2]   )+(memory[crnt_Star_addr-FRAME_WIDTH_5-3]   )+ (memory[crnt_Star_addr-FRAME_WIDTH_5-4]   );\n^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:338: Operator ADD expects 16 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_5-2]   )+(memory[crnt_Star_addr-FRAME_WIDTH_5-3]   )+ (memory[crnt_Star_addr-FRAME_WIDTH_5-4]   );\n                                            ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:338: Operator ADD expects 16 bits on the RHS, but RHS\'s ARRAYSEL generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n+(memory[crnt_Star_addr-FRAME_WIDTH_5-2]   )+(memory[crnt_Star_addr-FRAME_WIDTH_5-3]   )+ (memory[crnt_Star_addr-FRAME_WIDTH_5-4]   );\n                                                                                        ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:352: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n        if(memory[crnt_Star_addr ] > 1)\n                 ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:354: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n        if (memory[crnt_Star_addr]>2)\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:356: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n        if (memory[crnt_Star_addr]>4)\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:358: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n        if (memory[crnt_Star_addr]>8)\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:360: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n        if (memory[crnt_Star_addr]>16)\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:362: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n        if (memory[crnt_Star_addr]>32)\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:364: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n        if (memory[crnt_Star_addr]>64)\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:366: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n        if (memory[crnt_Star_addr]>128)\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:368: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n        if (memory[crnt_Star_addr]>256)\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:370: Bit extraction of array[8959:0] requires 14 bit index, not 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n        if (memory[crnt_Star_addr]>512)\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:396: Operator ASSIGN expects 10 bits on the Assign RHS, but Assign RHS\'s ADD generates 14 bits.\n                                                                                    : ... In instance Star_Extract_IP\n          background_mean_21 =( background_sum)+( background_sum >>2)  +( background_sum >>4);\n                             ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:402: Operator ASSIGN expects 10 bits on the Assign RHS, but Assign RHS\'s SUB generates 14 bits.\n                                                                                    : ... In instance Star_Extract_IP\n          background_mean_63 =( background_sum <<2)- ( background_sum>> 4);\n                             ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:423: Operator ASSIGNDLY expects 10 bits on the Assign RHS, but Assign RHS\'s SUB generates 32 or 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n            din <= rowNumber -6 ; \n                ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:429: Operator ASSIGNDLY expects 10 bits on the Assign RHS, but Assign RHS\'s SUB generates 32 or 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n            din <= colNumber -6 ; \n                ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:437: Operator SUB expects 16 bits on the RHS, but RHS\'s VARREF \'background_mean_63\' generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n           din <= y_weighted_sum - background_mean_63;\n                                 ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:437: Operator ASSIGNDLY expects 10 bits on the Assign RHS, but Assign RHS\'s SUB generates 16 bits.\n                                                                                    : ... In instance Star_Extract_IP\n           din <= y_weighted_sum - background_mean_63;\n               ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:436: Operator GT expects 16 bits on the RHS, but RHS\'s VARREF \'background_mean_63\' generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n         if(y_weighted_sum > background_mean_63)\n                           ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:448: Operator SUB expects 16 bits on the RHS, but RHS\'s VARREF \'background_mean_63\' generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n           din <= x_weighted_sum - background_mean_63;\n                                 ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:448: Operator ASSIGNDLY expects 10 bits on the Assign RHS, but Assign RHS\'s SUB generates 16 bits.\n                                                                                    : ... In instance Star_Extract_IP\n           din <= x_weighted_sum - background_mean_63;\n               ^~\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:447: Operator GT expects 16 bits on the RHS, but RHS\'s VARREF \'background_mean_63\' generates 10 bits.\n                                                                                    : ... In instance Star_Extract_IP\n          if(x_weighted_sum > background_mean_63)\n                            ^\n%Warning-WIDTH: data/full_repos/permissive/152455180/Star_Extract_IP_head_tail.v:456: Operator ASSIGNDLY expects 10 bits on the Assign RHS, but Assign RHS\'s VARREF \'centroid_sum\' generates 15 bits.\n                                                                                    : ... In instance Star_Extract_IP\n           din <= centroid_sum    ; \n               ^~\n%Error: Exiting due to 1 error(s), 115 warning(s)\n'
module Star_Extract_IP#(parameter FRAME_WIDTH  = 1280,parameter FRAME_HEIGHT = 1024)
(

    input rst,


	input IMG_CLK_OUT    ,


	input [9:0] IMG_DOUT ,
	input IMG_FRAME_VAL  ,


	input IMG_LINE_VAL  ,

	

	output reg   we  ,
	reg    [ 9:0]din ,
	output [17:0]addr,
	output   sample_clk,


	
	output [0:0]LED 					,
	output reg finish_star_extract_IP	,
	output reg [2:0] IMG_TRIG,
	input [1:0] IMG_MON 
	
    
); 


wire  clk;
wire  clk_shift_270;
wire locked;
reg running = 0;
clk_wiz_0 clk_wiz_0
(

	.clk_out1(clk),
	.clk_out2(clk_shift_270),
	.clk_out3(sample_clk),

	.clk_in1(IMG_CLK_OUT),

	.locked(locked) 
	
);  
always @(posedge clk && locked)
begin 
	running = 1;



end 

reg   [31:0]frame_addr=0, start_addr=0;
wire  [31:0]end_addr;



reg   frame_val_temp, frame_val_temp2;
reg   done=0, trigger_run=0;
 


parameter    streamPieces    = 1018;
parameter   IMG_STREAM_PIECE = 8960;
parameter FRAMEWIDTH_2 =2560;
parameter FRAMEWIDTH_3 =3840,FRAMEWIDTH_4 =5120  ; 
parameter FRAMEWIDTH_5 =6400,FRAMEWIDTH_6 =7680   ; 

reg   [9 :0] memory[IMG_STREAM_PIECE-1:0];
reg   [14:0]addr_DM   = 0;
reg   [20:0]addr_Img  = 0;
reg   [14:0]rowNumber = 0;
reg   [14:0]colNumber = 0;
reg   [14:0] headPointer = 0;
reg   [14:0]tailPointer  = 0;
reg   firstPartOfImage   = 1;

wire   transferFromCamera   ;
assign transferFromCamera   =  running&IMG_FRAME_VAL & IMG_LINE_VAL ;


reg [14:0]FRAME_WIDTH_1  ,FRAME_WIDTH_2  ,FRAME_WIDTH_3  ;
reg [14:0]FRAME_WIDTH_4  ,FRAME_WIDTH_5  ,FRAME_WIDTH_6  ; 


always @(posedge clk_shift_270 && locked )
begin 
	
	if (transferFromCamera)
		begin
		    if(addr_Img == (FRAME_HEIGHT*FRAME_WIDTH)-1)
			    	  firstPartOfImage <=1;
	        else 
			   begin 
			   
			     if (addr_DM == IMG_STREAM_PIECE)
			        begin 
						memory[0]          <= IMG_DOUT;					
         				addr_DM            <= 1;
					    firstPartOfImage   <= 0;
				 	   
				    end
				 else 
				    begin 
						memory[addr_DM]   <= IMG_DOUT;
						addr_DM <= addr_DM  + 1;
					end 
					
				addr_Img <= addr_Img + 1;					 
                
                if(colNumber == FRAME_WIDTH-1)
					 colNumber=0;
				else 
                     colNumber<= colNumber + 1;
					 



				if(!firstPartOfImage)
                    begin				


					if(addr_DM==IMG_STREAM_PIECE)
					 begin 
					 headPointer <= FRAME_WIDTH ;tailPointer <=0;rowNumber<= rowNumber+1;   
					 end	
					if(addr_DM==FRAME_WIDTH)
					 begin 
					 headPointer <= FRAMEWIDTH_2 ;tailPointer <=FRAME_WIDTH;rowNumber<= rowNumber+1;   
					 end		
					if(addr_DM==FRAMEWIDTH_2)
					 begin 
					 headPointer <= FRAMEWIDTH_3 ;tailPointer <=FRAMEWIDTH_2;rowNumber<= rowNumber+1;   
					 end
					if(addr_DM==FRAMEWIDTH_3)
					 begin 
					 headPointer <= FRAMEWIDTH_4 ;tailPointer <=FRAMEWIDTH_3;rowNumber<= rowNumber+1;   
					 end
					if(addr_DM==FRAMEWIDTH_4)
					 begin 
					 headPointer <= FRAMEWIDTH_5 ;tailPointer <=FRAMEWIDTH_4;rowNumber<= rowNumber+1;   
					 end 
					if(addr_DM==FRAMEWIDTH_5)
					 begin 
					 headPointer <= FRAMEWIDTH_6 ;tailPointer <=FRAMEWIDTH_5;rowNumber<= rowNumber+1;   
					 end
					if(addr_DM==FRAMEWIDTH_6)
					 begin 
					 headPointer <= 0            ;tailPointer <=FRAMEWIDTH_6;rowNumber<= rowNumber+1;   
					 end
                    end	
				else 
				begin 
						if(addr_DM==FRAME_WIDTH)
							rowNumber <= 1;						
						else 
						begin 
							if(addr_DM==FRAMEWIDTH_2)
								rowNumber <= 2;
							else 
							begin 
								if(addr_DM==FRAMEWIDTH_3)
									rowNumber <= 3;
								else
								begin
									if(addr_DM==FRAMEWIDTH_4)
										rowNumber <= 4;
									else
									begin
										
										if(addr_DM==FRAMEWIDTH_5)
											rowNumber <= 5;
										else
										begin 
											if(addr_DM==FRAMEWIDTH_6)
												rowNumber <= 6;
											else
											begin 
												if(addr_DM==IMG_STREAM_PIECE)
													rowNumber <= 7;
											end
										end 								
									end 
								end 
							end
						end 
			    end
			



				if (rowNumber>=6 & colNumber>=6)
				begin 					 		

					if(addr_DM<FRAMEWIDTH_3) 
								FRAME_WIDTH_3<=FRAMEWIDTH_3-IMG_STREAM_PIECE;
					else 
									FRAME_WIDTH_3 <=3840;		

					if(addr_DM<FRAMEWIDTH_4) 
							 		FRAME_WIDTH_4<=FRAMEWIDTH_4-IMG_STREAM_PIECE;	
					else 
									FRAME_WIDTH_4 <=5120;

					if(addr_DM<FRAMEWIDTH_2) 
									FRAME_WIDTH_2<=FRAMEWIDTH_2-IMG_STREAM_PIECE;	
					else 
									FRAME_WIDTH_2 <=2560;

					if(addr_DM<FRAMEWIDTH_5) 
									FRAME_WIDTH_5<=FRAMEWIDTH_5-IMG_STREAM_PIECE;	
					else 
									FRAME_WIDTH_5 <=6400;
					
					if(addr_DM<FRAMEWIDTH_6) 
									FRAME_WIDTH_6<=FRAMEWIDTH_6-IMG_STREAM_PIECE;	
					else 
									FRAME_WIDTH_6 <=7680;
					
					if(addr_DM<FRAME_WIDTH) 
									FRAME_WIDTH_1<=FRAME_WIDTH-IMG_STREAM_PIECE;	
					else 
									FRAME_WIDTH_1 <=1280;
				end 
				
			end
		end	
end		
 



reg  [9:0]cutoff_Brightness = 100 ;
reg  [9:0]brightCounts[9:0];
reg [9:0] num_bright_areas = 0;

reg [9:0] background_mean_21,background_mean_63 ;
reg getaddrPhase=0;


reg [17:0] addr_write_to_Stars_blkRAM = 0;
reg  update_stars;
reg [2:0]index;



assign   addr          = addr_write_to_Stars_blkRAM;
                         
                        
                        
wire  [14:0]crnt_Star_addr   ;
assign  crnt_Star_addr = addr_DM;

wire  [9:0] center,above,below,right,left;
wire [14:0]aboveAddr = crnt_Star_addr-FRAME_WIDTH_4-3;
wire [14:0]belowAddr = crnt_Star_addr-FRAME_WIDTH_2-3;
wire [14:0]centerAddr = crnt_Star_addr-FRAME_WIDTH_2;
assign	center= memory[centerAddr];
assign above  = memory[aboveAddr];
assign below  = memory[belowAddr];
assign left   = memory[crnt_Star_addr-FRAME_WIDTH_3-4];
assign right  = memory[crnt_Star_addr-FRAME_WIDTH_3-2];


wire [13:0]background_sum ;

assign background_sum = memory[crnt_Star_addr-2]+ memory[crnt_Star_addr-3]+memory[crnt_Star_addr-4]
+ memory[crnt_Star_addr-FRAME_WIDTH_1-1]+memory[crnt_Star_addr-FRAME_WIDTH_1-5]
+ memory[crnt_Star_addr-FRAME_WIDTH_2]+memory[crnt_Star_addr-FRAME_WIDTH_2-6]
+ memory[crnt_Star_addr-FRAME_WIDTH_3]+memory[crnt_Star_addr-FRAME_WIDTH_3-6]
+ memory[crnt_Star_addr-FRAME_WIDTH_4]+memory[crnt_Star_addr-FRAME_WIDTH_4-6]
+ memory[crnt_Star_addr-FRAME_WIDTH_5-1]+memory[crnt_Star_addr-FRAME_WIDTH_5-5]
+  memory[crnt_Star_addr-FRAME_WIDTH_6-2]+ memory[crnt_Star_addr-FRAME_WIDTH_6-3]+ memory[crnt_Star_addr-FRAME_WIDTH_6-4];

wire [14:0]centroid_sum   ;

assign centroid_sum  = memory[crnt_Star_addr-FRAME_WIDTH_1-2]+ memory[crnt_Star_addr-FRAME_WIDTH_1-3]+ memory[crnt_Star_addr-FRAME_WIDTH_1-4]
+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+memory[crnt_Star_addr-FRAME_WIDTH_2-2]+ memory[crnt_Star_addr-FRAME_WIDTH_2-3]+ memory[crnt_Star_addr-FRAME_WIDTH_2-4]+memory[crnt_Star_addr-FRAME_WIDTH_2-5]
+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+memory[crnt_Star_addr-FRAME_WIDTH_3-2]+ memory[crnt_Star_addr-FRAME_WIDTH_3-3]+ memory[crnt_Star_addr-FRAME_WIDTH_3-4]+memory[crnt_Star_addr-FRAME_WIDTH_3-5]
+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+memory[crnt_Star_addr-FRAME_WIDTH_4-2]+ memory[crnt_Star_addr-FRAME_WIDTH_4-3]+ memory[crnt_Star_addr-FRAME_WIDTH_4-4]+memory[crnt_Star_addr-FRAME_WIDTH_4-5]
+memory[crnt_Star_addr-FRAME_WIDTH_5-2]+ memory[crnt_Star_addr-FRAME_WIDTH_5-3]+ memory[crnt_Star_addr-FRAME_WIDTH_5-4];

wire [15:0]x_weighted_sum ;
wire [15:0]y_weighted_sum ;


assign x_weighted_sum  = (memory[crnt_Star_addr-FRAME_WIDTH_1-2] << 1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_1-3]+(memory[crnt_Star_addr-FRAME_WIDTH_1-3] << 1))+ (memory[crnt_Star_addr-FRAME_WIDTH_1-4]<<2)
+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]+(memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2))
+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+(memory[crnt_Star_addr-FRAME_WIDTH_3-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_3-3]+(memory[crnt_Star_addr-FRAME_WIDTH_3-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_3-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]<<2))
+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_4-3]+(memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<2))
+(memory[crnt_Star_addr-FRAME_WIDTH_5-2]<<2)+ (memory[crnt_Star_addr-FRAME_WIDTH_5-3]+(memory[crnt_Star_addr-FRAME_WIDTH_5-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_5-4]<<2);

assign	y_weighted_sum  = (memory[crnt_Star_addr-FRAME_WIDTH_1-2]+(memory[crnt_Star_addr-FRAME_WIDTH_1-2] << 2))+ ( memory[crnt_Star_addr-FRAME_WIDTH_1-3]+(memory[crnt_Star_addr-FRAME_WIDTH_1-3] << 2))+ (memory[crnt_Star_addr-FRAME_WIDTH_1-4]+(memory[crnt_Star_addr-FRAME_WIDTH_1-4]<<2))
+(memory[crnt_Star_addr-FRAME_WIDTH_2-1]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<2)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<2)+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2)
+(memory[crnt_Star_addr-FRAME_WIDTH_3-1]+(memory[crnt_Star_addr-FRAME_WIDTH_3-1]<<1))+(memory[crnt_Star_addr-FRAME_WIDTH_3-2]+(memory[crnt_Star_addr-FRAME_WIDTH_3-2]<<1))+ ( memory[crnt_Star_addr-FRAME_WIDTH_3-3]+(memory[crnt_Star_addr-FRAME_WIDTH_3-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_3-4]+(memory[crnt_Star_addr-FRAME_WIDTH_3-4]<<1))+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]<<1))
+(memory[crnt_Star_addr-FRAME_WIDTH_4-1]<<1)+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ (memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1)+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<1)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<1)
+(memory[crnt_Star_addr-FRAME_WIDTH_5-2]   )+(memory[crnt_Star_addr-FRAME_WIDTH_5-3]   )+ (memory[crnt_Star_addr-FRAME_WIDTH_5-4]   );
										
										
										

always @(posedge sample_clk && locked)
begin
    if (rowNumber>=6 & colNumber>=6)
	    begin
            begin
				if(!update_stars )
				 begin
				   
						  
							 if(memory[crnt_Star_addr ] > 1)
							   brightCounts[0]<=brightCounts[0]+1;
							 if (memory[crnt_Star_addr]>2)
							   brightCounts[1]<=brightCounts[1]+1;
							 if (memory[crnt_Star_addr]>4)
							   brightCounts[2]<=brightCounts[2]+1;
							 if (memory[crnt_Star_addr]>8)
							   brightCounts[3]<=brightCounts[3]+1;
							 if (memory[crnt_Star_addr]>16)
							   brightCounts[4]<=brightCounts[4]+1;
							 if (memory[crnt_Star_addr]>32)
							   brightCounts[5]<=brightCounts[5]+1;
							 if (memory[crnt_Star_addr]>64)
							   brightCounts[6]<=brightCounts[6]+1;
							 if (memory[crnt_Star_addr]>128)
							   brightCounts[7]<=brightCounts[7]+1;
							 if (memory[crnt_Star_addr]>256)
							   brightCounts[8]<=brightCounts[8]+1;
							 if (memory[crnt_Star_addr]>512)
							   brightCounts[9]<=brightCounts[9]+1;
							  


							
							 
						
							 if( center > cutoff_Brightness)
							    begin

								  
							    if( above >cutoff_Brightness | below >cutoff_Brightness | right > cutoff_Brightness | left > cutoff_Brightness)

								    if( (center >= left & center >= above & center < below & center <right ))
									  begin
									  	num_bright_areas       <= num_bright_areas+1;													 									    									    




										

										background_mean_21 =( background_sum)+( background_sum >>2)  +( background_sum >>4);
										

										background_mean_63 =( background_sum <<2)- ( background_sum>> 4);
										

										 update_stars <= 1;
									   
								     end
								 end
							  							 							                          							

  						  							 
					  end
				else
                    begin
					   if(getaddrPhase)
					    begin
						  we           <= 1;getaddrPhase <= 0;
						end 
					   else 
					    begin 
                             if(index== 0)
							   begin 
							     din <= rowNumber -6 ;
							     addr_write_to_Stars_blkRAM <= addr_write_to_Stars_blkRAM + 1;
							     index <= 1 ;
							   end 
							 else if(index == 1)
							   begin 
							     din <= colNumber -6 ;
							     addr_write_to_Stars_blkRAM <= addr_write_to_Stars_blkRAM + 1;
								 index <= 2 ;
							   end
							  else if(index == 2) 
							     begin 

									if(y_weighted_sum > background_mean_63)
											din <= y_weighted_sum - background_mean_63;
									else 
											din <= 0;
							         addr_write_to_Stars_blkRAM <= addr_write_to_Stars_blkRAM + 1;
								     index <= 3 ;
								 end 
								 
							  else if(index == 3)
							     begin

										if(x_weighted_sum > background_mean_63)
											din <= x_weighted_sum - background_mean_63;
										else 
											din <= 0;
										addr_write_to_Stars_blkRAM <= addr_write_to_Stars_blkRAM + 1;
										index <= 4 ;
								 end  
						      else if(index == 4)
							     begin 
								   din <= centroid_sum    ;
							       addr_write_to_Stars_blkRAM <= addr_write_to_Stars_blkRAM + 1;
								   index <= 0 ;
								   update_stars <= 0;
								   
								 end  
							   
						end 
					end
		 
                end
            end 
  		
 end 


always @( posedge IMG_CLK_OUT)
begin 
	if (rst)
	  begin	
	
	addr_DM <= 0;
		addr_Img<= 0;
		firstPartOfImage   <= 1;
		rowNumber  <= 0; colNumber   <= 0;
		headPointer<= 0; tailPointer <= FRAME_WIDTH_6;
  

		brightCounts[0] <= 0;brightCounts[1] <= 0;brightCounts[2] <= 0;
		brightCounts[3] <= 0;brightCounts[4] <= 0;brightCounts[5] <= 0;
		brightCounts[6] <= 0;brightCounts[7] <= 0;brightCounts[8] <= 0;
		brightCounts[9] <= 0;
        num_bright_areas <= 0;		
		addr_write_to_Stars_blkRAM <= 0;
 		getaddrPhase               <= 1;
		update_stars               <= 0;
		index                      <= 0;
		FRAME_WIDTH_1 <=1280;
		FRAME_WIDTH_2 <=2560;
		FRAME_WIDTH_3 <=3840;
		FRAME_WIDTH_4 <=5120;
		FRAME_WIDTH_5 <=6400;
		FRAME_WIDTH_6 <=7680; 
		din           <=   0;
		background_mean_21<=0;
		background_mean_63<=0;
	end	
  
  
end

endmodule
module Star_Extract_IP#(parameter FRAME_WIDTH  = 1280,parameter FRAME_HEIGHT = 1024)
(

    input rst,


	input IMG_CLK_OUT    ,


	input [9:0] IMG_DOUT ,
	input IMG_FRAME_VAL  ,


	input IMG_LINE_VAL  ,

	

	output reg   we  ,
	reg    [ 9:0]din ,
	output [17:0]addr,
	output   sample_clk,


	
	output [0:0]LED 					,
	output reg finish_star_extract_IP	,
	output reg [2:0] IMG_TRIG,
	input [1:0] IMG_MON 
	
    
);
 


wire  clk;
wire  clk_shift_270;
wire locked;
reg running = 0;
clk_wiz_0 clk_wiz_0
(

	.clk_out1(clk),
	.clk_out2(clk_shift_270),
	.clk_out3(sample_clk),

	.clk_in1(IMG_CLK_OUT),

	.locked(locked) 
	
);  
always @(posedge clk && locked)
begin 
	running = 1;



end 

reg   [31:0]frame_addr=0, start_addr=0;
wire  [31:0]end_addr;



reg   frame_val_temp, frame_val_temp2;
reg   done=0, trigger_run=0;
 


parameter    streamPieces    = 1018;
parameter   IMG_STREAM_PIECE = 8960;
parameter FRAMEWIDTH_2 =2560;
parameter FRAMEWIDTH_3 =3840,FRAMEWIDTH_4 =5120  ; 
parameter FRAMEWIDTH_5 =6400,FRAMEWIDTH_6 =7680   ; 

reg   [9 :0] memory[IMG_STREAM_PIECE-1:0];
reg   [14:0]addr_DM   = 0;
reg   [20:0]addr_Img  = 0;
reg   [14:0]rowNumber = 0;
reg   [14:0]colNumber = 0;
reg   [14:0] headPointer = 0;
reg   [14:0]tailPointer  = 0;
reg   firstPartOfImage   = 1;

wire   transferFromCamera   ;
assign transferFromCamera   =  running&IMG_FRAME_VAL & IMG_LINE_VAL ;


reg [14:0]FRAME_WIDTH_1  ,FRAME_WIDTH_2  ,FRAME_WIDTH_3  ;
reg [14:0]FRAME_WIDTH_4  ,FRAME_WIDTH_5  ,FRAME_WIDTH_6  ; 


always @(posedge clk_shift_270 && locked )
begin 
	
	if (transferFromCamera)
		begin
		    if(addr_Img == (FRAME_HEIGHT*FRAME_WIDTH)-1)
			    	  firstPartOfImage <=1;
	        else 
			   begin 
			   
			     if (addr_DM == IMG_STREAM_PIECE)
			        begin 
						memory[0]          <= IMG_DOUT;					
         				addr_DM            <= 1;
					    firstPartOfImage   <= 0;
				 	   
				    end
				 else 
				    begin 
						memory[addr_DM]   <= IMG_DOUT;
						addr_DM <= addr_DM  + 1;
					end 
					
				addr_Img <= addr_Img + 1;					 
                
                if(colNumber == FRAME_WIDTH-1)
					 colNumber=0;
				else 
                     colNumber<= colNumber + 1;
					 



				if(!firstPartOfImage)
                    begin				


					if(addr_DM==IMG_STREAM_PIECE)
					 begin 
					 headPointer <= FRAME_WIDTH ;tailPointer <=0;rowNumber<= rowNumber+1;   
					 end	
					if(addr_DM==FRAME_WIDTH)
					 begin 
					 headPointer <= FRAMEWIDTH_2 ;tailPointer <=FRAME_WIDTH;rowNumber<= rowNumber+1;   
					 end		
					if(addr_DM==FRAMEWIDTH_2)
					 begin 
					 headPointer <= FRAMEWIDTH_3 ;tailPointer <=FRAMEWIDTH_2;rowNumber<= rowNumber+1;   
					 end
					if(addr_DM==FRAMEWIDTH_3)
					 begin 
					 headPointer <= FRAMEWIDTH_4 ;tailPointer <=FRAMEWIDTH_3;rowNumber<= rowNumber+1;   
					 end
					if(addr_DM==FRAMEWIDTH_4)
					 begin 
					 headPointer <= FRAMEWIDTH_5 ;tailPointer <=FRAMEWIDTH_4;rowNumber<= rowNumber+1;   
					 end 
					if(addr_DM==FRAMEWIDTH_5)
					 begin 
					 headPointer <= FRAMEWIDTH_6 ;tailPointer <=FRAMEWIDTH_5;rowNumber<= rowNumber+1;   
					 end
					if(addr_DM==FRAMEWIDTH_6)
					 begin 
					 headPointer <= 0            ;tailPointer <=FRAMEWIDTH_6;rowNumber<= rowNumber+1;   
					 end
                    end	
				else 
				begin 
						if(addr_DM==FRAME_WIDTH)
							rowNumber <= 1;						
						else 
						begin 
							if(addr_DM==FRAMEWIDTH_2)
								rowNumber <= 2;
							else 
							begin 
								if(addr_DM==FRAMEWIDTH_3)
									rowNumber <= 3;
								else
								begin
									if(addr_DM==FRAMEWIDTH_4)
										rowNumber <= 4;
									else
									begin
										
										if(addr_DM==FRAMEWIDTH_5)
											rowNumber <= 5;
										else
										begin 
											if(addr_DM==FRAMEWIDTH_6)
												rowNumber <= 6;
											else
											begin 
												if(addr_DM==IMG_STREAM_PIECE)
													rowNumber <= 7;
											end
										end 								
									end 
								end 
							end
						end 
			    end
			



				if (rowNumber>=6 & colNumber>=6)
				begin 					 		

					if(addr_DM<FRAMEWIDTH_3) 
								FRAME_WIDTH_3<=FRAMEWIDTH_3-IMG_STREAM_PIECE;
					else 
									FRAME_WIDTH_3 <=3840;		

					if(addr_DM<FRAMEWIDTH_4) 
							 		FRAME_WIDTH_4<=FRAMEWIDTH_4-IMG_STREAM_PIECE;	
					else 
									FRAME_WIDTH_4 <=5120;

					if(addr_DM<FRAMEWIDTH_2) 
									FRAME_WIDTH_2<=FRAMEWIDTH_2-IMG_STREAM_PIECE;	
					else 
									FRAME_WIDTH_2 <=2560;

					if(addr_DM<FRAMEWIDTH_5) 
									FRAME_WIDTH_5<=FRAMEWIDTH_5-IMG_STREAM_PIECE;	
					else 
									FRAME_WIDTH_5 <=6400;
					
					if(addr_DM<FRAMEWIDTH_6) 
									FRAME_WIDTH_6<=FRAMEWIDTH_6-IMG_STREAM_PIECE;	
					else 
									FRAME_WIDTH_6 <=7680;
					
					if(addr_DM<FRAME_WIDTH) 
									FRAME_WIDTH_1<=FRAME_WIDTH-IMG_STREAM_PIECE;	
					else 
									FRAME_WIDTH_1 <=1280;
				end 
				
			end
		end	
end		
 



reg  [9:0]cutoff_Brightness = 100 ;
reg  [9:0]brightCounts[9:0];
reg [9:0] num_bright_areas = 0;

reg [9:0] background_mean_21,background_mean_63 ;
reg getaddrPhase=0;


reg [17:0] addr_write_to_Stars_blkRAM = 0;
reg  update_stars;
reg [2:0]index;



assign   addr          = addr_write_to_Stars_blkRAM;
                         
                        
                        
wire  [14:0]crnt_Star_addr   ;
assign  crnt_Star_addr = addr_DM;

wire  [9:0] center,above,below,right,left;
wire [14:0]aboveAddr = crnt_Star_addr-FRAME_WIDTH_4-3;
wire [14:0]belowAddr = crnt_Star_addr-FRAME_WIDTH_2-3;
wire [14:0]centerAddr = crnt_Star_addr-FRAME_WIDTH_2;
assign	center= memory[centerAddr];
assign above  = memory[aboveAddr];
assign below  = memory[belowAddr];
assign left   = memory[crnt_Star_addr-FRAME_WIDTH_3-4];
assign right  = memory[crnt_Star_addr-FRAME_WIDTH_3-2];


wire [13:0]background_sum ;

assign background_sum = memory[crnt_Star_addr-2]+ memory[crnt_Star_addr-3]+memory[crnt_Star_addr-4]
+ memory[crnt_Star_addr-FRAME_WIDTH_1-1]+memory[crnt_Star_addr-FRAME_WIDTH_1-5]
+ memory[crnt_Star_addr-FRAME_WIDTH_2]+memory[crnt_Star_addr-FRAME_WIDTH_2-6]
+ memory[crnt_Star_addr-FRAME_WIDTH_3]+memory[crnt_Star_addr-FRAME_WIDTH_3-6]
+ memory[crnt_Star_addr-FRAME_WIDTH_4]+memory[crnt_Star_addr-FRAME_WIDTH_4-6]
+ memory[crnt_Star_addr-FRAME_WIDTH_5-1]+memory[crnt_Star_addr-FRAME_WIDTH_5-5]
+  memory[crnt_Star_addr-FRAME_WIDTH_6-2]+ memory[crnt_Star_addr-FRAME_WIDTH_6-3]+ memory[crnt_Star_addr-FRAME_WIDTH_6-4];

wire [14:0]centroid_sum   ;

assign centroid_sum  = memory[crnt_Star_addr-FRAME_WIDTH_1-2]+ memory[crnt_Star_addr-FRAME_WIDTH_1-3]+ memory[crnt_Star_addr-FRAME_WIDTH_1-4]
+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+memory[crnt_Star_addr-FRAME_WIDTH_2-2]+ memory[crnt_Star_addr-FRAME_WIDTH_2-3]+ memory[crnt_Star_addr-FRAME_WIDTH_2-4]+memory[crnt_Star_addr-FRAME_WIDTH_2-5]
+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+memory[crnt_Star_addr-FRAME_WIDTH_3-2]+ memory[crnt_Star_addr-FRAME_WIDTH_3-3]+ memory[crnt_Star_addr-FRAME_WIDTH_3-4]+memory[crnt_Star_addr-FRAME_WIDTH_3-5]
+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+memory[crnt_Star_addr-FRAME_WIDTH_4-2]+ memory[crnt_Star_addr-FRAME_WIDTH_4-3]+ memory[crnt_Star_addr-FRAME_WIDTH_4-4]+memory[crnt_Star_addr-FRAME_WIDTH_4-5]
+memory[crnt_Star_addr-FRAME_WIDTH_5-2]+ memory[crnt_Star_addr-FRAME_WIDTH_5-3]+ memory[crnt_Star_addr-FRAME_WIDTH_5-4];

wire [15:0]x_weighted_sum ;
wire [15:0]y_weighted_sum ;


assign x_weighted_sum  = (memory[crnt_Star_addr-FRAME_WIDTH_1-2] << 1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_1-3]+(memory[crnt_Star_addr-FRAME_WIDTH_1-3] << 1))+ (memory[crnt_Star_addr-FRAME_WIDTH_1-4]<<2)
+memory[crnt_Star_addr-FRAME_WIDTH_2-1]+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]+(memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2))
+memory[crnt_Star_addr-FRAME_WIDTH_3-1]+(memory[crnt_Star_addr-FRAME_WIDTH_3-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_3-3]+(memory[crnt_Star_addr-FRAME_WIDTH_3-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_3-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]<<2))
+memory[crnt_Star_addr-FRAME_WIDTH_4-1]+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ ( memory[crnt_Star_addr-FRAME_WIDTH_4-3]+(memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<2))
+(memory[crnt_Star_addr-FRAME_WIDTH_5-2]<<2)+ (memory[crnt_Star_addr-FRAME_WIDTH_5-3]+(memory[crnt_Star_addr-FRAME_WIDTH_5-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_5-4]<<2);

assign	y_weighted_sum  = (memory[crnt_Star_addr-FRAME_WIDTH_1-2]+(memory[crnt_Star_addr-FRAME_WIDTH_1-2] << 2))+ ( memory[crnt_Star_addr-FRAME_WIDTH_1-3]+(memory[crnt_Star_addr-FRAME_WIDTH_1-3] << 2))+ (memory[crnt_Star_addr-FRAME_WIDTH_1-4]+(memory[crnt_Star_addr-FRAME_WIDTH_1-4]<<2))
+(memory[crnt_Star_addr-FRAME_WIDTH_2-1]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-2]<<2)+ ( memory[crnt_Star_addr-FRAME_WIDTH_2-3]<<2)+ (memory[crnt_Star_addr-FRAME_WIDTH_2-4]<<2)+(memory[crnt_Star_addr-FRAME_WIDTH_2-5]<<2)
+(memory[crnt_Star_addr-FRAME_WIDTH_3-1]+(memory[crnt_Star_addr-FRAME_WIDTH_3-1]<<1))+(memory[crnt_Star_addr-FRAME_WIDTH_3-2]+(memory[crnt_Star_addr-FRAME_WIDTH_3-2]<<1))+ ( memory[crnt_Star_addr-FRAME_WIDTH_3-3]+(memory[crnt_Star_addr-FRAME_WIDTH_3-3]<<1))+ (memory[crnt_Star_addr-FRAME_WIDTH_3-4]+(memory[crnt_Star_addr-FRAME_WIDTH_3-4]<<1))+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]+(memory[crnt_Star_addr-FRAME_WIDTH_3-5]<<1))
+(memory[crnt_Star_addr-FRAME_WIDTH_4-1]<<1)+(memory[crnt_Star_addr-FRAME_WIDTH_4-2]<<1)+ (memory[crnt_Star_addr-FRAME_WIDTH_4-3]<<1)+ (memory[crnt_Star_addr-FRAME_WIDTH_4-4]<<1)+(memory[crnt_Star_addr-FRAME_WIDTH_4-5]<<1)
+(memory[crnt_Star_addr-FRAME_WIDTH_5-2]   )+(memory[crnt_Star_addr-FRAME_WIDTH_5-3]   )+ (memory[crnt_Star_addr-FRAME_WIDTH_5-4]   );
										
										
										

always @(posedge sample_clk && locked)
begin
    if (rowNumber>=6 & colNumber>=6)
	    begin
            begin
				if(!update_stars )
				 begin
				   
						  
							 if(memory[crnt_Star_addr ] > 1)
							   brightCounts[0]<=brightCounts[0]+1;
							 if (memory[crnt_Star_addr]>2)
							   brightCounts[1]<=brightCounts[1]+1;
							 if (memory[crnt_Star_addr]>4)
							   brightCounts[2]<=brightCounts[2]+1;
							 if (memory[crnt_Star_addr]>8)
							   brightCounts[3]<=brightCounts[3]+1;
							 if (memory[crnt_Star_addr]>16)
							   brightCounts[4]<=brightCounts[4]+1;
							 if (memory[crnt_Star_addr]>32)
							   brightCounts[5]<=brightCounts[5]+1;
							 if (memory[crnt_Star_addr]>64)
							   brightCounts[6]<=brightCounts[6]+1;
							 if (memory[crnt_Star_addr]>128)
							   brightCounts[7]<=brightCounts[7]+1;
							 if (memory[crnt_Star_addr]>256)
							   brightCounts[8]<=brightCounts[8]+1;
							 if (memory[crnt_Star_addr]>512)
							   brightCounts[9]<=brightCounts[9]+1;
							  


							
							 
						
							 if( center > cutoff_Brightness)
							    begin

								  
							    if( above >cutoff_Brightness | below >cutoff_Brightness | right > cutoff_Brightness | left > cutoff_Brightness)

								    if( (center >= left & center >= above & center < below & center <right ))
									  begin
									  	num_bright_areas       <= num_bright_areas+1;													 									    									    




										

										background_mean_21 =( background_sum)+( background_sum >>2)  +( background_sum >>4);
										

										background_mean_63 =( background_sum <<2)- ( background_sum>> 4);
										

										 update_stars <= 1;
									   
								     end
								 end
							  							 							                          							

  						  							 
					  end
				else
                    begin
					   if(getaddrPhase)
					    begin
						  we           <= 1;getaddrPhase <= 0;
						end 
					   else 
					    begin 
                             if(index== 0)
							   begin 
							     din <= rowNumber -6 ;
							     addr_write_to_Stars_blkRAM <= addr_write_to_Stars_blkRAM + 1;
							     index <= 1 ;
							   end 
							 else if(index == 1)
							   begin 
							     din <= colNumber -6 ;
							     addr_write_to_Stars_blkRAM <= addr_write_to_Stars_blkRAM + 1;
								 index <= 2 ;
							   end
							  else if(index == 2) 
							     begin 

									if(y_weighted_sum > background_mean_63)
											din <= y_weighted_sum - background_mean_63;
									else 
											din <= 0;
							         addr_write_to_Stars_blkRAM <= addr_write_to_Stars_blkRAM + 1;
								     index <= 3 ;
								 end 
								 
							  else if(index == 3)
							     begin

										if(x_weighted_sum > background_mean_63)
											din <= x_weighted_sum - background_mean_63;
										else 
											din <= 0;
										addr_write_to_Stars_blkRAM <= addr_write_to_Stars_blkRAM + 1;
										index <= 4 ;
								 end  
						      else if(index == 4)
							     begin 
								   din <= centroid_sum    ;
							       addr_write_to_Stars_blkRAM <= addr_write_to_Stars_blkRAM + 1;
								   index <= 0 ;
								   update_stars <= 0;
								   
								 end  
							   
						end 
					end
		 
                end
            end 
  		
 end 


always @( posedge IMG_CLK_OUT)
begin 
	if (rst)
	  begin	
	
	addr_DM <= 0;
		addr_Img<= 0;
		firstPartOfImage   <= 1;
		rowNumber  <= 0; colNumber   <= 0;
		headPointer<= 0; tailPointer <= FRAME_WIDTH_6;
  

		brightCounts[0] <= 0;brightCounts[1] <= 0;brightCounts[2] <= 0;
		brightCounts[3] <= 0;brightCounts[4] <= 0;brightCounts[5] <= 0;
		brightCounts[6] <= 0;brightCounts[7] <= 0;brightCounts[8] <= 0;
		brightCounts[9] <= 0;
        num_bright_areas <= 0;		
		addr_write_to_Stars_blkRAM <= 0;
 		getaddrPhase               <= 1;
		update_stars               <= 0;
		index                      <= 0;
		FRAME_WIDTH_1 <=1280;
		FRAME_WIDTH_2 <=2560;
		FRAME_WIDTH_3 <=3840;
		FRAME_WIDTH_4 <=5120;
		FRAME_WIDTH_5 <=6400;
		FRAME_WIDTH_6 <=7680; 
		din           <=   0;
		background_mean_21<=0;
		background_mean_63<=0;
	end	
  
  
end

endmodule