data/full_repos/permissive/123528630/Sources/CPU_top.v
data/verilator_xmls/3f4cd095-73e2-4c3e-979a-c1ade03af1b6.xml
module CPU_top(
    clk
    );
input clk;


endmodule
module CPU_top(
    clk
    );

input clk;


endmodule