data/full_repos/permissive/133819542/test/inst_jump_test.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:2: Cannot find include file: ../test/assert.v\n`include "../test/assert.v" \n         ^~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/133819542/test,data/full_repos/permissive/133819542/../test/assert.v\n             data/full_repos/permissive/133819542/test,data/full_repos/permissive/133819542/../test/assert.v.v\n             data/full_repos/permissive/133819542/test,data/full_repos/permissive/133819542/../test/assert.v.sv\n             ../test/assert.v\n             ../test/assert.v.v\n             ../test/assert.v.sv\n             obj_dir/../test/assert.v\n             obj_dir/../test/assert.v.v\n             obj_dir/../test/assert.v.sv\n%Warning-STMTDLY: data/full_repos/permissive/133819542/test/inst_jump_test.v:10: Unsupported: Ignoring delay on this delayed statement.\n    always #1 clk = ~clk;\n           ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:12: Unsupported or unknown PLI call: $dumpfile\n        $dumpfile("../test/inst_jump_test.vcd");\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:13: Unsupported or unknown PLI call: $dumpvars\n        $dumpvars;\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:14: Unsupported or unknown PLI call: $dumpvars\n        $dumpvars(0, open_mips_min_sopc0.openmips0.regfile1.regs[1]);\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:15: Unsupported or unknown PLI call: $dumpvars\n        $dumpvars(0, open_mips_min_sopc0.openmips0.regfile1.regs[2]);\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:16: Unsupported or unknown PLI call: $dumpvars\n        $dumpvars(0, open_mips_min_sopc0.openmips0.regfile1.regs[31]);\n        ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/133819542/test/inst_jump_test.v:22: Unsupported: Ignoring delay on this delayed statement.\n        #20 rst = 0;\n        ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:23: Define or directive not defined: \'`AR\'\n        #12 `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n            ^~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:23: syntax error, unexpected \',\'\n        #12 `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                 ^\n%Warning-STMTDLY: data/full_repos/permissive/133819542/test/inst_jump_test.v:23: Unsupported: Ignoring delay on this delayed statement.\n        #12 `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n        ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:23: Define or directive not defined: \'`AR\'\n        #12 `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                ^~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:23: syntax error, unexpected \',\'\n        #12 `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                      ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:23: Define or directive not defined: \'`AHI\'\n        #12 `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                     ^~~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:23: syntax error, unexpected \';\'\n        #12 `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                                       ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:23: Define or directive not defined: \'`ALO\'\n        #12 `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                                        ^~~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:23: syntax error, unexpected \';\'\n        #12 `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                                                          ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:24: Define or directive not defined: \'`AR\'\n        #2  `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n            ^~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:24: syntax error, unexpected \',\'\n        #2  `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                 ^\n%Warning-STMTDLY: data/full_repos/permissive/133819542/test/inst_jump_test.v:24: Unsupported: Ignoring delay on this delayed statement.\n        #2  `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n        ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:24: Define or directive not defined: \'`AR\'\n        #2  `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                ^~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:24: syntax error, unexpected \',\'\n        #2  `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                      ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:24: Define or directive not defined: \'`AHI\'\n        #2  `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                     ^~~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:24: syntax error, unexpected \';\'\n        #2  `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                                       ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:24: Define or directive not defined: \'`ALO\'\n        #2  `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                                        ^~~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:24: syntax error, unexpected \';\'\n        #2  `AR(1,32\'h00000001);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                                                          ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:25: Define or directive not defined: \'`AR\'\n        #2  `AR(1,32\'h00000002);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n            ^~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:25: syntax error, unexpected \',\'\n        #2  `AR(1,32\'h00000002);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                 ^\n%Warning-STMTDLY: data/full_repos/permissive/133819542/test/inst_jump_test.v:25: Unsupported: Ignoring delay on this delayed statement.\n        #2  `AR(1,32\'h00000002);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n        ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:25: Define or directive not defined: \'`AR\'\n        #2  `AR(1,32\'h00000002);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                ^~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:25: syntax error, unexpected \',\'\n        #2  `AR(1,32\'h00000002);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                      ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:25: Define or directive not defined: \'`AHI\'\n        #2  `AR(1,32\'h00000002);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                     ^~~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:25: syntax error, unexpected \';\'\n        #2  `AR(1,32\'h00000002);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                                       ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:25: Define or directive not defined: \'`ALO\'\n        #2  `AR(1,32\'h00000002);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                                        ^~~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:25: syntax error, unexpected \';\'\n        #2  `AR(1,32\'h00000002);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                                                          ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:26: Define or directive not defined: \'`AR\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n            ^~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:26: syntax error, unexpected \',\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                 ^\n%Warning-STMTDLY: data/full_repos/permissive/133819542/test/inst_jump_test.v:26: Unsupported: Ignoring delay on this delayed statement.\n        #2  `AR(1,32\'h00000003);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n        ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:26: Define or directive not defined: \'`AR\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                ^~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:26: syntax error, unexpected \',\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                      ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:26: Define or directive not defined: \'`AHI\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                     ^~~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:26: syntax error, unexpected \';\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                                       ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:26: Define or directive not defined: \'`ALO\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                                        ^~~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:26: syntax error, unexpected \';\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'hxxxxxxxx);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                                                          ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:27: Define or directive not defined: \'`AR\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'h0000002C);`AHI(32\'h00000000);`ALO(32\'h00000000);\n            ^~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:27: syntax error, unexpected \',\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'h0000002C);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                 ^\n%Warning-STMTDLY: data/full_repos/permissive/133819542/test/inst_jump_test.v:27: Unsupported: Ignoring delay on this delayed statement.\n        #2  `AR(1,32\'h00000003);`AR(31,32\'h0000002C);`AHI(32\'h00000000);`ALO(32\'h00000000);\n        ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:27: Define or directive not defined: \'`AR\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'h0000002C);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                ^~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:27: syntax error, unexpected \',\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'h0000002C);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                      ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:27: Define or directive not defined: \'`AHI\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'h0000002C);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                     ^~~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:27: syntax error, unexpected \';\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'h0000002C);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                                       ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:27: Define or directive not defined: \'`ALO\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'h0000002C);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                                        ^~~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:27: syntax error, unexpected \';\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'h0000002C);`AHI(32\'h00000000);`ALO(32\'h00000000);\n                                                                                          ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:28: Define or directive not defined: \'`AR\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'h0000002C);`AHI(32\'h00000002);`ALO(32\'h0000000E);\n            ^~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:28: syntax error, unexpected \',\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'h0000002C);`AHI(32\'h00000002);`ALO(32\'h0000000E);\n                 ^\n%Warning-STMTDLY: data/full_repos/permissive/133819542/test/inst_jump_test.v:28: Unsupported: Ignoring delay on this delayed statement.\n        #2  `AR(1,32\'h00000003);`AR(31,32\'h0000002C);`AHI(32\'h00000002);`ALO(32\'h0000000E);\n        ^\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:28: Define or directive not defined: \'`AR\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'h0000002C);`AHI(32\'h00000002);`ALO(32\'h0000000E);\n                                ^~~\n%Error: data/full_repos/permissive/133819542/test/inst_jump_test.v:28: syntax error, unexpected \',\'\n        #2  `AR(1,32\'h00000003);`AR(31,32\'h0000002C);`AHI(32\'h00000002);`ALO(32\'h0000000E);\n                                      ^\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
module inst_jump_test();
    reg     clk, rst;
    integer i  ;

    open_mips_min_sopc open_mips_min_sopc0 (clk,rst);

    always #1 clk = ~clk;
    initial begin
        $dumpfile("../test/inst_jump_test.vcd");
        $dumpvars;
        $dumpvars(0, open_mips_min_sopc0.openmips0.regfile1.regs[1]);
        $dumpvars(0, open_mips_min_sopc0.openmips0.regfile1.regs[2]);
        $dumpvars(0, open_mips_min_sopc0.openmips0.regfile1.regs[31]);

        $readmemh("../data/inst_jump_test.txt", open_mips_min_sopc0.inst_rom0.inst_mem, 0, 34);

        clk = 0;
        rst = 1;
        #20 rst = 0;
        #12 `AR(1,32'h00000001);`AR(31,32'hxxxxxxxx);`AHI(32'h00000000);`ALO(32'h00000000);
        #2  `AR(1,32'h00000001);`AR(31,32'hxxxxxxxx);`AHI(32'h00000000);`ALO(32'h00000000);
        #2  `AR(1,32'h00000002);`AR(31,32'hxxxxxxxx);`AHI(32'h00000000);`ALO(32'h00000000);
        #2  `AR(1,32'h00000003);`AR(31,32'hxxxxxxxx);`AHI(32'h00000000);`ALO(32'h00000000);
        #2  `AR(1,32'h00000003);`AR(31,32'h0000002C);`AHI(32'h00000000);`ALO(32'h00000000);
        #2  `AR(1,32'h00000003);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000003);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000048);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000005);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000006);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000006);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000006);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000007);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000007);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000008);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000009);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h0000000A);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        `PASS(jump isntruction test);
    end

endmodule
module inst_jump_test();

    reg     clk, rst;
    integer i  ;

    open_mips_min_sopc open_mips_min_sopc0 (clk,rst);

    always #1 clk = ~clk;
    initial begin
        $dumpfile("../test/inst_jump_test.vcd");
        $dumpvars;
        $dumpvars(0, open_mips_min_sopc0.openmips0.regfile1.regs[1]);
        $dumpvars(0, open_mips_min_sopc0.openmips0.regfile1.regs[2]);
        $dumpvars(0, open_mips_min_sopc0.openmips0.regfile1.regs[31]);

        $readmemh("../data/inst_jump_test.txt", open_mips_min_sopc0.inst_rom0.inst_mem, 0, 34);

        clk = 0;
        rst = 1;
        #20 rst = 0;
        #12 `AR(1,32'h00000001);`AR(31,32'hxxxxxxxx);`AHI(32'h00000000);`ALO(32'h00000000);
        #2  `AR(1,32'h00000001);`AR(31,32'hxxxxxxxx);`AHI(32'h00000000);`ALO(32'h00000000);
        #2  `AR(1,32'h00000002);`AR(31,32'hxxxxxxxx);`AHI(32'h00000000);`ALO(32'h00000000);
        #2  `AR(1,32'h00000003);`AR(31,32'hxxxxxxxx);`AHI(32'h00000000);`ALO(32'h00000000);
        #2  `AR(1,32'h00000003);`AR(31,32'h0000002C);`AHI(32'h00000000);`ALO(32'h00000000);
        #2  `AR(1,32'h00000003);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000003);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000048);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000005);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000006);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000006);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000006);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000007);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000007);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000008);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h00000009);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        #2  `AR(1,32'h0000000A);`AR(31,32'h0000002C);`AHI(32'h00000002);`ALO(32'h0000000E);
        `PASS(jump isntruction test);
    end

endmodule