data/full_repos/permissive/173003307/src/frame_buffer.v
1: b'%Warning-WIDTH: data/full_repos/permissive/173003307/src/frame_buffer.v:85: Bit extraction of array[76799:0] requires 17 bit index, not 15 bits.\n                                                                          : ... In instance Frame_Buffer\n        A_DATA_OUT <= Mem[A_ADDR];\n                         ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module Frame_Buffer(

		input A_CLK,
		input [14:0] A_ADDR,
		input A_DATA_IN,
		output reg A_DATA_OUT,
		input A_WE, 

		input B_CLK,
		input [14:0] B_ADDR, 
		output reg B_DATA
		);
 
parameter HorRes    =   320;
parameter VertRes   =   240;
parameter HorConst  =   0;
parameter VertConst =   9;
parameter image     =   "Mymatrix_1d_fr.txt";

 


    reg [0:0] Mem [(HorRes*VertRes) - 1:0];
    





    

    always@(posedge A_CLK) 
    begin
        if(A_WE)
        begin
            Mem[A_ADDR[14:8]*HorRes + A_ADDR[7:0]] <= A_DATA_IN;
        end
        
        A_DATA_OUT <= Mem[A_ADDR];
    end
    

    always@(posedge B_CLK)
    begin
            B_DATA <= Mem[B_ADDR[14:8]*HorRes + B_ADDR[7:0]];
    end
		
endmodule
module Frame_Buffer(

		input A_CLK,
		input [14:0] A_ADDR,
		input A_DATA_IN,
		output reg A_DATA_OUT,
		input A_WE, 

		input B_CLK,
		input [14:0] B_ADDR, 
		output reg B_DATA
		);

 
parameter HorRes    =   320;
parameter VertRes   =   240;
parameter HorConst  =   0;
parameter VertConst =   9;
parameter image     =   "Mymatrix_1d_fr.txt";

 


    reg [0:0] Mem [(HorRes*VertRes) - 1:0];
    





    

    always@(posedge A_CLK) 
    begin
        if(A_WE)
        begin
            Mem[A_ADDR[14:8]*HorRes + A_ADDR[7:0]] <= A_DATA_IN;
        end
        
        A_DATA_OUT <= Mem[A_ADDR];
    end
    

    always@(posedge B_CLK)
    begin
            B_DATA <= Mem[B_ADDR[14:8]*HorRes + B_ADDR[7:0]];
    end
		
endmodule