data/full_repos/permissive/20101677/mux4to1_5.v
 line:1 column:1: Illegal character '\x00'
1: b'%Warning-WIDTH: data/full_repos/permissive/20101677/mux4to1_5.v:30: Operator CASE expects 2 bits on the Case expression, but Case expression\'s VARREF \'sel\' generates 1 bits.\n                                                                  : ... In instance mux4to1_5\n case(sel)\n ^~~~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module mux4to1_5(
	input wire sel,
	input wire [4:0] a,
	input wire [4:0] b,
	input wire [4:0] c,
	input wire [4:0] d,
	output reg [4:0] o
);


always @(*)
	case(sel)
		2'b00: o<=a;
		2'b01: o<=b;
		2'b10: o<=c;
		2'b11: o<=d;
	endcase

endmodule
module mux4to1_5(
	input wire sel,
	input wire [4:0] a,
	input wire [4:0] b,
	input wire [4:0] c,
	input wire [4:0] d,
	output reg [4:0] o
);



always @(*)
	case(sel)
		2'b00: o<=a;
		2'b01: o<=b;
		2'b10: o<=c;
		2'b11: o<=d;
	endcase

endmodule