data/full_repos/permissive/214823094/submissions/lab_3/project_3/carry_look_ahead_adder_4.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/214823094/submissions/lab_3/project_3/carry_look_ahead_adder_4.v:70: Multiple top level modules\n                                                                                                                 : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                                                                 : ... Top module \'carry_look_ahead_adder_4\'\nmodule carry_look_ahead_adder_4(\n       ^~~~~~~~~~~~~~~~~~~~~~~~\n                                                                                                                 : ... Top module \'xor_2\'\nmodule xor_2(\n       ^~~~~\n%Error: Exiting due to 1 warning(s)\n'
module carry_look_ahead_adder_4(
    input [3:0] a,
    input [3:0] b,
    input cin,
    output [3:0] s,
    output cout
    );
    
    
    wire [3:0] g;
    wire [3:0] p;
    wire [4:0] c;

    assign g[0]=a[0]&b[0];
    assign g[1]=a[1]&b[1];
    assign g[2]=a[2]&b[2];
    assign g[3]=a[3]&b[3];
    





    assign p[0]=a[0]&~b[0] | ~a[0]&b[0];
    assign p[1]=a[1]&~b[1] | ~a[1]&b[1];
    assign p[2]=a[2]&~b[2] | ~a[2]&b[2];
    assign p[3]=a[3]&~b[3] | ~a[3]&b[3];
    

    assign c[0]=cin;
    assign c[1]=g[0]|p[0]&c[0];
    assign c[2]=g[1]|p[1]&g[0]|p[1]&p[0]&c[0];
    assign c[3]=g[2]|p[2]&g[1]|p[2]&p[1]&g[0]|p[2]&p[1]&p[0]&c[0];
    assign c[4]=g[3]|p[3]&g[2]|p[3]&p[2]&g[1]|p[3]&p[2]&p[1]&g[0]|p[3]&p[2]&p[1]&p[0]&c[0];
    assign cout=c[4];

    xor_3 x30(a[0],b[0],c[0],s[0]);
    xor_3 x31(a[1],b[1],c[1],s[1]);
    xor_3 x32(a[2],b[2],c[2],s[2]);
    xor_3 x33(a[3],b[3],c[3],s[3]);




    
endmodule
module carry_look_ahead_adder_4(
    input [3:0] a,
    input [3:0] b,
    input cin,
    output [3:0] s,
    output cout
    );

    
    
    wire [3:0] g;
    wire [3:0] p;
    wire [4:0] c;

    assign g[0]=a[0]&b[0];
    assign g[1]=a[1]&b[1];
    assign g[2]=a[2]&b[2];
    assign g[3]=a[3]&b[3];
    





    assign p[0]=a[0]&~b[0] | ~a[0]&b[0];
    assign p[1]=a[1]&~b[1] | ~a[1]&b[1];
    assign p[2]=a[2]&~b[2] | ~a[2]&b[2];
    assign p[3]=a[3]&~b[3] | ~a[3]&b[3];
    

    assign c[0]=cin;
    assign c[1]=g[0]|p[0]&c[0];
    assign c[2]=g[1]|p[1]&g[0]|p[1]&p[0]&c[0];
    assign c[3]=g[2]|p[2]&g[1]|p[2]&p[1]&g[0]|p[2]&p[1]&p[0]&c[0];
    assign c[4]=g[3]|p[3]&g[2]|p[3]&p[2]&g[1]|p[3]&p[2]&p[1]&g[0]|p[3]&p[2]&p[1]&p[0]&c[0];
    assign cout=c[4];

    xor_3 x30(a[0],b[0],c[0],s[0]);
    xor_3 x31(a[1],b[1],c[1],s[1]);
    xor_3 x32(a[2],b[2],c[2],s[2]);
    xor_3 x33(a[3],b[3],c[3],s[3]);




    
endmodule