data/full_repos/permissive/135820056/rtl/genesis_lpf.v
 line:102: before: "/"
1: b'%Warning-MULTITOP: data/full_repos/permissive/135820056/rtl/genesis_lpf.v:84: Multiple top level modules\n                                                                            : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                            : ... Top module \'genesis_lpf\'\nmodule genesis_lpf(\n       ^~~~~~~~~~~\n                                                                            : ... Top module \'genesis_fm_lpf\'\nmodule genesis_fm_lpf(\n       ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/135820056/rtl/genesis_lpf.v:92: Cannot find file containing module: \'iir_2nd_order\'\n iir_2nd_order fm2(.clk(clk),\n ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/135820056/rtl,data/full_repos/permissive/135820056/iir_2nd_order\n             data/full_repos/permissive/135820056/rtl,data/full_repos/permissive/135820056/iir_2nd_order.v\n             data/full_repos/permissive/135820056/rtl,data/full_repos/permissive/135820056/iir_2nd_order.sv\n             iir_2nd_order\n             iir_2nd_order.v\n             iir_2nd_order.sv\n             obj_dir/iir_2nd_order\n             obj_dir/iir_2nd_order.v\n             obj_dir/iir_2nd_order.sv\n%Error: data/full_repos/permissive/135820056/rtl/genesis_lpf.v:69: Cannot find file containing module: \'iir_1st_order\'\n iir_1st_order lpf6db(.clk(clk),\n ^~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s), 1 warning(s)\n'
module genesis_lpf(
	input clk,
	input reset,
	input [1:0] lpf_mode,
   input signed [15:0] in,
   output signed [15:0] out);
	
	reg [9:0] div = 504;
	


	reg signed [17:0] A2;
	reg signed [17:0] B2;
	reg signed [17:0] B1;
	
	wire signed [15:0] audio_post_lpf1;
		
	always @ (*) begin
		case(lpf_mode[1:0])
			2'b00 : begin
				A2 = -18'd27504;
				B1 =  18'd10528;
				B2 = -18'd5264;
			end
			2'b01 : begin
				A2 = -18'sd26328;
				B1 =  18'sd12888;
				B2 = -18'sd6440;
			end
			2'b10  : begin
				A2 = -18'd19088;
				B1 =  18'd6840;
				B2 =  18'd6840;
			end
			default: begin
				A2 = -18'sd32768; 
				B1 =  18'sd0; 
				B2 =  18'sd0;
			end
		endcase
	end
	
	iir_1st_order lpf6db(.clk(clk),
								.reset(reset),
								.div(div),
								.A2(A2),
								.B1(B1),
								.B2(B2),
								.in(in),
								.out(audio_post_lpf1)); 
	 
	assign out = ( lpf_mode[1:0] == 2'b11 ) ? in : audio_post_lpf1;

endmodule
module genesis_lpf(
	input clk,
	input reset,
	input [1:0] lpf_mode,
   input signed [15:0] in,
   output signed [15:0] out);

	
	reg [9:0] div = 504;
	


	reg signed [17:0] A2;
	reg signed [17:0] B2;
	reg signed [17:0] B1;
	
	wire signed [15:0] audio_post_lpf1;
		
	always @ (*) begin
		case(lpf_mode[1:0])
			2'b00 : begin
				A2 = -18'd27504;
				B1 =  18'd10528;
				B2 = -18'd5264;
			end
			2'b01 : begin
				A2 = -18'sd26328;
				B1 =  18'sd12888;
				B2 = -18'sd6440;
			end
			2'b10  : begin
				A2 = -18'd19088;
				B1 =  18'd6840;
				B2 =  18'd6840;
			end
			default: begin
				A2 = -18'sd32768; 
				B1 =  18'sd0; 
				B2 =  18'sd0;
			end
		endcase
	end
	
	iir_1st_order lpf6db(.clk(clk),
								.reset(reset),
								.div(div),
								.A2(A2),
								.B1(B1),
								.B2(B2),
								.in(in),
								.out(audio_post_lpf1)); 
	 
	assign out = ( lpf_mode[1:0] == 2'b11 ) ? in : audio_post_lpf1;

endmodule