data/full_repos/permissive/208741034/lcd/rtl/lcd_driver.v
 line:33 column:24: Illegal character "'"
1: b"%Error: data/full_repos/permissive/208741034/lcd/rtl/lcd_driver.v:33: Illegal base character: 2\nparameter  V_TOTAL= 11'286 ;   \n                    ^~~~~~\n%Error: Exiting due to 1 error(s)\n"
module lcd_driver
(
   input  clk,
   input  rst_n,
   
   output  lcd_de,
   output  lcd_hs,
   output  lcd_vs,
   output  lcd_pclk,
   output  lcd_bl,
   output  lcd_rst,
   
   output [15 : 0] lcd_rgb_data,
   
   input  [15 : 0] pixel_data,
   output [10 : 0] pixel_xpos,
   output [10 : 0] pixel_ypos

);


parameter  H_SYNC = 11'd41;
parameter  H_BACK = 11'd2 ;
parameter  H_DISP = 11'd480;
parameter  H_FRONT= 11'd2  ;
parameter  H_TOTAL= 11'd525;


parameter  V_SYNC = 11'd10;
parameter  V_BACK = 11'd2 ;
parameter  V_DISP = 11'd272;
parameter  V_FRONT= 11'd2  ;
parameter  V_TOTAL= 11'286 ;

reg [10 : 0] cnt_h;
reg [10 : 0] cnt_v;

wire lcd_en;
wire data_req;
         
assign lcd_bl  = 1'd1;
assign lcd_rst = 1'd1;
assign lcd_de  = lcd_en;
assign lcd_hs  = 1'd1;
assign lcd_vs  = 1'd1;



assign lcd_en = ((cnt_h >= H_SYNC + H_BACK) && (cnt_h <= H_SYNC + H_BACK + H_DISP)) &&
                 ((cnt_v >= V_SYNC + V_BACK) && (cnt_v <= V_SYNC + V_BACK + V_DISP))
                 ? 1'b1 : 1'b0;

assign lcd_rgb_data = lcd_en ? pixel_data : 0;


assign data_req = ((cnt_h >= H_SYNC + H_BACK - 1'b1) && (cnt_h <= H_SYNC + H_BACK + H_DISP -1'b1)) &&
                 ((cnt_v >= V_SYNC + V_BACK - 1'b1) && (cnt_v <= V_SYNC + V_BACK + V_DISP - 1'b1))
                 ? 1'b1 : 1'b0;
assign pixel_xpos = data_req ? (cnt_h - (H_SYNC + H_BACK - 1'b1)) : 11'd0;
assign pixel_ypos = data_req ? (cnt_v - (V_SYNC + V_BACK - 1'b1)) : 11'd0;


always @(posedge clk or negedge rst_n)begin
    if(!rst_n)
      cnt_h <= 10'd0;
     else begin
      if(cnt_h <= H_TOTAL - 1)
         cnt_h <= 10'd0;
      else 
         cnt_h <= cnt_h + 1'd1;
     end

end


always @(posedge clk or negedge rst_n)begin
    if(!rst_n)
      cnt_v <= 10'd0;
     else begin
      if(cnt_v <= V_TOTAL - 1)
         cnt_v <= 10'd0;
      else 
         cnt_v <= cnt_v + 1'd1;
     end

end
                 
endmodule
module lcd_driver
(
   input  clk,
   input  rst_n,
   
   output  lcd_de,
   output  lcd_hs,
   output  lcd_vs,
   output  lcd_pclk,
   output  lcd_bl,
   output  lcd_rst,
   
   output [15 : 0] lcd_rgb_data,
   
   input  [15 : 0] pixel_data,
   output [10 : 0] pixel_xpos,
   output [10 : 0] pixel_ypos

);



parameter  H_SYNC = 11'd41;
parameter  H_BACK = 11'd2 ;
parameter  H_DISP = 11'd480;
parameter  H_FRONT= 11'd2  ;
parameter  H_TOTAL= 11'd525;


parameter  V_SYNC = 11'd10;
parameter  V_BACK = 11'd2 ;
parameter  V_DISP = 11'd272;
parameter  V_FRONT= 11'd2  ;
parameter  V_TOTAL= 11'286 ;

reg [10 : 0] cnt_h;
reg [10 : 0] cnt_v;

wire lcd_en;
wire data_req;
         
assign lcd_bl  = 1'd1;
assign lcd_rst = 1'd1;
assign lcd_de  = lcd_en;
assign lcd_hs  = 1'd1;
assign lcd_vs  = 1'd1;



assign lcd_en = ((cnt_h >= H_SYNC + H_BACK) && (cnt_h <= H_SYNC + H_BACK + H_DISP)) &&
                 ((cnt_v >= V_SYNC + V_BACK) && (cnt_v <= V_SYNC + V_BACK + V_DISP))
                 ? 1'b1 : 1'b0;

assign lcd_rgb_data = lcd_en ? pixel_data : 0;


assign data_req = ((cnt_h >= H_SYNC + H_BACK - 1'b1) && (cnt_h <= H_SYNC + H_BACK + H_DISP -1'b1)) &&
                 ((cnt_v >= V_SYNC + V_BACK - 1'b1) && (cnt_v <= V_SYNC + V_BACK + V_DISP - 1'b1))
                 ? 1'b1 : 1'b0;
assign pixel_xpos = data_req ? (cnt_h - (H_SYNC + H_BACK - 1'b1)) : 11'd0;
assign pixel_ypos = data_req ? (cnt_v - (V_SYNC + V_BACK - 1'b1)) : 11'd0;


always @(posedge clk or negedge rst_n)begin
    if(!rst_n)
      cnt_h <= 10'd0;
     else begin
      if(cnt_h <= H_TOTAL - 1)
         cnt_h <= 10'd0;
      else 
         cnt_h <= cnt_h + 1'd1;
     end

end


always @(posedge clk or negedge rst_n)begin
    if(!rst_n)
      cnt_v <= 10'd0;
     else begin
      if(cnt_v <= V_TOTAL - 1)
         cnt_v <= 10'd0;
      else 
         cnt_v <= cnt_v + 1'd1;
     end

end
                 
endmodule