data/full_repos/permissive/211316121/lab6_3/seven_segment.v
data/verilator_xmls/1149a70a-7190-4b99-88d2-5c1405d47eab.xml
module seven_segment(
    input [3:0] data,
    output reg [6:0] a2g
    );
    
    always @(*)
    case(data)
        'h0: a2g = 7'b1000000; 
        'h1: a2g = 7'b1111001; 
        'h2: a2g = 7'b0100100; 
        'h3: a2g = 7'b0110000; 
        'h4: a2g = 7'b0011001; 
        'h5: a2g = 7'b0010010; 
        'h6: a2g = 7'b0000010; 
        'h7: a2g = 7'b1111000; 
        'h8: a2g = 7'b0000000; 
        'h9: a2g = 7'b0011000; 
        default: a2g = 7'b1000000;
    endcase
endmodule
module seven_segment(
    input [3:0] data,
    output reg [6:0] a2g
    );

    
    always @(*)
    case(data)
        'h0: a2g = 7'b1000000; 
        'h1: a2g = 7'b1111001; 
        'h2: a2g = 7'b0100100; 
        'h3: a2g = 7'b0110000; 
        'h4: a2g = 7'b0011001; 
        'h5: a2g = 7'b0010010; 
        'h6: a2g = 7'b0000010; 
        'h7: a2g = 7'b1111000; 
        'h8: a2g = 7'b0000000; 
        'h9: a2g = 7'b0011000; 
        default: a2g = 7'b1000000;
    endcase
endmodule