data/full_repos/permissive/146246005/AASD and Counter/TBcount.sv
 line:34: before: "$"
1: b'%Error: Cannot find file containing module: and\n        ... Looked in:\n             data/full_repos/permissive/146246005/AASD/and\n             data/full_repos/permissive/146246005/AASD/and.v\n             data/full_repos/permissive/146246005/AASD/and.sv\n             and\n             and.v\n             and.sv\n             obj_dir/and\n             obj_dir/and.v\n             obj_dir/and.sv\n%Error: Cannot find file containing module: Counter,data/full_repos/permissive/146246005\n%Error: Cannot find file containing module: data/full_repos/permissive/146246005/AASD\n%Error: Cannot find file containing module: Counter/TBcount.sv\n%Error: Exiting due to 4 error(s)\n'
module TBcount();
    reg Clock, Enable, Reset,Load;
    reg [5:0]Data;
    wire [5:0]Count;

    TLcount UUT(Count,Data,Clock,Reset,Enable,Load);

    always #(`period* 0.5) Clock=~Clock;

    initial begin
     $vcdpluson;
     $monitor("%d ns  Data=%d  Enable=%b  Load =%b  Reset=%b   Count=%d",$time,Data,Enable,Load,Reset,Count);
     Clock=0;
    end

    initial begin
	Enable=0; Reset=1; Load=0; Data=6'b010101;

	#(`period* 0.25) Reset=0;
	#(`period* 1.75) Reset=1;
	#`period Enable=1;
	#(`period* 8) Load=1; Data=6'b111100;
	#`period Load=0;
	#(`period* 10) Load=1; Enable=1; Data=6'b101010; 
	#`period Reset=0;
	#`period Reset=1; Load=0;
	#(`period* 9) Reset=0;
     	#(`period) Reset=1; Enable=0; Load=1; Data=6'd36;
     #(`period* 4) $finish;

    end
endmodule
module TBcount();

    reg Clock, Enable, Reset,Load;
    reg [5:0]Data;
    wire [5:0]Count;

    TLcount UUT(Count,Data,Clock,Reset,Enable,Load);

    always #(`period* 0.5) Clock=~Clock;

    initial begin
     $vcdpluson;
     $monitor("%d ns  Data=%d  Enable=%b  Load =%b  Reset=%b   Count=%d",$time,Data,Enable,Load,Reset,Count);
     Clock=0;
    end

    initial begin
	Enable=0; Reset=1; Load=0; Data=6'b010101;

	#(`period* 0.25) Reset=0;
	#(`period* 1.75) Reset=1;
	#`period Enable=1;
	#(`period* 8) Load=1; Data=6'b111100;
	#`period Load=0;
	#(`period* 10) Load=1; Enable=1; Data=6'b101010; 
	#`period Reset=0;
	#`period Reset=1; Load=0;
	#(`period* 9) Reset=0;
     	#(`period) Reset=1; Enable=0; Load=1; Data=6'd36;
     #(`period* 4) $finish;

    end
endmodule