data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv
None: at end of input
1: b'%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:26: Cannot find include file: test_exec.svh\n  `include "test_exec.svh" \n           ^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb,data/full_repos/permissive/214858095/test_exec.svh\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb,data/full_repos/permissive/214858095/test_exec.svh.v\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb,data/full_repos/permissive/214858095/test_exec.svh.sv\n             test_exec.svh\n             test_exec.svh.v\n             test_exec.svh.sv\n             obj_dir/test_exec.svh\n             obj_dir/test_exec.svh.v\n             obj_dir/test_exec.svh.sv\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:31: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\n  import PkgTestExec::*;\n         ^~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:72: syntax error, unexpected \'=\', expecting \',\' or \';\'\n  ChdrBfm #(I_CHDR_W) m_bfm = new(m_chdr, null);\n                            ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:73: syntax error, unexpected \'=\', expecting \',\' or \';\'\n  ChdrBfm #(O_CHDR_W) s_bfm = new(null, s_chdr);\n                            ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:76: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n  typedef ChdrPacket #(I_CHDR_W)::ChdrPacket_t      IChdrPacket_t;\n                     ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:77: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n  typedef ChdrPacket #(O_CHDR_W)::ChdrPacket_t      OChdrPacket_t;\n                     ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:78: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n  typedef ChdrData #(I_CHDR_W, ITEM_W)::chdr_word_t i_chdr_word_t;\n                   ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:79: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n  typedef ChdrData #(O_CHDR_W, ITEM_W)::chdr_word_t o_chdr_word_t;\n                   ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:252: syntax error, unexpected IDENTIFIER\n      chdr_header_t header;\n                    ^~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:315: Define or directive not defined: \'`ASSERT_ERROR\'\n      `ASSERT_ERROR(\n      ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:316: syntax error, unexpected \',\'\n        o_data_tuser == o_user_count,\n                                    ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:334: syntax error, unexpected IDENTIFIER, expecting \'(\' or \';\'\n  function automatic OChdrPacket_t convert_packet(IChdrPacket_t i_packet);\n                                   ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:335: syntax error, unexpected \'=\', expecting \',\' or \';\'\n    OChdrPacket_t o_packet = new;\n                           ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:343: syntax error, unexpected \'=\', expecting IDENTIFIER\n      o_packet = OChdrPacket_t\'(i_packet.copy());\n               ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:350: syntax error, unexpected \'=\', expecting IDENTIFIER\n    o_packet.header = i_packet.header;\n                    ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:355: syntax error, unexpected \'=\', expecting IDENTIFIER\n      num_mdata = i_packet.header.num_mdata * I_CHDR_W / O_CHDR_W;\n                ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:356: syntax error, unexpected \'=\', expecting IDENTIFIER\n      if (num_mdata > max_num_mdata) num_mdata = max_num_mdata;\n                                               ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:359: syntax error, unexpected \'=\', expecting IDENTIFIER\n      num_mdata = (((i_packet.header.num_mdata * I_CHDR_W)+(O_CHDR_W)-1)/(O_CHDR_W));\n                ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:361: syntax error, unexpected \'.\', expecting IDENTIFIER\n    o_packet.header.num_mdata = num_mdata;\n                   ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:364: syntax error, unexpected \'.\', expecting IDENTIFIER\n    o_packet.header.length =\n                   ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:377: syntax error, unexpected \'=\', expecting IDENTIFIER\n    o_packet.timestamp = i_packet.timestamp;\n                       ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:384: syntax error, unexpected \'=\', expecting IDENTIFIER\n      o_packet.metadata = ChdrData#(I_CHDR_W, O_CHDR_W)::chdr_to_item(i_packet.metadata,\n                        ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:387: syntax error, unexpected \'=\', expecting IDENTIFIER\n      o_packet.data = ChdrData#(I_CHDR_W, O_CHDR_W)::chdr_to_item(i_packet.data,\n                    ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:391: syntax error, unexpected \'=\', expecting IDENTIFIER\n      o_packet.metadata = ChdrData#(O_CHDR_W, I_CHDR_W)::item_to_chdr(i_packet.metadata);\n                        ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:392: syntax error, unexpected \'=\', expecting IDENTIFIER\n      o_packet.data     = ChdrData#(O_CHDR_W, I_CHDR_W)::item_to_chdr(i_packet.data);\n                        ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:397: syntax error, unexpected \'=\', expecting IDENTIFIER\n        last_mdata = o_packet.metadata[$];\n                   ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:398: syntax error, unexpected int, expecting IDENTIFIER or genvar\n        for (int i = 0; i < o_packet.mdata_bytes()-i_packet.mdata_bytes(); i++) begin\n             ^~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:401: syntax error, unexpected \'[\', expecting IDENTIFIER\n        o_packet.metadata[$] = last_mdata;\n                         ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:412: syntax error, unexpected int, expecting IDENTIFIER or genvar\n      for (int i = 0; i < i_packet.data.size(); i++) begin\n           ^~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:418: syntax error, unexpected \'.\', expecting IDENTIFIER\n          o_packet.data.push_back(word);\n                       ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:438: syntax error, unexpected \'=\', expecting IDENTIFIER\n      msg = { msg, "Headers do not match\\n" };\n          ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:444: syntax error, unexpected \'=\', expecting IDENTIFIER\n        msg = { msg, "Timestamps do not match\\n" };\n            ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:452: syntax error, unexpected \'=\', expecting IDENTIFIER\n      msg = { msg, "Metadata does not match\\n" };\n          ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:459: syntax error, unexpected \'=\', expecting IDENTIFIER\n      msg = { msg, "Payloads do not match\\n" };\n          ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:476: syntax error, unexpected \'=\', expecting \',\' or \';\'\n    mailbox #(IChdrPacket_t) packets = new;\n                                     ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:480: syntax error, unexpected \'(\', expecting IDENTIFIER\n    test.start_test(msg, 10ms);\n                    ^~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:482: syntax error, unexpected \'(\', expecting IDENTIFIER\n    m_bfm.set_master_stall_prob(in_stall_prob);\n                                ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:483: syntax error, unexpected \'(\', expecting IDENTIFIER\n    s_bfm.set_slave_stall_prob(out_stall_prob);\n                               ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:499: syntax error, unexpected repeat\n        repeat (NUM_PACKETS) begin\n        ^~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:511: syntax error, unexpected \'=\', expecting IDENTIFIER\n            if (USE_RANDOM) timestamp = Rand#($bits(chdr_header_t))::rand_logic();\n                                      ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:512: syntax error, unexpected \'=\', expecting IDENTIFIER\n            else timestamp = 64\'h0123456789ABCDEF;\n                           ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:514: syntax error, unexpected \'=\', expecting IDENTIFIER\n            timestamp = 0;\n                      ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:518: syntax error, unexpected \'=\', expecting IDENTIFIER\n          mdata = {};\n                ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:519: Unsupported or unknown PLI call: $urandom_range\n          if ($urandom_range(0, 1)) begin\n              ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:520: syntax error, unexpected \'=\', expecting IDENTIFIER\n            count = 0;\n                  ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:521: Unsupported or unknown PLI call: $urandom_range\n            repeat ($urandom_range(1, MAX_MDATA_WORDS)) begin\n                    ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:530: Unsupported or unknown PLI call: $urandom_range\n          repeat ($urandom_range(1, MAX_PYLD_WORDS)) begin\n                  ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:544: syntax error, unexpected +=, expecting IDENTIFIER\n            data_byte_length += $urandom_range(1, I_CHDR_W/64) * 8;\n                             ^~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:544: Unsupported or unknown PLI call: $urandom_range\n            data_byte_length += $urandom_range(1, I_CHDR_W/64) * 8;\n                                ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/sim/chdr_resize_tb/chdr_resize_tb.sv:546: syntax error, unexpected +=, expecting IDENTIFIER\n            data_byte_length += $urandom_range(1, I_CHDR_W/8);\n                             ^~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
function automatic OChdrPacket_t convert_packet(IChdrPacket_t i_packet);
    OChdrPacket_t o_packet = new;
    int num_mdata;
    int max_num_mdata = 2**$bits(o_packet.header.num_mdata)-1;


    if (I_CHDR_W == O_CHDR_W && I_CHDR_W == I_DATA_W && O_CHDR_W == O_DATA_W) begin


      o_packet = OChdrPacket_t'(i_packet.copy());
      return o_packet;
    end




    o_packet.header = i_packet.header;


    if (I_CHDR_W > O_CHDR_W) begin

      num_mdata = i_packet.header.num_mdata * I_CHDR_W / O_CHDR_W;
      if (num_mdata > max_num_mdata) num_mdata = max_num_mdata;
    end else begin

      num_mdata = `DIV_CEIL(i_packet.header.num_mdata * I_CHDR_W, O_CHDR_W);
    end
    o_packet.header.num_mdata = num_mdata;


    o_packet.header.length =

      (O_CHDR_W/8) +

      ((o_packet.header.pkt_type == CHDR_DATA_WITH_TS && O_CHDR_W == 64) ? (O_CHDR_W/8) : 0) +

      (O_CHDR_W/8)*o_packet.header.num_mdata +


      ((o_packet.header.pkt_type == CHDR_MANAGEMENT) ?
        `DIV_CEIL(i_packet.data_bytes(), I_CHDR_W/8) * (O_CHDR_W/8) : i_packet.data_bytes());


    o_packet.timestamp = i_packet.timestamp;




    if (I_CHDR_W > O_CHDR_W) begin

      o_packet.metadata = ChdrData#(I_CHDR_W, O_CHDR_W)::chdr_to_item(i_packet.metadata,
        num_mdata * O_CHDR_W/8);

      o_packet.data = ChdrData#(I_CHDR_W, O_CHDR_W)::chdr_to_item(i_packet.data,
        `DIV_CEIL(i_packet.data_bytes(), O_CHDR_W/8) * O_CHDR_W/8);
    end else begin
      o_chdr_word_t last_mdata;
      o_packet.metadata = ChdrData#(O_CHDR_W, I_CHDR_W)::item_to_chdr(i_packet.metadata);
      o_packet.data     = ChdrData#(O_CHDR_W, I_CHDR_W)::item_to_chdr(i_packet.data);



      if (o_packet.metadata.size() > 0) begin
        last_mdata = o_packet.metadata[$];
        for (int i = 0; i < o_packet.mdata_bytes()-i_packet.mdata_bytes(); i++) begin
          last_mdata[$bits(o_chdr_word_t)-i*8-1 -: 8] = 8'd0;
        end
        o_packet.metadata[$] = last_mdata;
      end
    end




    if (o_packet.header.pkt_type == CHDR_MANAGEMENT) begin


      o_packet.data = {};
      for (int i = 0; i < i_packet.data.size(); i++) begin
        if (i == 0) begin

          o_chdr_word_t word;
          word = i_packet.data[i];
          word[47:45] = translate_chdr_w(O_CHDR_W);
          o_packet.data.push_back(word);
        end else begin
          o_packet.data.push_back(i_packet.data[i]);
        end
      end
    end

    return o_packet;
  endfunction
function automatic OChdrPacket_t convert_packet(IChdrPacket_t i_packet);

    OChdrPacket_t o_packet = new;
    int num_mdata;
    int max_num_mdata = 2**$bits(o_packet.header.num_mdata)-1;


    if (I_CHDR_W == O_CHDR_W && I_CHDR_W == I_DATA_W && O_CHDR_W == O_DATA_W) begin


      o_packet = OChdrPacket_t'(i_packet.copy());
      return o_packet;
    end




    o_packet.header = i_packet.header;


    if (I_CHDR_W > O_CHDR_W) begin

      num_mdata = i_packet.header.num_mdata * I_CHDR_W / O_CHDR_W;
      if (num_mdata > max_num_mdata) num_mdata = max_num_mdata;
    end else begin

      num_mdata = `DIV_CEIL(i_packet.header.num_mdata * I_CHDR_W, O_CHDR_W);
    end
    o_packet.header.num_mdata = num_mdata;


    o_packet.header.length =

      (O_CHDR_W/8) +

      ((o_packet.header.pkt_type == CHDR_DATA_WITH_TS && O_CHDR_W == 64) ? (O_CHDR_W/8) : 0) +

      (O_CHDR_W/8)*o_packet.header.num_mdata +


      ((o_packet.header.pkt_type == CHDR_MANAGEMENT) ?
        `DIV_CEIL(i_packet.data_bytes(), I_CHDR_W/8) * (O_CHDR_W/8) : i_packet.data_bytes());


    o_packet.timestamp = i_packet.timestamp;




    if (I_CHDR_W > O_CHDR_W) begin

      o_packet.metadata = ChdrData#(I_CHDR_W, O_CHDR_W)::chdr_to_item(i_packet.metadata,
        num_mdata * O_CHDR_W/8);

      o_packet.data = ChdrData#(I_CHDR_W, O_CHDR_W)::chdr_to_item(i_packet.data,
        `DIV_CEIL(i_packet.data_bytes(), O_CHDR_W/8) * O_CHDR_W/8);
    end else begin
      o_chdr_word_t last_mdata;
      o_packet.metadata = ChdrData#(O_CHDR_W, I_CHDR_W)::item_to_chdr(i_packet.metadata);
      o_packet.data     = ChdrData#(O_CHDR_W, I_CHDR_W)::item_to_chdr(i_packet.data);



      if (o_packet.metadata.size() > 0) begin
        last_mdata = o_packet.metadata[$];
        for (int i = 0; i < o_packet.mdata_bytes()-i_packet.mdata_bytes(); i++) begin
          last_mdata[$bits(o_chdr_word_t)-i*8-1 -: 8] = 8'd0;
        end
        o_packet.metadata[$] = last_mdata;
      end
    end




    if (o_packet.header.pkt_type == CHDR_MANAGEMENT) begin


      o_packet.data = {};
      for (int i = 0; i < i_packet.data.size(); i++) begin
        if (i == 0) begin

          o_chdr_word_t word;
          word = i_packet.data[i];
          word[47:45] = translate_chdr_w(O_CHDR_W);
          o_packet.data.push_back(word);
        end else begin
          o_packet.data.push_back(i_packet.data[i]);
        end
      end
    end

    return o_packet;
  endfunction