data/full_repos/permissive/188039952/SmartFusion2/controller.v
1: b"%Error: data/full_repos/permissive/188039952/SmartFusion2/controller.v:61: Cannot find file containing module: 'xtal'\n xtal xtal_inst (\n ^~~~\n        ... Looked in:\n             data/full_repos/permissive/188039952/SmartFusion2,data/full_repos/permissive/188039952/xtal\n             data/full_repos/permissive/188039952/SmartFusion2,data/full_repos/permissive/188039952/xtal.v\n             data/full_repos/permissive/188039952/SmartFusion2,data/full_repos/permissive/188039952/xtal.sv\n             xtal\n             xtal.v\n             xtal.sv\n             obj_dir/xtal\n             obj_dir/xtal.v\n             obj_dir/xtal.sv\n%Error: data/full_repos/permissive/188039952/SmartFusion2/controller.v:67: Cannot find file containing module: 'pll1'\n pll1 pll1_inst (\n ^~~~\n%Error: data/full_repos/permissive/188039952/SmartFusion2/controller.v:83: Cannot find file containing module: 'matchedRO'\n matchedRO #(\n ^~~~~~~~~\n%Error: data/full_repos/permissive/188039952/SmartFusion2/controller.v:91: Cannot find file containing module: 'matchedRO'\n matchedRO #(\n ^~~~~~~~~\n%Error: data/full_repos/permissive/188039952/SmartFusion2/controller.v:100: Cannot find file containing module: 'coherentSampler'\n coherentSampler #(\n ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/188039952/SmartFusion2/controller.v:118: Cannot find file containing module: 'matchingController'\n matchingController #(\n ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/188039952/SmartFusion2/controller.v:150: Cannot find file containing module: 'ROCounter'\n   ROCounter #(\n   ^~~~~~~~~\n%Error: data/full_repos/permissive/188039952/SmartFusion2/controller.v:165: Cannot find file containing module: 'randShifter'\n   randShifter RS (\n   ^~~~~~~~~~~\n%Error: data/full_repos/permissive/188039952/SmartFusion2/controller.v:188: Cannot find file containing module: 'sampleToTransmit'\n   sampleToTransmit S2T (\n   ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/188039952/SmartFusion2/controller.v:226: Cannot find file containing module: 'sendController'\n sendController SC(\n ^~~~~~~~~~~~~~\n%Error: Exiting due to 10 error(s)\n"
module controller(
		input 	n_reset,
		input 	clk_in,
		output 	dataClkP,
		output 	dataClkN,
		output 	dataP,
		output 	dataN,
		output 	syncOutP,
		output 	syncOutN
	);






	localparam							debugMode		= 1;
	

	localparam 							ROLength 		= 3;
	localparam 							CSCntWidth 		= 16;
	localparam							NBLSB				= 1;
	

	localparam							NBCheckbits		= 16;
	localparam [NBCheckbits-1:0]	CSCntThreshL	= 103;
	localparam [NBCheckbits-1:0]	CSCntThreshH	= 192;
	localparam							NBSamplesLog	= 7;
	localparam [NBSamplesLog-1:0]	samplesMin		= 64;
	localparam							MaxLockCntLog	= 10;
	

	localparam 							ROCntLength		= 16;
	




	wire rst, clk, xtal_clk;

	assign rst = ~n_reset;
	

	xtal xtal_inst (
		.XTL(clk_in),
		.XTLOSC_CCC(xtal_clk)
	);


	pll1 pll1_inst (
		.XTLOSC(xtal_clk),
		.GL0(clk)
	);





	wire 	[CSCntWidth-1:0] 	CSCnt;
	wire 	[ROLength*2-1:0] 	RO0Sel, RO1Sel;
	wire 							RO0Clk, RO1Clk, CSReq, ROEnable, CSAck;
	
	assign ROEnable = n_reset;


	matchedRO #(
		.length(ROLength)
	) RO0 (
		.sel(RO0Sel),
		.enable(ROEnable),
		.out(RO0Clk)
	);
	
	matchedRO #(
		.length(ROLength)
	) RO1 (
		.sel(RO1Sel),
		.enable(ROEnable),
		.out(RO1Clk)
	);
	

	coherentSampler #(
		.cntWidth(CSCntWidth)
	) CSSampler (
		.clk0(RO0Clk),
		.clk1(RO1Clk),
		.rst(rst),
		.cnt(CSCnt),
		.req(CSReq),
		.ack(CSAck)
	);
	




	wire matched, noFound, locked;


	matchingController #(
		.CSCntLength(CSCntWidth),
		.NBCheckbits(NBCheckbits),
		.CSCntThreshL(CSCntThreshL),
		.CSCntThreshH(CSCntThreshH),
		.ROLength(ROLength),
		.NBSamplesLog(NBSamplesLog),
		.samplesMin(samplesMin),
		.MaxLockCntLog(MaxLockCntLog)
	) MC (
		.clk(clk), 
		.rst(rst), 
		.CSCnt(CSCnt), 
		.CSReq(CSReq), 
		.RO0Sel(RO0Sel),
		.RO1Sel(RO1Sel),
		.CSAck(CSAck),
		.matched(matched),
		.noFound(noFound),
		.locked(locked)
	);




			
	generate
		if (debugMode) begin : scopeDebug


			wire [ROCntLength-1:0] RO0Cnt, ClkCnt, RO1Cnt;
	
			ROCounter #(
				.length(ROCntLength)
			) ROCnter (
				.clk(clk), 
				.rst(rst), 
				.RO0In(RO0Clk),
				.RO1In(RO1Clk),
				.RO0Cnt(RO0Cnt),
				.RO1Cnt(RO1Cnt),
				.ClkCnt(ClkCnt)
			);


			wire [7:0] randByte;
	
			randShifter RS (
				.clk(clk),
				.rst(rst),
				.randBit(CSCnt[0]),
				.CSReq(CSReq),
				.randByte(randByte)
			);

			end
		endgenerate





	wire [7:0] tx_byte;
	wire transmit, is_transmitting;
	

	generate
		if (debugMode) begin


			sampleToTransmit S2T (
				.CSReq(CSReq), 
				.is_transmitting(is_transmitting),
				.rst(rst),
				.clk(clk),
				.tx_byte(tx_byte),
				.transmit(transmit),
				.CSCnt(CSCnt),
				.ROSel({RO1Sel, RO0Sel}),
				.RO0Cnt(scopeDebug.RO0Cnt),
				.RO1Cnt(scopeDebug.RO1Cnt),
				.ClkCnt(scopeDebug.ClkCnt),
				.matched(matched),
				.noFound(noFound),
				.locked(locked),
				.randBits(scopeDebug.randByte)
			);

		end
		else begin


			sampleToTransmitPerf # (
				.NBLSB(NBLSB)
			) S2TP (
				.CSReq(CSReq), 
				.is_transmitting(is_transmitting), 
				.rst(rst), 
				.clk(clk), 
				.CSCnt(CSCnt),
				.tx_byte(tx_byte), 
				.transmit(transmit)
			);

		end
	endgenerate
	

	sendController SC(
		.clk(clk),
		.rst(rst),
		.dataClkP(dataClkP),
		.dataClkN(dataClkN),
		.dataP(dataP),
		.dataN(dataN),
		.syncOutP(syncOutP),
		.syncOutN(syncOutN),
		.transmit(transmit),
		.tx_byte(tx_byte),
		.is_transmitting(is_transmitting)
	);

endmodule
module controller(
		input 	n_reset,
		input 	clk_in,
		output 	dataClkP,
		output 	dataClkN,
		output 	dataP,
		output 	dataN,
		output 	syncOutP,
		output 	syncOutN
	);







	localparam							debugMode		= 1;
	

	localparam 							ROLength 		= 3;
	localparam 							CSCntWidth 		= 16;
	localparam							NBLSB				= 1;
	

	localparam							NBCheckbits		= 16;
	localparam [NBCheckbits-1:0]	CSCntThreshL	= 103;
	localparam [NBCheckbits-1:0]	CSCntThreshH	= 192;
	localparam							NBSamplesLog	= 7;
	localparam [NBSamplesLog-1:0]	samplesMin		= 64;
	localparam							MaxLockCntLog	= 10;
	

	localparam 							ROCntLength		= 16;
	




	wire rst, clk, xtal_clk;

	assign rst = ~n_reset;
	

	xtal xtal_inst (
		.XTL(clk_in),
		.XTLOSC_CCC(xtal_clk)
	);


	pll1 pll1_inst (
		.XTLOSC(xtal_clk),
		.GL0(clk)
	);





	wire 	[CSCntWidth-1:0] 	CSCnt;
	wire 	[ROLength*2-1:0] 	RO0Sel, RO1Sel;
	wire 							RO0Clk, RO1Clk, CSReq, ROEnable, CSAck;
	
	assign ROEnable = n_reset;


	matchedRO #(
		.length(ROLength)
	) RO0 (
		.sel(RO0Sel),
		.enable(ROEnable),
		.out(RO0Clk)
	);
	
	matchedRO #(
		.length(ROLength)
	) RO1 (
		.sel(RO1Sel),
		.enable(ROEnable),
		.out(RO1Clk)
	);
	

	coherentSampler #(
		.cntWidth(CSCntWidth)
	) CSSampler (
		.clk0(RO0Clk),
		.clk1(RO1Clk),
		.rst(rst),
		.cnt(CSCnt),
		.req(CSReq),
		.ack(CSAck)
	);
	




	wire matched, noFound, locked;


	matchingController #(
		.CSCntLength(CSCntWidth),
		.NBCheckbits(NBCheckbits),
		.CSCntThreshL(CSCntThreshL),
		.CSCntThreshH(CSCntThreshH),
		.ROLength(ROLength),
		.NBSamplesLog(NBSamplesLog),
		.samplesMin(samplesMin),
		.MaxLockCntLog(MaxLockCntLog)
	) MC (
		.clk(clk), 
		.rst(rst), 
		.CSCnt(CSCnt), 
		.CSReq(CSReq), 
		.RO0Sel(RO0Sel),
		.RO1Sel(RO1Sel),
		.CSAck(CSAck),
		.matched(matched),
		.noFound(noFound),
		.locked(locked)
	);




			
	generate
		if (debugMode) begin : scopeDebug


			wire [ROCntLength-1:0] RO0Cnt, ClkCnt, RO1Cnt;
	
			ROCounter #(
				.length(ROCntLength)
			) ROCnter (
				.clk(clk), 
				.rst(rst), 
				.RO0In(RO0Clk),
				.RO1In(RO1Clk),
				.RO0Cnt(RO0Cnt),
				.RO1Cnt(RO1Cnt),
				.ClkCnt(ClkCnt)
			);


			wire [7:0] randByte;
	
			randShifter RS (
				.clk(clk),
				.rst(rst),
				.randBit(CSCnt[0]),
				.CSReq(CSReq),
				.randByte(randByte)
			);

			end
		endgenerate





	wire [7:0] tx_byte;
	wire transmit, is_transmitting;
	

	generate
		if (debugMode) begin


			sampleToTransmit S2T (
				.CSReq(CSReq), 
				.is_transmitting(is_transmitting),
				.rst(rst),
				.clk(clk),
				.tx_byte(tx_byte),
				.transmit(transmit),
				.CSCnt(CSCnt),
				.ROSel({RO1Sel, RO0Sel}),
				.RO0Cnt(scopeDebug.RO0Cnt),
				.RO1Cnt(scopeDebug.RO1Cnt),
				.ClkCnt(scopeDebug.ClkCnt),
				.matched(matched),
				.noFound(noFound),
				.locked(locked),
				.randBits(scopeDebug.randByte)
			);

		end
		else begin


			sampleToTransmitPerf # (
				.NBLSB(NBLSB)
			) S2TP (
				.CSReq(CSReq), 
				.is_transmitting(is_transmitting), 
				.rst(rst), 
				.clk(clk), 
				.CSCnt(CSCnt),
				.tx_byte(tx_byte), 
				.transmit(transmit)
			);

		end
	endgenerate
	

	sendController SC(
		.clk(clk),
		.rst(rst),
		.dataClkP(dataClkP),
		.dataClkN(dataClkN),
		.dataP(dataP),
		.dataN(dataN),
		.syncOutP(syncOutP),
		.syncOutN(syncOutN),
		.transmit(transmit),
		.tx_byte(tx_byte),
		.is_transmitting(is_transmitting)
	);

endmodule