data/full_repos/permissive/120845848/003-key_filter/tb/key_filter_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/120845848/003-key_filter/tb/key_filter_tb.v:27: Unsupported: Ignoring delay on this delayed statement.\n always#(20/2) clk_tb <= !clk_tb;\n       ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/120845848/003-key_filter/tb/key_filter_tb.v:32: Unsupported: Ignoring delay on this delayed statement.\n  #(20*10);\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/120845848/003-key_filter/tb/key_filter_tb.v:34: Unsupported: Ignoring delay on this delayed statement.\n  #(20*10);\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/120845848/003-key_filter/tb/key_filter_tb.v:37: Unsupported: Ignoring delay on this delayed statement.\n  #(20*3);\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/120845848/003-key_filter/tb/key_filter_tb.v:40: Unsupported: Ignoring delay on this delayed statement.\n  #80_000_000;\n  ^\n%Error: data/full_repos/permissive/120845848/003-key_filter/tb/key_filter_tb.v:11: Cannot find file containing module: \'key_filter\'\n key_filter key_filter0(\n ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/120845848/003-key_filter/tb,data/full_repos/permissive/120845848/key_filter\n             data/full_repos/permissive/120845848/003-key_filter/tb,data/full_repos/permissive/120845848/key_filter.v\n             data/full_repos/permissive/120845848/003-key_filter/tb,data/full_repos/permissive/120845848/key_filter.sv\n             key_filter\n             key_filter.v\n             key_filter.sv\n             obj_dir/key_filter\n             obj_dir/key_filter.v\n             obj_dir/key_filter.sv\n%Error: data/full_repos/permissive/120845848/003-key_filter/tb/key_filter_tb.v:21: Cannot find file containing module: \'key_model\'\n key_model key(\n ^~~~~~~~~\n%Error: Exiting due to 2 error(s), 5 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module key_filter_tb();
	reg clk_tb;
	reg rst_n_tb;
	wire key_pin_tb;
	wire key_status_tb;
	wire key_event_tb;
	
	key_filter key_filter0(
		.clk(clk_tb),
		.rst_n(rst_n_tb),
		.key_pin(key_pin_tb),
		.key_status(key_status_tb),
		.key_event(key_event_tb)
	);
	
	reg press_tb;
	
	key_model key(
		.press(press_tb),
		.key(key_pin_tb)
	);
	
	initial clk_tb = 1'b1;
	always#(`clk_freq/2) clk_tb <= !clk_tb;
	
	initial begin
		press_tb = 0;
		rst_n_tb = 0;
		#(`clk_freq*10);
		rst_n_tb = 1;
		#(`clk_freq*10);
		
		press_tb = 1;
		#(`clk_freq*3);
		press_tb = 0;
		
		#80_000_000;
		
		$stop;
	end
	
endmodule
module key_filter_tb();

	reg clk_tb;
	reg rst_n_tb;
	wire key_pin_tb;
	wire key_status_tb;
	wire key_event_tb;
	
	key_filter key_filter0(
		.clk(clk_tb),
		.rst_n(rst_n_tb),
		.key_pin(key_pin_tb),
		.key_status(key_status_tb),
		.key_event(key_event_tb)
	);
	
	reg press_tb;
	
	key_model key(
		.press(press_tb),
		.key(key_pin_tb)
	);
	
	initial clk_tb = 1'b1;
	always#(`clk_freq/2) clk_tb <= !clk_tb;
	
	initial begin
		press_tb = 0;
		rst_n_tb = 0;
		#(`clk_freq*10);
		rst_n_tb = 1;
		#(`clk_freq*10);
		
		press_tb = 1;
		#(`clk_freq*3);
		press_tb = 0;
		
		#80_000_000;
		
		$stop;
	end
	
endmodule