data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v
1: b'%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:33: Little bit endian vector: MSB < LSB of bit range: 0:9\ninput [0:9] chanx_left_in;\n      ^\n                    ... Use "/* verilator lint_off LITENDIAN */" and lint_on around source to disable this message.\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:35: Little bit endian vector: MSB < LSB of bit range: 0:9\ninput [0:9] chanx_right_in;\n      ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:39: Little bit endian vector: MSB < LSB of bit range: 0:9\noutput [0:9] chanx_left_out;\n       ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:41: Little bit endian vector: MSB < LSB of bit range: 0:9\noutput [0:9] chanx_right_out;\n       ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:65: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_0_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:66: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_0_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:67: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_1_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:68: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_1_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:69: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_2_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:70: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_2_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:71: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_3_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:72: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_3_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:73: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_4_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:74: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_4_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:75: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_5_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:76: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_5_sram_inv;\n     ^\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:168: Cannot find file containing module: \'mux_2level_tapbuf_size2\'\n mux_2level_tapbuf_size2 mux_bottom_ipin_0 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing,data/full_repos/permissive/137416811/mux_2level_tapbuf_size2\n             data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing,data/full_repos/permissive/137416811/mux_2level_tapbuf_size2.v\n             data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing,data/full_repos/permissive/137416811/mux_2level_tapbuf_size2.sv\n             mux_2level_tapbuf_size2\n             mux_2level_tapbuf_size2.v\n             mux_2level_tapbuf_size2.sv\n             obj_dir/mux_2level_tapbuf_size2\n             obj_dir/mux_2level_tapbuf_size2.v\n             obj_dir/mux_2level_tapbuf_size2.sv\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:174: Cannot find file containing module: \'mux_2level_tapbuf_size2\'\n mux_2level_tapbuf_size2 mux_bottom_ipin_1 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:180: Cannot find file containing module: \'mux_2level_tapbuf_size2\'\n mux_2level_tapbuf_size2 mux_bottom_ipin_2 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:186: Cannot find file containing module: \'mux_2level_tapbuf_size2\'\n mux_2level_tapbuf_size2 mux_bottom_ipin_3 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:192: Cannot find file containing module: \'mux_2level_tapbuf_size2\'\n mux_2level_tapbuf_size2 mux_bottom_ipin_4 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:198: Cannot find file containing module: \'mux_2level_tapbuf_size2\'\n mux_2level_tapbuf_size2 mux_bottom_ipin_5 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:204: Cannot find file containing module: \'mux_2level_tapbuf_size2_mem\'\n mux_2level_tapbuf_size2_mem mem_bottom_ipin_0 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:212: Cannot find file containing module: \'mux_2level_tapbuf_size2_mem\'\n mux_2level_tapbuf_size2_mem mem_bottom_ipin_1 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:220: Cannot find file containing module: \'mux_2level_tapbuf_size2_mem\'\n mux_2level_tapbuf_size2_mem mem_bottom_ipin_2 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:228: Cannot find file containing module: \'mux_2level_tapbuf_size2_mem\'\n mux_2level_tapbuf_size2_mem mem_bottom_ipin_3 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:236: Cannot find file containing module: \'mux_2level_tapbuf_size2_mem\'\n mux_2level_tapbuf_size2_mem mem_bottom_ipin_4 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/cbx_1__1_.v:244: Cannot find file containing module: \'mux_2level_tapbuf_size2_mem\'\n mux_2level_tapbuf_size2_mem mem_bottom_ipin_5 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 12 error(s), 16 warning(s)\n'
module cbx_1__1_(pReset,
                 prog_clk,
                 chanx_left_in,
                 chanx_right_in,
                 ccff_head,
                 chanx_left_out,
                 chanx_right_out,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_6_,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_7_,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_8_,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_9_,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_10_,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_11_,
                 ccff_tail);

input [0:0] pReset;

input [0:0] prog_clk;

input [0:9] chanx_left_in;

input [0:9] chanx_right_in;

input [0:0] ccff_head;

output [0:9] chanx_left_out;

output [0:9] chanx_right_out;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_6_;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_7_;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_8_;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_9_;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_10_;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_11_;

output [0:0] ccff_tail;









wire [0:1] mux_2level_tapbuf_size2_0_sram;
wire [0:1] mux_2level_tapbuf_size2_0_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_1_sram;
wire [0:1] mux_2level_tapbuf_size2_1_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_2_sram;
wire [0:1] mux_2level_tapbuf_size2_2_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_3_sram;
wire [0:1] mux_2level_tapbuf_size2_3_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_4_sram;
wire [0:1] mux_2level_tapbuf_size2_4_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_5_sram;
wire [0:1] mux_2level_tapbuf_size2_5_sram_inv;
wire [0:0] mux_2level_tapbuf_size2_mem_0_ccff_tail;
wire [0:0] mux_2level_tapbuf_size2_mem_1_ccff_tail;
wire [0:0] mux_2level_tapbuf_size2_mem_2_ccff_tail;
wire [0:0] mux_2level_tapbuf_size2_mem_3_ccff_tail;
wire [0:0] mux_2level_tapbuf_size2_mem_4_ccff_tail;





	assign chanx_right_out[0] = chanx_left_in[0];



	assign chanx_right_out[1] = chanx_left_in[1];



	assign chanx_right_out[2] = chanx_left_in[2];



	assign chanx_right_out[3] = chanx_left_in[3];



	assign chanx_right_out[4] = chanx_left_in[4];



	assign chanx_right_out[5] = chanx_left_in[5];



	assign chanx_right_out[6] = chanx_left_in[6];



	assign chanx_right_out[7] = chanx_left_in[7];



	assign chanx_right_out[8] = chanx_left_in[8];



	assign chanx_right_out[9] = chanx_left_in[9];



	assign chanx_left_out[0] = chanx_right_in[0];



	assign chanx_left_out[1] = chanx_right_in[1];



	assign chanx_left_out[2] = chanx_right_in[2];



	assign chanx_left_out[3] = chanx_right_in[3];



	assign chanx_left_out[4] = chanx_right_in[4];



	assign chanx_left_out[5] = chanx_right_in[5];



	assign chanx_left_out[6] = chanx_right_in[6];



	assign chanx_left_out[7] = chanx_right_in[7];



	assign chanx_left_out[8] = chanx_right_in[8];



	assign chanx_left_out[9] = chanx_right_in[9];




	mux_2level_tapbuf_size2 mux_bottom_ipin_0 (
		.in({chanx_left_in[0], chanx_right_in[0]}),
		.sram(mux_2level_tapbuf_size2_0_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_0_sram_inv[0:1]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_6_));

	mux_2level_tapbuf_size2 mux_bottom_ipin_1 (
		.in({chanx_left_in[1], chanx_right_in[1]}),
		.sram(mux_2level_tapbuf_size2_1_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_1_sram_inv[0:1]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_7_));

	mux_2level_tapbuf_size2 mux_bottom_ipin_2 (
		.in({chanx_left_in[2], chanx_right_in[2]}),
		.sram(mux_2level_tapbuf_size2_2_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_2_sram_inv[0:1]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_8_));

	mux_2level_tapbuf_size2 mux_bottom_ipin_3 (
		.in({chanx_left_in[3], chanx_right_in[3]}),
		.sram(mux_2level_tapbuf_size2_3_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_3_sram_inv[0:1]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_9_));

	mux_2level_tapbuf_size2 mux_bottom_ipin_4 (
		.in({chanx_left_in[4], chanx_right_in[4]}),
		.sram(mux_2level_tapbuf_size2_4_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_4_sram_inv[0:1]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_10_));

	mux_2level_tapbuf_size2 mux_bottom_ipin_5 (
		.in({chanx_left_in[5], chanx_right_in[5]}),
		.sram(mux_2level_tapbuf_size2_5_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_5_sram_inv[0:1]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_11_));

	mux_2level_tapbuf_size2_mem mem_bottom_ipin_0 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(ccff_head),
		.ccff_tail(mux_2level_tapbuf_size2_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_0_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_0_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_bottom_ipin_1 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_1_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_1_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_1_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_bottom_ipin_2 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_1_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_2_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_2_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_2_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_bottom_ipin_3 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_2_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_3_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_3_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_3_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_bottom_ipin_4 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_3_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_4_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_4_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_4_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_bottom_ipin_5 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_4_ccff_tail),
		.ccff_tail(ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_5_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_5_sram_inv[0:1]));

endmodule
module cbx_1__1_(pReset,
                 prog_clk,
                 chanx_left_in,
                 chanx_right_in,
                 ccff_head,
                 chanx_left_out,
                 chanx_right_out,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_6_,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_7_,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_8_,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_9_,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_10_,
                 top_grid_bottom_width_0_height_0_subtile_0__pin_I_11_,
                 ccff_tail);


input [0:0] pReset;

input [0:0] prog_clk;

input [0:9] chanx_left_in;

input [0:9] chanx_right_in;

input [0:0] ccff_head;

output [0:9] chanx_left_out;

output [0:9] chanx_right_out;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_6_;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_7_;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_8_;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_9_;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_10_;

output [0:0] top_grid_bottom_width_0_height_0_subtile_0__pin_I_11_;

output [0:0] ccff_tail;









wire [0:1] mux_2level_tapbuf_size2_0_sram;
wire [0:1] mux_2level_tapbuf_size2_0_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_1_sram;
wire [0:1] mux_2level_tapbuf_size2_1_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_2_sram;
wire [0:1] mux_2level_tapbuf_size2_2_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_3_sram;
wire [0:1] mux_2level_tapbuf_size2_3_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_4_sram;
wire [0:1] mux_2level_tapbuf_size2_4_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_5_sram;
wire [0:1] mux_2level_tapbuf_size2_5_sram_inv;
wire [0:0] mux_2level_tapbuf_size2_mem_0_ccff_tail;
wire [0:0] mux_2level_tapbuf_size2_mem_1_ccff_tail;
wire [0:0] mux_2level_tapbuf_size2_mem_2_ccff_tail;
wire [0:0] mux_2level_tapbuf_size2_mem_3_ccff_tail;
wire [0:0] mux_2level_tapbuf_size2_mem_4_ccff_tail;





	assign chanx_right_out[0] = chanx_left_in[0];



	assign chanx_right_out[1] = chanx_left_in[1];



	assign chanx_right_out[2] = chanx_left_in[2];



	assign chanx_right_out[3] = chanx_left_in[3];



	assign chanx_right_out[4] = chanx_left_in[4];



	assign chanx_right_out[5] = chanx_left_in[5];



	assign chanx_right_out[6] = chanx_left_in[6];



	assign chanx_right_out[7] = chanx_left_in[7];



	assign chanx_right_out[8] = chanx_left_in[8];



	assign chanx_right_out[9] = chanx_left_in[9];



	assign chanx_left_out[0] = chanx_right_in[0];



	assign chanx_left_out[1] = chanx_right_in[1];



	assign chanx_left_out[2] = chanx_right_in[2];



	assign chanx_left_out[3] = chanx_right_in[3];



	assign chanx_left_out[4] = chanx_right_in[4];



	assign chanx_left_out[5] = chanx_right_in[5];



	assign chanx_left_out[6] = chanx_right_in[6];



	assign chanx_left_out[7] = chanx_right_in[7];



	assign chanx_left_out[8] = chanx_right_in[8];



	assign chanx_left_out[9] = chanx_right_in[9];




	mux_2level_tapbuf_size2 mux_bottom_ipin_0 (
		.in({chanx_left_in[0], chanx_right_in[0]}),
		.sram(mux_2level_tapbuf_size2_0_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_0_sram_inv[0:1]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_6_));

	mux_2level_tapbuf_size2 mux_bottom_ipin_1 (
		.in({chanx_left_in[1], chanx_right_in[1]}),
		.sram(mux_2level_tapbuf_size2_1_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_1_sram_inv[0:1]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_7_));

	mux_2level_tapbuf_size2 mux_bottom_ipin_2 (
		.in({chanx_left_in[2], chanx_right_in[2]}),
		.sram(mux_2level_tapbuf_size2_2_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_2_sram_inv[0:1]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_8_));

	mux_2level_tapbuf_size2 mux_bottom_ipin_3 (
		.in({chanx_left_in[3], chanx_right_in[3]}),
		.sram(mux_2level_tapbuf_size2_3_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_3_sram_inv[0:1]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_9_));

	mux_2level_tapbuf_size2 mux_bottom_ipin_4 (
		.in({chanx_left_in[4], chanx_right_in[4]}),
		.sram(mux_2level_tapbuf_size2_4_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_4_sram_inv[0:1]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_10_));

	mux_2level_tapbuf_size2 mux_bottom_ipin_5 (
		.in({chanx_left_in[5], chanx_right_in[5]}),
		.sram(mux_2level_tapbuf_size2_5_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_5_sram_inv[0:1]),
		.out(top_grid_bottom_width_0_height_0_subtile_0__pin_I_11_));

	mux_2level_tapbuf_size2_mem mem_bottom_ipin_0 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(ccff_head),
		.ccff_tail(mux_2level_tapbuf_size2_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_0_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_0_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_bottom_ipin_1 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_1_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_1_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_1_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_bottom_ipin_2 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_1_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_2_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_2_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_2_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_bottom_ipin_3 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_2_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_3_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_3_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_3_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_bottom_ipin_4 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_3_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_4_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_4_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_4_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_bottom_ipin_5 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_4_ccff_tail),
		.ccff_tail(ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_5_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_5_sram_inv[0:1]));

endmodule