data/full_repos/permissive/218463548/hardware/sim/unit_verif/env/tb_vseqr.sv
 line:19: before: "class"
1: b'%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/env/tb_vseqr.sv:19: Unsupported: classes\nclass tb_vseqr extends uvm_sequencer;\n^~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/env/tb_vseqr.sv:19: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER\nclass tb_vseqr extends uvm_sequencer;\n                       ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/env/tb_vseqr.sv:31: Define or directive not defined: \'`uvm_component_utils_begin\'\n    `uvm_component_utils_begin(tb_vseqr)\n    ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/env/tb_vseqr.sv:32: Define or directive not defined: \'`uvm_field_object\'\n        `uvm_field_object (cfg_obj, UVM_ALL_ON)\n        ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/env/tb_vseqr.sv:33: Define or directive not defined: \'`uvm_component_utils_end\'\n    `uvm_component_utils_end\n    ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/env/tb_vseqr.sv:35: Unsupported: new constructor\n    function new(string name="tb_vseqr", uvm_component parent);\n             ^~~\n%Error: data/full_repos/permissive/218463548/hardware/sim/unit_verif/env/tb_vseqr.sv:35: syntax error, unexpected IDENTIFIER, expecting \')\'\n    function new(string name="tb_vseqr", uvm_component parent);\n                                                       ^~~~~~\n%Error: Exiting due to 7 error(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
function new(string name="tb_vseqr", uvm_component parent);
        super.new(name, parent);
    endfunction
function new(string name="tb_vseqr", uvm_component parent);

        super.new(name, parent);
    endfunction