data/full_repos/permissive/151904248/UART Buffer Example/pos_edge_counter.v
1: b'%Error: Cannot find file containing module: Buffer\n        ... Looked in:\n             data/full_repos/permissive/151904248/UART/Buffer\n             data/full_repos/permissive/151904248/UART/Buffer.v\n             data/full_repos/permissive/151904248/UART/Buffer.sv\n             Buffer\n             Buffer.v\n             Buffer.sv\n             obj_dir/Buffer\n             obj_dir/Buffer.v\n             obj_dir/Buffer.sv\n%Error: Cannot find file containing module: Example,data/full_repos/permissive/151904248\n%Error: Cannot find file containing module: data/full_repos/permissive/151904248/UART\n%Error: Cannot find file containing module: Example/pos_edge_counter.v\n%Error: Exiting due to 4 error(s)\n'
module pos_edge_counter
#(
parameter width = 16
)
(
	input wire clk,
	input wire reset,
	output reg [width-1:0] count
);

initial begin
	count <= 0;
end


always @ (posedge clk or negedge reset) begin
	if(reset == 1'b0) begin
		count <= 0;
	end
	else begin
		count <= count + 1;
	end
end

endmodule
module pos_edge_counter
#(
parameter width = 16
)
(
	input wire clk,
	input wire reset,
	output reg [width-1:0] count
);


initial begin
	count <= 0;
end


always @ (posedge clk or negedge reset) begin
	if(reset == 1'b0) begin
		count <= 0;
	end
	else begin
		count <= count + 1;
	end
end

endmodule