data/full_repos/permissive/143278/ivltests/pr823.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/pr823.v:7: Unsupported: Ignoring delay on this delayed statement.\n      #1 if (foo !== 32\'d0) begin\n      ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module main;

   reg [31:0] foo;
   initial foo = 'b0;

   initial begin
      #1 if (foo !== 32'd0) begin
	 $display("FAILED");
	 $finish;
      end

      $display("PASSED");
   end

endmodule
module main;


   reg [31:0] foo;
   initial foo = 'b0;

   initial begin
      #1 if (foo !== 32'd0) begin
	 $display("FAILED");
	 $finish;
      end

      $display("PASSED");
   end

endmodule