data/full_repos/permissive/127511545/src/ALU.v
1: b'%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:94: Signal definition not found, creating implicitly: \'NotB\'\n not #(50) inv0(NotB, B);\n                ^~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:79: Signal definition not found, creating implicitly: \'AddSubtractOutput\'\n AddSubtract addsub0(AddSubtractOutput, CarryOut, A, B, CarryIn, ALUControl[1]);\n                     ^~~~~~~~~~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:80: Signal definition not found, creating implicitly: \'XorOut\'\n xor #(50) x0(XorOut, A, B);\n              ^~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:48: Signal definition not found, creating implicitly: \'NotCarryout31\'\n                                                                    : ... Suggested alternative: \'Carryout\'\n not #(50) inv0(NotCarryout31, Carryout[31]);\n                ^~~~~~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:52: Signal definition not found, creating implicitly: \'AddSubtract31Output\'\n AddSubtract addsub0(AddSubtract31Output, Carryout31, BusA[31], BusB[31], Carryout[30], ALUControl[1]);   \n                     ^~~~~~~~~~~~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:52: Signal definition not found, creating implicitly: \'Carryout31\'\n                                                                    : ... Suggested alternative: \'Carryout\'\n AddSubtract addsub0(AddSubtract31Output, Carryout31, BusA[31], BusB[31], Carryout[30], ALUControl[1]);   \n                                          ^~~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:56: Signal definition not found, creating implicitly: \'O1\'\n or #(50) o0(O1, Output[0], Output[1], Output[2], Output[3]);\n             ^~\n%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:57: Signal definition not found, creating implicitly: \'O2\'\n                                                                    : ... Suggested alternative: \'O1\'\n or #(50) o1(O2, Output[4], Output[5], Output[6], Output[7]);\n             ^~\n%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:58: Signal definition not found, creating implicitly: \'O3\'\n                                                                    : ... Suggested alternative: \'O1\'\n or #(50) o2(O3, Output[8], Output[9], Output[10], Output[11]);\n             ^~\n%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:59: Signal definition not found, creating implicitly: \'O4\'\n                                                                    : ... Suggested alternative: \'O1\'\n or #(50) o3(O4, Output[12], Output[13], Output[14], Output[15]);\n             ^~\n%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:60: Signal definition not found, creating implicitly: \'O5\'\n                                                                    : ... Suggested alternative: \'O1\'\n or #(50) o4(O5, Output[16], Output[17], Output[18], Output[19]);\n             ^~\n%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:61: Signal definition not found, creating implicitly: \'O6\'\n                                                                    : ... Suggested alternative: \'O1\'\n or #(50) o5(O6, Output[20], Output[21], Output[22], Output[23]);\n             ^~\n%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:62: Signal definition not found, creating implicitly: \'O7\'\n                                                                    : ... Suggested alternative: \'O1\'\n or #(50) o6(O7, Output[24], Output[25], Output[26], Output[27]);\n             ^~\n%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:63: Signal definition not found, creating implicitly: \'O8\'\n                                                                    : ... Suggested alternative: \'O1\'\n or #(50) o7(O8, Output[28], Output[29], Output[30], Output[31]);\n             ^~\n%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:64: Signal definition not found, creating implicitly: \'O9\'\n                                                                    : ... Suggested alternative: \'O1\'\n or #(50) o8(O9, O1, O2, O3, O4);\n             ^~\n%Warning-IMPLICIT: data/full_repos/permissive/127511545/src/ALU.v:65: Signal definition not found, creating implicitly: \'O10\'\n                                                                    : ... Suggested alternative: \'O1\'\n or #(50) o9(O10, O5, O6, O7, O8);\n             ^~~\n%Error: data/full_repos/permissive/127511545/src/ALU.v:95: Cannot find file containing module: \'MUX21\'\n MUX21 mux0(B1, B, NotB, Selector);\n ^~~~~\n        ... Looked in:\n             data/full_repos/permissive/127511545/src,data/full_repos/permissive/127511545/MUX21\n             data/full_repos/permissive/127511545/src,data/full_repos/permissive/127511545/MUX21.v\n             data/full_repos/permissive/127511545/src,data/full_repos/permissive/127511545/MUX21.sv\n             MUX21\n             MUX21.v\n             MUX21.sv\n             obj_dir/MUX21\n             obj_dir/MUX21.v\n             obj_dir/MUX21.sv\n%Error: data/full_repos/permissive/127511545/src/ALU.v:96: Cannot find file containing module: \'Adder1Bit\'\n Adder1Bit adder0(Output, Cout, A, B1, Cin);\n ^~~~~~~~~\n%Error: data/full_repos/permissive/127511545/src/ALU.v:81: Cannot find file containing module: \'MUX21\'\n MUX21 mux0(XorLessOut, XorOut, Less, ALUControl[1]);\n ^~~~~\n%Error: data/full_repos/permissive/127511545/src/ALU.v:82: Cannot find file containing module: \'MUX21\'\n MUX21 mux1(Result, AddSubtractOutput, XorLessOut, ALUControl[0]);\n ^~~~~\n%Error: data/full_repos/permissive/127511545/src/ALU.v:49: Cannot find file containing module: \'MUX21\'\n MUX21 mux0(CarryOut, Carryout[31], NotCarryout31, ALUControl[1]);  \n ^~~~~\n%Error: Exiting due to 5 error(s), 16 warning(s)\n'
module AddSubtract(Output, Cout, A, B, Cin, Selector);

	output Output, Cout;
	input A, B, Cin, Selector;

	not #(50) inv0(NotB, B);
	MUX21 mux0(B1, B, NotB, Selector);
	Adder1Bit adder0(Output, Cout, A, B1, Cin);

endmodule
module AddSubtract(Output, Cout, A, B, Cin, Selector);


	output Output, Cout;
	input A, B, Cin, Selector;

	not #(50) inv0(NotB, B);
	MUX21 mux0(B1, B, NotB, Selector);
	Adder1Bit adder0(Output, Cout, A, B1, Cin);

endmodule