data/full_repos/permissive/109846502/StateMachineTest.v
1: b'%Error: data/full_repos/permissive/109846502/StateMachineTest.v:2: Cannot find include file: defines.vh\n`include "defines.vh" \n         ^~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/109846502,data/full_repos/permissive/109846502/defines.vh\n             data/full_repos/permissive/109846502,data/full_repos/permissive/109846502/defines.vh.v\n             data/full_repos/permissive/109846502,data/full_repos/permissive/109846502/defines.vh.sv\n             defines.vh\n             defines.vh.v\n             defines.vh.sv\n             obj_dir/defines.vh\n             obj_dir/defines.vh.v\n             obj_dir/defines.vh.sv\n%Warning-STMTDLY: data/full_repos/permissive/109846502/StateMachineTest.v:50: Unsupported: Ignoring delay on this delayed statement.\n  #100;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/109846502/StateMachineTest.v:52: Unsupported: Ignoring delay on this delayed statement.\n  forever #1 clk = ~clk;\n          ^\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:56: Define or directive not defined: \'`KEY_NONE\'\n  key = `KEY_NONE;\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:56: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n  key = `KEY_NONE;\n                 ^\n%Warning-STMTDLY: data/full_repos/permissive/109846502/StateMachineTest.v:58: Unsupported: Ignoring delay on this delayed statement.\n #100;\n ^\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:59: Define or directive not defined: \'`KEY_2\'\n  key = `KEY_2;\n        ^~~~~~\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:59: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n  key = `KEY_2;\n              ^\n%Warning-STMTDLY: data/full_repos/permissive/109846502/StateMachineTest.v:60: Unsupported: Ignoring delay on this delayed statement.\n #10;\n ^\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:61: Define or directive not defined: \'`KEY_NONE\'\n  key = `KEY_NONE;\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:61: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n  key = `KEY_NONE;\n                 ^\n%Warning-STMTDLY: data/full_repos/permissive/109846502/StateMachineTest.v:62: Unsupported: Ignoring delay on this delayed statement.\n #10;\n ^\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:63: Define or directive not defined: \'`KEY_A\'\n  key = `KEY_A;\n        ^~~~~~\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:63: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n  key = `KEY_A;\n              ^\n%Warning-STMTDLY: data/full_repos/permissive/109846502/StateMachineTest.v:64: Unsupported: Ignoring delay on this delayed statement.\n #10;\n ^\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:65: Define or directive not defined: \'`KEY_NONE\'\n  key = `KEY_NONE;\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:65: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n  key = `KEY_NONE;\n                 ^\n%Warning-STMTDLY: data/full_repos/permissive/109846502/StateMachineTest.v:66: Unsupported: Ignoring delay on this delayed statement.\n #10;\n ^\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:67: Define or directive not defined: \'`KEY_4\'\n  key = `KEY_4;\n        ^~~~~~\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:67: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n  key = `KEY_4;\n              ^\n%Warning-STMTDLY: data/full_repos/permissive/109846502/StateMachineTest.v:68: Unsupported: Ignoring delay on this delayed statement.\n #10;\n ^\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:69: Define or directive not defined: \'`KEY_NONE\'\n  key = `KEY_NONE;\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:69: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n  key = `KEY_NONE;\n                 ^\n%Warning-STMTDLY: data/full_repos/permissive/109846502/StateMachineTest.v:70: Unsupported: Ignoring delay on this delayed statement.\n #10;\n ^\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:71: Define or directive not defined: \'`KEY_D\'\n  key = `KEY_D;\n        ^~~~~~\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:71: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n  key = `KEY_D;\n              ^\n%Warning-STMTDLY: data/full_repos/permissive/109846502/StateMachineTest.v:72: Unsupported: Ignoring delay on this delayed statement.\n #10;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/109846502/StateMachineTest.v:74: Unsupported: Ignoring delay on this delayed statement.\n #10;\n ^\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:75: Define or directive not defined: \'`KEY_NONE\'\n  key = `KEY_NONE;\n        ^~~~~~~~~\n%Error: data/full_repos/permissive/109846502/StateMachineTest.v:75: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n  key = `KEY_NONE;\n                 ^\n%Error: Exiting due to 19 error(s), 11 warning(s)\n'
module StateMachineTest;


	reg [4:0] key;
	reg clk;
	reg rst;
	reg end_obl;


	wire [1:0] ST;
	wire [2:0] ST_L;


	StateMachine uut (
		.key(key), 
		.clk(clk), 
		.rst(rst), 
		.end_obl(end_obl), 
		.ST(ST), 
		.ST_L(ST_L)
	);

	initial begin
		rst = 1'b1;
		clk = 1'b0;
		#100;
		rst = 1'b0;
		forever #1 clk = ~clk;
	end
	
	initial begin
		key = `KEY_NONE;
		end_obl = 1'b0;
	#100;
		key = `KEY_2;
	#10;
		key = `KEY_NONE;
	#10;
		key = `KEY_A;
	#10;
		key = `KEY_NONE;
	#10;
		key = `KEY_4;
	#10;
		key = `KEY_NONE;
	#10;
		key = `KEY_D;
	#10;
		end_obl = 1'b1;
	#10;
		key = `KEY_NONE;
	
		
	end
      
endmodule
module StateMachineTest;



	reg [4:0] key;
	reg clk;
	reg rst;
	reg end_obl;


	wire [1:0] ST;
	wire [2:0] ST_L;


	StateMachine uut (
		.key(key), 
		.clk(clk), 
		.rst(rst), 
		.end_obl(end_obl), 
		.ST(ST), 
		.ST_L(ST_L)
	);

	initial begin
		rst = 1'b1;
		clk = 1'b0;
		#100;
		rst = 1'b0;
		forever #1 clk = ~clk;
	end
	
	initial begin
		key = `KEY_NONE;
		end_obl = 1'b0;
	#100;
		key = `KEY_2;
	#10;
		key = `KEY_NONE;
	#10;
		key = `KEY_A;
	#10;
		key = `KEY_NONE;
	#10;
		key = `KEY_4;
	#10;
		key = `KEY_NONE;
	#10;
		key = `KEY_D;
	#10;
		end_obl = 1'b1;
	#10;
		key = `KEY_NONE;
	
		
	end
      
endmodule