data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v
None: at end of input
1: b'%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:1: Cannot find include file: Util/Math.v\n`include "Util/Math.v" \n         ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu,data/full_repos/permissive/131921633/Util/Math.v\n             data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu,data/full_repos/permissive/131921633/Util/Math.v.v\n             data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu,data/full_repos/permissive/131921633/Util/Math.v.sv\n             Util/Math.v\n             Util/Math.v.v\n             Util/Math.v.sv\n             obj_dir/Util/Math.v\n             obj_dir/Util/Math.v.v\n             obj_dir/Util/Math.v.sv\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:2: Cannot find include file: Mips/Control/Signal/Alu/Signal/Func.v\n`include "Mips/Control/Signal/Alu/Signal/Func.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:3: Cannot find include file: Mips/Type/AluStatus.v\n`include "Mips/Type/AluStatus.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:4: Cannot find include file: Mips/Type/Word.v\n`include "Mips/Type/Word.v" \n         ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:11: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_T\'\n ( `Mips_Control_Signal_Alu_Signal_Func_T (input) func\n   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:11: syntax error, unexpected \'(\', expecting \'[\'\n ( `Mips_Control_Signal_Alu_Signal_Func_T (input) func\n                                           ^~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:12: Define or directive not defined: \'`Mips_Type_Word_T\'\n , `Mips_Type_Word_T (input)  data1\n   ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:13: Define or directive not defined: \'`Mips_Type_Word_T\'\n , `Mips_Type_Word_T (input)  data2\n   ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:14: Define or directive not defined: \'`Mips_Type_Word_T\'\n , `Mips_Type_Word_T (input)  reg_lo\n   ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:15: Define or directive not defined: \'`Mips_Type_Word_T\'\n , `Mips_Type_Word_T (input)  reg_hi\n   ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:16: Define or directive not defined: \'`Mips_Type_Word_T\'\n , `Mips_Type_Word_T (output) res_lo\n   ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:17: Define or directive not defined: \'`Mips_Type_Word_T\'\n , `Mips_Type_Word_T (output) res_hi\n   ^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:18: Define or directive not defined: \'`Mips_Type_AluStatus_T\'\n , `Mips_Type_AluStatus_T (output) status\n   ^~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:21: Define or directive not defined: \'`Util_Math_log2_expr\'\n`Util_Math_log2_expr\n^~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:23: Define or directive not defined: \'`Mips_Type_Word_T\'\n`Mips_Type_Word_T (wire signed) data1$  , data2$  ;\n^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:24: Define or directive not defined: \'`Mips_Type_Word_T\'\n`Mips_Type_Word_T (wire signed) mul_lo$ , mul_hi$ ;\n^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:25: Define or directive not defined: \'`Mips_Type_Word_T\'\n`Mips_Type_Word_T (wire)        mul_lo  , mul_hi  ;\n^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:28: syntax error, unexpected assign\nassign data1$ = data1;\n^~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:34: Define or directive not defined: \'`Mips_Type_Word_T\'\n`Mips_Type_Word_T (reg) res_lo$;\n^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:37: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Add\'\n  `Mips_Control_Signal_Alu_Signal_Func_Add  : res_lo$ =          data1   +   data2  ;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:38: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Sub\'\n  `Mips_Control_Signal_Alu_Signal_Func_Sub  : res_lo$ =          data1   -   data2  ;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:39: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Sll\'\n  `Mips_Control_Signal_Alu_Signal_Func_Sll  : res_lo$ =          data2   <<  shamt  ;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:40: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Sra\'\n  `Mips_Control_Signal_Alu_Signal_Func_Sra  : res_lo$ =          data2$  >>> shamt  ;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:41: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Srl\'\n  `Mips_Control_Signal_Alu_Signal_Func_Srl  : res_lo$ =          data2   >>  shamt  ;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:42: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_And\'\n  `Mips_Control_Signal_Alu_Signal_Func_And  : res_lo$ =          data1   &   data2  ;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:43: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Or\'\n  `Mips_Control_Signal_Alu_Signal_Func_Or   : res_lo$ =          data1   |   data2  ;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:44: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Nor\'\n  `Mips_Control_Signal_Alu_Signal_Func_Nor  : res_lo$ = ~(       data1   |   data2  );\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:45: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Xor\'\n  `Mips_Control_Signal_Alu_Signal_Func_Xor  : res_lo$ =          data1   ^   data2  ;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:46: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Slts\'\n  `Mips_Control_Signal_Alu_Signal_Func_Slts : res_lo$ = DATA_W\'( data1$  <   data2$ );\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:47: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Sltu\'\n  `Mips_Control_Signal_Alu_Signal_Func_Sltu : res_lo$ = DATA_W\'( data1   <   data2  );\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:48: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Muls\'\n  `Mips_Control_Signal_Alu_Signal_Func_Muls : res_lo$ =          mul_lo$ ;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:49: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Mulu\'\n  `Mips_Control_Signal_Alu_Signal_Func_Mulu : res_lo$ =          mul_lo  ;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:52: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Mtlo\'\n  `Mips_Control_Signal_Alu_Signal_Func_Mtlo : res_lo$ =          data1   ;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:53: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Mthi\'\n  `Mips_Control_Signal_Alu_Signal_Func_Mthi : res_lo$ =          data1   ;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:54: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Mflo\'\n  `Mips_Control_Signal_Alu_Signal_Func_Mflo : res_lo$ =          reg_lo  ;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:55: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Mfhi\'\n  `Mips_Control_Signal_Alu_Signal_Func_Mfhi : res_lo$ =          reg_hi  ;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:60: Define or directive not defined: \'`Mips_Type_Word_T\'\n`Mips_Type_Word_T (reg) res_hi$;\n^~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:63: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Muls\'\n  `Mips_Control_Signal_Alu_Signal_Func_Muls : res_hi$ = mul_hi$;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:64: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Mulu\'\n  `Mips_Control_Signal_Alu_Signal_Func_Mulu : res_hi$ = mul_hi;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:67: Define or directive not defined: \'`Mips_Control_Signal_Alu_Signal_Func_Mthi\'\n  `Mips_Control_Signal_Alu_Signal_Func_Mthi : res_hi$ = data1;\n  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:73: syntax error, unexpected assign\nassign zero = ~(|res_lo$);\n^~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:75: syntax error, unexpected assign\nassign less = data1 < data2;\n^~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:77: syntax error, unexpected assign\nassign equal = data1 == data2;\n^~~~~~\n%Error: data/full_repos/permissive/131921633/tv/Mips/Datapath/Alu/alu.v:79: Define or directive not defined: \'`Mips_Type_AluStatus_Pack_Defaults\'\nassign status = `Mips_Type_AluStatus_Pack_Defaults;\n                ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 44 error(s)\n'
module Mips_Datapath_Alu_alu #
	( parameter DATA_W  = 32
	)
	( `Mips_Control_Signal_Alu_Signal_Func_T (input) func
	, `Mips_Type_Word_T (input)  data1
	, `Mips_Type_Word_T (input)  data2
	, `Mips_Type_Word_T (input)  reg_lo
	, `Mips_Type_Word_T (input)  reg_hi
	, `Mips_Type_Word_T (output) res_lo
	, `Mips_Type_Word_T (output) res_hi
	, `Mips_Type_AluStatus_T (output) status
	);

`Util_Math_log2_expr

`Mips_Type_Word_T (wire signed) data1$  , data2$  ;
`Mips_Type_Word_T (wire signed) mul_lo$ , mul_hi$ ;
`Mips_Type_Word_T (wire)        mul_lo  , mul_hi  ;
wire [Util_Math_log2(DATA_W)-1:0] shamt;

assign data1$ = data1;
assign data2$ = data2;
assign {mul_hi, mul_lo} = data1 * data2;
assign {mul_hi$, mul_lo$} = data1$ * data2$;
assign shamt = data1[Util_Math_log2(DATA_W)-1:0];

`Mips_Type_Word_T (reg) res_lo$;
always @(*)
	case(func)
		`Mips_Control_Signal_Alu_Signal_Func_Add  : res_lo$ =          data1   +   data2  ;
		`Mips_Control_Signal_Alu_Signal_Func_Sub  : res_lo$ =          data1   -   data2  ;
		`Mips_Control_Signal_Alu_Signal_Func_Sll  : res_lo$ =          data2   <<  shamt  ;
		`Mips_Control_Signal_Alu_Signal_Func_Sra  : res_lo$ =          data2$  >>> shamt  ;
		`Mips_Control_Signal_Alu_Signal_Func_Srl  : res_lo$ =          data2   >>  shamt  ;
		`Mips_Control_Signal_Alu_Signal_Func_And  : res_lo$ =          data1   &   data2  ;
		`Mips_Control_Signal_Alu_Signal_Func_Or   : res_lo$ =          data1   |   data2  ;
		`Mips_Control_Signal_Alu_Signal_Func_Nor  : res_lo$ = ~(       data1   |   data2  );
		`Mips_Control_Signal_Alu_Signal_Func_Xor  : res_lo$ =          data1   ^   data2  ;
		`Mips_Control_Signal_Alu_Signal_Func_Slts : res_lo$ = DATA_W'( data1$  <   data2$ );
		`Mips_Control_Signal_Alu_Signal_Func_Sltu : res_lo$ = DATA_W'( data1   <   data2  );
		`Mips_Control_Signal_Alu_Signal_Func_Muls : res_lo$ =          mul_lo$ ;
		`Mips_Control_Signal_Alu_Signal_Func_Mulu : res_lo$ =          mul_lo  ;


		`Mips_Control_Signal_Alu_Signal_Func_Mtlo : res_lo$ =          data1   ;
		`Mips_Control_Signal_Alu_Signal_Func_Mthi : res_lo$ =          data1   ;
		`Mips_Control_Signal_Alu_Signal_Func_Mflo : res_lo$ =          reg_lo  ;
		`Mips_Control_Signal_Alu_Signal_Func_Mfhi : res_lo$ =          reg_hi  ;
		default                                   : res_lo$ =          data1   ;
	endcase
assign res_lo = res_lo$;

`Mips_Type_Word_T (reg) res_hi$;
always @(*)
	case(func)
		`Mips_Control_Signal_Alu_Signal_Func_Muls : res_hi$ = mul_hi$;
		`Mips_Control_Signal_Alu_Signal_Func_Mulu : res_hi$ = mul_hi;


		`Mips_Control_Signal_Alu_Signal_Func_Mthi : res_hi$ = data1;
		default                                   : res_hi$ = DATA_W'(0);
	endcase
assign res_hi = res_hi$;

wire zero;
assign zero = ~(|res_lo$);
wire less;
assign less = data1 < data2;
wire equal;
assign equal = data1 == data2;

assign status = `Mips_Type_AluStatus_Pack_Defaults;

endmodule
module Mips_Datapath_Alu_alu #
	( parameter DATA_W  = 32
	)
	( `Mips_Control_Signal_Alu_Signal_Func_T (input) func
	, `Mips_Type_Word_T (input)  data1
	, `Mips_Type_Word_T (input)  data2
	, `Mips_Type_Word_T (input)  reg_lo
	, `Mips_Type_Word_T (input)  reg_hi
	, `Mips_Type_Word_T (output) res_lo
	, `Mips_Type_Word_T (output) res_hi
	, `Mips_Type_AluStatus_T (output) status
	);


`Util_Math_log2_expr

`Mips_Type_Word_T (wire signed) data1$  , data2$  ;
`Mips_Type_Word_T (wire signed) mul_lo$ , mul_hi$ ;
`Mips_Type_Word_T (wire)        mul_lo  , mul_hi  ;
wire [Util_Math_log2(DATA_W)-1:0] shamt;

assign data1$ = data1;
assign data2$ = data2;
assign {mul_hi, mul_lo} = data1 * data2;
assign {mul_hi$, mul_lo$} = data1$ * data2$;
assign shamt = data1[Util_Math_log2(DATA_W)-1:0];

`Mips_Type_Word_T (reg) res_lo$;
always @(*)
	case(func)
		`Mips_Control_Signal_Alu_Signal_Func_Add  : res_lo$ =          data1   +   data2  ;
		`Mips_Control_Signal_Alu_Signal_Func_Sub  : res_lo$ =          data1   -   data2  ;
		`Mips_Control_Signal_Alu_Signal_Func_Sll  : res_lo$ =          data2   <<  shamt  ;
		`Mips_Control_Signal_Alu_Signal_Func_Sra  : res_lo$ =          data2$  >>> shamt  ;
		`Mips_Control_Signal_Alu_Signal_Func_Srl  : res_lo$ =          data2   >>  shamt  ;
		`Mips_Control_Signal_Alu_Signal_Func_And  : res_lo$ =          data1   &   data2  ;
		`Mips_Control_Signal_Alu_Signal_Func_Or   : res_lo$ =          data1   |   data2  ;
		`Mips_Control_Signal_Alu_Signal_Func_Nor  : res_lo$ = ~(       data1   |   data2  );
		`Mips_Control_Signal_Alu_Signal_Func_Xor  : res_lo$ =          data1   ^   data2  ;
		`Mips_Control_Signal_Alu_Signal_Func_Slts : res_lo$ = DATA_W'( data1$  <   data2$ );
		`Mips_Control_Signal_Alu_Signal_Func_Sltu : res_lo$ = DATA_W'( data1   <   data2  );
		`Mips_Control_Signal_Alu_Signal_Func_Muls : res_lo$ =          mul_lo$ ;
		`Mips_Control_Signal_Alu_Signal_Func_Mulu : res_lo$ =          mul_lo  ;


		`Mips_Control_Signal_Alu_Signal_Func_Mtlo : res_lo$ =          data1   ;
		`Mips_Control_Signal_Alu_Signal_Func_Mthi : res_lo$ =          data1   ;
		`Mips_Control_Signal_Alu_Signal_Func_Mflo : res_lo$ =          reg_lo  ;
		`Mips_Control_Signal_Alu_Signal_Func_Mfhi : res_lo$ =          reg_hi  ;
		default                                   : res_lo$ =          data1   ;
	endcase
assign res_lo = res_lo$;

`Mips_Type_Word_T (reg) res_hi$;
always @(*)
	case(func)
		`Mips_Control_Signal_Alu_Signal_Func_Muls : res_hi$ = mul_hi$;
		`Mips_Control_Signal_Alu_Signal_Func_Mulu : res_hi$ = mul_hi;


		`Mips_Control_Signal_Alu_Signal_Func_Mthi : res_hi$ = data1;
		default                                   : res_hi$ = DATA_W'(0);
	endcase
assign res_hi = res_hi$;

wire zero;
assign zero = ~(|res_lo$);
wire less;
assign less = data1 < data2;
wire equal;
assign equal = data1 == data2;

assign status = `Mips_Type_AluStatus_Pack_Defaults;

endmodule