data/full_repos/permissive/167489907/Memory/RAM/RAM_64bit.v
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data/verilator_xmls/ad4fab92-a57c-4e71-9602-c1ffe0c6842d.xml
module byte_barrel_shifter(out, shift_amount, in);


	input [63:0] in;
	input [2:0] shift_amount;
	output [63:0] out;
	
	wire [63:0] shift32, shift16;
	

	assign shift32 = shift_amount[2] ? {in[31:0], in[63:32]} : in;

	assign shift16 = shift_amount[1] ? {shift32[15:0], shift32[63:16]} : shift32;

	assign out = shift_amount[0] ? {shift16[7:0], shift16[63:8]} : shift16;
endmodule
module byte_barrel_shifter(out, shift_amount, in);



	input [63:0] in;
	input [2:0] shift_amount;
	output [63:0] out;
	
	wire [63:0] shift32, shift16;
	

	assign shift32 = shift_amount[2] ? {in[31:0], in[63:32]} : in;

	assign shift16 = shift_amount[1] ? {shift32[15:0], shift32[63:16]} : shift32;

	assign out = shift_amount[0] ? {shift16[7:0], shift16[63:8]} : shift16;
endmodule