data/full_repos/permissive/174783592/WallacePL/Carry8Bit.v
1: b'%Error: data/full_repos/permissive/174783592/WallacePL/Carry8Bit.v:3: Cannot find include file: Adder/FullAdder.v\n`include"Adder/FullAdder.v" \n        ^~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/174783592/WallacePL,data/full_repos/permissive/174783592/Adder/FullAdder.v\n             data/full_repos/permissive/174783592/WallacePL,data/full_repos/permissive/174783592/Adder/FullAdder.v.v\n             data/full_repos/permissive/174783592/WallacePL,data/full_repos/permissive/174783592/Adder/FullAdder.v.sv\n             Adder/FullAdder.v\n             Adder/FullAdder.v.v\n             Adder/FullAdder.v.sv\n             obj_dir/Adder/FullAdder.v\n             obj_dir/Adder/FullAdder.v.v\n             obj_dir/Adder/FullAdder.v.sv\n%Error: data/full_repos/permissive/174783592/WallacePL/Carry8Bit.v:4: Cannot find include file: Adder/HalfAdder.v\n`include"Adder/HalfAdder.v" \n        ^~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n'
module Carry8Bit(m0, m1, m2, u,v);

	input  [7:0] m0 ;
	input  [8:1] m1 ;
	input  [9:2] m2;
	output [9:0] u; 
	output [7:0] v;


	
	
	assign u[0] = m0[0];


	HalfAdder h1(m0[1],m1[1],u[1],v[0]);

	FullAdder fa0(m0[2],m1[2],m2[2],u[2],v[1]);
	FullAdder fa1(m0[3],m1[3],m2[3],u[3],v[2]);
	FullAdder fa2(m0[4],m1[4],m2[4],u[4],v[3]);
	FullAdder fa3(m0[5],m1[5],m2[5],u[5],v[4]);
	FullAdder fa4(m0[6],m1[6],m2[6],u[6],v[5]);
	FullAdder fa5(m0[7],m1[7],m2[7],u[7],v[6]);
	HalfAdder h2(m1[8],m2[8],u[8],v[7]);
	assign u[9] = m2[9];

	

	

	





endmodule
module Carry8Bit(m0, m1, m2, u,v);


	input  [7:0] m0 ;
	input  [8:1] m1 ;
	input  [9:2] m2;
	output [9:0] u; 
	output [7:0] v;


	
	
	assign u[0] = m0[0];


	HalfAdder h1(m0[1],m1[1],u[1],v[0]);

	FullAdder fa0(m0[2],m1[2],m2[2],u[2],v[1]);
	FullAdder fa1(m0[3],m1[3],m2[3],u[3],v[2]);
	FullAdder fa2(m0[4],m1[4],m2[4],u[4],v[3]);
	FullAdder fa3(m0[5],m1[5],m2[5],u[5],v[4]);
	FullAdder fa4(m0[6],m1[6],m2[6],u[6],v[5]);
	FullAdder fa5(m0[7],m1[7],m2[7],u[7],v[6]);
	HalfAdder h2(m1[8],m2[8],u[8],v[7]);
	assign u[9] = m2[9];

	

	

	





endmodule