data/full_repos/permissive/171075078/src/sdram_master_bfm.sv
None: at end of input
1: b'%Error: data/full_repos/permissive/171075078/src/sdram_master_bfm.sv:4: Cannot find include file: sdram_macros.svh\n`include "sdram_macros.svh" \n         ^~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/171075078/src,data/full_repos/permissive/171075078/sdram_macros.svh\n             data/full_repos/permissive/171075078/src,data/full_repos/permissive/171075078/sdram_macros.svh.v\n             data/full_repos/permissive/171075078/src,data/full_repos/permissive/171075078/sdram_macros.svh.sv\n             sdram_macros.svh\n             sdram_macros.svh.v\n             sdram_macros.svh.sv\n             obj_dir/sdram_macros.svh\n             obj_dir/sdram_macros.svh.v\n             obj_dir/sdram_macros.svh.sv\n%Error: data/full_repos/permissive/171075078/src/sdram_master_bfm.sv:206: Cannot find include file: sdram_master_bfm_api.svh\n`include "sdram_master_bfm_api.svh"  \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/171075078/src/sdram_master_bfm.sv:17: Define or directive not defined: \'`SDRAM_INITIATOR_PORT\'\n `SDRAM_INITIATOR_PORT(, ADDR_WIDTH, DATA_WIDTH, BANKSEL_WIDTH)\n ^~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/171075078/src/sdram_master_bfm.sv:17: syntax error, unexpected \'(\', expecting \'[\'\n `SDRAM_INITIATOR_PORT(, ADDR_WIDTH, DATA_WIDTH, BANKSEL_WIDTH)\n                       ^\n%Error: Exiting due to 4 error(s)\n'
function void sdram_master_bfm_set_dq(
		int unsigned		idx,
		longint unsigned	dq,
		int unsigned		dqm);
		dq_o_buf[idx] = dq;	
		dqm_buf[idx] = dqm;	
	endfunction
function void sdram_master_bfm_set_dq(
		int unsigned		idx,
		longint unsigned	dq,
		int unsigned		dqm);

		dq_o_buf[idx] = dq;	
		dqm_buf[idx] = dqm;	
	endfunction