data/full_repos/permissive/118895561/Project 3/light.v
1: b'%Error: Cannot find file containing module: 3,data/full_repos/permissive/118895561\n        ... Looked in:\n             data/full_repos/permissive/118895561/Project/3,data/full_repos/permissive/118895561\n             data/full_repos/permissive/118895561/Project/3,data/full_repos/permissive/118895561.v\n             data/full_repos/permissive/118895561/Project/3,data/full_repos/permissive/118895561.sv\n             3,data/full_repos/permissive/118895561\n             3,data/full_repos/permissive/118895561.v\n             3,data/full_repos/permissive/118895561.sv\n             obj_dir/3,data/full_repos/permissive/118895561\n             obj_dir/3,data/full_repos/permissive/118895561.v\n             obj_dir/3,data/full_repos/permissive/118895561.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/118895561/Project\n%Error: Cannot find file containing module: 3/light.v\n%Error: Exiting due to 3 error(s)\n'
module light(
    input clk,
    input reset,
	 input we,
	 input [31:0] in,
	 output [31:0] out,
    output [31:0] led_light
    );

	reg [31:0] ctrl;
	
	assign led_light = ctrl;
	
	assign out = ctrl;
	
	always @(posedge clk) begin
		if(reset)
			ctrl <= 0;
		else begin
			if(we)
				ctrl <= in;
		end
	end

endmodule
module light(
    input clk,
    input reset,
	 input we,
	 input [31:0] in,
	 output [31:0] out,
    output [31:0] led_light
    );


	reg [31:0] ctrl;
	
	assign led_light = ctrl;
	
	assign out = ctrl;
	
	always @(posedge clk) begin
		if(reset)
			ctrl <= 0;
		else begin
			if(we)
				ctrl <= in;
		end
	end

endmodule