data/full_repos/permissive/187712539/modules/programCounter_P.v
data/verilator_xmls/2186b6a7-286c-4972-8267-65ab992bceff.xml
module programCounter(clk,in_address,OPcode,address);
input clk;
input [1:0] OPcode;
input [31:0] in_address;
output [31:0] address;

reg [31:0] reg_address;

always @(posedge clk)
begin
	case(OPcode)
		2'b00 : reg_address = reg_address + 4;
		2'b01 : reg_address = in_address;
		2'b10 : reg_address = address;
		2'b11 : reg_address = 0;
	endcase
end

assign address = reg_address;

endmodule
module programCounter(clk,in_address,OPcode,address);

input clk;
input [1:0] OPcode;
input [31:0] in_address;
output [31:0] address;

reg [31:0] reg_address;

always @(posedge clk)
begin
	case(OPcode)
		2'b00 : reg_address = reg_address + 4;
		2'b01 : reg_address = in_address;
		2'b10 : reg_address = address;
		2'b11 : reg_address = 0;
	endcase
end

assign address = reg_address;

endmodule