data/full_repos/permissive/194847941/demo/5_RGB_LED/Running_led_tdmap.v
1: b"%Error: data/full_repos/permissive/194847941/demo/5_RGB_LED/Running_led_tdmap.v:83: Unexpected 'do': 'do' is a SystemVerilog keyword misused as an identifier.\n        ... Suggest modify the Verilog-2001 code to avoid SV keywords, or use `begin_keywords or --language.\n    .do({open_n18,open_n19,open_n20,led_b_pad}),\n     ^~\n%Error: data/full_repos/permissive/194847941/demo/5_RGB_LED/Running_led_tdmap.v:83: syntax error, unexpected '(', expecting ')'\n    .do({open_n18,open_n19,open_n20,led_b_pad}),\n        ^\n%Error: data/full_repos/permissive/194847941/demo/5_RGB_LED/Running_led_tdmap.v:177: Unexpected 'do': 'do' is a SystemVerilog keyword misused as an identifier.\n    .do({open_n35,open_n36,open_n37,led_g_pad}),\n     ^~\n%Error: data/full_repos/permissive/194847941/demo/5_RGB_LED/Running_led_tdmap.v:177: syntax error, unexpected '(', expecting ')'\n    .do({open_n35,open_n36,open_n37,led_g_pad}),\n        ^\n%Error: data/full_repos/permissive/194847941/demo/5_RGB_LED/Running_led_tdmap.v:269: Unexpected 'do': 'do' is a SystemVerilog keyword misused as an identifier.\n    .do({open_n52,open_n53,open_n54,led_r_pad}),\n     ^~\n%Error: data/full_repos/permissive/194847941/demo/5_RGB_LED/Running_led_tdmap.v:269: syntax error, unexpected '(', expecting ')'\n    .do({open_n52,open_n53,open_n54,led_r_pad}),\n        ^\n%Error: Exiting due to 6 error(s)\n"
module AL_DFF
  (
  input reset,
  input set,
  input clk,
  input d,
  output reg q
  );

  parameter INI = 1'b0;

  always @(posedge reset or posedge set or posedge clk)
  begin
    if (reset)
      q <= 1'b0;
    else if (set)
      q <= 1'b1;
    else
      q <= d;
  end

endmodule
module AL_DFF
  (
  input reset,
  input set,
  input clk,
  input d,
  output reg q
  );


  parameter INI = 1'b0;

  always @(posedge reset or posedge set or posedge clk)
  begin
    if (reset)
      q <= 1'b0;
    else if (set)
      q <= 1'b1;
    else
      q <= d;
  end

endmodule