data/full_repos/permissive/219917900/txrx_rtl_files/rx_rtl_files/hdmi_top.v
1: b"%Error: data/full_repos/permissive/219917900/txrx_rtl_files/rx_rtl_files/hdmi_top.v:16: Cannot find file containing module: 'BUFG'\n    BUFG bufg_125(\n    ^~~~\n        ... Looked in:\n             data/full_repos/permissive/219917900/txrx_rtl_files/rx_rtl_files,data/full_repos/permissive/219917900/BUFG\n             data/full_repos/permissive/219917900/txrx_rtl_files/rx_rtl_files,data/full_repos/permissive/219917900/BUFG.v\n             data/full_repos/permissive/219917900/txrx_rtl_files/rx_rtl_files,data/full_repos/permissive/219917900/BUFG.sv\n             BUFG\n             BUFG.v\n             BUFG.sv\n             obj_dir/BUFG\n             obj_dir/BUFG.v\n             obj_dir/BUFG.sv\n%Error: data/full_repos/permissive/219917900/txrx_rtl_files/rx_rtl_files/hdmi_top.v:26: Cannot find file containing module: 'clk_hdmi_top'\n    clk_hdmi_top clk_hdmi_top_i(\n    ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/219917900/txrx_rtl_files/rx_rtl_files/hdmi_top.v:45: Cannot find file containing module: 'cnv8to24'\n    cnv8to24 cnv8to24 (\n    ^~~~~~~~\n%Error: data/full_repos/permissive/219917900/txrx_rtl_files/rx_rtl_files/hdmi_top.v:81: Cannot find file containing module: 'vram'\n   vram vram_r(\n   ^~~~\n%Error: data/full_repos/permissive/219917900/txrx_rtl_files/rx_rtl_files/hdmi_top.v:91: Cannot find file containing module: 'vram'\n   vram vram_g(\n   ^~~~\n%Error: data/full_repos/permissive/219917900/txrx_rtl_files/rx_rtl_files/hdmi_top.v:101: Cannot find file containing module: 'vram'\n   vram vram_b(\n   ^~~~\n%Error: data/full_repos/permissive/219917900/txrx_rtl_files/rx_rtl_files/hdmi_top.v:139: Cannot find file containing module: 'bram2rgb'\n    bram2rgb bram2rgb_i (\n    ^~~~~~~~\n%Error: data/full_repos/permissive/219917900/txrx_rtl_files/rx_rtl_files/hdmi_top.v:151: Cannot find file containing module: 'rgb2dvi_0'\n    rgb2dvi_0 rgb2dvi (\n    ^~~~~~~~~\n%Error: Exiting due to 8 error(s)\n"
module hdmi_top(
input wire clk,
input wire RST,
input wire clk125MHz,
input wire dclk,
input wire [7:0] data_in,
input wire data_en,
output wire hdmi_tx_clk_n,hdmi_tx_clk_p,
output wire [2:0] hdmi_tx_n,
output wire [2:0] hdmi_tx_p

    );
    
  wire clk125MHz_buffered;
    BUFG bufg_125(
    .I(clk125MHz),
    .O(clk125MHz_buffered)
    );
    
    

    wire pck, pck5x;

    wire clk125MHz_2;
    clk_hdmi_top clk_hdmi_top_i(
    .clk_out1(clk125MHz_2),
    .clk_out2(pck),
    .clk_out3(pck5x),
    .clk_in1(clk)
    );
    


    
    wire [23:0] data24b;
    wire [18:0] addr24b;
    wire enout2bram;
    
       wire [16:0] addr2vram;
    wire [7:0] data_r,data_g,data_b,dout_r,dout_g,dout_b;
    wire wea_r,wea_g,wea_b;
    wire [7:0] data_rgb;
    wire [1:0] rgbcount;
    cnv8to24 cnv8to24 (

    .dclk(dclk),
    .data8b(data_in),
    .en(data_en),

   
    .addr2vram(addr2vram),
    .count(rgbcount),
    .data_rgb(data_rgb),
    .wea_r(wea_r),
    .wea_g(wea_g),
    .wea_b(wea_b)
   
   );
    
    
    




    
    
   wire [23:0] from_ram;
   wire [19:0] ram_addr;
   wire [23:0] bram_douta;




   




   vram vram_r(
   .clka(dclk),
   .wea(wea_r),
   .addra(addr2vram),
   .dina(data_rgb),
   .clkb(pck),
   .addrb(ram_addr),
   .doutb(dout_r)
   );
   
   vram vram_g(
   .clka(dclk),
   .wea(wea_g),
   .addra(addr2vram),
   .dina(data_rgb),
   .clkb(pck),
   .addrb(ram_addr),
   .doutb(dout_g)
   );
   
   vram vram_b(
   .clka(dclk),
   .wea(wea_b),
   .addra(addr2vram),
   .dina(data_rgb),
   .clkb(pck),
   .addrb(ram_addr),
   .doutb(dout_b)
   );
   assign from_ram = {dout_r,dout_g,dout_b};
   

    
    wire [23:0] rgb24bit;
    wire hd,vd,den;
		reg RST_pck;
		reg RST__pck;
		always @(posedge pck) begin
			RST__pck <= RST_pck;
			RST_pck <= RST;
		end

    bram2rgb bram2rgb_i (
        .clk(pck),
        .xrst(!RST__pck),
        .en(1'b1),
        .in_from_ram(from_ram),
        .ram_addr(ram_addr),
        .vd_2s(vd),
        .hd_2s(hd),
        .rgb24bit(rgb24bit),
        .den_2s(den)
    );
    
    rgb2dvi_0 rgb2dvi (
    .TMDS_Clk_p(hdmi_tx_clk_p),
    .TMDS_Clk_n(hdmi_tx_clk_n),
    .TMDS_Data_p(hdmi_tx_p),
    .TMDS_Data_n(hdmi_tx_n),
    .aRst(RST),
    .vid_pData({rgb24bit[23:16],rgb24bit[15:8],rgb24bit[7:0]}),
    .vid_pVDE(den),
    .vid_pHSync(hd),
    .vid_pVSync(vd),
    .PixelClk(pck),
    .SerialClk(pck5x)
    );
    

    
    
endmodule
module hdmi_top(
input wire clk,
input wire RST,
input wire clk125MHz,
input wire dclk,
input wire [7:0] data_in,
input wire data_en,
output wire hdmi_tx_clk_n,hdmi_tx_clk_p,
output wire [2:0] hdmi_tx_n,
output wire [2:0] hdmi_tx_p

    );

    
  wire clk125MHz_buffered;
    BUFG bufg_125(
    .I(clk125MHz),
    .O(clk125MHz_buffered)
    );
    
    

    wire pck, pck5x;

    wire clk125MHz_2;
    clk_hdmi_top clk_hdmi_top_i(
    .clk_out1(clk125MHz_2),
    .clk_out2(pck),
    .clk_out3(pck5x),
    .clk_in1(clk)
    );
    


    
    wire [23:0] data24b;
    wire [18:0] addr24b;
    wire enout2bram;
    
       wire [16:0] addr2vram;
    wire [7:0] data_r,data_g,data_b,dout_r,dout_g,dout_b;
    wire wea_r,wea_g,wea_b;
    wire [7:0] data_rgb;
    wire [1:0] rgbcount;
    cnv8to24 cnv8to24 (

    .dclk(dclk),
    .data8b(data_in),
    .en(data_en),

   
    .addr2vram(addr2vram),
    .count(rgbcount),
    .data_rgb(data_rgb),
    .wea_r(wea_r),
    .wea_g(wea_g),
    .wea_b(wea_b)
   
   );
    
    
    




    
    
   wire [23:0] from_ram;
   wire [19:0] ram_addr;
   wire [23:0] bram_douta;




   




   vram vram_r(
   .clka(dclk),
   .wea(wea_r),
   .addra(addr2vram),
   .dina(data_rgb),
   .clkb(pck),
   .addrb(ram_addr),
   .doutb(dout_r)
   );
   
   vram vram_g(
   .clka(dclk),
   .wea(wea_g),
   .addra(addr2vram),
   .dina(data_rgb),
   .clkb(pck),
   .addrb(ram_addr),
   .doutb(dout_g)
   );
   
   vram vram_b(
   .clka(dclk),
   .wea(wea_b),
   .addra(addr2vram),
   .dina(data_rgb),
   .clkb(pck),
   .addrb(ram_addr),
   .doutb(dout_b)
   );
   assign from_ram = {dout_r,dout_g,dout_b};
   

    
    wire [23:0] rgb24bit;
    wire hd,vd,den;
		reg RST_pck;
		reg RST__pck;
		always @(posedge pck) begin
			RST__pck <= RST_pck;
			RST_pck <= RST;
		end

    bram2rgb bram2rgb_i (
        .clk(pck),
        .xrst(!RST__pck),
        .en(1'b1),
        .in_from_ram(from_ram),
        .ram_addr(ram_addr),
        .vd_2s(vd),
        .hd_2s(hd),
        .rgb24bit(rgb24bit),
        .den_2s(den)
    );
    
    rgb2dvi_0 rgb2dvi (
    .TMDS_Clk_p(hdmi_tx_clk_p),
    .TMDS_Clk_n(hdmi_tx_clk_n),
    .TMDS_Data_p(hdmi_tx_p),
    .TMDS_Data_n(hdmi_tx_n),
    .aRst(RST),
    .vid_pData({rgb24bit[23:16],rgb24bit[15:8],rgb24bit[7:0]}),
    .vid_pVDE(den),
    .vid_pHSync(hd),
    .vid_pVSync(vd),
    .PixelClk(pck),
    .SerialClk(pck5x)
    );
    

    
    
endmodule