data/full_repos/permissive/206169433/pipeline/alu_control.v
data/verilator_xmls/8bf2fd67-5f36-4408-9268-957360d1db0a.xml
module alu_control(funct, aluop, alucontrol);
    input [5:0] funct;
    input [1:0] aluop;
    output [3:0] alucontrol;

    reg[3:0] alucontrol;

    initial begin
      alucontrol = 4'b0;
    end

    always @ (funct, aluop) begin
        case (aluop)
            2'b00:
                alucontrol = 4'b0010;
            2'b01:
                alucontrol = 4'b0110;
            2'b11:
                alucontrol = 4'b0000;    
            2'b10:
                case (funct)
                    6'b100000:
                        alucontrol = 4'b0010;
                    6'b100010:
                        alucontrol = 4'b0110;
                    6'b100100:
                        alucontrol = 4'b0000;
                    6'b100101:
                        alucontrol = 4'b0001;
                    6'b101010:
                        alucontrol = 4'b0111;
                    default: ;
                endcase
            default: ;
        endcase
    end

endmodule
module alu_control(funct, aluop, alucontrol);

    input [5:0] funct;
    input [1:0] aluop;
    output [3:0] alucontrol;

    reg[3:0] alucontrol;

    initial begin
      alucontrol = 4'b0;
    end

    always @ (funct, aluop) begin
        case (aluop)
            2'b00:
                alucontrol = 4'b0010;
            2'b01:
                alucontrol = 4'b0110;
            2'b11:
                alucontrol = 4'b0000;    
            2'b10:
                case (funct)
                    6'b100000:
                        alucontrol = 4'b0010;
                    6'b100010:
                        alucontrol = 4'b0110;
                    6'b100100:
                        alucontrol = 4'b0000;
                    6'b100101:
                        alucontrol = 4'b0001;
                    6'b101010:
                        alucontrol = 4'b0111;
                    default: ;
                endcase
            default: ;
        endcase
    end

endmodule