data/full_repos/permissive/104269513/master_control.v
 line:94: before: "integer"
1: b'%Error: data/full_repos/permissive/104269513/master_control.v:107: Cannot find file containing module: \'spring_fifo\'\n spring_fifo fifo( \n ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/104269513,data/full_repos/permissive/104269513/spring_fifo\n             data/full_repos/permissive/104269513,data/full_repos/permissive/104269513/spring_fifo.v\n             data/full_repos/permissive/104269513,data/full_repos/permissive/104269513/spring_fifo.sv\n             spring_fifo\n             spring_fifo.v\n             spring_fifo.sv\n             obj_dir/spring_fifo\n             obj_dir/spring_fifo.v\n             obj_dir/spring_fifo.sv\n%Warning-WIDTH: data/full_repos/permissive/104269513/master_control.v:411: Operator LT expects 32 or 17 bits on the LHS, but LHS\'s VARREF \'counter\' generates 16 bits.\n                                                                         : ... In instance master_ctrl\n  if (counter < \'h10000)\n              ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 error(s), 1 warning(s)\n'
function integer log2;
      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
   endfunction
function integer log2;

      input integer number;
      begin
         log2=0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
   endfunction