data/full_repos/permissive/109936328/tb/tb_gpio_interface.v
None: at end of input
1: b'%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:1: Cannot find include file: config.vh\n`include "config.vh" \n         ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/109936328/tb,data/full_repos/permissive/109936328/config.vh\n             data/full_repos/permissive/109936328/tb,data/full_repos/permissive/109936328/config.vh.v\n             data/full_repos/permissive/109936328/tb,data/full_repos/permissive/109936328/config.vh.sv\n             config.vh\n             config.vh.v\n             config.vh.sv\n             obj_dir/config.vh\n             obj_dir/config.vh.v\n             obj_dir/config.vh.sv\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:2: Cannot find include file: mem_codes.vh\n`include "mem_codes.vh" \n         ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:15: Define or directive not defined: \'`WORD_W\'\n  localparam GPIO_W = BANK_COUNT *  `WORD_W;\n                                    ^~~~~~~\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:15: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n  localparam GPIO_W = BANK_COUNT *  `WORD_W;\n                                           ^\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:20: Define or directive not defined: \'`ADDR_W\'\n  reg [`ADDR_W - 1:0] req_addr = 0;\n       ^~~~~~~\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:21: Define or directive not defined: \'`WORD_W\'\n  reg [`WORD_W - 1:0] req_wr_data = 0;\n       ^~~~~~~\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:23: Define or directive not defined: \'`MEM_COUNT_W\'\n  reg [`MEM_COUNT_W - 1:0] req_count = `MEM_COUNT_NONE;\n       ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:23: Define or directive not defined: \'`MEM_COUNT_NONE\'\n  reg [`MEM_COUNT_W - 1:0] req_count = `MEM_COUNT_NONE;\n                                       ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:23: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n  reg [`MEM_COUNT_W - 1:0] req_count = `MEM_COUNT_NONE;\n                                                      ^\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:25: Define or directive not defined: \'`WORD_W\'\n  wire [`WORD_W - 1:0] res_rd_data;\n        ^~~~~~~\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:26: Define or directive not defined: \'`MEM_CODE_W\'\n  wire [`MEM_CODE_W - 1:0] res_code; \n        ^~~~~~~~~~~\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:30: Define or directive not defined: \'`MEM_COUNT_WORD\'\n    req_count = `MEM_COUNT_WORD;\n                ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:30: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n    req_count = `MEM_COUNT_WORD;\n                               ^\n%Warning-STMTDLY: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:32: Unsupported: Ignoring delay on this delayed statement.\n    #(CLK_PERIOD);\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:42: Define or directive not defined: \'`MEM_COUNT_W\'\n    input [`MEM_COUNT_W - 1:0] tw_count,\n           ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:43: Define or directive not defined: \'`WORD_W\'\n    input [`WORD_W - 1:0] tw_data  \n           ^~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:48: Unsupported: Ignoring delay on this delayed statement.\n    #(CLK_PERIOD);\n    ^\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:50: Define or directive not defined: \'`MEM_CODE_WRITE\'\n    if (!(res_code == `MEM_CODE_WRITE)) begin\n                      ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:50: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n    if (!(res_code == `MEM_CODE_WRITE)) begin\n                                     ^\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:58: Unsupported or unknown PLI call: $dumpfile\n    $dumpfile("tb_gpio_interface.vcd");\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:59: Unsupported or unknown PLI call: $dumpvars\n    $dumpvars();\n    ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:62: Unsupported: Ignoring delay on this delayed statement.\n    #(CLK_PERIOD);\n    ^\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:68: Define or directive not defined: \'`MEM_COUNT_WORD\'\n      `MEM_COUNT_WORD,\n      ^~~~~~~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:72: Unsupported: Ignoring delay on this delayed statement.\n    #(CLK_PERIOD);\n    ^\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:74: syntax error, unexpected end\n  end\n  ^~~\n%Error: data/full_repos/permissive/109936328/tb/tb_gpio_interface.v:79: syntax error, unexpected end\n  end\n  ^~~\n%Error: Cannot continue\n'
module tb_gpio_interface;
  localparam CLK_HPERIOD = 5;
  localparam CLK_PERIOD = 2 * CLK_HPERIOD;

  localparam ADDR_START = 0;
  localparam BANK_COUNT = 1;

  localparam GPIO_W = BANK_COUNT *  `WORD_W;

  reg clk = 0;
  reg aresetn = 0;

  reg [`ADDR_W - 1:0] req_addr = 0;
  reg [`WORD_W - 1:0] req_wr_data = 0;
  reg req_wr_en = 0;
  reg [`MEM_COUNT_W - 1:0] req_count = `MEM_COUNT_NONE;

  wire [`WORD_W - 1:0] res_rd_data;
  wire [`MEM_CODE_W - 1:0] res_code; 
  wire [GPIO_W - 1:0] gpio_state;

  task test_reset_condition; begin
    req_count = `MEM_COUNT_WORD;
    req_wr_en = 0;
    #(CLK_PERIOD);

    `ASSERT(res_rd_data == 0) begin
      $display("Assertion failed in test_reset_condition! res_rd_data = %8x",
        res_rd_data);
    end
  end
  endtask

  task test_write(
    input [`MEM_COUNT_W - 1:0] tw_count,
    input [`WORD_W - 1:0] tw_data  
  ); begin
    req_count = tw_count;
    req_wr_data = tw_data;
    req_wr_en = 1;
    #(CLK_PERIOD);

    `ASSERT(res_code == `MEM_CODE_WRITE) begin
      $display("Assertion failed in test_write! res_code = %8x", res_code);
    end
  end
  endtask

  integer i;
  initial begin
    $dumpfile("tb_gpio_interface.vcd");
    $dumpvars();
    $display("%d", $ceil(BANK_COUNT / 4));

    #(CLK_PERIOD);
    aresetn = 1;
    
    test_reset_condition();

    test_write(
      `MEM_COUNT_WORD,
      'hdeadbeef
    );

    #(CLK_PERIOD);
    $finish();
  end

  always begin
    #(CLK_HPERIOD);
    clk = ~clk;
  end

  gpio_interface#(
    .ADDR_START(ADDR_START),
    .BANK_COUNT(BANK_COUNT)
  ) dut(
    .clk(clk),
    .aresetn(aresetn),

    .i_req_addr(req_addr),
    .i_req_wr_data(req_wr_data),
    .i_req_wr_en(req_wr_en),
    .i_req_count(req_count),

    .o_res_rd_data(res_rd_data),
    .o_res_code(res_code),

    .o_gpio_state(gpio_state)
  );

endmodule
module tb_gpio_interface;

  localparam CLK_HPERIOD = 5;
  localparam CLK_PERIOD = 2 * CLK_HPERIOD;

  localparam ADDR_START = 0;
  localparam BANK_COUNT = 1;

  localparam GPIO_W = BANK_COUNT *  `WORD_W;

  reg clk = 0;
  reg aresetn = 0;

  reg [`ADDR_W - 1:0] req_addr = 0;
  reg [`WORD_W - 1:0] req_wr_data = 0;
  reg req_wr_en = 0;
  reg [`MEM_COUNT_W - 1:0] req_count = `MEM_COUNT_NONE;

  wire [`WORD_W - 1:0] res_rd_data;
  wire [`MEM_CODE_W - 1:0] res_code; 
  wire [GPIO_W - 1:0] gpio_state;

  task test_reset_condition; begin
    req_count = `MEM_COUNT_WORD;
    req_wr_en = 0;
    #(CLK_PERIOD);

    `ASSERT(res_rd_data == 0) begin
      $display("Assertion failed in test_reset_condition! res_rd_data = %8x",
        res_rd_data);
    end
  end
  endtask

  task test_write(
    input [`MEM_COUNT_W - 1:0] tw_count,
    input [`WORD_W - 1:0] tw_data  
  ); begin
    req_count = tw_count;
    req_wr_data = tw_data;
    req_wr_en = 1;
    #(CLK_PERIOD);

    `ASSERT(res_code == `MEM_CODE_WRITE) begin
      $display("Assertion failed in test_write! res_code = %8x", res_code);
    end
  end
  endtask

  integer i;
  initial begin
    $dumpfile("tb_gpio_interface.vcd");
    $dumpvars();
    $display("%d", $ceil(BANK_COUNT / 4));

    #(CLK_PERIOD);
    aresetn = 1;
    
    test_reset_condition();

    test_write(
      `MEM_COUNT_WORD,
      'hdeadbeef
    );

    #(CLK_PERIOD);
    $finish();
  end

  always begin
    #(CLK_HPERIOD);
    clk = ~clk;
  end

  gpio_interface#(
    .ADDR_START(ADDR_START),
    .BANK_COUNT(BANK_COUNT)
  ) dut(
    .clk(clk),
    .aresetn(aresetn),

    .i_req_addr(req_addr),
    .i_req_wr_data(req_wr_data),
    .i_req_wr_en(req_wr_en),
    .i_req_count(req_count),

    .o_res_rd_data(res_rd_data),
    .o_res_code(res_code),

    .o_gpio_state(gpio_state)
  );

endmodule