data/full_repos/permissive/169738435/Video/videosync.v
 line:78: before: ")"
1: b'%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:45: Signal definition not found, creating implicitly: \'H287_Q\'\n assign nFLIP = ~H287_Q;\n                 ^~~~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:46: Signal definition not found, creating implicitly: \'H287_nQ\'\n                                                                            : ... Suggested alternative: \'H287_Q\'\n assign FLIP = ~H287_nQ;\n                ^~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:51: Signal definition not found, creating implicitly: \'P40A_OUT\'\n assign P40A_OUT = P50_CO | 1\'b0;\n        ^~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:53: Signal definition not found, creating implicitly: \'P15_QC\'\n                                                                            : ... Suggested alternative: \'R15_QD\'\n assign PIXELC = {P15_QC, P15_QB, P15_QA, P50_QD, P50_QC, P50_QB, P50_QA, LSPC_1_5M, LSPC_3M};\n                  ^~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:53: Signal definition not found, creating implicitly: \'P15_QB\'\n                                                                            : ... Suggested alternative: \'P15_QC\'\n assign PIXELC = {P15_QC, P15_QB, P15_QA, P50_QD, P50_QC, P50_QB, P50_QA, LSPC_1_5M, LSPC_3M};\n                          ^~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:53: Signal definition not found, creating implicitly: \'P15_QA\'\n                                                                            : ... Suggested alternative: \'P15_QB\'\n assign PIXELC = {P15_QC, P15_QB, P15_QA, P50_QD, P50_QC, P50_QB, P50_QA, LSPC_1_5M, LSPC_3M};\n                                  ^~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:53: Signal definition not found, creating implicitly: \'P50_QD\'\n                                                                            : ... Suggested alternative: \'P50_CO\'\n assign PIXELC = {P15_QC, P15_QB, P15_QA, P50_QD, P50_QC, P50_QB, P50_QA, LSPC_1_5M, LSPC_3M};\n                                          ^~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:53: Signal definition not found, creating implicitly: \'P50_QC\'\n                                                                            : ... Suggested alternative: \'P50_QD\'\n assign PIXELC = {P15_QC, P15_QB, P15_QA, P50_QD, P50_QC, P50_QB, P50_QA, LSPC_1_5M, LSPC_3M};\n                                                  ^~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:53: Signal definition not found, creating implicitly: \'P50_QB\'\n                                                                            : ... Suggested alternative: \'P50_QC\'\n assign PIXELC = {P15_QC, P15_QB, P15_QA, P50_QD, P50_QC, P50_QB, P50_QA, LSPC_1_5M, LSPC_3M};\n                                                          ^~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:53: Signal definition not found, creating implicitly: \'P50_QA\'\n                                                                            : ... Suggested alternative: \'P50_QB\'\n assign PIXELC = {P15_QC, P15_QB, P15_QA, P50_QD, P50_QC, P50_QB, P50_QA, LSPC_1_5M, LSPC_3M};\n                                                                  ^~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:58: Signal definition not found, creating implicitly: \'P15_CO\'\n                                                                            : ... Suggested alternative: \'P15_QA\'\n assign P39B_OUT = P15_CO & Q53_CO;\n                   ^~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:58: Signal definition not found, creating implicitly: \'P39B_OUT\'\n assign P39B_OUT = P15_CO & Q53_CO;\n        ^~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:59: Signal definition not found, creating implicitly: \'P13B_OUT\'\n                                                                            : ... Suggested alternative: \'P39B_OUT\'\n assign P13B_OUT = ~|{P39B_OUT, ~RESETP};\n        ^~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:66: Signal definition not found, creating implicitly: \'J22_OUT\'\n assign J22_OUT = P15_QC ^ 1\'b0;\n        ^~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:67: Signal definition not found, creating implicitly: \'I269_CO\'\n assign H284A_OUT = I269_CO | 1\'b0;\n                    ^~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:67: Signal definition not found, creating implicitly: \'H284A_OUT\'\n assign H284A_OUT = I269_CO | 1\'b0;\n        ^~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:76: Signal definition not found, creating implicitly: \'MATCH_PAL\'\n assign MATCH_PAL = ~&{RASTERC[4:3]} | RASTERC[5] | RASTERC[8];\n        ^~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:82: Signal definition not found, creating implicitly: \'MATCH_NTSC\'\n assign MATCH_NTSC = ~&{RASTERC[7:5]};\n        ^~~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:88: Signal definition not found, creating implicitly: \'BLANK_PAL\'\n assign VSYNC = VMODE ? BLANK_PAL : RASTERC[8];\n                        ^~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:88: Signal definition not found, creating implicitly: \'VSYNC\'\n                                                                            : ... Suggested alternative: \'SYNC\'\n assign VSYNC = VMODE ? BLANK_PAL : RASTERC[8];\n        ^~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:89: Signal definition not found, creating implicitly: \'BLANK_NTSC\'\n assign BNK = ~(VMODE ? RASTERC[8] : BLANK_NTSC);\n                                     ^~~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:94: Signal definition not found, creating implicitly: \'S136A_OUT\'\n                                                                            : ... Suggested alternative: \'P13B_OUT\'\n assign #1 S136A_OUT = ~LSPC_1_5M;\n           ^~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:97: Signal definition not found, creating implicitly: \'nPIXEL_H256\'\n assign #1 nPIXEL_H256 = ~P15_QC;\n           ^~~~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:98: Signal definition not found, creating implicitly: \'P13A_OUT\'\n                                                                            : ... Suggested alternative: \'P13B_OUT\'\n assign P13A_OUT = P15_QA & nPIXEL_H256;\n        ^~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:109: Signal definition not found, creating implicitly: \'S116_Q\'\n assign HSYNC = ~&{S116_Q, ~T116_REG[1]};\n                   ^~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/169738435/Video/videosync.v:109: Signal definition not found, creating implicitly: \'HSYNC\'\n                                                                             : ... Suggested alternative: \'SYNC\'\n assign HSYNC = ~&{S116_Q, ~T116_REG[1]};\n        ^~~~~\n%Error: data/full_repos/permissive/169738435/Video/videosync.v:44: Cannot find file containing module: \'FDPCell\'\n FDPCell H287(J22_OUT, H287_nQ, 1\'b1, RESETP, H287_Q, H287_nQ);\n ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/169738435/Video,data/full_repos/permissive/169738435/FDPCell\n             data/full_repos/permissive/169738435/Video,data/full_repos/permissive/169738435/FDPCell.v\n             data/full_repos/permissive/169738435/Video,data/full_repos/permissive/169738435/FDPCell.sv\n             FDPCell\n             FDPCell.v\n             FDPCell.sv\n             obj_dir/FDPCell\n             obj_dir/FDPCell.v\n             obj_dir/FDPCell.sv\n%Error: data/full_repos/permissive/169738435/Video/videosync.v:55: Cannot find file containing module: \'C43\'\n C43 P50(CLK_24MB, 4\'b1110, RESETP, Q53_CO, 1\'b1, 1\'b1, {P50_QD, P50_QC, P50_QB, P50_QA}, P50_CO);\n ^~~\n%Error: data/full_repos/permissive/169738435/Video/videosync.v:56: Cannot find file containing module: \'C43\'\n C43 P15(CLK_24MB, {3\'b101, ~RESETP}, P13B_OUT, Q53_CO, P40A_OUT, 1\'b1, {P15_QD, P15_QC, P15_QB, P15_QA}, P15_CO);\n ^~~\n%Error: data/full_repos/permissive/169738435/Video/videosync.v:69: Cannot find file containing module: \'C43\'\n C43 I269(J22_OUT, {~VMODE, 3\'b100}, ~J268_CO, FLIP, FLIP, RESETP, RASTERC[4:1], I269_CO);\n ^~~\n%Error: data/full_repos/permissive/169738435/Video/videosync.v:70: Cannot find file containing module: \'C43\'\n C43 J268(J22_OUT, {3\'b011, ~VMODE}, ~J268_CO, H284A_OUT, H284A_OUT, RESETP, RASTERC[8:5], J268_CO);\n ^~~\n%Error: data/full_repos/permissive/169738435/Video/videosync.v:78: Cannot find file containing module: \'FDM\'\n FDM H272(RASTERC[2], MATCH_PAL, H272_Q, );\n ^~~\n%Error: data/full_repos/permissive/169738435/Video/videosync.v:79: Cannot find file containing module: \'FDM\'\n FDM I238(FLIP, H272_Q, BLANK_PAL, );\n ^~~\n%Error: data/full_repos/permissive/169738435/Video/videosync.v:85: Cannot find file containing module: \'FD4\'\n FD4 J251(~RASTERC[4], MATCH_NTSC, 1\'b1, RESETP, BLANK_NTSC, );\n ^~~\n%Error: data/full_repos/permissive/169738435/Video/videosync.v:100: Cannot find file containing module: \'FS1\'\n FS1 R15(S136A_OUT, P13A_OUT, R15_REG);\n ^~~\n%Error: data/full_repos/permissive/169738435/Video/videosync.v:101: Cannot find file containing module: \'BD3\'\n BD3 S51(R15_REG[3], S51_OUT);\n ^~~\n%Error: data/full_repos/permissive/169738435/Video/videosync.v:102: Cannot find file containing module: \'FS1\'\n FS1 T116(S136A_OUT, ~S51_OUT, T116_REG);\n ^~~\n%Error: data/full_repos/permissive/169738435/Video/videosync.v:103: Cannot find file containing module: \'BD3\'\n BD3 U127(T116_REG[3], U127_OUT);\n ^~~\n%Error: data/full_repos/permissive/169738435/Video/videosync.v:104: Cannot find file containing module: \'FS1\'\n FS1 S122(S136A_OUT, ~U127_OUT, S122_REG);\n ^~~\n%Error: data/full_repos/permissive/169738435/Video/videosync.v:105: Cannot find file containing module: \'BD3\'\n BD3 S119A(S122_REG[3], S119_OUT);\n ^~~\n%Error: data/full_repos/permissive/169738435/Video/videosync.v:106: Cannot find file containing module: \'FD2\'\n FD2 S116(S136A_OUT, S119_OUT, S116_Q, );\n ^~~\n%Error: Exiting due to 15 error(s), 26 warning(s)\n'
module videosync(
	input CLK_24MB,
	input LSPC_3M,
	input LSPC_1_5M,
	input Q53_CO,
	input RESETP,
	input VMODE,
	output [8:0] PIXELC,
	output [8:0] RASTERC,
	output SYNC,
	output BNK,
	output BNKB,
	output CHBL,
	output R15_QD,
	output FLIP,
	output nFLIP,
	output P50_CO
);
	
	wire [3:0] S122_REG;
	wire [3:0] R15_REG;
	wire [3:0] T116_REG;
	
	assign R15_QD = R15_REG[3];
	
	FDPCell H287(J22_OUT, H287_nQ, 1'b1, RESETP, H287_Q, H287_nQ);
	assign nFLIP = ~H287_Q;
	assign FLIP = ~H287_nQ;
	

	

	assign P40A_OUT = P50_CO | 1'b0;
	
	assign PIXELC = {P15_QC, P15_QB, P15_QA, P50_QD, P50_QC, P50_QB, P50_QA, LSPC_1_5M, LSPC_3M};
	
	C43 P50(CLK_24MB, 4'b1110, RESETP, Q53_CO, 1'b1, 1'b1, {P50_QD, P50_QC, P50_QB, P50_QA}, P50_CO);
	C43 P15(CLK_24MB, {3'b101, ~RESETP}, P13B_OUT, Q53_CO, P40A_OUT, 1'b1, {P15_QD, P15_QC, P15_QB, P15_QA}, P15_CO);

	assign P39B_OUT = P15_CO & Q53_CO;
	assign P13B_OUT = ~|{P39B_OUT, ~RESETP};
	
	
	

	

	assign J22_OUT = P15_QC ^ 1'b0;
	assign H284A_OUT = I269_CO | 1'b0;
	
	C43 I269(J22_OUT, {~VMODE, 3'b100}, ~J268_CO, FLIP, FLIP, RESETP, RASTERC[4:1], I269_CO);
	C43 J268(J22_OUT, {3'b011, ~VMODE}, ~J268_CO, H284A_OUT, H284A_OUT, RESETP, RASTERC[8:5], J268_CO);
	assign RASTERC[0] = FLIP;
	
	
	

	assign MATCH_PAL = ~&{RASTERC[4:3]} | RASTERC[5] | RASTERC[8];
	
	FDM H272(RASTERC[2], MATCH_PAL, H272_Q, );
	FDM I238(FLIP, H272_Q, BLANK_PAL, );
	

	assign MATCH_NTSC = ~&{RASTERC[7:5]};
	

	FD4 J251(~RASTERC[4], MATCH_NTSC, 1'b1, RESETP, BLANK_NTSC, );
	

	assign VSYNC = VMODE ? BLANK_PAL : RASTERC[8];
	assign BNK = ~(VMODE ? RASTERC[8] : BLANK_NTSC);
	

	assign BNKB = ~BNK;
	
	assign #1 S136A_OUT = ~LSPC_1_5M;
	

	assign #1 nPIXEL_H256 = ~P15_QC;
	assign P13A_OUT = P15_QA & nPIXEL_H256;
	
	FS1 R15(S136A_OUT, P13A_OUT, R15_REG);
	BD3 S51(R15_REG[3], S51_OUT);
	FS1 T116(S136A_OUT, ~S51_OUT, T116_REG);
	BD3 U127(T116_REG[3], U127_OUT);
	FS1 S122(S136A_OUT, ~U127_OUT, S122_REG);
	BD3 S119A(S122_REG[3], S119_OUT);
	FD2 S116(S136A_OUT, S119_OUT, S116_Q, );
	

	assign HSYNC = ~&{S116_Q, ~T116_REG[1]};
	

	assign SYNC = ~^{HSYNC, VSYNC};
	

	assign CHBL = ~&{BNKB, R15_REG[3]};

endmodule
module videosync(
	input CLK_24MB,
	input LSPC_3M,
	input LSPC_1_5M,
	input Q53_CO,
	input RESETP,
	input VMODE,
	output [8:0] PIXELC,
	output [8:0] RASTERC,
	output SYNC,
	output BNK,
	output BNKB,
	output CHBL,
	output R15_QD,
	output FLIP,
	output nFLIP,
	output P50_CO
);

	
	wire [3:0] S122_REG;
	wire [3:0] R15_REG;
	wire [3:0] T116_REG;
	
	assign R15_QD = R15_REG[3];
	
	FDPCell H287(J22_OUT, H287_nQ, 1'b1, RESETP, H287_Q, H287_nQ);
	assign nFLIP = ~H287_Q;
	assign FLIP = ~H287_nQ;
	

	

	assign P40A_OUT = P50_CO | 1'b0;
	
	assign PIXELC = {P15_QC, P15_QB, P15_QA, P50_QD, P50_QC, P50_QB, P50_QA, LSPC_1_5M, LSPC_3M};
	
	C43 P50(CLK_24MB, 4'b1110, RESETP, Q53_CO, 1'b1, 1'b1, {P50_QD, P50_QC, P50_QB, P50_QA}, P50_CO);
	C43 P15(CLK_24MB, {3'b101, ~RESETP}, P13B_OUT, Q53_CO, P40A_OUT, 1'b1, {P15_QD, P15_QC, P15_QB, P15_QA}, P15_CO);

	assign P39B_OUT = P15_CO & Q53_CO;
	assign P13B_OUT = ~|{P39B_OUT, ~RESETP};
	
	
	

	

	assign J22_OUT = P15_QC ^ 1'b0;
	assign H284A_OUT = I269_CO | 1'b0;
	
	C43 I269(J22_OUT, {~VMODE, 3'b100}, ~J268_CO, FLIP, FLIP, RESETP, RASTERC[4:1], I269_CO);
	C43 J268(J22_OUT, {3'b011, ~VMODE}, ~J268_CO, H284A_OUT, H284A_OUT, RESETP, RASTERC[8:5], J268_CO);
	assign RASTERC[0] = FLIP;
	
	
	

	assign MATCH_PAL = ~&{RASTERC[4:3]} | RASTERC[5] | RASTERC[8];
	
	FDM H272(RASTERC[2], MATCH_PAL, H272_Q, );
	FDM I238(FLIP, H272_Q, BLANK_PAL, );
	

	assign MATCH_NTSC = ~&{RASTERC[7:5]};
	

	FD4 J251(~RASTERC[4], MATCH_NTSC, 1'b1, RESETP, BLANK_NTSC, );
	

	assign VSYNC = VMODE ? BLANK_PAL : RASTERC[8];
	assign BNK = ~(VMODE ? RASTERC[8] : BLANK_NTSC);
	

	assign BNKB = ~BNK;
	
	assign #1 S136A_OUT = ~LSPC_1_5M;
	

	assign #1 nPIXEL_H256 = ~P15_QC;
	assign P13A_OUT = P15_QA & nPIXEL_H256;
	
	FS1 R15(S136A_OUT, P13A_OUT, R15_REG);
	BD3 S51(R15_REG[3], S51_OUT);
	FS1 T116(S136A_OUT, ~S51_OUT, T116_REG);
	BD3 U127(T116_REG[3], U127_OUT);
	FS1 S122(S136A_OUT, ~U127_OUT, S122_REG);
	BD3 S119A(S122_REG[3], S119_OUT);
	FD2 S116(S136A_OUT, S119_OUT, S116_Q, );
	

	assign HSYNC = ~&{S116_Q, ~T116_REG[1]};
	

	assign SYNC = ~^{HSYNC, VSYNC};
	

	assign CHBL = ~&{BNKB, R15_REG[3]};

endmodule