data/full_repos/permissive/135701568/mux3bit.v
data/verilator_xmls/674b4ae4-845c-4d6f-89eb-02a3825b8e56.xml
module mux3bit (in1, in2, control, out);
  input[2:0] in1,in2;
  output[2:0] out;
  input control;
  assign out = (control) ? in2 : in1;
endmodule
module mux3bit (in1, in2, control, out);

  input[2:0] in1,in2;
  output[2:0] out;
  input control;
  assign out = (control) ? in2 : in1;
endmodule