data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b"%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:258: Cannot find file containing module: 'ocx_dlx_tx_ctl'\nocx_dlx_tx_ctl ctl (    \n^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/208113388/dlx,data/full_repos/permissive/208113388/ocx_dlx_tx_ctl\n             data/full_repos/permissive/208113388/dlx,data/full_repos/permissive/208113388/ocx_dlx_tx_ctl.v\n             data/full_repos/permissive/208113388/dlx,data/full_repos/permissive/208113388/ocx_dlx_tx_ctl.sv\n             ocx_dlx_tx_ctl\n             ocx_dlx_tx_ctl.v\n             ocx_dlx_tx_ctl.sv\n             obj_dir/ocx_dlx_tx_ctl\n             obj_dir/ocx_dlx_tx_ctl.v\n             obj_dir/ocx_dlx_tx_ctl.sv\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:321: Cannot find file containing module: 'ocx_dlx_tx_flt'\nocx_dlx_tx_flt flt (\n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:351: Cannot find file containing module: 'ocx_dlx_tx_que'\nocx_dlx_tx_que q0 (    \n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:372: Cannot find file containing module: 'ocx_dlx_tx_que'\nocx_dlx_tx_que q1 (    \n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:393: Cannot find file containing module: 'ocx_dlx_tx_que'\nocx_dlx_tx_que q2 (    \n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:414: Cannot find file containing module: 'ocx_dlx_tx_que'\nocx_dlx_tx_que q3 (    \n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:435: Cannot find file containing module: 'ocx_dlx_tx_que'\nocx_dlx_tx_que q4 (    \n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:456: Cannot find file containing module: 'ocx_dlx_tx_que'\nocx_dlx_tx_que q5 (    \n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:477: Cannot find file containing module: 'ocx_dlx_tx_que'\nocx_dlx_tx_que q6 (    \n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:498: Cannot find file containing module: 'ocx_dlx_tx_que'\nocx_dlx_tx_que q7 (\n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:520: Cannot find file containing module: 'ocx_dlx_tx_gbx'\nocx_dlx_tx_gbx gbx0 ( \n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:538: Cannot find file containing module: 'ocx_dlx_tx_gbx'\nocx_dlx_tx_gbx gbx1 (    \n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:556: Cannot find file containing module: 'ocx_dlx_tx_gbx'\nocx_dlx_tx_gbx gbx2 ( \n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:574: Cannot find file containing module: 'ocx_dlx_tx_gbx'\nocx_dlx_tx_gbx gbx3 ( \n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:592: Cannot find file containing module: 'ocx_dlx_tx_gbx'\nocx_dlx_tx_gbx gbx4 ( \n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:610: Cannot find file containing module: 'ocx_dlx_tx_gbx'\nocx_dlx_tx_gbx gbx5 ( \n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:628: Cannot find file containing module: 'ocx_dlx_tx_gbx'\nocx_dlx_tx_gbx gbx6 ( \n^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/208113388/dlx/ocx_dlx_txdf.v:646: Cannot find file containing module: 'ocx_dlx_tx_gbx'\nocx_dlx_tx_gbx gbx7 ( \n^~~~~~~~~~~~~~\n%Error: Exiting due to 18 error(s)\n"
module ocx_dlx_txdf (

 dlx_tlx_init_flit_depth
,dlx_tlx_flit_credit
,tlx_dlx_flit_valid
,tlx_dlx_flit
,ro_dlx_version



,dlx_l0_tx_data
,dlx_l1_tx_data
,dlx_l2_tx_data
,dlx_l3_tx_data
,dlx_l4_tx_data
,dlx_l5_tx_data
,dlx_l6_tx_data
,dlx_l7_tx_data
,dlx_l0_tx_header
,dlx_l1_tx_header
,dlx_l2_tx_header
,dlx_l3_tx_header
,dlx_l4_tx_header
,dlx_l5_tx_header
,dlx_l6_tx_header
,dlx_l7_tx_header
,dlx_l0_tx_seq
,dlx_l1_tx_seq
,dlx_l2_tx_seq
,dlx_l3_tx_seq
,dlx_l4_tx_seq
,dlx_l5_tx_seq
,dlx_l6_tx_seq
,dlx_l7_tx_seq

,pb_io_o0_rx_run_lane
,io_pb_o0_rx_init_done



,tlx_dlx_debug_encode
,tlx_dlx_debug_info


,rx_tx_tx_lane_swap
,rx_tx_crc_error
,rx_tx_retrain
,rx_tx_nack
,rx_tx_tx_ack_rtn
,rx_tx_rx_ack_inc
,rx_tx_tx_ack_ptr_vld
,rx_tx_tx_ack_ptr
,tx_rx_reset
,train_ts2
,train_ts67

,tx_rx_phy_training
,rx_tx_pattern_a
,rx_tx_pattern_b
,rx_tx_sync
,rx_tx_TS1
,rx_tx_TS2
,rx_tx_TS3
,rx_tx_block_lock
,rx_tx_lane_inverted

,cfg_transmit_order
,rx_tx_deskew_done
,rx_tx_linkup
,ln0_rx_tx_last_byte_ts3
,ln1_rx_tx_last_byte_ts3
,ln2_rx_tx_last_byte_ts3
,ln3_rx_tx_last_byte_ts3


,dlx_reset
,tx_rx_training
,tx_rx_disabled_rx_lanes
,dlx_clk
                            


);




output [2:0]      dlx_tlx_init_flit_depth;
output            dlx_tlx_flit_credit;
input             tlx_dlx_flit_valid;
input  [511:0]    tlx_dlx_flit;
output [31:0]     ro_dlx_version;




output [63:0]     dlx_l0_tx_data;
output [63:0]     dlx_l1_tx_data;
output [63:0]     dlx_l2_tx_data;
output [63:0]     dlx_l3_tx_data;
output [63:0]     dlx_l4_tx_data;
output [63:0]     dlx_l5_tx_data;
output [63:0]     dlx_l6_tx_data;
output [63:0]     dlx_l7_tx_data;
output [1:0]      dlx_l0_tx_header;
output [1:0]      dlx_l1_tx_header;
output [1:0]      dlx_l2_tx_header;
output [1:0]      dlx_l3_tx_header;
output [1:0]      dlx_l4_tx_header;
output [1:0]      dlx_l5_tx_header;
output [1:0]      dlx_l6_tx_header;
output [1:0]      dlx_l7_tx_header;
output [5:0]      dlx_l0_tx_seq;
output [5:0]      dlx_l1_tx_seq;
output [5:0]      dlx_l2_tx_seq;
output [5:0]      dlx_l3_tx_seq;
output [5:0]      dlx_l4_tx_seq;
output [5:0]      dlx_l5_tx_seq;
output [5:0]      dlx_l6_tx_seq;
output [5:0]      dlx_l7_tx_seq;


output [7:0]      pb_io_o0_rx_run_lane;
input  [7:0]      io_pb_o0_rx_init_done;




input  [3:0]      tlx_dlx_debug_encode;
input  [31:0]     tlx_dlx_debug_info;



input             rx_tx_tx_lane_swap;
input             rx_tx_crc_error;
input             rx_tx_retrain;
input             rx_tx_nack;
input  [4:0]      rx_tx_tx_ack_rtn;
input  [3:0]      rx_tx_rx_ack_inc;
input             rx_tx_tx_ack_ptr_vld;
input  [6:0]      rx_tx_tx_ack_ptr;
output            tx_rx_reset;
output            train_ts2;
output            train_ts67;
input             cfg_transmit_order;


output            tx_rx_phy_training;
input [7:0]            ln0_rx_tx_last_byte_ts3;  
input [7:0]            ln1_rx_tx_last_byte_ts3;     
input [7:0]            ln2_rx_tx_last_byte_ts3;  
input [7:0]            ln3_rx_tx_last_byte_ts3;     
output [7:0]           tx_rx_disabled_rx_lanes;   

input  [7:0]      rx_tx_pattern_a;
input  [7:0]      rx_tx_pattern_b;
input  [7:0]      rx_tx_sync;
input  [7:0]      rx_tx_TS1;
input  [7:0]      rx_tx_TS2;
input  [7:0]      rx_tx_TS3;
input  [7:0]      rx_tx_block_lock;
input  [7:0]      rx_tx_lane_inverted;

input             rx_tx_deskew_done;
input             rx_tx_linkup;
input             dlx_reset;
output            tx_rx_training;

input             dlx_clk;










wire            pulse_1us;
wire            error_no_fwd_progress;
wire            ctl_que_reset;
wire            ctl_que_stall;
wire            ctl_flt_train_done;        
wire            ctl_flt_stall;       
wire [511:0]    flt_que_data;
wire            ctl_que_use_nghbr_even;
wire            ctl_que_use_nghbr_odd;
wire [63:0]     q0_neighbor_data;
wire [63:0]     q1_neighbor_data;
wire [63:0]     q2_neighbor_data;
wire [63:0]     q3_neighbor_data;
wire [63:0]     q4_neighbor_data;
wire [63:0]     q5_neighbor_data;
wire [63:0]     q6_neighbor_data;
wire [63:0]     q7_neighbor_data;
wire            ctl_que_tx_ts0;
wire            ctl_que_tx_ts1;
wire            ctl_que_tx_ts2;
wire            ctl_que_tx_ts3;
wire [15:0]     ctl_que_good_lanes;
wire [23:0]     ctl_que_deskew;
wire [63:0]     ctl_q0_lane_scrambler;
wire [63:0]     ctl_q1_lane_scrambler;
wire [63:0]     ctl_q2_lane_scrambler;
wire [63:0]     ctl_q3_lane_scrambler;
wire [63:0]     ctl_q4_lane_scrambler;
wire [63:0]     ctl_q5_lane_scrambler;
wire [63:0]     ctl_q6_lane_scrambler;
wire [63:0]     ctl_q7_lane_scrambler;
wire [63:0]     q0_gb0_data;
wire [63:0]     q1_gb1_data;
wire [63:0]     q2_gb2_data;
wire [63:0]     q3_gb3_data;
wire [63:0]     q4_gb4_data;
wire [63:0]     q5_gb5_data;
wire [63:0]     q6_gb6_data;
wire [63:0]     q7_gb7_data;
wire            orx_otx_train_failed;
wire            ctl_gb_train;
wire            ctl_gb_reset;
wire [6:0]      ctl_gb_seq;
wire            ctl_gb_tx_a_pattern;
wire            ctl_gb_tx_b_pattern;
wire            ctl_gb_tx_sync_pattern;
wire [7:0]      ctl_gb_tx_zeros;
wire            ctl_x4_not_x8_tx_mode;

assign orx_otx_train_failed = 1'b0;
  
ocx_dlx_tx_ctl ctl (    

     .rx_tx_tx_lane_swap                   (rx_tx_tx_lane_swap)
    ,.rx_tx_retrain                        (rx_tx_retrain)
    ,.rx_tx_crc_error                      (rx_tx_crc_error)
    ,.rx_tx_nack                           (rx_tx_nack)
    ,.rx_tx_pattern_a                      (rx_tx_pattern_a)
    ,.rx_tx_pattern_b                      (rx_tx_pattern_b)
    ,.rx_tx_sync                           (rx_tx_sync)
    ,.rx_tx_TS1                            (rx_tx_TS1)
    ,.rx_tx_TS2                            (rx_tx_TS2)
    ,.rx_tx_TS3                            (rx_tx_TS3)
    ,.rx_tx_block_lock                     (rx_tx_block_lock)
    ,.io_pb_o0_rx_init_done                (io_pb_o0_rx_init_done)
    ,.rx_tx_deskew_done                    (rx_tx_deskew_done)
    ,.rx_tx_linkup                         (rx_tx_linkup)
    ,.ln0_rx_tx_last_byte_ts3              (ln0_rx_tx_last_byte_ts3)
    ,.ln1_rx_tx_last_byte_ts3              (ln1_rx_tx_last_byte_ts3)
    ,.ln2_rx_tx_last_byte_ts3              (ln2_rx_tx_last_byte_ts3)
    ,.ln3_rx_tx_last_byte_ts3              (ln3_rx_tx_last_byte_ts3)
    ,.tx_rx_disabled_rx_lanes              (tx_rx_disabled_rx_lanes)
    ,.ctl_x4_not_x8_tx_mode                (ctl_x4_not_x8_tx_mode)
    ,.dlx_reset                            (dlx_reset)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.train_ts2                            (train_ts2)
    ,.train_ts67                           (train_ts67)
    ,.pulse_1us                            (pulse_1us)
    ,.error_no_fwd_progress                (error_no_fwd_progress)
    ,.tx_rx_phy_training                   (tx_rx_phy_training)
    ,.tx_rx_training                       (tx_rx_training)
    ,.ctl_flt_train_done                   (ctl_flt_train_done)
    ,.ctl_flt_stall                        (ctl_flt_stall)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.ctl_que_use_nghbr_even               (ctl_que_use_nghbr_even)
    ,.ctl_que_use_nghbr_odd                (ctl_que_use_nghbr_odd)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.ctl_q0_lane_scrambler                (ctl_q0_lane_scrambler)
    ,.ctl_q1_lane_scrambler                (ctl_q1_lane_scrambler)
    ,.ctl_q2_lane_scrambler                (ctl_q2_lane_scrambler)
    ,.ctl_q3_lane_scrambler                (ctl_q3_lane_scrambler)
    ,.ctl_q4_lane_scrambler                (ctl_q4_lane_scrambler)
    ,.ctl_q5_lane_scrambler                (ctl_q5_lane_scrambler)
    ,.ctl_q6_lane_scrambler                (ctl_q6_lane_scrambler)
    ,.ctl_q7_lane_scrambler                (ctl_q7_lane_scrambler)
    ,.pb_io_o0_rx_run_lane                 (pb_io_o0_rx_run_lane)
    ,.ro_dlx_version                       (ro_dlx_version)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_flt flt (
     .tlx_dlx_debug_encode                 (tlx_dlx_debug_encode)
    ,.tlx_dlx_debug_info                   (tlx_dlx_debug_info)
    ,.dlx_reset                            (dlx_reset)
    ,.rx_tx_sync                           (rx_tx_sync)
    ,.rx_tx_lane_inverted                  (rx_tx_lane_inverted)
    ,.pulse_1us                            (pulse_1us)
    ,.error_no_fwd_progress                (error_no_fwd_progress)
    ,.ctl_flt_train_done                   (ctl_flt_train_done)
    ,.ctl_flt_stall                        (ctl_flt_stall)
    ,.dlx_tlx_init_flit_depth              (dlx_tlx_init_flit_depth)
    ,.dlx_tlx_flit_credit                  (dlx_tlx_flit_credit)
    ,.tlx_dlx_flit_valid                   (tlx_dlx_flit_valid)
    ,.tlx_dlx_flit                         (tlx_dlx_flit)
    ,.cfg_transmit_order                   (cfg_transmit_order)
    ,.rx_tx_crc_error                      (rx_tx_crc_error)
    ,.rx_tx_nack                           (rx_tx_nack)
    ,.rx_tx_rx_ack_inc                     (rx_tx_rx_ack_inc)
    ,.rx_tx_tx_ack_rtn                     (rx_tx_tx_ack_rtn)
    ,.rx_tx_tx_ack_ptr_vld                 (rx_tx_tx_ack_ptr_vld)
    ,.rx_tx_tx_ack_ptr                     (rx_tx_tx_ack_ptr)
    ,.tx_rx_reset                          (tx_rx_reset)
    ,.flt_que_data                         (flt_que_data[511:0])
    ,.ctl_x4_not_x8_tx_mode                (ctl_x4_not_x8_tx_mode)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q0 (    
     .ctl_que_lane                         (3'b000)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[63:0])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_even)
    ,.neighbor_in_data                     (q1_neighbor_data)
    ,.neighbor_out_data                    (q0_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q0_lane_scrambler)
    ,.que_gb_data                          (q0_gb0_data)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q1 (    
     .ctl_que_lane                         (3'b001)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[127:64])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_odd)
    ,.neighbor_in_data                     (q0_neighbor_data)
    ,.neighbor_out_data                    (q1_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q1_lane_scrambler)
    ,.que_gb_data                          (q1_gb1_data)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q2 (    
     .ctl_que_lane                         (3'b010)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[191:128])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_even)
    ,.neighbor_in_data                     (q3_neighbor_data)
    ,.neighbor_out_data                    (q2_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q2_lane_scrambler)
    ,.que_gb_data                          (q2_gb2_data)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q3 (    
     .ctl_que_lane                         (3'b011)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[255:192])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_odd)
    ,.neighbor_in_data                     (q2_neighbor_data)
    ,.neighbor_out_data                    (q3_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q3_lane_scrambler)
    ,.que_gb_data                          (q3_gb3_data)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q4 (    
     .ctl_que_lane                         (3'b100)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[319:256])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_even)
    ,.neighbor_in_data                     (q5_neighbor_data)
    ,.neighbor_out_data                    (q4_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q4_lane_scrambler)
    ,.que_gb_data                          (q4_gb4_data)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q5 (    
     .ctl_que_lane                         (3'b101)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[383:320])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_odd)
    ,.neighbor_in_data                     (q4_neighbor_data)
    ,.neighbor_out_data                    (q5_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q5_lane_scrambler)
    ,.que_gb_data                          (q5_gb5_data)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q6 (    
     .ctl_que_lane                         (3'b110)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[447:384])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_even)
    ,.neighbor_in_data                     (q7_neighbor_data)
    ,.neighbor_out_data                    (q6_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q6_lane_scrambler)
    ,.que_gb_data                          (q6_gb6_data)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q7 (
     .ctl_que_lane                         (3'b111)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[511:448])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_odd)
    ,.neighbor_in_data                     (q6_neighbor_data)
    ,.neighbor_out_data                    (q7_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q7_lane_scrambler)
    ,.que_gb_data                          (q7_gb7_data)


    ,.dlx_clk                              (dlx_clk)
    );


ocx_dlx_tx_gbx gbx0 ( 
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q0_gb0_data)
    ,.dlx_phy_tx_seq                       (dlx_l0_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l0_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l0_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[0])


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_gbx gbx1 (    
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q1_gb1_data)
    ,.dlx_phy_tx_seq                       (dlx_l1_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l1_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l1_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[1])


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_gbx gbx2 ( 
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q2_gb2_data)
    ,.dlx_phy_tx_seq                       (dlx_l2_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l2_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l2_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[2])


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_gbx gbx3 ( 
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q3_gb3_data)
    ,.dlx_phy_tx_seq                       (dlx_l3_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l3_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l3_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[3])


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_gbx gbx4 ( 
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q4_gb4_data)
    ,.dlx_phy_tx_seq                       (dlx_l4_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l4_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l4_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[4])


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_gbx gbx5 ( 
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q5_gb5_data)
    ,.dlx_phy_tx_seq                       (dlx_l5_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l5_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l5_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[5])


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_gbx gbx6 ( 
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q6_gb6_data)
    ,.dlx_phy_tx_seq                       (dlx_l6_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l6_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l6_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[6])


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_gbx gbx7 ( 
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q7_gb7_data)
    ,.dlx_phy_tx_seq                       (dlx_l7_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l7_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l7_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[7])


    ,.dlx_clk                              (dlx_clk)
    );


endmodule
module ocx_dlx_txdf (

 dlx_tlx_init_flit_depth
,dlx_tlx_flit_credit
,tlx_dlx_flit_valid
,tlx_dlx_flit
,ro_dlx_version



,dlx_l0_tx_data
,dlx_l1_tx_data
,dlx_l2_tx_data
,dlx_l3_tx_data
,dlx_l4_tx_data
,dlx_l5_tx_data
,dlx_l6_tx_data
,dlx_l7_tx_data
,dlx_l0_tx_header
,dlx_l1_tx_header
,dlx_l2_tx_header
,dlx_l3_tx_header
,dlx_l4_tx_header
,dlx_l5_tx_header
,dlx_l6_tx_header
,dlx_l7_tx_header
,dlx_l0_tx_seq
,dlx_l1_tx_seq
,dlx_l2_tx_seq
,dlx_l3_tx_seq
,dlx_l4_tx_seq
,dlx_l5_tx_seq
,dlx_l6_tx_seq
,dlx_l7_tx_seq

,pb_io_o0_rx_run_lane
,io_pb_o0_rx_init_done



,tlx_dlx_debug_encode
,tlx_dlx_debug_info


,rx_tx_tx_lane_swap
,rx_tx_crc_error
,rx_tx_retrain
,rx_tx_nack
,rx_tx_tx_ack_rtn
,rx_tx_rx_ack_inc
,rx_tx_tx_ack_ptr_vld
,rx_tx_tx_ack_ptr
,tx_rx_reset
,train_ts2
,train_ts67

,tx_rx_phy_training
,rx_tx_pattern_a
,rx_tx_pattern_b
,rx_tx_sync
,rx_tx_TS1
,rx_tx_TS2
,rx_tx_TS3
,rx_tx_block_lock
,rx_tx_lane_inverted

,cfg_transmit_order
,rx_tx_deskew_done
,rx_tx_linkup
,ln0_rx_tx_last_byte_ts3
,ln1_rx_tx_last_byte_ts3
,ln2_rx_tx_last_byte_ts3
,ln3_rx_tx_last_byte_ts3


,dlx_reset
,tx_rx_training
,tx_rx_disabled_rx_lanes
,dlx_clk
                            


);





output [2:0]      dlx_tlx_init_flit_depth;
output            dlx_tlx_flit_credit;
input             tlx_dlx_flit_valid;
input  [511:0]    tlx_dlx_flit;
output [31:0]     ro_dlx_version;




output [63:0]     dlx_l0_tx_data;
output [63:0]     dlx_l1_tx_data;
output [63:0]     dlx_l2_tx_data;
output [63:0]     dlx_l3_tx_data;
output [63:0]     dlx_l4_tx_data;
output [63:0]     dlx_l5_tx_data;
output [63:0]     dlx_l6_tx_data;
output [63:0]     dlx_l7_tx_data;
output [1:0]      dlx_l0_tx_header;
output [1:0]      dlx_l1_tx_header;
output [1:0]      dlx_l2_tx_header;
output [1:0]      dlx_l3_tx_header;
output [1:0]      dlx_l4_tx_header;
output [1:0]      dlx_l5_tx_header;
output [1:0]      dlx_l6_tx_header;
output [1:0]      dlx_l7_tx_header;
output [5:0]      dlx_l0_tx_seq;
output [5:0]      dlx_l1_tx_seq;
output [5:0]      dlx_l2_tx_seq;
output [5:0]      dlx_l3_tx_seq;
output [5:0]      dlx_l4_tx_seq;
output [5:0]      dlx_l5_tx_seq;
output [5:0]      dlx_l6_tx_seq;
output [5:0]      dlx_l7_tx_seq;


output [7:0]      pb_io_o0_rx_run_lane;
input  [7:0]      io_pb_o0_rx_init_done;




input  [3:0]      tlx_dlx_debug_encode;
input  [31:0]     tlx_dlx_debug_info;



input             rx_tx_tx_lane_swap;
input             rx_tx_crc_error;
input             rx_tx_retrain;
input             rx_tx_nack;
input  [4:0]      rx_tx_tx_ack_rtn;
input  [3:0]      rx_tx_rx_ack_inc;
input             rx_tx_tx_ack_ptr_vld;
input  [6:0]      rx_tx_tx_ack_ptr;
output            tx_rx_reset;
output            train_ts2;
output            train_ts67;
input             cfg_transmit_order;


output            tx_rx_phy_training;
input [7:0]            ln0_rx_tx_last_byte_ts3;  
input [7:0]            ln1_rx_tx_last_byte_ts3;     
input [7:0]            ln2_rx_tx_last_byte_ts3;  
input [7:0]            ln3_rx_tx_last_byte_ts3;     
output [7:0]           tx_rx_disabled_rx_lanes;   

input  [7:0]      rx_tx_pattern_a;
input  [7:0]      rx_tx_pattern_b;
input  [7:0]      rx_tx_sync;
input  [7:0]      rx_tx_TS1;
input  [7:0]      rx_tx_TS2;
input  [7:0]      rx_tx_TS3;
input  [7:0]      rx_tx_block_lock;
input  [7:0]      rx_tx_lane_inverted;

input             rx_tx_deskew_done;
input             rx_tx_linkup;
input             dlx_reset;
output            tx_rx_training;

input             dlx_clk;










wire            pulse_1us;
wire            error_no_fwd_progress;
wire            ctl_que_reset;
wire            ctl_que_stall;
wire            ctl_flt_train_done;        
wire            ctl_flt_stall;       
wire [511:0]    flt_que_data;
wire            ctl_que_use_nghbr_even;
wire            ctl_que_use_nghbr_odd;
wire [63:0]     q0_neighbor_data;
wire [63:0]     q1_neighbor_data;
wire [63:0]     q2_neighbor_data;
wire [63:0]     q3_neighbor_data;
wire [63:0]     q4_neighbor_data;
wire [63:0]     q5_neighbor_data;
wire [63:0]     q6_neighbor_data;
wire [63:0]     q7_neighbor_data;
wire            ctl_que_tx_ts0;
wire            ctl_que_tx_ts1;
wire            ctl_que_tx_ts2;
wire            ctl_que_tx_ts3;
wire [15:0]     ctl_que_good_lanes;
wire [23:0]     ctl_que_deskew;
wire [63:0]     ctl_q0_lane_scrambler;
wire [63:0]     ctl_q1_lane_scrambler;
wire [63:0]     ctl_q2_lane_scrambler;
wire [63:0]     ctl_q3_lane_scrambler;
wire [63:0]     ctl_q4_lane_scrambler;
wire [63:0]     ctl_q5_lane_scrambler;
wire [63:0]     ctl_q6_lane_scrambler;
wire [63:0]     ctl_q7_lane_scrambler;
wire [63:0]     q0_gb0_data;
wire [63:0]     q1_gb1_data;
wire [63:0]     q2_gb2_data;
wire [63:0]     q3_gb3_data;
wire [63:0]     q4_gb4_data;
wire [63:0]     q5_gb5_data;
wire [63:0]     q6_gb6_data;
wire [63:0]     q7_gb7_data;
wire            orx_otx_train_failed;
wire            ctl_gb_train;
wire            ctl_gb_reset;
wire [6:0]      ctl_gb_seq;
wire            ctl_gb_tx_a_pattern;
wire            ctl_gb_tx_b_pattern;
wire            ctl_gb_tx_sync_pattern;
wire [7:0]      ctl_gb_tx_zeros;
wire            ctl_x4_not_x8_tx_mode;

assign orx_otx_train_failed = 1'b0;
  
ocx_dlx_tx_ctl ctl (    

     .rx_tx_tx_lane_swap                   (rx_tx_tx_lane_swap)
    ,.rx_tx_retrain                        (rx_tx_retrain)
    ,.rx_tx_crc_error                      (rx_tx_crc_error)
    ,.rx_tx_nack                           (rx_tx_nack)
    ,.rx_tx_pattern_a                      (rx_tx_pattern_a)
    ,.rx_tx_pattern_b                      (rx_tx_pattern_b)
    ,.rx_tx_sync                           (rx_tx_sync)
    ,.rx_tx_TS1                            (rx_tx_TS1)
    ,.rx_tx_TS2                            (rx_tx_TS2)
    ,.rx_tx_TS3                            (rx_tx_TS3)
    ,.rx_tx_block_lock                     (rx_tx_block_lock)
    ,.io_pb_o0_rx_init_done                (io_pb_o0_rx_init_done)
    ,.rx_tx_deskew_done                    (rx_tx_deskew_done)
    ,.rx_tx_linkup                         (rx_tx_linkup)
    ,.ln0_rx_tx_last_byte_ts3              (ln0_rx_tx_last_byte_ts3)
    ,.ln1_rx_tx_last_byte_ts3              (ln1_rx_tx_last_byte_ts3)
    ,.ln2_rx_tx_last_byte_ts3              (ln2_rx_tx_last_byte_ts3)
    ,.ln3_rx_tx_last_byte_ts3              (ln3_rx_tx_last_byte_ts3)
    ,.tx_rx_disabled_rx_lanes              (tx_rx_disabled_rx_lanes)
    ,.ctl_x4_not_x8_tx_mode                (ctl_x4_not_x8_tx_mode)
    ,.dlx_reset                            (dlx_reset)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.train_ts2                            (train_ts2)
    ,.train_ts67                           (train_ts67)
    ,.pulse_1us                            (pulse_1us)
    ,.error_no_fwd_progress                (error_no_fwd_progress)
    ,.tx_rx_phy_training                   (tx_rx_phy_training)
    ,.tx_rx_training                       (tx_rx_training)
    ,.ctl_flt_train_done                   (ctl_flt_train_done)
    ,.ctl_flt_stall                        (ctl_flt_stall)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.ctl_que_use_nghbr_even               (ctl_que_use_nghbr_even)
    ,.ctl_que_use_nghbr_odd                (ctl_que_use_nghbr_odd)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.ctl_q0_lane_scrambler                (ctl_q0_lane_scrambler)
    ,.ctl_q1_lane_scrambler                (ctl_q1_lane_scrambler)
    ,.ctl_q2_lane_scrambler                (ctl_q2_lane_scrambler)
    ,.ctl_q3_lane_scrambler                (ctl_q3_lane_scrambler)
    ,.ctl_q4_lane_scrambler                (ctl_q4_lane_scrambler)
    ,.ctl_q5_lane_scrambler                (ctl_q5_lane_scrambler)
    ,.ctl_q6_lane_scrambler                (ctl_q6_lane_scrambler)
    ,.ctl_q7_lane_scrambler                (ctl_q7_lane_scrambler)
    ,.pb_io_o0_rx_run_lane                 (pb_io_o0_rx_run_lane)
    ,.ro_dlx_version                       (ro_dlx_version)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_flt flt (
     .tlx_dlx_debug_encode                 (tlx_dlx_debug_encode)
    ,.tlx_dlx_debug_info                   (tlx_dlx_debug_info)
    ,.dlx_reset                            (dlx_reset)
    ,.rx_tx_sync                           (rx_tx_sync)
    ,.rx_tx_lane_inverted                  (rx_tx_lane_inverted)
    ,.pulse_1us                            (pulse_1us)
    ,.error_no_fwd_progress                (error_no_fwd_progress)
    ,.ctl_flt_train_done                   (ctl_flt_train_done)
    ,.ctl_flt_stall                        (ctl_flt_stall)
    ,.dlx_tlx_init_flit_depth              (dlx_tlx_init_flit_depth)
    ,.dlx_tlx_flit_credit                  (dlx_tlx_flit_credit)
    ,.tlx_dlx_flit_valid                   (tlx_dlx_flit_valid)
    ,.tlx_dlx_flit                         (tlx_dlx_flit)
    ,.cfg_transmit_order                   (cfg_transmit_order)
    ,.rx_tx_crc_error                      (rx_tx_crc_error)
    ,.rx_tx_nack                           (rx_tx_nack)
    ,.rx_tx_rx_ack_inc                     (rx_tx_rx_ack_inc)
    ,.rx_tx_tx_ack_rtn                     (rx_tx_tx_ack_rtn)
    ,.rx_tx_tx_ack_ptr_vld                 (rx_tx_tx_ack_ptr_vld)
    ,.rx_tx_tx_ack_ptr                     (rx_tx_tx_ack_ptr)
    ,.tx_rx_reset                          (tx_rx_reset)
    ,.flt_que_data                         (flt_que_data[511:0])
    ,.ctl_x4_not_x8_tx_mode                (ctl_x4_not_x8_tx_mode)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q0 (    
     .ctl_que_lane                         (3'b000)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[63:0])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_even)
    ,.neighbor_in_data                     (q1_neighbor_data)
    ,.neighbor_out_data                    (q0_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q0_lane_scrambler)
    ,.que_gb_data                          (q0_gb0_data)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q1 (    
     .ctl_que_lane                         (3'b001)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[127:64])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_odd)
    ,.neighbor_in_data                     (q0_neighbor_data)
    ,.neighbor_out_data                    (q1_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q1_lane_scrambler)
    ,.que_gb_data                          (q1_gb1_data)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q2 (    
     .ctl_que_lane                         (3'b010)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[191:128])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_even)
    ,.neighbor_in_data                     (q3_neighbor_data)
    ,.neighbor_out_data                    (q2_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q2_lane_scrambler)
    ,.que_gb_data                          (q2_gb2_data)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q3 (    
     .ctl_que_lane                         (3'b011)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[255:192])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_odd)
    ,.neighbor_in_data                     (q2_neighbor_data)
    ,.neighbor_out_data                    (q3_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q3_lane_scrambler)
    ,.que_gb_data                          (q3_gb3_data)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q4 (    
     .ctl_que_lane                         (3'b100)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[319:256])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_even)
    ,.neighbor_in_data                     (q5_neighbor_data)
    ,.neighbor_out_data                    (q4_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q4_lane_scrambler)
    ,.que_gb_data                          (q4_gb4_data)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q5 (    
     .ctl_que_lane                         (3'b101)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[383:320])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_odd)
    ,.neighbor_in_data                     (q4_neighbor_data)
    ,.neighbor_out_data                    (q5_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q5_lane_scrambler)
    ,.que_gb_data                          (q5_gb5_data)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q6 (    
     .ctl_que_lane                         (3'b110)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[447:384])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_even)
    ,.neighbor_in_data                     (q7_neighbor_data)
    ,.neighbor_out_data                    (q6_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q6_lane_scrambler)
    ,.que_gb_data                          (q6_gb6_data)


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_que q7 (
     .ctl_que_lane                         (3'b111)
    ,.ctl_que_reset                        (ctl_que_reset)
    ,.ctl_que_stall                        (ctl_que_stall)
    ,.flt_que_data                         (flt_que_data[511:448])
    ,.ctl_que_use_neighbor                 (ctl_que_use_nghbr_odd)
    ,.neighbor_in_data                     (q6_neighbor_data)
    ,.neighbor_out_data                    (q7_neighbor_data)
    ,.ctl_que_tx_ts0                       (ctl_que_tx_ts0)
    ,.ctl_que_tx_ts1                       (ctl_que_tx_ts1)
    ,.ctl_que_tx_ts2                       (ctl_que_tx_ts2)
    ,.ctl_que_tx_ts3                       (ctl_que_tx_ts3)
    ,.ctl_que_good_lanes                   (ctl_que_good_lanes)
    ,.ctl_que_deskew                       (ctl_que_deskew)
    ,.ctl_que_lane_scrambler               (ctl_q7_lane_scrambler)
    ,.que_gb_data                          (q7_gb7_data)


    ,.dlx_clk                              (dlx_clk)
    );


ocx_dlx_tx_gbx gbx0 ( 
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q0_gb0_data)
    ,.dlx_phy_tx_seq                       (dlx_l0_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l0_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l0_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[0])


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_gbx gbx1 (    
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q1_gb1_data)
    ,.dlx_phy_tx_seq                       (dlx_l1_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l1_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l1_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[1])


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_gbx gbx2 ( 
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q2_gb2_data)
    ,.dlx_phy_tx_seq                       (dlx_l2_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l2_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l2_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[2])


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_gbx gbx3 ( 
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q3_gb3_data)
    ,.dlx_phy_tx_seq                       (dlx_l3_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l3_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l3_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[3])


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_gbx gbx4 ( 
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q4_gb4_data)
    ,.dlx_phy_tx_seq                       (dlx_l4_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l4_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l4_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[4])


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_gbx gbx5 ( 
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q5_gb5_data)
    ,.dlx_phy_tx_seq                       (dlx_l5_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l5_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l5_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[5])


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_gbx gbx6 ( 
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q6_gb6_data)
    ,.dlx_phy_tx_seq                       (dlx_l6_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l6_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l6_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[6])


    ,.dlx_clk                              (dlx_clk)
    );

ocx_dlx_tx_gbx gbx7 ( 
     .orx_otx_train_failed                 (orx_otx_train_failed)
    ,.ctl_gb_train                         (ctl_gb_train)
    ,.ctl_gb_reset                         (ctl_gb_reset)
    ,.ctl_gb_seq                           (ctl_gb_seq)
    ,.que_gb_data                          (q7_gb7_data)
    ,.dlx_phy_tx_seq                       (dlx_l7_tx_seq)
    ,.dlx_phy_tx_header                    (dlx_l7_tx_header)
    ,.dlx_phy_tx_data                      (dlx_l7_tx_data)
    ,.ctl_gb_tx_a_pattern                  (ctl_gb_tx_a_pattern)
    ,.ctl_gb_tx_b_pattern                  (ctl_gb_tx_b_pattern)
    ,.ctl_gb_tx_sync_pattern               (ctl_gb_tx_sync_pattern)
    ,.ctl_gb_tx_zeros                      (ctl_gb_tx_zeros[7])


    ,.dlx_clk                              (dlx_clk)
    );


endmodule