data/full_repos/permissive/143278/vpi/scanmem3.v
 line:51: before: ";"
1: b'%Warning-STMTDLY: data/full_repos/permissive/143278/vpi/scanmem3.v:48: Unsupported: Ignoring delay on this delayed statement.\n #0;\n ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/143278/vpi/scanmem3.v:49: Unsupported or unknown PLI call: $mempoke\n $mempoke;\n ^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/143278/vpi/scanmem3.v:50: Unsupported: Ignoring delay on this delayed statement.\n #10;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/vpi/scanmem3.v:52: Unsupported: Ignoring delay on this delayed statement.\n #10;\n ^\n%Error: data/full_repos/permissive/143278/vpi/scanmem3.v:53: Unsupported or unknown PLI call: $mempeek\n $mempeek;\n ^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/143278/vpi/scanmem3.v:54: Unsupported: Ignoring delay on this delayed statement.\n #10;\n ^\n%Error: Exiting due to 2 error(s), 4 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module test;

    reg [2:0]	addr;
    reg [7:0]	m_poke[7:0];
    reg [7:0]	m_peek[7:0];

    task f_copy;
	integer i;
    begin
	for (i = 0; i < 8; i = i + 1) begin
	    m_peek[i] = m_poke[i];
	end
    end
    endtask

    task f_dump;
	integer i;
    begin
	$display("Verilog compare m_poke <=> m_peek");
	for (i = 0; i < 8; i = i + 1) begin
	    $display ("  %0d: 'b_%b <=> 'b_%b%s",
		i, m_poke[i], m_peek[i],
		m_poke[i] !== m_peek[i] ? " - ERROR" : "");
	end
    end
    endtask

    initial begin
	#0;
	$mempoke;
	#10;
	f_copy;
	#10;
	$mempeek;
	#10;
	f_dump;
    end

endmodule
module test;


    reg [2:0]	addr;
    reg [7:0]	m_poke[7:0];
    reg [7:0]	m_peek[7:0];

    task f_copy;
	integer i;
    begin
	for (i = 0; i < 8; i = i + 1) begin
	    m_peek[i] = m_poke[i];
	end
    end
    endtask

    task f_dump;
	integer i;
    begin
	$display("Verilog compare m_poke <=> m_peek");
	for (i = 0; i < 8; i = i + 1) begin
	    $display ("  %0d: 'b_%b <=> 'b_%b%s",
		i, m_poke[i], m_peek[i],
		m_poke[i] !== m_peek[i] ? " - ERROR" : "");
	end
    end
    endtask

    initial begin
	#0;
	$mempoke;
	#10;
	f_copy;
	#10;
	$mempeek;
	#10;
	f_dump;
    end

endmodule