data/full_repos/permissive/102039998/control.v
None: at end of input
1: b'%Error: data/full_repos/permissive/102039998/control.v:1: Cannot find include file: mips.h\n`include "mips.h" \n         ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/102039998,data/full_repos/permissive/102039998/mips.h\n             data/full_repos/permissive/102039998,data/full_repos/permissive/102039998/mips.h.v\n             data/full_repos/permissive/102039998,data/full_repos/permissive/102039998/mips.h.sv\n             mips.h\n             mips.h.v\n             mips.h.sv\n             obj_dir/mips.h\n             obj_dir/mips.h.v\n             obj_dir/mips.h.sv\n%Error: data/full_repos/permissive/102039998/control.v:25: Define or directive not defined: \'`ADDI\'\n    regdst <= (opcode == `ADDI || opcode == `ORI || opcode == `LW) ? 0 : 1;\n                         ^~~~~\n%Error: data/full_repos/permissive/102039998/control.v:25: syntax error, unexpected ||, expecting TYPE-IDENTIFIER\n    regdst <= (opcode == `ADDI || opcode == `ORI || opcode == `LW) ? 0 : 1;\n                               ^~\n%Error: data/full_repos/permissive/102039998/control.v:25: Define or directive not defined: \'`ORI\'\n    regdst <= (opcode == `ADDI || opcode == `ORI || opcode == `LW) ? 0 : 1;\n                                            ^~~~\n%Error: data/full_repos/permissive/102039998/control.v:25: Define or directive not defined: \'`LW\'\n    regdst <= (opcode == `ADDI || opcode == `ORI || opcode == `LW) ? 0 : 1;\n                                                              ^~~\n%Error: data/full_repos/permissive/102039998/control.v:28: Define or directive not defined: \'`J\'\n    jump <= (opcode == `J||opcode == `JAL) ? 1 : 0;\n                       ^~\n%Error: data/full_repos/permissive/102039998/control.v:28: syntax error, unexpected ||, expecting TYPE-IDENTIFIER\n    jump <= (opcode == `J||opcode == `JAL) ? 1 : 0;\n                         ^~\n%Error: data/full_repos/permissive/102039998/control.v:28: Define or directive not defined: \'`JAL\'\n    jump <= (opcode == `J||opcode == `JAL) ? 1 : 0;\n                                     ^~~~\n%Error: data/full_repos/permissive/102039998/control.v:31: Define or directive not defined: \'`BEQ\'\n    branch <= (opcode ==`BEQ||opcode == `BNE) ? 1 : 0;\n                        ^~~~\n%Error: data/full_repos/permissive/102039998/control.v:31: syntax error, unexpected ||, expecting TYPE-IDENTIFIER\n    branch <= (opcode ==`BEQ||opcode == `BNE) ? 1 : 0;\n                            ^~\n%Error: data/full_repos/permissive/102039998/control.v:31: Define or directive not defined: \'`BNE\'\n    branch <= (opcode ==`BEQ||opcode == `BNE) ? 1 : 0;\n                                        ^~~~\n%Error: data/full_repos/permissive/102039998/control.v:34: Define or directive not defined: \'`LW\'\n    memread <= (opcode ==`LW) ? 1 : 0;\n                         ^~~\n%Error: data/full_repos/permissive/102039998/control.v:34: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n    memread <= (opcode ==`LW) ? 1 : 0;\n                            ^\n%Error: data/full_repos/permissive/102039998/control.v:37: Define or directive not defined: \'`LW\'\n    memtoreg <= (opcode == `LW) ? 1 : 0;\n                           ^~~\n%Error: data/full_repos/permissive/102039998/control.v:37: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n    memtoreg <= (opcode == `LW) ? 1 : 0;\n                              ^\n%Error: data/full_repos/permissive/102039998/control.v:41: Define or directive not defined: \'`AND\'\n      `AND: aluop = `ALU_AND;\n      ^~~~\n%Error: data/full_repos/permissive/102039998/control.v:41: syntax error, unexpected \':\', expecting endcase\n      `AND: aluop = `ALU_AND;\n          ^\n%Error: data/full_repos/permissive/102039998/control.v:41: Define or directive not defined: \'`ALU_AND\'\n      `AND: aluop = `ALU_AND;\n                    ^~~~~~~~\n%Error: data/full_repos/permissive/102039998/control.v:42: Define or directive not defined: \'`OR\'\n      `OR: aluop = `ALU_OR;\n      ^~~\n%Error: data/full_repos/permissive/102039998/control.v:42: Define or directive not defined: \'`ALU_OR\'\n      `OR: aluop = `ALU_OR;\n                   ^~~~~~~\n%Error: data/full_repos/permissive/102039998/control.v:43: Define or directive not defined: \'`ORI\'\n      `ORI: aluop = `ALU_OR;\n      ^~~~\n%Error: data/full_repos/permissive/102039998/control.v:43: Define or directive not defined: \'`ALU_OR\'\n      `ORI: aluop = `ALU_OR;\n                    ^~~~~~~\n%Error: data/full_repos/permissive/102039998/control.v:44: Define or directive not defined: \'`ADD\'\n      `ADD: aluop = `ALU_add;\n      ^~~~\n%Error: data/full_repos/permissive/102039998/control.v:44: Define or directive not defined: \'`ALU_add\'\n      `ADD: aluop = `ALU_add;\n                    ^~~~~~~~\n%Error: data/full_repos/permissive/102039998/control.v:45: Define or directive not defined: \'`ADDI\'\n      `ADDI: aluop = `ALU_add;\n      ^~~~~\n%Error: data/full_repos/permissive/102039998/control.v:45: Define or directive not defined: \'`ALU_add\'\n      `ADDI: aluop = `ALU_add;\n                     ^~~~~~~~\n%Error: data/full_repos/permissive/102039998/control.v:46: Define or directive not defined: \'`ADDIU\'\n      `ADDIU: aluop = `ALU_add;  \n      ^~~~~~\n%Error: data/full_repos/permissive/102039998/control.v:46: Define or directive not defined: \'`ALU_add\'\n      `ADDIU: aluop = `ALU_add;  \n                      ^~~~~~~~\n%Error: data/full_repos/permissive/102039998/control.v:47: Define or directive not defined: \'`LW\'\n      `LW: aluop = `ALU_add;\n      ^~~\n%Error: data/full_repos/permissive/102039998/control.v:47: Define or directive not defined: \'`ALU_add\'\n      `LW: aluop = `ALU_add;\n                   ^~~~~~~~\n%Error: data/full_repos/permissive/102039998/control.v:48: Define or directive not defined: \'`SW\'\n      `SW: aluop = `ALU_add;\n      ^~~\n%Error: data/full_repos/permissive/102039998/control.v:48: Define or directive not defined: \'`ALU_add\'\n      `SW: aluop = `ALU_add;\n                   ^~~~~~~~\n%Error: data/full_repos/permissive/102039998/control.v:49: Define or directive not defined: \'`SUB\'\n      `SUB: aluop = `ALU_sub;\n      ^~~~\n%Error: data/full_repos/permissive/102039998/control.v:49: Define or directive not defined: \'`ALU_sub\'\n      `SUB: aluop = `ALU_sub;\n                    ^~~~~~~~\n%Error: data/full_repos/permissive/102039998/control.v:50: Define or directive not defined: \'`BEQ\'\n      `BEQ: aluop = `ALU_sub;\n      ^~~~\n%Error: data/full_repos/permissive/102039998/control.v:50: Define or directive not defined: \'`ALU_sub\'\n      `BEQ: aluop = `ALU_sub;\n                    ^~~~~~~~\n%Error: data/full_repos/permissive/102039998/control.v:51: Define or directive not defined: \'`BNE\'\n      `BNE: aluop = `ALU_sub;\n      ^~~~\n%Error: data/full_repos/permissive/102039998/control.v:51: Define or directive not defined: \'`ALU_sub\'\n      `BNE: aluop = `ALU_sub;\n                    ^~~~~~~~\n%Error: data/full_repos/permissive/102039998/control.v:52: Define or directive not defined: \'`SLT\'\n      `SLT: aluop = `ALU_slt;\n      ^~~~\n%Error: data/full_repos/permissive/102039998/control.v:52: Define or directive not defined: \'`ALU_slt\'\n      `SLT: aluop = `ALU_slt;\n                    ^~~~~~~~\n%Error: data/full_repos/permissive/102039998/control.v:53: Define or directive not defined: \'`ALU_undef\'\n                                                         : ... Suggested alternative: \'`undef\'\n      default: aluop = `ALU_undef;\n                       ^~~~~~~~~~\n%Error: data/full_repos/permissive/102039998/control.v:59: Define or directive not defined: \'`SW\'\n    memwrite <= (opcode ==`SW) ? 1 : 0;\n                          ^~~\n%Error: data/full_repos/permissive/102039998/control.v:59: syntax error, unexpected \')\', expecting TYPE-IDENTIFIER\n    memwrite <= (opcode ==`SW) ? 1 : 0;\n                             ^\n%Error: data/full_repos/permissive/102039998/control.v:62: Define or directive not defined: \'`ADDI\'\n    alusrc <= (opcode==`ADDI||opcode == `ADDIU||opcode==`ORI||opcode==`LW||opcode==`SW)?1:0;\n                       ^~~~~\n%Error: data/full_repos/permissive/102039998/control.v:62: syntax error, unexpected ||, expecting TYPE-IDENTIFIER\n    alusrc <= (opcode==`ADDI||opcode == `ADDIU||opcode==`ORI||opcode==`LW||opcode==`SW)?1:0;\n                            ^~\n%Error: data/full_repos/permissive/102039998/control.v:62: Define or directive not defined: \'`ADDIU\'\n    alusrc <= (opcode==`ADDI||opcode == `ADDIU||opcode==`ORI||opcode==`LW||opcode==`SW)?1:0;\n                                        ^~~~~~\n%Error: data/full_repos/permissive/102039998/control.v:62: Define or directive not defined: \'`ORI\'\n    alusrc <= (opcode==`ADDI||opcode == `ADDIU||opcode==`ORI||opcode==`LW||opcode==`SW)?1:0;\n                                                        ^~~~\n%Error: data/full_repos/permissive/102039998/control.v:62: Define or directive not defined: \'`LW\'\n    alusrc <= (opcode==`ADDI||opcode == `ADDIU||opcode==`ORI||opcode==`LW||opcode==`SW)?1:0;\n                                                                      ^~~\n%Error: data/full_repos/permissive/102039998/control.v:62: Define or directive not defined: \'`SW\'\n    alusrc <= (opcode==`ADDI||opcode == `ADDIU||opcode==`ORI||opcode==`LW||opcode==`SW)?1:0;\n                                                                                   ^~~\n%Error: data/full_repos/permissive/102039998/control.v:64: Define or directive not defined: \'`SW\'\n    regwrite <= (opcode == `SW||opcode == `BEQ||opcode == `BNE||opcode == `J||opcode == `JR) ? 0 : 1;\n                           ^~~\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
module SYSCALL_controller(input [31:0]instruction, input clk, output reg syscall);
  initial
    syscall <= 0;

  always @(negedge clk) begin

    syscall = (instruction == {28'h0,`SYSCALL}) ? 1 : 0;
  end
endmodule
module SYSCALL_controller(input [31:0]instruction, input clk, output reg syscall);

  initial
    syscall <= 0;

  always @(negedge clk) begin

    syscall = (instruction == {28'h0,`SYSCALL}) ? 1 : 0;
  end
endmodule