data/full_repos/permissive/200314387/verilog/uart/um245r.v
 line:34: before: "scale"
1: b'%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:16: Cannot find include file: ../lib/assertion.v\n`include "../lib/assertion.v" \n         ^~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/200314387/verilog/uart,data/full_repos/permissive/200314387/../lib/assertion.v\n             data/full_repos/permissive/200314387/verilog/uart,data/full_repos/permissive/200314387/../lib/assertion.v.v\n             data/full_repos/permissive/200314387/verilog/uart,data/full_repos/permissive/200314387/../lib/assertion.v.sv\n             ../lib/assertion.v\n             ../lib/assertion.v.v\n             ../lib/assertion.v.sv\n             obj_dir/../lib/assertion.v\n             obj_dir/../lib/assertion.v.v\n             obj_dir/../lib/assertion.v.sv\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:154: Define or directive not defined: \'`FINISH_AND_RETURN\'\n            if (EXIT_ON_BAD_TIMING == 1) `FINISH_AND_RETURN(1);\n                                         ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:154: syntax error, unexpected \';\'\n            if (EXIT_ON_BAD_TIMING == 1) `FINISH_AND_RETURN(1);\n                                                              ^\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:179: Define or directive not defined: \'`FINISH_AND_RETURN\'\n                if (EXIT_ON_BAD_TIMING == 1) `FINISH_AND_RETURN(1);\n                                             ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:179: syntax error, unexpected \';\'\n                if (EXIT_ON_BAD_TIMING == 1) `FINISH_AND_RETURN(1);\n                                                                  ^\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:202: Define or directive not defined: \'`FINISH_AND_RETURN\'\n                if (EXIT_ON_BAD_TIMING == 1) `FINISH_AND_RETURN(1);\n                                             ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:202: syntax error, unexpected \';\'\n                if (EXIT_ON_BAD_TIMING == 1) `FINISH_AND_RETURN(1);\n                                                                  ^\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:207: Define or directive not defined: \'`FINISH_AND_RETURN\'\n                if (EXIT_ON_BAD_TIMING == 1) `FINISH_AND_RETURN(1);\n                                             ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:207: syntax error, unexpected \';\'\n                if (EXIT_ON_BAD_TIMING == 1) `FINISH_AND_RETURN(1);\n                                                                  ^\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:224: Define or directive not defined: \'`FINISH_AND_RETURN\'\n                if (EXIT_ON_BAD_TIMING == 1) `FINISH_AND_RETURN(1);\n                                             ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:224: syntax error, unexpected \';\'\n                if (EXIT_ON_BAD_TIMING == 1) `FINISH_AND_RETURN(1);\n                                                                  ^\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:259: Unsupported or unknown PLI call: $timeformat\n    $timeformat(-9, 0, "ns", 6); \n    ^~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:288: Define or directive not defined: \'`FINISH_AND_RETURN\'\n                `FINISH_AND_RETURN(1);\n                ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:288: syntax error, unexpected \';\'\n                `FINISH_AND_RETURN(1);\n                                     ^\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:300: Define or directive not defined: \'`FINISH_AND_RETURN\'\n                `FINISH_AND_RETURN(1);\n                ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:300: syntax error, unexpected \';\'\n                `FINISH_AND_RETURN(1);\n                                     ^\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:390: Define or directive not defined: \'`FINISH_AND_RETURN\'\n                        `FINISH_AND_RETURN(0);\n                        ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/200314387/verilog/uart/um245r.v:390: syntax error, unexpected \';\'\n                        `FINISH_AND_RETURN(0);\n                                             ^\n%Error: Exiting due to 18 error(s)\n'
function string strip;
    input string str;
    begin
        strip = str;
        if (str.len() > 0) begin
            if (str[str.len()-1] == `NL) begin
                strip = str.substr(0, str.len()-2); 
            end
        end
    end
endfunction
function string strip;

    input string str;
    begin
        strip = str;
        if (str.len() > 0) begin
            if (str[str.len()-1] == `NL) begin
                strip = str.substr(0, str.len()-2); 
            end
        end
    end
endfunction