data/full_repos/permissive/14593708/control/microsequencer.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b"%Error: data/full_repos/permissive/14593708/control/microsequencer.v:9: Cannot find file containing module: 'microdispatcher'\n    microdispatcher udispatcher(opcode, start_address);\n    ^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/14593708/control,data/full_repos/permissive/14593708/microdispatcher\n             data/full_repos/permissive/14593708/control,data/full_repos/permissive/14593708/microdispatcher.v\n             data/full_repos/permissive/14593708/control,data/full_repos/permissive/14593708/microdispatcher.sv\n             microdispatcher\n             microdispatcher.v\n             microdispatcher.sv\n             obj_dir/microdispatcher\n             obj_dir/microdispatcher.v\n             obj_dir/microdispatcher.sv\n%Error: data/full_repos/permissive/14593708/control/microsequencer.v:14: Cannot find file containing module: 'multiplexor_2x1'\n    multiplexor_2x1 address_mux(is_last[1], next_address, start_address,\n    ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/14593708/control/microsequencer.v:16: Cannot find file containing module: 'register'\n    register#(3)    uaddress_register(address, enable_count, address);\n    ^~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module microsequencer(input       enable_count,
                      input[3:0]  opcode,
                      input[2:0]  next_address,
                      output[2:0] address);

    wire[1:0] is_last;
    wire[2:0] new_address;

    microdispatcher udispatcher(opcode, start_address);

    and (is_last[0], next_address[0], next_address[1]);
    and (is_last[1], is_last[0], next_address[2]);

    multiplexor_2x1 address_mux(is_last[1], next_address, start_address,
                                new_address);
    register#(3)    uaddress_register(address, enable_count, address);

endmodule
module microsequencer(input       enable_count,
                      input[3:0]  opcode,
                      input[2:0]  next_address,
                      output[2:0] address);


    wire[1:0] is_last;
    wire[2:0] new_address;

    microdispatcher udispatcher(opcode, start_address);

    and (is_last[0], next_address[0], next_address[1]);
    and (is_last[1], is_last[0], next_address[2]);

    multiplexor_2x1 address_mux(is_last[1], next_address, start_address,
                                new_address);
    register#(3)    uaddress_register(address, enable_count, address);

endmodule