data/full_repos/permissive/143278/ivltests/br948.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/br948.v:32: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/br948.v:44: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/br948.v:56: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n%Error: Exiting due to 3 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module top;
  reg pass;
  reg in;
  reg pout;
  wire out;

  function invert;
    input in;











    begin: block_name
      invert = ~in;
      $display("Function should return %b when given %b.", invert, in);
    end
  endfunction

  assign out = invert(in);

  initial begin
    pass = 1'b1;

    in = 1'b0;
    #1;
    if (out !== 1'b1) begin
      $display("CA result was %b when given %b, expect 1'b1.", out, in);
      pass = 1'b0;
    end
    pout = invert(in);
    if (pout !== 1'b1) begin
      $display("Result was %b when given %b, expect 1'b1.", pout, in);
      pass = 1'b0;
    end

    in = 1'b1;
    #1;
    if (out !== 1'b0) begin
      $display("CA result was %b when given %b, expect 1'b0.", out, in);
      pass = 1'b0;
    end
    pout = invert(in);
    if (pout !== 1'b0) begin
      $display("Result was %b when given %b, expect 1'b0.", pout, in);
      pass = 1'b0;
    end

    in = 1'bz;
    #1;
    if (out !== 1'bx) begin
      $display("CA result was %b when given %b, expect 1'bx.", out, in);
      pass = 1'b0;
    end
    pout = invert(in);
    if (pout !== 1'bx) begin
      $display("Result was %b when given %b, expect 1'bx.", pout, in);
      pass = 1'b0;
    end

    if (pass) $display("PASSED");
  end

endmodule
module top;

  reg pass;
  reg in;
  reg pout;
  wire out;

  function invert;
    input in;











    begin: block_name
      invert = ~in;
      $display("Function should return %b when given %b.", invert, in);
    end
  endfunction

  assign out = invert(in);

  initial begin
    pass = 1'b1;

    in = 1'b0;
    #1;
    if (out !== 1'b1) begin
      $display("CA result was %b when given %b, expect 1'b1.", out, in);
      pass = 1'b0;
    end
    pout = invert(in);
    if (pout !== 1'b1) begin
      $display("Result was %b when given %b, expect 1'b1.", pout, in);
      pass = 1'b0;
    end

    in = 1'b1;
    #1;
    if (out !== 1'b0) begin
      $display("CA result was %b when given %b, expect 1'b0.", out, in);
      pass = 1'b0;
    end
    pout = invert(in);
    if (pout !== 1'b0) begin
      $display("Result was %b when given %b, expect 1'b0.", pout, in);
      pass = 1'b0;
    end

    in = 1'bz;
    #1;
    if (out !== 1'bx) begin
      $display("CA result was %b when given %b, expect 1'bx.", out, in);
      pass = 1'b0;
    end
    pout = invert(in);
    if (pout !== 1'bx) begin
      $display("Result was %b when given %b, expect 1'bx.", pout, in);
      pass = 1'b0;
    end

    if (pass) $display("PASSED");
  end

endmodule