data/full_repos/permissive/150152921/apps/md5/step2/rtl/Md5CoreWrapper.v
1: b"%Error: data/full_repos/permissive/150152921/apps/md5/step2/rtl/Md5CoreWrapper.v:51: Cannot find file containing module: 'regchain'\n regchain #(63, 512) wb_in_hp(CLK, WB_IN, wb_in);\n ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/150152921/apps/md5/step2/rtl,data/full_repos/permissive/150152921/regchain\n             data/full_repos/permissive/150152921/apps/md5/step2/rtl,data/full_repos/permissive/150152921/regchain.v\n             data/full_repos/permissive/150152921/apps/md5/step2/rtl,data/full_repos/permissive/150152921/regchain.sv\n             regchain\n             regchain.v\n             regchain.sv\n             obj_dir/regchain\n             obj_dir/regchain.v\n             obj_dir/regchain.sv\n%Error: data/full_repos/permissive/150152921/apps/md5/step2/rtl/Md5CoreWrapper.v:52: Cannot find file containing module: 'regchain'\n regchain #(63, 32) a_in_hp(CLK, A_IN, a_in);\n ^~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/md5/step2/rtl/Md5CoreWrapper.v:53: Cannot find file containing module: 'regchain'\n regchain #(63, 32) b_in_hp(CLK, B_IN, b_in);\n ^~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/md5/step2/rtl/Md5CoreWrapper.v:54: Cannot find file containing module: 'regchain'\n regchain #(63, 32) c_in_hp(CLK, C_IN, c_in);\n ^~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/md5/step2/rtl/Md5CoreWrapper.v:55: Cannot find file containing module: 'regchain'\n regchain #(63, 32) d_in_hp(CLK, D_IN, d_in);\n ^~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/md5/step2/rtl/Md5CoreWrapper.v:58: Cannot find file containing module: 'Md5Core'\n Md5Core core\n ^~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/md5/step2/rtl/Md5CoreWrapper.v:78: Cannot find file containing module: 'regchain'\n regchain #(0, 32) a_out_hp(CLK, a_out, A_OUT);\n ^~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/md5/step2/rtl/Md5CoreWrapper.v:79: Cannot find file containing module: 'regchain'\n regchain #(0, 32) b_out_hp(CLK, b_out, B_OUT);\n ^~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/md5/step2/rtl/Md5CoreWrapper.v:80: Cannot find file containing module: 'regchain'\n regchain #(0, 32) c_out_hp(CLK, c_out, C_OUT);\n ^~~~~~~~\n%Error: data/full_repos/permissive/150152921/apps/md5/step2/rtl/Md5CoreWrapper.v:81: Cannot find file containing module: 'regchain'\n regchain #(0, 32) d_out_hp(CLK, d_out, D_OUT);\n ^~~~~~~~\n%Error: Exiting due to 10 error(s)\n"
module top
(
	input		CLK,
	input	[511:0]	WB_IN,
	input	[31:0]	A_IN,
	input	[31:0]	B_IN,
	input	[31:0]	C_IN,
	input	[31:0]	D_IN,
	output	[31:0]	A_OUT,
	output	[31:0]	B_OUT,
	output	[31:0]	C_OUT,
	output	[31:0]	D_OUT
);

	wire	[511:0]	wb_in;
	wire	[31:0]	a_in, b_in, c_in, d_in;
	wire	[31:0]	a_out, b_out, c_out, d_out;

`ifdef TTDSE
	regchain #(`NUM_FRONT, 512) wb_in_hp(CLK, WB_IN, wb_in);
	regchain #(`NUM_FRONT, 32) a_in_hp(CLK, A_IN, a_in);
	regchain #(`NUM_FRONT, 32) b_in_hp(CLK, B_IN, b_in);
	regchain #(`NUM_FRONT, 32) c_in_hp(CLK, C_IN, c_in);
	regchain #(`NUM_FRONT, 32) d_in_hp(CLK, D_IN, d_in);
`else
	regchain #(63, 512) wb_in_hp(CLK, WB_IN, wb_in);
	regchain #(63, 32) a_in_hp(CLK, A_IN, a_in);
	regchain #(63, 32) b_in_hp(CLK, B_IN, b_in);
	regchain #(63, 32) c_in_hp(CLK, C_IN, c_in);
	regchain #(63, 32) d_in_hp(CLK, D_IN, d_in);
`endif

	Md5Core core
	(
		.clk(CLK),
		.wb(wb_in),
		.a0(a_in),
		.b0(b_in),
		.c0(c_in),
		.d0(d_in),
		.a64(a_out),
		.b64(b_out),
		.c64(c_out),
		.d64(d_out)
	);

`ifdef TTDSE
	regchain #(`NUM_BACK, 32) a_out_hp(CLK, a_out, A_OUT);
	regchain #(`NUM_BACK, 32) b_out_hp(CLK, b_out, B_OUT);
	regchain #(`NUM_BACK, 32) c_out_hp(CLK, c_out, C_OUT);
	regchain #(`NUM_BACK, 32) d_out_hp(CLK, d_out, D_OUT);
`else
	regchain #(0, 32) a_out_hp(CLK, a_out, A_OUT);
	regchain #(0, 32) b_out_hp(CLK, b_out, B_OUT);
	regchain #(0, 32) c_out_hp(CLK, c_out, C_OUT);
	regchain #(0, 32) d_out_hp(CLK, d_out, D_OUT);
`endif

endmodule
module top
(
	input		CLK,
	input	[511:0]	WB_IN,
	input	[31:0]	A_IN,
	input	[31:0]	B_IN,
	input	[31:0]	C_IN,
	input	[31:0]	D_IN,
	output	[31:0]	A_OUT,
	output	[31:0]	B_OUT,
	output	[31:0]	C_OUT,
	output	[31:0]	D_OUT
);


	wire	[511:0]	wb_in;
	wire	[31:0]	a_in, b_in, c_in, d_in;
	wire	[31:0]	a_out, b_out, c_out, d_out;

`ifdef TTDSE
	regchain #(`NUM_FRONT, 512) wb_in_hp(CLK, WB_IN, wb_in);
	regchain #(`NUM_FRONT, 32) a_in_hp(CLK, A_IN, a_in);
	regchain #(`NUM_FRONT, 32) b_in_hp(CLK, B_IN, b_in);
	regchain #(`NUM_FRONT, 32) c_in_hp(CLK, C_IN, c_in);
	regchain #(`NUM_FRONT, 32) d_in_hp(CLK, D_IN, d_in);
`else
	regchain #(63, 512) wb_in_hp(CLK, WB_IN, wb_in);
	regchain #(63, 32) a_in_hp(CLK, A_IN, a_in);
	regchain #(63, 32) b_in_hp(CLK, B_IN, b_in);
	regchain #(63, 32) c_in_hp(CLK, C_IN, c_in);
	regchain #(63, 32) d_in_hp(CLK, D_IN, d_in);
`endif

	Md5Core core
	(
		.clk(CLK),
		.wb(wb_in),
		.a0(a_in),
		.b0(b_in),
		.c0(c_in),
		.d0(d_in),
		.a64(a_out),
		.b64(b_out),
		.c64(c_out),
		.d64(d_out)
	);

`ifdef TTDSE
	regchain #(`NUM_BACK, 32) a_out_hp(CLK, a_out, A_OUT);
	regchain #(`NUM_BACK, 32) b_out_hp(CLK, b_out, B_OUT);
	regchain #(`NUM_BACK, 32) c_out_hp(CLK, c_out, C_OUT);
	regchain #(`NUM_BACK, 32) d_out_hp(CLK, d_out, D_OUT);
`else
	regchain #(0, 32) a_out_hp(CLK, a_out, A_OUT);
	regchain #(0, 32) b_out_hp(CLK, b_out, B_OUT);
	regchain #(0, 32) c_out_hp(CLK, c_out, C_OUT);
	regchain #(0, 32) d_out_hp(CLK, d_out, D_OUT);
`endif

endmodule