data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v
 line:134: before: "$"
1: b'%Error: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:20: Unsupported or unknown PLI call: $monitorb\n        $monitorb ("%d out = %b a = %b b = %b sel = %b", $time, OUT, A, B, SEL);  \n        ^~~~~~~~~\n%Error: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:24: Unsupported or unknown PLI call: $dumpfile\n      $dumpfile("dump.vcd");  \n      ^~~~~~~~~\n%Error: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:25: Unsupported or unknown PLI call: $dumpvars\n      $dumpvars;     \n      ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:31: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 0; SEL = 0;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:32: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 0; SEL = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:33: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 0; SEL = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:36: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 0; B = 1; SEL = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:37: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 1; SEL = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:38: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 1; SEL = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:39: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 1; SEL = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:42: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 0; B = 1\'bx; SEL = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:43: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 1\'bx; SEL = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:44: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 1\'bx; SEL = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:45: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 1\'bx; SEL = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:48: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 0; B = 1\'bz; SEL = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:49: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 1\'bz; SEL = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:50: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 1\'bz; SEL = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:51: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 1\'bz; SEL = 0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:57: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 0; B = 0; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:58: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 0; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:59: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 0; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:60: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 0; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:63: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 0; B = 1; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:64: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 1; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:65: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 1; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:66: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 1; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:69: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 0; B = 1\'bx; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:70: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 1\'bx; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:71: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 1\'bx; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:72: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 1\'bx; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:75: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 0; B = 1\'bz; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:76: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 1\'bz; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:77: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 1\'bz; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:78: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 1\'bz; SEL = 1;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:84: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 0; B = 0; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:85: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 0; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:86: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 0; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:87: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 0; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:90: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 0; B = 1; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:91: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 1; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:92: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 1; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:93: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 1; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:96: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 0; B = 1\'bx; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:97: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 1\'bx; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:98: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 1\'bx; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:99: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 1\'bx; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:102: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 0; B = 1\'bz; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:103: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 1\'bz; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:104: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 1\'bz; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:105: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 1\'bz; SEL = 1\'bx;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:111: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 0; B = 0; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:112: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 0; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:113: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 0; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:114: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 0; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:117: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 0; B = 1; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:118: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 1; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:119: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 1; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:120: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 1; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:123: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 0; B = 1\'bx; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:124: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 1\'bx; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:125: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 1\'bx; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:126: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 1\'bx; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:129: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 0; B = 1\'bz; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:130: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1; B = 1\'bz; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:131: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bx; B = 1\'bz; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:132: Unsupported: Ignoring delay on this delayed statement.\n    #10 A = 1\'bz; B = 1\'bz; SEL = 1\'bz;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/146246005/Multiplexer/TB_MUX2_1_V2.v:134: Unsupported: Ignoring delay on this delayed statement.\n    #20 $finish;\n    ^\n%Error: Exiting due to 3 error(s), 64 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module TB_MUX2_1();
    reg A, B, SEL;
    wire OUT;

    MUX2_1 UUT(OUT, A, B, SEL);

    initial
        $monitorb ("%d out = %b a = %b b = %b sel = %b", $time, OUT, A, B, SEL);

    initial begin

      $dumpfile("dump.vcd");
      $dumpvars;

      $display("\t\t Tests with SEL = 0");

      $display("\t Tests with B = 0, varying A");
    A = 0; B = 0; SEL = 0;
    #10 A = 1; B = 0; SEL = 0;
    #10 A = 1'bx; B = 0; SEL = 0;
    #10 A = 1'bz; B = 0; SEL = 0;

      $display("\t Tests with B = 1, varying A");
    #10 A = 0; B = 1; SEL = 0;
    #10 A = 1; B = 1; SEL = 0;
    #10 A = 1'bx; B = 1; SEL = 0;
    #10 A = 1'bz; B = 1; SEL = 0;

      $display("\t Tests with B = 1'bx, varying A");
    #10 A = 0; B = 1'bx; SEL = 0;
    #10 A = 1; B = 1'bx; SEL = 0;
    #10 A = 1'bx; B = 1'bx; SEL = 0;
    #10 A = 1'bz; B = 1'bx; SEL = 0;

      $display("\t Tests with B = 1'bz, varying A");
    #10 A = 0; B = 1'bz; SEL = 0;
    #10 A = 1; B = 1'bz; SEL = 0;
    #10 A = 1'bx; B = 1'bz; SEL = 0;
    #10 A = 1'bz; B = 1'bz; SEL = 0;


      $display("\n\t\t Tests with SEL = 1");

      $display ("\t Tests with B = 0, varying A");
    #10 A = 0; B = 0; SEL = 1;
    #10 A = 1; B = 0; SEL = 1;
    #10 A = 1'bx; B = 0; SEL = 1;
    #10 A = 1'bz; B = 0; SEL = 1;

      $display("\t Tests with B = 1, varying A");
    #10 A = 0; B = 1; SEL = 1;
    #10 A = 1; B = 1; SEL = 1;
    #10 A = 1'bx; B = 1; SEL = 1;
    #10 A = 1'bz; B = 1; SEL = 1;

      $display("\t Tests with B = 1'bx, varying A");
    #10 A = 0; B = 1'bx; SEL = 1;
    #10 A = 1; B = 1'bx; SEL = 1;
    #10 A = 1'bx; B = 1'bx; SEL = 1;
    #10 A = 1'bz; B = 1'bx; SEL = 1;

      $display("\t Tests with B = 1'bz, varying A");
    #10 A = 0; B = 1'bz; SEL = 1;
    #10 A = 1; B = 1'bz; SEL = 1;
    #10 A = 1'bx; B = 1'bz; SEL = 1;
    #10 A = 1'bz; B = 1'bz; SEL = 1;


      $display("\n\t\t Tests with SEL = 1'bx");

      $display("\t Tests with B = 0, varying A");
    #10 A = 0; B = 0; SEL = 1'bx;
    #10 A = 1; B = 0; SEL = 1'bx;
    #10 A = 1'bx; B = 0; SEL = 1'bx;
    #10 A = 1'bz; B = 0; SEL = 1'bx;

      $display("\t Tests with B = 1, varying A");
    #10 A = 0; B = 1; SEL = 1'bx;
    #10 A = 1; B = 1; SEL = 1'bx;
    #10 A = 1'bx; B = 1; SEL = 1'bx;
    #10 A = 1'bz; B = 1; SEL = 1'bx;

      $display("\t Tests with B = 1'bx, varying A");
    #10 A = 0; B = 1'bx; SEL = 1'bx;
    #10 A = 1; B = 1'bx; SEL = 1'bx;
    #10 A = 1'bx; B = 1'bx; SEL = 1'bx;
    #10 A = 1'bz; B = 1'bx; SEL = 1'bx;

      $display("\t Tests with B = 1'bz, varying A");
    #10 A = 0; B = 1'bz; SEL = 1'bx;
    #10 A = 1; B = 1'bz; SEL = 1'bx;
    #10 A = 1'bx; B = 1'bz; SEL = 1'bx;
    #10 A = 1'bz; B = 1'bz; SEL = 1'bx;


      $display("\n\t\t Tests with SEL = 1'bz");

      $display("\t Tests with B = 0, varying A");
    #10 A = 0; B = 0; SEL = 1'bz;
    #10 A = 1; B = 0; SEL = 1'bz;
    #10 A = 1'bx; B = 0; SEL = 1'bz;
    #10 A = 1'bz; B = 0; SEL = 1'bz;

      $display("\t Tests with B = 1, varying A");
    #10 A = 0; B = 1; SEL = 1'bz;
    #10 A = 1; B = 1; SEL = 1'bz;
    #10 A = 1'bx; B = 1; SEL = 1'bz;
    #10 A = 1'bz; B = 1; SEL = 1'bz;

      $display("\t Tests with B = 1'bx, varying A");
    #10 A = 0; B = 1'bx; SEL = 1'bz;
    #10 A = 1; B = 1'bx; SEL = 1'bz;
    #10 A = 1'bx; B = 1'bx; SEL = 1'bz;
    #10 A = 1'bz; B = 1'bx; SEL = 1'bz;

      $display("\t Tests with B = 1'bz, varying A");
    #10 A = 0; B = 1'bz; SEL = 1'bz;
    #10 A = 1; B = 1'bz; SEL = 1'bz;
    #10 A = 1'bx; B = 1'bz; SEL = 1'bz;
    #10 A = 1'bz; B = 1'bz; SEL = 1'bz;

    #20 $finish;

    end

endmodule
module TB_MUX2_1();

    reg A, B, SEL;
    wire OUT;

    MUX2_1 UUT(OUT, A, B, SEL);

    initial
        $monitorb ("%d out = %b a = %b b = %b sel = %b", $time, OUT, A, B, SEL);

    initial begin

      $dumpfile("dump.vcd");
      $dumpvars;

      $display("\t\t Tests with SEL = 0");

      $display("\t Tests with B = 0, varying A");
    A = 0; B = 0; SEL = 0;
    #10 A = 1; B = 0; SEL = 0;
    #10 A = 1'bx; B = 0; SEL = 0;
    #10 A = 1'bz; B = 0; SEL = 0;

      $display("\t Tests with B = 1, varying A");
    #10 A = 0; B = 1; SEL = 0;
    #10 A = 1; B = 1; SEL = 0;
    #10 A = 1'bx; B = 1; SEL = 0;
    #10 A = 1'bz; B = 1; SEL = 0;

      $display("\t Tests with B = 1'bx, varying A");
    #10 A = 0; B = 1'bx; SEL = 0;
    #10 A = 1; B = 1'bx; SEL = 0;
    #10 A = 1'bx; B = 1'bx; SEL = 0;
    #10 A = 1'bz; B = 1'bx; SEL = 0;

      $display("\t Tests with B = 1'bz, varying A");
    #10 A = 0; B = 1'bz; SEL = 0;
    #10 A = 1; B = 1'bz; SEL = 0;
    #10 A = 1'bx; B = 1'bz; SEL = 0;
    #10 A = 1'bz; B = 1'bz; SEL = 0;


      $display("\n\t\t Tests with SEL = 1");

      $display ("\t Tests with B = 0, varying A");
    #10 A = 0; B = 0; SEL = 1;
    #10 A = 1; B = 0; SEL = 1;
    #10 A = 1'bx; B = 0; SEL = 1;
    #10 A = 1'bz; B = 0; SEL = 1;

      $display("\t Tests with B = 1, varying A");
    #10 A = 0; B = 1; SEL = 1;
    #10 A = 1; B = 1; SEL = 1;
    #10 A = 1'bx; B = 1; SEL = 1;
    #10 A = 1'bz; B = 1; SEL = 1;

      $display("\t Tests with B = 1'bx, varying A");
    #10 A = 0; B = 1'bx; SEL = 1;
    #10 A = 1; B = 1'bx; SEL = 1;
    #10 A = 1'bx; B = 1'bx; SEL = 1;
    #10 A = 1'bz; B = 1'bx; SEL = 1;

      $display("\t Tests with B = 1'bz, varying A");
    #10 A = 0; B = 1'bz; SEL = 1;
    #10 A = 1; B = 1'bz; SEL = 1;
    #10 A = 1'bx; B = 1'bz; SEL = 1;
    #10 A = 1'bz; B = 1'bz; SEL = 1;


      $display("\n\t\t Tests with SEL = 1'bx");

      $display("\t Tests with B = 0, varying A");
    #10 A = 0; B = 0; SEL = 1'bx;
    #10 A = 1; B = 0; SEL = 1'bx;
    #10 A = 1'bx; B = 0; SEL = 1'bx;
    #10 A = 1'bz; B = 0; SEL = 1'bx;

      $display("\t Tests with B = 1, varying A");
    #10 A = 0; B = 1; SEL = 1'bx;
    #10 A = 1; B = 1; SEL = 1'bx;
    #10 A = 1'bx; B = 1; SEL = 1'bx;
    #10 A = 1'bz; B = 1; SEL = 1'bx;

      $display("\t Tests with B = 1'bx, varying A");
    #10 A = 0; B = 1'bx; SEL = 1'bx;
    #10 A = 1; B = 1'bx; SEL = 1'bx;
    #10 A = 1'bx; B = 1'bx; SEL = 1'bx;
    #10 A = 1'bz; B = 1'bx; SEL = 1'bx;

      $display("\t Tests with B = 1'bz, varying A");
    #10 A = 0; B = 1'bz; SEL = 1'bx;
    #10 A = 1; B = 1'bz; SEL = 1'bx;
    #10 A = 1'bx; B = 1'bz; SEL = 1'bx;
    #10 A = 1'bz; B = 1'bz; SEL = 1'bx;


      $display("\n\t\t Tests with SEL = 1'bz");

      $display("\t Tests with B = 0, varying A");
    #10 A = 0; B = 0; SEL = 1'bz;
    #10 A = 1; B = 0; SEL = 1'bz;
    #10 A = 1'bx; B = 0; SEL = 1'bz;
    #10 A = 1'bz; B = 0; SEL = 1'bz;

      $display("\t Tests with B = 1, varying A");
    #10 A = 0; B = 1; SEL = 1'bz;
    #10 A = 1; B = 1; SEL = 1'bz;
    #10 A = 1'bx; B = 1; SEL = 1'bz;
    #10 A = 1'bz; B = 1; SEL = 1'bz;

      $display("\t Tests with B = 1'bx, varying A");
    #10 A = 0; B = 1'bx; SEL = 1'bz;
    #10 A = 1; B = 1'bx; SEL = 1'bz;
    #10 A = 1'bx; B = 1'bx; SEL = 1'bz;
    #10 A = 1'bz; B = 1'bx; SEL = 1'bz;

      $display("\t Tests with B = 1'bz, varying A");
    #10 A = 0; B = 1'bz; SEL = 1'bz;
    #10 A = 1; B = 1'bz; SEL = 1'bz;
    #10 A = 1'bx; B = 1'bz; SEL = 1'bz;
    #10 A = 1'bz; B = 1'bz; SEL = 1'bz;

    #20 $finish;

    end

endmodule