data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:6: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:1: ... Location of original declaration\nmodule top_module (\n       ^~~~~~~~~~\n                 ... Use "/* verilator lint_off MODDUP */" and lint_on around source to disable this message.\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:10: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:1: ... Location of original declaration\nmodule top_module (\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:16: Duplicate declaration of module: \'top_module\'\nmodule top_module( \n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:1: ... Location of original declaration\nmodule top_module (\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:34: Duplicate declaration of module: \'top_module\'\nmodule top_module ( \n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:1: ... Location of original declaration\nmodule top_module (\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:42: Duplicate declaration of module: \'top_module\'\nmodule top_module( \n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:1: ... Location of original declaration\nmodule top_module (\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:50: Duplicate declaration of module: \'top_module\'\nmodule top_module ( input [1:0] A, input [1:0] B, output z ); \n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:1: ... Location of original declaration\nmodule top_module (\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:54: Duplicate declaration of module: \'top_module\'\nmodule top_module (input x, input y, output z);\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:1: ... Location of original declaration\nmodule top_module (\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:70: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:1: ... Location of original declaration\nmodule top_module (\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:92: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:1: ... Location of original declaration\nmodule top_module (\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:106: Duplicate declaration of module: \'top_module\'\nmodule top_module( \n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:1: ... Location of original declaration\nmodule top_module (\n       ^~~~~~~~~~\n%Warning-MULTITOP: data/full_repos/permissive/148324174/HDLBits/Circuits/BasicGates.v:63: Multiple top level modules\n                                                                                        : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                                                                                        : ... Top module \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                                                                                        : ... Top module \'mod_A\'\nmodule mod_A (input x, input y, output z);\n       ^~~~~\n                                                                                        : ... Top module \'mod_B\'\nmodule mod_B ( input x, input y, output z );\n       ^~~~~\n%Error: Exiting due to 11 warning(s)\n'
module mod_A (input x, input y, output z);
    assign z = (x^y)&x;
endmodule
module mod_A (input x, input y, output z);

    assign z = (x^y)&x;
endmodule