data/full_repos/permissive/194847941/demo/5_RGB_LED/Running_led_tdmap.v
1: b"%Error: data/full_repos/permissive/194847941/demo/5_RGB_LED/Running_led_tdmap.v:83: Unexpected 'do': 'do' is a SystemVerilog keyword misused as an identifier.\n        ... Suggest modify the Verilog-2001 code to avoid SV keywords, or use `begin_keywords or --language.\n    .do({open_n18,open_n19,open_n20,led_b_pad}),\n     ^~\n%Error: data/full_repos/permissive/194847941/demo/5_RGB_LED/Running_led_tdmap.v:83: syntax error, unexpected '(', expecting ')'\n    .do({open_n18,open_n19,open_n20,led_b_pad}),\n        ^\n%Error: data/full_repos/permissive/194847941/demo/5_RGB_LED/Running_led_tdmap.v:177: Unexpected 'do': 'do' is a SystemVerilog keyword misused as an identifier.\n    .do({open_n35,open_n36,open_n37,led_g_pad}),\n     ^~\n%Error: data/full_repos/permissive/194847941/demo/5_RGB_LED/Running_led_tdmap.v:177: syntax error, unexpected '(', expecting ')'\n    .do({open_n35,open_n36,open_n37,led_g_pad}),\n        ^\n%Error: data/full_repos/permissive/194847941/demo/5_RGB_LED/Running_led_tdmap.v:269: Unexpected 'do': 'do' is a SystemVerilog keyword misused as an identifier.\n    .do({open_n52,open_n53,open_n54,led_r_pad}),\n     ^~\n%Error: data/full_repos/permissive/194847941/demo/5_RGB_LED/Running_led_tdmap.v:269: syntax error, unexpected '(', expecting ')'\n    .do({open_n52,open_n53,open_n54,led_r_pad}),\n        ^\n%Error: Exiting due to 6 error(s)\n"
module AL_MUX
  (
  input i0,
  input i1,
  input sel,
  output o
  );

  wire not_sel, sel_i0, sel_i1;
  not u0 (not_sel, sel);
  and u1 (sel_i1, sel, i1);
  and u2 (sel_i0, not_sel, i0);
  or u3 (o, sel_i1, sel_i0);

endmodule
module AL_MUX
  (
  input i0,
  input i1,
  input sel,
  output o
  );


  wire not_sel, sel_i0, sel_i1;
  not u0 (not_sel, sel);
  and u1 (sel_i1, sel, i1);
  and u2 (sel_i0, not_sel, i0);
  or u3 (o, sel_i1, sel_i0);

endmodule