data/full_repos/permissive/14193640/fpga/synchronizer.v
1: b"%Error: data/full_repos/permissive/14193640/fpga/synchronizer.v:11: Cannot find file containing module: 'register_without_reset'\n   register_without_reset #(.WIDTH(WIDTH)) ff1\n   ^~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/14193640/fpga,data/full_repos/permissive/14193640/register_without_reset\n             data/full_repos/permissive/14193640/fpga,data/full_repos/permissive/14193640/register_without_reset.v\n             data/full_repos/permissive/14193640/fpga,data/full_repos/permissive/14193640/register_without_reset.sv\n             register_without_reset\n             register_without_reset.v\n             register_without_reset.sv\n             obj_dir/register_without_reset\n             obj_dir/register_without_reset.v\n             obj_dir/register_without_reset.sv\n%Error: data/full_repos/permissive/14193640/fpga/synchronizer.v:14: Cannot find file containing module: 'register_without_reset'\n   register_without_reset #(.WIDTH(WIDTH)) ff2\n   ^~~~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module synchronizer
  #(parameter WIDTH=1)
  (
   input              clk,
   input  [WIDTH-1:0] in,
   output [WIDTH-1:0] out
   );

   wire [WIDTH-1:0]   ff1_out;

   register_without_reset #(.WIDTH(WIDTH)) ff1
     (.clk(clk), .d(in), .q(ff1_out));

   register_without_reset #(.WIDTH(WIDTH)) ff2
     (.clk(clk), .d(ff1_out), .q(out));

endmodule
module synchronizer
  #(parameter WIDTH=1)
  (
   input              clk,
   input  [WIDTH-1:0] in,
   output [WIDTH-1:0] out
   );


   wire [WIDTH-1:0]   ff1_out;

   register_without_reset #(.WIDTH(WIDTH)) ff1
     (.clk(clk), .d(in), .q(ff1_out));

   register_without_reset #(.WIDTH(WIDTH)) ff2
     (.clk(clk), .d(ff1_out), .q(out));

endmodule