data/full_repos/permissive/143278/ivltests/pr2877555.v
1: b'%Warning-LITENDIAN: data/full_repos/permissive/143278/ivltests/pr2877555.v:4: Little bit endian vector: MSB < LSB of bit range: -1:0\n  wire [A-1:0] x;\n       ^\n                    ... Use "/* verilator lint_off LITENDIAN */" and lint_on around source to disable this message.\n%Warning-LITENDIAN: data/full_repos/permissive/143278/ivltests/pr2877555.v:5: Little bit endian vector: MSB < LSB of bit range: -1:0\n  wire [A-1:0] y = x;\n       ^\n%Error: Exiting due to 2 warning(s)\n'
module testbench;

  parameter A = $clog2(1);
  wire [A-1:0] x;
  wire [A-1:0] y = x;


  initial if ($bits(x) == 2) $display("PASSED");
    else $display("FAILED");
endmodule
module testbench;


  parameter A = $clog2(1);
  wire [A-1:0] x;
  wire [A-1:0] y = x;


  initial if ($bits(x) == 2) $display("PASSED");
    else $display("FAILED");
endmodule