data/full_repos/permissive/157436936/ex4/MAN_decoder_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/157436936/ex4/MAN_decoder_tb.v:30: Unsupported: Ignoring delay on this delayed statement.\n  #100;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/157436936/ex4/MAN_decoder_tb.v:33: Unsupported: Ignoring delay on this delayed statement.\n  #10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/157436936/ex4/MAN_decoder_tb.v:35: Unsupported: Ignoring delay on this delayed statement.\n  #50;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/157436936/ex4/MAN_decoder_tb.v:37: Unsupported: Ignoring delay on this delayed statement.\n  #16;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/157436936/ex4/MAN_decoder_tb.v:39: Unsupported: Ignoring delay on this delayed statement.\n  #16;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/157436936/ex4/MAN_decoder_tb.v:41: Unsupported: Ignoring delay on this delayed statement.\n  #8;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/157436936/ex4/MAN_decoder_tb.v:43: Unsupported: Ignoring delay on this delayed statement.\n  #8;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/157436936/ex4/MAN_decoder_tb.v:45: Unsupported: Ignoring delay on this delayed statement.\n  #8;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/157436936/ex4/MAN_decoder_tb.v:47: Unsupported: Ignoring delay on this delayed statement.\n  #8;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/157436936/ex4/MAN_decoder_tb.v:49: Unsupported: Ignoring delay on this delayed statement.\n  #8;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/157436936/ex4/MAN_decoder_tb.v:53: Unsupported: Ignoring delay on this delayed statement.\n always #1 clk = ~clk;\n        ^\n%Error: data/full_repos/permissive/157436936/ex4/MAN_decoder_tb.v:15: Cannot find file containing module: \'MAN_decoder\'\n MAN_decoder uut (\n ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/157436936/ex4,data/full_repos/permissive/157436936/MAN_decoder\n             data/full_repos/permissive/157436936/ex4,data/full_repos/permissive/157436936/MAN_decoder.v\n             data/full_repos/permissive/157436936/ex4,data/full_repos/permissive/157436936/MAN_decoder.sv\n             MAN_decoder\n             MAN_decoder.v\n             MAN_decoder.sv\n             obj_dir/MAN_decoder\n             obj_dir/MAN_decoder.v\n             obj_dir/MAN_decoder.sv\n%Error: Exiting due to 1 error(s), 11 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module MAN_decoder_tb;


	reg clk;
	reg in;
	reg rst;


	wire strobe;
	wire data;


	MAN_decoder uut (
		.clk(clk), 
		.in(in), 
		.strobe(strobe), 
		.data(data), 
		.rst(rst)
	);
	
	initial begin

		clk = 0;
		in = 1;
		rst = 1;


		#100;

		rst = 0;
		#10;
		rst = 1;
		#50;
		in = 0;
		#16;
		in = 1;
		#16;
		in = 0;
		#8;
		in = 1;
		#8;
		in = 0;
		#8;
		in = 1;
		#8;
		in = 0;
		#8;
		in = 1;
	end
	
	always #1 clk = ~clk;
      
endmodule
module MAN_decoder_tb;



	reg clk;
	reg in;
	reg rst;


	wire strobe;
	wire data;


	MAN_decoder uut (
		.clk(clk), 
		.in(in), 
		.strobe(strobe), 
		.data(data), 
		.rst(rst)
	);
	
	initial begin

		clk = 0;
		in = 1;
		rst = 1;


		#100;

		rst = 0;
		#10;
		rst = 1;
		#50;
		in = 0;
		#16;
		in = 1;
		#16;
		in = 0;
		#8;
		in = 1;
		#8;
		in = 0;
		#8;
		in = 1;
		#8;
		in = 0;
		#8;
		in = 1;
	end
	
	always #1 clk = ~clk;
      
endmodule