data/full_repos/permissive/184332405/compare_tb.v
 line:6: before: "ctrl"
1: b'%Error: data/full_repos/permissive/184332405/compare_tb.v:11: Unsupported or unknown PLI call: $dumpfile\n  $dumpfile("compare.vcd");\n  ^~~~~~~~~\n%Error: data/full_repos/permissive/184332405/compare_tb.v:12: Unsupported or unknown PLI call: $dumpvars\n  $dumpvars(0,Johnson);\n  ^~~~~~~~~\n%Error: data/full_repos/permissive/184332405/compare_tb.v:14: Unsupported or unknown PLI call: $monitor\n  $monitor("%d %d   %d | %d", a, b, ctrl, s);\n  ^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:17: Unsupported: Ignoring delay on this delayed statement.\n  #0  a = 8\'b101 ; b =  8\'b000;  ctrl = 4\'d2;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:18: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = -8\'b101 ; b =  8\'b001;  ctrl = 4\'d2;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:19: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b0 ; b =  8\'b010;  ctrl = 4\'d2;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:20: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'d127 ; b =  -8\'b01;  ctrl = 4\'d2;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:23: Unsupported: Ignoring delay on this delayed statement.\n  #50  a = 8\'b101 ; b =  8\'b000;  ctrl = 4\'d3;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:24: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = -8\'b101 ; b =  8\'b001;  ctrl = 4\'d3;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:25: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b0 ; b =  8\'b010;  ctrl = 4\'d3;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:26: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'d127 ; b =  -8\'b01;  ctrl = 4\'d3;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:29: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b000;  ctrl = 4\'d4;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:30: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = -8\'b101 ; b =  8\'b001;  ctrl = 4\'d4;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:31: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b0 ; b =  8\'b010;  ctrl = 4\'d4;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:32: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'d127 ; b =  -8\'b01;  ctrl = 4\'d4;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:35: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'d5 ; b =  8\'b000;  ctrl = 4\'d5;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:36: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = -8\'d5 ; b =  8\'b001;  ctrl = 4\'d5;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:37: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'d127 ; b =  8\'b000;  ctrl = 4\'d5;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:38: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = -8\'d128 ; b =  8\'b001;  ctrl = 4\'d5;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:41: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b000;  ctrl = 4\'d6;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:42: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = -8\'b101 ; b =  8\'b001;  ctrl = 4\'d6;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:43: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b0 ; b =  8\'b010;  ctrl = 4\'d6;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:44: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'d127 ; b =  -8\'b01;  ctrl = 4\'d6;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:47: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b000;  ctrl = 4\'d7;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:48: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = -8\'b101 ; b =  8\'b001;  ctrl = 4\'d7;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:49: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b0 ; b =  8\'b010;  ctrl = 4\'d7;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:50: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'d127 ; b =  -8\'b01;  ctrl = 4\'d7;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:53: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b000;  ctrl = 4\'d8;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:54: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = -8\'b101 ; b =  8\'b001;  ctrl = 4\'d8;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:55: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b0 ; b =  8\'b010;  ctrl = 4\'d8;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:56: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'d127 ; b =  -8\'b01;  ctrl = 4\'d8;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:59: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b000;  ctrl = 4\'d9;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:60: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = -8\'b101 ; b =  8\'b001;  ctrl = 4\'d9;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:61: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b0 ; b =  8\'b010;  ctrl = 4\'d9;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:62: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'d127 ; b =  -8\'b01;  ctrl = 4\'d9;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:65: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b000;  ctrl = 4\'d10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:66: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = -8\'b101 ; b =  8\'b001;  ctrl = 4\'d10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:67: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b0 ; b =  8\'b010;  ctrl = 4\'d10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:68: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'d127 ; b =  -8\'b01;  ctrl = 4\'d10;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:71: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b101 ; b =  8\'b101;  ctrl = 4\'d11;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:72: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = -8\'b101 ; b =  -8\'b101;  ctrl = 4\'d11;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:73: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'b0 ; b =  8\'b010;  ctrl = 4\'d11;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:74: Unsupported: Ignoring delay on this delayed statement.\n  #50 a = 8\'d127 ; b =  -8\'b01;  ctrl = 4\'d11;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/184332405/compare_tb.v:76: Unsupported: Ignoring delay on this delayed statement.\n  #50 $finish;\n  ^\n%Error: Exiting due to 3 error(s), 41 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module compare_tb;
reg signed [7:0] a;
reg signed [7:0] b;
reg unsigned [3:0] ctrl;
wire signed [7:0] s;

initial
	begin
		$dumpfile("compare.vcd");
		$dumpvars(0,Johnson);
		$display("   a    b  ctrl     s");
		$monitor("%d %d   %d | %d", a, b, ctrl, s);
		

		#0  a = 8'b101	; b =  8'b000;  ctrl = 4'd2;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd2;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd2;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd2;
		

		#50  a = 8'b101	; b =  8'b000;  ctrl = 4'd3;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd3;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd3;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd3;
		

		#50 a = 8'b101	; b =  8'b000;  ctrl = 4'd4;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd4;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd4;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd4;
		

		#50 a = 8'd5	; b =  8'b000;  ctrl = 4'd5;
		#50 a = -8'd5	; b =  8'b001;  ctrl = 4'd5;
		#50 a = 8'd127	; b =  8'b000;  ctrl = 4'd5;
		#50 a = -8'd128	; b =  8'b001;  ctrl = 4'd5;
		

		#50 a = 8'b101	; b =  8'b000;  ctrl = 4'd6;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd6;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd6;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd6;
		

		#50 a = 8'b101	; b =  8'b000;  ctrl = 4'd7;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd7;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd7;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd7;
		

		#50 a = 8'b101	; b =  8'b000;  ctrl = 4'd8;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd8;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd8;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd8;
		

		#50 a = 8'b101	; b =  8'b000;  ctrl = 4'd9;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd9;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd9;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd9;
		

		#50 a = 8'b101	; b =  8'b000;  ctrl = 4'd10;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd10;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd10;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd10;
		

		#50 a = 8'b101	; b =  8'b101;  ctrl = 4'd11;
		#50 a = -8'b101	; b =  -8'b101;  ctrl = 4'd11;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd11;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd11;
		
		#50 $finish;
	end

compare Johnson( s, a, b, ctrl );

endmodule
module compare_tb;

reg signed [7:0] a;
reg signed [7:0] b;
reg unsigned [3:0] ctrl;
wire signed [7:0] s;

initial
	begin
		$dumpfile("compare.vcd");
		$dumpvars(0,Johnson);
		$display("   a    b  ctrl     s");
		$monitor("%d %d   %d | %d", a, b, ctrl, s);
		

		#0  a = 8'b101	; b =  8'b000;  ctrl = 4'd2;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd2;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd2;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd2;
		

		#50  a = 8'b101	; b =  8'b000;  ctrl = 4'd3;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd3;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd3;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd3;
		

		#50 a = 8'b101	; b =  8'b000;  ctrl = 4'd4;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd4;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd4;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd4;
		

		#50 a = 8'd5	; b =  8'b000;  ctrl = 4'd5;
		#50 a = -8'd5	; b =  8'b001;  ctrl = 4'd5;
		#50 a = 8'd127	; b =  8'b000;  ctrl = 4'd5;
		#50 a = -8'd128	; b =  8'b001;  ctrl = 4'd5;
		

		#50 a = 8'b101	; b =  8'b000;  ctrl = 4'd6;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd6;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd6;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd6;
		

		#50 a = 8'b101	; b =  8'b000;  ctrl = 4'd7;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd7;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd7;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd7;
		

		#50 a = 8'b101	; b =  8'b000;  ctrl = 4'd8;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd8;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd8;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd8;
		

		#50 a = 8'b101	; b =  8'b000;  ctrl = 4'd9;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd9;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd9;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd9;
		

		#50 a = 8'b101	; b =  8'b000;  ctrl = 4'd10;
		#50 a = -8'b101	; b =  8'b001;  ctrl = 4'd10;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd10;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd10;
		

		#50 a = 8'b101	; b =  8'b101;  ctrl = 4'd11;
		#50 a = -8'b101	; b =  -8'b101;  ctrl = 4'd11;
		#50 a = 8'b0	; b =  8'b010;  ctrl = 4'd11;
		#50 a = 8'd127	; b =  -8'b01;  ctrl = 4'd11;
		
		#50 $finish;
	end

compare Johnson( s, a, b, ctrl );

endmodule