data/full_repos/permissive/159823067/omercevik_hw4_32bitMips_SingleCycle_Datapath_verilog_files/mips32_instruction_memory.v
data/verilator_xmls/8d141df5-eb1b-4995-bfe1-9c7a91e3bfeb.xml
module mips32_instruction_memory(read_address, instr);

	input [31:0] read_address;
	output [31:0] instr;
	
	
	initial
	begin
		
	end

	
	
endmodule
module mips32_instruction_memory(read_address, instr);


	input [31:0] read_address;
	output [31:0] instr;
	
	
	initial
	begin
		
	end

	
	
endmodule