data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v
1: b'%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:57: Little bit endian vector: MSB < LSB of bit range: 0:9\ninput [0:9] chany_top_in;\n      ^\n                    ... Use "/* verilator lint_off LITENDIAN */" and lint_on around source to disable this message.\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:67: Little bit endian vector: MSB < LSB of bit range: 0:9\ninput [0:9] chanx_right_in;\n      ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:93: Little bit endian vector: MSB < LSB of bit range: 0:9\ninput [0:9] chanx_left_in;\n      ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:121: Little bit endian vector: MSB < LSB of bit range: 0:9\noutput [0:9] chany_top_out;\n       ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:123: Little bit endian vector: MSB < LSB of bit range: 0:9\noutput [0:9] chanx_right_out;\n       ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:125: Little bit endian vector: MSB < LSB of bit range: 0:9\noutput [0:9] chanx_left_out;\n       ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:137: Little bit endian vector: MSB < LSB of bit range: 0:7\nwire [0:7] mux_2level_tapbuf_size10_0_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:138: Little bit endian vector: MSB < LSB of bit range: 0:7\nwire [0:7] mux_2level_tapbuf_size10_0_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:139: Little bit endian vector: MSB < LSB of bit range: 0:7\nwire [0:7] mux_2level_tapbuf_size10_1_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:140: Little bit endian vector: MSB < LSB of bit range: 0:7\nwire [0:7] mux_2level_tapbuf_size10_1_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:143: Little bit endian vector: MSB < LSB of bit range: 0:7\nwire [0:7] mux_2level_tapbuf_size11_0_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:144: Little bit endian vector: MSB < LSB of bit range: 0:7\nwire [0:7] mux_2level_tapbuf_size11_0_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:146: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_0_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:147: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_0_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:148: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_1_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:149: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_1_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:150: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_2_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:151: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_2_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:152: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_3_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:153: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size2_3_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:158: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size3_0_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:159: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size3_0_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:160: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size3_1_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:161: Little bit endian vector: MSB < LSB of bit range: 0:1\nwire [0:1] mux_2level_tapbuf_size3_1_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:164: Little bit endian vector: MSB < LSB of bit range: 0:5\nwire [0:5] mux_2level_tapbuf_size4_0_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:165: Little bit endian vector: MSB < LSB of bit range: 0:5\nwire [0:5] mux_2level_tapbuf_size4_0_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:167: Little bit endian vector: MSB < LSB of bit range: 0:5\nwire [0:5] mux_2level_tapbuf_size5_0_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:168: Little bit endian vector: MSB < LSB of bit range: 0:5\nwire [0:5] mux_2level_tapbuf_size5_0_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:170: Little bit endian vector: MSB < LSB of bit range: 0:7\nwire [0:7] mux_2level_tapbuf_size9_0_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:171: Little bit endian vector: MSB < LSB of bit range: 0:7\nwire [0:7] mux_2level_tapbuf_size9_0_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:172: Little bit endian vector: MSB < LSB of bit range: 0:7\nwire [0:7] mux_2level_tapbuf_size9_1_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:173: Little bit endian vector: MSB < LSB of bit range: 0:7\nwire [0:7] mux_2level_tapbuf_size9_1_sram_inv;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:174: Little bit endian vector: MSB < LSB of bit range: 0:7\nwire [0:7] mux_2level_tapbuf_size9_2_sram;\n     ^\n%Warning-LITENDIAN: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:175: Little bit endian vector: MSB < LSB of bit range: 0:7\nwire [0:7] mux_2level_tapbuf_size9_2_sram_inv;\n     ^\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:244: Cannot find file containing module: \'mux_2level_tapbuf_size5\'\n mux_2level_tapbuf_size5 mux_top_track_0 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing,data/full_repos/permissive/137416811/mux_2level_tapbuf_size5\n             data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing,data/full_repos/permissive/137416811/mux_2level_tapbuf_size5.v\n             data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing,data/full_repos/permissive/137416811/mux_2level_tapbuf_size5.sv\n             mux_2level_tapbuf_size5\n             mux_2level_tapbuf_size5.v\n             mux_2level_tapbuf_size5.sv\n             obj_dir/mux_2level_tapbuf_size5\n             obj_dir/mux_2level_tapbuf_size5.v\n             obj_dir/mux_2level_tapbuf_size5.sv\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:250: Cannot find file containing module: \'mux_2level_tapbuf_size5_mem\'\n mux_2level_tapbuf_size5_mem mem_top_track_0 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:258: Cannot find file containing module: \'mux_2level_tapbuf_size4\'\n mux_2level_tapbuf_size4 mux_top_track_2 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:264: Cannot find file containing module: \'mux_2level_tapbuf_size4_mem\'\n mux_2level_tapbuf_size4_mem mem_top_track_2 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:272: Cannot find file containing module: \'mux_2level_tapbuf_size3\'\n mux_2level_tapbuf_size3 mux_top_track_4 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:278: Cannot find file containing module: \'mux_2level_tapbuf_size3\'\n mux_2level_tapbuf_size3 mux_top_track_6 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:284: Cannot find file containing module: \'mux_2level_tapbuf_size3_mem\'\n mux_2level_tapbuf_size3_mem mem_top_track_4 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:292: Cannot find file containing module: \'mux_2level_tapbuf_size3_mem\'\n mux_2level_tapbuf_size3_mem mem_top_track_6 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:300: Cannot find file containing module: \'mux_2level_tapbuf_size2\'\n mux_2level_tapbuf_size2 mux_top_track_8 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:306: Cannot find file containing module: \'mux_2level_tapbuf_size2\'\n mux_2level_tapbuf_size2 mux_top_track_10 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:312: Cannot find file containing module: \'mux_2level_tapbuf_size2\'\n mux_2level_tapbuf_size2 mux_top_track_12 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:318: Cannot find file containing module: \'mux_2level_tapbuf_size2\'\n mux_2level_tapbuf_size2 mux_top_track_18 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:324: Cannot find file containing module: \'mux_2level_tapbuf_size2_mem\'\n mux_2level_tapbuf_size2_mem mem_top_track_8 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:332: Cannot find file containing module: \'mux_2level_tapbuf_size2_mem\'\n mux_2level_tapbuf_size2_mem mem_top_track_10 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:340: Cannot find file containing module: \'mux_2level_tapbuf_size2_mem\'\n mux_2level_tapbuf_size2_mem mem_top_track_12 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:348: Cannot find file containing module: \'mux_2level_tapbuf_size2_mem\'\n mux_2level_tapbuf_size2_mem mem_top_track_18 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:356: Cannot find file containing module: \'mux_2level_tapbuf_size10\'\n mux_2level_tapbuf_size10 mux_right_track_0 (\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:362: Cannot find file containing module: \'mux_2level_tapbuf_size10\'\n mux_2level_tapbuf_size10 mux_right_track_8 (\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:368: Cannot find file containing module: \'mux_2level_tapbuf_size10_mem\'\n mux_2level_tapbuf_size10_mem mem_right_track_0 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:376: Cannot find file containing module: \'mux_2level_tapbuf_size10_mem\'\n mux_2level_tapbuf_size10_mem mem_right_track_8 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:384: Cannot find file containing module: \'mux_2level_tapbuf_size9\'\n mux_2level_tapbuf_size9 mux_right_track_16 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:390: Cannot find file containing module: \'mux_2level_tapbuf_size9\'\n mux_2level_tapbuf_size9 mux_left_track_9 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:396: Cannot find file containing module: \'mux_2level_tapbuf_size9\'\n mux_2level_tapbuf_size9 mux_left_track_17 (\n ^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:402: Cannot find file containing module: \'mux_2level_tapbuf_size9_mem\'\n mux_2level_tapbuf_size9_mem mem_right_track_16 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:410: Cannot find file containing module: \'mux_2level_tapbuf_size9_mem\'\n mux_2level_tapbuf_size9_mem mem_left_track_9 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:418: Cannot find file containing module: \'mux_2level_tapbuf_size9_mem\'\n mux_2level_tapbuf_size9_mem mem_left_track_17 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:426: Cannot find file containing module: \'mux_2level_tapbuf_size11\'\n mux_2level_tapbuf_size11 mux_left_track_1 (\n ^~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/137416811/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/routing/sb_1__0_.v:432: Cannot find file containing module: \'mux_2level_tapbuf_size11_mem\'\n mux_2level_tapbuf_size11_mem mem_left_track_1 (\n ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: Exiting due to 28 error(s), 34 warning(s)\n'
module sb_1__0_(pReset,
                prog_clk,
                chany_top_in,
                top_left_grid_right_width_0_height_0_subtile_0__pin_O_0_,
                top_left_grid_right_width_0_height_0_subtile_0__pin_O_1_,
                top_left_grid_right_width_0_height_0_subtile_0__pin_O_2_,
                top_left_grid_right_width_0_height_0_subtile_0__pin_O_3_,
                chanx_right_in,
                right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_4_,
                right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_5_,
                right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_6_,
                right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_7_,
                right_bottom_grid_top_width_0_height_0_subtile_0__pin_inpad_0_,
                right_bottom_grid_top_width_0_height_0_subtile_1__pin_inpad_0_,
                right_bottom_grid_top_width_0_height_0_subtile_2__pin_inpad_0_,
                right_bottom_grid_top_width_0_height_0_subtile_3__pin_inpad_0_,
                right_bottom_grid_top_width_0_height_0_subtile_4__pin_inpad_0_,
                right_bottom_grid_top_width_0_height_0_subtile_5__pin_inpad_0_,
                right_bottom_grid_top_width_0_height_0_subtile_6__pin_inpad_0_,
                right_bottom_grid_top_width_0_height_0_subtile_7__pin_inpad_0_,
                chanx_left_in,
                left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_4_,
                left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_5_,
                left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_6_,
                left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_7_,
                left_bottom_grid_top_width_0_height_0_subtile_0__pin_inpad_0_,
                left_bottom_grid_top_width_0_height_0_subtile_1__pin_inpad_0_,
                left_bottom_grid_top_width_0_height_0_subtile_2__pin_inpad_0_,
                left_bottom_grid_top_width_0_height_0_subtile_3__pin_inpad_0_,
                left_bottom_grid_top_width_0_height_0_subtile_4__pin_inpad_0_,
                left_bottom_grid_top_width_0_height_0_subtile_5__pin_inpad_0_,
                left_bottom_grid_top_width_0_height_0_subtile_6__pin_inpad_0_,
                left_bottom_grid_top_width_0_height_0_subtile_7__pin_inpad_0_,
                ccff_head,
                chany_top_out,
                chanx_right_out,
                chanx_left_out,
                ccff_tail);

input [0:0] pReset;

input [0:0] prog_clk;

input [0:9] chany_top_in;

input [0:0] top_left_grid_right_width_0_height_0_subtile_0__pin_O_0_;

input [0:0] top_left_grid_right_width_0_height_0_subtile_0__pin_O_1_;

input [0:0] top_left_grid_right_width_0_height_0_subtile_0__pin_O_2_;

input [0:0] top_left_grid_right_width_0_height_0_subtile_0__pin_O_3_;

input [0:9] chanx_right_in;

input [0:0] right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_4_;

input [0:0] right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_5_;

input [0:0] right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_6_;

input [0:0] right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_7_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_0__pin_inpad_0_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_1__pin_inpad_0_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_2__pin_inpad_0_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_3__pin_inpad_0_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_4__pin_inpad_0_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_5__pin_inpad_0_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_6__pin_inpad_0_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_7__pin_inpad_0_;

input [0:9] chanx_left_in;

input [0:0] left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_4_;

input [0:0] left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_5_;

input [0:0] left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_6_;

input [0:0] left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_7_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_0__pin_inpad_0_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_1__pin_inpad_0_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_2__pin_inpad_0_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_3__pin_inpad_0_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_4__pin_inpad_0_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_5__pin_inpad_0_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_6__pin_inpad_0_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_7__pin_inpad_0_;

input [0:0] ccff_head;

output [0:9] chany_top_out;

output [0:9] chanx_right_out;

output [0:9] chanx_left_out;

output [0:0] ccff_tail;









wire [0:7] mux_2level_tapbuf_size10_0_sram;
wire [0:7] mux_2level_tapbuf_size10_0_sram_inv;
wire [0:7] mux_2level_tapbuf_size10_1_sram;
wire [0:7] mux_2level_tapbuf_size10_1_sram_inv;
wire [0:0] mux_2level_tapbuf_size10_mem_0_ccff_tail;
wire [0:0] mux_2level_tapbuf_size10_mem_1_ccff_tail;
wire [0:7] mux_2level_tapbuf_size11_0_sram;
wire [0:7] mux_2level_tapbuf_size11_0_sram_inv;
wire [0:0] mux_2level_tapbuf_size11_mem_0_ccff_tail;
wire [0:1] mux_2level_tapbuf_size2_0_sram;
wire [0:1] mux_2level_tapbuf_size2_0_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_1_sram;
wire [0:1] mux_2level_tapbuf_size2_1_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_2_sram;
wire [0:1] mux_2level_tapbuf_size2_2_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_3_sram;
wire [0:1] mux_2level_tapbuf_size2_3_sram_inv;
wire [0:0] mux_2level_tapbuf_size2_mem_0_ccff_tail;
wire [0:0] mux_2level_tapbuf_size2_mem_1_ccff_tail;
wire [0:0] mux_2level_tapbuf_size2_mem_2_ccff_tail;
wire [0:0] mux_2level_tapbuf_size2_mem_3_ccff_tail;
wire [0:1] mux_2level_tapbuf_size3_0_sram;
wire [0:1] mux_2level_tapbuf_size3_0_sram_inv;
wire [0:1] mux_2level_tapbuf_size3_1_sram;
wire [0:1] mux_2level_tapbuf_size3_1_sram_inv;
wire [0:0] mux_2level_tapbuf_size3_mem_0_ccff_tail;
wire [0:0] mux_2level_tapbuf_size3_mem_1_ccff_tail;
wire [0:5] mux_2level_tapbuf_size4_0_sram;
wire [0:5] mux_2level_tapbuf_size4_0_sram_inv;
wire [0:0] mux_2level_tapbuf_size4_mem_0_ccff_tail;
wire [0:5] mux_2level_tapbuf_size5_0_sram;
wire [0:5] mux_2level_tapbuf_size5_0_sram_inv;
wire [0:0] mux_2level_tapbuf_size5_mem_0_ccff_tail;
wire [0:7] mux_2level_tapbuf_size9_0_sram;
wire [0:7] mux_2level_tapbuf_size9_0_sram_inv;
wire [0:7] mux_2level_tapbuf_size9_1_sram;
wire [0:7] mux_2level_tapbuf_size9_1_sram_inv;
wire [0:7] mux_2level_tapbuf_size9_2_sram;
wire [0:7] mux_2level_tapbuf_size9_2_sram_inv;
wire [0:0] mux_2level_tapbuf_size9_mem_0_ccff_tail;
wire [0:0] mux_2level_tapbuf_size9_mem_1_ccff_tail;





	assign chanx_left_out[1] = chanx_right_in[0];



	assign chanx_left_out[2] = chanx_right_in[1];



	assign chanx_left_out[3] = chanx_right_in[2];



	assign chanx_left_out[5] = chanx_right_in[4];



	assign chanx_left_out[6] = chanx_right_in[5];



	assign chanx_left_out[7] = chanx_right_in[6];



	assign chanx_left_out[9] = chanx_right_in[8];



	assign chanx_right_out[1] = chanx_left_in[0];



	assign chanx_right_out[2] = chanx_left_in[1];



	assign chanx_right_out[3] = chanx_left_in[2];



	assign chanx_right_out[5] = chanx_left_in[4];



	assign chanx_right_out[6] = chanx_left_in[5];



	assign chanx_right_out[7] = chanx_left_in[6];



	assign chanx_right_out[9] = chanx_left_in[8];



	assign chany_top_out[8] = chanx_left_in[9];




	mux_2level_tapbuf_size5 mux_top_track_0 (
		.in({top_left_grid_right_width_0_height_0_subtile_0__pin_O_0_, chanx_right_in[0], chanx_right_in[7], chanx_left_in[0], chanx_left_in[3]}),
		.sram(mux_2level_tapbuf_size5_0_sram[0:5]),
		.sram_inv(mux_2level_tapbuf_size5_0_sram_inv[0:5]),
		.out(chany_top_out[0]));

	mux_2level_tapbuf_size5_mem mem_top_track_0 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(ccff_head),
		.ccff_tail(mux_2level_tapbuf_size5_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size5_0_sram[0:5]),
		.mem_outb(mux_2level_tapbuf_size5_0_sram_inv[0:5]));

	mux_2level_tapbuf_size4 mux_top_track_2 (
		.in({top_left_grid_right_width_0_height_0_subtile_0__pin_O_1_, chanx_right_in[1], chanx_right_in[9], chanx_left_in[1]}),
		.sram(mux_2level_tapbuf_size4_0_sram[0:5]),
		.sram_inv(mux_2level_tapbuf_size4_0_sram_inv[0:5]),
		.out(chany_top_out[1]));

	mux_2level_tapbuf_size4_mem mem_top_track_2 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size5_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size4_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size4_0_sram[0:5]),
		.mem_outb(mux_2level_tapbuf_size4_0_sram_inv[0:5]));

	mux_2level_tapbuf_size3 mux_top_track_4 (
		.in({top_left_grid_right_width_0_height_0_subtile_0__pin_O_2_, chanx_right_in[2], chanx_left_in[2]}),
		.sram(mux_2level_tapbuf_size3_0_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size3_0_sram_inv[0:1]),
		.out(chany_top_out[2]));

	mux_2level_tapbuf_size3 mux_top_track_6 (
		.in({top_left_grid_right_width_0_height_0_subtile_0__pin_O_3_, chanx_right_in[4], chanx_left_in[4]}),
		.sram(mux_2level_tapbuf_size3_1_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size3_1_sram_inv[0:1]),
		.out(chany_top_out[3]));

	mux_2level_tapbuf_size3_mem mem_top_track_4 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size4_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size3_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size3_0_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size3_0_sram_inv[0:1]));

	mux_2level_tapbuf_size3_mem mem_top_track_6 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size3_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size3_mem_1_ccff_tail),
		.mem_out(mux_2level_tapbuf_size3_1_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size3_1_sram_inv[0:1]));

	mux_2level_tapbuf_size2 mux_top_track_8 (
		.in({chanx_right_in[5], chanx_left_in[5]}),
		.sram(mux_2level_tapbuf_size2_0_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_0_sram_inv[0:1]),
		.out(chany_top_out[4]));

	mux_2level_tapbuf_size2 mux_top_track_10 (
		.in({chanx_right_in[6], chanx_left_in[6]}),
		.sram(mux_2level_tapbuf_size2_1_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_1_sram_inv[0:1]),
		.out(chany_top_out[5]));

	mux_2level_tapbuf_size2 mux_top_track_12 (
		.in({chanx_right_in[8], chanx_left_in[8]}),
		.sram(mux_2level_tapbuf_size2_2_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_2_sram_inv[0:1]),
		.out(chany_top_out[6]));

	mux_2level_tapbuf_size2 mux_top_track_18 (
		.in({chanx_right_in[3], chanx_left_in[7]}),
		.sram(mux_2level_tapbuf_size2_3_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_3_sram_inv[0:1]),
		.out(chany_top_out[9]));

	mux_2level_tapbuf_size2_mem mem_top_track_8 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size3_mem_1_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_0_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_0_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_top_track_10 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_1_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_1_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_1_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_top_track_12 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_1_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_2_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_2_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_2_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_top_track_18 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_2_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_3_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_3_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_3_sram_inv[0:1]));

	mux_2level_tapbuf_size10 mux_right_track_0 (
		.in({chany_top_in[2], chany_top_in[5], chany_top_in[8], right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_4_, right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_7_, right_bottom_grid_top_width_0_height_0_subtile_2__pin_inpad_0_, right_bottom_grid_top_width_0_height_0_subtile_5__pin_inpad_0_, chanx_left_in[0], chanx_left_in[4], chanx_left_in[8]}),
		.sram(mux_2level_tapbuf_size10_0_sram[0:7]),
		.sram_inv(mux_2level_tapbuf_size10_0_sram_inv[0:7]),
		.out(chanx_right_out[0]));

	mux_2level_tapbuf_size10 mux_right_track_8 (
		.in({chany_top_in[0], chany_top_in[3], chany_top_in[6], chany_top_in[9], right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_5_, right_bottom_grid_top_width_0_height_0_subtile_0__pin_inpad_0_, right_bottom_grid_top_width_0_height_0_subtile_3__pin_inpad_0_, right_bottom_grid_top_width_0_height_0_subtile_6__pin_inpad_0_, chanx_left_in[1], chanx_left_in[5]}),
		.sram(mux_2level_tapbuf_size10_1_sram[0:7]),
		.sram_inv(mux_2level_tapbuf_size10_1_sram_inv[0:7]),
		.out(chanx_right_out[4]));

	mux_2level_tapbuf_size10_mem mem_right_track_0 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_3_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size10_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size10_0_sram[0:7]),
		.mem_outb(mux_2level_tapbuf_size10_0_sram_inv[0:7]));

	mux_2level_tapbuf_size10_mem mem_right_track_8 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size10_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size10_mem_1_ccff_tail),
		.mem_out(mux_2level_tapbuf_size10_1_sram[0:7]),
		.mem_outb(mux_2level_tapbuf_size10_1_sram_inv[0:7]));

	mux_2level_tapbuf_size9 mux_right_track_16 (
		.in({chany_top_in[1], chany_top_in[4], chany_top_in[7], right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_6_, right_bottom_grid_top_width_0_height_0_subtile_1__pin_inpad_0_, right_bottom_grid_top_width_0_height_0_subtile_4__pin_inpad_0_, right_bottom_grid_top_width_0_height_0_subtile_7__pin_inpad_0_, chanx_left_in[2], chanx_left_in[6]}),
		.sram(mux_2level_tapbuf_size9_0_sram[0:7]),
		.sram_inv(mux_2level_tapbuf_size9_0_sram_inv[0:7]),
		.out(chanx_right_out[8]));

	mux_2level_tapbuf_size9 mux_left_track_9 (
		.in({chany_top_in[2], chany_top_in[5], chany_top_in[8], chanx_right_in[1], chanx_right_in[5], left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_5_, left_bottom_grid_top_width_0_height_0_subtile_0__pin_inpad_0_, left_bottom_grid_top_width_0_height_0_subtile_3__pin_inpad_0_, left_bottom_grid_top_width_0_height_0_subtile_6__pin_inpad_0_}),
		.sram(mux_2level_tapbuf_size9_1_sram[0:7]),
		.sram_inv(mux_2level_tapbuf_size9_1_sram_inv[0:7]),
		.out(chanx_left_out[4]));

	mux_2level_tapbuf_size9 mux_left_track_17 (
		.in({chany_top_in[1], chany_top_in[4], chany_top_in[7], chanx_right_in[2], chanx_right_in[6], left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_6_, left_bottom_grid_top_width_0_height_0_subtile_1__pin_inpad_0_, left_bottom_grid_top_width_0_height_0_subtile_4__pin_inpad_0_, left_bottom_grid_top_width_0_height_0_subtile_7__pin_inpad_0_}),
		.sram(mux_2level_tapbuf_size9_2_sram[0:7]),
		.sram_inv(mux_2level_tapbuf_size9_2_sram_inv[0:7]),
		.out(chanx_left_out[8]));

	mux_2level_tapbuf_size9_mem mem_right_track_16 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size10_mem_1_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size9_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size9_0_sram[0:7]),
		.mem_outb(mux_2level_tapbuf_size9_0_sram_inv[0:7]));

	mux_2level_tapbuf_size9_mem mem_left_track_9 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size11_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size9_mem_1_ccff_tail),
		.mem_out(mux_2level_tapbuf_size9_1_sram[0:7]),
		.mem_outb(mux_2level_tapbuf_size9_1_sram_inv[0:7]));

	mux_2level_tapbuf_size9_mem mem_left_track_17 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size9_mem_1_ccff_tail),
		.ccff_tail(ccff_tail),
		.mem_out(mux_2level_tapbuf_size9_2_sram[0:7]),
		.mem_outb(mux_2level_tapbuf_size9_2_sram_inv[0:7]));

	mux_2level_tapbuf_size11 mux_left_track_1 (
		.in({chany_top_in[0], chany_top_in[3], chany_top_in[6], chany_top_in[9], chanx_right_in[0], chanx_right_in[4], chanx_right_in[8], left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_4_, left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_7_, left_bottom_grid_top_width_0_height_0_subtile_2__pin_inpad_0_, left_bottom_grid_top_width_0_height_0_subtile_5__pin_inpad_0_}),
		.sram(mux_2level_tapbuf_size11_0_sram[0:7]),
		.sram_inv(mux_2level_tapbuf_size11_0_sram_inv[0:7]),
		.out(chanx_left_out[0]));

	mux_2level_tapbuf_size11_mem mem_left_track_1 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size9_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size11_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size11_0_sram[0:7]),
		.mem_outb(mux_2level_tapbuf_size11_0_sram_inv[0:7]));

endmodule
module sb_1__0_(pReset,
                prog_clk,
                chany_top_in,
                top_left_grid_right_width_0_height_0_subtile_0__pin_O_0_,
                top_left_grid_right_width_0_height_0_subtile_0__pin_O_1_,
                top_left_grid_right_width_0_height_0_subtile_0__pin_O_2_,
                top_left_grid_right_width_0_height_0_subtile_0__pin_O_3_,
                chanx_right_in,
                right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_4_,
                right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_5_,
                right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_6_,
                right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_7_,
                right_bottom_grid_top_width_0_height_0_subtile_0__pin_inpad_0_,
                right_bottom_grid_top_width_0_height_0_subtile_1__pin_inpad_0_,
                right_bottom_grid_top_width_0_height_0_subtile_2__pin_inpad_0_,
                right_bottom_grid_top_width_0_height_0_subtile_3__pin_inpad_0_,
                right_bottom_grid_top_width_0_height_0_subtile_4__pin_inpad_0_,
                right_bottom_grid_top_width_0_height_0_subtile_5__pin_inpad_0_,
                right_bottom_grid_top_width_0_height_0_subtile_6__pin_inpad_0_,
                right_bottom_grid_top_width_0_height_0_subtile_7__pin_inpad_0_,
                chanx_left_in,
                left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_4_,
                left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_5_,
                left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_6_,
                left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_7_,
                left_bottom_grid_top_width_0_height_0_subtile_0__pin_inpad_0_,
                left_bottom_grid_top_width_0_height_0_subtile_1__pin_inpad_0_,
                left_bottom_grid_top_width_0_height_0_subtile_2__pin_inpad_0_,
                left_bottom_grid_top_width_0_height_0_subtile_3__pin_inpad_0_,
                left_bottom_grid_top_width_0_height_0_subtile_4__pin_inpad_0_,
                left_bottom_grid_top_width_0_height_0_subtile_5__pin_inpad_0_,
                left_bottom_grid_top_width_0_height_0_subtile_6__pin_inpad_0_,
                left_bottom_grid_top_width_0_height_0_subtile_7__pin_inpad_0_,
                ccff_head,
                chany_top_out,
                chanx_right_out,
                chanx_left_out,
                ccff_tail);


input [0:0] pReset;

input [0:0] prog_clk;

input [0:9] chany_top_in;

input [0:0] top_left_grid_right_width_0_height_0_subtile_0__pin_O_0_;

input [0:0] top_left_grid_right_width_0_height_0_subtile_0__pin_O_1_;

input [0:0] top_left_grid_right_width_0_height_0_subtile_0__pin_O_2_;

input [0:0] top_left_grid_right_width_0_height_0_subtile_0__pin_O_3_;

input [0:9] chanx_right_in;

input [0:0] right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_4_;

input [0:0] right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_5_;

input [0:0] right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_6_;

input [0:0] right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_7_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_0__pin_inpad_0_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_1__pin_inpad_0_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_2__pin_inpad_0_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_3__pin_inpad_0_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_4__pin_inpad_0_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_5__pin_inpad_0_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_6__pin_inpad_0_;

input [0:0] right_bottom_grid_top_width_0_height_0_subtile_7__pin_inpad_0_;

input [0:9] chanx_left_in;

input [0:0] left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_4_;

input [0:0] left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_5_;

input [0:0] left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_6_;

input [0:0] left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_7_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_0__pin_inpad_0_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_1__pin_inpad_0_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_2__pin_inpad_0_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_3__pin_inpad_0_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_4__pin_inpad_0_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_5__pin_inpad_0_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_6__pin_inpad_0_;

input [0:0] left_bottom_grid_top_width_0_height_0_subtile_7__pin_inpad_0_;

input [0:0] ccff_head;

output [0:9] chany_top_out;

output [0:9] chanx_right_out;

output [0:9] chanx_left_out;

output [0:0] ccff_tail;









wire [0:7] mux_2level_tapbuf_size10_0_sram;
wire [0:7] mux_2level_tapbuf_size10_0_sram_inv;
wire [0:7] mux_2level_tapbuf_size10_1_sram;
wire [0:7] mux_2level_tapbuf_size10_1_sram_inv;
wire [0:0] mux_2level_tapbuf_size10_mem_0_ccff_tail;
wire [0:0] mux_2level_tapbuf_size10_mem_1_ccff_tail;
wire [0:7] mux_2level_tapbuf_size11_0_sram;
wire [0:7] mux_2level_tapbuf_size11_0_sram_inv;
wire [0:0] mux_2level_tapbuf_size11_mem_0_ccff_tail;
wire [0:1] mux_2level_tapbuf_size2_0_sram;
wire [0:1] mux_2level_tapbuf_size2_0_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_1_sram;
wire [0:1] mux_2level_tapbuf_size2_1_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_2_sram;
wire [0:1] mux_2level_tapbuf_size2_2_sram_inv;
wire [0:1] mux_2level_tapbuf_size2_3_sram;
wire [0:1] mux_2level_tapbuf_size2_3_sram_inv;
wire [0:0] mux_2level_tapbuf_size2_mem_0_ccff_tail;
wire [0:0] mux_2level_tapbuf_size2_mem_1_ccff_tail;
wire [0:0] mux_2level_tapbuf_size2_mem_2_ccff_tail;
wire [0:0] mux_2level_tapbuf_size2_mem_3_ccff_tail;
wire [0:1] mux_2level_tapbuf_size3_0_sram;
wire [0:1] mux_2level_tapbuf_size3_0_sram_inv;
wire [0:1] mux_2level_tapbuf_size3_1_sram;
wire [0:1] mux_2level_tapbuf_size3_1_sram_inv;
wire [0:0] mux_2level_tapbuf_size3_mem_0_ccff_tail;
wire [0:0] mux_2level_tapbuf_size3_mem_1_ccff_tail;
wire [0:5] mux_2level_tapbuf_size4_0_sram;
wire [0:5] mux_2level_tapbuf_size4_0_sram_inv;
wire [0:0] mux_2level_tapbuf_size4_mem_0_ccff_tail;
wire [0:5] mux_2level_tapbuf_size5_0_sram;
wire [0:5] mux_2level_tapbuf_size5_0_sram_inv;
wire [0:0] mux_2level_tapbuf_size5_mem_0_ccff_tail;
wire [0:7] mux_2level_tapbuf_size9_0_sram;
wire [0:7] mux_2level_tapbuf_size9_0_sram_inv;
wire [0:7] mux_2level_tapbuf_size9_1_sram;
wire [0:7] mux_2level_tapbuf_size9_1_sram_inv;
wire [0:7] mux_2level_tapbuf_size9_2_sram;
wire [0:7] mux_2level_tapbuf_size9_2_sram_inv;
wire [0:0] mux_2level_tapbuf_size9_mem_0_ccff_tail;
wire [0:0] mux_2level_tapbuf_size9_mem_1_ccff_tail;





	assign chanx_left_out[1] = chanx_right_in[0];



	assign chanx_left_out[2] = chanx_right_in[1];



	assign chanx_left_out[3] = chanx_right_in[2];



	assign chanx_left_out[5] = chanx_right_in[4];



	assign chanx_left_out[6] = chanx_right_in[5];



	assign chanx_left_out[7] = chanx_right_in[6];



	assign chanx_left_out[9] = chanx_right_in[8];



	assign chanx_right_out[1] = chanx_left_in[0];



	assign chanx_right_out[2] = chanx_left_in[1];



	assign chanx_right_out[3] = chanx_left_in[2];



	assign chanx_right_out[5] = chanx_left_in[4];



	assign chanx_right_out[6] = chanx_left_in[5];



	assign chanx_right_out[7] = chanx_left_in[6];



	assign chanx_right_out[9] = chanx_left_in[8];



	assign chany_top_out[8] = chanx_left_in[9];




	mux_2level_tapbuf_size5 mux_top_track_0 (
		.in({top_left_grid_right_width_0_height_0_subtile_0__pin_O_0_, chanx_right_in[0], chanx_right_in[7], chanx_left_in[0], chanx_left_in[3]}),
		.sram(mux_2level_tapbuf_size5_0_sram[0:5]),
		.sram_inv(mux_2level_tapbuf_size5_0_sram_inv[0:5]),
		.out(chany_top_out[0]));

	mux_2level_tapbuf_size5_mem mem_top_track_0 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(ccff_head),
		.ccff_tail(mux_2level_tapbuf_size5_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size5_0_sram[0:5]),
		.mem_outb(mux_2level_tapbuf_size5_0_sram_inv[0:5]));

	mux_2level_tapbuf_size4 mux_top_track_2 (
		.in({top_left_grid_right_width_0_height_0_subtile_0__pin_O_1_, chanx_right_in[1], chanx_right_in[9], chanx_left_in[1]}),
		.sram(mux_2level_tapbuf_size4_0_sram[0:5]),
		.sram_inv(mux_2level_tapbuf_size4_0_sram_inv[0:5]),
		.out(chany_top_out[1]));

	mux_2level_tapbuf_size4_mem mem_top_track_2 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size5_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size4_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size4_0_sram[0:5]),
		.mem_outb(mux_2level_tapbuf_size4_0_sram_inv[0:5]));

	mux_2level_tapbuf_size3 mux_top_track_4 (
		.in({top_left_grid_right_width_0_height_0_subtile_0__pin_O_2_, chanx_right_in[2], chanx_left_in[2]}),
		.sram(mux_2level_tapbuf_size3_0_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size3_0_sram_inv[0:1]),
		.out(chany_top_out[2]));

	mux_2level_tapbuf_size3 mux_top_track_6 (
		.in({top_left_grid_right_width_0_height_0_subtile_0__pin_O_3_, chanx_right_in[4], chanx_left_in[4]}),
		.sram(mux_2level_tapbuf_size3_1_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size3_1_sram_inv[0:1]),
		.out(chany_top_out[3]));

	mux_2level_tapbuf_size3_mem mem_top_track_4 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size4_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size3_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size3_0_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size3_0_sram_inv[0:1]));

	mux_2level_tapbuf_size3_mem mem_top_track_6 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size3_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size3_mem_1_ccff_tail),
		.mem_out(mux_2level_tapbuf_size3_1_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size3_1_sram_inv[0:1]));

	mux_2level_tapbuf_size2 mux_top_track_8 (
		.in({chanx_right_in[5], chanx_left_in[5]}),
		.sram(mux_2level_tapbuf_size2_0_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_0_sram_inv[0:1]),
		.out(chany_top_out[4]));

	mux_2level_tapbuf_size2 mux_top_track_10 (
		.in({chanx_right_in[6], chanx_left_in[6]}),
		.sram(mux_2level_tapbuf_size2_1_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_1_sram_inv[0:1]),
		.out(chany_top_out[5]));

	mux_2level_tapbuf_size2 mux_top_track_12 (
		.in({chanx_right_in[8], chanx_left_in[8]}),
		.sram(mux_2level_tapbuf_size2_2_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_2_sram_inv[0:1]),
		.out(chany_top_out[6]));

	mux_2level_tapbuf_size2 mux_top_track_18 (
		.in({chanx_right_in[3], chanx_left_in[7]}),
		.sram(mux_2level_tapbuf_size2_3_sram[0:1]),
		.sram_inv(mux_2level_tapbuf_size2_3_sram_inv[0:1]),
		.out(chany_top_out[9]));

	mux_2level_tapbuf_size2_mem mem_top_track_8 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size3_mem_1_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_0_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_0_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_top_track_10 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_1_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_1_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_1_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_top_track_12 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_1_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_2_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_2_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_2_sram_inv[0:1]));

	mux_2level_tapbuf_size2_mem mem_top_track_18 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_2_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size2_mem_3_ccff_tail),
		.mem_out(mux_2level_tapbuf_size2_3_sram[0:1]),
		.mem_outb(mux_2level_tapbuf_size2_3_sram_inv[0:1]));

	mux_2level_tapbuf_size10 mux_right_track_0 (
		.in({chany_top_in[2], chany_top_in[5], chany_top_in[8], right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_4_, right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_7_, right_bottom_grid_top_width_0_height_0_subtile_2__pin_inpad_0_, right_bottom_grid_top_width_0_height_0_subtile_5__pin_inpad_0_, chanx_left_in[0], chanx_left_in[4], chanx_left_in[8]}),
		.sram(mux_2level_tapbuf_size10_0_sram[0:7]),
		.sram_inv(mux_2level_tapbuf_size10_0_sram_inv[0:7]),
		.out(chanx_right_out[0]));

	mux_2level_tapbuf_size10 mux_right_track_8 (
		.in({chany_top_in[0], chany_top_in[3], chany_top_in[6], chany_top_in[9], right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_5_, right_bottom_grid_top_width_0_height_0_subtile_0__pin_inpad_0_, right_bottom_grid_top_width_0_height_0_subtile_3__pin_inpad_0_, right_bottom_grid_top_width_0_height_0_subtile_6__pin_inpad_0_, chanx_left_in[1], chanx_left_in[5]}),
		.sram(mux_2level_tapbuf_size10_1_sram[0:7]),
		.sram_inv(mux_2level_tapbuf_size10_1_sram_inv[0:7]),
		.out(chanx_right_out[4]));

	mux_2level_tapbuf_size10_mem mem_right_track_0 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size2_mem_3_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size10_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size10_0_sram[0:7]),
		.mem_outb(mux_2level_tapbuf_size10_0_sram_inv[0:7]));

	mux_2level_tapbuf_size10_mem mem_right_track_8 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size10_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size10_mem_1_ccff_tail),
		.mem_out(mux_2level_tapbuf_size10_1_sram[0:7]),
		.mem_outb(mux_2level_tapbuf_size10_1_sram_inv[0:7]));

	mux_2level_tapbuf_size9 mux_right_track_16 (
		.in({chany_top_in[1], chany_top_in[4], chany_top_in[7], right_top_grid_bottom_width_0_height_0_subtile_0__pin_O_6_, right_bottom_grid_top_width_0_height_0_subtile_1__pin_inpad_0_, right_bottom_grid_top_width_0_height_0_subtile_4__pin_inpad_0_, right_bottom_grid_top_width_0_height_0_subtile_7__pin_inpad_0_, chanx_left_in[2], chanx_left_in[6]}),
		.sram(mux_2level_tapbuf_size9_0_sram[0:7]),
		.sram_inv(mux_2level_tapbuf_size9_0_sram_inv[0:7]),
		.out(chanx_right_out[8]));

	mux_2level_tapbuf_size9 mux_left_track_9 (
		.in({chany_top_in[2], chany_top_in[5], chany_top_in[8], chanx_right_in[1], chanx_right_in[5], left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_5_, left_bottom_grid_top_width_0_height_0_subtile_0__pin_inpad_0_, left_bottom_grid_top_width_0_height_0_subtile_3__pin_inpad_0_, left_bottom_grid_top_width_0_height_0_subtile_6__pin_inpad_0_}),
		.sram(mux_2level_tapbuf_size9_1_sram[0:7]),
		.sram_inv(mux_2level_tapbuf_size9_1_sram_inv[0:7]),
		.out(chanx_left_out[4]));

	mux_2level_tapbuf_size9 mux_left_track_17 (
		.in({chany_top_in[1], chany_top_in[4], chany_top_in[7], chanx_right_in[2], chanx_right_in[6], left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_6_, left_bottom_grid_top_width_0_height_0_subtile_1__pin_inpad_0_, left_bottom_grid_top_width_0_height_0_subtile_4__pin_inpad_0_, left_bottom_grid_top_width_0_height_0_subtile_7__pin_inpad_0_}),
		.sram(mux_2level_tapbuf_size9_2_sram[0:7]),
		.sram_inv(mux_2level_tapbuf_size9_2_sram_inv[0:7]),
		.out(chanx_left_out[8]));

	mux_2level_tapbuf_size9_mem mem_right_track_16 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size10_mem_1_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size9_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size9_0_sram[0:7]),
		.mem_outb(mux_2level_tapbuf_size9_0_sram_inv[0:7]));

	mux_2level_tapbuf_size9_mem mem_left_track_9 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size11_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size9_mem_1_ccff_tail),
		.mem_out(mux_2level_tapbuf_size9_1_sram[0:7]),
		.mem_outb(mux_2level_tapbuf_size9_1_sram_inv[0:7]));

	mux_2level_tapbuf_size9_mem mem_left_track_17 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size9_mem_1_ccff_tail),
		.ccff_tail(ccff_tail),
		.mem_out(mux_2level_tapbuf_size9_2_sram[0:7]),
		.mem_outb(mux_2level_tapbuf_size9_2_sram_inv[0:7]));

	mux_2level_tapbuf_size11 mux_left_track_1 (
		.in({chany_top_in[0], chany_top_in[3], chany_top_in[6], chany_top_in[9], chanx_right_in[0], chanx_right_in[4], chanx_right_in[8], left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_4_, left_top_grid_bottom_width_0_height_0_subtile_0__pin_O_7_, left_bottom_grid_top_width_0_height_0_subtile_2__pin_inpad_0_, left_bottom_grid_top_width_0_height_0_subtile_5__pin_inpad_0_}),
		.sram(mux_2level_tapbuf_size11_0_sram[0:7]),
		.sram_inv(mux_2level_tapbuf_size11_0_sram_inv[0:7]),
		.out(chanx_left_out[0]));

	mux_2level_tapbuf_size11_mem mem_left_track_1 (
		.pReset(pReset),
		.prog_clk(prog_clk),
		.ccff_head(mux_2level_tapbuf_size9_mem_0_ccff_tail),
		.ccff_tail(mux_2level_tapbuf_size11_mem_0_ccff_tail),
		.mem_out(mux_2level_tapbuf_size11_0_sram[0:7]),
		.mem_outb(mux_2level_tapbuf_size11_0_sram_inv[0:7]));

endmodule