data/full_repos/permissive/168753118/testbench/modules/LSU/LSU_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/168753118/testbench/modules/LSU/LSU_tb.v:135: Unsupported: Ignoring delay on this delayed statement.\n    #period;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/168753118/testbench/modules/LSU/LSU_tb.v:169: syntax error, unexpected \'@\'\n   @eachvec;\n   ^\n%Error: Exiting due to 1 error(s), 1 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module LSU_tb;


	parameter XLEN = 32;


	reg eachvec;


	reg clock_in = 1'b0;


	reg lsu_enable_in;
	reg [3:0] lsu_uop_in;
  reg [XLEN-1:0] lsu_a_data_in;
  reg [XLEN-1:0] lsu_b_data_in;
	reg [XLEN-1:0] lsu_c_data_in;
	reg [XLEN-1:0] data_mem_data_in;


	reg lsu_mem_valid_golden;
  reg [2:0] lsu_mem_opcode_golden;
  reg [XLEN-1:0] lsu_mem_addr_golden;
	reg [XLEN-1:0] lsu_mem_data_out_golden;
  reg [XLEN-1:0] lsu_result_golden;


	reg lsu_mem_valid_result;
	reg lsu_mem_opcode_result;
  reg lsu_mem_addr_result;
	reg lsu_mem_data_out_result;
  reg lsu_result_result;


  wire lsu_mem_valid_out;
  wire [2:0] lsu_mem_opcode_out;
  wire [XLEN-1:0] lsu_mem_addr_out;
	wire [XLEN-1:0] lsu_mem_data_out;
  wire [XLEN-1:0] lsu_result_out;


	localparam period = 5;


	integer golden, inputs, results, status;


	LSU lsu0 (
    .lsu_enable_in(lsu_enable_in),
    .lsu_uop_in(lsu_uop_in),
    .lsu_a_data_in(lsu_a_data_in),
    .lsu_b_data_in(lsu_b_data_in),
    .lsu_c_data_in(lsu_c_data_in),


    .lsu_mem_valid_out(lsu_mem_valid_out),
    .lsu_mem_opcode_out(lsu_mem_opcode_out),
    .lsu_mem_addr_out(lsu_mem_addr_out),
    .lsu_mem_data_out(lsu_mem_data_out),
    .lsu_mem_data_in(data_mem_data_in),


    .lsu_result_out(lsu_result_out)
	);


	initial begin


			$display("Opening golden file");
			golden = $fopen("./out/LSU_outputs.txt", "r");


			$display("Opening inputs file");
			inputs = $fopen("./out/LSU_inputs.txt", "r");


			$display("Opening results file");
			results = $fopen("./out/LSU_results.txt", "w");


			if (golden == `NULL) begin
				$display("Golden file was NULL");
				$finish;
			end


			if(inputs == `NULL) begin
				$display("Inputs file was NULL");
			end


			if(results == `NULL) begin
				$display("Results file was NULL");
			end


			while(!$feof(inputs)) begin


				status = $fscanf(
					inputs,
					"%d %d %d %d %d %d",
					lsu_enable_in,
					lsu_uop_in,
					lsu_a_data_in,
					lsu_b_data_in,
					lsu_c_data_in,
					data_mem_data_in
				);


				status = $fscanf(
					golden,
					"%d %d %d %d %d",
					lsu_mem_valid_golden,
					lsu_mem_opcode_golden,
          lsu_mem_addr_golden,
          lsu_mem_data_out_golden,
          lsu_result_golden
				);


				#period;


				if (lsu_mem_valid_out == lsu_mem_valid_golden)
					lsu_mem_valid_result = 1'b1;
				else begin
					lsu_mem_valid_result = 1'b0;
          $display("%d %d", lsu_mem_valid_out, lsu_mem_valid_golden);
				end


				if (lsu_mem_opcode_out == lsu_mem_opcode_golden)
					lsu_mem_opcode_result = 1'b1;
				else begin
					lsu_mem_opcode_result = 1'b0;
          $display("%d %d %d", lsu_uop_in, lsu_mem_opcode_out, lsu_mem_opcode_golden);
				end


				$fwrite(
					results,
					"%d %d\n",
					lsu_mem_valid_result,
					lsu_mem_opcode_result
				);

			end

			$display("Simulation has ended");

			$fclose(golden);
			$fclose(inputs);
			$fclose(results);

			@eachvec;
			$finish;

		end
endmodule
module LSU_tb;



	parameter XLEN = 32;


	reg eachvec;


	reg clock_in = 1'b0;


	reg lsu_enable_in;
	reg [3:0] lsu_uop_in;
  reg [XLEN-1:0] lsu_a_data_in;
  reg [XLEN-1:0] lsu_b_data_in;
	reg [XLEN-1:0] lsu_c_data_in;
	reg [XLEN-1:0] data_mem_data_in;


	reg lsu_mem_valid_golden;
  reg [2:0] lsu_mem_opcode_golden;
  reg [XLEN-1:0] lsu_mem_addr_golden;
	reg [XLEN-1:0] lsu_mem_data_out_golden;
  reg [XLEN-1:0] lsu_result_golden;


	reg lsu_mem_valid_result;
	reg lsu_mem_opcode_result;
  reg lsu_mem_addr_result;
	reg lsu_mem_data_out_result;
  reg lsu_result_result;


  wire lsu_mem_valid_out;
  wire [2:0] lsu_mem_opcode_out;
  wire [XLEN-1:0] lsu_mem_addr_out;
	wire [XLEN-1:0] lsu_mem_data_out;
  wire [XLEN-1:0] lsu_result_out;


	localparam period = 5;


	integer golden, inputs, results, status;


	LSU lsu0 (
    .lsu_enable_in(lsu_enable_in),
    .lsu_uop_in(lsu_uop_in),
    .lsu_a_data_in(lsu_a_data_in),
    .lsu_b_data_in(lsu_b_data_in),
    .lsu_c_data_in(lsu_c_data_in),


    .lsu_mem_valid_out(lsu_mem_valid_out),
    .lsu_mem_opcode_out(lsu_mem_opcode_out),
    .lsu_mem_addr_out(lsu_mem_addr_out),
    .lsu_mem_data_out(lsu_mem_data_out),
    .lsu_mem_data_in(data_mem_data_in),


    .lsu_result_out(lsu_result_out)
	);


	initial begin


			$display("Opening golden file");
			golden = $fopen("./out/LSU_outputs.txt", "r");


			$display("Opening inputs file");
			inputs = $fopen("./out/LSU_inputs.txt", "r");


			$display("Opening results file");
			results = $fopen("./out/LSU_results.txt", "w");


			if (golden == `NULL) begin
				$display("Golden file was NULL");
				$finish;
			end


			if(inputs == `NULL) begin
				$display("Inputs file was NULL");
			end


			if(results == `NULL) begin
				$display("Results file was NULL");
			end


			while(!$feof(inputs)) begin


				status = $fscanf(
					inputs,
					"%d %d %d %d %d %d",
					lsu_enable_in,
					lsu_uop_in,
					lsu_a_data_in,
					lsu_b_data_in,
					lsu_c_data_in,
					data_mem_data_in
				);


				status = $fscanf(
					golden,
					"%d %d %d %d %d",
					lsu_mem_valid_golden,
					lsu_mem_opcode_golden,
          lsu_mem_addr_golden,
          lsu_mem_data_out_golden,
          lsu_result_golden
				);


				#period;


				if (lsu_mem_valid_out == lsu_mem_valid_golden)
					lsu_mem_valid_result = 1'b1;
				else begin
					lsu_mem_valid_result = 1'b0;
          $display("%d %d", lsu_mem_valid_out, lsu_mem_valid_golden);
				end


				if (lsu_mem_opcode_out == lsu_mem_opcode_golden)
					lsu_mem_opcode_result = 1'b1;
				else begin
					lsu_mem_opcode_result = 1'b0;
          $display("%d %d %d", lsu_uop_in, lsu_mem_opcode_out, lsu_mem_opcode_golden);
				end


				$fwrite(
					results,
					"%d %d\n",
					lsu_mem_valid_result,
					lsu_mem_opcode_result
				);

			end

			$display("Simulation has ended");

			$fclose(golden);
			$fclose(inputs);
			$fclose(results);

			@eachvec;
			$finish;

		end
endmodule