data/full_repos/permissive/159902111/Single Cycle Processor/IM_tb.v
1: b'%Error: Cannot find file containing module: Cycle\n        ... Looked in:\n             data/full_repos/permissive/159902111/Single/Cycle\n             data/full_repos/permissive/159902111/Single/Cycle.v\n             data/full_repos/permissive/159902111/Single/Cycle.sv\n             Cycle\n             Cycle.v\n             Cycle.sv\n             obj_dir/Cycle\n             obj_dir/Cycle.v\n             obj_dir/Cycle.sv\n%Error: Cannot find file containing module: Processor,data/full_repos/permissive/159902111\n%Error: Cannot find file containing module: data/full_repos/permissive/159902111/Single\n%Error: Cannot find file containing module: Processor/IM_tb.v\n%Error: Exiting due to 4 error(s)\n'
module IM_tb(
  );
  `timescale 1ns/1ps
  reg clk;
  reg [31:0] ImAddr_i;
  wire [31:0] Instr_o;
  initial
  begin
    ImAddr_i = 32'h0000_3000;
    clk = 0;
  end
  
  always
    #10 clk <= ~clk;
  
  IM im(
    .ImAddr_i(ImAddr_i),
    .Instr_o(Instr_o)
    );
  always@(posedge clk)
  begin
    if (ImAddr_i < 32'h0000_3040)
      begin
        $display("%x", im.IMem[ImAddr_i/4]);
        $display("%x", Instr_o);
        ImAddr_i = ImAddr_i +  4;
      end
    else
      $stop;
  end
endmodule
module IM_tb(
  );

  `timescale 1ns/1ps
  reg clk;
  reg [31:0] ImAddr_i;
  wire [31:0] Instr_o;
  initial
  begin
    ImAddr_i = 32'h0000_3000;
    clk = 0;
  end
  
  always
    #10 clk <= ~clk;
  
  IM im(
    .ImAddr_i(ImAddr_i),
    .Instr_o(Instr_o)
    );
  always@(posedge clk)
  begin
    if (ImAddr_i < 32'h0000_3040)
      begin
        $display("%x", im.IMem[ImAddr_i/4]);
        $display("%x", Instr_o);
        ImAddr_i = ImAddr_i +  4;
      end
    else
      $stop;
  end
endmodule