data/full_repos/permissive/169496369/mux2x1_25b.v
data/verilator_xmls/5f2d3836-30c3-423a-9a85-53c8f6156c99.xml
module mux2x1_25b(a, b, s, o);
    input [24:0]a, b;
    input s;
    
    output logic [24:0]o;
    
    assign o = (s ? b : a);
endmodule
module mux2x1_25b(a, b, s, o);

    input [24:0]a, b;
    input s;
    
    output logic [24:0]o;
    
    assign o = (s ? b : a);
endmodule