data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v
 line:43: before: "parameter"
1: b'%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:32: Cannot find include file: parameters.v\n`include "parameters.v" \n         ^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog,data/full_repos/permissive/120539939/parameters.v\n             data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog,data/full_repos/permissive/120539939/parameters.v.v\n             data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog,data/full_repos/permissive/120539939/parameters.v.sv\n             parameters.v\n             parameters.v.v\n             parameters.v.sv\n             obj_dir/parameters.v\n             obj_dir/parameters.v.v\n             obj_dir/parameters.v.sv\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:52: syntax error, unexpected initial\ninitial begin\n^~~~~~~\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:73: syntax error, unexpected \'@\'\n   @(posedge hi_in[0])  hi_in[7:4] = 4\'h1;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:75: Unsupported: wait statements\n   wait (hi_out[0] == 0);\n   ^~~~\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:132: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_in[7:4] = 4\'h3;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:134: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_in[7:4] = 4\'h0;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:137: syntax error, unexpected \'@\'\n      @(posedge hi_in[0]) ;\n      ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:139: Unsupported: wait statements\n   wait (hi_out[0] == 0);\n   ^~~~\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:149: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_in[7:4] = 4\'h5;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:154: syntax error, unexpected \'@\'\n      @(posedge hi_in[0]) WireOuts[i] = hi_inout;\n      ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:155: Unsupported: wait statements\n   wait (hi_out[0] == 0);\n   ^~~~\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:167: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_in[1] = 1;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:170: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_dataout = (1\'b1 << trig_bit);\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:172: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_dataout = 16\'h0000;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:173: Unsupported: wait statements\n   wait (hi_out[0] == 0);\n   ^~~~\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:183: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_in[7:4] = 4\'h7;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:188: syntax error, unexpected \'@\'\n   for (i=0; i<UPDATE_TO_READOUT_CLOCKS; i=i+1)@(posedge hi_in[0]);\n                                               ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:191: syntax error, unexpected \'@\'\n      @(posedge hi_in[0]) Triggered[i] = hi_inout;\n      ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:192: Unsupported: wait statements\n   wait (hi_out[0] == 0);\n   ^~~~\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:209: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_in[1] = 1;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:212: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_in[7:4] = 4\'h0;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:214: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_dataout = (len >> 16);\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:216: syntax error, unexpected \'@\'\n      @(posedge hi_in[0]);\n      ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:222: syntax error, unexpected \'@\'\n            @(posedge hi_in[0]);\n            ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:227: Unsupported: wait statements\n   wait (hi_out[0] == 0);\n   ^~~~\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:244: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_in[1] = 1;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:247: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_in[7:4] = 4\'h0;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:249: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_dataout = (len >> 16);\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:252: syntax error, unexpected \'@\'\n      @(posedge hi_in[0]);\n      ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:258: syntax error, unexpected \'@\'\n            @(posedge hi_in[0]);\n            ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:263: Unsupported: wait statements\n   wait (hi_out[0] == 0);\n   ^~~~\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:285: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_in[1] = 1;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:288: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_in[7:4] = 4\'h0;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:290: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_dataout = (len >> 16);\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:294: syntax error, unexpected \'@\'\n      while (hi_out[0] === 1) @(posedge hi_in[0]);\n                              ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:295: syntax error, unexpected \'@\'\n      while (hi_out[0] === 0) @(posedge hi_in[0]);\n                              ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:299: syntax error, unexpected \'@\'\n         @(posedge hi_in[0]); k=k+2;\n         ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:301: syntax error, unexpected \'@\'\n      for (j=0; j < BlockDelayStates; j=j+1) @(posedge hi_in[0]);\n                                             ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:303: Unsupported: wait statements\n   wait (hi_out[0] == 0);\n   ^~~~\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:325: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_in[1] = 1;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:328: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_in[7:4] = 4\'h0;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:330: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_dataout = (len >> 16);\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:333: syntax error, unexpected \'@\'\n   @(posedge hi_in[0]) hi_in[1] = 0;\n   ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:335: syntax error, unexpected \'@\'\n      while (hi_out[0] === 1) @(posedge hi_in[0]);\n                              ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:336: syntax error, unexpected \'@\'\n      while (hi_out[0] === 0) @(posedge hi_in[0]);\n                              ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:340: syntax error, unexpected \'@\'\n         @(posedge hi_in[0]) k=k+2;\n         ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:342: syntax error, unexpected \'@\'\n      for (j=0; j < BlockDelayStates; j=j+1) @(posedge hi_in[0]);\n                                             ^\n%Error: data/full_repos/permissive/120539939/FrontPanel/ubuntu16.04/Simulation/USB2/Verilog/okHostCalls.v:344: Unsupported: wait statements\n   wait (hi_out[0] == 0);\n   ^~~~\n%Error: Exiting due to 48 error(s)\n'
function IsTriggered (
   input    [7:0]    ep,
   input    [15:0]   mask
);
begin
   if ((Triggered[ep - 8'h60] & mask) >= 0) begin
      if ((Triggered[ep - 8'h60] & mask) == 0) begin
         IsTriggered = 0;
      end else begin
         IsTriggered = 1;
      end
   end else begin
      $display("***FRONTPANEL ERROR: IsTriggered mask 0x%04h covers unused Triggers", mask);
      IsTriggered = 0;
   end
end
endfunction
function IsTriggered (
   input    [7:0]    ep,
   input    [15:0]   mask
);

begin
   if ((Triggered[ep - 8'h60] & mask) >= 0) begin
      if ((Triggered[ep - 8'h60] & mask) == 0) begin
         IsTriggered = 0;
      end else begin
         IsTriggered = 1;
      end
   end else begin
      $display("***FRONTPANEL ERROR: IsTriggered mask 0x%04h covers unused Triggers", mask);
      IsTriggered = 0;
   end
end
endfunction