data/full_repos/permissive/102515926/Modules/CIRCUIT5.v
 line:24: before: ","
1: b"%Error: data/full_repos/permissive/102515926/Modules/CIRCUIT5.v:21: Cannot find file containing module: 'ADD'\n    ADD #(64) add1(a, b, d);\n    ^~~\n        ... Looked in:\n             data/full_repos/permissive/102515926/Modules,data/full_repos/permissive/102515926/ADD\n             data/full_repos/permissive/102515926/Modules,data/full_repos/permissive/102515926/ADD.v\n             data/full_repos/permissive/102515926/Modules,data/full_repos/permissive/102515926/ADD.sv\n             ADD\n             ADD.v\n             ADD.sv\n             obj_dir/ADD\n             obj_dir/ADD.v\n             obj_dir/ADD.sv\n%Error: data/full_repos/permissive/102515926/Modules/CIRCUIT5.v:22: Cannot find file containing module: 'ADD'\n    ADD #(64) add2(a, c, e);\n    ^~~\n%Error: data/full_repos/permissive/102515926/Modules/CIRCUIT5.v:23: Cannot find file containing module: 'SUB'\n    SUB #(64) sub1(a, b, f);\n    ^~~\n%Error: data/full_repos/permissive/102515926/Modules/CIRCUIT5.v:24: Cannot find file containing module: 'COMP'\n    COMP #(64) comp1(d, e, , , dEQe);\n    ^~~~\n%Error: data/full_repos/permissive/102515926/Modules/CIRCUIT5.v:25: Cannot find file containing module: 'COMP'\n    COMP #(64) comp2(d, e, , dLTe, );\n    ^~~~\n%Error: data/full_repos/permissive/102515926/Modules/CIRCUIT5.v:26: Cannot find file containing module: 'MUX2x1'\n    MUX2x1 #(64) mux1(e, d, dLTe, g);\n    ^~~~~~\n%Error: data/full_repos/permissive/102515926/Modules/CIRCUIT5.v:27: Cannot find file containing module: 'MUX2x1'\n    MUX2x1 #(64) mux2(f, g, dEQe, h);\n    ^~~~~~\n%Error: data/full_repos/permissive/102515926/Modules/CIRCUIT5.v:28: Cannot find file containing module: 'SHL'\n    SHL #(64) shl1(hreg, dLTe, xrin);\n    ^~~\n%Error: data/full_repos/permissive/102515926/Modules/CIRCUIT5.v:29: Cannot find file containing module: 'SHR'\n    SHR #(64) shr1(greg, dEQe, zrin);\n    ^~~\n%Error: data/full_repos/permissive/102515926/Modules/CIRCUIT5.v:31: Cannot find file containing module: 'REG'\n    REG #(64) reg1(xrin, Clk, Rst, x);\n    ^~~\n%Error: data/full_repos/permissive/102515926/Modules/CIRCUIT5.v:32: Cannot find file containing module: 'REG'\n    REG #(64) reg2(zrin, Clk, Rst, z);\n    ^~~\n%Error: Exiting due to 11 error(s)\n"
module CIRCUIT5(a, b, c, Clk, Rst, x, z);
    
    input Clk, Rst;
    input [63:0] a, b, c;
    output [31:0] x, z;
    
    wire [63:0] d, e, f, g, h; 
    wire dLTe, dEQe;
    wire [63:0] xrin, zrin;
    
    reg [63:0] greg, hreg;
    
    ADD #(64) add1(a, b, d);
    ADD #(64) add2(a, c, e);
    SUB #(64) sub1(a, b, f);
    COMP #(64) comp1(d, e, , , dEQe);
    COMP #(64) comp2(d, e, , dLTe, );
    MUX2x1 #(64) mux1(e, d, dLTe, g);
    MUX2x1 #(64) mux2(f, g, dEQe, h);
    SHL #(64) shl1(hreg, dLTe, xrin);
    SHR #(64) shr1(greg, dEQe, zrin);
    
    REG #(64) reg1(xrin, Clk, Rst, x);
    REG #(64) reg2(zrin, Clk, Rst, z);
    
    always @(g, h) begin
        greg <= g; hreg <= h;
    end
    
endmodule
module CIRCUIT5(a, b, c, Clk, Rst, x, z);

    
    input Clk, Rst;
    input [63:0] a, b, c;
    output [31:0] x, z;
    
    wire [63:0] d, e, f, g, h; 
    wire dLTe, dEQe;
    wire [63:0] xrin, zrin;
    
    reg [63:0] greg, hreg;
    
    ADD #(64) add1(a, b, d);
    ADD #(64) add2(a, c, e);
    SUB #(64) sub1(a, b, f);
    COMP #(64) comp1(d, e, , , dEQe);
    COMP #(64) comp2(d, e, , dLTe, );
    MUX2x1 #(64) mux1(e, d, dLTe, g);
    MUX2x1 #(64) mux2(f, g, dEQe, h);
    SHL #(64) shl1(hreg, dLTe, xrin);
    SHR #(64) shr1(greg, dEQe, zrin);
    
    REG #(64) reg1(xrin, Clk, Rst, x);
    REG #(64) reg2(zrin, Clk, Rst, z);
    
    always @(g, h) begin
        greg <= g; hreg <= h;
    end
    
endmodule