data/full_repos/permissive/160895047/Sign_Extend_Test.v
 line:26: before: "+"
1: b'%Error: data/full_repos/permissive/160895047/Sign_Extend_Test.v:1: Cannot find include file: Sign_Extend.v\n`include "Sign_Extend.v" \n         ^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/160895047,data/full_repos/permissive/160895047/Sign_Extend.v\n             data/full_repos/permissive/160895047,data/full_repos/permissive/160895047/Sign_Extend.v.v\n             data/full_repos/permissive/160895047,data/full_repos/permissive/160895047/Sign_Extend.v.sv\n             Sign_Extend.v\n             Sign_Extend.v.v\n             Sign_Extend.v.sv\n             obj_dir/Sign_Extend.v\n             obj_dir/Sign_Extend.v.v\n             obj_dir/Sign_Extend.v.sv\n%Error: data/full_repos/permissive/160895047/Sign_Extend_Test.v:10: Unsupported or unknown PLI call: $monitor\n $monitor("%g\\t\\t%g\\n%b\\t%b", v, sv, v, sv);\n ^~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/160895047/Sign_Extend_Test.v:12: Unsupported: Ignoring delay on this delayed statement.\n  #5 v = -i;\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 2 error(s), 1 warning(s)\n'
module Sign_Extend_Test();
reg signed [15:0] v;
wire signed [31:0] sv;
integer i;

initial
begin
	$display("v\t\tsv\t\t");
	$monitor("%g\t\t%g\n%b\t%b", v, sv, v, sv);
	for (i = 1; i < 10; ++i)
		#5 v = -i;
end

Sign_Extend U0(v, sv);
endmodule
module Sign_Extend_Test();

reg signed [15:0] v;
wire signed [31:0] sv;
integer i;

initial
begin
	$display("v\t\tsv\t\t");
	$monitor("%g\t\t%g\n%b\t%b", v, sv, v, sv);
	for (i = 1; i < 10; ++i)
		#5 v = -i;
end

Sign_Extend U0(v, sv);
endmodule