data/full_repos/permissive/109846502/LCD_dp.v
1: b'%Error: data/full_repos/permissive/109846502/LCD_dp.v:2: Cannot find include file: defines.vh\n`include "defines.vh" \n         ^~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/109846502,data/full_repos/permissive/109846502/defines.vh\n             data/full_repos/permissive/109846502,data/full_repos/permissive/109846502/defines.vh.v\n             data/full_repos/permissive/109846502,data/full_repos/permissive/109846502/defines.vh.sv\n             defines.vh\n             defines.vh.v\n             defines.vh.sv\n             obj_dir/defines.vh\n             obj_dir/defines.vh.v\n             obj_dir/defines.vh.sv\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:56: Define or directive not defined: \'`ASCII_BLANK\'\n   mux_out = `ASCII_BLANK;\n             ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:56: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n   mux_out = `ASCII_BLANK;\n                         ^\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:61: Define or directive not defined: \'`ASCII_BLANK\'\n default: mux_out = `ASCII_BLANK;\n                    ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:61: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n default: mux_out = `ASCII_BLANK;\n                                ^\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:81: Define or directive not defined: \'`SL_ADD\'\n `SL_ADD:\n ^~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:81: syntax error, unexpected \':\', expecting endcase\n `SL_ADD:\n        ^\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:83: Define or directive not defined: \'`ASCII_A\'\n  2\'d2: OP_out = `ASCII_A;\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:84: Define or directive not defined: \'`ASCII_D\'\n  2\'d0, 2\'d1: OP_out = `ASCII_D;\n                       ^~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:85: Define or directive not defined: \'`ASCII_BLANK\'\n  default: OP_out = `ASCII_BLANK;\n                    ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:88: Define or directive not defined: \'`SL_SUB\'\n `SL_SUB:\n ^~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:90: Define or directive not defined: \'`ASCII_S\'\n  2\'d2: OP_out = `ASCII_S;\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:91: Define or directive not defined: \'`ASCII_U\'\n  2\'d1: OP_out = `ASCII_U;\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:92: Define or directive not defined: \'`ASCII_B\'\n  2\'d0: OP_out = `ASCII_B;\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:93: Define or directive not defined: \'`ASCII_BLANK\'\n  default: OP_out = `ASCII_BLANK;\n                    ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:96: Define or directive not defined: \'`SL_AND\'\n `SL_AND:\n ^~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:98: Define or directive not defined: \'`ASCII_A\'\n  2\'d2: OP_out = `ASCII_A;\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:99: Define or directive not defined: \'`ASCII_N\'\n  2\'d1: OP_out = `ASCII_N;\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:100: Define or directive not defined: \'`ASCII_D\'\n  2\'d0: OP_out = `ASCII_D;\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:101: Define or directive not defined: \'`ASCII_BLANK\'\n  default: OP_out = `ASCII_BLANK;\n                    ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:104: Define or directive not defined: \'`SL_OR\'\n `SL_OR: \n ^~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:106: Define or directive not defined: \'`ASCII_O\'\n  2\'d1: OP_out = `ASCII_O;\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:107: Define or directive not defined: \'`ASCII_R\'\n  2\'d0: OP_out = `ASCII_R;\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:108: Define or directive not defined: \'`ASCII_BLANK\'\n  default: OP_out = `ASCII_BLANK;\n                    ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:111: Define or directive not defined: \'`SL_XOR\'\n `SL_XOR: \n ^~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:113: Define or directive not defined: \'`ASCII_X\'\n  2\'d2: OP_out = `ASCII_X;\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:114: Define or directive not defined: \'`ASCII_O\'\n  2\'d1: OP_out = `ASCII_O;\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:115: Define or directive not defined: \'`ASCII_R\'\n  2\'d0: OP_out = `ASCII_R;\n                 ^~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:116: Define or directive not defined: \'`ASCII_BLANK\'\n  default: OP_out = `ASCII_BLANK;\n                    ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/109846502/LCD_dp.v:118: Define or directive not defined: \'`ASCII_BLANK\'\n default: OP_out = `ASCII_BLANK;\n                   ^~~~~~~~~~~~\n%Error: Cannot continue\n'
module LCD_dp(
			input [1:0] init_sel, input data_sel, DB_sel,
			input [1:0] state, input [2:0] statelocal, input [1:0] index,
			input [3:0] A1, input [3:0] A2, input [3:0] A3, input [3:0] A4,
			input [3:0] B1, input [3:0] B2, input [3:0] B3, input [3:0] B4,
			input [1:0] inputIndex, input blink,
			output reg [7:0] DB_out
    );
localparam [5:0] clear = 6'd1;
localparam [5:0] displayOn = 6'b001110;
localparam [5:0] entryMode = 6'b000110;
localparam [5:0] functionSet = 6'b111000;


reg [5:0] init_out;
reg [7:0] mux_out;
reg [7:0] data_out;
reg [3:0] num_out;
reg [3:0] A_out;
reg [3:0] B_out;
reg [7:0] OP_out;
always @*
	case(init_sel)
	2'd0: init_out = clear;
	2'd1: init_out = displayOn;
	2'd2: init_out = entryMode;
	2'd3: init_out = functionSet;
	endcase
	
always @*
	case(state)
	2'd0: 
	begin
		if((2'd3 - index) == inputIndex && blink)
			mux_out = `ASCII_BLANK;
		else
			mux_out = {4'h3, num_out};
	end
	2'd1: mux_out = OP_out;
	default: mux_out = `ASCII_BLANK;
	endcase
	
always @*
	case(statelocal)
	3'd0: num_out = A_out;
	3'd1: num_out = B_out;
	default: num_out = A_out;
	endcase
	
always @*
	case(index)
	2'd0: begin A_out = A4; B_out = B4; end
	2'd1: begin A_out = A3; B_out = B3; end
	2'd2: begin A_out = A2; B_out = B2; end
	2'd3: begin A_out = A1; B_out = B1; end
	endcase
	
always @*
	case(statelocal)
	`SL_ADD:
		case(index)
		2'd2: OP_out = `ASCII_A;
		2'd0, 2'd1: OP_out = `ASCII_D;
		default: OP_out = `ASCII_BLANK;
		endcase
		
	`SL_SUB:
		case(index)
		2'd2: OP_out = `ASCII_S;
		2'd1: OP_out = `ASCII_U;
		2'd0: OP_out = `ASCII_B;
		default: OP_out = `ASCII_BLANK;
		endcase

	`SL_AND:
		case(index)
		2'd2: OP_out = `ASCII_A;
		2'd1: OP_out = `ASCII_N;
		2'd0: OP_out = `ASCII_D;
		default: OP_out = `ASCII_BLANK;
		endcase

	`SL_OR: 
		case(index)
		2'd1: OP_out = `ASCII_O;
		2'd0: OP_out = `ASCII_R;
		default: OP_out = `ASCII_BLANK;
		endcase

	`SL_XOR: 
		case(index)
		2'd2: OP_out = `ASCII_X;
		2'd1: OP_out = `ASCII_O;
		2'd0: OP_out = `ASCII_R;
		default: OP_out = `ASCII_BLANK;
		endcase
	default: OP_out = `ASCII_BLANK;
	endcase

always @*
	case(data_sel)
	1'b0: data_out = init_out;
	1'b1: data_out = mux_out;
	endcase

always @*
	case(DB_sel)
	1'b0: DB_out = 8'hcc;
	1'b1: DB_out = data_out;
	endcase
	

endmodule
module LCD_dp(
			input [1:0] init_sel, input data_sel, DB_sel,
			input [1:0] state, input [2:0] statelocal, input [1:0] index,
			input [3:0] A1, input [3:0] A2, input [3:0] A3, input [3:0] A4,
			input [3:0] B1, input [3:0] B2, input [3:0] B3, input [3:0] B4,
			input [1:0] inputIndex, input blink,
			output reg [7:0] DB_out
    );

localparam [5:0] clear = 6'd1;
localparam [5:0] displayOn = 6'b001110;
localparam [5:0] entryMode = 6'b000110;
localparam [5:0] functionSet = 6'b111000;


reg [5:0] init_out;
reg [7:0] mux_out;
reg [7:0] data_out;
reg [3:0] num_out;
reg [3:0] A_out;
reg [3:0] B_out;
reg [7:0] OP_out;
always @*
	case(init_sel)
	2'd0: init_out = clear;
	2'd1: init_out = displayOn;
	2'd2: init_out = entryMode;
	2'd3: init_out = functionSet;
	endcase
	
always @*
	case(state)
	2'd0: 
	begin
		if((2'd3 - index) == inputIndex && blink)
			mux_out = `ASCII_BLANK;
		else
			mux_out = {4'h3, num_out};
	end
	2'd1: mux_out = OP_out;
	default: mux_out = `ASCII_BLANK;
	endcase
	
always @*
	case(statelocal)
	3'd0: num_out = A_out;
	3'd1: num_out = B_out;
	default: num_out = A_out;
	endcase
	
always @*
	case(index)
	2'd0: begin A_out = A4; B_out = B4; end
	2'd1: begin A_out = A3; B_out = B3; end
	2'd2: begin A_out = A2; B_out = B2; end
	2'd3: begin A_out = A1; B_out = B1; end
	endcase
	
always @*
	case(statelocal)
	`SL_ADD:
		case(index)
		2'd2: OP_out = `ASCII_A;
		2'd0, 2'd1: OP_out = `ASCII_D;
		default: OP_out = `ASCII_BLANK;
		endcase
		
	`SL_SUB:
		case(index)
		2'd2: OP_out = `ASCII_S;
		2'd1: OP_out = `ASCII_U;
		2'd0: OP_out = `ASCII_B;
		default: OP_out = `ASCII_BLANK;
		endcase

	`SL_AND:
		case(index)
		2'd2: OP_out = `ASCII_A;
		2'd1: OP_out = `ASCII_N;
		2'd0: OP_out = `ASCII_D;
		default: OP_out = `ASCII_BLANK;
		endcase

	`SL_OR: 
		case(index)
		2'd1: OP_out = `ASCII_O;
		2'd0: OP_out = `ASCII_R;
		default: OP_out = `ASCII_BLANK;
		endcase

	`SL_XOR: 
		case(index)
		2'd2: OP_out = `ASCII_X;
		2'd1: OP_out = `ASCII_O;
		2'd0: OP_out = `ASCII_R;
		default: OP_out = `ASCII_BLANK;
		endcase
	default: OP_out = `ASCII_BLANK;
	endcase

always @*
	case(data_sel)
	1'b0: data_out = init_out;
	1'b1: data_out = mux_out;
	endcase

always @*
	case(DB_sel)
	1'b0: DB_out = 8'hcc;
	1'b1: DB_out = data_out;
	endcase
	

endmodule