data/full_repos/permissive/206842334/src/ram.v
1: b'%Warning-WIDTH: data/full_repos/permissive/206842334/src/ram.v:22: Bit extraction of array[254:0] requires 8 bit index, not 16 bits.\n                                                                 : ... In instance ram\n            memory[write_address] <= data_in;\n                  ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/206842334/src/ram.v:24: Bit extraction of array[254:0] requires 8 bit index, not 16 bits.\n                                                                 : ... In instance ram\n        data_out <= memory[read_address];\n                          ^\n%Error: Exiting due to 2 warning(s)\n'
module ram (
    input clk,
    input [15:0] read_address,
    input [15:0] write_address,
    input [7:0] data_in, 
    input write_enable,
    output reg [7:0] data_out
);
    parameter MEM_LENGTH = 255;
    parameter MEM_INIT_FILE = "";

    reg [7:0] memory [0:MEM_LENGTH-1];

    initial begin
        if (MEM_INIT_FILE != "") begin
            $readmemh(MEM_INIT_FILE, memory);
        end
    end

    always @(posedge clk) begin
        if (write_enable) begin
            memory[write_address] <= data_in;
        end
        data_out <= memory[read_address];
    end

endmodule
module ram (
    input clk,
    input [15:0] read_address,
    input [15:0] write_address,
    input [7:0] data_in, 
    input write_enable,
    output reg [7:0] data_out
);

    parameter MEM_LENGTH = 255;
    parameter MEM_INIT_FILE = "";

    reg [7:0] memory [0:MEM_LENGTH-1];

    initial begin
        if (MEM_INIT_FILE != "") begin
            $readmemh(MEM_INIT_FILE, memory);
        end
    end

    always @(posedge clk) begin
        if (write_enable) begin
            memory[write_address] <= data_in;
        end
        data_out <= memory[read_address];
    end

endmodule