data/full_repos/permissive/114814262/IC 2015-2016/HARDWARE/[DEPRECATED] sistema_controle_alarme v1.0.0/[FPGA] sistema_para_controle_de_alarme/v1.0.0/clock_atraso.v
 line:19: before: "0"
1: b'%Error: Cannot find file containing module: 2015-2016/HARDWARE/[DEPRECATED]\n        ... Looked in:\n             data/full_repos/permissive/114814262/IC/2015-2016/HARDWARE/[DEPRECATED]\n             data/full_repos/permissive/114814262/IC/2015-2016/HARDWARE/[DEPRECATED].v\n             data/full_repos/permissive/114814262/IC/2015-2016/HARDWARE/[DEPRECATED].sv\n             2015-2016/HARDWARE/[DEPRECATED]\n             2015-2016/HARDWARE/[DEPRECATED].v\n             2015-2016/HARDWARE/[DEPRECATED].sv\n             obj_dir/2015-2016/HARDWARE/[DEPRECATED]\n             obj_dir/2015-2016/HARDWARE/[DEPRECATED].v\n             obj_dir/2015-2016/HARDWARE/[DEPRECATED].sv\n%Error: Cannot find file containing module: sistema_controle_alarme\n%Error: Cannot find file containing module: v1.0.0/[FPGA]\n%Error: Cannot find file containing module: sistema_para_controle_de_alarme/v1.0.0,data/full_repos/permissive/114814262\n%Error: Cannot find file containing module: data/full_repos/permissive/114814262/IC\n%Error: Cannot find file containing module: sistema_para_controle_de_alarme/v1.0.0/clock_atraso.v\n%Error: Exiting due to 6 error(s)\n'
module clock_atraso(Clock, clock_out);
    input Clock;
    output reg clock_out;
	 
	 reg [25:0] slow_count;
	 
    initial begin
		slow_count <=0;
		clock_out <= 1'b0;
	 end 

    always @(posedge Clock)
        slow_count <= slow_count + 1'b1;
		  
	always @(negedge slow_count[25])
		clock_out <= !clock_out;
endmodule
module clock_atraso(Clock, clock_out);

    input Clock;
    output reg clock_out;
	 
	 reg [25:0] slow_count;
	 
    initial begin
		slow_count <=0;
		clock_out <= 1'b0;
	 end 

    always @(posedge Clock)
        slow_count <= slow_count + 1'b1;
		  
	always @(negedge slow_count[25])
		clock_out <= !clock_out;
endmodule