data/full_repos/permissive/148324174/HDLBits/Circuits/LatchDFF.v
1: b'%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/LatchDFF.v:15: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/LatchDFF.v:1: ... Location of original declaration\nmodule top_module(\n       ^~~~~~~~~~\n                 ... Use "/* verilator lint_off MODDUP */" and lint_on around source to disable this message.\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/LatchDFF.v:30: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/LatchDFF.v:1: ... Location of original declaration\nmodule top_module(\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/LatchDFF.v:44: Duplicate declaration of module: \'top_module\'\nmodule top_module(\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/LatchDFF.v:1: ... Location of original declaration\nmodule top_module(\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/LatchDFF.v:75: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/LatchDFF.v:1: ... Location of original declaration\nmodule top_module(\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/LatchDFF.v:85: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/LatchDFF.v:1: ... Location of original declaration\nmodule top_module(\n       ^~~~~~~~~~\n%Warning-MODDUP: data/full_repos/permissive/148324174/HDLBits/Circuits/LatchDFF.v:103: Duplicate declaration of module: \'top_module\'\nmodule top_module (\n       ^~~~~~~~~~\n                 data/full_repos/permissive/148324174/HDLBits/Circuits/LatchDFF.v:1: ... Location of original declaration\nmodule top_module(\n       ^~~~~~~~~~\n%Error: Exiting due to 6 warning(s)\n'
module top_module(
    input clk,
    input [7:0] d,
    input areset,
    output reg [7:0] q);
    

    always @(posedge clk, posedge areset)
        if (areset)
            q <= 0;
        else
            q <= d;






    






    
endmodule
module top_module(
    input clk,
    input [7:0] d,
    input areset,
    output reg [7:0] q);

    

    always @(posedge clk, posedge areset)
        if (areset)
            q <= 0;
        else
            q <= d;






    






    
endmodule