data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v
1: b'%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:1: Cannot find include file: ../defs.v\n`include "../defs.v" \n         ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/161029703/src/cpu/stage_id,data/full_repos/permissive/161029703/../defs.v\n             data/full_repos/permissive/161029703/src/cpu/stage_id,data/full_repos/permissive/161029703/../defs.v.v\n             data/full_repos/permissive/161029703/src/cpu/stage_id,data/full_repos/permissive/161029703/../defs.v.sv\n             ../defs.v\n             ../defs.v.v\n             ../defs.v.sv\n             obj_dir/../defs.v\n             obj_dir/../defs.v.v\n             obj_dir/../defs.v.sv\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:37: Define or directive not defined: \'`OP_BLTZ\'\n        5\'h00: op <= `OP_BLTZ;\n                     ^~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:37: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        5\'h00: op <= `OP_BLTZ;\n                             ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:38: Define or directive not defined: \'`OP_BGEZ\'\n        5\'h01: op <= `OP_BGEZ;\n                     ^~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:38: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        5\'h01: op <= `OP_BGEZ;\n                             ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:39: Define or directive not defined: \'`OP_BLTZAL\'\n        5\'h10: op <= `OP_BLTZAL;\n                     ^~~~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:39: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        5\'h10: op <= `OP_BLTZAL;\n                               ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:40: Define or directive not defined: \'`OP_BGEZAL\'\n        5\'h11: op <= `OP_BGEZAL;\n                     ^~~~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:40: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        5\'h11: op <= `OP_BGEZAL;\n                               ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:41: Define or directive not defined: \'`OP_INVAILD\'\n        default: op <= `OP_INVAILD;\n                       ^~~~~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:41: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        default: op <= `OP_INVAILD;\n                                  ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:44: Define or directive not defined: \'`OP_BEQ\'\n    6\'h04: op <= `OP_BEQ;\n                 ^~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:44: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n    6\'h04: op <= `OP_BEQ;\n                        ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:45: Define or directive not defined: \'`OP_BNE\'\n    6\'h05: op <= `OP_BNE;\n                 ^~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:45: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n    6\'h05: op <= `OP_BNE;\n                        ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:46: Define or directive not defined: \'`OP_BLEZ\'\n    6\'h06: op <= reg_t == 5\'h0 ? `OP_BLEZ : `OP_INVAILD;\n                                 ^~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:46: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\n    6\'h06: op <= reg_t == 5\'h0 ? `OP_BLEZ : `OP_INVAILD;\n                                          ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:46: Define or directive not defined: \'`OP_INVAILD\'\n    6\'h06: op <= reg_t == 5\'h0 ? `OP_BLEZ : `OP_INVAILD;\n                                            ^~~~~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:47: Define or directive not defined: \'`OP_BGTZ\'\n    6\'h07: op <= reg_t == 5\'h0 ? `OP_BGTZ : `OP_INVAILD;\n                                 ^~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:47: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\n    6\'h07: op <= reg_t == 5\'h0 ? `OP_BGTZ : `OP_INVAILD;\n                                          ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:47: Define or directive not defined: \'`OP_INVAILD\'\n    6\'h07: op <= reg_t == 5\'h0 ? `OP_BGTZ : `OP_INVAILD;\n                                            ^~~~~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:48: Define or directive not defined: \'`OP_ADD\'\n    6\'h08,6\'h09: op <= `OP_ADD;\n                       ^~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:48: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n    6\'h08,6\'h09: op <= `OP_ADD;\n                              ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:49: Define or directive not defined: \'`OP_SLT\'\n    6\'h0a,6\'h0b: op <= `OP_SLT;\n                       ^~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:49: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n    6\'h0a,6\'h0b: op <= `OP_SLT;\n                              ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:50: Define or directive not defined: \'`OP_AND\'\n    6\'h0c: op <= `OP_AND;\n                 ^~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:50: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n    6\'h0c: op <= `OP_AND;\n                        ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:51: Define or directive not defined: \'`OP_OR\'\n    6\'h0d: op <= `OP_OR;\n                 ^~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:51: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n    6\'h0d: op <= `OP_OR;\n                       ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:52: Define or directive not defined: \'`OP_XOR\'\n    6\'h0e: op <= `OP_XOR;\n                 ^~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:52: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n    6\'h0e: op <= `OP_XOR;\n                        ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:53: Define or directive not defined: \'`OP_LU\'\n    6\'h0f: op <= reg_s == 5\'h0 ? `OP_LU : `OP_INVAILD;\n                                 ^~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:53: syntax error, unexpected \':\', expecting TYPE-IDENTIFIER\n    6\'h0f: op <= reg_s == 5\'h0 ? `OP_LU : `OP_INVAILD;\n                                        ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:53: Define or directive not defined: \'`OP_INVAILD\'\n    6\'h0f: op <= reg_s == 5\'h0 ? `OP_LU : `OP_INVAILD;\n                                          ^~~~~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:55: Define or directive not defined: \'`OP_MFC0\'\n        if(reg_s == 5\'h0) op <= `OP_MFC0;\n                                ^~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:55: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        if(reg_s == 5\'h0) op <= `OP_MFC0;\n                                        ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:56: Define or directive not defined: \'`OP_MTC0\'\n        else if(reg_s == 5\'h4) op <= `OP_MTC0;\n                                     ^~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:56: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        else if(reg_s == 5\'h4) op <= `OP_MTC0;\n                                             ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:59: Define or directive not defined: \'`OP_ERET\'\n                op <= `OP_ERET;\n                      ^~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:59: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                op <= `OP_ERET;\n                              ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:61: Define or directive not defined: \'`OP_WAIT\'\n                op <= `OP_WAIT;\n                      ^~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:61: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                op <= `OP_WAIT;\n                              ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:63: Define or directive not defined: \'`OP_TLBWI\'\n                op <= `OP_TLBWI;\n                      ^~~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:63: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                op <= `OP_TLBWI;\n                               ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:65: Define or directive not defined: \'`OP_TLBP\'\n                op <= `OP_TLBP;\n                      ^~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:65: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                op <= `OP_TLBP;\n                              ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:67: Define or directive not defined: \'`OP_INVAILD\'\n                op <= `OP_INVAILD;\n                      ^~~~~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:67: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n                op <= `OP_INVAILD;\n                                 ^\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:69: Define or directive not defined: \'`OP_INVAILD\'\n        else op <= `OP_INVAILD;\n                   ^~~~~~~~~~~\n%Error: data/full_repos/permissive/161029703/src/cpu/stage_id/id_i.v:69: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n        else op <= `OP_INVAILD;\n                              ^\n%Error: Exiting due to too many errors encountered; --error-limit=50\n'
module id_i(

            op,
            reg_s,
            reg_t,
            immediate,
            flag_unsigned,

            inst);

parameter WITH_CACHE = 1;
parameter WITH_TLB = 1;

input wire[31:0] inst;
output reg[7:0] op;
output wire[4:0] reg_s;
output wire[4:0] reg_t;
output wire[15:0] immediate;
output reg flag_unsigned;

assign reg_s = inst[25:21];
assign reg_t = inst[20:16];
assign immediate = inst[15:0];

always @(*) begin
    flag_unsigned <= (inst[31:26]==6'h9) ||
        (inst[31:26]==6'h0b)  ||
        (inst[31:26]==6'h24) ||
        (inst[31:26]==6'h25);
end

always @(*) begin
    case(inst[31:26])
    6'h01: begin
        case(reg_t)
        5'h00: op <= `OP_BLTZ;
        5'h01: op <= `OP_BGEZ;
        5'h10: op <= `OP_BLTZAL;
        5'h11: op <= `OP_BGEZAL;
        default: op <= `OP_INVAILD;
        endcase
    end
    6'h04: op <= `OP_BEQ;
    6'h05: op <= `OP_BNE;
    6'h06: op <= reg_t == 5'h0 ? `OP_BLEZ : `OP_INVAILD;
    6'h07: op <= reg_t == 5'h0 ? `OP_BGTZ : `OP_INVAILD;
    6'h08,6'h09: op <= `OP_ADD;
    6'h0a,6'h0b: op <= `OP_SLT;
    6'h0c: op <= `OP_AND;
    6'h0d: op <= `OP_OR;
    6'h0e: op <= `OP_XOR;
    6'h0f: op <= reg_s == 5'h0 ? `OP_LU : `OP_INVAILD;
    6'h10: begin
        if(reg_s == 5'h0) op <= `OP_MFC0;
        else if(reg_s == 5'h4) op <= `OP_MTC0;
        else if(reg_s[4] == 1'b1) begin
            if(inst[5:0] == 6'h18)
                op <= `OP_ERET;
            else if(inst[5:0] == 6'h20)
                op <= `OP_WAIT;
            else if(inst[5:0] == 6'h2 && WITH_TLB)
                op <= `OP_TLBWI;
            else if(inst[5:0] == 6'h8 && WITH_TLB)
                op <= `OP_TLBP;
            else
                op <= `OP_INVAILD;
        end
        else op <= `OP_INVAILD;
    end
    6'h20,6'h24: op <= `OP_LB;
    6'h21,6'h25: op <= `OP_LH;
    6'h23: op <= `OP_LW;
    6'h22: op <= `OP_LWL;
    6'h26: op <= `OP_LWR;
    6'h28: op <= `OP_SB;
    6'h29: op <= `OP_SH;

    6'h2B: op <= `OP_SW;
    6'h2a: op <= `OP_SWL;
    6'h2e: op <= `OP_SWR;
    6'h2F: op <= WITH_CACHE ? `OP_CACHE : `OP_INVAILD;
    6'h33: op <= `OP_PREF;

    default: op <= `OP_INVAILD;
    endcase
end


endmodule
module id_i(

            op,
            reg_s,
            reg_t,
            immediate,
            flag_unsigned,

            inst);


parameter WITH_CACHE = 1;
parameter WITH_TLB = 1;

input wire[31:0] inst;
output reg[7:0] op;
output wire[4:0] reg_s;
output wire[4:0] reg_t;
output wire[15:0] immediate;
output reg flag_unsigned;

assign reg_s = inst[25:21];
assign reg_t = inst[20:16];
assign immediate = inst[15:0];

always @(*) begin
    flag_unsigned <= (inst[31:26]==6'h9) ||
        (inst[31:26]==6'h0b)  ||
        (inst[31:26]==6'h24) ||
        (inst[31:26]==6'h25);
end

always @(*) begin
    case(inst[31:26])
    6'h01: begin
        case(reg_t)
        5'h00: op <= `OP_BLTZ;
        5'h01: op <= `OP_BGEZ;
        5'h10: op <= `OP_BLTZAL;
        5'h11: op <= `OP_BGEZAL;
        default: op <= `OP_INVAILD;
        endcase
    end
    6'h04: op <= `OP_BEQ;
    6'h05: op <= `OP_BNE;
    6'h06: op <= reg_t == 5'h0 ? `OP_BLEZ : `OP_INVAILD;
    6'h07: op <= reg_t == 5'h0 ? `OP_BGTZ : `OP_INVAILD;
    6'h08,6'h09: op <= `OP_ADD;
    6'h0a,6'h0b: op <= `OP_SLT;
    6'h0c: op <= `OP_AND;
    6'h0d: op <= `OP_OR;
    6'h0e: op <= `OP_XOR;
    6'h0f: op <= reg_s == 5'h0 ? `OP_LU : `OP_INVAILD;
    6'h10: begin
        if(reg_s == 5'h0) op <= `OP_MFC0;
        else if(reg_s == 5'h4) op <= `OP_MTC0;
        else if(reg_s[4] == 1'b1) begin
            if(inst[5:0] == 6'h18)
                op <= `OP_ERET;
            else if(inst[5:0] == 6'h20)
                op <= `OP_WAIT;
            else if(inst[5:0] == 6'h2 && WITH_TLB)
                op <= `OP_TLBWI;
            else if(inst[5:0] == 6'h8 && WITH_TLB)
                op <= `OP_TLBP;
            else
                op <= `OP_INVAILD;
        end
        else op <= `OP_INVAILD;
    end
    6'h20,6'h24: op <= `OP_LB;
    6'h21,6'h25: op <= `OP_LH;
    6'h23: op <= `OP_LW;
    6'h22: op <= `OP_LWL;
    6'h26: op <= `OP_LWR;
    6'h28: op <= `OP_SB;
    6'h29: op <= `OP_SH;

    6'h2B: op <= `OP_SW;
    6'h2a: op <= `OP_SWL;
    6'h2e: op <= `OP_SWR;
    6'h2F: op <= WITH_CACHE ? `OP_CACHE : `OP_INVAILD;
    6'h33: op <= `OP_PREF;

    default: op <= `OP_INVAILD;
    endcase
end


endmodule