data/full_repos/permissive/109594910/examples/blink_100mhz_from_12mhz.v
 line:47: before: ")"
1: b'%Warning-IMPLICIT: data/full_repos/permissive/109594910/examples/blink_100mhz_from_12mhz.v:21: Signal definition not found, creating implicitly: \'clk_100mhz\'\n                                                                                             : ... Suggested alternative: \'clk_12mhz\'\n    always @(posedge clk_100mhz)\n                     ^~~~~~~~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/109594910/examples/blink_100mhz_from_12mhz.v:35: Cannot find file containing module: \'SB_PLL40_CORE\'\n    SB_PLL40_CORE #(\n    ^~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/109594910/examples,data/full_repos/permissive/109594910/SB_PLL40_CORE\n             data/full_repos/permissive/109594910/examples,data/full_repos/permissive/109594910/SB_PLL40_CORE.v\n             data/full_repos/permissive/109594910/examples,data/full_repos/permissive/109594910/SB_PLL40_CORE.sv\n             SB_PLL40_CORE\n             SB_PLL40_CORE.v\n             SB_PLL40_CORE.sv\n             obj_dir/SB_PLL40_CORE\n             obj_dir/SB_PLL40_CORE.v\n             obj_dir/SB_PLL40_CORE.sv\n%Warning-WIDTH: data/full_repos/permissive/109594910/examples/blink_100mhz_from_12mhz.v:85: Operator OR expects 33 bits on the LHS, but LHS\'s VARREF \'rng\' generates 32 bits.\n                                                                                          : ... In instance blink_100mhz_from_12mhz\n        rng <= ({rng[0],(rng >> 1)})^(rng | {(rng << 1),rng[31]});\n                                          ^\n%Warning-WIDTH: data/full_repos/permissive/109594910/examples/blink_100mhz_from_12mhz.v:85: Operator ASSIGNDLY expects 32 bits on the Assign RHS, but Assign RHS\'s XOR generates 33 bits.\n                                                                                          : ... In instance blink_100mhz_from_12mhz\n        rng <= ({rng[0],(rng >> 1)})^(rng | {(rng << 1),rng[31]});\n            ^~\n%Warning-WIDTH: data/full_repos/permissive/109594910/examples/blink_100mhz_from_12mhz.v:88: Operator FUNCREF \'bin2gray\' expects 10 bits on the Function Argument, but Function Argument\'s SHIFTR generates 30 bits.\n                                                                                          : ... In instance blink_100mhz_from_12mhz\n    assign {LED1, LED2, LED3, LED4, LED5, LED6, LED7} = sel ? rng[14:7] : bin2gray(counter >> LOG2DELAY-1);\n                                                                          ^~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/109594910/examples/blink_100mhz_from_12mhz.v:88: Operator ASSIGNW expects 7 bits on the Assign RHS, but Assign RHS\'s COND generates 8 bits.\n                                                                                          : ... In instance blink_100mhz_from_12mhz\n    assign {LED1, LED2, LED3, LED4, LED5, LED6, LED7} = sel ? rng[14:7] : bin2gray(counter >> LOG2DELAY-1);\n                                                      ^\n%Error: Exiting due to 1 error(s), 5 warning(s)\n'
function [BITS-1:0] bin2gray(input [BITS+1:0] in);
        integer i;
        reg [BITS+1:0] temp;
        begin
            temp = in;
            for (i=0; i<BITS; i=i+1)
                bin2gray[i] = ^temp[i +: 2];
        end
    endfunction
function [BITS-1:0] bin2gray(input [BITS+1:0] in);

        integer i;
        reg [BITS+1:0] temp;
        begin
            temp = in;
            for (i=0; i<BITS; i=i+1)
                bin2gray[i] = ^temp[i +: 2];
        end
    endfunction