data/full_repos/permissive/193790231/lab08/lab08part02.v
1: b"%Error: data/full_repos/permissive/193790231/lab08/lab08part02.v:17: Cannot find file containing module: 'lpmRAM1port'\n    lpmRAM1port myRAM(SW[12:8], KEY[3], SW[7:0], SW[13], dataRAMout);\n    ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/193790231/lab08,data/full_repos/permissive/193790231/lpmRAM1port\n             data/full_repos/permissive/193790231/lab08,data/full_repos/permissive/193790231/lpmRAM1port.v\n             data/full_repos/permissive/193790231/lab08,data/full_repos/permissive/193790231/lpmRAM1port.sv\n             lpmRAM1port\n             lpmRAM1port.v\n             lpmRAM1port.sv\n             obj_dir/lpmRAM1port\n             obj_dir/lpmRAM1port.v\n             obj_dir/lpmRAM1port.sv\n%Error: data/full_repos/permissive/193790231/lab08/lab08part02.v:18: Cannot find file containing module: 'hexDisplay4digit'\n    hexDisplay4digit disp(HEX3, HEX2, HEX1, HEX0, {SW[7:0], dataRAMout[7:0]});\n    ^~~~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module lab08part02(
    output [6:0]HEX3, HEX2, HEX1, HEX0,
    output [0:0]LEDG,
    input  [13:0]SW,
    input  [3:3]KEY
);

    wire [7:0]dataRAMout;
    assign LEDG[0] = SW[13];
    lpmRAM1port	myRAM(SW[12:8], KEY[3], SW[7:0], SW[13], dataRAMout);
    hexDisplay4digit disp(HEX3, HEX2, HEX1, HEX0, {SW[7:0], dataRAMout[7:0]});
endmodule
module lab08part02(
    output [6:0]HEX3, HEX2, HEX1, HEX0,
    output [0:0]LEDG,
    input  [13:0]SW,
    input  [3:3]KEY
);


    wire [7:0]dataRAMout;
    assign LEDG[0] = SW[13];
    lpmRAM1port	myRAM(SW[12:8], KEY[3], SW[7:0], SW[13], dataRAMout);
    hexDisplay4digit disp(HEX3, HEX2, HEX1, HEX0, {SW[7:0], dataRAMout[7:0]});
endmodule