data/full_repos/permissive/10379745/hard/board_io/seven_seg.sv
1: b"%Error: data/full_repos/permissive/10379745/hard/board_io/seven_seg.sv:17: Cannot find file containing module: 'ffd'\nffd #(32) value_fd(CLK, RESET, EN, VALUE, val_fd);\n^~~\n        ... Looked in:\n             data/full_repos/permissive/10379745/hard/board_io,data/full_repos/permissive/10379745/ffd\n             data/full_repos/permissive/10379745/hard/board_io,data/full_repos/permissive/10379745/ffd.v\n             data/full_repos/permissive/10379745/hard/board_io,data/full_repos/permissive/10379745/ffd.sv\n             ffd\n             ffd.v\n             ffd.sv\n             obj_dir/ffd\n             obj_dir/ffd.v\n             obj_dir/ffd.sv\n%Error: Exiting due to 1 error(s)\n"
module segment_logic( input  [3:0] nibble,
                      output [7:0] seg );


logic [6:0] s;

always_comb
   case(nibble)
      4'h0: s = ~7'b1111110;
      4'h1: s = ~7'b0110000;
      4'h2: s = ~7'b1101101;
      4'h3: s = ~7'b1111001;
      4'h4: s = ~7'b0110011;
      4'h5: s = ~7'b1011011;
      4'h6: s = ~7'b1011111;
      4'h7: s = ~7'b1110000;
      4'h8: s = ~7'b1111111;
      4'h9: s = ~7'b1111011;
      4'hA: s = ~7'b1110111;
      4'hB: s = ~7'b0011111;
      4'hC: s = ~7'b1001110;
      4'hD: s = ~7'b0111101;
      4'hE: s = ~7'b1001111;
      4'hF: s = ~7'b1000111;
      default: s = ~7'b1111110;
   endcase

assign seg = {1'b1, s};

endmodule
module segment_logic( input  [3:0] nibble,
                      output [7:0] seg );



logic [6:0] s;

always_comb
   case(nibble)
      4'h0: s = ~7'b1111110;
      4'h1: s = ~7'b0110000;
      4'h2: s = ~7'b1101101;
      4'h3: s = ~7'b1111001;
      4'h4: s = ~7'b0110011;
      4'h5: s = ~7'b1011011;
      4'h6: s = ~7'b1011111;
      4'h7: s = ~7'b1110000;
      4'h8: s = ~7'b1111111;
      4'h9: s = ~7'b1111011;
      4'hA: s = ~7'b1110111;
      4'hB: s = ~7'b0011111;
      4'hC: s = ~7'b1001110;
      4'hD: s = ~7'b0111101;
      4'hE: s = ~7'b1001111;
      4'hF: s = ~7'b1000111;
      default: s = ~7'b1111110;
   endcase

assign seg = {1'b1, s};

endmodule