data/full_repos/permissive/169574047/task_and_func/task_and_func.srcs/sources_1/new/func_shifter.v
'utf-8' codec can't decode byte 0xb6 in position 477: invalid start byte
1: b'%Warning-STMTDLY: data/full_repos/permissive/169574047/task_and_func/task_and_func.srcs/sources_1/new/func_shifter.v:51: Unsupported: Ignoring delay on this delayed statement.\n    #5 $finish;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/169574047/task_and_func/task_and_func.srcs/sources_1/new/func_shifter.v:50: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s CONST \'31\'hff000\' generates 31 bits.\n                                                                                                                     : ... In instance func_shifter\n    addr = 31\'b0000_0000_0000_1111_1111_0000_0000_0000;\n         ^\n%Error: Exiting due to 2 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
function [31:0] shift;
input [31:0] address;
input reg control;
begin

    shift = (control==`LEFT_SHIFT) ? (address<<1) : (address>>1);
end
endfunction
function [31:0] shift;

input [31:0] address;
input reg control;
begin

    shift = (control==`LEFT_SHIFT) ? (address<<1) : (address>>1);
end
endfunction