data/full_repos/permissive/163494071/migong/migong.v
 line:522: before: "["
1: b"%Error: data/full_repos/permissive/163494071/migong/migong.v:522: Duplicate declaration of port: 'key'\nmodule debounce1 (clk,rst,key[0],key[1],key[2],key[3],key_pulse[0],key_pulse[1],key_pulse[2],key_pulse[3]);\n                                 ^~~\n        data/full_repos/permissive/163494071/migong/migong.v:527: ... Location of original declaration\n    input [N-1:0] key;                  \n                  ^~~\n%Error: data/full_repos/permissive/163494071/migong/migong.v:522: Duplicate declaration of port: 'key'\nmodule debounce1 (clk,rst,key[0],key[1],key[2],key[3],key_pulse[0],key_pulse[1],key_pulse[2],key_pulse[3]);\n                                        ^~~\n        data/full_repos/permissive/163494071/migong/migong.v:527: ... Location of original declaration\n    input [N-1:0] key;                  \n                  ^~~\n%Error: data/full_repos/permissive/163494071/migong/migong.v:522: Duplicate declaration of port: 'key'\nmodule debounce1 (clk,rst,key[0],key[1],key[2],key[3],key_pulse[0],key_pulse[1],key_pulse[2],key_pulse[3]);\n                                               ^~~\n        data/full_repos/permissive/163494071/migong/migong.v:527: ... Location of original declaration\n    input [N-1:0] key;                  \n                  ^~~\n%Error: data/full_repos/permissive/163494071/migong/migong.v:522: Duplicate declaration of port: 'key_pulse'\nmodule debounce1 (clk,rst,key[0],key[1],key[2],key[3],key_pulse[0],key_pulse[1],key_pulse[2],key_pulse[3]);\n                                                                   ^~~~~~~~~\n        data/full_repos/permissive/163494071/migong/migong.v:528: ... Location of original declaration\n output [N-1:0] key_pulse;                   \n                ^~~~~~~~~\n%Error: data/full_repos/permissive/163494071/migong/migong.v:522: Duplicate declaration of port: 'key_pulse'\nmodule debounce1 (clk,rst,key[0],key[1],key[2],key[3],key_pulse[0],key_pulse[1],key_pulse[2],key_pulse[3]);\n                                                                                ^~~~~~~~~\n        data/full_repos/permissive/163494071/migong/migong.v:528: ... Location of original declaration\n output [N-1:0] key_pulse;                   \n                ^~~~~~~~~\n%Error: data/full_repos/permissive/163494071/migong/migong.v:522: Duplicate declaration of port: 'key_pulse'\nmodule debounce1 (clk,rst,key[0],key[1],key[2],key[3],key_pulse[0],key_pulse[1],key_pulse[2],key_pulse[3]);\n                                                                                             ^~~~~~~~~\n        data/full_repos/permissive/163494071/migong/migong.v:528: ... Location of original declaration\n output [N-1:0] key_pulse;                   \n                ^~~~~~~~~\n%Error: data/full_repos/permissive/163494071/migong/migong.v:91: Duplicate pin connection: '__pinNumber4'\n debounce1 m5(clk,res,direction[0],direction[1],direction[2],direction[3],direction_lock[0],direction_lock[1],direction_lock[2],direction_lock[3]);\n                                            ^\n        data/full_repos/permissive/163494071/migong/migong.v:91: ... Location of original pin connection\n debounce1 m5(clk,res,direction[0],direction[1],direction[2],direction[3],direction_lock[0],direction_lock[1],direction_lock[2],direction_lock[3]);\n                               ^\n%Error: data/full_repos/permissive/163494071/migong/migong.v:91: Duplicate pin connection: '__pinNumber5'\n debounce1 m5(clk,res,direction[0],direction[1],direction[2],direction[3],direction_lock[0],direction_lock[1],direction_lock[2],direction_lock[3]);\n                                                         ^\n        data/full_repos/permissive/163494071/migong/migong.v:91: ... Location of original pin connection\n debounce1 m5(clk,res,direction[0],direction[1],direction[2],direction[3],direction_lock[0],direction_lock[1],direction_lock[2],direction_lock[3]);\n                               ^\n%Error: data/full_repos/permissive/163494071/migong/migong.v:91: Duplicate pin connection: '__pinNumber6'\n debounce1 m5(clk,res,direction[0],direction[1],direction[2],direction[3],direction_lock[0],direction_lock[1],direction_lock[2],direction_lock[3]);\n                                                                      ^\n        data/full_repos/permissive/163494071/migong/migong.v:91: ... Location of original pin connection\n debounce1 m5(clk,res,direction[0],direction[1],direction[2],direction[3],direction_lock[0],direction_lock[1],direction_lock[2],direction_lock[3]);\n                               ^\n%Error: data/full_repos/permissive/163494071/migong/migong.v:91: Duplicate pin connection: '__pinNumber8'\n debounce1 m5(clk,res,direction[0],direction[1],direction[2],direction[3],direction_lock[0],direction_lock[1],direction_lock[2],direction_lock[3]);\n                                                                                                          ^\n        data/full_repos/permissive/163494071/migong/migong.v:91: ... Location of original pin connection\n debounce1 m5(clk,res,direction[0],direction[1],direction[2],direction[3],direction_lock[0],direction_lock[1],direction_lock[2],direction_lock[3]);\n                                                                                        ^\n%Error: data/full_repos/permissive/163494071/migong/migong.v:91: Duplicate pin connection: '__pinNumber9'\n debounce1 m5(clk,res,direction[0],direction[1],direction[2],direction[3],direction_lock[0],direction_lock[1],direction_lock[2],direction_lock[3]);\n                                                                                                                            ^\n        data/full_repos/permissive/163494071/migong/migong.v:91: ... Location of original pin connection\n debounce1 m5(clk,res,direction[0],direction[1],direction[2],direction[3],direction_lock[0],direction_lock[1],direction_lock[2],direction_lock[3]);\n                                                                                        ^\n%Error: data/full_repos/permissive/163494071/migong/migong.v:91: Duplicate pin connection: '__pinNumber10'\n debounce1 m5(clk,res,direction[0],direction[1],direction[2],direction[3],direction_lock[0],direction_lock[1],direction_lock[2],direction_lock[3]);\n                                                                                                                                              ^\n        data/full_repos/permissive/163494071/migong/migong.v:91: ... Location of original pin connection\n debounce1 m5(clk,res,direction[0],direction[1],direction[2],direction[3],direction_lock[0],direction_lock[1],direction_lock[2],direction_lock[3]);\n                                                                                        ^\n%Error: Exiting due to 12 error(s)\n"
module frequency_divider(start,change_map,clk,ten,one,time1);		
		input start;
		input change_map;
		input clk;
		output reg[3:0] ten;
		output reg[3:0] one;
		output reg[4:0] time1;
		reg[31:0] time_count=32'd0;
		reg time1_temp=1'b0;
		
		always @(start or change_map or a)
		begin
			if(start==1&&a==0) begin
				time1<=5'd30;
			end
			else if(a==1)begin
				time1<=time1-1;
			end

		end

		reg a=1'b0;
		always @(time_count) begin
			if(time_count) begin
				a<=1'b0;
			end
			else if(time_count==0) begin
				a<=1'b1;
			end
		end
		always @(posedge clk)
			begin
			if(time1!=5'd00)
			begin
			if(time_count==50000000)
			begin
				time_count<=32'd0;
			end
			else begin
			time_count<=time_count+1;
			end
			end
			end
		
			integer i;
	
			always @(negedge time1)
			begin
				ten=4'd0;
				one=4'd0;
		
				for(i=4;i>=0;i=i-1)
				begin
					if(ten>4)
						ten=ten+4'd3;
					if(one>4)
						one=one+4'd3;
					ten=ten<<1;
					ten[0]=one[3];
					one=one<<1;
					one[0]=time1[i];
				end
			end
endmodule
module frequency_divider(start,change_map,clk,ten,one,time1);
		
		input start;
		input change_map;
		input clk;
		output reg[3:0] ten;
		output reg[3:0] one;
		output reg[4:0] time1;
		reg[31:0] time_count=32'd0;
		reg time1_temp=1'b0;
		
		always @(start or change_map or a)
		begin
			if(start==1&&a==0) begin
				time1<=5'd30;
			end
			else if(a==1)begin
				time1<=time1-1;
			end

		end

		reg a=1'b0;
		always @(time_count) begin
			if(time_count) begin
				a<=1'b0;
			end
			else if(time_count==0) begin
				a<=1'b1;
			end
		end
		always @(posedge clk)
			begin
			if(time1!=5'd00)
			begin
			if(time_count==50000000)
			begin
				time_count<=32'd0;
			end
			else begin
			time_count<=time_count+1;
			end
			end
			end
		
			integer i;
	
			always @(negedge time1)
			begin
				ten=4'd0;
				one=4'd0;
		
				for(i=4;i>=0;i=i-1)
				begin
					if(ten>4)
						ten=ten+4'd3;
					if(one>4)
						one=one+4'd3;
					ten=ten<<1;
					ten[0]=one[3];
					one=one<<1;
					one[0]=time1[i];
				end
			end
endmodule