data/full_repos/permissive/18770871/sign_ext_12_16.v
data/verilator_xmls/a4e65525-31e6-4b59-8841-acafe22c57ea.xml
module sign_ext_12_16(
  imm_12, imm_16);
  
  input [11:0] imm_12;
  output[15:0] imm_16;
  
  assign imm_16 = {{4{imm_12[11]}}, imm_12};
endmodule
module sign_ext_12_16(
  imm_12, imm_16);

  
  input [11:0] imm_12;
  output[15:0] imm_16;
  
  assign imm_16 = {{4{imm_12[11]}}, imm_12};
endmodule