data/full_repos/permissive/163534413/AsyncLatch.v
data/verilator_xmls/fedb69fb-5a24-438d-9d70-2c3f09f00abc.xml
module AsyncLatch(Set,Reset,Flag);

	input Set, Reset;
	output reg Flag;
	
	initial begin
		Flag = 0;
	end
	
	always @(*) begin
		if (Reset) Flag = 0;
		else if (Set) Flag = 1;
	end

endmodule
module AsyncLatch(Set,Reset,Flag);


	input Set, Reset;
	output reg Flag;
	
	initial begin
		Flag = 0;
	end
	
	always @(*) begin
		if (Reset) Flag = 0;
		else if (Set) Flag = 1;
	end

endmodule