data/full_repos/permissive/143278/ivltests/br1029c.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Error: data/full_repos/permissive/143278/ivltests/br1029c.v:3: Expected integral (non-real) input to SIGNED\n                                                              : ... In instance test\nreg [7:0] ival = $signed(1.0);\n                         ^~~\n%Warning-REALCVT: data/full_repos/permissive/143278/ivltests/br1029c.v:3: Implicit conversion of real to integer\nreg [7:0] ival = $signed(1.0);\n                         ^~~\n                  ... Use "/* verilator lint_off REALCVT */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/143278/ivltests/br1029c.v:3: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS\'s SIGNED generates 32 bits.\n                                                                      : ... In instance test\nreg [7:0] ival = $signed(1.0);\n                 ^~~~~~~\n%Error: Exiting due to 1 error(s), 2 warning(s)\n'
module test();

reg [7:0] ival = $signed(1.0);

endmodule
module test();


reg [7:0] ival = $signed(1.0);

endmodule