data/full_repos/permissive/147265957/src/rom8x4.v
data/verilator_xmls/71450dd7-2df7-423a-a0f8-cde80d40cea3.xml
module rom8x4(
    addr,data
    );
    input [2:0] addr;
    output [3:0] data;

    reg [3:0] memory [7:0];
    initial begin
      memory[0] = 4'b0000;
      memory[1] = 4'b0010;
      memory[2] = 4'b0100;
      memory[3] = 4'b0110;
      memory[4] = 4'b1000;
      memory[5] = 4'b1010;
      memory[6] = 4'b1100;
      memory[7] = 4'b1110;
    end
    assign data = memory[addr];
endmodule
module rom8x4(
    addr,data
    );

    input [2:0] addr;
    output [3:0] data;

    reg [3:0] memory [7:0];
    initial begin
      memory[0] = 4'b0000;
      memory[1] = 4'b0010;
      memory[2] = 4'b0100;
      memory[3] = 4'b0110;
      memory[4] = 4'b1000;
      memory[5] = 4'b1010;
      memory[6] = 4'b1100;
      memory[7] = 4'b1110;
    end
    assign data = memory[addr];
endmodule