data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:47: Unsupported: Ignoring delay on this delayed statement.\n  #201\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:54: Unsupported: Ignoring delay on this delayed statement.\n    #17 in_bit=1; \n    ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:55: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:56: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:57: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:58: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:59: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:60: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:61: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:63: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:64: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:65: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:66: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:67: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:68: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:69: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;     \n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:70: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:71: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:72: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:74: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:75: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:76: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:77: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:78: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=0;      \n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:79: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:80: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:81: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;     \n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:82: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:83: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:84: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:85: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:86: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:87: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:88: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:89: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:90: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:91: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;   \n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:93: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:94: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:95: Unsupported: Ignoring delay on this delayed statement.\n  #20 reset=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:98: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:99: Unsupported: Ignoring delay on this delayed statement.\n  #18 in_bit=0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:100: Unsupported: Ignoring delay on this delayed statement.\n  #1 reset=0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:102: Unsupported: Ignoring delay on this delayed statement.\n      #21 in_bit=1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:103: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:104: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:105: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:106: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:107: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:108: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:111: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:112: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:113: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:114: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:115: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:116: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:117: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;     \n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:118: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:119: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:120: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:122: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:123: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:124: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:125: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:126: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:127: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:128: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=0;       \n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:129: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;     \n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:130: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:131: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:132: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:133: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;    \n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:134: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:135: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=1;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:136: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=0;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:137: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;\n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:138: Unsupported: Ignoring delay on this delayed statement.\n  #20 in_bit=1;\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:139: Unsupported: Ignoring delay on this delayed statement.\n      #20 in_bit=0;  \n      ^\n%Warning-STMTDLY: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:145: Unsupported: Ignoring delay on this delayed statement.\n #1 clk=~clk;\n ^\n%Error: data/full_repos/permissive/175099945/Sequence_detector/tb_fsm.v:30: Cannot find file containing module: \'seqdet\'\n seqdet uut (\n ^~~~~~\n        ... Looked in:\n             data/full_repos/permissive/175099945/Sequence_detector,data/full_repos/permissive/175099945/seqdet\n             data/full_repos/permissive/175099945/Sequence_detector,data/full_repos/permissive/175099945/seqdet.v\n             data/full_repos/permissive/175099945/Sequence_detector,data/full_repos/permissive/175099945/seqdet.sv\n             seqdet\n             seqdet.v\n             seqdet.sv\n             obj_dir/seqdet\n             obj_dir/seqdet.v\n             obj_dir/seqdet.sv\n%Error: Exiting due to 1 error(s), 79 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module tb_fsm;


	reg in_bit;
	reg clk;
	reg reset;
	reg [7:0] seq_in;

	wire out;


	seqdet uut (
					.in_bit(in_bit), 
					.clk(clk),
					.reset(reset),	 
					.seq_in(seq_in), 
					.out(out));




	initial begin

		reset=1;
		in_bit = 0;
		clk = 0;
		seq_in=8'b01001101;

		#201
		reset=0;




		
  		#17 in_bit=1;
		#20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=1;
		#20 in_bit=0;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;
		
		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;
      #20 in_bit=1;
		#20 in_bit=1;
      #20 in_bit=0;     
		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=1;

		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=0;
      #20 in_bit=1;
		#20 in_bit=0;
      #20 in_bit=1;
		#20 in_bit=1;
      #20 in_bit=0;     
		#20 in_bit=0;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;
      #20 in_bit=1;
      #20 in_bit=1;
		#20 in_bit=0;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;

      #20 in_bit=1;
		#20 in_bit=1;
		#20 reset=1;
		
		seq_in=8'b01010010;
      #20 in_bit=0;
		#18 in_bit=0;
		#1 reset=0;
		
      #21 in_bit=1;
		#20 in_bit=0;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=1;
		#20 in_bit=0;
		
		
		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;
      #20 in_bit=1;
		#20 in_bit=1;
      #20 in_bit=0;     
		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=0;

		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=0;
      #20 in_bit=1;
		#20 in_bit=0;
      #20 in_bit=1;
		#20 in_bit=0;
      #20 in_bit=0;     
		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;
      #20 in_bit=1;
      #20 in_bit=1;
		#20 in_bit=0;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;		


	end
	
	always begin 
	#1 clk=~clk;
	end
      
endmodule
module tb_fsm;



	reg in_bit;
	reg clk;
	reg reset;
	reg [7:0] seq_in;

	wire out;


	seqdet uut (
					.in_bit(in_bit), 
					.clk(clk),
					.reset(reset),	 
					.seq_in(seq_in), 
					.out(out));




	initial begin

		reset=1;
		in_bit = 0;
		clk = 0;
		seq_in=8'b01001101;

		#201
		reset=0;




		
  		#17 in_bit=1;
		#20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=1;
		#20 in_bit=0;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;
		
		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;
      #20 in_bit=1;
		#20 in_bit=1;
      #20 in_bit=0;     
		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=1;

		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=0;
      #20 in_bit=1;
		#20 in_bit=0;
      #20 in_bit=1;
		#20 in_bit=1;
      #20 in_bit=0;     
		#20 in_bit=0;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;
      #20 in_bit=1;
      #20 in_bit=1;
		#20 in_bit=0;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;

      #20 in_bit=1;
		#20 in_bit=1;
		#20 reset=1;
		
		seq_in=8'b01010010;
      #20 in_bit=0;
		#18 in_bit=0;
		#1 reset=0;
		
      #21 in_bit=1;
		#20 in_bit=0;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=1;
		#20 in_bit=0;
		
		
		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;
      #20 in_bit=1;
		#20 in_bit=1;
      #20 in_bit=0;     
		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=0;

		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=0;
      #20 in_bit=1;
		#20 in_bit=0;
      #20 in_bit=1;
		#20 in_bit=0;
      #20 in_bit=0;     
		#20 in_bit=1;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;
      #20 in_bit=1;
      #20 in_bit=1;
		#20 in_bit=0;
      #20 in_bit=0;
		#20 in_bit=1;
      #20 in_bit=0;		


	end
	
	always begin 
	#1 clk=~clk;
	end
      
endmodule