data/full_repos/permissive/172602559/FPGA_Lab_1-Latches_Flip-flops_and_Sequential_Circuits/lab1/light.v
 line:1: before: "li"
1: b'%Error: data/full_repos/permissive/172602559/FPGA_Lab_1-Latches_Flip-flops_and_Sequential_Circuits/lab1/light.v:1: syntax error, unexpected IDENTIFIER\nli\n^~\n%Error: Exiting due to 1 error(s)\n'
module light(x1, x2, f);

input x1, x2;
output f;

assign f = (x1 & ~x2) | (~x1 & x2);

endmodule
module light(x1, x2, f);


input x1, x2;
output f;

assign f = (x1 & ~x2) | (~x1 & x2);

endmodule