data/full_repos/permissive/203526788/IceStick/UART/top.v
 line:74: before: "="
1: b'%Error: data/full_repos/permissive/203526788/IceStick/UART/top.v:3: Cannot find include file: async.v\n`include "async.v" \n         ^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/203526788/IceStick/UART,data/full_repos/permissive/203526788/async.v\n             data/full_repos/permissive/203526788/IceStick/UART,data/full_repos/permissive/203526788/async.v.v\n             data/full_repos/permissive/203526788/IceStick/UART,data/full_repos/permissive/203526788/async.v.sv\n             async.v\n             async.v.v\n             async.v.sv\n             obj_dir/async.v\n             obj_dir/async.v.v\n             obj_dir/async.v.sv\n%Error: Exiting due to 1 error(s)\n'
module top(input wire CLK_IN, 
		   input wire [4:0] J3,
		   input wire ENABLE,
		   input wire RX,
		   output wire [4:0] LED,
		   output wire TX);	

	parameter ClkFrequency = 12000000;
	parameter Baud = 256000;


	reg [8:0] rxdata;
	reg RxD_data_ready;


	reg enableOnce=0;
	reg curr=0;

	always @(posedge CLK_IN)
	begin
		curr <= ENABLE;
		enableOnce <= ENABLE & !curr;
	end








	async_receiver #(ClkFrequency, Baud) RXD (.clk(CLK_IN), .RxD(RX), .RxD_data_ready(RxD_data_ready), .RxD_data(rxdata));

	async_transmitter #(ClkFrequency, Baud) TXD(.clk(CLK_IN), .TxD(TX), .TxD_start(RxD_data_ready), .TxD_data(rxdata));

	always @(posedge RxD_data_ready)  
	begin
		LED <= rxdata[4:0] - 8'd48;
	end


endmodule
module top(input wire CLK_IN, 
		   input wire [4:0] J3,
		   input wire ENABLE,
		   input wire RX,
		   output wire [4:0] LED,
		   output wire TX);
	

	parameter ClkFrequency = 12000000;
	parameter Baud = 256000;


	reg [8:0] rxdata;
	reg RxD_data_ready;


	reg enableOnce=0;
	reg curr=0;

	always @(posedge CLK_IN)
	begin
		curr <= ENABLE;
		enableOnce <= ENABLE & !curr;
	end








	async_receiver #(ClkFrequency, Baud) RXD (.clk(CLK_IN), .RxD(RX), .RxD_data_ready(RxD_data_ready), .RxD_data(rxdata));

	async_transmitter #(ClkFrequency, Baud) TXD(.clk(CLK_IN), .TxD(TX), .TxD_start(RxD_data_ready), .TxD_data(rxdata));

	always @(posedge RxD_data_ready)  
	begin
		LED <= rxdata[4:0] - 8'd48;
	end


endmodule