data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/CLA_adder_8bit.v
1: b'%Warning-WIDTH: data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/CLA_adder_8bit.v:41: Operator ASSIGNW expects 9 bits on the Assign RHS, but Assign RHS\'s VARREF \'A\' generates 8 bits.\n                                                                                                                                : ... In instance CLA_adder_8bit\nassign in_A = A;\n            ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/CLA_adder_8bit.v:42: Operator ASSIGNW expects 9 bits on the Assign RHS, but Assign RHS\'s VARREF \'B\' generates 8 bits.\n                                                                                                                                : ... In instance CLA_adder_8bit\nassign in_B = B;\n            ^\n%Error: data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/CLA_adder_8bit.v:45: Cannot find file containing module: \'CLA_adder_4bit\'\nCLA_adder_4bit ADD0 (\n^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new,data/full_repos/permissive/124604849/CLA_adder_4bit\n             data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new,data/full_repos/permissive/124604849/CLA_adder_4bit.v\n             data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new,data/full_repos/permissive/124604849/CLA_adder_4bit.sv\n             CLA_adder_4bit\n             CLA_adder_4bit.v\n             CLA_adder_4bit.sv\n             obj_dir/CLA_adder_4bit\n             obj_dir/CLA_adder_4bit.v\n             obj_dir/CLA_adder_4bit.sv\n%Error: data/full_repos/permissive/124604849/parallel_unsigned_integer_multiplier.srcs/sources_1/new/CLA_adder_8bit.v:53: Cannot find file containing module: \'CLA_adder_4bit\'\nCLA_adder_4bit ADD1 (\n^~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s), 2 warning(s)\n'
module CLA_adder_8bit(
input [7:0] A,
input [7:0] B,
input c_in,
output reg [7:0] SUM,
output reg c_out
);

wire c_out_from_ADD0;
wire c_out_from_ADD1;
wire [7:0] FINAL_SUM;
wire [3:0] sum1;
wire [3:0] sum2;
wire c_in_from_outside;
wire [8:0] in_A;
wire [8:0] in_B;

assign c_in_from_outside = c_in;
assign in_A = A;
assign in_B = B;


CLA_adder_4bit ADD0 (
.A(in_A[3:0]),
.B(in_B[3:0]),
.c_in(c_in_from_outside),
.c_out(c_out_from_ADD0),
.SUM(sum1)
);

CLA_adder_4bit ADD1 (
.A(in_A[7:4]),
.B(in_B[7:4]),
.c_in(c_out_from_ADD0),
.c_out(c_out_from_ADD1),
.SUM(sum2)
);



always @ (*)
begin
    SUM <= {sum2,sum1};
    c_out <= c_out_from_ADD1;
end


endmodule
module CLA_adder_8bit(
input [7:0] A,
input [7:0] B,
input c_in,
output reg [7:0] SUM,
output reg c_out
);


wire c_out_from_ADD0;
wire c_out_from_ADD1;
wire [7:0] FINAL_SUM;
wire [3:0] sum1;
wire [3:0] sum2;
wire c_in_from_outside;
wire [8:0] in_A;
wire [8:0] in_B;

assign c_in_from_outside = c_in;
assign in_A = A;
assign in_B = B;


CLA_adder_4bit ADD0 (
.A(in_A[3:0]),
.B(in_B[3:0]),
.c_in(c_in_from_outside),
.c_out(c_out_from_ADD0),
.SUM(sum1)
);

CLA_adder_4bit ADD1 (
.A(in_A[7:4]),
.B(in_B[7:4]),
.c_in(c_out_from_ADD0),
.c_out(c_out_from_ADD1),
.SUM(sum2)
);



always @ (*)
begin
    SUM <= {sum2,sum1};
    c_out <= c_out_from_ADD1;
end


endmodule