data/full_repos/permissive/141753280/Vivado/RTL/top.v
1: b"%Error: data/full_repos/permissive/141753280/Vivado/RTL/top.v:57: Cannot find file containing module: 'segment_controller'\nsegment_controller segment_controller_isnt(\n^~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/141753280/Vivado/RTL,data/full_repos/permissive/141753280/segment_controller\n             data/full_repos/permissive/141753280/Vivado/RTL,data/full_repos/permissive/141753280/segment_controller.v\n             data/full_repos/permissive/141753280/Vivado/RTL,data/full_repos/permissive/141753280/segment_controller.sv\n             segment_controller\n             segment_controller.v\n             segment_controller.sv\n             obj_dir/segment_controller\n             obj_dir/segment_controller.v\n             obj_dir/segment_controller.sv\n%Error: Exiting due to 1 error(s)\n"
module top(
    clock,
    reset,
    sw,
    led,
    seg,
    en_seg_n
);




localparam  [7:0]   baudrate = 87;




input               clock;
input               reset;
input       [15:0]  sw;
output      [15:0]  led;
output      [ 6:0]  seg;
output      [ 3:0]  en_seg_n;




reg         [15:0]  debug;

assign led = 16'b0;

segment_controller segment_controller_isnt(
    .clock              (clock),
    .reset              (reset),
    .displayed_number   (sw),
    .en_seg_n           (en_seg_n),
    .LED_out            (seg)
);
endmodule
module top(
    clock,
    reset,
    sw,
    led,
    seg,
    en_seg_n
);





localparam  [7:0]   baudrate = 87;




input               clock;
input               reset;
input       [15:0]  sw;
output      [15:0]  led;
output      [ 6:0]  seg;
output      [ 3:0]  en_seg_n;




reg         [15:0]  debug;

assign led = 16'b0;

segment_controller segment_controller_isnt(
    .clock              (clock),
    .reset              (reset),
    .displayed_number   (sw),
    .en_seg_n           (en_seg_n),
    .LED_out            (seg)
);
endmodule