data/full_repos/permissive/151904248/Triple Buffer/sram_controller.v
1: b'%Error: Cannot find file containing module: Buffer,data/full_repos/permissive/151904248\n        ... Looked in:\n             data/full_repos/permissive/151904248/Triple/Buffer,data/full_repos/permissive/151904248\n             data/full_repos/permissive/151904248/Triple/Buffer,data/full_repos/permissive/151904248.v\n             data/full_repos/permissive/151904248/Triple/Buffer,data/full_repos/permissive/151904248.sv\n             Buffer,data/full_repos/permissive/151904248\n             Buffer,data/full_repos/permissive/151904248.v\n             Buffer,data/full_repos/permissive/151904248.sv\n             obj_dir/Buffer,data/full_repos/permissive/151904248\n             obj_dir/Buffer,data/full_repos/permissive/151904248.v\n             obj_dir/Buffer,data/full_repos/permissive/151904248.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/151904248/Triple\n%Error: Cannot find file containing module: Buffer/sram_controller.v\n%Error: Exiting due to 3 error(s)\n'
module up_conv 
#(
parameter addr_bus_size = 16,
parameter data_bus_size = 16
)
(
input [(data_bus_size - 1):0] in,
output [19:0] out
);

assign out[(data_bus_size - 1):0] = in;
assign out[19:16] = 4'b0;

endmodule
module up_conv 
#(
parameter addr_bus_size = 16,
parameter data_bus_size = 16
)
(
input [(data_bus_size - 1):0] in,
output [19:0] out
);


assign out[(data_bus_size - 1):0] = in;
assign out[19:16] = 4'b0;

endmodule