data/full_repos/permissive/206437232/TP4-MIPS-2019/Test/tb_hazard_detection_unit.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Warning-STMTDLY: data/full_repos/permissive/206437232/TP4-MIPS-2019/Test/tb_hazard_detection_unit.v:36: Unsupported: Ignoring delay on this delayed statement.\n        #1  i_MemRead   = 0;\n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/206437232/TP4-MIPS-2019/Test/tb_hazard_detection_unit.v:41: Unsupported: Ignoring delay on this delayed statement.\n        #10 i_MemRead   = 1;            \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/206437232/TP4-MIPS-2019/Test/tb_hazard_detection_unit.v:45: Unsupported: Ignoring delay on this delayed statement.\n        #10 i_rs_id     = 6\'b010101;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/206437232/TP4-MIPS-2019/Test/tb_hazard_detection_unit.v:47: Unsupported: Ignoring delay on this delayed statement.\n        #10 i_rt_id     = 6\'b000111;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/206437232/TP4-MIPS-2019/Test/tb_hazard_detection_unit.v:50: Unsupported: Ignoring delay on this delayed statement.\n        #10 i_MemRead   = 1\'b0;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/206437232/TP4-MIPS-2019/Test/tb_hazard_detection_unit.v:53: Unsupported: Ignoring delay on this delayed statement.\n        #10 i_MemRead   = 1\'b1; \n        ^\n%Warning-STMTDLY: data/full_repos/permissive/206437232/TP4-MIPS-2019/Test/tb_hazard_detection_unit.v:56: Unsupported: Ignoring delay on this delayed statement.\n        #10 $finish;    \n        ^\n%Warning-WIDTH: data/full_repos/permissive/206437232/TP4-MIPS-2019/Test/tb_hazard_detection_unit.v:42: Operator ASSIGN expects 5 bits on the Assign RHS, but Assign RHS\'s CONST \'6\'h4\' generates 6 bits.\n                                                                                                     : ... In instance tb_hazard_detection_unit\n            i_rs_id     = 6\'b000100;    \n                        ^\n%Warning-WIDTH: data/full_repos/permissive/206437232/TP4-MIPS-2019/Test/tb_hazard_detection_unit.v:43: Operator ASSIGN expects 5 bits on the Assign RHS, but Assign RHS\'s CONST \'6\'h4\' generates 6 bits.\n                                                                                                     : ... In instance tb_hazard_detection_unit\n            i_rt_ex     = 6\'b000100;\n                        ^\n%Warning-WIDTH: data/full_repos/permissive/206437232/TP4-MIPS-2019/Test/tb_hazard_detection_unit.v:45: Operator ASSIGN expects 5 bits on the Assign RHS, but Assign RHS\'s CONST \'6\'h15\' generates 6 bits.\n                                                                                                     : ... In instance tb_hazard_detection_unit\n        #10 i_rs_id     = 6\'b010101;\n                        ^\n%Warning-WIDTH: data/full_repos/permissive/206437232/TP4-MIPS-2019/Test/tb_hazard_detection_unit.v:47: Operator ASSIGN expects 5 bits on the Assign RHS, but Assign RHS\'s CONST \'6\'h7\' generates 6 bits.\n                                                                                                     : ... In instance tb_hazard_detection_unit\n        #10 i_rt_id     = 6\'b000111;\n                        ^\n%Warning-WIDTH: data/full_repos/permissive/206437232/TP4-MIPS-2019/Test/tb_hazard_detection_unit.v:48: Operator ASSIGN expects 5 bits on the Assign RHS, but Assign RHS\'s CONST \'6\'h7\' generates 6 bits.\n                                                                                                     : ... In instance tb_hazard_detection_unit\n            i_rt_ex     = 6\'b000111;\n                        ^\n%Warning-WIDTH: data/full_repos/permissive/206437232/TP4-MIPS-2019/Test/tb_hazard_detection_unit.v:54: Operator ASSIGN expects 5 bits on the Assign RHS, but Assign RHS\'s CONST \'6\'ha\' generates 6 bits.\n                                                                                                     : ... In instance tb_hazard_detection_unit\n            i_rt_id     = 6\'b001010;\n                        ^\n%Error: data/full_repos/permissive/206437232/TP4-MIPS-2019/Test/tb_hazard_detection_unit.v:59: Cannot find file containing module: \'hazard_detection_unit\'\n    hazard_detection_unit #(\n    ^~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/206437232/TP4-MIPS-2019/Test,data/full_repos/permissive/206437232/hazard_detection_unit\n             data/full_repos/permissive/206437232/TP4-MIPS-2019/Test,data/full_repos/permissive/206437232/hazard_detection_unit.v\n             data/full_repos/permissive/206437232/TP4-MIPS-2019/Test,data/full_repos/permissive/206437232/hazard_detection_unit.sv\n             hazard_detection_unit\n             hazard_detection_unit.v\n             hazard_detection_unit.sv\n             obj_dir/hazard_detection_unit\n             obj_dir/hazard_detection_unit.v\n             obj_dir/hazard_detection_unit.sv\n%Error: Exiting due to 1 error(s), 13 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module tb_hazard_detection_unit();
    localparam  NB_ADDR = 5;

    reg                 i_MemRead;
    reg [NB_ADDR-1:0]   i_rs_id;
    reg [NB_ADDR-1:0]   i_rt_id;
    reg [NB_ADDR-1:0]   i_rt_ex;

    wire                o_stall_flag;

    initial 
    begin
        #1  i_MemRead   = 0;
            i_rs_id     = 0;
            i_rt_id     = 0;
            i_rt_ex     = 0;

        #10 i_MemRead   = 1;            
            i_rs_id     = 6'b000100;    
            i_rt_ex     = 6'b000100;

        #10 i_rs_id     = 6'b010101;

        #10 i_rt_id     = 6'b000111;
            i_rt_ex     = 6'b000111;
        
        #10 i_MemRead   = 1'b0;
        
        
        #10 i_MemRead   = 1'b1; 
            i_rt_id     = 6'b001010;

        #10 $finish;    
    end 
    
    hazard_detection_unit #(
        .NB_ADDR    (NB_ADDR    )
    )
    u_hazard_detection_unit
    (
        .i_MemRead      (i_MemRead      ),
        .i_rs_id        (i_rs_id        ),
        .i_rt_id        (i_rt_id        ),
        .i_rt_ex        (i_rt_ex        ),
        .o_stall_flag   (o_stall_flag   )
    );


endmodule
module tb_hazard_detection_unit();

    localparam  NB_ADDR = 5;

    reg                 i_MemRead;
    reg [NB_ADDR-1:0]   i_rs_id;
    reg [NB_ADDR-1:0]   i_rt_id;
    reg [NB_ADDR-1:0]   i_rt_ex;

    wire                o_stall_flag;

    initial 
    begin
        #1  i_MemRead   = 0;
            i_rs_id     = 0;
            i_rt_id     = 0;
            i_rt_ex     = 0;

        #10 i_MemRead   = 1;            
            i_rs_id     = 6'b000100;    
            i_rt_ex     = 6'b000100;

        #10 i_rs_id     = 6'b010101;

        #10 i_rt_id     = 6'b000111;
            i_rt_ex     = 6'b000111;
        
        #10 i_MemRead   = 1'b0;
        
        
        #10 i_MemRead   = 1'b1; 
            i_rt_id     = 6'b001010;

        #10 $finish;    
    end 
    
    hazard_detection_unit #(
        .NB_ADDR    (NB_ADDR    )
    )
    u_hazard_detection_unit
    (
        .i_MemRead      (i_MemRead      ),
        .i_rs_id        (i_rs_id        ),
        .i_rt_id        (i_rt_id        ),
        .i_rt_ex        (i_rt_ex        ),
        .o_stall_flag   (o_stall_flag   )
    );


endmodule