data/full_repos/permissive/214823094/lab_3/project_2/project_2.srcs/sources_1/new/ripple_carry_adder_4.v
1: b"%Error: data/full_repos/permissive/214823094/lab_3/project_2/project_2.srcs/sources_1/new/ripple_carry_adder_4.v:36: Cannot find file containing module: 'full_adder_1'\n    full_adder_1 bit0(a[0+:1],b[0+:1],c[0+:1],s[0+:1],c[1+:1]);\n    ^~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/214823094/lab_3/project_2/project_2.srcs/sources_1/new,data/full_repos/permissive/214823094/full_adder_1\n             data/full_repos/permissive/214823094/lab_3/project_2/project_2.srcs/sources_1/new,data/full_repos/permissive/214823094/full_adder_1.v\n             data/full_repos/permissive/214823094/lab_3/project_2/project_2.srcs/sources_1/new,data/full_repos/permissive/214823094/full_adder_1.sv\n             full_adder_1\n             full_adder_1.v\n             full_adder_1.sv\n             obj_dir/full_adder_1\n             obj_dir/full_adder_1.v\n             obj_dir/full_adder_1.sv\n%Error: data/full_repos/permissive/214823094/lab_3/project_2/project_2.srcs/sources_1/new/ripple_carry_adder_4.v:37: Cannot find file containing module: 'full_adder_1'\n    full_adder_1 bit1(a[1+:1],b[1+:1],c[1+:1],s[1+:1],c[2+:1]);\n    ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/214823094/lab_3/project_2/project_2.srcs/sources_1/new/ripple_carry_adder_4.v:38: Cannot find file containing module: 'full_adder_1'\n    full_adder_1 bit2(a[2+:1],b[2+:1],c[2+:1],s[2+:1],c[3+:1]);\n    ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/214823094/lab_3/project_2/project_2.srcs/sources_1/new/ripple_carry_adder_4.v:39: Cannot find file containing module: 'full_adder_1'\n    full_adder_1 bit3(a[3+:1],b[3+:1],c[3+:1],s[3+:1],c[4+:1]);\n    ^~~~~~~~~~~~\n%Error: Exiting due to 4 error(s)\n"
module ripple_carry_adder_4(
    input [3:0] a,
    input [3:0] b,
    input cin,
    output [3:0] s,
    output cout
    );
    
    wire [4:0] c;



    assign c[0]=cin;
    full_adder_1 bit0(a[0+:1],b[0+:1],c[0+:1],s[0+:1],c[1+:1]);
    full_adder_1 bit1(a[1+:1],b[1+:1],c[1+:1],s[1+:1],c[2+:1]);
    full_adder_1 bit2(a[2+:1],b[2+:1],c[2+:1],s[2+:1],c[3+:1]);
    full_adder_1 bit3(a[3+:1],b[3+:1],c[3+:1],s[3+:1],c[4+:1]);

    
    assign cout=c[4];
endmodule
module ripple_carry_adder_4(
    input [3:0] a,
    input [3:0] b,
    input cin,
    output [3:0] s,
    output cout
    );

    
    wire [4:0] c;



    assign c[0]=cin;
    full_adder_1 bit0(a[0+:1],b[0+:1],c[0+:1],s[0+:1],c[1+:1]);
    full_adder_1 bit1(a[1+:1],b[1+:1],c[1+:1],s[1+:1],c[2+:1]);
    full_adder_1 bit2(a[2+:1],b[2+:1],c[2+:1],s[2+:1],c[3+:1]);
    full_adder_1 bit3(a[3+:1],b[3+:1],c[3+:1],s[3+:1],c[4+:1]);

    
    assign cout=c[4];
endmodule