data/full_repos/permissive/174155074/combinational-logic/decoders-and-encoders/encoder-8-3/encoder-8-3-tb.v
1: b'%Error: data/full_repos/permissive/174155074/combinational-logic/decoders-and-encoders/encoder-8-3/encoder-8-3-tb.v:20: Unsupported or unknown PLI call: $dumpfile\n    $dumpfile("encoder-8-3-tb.vcd");\n    ^~~~~~~~~\n%Error: data/full_repos/permissive/174155074/combinational-logic/decoders-and-encoders/encoder-8-3/encoder-8-3-tb.v:21: Unsupported or unknown PLI call: $dumpvars\n    $dumpvars(0, encoder_8_3_tb);\n    ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/174155074/combinational-logic/decoders-and-encoders/encoder-8-3/encoder-8-3-tb.v:32: Unsupported: Ignoring delay on this delayed statement.\n        #10;\n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/174155074/combinational-logic/decoders-and-encoders/encoder-8-3/encoder-8-3-tb.v:37: Unsupported: Ignoring delay on this delayed statement.\n    #10;\n    ^\n%Error: Exiting due to 2 error(s), 2 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module encoder_8_3_tb;


reg  [7:0] IN;
wire [2:0] OUT;
integer i;


encoder_8_3 uut(
    .in(IN), 
    .out(OUT)
);


initial begin
    $dumpfile("encoder-8-3-tb.vcd");
    $dumpvars(0, encoder_8_3_tb);
end


initial begin
    $display("test start");
    IN = 8'b00000000;

    for (i = 0; i < 8; i = i + 1) begin
        IN = 8'b00000000;
        IN[i] = 1'b1;
        #10;
    end
    

    IN = 8'b00101000;
    #10;

    $display("test complete");
    $finish;
end

endmodule
module encoder_8_3_tb;



reg  [7:0] IN;
wire [2:0] OUT;
integer i;


encoder_8_3 uut(
    .in(IN), 
    .out(OUT)
);


initial begin
    $dumpfile("encoder-8-3-tb.vcd");
    $dumpvars(0, encoder_8_3_tb);
end


initial begin
    $display("test start");
    IN = 8'b00000000;

    for (i = 0; i < 8; i = i + 1) begin
        IN = 8'b00000000;
        IN[i] = 1'b1;
        #10;
    end
    

    IN = 8'b00101000;
    #10;

    $display("test complete");
    $finish;
end

endmodule