data/full_repos/permissive/129127690/zero_ext_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/129127690/zero_ext_tb.v:20: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/129127690/zero_ext_tb.v:22: Unsupported: Ignoring delay on this delayed statement.\n  #10;\n  ^\n%Error: data/full_repos/permissive/129127690/zero_ext_tb.v:12: Cannot find file containing module: \'zero_ext\'\n zero_ext #(.bus_size(bus_size), .bus_size_in(bus_size_in)) uut (\n ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/129127690,data/full_repos/permissive/129127690/zero_ext\n             data/full_repos/permissive/129127690,data/full_repos/permissive/129127690/zero_ext.v\n             data/full_repos/permissive/129127690,data/full_repos/permissive/129127690/zero_ext.sv\n             zero_ext\n             zero_ext.v\n             zero_ext.sv\n             obj_dir/zero_ext\n             obj_dir/zero_ext.v\n             obj_dir/zero_ext.sv\n%Error: Exiting due to 1 error(s), 2 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module zero_ext_tb #(parameter bus_size = 8, bus_size_in = 4);


	reg [bus_size_in-1:0] datoin;


	wire [bus_size-1:0] datoout;


	zero_ext #(.bus_size(bus_size), .bus_size_in(bus_size_in)) uut (
		.in(datoin), 
		.out(datoout)
	);

	initial begin

		datoin = 4'b0101;
		#10
		datoin = 4'b0001;
		#10;
	end
      
endmodule
module zero_ext_tb #(parameter bus_size = 8, bus_size_in = 4);



	reg [bus_size_in-1:0] datoin;


	wire [bus_size-1:0] datoout;


	zero_ext #(.bus_size(bus_size), .bus_size_in(bus_size_in)) uut (
		.in(datoin), 
		.out(datoout)
	);

	initial begin

		datoin = 4'b0101;
		#10
		datoin = 4'b0001;
		#10;
	end
      
endmodule