data/full_repos/permissive/123796236/mem32.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/123796236/mem32.v:56: Unsupported: Ignoring delay on this delayed statement.\n #100 clk <= ~clk;\n ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module mem32(mem_OutputData,
mem_Address,
mem_WriteData,
mem_WriteCtrl,
mem_ReadCtrl, 
clk,
file_ID);

output reg [31:0] mem_OutputData;

input [31:0] mem_Address, mem_WriteData;
input mem_WriteCtrl, mem_ReadCtrl, clk, file_ID;
reg [31:0] mem_DataArray [255:0];

always@(file_ID) begin
if(file_ID == 0)
	$readmemb("C:\\Users\\Ibrahim\\Desktop\\pipeline\\inst_file_forward.txt", mem_DataArray);
else
	$readmemb("C:\\Users\\Ibrahim\\Desktop\\pipeline\\data_file.txt", mem_DataArray);
end


always@(mem_Address or mem_DataArray[mem_Address])
	begin
		if(mem_ReadCtrl == 1'b1)
			mem_OutputData = mem_DataArray[mem_Address];
	end


always@(posedge clk)
	begin
		if(mem_WriteCtrl == 1'b1)
			mem_DataArray[mem_Address] <= mem_WriteData;
	end

endmodule
module mem32(mem_OutputData,
mem_Address,
mem_WriteData,
mem_WriteCtrl,
mem_ReadCtrl, 
clk,
file_ID);


output reg [31:0] mem_OutputData;

input [31:0] mem_Address, mem_WriteData;
input mem_WriteCtrl, mem_ReadCtrl, clk, file_ID;
reg [31:0] mem_DataArray [255:0];

always@(file_ID) begin
if(file_ID == 0)
	$readmemb("C:\\Users\\Ibrahim\\Desktop\\pipeline\\inst_file_forward.txt", mem_DataArray);
else
	$readmemb("C:\\Users\\Ibrahim\\Desktop\\pipeline\\data_file.txt", mem_DataArray);
end


always@(mem_Address or mem_DataArray[mem_Address])
	begin
		if(mem_ReadCtrl == 1'b1)
			mem_OutputData = mem_DataArray[mem_Address];
	end


always@(posedge clk)
	begin
		if(mem_WriteCtrl == 1'b1)
			mem_DataArray[mem_Address] <= mem_WriteData;
	end

endmodule