data/full_repos/permissive/110151336/lab_05/src/12_carry_lookahead_adder/common/carry_lookahead_generator.v
data/verilator_xmls/aae497d9-7d18-4cf3-b209-6d7f81c5190e.xml
module carry_lookahead_generator
# (
    parameter WIDTH = 8
)
(
    input                  carry_in,
    input  [WIDTH - 1 : 0] generate_in, propagate_in,
    output [WIDTH     : 0] carry
);
   
    assign carry[0] = carry_in;
    
    generate
        
        genvar i;
        
        for (i = 0; i <= WIDTH - 1; i = i + 1)
        begin : stage
            assign carry[i + 1] = generate_in[i] | propagate_in[i] & carry[i];
        end
    endgenerate

endmodule
module carry_lookahead_generator
# (
    parameter WIDTH = 8
)
(
    input                  carry_in,
    input  [WIDTH - 1 : 0] generate_in, propagate_in,
    output [WIDTH     : 0] carry
);

   
    assign carry[0] = carry_in;
    
    generate
        
        genvar i;
        
        for (i = 0; i <= WIDTH - 1; i = i + 1)
        begin : stage
            assign carry[i + 1] = generate_in[i] | propagate_in[i] & carry[i];
        end
    endgenerate

endmodule