data/full_repos/permissive/100975158/ProcessadorQuartus/controleALU.v
data/verilator_xmls/68286964-6908-4226-9ea0-e76d1576633a.xml
module controleALU(	input[5:0] funct, input[1:0] opALU, output[2:0] sinalOperacao);





	reg [2:0] microSinal;
	always @ ( * ) begin
		if (funct == 6'b100100 && opALU == 2'b10)
			microSinal <= 3'b000;
		else if (funct == 6'b100101 && opALU == 2'b10)
			microSinal <=3'b001;
		else if ((opALU == 2'b00) || (funct == 6'b100000 && opALU == 2'b10))
			microSinal <=3'b010;
		else if (funct == 6'b000010 && opALU == 2'b10)
			microSinal <=3'b011;
		else if (funct == 6'b011010 && opALU == 2'b10)
			microSinal <=3'b100;
		else if ((opALU == 2'b01) || (funct == 6'b100010 && opALU == 2'b10))
			microSinal <=3'b110;
		else if (funct == 6'b101010 && opALU == 2'b10)
			microSinal <=3'b111;
	end

	assign sinalOperacao = microSinal;
endmodule
module controleALU(	input[5:0] funct, input[1:0] opALU, output[2:0] sinalOperacao);






	reg [2:0] microSinal;
	always @ ( * ) begin
		if (funct == 6'b100100 && opALU == 2'b10)
			microSinal <= 3'b000;
		else if (funct == 6'b100101 && opALU == 2'b10)
			microSinal <=3'b001;
		else if ((opALU == 2'b00) || (funct == 6'b100000 && opALU == 2'b10))
			microSinal <=3'b010;
		else if (funct == 6'b000010 && opALU == 2'b10)
			microSinal <=3'b011;
		else if (funct == 6'b011010 && opALU == 2'b10)
			microSinal <=3'b100;
		else if ((opALU == 2'b01) || (funct == 6'b100010 && opALU == 2'b10))
			microSinal <=3'b110;
		else if (funct == 6'b101010 && opALU == 2'b10)
			microSinal <=3'b111;
	end

	assign sinalOperacao = microSinal;
endmodule