data/full_repos/permissive/142505464/modules/wb_bfm_mod/rtl/verilog/wb_bfm_mod_transactor.v
None: at end of input
1: b'%Error: data/full_repos/permissive/142505464/modules/wb_bfm_mod/rtl/verilog/wb_bfm_mod_transactor.v:61: Cannot find include file: wb_common_params.v\n  `include "wb_common_params.v" \n           ^~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/142505464/modules/wb_bfm_mod/rtl/verilog,data/full_repos/permissive/142505464/wb_common_params.v\n             data/full_repos/permissive/142505464/modules/wb_bfm_mod/rtl/verilog,data/full_repos/permissive/142505464/wb_common_params.v.v\n             data/full_repos/permissive/142505464/modules/wb_bfm_mod/rtl/verilog,data/full_repos/permissive/142505464/wb_common_params.v.sv\n             wb_common_params.v\n             wb_common_params.v.v\n             wb_common_params.v.sv\n             obj_dir/wb_common_params.v\n             obj_dir/wb_common_params.v.v\n             obj_dir/wb_common_params.v.sv\n%Error: data/full_repos/permissive/142505464/modules/wb_bfm_mod/rtl/verilog/wb_bfm_mod_transactor.v:122: Unsupported: Seeding $random doesn\'t map to C++, use $c("srand")\n          gen_adr = (low + ({$random(SEED)} % (high-low))) &  {{aw-ADR_LSB{1\'b1}},{ADR_LSB{1\'b0}}};\n                             ^~~~~~~\n%Error: Internal Error: data/full_repos/permissive/142505464/modules/wb_bfm_mod/rtl/verilog/wb_bfm_mod_transactor.v:122: ../V3Ast.cpp:358: Null item passed to setOp1p\n          gen_adr = (low + ({$random(SEED)} % (high-low))) &  {{aw-ADR_LSB{1\'b1}},{ADR_LSB{1\'b0}}};\n                            ^\n'
function [aw+3+2+32-1:0] gen_cycle_params;
      input [aw-1:0] adr_min_i;
      input [aw-1:0] adr_max_i;

      reg [aw-1:0]   adr_low;
      reg [aw-1:0]   adr_high;

      reg [aw-1:0]   address;
      reg [2:0]      cycle_type;
      reg [1:0]      burst_type;
      reg [31:0]     burst_length;

      begin
         adr_low  = 0;
         adr_high = 0;

         while((adr_high > adr_max_i) || (adr_low < adr_min_i) || (adr_high == adr_low)) begin
            address                = gen_adr(adr_min_i, adr_max_i);
            cycle_type             = gen_cycle_type({$random(SEED)} % 100);

	    burst_type = (cycle_type === CTI_INC_BURST) ? ({$random(SEED)} % 4) : 0;

	    burst_length = (cycle_type === CTI_CLASSIC) ? 1 :
			   ({$random(SEED)} % MAX_BURST_LEN) + 1;

              {adr_high, adr_low} = adr_range(address, burst_length, cycle_type, burst_type);
         end
	 gen_cycle_params = {address, cycle_type, burst_type, burst_length};
      end
   endfunction
function [aw+3+2+32-1:0] gen_cycle_params;

      input [aw-1:0] adr_min_i;
      input [aw-1:0] adr_max_i;

      reg [aw-1:0]   adr_low;
      reg [aw-1:0]   adr_high;

      reg [aw-1:0]   address;
      reg [2:0]      cycle_type;
      reg [1:0]      burst_type;
      reg [31:0]     burst_length;

      begin
         adr_low  = 0;
         adr_high = 0;

         while((adr_high > adr_max_i) || (adr_low < adr_min_i) || (adr_high == adr_low)) begin
            address                = gen_adr(adr_min_i, adr_max_i);
            cycle_type             = gen_cycle_type({$random(SEED)} % 100);

	    burst_type = (cycle_type === CTI_INC_BURST) ? ({$random(SEED)} % 4) : 0;

	    burst_length = (cycle_type === CTI_CLASSIC) ? 1 :
			   ({$random(SEED)} % MAX_BURST_LEN) + 1;

              {adr_high, adr_low} = adr_range(address, burst_length, cycle_type, burst_type);
         end
	 gen_cycle_params = {address, cycle_type, burst_type, burst_length};
      end
   endfunction