data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv
None: at end of input
1: b'%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:16: Cannot find include file: test_exec.svh\n  `include "test_exec.svh" \n           ^~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window,data/full_repos/permissive/214858095/test_exec.svh\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window,data/full_repos/permissive/214858095/test_exec.svh.v\n             data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window,data/full_repos/permissive/214858095/test_exec.svh.sv\n             test_exec.svh\n             test_exec.svh.v\n             test_exec.svh.sv\n             obj_dir/test_exec.svh\n             obj_dir/test_exec.svh.v\n             obj_dir/test_exec.svh.sv\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:23: Cannot find include file: rfnoc_block_window_regs.vh\n  `include "rfnoc_block_window_regs.vh" \n           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:18: syntax error, unexpected IDENTIFIER, expecting PACKAGE-IDENTIFIER or STRING\n  import PkgTestExec::*;\n         ^~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:73: syntax error, unexpected \'=\', expecting \',\' or \';\'\n  RfnocBlockCtrlBfm #(CHDR_W, ITEM_W) blk_ctrl = new(backend, m_ctrl, s_ctrl);\n                                               ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:76: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n  typedef ChdrData #(CHDR_W, ITEM_W)::chdr_word_t  chdr_word_t;\n                   ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:77: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n  typedef ChdrData #(CHDR_W, ITEM_W)::item_t       item_t;\n                   ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:78: syntax error, unexpected \'#\', expecting \'.\' or \';\'\n  typedef ChdrData #(CHDR_W, ITEM_W)::item_queue_t item_queue_t;\n                   ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:192: syntax error, unexpected TIME NUMBER, expecting \')\'\n    test.start_test($sformatf("Test registers, port %0d", port), 10us);\n                                                                 ^~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:195: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value == MAX_WINDOW_SIZE, "REG_WINDOW_MAX_SIZE reports incorrect value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:195: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value == MAX_WINDOW_SIZE, "REG_WINDOW_MAX_SIZE reports incorrect value");\n                                          ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:200: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value == expected, "REG_WINDOW_SIZE did not update");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:200: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value == expected, "REG_WINDOW_SIZE did not update");\n                                   ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:205: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(value == expected, "REG_WINDOW_SIZE did not update");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:205: syntax error, unexpected \',\'\n    `ASSERT_ERROR(value == expected, "REG_WINDOW_SIZE did not update");\n                                   ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:219: syntax error, unexpected IDENTIFIER\n    item_t coefficients[$];\n           ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:230: syntax error, unexpected IDENTIFIER\n      item_t coeff;\n             ^~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:232: Unsupported or unknown PLI call: $urandom\n      coeff = $urandom();\n              ^~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:247: syntax error, unexpected IDENTIFIER\n      item_t payload[$];\n             ^~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:249: Unsupported: empty queues ("{ }")\n      payload = {};\n                ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:251: Unsupported or unknown PLI call: $urandom\n        payload.push_back($urandom());\n                          ^~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:259: syntax error, unexpected IDENTIFIER\n      item_t sent[$], received[$], expected[$];\n             ^~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:273: Define or directive not defined: \'`ASSERT_ERROR\'\n      `ASSERT_ERROR(\n      ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:274: syntax error, unexpected \',\'\n        expected.size() == received.size(), \n                                          ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:280: Define or directive not defined: \'`ASSERT_ERROR\'\n        `ASSERT_ERROR(\n        ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:281: syntax error, unexpected \',\'\n          received[i] == expected[i], \n                                    ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:303: syntax error, unexpected TIME NUMBER, expecting \')\'\n    test.start_test("Test random", 10ms);\n                                   ^~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:313: Unsupported or unknown PLI call: $urandom_range\n      window_size = $urandom_range(1, MAX_WINDOW_SIZE);\n                    ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:314: Unsupported or unknown PLI call: $urandom_range\n      packet_len  = $urandom_range(1, SPP);\n                    ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:318: Unsupported or unknown PLI call: $urandom_range\n      num_packets = $urandom_range(1, 2*packets_per_window);\n                    ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:330: syntax error, unexpected TIME NUMBER, expecting \')\'\n    test.start_test("Test directed", 100us);\n                                     ^~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:347: syntax error, unexpected TIME NUMBER, expecting \')\'\n    test.start_test("Test back pressure", 1ms);\n                                          ^~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:358: syntax error, unexpected TIME NUMBER, expecting \')\'\n    test.start_test("Test underflow", 1ms);\n                                      ^~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:383: syntax error, unexpected TIME NUMBER, expecting \')\'\n    test.start_test("Flush block then reset it", 10us);\n                                                 ^~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:391: syntax error, unexpected TIME NUMBER, expecting \')\'\n    test.start_test("Verify Block Info", 2us);\n                                         ^~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:392: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(blk_ctrl.get_noc_id() == NOC_ID, "Incorrect NOC_ID Value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:392: syntax error, unexpected \',\'\n    `ASSERT_ERROR(blk_ctrl.get_noc_id() == NOC_ID, "Incorrect NOC_ID Value");\n                                                 ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:393: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(blk_ctrl.get_num_data_i() == NUM_PORTS_I, "Incorrect NUM_DATA_I Value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:393: syntax error, unexpected \',\'\n    `ASSERT_ERROR(blk_ctrl.get_num_data_i() == NUM_PORTS_I, "Incorrect NUM_DATA_I Value");\n                                                          ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:394: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(blk_ctrl.get_num_data_o() == NUM_PORTS_O, "Incorrect NUM_DATA_O Value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:394: syntax error, unexpected \',\'\n    `ASSERT_ERROR(blk_ctrl.get_num_data_o() == NUM_PORTS_O, "Incorrect NUM_DATA_O Value");\n                                                          ^\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:395: Define or directive not defined: \'`ASSERT_ERROR\'\n    `ASSERT_ERROR(blk_ctrl.get_mtu() == MTU, "Incorrect MTU Value");\n    ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/lib/rfnoc/blocks/rfnoc_block_window/rfnoc_block_window_tb.sv:395: syntax error, unexpected \',\'\n    `ASSERT_ERROR(blk_ctrl.get_mtu() == MTU, "Incorrect MTU Value");\n                                           ^\n%Error: Exiting due to 42 error(s)\n'
function bit [31:0] mult_rc(bit signed [15:0] real_data, bit signed [31:0] complex_data);
    bit [47:0] temp;
    bit [31:0] result;
    temp = (real_data * signed'(complex_data[31:16])) >> 15;
    result[31:16] = temp;
    temp = (real_data * signed'(complex_data[15: 0])) >> 15;
    result[15: 0] = temp;
    return result;
  endfunction
function bit [31:0] mult_rc(bit signed [15:0] real_data, bit signed [31:0] complex_data);

    bit [47:0] temp;
    bit [31:0] result;
    temp = (real_data * signed'(complex_data[31:16])) >> 15;
    result[31:16] = temp;
    temp = (real_data * signed'(complex_data[15: 0])) >> 15;
    result[15: 0] = temp;
    return result;
  endfunction