data/full_repos/permissive/201267735/verif/rvfi/models/insn_fsri.v
None: at end of input
1: b'%Error: data/full_repos/permissive/201267735/verif/rvfi/models/insn_fsri.v:2: Cannot find include file: xcfi_macros.sv\n`include "xcfi_macros.sv" \n         ^~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/201267735/verif/rvfi/models,data/full_repos/permissive/201267735/xcfi_macros.sv\n             data/full_repos/permissive/201267735/verif/rvfi/models,data/full_repos/permissive/201267735/xcfi_macros.sv.v\n             data/full_repos/permissive/201267735/verif/rvfi/models,data/full_repos/permissive/201267735/xcfi_macros.sv.sv\n             xcfi_macros.sv\n             xcfi_macros.sv.v\n             xcfi_macros.sv.sv\n             obj_dir/xcfi_macros.sv\n             obj_dir/xcfi_macros.sv.v\n             obj_dir/xcfi_macros.sv.sv\n%Error: data/full_repos/permissive/201267735/verif/rvfi/models/insn_fsri.v:6: Define or directive not defined: \'`XCFI_TRACE_INPUTS\'\n    `XCFI_TRACE_INPUTS,\n    ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/201267735/verif/rvfi/models/insn_fsri.v:6: syntax error, unexpected \',\', expecting \'[\'\n    `XCFI_TRACE_INPUTS,\n                      ^\n%Error: data/full_repos/permissive/201267735/verif/rvfi/models/insn_fsri.v:8: Define or directive not defined: \'`XCFI_SPEC_OUTPUTS\'\n    `XCFI_SPEC_OUTPUTS\n    ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/201267735/verif/rvfi/models/insn_fsri.v:12: Define or directive not defined: \'`XCFI_INSN_CHECK_COMMON\'\n`XCFI_INSN_CHECK_COMMON\n^~~~~~~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/201267735/verif/rvfi/models/insn_fsri.v:14: Define or directive not defined: \'`FIELD_SHAMT5\'\nwire [ 5:0] shamt       = `FIELD_SHAMT5;\n                          ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/201267735/verif/rvfi/models/insn_fsri.v:14: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\nwire [ 5:0] shamt       = `FIELD_SHAMT5;\n                                       ^\n%Error: data/full_repos/permissive/201267735/verif/rvfi/models/insn_fsri.v:15: Define or directive not defined: \'`RS1\'\nwire [63:0] ror_in      = {`RS1, `RS3};\n                           ^~~~\n%Error: data/full_repos/permissive/201267735/verif/rvfi/models/insn_fsri.v:15: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\nwire [63:0] ror_in      = {`RS1, `RS3};\n                               ^\n%Error: data/full_repos/permissive/201267735/verif/rvfi/models/insn_fsri.v:15: Define or directive not defined: \'`RS3\'\nwire [63:0] ror_in      = {`RS1, `RS3};\n                                 ^~~~\n%Error: data/full_repos/permissive/201267735/verif/rvfi/models/insn_fsri.v:19: syntax error, unexpected assign\nassign spec_valid       = rvfi_valid && dec_b_fsri;\n^~~~~~\n%Error: data/full_repos/permissive/201267735/verif/rvfi/models/insn_fsri.v:21: Define or directive not defined: \'`FIELD_RS1_ADDR\'\nassign spec_rs1_addr    = `FIELD_RS1_ADDR;\n                          ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/201267735/verif/rvfi/models/insn_fsri.v:22: Define or directive not defined: \'`FIELD_RS2_ADDR\'\nassign spec_rs2_addr    = `FIELD_RS2_ADDR;\n                          ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/201267735/verif/rvfi/models/insn_fsri.v:24: Define or directive not defined: \'`FIELD_RD_ADDR\'\nassign spec_rd_addr     = `FIELD_RD_ADDR;\n                          ^~~~~~~~~~~~~~\n%Error: Exiting due to 14 error(s)\n'
module xcfi_insn_spec (

    `XCFI_TRACE_INPUTS,

    `XCFI_SPEC_OUTPUTS

);

`XCFI_INSN_CHECK_COMMON

wire [ 5:0] shamt       = `FIELD_SHAMT5;
wire [63:0] ror_in      = {`RS1, `RS3};
wire [63:0] insn_result = (ror_in >> (   shamt)) |
                          (ror_in << (64-shamt)) ;

assign spec_valid       = rvfi_valid && dec_b_fsri;
assign spec_trap        = 1'b0   ;
assign spec_rs1_addr    = `FIELD_RS1_ADDR;
assign spec_rs2_addr    = `FIELD_RS2_ADDR;
assign spec_rs3_addr    = 0;
assign spec_rd_addr     = `FIELD_RD_ADDR;
assign spec_rd_wdata    = spec_rd_addr ? insn_result[63:32] : {XLEN{1'b0}};
assign spec_rd_wide     = 1'b0;
assign spec_rd_wdatahi  = 32'b0;
assign spec_pc_wdata    = rvfi_pc_rdata + 4;
assign spec_mem_addr    = 0;
assign spec_mem_rmask   = 0;
assign spec_mem_wmask   = 0;
assign spec_mem_wdata   = 0;

endmodule
module xcfi_insn_spec (

    `XCFI_TRACE_INPUTS,

    `XCFI_SPEC_OUTPUTS

);


`XCFI_INSN_CHECK_COMMON

wire [ 5:0] shamt       = `FIELD_SHAMT5;
wire [63:0] ror_in      = {`RS1, `RS3};
wire [63:0] insn_result = (ror_in >> (   shamt)) |
                          (ror_in << (64-shamt)) ;

assign spec_valid       = rvfi_valid && dec_b_fsri;
assign spec_trap        = 1'b0   ;
assign spec_rs1_addr    = `FIELD_RS1_ADDR;
assign spec_rs2_addr    = `FIELD_RS2_ADDR;
assign spec_rs3_addr    = 0;
assign spec_rd_addr     = `FIELD_RD_ADDR;
assign spec_rd_wdata    = spec_rd_addr ? insn_result[63:32] : {XLEN{1'b0}};
assign spec_rd_wide     = 1'b0;
assign spec_rd_wdatahi  = 32'b0;
assign spec_pc_wdata    = rvfi_pc_rdata + 4;
assign spec_mem_addr    = 0;
assign spec_mem_rmask   = 0;
assign spec_mem_wmask   = 0;
assign spec_mem_wdata   = 0;

endmodule