data/full_repos/permissive/184916587/Test_IMemory.v
 line:22: before: "$"
1: b'%Warning-STMTDLY: data/full_repos/permissive/184916587/Test_IMemory.v:19: Unsupported: Ignoring delay on this delayed statement.\n   #0 address=0;\n   ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/184916587/Test_IMemory.v:20: Unsupported: Ignoring delay on this delayed statement.\n   #5 address=4;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/184916587/Test_IMemory.v:21: Unsupported: Ignoring delay on this delayed statement.\n   #5 address=8;\n   ^\n%Warning-STMTDLY: data/full_repos/permissive/184916587/Test_IMemory.v:22: Unsupported: Ignoring delay on this delayed statement.\n   #5 $finish;\n   ^\n%Error: data/full_repos/permissive/184916587/Test_IMemory.v:27: Unsupported or unknown PLI call: $dumpfile\n   $dumpfile("IMemory.vcd");\n   ^~~~~~~~~\n%Error: data/full_repos/permissive/184916587/Test_IMemory.v:28: Unsupported or unknown PLI call: $dumpvars\n   $dumpvars(0,IMemory_test);\n   ^~~~~~~~~\n%Error: Exiting due to 2 error(s), 4 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module IMemory_test;
	reg[31:0] address;
	wire[31:0] instr;

	IMemory imemory_test(
		.address(address),
		.instr(instr)
	);

	initial
		begin
			#0 address=0;
			#5 address=4;
			#5 address=8;
			#5 $finish;
		end

	initial
		begin
			$dumpfile("IMemory.vcd");
			$dumpvars(0,IMemory_test);
		end
endmodule
module IMemory_test;

	reg[31:0] address;
	wire[31:0] instr;

	IMemory imemory_test(
		.address(address),
		.instr(instr)
	);

	initial
		begin
			#0 address=0;
			#5 address=4;
			#5 address=8;
			#5 $finish;
		end

	initial
		begin
			$dumpfile("IMemory.vcd");
			$dumpvars(0,IMemory_test);
		end
endmodule