data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp
 line:46: before: "logic"
1: b"%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:45: Define or directive not defined: '`mname'\nmodule `mname`();\n       ^~~~~~\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:45: syntax error, unexpected $undefined, expecting IDENTIFIER or PACKAGE-IDENTIFIER or TYPE-IDENTIFIER\nmodule `mname`();\n             ^\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:48: syntax error, unexpected $undefined, expecting TYPE-IDENTIFIER\n   wire [`$num_tracks-1`:0] pads_S0;\n         ^\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:48: Unsupported or unknown PLI call: $num_tracks\n   wire [`$num_tracks-1`:0] pads_S0;\n          ^~~~~~~~~~~\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:49: syntax error, unexpected $undefined, expecting TYPE-IDENTIFIER\n   wire [`$num_tracks-1`:0] pads_S1;\n         ^\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:49: Unsupported or unknown PLI call: $num_tracks\n   wire [`$num_tracks-1`:0] pads_S1;\n          ^~~~~~~~~~~\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:50: syntax error, unexpected $undefined, expecting TYPE-IDENTIFIER\n   wire [`$num_tracks-1`:0] pads_S2;\n         ^\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:50: Unsupported or unknown PLI call: $num_tracks\n   wire [`$num_tracks-1`:0] pads_S2;\n          ^~~~~~~~~~~\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:51: syntax error, unexpected $undefined, expecting TYPE-IDENTIFIER\n   wire [`$num_tracks-1`:0] pads_S3;\n         ^\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:51: Unsupported or unknown PLI call: $num_tracks\n   wire [`$num_tracks-1`:0] pads_S3;\n          ^~~~~~~~~~~\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:57: Unsupported or unknown PLI call: $clocker_obj\n    `$clocker_obj->instantiate` (.Clk(Clk), .Reset(Reset));\n     ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:61: Unsupported or unknown PLI call: $max_cyc\n      repeat(`$max_cyc`) @(posedge Clk);\n              ^~~~~~~~\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:76: Unsupported or unknown PLI call: $dut_ifc\n   `$dut_ifc->instantiate` (.Clk(Clk), .Reset(Reset));\n    ^~~~~~~~\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:78: Unsupported or unknown PLI call: $dut_obj\n   `$dut_obj->instantiate` (\n    ^~~~~~~~\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:103: Unsupported or unknown PLI call: $tst_obj\n    `$tst_obj->instantiate` (.ifc(`$dut_ifc->iname()`),\n     ^~~~~~~~\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/top/ncsim_verif/test_top.svp:103: Unsupported or unknown PLI call: $dut_ifc\n    `$tst_obj->instantiate` (.ifc(`$dut_ifc->iname()`),\n                                   ^~~~~~~~\n%Error: Exiting due to 16 error(s)\n"
module `mname`();
   logic Clk;
   logic Reset;
   wire [`$num_tracks-1`:0] pads_S0;
   wire [`$num_tracks-1`:0] pads_S1;
   wire [`$num_tracks-1`:0] pads_S2;
   wire [`$num_tracks-1`:0] pads_S3;
   


    `$clocker_obj->instantiate` (.Clk(Clk), .Reset(Reset));


   initial begin
      repeat(`$max_cyc`) @(posedge Clk);
      $display("\n%0t\tERROR: The `$max_cyc` cycles marker has passed!",$time);
      $finish(2);
   end


   






   `$dut_ifc->instantiate` (.Clk(Clk), .Reset(Reset));

   `$dut_obj->instantiate` (
	.pads_N_0(pads_S3),
	.pads_S_0(pads_S1),
	.pads_E_0(pads_S0),
	.pads_W_0(pads_S2),
	.clk_pad(Clk),
	.reset_pad(Reset)
   );


   assign dut.tck_pad = dut_ifc.tck;


   assign dut.tdi_pad = dut_ifc.tdi;
   assign dut.tms_pad = dut_ifc.tms;
   assign dut.trst_n_pad = dut_ifc.trst_n;

   assign dut_ifc.config_addr_to_gc = dut.global_controller.config_addr_out;
   assign dut_ifc.config_data_to_gc = dut.global_controller.config_data_out;
   assign dut_ifc.tdo = dut.tdo_pad;



    `$tst_obj->instantiate` (.ifc(`$dut_ifc->iname()`),
			     .pads_S0(pads_S0),
			     .pads_S1(pads_S1),
			     .pads_S2(pads_S2),
			     .pads_S3(pads_S3)
	);
      
endmodule
module `mname`();

   logic Clk;
   logic Reset;
   wire [`$num_tracks-1`:0] pads_S0;
   wire [`$num_tracks-1`:0] pads_S1;
   wire [`$num_tracks-1`:0] pads_S2;
   wire [`$num_tracks-1`:0] pads_S3;
   


    `$clocker_obj->instantiate` (.Clk(Clk), .Reset(Reset));


   initial begin
      repeat(`$max_cyc`) @(posedge Clk);
      $display("\n%0t\tERROR: The `$max_cyc` cycles marker has passed!",$time);
      $finish(2);
   end


   






   `$dut_ifc->instantiate` (.Clk(Clk), .Reset(Reset));

   `$dut_obj->instantiate` (
	.pads_N_0(pads_S3),
	.pads_S_0(pads_S1),
	.pads_E_0(pads_S0),
	.pads_W_0(pads_S2),
	.clk_pad(Clk),
	.reset_pad(Reset)
   );


   assign dut.tck_pad = dut_ifc.tck;


   assign dut.tdi_pad = dut_ifc.tdi;
   assign dut.tms_pad = dut_ifc.tms;
   assign dut.trst_n_pad = dut_ifc.trst_n;

   assign dut_ifc.config_addr_to_gc = dut.global_controller.config_addr_out;
   assign dut_ifc.config_data_to_gc = dut.global_controller.config_data_out;
   assign dut_ifc.tdo = dut.tdo_pad;



    `$tst_obj->instantiate` (.ifc(`$dut_ifc->iname()`),
			     .pads_S0(pads_S0),
			     .pads_S1(pads_S1),
			     .pads_S2(pads_S2),
			     .pads_S3(pads_S3)
	);
      
endmodule