data/full_repos/permissive/177136805/eq2.v
1: b"%Error: data/full_repos/permissive/177136805/eq2.v:14: Cannot find file containing module: 'eq1'\n   eq1 eq_bit0_unit (.i0(a[0]), .i1(b[0]), .eq(e0));\n   ^~~\n        ... Looked in:\n             data/full_repos/permissive/177136805,data/full_repos/permissive/177136805/eq1\n             data/full_repos/permissive/177136805,data/full_repos/permissive/177136805/eq1.v\n             data/full_repos/permissive/177136805,data/full_repos/permissive/177136805/eq1.sv\n             eq1\n             eq1.v\n             eq1.sv\n             obj_dir/eq1\n             obj_dir/eq1.v\n             obj_dir/eq1.sv\n%Error: data/full_repos/permissive/177136805/eq2.v:15: Cannot find file containing module: 'eq1'\n   eq1 eq_bit1_unit (.eq(e1), .i0(a[1]), .i1(b[1]));\n   ^~~\n%Error: Exiting due to 2 error(s)\n"
module eq2
   (
    input  wire[1:0] a, b,
    output wire aeqb
   );


   wire e0, e1;




   eq1 eq_bit0_unit (.i0(a[0]), .i1(b[0]), .eq(e0));
   eq1 eq_bit1_unit (.eq(e1), .i0(a[1]), .i1(b[1]));


   assign aeqb = e0 & e1;

endmodule
module eq2
   (
    input  wire[1:0] a, b,
    output wire aeqb
   );



   wire e0, e1;




   eq1 eq_bit0_unit (.i0(a[0]), .i1(b[0]), .eq(e0));
   eq1 eq_bit1_unit (.eq(e1), .i0(a[1]), .i1(b[1]));


   assign aeqb = e0 & e1;

endmodule