data/full_repos/permissive/2084115/rtl/math/jelly_fixed_atan2.v
 line:69: before: "signed"
1: b'%Warning-WIDTH: data/full_repos/permissive/2084115/rtl/math/jelly_fixed_atan2.v:71: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s SHIFTR generates 35 bits.\n                                                                                  : ... In instance jelly_fixed_atan2\n        q32_to_angle = (q32 + (35\'h80000000 >> Q_WIDTH)) >> (32 - Q_WIDTH);\n                     ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/2084115/rtl/math/jelly_fixed_atan2.v:78: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s SHIFTR generates 64 bits.\n                                                                                  : ... In instance jelly_fixed_atan2\n        q32rad_to_scaled = ((rad * 64\'h00000000_28be60dc) + 64\'h00000000_80000000) >> 32;\n                         ^\n%Warning-WIDTH: data/full_repos/permissive/2084115/rtl/math/jelly_fixed_atan2.v:89: Operator FUNCREF \'q32_to_angle\' expects 35 bits on the Function Argument, but Function Argument\'s FUNCREF \'q32rad_to_scaled\' generates 32 bits.\n                                                                                  : ... In instance jelly_fixed_atan2\n            make_tbl = q32_to_angle(q32rad_to_scaled(q32rad));\n                       ^~~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/2084115/rtl/math/jelly_fixed_atan2.v:92: Operator FUNCREF \'q32_to_angle\' expects 35 bits on the Function Argument, but Function Argument\'s VARREF \'q32rad\' generates 32 bits.\n                                                                                  : ... In instance jelly_fixed_atan2\n            make_tbl = q32_to_angle(q32rad);\n                       ^~~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/2084115/rtl/math/jelly_fixed_atan2.v:94: Operator GTE expects 32 or 6 bits on the LHS, but LHS\'s VARREF \'idx\' generates 5 bits.\n                                                                                  : ... In instance jelly_fixed_atan2\n        if ( idx >= Q_WIDTH ) begin\n                 ^~\n%Error: data/full_repos/permissive/2084115/rtl/math/jelly_fixed_atan2.v:152: Cannot find file containing module: \'jelly_pipeline_control\'\n    jelly_pipeline_control\n    ^~~~~~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/2084115/rtl/math,data/full_repos/permissive/2084115/jelly_pipeline_control\n             data/full_repos/permissive/2084115/rtl/math,data/full_repos/permissive/2084115/jelly_pipeline_control.v\n             data/full_repos/permissive/2084115/rtl/math,data/full_repos/permissive/2084115/jelly_pipeline_control.sv\n             jelly_pipeline_control\n             jelly_pipeline_control.v\n             jelly_pipeline_control.sv\n             obj_dir/jelly_pipeline_control\n             obj_dir/jelly_pipeline_control.v\n             obj_dir/jelly_pipeline_control.sv\n%Warning-WIDTH: data/full_repos/permissive/2084115/rtl/math/jelly_fixed_atan2.v:227: Operator SHIFTL expects 64 bits on the LHS, but LHS\'s VARREF \'src_y\' generates 32 bits.\n                                                                                   : ... In instance jelly_fixed_atan2\n                            next_x     = +(src_y <<< Q_WIDTH);\n                                                 ^~~\n%Warning-WIDTH: data/full_repos/permissive/2084115/rtl/math/jelly_fixed_atan2.v:228: Operator SHIFTL expects 64 bits on the LHS, but LHS\'s VARREF \'src_x\' generates 32 bits.\n                                                                                   : ... In instance jelly_fixed_atan2\n                            next_y     = -(src_x <<< Q_WIDTH);\n                                                 ^~~\n%Warning-WIDTH: data/full_repos/permissive/2084115/rtl/math/jelly_fixed_atan2.v:233: Operator SHIFTL expects 64 bits on the LHS, but LHS\'s VARREF \'src_y\' generates 32 bits.\n                                                                                   : ... In instance jelly_fixed_atan2\n                            next_x     = -(src_y <<< Q_WIDTH);\n                                                 ^~~\n%Warning-WIDTH: data/full_repos/permissive/2084115/rtl/math/jelly_fixed_atan2.v:234: Operator SHIFTL expects 64 bits on the LHS, but LHS\'s VARREF \'src_x\' generates 32 bits.\n                                                                                   : ... In instance jelly_fixed_atan2\n                            next_y     = +(src_x <<< Q_WIDTH);\n                                                 ^~~\n%Error: Exiting due to 1 error(s), 9 warning(s)\n'
function signed [31:0] q32rad_to_scaled(input [31:0] rad);
    begin
        q32rad_to_scaled = ((rad * 64'h00000000_28be60dc) + 64'h00000000_80000000) >> 32;
    end
    endfunction
function signed [31:0] q32rad_to_scaled(input [31:0] rad);

    begin
        q32rad_to_scaled = ((rad * 64'h00000000_28be60dc) + 64'h00000000_80000000) >> 32;
    end
    endfunction