data/full_repos/permissive/214858095/FPGA_Exploration/spartan6/B205mini/ISE_Project/sim/general/sim_file_io.svh
 line:11: before: "typedef"
data/verilator_xmls/9a97c5e6-126e-4508-894c-6f3081eab81f.xml
function close();
    $fclose(handle);
    handle  = 0;
    is_open = 0;
  endfunction
function close();

    $fclose(handle);
    handle  = 0;
    is_open = 0;
  endfunction