data/full_repos/permissive/143278/ivltests/stask_sens_null_arg.v
 line:7: before: ","
1: b'%Error: data/full_repos/permissive/143278/ivltests/stask_sens_null_arg.v:7: syntax error, unexpected \',\', expecting TYPE-IDENTIFIER\n  always @* $display(,out,,in);\n                     ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/stask_sens_null_arg.v:11: Unsupported: Ignoring delay on this delayed statement.\n    #1 in = 1\'b1;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/stask_sens_null_arg.v:12: Unsupported: Ignoring delay on this delayed statement.\n    #1 in = 1\'b0;\n    ^\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/stask_sens_null_arg.v:13: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n%Error: Exiting due to 1 error(s), 3 warning(s)\n'
module top;
  wire out;
  reg in;

  assign out = in;

  always @* $display(,out,,in);

  initial begin
    in = 1'b0;
    #1 in = 1'b1;
    #1 in = 1'b0;
    #1;
    $display("PASSED");
  end
endmodule
module top;

  wire out;
  reg in;

  assign out = in;

  always @* $display(,out,,in);

  initial begin
    in = 1'b0;
    #1 in = 1'b1;
    #1 in = 1'b0;
    #1;
    $display("PASSED");
  end
endmodule