data/full_repos/permissive/216615048/src/shift.v
 line:37: before: "AM29xx"
data/verilator_xmls/9218add9-b654-4dfc-be2d-5f2936214f34.xml
module shift(input [31:0]in, output [31:0]out);
    assign out[31:0] = {in[30:0],1'b0};
endmodule
module shift(input [31:0]in, output [31:0]out);

    assign out[31:0] = {in[30:0],1'b0};
endmodule