data/full_repos/permissive/199399537/uart_ctrl.v
'utf-8' codec can't decode byte 0xd6 in position 153: invalid continuation byte
1: b"%Error: data/full_repos/permissive/199399537/uart_ctrl.v:27: Cannot find file containing module: 'uart_tx'\nuart_tx  uut_tx(\n^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/199399537,data/full_repos/permissive/199399537/uart_tx\n             data/full_repos/permissive/199399537,data/full_repos/permissive/199399537/uart_tx.v\n             data/full_repos/permissive/199399537,data/full_repos/permissive/199399537/uart_tx.sv\n             uart_tx\n             uart_tx.v\n             uart_tx.sv\n             obj_dir/uart_tx\n             obj_dir/uart_tx.v\n             obj_dir/uart_tx.sv\n%Error: data/full_repos/permissive/199399537/uart_ctrl.v:39: Cannot find file containing module: 'uart_speed_select'\nuart_speed_select  uut_ss(\n^~~~~~~~~~~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module uart_ctrl(
				clk,
				rst_n,
				tx_data,
				tx_start,
				fifo232_rdreq,
				rs232_tx
			);

input 					clk;
input 					rst_n;
input[7:0] 		tx_data;
input 					tx_start;

output 		fifo232_rdreq;
output 		rs232_tx;



wire clk_bps;
wire bps_start;



uart_tx		uut_tx(
				.clk(clk),
				.rst_n(rst_n),
				.tx_data(tx_data),
				.tx_start(tx_start),
				.clk_bps(clk_bps),
				.rs232_tx(rs232_tx),
				.bps_start(bps_start),
				.fifo232_rdreq(fifo232_rdreq)				
				);


uart_speed_select		uut_ss(
							.clk(clk),
							.rst_n(rst_n),
							.bps_start(bps_start),
							.clk_bps(clk_bps)
							);


endmodule
module uart_ctrl(
				clk,
				rst_n,
				tx_data,
				tx_start,
				fifo232_rdreq,
				rs232_tx
			);


input 					clk;
input 					rst_n;
input[7:0] 		tx_data;
input 					tx_start;

output 		fifo232_rdreq;
output 		rs232_tx;



wire clk_bps;
wire bps_start;



uart_tx		uut_tx(
				.clk(clk),
				.rst_n(rst_n),
				.tx_data(tx_data),
				.tx_start(tx_start),
				.clk_bps(clk_bps),
				.rs232_tx(rs232_tx),
				.bps_start(bps_start),
				.fifo232_rdreq(fifo232_rdreq)				
				);


uart_speed_select		uut_ss(
							.clk(clk),
							.rst_n(rst_n),
							.bps_start(bps_start),
							.clk_bps(clk_bps)
							);


endmodule