data/full_repos/permissive/178601407/led-rotator/led_rotator.v
data/verilator_xmls/fbd53d3c-d063-495a-868d-40e397ec0fce.xml
module led_rotator(
	input CLK_3p33MHZ,
	output LED2,
	output LED3,
	output LED4,
	output LED5);

	reg [21:0] counter = 22'd0;
	reg clk_400Hz_enable = 1'b0;
	reg [3:0] circle = 4'b0001;
	localparam DIVIDER = 22'd1000000;




	always @(posedge CLK_3p33MHZ)
	begin
		if (counter != DIVIDER)
		begin
			clk_400Hz_enable <= 1'b0;
			counter <= counter + 22'd1;
		end
		else
		begin
			clk_400Hz_enable <= 1'b1;
			counter <= 22'd0;
		end
	end


	always @(posedge CLK_3p33MHZ)
	begin
		if (clk_400Hz_enable)
		begin
			circle[3] <= circle[2];
			circle[2] <= circle[1];
			circle[1] <= circle[0];
			circle[0] <= circle[3];
		end
	end
	assign {LED2, LED3, LED4, LED5} = circle[3:0];
endmodule
module led_rotator(
	input CLK_3p33MHZ,
	output LED2,
	output LED3,
	output LED4,
	output LED5);


	reg [21:0] counter = 22'd0;
	reg clk_400Hz_enable = 1'b0;
	reg [3:0] circle = 4'b0001;
	localparam DIVIDER = 22'd1000000;




	always @(posedge CLK_3p33MHZ)
	begin
		if (counter != DIVIDER)
		begin
			clk_400Hz_enable <= 1'b0;
			counter <= counter + 22'd1;
		end
		else
		begin
			clk_400Hz_enable <= 1'b1;
			counter <= 22'd0;
		end
	end


	always @(posedge CLK_3p33MHZ)
	begin
		if (clk_400Hz_enable)
		begin
			circle[3] <= circle[2];
			circle[2] <= circle[1];
			circle[1] <= circle[0];
			circle[0] <= circle[3];
		end
	end
	assign {LED2, LED3, LED4, LED5} = circle[3:0];
endmodule