data/full_repos/permissive/116048589/Xilinx_Project/Main Xilinx Project/vgaControl.v
1: b'%Error: Cannot find file containing module: Xilinx\n        ... Looked in:\n             data/full_repos/permissive/116048589/Xilinx_Project/Main/Xilinx\n             data/full_repos/permissive/116048589/Xilinx_Project/Main/Xilinx.v\n             data/full_repos/permissive/116048589/Xilinx_Project/Main/Xilinx.sv\n             Xilinx\n             Xilinx.v\n             Xilinx.sv\n             obj_dir/Xilinx\n             obj_dir/Xilinx.v\n             obj_dir/Xilinx.sv\n%Error: Cannot find file containing module: Project,data/full_repos/permissive/116048589\n%Error: Cannot find file containing module: data/full_repos/permissive/116048589/Xilinx_Project/Main\n%Error: Cannot find file containing module: Project/vgaControl.v\n%Error: Exiting due to 4 error(s)\n'
module vgaControl(
input clk, clear,
output hSync,
output vSync,
output bright,
output reg enable,
output reg [10:0] hCount, vCount

    );


	reg count = 0;
	reg [11:0] XCount;
	reg [11:0] YCount;

	

	always@(posedge clk) begin

		if(clear) begin
			count  <= 0;
			enable <= 0;
		end
	
		else begin
	


			
			if (count == 1) begin
				count  <= 0;
				enable <= 1;
			end
			else begin

					count <= 1;
					enable <= 0;
			end		
		end
	
	end

	always@(posedge clk) begin
		if (clear) begin
			XCount <= 799;
			YCount <= 520; 
			
		end
		else if(enable) begin
			XCount <= XCount + 1;



			
			if(XCount >= 799) begin
				XCount <= 0;
				YCount <= YCount + 1;
			end



			if(YCount >= 520 && XCount == 799)
				YCount <= 0;
			
		end	
	end
	


	always@(posedge clk) begin
		if(enable) begin
			hCount <= 0;

			if(143 <= XCount && XCount < 783)
				hCount <= XCount - 143;
		end		
	end
	


	always@(posedge clk) begin
		
		if(enable) begin
			vCount <= 0;

			if(31 <= YCount && YCount < 510)
				vCount <= YCount - 31;
		end
	end
	



	assign hSync = !(0 <= XCount && XCount < 96);
	



	assign vSync = !(YCount == 0 || YCount == 1);
	



	assign bright = (144 <= XCount && XCount < 784 && 31 <= YCount && YCount < 511);
	
	
	
endmodule
module vgaControl(
input clk, clear,
output hSync,
output vSync,
output bright,
output reg enable,
output reg [10:0] hCount, vCount

    );



	reg count = 0;
	reg [11:0] XCount;
	reg [11:0] YCount;

	

	always@(posedge clk) begin

		if(clear) begin
			count  <= 0;
			enable <= 0;
		end
	
		else begin
	


			
			if (count == 1) begin
				count  <= 0;
				enable <= 1;
			end
			else begin

					count <= 1;
					enable <= 0;
			end		
		end
	
	end

	always@(posedge clk) begin
		if (clear) begin
			XCount <= 799;
			YCount <= 520; 
			
		end
		else if(enable) begin
			XCount <= XCount + 1;



			
			if(XCount >= 799) begin
				XCount <= 0;
				YCount <= YCount + 1;
			end



			if(YCount >= 520 && XCount == 799)
				YCount <= 0;
			
		end	
	end
	


	always@(posedge clk) begin
		if(enable) begin
			hCount <= 0;

			if(143 <= XCount && XCount < 783)
				hCount <= XCount - 143;
		end		
	end
	


	always@(posedge clk) begin
		
		if(enable) begin
			vCount <= 0;

			if(31 <= YCount && YCount < 510)
				vCount <= YCount - 31;
		end
	end
	



	assign hSync = !(0 <= XCount && XCount < 96);
	



	assign vSync = !(YCount == 0 || YCount == 1);
	



	assign bright = (144 <= XCount && XCount < 784 && 31 <= YCount && YCount < 511);
	
	
	
endmodule