data/full_repos/permissive/113839829/Source/CPU/openmips_min_sopc_tb.v
'utf-8' codec can't decode byte 0xbe in position 113: invalid start byte
1: b'%Error: data/full_repos/permissive/113839829/Source/CPU/openmips_min_sopc_tb.v:7: Cannot find include file: defines.v\n `include "defines.v" \n          ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/113839829/Source/CPU,data/full_repos/permissive/113839829/defines.v\n             data/full_repos/permissive/113839829/Source/CPU,data/full_repos/permissive/113839829/defines.v.v\n             data/full_repos/permissive/113839829/Source/CPU,data/full_repos/permissive/113839829/defines.v.sv\n             defines.v\n             defines.v.v\n             defines.v.sv\n             obj_dir/defines.v\n             obj_dir/defines.v.v\n             obj_dir/defines.v.sv\n%Error: data/full_repos/permissive/113839829/Source/CPU/openmips_min_sopc_tb.v:8: Cannot find include file: openmips_min_sopc.v\n `include "openmips_min_sopc.v" \n          ^~~~~~~~~~~~~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/113839829/Source/CPU/openmips_min_sopc_tb.v:20: Unsupported: Ignoring delay on this delayed statement.\n forever #10 CLOCK_50 = ~CLOCK_50;\n         ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/113839829/Source/CPU/openmips_min_sopc_tb.v:25: Define or directive not defined: \'`RstEnable\'\n rst = `RstEnable;\n       ^~~~~~~~~~\n%Error: data/full_repos/permissive/113839829/Source/CPU/openmips_min_sopc_tb.v:25: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n rst = `RstEnable;\n                 ^\n%Error: data/full_repos/permissive/113839829/Source/CPU/openmips_min_sopc_tb.v:26: Define or directive not defined: \'`RstDisable\'\n #19 rst = `RstDisable;\n           ^~~~~~~~~~~\n%Error: data/full_repos/permissive/113839829/Source/CPU/openmips_min_sopc_tb.v:26: syntax error, unexpected \';\', expecting TYPE-IDENTIFIER\n #19 rst = `RstDisable;\n                      ^\n%Warning-STMTDLY: data/full_repos/permissive/113839829/Source/CPU/openmips_min_sopc_tb.v:26: Unsupported: Ignoring delay on this delayed statement.\n #19 rst = `RstDisable;\n ^\n%Warning-STMTDLY: data/full_repos/permissive/113839829/Source/CPU/openmips_min_sopc_tb.v:27: Unsupported: Ignoring delay on this delayed statement.\n #2040 $finish;\n ^\n%Error: Exiting due to 6 error(s), 3 warning(s)\n'
module openmips_min_sopc_tb();

   reg CLOCK_50;
   reg rst;

   integer i;
   
   initial
     begin
	CLOCK_50 = 1'b0;
	forever #10 CLOCK_50 = ~CLOCK_50;
     end

   initial
     begin
	rst = `RstEnable;
	#19 rst = `RstDisable;
	#2040 $finish;
     end

   openmips_min_sopc openmips_min_sopc0
     (
      .clk(CLOCK_50),
      .rst(rst)
      );
   
endmodule
module openmips_min_sopc_tb();


   reg CLOCK_50;
   reg rst;

   integer i;
   
   initial
     begin
	CLOCK_50 = 1'b0;
	forever #10 CLOCK_50 = ~CLOCK_50;
     end

   initial
     begin
	rst = `RstEnable;
	#19 rst = `RstDisable;
	#2040 $finish;
     end

   openmips_min_sopc openmips_min_sopc0
     (
      .clk(CLOCK_50),
      .rst(rst)
      );
   
endmodule