data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v
1: b'%Error: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:26: Cannot find include file: seq_detect.syn.v\n`include "seq_detect.syn.v" \n         ^~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/21051978/processor/syn/netlist,data/full_repos/permissive/21051978/seq_detect.syn.v\n             data/full_repos/permissive/21051978/processor/syn/netlist,data/full_repos/permissive/21051978/seq_detect.syn.v.v\n             data/full_repos/permissive/21051978/processor/syn/netlist,data/full_repos/permissive/21051978/seq_detect.syn.v.sv\n             seq_detect.syn.v\n             seq_detect.syn.v.v\n             seq_detect.syn.v.sv\n             obj_dir/seq_detect.syn.v\n             obj_dir/seq_detect.syn.v.v\n             obj_dir/seq_detect.syn.v.sv\n%Error: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:27: Cannot find include file: /auto/home-scf-06/ee577/design_pdk/osu_stdcells/lib/tsmc018/lib/osu018_stdcells.v\n`include "/auto/home-scf-06/ee577/design_pdk/osu_stdcells/lib/tsmc018/lib/osu018_stdcells.v" \n         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:61: Unsupported: Ignoring delay on this delayed statement.\n     #5 clock = 0;\n     ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:62: Unsupported: Ignoring delay on this delayed statement.\n     #5 clock = 1;\n     ^\n%Error: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:97: Unsupported or unknown PLI call: $sdf_annotate\n  $sdf_annotate("../sdf/seq_detect.sdf",sqd,"TYPICAL", "1.0:1.0:1.0", "FROM_MTM");\n  ^~~~~~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:107: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:113: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:119: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:125: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:131: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:137: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:143: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:149: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:155: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:161: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:167: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:173: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:179: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:187: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:193: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:199: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:205: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:211: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:217: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:223: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:231: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:237: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:243: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:249: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:255: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:261: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:267: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:273: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:279: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:285: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:291: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:297: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:303: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:309: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:315: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:321: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:327: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:333: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:339: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:345: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/21051978/processor/syn/netlist/seq_detectortb1.v:351: Unsupported: Ignoring delay on this delayed statement.\n  #30\n  ^\n%Error: Exiting due to 3 error(s), 43 warning(s)\n'
module tb_seq_detect();

	

	wire error,match_op;
	

	reg inp,clock,reset;
	
	
	

	always begin

    	#5 clock = 0;
    	#5 clock = 1;
    end	
	
	

	seq_detect sqd (


		inp,clock,reset,error,match_op);
	
	
	
	

	initial
	begin
		$sdf_annotate("../sdf/seq_detect.sdf",sqd,"TYPICAL", "1.0:1.0:1.0", "FROM_MTM");
		

		$display($time, " << Starting the simulation >>");

		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd1;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'dx;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'dz;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
				

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10

$display($time, " << Start of correct sequence >>");
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		

		$display($time, " << End of correct sequence >>");
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd1;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'dx;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'dx;
		reset = 1'd0;
		
		

		#10
		inp = 1'dx;
		reset = 1'd0;
		
		

		#10
		inp = 1'dz;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#30
		
		$display($time, " << Finishing the simulation >>");
		$finish;
	end

endmodule
module tb_seq_detect();


	

	wire error,match_op;
	

	reg inp,clock,reset;
	
	
	

	always begin

    	#5 clock = 0;
    	#5 clock = 1;
    end	
	
	

	seq_detect sqd (


		inp,clock,reset,error,match_op);
	
	
	
	

	initial
	begin
		$sdf_annotate("../sdf/seq_detect.sdf",sqd,"TYPICAL", "1.0:1.0:1.0", "FROM_MTM");
		

		$display($time, " << Starting the simulation >>");

		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd1;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'dx;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'dz;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
				

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10

$display($time, " << Start of correct sequence >>");
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		

		$display($time, " << End of correct sequence >>");
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd1;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'dx;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'dx;
		reset = 1'd0;
		
		

		#10
		inp = 1'dx;
		reset = 1'd0;
		
		

		#10
		inp = 1'dz;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#10
		inp = 1'd0;
		reset = 1'd0;
		
		

		#10
		inp = 1'd1;
		reset = 1'd0;
		
		

		#30
		
		$display($time, " << Finishing the simulation >>");
		$finish;
	end

endmodule