data/full_repos/permissive/118303050/src/lab_1_1/top.v
1: b"%Error: data/full_repos/permissive/118303050/src/lab_1_1/top.v:32: Cannot find file containing module: 'calculate'\n    calculate U1(.num1(num1),.op(op),.result(s));\n    ^~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/118303050/src/lab_1_1,data/full_repos/permissive/118303050/calculate\n             data/full_repos/permissive/118303050/src/lab_1_1,data/full_repos/permissive/118303050/calculate.v\n             data/full_repos/permissive/118303050/src/lab_1_1,data/full_repos/permissive/118303050/calculate.sv\n             calculate\n             calculate.v\n             calculate.sv\n             obj_dir/calculate\n             obj_dir/calculate.v\n             obj_dir/calculate.sv\n%Error: data/full_repos/permissive/118303050/src/lab_1_1/top.v:34: Cannot find file containing module: 'display'\n    display U2(.clk(clk),.reset(rst),.s(s),.ans(ans),.seg(seg));\n    ^~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module top(
    input clk,
    input rst,
    input [2:0] op,
    input [7:0] num1,
    output [7:0] ans,
    output [6:0] seg
    );
    wire [31:0] s;
    calculate U1(.num1(num1),.op(op),.result(s));
    
    display U2(.clk(clk),.reset(rst),.s(s),.ans(ans),.seg(seg));
endmodule
module top(
    input clk,
    input rst,
    input [2:0] op,
    input [7:0] num1,
    output [7:0] ans,
    output [6:0] seg
    );

    wire [31:0] s;
    calculate U1(.num1(num1),.op(op),.result(s));
    
    display U2(.clk(clk),.reset(rst),.s(s),.ans(ans),.seg(seg));
endmodule