data/full_repos/permissive/143278/ivltests/cast_int_ams.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/cast_int_ams.v:9: Unsupported: Ignoring delay on this delayed statement.\n    #1;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: data/full_repos/permissive/143278/ivltests/cast_int_ams.v:8: Can\'t find definition of task/function: \'sqrt\'\n    in = sqrt(-1.0);\n         ^~~~\n%Error: Exiting due to 1 error(s), 1 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module top;
  reg pass = 1'b1;
  real in;
  wire [7:0] out = in;

  initial begin

    in = sqrt(-1.0);
    #1;
    if (out !== 8'bxxxxxxxx) begin
      $display("Failed: nan expected 8'bxxxxxxxx, got %b", out);
      pass = 1'b0;
    end

    if (pass) $display("PASSED");
  end
endmodule
module top;

  reg pass = 1'b1;
  real in;
  wire [7:0] out = in;

  initial begin

    in = sqrt(-1.0);
    #1;
    if (out !== 8'bxxxxxxxx) begin
      $display("Failed: nan expected 8'bxxxxxxxx, got %b", out);
      pass = 1'b0;
    end

    if (pass) $display("PASSED");
  end
endmodule