data/full_repos/permissive/193790231/lab05/lab05part01.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b"%Error: data/full_repos/permissive/193790231/lab05/lab05part01.v:14: Cannot find file containing module: 'clock_1s'\n clock_1s getDelay(  ifInc, CLOCK_50);\n ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/193790231/lab05,data/full_repos/permissive/193790231/clock_1s\n             data/full_repos/permissive/193790231/lab05,data/full_repos/permissive/193790231/clock_1s.v\n             data/full_repos/permissive/193790231/lab05,data/full_repos/permissive/193790231/clock_1s.sv\n             clock_1s\n             clock_1s.v\n             clock_1s.sv\n             obj_dir/clock_1s\n             obj_dir/clock_1s.v\n             obj_dir/clock_1s.sv\n%Error: data/full_repos/permissive/193790231/lab05/lab05part01.v:17: Cannot find file containing module: 'counterBCD4d'\n counterBCD4d bcdABCD(outputVal, noUseCarry,  1'b1, ifInc, 1'b1, debugSignal[3:0]);\n ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/193790231/lab05/lab05part01.v:18: Cannot find file containing module: 'hexDisplay4digit'\n hexDisplay4digit disp(HEX3, HEX2, HEX1, HEX0, outputVal);\n ^~~~~~~~~~~~~~~~\n%Error: Exiting due to 3 error(s)\n"
module lab05part01(
    output [6:0]HEX3, HEX2, HEX1, HEX0,
	output [15:0]LEDR,
    input  CLOCK_50


);

	wire ifInc, noUseCarry;

	wire [3:0]debugSignal;


	clock_1s getDelay(ifInc, CLOCK_50);

	wire [15:0]outputVal;
	counterBCD4d bcdABCD(outputVal, noUseCarry,1'b1,ifInc,1'b1, debugSignal[3:0]);
	hexDisplay4digit disp(HEX3, HEX2, HEX1, HEX0, outputVal);
	assign LEDR[15:0] = outputVal[15:0];
endmodule
module lab05part01(
    output [6:0]HEX3, HEX2, HEX1, HEX0,
	output [15:0]LEDR,
    input  CLOCK_50


);


	wire ifInc, noUseCarry;

	wire [3:0]debugSignal;


	clock_1s getDelay(ifInc, CLOCK_50);

	wire [15:0]outputVal;
	counterBCD4d bcdABCD(outputVal, noUseCarry,1'b1,ifInc,1'b1, debugSignal[3:0]);
	hexDisplay4digit disp(HEX3, HEX2, HEX1, HEX0, outputVal);
	assign LEDR[15:0] = outputVal[15:0];
endmodule