data/full_repos/permissive/174783592/FloatAdd/Shifters/rshifterTB.v
 line:39: before: "$"
1: b'%Warning-STMTDLY: data/full_repos/permissive/174783592/FloatAdd/Shifters/rshifterTB.v:39: Unsupported: Ignoring delay on this delayed statement.\n   #25 $finish;\n   ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/174783592/FloatAdd/Shifters/rshifterTB.v:42: Unsupported: Ignoring delay on this delayed statement.\n always #5 sel[1] <= ~sel[2];\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/174783592/FloatAdd/Shifters/rshifterTB.v:46: Unsupported: Ignoring delay on this delayed statement.\n always #5 sel <= ~sel;\n        ^\n%Error: data/full_repos/permissive/174783592/FloatAdd/Shifters/rshifterTB.v:48: Unsupported or unknown PLI call: $monitor\n initial $monitor($time,"in=%b\\tsel=%b\\tshifted=%b,,,%b",in,sel,out,rs.l3);\n         ^~~~~~~~\n%Error: Exiting due to 1 error(s), 3 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module rshifterTB();

	reg [10:0] in;
        reg [3:0 ] sel;

	wire [10:0] out;

	rshifter rs(in,sel,out);
	initial 
		begin
			in <= {3'b111,{2{4'b1011}}};
			sel <= 4'b0110;

			
			#25 $finish;
		end	
	
	always #5 sel[1] <= ~sel[2];



	always #5 sel <= ~sel;

	initial $monitor($time,"in=%b\tsel=%b\tshifted=%b,,,%b",in,sel,out,rs.l3);

endmodule
module rshifterTB();


	reg [10:0] in;
        reg [3:0 ] sel;

	wire [10:0] out;

	rshifter rs(in,sel,out);
	initial 
		begin
			in <= {3'b111,{2{4'b1011}}};
			sel <= 4'b0110;

			
			#25 $finish;
		end	
	
	always #5 sel[1] <= ~sel[2];



	always #5 sel <= ~sel;

	initial $monitor($time,"in=%b\tsel=%b\tshifted=%b,,,%b",in,sel,out,rs.l3);

endmodule