data/full_repos/permissive/170365068/Splitted modules/TestBench/controlTestbench.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Error: Cannot find file containing module: modules/TestBench,data/full_repos/permissive/170365068\n        ... Looked in:\n             data/full_repos/permissive/170365068/Splitted/modules/TestBench,data/full_repos/permissive/170365068\n             data/full_repos/permissive/170365068/Splitted/modules/TestBench,data/full_repos/permissive/170365068.v\n             data/full_repos/permissive/170365068/Splitted/modules/TestBench,data/full_repos/permissive/170365068.sv\n             modules/TestBench,data/full_repos/permissive/170365068\n             modules/TestBench,data/full_repos/permissive/170365068.v\n             modules/TestBench,data/full_repos/permissive/170365068.sv\n             obj_dir/modules/TestBench,data/full_repos/permissive/170365068\n             obj_dir/modules/TestBench,data/full_repos/permissive/170365068.v\n             obj_dir/modules/TestBench,data/full_repos/permissive/170365068.sv\n%Error: Cannot find file containing module: data/full_repos/permissive/170365068/Splitted\n%Error: Cannot find file containing module: modules/TestBench/controlTestbench.v\n%Error: Exiting due to 3 error(s)\n'
module controlTestbench;
	reg reset;
	reg [5:0] instruction5;
	wire RegDst,Branch,BranchTest,MemRead,Jump,MemtoReg,MemWrite,ALUSrc,RegWrite;
	wire [1:0] ALUOp;
	control control1(reset,instruction5,RegDst,Branch,Jump,MemRead,MemtoReg,ALUOp,MemWrite,ALUSrc,RegWrite,BranchTest);
	initial begin
		instruction5=6'b000000;
	end
	initial begin 
		
		$shm_open("shm.db",1);
		$shm_probe("AS");
		#50 $finish;
		#100 $shm_close();
	end
	initial begin 
		#0 reset <=1;
		#5 reset<=0;
	end

endmodule
module controlTestbench;

	reg reset;
	reg [5:0] instruction5;
	wire RegDst,Branch,BranchTest,MemRead,Jump,MemtoReg,MemWrite,ALUSrc,RegWrite;
	wire [1:0] ALUOp;
	control control1(reset,instruction5,RegDst,Branch,Jump,MemRead,MemtoReg,ALUOp,MemWrite,ALUSrc,RegWrite,BranchTest);
	initial begin
		instruction5=6'b000000;
	end
	initial begin 
		
		$shm_open("shm.db",1);
		$shm_probe("AS");
		#50 $finish;
		#100 $shm_close();
	end
	initial begin 
		#0 reset <=1;
		#5 reset<=0;
	end

endmodule