data/full_repos/permissive/140976142/rtl/rx_axis_adapter.v
data/verilator_xmls/633e1028-d6e3-41b9-a994-4d6bffeae7d6.xml
module rx_axis_adapter
(
	input            clk_mac,
	input            rst_n,
	
	input            rx_vld,
	input [7:0]      rx_dat,
	input            rx_sof,
	input            rx_eof,
	input            rx_err,
	
	output reg [7:0] rx_axis_mac_tdata,
	output reg       rx_axis_mac_tvalid,
	output           rx_axis_mac_tlast,
	output           rx_axis_mac_tuser
);

	always @(posedge clk_mac) begin
		rx_axis_mac_tvalid <= rst_n && rx_vld && !rx_eof;
		rx_axis_mac_tdata  <= rx_dat;
	end
	
	assign rx_axis_mac_tlast = rx_eof || rx_err;
	assign rx_axis_mac_tuser = rx_err;

endmodule
module rx_axis_adapter
(
	input            clk_mac,
	input            rst_n,
	
	input            rx_vld,
	input [7:0]      rx_dat,
	input            rx_sof,
	input            rx_eof,
	input            rx_err,
	
	output reg [7:0] rx_axis_mac_tdata,
	output reg       rx_axis_mac_tvalid,
	output           rx_axis_mac_tlast,
	output           rx_axis_mac_tuser
);


	always @(posedge clk_mac) begin
		rx_axis_mac_tvalid <= rst_n && rx_vld && !rx_eof;
		rx_axis_mac_tdata  <= rx_dat;
	end
	
	assign rx_axis_mac_tlast = rx_eof || rx_err;
	assign rx_axis_mac_tuser = rx_err;

endmodule