data/full_repos/permissive/178052224/Tarea3y4/testers/notTester.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Error: data/full_repos/permissive/178052224/Tarea3y4/testers/notTester.v:2: Cannot find include file: ../modules/not.v\n`include "../modules/not.v" \n         ^~~~~~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/178052224/Tarea3y4/testers,data/full_repos/permissive/178052224/../modules/not.v\n             data/full_repos/permissive/178052224/Tarea3y4/testers,data/full_repos/permissive/178052224/../modules/not.v.v\n             data/full_repos/permissive/178052224/Tarea3y4/testers,data/full_repos/permissive/178052224/../modules/not.v.sv\n             ../modules/not.v\n             ../modules/not.v.v\n             ../modules/not.v.sv\n             obj_dir/../modules/not.v\n             obj_dir/../modules/not.v.v\n             obj_dir/../modules/not.v.sv\n%Error: data/full_repos/permissive/178052224/Tarea3y4/testers/notTester.v:10: Unsupported or unknown PLI call: $dumpfile\n        $dumpfile("notGate.vcd");                    \n        ^~~~~~~~~\n%Error: data/full_repos/permissive/178052224/Tarea3y4/testers/notTester.v:11: Unsupported or unknown PLI call: $dumpvars\n        $dumpvars;                                   \n        ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/178052224/Tarea3y4/testers/notTester.v:19: Unsupported: Ignoring delay on this delayed statement.\n        #0 start = $realtime;\n        ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/178052224/Tarea3y4/testers/notTester.v:20: Unsupported: Ignoring delay on this delayed statement.\n        #100 a = 0 ;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/178052224/Tarea3y4/testers/notTester.v:21: Unsupported: Ignoring delay on this delayed statement.\n        #0 finish = $realtime;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/178052224/Tarea3y4/testers/notTester.v:25: Unsupported: Ignoring delay on this delayed statement.\n        # 0 start = $realtime;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/178052224/Tarea3y4/testers/notTester.v:26: Unsupported: Ignoring delay on this delayed statement.\n        # 1000 a = 1\'bx;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/178052224/Tarea3y4/testers/notTester.v:27: Unsupported: Ignoring delay on this delayed statement.\n        # 0 finish = $realtime;\n        ^\n%Warning-STMTDLY: data/full_repos/permissive/178052224/Tarea3y4/testers/notTester.v:36: Unsupported: Ignoring delay on this delayed statement.\n        # 1000 $finish;\n        ^\n%Error: data/full_repos/permissive/178052224/Tarea3y4/testers/notTester.v:38: syntax error, unexpected \'.\', expecting TYPE-IDENTIFIER\n    not notGate1 (.a(a),.y(y));\n                  ^\n%Error: Exiting due to 4 error(s), 7 warning(s)\n'
module probadorNot;
    reg a;
    wire y;
    realtime start, finish, delta_sf;

    initial begin
        $dumpfile("notGate.vcd");
        $dumpvars;
    end
        
    initial begin

        $display("<<<<Test for the not gate>>>>");
       

        #0 start = $realtime;
        #100 a = 0 ;
        #0 finish = $realtime;
        $display("Test for 0 => 1");
        

        # 0 start = $realtime;
        # 1000 a = 1'bx;
        # 0 finish = $realtime;
        $display("Test for 1 => 0");


        delta_sf = start - finish;
        $display ("start time: %d", start);
        $display ("ending time: %d", finish);
        $display ("delta_sf: %d", delta_sf);
        
        # 1000 $finish;
    end
    not notGate1 (.a(a),.y(y));
endmodule
module probadorNot;

    reg a;
    wire y;
    realtime start, finish, delta_sf;

    initial begin
        $dumpfile("notGate.vcd");
        $dumpvars;
    end
        
    initial begin

        $display("<<<<Test for the not gate>>>>");
       

        #0 start = $realtime;
        #100 a = 0 ;
        #0 finish = $realtime;
        $display("Test for 0 => 1");
        

        # 0 start = $realtime;
        # 1000 a = 1'bx;
        # 0 finish = $realtime;
        $display("Test for 1 => 0");


        delta_sf = start - finish;
        $display ("start time: %d", start);
        $display ("ending time: %d", finish);
        $display ("delta_sf: %d", delta_sf);
        
        # 1000 $finish;
    end
    not notGate1 (.a(a),.y(y));
endmodule