data/full_repos/permissive/180199545/MainGame/dotted_border.v
1: b'%Warning-WIDTH: data/full_repos/permissive/180199545/MainGame/dotted_border.v:37: Operator SHIFTL expects 9 bits on the LHS, but LHS\'s VARREF \'ObjectW\' generates 4 bits.\n                                                                                : ... In instance dotted_border\n    if(PollY%(ObjectW<<1) < ObjectW)\n                     ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/180199545/MainGame/dotted_border.v:37: Operator LT expects 9 bits on the RHS, but RHS\'s VARREF \'ObjectW\' generates 4 bits.\n                                                                                : ... In instance dotted_border\n    if(PollY%(ObjectW<<1) < ObjectW)\n                          ^\n%Warning-WIDTH: data/full_repos/permissive/180199545/MainGame/dotted_border.v:35: Operator LTE expects 11 bits on the RHS, but RHS\'s VARREF \'PollX\' generates 10 bits.\n                                                                                : ... In instance dotted_border\n  if(ObjectX <= PollX & PollX <= ObjectX+ObjectW)\n             ^~\n%Warning-WIDTH: data/full_repos/permissive/180199545/MainGame/dotted_border.v:35: Operator LTE expects 11 bits on the LHS, but LHS\'s VARREF \'PollX\' generates 10 bits.\n                                                                                : ... In instance dotted_border\n  if(ObjectX <= PollX & PollX <= ObjectX+ObjectW)\n                              ^~\n%Warning-WIDTH: data/full_repos/permissive/180199545/MainGame/dotted_border.v:35: Operator ADD expects 11 bits on the RHS, but RHS\'s VARREF \'ObjectW\' generates 4 bits.\n                                                                                : ... In instance dotted_border\n  if(ObjectX <= PollX & PollX <= ObjectX+ObjectW)\n                                        ^\n%Error: Exiting due to 5 warning(s)\n'
module dotted_border (
	input clk,
	input reset,

	input [10:0] ObjectX,
	input [3:0] ObjectW,
	input [3:0] ObjectH,
	
	input [9:0] PollX,
	input [8:0] PollY,
	
	output Hit,
	output Hit2
	);
	reg hit_out;
	reg hit2_out;
	

	always @ (posedge clk)
	begin
		if(ObjectX <= PollX & PollX <= ObjectX+ObjectW)
			begin
				if(PollY%(ObjectW<<1) < ObjectW)
					begin
						hit_out <= 1'b1;
						hit2_out <= 1'b0;
					end
				else
					begin
						hit_out <= 1'b0;
						hit2_out <= 1'b1;
					end
			end
		else
			begin
				hit_out <= 1'b0;
				hit2_out <= 1'b0;
			end
	end
	
	assign Hit = hit_out;
	assign Hit2 = hit2_out;

endmodule
module dotted_border (
	input clk,
	input reset,

	input [10:0] ObjectX,
	input [3:0] ObjectW,
	input [3:0] ObjectH,
	
	input [9:0] PollX,
	input [8:0] PollY,
	
	output Hit,
	output Hit2
	);

	reg hit_out;
	reg hit2_out;
	

	always @ (posedge clk)
	begin
		if(ObjectX <= PollX & PollX <= ObjectX+ObjectW)
			begin
				if(PollY%(ObjectW<<1) < ObjectW)
					begin
						hit_out <= 1'b1;
						hit2_out <= 1'b0;
					end
				else
					begin
						hit_out <= 1'b0;
						hit2_out <= 1'b1;
					end
			end
		else
			begin
				hit_out <= 1'b0;
				hit2_out <= 1'b0;
			end
	end
	
	assign Hit = hit_out;
	assign Hit2 = hit2_out;

endmodule