data/full_repos/permissive/169522605/hw3_1/mux4_1_4b.v
data/verilator_xmls/498577bf-b719-45a9-947b-1fa7beb884fb.xml
module mux4_1_4b(InA, InB, InC, InD, S, Out);


    parameter N = 4;

    input [N-1:0]   InA, InB, InC, InD;
    input [1:0]     S;
    output [N-1:0]  Out;



endmodule
module mux4_1_4b(InA, InB, InC, InD, S, Out);



    parameter N = 4;

    input [N-1:0]   InA, InB, InC, InD;
    input [1:0]     S;
    output [N-1:0]  Out;



endmodule