data/full_repos/permissive/162338081/Verilog1.v
'utf-8' codec can't decode byte 0xe7 in position 133: invalid continuation byte
1: b"%Error: data/full_repos/permissive/162338081/Verilog1.v:81: syntax error, unexpected if, expecting TYPE-IDENTIFIER\n            if(  (estado == CRON) || (estado == TEMP) )begin\n            ^~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:95: syntax error, unexpected <=, expecting IDENTIFIER\n                    estado <= TEMP;\n                           ^~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:99: syntax error, unexpected <=, expecting IDENTIFIER\n                    estado <= CRON;\n                           ^~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:108: syntax error, unexpected <=, expecting IDENTIFIER\n                    estado <= CONF;\n                           ^~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:111: syntax error, unexpected <=, expecting IDENTIFIER\n                        estado <= CONF;\n                               ^~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:118: syntax error, unexpected <=, expecting IDENTIFIER\n                    estado<=CONF;\n                          ^~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:121: syntax error, unexpected <=, expecting IDENTIFIER\n                    estado <= CONF;\n                           ^~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:128: syntax error, unexpected <=, expecting IDENTIFIER\n                    estado<=CONF;\n                          ^~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:131: syntax error, unexpected <=, expecting IDENTIFIER\n                    estado <= CONF;\n                           ^~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:134: syntax error, unexpected <=, expecting IDENTIFIER\n                    estado <= CONF;\n                           ^~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:140: syntax error, unexpected end\n    end\n    ^~~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:183: syntax error, unexpected <=, expecting IDENTIFIER\n                    counter <= pegui;\n                            ^~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:188: syntax error, unexpected <=, expecting IDENTIFIER\n                    counter <= 14'd0;\n                            ^~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:199: syntax error, unexpected <=, expecting IDENTIFIER\n                        counter <= counter - 1'd1;\n                                ^~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:213: syntax error, unexpected <=, expecting IDENTIFIER\n                            counter <= counter+1'd1;\n                                    ^~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:228: syntax error, unexpected <=, expecting IDENTIFIER\n                            counterAux <= counterAux +1'd1;\n                                       ^~\n%Error: data/full_repos/permissive/162338081/Verilog1.v:239: syntax error, unexpected <=, expecting IDENTIFIER\n                            counterAux <= counterAux - 1'd1;\n                                       ^~\n%Error: Cannot continue\n"
module main( clk , enable , funcao , reset , para , filete1 , filete2 , filete3 , filete4 , membpeg ,membsai);
   
    

    input clk;
    input funcao;
    input enable;
    input reset;
    input para;
    input [3:0]membpeg;
   
    

    parameter CONF = 4'b0000, CRON = 4'b0001, TEMP = 4'b0010, PARAR = 4'b0011;
       

    output  [6:0]filete1;
    output  [6:0]filete2;
    output  [6:0]filete3;
    output  [6:0]filete4;
    output  [3:0]membsai;
    
    

    reg [3:0]estado;
    reg [13:0]counter,counterAux;
    reg [26:0] pulsos,pulsosAux;
    reg [13:0]numero;
    reg [13:0]pegui;
    wire [3:0]n0;
    wire [3:0]n1;
    wire [3:0]n2;
    wire [3:0]n3;
    wire mempegfilt[3:0];
	
	
	Debounce D0(membpeg[0], clk, mempegfilt[0]);
	Debounce D1(membpeg[1], clk, mempegfilt[1]);
	Debounce D2(membpeg[2], clk, mempegfilt[2]);
	Debounce D3(membpeg[3], clk, mempegfilt[3]);
	
	
	

	separa princ(counter,n0,n1,n2,n3);
	
	decot dig0(n0,filete1);
	decot dig1(n1,filete2);
	decot dig2(n2,filete3);
	decot dig3(n3,filete4);
	

    initial begin
        estado <= CONF;
        counter <= 14'd0;
        pulsos <= 27'd0;
        counterAux <= 14'd0;
        pulsosAux <= 27'd0;
        pegui<=1234;
 
    end
   

    always@ (posedge clk or negedge para or negedge reset) begin
   

        
        if (!para) begin
			if(
            if(  (estado == CRON) || (estado == TEMP) )begin
                estado <= PARAR;
            end
            else if(estado == PARAR) begin
                estado <= funcao + 1'd1;
            end			
        end
       
        case(estado)
       

            CONF: begin
            
                if(enable==1'd1 && funcao==1'd1)begin
                    estado <= TEMP;
                end
               
                else if(enable==1'd1 && funcao==1'd0)begin
                    estado <= CRON;
                end
                
                
            end
           

            TEMP:begin
                if(enable==1'd0) begin
                    estado <= CONF;
                end
                else if(counter<=0) begin
                        estado <= CONF;
                end
            end
           

            CRON:begin
                if(enable==1'd0)begin
                    estado<=CONF;
                end
                else if (counter >= numero) begin
                    estado <= CONF;
                end
            end
           

            PARAR:begin
                if(enable==1'd0)begin
                    estado<=CONF;
                end
                else if(funcao==0 && counterAux == numero) begin
                    estado <= CONF;
                end
                else if(funcao==1 && counterAux == 0) begin
                    estado <= CONF;
                end
               
            end
           
        endcase
    end
   

    always@ (posedge clk or negedge reset or negedge para) begin
   
        if(!reset)begin
            if( (estado == CRON) || (estado == PARAR && funcao == 0))begin
                pulsos <= 27'd0;
                counter <= 14'd0;
                pulsosAux <= 27'd0;
                counterAux <= 14'd0;
               
            end
            else if( (estado == TEMP) || (estado == PARAR && funcao == 1))begin        
                pulsos <= 27'd0;
                counter <= numero;
                pulsosAux <= 27'd0;
                counterAux <= 14'd0;      
               
            end  
        end
        if (!para) begin
            if(  (estado == CRON) || (estado == TEMP) )begin
           
                counterAux <= counter;
                pulsosAux <= pulsos;
           
            end
            else if(estado == PARAR) begin
                counter <= counterAux;
                pulsos <= pulsosAux;
            end
           
        end
   
        case(estado)
       
            CONF: begin
               
				counter <=pegui;
             
                
                if(enable==1'd1 && funcao==1'd1)begin
                    counter <= pegui;
                    pulsos <= 27'd0;
                end
               
                else if(enable==1'd1 && funcao==1'd0)begin
                    counter <= 14'd0;
                    pulsos <= 27'd0;
                end
                
            end
       

            TEMP:begin
                if(pulsos == 27'd50000000) begin
                    pulsos <= 27'd0;
                    if(counter > 0)begin
                        counter <= counter - 1'd1;
                    end
                   
                end
                else
                    pulsos <= pulsos + 1'd1;
            end
           

            CRON: begin
           
                if(pulsos == 27'd50000000) begin
                        pulsos <= 27'd0;
                        if(counter < numero)begin
                            counter <= counter+1'd1;
                        end
                end
                else
                    pulsos <= pulsos + 1'd1;
               
             
            end
           

            PARAR:begin
                if(funcao == 0) begin
                    if(pulsosAux == 27'd50000000) begin
                        pulsosAux <= 27'd0;
                        if(counterAux < numero)begin
                            counterAux <= counterAux +1'd1;
                        end
                    end
                    else
                        pulsosAux <= pulsosAux + 1'd1;
                end
               
                if(funcao == 1) begin  
                    if(pulsosAux == 27'd50000000) begin
                        pulsosAux <= 27'd0;
                        if(counterAux > 0)begin
                            counterAux <= counterAux - 1'd1;
                        end
                    end
                        else
                            pulsosAux <= pulsosAux + 1'd1;    
                end
            end
       
        endcase
    end
   
   
    endmodule
module main( clk , enable , funcao , reset , para , filete1 , filete2 , filete3 , filete4 , membpeg ,membsai);

   
    

    input clk;
    input funcao;
    input enable;
    input reset;
    input para;
    input [3:0]membpeg;
   
    

    parameter CONF = 4'b0000, CRON = 4'b0001, TEMP = 4'b0010, PARAR = 4'b0011;
       

    output  [6:0]filete1;
    output  [6:0]filete2;
    output  [6:0]filete3;
    output  [6:0]filete4;
    output  [3:0]membsai;
    
    

    reg [3:0]estado;
    reg [13:0]counter,counterAux;
    reg [26:0] pulsos,pulsosAux;
    reg [13:0]numero;
    reg [13:0]pegui;
    wire [3:0]n0;
    wire [3:0]n1;
    wire [3:0]n2;
    wire [3:0]n3;
    wire mempegfilt[3:0];
	
	
	Debounce D0(membpeg[0], clk, mempegfilt[0]);
	Debounce D1(membpeg[1], clk, mempegfilt[1]);
	Debounce D2(membpeg[2], clk, mempegfilt[2]);
	Debounce D3(membpeg[3], clk, mempegfilt[3]);
	
	
	

	separa princ(counter,n0,n1,n2,n3);
	
	decot dig0(n0,filete1);
	decot dig1(n1,filete2);
	decot dig2(n2,filete3);
	decot dig3(n3,filete4);
	

    initial begin
        estado <= CONF;
        counter <= 14'd0;
        pulsos <= 27'd0;
        counterAux <= 14'd0;
        pulsosAux <= 27'd0;
        pegui<=1234;
 
    end
   

    always@ (posedge clk or negedge para or negedge reset) begin
   

        
        if (!para) begin
			if(
            if(  (estado == CRON) || (estado == TEMP) )begin
                estado <= PARAR;
            end
            else if(estado == PARAR) begin
                estado <= funcao + 1'd1;
            end			
        end
       
        case(estado)
       

            CONF: begin
            
                if(enable==1'd1 && funcao==1'd1)begin
                    estado <= TEMP;
                end
               
                else if(enable==1'd1 && funcao==1'd0)begin
                    estado <= CRON;
                end
                
                
            end
           

            TEMP:begin
                if(enable==1'd0) begin
                    estado <= CONF;
                end
                else if(counter<=0) begin
                        estado <= CONF;
                end
            end
           

            CRON:begin
                if(enable==1'd0)begin
                    estado<=CONF;
                end
                else if (counter >= numero) begin
                    estado <= CONF;
                end
            end
           

            PARAR:begin
                if(enable==1'd0)begin
                    estado<=CONF;
                end
                else if(funcao==0 && counterAux == numero) begin
                    estado <= CONF;
                end
                else if(funcao==1 && counterAux == 0) begin
                    estado <= CONF;
                end
               
            end
           
        endcase
    end
   

    always@ (posedge clk or negedge reset or negedge para) begin
   
        if(!reset)begin
            if( (estado == CRON) || (estado == PARAR && funcao == 0))begin
                pulsos <= 27'd0;
                counter <= 14'd0;
                pulsosAux <= 27'd0;
                counterAux <= 14'd0;
               
            end
            else if( (estado == TEMP) || (estado == PARAR && funcao == 1))begin        
                pulsos <= 27'd0;
                counter <= numero;
                pulsosAux <= 27'd0;
                counterAux <= 14'd0;      
               
            end  
        end
        if (!para) begin
            if(  (estado == CRON) || (estado == TEMP) )begin
           
                counterAux <= counter;
                pulsosAux <= pulsos;
           
            end
            else if(estado == PARAR) begin
                counter <= counterAux;
                pulsos <= pulsosAux;
            end
           
        end
   
        case(estado)
       
            CONF: begin
               
				counter <=pegui;
             
                
                if(enable==1'd1 && funcao==1'd1)begin
                    counter <= pegui;
                    pulsos <= 27'd0;
                end
               
                else if(enable==1'd1 && funcao==1'd0)begin
                    counter <= 14'd0;
                    pulsos <= 27'd0;
                end
                
            end
       

            TEMP:begin
                if(pulsos == 27'd50000000) begin
                    pulsos <= 27'd0;
                    if(counter > 0)begin
                        counter <= counter - 1'd1;
                    end
                   
                end
                else
                    pulsos <= pulsos + 1'd1;
            end
           

            CRON: begin
           
                if(pulsos == 27'd50000000) begin
                        pulsos <= 27'd0;
                        if(counter < numero)begin
                            counter <= counter+1'd1;
                        end
                end
                else
                    pulsos <= pulsos + 1'd1;
               
             
            end
           

            PARAR:begin
                if(funcao == 0) begin
                    if(pulsosAux == 27'd50000000) begin
                        pulsosAux <= 27'd0;
                        if(counterAux < numero)begin
                            counterAux <= counterAux +1'd1;
                        end
                    end
                    else
                        pulsosAux <= pulsosAux + 1'd1;
                end
               
                if(funcao == 1) begin  
                    if(pulsosAux == 27'd50000000) begin
                        pulsosAux <= 27'd0;
                        if(counterAux > 0)begin
                            counterAux <= counterAux - 1'd1;
                        end
                    end
                        else
                            pulsosAux <= pulsosAux + 1'd1;    
                end
            end
       
        endcase
    end
   
   
    endmodule