data/full_repos/permissive/193054270/status_reg/sreg/sreg.v
None: at end of input
1: b'%Error: data/full_repos/permissive/193054270/status_reg/sreg/sreg.v:1: Cannot find include file: cypress.v\n`include "cypress.v" \n         ^~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/193054270/status_reg/sreg,data/full_repos/permissive/193054270/cypress.v\n             data/full_repos/permissive/193054270/status_reg/sreg,data/full_repos/permissive/193054270/cypress.v.v\n             data/full_repos/permissive/193054270/status_reg/sreg,data/full_repos/permissive/193054270/cypress.v.sv\n             cypress.v\n             cypress.v.v\n             cypress.v.sv\n             obj_dir/cypress.v\n             obj_dir/cypress.v.v\n             obj_dir/cypress.v.sv\n%Error: Exiting due to 1 error(s)\n'
module sreg (
	output [7:0] result,
	input clock
);

reg[7:0] res_reg;
reg isr_reg;

always @(posedge clock)
begin
    res_reg = res_reg + 1'b1;
end

assign result = res_reg;

endmodule
module sreg (
	output [7:0] result,
	input clock
);


reg[7:0] res_reg;
reg isr_reg;

always @(posedge clock)
begin
    res_reg = res_reg + 1'b1;
end

assign result = res_reg;

endmodule