data/full_repos/permissive/129127690/decoder_tb.v
1: b'%Warning-STMTDLY: data/full_repos/permissive/129127690/decoder_tb.v:23: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/129127690/decoder_tb.v:25: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/129127690/decoder_tb.v:27: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/129127690/decoder_tb.v:29: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/129127690/decoder_tb.v:31: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/129127690/decoder_tb.v:33: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/129127690/decoder_tb.v:35: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/129127690/decoder_tb.v:37: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/129127690/decoder_tb.v:40: Unsupported: Ignoring delay on this delayed statement.\n  #10\n  ^\n%Warning-STMTDLY: data/full_repos/permissive/129127690/decoder_tb.v:42: Unsupported: Ignoring delay on this delayed statement.\n  #10;\n  ^\n%Error: data/full_repos/permissive/129127690/decoder_tb.v:13: Cannot find file containing module: \'decoder\'\n decoder #(.bus_size_in(bus_size_in), .bus_size_out(bus_size_out)) uut (\n ^~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/129127690,data/full_repos/permissive/129127690/decoder\n             data/full_repos/permissive/129127690,data/full_repos/permissive/129127690/decoder.v\n             data/full_repos/permissive/129127690,data/full_repos/permissive/129127690/decoder.sv\n             decoder\n             decoder.v\n             decoder.sv\n             obj_dir/decoder\n             obj_dir/decoder.v\n             obj_dir/decoder.sv\n%Error: Exiting due to 1 error(s), 10 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module decoder_tb #(parameter bus_size_in = 3, bus_size_out = 8);


	reg [bus_size_in-1:0] select;
	reg enabled;


	wire [bus_size_out-1:0] out;


	decoder #(.bus_size_in(bus_size_in), .bus_size_out(bus_size_out)) uut (
		.select(select), 
		.enabled(enabled),
		.out(out)
	);

	initial begin

		enabled = 0;
		select = 3'b000;
		#10
		select = 3'b001;
		#10
		select = 3'b010;
		#10
		select = 3'b011;
		#10
		select = 3'b100;
		#10
		select = 3'b101;
		#10
		select = 3'b110;
		#10
		select = 3'b111;
		#10
		enabled = 1;
		select = 3'b101;
		#10
		select = 3'b011;
		#10;
	end
      
endmodule
module decoder_tb #(parameter bus_size_in = 3, bus_size_out = 8);



	reg [bus_size_in-1:0] select;
	reg enabled;


	wire [bus_size_out-1:0] out;


	decoder #(.bus_size_in(bus_size_in), .bus_size_out(bus_size_out)) uut (
		.select(select), 
		.enabled(enabled),
		.out(out)
	);

	initial begin

		enabled = 0;
		select = 3'b000;
		#10
		select = 3'b001;
		#10
		select = 3'b010;
		#10
		select = 3'b011;
		#10
		select = 3'b100;
		#10
		select = 3'b101;
		#10
		select = 3'b110;
		#10
		select = 3'b111;
		#10
		enabled = 1;
		select = 3'b101;
		#10
		select = 3'b011;
		#10;
	end
      
endmodule