data/full_repos/permissive/123527973/counter_tb.v
 line:17: before: "$"
1: b'%Error: data/full_repos/permissive/123527973/counter_tb.v:6: Unsupported or unknown PLI call: $dumpfile\n     $dumpfile("test.vcd");\n     ^~~~~~~~~\n%Error: data/full_repos/permissive/123527973/counter_tb.v:7: Unsupported or unknown PLI call: $dumpvars\n     $dumpvars(0,test);\n     ^~~~~~~~~\n%Warning-STMTDLY: data/full_repos/permissive/123527973/counter_tb.v:9: Unsupported: Ignoring delay on this delayed statement.\n     # 17 reset = 1;\n     ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/123527973/counter_tb.v:10: Unsupported: Ignoring delay on this delayed statement.\n     # 11 reset = 0;\n     ^\n%Warning-STMTDLY: data/full_repos/permissive/123527973/counter_tb.v:11: Unsupported: Ignoring delay on this delayed statement.\n     # 29 reset = 1;\n     ^\n%Warning-STMTDLY: data/full_repos/permissive/123527973/counter_tb.v:12: Unsupported: Ignoring delay on this delayed statement.\n     # 5  reset =0;\n     ^\n%Warning-STMTDLY: data/full_repos/permissive/123527973/counter_tb.v:13: Unsupported: Ignoring delay on this delayed statement.\n     # 5  reset =1;\n     ^\n%Warning-STMTDLY: data/full_repos/permissive/123527973/counter_tb.v:14: Unsupported: Ignoring delay on this delayed statement.\n     # 5  reset =0;\n     ^\n%Warning-STMTDLY: data/full_repos/permissive/123527973/counter_tb.v:15: Unsupported: Ignoring delay on this delayed statement.\n     # 5  reset =1;\n     ^\n%Warning-STMTDLY: data/full_repos/permissive/123527973/counter_tb.v:16: Unsupported: Ignoring delay on this delayed statement.\n     # 5  reset =0;\n     ^\n%Warning-STMTDLY: data/full_repos/permissive/123527973/counter_tb.v:17: Unsupported: Ignoring delay on this delayed statement.\n     # 513 $finish;\n     ^\n%Warning-STMTDLY: data/full_repos/permissive/123527973/counter_tb.v:22: Unsupported: Ignoring delay on this delayed statement.\n  always #1 clk = !clk;\n         ^\n%Error: data/full_repos/permissive/123527973/counter_tb.v:28: Unsupported or unknown PLI call: $monitor\n     $monitor("At time %t, value = %h (%0d)",\n     ^~~~~~~~\n%Error: Exiting due to 3 error(s), 10 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module test;


  reg reset = 0;
  initial begin
     $dumpfile("test.vcd");
     $dumpvars(0,test);

     # 17 reset = 1;
     # 11 reset = 0;
     # 29 reset = 1;
     # 5  reset =0;
     # 5  reset =1;
     # 5  reset =0;
     # 5  reset =1;
     # 5  reset =0;
     # 513 $finish;
  end


  reg clk = 0;
  always #1 clk = !clk;

  wire [7:0] value;
  counter c1 (value, clk, reset);

  initial
     $monitor("At time %t, value = %h (%0d)",
              $time, value, value);
endmodule
module test;



  reg reset = 0;
  initial begin
     $dumpfile("test.vcd");
     $dumpvars(0,test);

     # 17 reset = 1;
     # 11 reset = 0;
     # 29 reset = 1;
     # 5  reset =0;
     # 5  reset =1;
     # 5  reset =0;
     # 5  reset =1;
     # 5  reset =0;
     # 513 $finish;
  end


  reg clk = 0;
  always #1 clk = !clk;

  wire [7:0] value;
  counter c1 (value, clk, reset);

  initial
     $monitor("At time %t, value = %h (%0d)",
              $time, value, value);
endmodule