data/full_repos/permissive/2012679/VGA_control.v
1: b'%Warning-WIDTH: data/full_repos/permissive/2012679/VGA_control.v:14: Operator GTE expects 12 bits on the RHS, but RHS\'s CONST \'11\'h320\' generates 11 bits.\n                                                                   : ... In instance VGA_control\n  if (hcounter >= 11\'d800)\n               ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/2012679/VGA_control.v:19: Operator GTE expects 11 bits on the RHS, but RHS\'s CONST \'10\'h20d\' generates 10 bits.\n                                                                   : ... In instance VGA_control\n  if (vcounter >= 10\'d525)\n               ^~\n%Warning-WIDTH: data/full_repos/permissive/2012679/VGA_control.v:31: Operator GTE expects 12 bits on the RHS, but RHS\'s CONST \'11\'h0\' generates 11 bits.\n                                                                   : ... In instance VGA_control\n  visible <= hcounter >= 11\'d0 & hcounter < 11\'d640 & vcounter >= 10\'d0 & vcounter < 10\'d480;\n                      ^~\n%Warning-WIDTH: data/full_repos/permissive/2012679/VGA_control.v:31: Operator LT expects 12 bits on the RHS, but RHS\'s CONST \'11\'h280\' generates 11 bits.\n                                                                   : ... In instance VGA_control\n  visible <= hcounter >= 11\'d0 & hcounter < 11\'d640 & vcounter >= 10\'d0 & vcounter < 10\'d480;\n                                          ^\n%Warning-WIDTH: data/full_repos/permissive/2012679/VGA_control.v:31: Operator GTE expects 11 bits on the RHS, but RHS\'s CONST \'10\'h0\' generates 10 bits.\n                                                                   : ... In instance VGA_control\n  visible <= hcounter >= 11\'d0 & hcounter < 11\'d640 & vcounter >= 10\'d0 & vcounter < 10\'d480;\n                                                               ^~\n%Warning-WIDTH: data/full_repos/permissive/2012679/VGA_control.v:31: Operator LT expects 11 bits on the RHS, but RHS\'s CONST \'10\'h1e0\' generates 10 bits.\n                                                                   : ... In instance VGA_control\n  visible <= hcounter >= 11\'d0 & hcounter < 11\'d640 & vcounter >= 10\'d0 & vcounter < 10\'d480;\n                                                                                   ^\n%Warning-WIDTH: data/full_repos/permissive/2012679/VGA_control.v:32: Operator LT expects 12 bits on the RHS, but RHS\'s CONST \'11\'h290\' generates 11 bits.\n                                                                   : ... In instance VGA_control\n  oHS <= hcounter < 11\'d656 | hcounter >= 11\'d752;\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/2012679/VGA_control.v:32: Operator GTE expects 12 bits on the RHS, but RHS\'s CONST \'11\'h2f0\' generates 11 bits.\n                                                                   : ... In instance VGA_control\n  oHS <= hcounter < 11\'d656 | hcounter >= 11\'d752;\n                                       ^~\n%Warning-WIDTH: data/full_repos/permissive/2012679/VGA_control.v:33: Operator LT expects 11 bits on the RHS, but RHS\'s CONST \'10\'h1ea\' generates 10 bits.\n                                                                   : ... In instance VGA_control\n  oVS <= vcounter < 10\'d490 | vcounter >= 10\'d492;\n                  ^\n%Warning-WIDTH: data/full_repos/permissive/2012679/VGA_control.v:33: Operator GTE expects 11 bits on the RHS, but RHS\'s CONST \'10\'h1ec\' generates 10 bits.\n                                                                   : ... In instance VGA_control\n  oVS <= vcounter < 10\'d490 | vcounter >= 10\'d492;\n                                       ^~\n%Warning-UNSIGNED: data/full_repos/permissive/2012679/VGA_control.v:31: Comparison is constant due to unsigned arithmetic\n                                                                      : ... In instance VGA_control\n  visible <= hcounter >= 11\'d0 & hcounter < 11\'d640 & vcounter >= 10\'d0 & vcounter < 10\'d480;\n                      ^~\n%Warning-UNSIGNED: data/full_repos/permissive/2012679/VGA_control.v:31: Comparison is constant due to unsigned arithmetic\n                                                                      : ... In instance VGA_control\n  visible <= hcounter >= 11\'d0 & hcounter < 11\'d640 & vcounter >= 10\'d0 & vcounter < 10\'d480;\n                                                               ^~\n%Error: Exiting due to 12 warning(s)\n'
module VGA_control(
	input CLK, reset,
	output reg [10:0] vcounter,
	output reg [11:0] hcounter,
	output reg visible, oHS, oVS
);
always @(posedge CLK, posedge reset)
begin
	if (reset) begin
		hcounter <= 0;
		vcounter <= 0;
	end else begin
		hcounter <= hcounter + 1;
		if (hcounter >= 11'd800)
		begin
			hcounter <= 0;
			vcounter <= vcounter + 1;
		end
		if (vcounter >= 10'd525)
			vcounter <= 0;
	end
end

always @(posedge CLK, posedge reset)
begin
	if (reset) begin
		visible <= 0;
		oHS <= 0;
		oVS <= 0;
	end else begin
		visible <= hcounter >= 11'd0 & hcounter < 11'd640 & vcounter >= 10'd0 & vcounter < 10'd480;
		oHS <= hcounter < 11'd656 | hcounter >= 11'd752;
		oVS <= vcounter < 10'd490 | vcounter >= 10'd492;
	end
end
endmodule
module VGA_control(
	input CLK, reset,
	output reg [10:0] vcounter,
	output reg [11:0] hcounter,
	output reg visible, oHS, oVS
);

always @(posedge CLK, posedge reset)
begin
	if (reset) begin
		hcounter <= 0;
		vcounter <= 0;
	end else begin
		hcounter <= hcounter + 1;
		if (hcounter >= 11'd800)
		begin
			hcounter <= 0;
			vcounter <= vcounter + 1;
		end
		if (vcounter >= 10'd525)
			vcounter <= 0;
	end
end

always @(posedge CLK, posedge reset)
begin
	if (reset) begin
		visible <= 0;
		oHS <= 0;
		oVS <= 0;
	end else begin
		visible <= hcounter >= 11'd0 & hcounter < 11'd640 & vcounter >= 10'd0 & vcounter < 10'd480;
		oHS <= hcounter < 11'd656 | hcounter >= 11'd752;
		oVS <= vcounter < 10'd490 | vcounter >= 10'd492;
	end
end
endmodule