data/full_repos/permissive/209644662/hardware/generator_z/jtag/Template/src/digital/flop.svp
 line:41: before: "input"
1: b"%Error: data/full_repos/permissive/209644662/hardware/generator_z/jtag/Template/src/digital/flop.svp:38: Define or directive not defined: '`mname'\nmodule `mname`(\n       ^~~~~~\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/jtag/Template/src/digital/flop.svp:38: syntax error, unexpected $undefined, expecting IDENTIFIER or PACKAGE-IDENTIFIER or TYPE-IDENTIFIER\nmodule `mname`(\n             ^\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/jtag/Template/src/digital/flop.svp:62: Unsupported or unknown PLI call: $default\n   assign dout = `$default`;\n                  ^~~~~~~~\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/jtag/Template/src/digital/flop.svp:72: Unsupported or unknown PLI call: $async_str\n   always_ff @(posedge Clk `$async_str`) begin\n                            ^~~~~~~~~~\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/jtag/Template/src/digital/flop.svp:74: Unsupported or unknown PLI call: $default\n dout <= `$default`;\n          ^~~~~~~~\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/jtag/Template/src/digital/flop.svp:81: Unsupported or unknown PLI call: $async_str\n   always_ff @(posedge Clk `$async_str`) begin\n                            ^~~~~~~~~~\n%Error: data/full_repos/permissive/209644662/hardware/generator_z/jtag/Template/src/digital/flop.svp:83: Unsupported or unknown PLI call: $default\n dout <= `$default`;\n          ^~~~~~~~\n%Error: Exiting due to 7 error(s)\n"
module `mname`(


	       input 		   Clk,
	       input [`$width-1`:0]  din,


	       input 		   Reset,


	       input 		   en,



	       output logic [`$width-1`:0] dout
	       );



   

   assign dout = `$default`;



   always_ff @(posedge Clk) begin
      dout <= din; 
   end



   always_ff @(posedge Clk `$async_str`) begin
      if (Reset) 
	dout <= `$default`;
      else
	dout <= din; 
   end

   

   always_ff @(posedge Clk `$async_str`) begin
      if (Reset) 
	dout <= `$default`;
      else if (en)
	dout <= din;
   end



   always_ff @(posedge Clk) begin
      if (en)
	dout <= din;
   end

endmodule
module `mname`(


	       input 		   Clk,
	       input [`$width-1`:0]  din,


	       input 		   Reset,


	       input 		   en,



	       output logic [`$width-1`:0] dout
	       );




   

   assign dout = `$default`;



   always_ff @(posedge Clk) begin
      dout <= din; 
   end



   always_ff @(posedge Clk `$async_str`) begin
      if (Reset) 
	dout <= `$default`;
      else
	dout <= din; 
   end

   

   always_ff @(posedge Clk `$async_str`) begin
      if (Reset) 
	dout <= `$default`;
      else if (en)
	dout <= din;
   end



   always_ff @(posedge Clk) begin
      if (en)
	dout <= din;
   end

endmodule