data/full_repos/permissive/154123726/3rdParty/groestl/MixBytes.v
data/verilator_xmls/430fa4d9-0645-4f7b-9368-8677a99b0777.xml
module MixColumns(x, y);
input [63:0] x;
output [7:0] y;

wire [7:0] x0, x1, x2, x3, x4, x5, x6, x7;
wire mod0, mod1;

assign x0 = x[63:56];
assign x1 = x[55:48];
assign x2 = x[47:40];
assign x3 = x[39:32];
assign x4 = x[31:24];
assign x5 = x[23:16];
assign x6 = x[15:8];
assign x7 = x[7:0];

assign mod0 = x0[7] ^ x1[7] ^ x2[7] ^ x3[6] ^ x4[6] ^ x5[7] ^ x6[6] ^ x7[6] ^ x7[7];
assign mod1 = x3[7] ^ x4[7] ^ x6[7] ^ x7[7];

assign y = { x0[6] ^ x1[6] ^ x2[6] ^ x2[7] ^ x3[5] ^ x4[5] ^ x4[7] ^ x5[6] ^ x5[7] ^ x6[5] ^ x6[7] ^ x7[5] ^ x7[6] ^ x7[7],
             x0[5] ^ x1[5] ^ x2[5] ^ x2[6] ^ x3[4] ^ x4[4] ^ x4[6] ^ x5[5] ^ x5[6] ^ x6[4] ^ x6[6] ^ x7[4] ^ x7[5] ^ x7[6],
             x0[4] ^ x1[4] ^ x2[4] ^ x2[5] ^ x3[3] ^ x4[3] ^ x4[5] ^ x5[4] ^ x5[5] ^ x6[3] ^ x6[5] ^ x7[3] ^ x7[4] ^ x7[5] ^ mod1,
             x0[3] ^ x1[3] ^ x2[3] ^ x2[4] ^ x3[2] ^ x4[2] ^ x4[4] ^ x5[3] ^ x5[4] ^ x6[2] ^ x6[4] ^ x7[2] ^ x7[3] ^ x7[4] ^ mod0 ^ mod1,
             x0[2] ^ x1[2] ^ x2[2] ^ x2[3] ^ x3[1] ^ x4[1] ^ x4[3] ^ x5[2] ^ x5[3] ^ x6[1] ^ x6[3] ^ x7[1] ^ x7[2] ^ x7[3] ^ mod0,
             x0[1] ^ x1[1] ^ x2[1] ^ x2[2] ^ x3[0] ^ x4[0] ^ x4[2] ^ x5[1] ^ x5[2] ^ x6[0] ^ x6[2] ^ x7[0] ^ x7[1] ^ x7[2] ^ mod1,
             x0[0] ^ x1[0] ^ x2[0] ^ x2[1] ^ x4[1] ^ x5[0] ^ x5[1] ^ x6[1] ^ x7[0] ^ x7[1] ^ mod0 ^ mod1,
             x2[0] ^ x4[0] ^ x5[0] ^ x6[0] ^ x7[0] ^ mod0}; 

endmodule
module MixColumns(x, y);

input [63:0] x;
output [7:0] y;

wire [7:0] x0, x1, x2, x3, x4, x5, x6, x7;
wire mod0, mod1;

assign x0 = x[63:56];
assign x1 = x[55:48];
assign x2 = x[47:40];
assign x3 = x[39:32];
assign x4 = x[31:24];
assign x5 = x[23:16];
assign x6 = x[15:8];
assign x7 = x[7:0];

assign mod0 = x0[7] ^ x1[7] ^ x2[7] ^ x3[6] ^ x4[6] ^ x5[7] ^ x6[6] ^ x7[6] ^ x7[7];
assign mod1 = x3[7] ^ x4[7] ^ x6[7] ^ x7[7];

assign y = { x0[6] ^ x1[6] ^ x2[6] ^ x2[7] ^ x3[5] ^ x4[5] ^ x4[7] ^ x5[6] ^ x5[7] ^ x6[5] ^ x6[7] ^ x7[5] ^ x7[6] ^ x7[7],
             x0[5] ^ x1[5] ^ x2[5] ^ x2[6] ^ x3[4] ^ x4[4] ^ x4[6] ^ x5[5] ^ x5[6] ^ x6[4] ^ x6[6] ^ x7[4] ^ x7[5] ^ x7[6],
             x0[4] ^ x1[4] ^ x2[4] ^ x2[5] ^ x3[3] ^ x4[3] ^ x4[5] ^ x5[4] ^ x5[5] ^ x6[3] ^ x6[5] ^ x7[3] ^ x7[4] ^ x7[5] ^ mod1,
             x0[3] ^ x1[3] ^ x2[3] ^ x2[4] ^ x3[2] ^ x4[2] ^ x4[4] ^ x5[3] ^ x5[4] ^ x6[2] ^ x6[4] ^ x7[2] ^ x7[3] ^ x7[4] ^ mod0 ^ mod1,
             x0[2] ^ x1[2] ^ x2[2] ^ x2[3] ^ x3[1] ^ x4[1] ^ x4[3] ^ x5[2] ^ x5[3] ^ x6[1] ^ x6[3] ^ x7[1] ^ x7[2] ^ x7[3] ^ mod0,
             x0[1] ^ x1[1] ^ x2[1] ^ x2[2] ^ x3[0] ^ x4[0] ^ x4[2] ^ x5[1] ^ x5[2] ^ x6[0] ^ x6[2] ^ x7[0] ^ x7[1] ^ x7[2] ^ mod1,
             x0[0] ^ x1[0] ^ x2[0] ^ x2[1] ^ x4[1] ^ x5[0] ^ x5[1] ^ x6[1] ^ x7[0] ^ x7[1] ^ mod0 ^ mod1,
             x2[0] ^ x4[0] ^ x5[0] ^ x6[0] ^ x7[0] ^ mod0}; 

endmodule