data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v
None: at end of input
1: b'%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:2: Cannot find include file: constants.vh\n`include "constants.vh" \n         ^~~~~~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory,data/full_repos/permissive/180413071/constants.vh\n             data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory,data/full_repos/permissive/180413071/constants.vh.v\n             data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory,data/full_repos/permissive/180413071/constants.vh.sv\n             constants.vh\n             constants.vh.v\n             constants.vh.sv\n             obj_dir/constants.vh\n             obj_dir/constants.vh.v\n             obj_dir/constants.vh.sv\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:3: Cannot find include file: helpers.vh\n`include "helpers.vh" \n         ^~~~~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:20: Define or directive not defined: \'`BCOND_OP_BRANCH\'\n            `BCOND_OP_BRANCH:\n            ^~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:20: syntax error, unexpected \':\', expecting endcase\n            `BCOND_OP_BRANCH:\n                            ^\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:22: Define or directive not defined: \'`BCOND_OP_ZERO\'\n            `BCOND_OP_ZERO:\n            ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:25: Define or directive not defined: \'`BCOND_OP_NZERO\'\n            `BCOND_OP_NZERO:\n            ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:28: Define or directive not defined: \'`BCOND_OP_ALU\'\n            `BCOND_OP_ALU:\n            ^~~~~~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:30: Define or directive not defined: \'`BCOND_OP_NOINC\'\n            `BCOND_OP_NOINC:\n            ^~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:32: Define or directive not defined: \'`BCOND_OP_COND\'\n            `BCOND_OP_COND:\n            ^~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:34: Define or directive not defined: \'`BCOND_EQ\'\n                    `BCOND_EQ: branch_src <= zero == 1; \n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:35: Define or directive not defined: \'`BCOND_NE\'\n                    `BCOND_NE: branch_src <= zero == 0;\n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:36: Define or directive not defined: \'`BCOND_CS\'\n                    `BCOND_CS: branch_src <= carry == 1;\n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:37: Define or directive not defined: \'`BCOND_CC\'\n                    `BCOND_CC: branch_src <= carry == 0;\n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:38: Define or directive not defined: \'`BCOND_MI\'\n                    `BCOND_MI: branch_src <= negative == 1;\n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:39: Define or directive not defined: \'`BCOND_PL\'\n                    `BCOND_PL: branch_src <= negative == 0;\n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:40: Define or directive not defined: \'`BCOND_VS\'\n                    `BCOND_VS: branch_src <= overflow == 1;\n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:41: Define or directive not defined: \'`BCOND_VC\'\n                    `BCOND_VC: branch_src <= overflow == 0;\n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:42: Define or directive not defined: \'`BCOND_HI\'\n                    `BCOND_HI: branch_src <= (carry == 1) && (zero == 0);\n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:43: Define or directive not defined: \'`BCOND_LS\'\n                    `BCOND_LS: branch_src <= (carry == 0) || (zero == 0);\n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:44: Define or directive not defined: \'`BCOND_GE\'\n                    `BCOND_GE: branch_src <= negative == overflow;\n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:45: Define or directive not defined: \'`BCOND_LT\'\n                    `BCOND_LT: branch_src <= negative != overflow;\n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:46: Define or directive not defined: \'`BCOND_GT\'\n                    `BCOND_GT: branch_src <= (zero == 0) && (negative == overflow);\n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:47: Define or directive not defined: \'`BCOND_LE\'\n                    `BCOND_LE: branch_src <= (zero == 1) || (negative != overflow);\n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:48: Define or directive not defined: \'`BCOND_NV\'\n                    `BCOND_NV: branch_src <= \'b0;\n                    ^~~~~~~~~\n%Error: data/full_repos/permissive/180413071/nonpipelined/sources/hardware/memory/branch_source.v:49: Define or directive not defined: \'`BCOND_AL\'\n                    `BCOND_AL: branch_src <= \'b1;\n                    ^~~~~~~~~\n%Error: Cannot continue\n'
module branch_source(
    input      [4:0] conditional_branch,
    input      [2:0] branch_op,
    input            zero, 
    input            negative,
    input            overflow, 
    input            carry,
    output reg [1:0] branch_src
);

    always @* begin
        branch_src <= 'b00;
        
        case(branch_op)
            `BCOND_OP_BRANCH:
                branch_src <= 'b01;
            `BCOND_OP_ZERO:
                if (zero)
                    branch_src <= 'b01;
            `BCOND_OP_NZERO:
                if (!zero)
                    branch_src <= 'b01;
            `BCOND_OP_ALU:
                branch_src <= 'b10;
            `BCOND_OP_NOINC:
                branch_src <= 'b11;
            `BCOND_OP_COND:
                case(conditional_branch)
                    `BCOND_EQ: branch_src <= zero == 1; 
                    `BCOND_NE: branch_src <= zero == 0;
                    `BCOND_CS: branch_src <= carry == 1;
                    `BCOND_CC: branch_src <= carry == 0;
                    `BCOND_MI: branch_src <= negative == 1;
                    `BCOND_PL: branch_src <= negative == 0;
                    `BCOND_VS: branch_src <= overflow == 1;
                    `BCOND_VC: branch_src <= overflow == 0;
                    `BCOND_HI: branch_src <= (carry == 1) && (zero == 0);
                    `BCOND_LS: branch_src <= (carry == 0) || (zero == 0);
                    `BCOND_GE: branch_src <= negative == overflow;
                    `BCOND_LT: branch_src <= negative != overflow;
                    `BCOND_GT: branch_src <= (zero == 0) && (negative == overflow);
                    `BCOND_LE: branch_src <= (zero == 1) || (negative != overflow);
                    `BCOND_NV: branch_src <= 'b0;
                    `BCOND_AL: branch_src <= 'b1;
                    default:   branch_src <= 'b0;
                endcase
        endcase
    end

endmodule
module branch_source(
    input      [4:0] conditional_branch,
    input      [2:0] branch_op,
    input            zero, 
    input            negative,
    input            overflow, 
    input            carry,
    output reg [1:0] branch_src
);


    always @* begin
        branch_src <= 'b00;
        
        case(branch_op)
            `BCOND_OP_BRANCH:
                branch_src <= 'b01;
            `BCOND_OP_ZERO:
                if (zero)
                    branch_src <= 'b01;
            `BCOND_OP_NZERO:
                if (!zero)
                    branch_src <= 'b01;
            `BCOND_OP_ALU:
                branch_src <= 'b10;
            `BCOND_OP_NOINC:
                branch_src <= 'b11;
            `BCOND_OP_COND:
                case(conditional_branch)
                    `BCOND_EQ: branch_src <= zero == 1; 
                    `BCOND_NE: branch_src <= zero == 0;
                    `BCOND_CS: branch_src <= carry == 1;
                    `BCOND_CC: branch_src <= carry == 0;
                    `BCOND_MI: branch_src <= negative == 1;
                    `BCOND_PL: branch_src <= negative == 0;
                    `BCOND_VS: branch_src <= overflow == 1;
                    `BCOND_VC: branch_src <= overflow == 0;
                    `BCOND_HI: branch_src <= (carry == 1) && (zero == 0);
                    `BCOND_LS: branch_src <= (carry == 0) || (zero == 0);
                    `BCOND_GE: branch_src <= negative == overflow;
                    `BCOND_LT: branch_src <= negative != overflow;
                    `BCOND_GT: branch_src <= (zero == 0) && (negative == overflow);
                    `BCOND_LE: branch_src <= (zero == 1) || (negative != overflow);
                    `BCOND_NV: branch_src <= 'b0;
                    `BCOND_AL: branch_src <= 'b1;
                    default:   branch_src <= 'b0;
                endcase
        endcase
    end

endmodule