data/full_repos/permissive/146073027/Simple 32bit integer ALU.v
 line:28: before: "assign"
1: b'%Error: Cannot find file containing module: data/full_repos/permissive/146073027/Simple\n        ... Looked in:\n             data/full_repos/permissive/146073027,data/full_repos/permissive/146073027/data/full_repos/permissive/146073027/Simple\n             data/full_repos/permissive/146073027,data/full_repos/permissive/146073027/data/full_repos/permissive/146073027/Simple.v\n             data/full_repos/permissive/146073027,data/full_repos/permissive/146073027/data/full_repos/permissive/146073027/Simple.sv\n             data/full_repos/permissive/146073027/Simple\n             data/full_repos/permissive/146073027/Simple.v\n             data/full_repos/permissive/146073027/Simple.sv\n             obj_dir/data/full_repos/permissive/146073027/Simple\n             obj_dir/data/full_repos/permissive/146073027/Simple.v\n             obj_dir/data/full_repos/permissive/146073027/Simple.sv\n%Error: Cannot find file containing module: 32bit\n%Error: Cannot find file containing module: integer\n%Error: Cannot find file containing module: ALU.v\n%Error: Exiting due to 4 error(s)\n'
module sixteen_bit_multiplicator(out,in1,in2);
  output [32:0]out;
  input [15:0]in1,in2;
  wire [31:0]t1,t2,t3,t4,t5,t6,t7,t8,t9,t10,t11,t12,t13,t14,t15,t16,u2,u3,u4,u5,u6,u7,u8,u9,u10,u11,u12,u13,u14,u15,u16;
  wire c[0:14];
  wire [31:0]sum[0:14];
  
  four_bit_multiplicator fbm0(t1,in1[3:0],in2[3:0]);
  four_bit_multiplicator fbm1(t2,in1[7:4],in2[3:0]);
  four_bit_multiplicator fbm2(t3,in1[11:8],in2[3:0]);
  four_bit_multiplicator fbm3(t4,in1[15:12],in2[3:0]);
  
  four_bit_multiplicator fbm4(t5,in1[3:0],in2[7:4]);
  four_bit_multiplicator fbm5(t6,in1[7:4],in2[7:4]);
  four_bit_multiplicator fbm6(t7,in1[11:8],in2[7:4]);
  four_bit_multiplicator fbm7(t8,in1[15:12],in2[7:4]);
  
  four_bit_multiplicator fbm8(t9,in1[3:0],in2[11:8]);
  four_bit_multiplicator fbm9(t10,in1[7:4],in2[11:8]);
  four_bit_multiplicator fbm10(t11,in1[11:8],in2[11:8]);
  four_bit_multiplicator fbm11(t12,in1[15:12],in2[11:8]);
  
  four_bit_multiplicator fbm12(t13,in1[3:0],in2[15:12]);
  four_bit_multiplicator fbm13(t14,in1[7:4],in2[15:12]);
  four_bit_multiplicator fbm14(t15,in1[11:8],in2[15:12]);
  four_bit_multiplicator fbm15(t16,in1[15:12],in2[15:12]);
  
  assign u2=t2<<4;
  assign u3=t3<<8;
  assign u4=t4<<12;
  assign u5=t5<<4;
  assign u6=t6<<8;
  assign u7=t7<<12;
  assign u8=t8<<16;
  assign u9=t9<<8;
  assign u10=t10<<12;
  assign u11=t11<<16;
  assign u12=t12<<20;
  assign u13=t13<<12;
  assign u14=t14<<16;
  assign u15=t15<<20;
  assign u16=t16<<24;
  
  thirtytwo_bit_fa ttbf0(c[0],sum[0],0,t1,u2);
  thirtytwo_bit_fa ttbf1(c[1],sum[1],c[0],sum[0],u3);
  thirtytwo_bit_fa ttbf2(c[2],sum[2],c[1],sum[1],u4);
  thirtytwo_bit_fa ttbf3(c[3],sum[3],c[2],sum[2],u5);
  thirtytwo_bit_fa ttbf4(c[4],sum[4],c[3],sum[3],u6);
  thirtytwo_bit_fa ttbf5(c[5],sum[5],c[4],sum[4],u7);
  thirtytwo_bit_fa ttbf6(c[6],sum[6],c[5],sum[5],u8);
  thirtytwo_bit_fa ttbf7(c[7],sum[7],c[6],sum[6],u9);
  thirtytwo_bit_fa ttbf8(c[8],sum[8],c[7],sum[7],u10);
  thirtytwo_bit_fa ttbf9(c[9],sum[9],c[8],sum[8],u11);
  thirtytwo_bit_fa ttbf10(c[10],sum[10],c[9],sum[9],u12);
  thirtytwo_bit_fa ttbf11(c[11],sum[11],c[10],sum[10],u13);
  thirtytwo_bit_fa ttbf12(c[12],sum[12],c[11],sum[11],u14);
  thirtytwo_bit_fa ttbf13(c[13],sum[13],c[12],sum[12],u15);
  thirtytwo_bit_fa ttbf14(c[14],sum[14],c[13],sum[13],u16);
  
  assign out={c[14],sum[14]};
  
endmodule
module sixteen_bit_multiplicator(out,in1,in2);

  output [32:0]out;
  input [15:0]in1,in2;
  wire [31:0]t1,t2,t3,t4,t5,t6,t7,t8,t9,t10,t11,t12,t13,t14,t15,t16,u2,u3,u4,u5,u6,u7,u8,u9,u10,u11,u12,u13,u14,u15,u16;
  wire c[0:14];
  wire [31:0]sum[0:14];
  
  four_bit_multiplicator fbm0(t1,in1[3:0],in2[3:0]);
  four_bit_multiplicator fbm1(t2,in1[7:4],in2[3:0]);
  four_bit_multiplicator fbm2(t3,in1[11:8],in2[3:0]);
  four_bit_multiplicator fbm3(t4,in1[15:12],in2[3:0]);
  
  four_bit_multiplicator fbm4(t5,in1[3:0],in2[7:4]);
  four_bit_multiplicator fbm5(t6,in1[7:4],in2[7:4]);
  four_bit_multiplicator fbm6(t7,in1[11:8],in2[7:4]);
  four_bit_multiplicator fbm7(t8,in1[15:12],in2[7:4]);
  
  four_bit_multiplicator fbm8(t9,in1[3:0],in2[11:8]);
  four_bit_multiplicator fbm9(t10,in1[7:4],in2[11:8]);
  four_bit_multiplicator fbm10(t11,in1[11:8],in2[11:8]);
  four_bit_multiplicator fbm11(t12,in1[15:12],in2[11:8]);
  
  four_bit_multiplicator fbm12(t13,in1[3:0],in2[15:12]);
  four_bit_multiplicator fbm13(t14,in1[7:4],in2[15:12]);
  four_bit_multiplicator fbm14(t15,in1[11:8],in2[15:12]);
  four_bit_multiplicator fbm15(t16,in1[15:12],in2[15:12]);
  
  assign u2=t2<<4;
  assign u3=t3<<8;
  assign u4=t4<<12;
  assign u5=t5<<4;
  assign u6=t6<<8;
  assign u7=t7<<12;
  assign u8=t8<<16;
  assign u9=t9<<8;
  assign u10=t10<<12;
  assign u11=t11<<16;
  assign u12=t12<<20;
  assign u13=t13<<12;
  assign u14=t14<<16;
  assign u15=t15<<20;
  assign u16=t16<<24;
  
  thirtytwo_bit_fa ttbf0(c[0],sum[0],0,t1,u2);
  thirtytwo_bit_fa ttbf1(c[1],sum[1],c[0],sum[0],u3);
  thirtytwo_bit_fa ttbf2(c[2],sum[2],c[1],sum[1],u4);
  thirtytwo_bit_fa ttbf3(c[3],sum[3],c[2],sum[2],u5);
  thirtytwo_bit_fa ttbf4(c[4],sum[4],c[3],sum[3],u6);
  thirtytwo_bit_fa ttbf5(c[5],sum[5],c[4],sum[4],u7);
  thirtytwo_bit_fa ttbf6(c[6],sum[6],c[5],sum[5],u8);
  thirtytwo_bit_fa ttbf7(c[7],sum[7],c[6],sum[6],u9);
  thirtytwo_bit_fa ttbf8(c[8],sum[8],c[7],sum[7],u10);
  thirtytwo_bit_fa ttbf9(c[9],sum[9],c[8],sum[8],u11);
  thirtytwo_bit_fa ttbf10(c[10],sum[10],c[9],sum[9],u12);
  thirtytwo_bit_fa ttbf11(c[11],sum[11],c[10],sum[10],u13);
  thirtytwo_bit_fa ttbf12(c[12],sum[12],c[11],sum[11],u14);
  thirtytwo_bit_fa ttbf13(c[13],sum[13],c[12],sum[12],u15);
  thirtytwo_bit_fa ttbf14(c[14],sum[14],c[13],sum[13],u16);
  
  assign out={c[14],sum[14]};
  
endmodule