data/full_repos/permissive/169574047/module/module.srcs/sources_1/new/SR_latch.v
data/verilator_xmls/19c544ee-394d-4645-8f9e-9abb938035d2.xml
module SR_latch(Q, Qbar, Sbar, Rbar);

output Q,Qbar;
input Sbar,Rbar;
 
nand n1(Q, Sbar, Qbar);
nand n2(Qbar, Rbar, Q);

endmodule
module SR_latch(Q, Qbar, Sbar, Rbar);


output Q,Qbar;
input Sbar,Rbar;
 
nand n1(Q, Sbar, Qbar);
nand n2(Qbar, Rbar, Q);

endmodule