data/full_repos/permissive/191241380/zxuno/tld_zxuno.v
1: b"%Error: data/full_repos/permissive/191241380/zxuno/tld_zxuno.v:32: Cannot find file containing module: 'genreloj'\n  genreloj relojsistema (\n  ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/191241380/zxuno,data/full_repos/permissive/191241380/genreloj\n             data/full_repos/permissive/191241380/zxuno,data/full_repos/permissive/191241380/genreloj.v\n             data/full_repos/permissive/191241380/zxuno,data/full_repos/permissive/191241380/genreloj.sv\n             genreloj\n             genreloj.v\n             genreloj.sv\n             obj_dir/genreloj\n             obj_dir/genreloj.v\n             obj_dir/genreloj.sv\n%Error: data/full_repos/permissive/191241380/zxuno/tld_zxuno.v:41: Cannot find file containing module: 'vga_text'\n  vga_text sistema (\n  ^~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module tld_vga_text_zxuno (
  input wire clk50mhz,

  output wire [2:0] ro,
  output wire [2:0] go,
  output wire [2:0] bo,
  output wire hsync,
  output wire vsync
  );

  wire sysclk;
  genreloj relojsistema (
    .CLK_IN1(clk50mhz),
    .CLK_OUT1(sysclk)
    );

  wire r,g,b;
  assign ro = {r,r,r};
  assign go = {g,g,g};
  assign bo = {b,b,b};  
  vga_text sistema (
    .vclk(sysclk),

    .addr(12'h0000),
    .din(8'h00),
    .we(1'b0),
    .dout(),

    .red(r),
    .green(g),
    .blue(b),
    .hsync(hsync),
    .vsync(vsync)
  );
endmodule
module tld_vga_text_zxuno (
  input wire clk50mhz,

  output wire [2:0] ro,
  output wire [2:0] go,
  output wire [2:0] bo,
  output wire hsync,
  output wire vsync
  );


  wire sysclk;
  genreloj relojsistema (
    .CLK_IN1(clk50mhz),
    .CLK_OUT1(sysclk)
    );

  wire r,g,b;
  assign ro = {r,r,r};
  assign go = {g,g,g};
  assign bo = {b,b,b};  
  vga_text sistema (
    .vclk(sysclk),

    .addr(12'h0000),
    .din(8'h00),
    .we(1'b0),
    .dout(),

    .red(r),
    .green(g),
    .blue(b),
    .hsync(hsync),
    .vsync(vsync)
  );
endmodule