data/full_repos/permissive/129155059/03-library/cosa.v
[Errno 2] No such file or directory: 'preprocess.output'
1: b'%Warning-STMTDLY: data/full_repos/permissive/129155059/03-library/cosa.v:120: Unsupported: Ignoring delay on this delayed statement.\n    #1 LE = 0;\n    ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/129155059/03-library/cosa.v:123: Unsupported: Ignoring delay on this delayed statement.\n      #1 Contador = 0;\n      ^\n%Error: data/full_repos/permissive/129155059/03-library/cosa.v:128: Unsupported: Seeding $random doesn\'t map to C++, use $c("srand")\n    oprA = $random(semilla);\n           ^~~~~~~\n%Error: Internal Error: data/full_repos/permissive/129155059/03-library/cosa.v:128: ../V3Ast.cpp:358: Null item passed to setOp1p\n    oprA = $random(semilla);\n         ^\n                        ... See the manual and https://verilator.org for more assistance.\n'
module memTrans (dir, LE, dato);
  input [`Ndir:0] dir;
  input LE;
  inout [31:0] dato;
  reg [31:0] PwrCntr [`NumPwrCntr:0];

  assign dato = (LE)? PwrCntr[dir] : 32'bz;

  always @(dir or negedge LE or dato) begin
    if (~LE)
      PwrCntr[dir] = dato;
  end

endmodule
module memTrans (dir, LE, dato);

  input [`Ndir:0] dir;
  input LE;
  inout [31:0] dato;
  reg [31:0] PwrCntr [`NumPwrCntr:0];

  assign dato = (LE)? PwrCntr[dir] : 32'bz;

  always @(dir or negedge LE or dato) begin
    if (~LE)
      PwrCntr[dir] = dato;
  end

endmodule