data/full_repos/permissive/16157344/prescaler.v
1: b'%Warning-WIDTH: data/full_repos/permissive/16157344/prescaler.v:24: Operator EQ expects 14 bits on the LHS, but LHS\'s VARREF \'bitCount\' generates 13 bits.\n                                                                  : ... In instance prescaler\n     if (bitCount == 14\'b0) \n                  ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module prescaler
	#(
		parameter bitTime = 5208,
							N = 13
	)
	(
		input clk, rst,

		output wire [N-1:0] q
	);
	
	reg [N-1:0] bitCount;


	always @(posedge clk)
		begin
			if (rst)

					bitCount = bitTime;


			else
				begin
					if (bitCount == 14'b0) 


							bitCount = bitTime;

					else bitCount = bitCount - 1'b1; 
				end
		end


	assign q = bitCount;

endmodule
module prescaler
	#(
		parameter bitTime = 5208,
							N = 13
	)
	(
		input clk, rst,

		output wire [N-1:0] q
	);

	
	reg [N-1:0] bitCount;


	always @(posedge clk)
		begin
			if (rst)

					bitCount = bitTime;


			else
				begin
					if (bitCount == 14'b0) 


							bitCount = bitTime;

					else bitCount = bitCount - 1'b1; 
				end
		end


	assign q = bitCount;

endmodule