data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v
1: b"%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:18: Cannot find file containing module: 'XOR2'\n    XOR2 \\Y_0[4]  (.A(\\B_c[4] ), .B(\\A_c[4] ), .Y(\\Y_c[4] ));\n    ^~~~\n        ... Looked in:\n             data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis,data/full_repos/permissive/165160692/XOR2\n             data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis,data/full_repos/permissive/165160692/XOR2.v\n             data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis,data/full_repos/permissive/165160692/XOR2.sv\n             XOR2\n             XOR2.v\n             XOR2.sv\n             obj_dir/XOR2\n             obj_dir/XOR2.v\n             obj_dir/XOR2.sv\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:19: Cannot find file containing module: 'INBUF'\n    INBUF \\B_pad[3]  (.PAD(B[3]), .Y(\\B_c[3] ));\n    ^~~~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:20: Cannot find file containing module: 'INBUF'\n    INBUF \\B_pad[2]  (.PAD(B[2]), .Y(\\B_c[2] ));\n    ^~~~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:21: Cannot find file containing module: 'GND'\n    GND GND_i_0 (.Y(GND_0));\n    ^~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:22: Cannot find file containing module: 'XOR2'\n    XOR2 \\Y_0[3]  (.A(\\B_c[3] ), .B(\\A_c[3] ), .Y(\\Y_c[3] ));\n    ^~~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:23: Cannot find file containing module: 'INBUF'\n    INBUF \\B_pad[4]  (.PAD(B[4]), .Y(\\B_c[4] ));\n    ^~~~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:24: Cannot find file containing module: 'VCC'\n    VCC VCC_i (.Y(VCC));\n    ^~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:25: Cannot find file containing module: 'INBUF'\n    INBUF \\A_pad[4]  (.PAD(A[4]), .Y(\\A_c[4] ));\n    ^~~~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:26: Cannot find file containing module: 'INBUF'\n    INBUF \\B_pad[1]  (.PAD(B[1]), .Y(\\B_c[1] ));\n    ^~~~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:27: Cannot find file containing module: 'INBUF'\n    INBUF \\A_pad[2]  (.PAD(A[2]), .Y(\\A_c[2] ));\n    ^~~~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:28: Cannot find file containing module: 'GND'\n    GND GND_i (.Y(GND));\n    ^~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:29: Cannot find file containing module: 'INBUF'\n    INBUF \\A_pad[3]  (.PAD(A[3]), .Y(\\A_c[3] ));\n    ^~~~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:30: Cannot find file containing module: 'XOR2'\n    XOR2 \\Y_0[1]  (.A(\\B_c[1] ), .B(\\A_c[1] ), .Y(\\Y_c[1] ));\n    ^~~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:31: Cannot find file containing module: 'OUTBUF'\n    OUTBUF \\Y_pad[4]  (.D(\\Y_c[4] ), .PAD(Y[4]));\n    ^~~~~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:32: Cannot find file containing module: 'VCC'\n    VCC VCC_i_0 (.Y(VCC_0));\n    ^~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:33: Cannot find file containing module: 'XOR2'\n    XOR2 \\Y_0[2]  (.A(\\B_c[2] ), .B(\\A_c[2] ), .Y(\\Y_c[2] ));\n    ^~~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:34: Cannot find file containing module: 'INBUF'\n    INBUF \\A_pad[1]  (.PAD(A[1]), .Y(\\A_c[1] ));\n    ^~~~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:35: Cannot find file containing module: 'OUTBUF'\n    OUTBUF \\Y_pad[1]  (.D(\\Y_c[1] ), .PAD(Y[1]));\n    ^~~~~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:36: Cannot find file containing module: 'OUTBUF'\n    OUTBUF \\Y_pad[2]  (.D(\\Y_c[2] ), .PAD(Y[2]));\n    ^~~~~~\n%Error: data/full_repos/permissive/165160692/04.FPGA/5932_74HC86/synthesis/HC86.v:37: Cannot find file containing module: 'OUTBUF'\n    OUTBUF \\Y_pad[3]  (.D(\\Y_c[3] ), .PAD(Y[3]));\n    ^~~~~~\n%Error: Exiting due to 20 error(s)\n"
module HC86(
       A,
       B,
       Y
    );
input  [4:1] A;
input  [4:1] B;
output [4:1] Y;

    wire GND, VCC, \A_c[1] , \A_c[2] , \A_c[3] , \A_c[4] , \B_c[1] , 
        \B_c[2] , \B_c[3] , \B_c[4] , \Y_c[1] , \Y_c[2] , \Y_c[3] , 
        \Y_c[4] , GND_0, VCC_0;
    
    XOR2 \Y_0[4]  (.A(\B_c[4] ), .B(\A_c[4] ), .Y(\Y_c[4] ));
    INBUF \B_pad[3]  (.PAD(B[3]), .Y(\B_c[3] ));
    INBUF \B_pad[2]  (.PAD(B[2]), .Y(\B_c[2] ));
    GND GND_i_0 (.Y(GND_0));
    XOR2 \Y_0[3]  (.A(\B_c[3] ), .B(\A_c[3] ), .Y(\Y_c[3] ));
    INBUF \B_pad[4]  (.PAD(B[4]), .Y(\B_c[4] ));
    VCC VCC_i (.Y(VCC));
    INBUF \A_pad[4]  (.PAD(A[4]), .Y(\A_c[4] ));
    INBUF \B_pad[1]  (.PAD(B[1]), .Y(\B_c[1] ));
    INBUF \A_pad[2]  (.PAD(A[2]), .Y(\A_c[2] ));
    GND GND_i (.Y(GND));
    INBUF \A_pad[3]  (.PAD(A[3]), .Y(\A_c[3] ));
    XOR2 \Y_0[1]  (.A(\B_c[1] ), .B(\A_c[1] ), .Y(\Y_c[1] ));
    OUTBUF \Y_pad[4]  (.D(\Y_c[4] ), .PAD(Y[4]));
    VCC VCC_i_0 (.Y(VCC_0));
    XOR2 \Y_0[2]  (.A(\B_c[2] ), .B(\A_c[2] ), .Y(\Y_c[2] ));
    INBUF \A_pad[1]  (.PAD(A[1]), .Y(\A_c[1] ));
    OUTBUF \Y_pad[1]  (.D(\Y_c[1] ), .PAD(Y[1]));
    OUTBUF \Y_pad[2]  (.D(\Y_c[2] ), .PAD(Y[2]));
    OUTBUF \Y_pad[3]  (.D(\Y_c[3] ), .PAD(Y[3]));
    
endmodule
module HC86(
       A,
       B,
       Y
    );

input  [4:1] A;
input  [4:1] B;
output [4:1] Y;

    wire GND, VCC, \A_c[1] , \A_c[2] , \A_c[3] , \A_c[4] , \B_c[1] , 
        \B_c[2] , \B_c[3] , \B_c[4] , \Y_c[1] , \Y_c[2] , \Y_c[3] , 
        \Y_c[4] , GND_0, VCC_0;
    
    XOR2 \Y_0[4]  (.A(\B_c[4] ), .B(\A_c[4] ), .Y(\Y_c[4] ));
    INBUF \B_pad[3]  (.PAD(B[3]), .Y(\B_c[3] ));
    INBUF \B_pad[2]  (.PAD(B[2]), .Y(\B_c[2] ));
    GND GND_i_0 (.Y(GND_0));
    XOR2 \Y_0[3]  (.A(\B_c[3] ), .B(\A_c[3] ), .Y(\Y_c[3] ));
    INBUF \B_pad[4]  (.PAD(B[4]), .Y(\B_c[4] ));
    VCC VCC_i (.Y(VCC));
    INBUF \A_pad[4]  (.PAD(A[4]), .Y(\A_c[4] ));
    INBUF \B_pad[1]  (.PAD(B[1]), .Y(\B_c[1] ));
    INBUF \A_pad[2]  (.PAD(A[2]), .Y(\A_c[2] ));
    GND GND_i (.Y(GND));
    INBUF \A_pad[3]  (.PAD(A[3]), .Y(\A_c[3] ));
    XOR2 \Y_0[1]  (.A(\B_c[1] ), .B(\A_c[1] ), .Y(\Y_c[1] ));
    OUTBUF \Y_pad[4]  (.D(\Y_c[4] ), .PAD(Y[4]));
    VCC VCC_i_0 (.Y(VCC_0));
    XOR2 \Y_0[2]  (.A(\B_c[2] ), .B(\A_c[2] ), .Y(\Y_c[2] ));
    INBUF \A_pad[1]  (.PAD(A[1]), .Y(\A_c[1] ));
    OUTBUF \Y_pad[1]  (.D(\Y_c[1] ), .PAD(Y[1]));
    OUTBUF \Y_pad[2]  (.D(\Y_c[2] ), .PAD(Y[2]));
    OUTBUF \Y_pad[3]  (.D(\Y_c[3] ), .PAD(Y[3]));
    
endmodule