data/full_repos/permissive/133458123/mips_processor/mips_processor.srcs/sources_1/new/four_bit_adder.v
1: b"%Error: data/full_repos/permissive/133458123/mips_processor/mips_processor.srcs/sources_1/new/four_bit_adder.v:13: Cannot find file containing module: 'full_adder'\nfull_adder add1(.x(x[0]), .y(y[0]), .c_in(c_in), .sum(sum[0]), .c_out(co_1));\n^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/133458123/mips_processor/mips_processor.srcs/sources_1/new,data/full_repos/permissive/133458123/full_adder\n             data/full_repos/permissive/133458123/mips_processor/mips_processor.srcs/sources_1/new,data/full_repos/permissive/133458123/full_adder.v\n             data/full_repos/permissive/133458123/mips_processor/mips_processor.srcs/sources_1/new,data/full_repos/permissive/133458123/full_adder.sv\n             full_adder\n             full_adder.v\n             full_adder.sv\n             obj_dir/full_adder\n             obj_dir/full_adder.v\n             obj_dir/full_adder.sv\n%Error: data/full_repos/permissive/133458123/mips_processor/mips_processor.srcs/sources_1/new/four_bit_adder.v:14: Cannot find file containing module: 'full_adder'\nfull_adder add2(.x(x[1]), .y(y[1]), .c_in(co_1), .sum(sum[1]), .c_out(co_2));\n^~~~~~~~~~\n%Error: data/full_repos/permissive/133458123/mips_processor/mips_processor.srcs/sources_1/new/four_bit_adder.v:15: Cannot find file containing module: 'full_adder'\nfull_adder add3(.x(x[2]), .y(y[2]), .c_in(co_2), .sum(sum[2]), .c_out(co_3));\n^~~~~~~~~~\n%Error: data/full_repos/permissive/133458123/mips_processor/mips_processor.srcs/sources_1/new/four_bit_adder.v:16: Cannot find file containing module: 'full_adder'\nfull_adder add4(.x(x[3]), .y(y[3]), .c_in(co_3), .sum(sum[3]), .c_out(c_out));\n^~~~~~~~~~\n%Error: Exiting due to 4 error(s)\n"
module four_bit_adder(input wire [3:0] x, input wire [3:0] y, input wire c_in, output wire [3:0] sum, output wire c_out);







wire co_1, co_2, co_3;

full_adder add1(.x(x[0]), .y(y[0]), .c_in(c_in), .sum(sum[0]), .c_out(co_1));
full_adder add2(.x(x[1]), .y(y[1]), .c_in(co_1), .sum(sum[1]), .c_out(co_2));
full_adder add3(.x(x[2]), .y(y[2]), .c_in(co_2), .sum(sum[2]), .c_out(co_3));
full_adder add4(.x(x[3]), .y(y[3]), .c_in(co_3), .sum(sum[3]), .c_out(c_out));

endmodule
module four_bit_adder(input wire [3:0] x, input wire [3:0] y, input wire c_in, output wire [3:0] sum, output wire c_out);








wire co_1, co_2, co_3;

full_adder add1(.x(x[0]), .y(y[0]), .c_in(c_in), .sum(sum[0]), .c_out(co_1));
full_adder add2(.x(x[1]), .y(y[1]), .c_in(co_1), .sum(sum[1]), .c_out(co_2));
full_adder add3(.x(x[2]), .y(y[2]), .c_in(co_2), .sum(sum[2]), .c_out(co_3));
full_adder add4(.x(x[3]), .y(y[3]), .c_in(co_3), .sum(sum[3]), .c_out(c_out));

endmodule