data/full_repos/permissive/118303050/src/lab_4/mips.v
1: b"%Error: data/full_repos/permissive/118303050/src/lab_4/mips.v:38: Cannot find file containing module: 'controller'\n controller c(\n ^~~~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/118303050/src/lab_4,data/full_repos/permissive/118303050/controller\n             data/full_repos/permissive/118303050/src/lab_4,data/full_repos/permissive/118303050/controller.v\n             data/full_repos/permissive/118303050/src/lab_4,data/full_repos/permissive/118303050/controller.sv\n             controller\n             controller.v\n             controller.sv\n             obj_dir/controller\n             obj_dir/controller.v\n             obj_dir/controller.sv\n%Error: data/full_repos/permissive/118303050/src/lab_4/mips.v:56: Cannot find file containing module: 'datapath'\n datapath dp(\n ^~~~~~~~\n%Error: Exiting due to 2 error(s)\n"
module mips(
	input wire clk,rst,
	output wire[31:0] pcF,
	input wire[31:0] instrF,
	output wire memwriteM,
	output wire[31:0] aluoutM,writedataM,
	input wire[31:0] readdataM 
    );
	
	wire [5:0] opD,functD;
	wire regdstE,alusrcE,pcsrcD,memtoregE,memtoregM,memtoregW,
			regwriteE,regwriteM,regwriteW;
	wire [2:0] alucontrolE;
	wire flushE,equalD;

	controller c(
		clk,rst,

		opD,functD,
		pcsrcD,branchD,equalD,jumpD,
		

		flushE,
		memtoregE,alusrcE,
		regdstE,regwriteE,	
		alucontrolE,


		memtoregM,memwriteM,
		regwriteM,

		memtoregW,regwriteW
		);
	datapath dp(
		clk,rst,

		pcF,
		instrF,

		pcsrcD,branchD,
		jumpD,
		equalD,
		opD,functD,

		memtoregE,
		alusrcE,regdstE,
		regwriteE,
		alucontrolE,
		flushE,

		memtoregM,
		regwriteM,
		aluoutM,writedataM,
		readdataM,

		memtoregW,
		regwriteW
	    );
	
endmodule
module mips(
	input wire clk,rst,
	output wire[31:0] pcF,
	input wire[31:0] instrF,
	output wire memwriteM,
	output wire[31:0] aluoutM,writedataM,
	input wire[31:0] readdataM 
    );

	
	wire [5:0] opD,functD;
	wire regdstE,alusrcE,pcsrcD,memtoregE,memtoregM,memtoregW,
			regwriteE,regwriteM,regwriteW;
	wire [2:0] alucontrolE;
	wire flushE,equalD;

	controller c(
		clk,rst,

		opD,functD,
		pcsrcD,branchD,equalD,jumpD,
		

		flushE,
		memtoregE,alusrcE,
		regdstE,regwriteE,	
		alucontrolE,


		memtoregM,memwriteM,
		regwriteM,

		memtoregW,regwriteW
		);
	datapath dp(
		clk,rst,

		pcF,
		instrF,

		pcsrcD,branchD,
		jumpD,
		equalD,
		opD,functD,

		memtoregE,
		alusrcE,regdstE,
		regwriteE,
		alucontrolE,
		flushE,

		memtoregM,
		regwriteM,
		aluoutM,writedataM,
		readdataM,

		memtoregW,
		regwriteW
	    );
	
endmodule