data/full_repos/permissive/143278/ivltests/pr2890322.v
 line:21: before: "$"
1: b'%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/pr2890322.v:21: Unsupported: Ignoring delay on this delayed statement.\n  #1 $display(Result);\n  ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n        ... See the manual and https://verilator.org for more assistance.\n'
module pr2890322;

reg [7:0] Array[0:1];

function [7:0] Sum;

input [7:0] a;
input [7:0] b;

begin
  Sum = a + b;
end

endfunction

wire [7:0] Result = Sum(Array[0], Array[1]);

initial begin
  Array[0] = 1;
  Array[1] = 2;
  #1 $display(Result);
  if (Result === 3)
    $display("PASSED");
  else
    $display("FAILED");
end

endmodule
module pr2890322;


reg [7:0] Array[0:1];

function [7:0] Sum;

input [7:0] a;
input [7:0] b;

begin
  Sum = a + b;
end

endfunction

wire [7:0] Result = Sum(Array[0], Array[1]);

initial begin
  Array[0] = 1;
  Array[1] = 2;
  #1 $display(Result);
  if (Result === 3)
    $display("PASSED");
  else
    $display("FAILED");
end

endmodule