data/full_repos/permissive/123193385/FaultCollapsing-/input/Benchmark/test4.v
1: b"%Error: data/full_repos/permissive/123193385/FaultCollapsing-/input/Benchmark/test4.v:1: Input/output/inout declaration not found for port: 'N4'\nmodule sample (N1,N2,N4); \n                     ^~\n%Error: data/full_repos/permissive/123193385/FaultCollapsing-/input/Benchmark/test4.v:3: Input/output/inout does not appear in port list: 'N6'\noutput N6;\n       ^~\n%Error: Exiting due to 2 error(s)\n"
module sample (N1,N2,N4); 
input N1,N2;
output N6;
wire N5;

NOR2X1 AND_1 (.Y(N5),.A(N1),.B(N2)); 
INVX1 INV_1 (.Y(N4),.A(N5));
BUFX1 BUFF1_109 (.Y(N6),.A(N4));
endmodule
module sample (N1,N2,N4);
 
input N1,N2;
output N6;
wire N5;

NOR2X1 AND_1 (.Y(N5),.A(N1),.B(N2)); 
INVX1 INV_1 (.Y(N4),.A(N5));
BUFX1 BUFF1_109 (.Y(N6),.A(N4));
endmodule