data/full_repos/permissive/143278/ivltests/pr2834340.v
 line:6: before: "pd1"
1: b'%Error: data/full_repos/permissive/143278/ivltests/pr2834340.v:6: syntax error, unexpected (-for-strength, expecting \'(\'\npulldown (weak0) pd1 (r1a,r1c,r1o);\n          ^~~~~\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/pr2834340.v:24: Unsupported: Ignoring delay on this delayed statement.\n      #10;\n      ^\n                  ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.\n%Warning-STMTDLY: data/full_repos/permissive/143278/ivltests/pr2834340.v:26: Unsupported: Ignoring delay on this delayed statement.\n      #10;\n      ^\n%Error: data/full_repos/permissive/143278/ivltests/pr2834340.v:46: Unsupported: Verilog 1995 gate primitive: tranif1\ntranif1 t1 (ARM,NC,coil_off);\n        ^~\n%Error: data/full_repos/permissive/143278/ivltests/pr2834340.v:47: Unsupported: Verilog 1995 gate primitive: tranif1\ntranif1 t2 (ARM,NO,coil_on);\n        ^~\n%Error: Exiting due to 3 error(s), 2 warning(s)\n'
module test;

reg c1reg,c2reg;
pulldown (weak0) pd1 (r1a,r1c,r1o);
pulldown (weak0) pd2 (r2a,r2c,r2o);

pulldown pd (r1a);
pullup pu (r2a);

wire c1 = c1reg;
wire c2 = c2reg;
SPDT_RELAY r1 (.COIL1(c1), .COIL2(c2), .ARM(r1a), .NC(r1c), .NO(r1o));
SPDT_RELAY r2 (.COIL1(c1), .COIL2(c2), .ARM(r2a), .NC(r2c), .NO(r2o));

initial
begin
  c1reg = 0;
  c2reg = 0;
  repeat (16)
    begin
      c1reg = 1;
      #10;
      c1reg = 0;
      #10;
    end
  $display ("%t: Test passed.",$realtime);
  $display ("PASSED");
  $finish;
end
endmodule
module test;


reg c1reg,c2reg;
pulldown (weak0) pd1 (r1a,r1c,r1o);
pulldown (weak0) pd2 (r2a,r2c,r2o);

pulldown pd (r1a);
pullup pu (r2a);

wire c1 = c1reg;
wire c2 = c2reg;
SPDT_RELAY r1 (.COIL1(c1), .COIL2(c2), .ARM(r1a), .NC(r1c), .NO(r1o));
SPDT_RELAY r2 (.COIL1(c1), .COIL2(c2), .ARM(r2a), .NC(r2c), .NO(r2o));

initial
begin
  c1reg = 0;
  c2reg = 0;
  repeat (16)
    begin
      c1reg = 1;
      #10;
      c1reg = 0;
      #10;
    end
  $display ("%t: Test passed.",$realtime);
  $display ("PASSED");
  $finish;
end
endmodule