data/full_repos/permissive/182791900/HDL-Demo/0.LED/LED/sch_read.v
 line:303: before: "arbiter_addr_fx2arbiter_next_value2"
1: b'%Warning-PINMISSING: data/full_repos/permissive/182791900/HDL-Demo/0.LED/LED/sch_read.v:90: Cell has missing pin: \'en\'\n  reg_ar_as_w3 reg0 (\n               ^~~~\n                     ... Use "/* verilator lint_off PINMISSING */" and lint_on around source to disable this message.\n%Warning-PINMISSING: data/full_repos/permissive/182791900/HDL-Demo/0.LED/LED/sch_read.v:96: Cell has missing pin: \'en\'\n  reg_ar_as_w2 reg1 (\n               ^~~~\n%Warning-PINMISSING: data/full_repos/permissive/182791900/HDL-Demo/0.LED/LED/sch_read.v:102: Cell has missing pin: \'en\'\n  reg_ar_as_w25 reg2 (\n                ^~~~\n%Error: Exiting due to 3 warning(s)\n'
module led
  (
  CLK_IN,
  RST_N,
  keyB,
  RGB_LED
  );

  input CLK_IN;
  input RST_N;
  input keyB;
  output [2:0] RGB_LED;

  parameter time1 = 25'b1011011100011011000000000;
  wire [24:0] count;
  wire [2:0] n1;
  wire [2:0] n10;
  wire [1:0] n11;
  wire [1:0] n2;
  wire [1:0] n5;
  wire [2:0] n6;
  wire [1:0] n7;
  wire [24:0] n8;
  wire [24:0] n9;
  wire [2:0] rledout;
  wire [1:0] shift_cnt;
  wire n0;
  wire n3;
  wire n4;

  add_pu2_pu2_o2 add0 (
    .i0(shift_cnt),
    .i1(2'b01),
    .o(n5));
  add_pu25_pu25_o25 add1 (
    .i0(count),
    .i1(25'b0000000000000000000000001),
    .o(n8));
  eq_w1 eq0 (
    .i0(RST_N),
    .i1(1'b0),
    .o(n0));
  eq_w25 eq1 (
    .i0(count),
    .i1(25'b1011011100011011000000000),
    .o(n3));
  eq_w2 eq2 (
    .i0(shift_cnt),
    .i1(2'b10),
    .o(n4));
  binary_mux_s1_w3 mux0 (
    .i0(rledout),
    .i1(3'b001),
    .sel(n0),
    .o(n1));
  binary_mux_s1_w2 mux1 (
    .i0(shift_cnt),
    .i1(2'b00),
    .sel(n0),
    .o(n2));
  binary_mux_s1_w3 mux2 (
    .i0({rledout[1:0],1'b0}),
    .i1(3'b001),
    .sel(n4),
    .o(n6));
  binary_mux_s1_w2 mux3 (
    .i0(n5),
    .i1(2'b00),
    .sel(n4),
    .o(n7));
  binary_mux_s1_w25 mux4 (
    .i0(n8),
    .i1(25'b0000000000000000000000000),
    .sel(n3),
    .o(n9));
  binary_mux_s1_w3 mux5 (
    .i0(n1),
    .i1(n6),
    .sel(n3),
    .o(n10));
  binary_mux_s1_w2 mux6 (
    .i0(n2),
    .i1(n7),
    .sel(n3),
    .o(n11));
  reg_ar_as_w3 reg0 (
    .clk(CLK_IN),
    .d(n10),
    .reset(3'b000),
    .set(3'b000),
    .q(rledout));
  reg_ar_as_w2 reg1 (
    .clk(CLK_IN),
    .d(n11),
    .reset(2'b00),
    .set(2'b00),
    .q(shift_cnt));
  reg_ar_as_w25 reg2 (
    .clk(CLK_IN),
    .d(n9),
    .reset(25'b0000000000000000000000000),
    .set(25'b0000000000000000000000000),
    .q(count));
  buf u2 (RGB_LED[2], rledout[2]);
  buf u3 (RGB_LED[1], rledout[1]);
  buf u4 (RGB_LED[0], rledout[0]);

endmodule
module led
  (
  CLK_IN,
  RST_N,
  keyB,
  RGB_LED
  );


  input CLK_IN;
  input RST_N;
  input keyB;
  output [2:0] RGB_LED;

  parameter time1 = 25'b1011011100011011000000000;
  wire [24:0] count;
  wire [2:0] n1;
  wire [2:0] n10;
  wire [1:0] n11;
  wire [1:0] n2;
  wire [1:0] n5;
  wire [2:0] n6;
  wire [1:0] n7;
  wire [24:0] n8;
  wire [24:0] n9;
  wire [2:0] rledout;
  wire [1:0] shift_cnt;
  wire n0;
  wire n3;
  wire n4;

  add_pu2_pu2_o2 add0 (
    .i0(shift_cnt),
    .i1(2'b01),
    .o(n5));
  add_pu25_pu25_o25 add1 (
    .i0(count),
    .i1(25'b0000000000000000000000001),
    .o(n8));
  eq_w1 eq0 (
    .i0(RST_N),
    .i1(1'b0),
    .o(n0));
  eq_w25 eq1 (
    .i0(count),
    .i1(25'b1011011100011011000000000),
    .o(n3));
  eq_w2 eq2 (
    .i0(shift_cnt),
    .i1(2'b10),
    .o(n4));
  binary_mux_s1_w3 mux0 (
    .i0(rledout),
    .i1(3'b001),
    .sel(n0),
    .o(n1));
  binary_mux_s1_w2 mux1 (
    .i0(shift_cnt),
    .i1(2'b00),
    .sel(n0),
    .o(n2));
  binary_mux_s1_w3 mux2 (
    .i0({rledout[1:0],1'b0}),
    .i1(3'b001),
    .sel(n4),
    .o(n6));
  binary_mux_s1_w2 mux3 (
    .i0(n5),
    .i1(2'b00),
    .sel(n4),
    .o(n7));
  binary_mux_s1_w25 mux4 (
    .i0(n8),
    .i1(25'b0000000000000000000000000),
    .sel(n3),
    .o(n9));
  binary_mux_s1_w3 mux5 (
    .i0(n1),
    .i1(n6),
    .sel(n3),
    .o(n10));
  binary_mux_s1_w2 mux6 (
    .i0(n2),
    .i1(n7),
    .sel(n3),
    .o(n11));
  reg_ar_as_w3 reg0 (
    .clk(CLK_IN),
    .d(n10),
    .reset(3'b000),
    .set(3'b000),
    .q(rledout));
  reg_ar_as_w2 reg1 (
    .clk(CLK_IN),
    .d(n11),
    .reset(2'b00),
    .set(2'b00),
    .q(shift_cnt));
  reg_ar_as_w25 reg2 (
    .clk(CLK_IN),
    .d(n9),
    .reset(25'b0000000000000000000000000),
    .set(25'b0000000000000000000000000),
    .q(count));
  buf u2 (RGB_LED[2], rledout[2]);
  buf u3 (RGB_LED[1], rledout[1]);
  buf u4 (RGB_LED[0], rledout[0]);

endmodule