data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v
1: b'%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:15: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h29\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h000E: set1_lsb <= 16\'h0029;\n                    ^~\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:16: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h2\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0016: set1_lsb <= 16\'h0002;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:17: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h3\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h001E: set1_lsb <= 16\'h0003;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:18: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h4\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0026: set1_lsb <= 16\'h0004;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:19: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h5\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0025: set1_lsb <= 16\'h0005;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:20: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h6\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h002E: set1_lsb <= 16\'h0006;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:21: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h7\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0036: set1_lsb <= 16\'h0007;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:22: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h8\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h003D: set1_lsb <= 16\'h0008;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:23: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h9\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h003E: set1_lsb <= 16\'h0009;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:24: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'ha\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0046: set1_lsb <= 16\'h000A;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:25: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'hb\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0045: set1_lsb <= 16\'h000B;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:26: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'hc\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h004E: set1_lsb <= 16\'h000C;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:27: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'hd\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0055: set1_lsb <= 16\'h000D;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:28: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'he\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0066: set1_lsb <= 16\'h000E;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:29: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'hf\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h000D: set1_lsb <= 16\'h000F;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:30: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h10\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0015: set1_lsb <= 16\'h0010;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:31: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h11\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h001D: set1_lsb <= 16\'h0011;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:32: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h12\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0024: set1_lsb <= 16\'h0012;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:33: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h13\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h002D: set1_lsb <= 16\'h0013;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:34: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h14\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h002C: set1_lsb <= 16\'h0014;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:35: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h15\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0035: set1_lsb <= 16\'h0015;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:36: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h16\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h003C: set1_lsb <= 16\'h0016;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:37: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h17\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0043: set1_lsb <= 16\'h0017;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:38: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h18\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0044: set1_lsb <= 16\'h0018;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:39: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h19\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h004D: set1_lsb <= 16\'h0019;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:40: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h1a\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0054: set1_lsb <= 16\'h001A;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:41: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h1b\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h005B: set1_lsb <= 16\'h001B;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:42: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h3a\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0058: set1_lsb <= 16\'h003A;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:43: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h1e\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h001C: set1_lsb <= 16\'h001E;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:44: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h1f\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h001B: set1_lsb <= 16\'h001F;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:45: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h20\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0023: set1_lsb <= 16\'h0020;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:46: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h21\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h002B: set1_lsb <= 16\'h0021;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:47: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h22\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0034: set1_lsb <= 16\'h0022;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:48: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h23\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0033: set1_lsb <= 16\'h0023;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:49: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h24\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h003B: set1_lsb <= 16\'h0024;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:50: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h25\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0042: set1_lsb <= 16\'h0025;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:51: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h26\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h004B: set1_lsb <= 16\'h0026;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:52: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h27\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h004C: set1_lsb <= 16\'h0027;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:53: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h28\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0052: set1_lsb <= 16\'h0028;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:54: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h1c\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h005A: set1_lsb <= 16\'h001C;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:55: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h2a\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0012: set1_lsb <= 16\'h002A;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:56: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h2c\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h001A: set1_lsb <= 16\'h002C;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:57: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h2d\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0022: set1_lsb <= 16\'h002D;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:58: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h2e\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0021: set1_lsb <= 16\'h002E;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:59: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h2f\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h002A: set1_lsb <= 16\'h002F;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:60: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h30\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0032: set1_lsb <= 16\'h0030;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:61: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h31\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0031: set1_lsb <= 16\'h0031;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:62: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h32\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h003A: set1_lsb <= 16\'h0032;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:63: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h33\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0041: set1_lsb <= 16\'h0033;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:64: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h34\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0049: set1_lsb <= 16\'h0034;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:65: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h35\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h004A: set1_lsb <= 16\'h0035;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:66: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h36\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0059: set1_lsb <= 16\'h0036;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:67: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h1d\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0014: set1_lsb <= 16\'h001D;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:68: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h38\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0011: set1_lsb <= 16\'h0038;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:69: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h39\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0029: set1_lsb <= 16\'h0039;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:70: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'he038\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'hE011: set1_lsb <= 16\'hE038;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:71: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'he01d\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'hE014: set1_lsb <= 16\'hE01D;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:72: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'he052\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'hE070: set1_lsb <= 16\'hE052;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:73: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'he04b\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'hE071: set1_lsb <= 16\'hE04B;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:74: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'he04b\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'hE06B: set1_lsb <= 16\'hE04B;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:75: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'he047\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'hE06C: set1_lsb <= 16\'hE047;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:76: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'he04f\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'hE069: set1_lsb <= 16\'hE04F;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:77: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'he048\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'hE075: set1_lsb <= 16\'hE048;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:78: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'he050\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'hE072: set1_lsb <= 16\'hE050;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:79: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'he049\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'hE07D: set1_lsb <= 16\'hE049;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:80: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'he051\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'hE07A: set1_lsb <= 16\'hE051;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:81: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'he04d\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'hE074: set1_lsb <= 16\'hE04D;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:82: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h45\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0077: set1_lsb <= 16\'h0045;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:83: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h47\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h006C: set1_lsb <= 16\'h0047;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:84: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h4b\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h006B: set1_lsb <= 16\'h004B;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:85: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h4f\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0069: set1_lsb <= 16\'h004F;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:86: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'he035\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'hE04A: set1_lsb <= 16\'hE035;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:87: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h48\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0075: set1_lsb <= 16\'h0048;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:88: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h4c\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0073: set1_lsb <= 16\'h004C;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:89: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h50\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0072: set1_lsb <= 16\'h0050;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:90: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h52\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0070: set1_lsb <= 16\'h0052;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:91: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h37\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h007C: set1_lsb <= 16\'h0037;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:92: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h49\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h007D: set1_lsb <= 16\'h0049;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:93: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h4d\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0074: set1_lsb <= 16\'h004D;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:94: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h51\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h007A: set1_lsb <= 16\'h0051;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:95: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h53\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0071: set1_lsb <= 16\'h0053;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:96: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h4a\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h007B: set1_lsb <= 16\'h004A;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:97: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h4e\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0079: set1_lsb <= 16\'h004E;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:98: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'he01c\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'hE05A: set1_lsb <= 16\'hE01C;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:99: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h1\' generates 16 bits.\n                                                                                                     : ... In instance set2_to_set1_translator\n 16\'h0076: set1_lsb <= 16\'h0001;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:100: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h3b\' generates 16 bits.\n                                                                                                      : ... In instance set2_to_set1_translator\n 16\'h0005: set1_lsb <= 16\'h003B;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:101: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h3c\' generates 16 bits.\n                                                                                                      : ... In instance set2_to_set1_translator\n 16\'h0006: set1_lsb <= 16\'h003C;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:102: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h3d\' generates 16 bits.\n                                                                                                      : ... In instance set2_to_set1_translator\n 16\'h0004: set1_lsb <= 16\'h003D;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:103: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h3e\' generates 16 bits.\n                                                                                                      : ... In instance set2_to_set1_translator\n 16\'h000C: set1_lsb <= 16\'h003E;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:104: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h3f\' generates 16 bits.\n                                                                                                      : ... In instance set2_to_set1_translator\n 16\'h0003: set1_lsb <= 16\'h003F;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:105: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h40\' generates 16 bits.\n                                                                                                      : ... In instance set2_to_set1_translator\n 16\'h000B: set1_lsb <= 16\'h0040;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:106: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h41\' generates 16 bits.\n                                                                                                      : ... In instance set2_to_set1_translator\n 16\'h0083: set1_lsb <= 16\'h0041;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:107: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h42\' generates 16 bits.\n                                                                                                      : ... In instance set2_to_set1_translator\n 16\'h000A: set1_lsb <= 16\'h0042;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:108: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h43\' generates 16 bits.\n                                                                                                      : ... In instance set2_to_set1_translator\n 16\'h0001: set1_lsb <= 16\'h0043;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:109: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h44\' generates 16 bits.\n                                                                                                      : ... In instance set2_to_set1_translator\n 16\'h0009: set1_lsb <= 16\'h0044;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:110: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h57\' generates 16 bits.\n                                                                                                      : ... In instance set2_to_set1_translator\n 16\'h0078: set1_lsb <= 16\'h0057;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:111: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h58\' generates 16 bits.\n                                                                                                      : ... In instance set2_to_set1_translator\n 16\'h0007: set1_lsb <= 16\'h0058;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:112: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h46\' generates 16 bits.\n                                                                                                      : ... In instance set2_to_set1_translator\n 16\'h007E: set1_lsb <= 16\'h0046;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:113: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h2b\' generates 16 bits.\n                                                                                                      : ... In instance set2_to_set1_translator\n 16\'h005D: set1_lsb <= 16\'h002B;\n                    ^~\n%Warning-WIDTH: data/full_repos/permissive/118895292/peripheral/keyboard/set2_to_set1_translator.v:116: Operator ASSIGNDLY expects 17 bits on the Assign RHS, but Assign RHS\'s CONST \'16\'h0\' generates 16 bits.\n                                                                                                      : ... In instance set2_to_set1_translator\n  set1_lsb <= 16\'h0000;\n           ^~\n%Error: Exiting due to 100 warning(s)\n'
module set2_to_set1_translator(
	set2_key_in,
	set2_key_break_in,
	set1_key_out);
	
input [15:0] set2_key_in;
input set2_key_break_in;
output [15:0] set1_key_out;

reg [16:0] set1_lsb;

always @(*)
begin
	case (set2_key_in)
	16'h000E: set1_lsb <= 16'h0029;
	16'h0016: set1_lsb <= 16'h0002;
	16'h001E: set1_lsb <= 16'h0003;
	16'h0026: set1_lsb <= 16'h0004;
	16'h0025: set1_lsb <= 16'h0005;
	16'h002E: set1_lsb <= 16'h0006;
	16'h0036: set1_lsb <= 16'h0007;
	16'h003D: set1_lsb <= 16'h0008;
	16'h003E: set1_lsb <= 16'h0009;
	16'h0046: set1_lsb <= 16'h000A;
	16'h0045: set1_lsb <= 16'h000B;
	16'h004E: set1_lsb <= 16'h000C;
	16'h0055: set1_lsb <= 16'h000D;
	16'h0066: set1_lsb <= 16'h000E;
	16'h000D: set1_lsb <= 16'h000F;
	16'h0015: set1_lsb <= 16'h0010;
	16'h001D: set1_lsb <= 16'h0011;
	16'h0024: set1_lsb <= 16'h0012;
	16'h002D: set1_lsb <= 16'h0013;
	16'h002C: set1_lsb <= 16'h0014;
	16'h0035: set1_lsb <= 16'h0015;
	16'h003C: set1_lsb <= 16'h0016;
	16'h0043: set1_lsb <= 16'h0017;
	16'h0044: set1_lsb <= 16'h0018;
	16'h004D: set1_lsb <= 16'h0019;
	16'h0054: set1_lsb <= 16'h001A;
	16'h005B: set1_lsb <= 16'h001B;
	16'h0058: set1_lsb <= 16'h003A;
	16'h001C: set1_lsb <= 16'h001E;
	16'h001B: set1_lsb <= 16'h001F;
	16'h0023: set1_lsb <= 16'h0020;
	16'h002B: set1_lsb <= 16'h0021;
	16'h0034: set1_lsb <= 16'h0022;
	16'h0033: set1_lsb <= 16'h0023;
	16'h003B: set1_lsb <= 16'h0024;
	16'h0042: set1_lsb <= 16'h0025;
	16'h004B: set1_lsb <= 16'h0026;
	16'h004C: set1_lsb <= 16'h0027;
	16'h0052: set1_lsb <= 16'h0028;
	16'h005A: set1_lsb <= 16'h001C;
	16'h0012: set1_lsb <= 16'h002A;
	16'h001A: set1_lsb <= 16'h002C;
	16'h0022: set1_lsb <= 16'h002D;
	16'h0021: set1_lsb <= 16'h002E;
	16'h002A: set1_lsb <= 16'h002F;
	16'h0032: set1_lsb <= 16'h0030;
	16'h0031: set1_lsb <= 16'h0031;
	16'h003A: set1_lsb <= 16'h0032;
	16'h0041: set1_lsb <= 16'h0033;
	16'h0049: set1_lsb <= 16'h0034;
	16'h004A: set1_lsb <= 16'h0035;
	16'h0059: set1_lsb <= 16'h0036;
	16'h0014: set1_lsb <= 16'h001D;
	16'h0011: set1_lsb <= 16'h0038;
	16'h0029: set1_lsb <= 16'h0039;
	16'hE011: set1_lsb <= 16'hE038;
	16'hE014: set1_lsb <= 16'hE01D;
	16'hE070: set1_lsb <= 16'hE052;
	16'hE071: set1_lsb <= 16'hE04B;
	16'hE06B: set1_lsb <= 16'hE04B;
	16'hE06C: set1_lsb <= 16'hE047;
	16'hE069: set1_lsb <= 16'hE04F;
	16'hE075: set1_lsb <= 16'hE048;
	16'hE072: set1_lsb <= 16'hE050;
	16'hE07D: set1_lsb <= 16'hE049;
	16'hE07A: set1_lsb <= 16'hE051;
	16'hE074: set1_lsb <= 16'hE04D;
	16'h0077: set1_lsb <= 16'h0045;
	16'h006C: set1_lsb <= 16'h0047;
	16'h006B: set1_lsb <= 16'h004B;
	16'h0069: set1_lsb <= 16'h004F;
	16'hE04A: set1_lsb <= 16'hE035;
	16'h0075: set1_lsb <= 16'h0048;
	16'h0073: set1_lsb <= 16'h004C;
	16'h0072: set1_lsb <= 16'h0050;
	16'h0070: set1_lsb <= 16'h0052;
	16'h007C: set1_lsb <= 16'h0037;
	16'h007D: set1_lsb <= 16'h0049;
	16'h0074: set1_lsb <= 16'h004D;
	16'h007A: set1_lsb <= 16'h0051;
	16'h0071: set1_lsb <= 16'h0053;
	16'h007B: set1_lsb <= 16'h004A;
	16'h0079: set1_lsb <= 16'h004E;
	16'hE05A: set1_lsb <= 16'hE01C;
	16'h0076: set1_lsb <= 16'h0001;
	16'h0005: set1_lsb <= 16'h003B;
	16'h0006: set1_lsb <= 16'h003C;
	16'h0004: set1_lsb <= 16'h003D;
	16'h000C: set1_lsb <= 16'h003E;
	16'h0003: set1_lsb <= 16'h003F;
	16'h000B: set1_lsb <= 16'h0040;
	16'h0083: set1_lsb <= 16'h0041;
	16'h000A: set1_lsb <= 16'h0042;
	16'h0001: set1_lsb <= 16'h0043;
	16'h0009: set1_lsb <= 16'h0044;
	16'h0078: set1_lsb <= 16'h0057;
	16'h0007: set1_lsb <= 16'h0058;
	16'h007E: set1_lsb <= 16'h0046;
	16'h005D: set1_lsb <= 16'h002B;
	default: begin

		set1_lsb <= 16'h0000;
	end
	endcase
end

assign set1_key_out = {set1_lsb[15:8], set2_key_break_in, set1_lsb[6:0]};

endmodule
module set2_to_set1_translator(
	set2_key_in,
	set2_key_break_in,
	set1_key_out);

	
input [15:0] set2_key_in;
input set2_key_break_in;
output [15:0] set1_key_out;

reg [16:0] set1_lsb;

always @(*)
begin
	case (set2_key_in)
	16'h000E: set1_lsb <= 16'h0029;
	16'h0016: set1_lsb <= 16'h0002;
	16'h001E: set1_lsb <= 16'h0003;
	16'h0026: set1_lsb <= 16'h0004;
	16'h0025: set1_lsb <= 16'h0005;
	16'h002E: set1_lsb <= 16'h0006;
	16'h0036: set1_lsb <= 16'h0007;
	16'h003D: set1_lsb <= 16'h0008;
	16'h003E: set1_lsb <= 16'h0009;
	16'h0046: set1_lsb <= 16'h000A;
	16'h0045: set1_lsb <= 16'h000B;
	16'h004E: set1_lsb <= 16'h000C;
	16'h0055: set1_lsb <= 16'h000D;
	16'h0066: set1_lsb <= 16'h000E;
	16'h000D: set1_lsb <= 16'h000F;
	16'h0015: set1_lsb <= 16'h0010;
	16'h001D: set1_lsb <= 16'h0011;
	16'h0024: set1_lsb <= 16'h0012;
	16'h002D: set1_lsb <= 16'h0013;
	16'h002C: set1_lsb <= 16'h0014;
	16'h0035: set1_lsb <= 16'h0015;
	16'h003C: set1_lsb <= 16'h0016;
	16'h0043: set1_lsb <= 16'h0017;
	16'h0044: set1_lsb <= 16'h0018;
	16'h004D: set1_lsb <= 16'h0019;
	16'h0054: set1_lsb <= 16'h001A;
	16'h005B: set1_lsb <= 16'h001B;
	16'h0058: set1_lsb <= 16'h003A;
	16'h001C: set1_lsb <= 16'h001E;
	16'h001B: set1_lsb <= 16'h001F;
	16'h0023: set1_lsb <= 16'h0020;
	16'h002B: set1_lsb <= 16'h0021;
	16'h0034: set1_lsb <= 16'h0022;
	16'h0033: set1_lsb <= 16'h0023;
	16'h003B: set1_lsb <= 16'h0024;
	16'h0042: set1_lsb <= 16'h0025;
	16'h004B: set1_lsb <= 16'h0026;
	16'h004C: set1_lsb <= 16'h0027;
	16'h0052: set1_lsb <= 16'h0028;
	16'h005A: set1_lsb <= 16'h001C;
	16'h0012: set1_lsb <= 16'h002A;
	16'h001A: set1_lsb <= 16'h002C;
	16'h0022: set1_lsb <= 16'h002D;
	16'h0021: set1_lsb <= 16'h002E;
	16'h002A: set1_lsb <= 16'h002F;
	16'h0032: set1_lsb <= 16'h0030;
	16'h0031: set1_lsb <= 16'h0031;
	16'h003A: set1_lsb <= 16'h0032;
	16'h0041: set1_lsb <= 16'h0033;
	16'h0049: set1_lsb <= 16'h0034;
	16'h004A: set1_lsb <= 16'h0035;
	16'h0059: set1_lsb <= 16'h0036;
	16'h0014: set1_lsb <= 16'h001D;
	16'h0011: set1_lsb <= 16'h0038;
	16'h0029: set1_lsb <= 16'h0039;
	16'hE011: set1_lsb <= 16'hE038;
	16'hE014: set1_lsb <= 16'hE01D;
	16'hE070: set1_lsb <= 16'hE052;
	16'hE071: set1_lsb <= 16'hE04B;
	16'hE06B: set1_lsb <= 16'hE04B;
	16'hE06C: set1_lsb <= 16'hE047;
	16'hE069: set1_lsb <= 16'hE04F;
	16'hE075: set1_lsb <= 16'hE048;
	16'hE072: set1_lsb <= 16'hE050;
	16'hE07D: set1_lsb <= 16'hE049;
	16'hE07A: set1_lsb <= 16'hE051;
	16'hE074: set1_lsb <= 16'hE04D;
	16'h0077: set1_lsb <= 16'h0045;
	16'h006C: set1_lsb <= 16'h0047;
	16'h006B: set1_lsb <= 16'h004B;
	16'h0069: set1_lsb <= 16'h004F;
	16'hE04A: set1_lsb <= 16'hE035;
	16'h0075: set1_lsb <= 16'h0048;
	16'h0073: set1_lsb <= 16'h004C;
	16'h0072: set1_lsb <= 16'h0050;
	16'h0070: set1_lsb <= 16'h0052;
	16'h007C: set1_lsb <= 16'h0037;
	16'h007D: set1_lsb <= 16'h0049;
	16'h0074: set1_lsb <= 16'h004D;
	16'h007A: set1_lsb <= 16'h0051;
	16'h0071: set1_lsb <= 16'h0053;
	16'h007B: set1_lsb <= 16'h004A;
	16'h0079: set1_lsb <= 16'h004E;
	16'hE05A: set1_lsb <= 16'hE01C;
	16'h0076: set1_lsb <= 16'h0001;
	16'h0005: set1_lsb <= 16'h003B;
	16'h0006: set1_lsb <= 16'h003C;
	16'h0004: set1_lsb <= 16'h003D;
	16'h000C: set1_lsb <= 16'h003E;
	16'h0003: set1_lsb <= 16'h003F;
	16'h000B: set1_lsb <= 16'h0040;
	16'h0083: set1_lsb <= 16'h0041;
	16'h000A: set1_lsb <= 16'h0042;
	16'h0001: set1_lsb <= 16'h0043;
	16'h0009: set1_lsb <= 16'h0044;
	16'h0078: set1_lsb <= 16'h0057;
	16'h0007: set1_lsb <= 16'h0058;
	16'h007E: set1_lsb <= 16'h0046;
	16'h005D: set1_lsb <= 16'h002B;
	default: begin

		set1_lsb <= 16'h0000;
	end
	endcase
end

assign set1_key_out = {set1_lsb[15:8], set2_key_break_in, set1_lsb[6:0]};

endmodule