data/full_repos/permissive/129527056/model/gng/hdl/jt74.v
1: b'%Warning-MULTITOP: data/full_repos/permissive/129527056/model/gng/hdl/jt74.v:29: Multiple top level modules\n                                                                               : ... Suggest see manual; fix the duplicates, or use --top-module to select top.\n                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.\n                                                                               : ... Top module \'jt74161\'\nmodule jt74161(\n       ^~~~~~~\n                                                                               : ... Top module \'jt74163\'\nmodule jt74163(\n       ^~~~~~~\n                                                                               : ... Top module \'jt7474\'\nmodule jt7474(\n       ^~~~~~\n                                                                               : ... Top module \'jt74138\'\nmodule jt74138(\n       ^~~~~~~\n                                                                               : ... Top module \'jt74139\'\nmodule jt74139(\n       ^~~~~~~\n                                                                               : ... Top module \'jt74112\'\nmodule jt74112(\n       ^~~~~~~\n                                                                               : ... Top module \'jt74245\'\nmodule jt74245(\n       ^~~~~~~\n                                                                               : ... Top module \'jt74233\'\nmodule jt74233(\n       ^~~~~~~\n                                                                               : ... Top module \'jt74174\'\nmodule jt74174(\n       ^~~~~~~\n                                                                               : ... Top module \'jt74367\'\nmodule jt74367(\n       ^~~~~~~\n                                                                               : ... Top module \'jt74194\'\nmodule jt74194(\n       ^~~~~~~\n                                                                               : ... Top module \'jt74157\'\nmodule jt74157(\n       ^~~~~~~\n                                                                               : ... Top module \'jt74273\'\nmodule jt74273(\n       ^~~~~~~\n                                                                               : ... Top module \'jt74283\'\nmodule jt74283(\n       ^~~~~~~\n                                                                               : ... Top module \'jt74257\'\nmodule jt74257(\n       ^~~~~~~\n                                                                               : ... Top module \'jt74259\'\nmodule jt74259(\n       ^~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/129527056/model/gng/hdl/jt74.v:243: Operator ADD expects 5 bits on the RHS, but RHS\'s VARREF \'cin\' generates 1 bits.\n                                                                             : ... In instance jt74283\n assign #2 {cout,s} = a+b+cin;\n                         ^\n%Error: Exiting due to 2 warning(s)\n'
module jt74157(
	input	sel,
	input	st_l,
	input	[3:0] A,
	input	[3:0] B,
	output	[3:0] Y
);
	reg [3:0] y_nodly;
	assign #2 Y = y_nodly;
	always @(*)
		if( st_l ) y_nodly = 4'd0;
		else y_nodly = sel ? B : A;

endmodule
module jt74157(
	input	sel,
	input	st_l,
	input	[3:0] A,
	input	[3:0] B,
	output	[3:0] Y
);

	reg [3:0] y_nodly;
	assign #2 Y = y_nodly;
	always @(*)
		if( st_l ) y_nodly = 4'd0;
		else y_nodly = sel ? B : A;

endmodule