data/full_repos/permissive/123075301/process_text.v
 line:48: before: ","
1: b'%Warning-IMPLICIT: data/full_repos/permissive/123075301/process_text.v:88: Signal definition not found, creating implicitly: \'ip_device_on\'\n                                                                         : ... Suggested alternative: \'ip_device_on1\'\n assign ip_device_on   =(pix_y[9:4]>=3 && pix_y[9:4]<=4 && ip_device_on1);\n        ^~~~~~~~~~~~\n                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.\n%Warning-IMPLICIT: data/full_repos/permissive/123075301/process_text.v:89: Signal definition not found, creating implicitly: \'error_on\'\n                                                                         : ... Suggested alternative: \'error_on1\'\n assign error_on     =(pix_y[9:4]==6 && error_on1);\n        ^~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/123075301/process_text.v:90: Signal definition not found, creating implicitly: \'value_enter_key_on\'\n                                                                         : ... Suggested alternative: \'value_enter_key_on1\'\n assign value_enter_key_on =(pix_y[9:4]==9 && value_enter_key_on1);\n        ^~~~~~~~~~~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/123075301/process_text.v:91: Signal definition not found, creating implicitly: \'value_enter_rot_on\'\n                                                                         : ... Suggested alternative: \'value_enter_rot_on1\'\n assign value_enter_rot_on =(pix_y[9:4]==10 && value_enter_rot_on1);\n        ^~~~~~~~~~~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/123075301/process_text.v:92: Signal definition not found, creating implicitly: \'result_on\'\n                                                                         : ... Suggested alternative: \'result_on1\'\n assign result_on    =(pix_y[9:4]>=16 && pix_y[9:4]<=18 && result_on1);\n        ^~~~~~~~~\n%Warning-IMPLICIT: data/full_repos/permissive/123075301/process_text.v:93: Signal definition not found, creating implicitly: \'keep_disp_msg\'\n                                                                         : ... Suggested alternative: \'keep_disp_msg1\'\n assign keep_disp_msg   =(pix_y[9:4]>=25 && pix_y[9:4]<=27 && keep_disp_msg1);\n        ^~~~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/123075301/process_text.v:48: Operator ASSIGN expects 49 bits on the Assign RHS, but Assign RHS\'s CONST \'48\'h0\' generates 48 bits.\n                                                                      : ... In instance process_text\n reg [48:0] q_val =48\'h0000_0000_0000, i_val =48\'h0000_0000_0000;\n                   ^~~~~~~~~~~~~~~~~~\n%Warning-WIDTH: data/full_repos/permissive/123075301/process_text.v:48: Operator ASSIGN expects 49 bits on the Assign RHS, but Assign RHS\'s CONST \'48\'h0\' generates 48 bits.\n                                                                      : ... In instance process_text\n reg [48:0] q_val =48\'h0000_0000_0000, i_val =48\'h0000_0000_0000;\n                                              ^~~~~~~~~~~~~~~~~~\n%Error: data/full_repos/permissive/123075301/process_text.v:83: Cannot find file containing module: \'Font_ROM\'\n Font_ROM font_unit( .pixel_clock(clk),\n ^~~~~~~~\n        ... Looked in:\n             data/full_repos/permissive/123075301,data/full_repos/permissive/123075301/Font_ROM\n             data/full_repos/permissive/123075301,data/full_repos/permissive/123075301/Font_ROM.v\n             data/full_repos/permissive/123075301,data/full_repos/permissive/123075301/Font_ROM.sv\n             Font_ROM\n             Font_ROM.v\n             Font_ROM.sv\n             obj_dir/Font_ROM\n             obj_dir/Font_ROM.v\n             obj_dir/Font_ROM.sv\n%Warning-LITENDIAN: data/full_repos/permissive/123075301/process_text.v:96: Little bit endian vector: MSB < LSB of bit range: 1:199\n wire [1:8*25-1] enter_text        = "Choose the input device ";\n      ^\n%Warning-WIDTH: data/full_repos/permissive/123075301/process_text.v:96: Operator ASSIGNW expects 199 bits on the Assign RHS, but Assign RHS\'s CONST \'192\'h43686f6f73652074686520696e7075742064657669636520\' generates 192 bits.\n                                                                      : ... In instance process_text\n wire [1:8*25-1] enter_text        = "Choose the input device ";\n                                   ^\n%Warning-LITENDIAN: data/full_repos/permissive/123075301/process_text.v:97: Little bit endian vector: MSB < LSB of bit range: 1:199\n wire [1:8*25-1] device_text       = "K:Keyboard   R:Rotor  : ";\n      ^\n%Warning-WIDTH: data/full_repos/permissive/123075301/process_text.v:97: Operator ASSIGNW expects 199 bits on the Assign RHS, but Assign RHS\'s CONST \'192\'h4b3a4b6579626f617264202020523a526f746f7220203a20\' generates 192 bits.\n                                                                      : ... In instance process_text\n wire [1:8*25-1] device_text       = "K:Keyboard   R:Rotor  : ";\n                                   ^\n%Warning-LITENDIAN: data/full_repos/permissive/123075301/process_text.v:98: Little bit endian vector: MSB < LSB of bit range: 1:199\n wire [1:8*25-1] error_text       = "          !!! ERROR !!!  ";\n      ^\n%Warning-WIDTH: data/full_repos/permissive/123075301/process_text.v:98: Operator ASSIGNW expects 199 bits on the Assign RHS, but Assign RHS\'s CONST \'200\'h20202020202020202020212121204552524f52202121212020\' generates 200 bits.\n                                                                      : ... In instance process_text\n wire [1:8*25-1] error_text       = "          !!! ERROR !!!  ";\n                                  ^\n%Warning-LITENDIAN: data/full_repos/permissive/123075301/process_text.v:99: Little bit endian vector: MSB < LSB of bit range: 1:199\n wire [1:8*25-1] valuer_text       = "Value from Rotor      : ";\n      ^\n%Warning-WIDTH: data/full_repos/permissive/123075301/process_text.v:99: Operator ASSIGNW expects 199 bits on the Assign RHS, but Assign RHS\'s CONST \'192\'h56616c75652066726f6d20526f746f722020202020203a20\' generates 192 bits.\n                                                                      : ... In instance process_text\n wire [1:8*25-1] valuer_text       = "Value from Rotor      : ";\n                                   ^\n%Warning-LITENDIAN: data/full_repos/permissive/123075301/process_text.v:100: Little bit endian vector: MSB < LSB of bit range: 1:199\n wire [1:8*25-1] valuek_text       = "Value from Keyboard   : ";\n      ^\n%Warning-WIDTH: data/full_repos/permissive/123075301/process_text.v:100: Operator ASSIGNW expects 199 bits on the Assign RHS, but Assign RHS\'s CONST \'192\'h56616c75652066726f6d204b6579626f6172642020203a20\' generates 192 bits.\n                                                                       : ... In instance process_text\n wire [1:8*25-1] valuek_text       = "Value from Keyboard   : ";\n                                   ^\n%Warning-LITENDIAN: data/full_repos/permissive/123075301/process_text.v:101: Little bit endian vector: MSB < LSB of bit range: 1:199\n wire [1:8*25-1] result_text       = "Result:                 ";\n      ^\n%Warning-WIDTH: data/full_repos/permissive/123075301/process_text.v:101: Operator ASSIGNW expects 199 bits on the Assign RHS, but Assign RHS\'s CONST \'192\'h526573756c743a2020202020202020202020202020202020\' generates 192 bits.\n                                                                       : ... In instance process_text\n wire [1:8*25-1] result_text       = "Result:                 ";\n                                   ^\n%Warning-LITENDIAN: data/full_repos/permissive/123075301/process_text.v:102: Little bit endian vector: MSB < LSB of bit range: 1:199\n wire [1:8*25-1] q_val_text        = "Q_value (sin(angle))  : ";\n      ^\n%Warning-WIDTH: data/full_repos/permissive/123075301/process_text.v:102: Operator ASSIGNW expects 199 bits on the Assign RHS, but Assign RHS\'s CONST \'192\'h515f76616c7565202873696e28616e676c65292920203a20\' generates 192 bits.\n                                                                       : ... In instance process_text\n wire [1:8*25-1] q_val_text        = "Q_value (sin(angle))  : ";\n                                   ^\n%Warning-LITENDIAN: data/full_repos/permissive/123075301/process_text.v:103: Little bit endian vector: MSB < LSB of bit range: 1:199\n wire [1:8*25-1] i_val_text        = "I_value (cos(angle))  : ";\n      ^\n%Warning-WIDTH: data/full_repos/permissive/123075301/process_text.v:103: Operator ASSIGNW expects 199 bits on the Assign RHS, but Assign RHS\'s CONST \'192\'h495f76616c75652028636f7328616e676c65292920203a20\' generates 192 bits.\n                                                                       : ... In instance process_text\n wire [1:8*25-1] i_val_text        = "I_value (cos(angle))  : ";\n                                   ^\n%Warning-LITENDIAN: data/full_repos/permissive/123075301/process_text.v:104: Little bit endian vector: MSB < LSB of bit range: 1:199\n wire [1:8*25-1] th_text           = "THANK-YOU!!!            ";\n      ^\n%Warning-WIDTH: data/full_repos/permissive/123075301/process_text.v:104: Operator ASSIGNW expects 199 bits on the Assign RHS, but Assign RHS\'s CONST \'192\'h5448414e4b2d594f55212121202020202020202020202020\' generates 192 bits.\n                                                                       : ... In instance process_text\n wire [1:8*25-1] th_text           = "THANK-YOU!!!            ";\n                                   ^\n%Warning-LITENDIAN: data/full_repos/permissive/123075301/process_text.v:105: Little bit endian vector: MSB < LSB of bit range: 1:199\n wire [1:8*25-1] press_enter_text  = "Enter C to Continue     ";\n      ^\n%Warning-WIDTH: data/full_repos/permissive/123075301/process_text.v:105: Operator ASSIGNW expects 199 bits on the Assign RHS, but Assign RHS\'s CONST \'192\'h456e746572204320746f20436f6e74696e75652020202020\' generates 192 bits.\n                                                                       : ... In instance process_text\n wire [1:8*25-1] press_enter_text  = "Enter C to Continue     ";\n                                   ^\n%Warning-LITENDIAN: data/full_repos/permissive/123075301/process_text.v:106: Little bit endian vector: MSB < LSB of bit range: 1:199\n wire [1:8*25-1] space_exit_text   = "Enter E to Exit         ";\n      ^\n%Warning-WIDTH: data/full_repos/permissive/123075301/process_text.v:106: Operator ASSIGNW expects 199 bits on the Assign RHS, but Assign RHS\'s CONST \'192\'h456e746572204520746f2045786974202020202020202020\' generates 192 bits.\n                                                                       : ... In instance process_text\n wire [1:8*25-1] space_exit_text   = "Enter E to Exit         ";\n                                   ^\n%Warning-WIDTH: data/full_repos/permissive/123075301/process_text.v:112: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS\'s SEL generates 6 bits.\n                                                                       : ... In instance process_text\n   k=pix_x[9:4];\n    ^\n%Error: Exiting due to 1 error(s), 31 warning(s)\n'
module process_text(		clk,
								pix_x,
								pix_y,
								video_on,
								text_rgb,
								ip_device_on1,
								error_on1,
								value_enter_key_on1,
								value_enter_rot_on1,
								result_on1,
								keep_disp_msg1,
								data_temp_disp,
								q_val_op,
								i_val_op
								);
	
	input wire clk;
	input wire [9:0] pix_x, pix_y;
	input wire video_on;
	output reg [2:0] text_rgb;
	input ip_device_on1,error_on1,value_enter_key_on1,value_enter_rot_on1,result_on1,keep_disp_msg1;
	input [23:0] data_temp_disp;
	input [48:0] q_val_op,i_val_op;
	
	
	reg [7:0] d_ipdevice = 8'h00;
	reg [23:0] d_ip =24'h000000;
	reg [48:0] q_val =48'h0000_0000_0000, i_val =48'h0000_0000_0000;
	
	wire [10:0] rom_addr;
	reg [7:0] char_addr, char_addr_ent,char_addr_error,char_addr_valuer,char_addr_valuek,char_addr_result,char_addr_thank;
	
	reg [2:0] row_addr;
	wire [2:0] row_addr_text;
	
	reg [2:0] bit_addr;
	wire [2:0] bit_addr_text;
	wire [7:0] font_word;
	wire font_bit;
	
	assign  rom_addr = {char_addr,row_addr};
	assign  font_bit = font_word[~bit_addr];
	
	assign row_addr_text = pix_y[3:1];
	assign bit_addr_text = pix_x[3:1];

	always@(posedge clk)
		begin
			if(ip_device_on1 == 1'b1 && value_enter_key_on1 == 1'b0 && value_enter_rot_on1 == 1'b0 )
				d_ipdevice[7:0] = data_temp_disp[7:0];
			
			else if((value_enter_key_on1 == 1'b1 || value_enter_rot_on1 == 1'b1) && result_on1 == 1'b0)
				d_ip = data_temp_disp;
			
			else if(result_on1 == 1'b1 )
				begin
					q_val = q_val_op;
					i_val = i_val_op;
				end
			else;
		end

	Font_ROM font_unit( .pixel_clock(clk),
								.address(rom_addr),
								.data(font_word)
								);

	assign ip_device_on			=(pix_y[9:4]>=3 && pix_y[9:4]<=4 && ip_device_on1);
	assign error_on 				=(pix_y[9:4]==6 && error_on1);
	assign value_enter_key_on	=(pix_y[9:4]==9 && value_enter_key_on1);
	assign value_enter_rot_on	=(pix_y[9:4]==10 && value_enter_rot_on1);
	assign result_on				=(pix_y[9:4]>=16 && pix_y[9:4]<=18 && result_on1);
	assign keep_disp_msg			=(pix_y[9:4]>=25 && pix_y[9:4]<=27 && keep_disp_msg1);

	integer k =0;
	wire [1:8*25-1] enter_text        = "Choose the input device ";
	wire [1:8*25-1] device_text       = "K:Keyboard   R:Rotor  : ";
	wire [1:8*25-1] error_text       = "          !!! ERROR !!!  ";
	wire [1:8*25-1] valuer_text       = "Value from Rotor      : ";
	wire [1:8*25-1] valuek_text       = "Value from Keyboard   : ";
	wire [1:8*25-1] result_text       = "Result:                 ";
	wire [1:8*25-1] q_val_text        = "Q_value (sin(angle))  : ";
	wire [1:8*25-1] i_val_text        = "I_value (cos(angle))  : ";
	wire [1:8*25-1] th_text           = "THANK-YOU!!!            ";
	wire [1:8*25-1] press_enter_text  = "Enter C to Continue     ";
	wire [1:8*25-1] space_exit_text   = "Enter E to Exit         ";

	always@(posedge clk)
	begin
		if(pix_x[9:4]>=1 && pix_x[9:4]<25)
		begin
			k=pix_x[9:4];
				if(pix_y[9:4]==6'd3)
						char_addr_ent     = enter_text[k*8+:8];
						
				else if(pix_y[9:4]==6'd4)
						char_addr_ent      = device_text[k*8+:8];
				
				else if(pix_y[9:4]==6'd6)
						char_addr_error    = error_text[k*8+:8];
						
				else if(pix_y[9:4]==6'd9)
						char_addr_valuek   = valuek_text[k*8+:8];
						
				else if(pix_y[9:4] ==6'd10)
						char_addr_valuer   = valuer_text[k*8+:8];
						
				else if(pix_y[9:4] ==6'd16)
						char_addr_result   = result_text[k*8+:8];
						
				else if(pix_y[9:4] ==6'd17)
						char_addr_result   = q_val_text[k*8+:8];
						
				else if(pix_y[9:4] ==6'd18)
						char_addr_result   = i_val_text[k*8+:8];
						
				else if(pix_y[9:4] ==6'd25)
						char_addr_thank    = th_text[k*8+:8];
						
				else if(pix_y[9:4] ==6'd26)
						char_addr_thank    = press_enter_text[k*8+:8];
						
				else if(pix_y[9:4] == 6'd27)
						char_addr_thank    = space_exit_text[k*8+:8];
						
				else;
			end	

	if(pix_x[9:4]>25 && pix_x[9:4]<35)
		begin
			if(pix_y[9:4] == 4)
				begin
					case(pix_x[9:4])
							6'd26: char_addr_ent= d_ipdevice;
							default: char_addr_ent=8'h00;
					endcase
				end
			else if(pix_y[9:4] == 9)
				begin
					case(pix_x[9:4])
							6'd26: char_addr_valuek= d_ip[23:16];
							6'd27: char_addr_valuek= d_ip[15:8];
							6'd28: char_addr_valuek= d_ip[7:0];
							default: char_addr_valuek =8'h00;
					endcase
				end
			else if(pix_y[9:4] == 10)
				begin
					case(pix_x[9:4])
							6'd26: char_addr_valuer= d_ip[23:16];
							6'd27: char_addr_valuer= d_ip[15:8];
							6'd28: char_addr_valuer= d_ip[7:0];
							default: char_addr_valuer =8'h00;
					endcase
				end
			else if(pix_y[9:4] == 17)
				begin
					case(pix_x[9:4])
							6'd26: char_addr_result= q_val[47:40];
							6'd27: char_addr_result= q_val[39:32];
							6'd28: char_addr_result= q_val[31:24];
							6'd29: char_addr_result= q_val[23:16];
							6'd30: char_addr_result= q_val[15:8];
							6'd31: char_addr_result= q_val[7:0];
							default: char_addr_result =8'h00;
					endcase
				end
			else if(pix_y[9:4] == 18)
				begin
					case(pix_x[9:4])
							6'd26: char_addr_result= i_val[47:40];
							6'd27: char_addr_result= i_val[39:32];
							6'd28: char_addr_result= i_val[31:24];
							6'd29: char_addr_result= i_val[23:16];
							6'd30: char_addr_result= i_val[15:8];
							6'd31: char_addr_result= i_val[7:0];
							default: char_addr_result =8'h00;
					endcase
				end
		end
			else;
end

always @(posedge clk)
			begin
			if(video_on)
				begin
				row_addr  = row_addr_text;
				bit_addr  = bit_addr_text;
				text_rgb	= 3'b111;
				
				if(ip_device_on)
					begin
						char_addr = char_addr_ent;
						if(font_bit)
							text_rgb = 3'b100;
					end
				else if(error_on)
					begin
						char_addr = char_addr_error;
						if(font_bit)
							text_rgb = 3'b001;
					end
				else if(value_enter_key_on)
					begin
						char_addr = char_addr_valuek;
						if(font_bit)
							text_rgb = 3'b000;
					end
				else if(value_enter_rot_on)
				begin
					char_addr = char_addr_valuer;
					if(font_bit)
						text_rgb = 3'b000;
				end
				else if(result_on)
					begin
						char_addr = char_addr_result;
						if(font_bit)
							text_rgb = 3'b100;
					end
				else if(keep_disp_msg)
					begin
						char_addr = char_addr_thank;
						if(font_bit)
							text_rgb = 3'b000;
					end
				else
						char_addr = 8'b0;
				end
			else
					text_rgb = 3'b000;
		end

endmodule
module process_text(		clk,
								pix_x,
								pix_y,
								video_on,
								text_rgb,
								ip_device_on1,
								error_on1,
								value_enter_key_on1,
								value_enter_rot_on1,
								result_on1,
								keep_disp_msg1,
								data_temp_disp,
								q_val_op,
								i_val_op
								);

	
	input wire clk;
	input wire [9:0] pix_x, pix_y;
	input wire video_on;
	output reg [2:0] text_rgb;
	input ip_device_on1,error_on1,value_enter_key_on1,value_enter_rot_on1,result_on1,keep_disp_msg1;
	input [23:0] data_temp_disp;
	input [48:0] q_val_op,i_val_op;
	
	
	reg [7:0] d_ipdevice = 8'h00;
	reg [23:0] d_ip =24'h000000;
	reg [48:0] q_val =48'h0000_0000_0000, i_val =48'h0000_0000_0000;
	
	wire [10:0] rom_addr;
	reg [7:0] char_addr, char_addr_ent,char_addr_error,char_addr_valuer,char_addr_valuek,char_addr_result,char_addr_thank;
	
	reg [2:0] row_addr;
	wire [2:0] row_addr_text;
	
	reg [2:0] bit_addr;
	wire [2:0] bit_addr_text;
	wire [7:0] font_word;
	wire font_bit;
	
	assign  rom_addr = {char_addr,row_addr};
	assign  font_bit = font_word[~bit_addr];
	
	assign row_addr_text = pix_y[3:1];
	assign bit_addr_text = pix_x[3:1];

	always@(posedge clk)
		begin
			if(ip_device_on1 == 1'b1 && value_enter_key_on1 == 1'b0 && value_enter_rot_on1 == 1'b0 )
				d_ipdevice[7:0] = data_temp_disp[7:0];
			
			else if((value_enter_key_on1 == 1'b1 || value_enter_rot_on1 == 1'b1) && result_on1 == 1'b0)
				d_ip = data_temp_disp;
			
			else if(result_on1 == 1'b1 )
				begin
					q_val = q_val_op;
					i_val = i_val_op;
				end
			else;
		end

	Font_ROM font_unit( .pixel_clock(clk),
								.address(rom_addr),
								.data(font_word)
								);

	assign ip_device_on			=(pix_y[9:4]>=3 && pix_y[9:4]<=4 && ip_device_on1);
	assign error_on 				=(pix_y[9:4]==6 && error_on1);
	assign value_enter_key_on	=(pix_y[9:4]==9 && value_enter_key_on1);
	assign value_enter_rot_on	=(pix_y[9:4]==10 && value_enter_rot_on1);
	assign result_on				=(pix_y[9:4]>=16 && pix_y[9:4]<=18 && result_on1);
	assign keep_disp_msg			=(pix_y[9:4]>=25 && pix_y[9:4]<=27 && keep_disp_msg1);

	integer k =0;
	wire [1:8*25-1] enter_text        = "Choose the input device ";
	wire [1:8*25-1] device_text       = "K:Keyboard   R:Rotor  : ";
	wire [1:8*25-1] error_text       = "          !!! ERROR !!!  ";
	wire [1:8*25-1] valuer_text       = "Value from Rotor      : ";
	wire [1:8*25-1] valuek_text       = "Value from Keyboard   : ";
	wire [1:8*25-1] result_text       = "Result:                 ";
	wire [1:8*25-1] q_val_text        = "Q_value (sin(angle))  : ";
	wire [1:8*25-1] i_val_text        = "I_value (cos(angle))  : ";
	wire [1:8*25-1] th_text           = "THANK-YOU!!!            ";
	wire [1:8*25-1] press_enter_text  = "Enter C to Continue     ";
	wire [1:8*25-1] space_exit_text   = "Enter E to Exit         ";

	always@(posedge clk)
	begin
		if(pix_x[9:4]>=1 && pix_x[9:4]<25)
		begin
			k=pix_x[9:4];
				if(pix_y[9:4]==6'd3)
						char_addr_ent     = enter_text[k*8+:8];
						
				else if(pix_y[9:4]==6'd4)
						char_addr_ent      = device_text[k*8+:8];
				
				else if(pix_y[9:4]==6'd6)
						char_addr_error    = error_text[k*8+:8];
						
				else if(pix_y[9:4]==6'd9)
						char_addr_valuek   = valuek_text[k*8+:8];
						
				else if(pix_y[9:4] ==6'd10)
						char_addr_valuer   = valuer_text[k*8+:8];
						
				else if(pix_y[9:4] ==6'd16)
						char_addr_result   = result_text[k*8+:8];
						
				else if(pix_y[9:4] ==6'd17)
						char_addr_result   = q_val_text[k*8+:8];
						
				else if(pix_y[9:4] ==6'd18)
						char_addr_result   = i_val_text[k*8+:8];
						
				else if(pix_y[9:4] ==6'd25)
						char_addr_thank    = th_text[k*8+:8];
						
				else if(pix_y[9:4] ==6'd26)
						char_addr_thank    = press_enter_text[k*8+:8];
						
				else if(pix_y[9:4] == 6'd27)
						char_addr_thank    = space_exit_text[k*8+:8];
						
				else;
			end	

	if(pix_x[9:4]>25 && pix_x[9:4]<35)
		begin
			if(pix_y[9:4] == 4)
				begin
					case(pix_x[9:4])
							6'd26: char_addr_ent= d_ipdevice;
							default: char_addr_ent=8'h00;
					endcase
				end
			else if(pix_y[9:4] == 9)
				begin
					case(pix_x[9:4])
							6'd26: char_addr_valuek= d_ip[23:16];
							6'd27: char_addr_valuek= d_ip[15:8];
							6'd28: char_addr_valuek= d_ip[7:0];
							default: char_addr_valuek =8'h00;
					endcase
				end
			else if(pix_y[9:4] == 10)
				begin
					case(pix_x[9:4])
							6'd26: char_addr_valuer= d_ip[23:16];
							6'd27: char_addr_valuer= d_ip[15:8];
							6'd28: char_addr_valuer= d_ip[7:0];
							default: char_addr_valuer =8'h00;
					endcase
				end
			else if(pix_y[9:4] == 17)
				begin
					case(pix_x[9:4])
							6'd26: char_addr_result= q_val[47:40];
							6'd27: char_addr_result= q_val[39:32];
							6'd28: char_addr_result= q_val[31:24];
							6'd29: char_addr_result= q_val[23:16];
							6'd30: char_addr_result= q_val[15:8];
							6'd31: char_addr_result= q_val[7:0];
							default: char_addr_result =8'h00;
					endcase
				end
			else if(pix_y[9:4] == 18)
				begin
					case(pix_x[9:4])
							6'd26: char_addr_result= i_val[47:40];
							6'd27: char_addr_result= i_val[39:32];
							6'd28: char_addr_result= i_val[31:24];
							6'd29: char_addr_result= i_val[23:16];
							6'd30: char_addr_result= i_val[15:8];
							6'd31: char_addr_result= i_val[7:0];
							default: char_addr_result =8'h00;
					endcase
				end
		end
			else;
end

always @(posedge clk)
			begin
			if(video_on)
				begin
				row_addr  = row_addr_text;
				bit_addr  = bit_addr_text;
				text_rgb	= 3'b111;
				
				if(ip_device_on)
					begin
						char_addr = char_addr_ent;
						if(font_bit)
							text_rgb = 3'b100;
					end
				else if(error_on)
					begin
						char_addr = char_addr_error;
						if(font_bit)
							text_rgb = 3'b001;
					end
				else if(value_enter_key_on)
					begin
						char_addr = char_addr_valuek;
						if(font_bit)
							text_rgb = 3'b000;
					end
				else if(value_enter_rot_on)
				begin
					char_addr = char_addr_valuer;
					if(font_bit)
						text_rgb = 3'b000;
				end
				else if(result_on)
					begin
						char_addr = char_addr_result;
						if(font_bit)
							text_rgb = 3'b100;
					end
				else if(keep_disp_msg)
					begin
						char_addr = char_addr_thank;
						if(font_bit)
							text_rgb = 3'b000;
					end
				else
						char_addr = 8'b0;
				end
			else
					text_rgb = 3'b000;
		end

endmodule