data/full_repos/permissive/170402453/RISC/MUX1.v
1: b'%Warning-WIDTH: data/full_repos/permissive/170402453/RISC/MUX1.v:31: Operator COND expects 16 bits on the Conditional False, but Conditional False\'s CONST \'1\'bx\' generates 1 bits.\n                                                                   : ... In instance MUX1\n       (select == 1) ? in2 : 1\'bx;  \n                     ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Error: Exiting due to 1 warning(s)\n'
module MUX1(
    input select,
    input [BITS-1:0] in1,
    input [BITS-1:0] in2,
    output [BITS-1:0] out
    );
	 
	 parameter BITS = 16;
	 
	 assign out = (select == 0) ? in1 :
					  (select == 1) ? in2 : 1'bx;
endmodule
module MUX1(
    input select,
    input [BITS-1:0] in1,
    input [BITS-1:0] in2,
    output [BITS-1:0] out
    );

	 
	 parameter BITS = 16;
	 
	 assign out = (select == 0) ? in1 :
					  (select == 1) ? in2 : 1'bx;
endmodule