data/full_repos/permissive/201488448/2_circuits/2_sequential/fsm/06_fsm3onehot.v
1: b'%Warning-WIDTH: data/full_repos/permissive/201488448/2_circuits/2_sequential/fsm/06_fsm3onehot.v:10: Bit extraction of var[3:0] requires 2 bit index, not 4 bits.\n                                                                                                   : ... In instance top_module\n    assign next_state[A] = state[A]&(~in) | state[C]&(~in);\n                     ^\n                ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message.\n%Warning-WIDTH: data/full_repos/permissive/201488448/2_circuits/2_sequential/fsm/06_fsm3onehot.v:10: Bit extraction of var[3:0] requires 2 bit index, not 4 bits.\n                                                                                                   : ... In instance top_module\n    assign next_state[A] = state[A]&(~in) | state[C]&(~in);\n                                ^\n%Warning-WIDTH: data/full_repos/permissive/201488448/2_circuits/2_sequential/fsm/06_fsm3onehot.v:10: Bit extraction of var[3:0] requires 2 bit index, not 4 bits.\n                                                                                                   : ... In instance top_module\n    assign next_state[A] = state[A]&(~in) | state[C]&(~in);\n                                                 ^\n%Warning-WIDTH: data/full_repos/permissive/201488448/2_circuits/2_sequential/fsm/06_fsm3onehot.v:11: Bit extraction of var[3:0] requires 2 bit index, not 4 bits.\n                                                                                                   : ... In instance top_module\n    assign next_state[B] = state[A]&(in) | state[B]&(in) | state[D]&(in);\n                     ^\n%Warning-WIDTH: data/full_repos/permissive/201488448/2_circuits/2_sequential/fsm/06_fsm3onehot.v:11: Bit extraction of var[3:0] requires 2 bit index, not 4 bits.\n                                                                                                   : ... In instance top_module\n    assign next_state[B] = state[A]&(in) | state[B]&(in) | state[D]&(in);\n                                ^\n%Warning-WIDTH: data/full_repos/permissive/201488448/2_circuits/2_sequential/fsm/06_fsm3onehot.v:11: Bit extraction of var[3:0] requires 2 bit index, not 4 bits.\n                                                                                                   : ... In instance top_module\n    assign next_state[B] = state[A]&(in) | state[B]&(in) | state[D]&(in);\n                                                ^\n%Warning-WIDTH: data/full_repos/permissive/201488448/2_circuits/2_sequential/fsm/06_fsm3onehot.v:11: Bit extraction of var[3:0] requires 2 bit index, not 4 bits.\n                                                                                                   : ... In instance top_module\n    assign next_state[B] = state[A]&(in) | state[B]&(in) | state[D]&(in);\n                                                                ^\n%Warning-WIDTH: data/full_repos/permissive/201488448/2_circuits/2_sequential/fsm/06_fsm3onehot.v:12: Bit extraction of var[3:0] requires 2 bit index, not 4 bits.\n                                                                                                   : ... In instance top_module\n    assign next_state[C] = state[B]&(~in) | state[D]&(~in);\n                     ^\n%Warning-WIDTH: data/full_repos/permissive/201488448/2_circuits/2_sequential/fsm/06_fsm3onehot.v:12: Bit extraction of var[3:0] requires 2 bit index, not 4 bits.\n                                                                                                   : ... In instance top_module\n    assign next_state[C] = state[B]&(~in) | state[D]&(~in);\n                                ^\n%Warning-WIDTH: data/full_repos/permissive/201488448/2_circuits/2_sequential/fsm/06_fsm3onehot.v:12: Bit extraction of var[3:0] requires 2 bit index, not 4 bits.\n                                                                                                   : ... In instance top_module\n    assign next_state[C] = state[B]&(~in) | state[D]&(~in);\n                                                 ^\n%Warning-WIDTH: data/full_repos/permissive/201488448/2_circuits/2_sequential/fsm/06_fsm3onehot.v:13: Bit extraction of var[3:0] requires 2 bit index, not 4 bits.\n                                                                                                   : ... In instance top_module\n    assign next_state[D] = state[C]&(in);\n                     ^\n%Warning-WIDTH: data/full_repos/permissive/201488448/2_circuits/2_sequential/fsm/06_fsm3onehot.v:13: Bit extraction of var[3:0] requires 2 bit index, not 4 bits.\n                                                                                                   : ... In instance top_module\n    assign next_state[D] = state[C]&(in);\n                                ^\n%Warning-WIDTH: data/full_repos/permissive/201488448/2_circuits/2_sequential/fsm/06_fsm3onehot.v:16: Bit extraction of var[3:0] requires 2 bit index, not 4 bits.\n                                                                                                   : ... In instance top_module\n    assign out = (state[D]);\n                       ^\n%Error: Exiting due to 13 warning(s)\n'
module top_module(
    input in,
    input [3:0] state,
    output [3:0] next_state,
    output out);

    parameter A=4'd0, B=4'd1, C=4'd2, D=4'd3;


    assign next_state[A] = state[A]&(~in) | state[C]&(~in);
    assign next_state[B] = state[A]&(in) | state[B]&(in) | state[D]&(in);
    assign next_state[C] = state[B]&(~in) | state[D]&(~in);
    assign next_state[D] = state[C]&(in);


    assign out = (state[D]);

endmodule
module top_module(
    input in,
    input [3:0] state,
    output [3:0] next_state,
    output out);


    parameter A=4'd0, B=4'd1, C=4'd2, D=4'd3;


    assign next_state[A] = state[A]&(~in) | state[C]&(~in);
    assign next_state[B] = state[A]&(in) | state[B]&(in) | state[D]&(in);
    assign next_state[C] = state[B]&(~in) | state[D]&(~in);
    assign next_state[D] = state[C]&(in);


    assign out = (state[D]);

endmodule