What is a cache write miss? I'm reading Computer Organization and Design MIPS Edition 5th Edition The Hardware/Software Interface on how memory cache works. I came across the following paragraph on page 393;

The other key aspect of writes is what occurs on a write miss. We
first fetch the words of the block from memory. After the block is
fetched and placed into the cache, we can overwrite the word that
caused the miss into the cache block. We also write the word to main
memory using the full address.

I understand what a cache read miss is i.e. when the required word isn't present in the cache, but I'm having trouble understanding what a write miss is(how can we miss to write data?) and hence the subsequent paragraphs.
My understanding is that a write-miss occurs when we want to write data to a location in main memory whose data is not currently in its corresponding cache block.
This is similar to a read miss: if the cache block that a memory location is mapped to does not contain the data of that memory location (indicated by differing tags), then some other memory location also mapped to that same cache block is currently present, and a miss occurs.
Similarly, we &quot;miss&quot; on a write if the memory location we want to write to isn't currently &quot;in&quot; its corresponding cache block, but rather, some other memory location's data currently occupies it.
The important question that follows a write-miss is &quot;do we update the cache block corresponding to the memory location we just updated with that new data, or leave the old?&quot; Perhaps the memory-location's data already occupying that cache block is more useful or being used more frequently than what we just wrote.