Would removing the branch delay slots change the instructions set architecture? I am trying to study for an exam and I noticed a lot of the questions follow the idea of  "Changing the ISA". From my understanding the ISA dictates the structure and format of instructions, so changing instructions or the format (32 to 64 bit) would change the ISA. However I ran into a question which I am not sure how to answer.

"If we remove the branch delay slots, will the ISA be changed?"

My guess would be no, because we're not changing any instructions (right?), but I would like to get an answer from someone more knowledgeable.
The instructions set architecture (ISA) is the contract between the hardware designer and the software designer.  Anything that changes the contract, changes the ISA.

The question you have to answer is: given every possible program written with this particular ISA, do any of them have different behavior (give a different answer) if we remove the branch delay slots.