Simulating a combinatorial network I have various Boolean functions in the sum of products format. I "convert" these via combinatorial logic synthesis into a combinatorial network as an And-Inverter Graph - therefore this network only consists of 2-input, 1-output And-Gates and inverters. Every sum of products function is therefore "responsible" for a certain single output. The network is a multi-input and multi-output network, in- and outputs are Boolean (0 or 1). This network is also parsed as file, so it can be read from.

I know, that such a network can be proven to be correct, but I want to simulate this combinatorial network with certain inputs. My problem is, that I only find ways to simulate a sequential network - nothing for combinatorial networks. SAT-provers might be helpful, but because of the nature of this network and its functions, I already know the functions are satisfiable. I need to know, what output will be generated using certain inputs.

Is there any way to simulate and test a combinatorial network with certain inputs and save the outputs? I know there a SAT-provers out there, but I don't think I can really use those, as I need specific outputs and the Inputs have to be in a specific order. Logic Simulation might be the way to go, as the network is derived from Boolean functions, but I didn't find a way to simulate this network via anything.

Short Example: Network is some sort of adder, 4 inputs, 5 outputs. I then go through the inputs (0000, 0001, 0010, ...) and save the outputs of the network. I can't compare the outputs to a tables of "expected" outputs, because I don't know what the outputs will be (I only know them for certain test cases - the network probably won't be as easy as an adder).

Is there any way to simulate a network like this?
Yes.  Simulation is straightforward and doesn't require any special ideas: it can be done directly, by just executing the circuit one gate at a time.

The algorithm to simulate a combinational circuit is completely straightforward.  Given a combinational circuit $C$ and an input $x$, it is easy to compute the output $y=C(x)$, simply by simulating each gate, one gate at a time.  Each gate in the combinational circuit is either an AND gate or an inverter.  Both can be implemented in software.  So, to simulate such a circuit, you just iterate through the gates in topologically sorted order, compute the effect of each gate, and store the value of its output wire.  This is a trivial, linear-time algorithm.  There's no need for SAT solvers or anything fancy like that.

Of course, when you compute the output of the circuit on some input, it's straightforward to save the output anywhere you like.  If you only want to test the circuit on certain inputs, just do that.  If you want to compare the output of the circuit to the known-correct output, you can do that: it's just an equality test.



Alternatively: A combinational circuit is a special case of a sequential circuit.  A sequential circuit is allowed to have both combinational logic and memory (e.g., registers).  A combinational circuit is the special case where you have no memory (e.g., no registers).  So, in principle any method for sequential circuit simulation already provides you a way to simulate combinational circuits.