How DMA improves I/O operation efficiency? I am reading Computer Architecture &amp; Organization by William Stallings to understand I/O operations. Stallings pretty well explains why Programmed I/O (CPU keeps checking the I/O module register status) &amp; Interrupt I/O (CPU still has to over look data transfer between I/O module &amp; memory) are not efficient &amp; introduces to DMA, where DMA itself handles everything. 

But, however, he also mentions that during a DMA operation, CPU sits idle &amp; has no control over memory bus. If CPU has to sit idle, then how it is better than other two methods ? 

Page no. 415, Computer Architecture &amp; Orgazination by Morris Mano:


  During the DMA transfer, the CPU is idle and has no control of the memory.


Only way it make sense to me is that, CPU can perform any operation which does not involve memory bus during a DMA operation. So, CPU will not be idle. Or am I missing something ?

I think author has formulated in a bad way. It can be phrased like: 


  During DMA transfer, the CPU has no control of memory buses and thus cannot perform any operations involving memory. However it can perform other operations like arithmetic, logical or can operate on data in cache. 


Am I right?
The DMA engine doesn't grab the bus for the duration of the whole transfer, only while specific data is being transferred. Yes, that means CPU acces to memory is hampered, but not shut off completely. The CPU can also work with data from its cache in the meantime.