Hit/Miss in a 2-way set associative cache with offset "In a 2-way set associative cache of 4 blocks containing 4 words each, which one of these addresses will return a hit when being read? The blocks to be retained in the cache are decided by LRU."

4 word / block means that the offset = 2 bits.

2-way means 4 blocks / 2 = 2 sets. The index then needs 1 bit.

And thus the tag is 3 bits, since we're dealing with 6 bits adresses.



What I'm not too sure about is the hit/miss part. In such a case, do we need to have an exact match for the Index, the Tag and the Offset to get a hit?

Or is a hit encountered as soon as the Index and the Tag match?

If it is the latter then what role plays the offset in such a situation?
No, you don't need to have a match for the offset. When you 'miss' some address (= when its not in the cache) , the whole block is copied from the memory to the cache. i.e for address $001111$ , we will copy the 4 word block: $001100$ , $001101$ , $001110$, $001111$  to the cache. Therefore, for example, in line 4 you get a 'hit', not a miss.

So a hit is encountered as soon as the Index and the Tag match. The offset tells you which word from the block you want to read, as there are 4, and you want only 1. for example, for $001111$ it will skip the first 3 words and read the fourth.

EDIT: if I remember correctly, in a 2-way you need 3 offset bits and not 2. 1 bit is 'block offset' so you know in which block of the 2 has your word (because there are 2 blocks with same tag and index).