Is the "data path cycle" the same thing of the "fetch-decode-execute cycle"? I am reading the book Structured Computer Organization (5th edition) by Tanenbaum and at a certain point, in the second chapter, he talks about data path cycle and fetch-decode-execute cycle, and I am not understanding if they are really the same thing.

The data path cycle should be the number of small and minimal steps that a CPU goes through each cycle. On the other hand, the fetch-decode-execute cycle is the number of small steps that could be generalised like this:


Fetch the instruction from the memory and put it into a register
Change programming counter to point to the next instruction
Determine the type of the instruction fetched
If the instruction uses a word, determine where it is
Fetch the word, if needed, into a CPU register
Execute instruction
Go to step 1.


The fetch-decode-execute cycle is common to all computers, so each data path cycle should be a fetch-decode-execute cycle, right?
Data path cycle is not widely used terminology.  I believe Tanenbaum made it up.  I don't have the 5th edition, but if I look up Tanenbaum's slides on Google (for example: http://www.verlab.dcc.ufmg.br/_media/cursos/arquitetura/2011-1/transparencias/tanembaum_4.pdf) it appears that he is using data path cycle to refer to a single clock cycle.  As in "the amount of time for all the signals to propagate all the way through the data path."  Think of it as the amount of time required to perform one micro-instruction.

But Tanenbaum uses a multi-cycle-per-instruction microcoded organization, so the fetch-decode-execute cycle (for instructions rather than microinstructions) usually involves multiple clock cycles.