How does the OS detect B&B violation from hardware? After reading about Base &amp; Bounds memory protection mechanism from Stanford CS140 lecture notes, I understood from the explanation below that there is an integrated circuit performing B&amp;B checks somewhere in the CPU (correct me if I'm wrong):

On each memory reference, virtual address is compared to the bound
register, then added to the base register to produce a physical
address. A bound violation results in a trap to the operating system.

However I didn't find any information about how the OS detects such violation from the hardware in order to handle the exception.
Does anyone have any idea?
When an invalid access is detected, the #BR exception is triggered, the CPU will switch to privilege mode and load the corresponding vector (Bounds range exceeded) from the IVT. The CPU also pushes the faulty EIP (as well as other things) to the kernel stack and updates the BNDSTATUS register to describe the fault.

Note: the #BR exception saves other purposes as well because Base &amp; Bound works like paging: there is a 2-level hierarchy to store B&amp;B values (since the CPU can only store 4 of them in registers), so it works a bit like a TLB but for B&amp;B.