How exactly MOV AX will load data from RAM? Somewhere on Internet I read  : Whenever word size is greater than memory cell size, then there is a need for accessing multiple memory cell
Example:
for 16 bit processor:
MOV AX [2000]
 To transfer memory content, we need to transfer 16 bit data , so we need to access 2 memory cells
M[2000 H]
&amp;
M[2001 H]
But I didnt get this. Why 2 cells ?
I interpreted as follows:
1) 8 bit binary code will be fetched which decoded as MOV AX.
2) From next memory location , (00 H ) will be fetched as memory is byte addressable.
3) From next memory location , (20 H ) will be fetched.
4) In IR register it is treated as ( 2000 H ) and data at (2000 H) memory location is       fetched and moved to AX register.
So why to access M[2001 H] memory location ??
I am not sure if this is actually on-topic here, but anyway.

The main memory in x86 architectures is addressed byte-wise. If you want to retrieve 16 bits from address 2000h (note that AX is a 16 register), then you will need to read 8 bits from 2000h and 8 bits from 2001h. This is why the operation needs to read "2 cells". Note that the term "cell" is not the correct one, as it typically refers to individual 1-bit memory units without addressing logic.

Note that the processor actually doesn't read the two bytes separately. Rather, the content from bytes 2000h and 2001h are fetched at the same time as the data bus to cache and main memory is >8 bits and the addresses you have here as examples are aligned, so the underlying architecture supports the parallel read.