Processor pipelining question: number of instructions per second A question from the textbook Modern Operating Systems by A. S. Tanenbaum reads as follows:


  A computer has a pipeline with four stages. Each stage takes the same time to do its work, namely, 1 nsec. How many instructions per second can this machine execute?


This was recently a homework question in my operating systems class (it's already been graded). Here's the reasoning I provided (screenshot):







The book's answer key says the following:


  Every nanosecond one instruction emerges from the pipeline. This means the
  machine is executing 1 billion instructions per second. It does not matter at all how many stages the pipeline has. A 10-stage pipeline with 1 nsec per stage
  would also execute 1 billion instructions per second. All that matters is how
  often a finished instruction pops out the end of the pipeline.


I was wondering if someone could explain this; the book's explanation doesn't make sense to me. One instruction emerges from the pipeline every second only after the first second because we lose those 3 nanoseconds initially. And it's only 1 billion instructions per second if we consider the limit.
The book quite rightfully ignores the three startup cycles. Nobody cares whether it performs $10^9$ or $10^9-3$ instructions. In reality, "1 ns" is never exactly one nanoseconds, so the deviation from the clock rate not being exactly one per nanosecond makes much more difference.