VHDL fixed point implementation of IIR filter I have a filter described by the following transfer function H(z):

$$H(z) = \frac{156 - 156z^{-2}}{16384 - 32443z^{-1}+16073z^{-2}}$$

How will this be implemented with the first term in the polynomium being different from 1?

Normally i would implement the filter with something like:
$$y[0]=156\cdot x[0]-156\cdot x[2] +32443\cdot y[1]-16073\cdot y[2]$$

but in this case, it is missing the term:
$$-16384\cdot y[0]$$

How may this term be inserted? I have tried just inserting it, inserting and shift the y's by 1. I just get noise doing this (looks like overflow).

It is to be implemented in VHDL on a FPGA.
Filter output has to be divided by the first term of denominator.
In this case, division by 16384 can be effectively done by logical shift 14 bits to the right.