Digital implementation of type I compensation network I'm looking for advice or references on how to implement a "type I" compensation network of digitally.  An analog example is shown in the following diagram:



I am familiar with the basics of digital signal processing, and have read about digital integrators.  Would it be possible to use something like a first order IIR digital integrator, and just flip the sign of the output depending upon whether the input is above or below VREF? The goal is to drive a PWM output of a microprocessor, so there may be a better way to do this in the digital domain than attempting to copy the analog implementation.  Any advice would be appreciated.
The integrator is unstable, so it will probably just blow up. There's such a thing as a leaky integrator that does an OK job of getting pretty close. Have a look at the algorithm listed here on how you would go about implementing it using code. The math is pretty straightforward.

The differentiator uses b1=1, b2=-1. The integrator is just the inverse, but what you'll find is you need to modify (decrease) the filter coefficient by a subtle amount to make it 'leak'. For the integrator use something like a1=1, a2=-0.99. The closer a2 gets to 1.0 the greater the risk you run on it going unstable. Decreasing a2 to something like -0.95 will result in something that looks less and less like an integrator. Play around with it.