AES block cipher modes of operation have a project in which I have to implement an en/de-cryption structure using a standard AES block of 128-bits in VHDL and I think I'm a bit confused. So I'd like to ask some questions about AES and its modes of operation.


When we say that we use a 128-bit key, does it mean that the data input's size is 128-bit or not? Generally can the block size be smaller than key?
A block receives a plaintext. When the same block can receive a new plaintext?
How can I perform each mode to make a system which encrypts information (parallel sequential)? I think that in NIST publication is clearly which modes can be performed pipelined or not. Although, I've been asked to find new ways of performance. What can I do? Please some help.
AES has a 128-bit block size, period. The valid key sizes are 128, 192, and 256-bits.
I am not sure what you mean by that, a "block" is a 128-bit group of data, being the input and output to the cipher, it does not receive anything. Please revise that part of the question, and I will adjust my answer.
CTR, OCB, and ECB are the only modes I know that can run encryption on blocks independent of eachother. CTR is the obvious choice for a fast secure implementation and turns the block cipher into a stream cipher. OCB is a more complex mode built on ECB, where both the input block and cipher output are modified using an incrementing counter generated from a nonce, and provides 1-pass authentication.