Should the Schedule of ``High-level Operations'' Respect the Linearizability of ``Low-level Operations'' in Proof of Simulation Algorithm?
I understand the proof as follows.
Start with an arbitrary execution of the above algorithm. In this execution each operation on $TS[i]$ and $Val[i]$ has already been linearlized by assuming that these are single-writer multi-reader atomic registers. Therefore, by assumption, the schedule linearizes these low level operations.

The remainder of the proof shows that there exists some unique assignment of distinct times for each high-level operation such that the following are true.


For each such operation that starts at time $t_s$ and ends at time
$t_e$, the assigned time $t_a$ is in the interval $[t_s,t_e]$. 
The sequence of high-level  reads and writes, as determined by this assignment of times, satisfies the linearlizability.