Pros and Cons of Average Memory Access Time When Increasing Cache Block Size
An increased block size is indeed good for spacial locality.

On the other hand, a large block size increases the possibility of fragmentation and false sharing (in multiprocessor system).

Another way of thinking about this problem is if your cache size is fixed (based on cost, etc.), and you are changing the block size. In this case, as you increase your cache block size, accessing adjacent memory locations will have more hits (spacial locality), but there is a disadvantage considering temporal locality. Consider the extreme case, in which the cache has one block. Of course, this would be good for spacial locality, but it is terrible for a program repeatedly accessing two memory locations that are at least one full block size away from each other. The cache will miss every time.

EDIT

Consider this: you have a process with data in consecutive memory locations "A" through "H" of size "1." You have a warm cache of size "4" (ignoring compulsory misses, the misses/repeat below are average case) and an LRU cache replacement policy. 

Let the cache block size be 4 (the "largest" block size case).


For repeated, in-order memory accesses A-H, this cache has 2
misses/repeat.
For repeated, out-of-order memory accesses A, B, E, F,
C, D, G, H, this cache has 4 misses/repeat.
For repeated, out-of-order memory accesses A, B, E, F, this cache has 2 misses/repeat.
For repeated, random memory accesses A, E, B, F, this cache has 4 misses/repeat.


Let the cache block size be 1 (the "smallest" block size case).


For repeated, in-order memory accesses A-H, this cache has 8 misses/repeat.
For repeated, out-of-order memory accesses A, B, E, F, C, D, G, H, this cache has 8 misses/repeat.
For repeated, out-of-order memory accesses A, B, E, F, this cache has 0 misses/repeat.
For repeated, random memory accesses A, E, B, F, this cache has 0 misses/repeat.


Let the cache block size be 2 (the "optimal" block size case).


For repeated, in-order memory accesses A-H, this cache has 4
misses/repeat.
For repeated, out-of-order memory accesses A, B, E, F,
C, D, G, H, this cache has 4 misses/repeat.
For repeated, out-of-order memory accesses A, B, E, F, this cache has 0 misses/repeat.
For repeated, random memory accesses A, E, B, F, this cache has 2 misses/repeat.


The "largest" block size case is best for repeated, in-order memory accesses (best for spacial locality) and worst for repeated, random memory accesses (worst for temporal locality).

The "smallest" block size case is worst for repeated, in-order memory accesses (worst for spacial locality) and best for repeated, random memory accesses (best for temporal locality). It is good for out-of-order memory accesses, depending on the size of the working set.

The "optimal" block size case is good for repeated, in-order memory accesses and good for repeated, random memory accesses, but it is not the "best" for either case.