How is an OS page stored in a k-way set-associative cache?
There are few things to be cleared first. 

Lets assume a away set associative cache with bwide cache-lines and c number of cache lines. In this configuration, size of the cache is a X b X c. Number of bits needed to represent the number of cachelines, is called index bits. (ex: 1024 cachelines will need 10 bits). When we need to load data, the index bits of the memory address tells us in which cache line this data will be stored. Since our cache is away, there are a number of cachelines, all indexed by this index bits, this data can be stored. If there are empty lines, we will use them, otherwise we have to replace and entry and store the newly fetched data.

Now coming back to your original question,

Think of "loading the page to cache" as reading the entire page in cacheline quantities. Assuming all the cache entries are invalid, first n reads will be stored in the first entry in each block of cachelines, the second n reads will be stored in the second entry in each block.

In a 2-way set assoc cache with 4 cachelines, this is how it would look like.


cacheline 1 set0 - addr 0
cacheline 1 set1 - addr 4
cacheline 2 set0 - addr 1
cacheline 2 set1 - addr 5
cacheline 3 set0 - addr 2
cacheline 3 set1 - addr 5
cacheline 4 set0 - addr 3
cacheline 4 set1 - addr 7