Can we load the data on the bus on multiple registers at the same time?
If we somehow turned on multiple load signals at the same time, in theory it should work to transfer the same value to multiple registers in the same cycle.

(Depending on the hardware design technology, there may be some power considerations, such as amplification of the data bus lines as they go into the various registers, since more gates are consuming the data bus lines concurrently; it is possible that such is required anyway, though.)

However, the diagram you're showing doesn't reveal the answer.  Here's the issue: it doesn't show how the load signal is generated and delivered to the various registers.&nbsp; So, we can't really tell.  

If the load signal is driven by an ordinary MUX (under control of say, instruction decode, e.g. some field of the IR), then by design, it would only ever turn one line on at a time, meaning the answer is no.

But an alternate implementation could turn on multiple registers' load signal simultaneously, so in that case, then yes.

See also Register File, regarding "ports", in how processors with general purpose registers deal with the need to read and write them concurrently.