Why is superscalar processor SISD?
There is a single instruction stream. Modern processors just manage to pick up multiple instructions from the instruction stream simultaneously. 

For something like a POWER processor, where each instruction is always four bytes in size, that is quite easy. Instructions are loaded into cache lines, and if a cache line holds 8 or 16 instructions, it is quite easy to read four instructions at the same time. 

For an x86 processor, it is more difficult because instructions have different sizes. Still, it is possible (with a lot of effort) to read several consecutive simple instructions simultaneously.