Calculating Tag Bits in a Direct-Mapped Cache
Since Hennessy &amp; Patterson uses MIPS architecture as the basis for all its examples, we can assume that this example is no exception. MIPS is byte addressable. Hence a byte offset of 2 bits (to address the four bytes in the 32-bit word size) need to be included in the 32 bit address. 

These 2 bits occupy the least significant two bits of the 32 bit address's binary representation. Hope that helps!