What if block sizes are not equal among caches?
To begin with, block sizes are usually equal across all levels of the cache hierarchy. I would like to see if someone has an example of a commercial architecture where is is not true. There are multiple reasons for this, all of which involve circuit complexity

Now, to answer your question, one could do either. When the processor requests a SP float (4 bytes), only 4 of the 16 (in your example) bytes from the block of the L1 are sent towards the pipeline. The same logic that selects this subset of bytes can be used to select the subset of 16 bytes (in your example) from the incoming block of 32 bytes.

Alternatively, you could over-write the neighboring block in L1 with data from the block of 32 bytes because spatial locality would imply you are likely to require this data soon.