Finding cache block transfer time in a 3 level memory system
I guess you got the access time wrong. Access time means time to locate a data on a memory. So, whoever accesses the memory (be it CPU or some other device) it will be the same. 

Coming to first question here. A block is transferred from L2 to L1. And L1 block size being 4 words and data bandwidth being 4 bytes, it requires 1 L2 access (for read) and 1 L1 access (for store). So, time = 20+2 = 22 ns. 

For the second question, L2 block size being 16 words and bandwidth between memory and L2 being 4 words, we require 4 memory access (for read) and 4 L2 access (for store). Now, we need to send the requested block to L1 which would require 1 more L2 access (for read) and 1 L1 access (for store). So, total time

= 4 * (200 + 20) +  (20 + 2)

= 880 + 22

= 902 ns