How does a cache handle overwriting between 2 addresses in the same block?
Your program will work exactly as if there was no cache, and as if each single memory operation was completed before the next one is started. 

Typical implementations will first make sure that the complete data for a cache line is stored in the cache. So for example writing four bytes may first read the complete 64 byte line from memory. 

With a line of data in cache, accessing it can be done very quickly. If there are multiple instructions reading or writing, you can expect one to be executed completely in each cycle. If instructions access different cache lines, a powerful processor may allow simultaneous access to two different cache lines. A powerful processor may also allow simultaneous access to clearly separate parts of a cache line. 4 bytes at location 2 and 4 bytes at location 6 may not count as “clearly” separate. 

If you access different cache lines, the one that is accessed by a later instruction may be available in the cache earlier, and the actual access may happen earlier.