What are the disadvantages of having many registers?
The disadvantage is higher latency per instruction.  Either you need to run the processor clock slower or you need to pipeline the register file, so each instruction will take more cycles.  (Pipelining the register file is difficult, and rarely done.)  A register file is a physical thing, thus must obey the laws of physics.  (In particular, that our universe has only three spatial dimensions, and that the speed of light is a constant.)  Suppose your register file is 2 dimensional (as all are today).  Then the register bits are typically arranged in a rectangle with width $b$ (where $b$ is the number of bits stored in each register) and height $N$ (where $N$ is the number of registers.)  (This assumes that the circuit to implement the bit is approximately square.)

Here's a picture of a 3-ported 4x4 register file that I found at http://gyan.fragnel.edu.in/~surve/COA/ISA/Images/Figure4.37.jpg:


Each time you read a register you need to propagate a read-enable signal to each bit of that register across the width of the array.  If the read-enable wires are buffered then 
the delay to propagate a signal down the wire is proportional to the length of the wire.  (Neither the horizontal nor vertical wires in this diagram are buffered.  Buffering the vertical wires is actually hard, because that's a many-to-1 bus, not a 1-to-many point-to-point signal, so you may not be able to do that at all.  In the case that you can't buffer a wire, the wire will have a delay proportional to something like the square of the length of the wire.)

So at best a register file access is going to take time proportional to $O(b+N)$.  (That doesn't count the time for the decoder, and assumes that you somehow figure out how to buffer all the wires.)

To sum up: the more bits you are storing, the slower the storage.