Learning cryptography using a FPGA
As for goals, there are typically two that you would look to when implementing something on an FPGA: first, minimizing latency; second, maximizing throughput.

To minimize latency, you would use the FPGA to perform a computation much faster than you could do on a CPU. An example here would be the DES cipher. DES is well suited for hardware and you can get significant reductions in latency using an FPGA.

The second goal to potentially look at is maximizing throughput. The idea here is that you could potentially use hardware to encrypt 100s of streams in parallel.

As to which algorithms are not suited for FPGA, Thomas pointed out scrypt. I'm guessing other KDFs are similar in that they try to make it extremely hard for an attacker to gain any advantage by using an FPGA. Of related interest might be this question on bcrypt using GPUs.