Timing Side Channel on error-correcting code
This may indeed leak information. If we can induce data dependent errors. If an attacker can induce a bit flip it won't help him, but it is actually more likely he could induce bits to be set by generating relevant interference. 

If a bit was 1 to begin with the extra interference won't make it any more 1, but if it was 0 to begin with? setting it to 1 would be an error which needs correcting and you may be able to time this. 
Just in general trying to create more set bits seems like a practical attack and with the timing of the ECC would allow at least (over repeated attempts) to assess the number of set bits. 

A more complicated attack on which bit is set would require a great degree of control on the errors. Need much more information on the complete setup in order to confidently rule this out, but it seems more far fetched.