Basic PLL theory: voltage-controlled oscillator confusion
Here are some helpful tips to proceed with an all digital PLL implementation specific to your desire to determine the phase of your reference by observing the phase of your (cleaner) VCO. 

First I would recommend using an NCO instead of a VCO. Here is a previous post where I provided hopefully helpful information on implementing an NCO. 

Numerically Controlled Oscillator (NCO) for phasor implementation?

The advantage with this is that you can directly read the instantaneous phase from the phase accumulator (it also implies that you have some master reference of time since the phase accumulator will be continuously counting consistent with the output frequency as $d\phi/dt$.

Next assuming your "capture range" is narrow enough, you can use a simple multiplier as the phase detector, followed by a wide low pass filter for the purposes you describe; a real multiplier will create the sum and difference of the two signals; you would be multiplying the NCO digital output with a digitized representation of your reference signal resulting in a component at the multiplier output that is at twice the reference frequency (sum of reference and NCO specifically) that you want to filter out and the difference of the two which results in the phase error between the two. For more details on such phase detectors see the "Phase Detector" section of this post:

Phase synchronization in BPSK

Also at the bottom of the above link is an all digital carrier recovery loop that would be similar in structure to such a PLL implementation for your purpose. Specifically after the error signal shows the implementation diagram for the Proportional-Integral Loop filter that can be used after the wider filter mentioned above.  The output of the Loop Filter is the control word as the input to the NCO (The NCO is also shown in this diagram as a complex implementation providing both sine and cosine outputs, to simplify your first approach you can simply use a real NCO and real phase detector which is a single multiplier).

Note depending on phase detector used, the loop will likely lock in quadrature to the input signal (if you use a real multiplier specifically this will happen as the phase detector output is 0 when the two inputs are in quadrature).

As far as "capture range" when using the simple multiplier as a phase detector; typically this is referred to the frequency range in which a PLL locks within a single beat-note between the frequencies compared, and the tuning range of the NCO should be limited to stay within this range.   Here is a reference that develops the capture range for a simple XOR gate phase detector (note that an XOR gate is a hard-limited multiplier so has a similar operational range).

http://www.cypress.com/file/60101/download