What could cause a phase difference between a FPGA implemented FFT and numpy.fft.rfft
Unless the sampling of the real signal is synchronized with the data, the sampled real data will often have different phases from synthesized data. The real signal will also not be noiseless.
Think of this as the difference between:
$$
x_{\tt real} [n] = A \sin (\omega n + \theta) + \epsilon[n]
$$
and
$$
x_{\tt synthetic} [n] = A \sin (\omega n ) 
$$
Here, $\theta$ is the phase offset due to the lack of synchronization and $\epsilon$ is the noise sequence.

Another thought: I'm wondering if it's a problem of offsets?  The manual entry for rfft says:

The truncated or zero-padded input, transformed along the axis
indicated by axis, or the last one if axis is not specified. If n is
even, the length of the transformed axis is (n/2)+1. If n is odd, the
length is (n+1)/2.

The numerical example at the bottom shows:

which indicates that while fft returns $N$ points, rfft returns $N-1$ points.  Could it be an indexing issue?