Fast Optimization for Long FIR Filters
Sampling will be at about 1 GHz, output should be about 10 kHz


So, you're decimating by a factor of $10^5=2^5\cdot5^5$.

This very much says that you'd normally go ahead and successively decimate.

In an FPGA, halfband filters are especially cheap and efficient to implement; better yet: they're extremely easy to design, and you don't have to change the shape the halfband filter for each step (though you certainly can, to some gain).

I'd probably (you'll have to do your own effort estimates; Sylvain Muneaut of the Osmocom project had a handy cascaded FIR decimation effort calculator, can't find it...) do the following, from a pure gut feeling


1 GHz -> Halfband
500 MHz -> same Halfband
250 MHz -> ¼-band
62.5 MHz -> simple $\frac15$-band filter
12.5 MHz -> simple $\frac15$-band filter
2.5 MHz -> good $\frac1{25}$-band filter
100 kHz -> excellent $\frac1{10}$-band filter


That way, the easiest to calculate filters (i.e. the ones with the least non-zero coefficients) run at the highest rate, and and the closer you get to the bandwidth you want to "protect", the flatter your passbands and the steeper your transition bands can get.

For complexity reasons, you could consider transferring the 62.5 MS/s or 12.5 MHz out of your FPGA into a PC and processing it there on a multicore CPU – CPU power is much cheaper than FPGA power these days, for memory intense tasks like long FIRs, at least.

Generally, the question is whether you're not doing something questionable when sampling a 10 kHz signal at 1 GHz; but that's due to the physical reality of the system you're observing, and it's hard to help without knowing that system.