Timing recovery lock in receiver
As far as the recovery time and results for the timing recovery, this is a loop implementation and you would need to review the complete loop for stability and gain parameters to balance loop bandwidth &amp; convergence time, stability and noise performance.

Even with direct board to board communication you will have a static timing offset as the receiver needs to determine the optimum point in which to sample the recovered data in each symbol.

Step response testing of the timing error at your loop filter input and output can be insightful; the input to the loop filter will likely be quite noisy but you can filter your observation (as long as the filter bandwidth is much wider than your expected loop bandwidth this will be valid) to be able to see how it responds to a step change in time offset. Even better is if you have an accurate simulation model of your receiver so that you can observe the time offset more directly, and to observe what occurs as you change loop gain parameters.  

Also through simulation and with testing on your hardware I would recommend creating an eye-diagram to better understand the core problems you may be having with data recovery. With this you can best observe the predicted sampling location for making a data decision versus the ideal.