Why does this parallel IIR filter have such a weird form?
The main difference between the form the OP is showing and the referenced solution is that the referenced answer isolates the pole and moves it further away from the unit circle resulting in a more stable design applicable to fixed point solutions. In particular the solution the OP gave has delay accumulation from each element that is within the feedback loop (four multiplier and adder elements) which would limit the maximum clock rate that it could operate in a stable condition for in a realizable implementation. 

This is depicted in the diagram below showing the synchronous and combinatorial elements. In order for this diagram to accurately match the first order IIR filter (a single feedback tap), the internal functionality shown must be combinatorial. This will run at 1/4 of the clock rate, but will take significantly longer for the state to settle between clock cycles than the implementation shown in the OP's Wikipedia link copied below this image.   

OP's Diagram



Wikipedia Diagram
(note this is only showing two of 4 outputs ($y[4k]$,$y[4k+4]$), in Ben's answer he links a pdf that shows the expanded version of this on p. 35 that shows all four outputs that would be needed after each clock cycle. In either diagraml this partial one or the complete one, the feedback loop is the same, which is the main point: it consists of only 1 adder and 1 multiplier running at 1/4 the clock rate, rather than 4 adders and 4 multipliers in the critical feedback loop).