Change phase of the output of a buffer
If you are referring to a buffer as in a logic gate, this question may be more appropriate on the electronics stack exchange site but here are some suggestions. 

If it is a logic gate, you must be referring to a fixed frequency clock, and shifting the phase for this is quite trivial. Here are some approaches to doing this:

For 180° simply invert with a not gate (inverter).

For 90° and 270° you can double the frequency with a frequency doubler and then invert the 2x clock and then divide by 2 with a flip flop (since it's output changes state on each rising edge). You need to gate the reset on the divide by twos with your original signal to ensure a consistent phase state (either 90° or 270°)

For 90° you can phase-lock a like frequency VCXO using an XOR gate as the phase detector which will have a lock point at 90°, invert this to get 270°.

For 90° you can implement a delay lock loop (similar to above but with a voltage variable delay line and compare one clock output to the delayed one with the xor gate, integrate it's output and use that to control the delay line for a first order DLL which will lock to 90°)

For non precise (temperature sensitive) approximate phase shifts, cascade buffers with RC filters in between.

For variable phase shifts there are plenty of delay lines on the market: https://www.digikey.com/products/en/integrated-circuits-ics/clock-timing-delay-lines/688