Suggestion for a DSP board to implement a Kalman filter in real-time at a rate of around 4MHz or higher
The conclusion of my discussion with hops and Marcus was that getting a DSP to operate with an ADC and DAC at the latency required for my application (&lt;=250ns for 4MHz) would be difficult and require writing some custom interface. We concluded that the best option is to continue to work with the FPGA and improve my VHDL implementation using pipelining, bit widening to reduce my usage of large numbers of bits and turning my functions into architecture blocks. An alternative solution was to attempt to use Vivado HLS to generate VHDL code from C code.