Making a toy DSP processor
The features that (used to?) distinguish a DSP from a more general-purpose CPU more-or-less centre around effective execution of a tight loop of MAC (multiply-acumulate) instructions, iterating over two arrays. This implies


a MAC instruction (with saturating behaviour)
access to two operands per MAC instruction (often realised by two memories)
low inner-loop overhead (for instance hardware counter/begin/end registers)
fast adjusting of the (two) data pointers
when a cache is present: fine tuned control over the cache behaviour, including prefectching of data


In your situation I would dig up a few typical DSP algorithms (convolution, filters, FFT), find the inner loop, dream up the instructions required to do that loop as fast as possible, implement those instructions, and then add other instructions to make it look like a real CPU. For extra bonus points: minimize transistor count in order to minimize battery drain.