Driving MOSFET with 555 timer
alexan_e's answer in the reference given by Dejvid_no1 is useful but does not fully answer your question. 

Use a small value resistor from 555 to gate - maybe 10 Ohms.
The purpose of the resistor is mainly to reduce gate ringing on switching transitions. 

A secondary use, probably not an issue here,  is to very slightly slow clock edges with high capability drivers in order to reduce extremely fast FET switching edges which increases dissipation. 

An addition which may not help but which might be of great value and which costs very little is to add a reversed biased zener from FET gate to source and mounted with minimum (reasonably) possible lead length from the FET. Zener voltage should be somewhat more than driver  Vmax and less than FET Vgs max. eg typically a 15V zener for a 12V gate driver. This clamps gate voltage to a maximum voltage slightly above the maximum the driver can apply. The purpose is to clip any transient voltages coupled into the gate by Millar capacitance coupling from the drain. This is most likely to happen when their are large positive inductive transients on the drain - which is a possibility with your application.
While the driver MAY clamp the gate drive when it exceeds driver Vdd, and while you probably have a catch diode on the drain, if you have small inductances due to  PCB traces  then inductive ringing spikes may manage to be faster than the protection provided. That's a series of "may"s required to get bad results.   

In practice I have found in worst case circuits that an application, where the FET would survive for typically a few minutes without the zener, would survive indefinitely with one. I now add one as of right in any FET driver. If your load is pure resistive (not in this case) then the zener is theoretically not needed. Murphy works hard to try to ensure that no FET load is ever pure resistive.