Voltage holder circuit configuration circuit
What you're talking about is called sample-and-hold. To do this, you need a storage element - a circuit without one like yours will rapidly drift. The most common way to do this is to use an Op-amp:



The two triangles represent op-amps configured as voltage followers. The first one acts to decrease the impedance of the input, allowing the capacitor to be charged faster; in your example diagram this isn't necessary since your input is already low impedance. The second opamp provides a low impedance output, making it possible to interface the sampled voltage with other parts of the circuit without draining the capacitor.

Even with a circuit like this, you need to recharge the capacitor periodically, as it will gradually discharge due to parasitic resistance. In a digital system this would typically be implemented with a DAC and a multiplexer controlling the sample switch, which loops through each sample-and-hold output in order, refreshing them periodically.

You can also get dedicated sample-and-hold ICs that integrate the opamps and switch, and have very low droop rates, but they tend to be expensive and specialized.