UART read consistently missing half of the transmitted bytes
The issue here is that both usart_write_buffer_wait() and usart_read_wait() are blocking. The USART hardware seems to have a 2 byte FIFO buffer on RX.

Now what happens is the RX FIFO is filled during writing, and usart_write_buffer_wait returns during the transmission of the last character.

As soon as usart_read_wait is called - which can only happen after usart_write_buffer_wait due to it being a blocking function, it reads the first 2 bytes from the fifo. The following bytes are missing due to fifo overflow - check hardware status registers, they should tell you that. 
The last byte is received and read once the usart finished the transmission's stop bit.

Workaround: Use interrupts or DMA for RX, TX or both.