Delayed latching switch
As is usually the case with a timer task like this, this would be an easy job for a small (6 or 8-pin) microcontroller such as a PIC10. But if you're not familiar using a microcontroller, that's a fairly steep learning curve. 

So instead this circuit should do what you want.



Initially, both flip-flops are reset, and the \$\small \overline{\text{Q}}\$ output of the second flip-flop is high, so the 74HC03 pulls the EN line to ground (the 74HC03 is open collector, since the EN lead is pulled high by the Powerboost 500 module).

When the input goes high, the 74HC221 triggers.  (The 74HC221 is a non-retriggerable version of the 74HC123.)  \$\small \overline{\text{Q}}\$ of the '221 goes low, setting the first 74HC74 flip-flop.  When the timer expires, the combination of the '221's \$\small \overline{\text{Q}}\$ high and the Q output of the first flip-flop high sets the second flip-flop, enabling the EN lead through its pullup on the Powerboost 500 board.

Pushing the reset button resets both flip-flops, allowing the sequence to repeat.

Because the circuit uses a 74HC221 instead of the retriggerable 74HC123, even if the input drops to 0 and then goes high again during the 10 second timeout, the timeout will not be extended.  If that is not the behavior you want, substitute the 74HC123 -- it has the same pinout.  Also, if the input stays high longer than 10 seconds, that won't affect the timeout either.

The circuit runs on 3.3V, assuming you use 74HC logic (not LS or HCT).