Is it possible to generate a functional EEPROM (with persistence) inside an FPGA/CPLD
Modern Xilinx FPGAs have features like:  


eFuse  
USER register


maybe this covers already your needs.
The provided flash memory is mostly designed to store atleast 2 designs. This flash can be read and write from the FPGA. So you could use a memory space at the end.
Most boards are equipped with serial devices like:  


OneWire EEPROMs
IIC EEPROMs
IIC RealTime clocks with embedded non-volatile memory (battery backupped)
SPI serial flash memory chips
...

It's even possible to look into the network PHY for some nvram / EEPROM :)