Design a 4-bit binary counter using D flip-flop
There is more than 1 way to make this device. There synchronious and asynchroinious counters.

We will take the simplest example, to make a clock(counter) we need to change the D-triggers into T-triggers, this is done by connecting the Inverse Q output to the D input. The Data Trigger works in the following way, if there is 1 on its D input and it receives a clock signal, the 1 from the D will be transfered to the Q not inverse output, the Q inverse output will become 0.

The table for Q not inverse is as follows:

0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111


Q inverse will always be the opposite of Q not inverse. The most left trigger is the least significant bit. The most right trigger is the most significant bit.
After the output Q not inverse changes to 0, the output Q inverse will change to 1, since Q inverse is connected to the Data input on the trigger, on the next clock impulse the 1 from the D input will be moved to the Q not inverse output, and so on for every trigger.

The circuit is here: