What components are necessary for an FPGA?
You don't need much.  Here's a list of what you might need:


FPGA itself
FPGA configuration source


SPI flash + some method of programming it (direct or indirect via JTAG) (cheapest)
JTAG programmable FPGA config flash (more expensive, but quite convenient)
Parallel or serial load from external controller
For some FPGAs, small config flash + load core over PCIe after enumeration
Integrated with FPGA (this is not common, but some FPGAs support this - e.g. spartan 3AN)

Voltage regulators


Core supply


generally very low voltage, 0.9 to 1.2 volts
might need quite a few amps for a large FPGA (maybe around 100 to 500 mA for a small FPGA, can be up to 20 or 30A for a very large FPGA, FPGA size (static power), design size, clock speed, and activity factor dependent)
DC-DC converter recommended as LDO will be very inefficient

Might need auxiliary supply/supplies for other internal logic, generally 2.5 to 3.3v
I/O supply, might need multiple voltages depending on design
Might need termination voltages (Vtt) or reference voltages (Vref) for certain high speed interface standards
High speed transceivers generally need dedicated linear regulators


two stage approach of DC-DC converter followed by LDO with separate bias supply (say for a 1.2V rail, use a 1.3 to 1.5V switcher followed by an LDO with a separate bias supply input from the 2.5v or 3.3v rail)


Bypass caps


Gobs and gobs, approximately one per couple of power pins
Might need combination of small and large caps for low and high frequency coverage, especially for high speed transceivers

Clock source(s)


Need at least 1 oscillator for user logic routed to a global clock pin


Use oscillators, not crystals as FPGAs generally cannot drive crystals
Pick a relatively reasonable frequency as you can use internal DCMs/PLLs to rescale it (check FPGA clocking documentation)
Consider using clock enables instead of generating slow clocks, this will reduce the number of required DCMs/PLLs as well as removing/simplifying clock domain crossing issues
Frequencies that need to be very precise could require dedicated oscillators

High speed transceivers generally require dedicated oscillators and external clock management (clock buffers, clock muxes, jitter attenuators, PLLs, etc. possibly requiring power-on initialization via I2C)



I just recently put together a small board with a spartan 3 FPGA, Winbond SPI flash, FTDI FT2232 USB interface chip, and shared 12 MHz silicon oscillator.  OpenOCD can drive the FPGA JTAG interface via port A of the FT2232 to program the FPGA and then program the SPI flash through the USER1 JTAG instruction after the FPGA configuration is loaded.  The 2nd port of the FT2232 can then be used as either a serial port or as a USB FIFO.  The USB FIFO interface requires 14 pins, but it can run at 8 Mbyte/sec and it appears as a standard serial port on the computer, making the software interface trivial.