In2 I2C leakage at each IO pin (0.1VDD<VI<0.9VDD)can be 10u. Why have they mentioned 0.1 to 0.9VDD specifically?
It just means two things.
It can mean that outside of that 10% VDD to 90% VDD range, the leakage current is allowed to be higher, because it is not measured at full 0V to VDD range.
On the other hand, it can also mean that it is enough to be able to measure the leakage current between 10% and 90% range, so it does not need to be measured at full 0V to VDD range.