Is there any problems or issues with holding !RESET low on ATMEL ATMEGA328P till rest of board self checks?
nRESET only has a minimum low width specified; it can be held low for longer than that, and routinely is during ISP. The output ports are tristated, but the pins used for ISP (MOSI, MISO, SCLK, and XTAL1) remain active for the purpose of programming the device and so should be gated separately if the design so requires.

Also note that nRESET may be pulled as high as 12V if parallel programming is allowed or required, and any gating will need to accommodate that as well as the other pins used for parallel programming.