High Current Pulses on MCU GPIO
I contacted a few silicon vendors about this question, and I got a variety of responses.  The most enlightening answers read as follows (redacted/paraphrased for brevity):

[Vendor A]


  The current limit called out in the datasheet is not the absolute maximum current allowed per pin but rather the maximum current for which the output voltage is guaranteed to meet the Voh/Vol specs.  For higher currents the output voltage will be outside these limits but the output buffers will function properly.


[Vendor B]


  The output buffers have their own output impedance which will limit the amount of current leaving the pin, even when directly shorted to VCC or GND.  Therefore no adverse behaviors would occur from directly wiring a pin to a MOSFET gate as long as the power dissipation limits are met.


[Vendor C]


  While it is good practice to add a series resistor between the pin and the MOSFET gate, it is not required to protect the output driver.  Omitting the series resistor could however introduce a large current delta through GND, which could cause GND bounce.


[Vendor D]


  The datasheet is specified for continuous currents rather than short instantaneous pulses, and so it is possible to exceed these limits without causing physical harm to the IC.  However, providing guidelines for this operating condition is difficult and would need to be handled on a case-by-case basis.


In other words, it is most certainly possible to have GPIO pins source/sink higher currents for short pulses without damaging the drivers as long as the pin+package power dissipation limits are met.  There's no free lunch, however, so proceed with caution.