How SPI and I2C latch data?
SPI and I2C are relatively slow interfaces, designed to work with dumb slaves and a single active master. This means you have to pick a clock speed that's compatible with the path lengths and the circuitry involved. 

The clock to data round trip time must be taken into account when designing the circuitry for the interface. If the interface involves optical isolation, and cheap ones can be slow (it's tough to meet even 100kHz I2C with CNY17's in the path), then these have to be taken into account as well. Read the datasheets for any buffers you are using, calculate RC time constants, do your homework, and allow 5nS per metre for any transmission line delays as well. Add up all the propagation times, subtract from half a clock cycle, and see if it meets the interface setup time (\$t_{su}\$, it's on the data sheet), if >0, result happiness.

High speed interfaces tend to be Source Synchronous for this very reason, all signals are sent from the transmitting end.

Very High Speed interfaces like SATA, HDMI etc do away with the need for synchronisation of any signals at all, and send data as self-clocked serial.