Are D flipflop inputs and clock thresholds the same for a given logic family?
First, a response to something not asked.


  A rising edge on the clock pulse ("CP") pin latches in the inputs when
  OE is low.


Nope. A rising edge on CP will ALWAYS capture (not latch in) the input. It's just that with OE high the outputs will not drive anything (will be floating). And I'm not just being pedantic - there's a fundamental difference between an edge-triggered flip-flop and a latch. An HC573 is a latch.

Now, about the question you did ask.

From the data sheet you'll see that all inputs (including the clock), have a Low input level of typically 1.2 volts (for Vcc of 5), and a high of 1.6 volts. This means that, typically, proper clocking will occur when the input goes from 1.2 or less to 1.6 or more. Since the worst-case values are actually 0.8 and 2.0, you should plan on providing these. Assuming that you can get away with typical values of ANY parameter for ANY part is just asking for heartache. Yes, at typical values a circuit will typically work. Think hard about what has just been said.

So the first part of your question is yes.

If you go to 74HC section of the same data sheet, you'll see entirely different values, so the answer to your second part is also yes.

However, if you look at the output levels, you'll see that, regardless of HC/HCT, the maximum LOW value of each type is well below the minimum LOW input of the other type, and the minimum HIGH output is well above the maximum HIGH input of the other type. As a result, for a properly designed system, either type will reliably drive the other.

Since you are getting false triggering, this suggests the your system is not well designed. I'd guess that you are using a wireless breadboard, with long jumpers to make your connections. And, using my psychic abilities, I'll predict that you do not have a bypass capacitor at each IC. All 3 of these things can get you in trouble. 

First, power connections. Make a separate, short connection from each chip to Vcc and ground. Don't connect Vcc to one chip, and from there to the next and from there to another (it's called daisy-chaining. Don't do it.) And short means as short as possible.

Second, about capacitors. Use a 0.1 uF ceramic cap between Vcc and ground for each chip. Connect the chip directly to the two leads. Don't put the cap somewhere handy and run jumpers to the IC. Suspend the cap above the IC. And yes, this will invite causing shorts as you install other jumpers. Learn to be careful and live with it. If you have continued problems along this line, strip some insulation from a jumper or two and push it onto the leads.

Third, use short jumpers to connect signals. Particularly for HC/HCT, it's possible for one wire to act as a transmitting antenna, and another to act as a receiving antenna. It's called cross-talk.