How to do via fencing of an RF trace with a 5V front copper plane and a GND back copper plane?
In all the major CAD tools, plane floods will automatically avoid vias of different nets.  That is to say, if you flood a plane with net GND, the plane flooding algorithm will leave a gap around the via of net 5V.  The size of the gap is determined by the spacing rules you set up (either for the plane itself or the nets/net classes involved).

If you run a design rules check it will usually tell you if you have pieces of copper touching that are different nets.

Your screen shots look like KI-CAD.  If so, then you should be OK as long as the DRC check doesn't complain.  You can also verify visually by looking at the planes in question.  If you see a gap around the via you are good to go.