How to determine LV CMOS output impedance?
NB3N551 

Voh Output HIGH Voltage @ Ioh = −25 mA, Vdd = 3.3 V  , Voh=2.4 V (max)


  (3.3-2.4)/25mA = 0.9V/25m = Ron= 36 Ω  MAX   (25 Ω nom is normal) for Nch


Vol Output LOW Voltage @ Iol = 25 mA,  Vol= 0.4 V (max)    


  0.4V/25mA= Ron= 16 Ω (max)  for Pch


74LVC2G04W6


  Ioh= 2.3 V @Vdd=3V @ -24mA @25'C Ron= (3-2.4)/24mA = 25 Ω


Computing ESR of a logic driver is easy but it is not   always symmetrical.

Since these parts are similar technology with ESR in the 25 Ω nom average range, (74LVC family) and you have neglected to specify f, load Z and reported excessive harmonics from the "squarish" slew response I can only surmise you have not used the same frequency for this 12MHz 3rd order 50 Ohm  LPF.  

With no load you will get +4.1 dB peaking at 12MHz then -6dB per octave above 14Mhz.

With a 50 Ohm load then you can use dBm readings and expect -6dB / octave attenuation above 12MHz.

So if a 5Vpp signal square wave with a 50 Ohm source intoa 50 Ohm load can generate 3.175V pp fundamental or +23 dBm at 12MHz to get +13dBm your f would have to be ~20MHz with a 50 Ohm load.

Or if you wanted higher attenuation of harmonics and greater output power with a tradeoff for sensitivity from higher Q,...

... In theory if had the lowest ESR driver (Ron) then did not add Rs=x Ohms the series Q could be  Q= ~30dB in gain  at 10MHz  with no load. Then if you tested it into a 50 Ohm load ... and Rs=0 , it becomes  flat LPF response with  0 dB loss &lt; fo ) , but then input Cap is shunted with  Rs=0 so you end up with a 2nd order LPF filter instread of a 3rd order filter.  So no gain in harmonic suppression. 

This is why Rs must match filter breakpoint impedance and load for stable LPF or for just generating a sine wave, at the risk of high sensitivity to Q and LC values affecting signal level with Rs=0 and no load by high voltage gain (dBV ) but not power gain dBm since there is no power in the reactive amplification.