Why does this JFET attenuator distort the signal this way?
Its because you did not check your device specs .  Its a n-ch JFET that needs negative Vgs or use a p-ch with +Vgs.

You need to linearize the Jfet with negative feedback on the drain to gate.

Choose the feedback R ratios wisely to bias the Vgs for desired VGA response. If you want + bias then use pch JET

So include 100k D to G and series R from Vctrl to Gate to check for linearity over input control range  Idss at Vgs=0 and Vth = 4V

If the inverting input is not = +Vcc/2 then it wont work well.
If Vds is not sufficiently biased, it wont work well.

The Vcc/2 bias screws up the Vgs bias when feedback for JFET so start with basics with no Op Amp