Why are flash memory chips commonly packaged in Type I TSOPs?
Having pins on two edges makes it possible for a manufacturer to form a variety of sizes of memory chip by combining a "left side" (common to all sizes), one or more repetitions of a "middle" section (common to all, but for the number of repetitions), and a "right side" (common to all sizes).  The length of the connection sides of the chips will remain the same for all sizes of chip; in the smallest chips, the non-connection edges will likely be shorter than the connection edges, and in the largest ones, the non-connection edges will likely be longer.  If one figures that the dies for larger flash chips are likely to have the pins on the short sides, it makes sense to lay out the packages that way also (smaller chips could fit in packages either way, but if a large chip has connections on the short side, connecting it to a package with pins on the long side could be awkward).