LT spice not predicting instability
The problem is you have not modeled your system accurately. Simulating circuits works as long as the physical system is modeled correctly. 


  The question is, What is causing the discrepancy between LT spice and
  reality?


The answer is probably parasitics, wires breadboards and solder all have parasitic resistance and inductance. There is also parasitic capacitance between any two points of metal. The problem with SPICE is the nodes are all superconducting, there is no inductance or resistance between nodes. 

If you built this on a breadboard, the grounding system may be insufficient. The ground plane on a PCB gives a small amount of capacitance to all traces, and also decreases inductance. 

An 8" jumper wire has roughly 0.140mΩ of resistance and 0.180uH of inductance (measured with LCR meter) 

A breadboard has roughly 2-4pF of capacitance between two rows. With four inch wire leads the capacitance jumps to 10's of pF's  

Wires can also add inductance to a circuit, you can estimate the inductance with a calculator 
Breadboards are not great for prototyping. If you add in the main sources of inductance the model should match the physical world. Sometimes it can be a bad model also, if this is suspected, you can test the model in spice and compare the results with the datasheet to find discrepancies