LDO and buck converter
First it is important to understand the difference between a classical linear regulator and a low-dropout version. The term LDO is often used for any linear regulator but all regulators are not LDOs. As you know, a linear regulator can only drop the input voltage. As such, the input voltage \$V_{in}\$ must be higher than the output voltage \$V_{out}\$ to ensure a good regulation mechanism. By how much shall it be higher then? Let's look at the input stage of both structures:

These pictures are excerpted from an article I published in EDN many years ago during the glorious MOT times. In the left side, for instance considering the venerable MC7805, the series-pass element is a NPN. You know that for properly biasing it, its base must be higher than the emitter by a \$V_{be}\$ which amounts to 0.65 V. If you add the 200-mV saturation voltage of the PNP, then for a 5-V output, the input voltage should at least be 5.85 V. For a battery-operated system, you can imagine that you are losing autonomy considering the low-level limit to deliver a stable 5 V.
If rather than using an NPN you implement a PNP as in the right-side picture, the situation differs as biasing the transistor now requires pulling its base down, lower than the emitter by a \$V_{be}\$: the lower limit on the input voltage benefits from this arrangement. Typical LDO drops depend on the structure but 140 mV at a 300-mA output current is no uncommon these days.
The below picture excerpted from this nice application note shows the type of series-pass elements now used in recent regulators. Most of them are now using P-channel devices.

To obtain such low drop like 140 mV at a 300-mA current, it implies that the series-pass element offers a quite small resistance like 0.5 ohm or so in this example. You can imagine that ensuring a good input voltage rejection is a challenge in this case where the transistor is almost saturated. And that is the important point: the closer you operate the LDO to its minimum voltage drop, the more difficult it becomes to ac-isolate the output from input perturbations. Semi vendors rival in clever circuits to offer an excellent line rejection (power supply rejection ratio, PSRR) even in the almost-saturated mode in which the transistor operates. As a conclusion, if you want a good isolation brought by the linear regulator, operate it with a sufficiently-large drop (considering power dissipation is not at stake of course) to offer the best rejection. And in this case, a classical linear regulator will do the job and it does not have necessarily to be a LDO type.
Regarding efficiency, again it depends on the difference between input and output voltages. If we consider that the bias currents necessary to operate the regulator are negligible with respect to the output current, then the efficiency solely depends on the difference between \$V_{in}\$ and \$V_{out}\$:

A quick calculation shows the efficiency curve and two different application examples:

Surprisingly, if you supply a 7812 by a 13-V source, the efficiency can theoretically peak to 92.3%. Use an LDO and reduce the drop to 150 mV, then efficiency increases to \$\frac{12}{12.15}\$ which is more than 98%. Not bad for a linear regulator!
Now, what about the buck converter? The below slide is an excerpt from my tutorial seminar taught at an APEC conference in 2019 and compares a buck with a linear regulator:

You can see that the main difference between them despite efficiency comparison is the noise available on the output. A buck is intrinsically more noisy than a linear regulator because of the currents and voltages discontinuities paced a the switching frequency. There is not much you can do about and efficient filtering via cascaded filters it what it takes to reduce the output ripple. There are architectures noisier than others (hard versus soft switching for instance) but if noise is of concern for supplying sensitive circuits, then yes, a linear regulator is the way to go.