16bit PWM beyond audible range
How about use fractional-N, aka Delta Sigma?
Let's say you start from a 16 MHz clock on an Arduino, and you generate an integer part of perhaps 32 or 64, depending on how fast you can write the routine to calculate the new numbers. I'd say getting it done in 64 cycles is definitely possible even in lazy C, 32 may take some C subtly or assembler skill, but should be possible.
Assuming a 64 cycle integer part, that would update at 16 MHz / 64 = 250 kHz. This would be the basic PWM frequency. You would take the 16 bit word you want to program, take the top 6 MSBs, and that's the basic duty cycle you would feed to the PWM hardware.
Now you need to handle the 10 bit fractional part. Using only integer arithmetic, it's possible to successively sum the fraction part to generate cycle by cycle adjustments on the fly to the integer part. The calculation function has to complete getting the next number, and writing it into the PWM hardware each PWM cycle.
One variable you have is the order of correction that's used. First order correction looks fairly comprehensible to the layman. Let's say the fractional part is 0.25, and the integer is 10. The algorithm would generate the following sequence of integers to the PWM hardware, each cycle taking a new number, 10, 10, 10, 11, 10 ... etc. On average, the duty cycle is 10.25. Note that we have a periodicity now at 250 kHz/4. If the fractional part was 0.01, then that low frequency periodicity would be down at 2.5 kHz. Although that's audio, it's very much attenuated from what would be the case if the PWM ran at 16 M/ 65k = 244 Hz with 16 bits. However, we rarely use first order for this reason.
Second order correction dithers the integer by up to +2 and -1, in an apparently pseudo-random sequence, which tends to break up that low frequency periodicity into broadband noise. Third order dithers by up to +4 and -3. While the correction with higher orders gets better, the increasing amounts of dither eat into our dynamic range. It turns out there's rarely any benefit to going to higher than third order for most applications with this type of fractional-N encoder.
For a full description of how to code it, see this patent. It's actually written for a frequency synthesiser, but the maths stays exactly the same. It's long expired, so there's nothing legal to worry about.