How does the NPN transistor in a 555 timer discharge the capacitor when the output is low?
"OUTPUT DRIVER" in your diagram doesn't show its logical function (which is a logical inversion). Some other internal diagrams of a 555 shown below.
These diagrams are simplifications. There actually is a transistor connected to pin 7, but its base drive is not shown properly in these diagrams. This transistor is configured as a switch, which is either non-conducting, or it is "ON", pulling a lot of current from pin 7 to ground (pin 1).