Why do people waste time using a SPICE .NOISE analysis for circuits with resistances with significant excess noise?
To first of all answer the title of this question, modeling noise is not a waste of time as long as the device models are reasonably good and include the dominant noise sources. 1/f noise, in particular, becomes insignificant above a certain frequency, and in many applications is not detectable beyond
other noise sources (never mind not being a significant noise source).
1/f noise is not (inherently) modeled in LTSpice (or SPICE in general), and depends on the particular resistor.
To model excess noise, you could try the technique illustrated below. In this file, you can see the 1/f noise at node &quot;noise&quot;. To use it in a circuit, place E1 in series with the resistor you want to add 1/f noise to.
In doing this, you will need to know the resistor's noise index in uV/V. Since excess noise is proportional to the resistor's DC bias, you will also need to know the DC bias of the resistor. This technique will work if the resistor's DC bias is fairly constant. Edit the VALUE2 field of E1 (laplace=1*659/sqrt(s/6.2832)), and change the 1 to the product of the DC bias and the noise index.