How much current does an FPGA consume, anyway?
It varies hugely with clock rate, exactly what is being clocked internally, and I/O usage. It is sufficiently hard to determine that most FPGA softare has a utility to estimate current draw of a design given the external clock/data rates, however it will need a lot of detailed info to give a reliable estimate, so the easiest option is often to just build it &amp; measure, or load a comparable design into a devboard and measure that.