Very weak LED dimming with combined PWM signals using 555 timers
Your problem comes from the way your transistor AND is made. 

Let's take a look at the lower side side, (warm driver) , when T3 is off but T4 is on , even T4 does not have collector voltage the base current goes through base emitter junction and reach to TIP122 base.

TIP122 can have a collector current of tens of mA  even at VBE less than 500mV, open the following schematic and see the simulation results. 







simulate this circuit &ndash; Schematic created using CircuitLab

Quick fix? 

Move the dimming to the upper side of the transistor AND (R2 to T2 , R6 to T1, R7 to T4 and R8 to T3), this will move the problem to the dimming which is less annoying. 

Edit 

I see that from the comments that the above issue was solved by using an AND gate chip. 

The only issue now is the limited duty cycle range that cannot be 0 to 100% but it can be improved

The limit for the minimum ON time is the slew rate for discharging the capacitor. 

Solution:
  Use the lowest frequency possible for the dimming 555 , I see you use high frequency for dimming and low frequency for warmth which makes dimming work in a lower duty cycle range due the minimum ON time.

A different approach is to use the same AND gates to make some kind of damping circuit and a schmitt trigger which will cut short pulses and give a full range PWM output. 







simulate this circuit

This will cut positive or negative pulses less than 5..10us which is the minimum ON time for 555 as I can see from your data. You can adjust C1 as needed to cut shorter or longer pulses.