Capacitor emplacement during routing
On the PCB layout, decoupling capacitors are normally placed in close proximity to the power pins of ICs.  This allows local current transients to be evened out without disrupting current paths elsewhere on the board.

Other capacitors intended for general "bulk smoothing" can and should be distributed across the board where feasible.  These techniques are generally good practice in most applications.

A well drafted schematic will include annotations clearly indicating where there are special requirements for part placement in relation to other parts.

Often decoupling caps for digital ICs are all grouped together and designated as "decoupling for IC1", "decoupling for IC2" and so on.  Doing it this way keeps a complex design with many ICs from becoming untidy due to the large number of decouplers that accompany the ICs.

So, on the schematic it really doesn't matter where the caps go as long as they are attached to the correct nets.