Connecting latch to ram via 8 horizontal tracks within IC (auto-routed style)
This is why manual routing is the way to go

What you have discovered is that autorouters are extremely limited tools compared to the ability of a human brain to recognize patterns and prune unfruitful branches quickly and visually.

There are a few suggestions I can offer though:


Route on an imperial or soft-metric (i.e. imperial units converted to metric) grid vs a hard-metric grid.  The DIP is a North American invention, and so are many other component packages -- hard metric packages have only come into play relatively recently with (T)QFPs and (T)SSOPs/MSOPs at the 0.8, 0.65, and 0.5mm pitches, as well as BGA and QFN.  Furthermore, metric sizing for SMT passive packages is still not universal -- while tantalum EIA sizes are metric, ceramic caps and chip resistors are often still imperial sized.
Pay close attention to what your escape routes are -- it's easy to "box yourself in" when routing and wind up needing vias you otherwise wouldn't need.  This is doubly important when routing ubiquitous nets like power and ground, or if you can't get to your fast toggling lines (clocks, latch enables, etal) early on in the routing process to avoid sending high-frequency, hard-driven signals noodling all over your board, emitting EMI as they go.
Pay attention to locality -- if two components are part of the same circuit, they should be close together on the board.  This is a major EMI-abatement tool as well as excess loop areas just make your board a better antenna, which is generally not what you want.  It also makes it easier to follow when troubleshooting and debugging.
And finally, keep scale in mind.  This isn't a huge concern with DIPs, but when working with SMT packages, it's very easy to lose sight of just how small things really are and wind up with a board that is a nightmare to assemble because you have parts crammed in so tightly that you can't get your iron in to solder them without doing a contortionist act.