Problem with conditional signal assignment
Your leftshift doesn't work. You're putting the new value at bit position 0 and then start shifting from bit position 1 to bit position 7. Usually you would do something like this

tmp &lt;= tmp(tmp'left-1 downto 0) &amp; in_con1_dio4_rs485_rx(0);

Why do you re-assign your clock signal, just use the one from the port definition. Then you might should have a reset signal to e.g. properly initialize your tmp vector.
And last but not least, you start counting from 0 and compare to 8, note that signal assignments in processes happen after the process has finished, so you actually wanna check for cntclk = 7.