hardware implementation of division algorithm
\$ EA \leftarrow A+{\neg B} + 1\$ is the 2-complement sum of A and B (absolute), that means that you are subtracting B from A. Then, if you have a carry bit it means that the result is negative, and |B| is bigger than |A|. Since probably the division is integer, you cannot divide a number for a bigger one and it returns an overflow, that probably should mean that the result is 0.

Otherwise, B is again summed to A (seems odd, it could save it in a register instead of subtracting and summing the same value), and then enters in a loop:

The division is calculated one bit at a time, so I think that the shift operation should be a shift right, so starting from the most significant bit of the quotient, it checks if the divisor is contained in the dividend.