How much RAM can I get from a MAX V logic element?
Each LE has 4 inputs and a 4bit LUT. I.e. you get a 4x1 storage element per LE. But you will generally want to have something like a 1024x8 storage or so. That means you have to put 1024 LEs per bit line together, have some form of address decoding and output logic to get the output of those 1024 LEs onto one wire. How many LEs that requires depends, as the product catalog says correctly, on your implementation. As rule of thumb, you can guestimate that the address decoder uses O(n log n) and the output multiplexer uses O(n log n) LEs. For any more exact number, you will need to write VHDL/Verilog code and synthesize it.