Understanding STEVAL-ILM001V1 DALI transceiver schematic + adding protections
R2-R4 is split because of their limiting element voltage specification, and that series combination will have nearly 400V across it (peak rectified mains, including tolerance of mains voltage, minus a few volts for the zener, opto, transistor drop). Although the current is set by the transistor circuit, it only drops a few volts when in current limit mode, so the rest of the voltage has to be dropped somewhere.

C1 will be for rise/fall time control, DALI specifies minimum and maximums for rise and fall time under different conditions. A lot of example transceiver designs don't include this feature.