Using I2C and SPI communication on the same same clock and data lines
I don't think so.  A simplistic sharing the clock and data lines between SPI and I2C devices doesn't look like a good idea.  Such sharing can introduce a failure mode, that can corrupt the SPI communication.

Imagine that MOSI/SDA and SCLK/SCK are shared.  We are communicating to the SPI device.  The I2C slave devices “see” the clock and data as well.  It's possible that some random combination of bits in the SPI data will look like a start condition and slave address to the I2C device.  The I2C slave device will interpret this as a beginning of an I2C read transaction, start transmitting, pulls the MOSI/SDA low.  This would corrupt the SPI communication.

So what can be done.  You have one SPI device that requires high speed communication, and many I2C devices that can do with relatively slow communication.  A situation like yours is not uncommon.  Consider these:


Use the hardware peripheral (MSSP in the PIC) for SPI.  Bit-bang I2C on a pair of separate digital I/O pins.
Use MSSP for SPI communication.  Connect the I2C devices through an SPI-to-I2C bridge (SPI slave,  I2C master).  
Use the MSSP for both buses.  Put the I2C devices on their own branch that has a switch, which can disconnect the I2C devices from the bus during SPI communication.
Look for a pic with 2x MSSP peripherals.


edit:
The subject of using the same MSSP for SPI and I2C has come up in the forums a few times over the years: CCS forum 2003, PicList 2005 (solid discussion), Microchip's own forum 2012, EE.SE 2012