loading multiple shift registers from few pins
The typical SPI controller just has one serial data out line (a.k.a. MOSI). Data fed to this output comes from an internal parallel loaded register to appear at MOSI one bit at a time. There is no direct provision for loading two shift registers at once with different data for each using the typical SPI controller. 

So you will have to resort to some other solution such as:


Custom bit-banged serial out scheme that can feed two separate data streams and share clocks and  latch signals.
Use an MCU that has two separate SPI controllers and run each of your shift registers separately but in parallel. This would not have sharing of the clocks but the latches could still be shared. If the two SPI controllers are programmed to the same clock rate then software will be able to load the next bytes into the internal registers of the two SPI controllers one after the other.
Suck it up and run your two shift registers in series so you can use the single SPI controller. This does not need to appear to be doomsday because you can almost certainly program the SPI controller to clock and shift out data faster than using software to do the bit-banging. This means that the double long shift register could almost as fast (if not faster) then the dual bit-banged version.