Can anyone explain these conditions for the current mirror?
The output current of the current mirror varies with collector to emitter voltage, that is to say the output current varies with load resistance. This is due to Early effect.
Early effect can be modeled by a high resistance in parallel with the collector-emitter junction of the output transistor, this transistor acting as a current source. A non-ideal current source can be modeled by an ideal current source in parellel with a high resistance. If this parallel resistance (output resistance) is infinite (an ideal current source) then there is no Early effect and the output current doesn't vary with collector to emitter voltage. The lower the parallel resistance (output resistance) then the greater the Early effect and the more the output current varies with collector to emitter voltage. That is to say the more the output current varies with load resistance.
The lower the current source's parallel resistance, the more extra current is drawn through the load as the collector to emitter voltage increases (as the load resistance reduces).