What is the difference between JTAG and EJTAG?
JTAG is more than examining memory and registers, see EEVBlog 499 - What is JTAG and Boundary Scan?


  [JTAG] was initially devised by electronic engineers for testing printed circuit boards using boundary scan ... [and] is also widely used for IC debug ports. In the embedded processor market, essentially all modern processors implement JTAG when they have enough pins. Embedded systems development relies on debuggers communicating with chips with JTAG to perform operations like single stepping and breakpointing.


EJTAG is a MIPS extension of JTAG


  EJTAG Re-Uses IEEE JTAG Boundary Scan Pins for Basic Debug Interface
  To keep on-chip costs low, and to minimize any target system overhead, the MIPS EJTAG utilizes the widely used IEEE JTAG pins for its debug functions. Using special debug circuitry on-chip, the EJTAG provides run control, breakpoints on both data and instructions, real-time Program Counter trace. In addition, individual licensees can add additional features when desired. Such features could include complex breakpoints and execution profiling features. 
  
  On-chip debug provides some new tools for debugging embedded CPUs that avoid the limitations of traditional hardware debug tools. For example, it is not possible to use a logic analyzer to track operations that take place between the CPU and the on-chip data and instruction caches. But, on-chip EJTAG can track these operations. Also, using In-Circuit Emulators with high speed systems is often problematical because they affect the bus loading characteristics of the system and can induce "tool-related" bugs into the system. In addition, they are rarely available for on-of-a-kind system-on-a-chip. Finally, some solutions require special bond-out chips that provide extra control signals and busses. But, this is additional design overhead in both chip and board design and it adds more precious time to the product cycle. EJTAG obtains the same results without the additional time and cost. 


EETimes: non-intrusive on-chip debug ...