How to define a clock in Quartus II?
The problem is that you actually have no clock, or to be more precise, no clock is used. Check your process:

process(clk)
begin
    result &lt;= a + b;
end process;


This process doesn't use the clock. You probably wanted to do this:

process(clk)
begin
    if rising_edge(clk) then
        result &lt;= a + b;
    end if;
end process;


This code uses the clock and Quartus should report it.

Update

If this is your top-level, it won't have a fmax value for the clock because it has no register-to-register path. Your input signals a and b are not registered, thus the absence of register-to-register path. You can easily solve this:

process(clk)
begin
    if rising_edge(clk) then
        a_r &lt;= a;
        b_r &lt;= b;
        result &lt;= a_r + b_r;
    end if;
end process;