Most efficient circuit for 2048 Bit multiplication, and how to effectively render it
Firstly, it depends what the rest of your hardware is. Is it just the multiplier, or is there some other hardware, e.g. memory controllers etc., that is going to be needed anyway and you can utilize. Secondly, do you have a floor in performance? I can think of small multiplier implementations that will be quite slow?

Off the top of my head, there are 8051 implementations that are below 3000 gates. Remove pipelining, and all the unused instructions and hardware, and you can have an MCU that is a few hundred logic gates. Now, add some RAM and you have your very low gate multiplier.

I think the smallest implementation will involve a very minimal ALU with the following operations: add, shift, and XOR. This is all you need to implement the multiplication. You can use RAM to store your data. Add a few instructions and a basic control unit, and you have a rudimentary processor. You then off load all the complexity in the form of instructions. 

Also, what do you count as a gate? Are you after minimum logic gate count, or minimum transistor count? What about flip-flops? Different answers to these questions can produce very different results.