Fast and easy way to get formula of circuit?
For multiple choice questions you can use process of elimination by checking for mismatches with an equation's sub-expressions. For sum of products ( e.g.: \$( a \cdot b ) + ( c \cdot d ) + \dots \$ ) when the sub-expression is one, then the diagram must also be one to be a possible match. For product of sums ( e.g.: \$( a + b ) \cdot ( c + d ) \cdot \dots \$ ) when a sub-expression is zero, then the diagram must also be zero to be a possible match.

For example a sum of products with a sub-expression \$ x \cdot \bar{y} \$. Evaluate the diagram with \$x\$ as one, \$y\$ as zero, and X(unknown) for all other inputs. Is \$S\$ guaranteed to be equal to one? If false, then the total expression is false.

Another example of a product of sums with a sub-expression \$(\bar{y}+z)\$. Evaluate the diagram with \$y\$ as one, \$z\$ as zero, and X(unknown) for all other inputs. Is \$S\$ guaranteed to be equal to zero? If false, then the total expression is false.

To speed things up, check the first sub-expression of each equation before evaluating any of the other sub-expressions in the same equation. A false will eliminate the equation for the list of possibilities, but it does not guaranty the total expression is correct. 

Worst case is there is a "non of the above" option or two or more options remain. In this case for the remaining possible expressions you can try converting sum of products to product of sums, vice-versa, then re-evaluate for false. Or make and compare true tables or k-maps. Which ever you feel more convertible with.


  How many NAND gates are at least needed for a particular formula?


After reduction, convert the formula into sum of products if it is not already (there is another approach for product of sums, but I'm skipping for you to figure out). You will need one NAND gate for each product, plus one NAND gate for the sum, and a NAND gate for each unique inversion. This is understood by the equivalency expressions \$ a \cdot b + c \cdot d \equiv \overline{(\overline{a \cdot b}) \cdot (\overline{c \cdot d})}\$ and \$\overline{a} \equiv \overline{a \cdot a}\$. It is complicated if there is a restriction to use only 2 input NAND gates, but the concept is the same.