SPI Communication with multiple slaves: Problem on MISO line when both slaves are connected
You must control the applicable enable pin of the Si8641.
If you examine the truth table in the Si8641 data sheet, you will see that the only situations where the output is High-Z are those where the governing enable input is low.
It would appear that EN1 governs A4 which you are using for MISO, while EN2 governs the other channels which you are using in the opposite direction for the remaining signals which you can leave always driven.  So it is EN1 you need to control.
Unfortunately, this enable input has the opposite sense of your chip select.
It's possible you could &quot;cheat&quot; and use the other chip select to drive the enable.
You could also simply give your FPGA another MISO input and some logic to chose the appropriate one based on the selected target.
Realistically its unclear that your choice of isolator is the best for the job, but at least its designers do appear to have anticipated a use case where MISO goes in one direction and the other three signals go in the other and provided separate enables for those.
But your path forward may depend on modifications you can reasonably make to existing boards, too.  The fact that you have a resistor on the pin you need to control suggests you may be able to make a reasonable re-work, especially if you have any spare output from the FPGA available on a test point somewhere.  Or you could remove the resistor that feeds the isolator's MISO into the FPGA, and route that signal in on a different pin and add a MUX inside the FPGA to select the MISO input to follow based on the target chosen.