Purpose of Level shifter in charge pump
The input level shifter is a classical level shifter used in IC design, and it is used because the  Clk input is operating at a different voltage swing than the output swing needed down stream.  This is especially important since this is a charge pump and the top rail will be moving, increasing in this case, when the chip starts up.  The big hint you have is the inverter on the bottom NMOS MN1 and MN2 gate Drive, that inverter is driven with a VDDL -> presumably Vdd,low.

The taper buffer is also a classical design that takes a low drive signal and turns it into a high drive signal through successive inverter stages, each stage being some factor (say 2.2 X) higher drive capability from the next stage.  The reason this is done is to increase the drive with the minimal propagation delay.

The level shifter by necessity will have minimal drive and if the outputs where to drive a big inverter directly the slew rate would be too slow.  On the other hand if you were to beef up the level shifter so be able to drive the following stages directly it won't work. The taper buffer is the optimal way to increase that drive.

I will note that removing the MP3 and MP4 transistors and removing the Lower Voltage gate connections would improve this circuit (that is the normal way these are designed).  I'm Not sure why felt they needed a variable transconductor in there.