Binary counter and load capacitance
From your additional info; you need to know the load capacitance for any output pin on the counter. Each driver has an RdsOn value by design that limits the current drive which affects slew rate =  dv/dt = Ic/C This value also changes with temperature range, and self heating that comes from higher supply voltages. So you only refer to the datasheet, where it indicates no advantage to increasing Vcc.

To determine C_Load you need to add up all capacitance of connected loads and circuit layout. Then by interpolation of the datasheet specs you can estimate the absolute max f for a given supply tolerance and temperature range.  


When there is uncertainty of CL then reduce Fmax with some margin.


keep in mind probe effects when testing, if necessary use a low capacitance buffer (~3pF Cin) for test verification to avoid interference.



 
 
There are two more implied questions. How to determine the maximum frequency of an inverter and how to choose the optimal accuracy of a crystal.  You choose the maximum frequency of an inverter from the datasheet using a particular CMOS family, voltage and temperature tolerances.  F can increase with high voltage and lower temperatures. These depending on your system tolerance specs.  Next I will indicate how to choose the correct values of C once you decide what the frequency is that you want.  The tuning range of a crystal is small because it's Q is very large >10k.

To chose the load capacitance C1 , C2 and C3 with the known values of C_in and Cp is the parallel rated load capacitance for crystal specified in the datasheet, then compute the series equivalent value of the total C on each side. The caps on both sides are in series thru ground across the Xtal as a parallel load resonant mode of oscillation.

If C2 is the fixed input load C_in then;

1/(C1+C_in) +1/C3 = 1/Cp

If the tolerance of the crystal is say 50ppm and you wish to null this tolerance to zero at25'C where Cp is defined, then C1 must have a certain tuning range above and below the value determined above to offset room temp. "tolerance" error to less than 1 ppm only at 25'C

"Stability" specs refer to total swing for in terms of ppm for a spec'd max/min temp.
For more details on AT cut crystals, search for the temperature curves which all are normalized to 25'C to zero.  When a stable freq. is desired over temp, it is called a TCXO where temperature compensation of a varicap diode is chosen carefully with a Vc control voltage to match 3rd order family of curves designed for different temperature ranges which changes by the factory choice of cut angles in minutes or 1/60th of a degree.

These TCXO devices are now inexpensive  with 1 or 2 ppm accuracy on inexpensive AT crystals to provide an active clock instead of having to design your own with great difficulty.