MP3301 LED Driver RC Filter Calculation for PWM
Q1: How are the 20kΩ and 100nF values for the resistor and capacitor chosen?


The Pin Functions table on page 4 explains that the EN pin operates as follows:


  ON/OFF Control and Dimming Command Input. A > 0.6V turns the part on, and &lt; 0.4V
  turns the part off. If the EN pin voltage is between 0.7V and 1.4V, VFB is regulated
  between 0V and 200mV. To use PWM dimming, apply a 200Hz-to-1kHz square wave
  signal with an amplitude >1.5 V.


From this we can deduce that the chip can work in analog input mode between these voltages for "high speed dimming". This could probably be driven by a 0.7 to 1.4 V adjustable voltage source but for most microcontroller applications PWM is much simpler to generate. PWM to analog conversion can be done simply with an RC filter. To filter out the PWM we need a low-pass filter with a cut-off well below 20 kHz - they recommend \$ \leq \frac {f_{PWM}}{10} = 2 \ \text {kHz}\$.  With the cutoff frequency given by \$ f_c = \frac {1}{2 \pi RC} \$ the result is 80 Hz! There's no magic. It's just good and low so that no flicker will occur and high enough that the system can respond reasonably quickly to changes in PWM.


  Q2: Since PWM is used to control dimming, what use is changing the output current when using a PWM signal (i.e. why would we not just always use 1.5V+ for the PWM voltage)?


You still have to limit the current to the LEDs during the PWM on-time. PWM controls the on-time but does not control the peak current. I have written a little on LED rated current which may be of help.





From the comments:


  What I'm having trouble with is that 80 Hz is nearly two orders of gnitude lower than the recommended Fc = 2 kHz. Any idea why the datasheet recommends Fpwm / 10 instead of say Fpwm / 100 or / 1000? Solving for R when Fc = 2,000 implies a resistor of about 800 Ω.


Have a look at the simulation results below. The same 20 kHz source is fed to three low-pass filters.





Figure 1. Three low-pass filters with R in ratios of 1, 10 and 100.



Figure 2. The results of the simulation. Note that the initial DC offset is due to the initial positive 'kick' and in practice will settle down in the middle after some time. Click to enlarge.

It should be clear from Figure 2 to even at 2 k&Omega; there is still significant ripple.