Oscillation in Class D amp design
Your filters are ringing due to the voltage step at startup. It is worse in the simulation because you are using 'ideal' components with no internal resistance, so the Q is very high.
I added 0.1 Ω resistance to L1 and L2, and 0.01 Ω to  C4, C5 and C6 to represent more realistic components, then added a delay of 1 ms before starting the tone burst. Here is the result:-

A more serious problem is you don't have any 'dead-band' bewteen M1 (M4) turning off and M2 (M3) turning on, so there is short period where both upper and lower FETs are turned on at the same time. This causes a 'shoot-through' current of nearly 400 amps!

You need to delay M2's Gate voltage rise (blue line in the plot above) so that it doesn't start until M1's Gate drive (green line) has finished falling.