Simulation mismatch when shifting a +5v pulse to -12v
let V2 be a 74HCxxx CMOS driver or similar thus ~50 Ohm =Vol/Iol at xx mA +/- 50%
let R2 =0
let R1 =0


Then expect Vo(1M) = -11.4V, -7.5V. OK? Or do you want higher Vgs=ON? Like -10,-5 or .?? define ideal ?.


add 1.6V (Vf=2V@10mA) 5mm RED LED as a LV Zener in place of R2 to level shift upwards by this amount.
expect -9.1V,-4.1V
adjust level shift for desired NFET Vt (threshold of conduction =xxx uA) by choice of LED Vt (Red&lt;=1.6, White&lt;=2.6V at low leakage current thru 1M. Or simply add another diode (1N4148 small signal diode) no need for 1A diode.


I did not simulate to verify.