Any chance to build a dual 2-to-1 line selector/multiplexer from a single chip?
OK Dave Tweed should really get the credits for solving my problem. He said to read the fine data sheet where a synchronous chaining of counters is provided, which are all connected to the same main clock, and the ripple carry connects to the ENT pin.

This really solved my whole practical problem.
Also, in good StackExchange-iquette I must rant a little bit about the confused question, which is making the mistake to try to find a specific solution, the 2-to-1 selector gating, rather than starting from the actual goal, the counter issue.
Meanwhile, I still found it interesting to figure out a way to combine the the basic logic gates to make a selector, and that the easiest solution that avoids mixing 3 types of gates is to use 4 NAND gates -- of course, you can do everything with only NAND -- but that probably there is no simpler solution to a 2-to-1 line selector than 4 NANDs if you want to avioid mixing of gate types.