Theorem For Logic Reduction to LUT for FPGA
In general, combinatorial logic can be represented as a look-up table. Just write out the truth table for the logic and there you go. Now, after a certain size it won't fit in the LUT resources available on a certain FPGA, or you will have other limits. Sequential logic cannot be represented directly using a LUT.
About replacing combinatorial logic / LUT with a microcontroller: it doesn't really make sense. They do not serve the same function. Perhaps you were told that microcontrollers just run a calculation? It's not that simple. They need to be able to execute a program, which combinational logic just cannot do; you need sequential logic.