4-bit synchronous counter IC: Do I need to pre-synchronize the count enables? (Metastability?)
Yes, it is necessary. All control inputs to a '163 have setup and hold requirements with respect to the clock input.

And the issue is not just metastability. There are four individual FFs inside the chip, and if the setup/hold requirements are not met, they might interpret the control inputs differently (because of varying internal path delays), leading to unexpected state transitions.