Question about the common mode
I agree with you that the Professor's statement is unclear and confusing.

When used as a voltage buffer, the DC voltage at inverting and non-inverting inputs and the output are determined by the DC voltage at the non-inverting input. As you mention, the feedback loop takes care of that.

Designing the output to be biased at Vdd/2 by itself (without feedback) isn't even possible with this circuit as the output's DC voltage depends on the output current of two current sources (M5 and M6) into a high impedance point. Even if the drain currents of M5 and M6 would be exactly identical, the voltage at the output would be undefined. In the real world these currents are never identical so the output will clip to Vdd or ground.

Only a feedback loop can control the output voltage at the output such that it will have a predictable value.