How are size of caps determined/calculated for use in smoothing voltage?
The supply bypass capacitor should be low impedance at MHz where the chip introduces or responds to noise. Now at (say) 50MHz, a perfect 100nF (0.1uF) cap has an impedance of \$X_C = \frac{1}{2\pi fC}\$ = 14m\$\Omega\$. Typically the power supply regulator can respond well up to perhaps 250kHz, where Xc = 6\$\Omega\$, so a 50mA spike will cause a drop of less than 0.3V. It would be better to have a larger reservoir capacitor somewhere to take care of these spikes but the 100nF will deal with high frequency spikes from the chip (if the bypass capacitor is further away there is series inductance that will increase the voltage drop). In earlier days 0.01uF was easier to get in disk form and that was the popular size (with a large, perhaps electrolytic or tantalum, capacitor mounted somewhere on the board). Now it's just as easy/cheap to use 0.1uF. 



Load capacitors on a crystal are another matter- they are calculated from the load capacitance specified for the crystal (and they have to be acceptable to the chip). If the rules are not followed, the oscillator may be slightly inaccurate. If the capacitors are way too big or too small, the oscillator may not start properly under all conditions. 

If the crystal is specified for (say) 18pF load, the load capacitors are 2* Cload - Cstray- Cinput, so perhaps 27 or 33pF. 

Connecting the caps as shown from Vcc to GND is not generally done. It might help a bad design to start, but it will could cause unreliable operation and excessive jitter if there is much noise on the power supply.