Output of a NAND gate
The primary purpose of the 120\$\Omega\$ resistor is to reduce the current spikes when the output switches (when Qo and Qp are both on simultaneously for a brief moment). See, for example, here. It's a component part of the (active) pullup circuit, but it's not a 'pullup resistor'. 

Totem pole outputs like this one use an active pullup, which is Qp, Rc and Rcp. When Qs is 'off', the base of Qp is pulled to Vcc by Rc, so the effective pullup resistance is limited by the collector resistance Rcp - so it's about 120\$\Omega\$, meaning that for a 50pF load, the time constant is about 6ns. Without the collector resistor it would behave more like a few ohms (1.6K divided by the current gain of Qp). 

TTL inputs are defined as 'low' if they are less than or equal to 800mV and 'high' if they are greater than or equal to 2V. TTL outputs will be 400mV or less when low (and sinking 16mA or less), and 2.4V or more when high (and sourcing 400uA or less). That drive capability guarantees each TTL output the capability to drive 10 TTL inputs with a guaranteed noise margin of 400mV or greater.