GMII/RGMII TX_ER signal: guaranteed functionality?
From the excerpt of IEEE 802.3 that you posted:


  When TX_ER is asserted for one or more TX_CLK periods while TX_EN is also asserted, the PHY shall emit one or more code-groups that are not part of the valid data or delimiter set somewhere in the frame being transmitted. 


The packet still gets sent on the wire by the PHY. The PHY does not include a FIFO large enough for a whole packet, so there is no way for the PHY to drop the frame on an assert of TX_ER. What the PHY does do is insert an out of band error condition, usually in the form of invalid or error indication code words, that the PHY on the receive side will interpret and assert RX_ER. I believe only the data bytes that correspond to the error codewords will be changed, everything else will be received correctly.  It doesn't seem like the PHY is required to error the exact bytes that correspond to the TX_ER assert so long as an error is inserted somewhere in the frame. The receive MAC should throw out the frame if RX_ER is asserted during reception (same as if the FCS is bad), but it could well be possible to recover some portion of the frame. 

If you really want to make sure the packet never gets sent, what I would recommend is storing the packet in a FIFO and only releasing it from the FIFO once you've checked the frame and determined that you actually want to send it. However, this will add a packet length dependent latency, which may or may not be acceptable.

Here is an implementation of a FIFO that does exactly that; dropping frames that are marked as invalid with an asserted tuser signal: https://github.com/alexforencich/verilog-ethernet/blob/master/lib/axis/rtl/axis_frame_fifo.v .