DS3232M Skips seconds when writing to SRAM
Received this response from Maxim technical support:


  After further investigation, we concur that there is a chip problem.
  
  If you begin a write to SRAM at an even address boundary (18h, 20h, 
  28h, etc.) the internal RTC counter chain is improperly being reset. 
  This reset action is visible if SQW happens to be high when you wrote 
  to the memory.
  
  SRAM locations 14h-17h do not appear to have this anamoly.
  
  Short-term work-arounds:
  1) Avoid writing to SRAM locations 18h-FFh
  2) Write to SRAM prior to setting the RTC
  
  We will fix the chip. Thank you for bring this to our attention.


Maxim has published this errata covering the issue.