Hardware architecture for power
You would probably be best served with an 10V LDO for the gate drive (or fixed 12V if you like) with 2k2 pull-up resistor and using cheap BC847 NPN transistors to pull down the FET gates. 

5kHz PWM is not nothing, i.e. 200µs total cycle time. To give yourself a reasonable duty cycle range, you should aim for 10µs rise time or less, which works out to 95% duty cycle max. You should steer clear from large gate charge mosfets for this or alternatively chop your PWM to e.g. 500Hz. 10nC @ 10V gate charge MOSFET would reach ~9V gate voltage in about 5µs if you use 2.2k pull-up resistor to 10V. 

For the µCU, use an integrated switch buck converter, these start at about £0.5 single piece for something that can handle 24V input. Using LDO would cause punitive dissipation in the LDO, even for modest current drain. Using Texas Instruments makes life easier if you're not comfortable designing SMPS circuits as their webench tool walks you through it. You're looking at ca. £1.2 for single piece for e.g. TPS54233 thought. 

When designing the SMPS, do bear in mind the ceramic capacitor DC bias, you would really want electrolytic for the input capacitor as the bias will rob an MLCC most of it's capacitance. 

Update

The LDO will dissipate non-zero amounts of heat when all LEDs are off. With 2k2 pull-down resistors the maximum power dissipation (=duty cycle 0%) will be about 0.5W. When using 10V LDO: $$\frac{10V}{2200R}*8*14V = 509mW$$