How JTAG affects system load?
JTAG does not normally connect to the "bus" so electrical loading would probably not be a concern - if it was you would just introduce errors and resulting system crashes.  Of course with both bus and jtag signals, poor electrical design can lead to integrity issues, where proactively reducing the clock speed can sometimes offer partial mitigation.  But such reduction would probably not be automatic (and fixing the electrical design, for example with terminating resistors, would be better)

In terms of system operation, inactive JTAG should not affect things (excepting some security enabled micros which may refuse to run, or enable some functions when JTAG is used, or more likely refuse to enable JTAG when such features are used).  Most JTAG debug engines would do any breakpoint logic independently of the ordinary CPU paths, so again, there should be no performance hit until a break condition is hit.  (I suppose there could be cases where use of JTAG forces some pipelines, caches or similar acceleration features to be disabled?)

But of course once a JTAG debug engine interrupts execution of the CPU, system performance goes out the window.  Any step-by-step execution is likely to be hundreds to thousands of times slower than ordinary execution.