Is every in-field stimulus replay-able during simulation?
My experience comes from the world of FPGA design.

It has been my experience that you can functionally test everything in a design, but as your friend says, the length of the simulation becomes the real limiting factor. When I say functionally test, I mean a test that assumes correct timing of the design, and is not testing edge cases of variations in timing (i.e. assume Place and Route of your design targeting your device is correct).  It can take hours/days to simulate a few seconds of an FPGA design. Which in a world where many things can be happening in parallel at 80-400MHz, it is a lot of operations to simulate.

However, the more critical it is that the design is right the first time, the more time you are willing to spend testing all of the cases, especially corners. As you mentioned, people will typically focus on exercising corner cases after they are fairly confident that "normal cases" are working correctly.

Hardware co-simulation can do a couple things. First, it can give you farm fuzzies that your design that worked in "pure simulation" also works in hardware. Second, it can greatly accelerate your verification, assuming you have a fast model to determine what exact output you are expecting for a given input.