Two questions about testing with HDL designer
Caveat : Most of my HDL Designer use was when it was still called Renoir. I imagine it's improved, but probably not as much as one would like.

The key to the answer is probably to realise that HDL Designer is a great aid to creating a good first pass at a design, but not ideal (as you observe) for day to day low level manipulation while debugging.

At this stage (testing in simulation, trial synthesis, and investigation using SignalTap or Xilinx Chipscope) I would recommend you forget about HDL designer ... for now ... and learn how to use the underlying tools (edit HDL files, Modelsim GUI, synthesis, Quartus to build bitstream and insert probes etc.

So, freeze the current HDL Designer output (tag the commit "Initial", etc, and start a new "debug" branch if you're using Git Flow or whatever) and learn to get on with the underlying tools, without letting HDL Designer get in the way.

Once you have a result, it is up to you how you proceed, but there are two basic approaches.

1) Move forward from your current point (a working debugged design, that has diverged from HDL Designer in ways that may be difficult to back-port into "Initial") - effectively abandoning HDL Designer for the remainder of this project

2) Diff your current point against "Initial" and apply all the source code changes at once in HDL Designer (but not the dead ends, experiments, debugging hooks etc) and move forward keeping HDL Designer as the primary design tool. In other words, don't worry how to get quick experiments through HDL Designer; come back to it once you have answers.

Which approach is better depends on context : 1) is simpler for a short lived project, 2) is probably cleaner in the long run because it gives an opportunity to clean up technical debt.

With regard to 2a) and 2b), you are probably right that synth attributes may "fix the problem" but you're usually (not always!) better off improving the testbench to observe the same in simulation instead.