Vivado libraries not working in simulation
I tried your code and after some initial problems got different errors. Most noticeable was Module "&lt;MMCME2_ADV&gt; not found while processing module instance &lt;mmcm_adv_1&gt; " which if you open the MMCME2_BASE.v module is inside it. 

Then I decided to work very meticulous so I copied the ports from the MMCME2_BASE.v Xilinx source code and connected the module up exactly that way. That made it work. 

I compared the code and found that your port names are wrong:
CLK_OUT1 should be CLKOUT1
CLK_OUT1B should be CLKOUT1B
etc.

This works:

   .CLKFBOUT (clkfb), 
   .CLKFBOUTB(),
   .CLKOUT0  (),  
   .CLKOUT0B (), 
   .CLKOUT1  (clk_200p),  
   .CLKOUT1B (clk_200n), 
   .CLKOUT2  (clk_324p),  
   .CLKOUT2B (clk_324n), 
   .CLKOUT3  (),  
   .CLKOUT3B (), 
   .CLKOUT4  (),  
   .CLKOUT5  (),  
   .CLKOUT6  (),  
   .LOCKED   (),   
   .CLKFBIN  (clkfb),  
   .CLKIN1   (clk_100),   
   .PWRDWN   (1'b0),   
   .RST      (1'b0)