Line remapping using a CPLD
A CPLD is a reasonable-enough choice. A typical CPLD on the market today will be a pile of logic blocks (different vendors use different terms), each consisting of a 4-input LUT and a register (flip-flop). Both the LUT and the register can be configured and can be used together or independently.

You can read plenty about the function of a LUT and of a configurable register on plenty of websites. Suffice to say that the LUT is a little logic gate circuit with 4 logic inputs and 1 output. The LUT output bit values for each of the 16 possible 4-bit input values is specified during configuration. So the LUT can impersonate any logic gate circuit with 4 inputs and 1 output. Including a small mux.

There's carry logic with the LUT in some CPLDs than can be exploited to make a larger mux but let's keep this simple and say that 1 LUT can use 3 inputs to make a 2-to-1 mux with a single select line.

You want 32 x 60-to-1 multiplexers ('mux'es) plus some interface logic to let you select the path through each mux. So you use muxes into muxes into muxes to make a 60-to-1 mux out of lots of 2-to-1 muxes. Specifically, you can use 30 + 15 + 8 + 4 + 2 + 1 mux = 60 muxes. The first 30 muxes take 60 inputs and produce 30 outputs, the next 15 muxes take 30 inputs and produce 15 outputs and so on, through six mux levels to produce a 1 bit result.

You want 32 of these so that's 32 x 60 muxes = 1920 muxes = 1920 LUTs. You then want logic to select the path, which is one register per LUT. The register will be configured to be a D-type Flip-Flop (DFF). Register and LUT come as a pair so that's convenient because your 1920 LUT CPLD will automatically come with the 1920 registers needed to control the 1920 LUTs.

You then need some sort of interface to accept control information for the routing selection on each mux. SPI, parallel bus, an enormous row of switches, summat else - that's up to you to decide. That requires some logic too and depends on your choice.

Finally, you need enough pins to carry your 60 inputs, 32 outputs, control interface, logic clock and reset. Your CPLD might have an internal oscillator, might be able to produce an internal reset. The oscillator frequency should be as low as possible to get the job done, to reduce unnecessary EMI emissions from it.

So look at CPLDs with at least 2100 LUT/register pairs and enough pins for the interface and 94 more and you'll be on the right path. At that point, cost, capacities for a part family and availability of parts steer you the rest of the way.

As alluded to earlier, some CPLDs can use carry logic to make a 4-to-2 mux with 1 select line so that would use something like half the LUTs of this example. If it were me, I'd design the circuit in VHDL and synthesise it into different guess-start CPLDs using the manufacturer's free software. Then I could see what a particular CPLD family can do with my circuit and to guide my selection. Don't use more of 70..80 % of the device's capacity, to allow for future expansion - pick a larger device instead.