Modifying land patterns generated with IPC-7351B wizard
Unless you're etching this yourself, a clearance of 0.2 mm probably won't be a problem for the manufacturer. 0.127 mm (5 mil) is not uncommon, and 0.152 mm (6 mil) is even more common. I would check your board house's requirements and modify the DRC rules to match what they are expecting. Then if there are any specific issues based on your manufacturer's rules, you can focus on them one-by-one.

If you want to bypass the IPC footprint altogether, you can go with the recommended land pattern from Microchip/Atmel themselves. See page #12 in this app note: http://ww1.microchip.com/downloads/en/appnotes/atmel-8826-seeprom-pcb-mounting-guidelines-surface-mount-packages-applicationnote.pdf