Wiring of body terminal in a network of MOSFET switches
In the low-voltage CMOS processes I have used, there are no layout differences between Source and Drain. There are, in two high voltage processes, either required Drain implants or optional Drain implants; these implants reduce the intensity of the voltage gradients in the silicon.

If your FETs are laid out on the substrate, as would NFETs on Psubstrate, then you have no control of the behavior of the FET's backside/bulk/body. In some processes, such as twin well, both types of FETs are in tubs (one type would be in nested tubs), you do have control of the body, but at substantial increase in layout area, unless you can share the tubs. 

OP requests layout details







simulate this circuit &ndash; Schematic created using CircuitLab

BLUE DOTS is the active implants for drain and source. In this layout, the DR and SRC are identical, and thus swappable.

Red Dashes is the gate structure.

Black Dashes is the metallization

Small Black Squares is the contacts from metal to active, or form metal to gate (poly here)

The BULK/BODY is off to the side.

By the way, the body-potential does not affect the swappability of these drawn-symmetric drain/source type of FETs.