What is the difference between "Operating Voltage" and "Drain-Source Voltage" for an LDMOS FET?
The clue is : it's an RF amplifier not a simple switching circuit or a baseband amplifier.
A typical circuit might be:



simulate this circuit &ndash; Schematic created using CircuitLab
Now you can see VDD is the supply voltage, aka the &quot;operating voltage&quot; in this datasheet, while Vds is the voltage between drain and source on the device itself.
But surely Vds is therefore less than the supply Vdd, since it is only over part of the circuit?
Normally yes....
But RF amplifiers often have tuned loads, as here, and thus no DC voltage drop across the inductor. Furthermore, the actual drain voltage is the sum of Vdd and the peak AC output voltage, which is built up across a high Q tuned circuit.
In a linear RF amplifier, the transistor can pull OUT down to 0V giving an -ve peak equal to Vdd : when it turns off, the drain will swing up to Vdd * 2.
However RF amplifiers can operate in Class C where the transistor is no longer linear but overdriven, more like a switch. In this case, Vds can exceed VDD * 2 in the same way that a swing can reach greater heights than you push it to.
Which is reflected in the ratings here : operating off VDD &lt;= 17V, VDS can be allowed to reach 40V.