Differences between flip-flop control inputs and clock inputs
A clock is a continuous free-running square wave of a fixed frequency. It governs when the registers (flip-flops and latches) in a circuit could adopt their input level as their output. It provides timing to the circuit.

(There are situations where the clock isn't continuous, free-running or fixed frequency but ignore those for now, let's stick with the typical case for synchronous digital logic.)

The control inputs govern if the registers will adopt their input level as their output. If they do, it will happen on the next clock edge for synchronous controls (e.g. Clock Enable CE, Latch Enable LE) or as fast as possible for asynchronous controls (e.g. preset PRE, clear CLR). Therefore the term synchronous and asynchronous indicate if they are gated internally with the clock or not.

In a synchronous logic circuit, the asynchronous inputs are normally used only for rare and exceptional control, such as power-on reset or a critical failure response. Using the clock and synchronous control inputs allows the timing within the circuit to be predicted accurately.