how to create a and gate circuit
The inputs of TTL logic gates are emitters of NPN transistors.  They are current sources so when not connected they act as High level or logic "1", so your AND gate sees two high inputs, and naturally outputs a High.  It is good practice to connect inputs you want to be high to the positive supply, either directly or through a resistor.

For the inputs to act as Lows, they must be connected to the negative side of the supply (normally considered "ground").

The above applies to 74xx, 74LS, and 74ALS logic families.

The CMOS logic families 74AC, 74C, 74HC (and anything else with a "C" in the middle) have very high impedance inputs which, if left unconnected, will assume random logic levels.  With these parts, inputs must be connected to either supply or ground, either directly or through a resistor, and not left unconnected.