What's the purpose of the diode at the JFET gate in this Hartley oscillator?
It looks to me that the diode is there to shift the DC level of the signal coupled to the gate so that the positive peaks are just one diode drop above ground.  That makes the negateve peaks lower than they would be if the signal was centered around ground.  Note that the signal is capacitively coupled to the gate.  This is a JFET, so negative gate signals are meaningful.

The description you cite looks like nonsense.  The overall effect of the diode may be to reduce harmonic content of the resulting oscillations, but the diode itself doesn't somehow magically "clean" the signal.  By lowering the DC level of the signal on the gate, it's possible that the FET is operated in its linear region more, which would reduce the resulting harmonic content.  But, that's far from the diode "cleaning" the signal.  At best you can say the diode shifts the DC so that the FET can handle the signal more cleanly.