Will PCB board house accept this QFN thermal pad via design (KiCad)?
they are pads which connect from front copper layer to bottom ground layer


You've just described a via.


  Do you think the board house will accept this? 


If they're on the ball they won't accept it.  They specify a hole size because below that their process won't reliably plate the holes.  Do you want your thermal vias to be non-thermal holes?


  Or should I just make the hole diameter 0.3 mm?


You should make the hole diameter 0.3mm, and accept difficulties in soldering.  I'm guessing at this, but if you pre-fill the vias (by soldering them full) you may save yourself some grief in reflow.  Or if you're using paste, just make sure they're packed full.

Finally (thanks, @ThePhoton): consider just using a different fab house. 0.2 mm vias is a pretty common capability these days. (Or ask the current fab house if they can do 0.2 mm vias with a cost premium)