Highly asymmetrical rise and fall times
That's because you are actively (with the MOSFET) pulling down, but passively (with the resistor) pulling up. If you want a shorter rise time, either try a lower resistance value for R2, or use a totem-pole buffer (with two complementary MOSFETs, one to ground, and one to the supply), so that you will have a pulling effect in both levels. The easiest way to have a totem-pole buffer is to put there a high-speed CMOS inverter, with enough current capability to drive whatever your load is.