Will this schematic work as a four-bit shift register?
There are three major problems with your circuit.


The logic elements have no voltage gain, so the signals get weaker and weaker the farther they propagate.
There's no way any of your stage-to-stage pass transistors (Q5, Q7, Q11 and Q15) could possibly pull the input of the next stage low.1
Even if those problems were addressed, you have only a single-phase clock. When "shift" is high, all of the multiplexers are in series and the data just propagates directly from the input all the way to the last output.




1 Actually, that isn't strictly true. With some appropriate circuit changes, you might get those transistors to work in "reverse active" mode, in which the roles of collector and emitter are reversed.