Is this a single cycle circuit?
Depends on how you define 'single cycle circuit'.  In general, your circuit will be fed by registers and it will feed registers, so usually you're only interested in the delay between the registers and not the delay of the registers themselves as this determines the minimum clock period.  

There are really two important metrics here: throughput and latency.  Throughput is determined by how often a circuit can accept new data and/or produce a new result.  In this case, your circuit can accept a new input and produce a new output on every clock cycle.  Latency is determined by how long it takes to propagate a set of data through the circuit.  In this case, the latency between the input and output registers is one cycle.  

It is possible to build circuits that have lower throughput and higher latency.  Let's say you double the clock frequency.  In this case, you can only change the input and store the output every other clock cycle.  So the throughput is 1/2 as only half of the clock cycles can be used to transfer in data, and the latency is 2 cycles as it takes 2 cycles for data from the input register to end up in the output register.  How about adding a pipeline register in the middle of the operation?  This would keep the throughput at 100% as the intermediate result can be stored in the pipeline register on every cycle, but the latency would be 2 cycles because it takes two cycles to get the data from the input, through the pipeline register, to the output register.  

So for your circuit, I think that if you consider just the delay between data getting clocked out of the input register to the result getting clocked in to the output register, 'single cycle circuit' is a succinct way to describe it.