NOP instruction after branch on ARMv7 Cortex M3
Lots (most? all?) compilers end up putting NOP instructions after some (but not other) jump/branch type instructions.

When the compiler sees a "jump" type instruction, it has two different instructions that can do the job. One is relative, one is absolute.

One is a relative jump, and one is an absolute jump. The relative jump is quicker, and specifies a jump relative to the current instruction - the address to jump to is a single byte, so it can jump forward 128 bytes, or backwards 127 bytes.

The other is an absolute jump - this is slower, and specifies the address to jump to. This can jump to anywhere.

The problem is, when jumping forward, the destination address may not be known yet - it would have to compile the code up to the jump destination, then work out if it is less than 128 bytes. Of course, to work out how many bytes to jump forward, you need to know how many bytes THIS instruction takes up, as well as every instruction between here and there.

This is way outside the paygrade of a compiler; it leaves space for an absolute jump, then on the second pass, when it knows where all addresses are, it fills the gaps - either putting in a more efficient relative jump (+ a NOP, because it has to take up the same number of bytes!), or putting in an absolute jump.