Why does the input resistance of an inverting op-amp amplifier have to be high?
The problem the author is trying to avoid is overloading of the source signal.







simulate this circuit &ndash; Schematic created using CircuitLab

Figure 1. A voltage source with it's source impedance, Rs feeding an inverting amplifier with input impedance Ri.

Remember that the inverting input of an inverting amplifier is at virtual ground.


Let's say my Vs is 1 VRMS and has an output impedance of 1 k&Omega;. 
Our amplifier has a gain of -1. We expect an inverted version of Vs to appear on the output with a reading of 1 VRMS.
We're disappointed! With the components I've drawn we can see that the voltage at Vi is half of Vs. As a result the amplifier output will be 0.5 VRMS.


If we replace Ri with a 10 k&Omega; resistor we'll be much closer to the expected value, 10/11 VRMS. The higher the input impedance the less it loads the source.

Note that with some systems such as 50 &Omega; signal generators the source has a 50 &Omega; impedance and is designed to give the nominal voltage on the output when driving a 50 &Omega; load. If measured using an oscilloscope while there is no load the reading will be double the value set on the output control.