Arm mode and Thumb mode makes the PC's bit 0
The bx instruction copies bit 0 to the T status bit, so it selects between ARM and Thumb mode on branch.

So, to jump to ARM code at address 0:

mov r0, 0
bx r0


To jump to Thumb code at address 0:

mov r0, 1
bx r0


To jump to Thumb code at address 2:

mov r0, 3
bx r0


ARM code cannot exist at address 2, because that would violate the alignment constraint. Neither ARM nor Thumb code can start at odd addresses, so the LSB of the address is always zero, and the bit is reused to select the new mode in the bx instruction.

To allow easy return from subroutines, bit 0 of the lr register reflects the Thumb state from before the function call after a blx instruction. So:

    mov r0, #2f
    blx r0
1:
    b 1b

    .thumb
2:
    bx lr


will load the address of the 2 label with the bit 0 set (as the label refers to Thumb code) into r0, then blx loads the address of the l label with bit 0 clear (because it refers to ARM code) into lr and jumps to the bx lr instruction, which uses the lr to return to the endless loop in ARM mode.