How can i calculate the time that is elapsed between two sensors in vhdl?
This is the function of a Time-to-Digital Converter.
The idea is that you start a counter when the sensor 1 gives a 1 and stop it when sensor 2 gives a 1. The precision is determined by the clock frequency of the counter. It is even possible to have higher precision if you add an interpolator (the Nutt method), but I don't think you require it.

To detect the rising edge, implement edge detectors:

    signal sensor1delay : std_logic;
    signal sensor1r_edge : std_logic;
begin
    sensor1delay &lt;= sensor1 when rising_edge(clk);
    sensor1r_edge &lt;= '1' when sensor1='1' and sensor1delay='0' else '0';


edit: The Q &lt;= D when rising_edge(CLK); construct is perfectly legal VHDL (since VHDL93), and supported by all modern synthesis software afaik. More people are using it, just Google it. It is also described in "Effective Coding with VHDL" by Ricardo Jasinski

then just count:

    signal counter : natural;
    signal output : natural;
begin
    clock_proc: process(clk)
    begin
        if rising_edge(clk) then
            if sensor1r_edge='1' then
                counter &lt;= 0;
            else
                counter &lt;= counter+1; -- overflow error in simulation, not in synthesis
            end if;
            if sensor2r_edge='1' then
                output &lt;= counter;
            end if;
        end if;
    end process;


Your last part is unclear: what do you mean with "after a moving object moves infront of it i cannot store the time"

Edit:

It is likely also necessary to implement (clock domain) synchronizers for the sensor inputs.