USB 3.1 over PCIe board edge connector
You need to control the impedance of the whole signal path to 90 plus or minus 7 ohms.  That includes the PCB trace, the receptical contact, the mating interface, the plug contact and the wire termination/PCB trace. 

You also need to worry about insertion loss and differential insertion loss. (100 MHz, -1.5 dB; 1.25 GHz, -5.0 dB; 2.5 GHz, -7.5 dB; and 7.5 GHz, -25 dB). 

It's not impossible but what often happens is that during the training phase of the USB the connection defaults to a USB 2 connection. The unreliability of system is frustrating and without a lot of expensive test kit it is not clear where the problem is and what to do about it.

Have a look at this paper: Managing Connector and Cable Assembly Performance for USB SuperSpeed amongst others at http://www.usb.org/developers/docs/whitepapers/