Software for logical circuit generation
It seems to me that using software for such a task is somewhat defeating the purpose of the University assignment.  Doing it with software, even if it does exist, is at best going to eliminate that part of your education and at worst going to put you at a disadvantage in later classes where you need to utilize this knowledge.  Any time you save now will be completely lost later when you have trouble with future assignments.

I am assuming that using this kind of software wasn't the intent of your professor, otherwise he/she would have provided the software themselves (or a link to it).

Software for FPGA/CPLD/ASIC design isn't going to help you much, if at all.  While they will do what you ask, the results are not going to be in a format that will be useful.  To make matters worse, that whole "show your work" part of your assignment will be missing.