A logic 0 can be a non-zero value (say upto 0.5volts), wouldn't that cause a current to flow through a device connected to output and then ground?
But since logic 0 can be a non-zero volt, wouldn't that cause a current to flow through an external load connected to ground


In principle, yes. But usually the reason a logic output is above 0 V is because the external load is tied to a high voltage rather than to ground. So current in this scenario is flowing from the load to the logic gate's output rather than the other way around. 

Consider these three circuits, and imagine the outputs of all 3 buffer gates are low:







simulate this circuit &ndash; Schematic created using CircuitLab

BUF1 will not have a 0.5 V output voltage because its load is pulling current out of, rather than pushing current in to, the gate's output.

BUF2 might have a 0.5 V output, because its load is pushing current in. But this is arranged to light the LED for logic 0; having D2 lit is the expected and desired behavior.

BUF3 could also have a 0.5 V output, and this could cause a tiny leakage current to flow through D4, as suggested in your question. But current is not only leaking into R4 and D4, it's also flowing in to the BUF3 output pin. It isn't BUF3 that's providing the leakage current to D4, it's the pull-up path through D3 and R3. 

Because the turn on voltage of D4 is almost certainly higher than 0.5 V, it is very unlikely that D4 will have a "lit" appearance.


  through a low value resistor or say, glow a low-current LED in both cases (0 and 1) as it will be forward-biased in both cases?


Most LEDs need at least 1.5 V before any substantial current flows through them and their output becomes visible. Some types might need as much as 2 V. So 0.5 V is not likely to lead to a visibly lit LED. If you were detecting the LED output with a very sensitive detector rather than just your eye, you might need to use a stronger output driver to be sure to turn the LED fully off.


  How exactly we should see a logic 0 compared to a logic 1?


The definitions depend on the logic family you're using. For example TTL and CMOS families have different definitions of what constitutes a valid 0 or 1. 

If you're using a logic gate and load that can only produce 0.5 V in the low state, then any other logic inputs you connect to that output need to be chosen to be ones that will take 0.5 V as a valid low. For example, TTL logic has a typical switching threshold of 0.8 V, so if the input were 0.5 V, there wouldn't be much noise margin. In this case you might want to reduce the load current (the amount of current the first logic's output has to sink to produce the 0), or add a buffer, depending on circumstances.