ASF SAMD21G18 2x timers usage
this is answer from microchip support:

The timer/counter peripheral is actually  a set of 16-bit timers, which can be combined to use as 2 32-bit timers.

When paired, the TC peripherals are configured using the registers of the even-numbered TC (TC4 in this case). The odd-numbered partner (TC5) will act as slave, and the Slave bit in the Status register (STATUS.SLAVE) will be set.

The timer middleware in the Atmel Start configures the timer as 32 bit timers by default, hence it is not possible to use both TC4 and TC5 in two instances of Timer middleware, as both of them will be paired to be used as 32-bit timer and TC5 is acting as slave.



to manual change the code generated by atmel start:

// Mode set to 32-bit

#ifndef CONF_TC3_MODE
#define CONF_TC3_MODE TC_CTRLA_MODE_COUNT32_Val
#endif


in hpl_tc_config.h