Why Flash memories have less P/E (Program / Erase) cycles (e.g. 100K) compared to EEPROM (e.g. 1000K)?
Thanks for the example part numbers. The difference is essentially a design choice; both operate by tunneling electrons on and off a floating gate, but the two examples you give are of very different capacity and therefore density. The tiny part with the high number of erase cycles will have larger, more durable cells compared to the high-density part.

Note that as density goes up, the amount of wear on any individual cell would normally go down. It takes longer and longer to write all the cells in the device.