Design a circuit using only 2 to 1 multiplexers that implements the function of an 8 to 1 multiplexer
I'm a couple of weeks late, but at least this should improve on the answers.

2:1 MUX compact truth-table, followed by schematic:
$$
\begin{array}{c|c}
   S
 &amp; Y \\
\hline
0 &amp; I0 \\
1 &amp; I1 \\
\end{array}
$$







simulate this circuit &ndash; Schematic created using CircuitLab

8:1 MUX truth-table, followed by schematic (each MUX is a set of not, and and or gates as shown above):
$$
\begin{array}{c|c|c|c}
   S2
 &amp; S1
 &amp; S0
 &amp; Y \\
\hline
0 &amp; 0 &amp; 0 &amp; A \\
0 &amp; 0 &amp; 1 &amp; B \\
0 &amp; 1 &amp; 0 &amp; C \\
0 &amp; 1 &amp; 1 &amp; D \\
1 &amp; 0 &amp; 0 &amp; E \\
1 &amp; 0 &amp; 1 &amp; F \\
1 &amp; 1 &amp; 0 &amp; G \\
1 &amp; 1 &amp; 1 &amp; H \\
\end{array}
$$







simulate this circuit