Why is the gain of an integrator built using op-amp -Rf/R1 till cut-off frequency
You have confused yourself by labeling your graph with frequency = 0 at the vertical axis.

The response of the integrator is a straight line only on a log-log graph, which means that 0 frequency (DC) is infinitely far away on the left side of the graph. What does this imply about the gain of an ideal integrator at DC?

But your circuit does have a definite value for DC gain. What is it, and at what frequency does it begin to deviate from that value?