Assigning binary value to decimal value using counter
Okay i figured out the solution.
Here are top module and testbench for these code.
`timescale 1ns / 1ps


module TopModule(clk, aci ,reset,sonuc,en);

input en;
input reset;
input [7:0]aci;
output reg [15:0]sonuc;
input clk;



always@(posedge clk)begin 

if(reset)
    sonuc &lt;= 'd0;

else begin 
        
        case(aci)
        
            'd1 : sonuc &lt;= 16'b0000001111111111;
            'd2 : sonuc &lt;= 16'b0000001111111111;
            'd3 : sonuc &lt;= 16'b0000001111111110;
            'd4 : sonuc &lt;= 16'b0000001111111101;
            'd5 : sonuc &lt;= 16'b0000001111111100;
            'd6 : sonuc &lt;= 16'b0000001111111010;
            'd7 : sonuc &lt;= 16'b0000001111111000;
            'd8 : sonuc &lt;= 16'b0000001111110110;
            'd9 : sonuc &lt;= 16'b0000001111110011;
            'd10 : sonuc &lt;= 16'b0000001111110000;
            'd11 : sonuc &lt;= 16'b0000001111101101;
            'd12 : sonuc &lt;= 16'b0000001111101001;
            'd13 : sonuc &lt;= 16'b0000001111100101;
            'd14 : sonuc &lt;= 16'b0000001111100001;
            'd15 : sonuc &lt;= 16'b0000001111011101;
            'd16 : sonuc &lt;= 16'b0000001111011000;
            'd17 : sonuc &lt;= 16'b0000001111010011;
            'd18 : sonuc &lt;= 16'b0000001111001101;
            'd19 : sonuc &lt;= 16'b0000001111001000;
            'd20 : sonuc &lt;= 16'b0000001111000010;
            'd21 : sonuc &lt;= 16'b0000001110111011;
            'd22 : sonuc &lt;= 16'b0000001110110101;
            'd23 : sonuc &lt;= 16'b0000001110101110;
            'd24 : sonuc &lt;= 16'b0000001110100111;
            'd25 : sonuc &lt;= 16'b0000001110100000;
            'd26 : sonuc &lt;= 16'b0000001110011000;
            'd27 : sonuc &lt;= 16'b0000001110010000;
            'd28 : sonuc &lt;= 16'b0000001110001000;
            'd29 : sonuc &lt;= 16'b0000001101111111;
            'd30 : sonuc &lt;= 16'b0000001101110110;
            'd31 : sonuc &lt;= 16'b0000001101101101;
            'd32 : sonuc &lt;= 16'b0000001101100100;
            'd33 : sonuc &lt;= 16'b0000001101011010;
            'd34 : sonuc &lt;= 16'b0000001101010000;
            'd35 : sonuc &lt;= 16'b0000001101000110;
            'd36 : sonuc &lt;= 16'b0000001100111100;
            'd37 : sonuc &lt;= 16'b0000001100110001;
            'd38 : sonuc &lt;= 16'b0000001100100110;
            'd39 : sonuc &lt;= 16'b0000001100011011;
            'd40 : sonuc &lt;= 16'b0000001100010000;
            'd41 : sonuc &lt;= 16'b0000001100000100;
            'd42 : sonuc &lt;= 16'b0000001011111000;
            'd43 : sonuc &lt;= 16'b0000001011101100;
            'd44 : sonuc &lt;= 16'b0000001011100000;
            'd45 : sonuc &lt;= 16'b0000001011010100;
            'd46 : sonuc &lt;= 16'b0000001011000111;
            'd47 : sonuc &lt;= 16'b0000001010111010;
            'd48 : sonuc &lt;= 16'b0000001010101101;
            'd49 : sonuc &lt;= 16'b0000001010011111;
            'd50 : sonuc &lt;= 16'b0000001010010010;
            'd51 : sonuc &lt;= 16'b0000001010000100;
            'd52 : sonuc &lt;= 16'b0000001001110110;
            'd53 : sonuc &lt;= 16'b0000001001101000;
            'd54 : sonuc &lt;= 16'b0000001001011001;
            'd55 : sonuc &lt;= 16'b0000001001001011;
            'd56 : sonuc &lt;= 16'b0000001000111100;
            'd57 : sonuc &lt;= 16'b0000001000101101;
            'd58 : sonuc &lt;= 16'b0000001000011110;
            'd59 : sonuc &lt;= 16'b0000001000001111;
            'd60 : sonuc &lt;= 16'b0000001000000000;
            'd61 : sonuc &lt;= 16'b0000000111110000;
            'd62 : sonuc &lt;= 16'b0000000111100000;
            'd63 : sonuc &lt;= 16'b0000000111010000;
            'd64 : sonuc &lt;= 16'b0000000111000000;
            'd65 : sonuc &lt;= 16'b0000000110110000;
            'd66 : sonuc &lt;= 16'b0000000110100000;
            'd67 : sonuc &lt;= 16'b0000000110010000;
            'd68 : sonuc &lt;= 16'b0000000101111111;
            'd69 : sonuc &lt;= 16'b0000000101101110;
            'd70 : sonuc &lt;= 16'b0000000101011110;
            'd71 : sonuc &lt;= 16'b0000000101001101;
            'd72 : sonuc &lt;= 16'b0000000100111100;
            'd73 : sonuc &lt;= 16'b0000000100101011;
            'd74 : sonuc &lt;= 16'b0000000100011010;
            'd75 : sonuc &lt;= 16'b0000000100001001;
            'd76 : sonuc &lt;= 16'b0000000011110111;
            'd77 : sonuc &lt;= 16'b0000000011100110;
            'd78 : sonuc &lt;= 16'b0000000011010100;
            'd79 : sonuc &lt;= 16'b0000000011000011;
            'd80 : sonuc &lt;= 16'b0000000010110001;
            'd81 : sonuc &lt;= 16'b0000000010100000;
            'd82 : sonuc &lt;= 16'b0000000010001110;
            'd83 : sonuc &lt;= 16'b0000000001111100;
            'd84 : sonuc &lt;= 16'b0000000001101011;
            'd85 : sonuc &lt;= 16'b0000000001011001;
            'd86 : sonuc &lt;= 16'b0000000001000111;
            'd87 : sonuc &lt;= 16'b0000000000110101;
            'd88 : sonuc &lt;= 16'b0000000000100011;
            'd89 : sonuc &lt;= 16'b0000000000010001;
            'd90 : sonuc &lt;= 16'b0000000000000000;

endcase
end
end

    
endmodule


`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////



module TestBench();

reg clk,reset;
reg [7:0]count;
reg en;
TopModule uut(.en(en),.clk(clk),.reset(reset), .aci(count),.sonuc(sonuc));

initial begin
clk=0;
reset=0;
count&lt;=0;
#100
en &lt;= 1;
end

always@(posedge clk)begin
    if(reset)
    count&lt;=0;
    else if (en)
    count&lt;=count+1;
    end
    
always
#10 clk=~clk;


initial begin

#1810;
reset=1;
end

initial begin



#10;
count&lt;=count+1;
end

endmodule