How to read multiple Verilog files in Design Compiler?
The read_file command has more options than the read_verilog command and it provides a solution for your need. You can specify directories instead of single files.

The following command reads all Verilog files in the specified directories.

read_file {./module1/rtl ./module2/rtl} -autoread -format verilog -top MyTopModule


The -autoread option is required for the files to be compiled in the correct order. In addition, the top module of the design is specified.

If there are too many directories, the -recursive option saves lives.

read_file {./} -autoread -recursive -format verilog -top MyTopModule