RISC-V: building a datapath for conditional Branch instructions
The abstract behind the branch ISA's are that if the conditions are met, the program counter will JUMP to the given address. To implement a branch, the Branch generator must be correct and the PC source must be set to branch. To insure the PC source is correct, a control unit decoder must be able to differentiate between the commands. That's where the opcode and the func3, func7 come into play.
So the rundown pretty much goes like this.


Compiler breaks down the ISA into binary where the decoder uses that to determine the given instruction.
The control unit sets the muxes to the correct one.
The PC then moves to the correct address


Photo was taken from Cal Poly EE Department CPE 233 Assembly and Computer Design taught by Professor Joseph Callenes-Sloan.