Describing the process of pinching off of a n channel in JFET
You are correct in your explanations with respect to your diagrams. Your correctly portraying operation in linear/ohmic/ triode region of N channel JFET. If you wanted to take it a step further though you can include another important operation of JFET which is saturation or beyond pinch off region. This is where VGS is any value from 0V to Vp (pinched off voltage) and VDS is not small. This creates the condition where VDS is greater than or equal to VGS-VP. For example consider Vp=-4V and VGS=0 with VDS=10V. See how it’s channel looks squeezed but current does flow. But special thing about this operation in this region is that for drain to source current remains constant even for different values of VDS while VGS is constant. See second image. Source:Electronic circuit analysis and design hayt 

Note VGS can be other values besides zero. The picture is just for when VGS is zero but valid for other values.





Last picture illustrates how different values of VGS look in saturation. 


Image sources: Electronic Circuit Analysis and Design 2nd edition Hayt/Neudeck