How do I calculate the supply current for a zynq 7010 chip?
As Dave says, it depends on your design - the current can vary hugely depending on frequency and percent of available gates used. With such a complex IC, you need to take full advantage of the tools available.  

Xilinx has a power estimate tool, which can be used after synthesis/layout to give you an idea of the power consumption, so you can use this to get a good idea before you start designing your circuit. It is mentioned on page 7 of the datasheet to use the XPE to estimate the current drain on the supplies after initialisation and configuration. Note a maximum of 200mA per bank is mentioned in the note on page 4.  

Alternatively, simply go from the maximum average current draw the chip is capable of and design for this (I haven't looked, but there may be some transient switching specs which can be quite large that might confuse you, but this type of current is supplied by the many bypass caps on your power rail - the rails just need to supply the average draw)
Make sure you take note of the thermal characteristics and keep within operating specs junction temperature wise. The XPE should give you plenty of info on this.  

There should be an application note or two on power supply design, so check all the related app notes. I'm currently using a Spartan-3A (50k gates), and there is plenty of info regarding this area (FWIW, with my current design using 100MHz and 30MHx clocks, and ~35% utilisation with around 20 pins from 2 banks used, it draws around 100mA - the two chips are very different so this is just for interest's sake. I know the Zynq is newer so there will probably be a lot less app note wise, but there should be at least the important stuff covered, plus some layout info and example designs you can go from)
Also checking any dev board schematics to see what they are using for the power rails is not a bad idea.