Quartus: What is the purpose to "register output port" when RAM or ROM megawizard?
Putting pipeline registers at the inputs and outputs of a block RAM allow it to run at the fastest possible clock speed (throughput), but the rest of your design must account for the additional clock cycles of latency before you see the results.

Therefore, you must select the options in the megawizard that correspond to what your logic design actually requires. You can't change them without changing other parts of the design as well.