How can FPGAs duplicate a LUT's output?
In the classical architecture, you have unlimited fan out on your s-blocks, so you can copy the output to another routing line, but due to the nature of topology and graphs you most likely would duplicate the logic on a LUT.  To give you a feel, here's a copy of an old fuse chart that I used when I was teaching FPGA design class.



You can imagine that the output is not fanout limited.  Below is an example of a single output driving two routing lines.  This means you can duplicate the output by either mirroring the LUT or fanout on the output. 



In the image above, you see how the logic conceptually moves around.