Properly route through hole USB-C
Just by looking quickly at your traces and vias, I have found 4 vias that are unnecessary.  Here they are:



You are switching between bottom and top layer twice instead of staying on the top layer.  

Furthermore, if you are putting vias to go from one layer to another, make sure the bottom traces are as short as possible to reduce space.  For example, you have abnormal length of traces for UP_SS_TX_P and UP_SS_TX_N.  You can put the vias right by the traces you are trying to jump under.