Trace width specification in PCB land pattern detail
The short, thin traces act something like "thermals" in a plated-through-hole design.  They minimize the effect of the heat from traces getting to the IC pads during soldering.  That way, the IC temperature (which should be fairly even across the IC) will dictate when the solder melts (and solidifies).

MEMS accelerometers are more susceptible to package stress than other components.  When the ICs are soldered to the board, asymmetries can be introduced.  Rules such as "keep symmetric traces to assist with uniform package heating" become more important (even though they should always be considered!).

The PCBs get soldered in a reflow oven. In an ideal world, all the components would heat and cool together. What really happens is more complicated. Internal ground planes take longer to heat, because of their thermal mass and because they are insulated by the pcb itself. Vias connected to these planes act as heat sinks, cooling down traces. Wide traces and narrow traces heat unevenly, etc etc.  Similar things happen when the board is cooling down.

In a small (0402, for example) component, if the solder on one pad melts before the solder on another pad, you can get tombstoning. Larger ICs (like yours) don't have this problem.  But when the soldering stage is completed, and the board is cooling, some pads will invariably solidify before others.  Since the IC is also cooling, therefore shrinking slightly, this can induce permanent mechanical stress on the part.

In the datasheet's "PCB Mounting Recommendations", Item 9:


  Signal traces connected to pads should be as symmetric as possible.
  Put dummy traces on NC pads in order to have same length of exposed
  trace for all pads. Signal traces with 0.15 mm width and minimum 0.5
  mm length for all PCB land pads near the package are recommended as
  shown in Figure 16 and Figure 17. Wider trace can be continued after
  the 0.5 mm zone.