Why in a MOS device the depletion zone width doesn't increase if the applied voltage is over threshold?
Let's consider an N-channel MOSFET as shown below. We dope the substrate with the p-type material, which causes the silicon to have somewhat excess of what called holes. Now we are going to dope right beside the ends of dielectric layer with an n-type material, as you see below:



N-type dopants have excess of electrons. We dope highly these regions with n-type materials in such a way that they become highly conductive. Now we apply a positive voltage to the gate of the FET with respect to the p-type substrate. Now what this does is attract electrons from N-channel region and repel holes outward to the bulk silicon. If you keep increasing the gate voltage you'd attract more and more electrons until you have collected up all electrons. From now on, increasing gate voltage would have no effect on the width of the channel. 

EDIT:

The region below the oxide layer is populated with a p-type material. Placing a positive charge on the gate would drive the holes away from the region below the oxide layer, leaving a depleted region that is insulating because no mobile holes remain. At the same time it attracts electrons from N+ regions, making a an inversion layer containing of electrons. Increasing the voltage on the gate leads to a higher electron density in the inversion layer. 

The electrons come from the N+ regions. The n-type doping is made in such a way that after a certain voltage on the gate is reached you would get no more electrons. Therefore further increasing the gate voltage would have no effect whatsoever on the inversion layer width. In other words, you don't have any more free electrons to bring into the inversion layer.