Why is there a delay in a common anode 7-segment display?
Do not upvote this answer! Blake found the solution himself, but doesn't seem keen on posting it as an answer. I'm just posting as a Wise Lesson for Future Generations.  

Driving the common anodes directly he made one output high at a time, and the outputs for the not selected displays low. But adding the PNP transistors inverses the logic, and then you want the selected display output low, and the others high. 

So what happens if you forget to invert the anode drivers? Say you want to display "1234". You make the first digit's anode high, the others low, and you output the bit pattern for a "1". Instead of the first digit showing the "1" it remains blank, and the others will show the "1". Move to the next digit. Again, that digit will remain blank and the other three will display the "2". And so on. Due to the multiplexing each digit will display a mix of the other three digits, but not the actual value for that digit.



Blake says this was supposed to be "1112". The first three digits show the mix of "1"s and "2", while the last one just shows the "1" because that's what all the other digits are.