Buck converter internal structure
The usual method is to use the comparator with a triangle clock generator with the linear error converted to PWM (pulse width modulation) to control the buck regulator.  I show my example below as a simplified version of this IC. (not optimized)


 Here a simple Schmitt astable clock can be integrated by some RC  inside to create a fairly linear triangle at the right amplitude.  (&lt;~1/3) but must exceed the range of the linear error.  It will not be implemented as shown here but with discrete transistors.