Why does the bandwidth of an OP Amp decrease as temperature decreases??
"Effect of Extreme Temperature Thermal Cycling of 8-Pin Plastic Dip Package ... OP181GP ... "  It's an unusual article.  You might think that the focus is on latent effects of thermal cycling and operation thereafter.  But no, it is more concerned with operation of an industrial grade OpAmp at temperatures as high as 90C and as low as -185C. 90C is not that far out of the specified operating temp limits of 85C to -45C, but -185C or about 88K is way out of the range.  88K is cryogenic, the temperature at which liquid Argon starts to boil.  

The OP181 is a Bi CMOS micro power part that has been discontinued by Analog Devices (so if you want a look at the datasheet, don't delay). It features rail to rail output and 4uA supply current. Gain bandwidth product is 95kHz with  a slew rate of 28V/mSec.  

As to why this OpAmp might loose a decade of bandwidth while operating in a puddle of boiling Argon, well lets take an admittedly crude look. Any more detailed analysis would be beyond the information at hand, and too much like real work to pursue.  

Slew rate is a crucial limiter for this OpAmp. All tests in the article were performed with an inverting amplifier configuration (100kOhm resistors) and sine input voltage of 1V peak. These are large signal tests, and at these signal levels, the amplifier will be slew rate limited for frequencies above about 4.5kHz.  

Possible Causes for Loss of Bandwidth / Slew Rate  

First we need to look at the parameters with the largest thermal coefficients (\$\alpha \$). That leaves capacitance out right away since caps in ICs, especially those used for Miller compensation are pretty good having \$\alpha \$ of about 50 ppm.  With a drop in temp of 212 K that's only a loss of ~1 % capacitance. Nothing to worry about.  

What' s left? Since it is BiCMOS and micro power there will be BJTs, CMOS FETs, and some high value resistors.  Temperature coefficients in ICs for large resistors (in the 100s of kOhms) tend to be large (~5000 ppm). FET transconductance (\$g_ {\text {fs}}\$) has a large negative dependence on temperature. Important since \$g_ {\text {fs}}\$ multiplies the effect of the Miller feedback capacitor  (\$C_f\$).  Looking at the simplified schematic (figure 32) in the datasheet we see 2 BJTs but mostly CMOS.  

  

The input stage is a simple looking PNP diff amp, while the output is a Class AB common source amp. Low temperature operation would reduce the value of collector resistance (\$R_c\$) causing gain loss in the input stage, and increase \$g_ {\text {fs}}\$ in the output stage multiplying the size of \$C_f\$, these combined would reduce slew rate. At least that's the hypothesis.  

Is The Hypothesis True?  

Starting with the answer for those of you who can't wait or just don't want to read, yes it appears to be true. A model of the circuit in the article was written and run with temp parameter set to 300K. Then output stage \$g_ {\text {fs}}\$ and diff amp \$R_c\$ values were altered for 88K and rerun.  





Comparing these plots (with Vin of 1kHz and 1Vpk) to those of the article (Figure 9a) shows a close resemblance. It appears that the OP181 pulls down better than up (no surprise), while the model is symmetric. No runs were made with 10kHz since the OpAmp is already slew rate limited there, and temperature effects aren't so dramatic.  

Analysis  

Since not that much is known of the circuit details, especially in the mid part and current sources, this analysis concerns the diff amp and output amp, and assumes thermal changes of the other bits are negligible. There is also a SPICE model at the end of the datasheet that provides good information about some part magnitudes and scaling.  

Gain of the diff amp stage will scale directly with \$R_c\$ (collector resistance, taken here to be ~500kOhm). So, a drop in \$R_c\$ with temperature would reduce gain by the same amount. If \$R_c\$ has \$\alpha \$ of 5000ppm (about what would be seen in a p-well resistor), gain would have a temp dependency like:  

\$e^{\alpha  \left(T-T_o\right)}\$ = \$e^{0.005 (88-300)}\$ = 0.35  

or a loss of ~9dB gain for a 212K temperature drop.  Gain would be pretty insensitive to \$\beta \$ and \$V_{\text{be}}\$ changes, so those parameters won't be considered.  

Things are more complicated for the output stage. The dominant factor here should be change to \$g_ {\text {fs}}\$, which has a negative \$\alpha \$. Change of \$g_ {\text {fs}}\$ will follow mobility like:  

\$\left(\frac{T}{T_o}\right)^{-1.5}\$ = \$\left(\frac{88}{300}\right)^{-1.5}\$ = 6.3  

So, \$g_ {\text {fs}}\$ would be expected to rise by a factor of about 6 for a temperature drop of 212K. What does that mean for stage gain and Miller pole location? To answer that, some consideration has to be given the driver or interface between the diff amp and output amp. Interface looks like a common gate stage fed directly from the diff amp. That means it has a high output impedance (\$R_{\text{mid}}\$) and some voltage gain, but current in the interface can't be any higher than that of the diff amp (~1uA). Roughly, interface transconductance (\$g_ {\text {mid}}\$) would be less than ~1uA/V, and \$R_{\text{mid}}\$ would be greater than ~10MOhms. (Note, these limits were used as starting values in the model and were iterated to tune slew rate. Final values were .4uA/V and 60MOhms, which were pretty close to the SPICE rough equivalents.) \$R_{\text{mid}}\$ would be a synthetic or active resistor. DC Gain of the interface circuit combined with output amp would be:  

\$A_{\text{vo}}\$ ~ -\$g_ {\text {mid}}\$ \$R_{\text{mid}}\$ \$g_ {\text {fs}}\$ \$R_L\$  

with the Miller pole at:  

\$F_m\$ ~ \$\frac{1}{2 \pi  C_f g_{\text{fs}} R_L R_{\text{mid}}}\$ Hz  

Which means that at 88K \$A_{\text{vo}}\$ increases by a factor of 6 or 15dB, and \$F_m\$ would decrease by a factor of 6 or ~ 2.6 octaves.  

Parting Shots  

The analysis highlighted two things that were pretty interesting, although maybe they should have been obvious.  


Gain lost in the diff amp was slightly more than made up for by increased gain in the output amp at frequencies below \$F_m\$, but overall gain bandwidth was still reduced by ~2 octaves by recession of \$F_m\$.  
Slew Rate takes a double hit.  Gain lost in the diff amp stage reduced slew rate to 1/3 of the specified amount. Increase in \$g_ {\text {fs}}\$ in the output amp reduced slew rate to 4/7 of that specified. These effects cascade,  slew rate at 88K ended up being 5.3V/mSec.  


Edit about COTS:  

This is really comic. While searching Analog Devices website for something unrelated, ran across this press release about COTS. Here is a quotation: "There is reason to believe that ADI commercial and industrial grade parts are being recommended by
third parties for use in military and space applications that exceed their data sheet parameters." So, looks like ADI is on to NASA.