How to test Ethernet PHY's MDI interface through JTAG Boundary scan
As for a 100BASE-TX PHY you can use an approach like this:



You need to physically loop the MDI at the RJ45 jack and then generate test patterns on TX path to the PHY TX path internal logic (i.e. digital and analog logic circuits), receive patterns at RX path---writing and reading the appropriate boundary scan cells (BSC) correspondingly---and compare them (patterns).

In 1000BASE-T case, you need a compatible link partner organizing the remote loop. 

Also, the MDI circuits are analog (@Paebbels is right in full here), differential, and they reach out the RJ45 jack pins not direct but thru a transformer with a center frequency of about 30-35 MHz which are unreachable to be generated from JTAG boundary scan even as digital waveforms.

IMO, upgrading the firmware is simpler than using the boundary scan there.

If you need to test a switch IC with integrated PHYs, you need an external test pattern generator/receiver/comparator with internal loopbacks in each tested PHY path. I see no place for and/or advantage of JTAG BS there too.