2-time constant (On + decay) timer circuit
It looks like I found a solution highly dependent on the device parameters.


Low leakage parts are the critical factor.
Take careful selection of Ids @ Vt and Vgs

Two inversions are done:   The 1st must have a gate threshold of &lt;&lt; 1/3 to 1/2 of Vbat and not 2 to 4V. This is what causes decay on the 1st time constant.


hi-side mechanical switch,
low-side Nch   (inv)    
hi-side Pch    (inv)   


The critical factors in the selection of both FETS are:


the IDSS leakage current must be extremely low at Vgs near 0V. 


Carefully select with Drain Resistor to result in a voltage drop less the next gate threshold. 

the threshold Vt or Vgs(th) @ Ids is critical because this acts as the voltage comparator for the 1st stage and the gradient declining LED intensity for the 2nd.
Both have long time constants so capacitor leakage resistance at Vcap needs to be estimated for the ambient temp. Film caps are best but are low Dk large parts.