xilinx FPGA difference between bitgen and prom compression?
It seems like PROM compression is intended for FPGAs that do not support bitstream compression.  

When PROM compression is used, the bitstream will be decompressed in the PROM before being sent to the FPGA.  In this case, the PROM does the 'heavy lifting' of decompressing the bitstream, and it takes the same amount of time to shift out the compressed bitstream as it would for an uncompressed bitstream.  You're also restricted to using Xilinx configuration PROMs that support decompression.  Encrypted bitstreams cannot be compressed with PROM compression as encryption will scramble any parts that could have been compressed.  

When bitstream compression is used, the bitstream will be decompressed at the FPGA.  In this case, the PROM operates normally, and the FPGA does the 'heavy lifting' of decompressing the bitstream, and you do get a load time advantage as fewer bits get transferred over the relatively slow serial link from the PROM.  In this case, you can use any configuration flash chip as you don't need the specialized decompression functionality.  I believe bitstream compression can also be used on encrypted bitstreams as the compression can be applied before encryption, though this will definitely be device-dependent (seems to be supported on Virtex 6 and 7 series, but not on Spartan 6).  

The thing to note is that so long as you don't use PROM compression, the PROM can't tell the difference between a compressed bitstream and a normal bitstream, so you don't need to follow any of the design guidelines specifically for PROM compression.  

tl;dr: only use PROM compression if the FPGA does not support bitstream compression; bitstream compression at the FPGA is a more flexible and more powerful option.