What does "open drain when programmed for the wait function" mean (in micro controller spec language)?
Read this small piece of article from Wikipedia about what open drain is and why it has right to exist. Programmed means that there's some internal register in the chip which you can write with, let's say, 0 or 1 - and in one state output will have logic 0 or logic 1, at another state of this config register it will have this open drain output, which is very useful to connect to another outputs for logical ANDing of the signals, eliminating usage of a number of AND gates in order to get output signal which is AND function of all input signals. Note that regular logic outputs can not be connected together, open drain/open collector can.

In this particular case, machine based on Z80 chipset may have several sources of wait signals - for example DMA, video processor, machine core core logic - and you just connect all these open drain outputs together, connect pull-up resistor to the resulting line, and have AND function of everything connected. If any of signals goes low (or all go low), resulting signal will be low. In terms of current flow, if open drain/open collector output is deactivated (to be simple - output transistor is turned off) there's minimal current flowing through it. If it is active, then current is flowing through pull-up resistor and collector-emitter junction, and this current is limited by this pull-up resistor.

Look at the page 110 of the manual, for Write register 1 diagram. It seems this Z8440 specification does not detail how its programming works exactly, I am afraid you will have to read whole Z80 family manual to find it out, or find out another type of document which would focus on application/programming rather than circuit design and chip internals.