Whose power reduction is better. Clock gating or Data enable?
The answer is that it depends on how much logic is shut down when you disable the clock, data or chip-select pins. Or when you throttle back the clock rate.
For a given design, one of these will have the most effect on power consumption. Due to the massive amount of logic in a CPU, it makes sense to throttle back power by disabling un-needed clocks. In so-called sleep modes, various clocks slow down and bus drivers may shut down. Unused devices will be shut down. For battery powered devices, every power management trick is used to save power.
Outside of a CPU, clocks tend to be point-of-use so little power is saved by disabling a clock. Instead, power is saved by disabling data flow using chip selects and gating the data itself or by slowing the data rate.
Slowing the clock rate also saves power and cuts down on heat, which saves power used for cooling. My Dell 690 workstation idles at 2.16 GHz but when busy, the CPU (8 cores) goes to 3.18 GHz briefly.
Today, most anything with a CPU or advanced MPU has various power saving modes, whether it runs on batteries or not. It is not a case of which power-saving option is better, but how many can be used at the same time, if the hardware allows it.