LVDS-SPI bridge, asic or FPGA, and what FPGA
It seems you are planning to bridge from a high speed interface (LVDS) to a low speed interface (SPI), which will not work without some compromise.
LVDS is used for high speed data interfaces, usually to transfer several hundred Mbps (Megabits per second) or more.
SPI is a rather slow interface, usually providing a data rate of at most a couple of Mbps.

If a reduced frame rate is acceptable you could use an FPGA to buffer a single frame which was received over the LVDS interface. The MCU can then read the frame over SPI at a much slower speed. After the frame was collected by the MCU the FPGA will buffer the next frame and so on. Of course a lot of frames will be lost while the MCU is reading the captured frame from the buffer. Note that this only works if the frames contain raw image date, i.e. not encoded yet.