Small Signal Voltage Gain - Analog Multiplier Analysis
Small Signal voltage gain from input to output at 400kHz (no LO)
  


It will be \$\frac{1}{2}\frac{Z_L}{R_{E1}}\$


  
  Small Signal voltage gain from LO to output at 400kHz (no signal at input)
  


It will be \$\frac{Z_L }{ 2 {r_{e_{ac}}}}\$ where \$r_{e_{ac}}=\frac{0.026} {I_{CQ_1}}=\frac{V_T}{I_{CQ_1}}=\frac{k_BTq}{I_{CQ_1}}\$ where \$k_B\$ is Boltzmann constant, \$T\$ is the absolute temperature and \$q\$ is the elementary charge

Thank you Damien for the readability edit. Thank you Andy for the upvote.

How did I come to this answer? 

By inspection. 

Back in university, delighted by
my new skills in small-signal modeling, I realized the gain of a common emitter stage could be well approximated by Rc/Re_unbypassed IF reac &lt;&lt; Re, and IF the Early Voltage were high and Rload (AC and DC) was >> Rc. ohhh And if the input resistance of the stage is very high compared to the signal's source resistance. And if impedances of parasitic capacitances are similarly negligible.

Clearly this circuit has undefined reac (we don't know the Icollector), and we don't know the transistor's Early Voltage,  and we have infinite Rload. And Rsignal_source is zero, being driven from a SPICE source. Thus I simply defined reac == 0, and defined Vearly == infinite,and the gain must be exactly Rc/Re.

Note for 10pF  base_collector_junction capacitance at 1GHz, Zc = -j159 ohms, thus Zc(1MHz) is -j159,000 ohms and that is ignored because we have no stated values for any components nor for device parameters, thus we have no way to estimate collector timeconstants/bandwidth, thus we ignore any energy shunting between collector and base (this works both ways, irritatingly; Miller Effect could be a big deal, but for that SPICE signal source).

Except Q2 and Q3 are exactly splitting the output current of  Q1. Thus the 50% factor. 

Except the DC voltage drop across Rlo (even 10 milliVolts is a big deal) will be a big error. And we don't know the Vearly of Q3. And a 3rd biasing resistor is needed in that left-side bias--divider chain, to place those 2 bases down a volt or 2 volts from the +12.

As I said --- by inspection. You drew this circuit in standard configuration, making "inspection" very easy. (Am now beginning my 7th decade of circuit and system thinking)