Can we not simply connect a battery to a RAM to prevent data loss during power cuts?
Short answer: You might be able to "connect a battery to a RAM to prevent data loss during power outage", but this depends on the type of RAM.

SRAM (Static Random Access Memory) is not DRAM, explained below. SRAMs are found in many electronic devices such as a modern (home) thermostat (uses a battery to retain the settings if the power goes out) and in an alarm clock (battery keeps the time and can power unit for a short period), etc. Hard drives typically have some SRAM in them masquerading as "32MB of disk cache." Specialized SRAM is even present inside the CPU, as it's blazing-fast L1, L2, and L3 cache memory. 

Lithium "coin cell" primary (non-rechargeable) batteries are commonly used for SRAM retention. Modern SRAMs can have lower working voltages, such as 1.8 V, requiring more circuitry to back with a 3.0 V battery. The supply current is very small (even nano-amps) so data can be retained for a long time from a small battery. Many industrial machines (robots, variable-frequency drives, programmable logic controllers, etc.) employ a SRAM backup battery to retain critical data through (frequent) power cycles.

The acronym SRAM means "Static Random Acccess Memory." Static, because its contents stay whatever state they were programmed, indefinitely, but only as long as power is applied. SRAM is very fast but bulky physically and is relatively expensive, so only finds niche roles even today. SRAM and DRAM are volatile types, meaning that their contents are lost if power is lost. 

EEPROM (Electrically-Erasable Programmable Read-Only Memory) is an old, non-volatile digital storage medium, meaning data persists after power-off. These were originally "programmed" or "fused" at the bit-level, but modern ones are somewhat faster and can handle data in blocks. These are still much slower than SRAM or DRAM. Due to this extreme slowness, limited capacity, and a limited write/erase capability, they only find use in roles such as parameter storage and tiny programs for microcontrollers, etc. It is infeasible to backup main system memory to EEPROM due to the large amount of time involved.

FLASH memory, commonly seen as a USB Flash Drive and in SSD Hard Drives, is another non-volatile storage medium. It too is much slower than other types of RAM, and has a finite write limit, so is not used for main memory. A SSD hard drive is nothing more than a whole bunch of these, all used in parallel, to increase speed and capacity.

DRAM (Dynamic Random Access Memory) is a different beast altogether. "Dynamic" because it is always changing, and the contents will change (be lost) without intervention. DRAM is relatively dense (capacity-wise) and inexpensive, so is used for computer main system memory. Unfortunately it is also slower* than SRAM and needs to be "refreshed" continuously, else its contents are lost within a short time depending on temperature. Normal operation of the PC's memory controller keeps the data in DRAM refreshed continuously so that it is always available. If power is turned off, the memory controller still needs to refresh the data while running on backup battery power. Laptops, for example, do this when suspending to RAM. Because this refresh is an active process, it draws more current, and thus the battery is typically much larger than a coin cell. If the battery is depleted, then the DRAM contents are lost and the machine is forced to cold-boot.

A promising new technology is FeRAM. (Ferro-Electric RAM) is quite fast, non-volatile, and has a high endurance. It is new technology, so is quite expensive and capacity is limited, so has very limited roles. 

*Aside: to get around the slowness of DRAM, a PC uses these massively in parallel. First, a whole stick is accessed at once (8x speed since there are 8 chips on it), then if the motherboard supports dual-banking, two modules at once (2x8 = 16x), triple-banking = 24x, etc. This is how a module marked "PC3-10666" can possibly perform like one chip running at 10,666MHz.  From a 666MHz bus: 666*2 (DDR means two transfers per clock) * 8 chips/module = 10,666.