PCB Trace Layout to Minimize Inductance
Why does widening the above trace minimize inductance?


The total inductance is a function of the self inductances of the traces (one of them being a plane in your example) and the mutual inductance between them.   

To further minimize the total inductance, the mutual inductance should be maximized. This is due to the current flowing in opposite directions, resulting in opposing magnetic fields.
Mutual inductance can be increased by decreasing the distance between the traces (reducing the loop area) and by increasing the width. I believe this has to do with how the magnetic field is distributed around the trace, but this comes down to a physics question.