How to keep/save minimum Vds value of a FET in Analog Design?
In the past I have designed similar circuits, and I have made an envelope detector that was used to identify the minimum voltage.  You can do this with a positive reference and a diode, like demodulating AM, or you can just use a RC circuit to GND; however, this approach is dependent heavily on the time constants, and frequency of the input signal.  For the sake of simulation, you'd take a unity gain buffer from you "input" signal from Vds and then attach it to a RC network to identify the floor, and then feed that network into Vds_min.  

On the academic side, here are a few auto zeroing structures out there.  If you want a good mathematical analysis, I would suggest looking up "Autozeroing Floating-Gate Amplifier".