Saturation in differential pair
Maybe 'saturation' is not the proper description of what happens. By increasing the values of Rc eventually you will starve the transistors of any useful current, such that Vo1 and Vo2 can no longer rise above -Vee volts (or not by any useful amount). In fact they would approach -Vee the closer to 'saturation' they get. Lowering Vcc simply compounds the problem by reducing the source voltage to work with. In this case 'saturation' does not mean an overload of the transistors as much as it is about robbing them of the current they need to work properly. Like having a kink in your garden hose chokes off the water coming out of the hose, and adjusting the nosel does not give you more water until the kink is removed. Though no values are given, it is assumed that if Vcc is at full voltage and Rc and Rtail at at usable values then Vo1 and Vo2 should be able to swing at least 1/2 of the supply voltage from Vcc to -Vee, or be close to zero volts under 'idle' conditions. This would make the statement "Assume the collector resistors are small enough that the transistors do not operate in saturation if Vi1 ≤ VCC and Vi2 ≤ VCC" hold true.