Strange behaviour while simulating switching loss
I suspect the current spike is caused by parasitic capacitances inside the FET. Consider the simplified circuit below:-







simulate this circuit &ndash; Schematic created using CircuitLab

C1/R1 and C2/R2 are the FET's Gate-Source and Gate-Drain capacitance and series resistance. I don't model the rest of the FET because we are only interested in the period before it turns on.  

When Vin is 0V, C2 charges to 1.805V and then draws no current, so D1 just consumes the 30uA coming from the current generator. 

When Vin transitions to 1.8V, voltage on the Drain side of C2 also rises by 1.8V. It then discharges through R2 into D1, causing a current spike that is positive relative to the diode and negative relative to the Drain.