How do I make a 4-bit comparator?
In the architectures I've looked at, the addition/subtraction operation usually sets some bits in a FLAGS or STATUS register, indicating certain conditions of the result. For example, there's often a flag bit indicating the result of the last operation was zero, or the result of the last operation was less than zero.

Notice these two flags are easilly generated with a single wide-fan-in NOR gate, and by simply checking the sign bit of the result, respectively.

The comparison operation is typically done by executing a subtraction, and throwing away the result, just leaving the FLAGS registe affected by the operation.