Where is the benefit in SQI parallel interface over SPI? Parallel vs. serial
SQI is not supported by hardware...


Your premise, while correct for your particular MCU, is flawed in the general case. The MCUs that you have been looking at may not have SQI (which I believe is the same as Quad SPI or QSPI), there are many devices with hardware support for QSPI. (Note that "QSPI" is a confusing acronym because it is sometimes also used for "Queued SPI", which is different.)

For example: Many ARM MCUs (for example, STM32 and Atmel SAM) have a hardware peripheral that can do x1, x2, or x4 SPI and some execute from QSPI storage in addition to using such peripherals for data storage.

Most FPGAs support configuration over master serial (SPI) in x1, x2, or x4 widths. Some can even use dual QSPI flash chips for a full eight bits per clock. See the Xilinx 7 series configuration UG, ctrl-F "quad".

In these applications, the QSPI is not bit-bung, and is therefore four times faster. For your specific microcontroller (and many small 8-bit MCUs), you are correct and you will be better off with a regular x1 SPI flash. With many many microcontrollers, applications processors, and FPGAs, there is hardware support for x4 SPI and it is far faster.