Dynamically configure FPGA from the ARM core?
Looks like there is a path but you should read the docs to be sure.  From the Xilinx docs 


  The PL can be configured and reconfigured by PS software in secure or non-secure mode. The PCAP path is the most commonly deployed method as it does not require that the PL be pre-programmed with a bitstream. The PL can also be configured by the TAP controller on the JTAG chain in non-secure mode. Multiplexing of the datapath is done in the PL configuration module using the devc.CTRL [PCAP_MODE] and [PCAP_PR] bits. Also refer to section 6.5 Reference Section.