What is the difference between words and symbols in Qsys, how to know which one to use?
A symbol is the smallest unit of addressable memory. You need to be able to specify how many bits are in your symbol, but it is usually 8. 

If the number of bits per symbol differs between master and slave, logic is required to convert the slave to match the master. For example how could a slave with a 9-bit symbol be accessed by a master with an 8-bit symbol.

I've previously built very simple Qsys blocks that do nothing but pass through signals to trick Qsys into allowing dissimilar modules to connect. But this requires knowing the side effects and making sure they are what you intend.

A word is the size of your memory bus. Frequently the memory bus is larger than a symbol. For example, take:


Symbol Size: 8-bit
Word Size: 32-bit


This would be so for a typical 32-bit processor. You have 8 bits per symbol, and 4 symbols per word. Essentially number of bits per symbol sets your primary data size, and number of symbols selects your data bus width.

Then say you have the following symbol addresses:


0x0000
0x0020
0x0024


These correspond to word addresses of:


0x0000
0x0008
0x0009


If you are using word addressing, you would typically have an additional byte enable signal which is used to address one or more symbols in a word as the smallest unit you could otherwise access is a whole word.

Word addressing means that if you had an address width on your slave of 1-bit, then you can address two words, which in the example above is 8 bytes worth. You can use the byte enable to address individual bytes. Of course there is no requirement to support byte enables in which case each access is implied to be an entire word.

Symbol addressing would mean you would need a 3-bit address to access each symbol individually. You would have no byte enable signal as the address alone is enough.

Which you use depends on how you designed your logic. Typically word addressing is most useful. Otherwise you can only access a single byte at a time on your wider data bus which reduces the point of having said wide bus. Word addressing allows you to access the slave at its full width.

Address span is usually shown in Qsys in units of symbols regardless of whether you are using word addressing or symbol addressing. Basically the maximum span of your interface is:


(symbols per word) × 2(address width)