What causes saturation in a Bipolar Junction Transistor
Note that above graph is wrong, and there is no such phenomenon.  The above diagram shows the set of curves for an FET, but with labeling for BJT.  For BJTs there is no ohmic or 'variable resistor' region at low Vce as shown above.  Google Images finds many, many websites with this mistake.  (There are even a few sites swinging the other way, depicting curves for a BJT but labeled as FETs!)

Instead ask your question about the actual characteristic curves of a BJT: 



So, why does collector current go to zero when collector voltage is zero?   (Heh, you already should know that one.)

Better question: why is there a knee in the curve?  It's because everything stops when the net internal e-fields are gone; when Vce=0.

Also, at the left edge, why doesn't the VI curve at Vce=0 drop straight down, why is it instead tilted like a resistor curve?  Because it's a resistor curve, the bulk silicon isn't a superconductor.  (A more idealized model would use zero-ohm silicon, and wouldn't have any tilted ramp at saturation, just a vertical drop at the Y-axis where Vce hits zero volts.)


  when no current is flowing through the transistor, is there the presence of depletion layer?


Yes, a junction maintains a significant depletion layer at zero current.  Until the forward junction voltage approaches ~0.7V (for silicon at 300K,) a PN junction remains turned off, with large depletion region and low average conductivity.

PS  

Websites are one thing, but I wonder if any current textbook$$ feature this wrong BJT diagram?

And just for future reference, below is a good diagram for FETs, showing the gate-controlled channel-resistivity effect seen below pinchoff (at low drain voltage:)  Also: your original question does apply to FETS, where there really is an odd threshold effect.  Your question could also be stated as "what does 'pinch-off' mean?"