Calculating required delay before pin value is recognized in 8051
The far more productive approach to this, because the R and C values for every board and design are different, is to observe the waveforms on an oscilloscope. You should be able to measure the port pin going high relative to the XTAL2 pin to infer the relationship between the program instruction flow and the pin state change.

It can also be informative to have a program test made up that just toggles the port pin high and low and then compare that to the XTAL2 to see if there is a difference between the two transitions. 

If you do not have access to an oscilloscope you should get one. When working in embedded electronics it is an almost essential tool. 

Lastly let me comment that the delay needed for your ACK could just be as simple as just trying out one NOP. The internal dynamic pullup FET that improves the output rise time has a fairly low impedance and will charge the external capacitance in the few tens of picofarads very quickly. If I recall correctly the speed up FET is only kept in for one clock cycle (maybe 2).