How to find Input capacitance and output resistance of a CMOS circuit with spice
The input capacitance will vary, perhaps greatly, as the input voltage slews between the rails.

Similarly the output resistance, though not greatly (maybe 2:1), as the input voltage slews between the rails.

By measuring the input (transient) current during slewing, you can compute the Cin. 

Note the heavy Cload will slow the output and thus reduce the charge demanded across the FETs C_gate_drain, thus artificially lowering the Cin.

Foe Rout, remove the Cload and Rload, run a input transient at risetime of your chosing, while driving the output with 100 uA sinusoid current source.