Compact Voltage-Controlled Current Source Array
Load is resistor in range of 100-600 ohm
Max current 30mA

-&gt; Max output voltage 3-18V, max power dissipated in load resistor is 0.5W
I'd use a schematic like this, per channel. Two variants.

VDAC is one output channel of a 8 or 16 channel SPI DAC, say between 0V and 3.3V.
On the left schematic, the opamp is simply wired as a voltage follower to replicate input voltage on R2. The opamp output drives the load directly. It shouldn't be a problem to pick an opamp capable of 30mA output current, but it will get hot which may cause input offset voltage drift. If that's a problem, the right variant of the schematic adds a simple BJT to drive the load and keep the opamp cool. Pretty much any BJT will drive 30mA, but it should be fast and low capacitance since it'll be in the opamp feedback loop. A cheap 2N3904 or SMD equivalent will work just fine.
Since there are many channels I went for a simple schematic so the DAC output voltage is used directly. Not scaling it down with a resistor divider also minimizes offset.
C1-R3-R4 would not be necessary if the load resistor R1 was on the circuit board next to the opamp. However there will be wires which add capacitance and inductance and could make the opamp unstable.
If both pins of the load resistor are not available, then you'll need a schematic like this:

In this case all resistors are referenced to the positive supply voltage. Note this is a random schematic from the internet, so all component values are wrong.
The opamp is again a follower, and the current setting resistor (1 ohm in the schematic) should be 100-150 ohms like above. Note this means the G-S capacitance of the FET, which usually adds phase lag and makes the opamp unstable, is in series with this resistor which means it probably won't upset the opamp at all. So you could get away with not populating the 100pF cap, or using a lower value cap, which means better settling time. However, if there is enough inductance in the drain of the FET due to wiring, it may oscillate all by itself. In this case you'll need to put a snubber on the PCB in parallel with the load, like a few hudreds of pF in series with a few tens of ohms. This will also slow down settling time.
You don't need a rail to rail input opamp, but its input common mode does need to include ground. Output should also go near 0V, or 0.6V if you add the transistor. Opamp selection parameters that matter here are supply voltage range, offset, offset drift, settling time, and output current if you don't use the transistor. Since settling time depends on Gain-Bandwidth product, it shouldn't be below a few MHz, but no need to pick a 100MHz opamp that will be more expensive and sensitive to layout.
With 3.3V input this gives 22mA in R2. Set R2 value for proper current range according to maximum DAC output voltage.
At 30mA, with a DAC output voltage of 3.3V, R2 will dissipate 100mW.
Dissipation in Q1 or the opamp could be a problem. If all resistors are the same value, then power supply voltage should be say, 2V above the sum of voltages on R1+R2. For example with R1=600 ohms and 30mA, that would be 23-24V. Calculating the max power dissipation in the opamp/transistor:
Vin   Load    Max Pd
24V   600R    0.3W
24V   100R    0.7W
 9V   100R    0.3W

So it's up to you if you want to use a variable power supply voltage or not. If all the load resistors are the same value, and this is a lab setting, just use a bench power supply.
Also up to you if you want to dissipate the heat in the opamps or in the transistors. At max 0.3W per channel, we're on the high side for dual SO8 opamps, and &quot;very crispy&quot; for quad opamps unless you use a package with a power pad soldered to a ground plane. At 0.7W per channel, no way.
Transistors are easier to cool and probably a cheaper solution than an opamp that can dissipate that power. You can either use a VCC power plane and SOT89/SOT223 or whatever transistors that have a good heat transfer through the collector tab (ie, not SOT23), or just use TO92 transistors. Since you said you want it small, and the 64 channels could dissipate up to 25 watts total, there will be a fan blowing air on it anyway, which means TO92 BJTs will have no problems with 0.3-0.7 watts. Without a fan they would overheat, but with airflow, they'll be fine. Plus that will save you the trouble of mounting a heat sink. If you use SMD transistors then your power plane will get hot and you'll need airflow on the board too.
Choosing the FET should be quite simple too. Current is low, so no need for a high capacitance, low RdsON FET. A low capacitance FET will be better suited, with RdsON of several ohms (note there is pretty much an inverse relationship between RdsON and capacitance). The drain is not connected to a copper plane though, so it will be harder to cool. You'll either have to use a package large enough to dissipate the heat, like TO92 or SO-8, or dedicate enough copper to heat sink the drain that a smaller package won't save any space anyway. In TO92 something like 2N7000 should work fine. There should be plenty of choice in SO8 too. If you have the time to do the thermal calculations then you can consider a smaller package. But a forest of TO92s with a fan blowing on it is a good approximation of heat sink fins...
Note a 24V power supply will blow the FET gates if the load is removed because the max Vgs is 20V. Adding a voltage clamping circuit to each channel would add too many parts, whereas using a lower VCC for the opamps (which don't need 24V anyway) only takes one linear regulator for the whole board. You could also use a FET with a higher max Vgs.
Note this power calculation pretty much eliminated the &quot;current DAC&quot; option since a that would dissipate too much power for the typical packages these chips come in. Also I couldn't find any on digikey.
I'd build a 8-16 channel board with 1-2 DACs and opamps, then stack the boards for more channels, put a fan on the end of the stack and blow air through.
DAC choice: you need to work on your requirements especially number of bits, sampling rate, and settling time.
Communication choice: I2C is out due to speed, so that leaves SPI. The DAC chip will choose for you. It'll probably be SPI.
Note you can have one micro per 16 channel board, or one micro for the whole set of boards, or a micro with several SPI ports driving several boards, etc. This all depends on how much throughput you want.
EDIT:
An important feature of a follower is you don't need precision resistors to set gain. The gain of each channel will be identical. Offset will vary of course, but that's one less calibration to make.
If you use a DAC with a 5V output span (like the LTC2668) adjust the current setting resistor and supply voltage accordingly. The current setting resistor will dissipate more power, so size it accordingly. It has one pin directly in the ground plane, so &gt;2 thermal vias should keep it cool.
Depending on your offset requirements, you may want to calibrate out the offset or not. I don't think this will matter. In fact the 16 bit DAC is probably overkill, and there's a cheaper 12 bit version...