FPGA; reconfigure from SPI flash
This question has been stuck in the back of my head for a while and I just stumbled across the answer in the Virtex 6 configuration guide and then cross-referenced it to the Spartan 6 configuration guide.  See the IPROG reconfiguration section in UG380 on page 128.  This page includes the sequence of words to write to the ICAP_SPARTAN6 interface to emulate a PROGRAM_B assert from user logic.  This is designed for re-starting configuration with a different base address if you have multiple FPGA images stored in the same flash chip.  I will reproduce the sequence here for posterity:


send sync word
program GENERAL1,2 and GENERAL3,4 registers with new bitstream address + flash read opcode and 'golden' bitstream address + flash opcode.  
send IPROG command


It may be possible to skip step 2 and just send the sync word and IPROG command to use the default values for the start addresses.  

Byte sequence:

FFFF dummy word
AA99 sync word
5566 sync word
3261 write GENERAL1
XXXX start address [15:0]
3281 write GENERAL2
XXXX opcode and address [23:16]
32A1 write GENERAL3
XXXX start address [15:0]
32C1 write GENERAL4
XXXX opcode and address [23:16]
30A1 write CMD
000E IPROG
2000 NOP


You might be able to get away with:

FFFF dummy word
AA99 sync word
5566 sync word
30A1 write CM
000E IPROG
2000 NOP