Having trouble with deriving the state diagram for an exam problem
A1, A2 and A3 are shift register outputs (made of 3 D-flip flop) for simplicity.
A is your input sequence at IO1, X is your f(A)=seq.101=A1*!A2*A3.
table gives all states at every clock rise signal. Key D closed A=1; open A=0.
Clock key space close then open to get rise slope.
hope this is useful.