How to calculate the feedack resistor in this configuration
This assumes Rs =~0 and if not then must be specified. All R's may be scaled up x10 and use 0.1%






simulate this circuit &ndash; Schematic created using CircuitLab

Rev A: Zin= 1M input //27pF ( LT1113)







simulate this circuit

The advantage of using 3.3V if that is your ADc Vref is that offsets track 3.3V tolerance error, so no trimmers are needed unless you specify budget &lt; R tolerance stackup.