How NOR gate turns two zero inputs into one as output?
When two low voltage as zero digital signal turn into a high voltage
one, where's the energy coming from?

It's coming from the power supply. A practical gate will have a power supply.
Here is the schematic of a CD4001B buffered NOR gate.

When the output is high, the p-channel MOSFET at the output is 'on', so current can flow from Vdd to the output pin.
Here (even simpler) is the old unbuffered version (all four gates) so only 4 transistors each. Photo from McMOS Databook First Edition:

(and, yes, there are some shorts in there!) Pretty bad schematic, in fact.