DC-DC regulator what is and when to use FPWM variant
From datasheet page 14:

In a synchronous buck converter operating in continuous mode (FPWM), inductor current follows a sawtooth waveform (graph on the right). This happens at high output current. However at low output current the lower parts of inductor current will become negative, as current flows back and forth between input and output. This ensures low output voltage ripple because the converter is running constantly, controlling the output. It also keeps frequency constant, which can be an advantage if you want to choose a known constant switching frequency that won't inject noise in a sensitive analog component nearby. However it decreases light load efficiency.
At low load, discontinuous mode offers much better efficiency (graph on the left). The top FET turns on, inductor current ramps up, then the top FET turns off and the bottom FET turns on, inductor current ramps down, then the bottom FET turns off. Then the chip goes to sleep, saving energy, until it needs to pump another current pulse into the output. This results in higher output voltage ripple, and variable load-dependent switching frequency. This mode is usually called DCM, pulse skipping, burst mode, etc.
Note in a non-synchronous buck, the bottom FET is actually a diode, so it can't operate in continuous/FPWM mode because the diode prevents inductor current from going negative.