JK Flip-Flop Counter: How to reset a counter?
You are doing a ripple counter with synchronous logic. Adding a reset doesn't really work very well. I assume you want to do a synchronous reset, an asynchronous reset with regular J-Ks (i.e. without asynch inputs) is a mess.
You really want a synchronous counter, it's way easier to design and doesn't suffer from the timing issues of a ripple counter. Also it's the form you'll normally do logic these days.
Just do a better state transition table and rebuild your combinatorial network.
For example, a 2 bit counter would usually be
State CNT_EN    Next State
  0      H        1
  1      H        2
  2      H        3
  3      H        0
  x      L        x

This is a bare 2 bit counter with enable: if the enable is true the counter advances. Two flops for building it. If the counter will be counting for every clock cycle the enable can be omitted.
The same counter with synchronous reset would be:
State CNT_EN Reset   Next State
  0      H     L       1
  1      H     L       2
  2      H     L       3
  3      H     L       0
  x      L     L       x
  x      x     H       0

In this way when the reset input is asserted a transition is forced to state 0. Also notice, no more states are needed, it's only a more complex combinatorial network