Why can't I make flip-flops in logic simulators?
Because from this page, the style that you show only works if the width of the clock pulse is tuned to be long enough for the output stage to react, yet short enough for the thing to not oscillate.  A logic simulator that doesn't model propagation time may not be able to cope.
To simulate your circuit, you'd need a circuit simulator that 'understands' propagation delay, or you'd need to simulate your circuit at the transistor level.
That same page shows this circuit for a fully synchronous J-Kflip-flop (just connect J &amp; K together for a T f-f):

You may want to try that in your simulator, see what happens.