Biasing of the opamp differential pair
From what I see in your schematic, all the BIAS VOLTAGES are magically provided by external MAGIC bias generation (a stack of FETs).
The upper 4 FETs are a pullup current, subtracting from the diffpair current.
The residual, after subtraction, descends into the voltage_gain section below.
Regarding the bottom left 4 FETs: these are externally biased; the upper two are cascade shields, to stiffen the current sources FETs below, improving common mode rejection.