How was the Zero Flag implemented on Z80 ALU?
I have got a response from Mr Shirriff himself that not only answers my question but also gives more details on the rest of the flag circuitry.

That's a good question. The zero flag is generated in the ALU by NOR of all 8 bits: the 4 bits that were just generated by the ALU, and the 4 bits that are latched in the ALU from the previous half-operation.
Carry on the other hand is much more complicated. The 4-bit operation generates the half carry, which is latched. There's a bunch of logic to handle addition vs subtraction, shifts, etc. Then the next 4-bit operation generates the fully carry.
Parity is generated by exclusive-or of the first 4 bits. That result is then fed into the exclusive or of the next 4 bits to generate the final parity.
Ken