NRST pin of unpowered STLINK V2
The GPIO information you're looking for is in the reference manual. Here's the structure of a regular, non-5V-tolerant† GPIO pin on the STM32F103 series (used in the STLink/V2-1 on Nucleo boards):



Note that the top protection diode shunts voltages above the microcontroller's VDD into the supply rail to protect the IO pin. When the microcontroller is unpowered, that means that the IO pin might inadvertently sink current through the protection diode to power the microcontroller.

This parasitic power draw may be enough to overcome the internal/external pullup resistors on NRST and hold your main microcontroller in reset.

Unfortunately, without changing the design of the debug hardware, I don't see a good way to prevent NRST from being pulled to ground without disconnecting it. You might be able to find a series resistor value that allows normal reset operation (pulled to ground through the NMOS of the IO pin) while limiting the voltage drop when the debugger is powered down (pulled to ground through the protection diode).

Equivalent circuit for normal operation:






simulate this circuit &ndash; Schematic created using CircuitLab

Equivalent circuit for unpowered operation:







simulate this circuit


  †: Not all GPIO pins are designed this way - if you review Figure 14 on the same page, you'll see that the top protection diode for 5V tolerant pins feeds into a separate 5V rail that does not necessarily backpower the microcontroller.