Best way to read an image on FPGA?
The answer, as usual, is &quot;it depends&quot;.
Your main obstacle is memory size. FPGA block ram tends to be on the order of a few hundred kilobytes to tens of megabytes in the high end chips, and it's organized differently, as hundreds of small patches rather than one big chunk.
So an algorithm that operates on a big area would synthesize to a single copy of that algorithm, an address decoder that takes the upper bits and decides which patch of RAM to address, and lots of interconnects. At runtime, most of the chip would be idle, with a small part running with a slow clock, because the interconnects are rather long. You can optimize a bit by adding pipelines and designing your algorithm to operate on tiles (which is doable for edge detection, although difficult on tile boundaries), but in general memory size will still be too little.
A sensible FPGA based design would probably use external DDR memory, but we are in the midrange segment there already.
VGA output is not a big deal, you just need a set of DACs and a tunable clock source to generate the pixel clock (the FPGA onboard PLLs are usually not flexible enough). For HDMI, you just need differential outputs that are fast enough (mid-range segment again) and a clock source, so that is even less effort.
Generally, you wouldn't use the block ram initialization formats to load image data, these are used in FPGA initialization only. Instead, you'd leave the block ram uninitialized during load and implement a small state machine that can be used to transfer data in. To get data from a camera that would probably be a MIPI interface.
One thing you can probably do is stream the image processing. For edge detection, you mostly need to compare adjacent pixels, which you get basically for free horizontally as the pixels are transferred right after another, and with a small buffer holding a few lines for vertical and diagonal tests.