How are oscillator circuits characterized in a lab after their manufacture?
Define Design Specs  for operating environment then performance specs.

e.g. Frequency Stability Error, Power Consumption, Gain Margin 
For RF : add Phase Noise, Jitter

Stability: includes benign frequency error in [ppm] and dynamic error [ppm] vs Temp 'C vs Vdd %


e.g. CMOS runs faster cold and with higher Vdd, it has more gain and lower capacitance, so it tends to run faster on AT-cut Xtals at cold temps and slower at high temp but depends on 3rd order AT characteristic and Temp. Range.


Gain Margin is well-defined on web for Pierce Oscillators by attenuating the feedback with a series R.  Single stage inverters have at least Aol=10 and buffered then Ao=1000 min.  

A measurement of the Logic inverter gain might look like this.







simulate this circuit &ndash; Schematic created using CircuitLab

Record the test schematic and test results in a one page consice table of results with simple quick graphs, is desired.

Indicate your Desired specs: Results : then Pass/Fail

Electrical Item :     Parameter Limit : Test Results   : Final

1 page per major test in a DVT is the most professional way to report it.  All DVT's are based on Design Specs.

If you look up XTAL and DVT and get Meth. and Deep Vein Thrombosis, then look harder with more  keywords.  ;)