CMOS Inverter Equal Rise and Fall Times
Model level 3 definition: "Semi-empirical" - a more qualitative model that uses observed operation to define its equations.  This dates from 1980 ...  Any sort of decent result (i.e. within 10% of reality) would need to use level 5 models (AKA BSIM3).  I'd recommend using BSIM 3V3 which is model level 49 in Star-HSPice parlance.

As long as you going to be using out of date models then you should heed your prof and only look at the trends.  I suspect that there probably is a reason he said that.

You're dealing with curve fitted results.

Additionally, unless you have parasitic extraction enabled the rail capacitances as you noted are almost certainly not being extracted.  The CJSW means Capacitance, Junction Side Wall and is a computed values based upon the width and S/D sizes (as one example).  There are excellent SPICE guides that tell you what all the parameters are, I suggest you find and read them.