MAX32660 rev A2 subsecond count
I just noticed that A2 has its own errata sheet. There is specific text about the subsecond register:

Software reads of the RTSS register will always return RTSS[31:28] =
0000b. This only affects software reads, and software writes to those
bits correctly. Hardware updates the full 32-bit counter correctly and
the RTC alarm functions operate correctly. (ME11-161)

It's saying that 4 bits are lost, which is essentially what I'm observing. Although the text doesn't really make sense, since RTSS is not a 32-bit register, but an 8-bit field of RTC SSEC. So I'm not sure what RTSS[31:28] means. SSEC[31:8] is supposed to be 0/reserved, as I observe on A1 and A2. What's happening is actually that SSEC[3:0] is showing up in SSEC[7:4].
However, the fact that the errata calls out the specific register that I'm seeing the issue with, and that this shows up only on the A2 errata and silicon, but not A1 errata or silicon, makes it seem likely that my issue is related to this erratum.
Maybe there was a game of telephone? &quot;Hey, Frank, when you're updating that errata sheet, can you note that the upper 4 bits of RTSS are read as zero&quot;. &quot;Sure, Bob. How many bits is that register? Frank, which one, hunh? I'm on the phone. Oh what, registers, they're 32 bits. Bob, OK, I'll update the errata sheet. Thanks&quot;
Now What?
So, we only get the lower 8 bits of the 4096Hz counter. Here's an algorithm we could use to infer RTC to subsecond accuracy:

on entering full power state, wait for the next second count, and immediately record cycle counter value and 8-bit 4096Hz value (which will be 0 initially). Extend the 4096Hz value to 44 bits by prepending the second count. I.e., {seconds, 12'0}
at later times, again record the cycle counter value and the 8-bit 4096Hz value. Use the last cycle counter delta to infer a 44-bit 4096Hz value. Round this to the nearest 44-bit value matching the recently recorded 8-bit 4096Hz value. The rounded value is accurate if the inter-clock drift since the last measurement is &lt;30ms.

The 1s wakeup time is unfortunate. Hopefully Maxim aspires to fix the issue one day, perhaps by allowing people to purchase A1 chips. A2 does not fix the biggest issue with A1 (namely, broken UART rx) and seems to introduce at least 2 bugs in RTC (subsecond count, and trim).