RFID Tags quality control
I have never tested cards but I have designed BERT testers for 2 way traffic.  In this case the message error rate or transaction error rate margin for any card and reader is what you want. But to define margin, you must know the specs. This includes the errors for Xtal carrier frequency , data clock f error, and bit jitter in each direction for biphase enc/decoder.
1st you must have good specs for an error margin and the range for f (ppm) distance in each direction.
My approach would be test and measure:
1). amplitude path loss margin with switchable losses in each direction
2) frequency error &amp; margin
3) Bit shift margin by injecting random jitter in each direction using PRSG controlled delay taps for early, nominal and late by some tester to measure phase margin
4) go/no go test with injected jitter and attenuation final test
The PRSG pseudo random sequence generator uses a linear XOR sum feedback from a shift register to create a random pattern using the binary data converted to a random tertiary value -1,0,+1 times some delay time in us which is a percentage of the ideal 25% margin of a simple biphase decoder.