MOSFET Vgs Electrical OverStress
TI's AHC/AHCT Designer's Guide cursorily describes what happens when you overstress a MOSFET's gate (in this case, the input transistor of a logic device):


  Input voltages greater than 7 V must be avoided to preclude damage to the gate oxide of the input stage. This damage is not
  necessarily permanent, but will adversely affect the expected lifetime of the circuit. The gate oxide of AHC devices is only
  200 Å thick. An input voltage of 7 V corresponds to a field strength over the gate oxide of 350 kV/cm. Although breakdown
  of the oxide is expected only at input voltages above 10 V, electrons tunnel increasingly into the gate oxide at field strengths
  greater than 350 kV/cm, influencing characteristics of the transistors and causing failure.


So as long as you do not reach the breakdown voltage, the primary failure mechanism is electromigration, and using PWM will delay (but not prevent) failures.

But if you reach the breakdown voltage, time does not matter. And the datasheet will not tell you where the actual breakdown voltage is, or the statistical distribution of this value. (In the example above, the breakdown voltage might be 43 % above the rated voltage.)