SPI consumes more power than I2C?
First I want to consider I2C vs SPI in general terms.

I2C requires pull-up resistors to create the 3.3V or 5V idle state. When any device (either clock or data) pulls that line low, it will effectively put the pull-up resistor between VCC and GND. Depending on the value of pull-up you will see a much larger current draw than uA's.

E.g. 3.3V bus with 3.3k pull-ups is a 1mA current draw.

However it's not that simple: the clock won't be low for 100% of the time. Maybe 10% on a reasonably busy bus. In that case the RMS current is amplitude * sqrt(duty) [RMS formula for a pulse train] -> 1mA * sqrt(0.1) = 0.316mA.
Also take into consideration there are 2 I2C lines.
And worst of all; if you may be using a "lazy I2C software implementation"; watch out for bus collisions. E.g. a I2C slave that wants to use clock stretching, while the I2C master uses push-pull GPIO's to drive the bus.

SPI is much simpler because often there are no pull-ups. The only power consumption it has is dynamic consumption from switching transistors and I/O lines.

If you do use SPI with pull-ups you will also see a (slight) increase in power consumption. However also note that a SPI has different SPI modes, and may idle at a logic low level. In that case the pull-up will continuously consume extra current.

In your case, as we don't have a schematic on exactly which SDO pin you're pulling low, you are maybe pulling the I2C SDA pin low with the pull-ups still in place?