How can I minimize the variance in voltage drop across transistors - or eliminate transistors from this design?
No, I don't think you are looking at this correctly at all. If your 5V is stable then there is nothing wrong with your method using fixed resistors and no transistors. The problem is that each ADC input on your MCU has a different error voltage. Check out the dc offset error potential in the data sheet. Here is a typical example from maxim covering the offset error on ADCs and DACs: -



Around 0V, the error could be +/-50mV. In a perfect system, a 1 ohm resistor fed from 5V via a 150 ohm resistor produces a voltage of 33mV - you got a digital value of 27 and, assuming your ADC is 10-bit then 27 represents 132 mV - how do you rationalize this? Forgive me if it isn't a 10-bit ADC but, if it were 12 bits then 27 represents 32.9mV (possibly coincidentally of course) but 47 represents 57mV!!! Assuming they are all 1 ohm resistors and accurately matched (or you used the same resistor on a different channel) you have to conclude you are witnessing ADC offset error in action.