Why does an opamp buffer output voltage with no input?
An opamp in a circuit according to your schematic (with nothing connecetd to IN+) will drift to the input voltage point where its input bias current crosses the zero axis.
Example from the OPA145 datasheet:

It crosses the zero at pretty much mid supply, but other amps are different and would bias differently, or even not at all (go to rails).
e.g. for your TL072 it looks like it would not bias at all:

But when practically building circuits with pA input bias current, there will be also leakage on your board, which will move the datasheet curve around slightly. All the leakage current into/out of the V_in node taken together has to sum up to zero, to keep its potential steady. The opamp input bias current is one contribution, but other contributions could be leakage through esd diodes, through capacitors and even board surface creepage to nearby metal parts at different potential. Therefore, the self-bias point in a real circuit is often unpredictable. If you get the same value in a simulation and real circuit from a JFET input opamp, I would guess it is coincidence.