NIC connection with PHY issue
I think you will need to simplify the problem a bit by testing.

Try implementing something like this sequence of test cases:

1/
NIC.A --- cat5 --- 88e1116   --- XIL (loopback in xilinx verilog)

If this fails, then use xilinx PCS layer loopback

What is the connection type from phy to xil, is it RGMII ?

2/
XIL.A -- ADFE.A -- tp --- ADFE.B --- XIL.B
introduce a known pattern to XIL.A and check for that on XIL.B

can you elaborate a bit on the loopback testing done since there should be many many places to apply a loopback in this system