Logic-Level Converter: How high is the power consumption?
The power consumption is easy to estimate: P=U²/R. As it stands currently, R3 will burn 1.1mW and R4 2.5mW. The MOSFET consumption can be neglected.

But this will be consumed only when the logic level is low. If the logic level is high, this circuit consumes virtually no power at all.

Therefore, you must also consider the logic level duty cycle of the lines. And if, as I suspect, this is used to translate I2C bus lines (which standby at logic level high), this simply depends on the length of the frames and the rate at which you send them. If you send one frame every other second, you can probably just ignore the power consumption of this altogether. If you keep sending frames continuously (which is bad), you may consider 50% duty cycle (divide the power by two).

So the main power consumption factor here is not the resistor value but the amount of communication needed between both devices. I would therefore really try to reduce it as much as I can, eventually even by modifying the protocol if possible.

Now, if everything has been done at this level and you still need to reduce power consumption, you can indeed use higher value resistors. But the highest value you can use depend on the kind of bus (which you didn't specify) and the devices specifications. If it is an I2C bus, you can use this application note from TI to size the resistor (but if it is something else, the information given there will still be useful).