Relation between Voltage & frequency in DVS
DVS is dynamic voltage scaling.  Increasing the voltage allows the internal capacitances of the wires and transistors to be charged up above the transistor threshold voltages more quickly, allowing the device to operate at a higher frequency.  However, dynamic power consumption in CMOS is proportional to frequency times voltage squared, so you get a 'triple whammy' increase in power consumption.  

In DDR2/3/4, the bus is a different animal than the components on the chip.  The data bus is subject to different limitations outside the chip because it is physically much larger.  The spec is designed to use lower voltages for lower power consumption as well as faster transitions.  This is done at design time and the supply voltage and threshold voltages are changed.  In DVS, the threshold voltage is NOT changed, as it cannot be changed without changing the circuit, transistor doping, transistor body biasing, etc.  Since the PCB traces between the RAM chips and the CPU act like transmission lines as opposed to RC limited lines, the performance characteristics are completely different.  The RC time constant does not apply to these traces, so raising the supply voltage does not have the same effect.  Instead, output driver slew rate and supply current are more important.  With a smaller swing, the line can be driven faster and with less power.  On the receive side, amplifiers are required to properly receive the data.  

A DDR2/3/4 RAM array can certainly be overclocked with DVS just like any other chip, so long as enough cooling is provided to deal with the extra power dissipation.  However, the interface circuitry may or may not work properly at the higher frequency, even if the supply voltage is increased.

TL;DR: in DVS, the voltage is changed on a fixed CMOS chip.  In DDR2/3/4, the bus is designed to operate at a lower voltage and it is not RC limited like on-chip components.  They cannot really be directly compared.