Avoid glitch in a FF circuit
First rule of FPGAs: If your output cannot tolerate glitches, never, ever drive the output directly from combinatorial logic. Always use synchronous signals - that is, direct from a flip-flop. The problem is that the logic input signals are not guaranteed to have equal propagation delays from the sources, due to different routing paths.

So take your glitchy XOR output and run it through a D FF, just like Tony M suggests. For safety's sake, do it for both of them.