Constant value required for VHDL array indexing?
The problem is here:

another_signal(to_integer(delta) downto 1)


Slices with runtime-variable bounds are not supported by synthesis. How would this translate into real hardware?

You could achieve a similar function using a loop within a process:

process (delta, another_signal)
  variable or_result : std_logic;
begin
  or_result := '0';
  for i in 1 to another_signal'left loop
    if (i &lt;= to_integer(delta)) then
      or_result := or_result or another_signal(i);
    end if;
  end loop;
  aux_signal &lt;= or_result;
end process;


If you can't use a process, and the size of another_signal is fixed, you could write something like:

aux_signal &lt;= another_signal(1) when delta = 1 else
              or_reduce(another_signal(2 downto 1) when delta = 2 else
              or_reduce(another_signal(3 downto 1) when delta = 3 else
              or_reduce(another_signal(4 downto 1) when delta = 4 else
              '0';


I would strongly encourage you to use processes, even for asynchronous logic.