How to verify a VHDL I2C master?
You need to start by determining exactly what it is you want to "verify".

Obviously, I2C is a simple protocol, and writing a monitor that verifies that the protocol is not being violated (including timing measurements, if desired1) is a relatively straightforward matter.

But anything beyond that &mdash; including whether the master is accessing the correct addresses, writing the correct data, responding correctly to the data it reads and handling any exceptions that occur &mdash; is all very much application-dependent, and generally requires a BFM for the specific slave device(s) in your system.

For example, I once needed to verify a system that included a soft-core CPU, in which I needed to allow it to execute the code that initialized a TI C1101 radio chip (through its SPI interface) in order to get to the message-processing code. I wrote a bare-bones ad-hoc BFM for the C1101 slave interface that implemented just enough functionality to accomplish that.



1 The VHDL function now (returning type time) gives the current simulation time. You can use this to directly measure the time between important events. For example, you keep one variable that gets set to now on every data edge, and when you get a clock edge, the difference between now and that variable is the setup time. A similar technique measures hold time. Here is some sample code relating to now.