Verilog code question
always@(Entry)
                begin
                Money = 6'b000000;
                    if (Entry)
                    Money = Money + 6'b000100;
                end


Whenever the Entry input changes, you set Money to 0, then maybe add 4. 
So Entry will always be either 0 or 4.

You might want to put the Money = 6'b0 line within an if (reset) or you might want to move it into an initial block or remove it altogeter, or whatever, depending what functionality you actually want.