STM32F4 - RCC reset register
The Peripheral Reset Registers should cause the peripheral's entire register set and internal state to be reset to power-on defaults.  This means not just the registers that are exposed to the user, but also any internal registers, counters, or flags should be set as they would be when the device is initially powered on.  However, this is not clearly specified in the datasheet or reference manual, which is unfortunate.  

Some of the peripheral descriptions in the datasheet reference things that happen when the peripheral reset is activated, and this gives some insight into how deep the peripheral reset goes.  Here's an example from the STM32F4xx reference manual:


  GPIO port configuration lock register (GPIOx_LCKR)
  (x = A..I/J/K)
  This register is used to lock the configuration of the port bits when a correct write sequence
  is applied to bit 16 (LCKK). The value of bits [15:0] is used to lock the configuration of the
  GPIO. During the write sequence, the value of LCKR[15:0] must not change. When the
  LOCK sequence has been applied on a port bit, the value of this port bit can no longer be
  modified until the next MCU or peripheral reset.


This makes it clear that the peripheral reset can accomplish things that the user program can't otherwise do.  

To your comment:


  as i understand ,you say that RCC unit, reset a peripheral to its default value by giving it some clock ?


Clocking a peripheral is what enables that peripheral to operate.  Peripherals generally all require a clock to drive their internal operations, and ensure synchronicity with the rest of the MCU.  This is entirely separate from the reset operation, even though the Reset and Clock Controller handles both functions.

It would be logical to assume that the peripheral reset activates the same circuitry that the power-on reset does, which would mean that the peripheral reset will be effective even if the peripheral's clock is disabled by the RCC, however, this is also not documented anywhere that I can find, and it is possible that some aspects of the reset behavior are synchronous, and won't work if the peripheral is not receiving a clock.