Which of these layouts for decoupling capacitors attached to an IC is wrong?
Given what you've shown, you want to use your first option - vias to the GND plane and no trace.

Problem with option 2 (right most) is the loop &amp; inductance formed by the trace between the cap and the GND pin of the IC. At high enough switching frequencies, this inductance can make it look like the cap isn't even there.

Might want to look over this question &amp; answers:

Does ground pour circumvent bypass capacitors?