VHDL iterate over a "list" of external names
Maybe you should look for the VHPI interface (VHDL Procedural Interface).

Testing frameworks like Cocotb use this standardized API to connect a simulator like QuestaSim/ModelSim, Riviera-PRO or ... to an external programming language like Python.

So the testbench is written in Python code and it connects via VHPI to the DUT. The stimuli is generated by Pathon code and the results are transferred back to Python for checking. VHPI has the ability to access every signal and of course iterate over every "node" in the design. It can also force/drive signals.

So you could compile your own VHPI tool or maybe extend Cocotb to access signal beneath the top-level. If I interpretate this right, Cocotb can already access deep signals: Quickstart:Accessing the Design

Related questions:


Can you interface a Modelsim testbench with an external stimuli