How to transfer blocks of data into FPGA to aid in testing?
Last time I did this, it was a while ago, I used a Cypress FX2LP USB micro. It has a FIFO interface which is very FPGA friendly, and on the USB side it uses bulk transfers.
No issues maxing out USB2 bulk bandwidth with python/libusb.
Pros: 480 Mbps is great if you need it, bulk USB does the error correction, and the chip is not difficult to use. python/libusb on the PC side is quite simple.
Cons: more complicated than UART, uses more pins than a simple serial or SPI connection. So if you have a FPGA already on a board, and you don't have enough available pins, then it won't work.
I hear FTDI also makes some user-friendly USB FIFO chips. They even sell ready-made cables that will do 30 Mbps SPI, so that could be a nice solution with a low pin count to interface with a SPI core in your FPGA.