Can CML differential signal lines be flipped to act as a NOT gate?
Yes, you are be able to simply reverse the inputs to invert the signal.

CML, like LVDS, uses symmetrical drivers for the P and N lines, which means there is electrically no difference between the lines.

In fact this is commonly done in PCIe which uses a CML variant. Routing can frequently be made easier by crossing the P and N lines of the data serial links. The protocol itself automatically corrects for the line inversion.



As a side note, contrary to you question, LVDS is also DC biased - typically to a common mode voltage of 1.2V.