Pulse transformer design by using PSIM
I don't know how PSIM models its ideal transformer, but I strongly suspect it's the so-called &quot;DC transformer&quot;. It sort of makes sense given their philosophy of simulating large scale circuits with block-level models. That means the &quot;trafo&quot; allows DC, and so the voltage in the &quot;primary&quot; is just what you see. It also means both capacitors and the diode are useless.
If, however, you have the possibility to add two coupled inductors (I don't have PSIM), then you will be able to see the effect, plus a helpful error and a minor bonus.
The error is about the frequency you've chosen for the pulse source and the values for the &quot;trafo&quot;: 10 kHz and 0.1 μH. The pulse transformer is modelled according to the energy that's needed to deliver on the secondary side, such that there is little droop. For this, it's useful to talk in terms of V⋅μs. Since the load is capacitive, the current is not constant, it will peak sharply in the beginning, then fall to zero (or close), so if the trafo were to be calculated based on the initial peak (say 1 A), its value would be (considering a 100 kHz, 0.9 max duty cycle) Von⋅Ton/Ipk = 15⋅9/1 = 135 μH. But this value will not be enough for the small currents, plus the two 100 nF caps will contribute with an unwanted resonance of around 61 kHz, which is close to the switching frequency. This is why, typically, pulse transformers are usually chosen to have a 0.5 ... 2 mH inductance. But the design process should still not be skipped, because there is a trade-off between how large the magnetizing inductance should be and the overshoot, since the trafo is not ideal so there is leaking.   Now consider that the values you've chosen are 10x lower switching frequency and 10x lower value for the magnetizing inductance.
The bonus is related to the load resistor: the larger the value, the worse the response, and the lower the value, to more droop (the pulse will not have a flat top, it will decay). A typical value for the output resistor is 1 ... 10 kΩ. That provides a minimum current load for the transformer, while not affecting the gate voltage. As a bonus, it can act as a discharge for the G-S capacitance.
However, leaving just the pulse trafo and the DC restorer is almost never enough, because the pulse gets distorted. Pulse conditioners are needed, and that is the purpose of R8, D3, and Q4 in your 1st picture. PSIM is good for simulations at block level, but where details are concerned, I suspect it's not the best choice; a SPICE simulator that deals with primitive elements is better suited (unless PSIM already does that). In case you have LTspice, I'll provide the source for a test schematic involving an ideal trafo vs. two linear inductances with imperfect coupling. You can modify the values of the elements to see the effects of various magnetizing inductances, DC blocking caps, source resistance (you'll it affects the damping), the load resistance, the DC restorer's diode (use a Shottky vs. 4148, for ex.), you can take it a step further and add a real MOSFET, or a nonlinear core (though given the large relative magnetizing inductance that's almost never a problem). Copy-paste and save as *.asc (not *.asc.txt!):
Version 4
SHEET 1 944 864
WIRE 48 112 0 112
WIRE 96 112 48 112
WIRE 208 112 160 112
WIRE 256 112 208 112
WIRE 416 112 400 112
WIRE 448 112 416 112
WIRE 576 112 512 112
WIRE 624 112 576 112
WIRE 672 112 624 112
WIRE 816 112 752 112
WIRE 864 112 816 112
WIRE 912 112 864 112
WIRE 0 160 0 112
WIRE 256 160 256 112
WIRE 400 160 400 112
WIRE 576 160 576 112
WIRE 816 160 816 112
WIRE 912 176 912 112
WIRE 0 272 0 240
WIRE 256 272 256 240
WIRE 400 272 400 240
WIRE 576 272 576 224
WIRE 816 272 816 240
WIRE 912 272 912 240
WIRE 48 432 0 432
WIRE 96 432 48 432
WIRE 208 432 160 432
WIRE 256 432 208 432
WIRE 352 432 256 432
WIRE 416 432 400 432
WIRE 448 432 416 432
WIRE 576 432 512 432
WIRE 624 432 576 432
WIRE 672 432 624 432
WIRE 0 480 0 432
WIRE 256 480 256 432
WIRE 400 480 400 432
WIRE 576 480 576 432
WIRE 672 480 672 432
WIRE 352 496 352 432
WIRE 0 592 0 560
WIRE 256 592 256 560
WIRE 400 592 400 560
WIRE 576 592 576 544
WIRE 672 592 672 560
FLAG 256 272 0
FLAG 400 272 0
FLAG 0 272 0
FLAG 816 272 0
FLAG 576 272 0
FLAG 48 112 a1
FLAG 208 112 a2
FLAG 416 112 a3
FLAG 624 112 a4
FLAG 256 592 0
FLAG 400 592 0
FLAG 0 592 0
FLAG 672 592 0
FLAG 576 592 0
FLAG 48 432 b1
FLAG 208 432 b2
FLAG 416 432 b3
FLAG 624 432 b4
FLAG 352 544 0
FLAG 912 272 0
FLAG 864 112 a5
SYMBOL voltage 0 144 R0
WINDOW 0 25 128 Left 2
WINDOW 3 -36 156 Left 2
WINDOW 123 -36 178 Left 2
SYMATTR InstName V1
SYMATTR Value pulse 0.2 14.8 0 0.1u 0.1u 3u 10u
SYMATTR Value2 Rser=1
SYMBOL cap 96 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C1
SYMATTR Value 100n
SYMBOL ind2 240 144 R0
SYMATTR InstName L1
SYMATTR Value {L}
SYMATTR Type ind
SYMBOL ind2 416 144 M0
SYMATTR InstName L2
SYMATTR Value {L}
SYMATTR Type ind
SYMBOL res 800 144 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL cap 448 128 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C2
SYMATTR Value 100n
SYMBOL diode 592 224 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL voltage 0 464 R0
WINDOW 0 25 128 Left 2
WINDOW 3 -36 156 Left 2
WINDOW 123 -36 178 Left 2
SYMATTR InstName V2
SYMATTR Value pulse 0.2 14.8 0 0.1u 0.1u 3u 10u
SYMATTR Value2 Rser=1
SYMBOL cap 96 448 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C3
SYMATTR Value 100n
SYMATTR SpiceLine Rpar=1g
SYMBOL res 656 464 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL cap 448 448 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName C4
SYMATTR Value 100n
SYMBOL diode 592 544 R180
WINDOW 0 24 64 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
SYMBOL e 400 464 R0
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL f 256 480 R0
SYMATTR InstName F1
SYMATTR Value E1 -1
SYMBOL cap 896 176 R0
SYMATTR InstName C5
SYMATTR Value 1n
SYMBOL res 656 128 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 10
TEXT 200 -48 Left 2 !.parma L=0.135m
TEXT 248 64 Left 2 !k12 L1 L2 0.99
TEXT 200 -88 Left 2 !.tran 1m
TEXT 200 -8 Left 2 !.step param L list 0.135m 1m