QUARTUS II: Error: Port "cg" does not exist in macro function "ADD0"
You have a mistake in fagp component declaration. In the entity you have follow port names sum, g, p : out std_logic, but when you declare the component in cla4 you use other names sum, cg, cp : out std_logic);.

So you need just fix the mistake and your code will work.

component fagp -- component declaration
port( 
    a, b, cin   : in std_logic;
    sum, g, p : out std_logic);
end component;


Or you can use another method without component declaration (to avoid errors in names or etc.):

ADD0: entity work.fagp
port map (a(0), b(0), carry(0), sum(0), cg(0), cp(0));