Simple way to generate a two-level pulse?
We don't really know what is after and what is before the circuit you request, so we can't simplify things as much as we want to. So I made assumptions:


I made the assumption the polarity of the input signal could be changed. So it accepts an input that is high-level (5V) when inactive, and 0V when active. If this is not possible, you can put an inverter before (eventually implemented with just a transistor and pullup).
I made the assumption that the output does not need to be buffered. So if the input impedance of the circuit after this one is significant, it will have an impact on tuning resistors, or you may even need to add a voltage follower. I don't know.
I made the assumption that you eventually want to be able to adjust the three parameters (high level, mid level, initial pulse timing) with potentiometers (you seem to talk about that in your question).
I made the assumption that the transition from high level to mid level does not need to be sharp.


Here is the circuit I thought about:


The output mid-level is set by the ratio of R1/R3 (here 2.5V).

The output high level is set by the ratio of (R1||R2)/R3 (here 4.5V).

The initial high-pulse timing is set by C1 and R5, but also depends on R2+R3 (here about 10ms).

Here is how it works


When inactive, the input is at 5V. in this case, neither Q1 nor Q2 conduct (we assume voltage across C1 is 0V initially). so the output is simply pulled down through R3.
When the input goes down, Q1 base is pulled down through R4, so it starts to conduct. Also, C1 is pulled down and, because it's a capacitor, the sharp transition of the input is transmitted to R5 (C1 acts as a wire at the beginning), which turns Q2 on.
So both transistors are now turned on (hopefully saturated). The output is therefore VCC * R3 / (R2 || R1 + R3).
Now, C1 actually begins charging through R5 (and indirectly, R2 and R3). The actual time constant actually depends on all resistors (even R1, I think) - I'm too lazy to compute it (anybody, feel free to edit my post). As C1 charges, the current through Q2 base diminishes (C1 starts acting as an open wire).
At some point, Q2 stops conducting, so the output voltage becomes VCC * R3 / (R1 + R3).
When the input goes back to high level, Q1 stop conducting, output voltage goes back to zero. Note that if Q2 was still conducting, it also stops immediately. Also note that we need to discharge immediately C1, otherwise, the next cycle will lack the initial high-level pulse. This is the purpose of D1.


Here is how a sample pulse looks like (high-level: 10ms, total length: 200ms):


To apply this to your solenoid application, I suggest actually removing R3 and putting directly the solenoid instead. Then choosing R2 and R1 depending on the solenoid resistance and the required voltage/current levels you need. Then set R5 depending of the requested timing (eventually adjusting C1 also). Make sure the transistors are well saturated (you may need to lower R4 and R5).

That's an 8-component solution (not counting R3). Simple. Cheap.

Pastebin of LTspice simulation: http://pastebin.com/qeTScYkZ