Inherent DC Bias in ADC sampling
They don't have an inherent offset...they simply have a range which is asymmetrical around zero.  Zero doesn't mean zero volts; what physical quantity each value refers to is a result of the hardware design.  The observation here isn't that ADCs have inherent offsets, or in fact anything about ADCs; the observation is that, if you choose two's complement representation, you have an even number of possible values for any number of bits; if one of those values is zero, you have an odd number of possible values remaining, and can't distribute them equally among positive and negative.

Sign-magnitude representation solves this, but introduces other special handling, and all you've really accomplished is you lost one potential output value.