Help understanding SR Flip-Flop
why does changing S to 0 result in Q switching to 1?


Sketch up the truth table for a single NAND gate. You will see that the output of the NAND gate goes high only when both inputs go low.  


  And why does switching S and R to 0 result in Q = 1 and Q-bar = 1?


This state of the S/R NAND latch is not allowed. According to the truth table of the single NAND gate, Q=1 and Q-bar=1 is the actual output of the circuit, but as the outputs shall be inverted to each other, this is not allowed. 

BTW: This has nothing to do with a SR-flip-flop. This circuit is called a latch instead, because it is an asynchronous circuit.