Voltage Level Translation: LCD(5V) -> GTL2000  MCU (3.3V)
You'd have to provide additional information about which LCD you're using. In general, though, what you are proposing will not work.

You can connect multiple open drain outputs together because open drain logic is essentially an OR of all the outputs. Each output only sets logic 0 or a don't care condition, so it's safe to connect multiple drivers together, and there is no contention. You cannot do this with a regular output (what the datasheet calls a totem pole output), because such an output asserts both logic 0 and logic 1. This means that there is scope for significant contention between the two sides. In your case, the circuit will simply not work, and likely cause a fair bit of damage. 

Parallel buses are very rarely open drain. Just because you can set an output as open drain does not mean that it will remain open drain if you enable a bus controlling peripheral like an SMC (Static Memory Controller) and/or DMA. I haven't used the LPC myself, but I'd be very careful with it. Generally, as long as you use it as a GPIO it'll honour the open drain setting. Once you enable a peripheral, then it depends on the peripheral's requirements. Usually, open drain isn't fast enough a high speed parallel bus, and therefore they aren't designed to handle open drain. 

The general way to handle voltage translation for such applications is to use high speed logic, and a combination of the WR/RD and CS pulses to set the direction of a more traditional level translating buffer like the SN74LVC1T45 and it's 2, 8, 16 bit variants. Given information about which lines need reversing and when, you can work out a scheme which does what you require.