Current and voltage direction in source-free RL and RC circuits
You can define the direction of a current however you want. In the first diagram, \$i_C\$ will be negative if the capacitor voltage is positive at the start.

Similarly, you can define the polarity of a voltage however you want. In the second diagram, to satisfy KVL, \$v_L\$ must equal \$-v_R\$.

The currents in the first diagram make sense when a voltage source is applied to the capacitor and resistor. As the capacitor charges up, \$i_C\$ and \$i_R\$ will both be positive. When the voltage source is removed, \$i_C\$ becomes negative as the capacitor discharges.

The second diagram make less sense. When a voltage (or current) source is applied, the positive ends of \$v_L\$ and \$v_R\$ will be away from ground. When the source is removed, \$v_L\$ goes negative to maintain the inductor current, which means \$v_R\$ must also be negative. So I think the inductor and resistor should be shown with the same polarity, and the current should probably go towards the top of the inductor. But again, it's arbitrary -- you can choose whatever polarities you want, as long as you're consistent. The only difference is the negative sign.

EDIT: In response to your comments, I think you're misunderstanding what's going on. Capacitors have a continuous voltage; inductors have a continuous current. When a capacitor is charged up and the source voltage is disconnected, the capacitor current reverses to try to maintain the voltage. When an inductor is "charged" up and the source current is disconnected, the inductor voltage reverses to try to maintain the current.

The equations are:

$$i_C = C \frac {dv_C}{dt}$$
$$v_L = L \frac {di_L}{dt}$$

When a capacitor and a resistor are connected in parallel, you can use KCL:

$$i_C = -i_R$$
$$C \frac {dv}{dt} = -\frac v R$$

Likewise, when an inductor and a resistor are connected in series, you can use KVL:

$$v_L = -v_R$$
$$L \frac {di}{dt} = -iR$$

Solving these equations give you the usual first-order exponential decay. The initial conditions are the capacitor voltage and inductor current at t=0.

Here's a schematic showing what happens at t=0 in the standard example for this kind of problem:







simulate this circuit &ndash; Schematic created using CircuitLab

Before t=0, the switches have been closed for a long time. At t=0, the switches open.