Why are NAND flash and NOR flash named using the terms NAND and NOR?
Because they're wired like a NAND or NOR gate. (See this question for classical CMOS NAND/NOR gates. Here the logic is just NMOS 'pull-down', not CMOS)



To read NAND flash, every transistor is switched on in the cell except the one being read. Because it's wired like a NAND gate, where if every signal is AND'ed you get a low, if you see a low on the bit line then you know the memory cell was set.