Theoretical gates vs real gates
The difference is mainly one of abstraction: digital gates are not simply on/off, they are really analog devices. The main abstraction, which you have alluded to, is that to a digital designer gates have no capacitance. This has two main consequences: gates switch immediately (no skew) and that you can drive an infinite number of gates with an output. As soon as you introduce capacitance at the gate, it takes a finite time for charge to accumulate and so there is a switching time and you can only connect to a small number of gates downstream (fan out) as you need current to charge the downstream capacitors.

This is true both internally to FPGAs/processors etc, and also to discrete gates. A full IC reduces the capacitance at the gates, and the distances, so can driven faster than a discrete circuit.

As mentioned in the comments, the time delay means there are scenarios in real circuits that you wouldn't see in a purely digital simulation. Meta-stability is one example, which occurs when signals do not meet setup and hold time requirements. 

You do not need a PhD or billions of dollars, but a few hundred thousand would get you on the start line for an older process, say 130 nm. Experience is needed to actually layout ("tape out") the chip, and you need to run simulations at gate level to determine switching voltages, time differences etc. The simulation tools alone are very, very expensive in terms of licensing cost and processing power required.