Suitable op-amp and voltage regulator for 16-bit ADC
The maximum non_permanent_warping of a strain gauge is 1%.
And the maximum Vout_differential of a strain_gauge, safely, is 1% of VREF.
(From what I recall reading).
Thus you should plan on using Gain=100 (40dB) in the INA.
Power Supply Rejection will be a big deal.
Establish an error or noise budget. Assume 10 microvolt Peak error.
Allocate 1/3 of that for the Power Supply intrusion. (or you pick your favorite numbers).
Have 1/3 of the budget for Power rail trash, ripple, hum, rectification transient ringing.
The INA821 has 80dB PSRR at Gain of 100, at 1KHz, RTI, for the -15 volt supply.
Thus you need a series RC filter (Local Battery) on the Minus Rail.
The RTI referred to input means the GAIN_OF_100 (40dB) will boost the -rail trash. Thus equivalent PSRR (referred to output, into the ADC) is only 40dB.
For 3uV total integrated trash, you need total integrated 1milliVolt on the Rail (assuming 80dB applies at all frequencies, which is wrong; 10KHz PSRR is only 60dB. Thus at 10,000Hz VDD trash, the equivalent PSRR is only 20dB.
That means the total integrated VDD trash (DC to 10,000Hz, assumed flat contribution; the lower decades get swamped out by the highest decade) must be 100 microVolts.
And total integrated, over 10,000Hz, tells us the budget per rtHz is 1MicroVolt.
Thus your chosen LDO, at 0.26uV/rtHz, shuld be fine.
But you need to examine the  60Hz ripple, and any harmonics thereof.