Interfacing to a Microprocessor Bus without an 8255
Normally it would be tempting to call this too broad since you haven't specified the details of the processor or bus, but let's assume you already have figured out a way to connect the 8255 to it, and have the signals generated by that circuitry available to re-use.

Basically, you can use A1 and A0 to control your multiplexor, and the combination of /CS and /RD (logic OR assuming active low input) to enable a tristate buffer like a 74xx244 to drive the output of the mux onto your bus.  You would not need to write to any register at all, just read from one of the four addresses where /CS is enabled and the A1:A0 select the bank of interest.

Alternatively you could use a 1-of-n decoder IC to decode the address lines and select a distinct tristate buffer for each bank of inputs, though that does mean adding the capacitance of four chips to the data bus rather than just one.  Using something like an 74xx138 could potentially fold in some of the decoding of the base address, too.

You might find looking up the implementation of the parallel printer port on the IBM PC interesting - it did not use an 8255 but rather something like this, though there was an 8255 elsewhere in the system.

Early PAL/GAL logic arrays can be a flexible way of implementing the address decode, while later CPLDs or even 5v-era FPGAs can do the whole job.