Hall Effect pulse multiplier circuit
PLL frequency multipliers work by using a frequency divider.

You have a clock, lets say at 1MHz.  You would like to multiply it by 8 to get an 8MHz clock.

You do it like this:


You have a voltage controlled oscillator (VCO) that runs somewhere around 8MHz.
You use a divider (some flip-flops) to divide the VCO output by 8.
You use the PLL to compare the original 1MHz clock with the output of the frequency divider.  
The PLL puts out a voltage proportional to the difference of the two clock signals.
The PLL output drives the oscillation frequency up or down until the original clock and the divider output are equal.
This is called "lock."  When locked, the VCO output frequency is exactly the clock frequency multiplied by the divider factor.  So, in our example, we start with 1MHz and divide the VCO output by 8 and end up with an 8MHz signal from the VCO.




The datasheet for the ancient 4046 gives an example of how all of this works.

The 4046 has a PLL and  VCO onboard.  You add your own dividers, and get a multiplied output signal.

Example circuit:



This multiplies a 1kHz signal by up to 999.  So, output frequency from 1kHz to 999kHz, in 1kHz steps.

Note that it is composed of three sections:


PLL
VCO
Frequency divider


If you have a PLL, then you have to implement a VCO and divider to get your multiplied clock.



Since your input signal comes from a hall effect sensor, a schmitt trigger to square up the edges is probably a good idea.  A 555 may not be needed.  There are ICs that are only schmitt triggers.