How to shift the register while using SIPO shift register?
Based on this and your previous question, it doesn't appear that you understand what a shift register is. In this context, people say "load" to mean put the data into the register. PISO (Parallel in - serial out) means that all bits are loaded at once, but are clocked out one at a time. Conversely, SIPO (serial in - parallel out) means that one bit is shifted in at a time, and all are available at the output after the load completes.

In your circuit, you are not shifting in any data. You are statically setting the outputs based on the NAND and NOT gates. The 555 timer as a clock is pointless (beyond shifting in your initial pattern). As it is, you cannot shift the output bits in any way. It is possible to do some sort of shenanigans with additional Parallel-in-serial-out registers and other logic gates, but that would be ridiculous.

The data-in line of your shift register needs to be coming from something that can dynamically set the logic level, not a constant logic level. It also needs to be timed to correlate with the output pulse frequency of your 555 timer based clock.