Dual slope ADC Problem
No, you are not correct.

The integration time and the clock rate of the counter are related such that a full-scale input (1.999V) gives 1999 counts. From this, you can infer that the clock speed is 2000 counts/300 ms = 6667 Hz (not the 2000 Hz that you seem to be assuming).

Therefore, a half-scale input will give half the count in the counter, or 1000 counts.

The only reason the integration time was given was so that you would realize that it incorporates only whole cycles of the AC frequency, and since the mean value of a sine wave is zero, it contributes nothing to the final reading.

Integration times that are multiples of 100 ms are commonly used in digital multimeters, because this gives good rejection of both 50 Hz and 60 Hz interference.