Verilog: Instantiation of lpm_dff failed. The design unit was not found
The Altera edition of ModelSim (including the free starter version) contains precompiled libraries for all of the Altera primitive IP cores (LPM cores, PLLs, RAMs, etc.). However in order to simulation with them you need to make sure you include the library that contains these parts.


For general cores, they are all in the altera_mf_ver library (for Verilog) or altera_mf library (VHDL versions). 
For device specific parts like PLLs you would use the library for your device as well (e.g. cyclonev_ver is the Verilog library for Cyclone V devices). 
For the LPM cores I believe they are in the lpm_ver library (for Verilog) or lpm library (for VHDL), but may also be in altera_mf_ver as well..


How to include the library will depend on how you are running the simulation. 


If you are running it using the GUI (Simulate -&gt; Start Simulation), simply select the required libraries in the Search Libraries (-L) box on the library tab of the start simulation screen.
If you are using command line, you can append the switch -L altera_mf_ver -L lpm_ver to the end of your vlog command.