Question about analog switch
1) when the capacitor is charged, there is no current flow, thus appears as high impedance

2) the assumption is that the capacitor is charging to be equal to the input voltage, thus there is no voltage across the FET, and with zero voltage across the FET the operation is certainly in TRIODE

3) when the capacitor is fully charged, the left and right ends of the FET channel are at the same potential;

4) yes, the input signal can be changing, but the capacitor voltage will be lagging behind because of the charging timeconstant; the resistance will be NOT be 1/gm if the FET is not in triode regions. As the input voltage moves up and down, the gate-channel voltage will change, and the 1/gm will change, thus the timeconstant will change.