Whats wrong with this design
Because R1 comes before R2, it is not a voltage divider. To the previous driving device, R1 is in parallel with the R2 - MOSFET line.

It is important also to remember that MOSFETs are voltage activated so once on or off there is basically no gate current. However the gate has a significant capacitance.

R1 is simply there to ensure the MOSFET gate has a discharge path should the previous driving device before it be disconnected. This happens with micros during reset and code failures.

R2 is there to limit the charge current on the gate when the previous device switches. Since the gate is a capacitive load, on switching, I tends towards a very large number. As such R2 is required to keep I below the previous devices Io max. R2 also provides the previous device with some isolation from the capacitive back spike created when the MOSFET switches. 

R2 along with the gate capacitance does however form an RC delay. As such keeping R2 as low as possible is prudent if you need to switch the MOSFET repeatedly at higher frequencies. Sometimes it is prudent to use a larger value for R2 to limit the rise or fall time of the MOSFET "output" as it switches.