How does a push pull CMOS output drive a pin LOW
Let's look at this using simple switches rather than semiconductors.



simulate this circuit &ndash; Schematic created using CircuitLab
Figure 1. Various options.

(a) Both switches are open. This is known as a tri-state output as it can be high, low or open. If OUT should not be undefined then a pull-up or pull-down resistor should be added.
(b) SW3 is closed so OUT is connected to V+ and is pulled high very strongly.
(c) SW6 is closed so OUT is connected to GND. Output is low.
(d) SW8 is closed pulling OUT low. R1 is bringing nothing to the party other than wasting energy when OUT is high.
(e) In this case there is no low-side switch so when SW9 is open R2 pulls OUT low and provides a defined logic level the the following stage.


For high drive, the TOP MOSFET is turned ON and drives the line high. But when driving Low, even if the bottom MOSFET is ON, there is no pull-up resistor on the line to make line go low?

A pull-up resistor, as the name suggests, pulls the line high. Adding a pull-up resistor would not help the line go low.

What if there's a pull-down resistor on the other side of the CMOS output? How will the microcontroller drive the push pull CMOS output to low?

See (d) or (e).