Clock Dividers with Clock Domain Crossing
Depends on your vendor

On most modern FPGA's of the two biggest vendors, your first assumption is correct and you won't need synchronization registers for the CDC if your clock divider is written correctly. The synthesis tools will take care of everything.

Synthesis tools by smaller vendors don't always take into account the known phase relationship between the clocks, which might mean you do need a proper CDC. From experience I can say that the old Libero tools for at least the older RTAX and ProASIC lines allow you to specify synchronous clocks, but the specification just gets ignored and proper CDCs need to be added at the RTL level.