How to build large demultiplexers using SystemVerilog?
module generic_demux #(parameter WIDTH = 1, 
                       parameter NUMBER = 2, 
                       localparam SELECT_W = $clog2(NUMBER)) 
 (input logic [SELECT_W-1:0] sel, 
  input logic [WIDTH-1:0] mux_in,                   
  output logic [WIDTH-1:0] out [NUMBER-1:0]);
  
  assign out[sel] = mux_in;
    
endmodule  

I used part select to select the right output to which the input has to be routed. The select line width is logarithm to the base 2 of the number of inputs. The select line width should be declared as localparam so that it won't be overridden.