PLL synchronized ADC sampling
Yes this is quite feasible and I remember doin this back in the 80s on one job because the processing power we had was not enough to create too many samples per cycle and, with an exact integer number of samples per cycle, you can avoid certain errors thus the calulation is quite precise. Here's a little picture showing what I mean: -



The pink trace is a pure sinewave and there are exactly 8 samples taken in one cycle of the sinusoid. If you take all the sample values and calculate RMS you get exactly 0.7071.

It's also worth pointing out that the samples don't need to be aligned with the sinewave's zero crossing. Should the samples have began a little late at 22.5 degrees, the accumulation of squared samples would be: -

0.1464 + 0.8536 + 0.8536 + + 0.1464 + 0.1464 + 0.8536 + 0.8536 + 0.1464 = 4

Dividing by # of samples gets 0.5 and taking the square root yields 0.7071 i.e. exactly the same.

Should your sampling have been asynchronous to the sinewave, there would have been an error on the first cycle of calculations that would eventually even-out over enough cycles but if you want to do this quickly, with minimal CPU overhead then using a PLL to "sync" sampling to the AC waveform works. 

Of course, if you take more samples per cycle the error reduces and, if you average over several cycles the error also reduces.

One extra word of warning about sampling - the harmonic distortion in your waveform can affect this calculation due to aliasing - as ever, you need to sample greater than twice the highest frequency in the waveform you are analysing.