How can I make a 1K X 16 ROM chip with eight 256 X 8 ROM chips with an enable input and a decoder?
"What are the 8's with slashes through them?"


It shows that the interconnect is a 8-bit wide bus.


  "And can someone explain the bottom part - the D(7:0) and D(15:8)?"


What the figure shows is 1K \$\times\$ 16 ROM. The data width is 16 bits. D(7:0) is the lower 8-bits of the 16-bit data line and D(15:8) is the higher 8-bit. So if you read the value at a particular address, the lower byte will be available at D(7:0) and higher byte at D(15:8).


  "Assuming this is correct .."


Yes the answer given in the figure looks perfect to me.