How to test a crystal resonator in board?
As I see, no answer was accepted. Let me offer another answer.

Most modern ICs use so-called Pierce Oscillator to generate stable clocks using crystals. Here is the main circuit configuration:



As one can see, the circuit is not symmetrical: the right side is output of some driver (usually designated as XO), and the left side is input to an inverting amplifier (usually designated as XI). Therefore it is relatively safe to probe the XO (output) end, provided that the probe has a relatively high impedance. An usual 1:10 passive probe with 1M input impedance should do the job. In practice, the output driver in circuit amplifier is made intentionally weak, typically no more than 1mA load capability, to prevent Xtal from being overddriven, but 1mA should be well enough to drive a 1M scope probe. 

The probe tip capacitance may shift the frequency of oscillation by 20-50ppm, since it will change the circuit tune-up (Xtal load, C1 in series with C2). However, the probe load on XO should not break oscillations, unless the entire circuit is too marginal and does not meet the stability criteria (negative impedance of amplifier should be 3-5 times more than Xtal ESR). If the probe does this, consider the Xtal test as fail.

One should never try to probe the XI input, maybe only with a 100 MOhm probe, and only for curioucity. The reason is not in the tip capacitance (2-8-12pF or wahtever), but in inflicting a DC shift on XI pin due to finite probe impedance. The Pierce oscillator is a very delicate non-linear circuit, and it has a very important DC feedback component R1, which effectively adjusts the input DC level to the point of maximum amplification, usually about half way from ground to Vcc. The component R1 is usually 1MOhm and above, and the oscillations become centered at self-selected DC point. Attaching even a 10MOhm probe shifs this point down, amplification drops, and oscillations die.

And, of course, the best way to test for oscillations is not to touch it with probes, but to have an internal buffer with output to some otherGPIO test pin.