AND gate with a single input in a diagram
AND gate with one input simply means that all inputs are shorted together. If the AND gate has two inputs then it will function according to above truth table (only the yellow squared one inputs are eligible).

Moreover, buffers are generally (inverting) NOT gates, so two back to back NOT gates will give a non-inverting buffer. NOT sign before the input simply means the signal is being inverted before fed to the non-inverting buffer. Logically it is same as inverting buffer. It might have been done so for propagation delay matching, I am not so sure.