SPI signal integrity issue
I worked on sensor-head (4 channel IR camera, CMOS mux under the IndiumPhosphide laminated sensor) that absolutely would not cooperate with the control-signal-emitting FPGA until I snipped all the digital interface wires (approx. 12 of them) and inserted 1Kohm resistors to greatly slow the edges of the timing signals and thus avoid undershoot (to -5 volts) and overshoot (to +10v) on the 0v/5v interface.

In diagnosing, before inserting the 1Kohm series Rs, I looked using a realtime TEK7904 (500MHz scope, no sampling done) and P6201 (900 MHz probe at 1pF when X10 head was slipped on), I saw these horrid overshoots with 500 picosecond edges running 4" across 1 PCB, another 4" across the 2nd PCB and then
running thru a 1" connector and down into the liquid nitrogen dewar.

We thus has 4+4" embedded inside PCB, with effective length of 8" (scaled by sqrt(Er)) thus 4+4 becomes 8+8, with return path making 16+16") plus connector and dewar.

Your SPI is only 3 wires. Explore where, exactly, the reflections/overshoots are best dampened.