What tool produces this type of layout?
The "blob" in the picture is a depiction of an ASIC physical layout created by a place-and-route algorithm. These algorithms often use randomized simulating annealing methods to place logic within a grid. These methods don't inherently favor a rectilinear layout; they often create layouts with an organic, cloud-like appearance. Similar algorithms are used for FPGA design as well.

These sorts of layouts are not uncommon in larger modern digital designs, like microcontrollers or SoCs. A few examples can be seen in die shots, including:


This ATTiny4 on Zeptobars. Manually laid-out blocks can be seen in the top left and bottom, probably for analog functionality and flash memory.
This PIC24, also on Zeptobars. Similarly, there are a couple more regular regions which probably contain flash memory, SRAM, and/or analog components.
The Apple A12 Bionic SoC on Anandtech. Interestingly, this layout is composed of many different regions of automated layout, with regular rectangular blocks of what is probably SRAM positioned throughout the die.