Gain Resolution after delta-sigma (ΔΣ) analog-to-digital converter (ADC)
If I read your question correctly you can decimate after your ADC and get resolution gains (as you can do with any ADC). For each additional bit of resolution to be gained, you decimate/average 4 samples so, 23.7k divided by 4 gets a decimated rate of 5.925k and the resolution increases from 19.5 bits to 20.5 bits.

Decimate by 4 again and you get a sample rate of 1.48125k and a resolution of 21.5 bits. The extra half bit of resolution can come from decimating by a further 2:1.

Here is an Atmel document that explains it and I hope I haven't misunderstood your question.