Some LTspice questions. Decoupling capacitor doesn't effectively block DC. Pull up resistor voltage doesn't drop to logic low level
I'm completely puzzled by the voltage levels measured at those specific nodes near the Rectifier circuit. Also, I don't understand why the C2 capacitor doesn't completely block the 44VDC.


V3 is a 0V source in DC simulation, so it provides a path for currents or voltages from one side of C2 to get through to the other.

You could put another capacitor in series with V3 to avoid this.