Spartan-6 FPGA Input voltage
The data is indicated in Table 2 which specifies the recommended operating conditions:


Table 2, page 3 of datasheet.

According to this, \$V_{in}\$ is specified as an absolute value of up to ~\$4\mathrm{V}\$ relative to ground for all I/O Standards expect PCI. If you are using any I/O standard other than PCI, then this means indeed regardless of your \$V_{CCO}\$ voltage, you can feed in a signal of \$4\mathrm{V}\$. Feeding in a \$2.7\mathrm{V}\$ signal should cause you no problems at all.

The reason for singling out PCI is there are clamping diodes mandated by the PCI specification which are enabled internally when you select the PCI I/O standard. For other I/O standards (like 1.8V CMOS, LVDS, etc.) these clamping diodes are not enabled.

This is further confirmed in Table 9:


Table 2, page 3 of datasheet.

Note the \$V_{max}\$ rating for \$V_{IH}\$. This tells you the maximum input-high voltage for each I/O standard being used. Here we see \$4.1\mathrm{V}\$ for all standards except PCI. That is actually the same value as in the "Absolute Maximum" table, so it is best to stick to the \$4.0\mathrm{V}\$ limit specified in the "Recommended Operating Conditions" table.