Why would IO pins be tied to VCC or GND with 0 Ohm resistor on FPGA Dev Board?
There are different packages for the FPGA.  Different packages with different options.

On the 144 pin EP2C8 version of the Altera Cyclone II EP2C5T144C8 Dev Board, pins 26 and 81 are VCCINT and pins 27 and 80 are GND.  

The \$ 0\Omega\$ resistors allow different parts to share the same development board.



EP2C8 &amp; EP2C8A Device Pin-Out

EP2C5T144 Board Diagram