Top layer vs mid layer for high speed ADC signal routing
A good design will attempt to place the signals on the top layer thus minimizing paraisitc resistance inductance and capacitance, especially if it's a high speed SAR ADC like the LTC2508 or variants of the same core.
Why?
Because each of the vias add 5 to 10nH of inductance, which can be a big problem for high frequency signals in the 10's MHz range.
Secondly, if you are running and ADC in the +50MHz range then odds are the ADC will have a matched input and the design will need a transmission line with a controlled impedance. Creating transmission lines that continually switch layers creates problems with matching, keeping them on the top layer eliminates the need for calculating matching with vias and makes the overall design simpler.
The last thing is switching layers also adds the opportunity for cross talk for adjacent signals (so don't run signals across planes or other traces unless you want a few pF's or more of cross capacitance between traces).
If the idea is to shield the signal, then do it with an RF shield over the ADC and the trace.
Look at the EVAL board for the ADC, almost all of them have the traces on the top layer and they are a matched transmission line.