Confusion about S-R and J-K FF
The two circuits shown are not flip-flops. They are gated-latches. Flip-flops are always edge triggered. The web is full of mistakes as related to flip-flops.

The truth tables are correct for the circuits you have shown, except for the very last state for the "J-K" circuit.

The very concept of a J-K gated-latch like the one shown is flawed. When "Clk", "J" and "K" are active, that circuit is unstable. The outputs are not predictable in that state.