Multiple baud rate slaves to a single I2C Master
It's fine so long as you only run the bus as fast as the slowest device on the bus. So in your case, it would work so long as you always run the bus at 50 kbit/sec, even when addressing a part that is capable of running faster.  If you try to run a bus at, say, 400 kbit/sec with a device only rated to 50 kbit/sec on it, it is possible that the device may misinterpret some part of the data as a start bit and then cause trouble with the transmission.  Basically, you have three choices: run the bus slow, segment the bus with multiple I2C controllers or an I2C mux, or swap out the slow devices for faster ones.  

Note that this is less of a problem with SPI devices as SPI uses an explicit chip select line for each device.  In this case, it is possible for an SPI bus to run faster than the slowest device, so long as the selected device can handle the speed.