How exactly does this shift-register work? - Fairchild 74HC589
If I understand your question correctly, it is important to understand that the device works in a couple separate stages.


The parallel inputs. These have latches that must be signaled to read the inputs and internally hold their state. Once latched, the signal on the input pins can change but the internal signals will be stable. (RCK)
The next step is where these internal signals are copied into the shift register. (\$\overline{\small \text{SLOAD}}\$)
The last step is shifting out the bits in the shift register (SCK)


If I understand the truth table and timing diagram in the datasheet correctly then the correct order of steps is the following:


Initialize the signals as follows RCK = low; \$\overline{\small \text{SLOAD}}\$ = high; \$\overline{\small \text{OE}}\$ = low; SCK = low;
Apply parallel signals to the inputs A~H
Clock the parallel signals into the latches by driving RCK high. RCK triggers on a rising edge. Drive RCK low, its inactive state.
Copy the contents of the input latches into the shift register by driving \$\overline{\small \text{SLOAD}}\$ low. \$\overline{\small \text{SLOAD}}\$ is active low. Drive \$\overline{\small \text{SLOAD}}\$ high again, its inactive state.
Read pin QH on your MCU
Apply a clock pulse on SCK to shift the data out on pin QH. SCK triggers on a rising edge. Drive it high, then low.
Repeat last 2 steps for as many inputs as you are interested in.