Assistance with Level Shifter
simulate this circuit &ndash; Schematic created using CircuitLab
I won't do the derivation math for you, since this is homework. I'm sure your prof will want to see that, so basically your thought process should be:

I need a gain of one, because the input voltage isn't multiplied by anything
R1 and R2 form a voltage divider between 5V and Vin
U2 needs a super-unary gain multiplied by the sub-unary gain of R1/R2 to get a total gain of one
The constant term introduced by R1/R2, when multiplied by the gain, should equal 1.5.

In a real-life system, the following (at least) would be different:

You would (probably) need to care about the output impedance of the previous stage, because - if the buffer of U1 is not present - this will interact with the passive network of R1/R2
You would definitely know what range the next stage will accept, and have specific reasons for choosing it (i.e. it's an ADC, or some other conditioning circuit or filter with known constraints)
You would definitely have at least some ballpark idea of bandwidth required, and may want to introduce capacitors across R3 and/or from the non-inverting input of U2 to ground
You would know what power constraints are in place and what leakage characteristics U1 and U2 have, and scale your resistors accordingly