Master-Slave D flip fop
What you have in the figure and waveforms is a positive D Latch (Master Latch) cascaded with a negative D Latch (Slave Latch). Together, this Master-Slave configuration act as a negative edge-triggered D Flip-flop. 

Latches are level-sensitive and simply propagates the data at the input when they are in transparent mode (i.e., when clock stays high for positive latch, or when clock stays low for negative latch). If some glitches happen, while in transparent mode, it is propagated as well (Observe D, Qm, CLK waves to see how Master Latch works).

Master-Slave configuration solves the above problem by cascading the latches and forming an edge-triggered D Flip-flop. A Flip-flop captures and propagates the input data only at the edge of the clock transition (here, the negative edge of CLK). Until the next clock edge, Further transitions/glitches in the data are not reflected at the output. So, that is why the third pulse of Qm (glitch as you say) was not propagated to the output Qs. At the next negative edge, Qm is captured as low, and hence Qs remains low as well.

You can read the section D-Flip-flop here to understand the full working of this configuration.