Driving a wire from a 1-bit reg from one bit of 8-bit reg (verilog)
I'm not sure if this is your problem, but I don't think you are handling the increment of count correctly. This variable can have exactly 8 values (in hardware) and you use all 8 of those values. So, there is no need to explicitly reset count when it reaches 111...just increment it and let it roll over to zero.

I am also suspicious of the logic that you use. You increment count using a non-blocking assignment and then immediately try to do something with its current value. I've never tried this but I'm not sure that it would synthesize reliable hardware...you may have a race between the increment and the check. I would do something like this:

if (count == last_value)
  count &lt;= 0;
else
  count &lt;= count+1;