what inside a graphical processor?
1) It's not entirely secret: http://docs.nvidia.com/cuda/cuda-binary-utilities/index.html#axzz37R1Qdkjl

There probably isn't a complete documentation of the architecture and some details of the mnemonic->opcode mapping may be obfuscated, but nor is it completely invisible. The invisible part is the supervisory processor on the card which handles transfers in and out of memory and schedules the other processors. That will be running one of the "binary blobs" loaded by the drivers.

Generally manufacturer want to discourage low-level applications because they will break if the manufacturer changes the architecture of the card. Compatibility is bad enough without people targeting specific model numbers of hardware.

The shader processors are best thought of as comparable to MMX or other systems for having one control flow affect an array of registers.

2) "Pipeline" is a concept. Yes, it's made out of software like everything else. The exact division of work between the host CPU and the graphics CPU(s) varies but it's usually set up for stream processing:


Represent scene as a set of triangles, with various attributes on the triangle and vertex
Pass each vertex to a vertex shader program (running in parallel on the various units) to produce a modified vertex
Pass vertexes through "rasterise" to produce a stream of "fragments" (screen location + depth + other attributes like texture and texture coordinates)
Pass each fragment through a shader program, which may write a colour and depth value to the framebuffer
Optionally do the whole thing again with different attributes (e.g. shadow stencil rendering)
Finally hand the entire framebuffer over to the output hardware (streams pixels from RAM). Due to double or triple buffering, this will happen while the next frame is being rendered.