Why do we use a CMOS for inverting a circuit when the PMOS already achieves that?
In a word: Efficiency.



You can use a PMOS transistor to drive a logic output high (e.g. VDD) when the input is low (e.g. GND). However, you can't use that same PMOS transistor to drive a logic output low when the input is high.

When you drive the input high in your PMOS inverter, it turns off, leaving the output effectively high-impedance, which is not logic low.

Your actual truth table is:

I/P    O/P

 0      1
 1      Z


You can overcome this inability to drive low, by using a resistor to pull the output low when the transistor is off. However to be able to strongly drive low, you need a low value resistor.



This resistor is always across the output, which means that when you turn the PMOS on to drive high, a large current will flow from the PMOS through the resistor to ground. This uses lots of energy. If you have billions of switches, you can see that the power consumption will be very high.

The better approach is to replace this resistor with an NMOS transistor. This is called CMOS. By using a NMOS device, you can think of it as being able turn off the resistor when the output is driven high (PMOS is on).

Using the NMOS you can also get a strong logic low because when switched on, the NMOS is effectively a short.

CMOS therefore by using complementary transistors, has very low static power dissipation - when an output is being held either high or low, almost no power is consumed.