Negative differential resistance on current sink
This is neither a constant current (CC) nor a current source.  To mirror the currents in each transistor, both Vbe's must have identical voltage by shared Vbe's. You have shared all CBE to EBC so CE has the opposite polarity.

The net effect is Vce will always have the value of 2 diode drops = NPN Vbe + PNP Vbe

but Vce will actually change somewhere within from 1.2 to 1.3x as you adjust V1 to swing all the current from Q1 to Q2.  (Then the off transistor is well below 0.6 and the on transistor then rises according to the collector current you pull.)

The collector acts a current sink and the emitter as buffered base voltage.

Yet all transistors have Ic defined by Vbe when biased properly.

Raising V1 will pull more current from PNP's emitter , since the base Vb almost fixed by Vz.

so there will be a critical voltage threshold for V1 in mV where each transistor shares some current.



I can't think of a useful application for this but now you better understand how transistors can be controlled by Vbe.  These would be very temperature sensitive to balance the exact same Ic in each.