Since SPI contains data and clock, this makes it "source synchronous" doesn't it?
Source synchronous transmission means that the same device that generates the data also generates the clock.

During a write transaction, SPI uses source synchronous transfer.

But during a read transaction, the bus master generates the clock while the slave generates the data. This is not a source synchronous transfer. 

In principle, SPI allows the slave and master to transmit data simultaneously, and the slave does in fact transmit meaningless data (usally all-0's or all-1's) when the master is transmitting, which would mean both source-synchronous and "receiver-synchronous" (not a real word, as far as I can tell) transmission is happening at all times in an SPI system.