SPI internals _ missing MISO clock during read operation
Your reference to SPI documentation already provides an answer. Yes, SCLK line is essential for communication, both to and from slave device.

I strongly advise to read that documentation again, it seems you did not understand how SPI works. To begin with, you cannot refer to individual MOSI/MISO/SCLK as "ports". They are communication lines that together form SPI bus, connected to SPI port. While in some cases MISO can be excluded, and SC can be permanently connected you do need at least MOSI and SCLK for sending commands to slave.