How to design DDR3 PCB without any termination resistor in processor and RAM connection
DDR3 has integrated (on-die) termination for the data lines, and Vtt termination for other lines. Therefore, not all lines require external termination resistors. You will find that several high-speed IO standards have integrated termination, as this avoid the parasitics, extra space, and extra routing of "regular" discrete termination.

I suggest you read this Altera DDR3 termination &amp; layout guidelines document as well as this Wikipedia article: On-die termination and this presentation on DDR3/DDR3L/DDR4.

DDR3 termination is a very complicated subject, as different bits of the interface have different termination situations, as well as on-die termination which can also be dynamic (register settings can modify the value of the on-die termination). To better understand the nuances, you'll likely want to look at several DDR3 controller/DRAM datasheets and reference designs.

Finally, see TIDEP0012 for an example of a DDR3 reference design that does not use Vtt termination.

To sum up, DDR3 is somewhat of a special case when it comes to "conventional" high-speed digital designs, due to integrated features that make it easier to use. Ritchey's book is a good one, I would also suggest reading Howard Johnson's and Henry Ott's texts for more high-speed digital design considerations. Also, without looking at the schematics, it's difficult to fully understand the circuit at hand. Last I checked, the Raspi 3 was still closed hardware. Have you got a schematic? You'll have a far better time designing circuits by reading the datasheet and looking at reference designs than by trying to infer designs from closed hardware.