Is Compare Pulse sooner than OC1REF in STM32 Advanced Timer output trigger
either of these should cause a trigger when a capture occurs on CC channel 1


When a capture occurs on a channel, then that channel is in input mode, and OCxREF is undefined as far as I know. OCxREF is never ever mentioned in the chapters and register descriptions dealing with input modes.

In output modes, they are quite different.

A Compare Pulse is generated whenever CCRx == CNT, possibly limited by the CMS bits in CR1. As the name suggests, it is a pulse that goes high when the match is detected, and goes low again after a short (but unspecified) amount of time.

The function of the OCxREF signal is controlled by the OCxM bits in CCMR. It can be configured to go high when CCRx == CNT. The exact wording is


  110: PWM mode 1 - In upcounting, channel 1 is active as long as TIMx_CNT &lt; TIMx_CCR1
  else inactive. In downcounting, channel 1 is inactive (OC1REF=‘0) as long as
  TIMx_CNT > TIMx_CCR1 else active (OC1REF=1).
  
  111: PWM mode 2 - In upcounting, channel 1 is inactive as long as TIMx_CNT &lt; TIMx_CCR1 else active. In downcounting, channel 1 is active as long as TIMx_CNT > TIMx_CCR1 else inactive.


So it'd go high when CCRx == CNT in PWM Mode 1 downcounting phase, or in PWM Mode 2 upcounting phase. Otherwise (in these modes) it'd trigger at the update event (counter rollover).

Figures 119 and 120 in the linked reference manual suggest that it happens synchronously with the compare pulse.

Another important difference is that OCxREF can in some configurations go high and remain high (until some external trigger or software action resets it), not triggering the slave when CNT matches CCR again.