Designing a open drain LED driver
The voltage drop is easy to calculate for the resistor: U = R * I, and with a current of zero, the voltage drop is zero, too.
In general, Ohm's Law cannot be applied this way to diodes, but for the special case of zero current, they behave the same: they do not drop any voltage.
So when the output is off, the voltage at the I/O pin is 5 V.

The datasheet says:


  There are three outputs on each device that can sink up to 24 mA current.
  These outputs are open-drain outputs, and provides sinking current to an
  LED connecting to the positive supply.


Here, "positive supply" means the I/O driver supply voltage, which must not be higher than 3.6 V. This is confirmed by the absolute maximum rating for the applied voltage to a tri-stated I/O, which is also 3.6 V.

To avoid exceeding this voltage, you can put a buffering transistor between the output and the LED; when that transistor is off, the LED is disconnected from the FPGA, and the transistor is capable of withstanding the 5 V:

(Due to the inverting action of the transistor, this requires a push-pull output. The BJT could be replaced with a FET.)



However, all of this is actually not necessary. The datasheet also says:


  The embedded RGB PWM IP, with the three 24 mA constant current RGB outputs
  on the iCE40 Ultra provides all the necessary logic to directly drive the
  service LED, without the need of external MOSFET or buffer.


So you do not need a resistor to limit the current; the output already can do it.

Just connect the LED directly to the output, and to the FPGA's I/O supply (3.3 V), and configure the output to supply the appropriate amount of current for the LED (it probably needs only 12 mA or less to be bright enough).