ADuC812 needs DAC value written twice. Is that normal/common?
The datasheet suggests that DACCON SFR bit 2 (SYNC) needs to be set to 1 for the update to occur as soon as DACXL is written. In your comments you seem to have it set to 0.  1 should be the default value.  The table on page 21 indicates that you can use the sync bit to simultaneously change multiple DACs by loading all the registers when SYNC = 0, then set SYNC to 1.