Multiplication in VHDL
If you multiply 2 5-bit numbers (A and B are both std_logic_vector(4 downto 0)) don't you need 10 bits (not 9) to store it in (so P should be std_logic_vector(9 downto 0)? (31*31 = 961: needs 10 bits)

But also - don't use std_logic_arith/_unsigned.  Use ieee.numeric_std and then use the unsigned data type.