Designing FPGA code in block diagrams
Altera has a free version of their IDE (Quartus II Web Edition) products/software/

I mean you still have to write code, but once its written you can use the symbols to abstract and get like a block version of the entity, and graphically interface between blocks (via buses etc.) 

Also, Would a program like LogiSim work better? At least if it had some kind of VHDL/Verilog extension!