USB Routing: Switching layers during routing
If you have a power plane on the third layer, this becomes the reference plane for the bottom layer. This isn't a large problem: you just need to place a stitching capacitor near each trace where it transitions from top to bottom. These capacitors will only be connected to vias; one to the Vcc plane and one to the ground plane. (This is shown in the doc you referenced.)

This allows you to keep your differential trace geometries identical on both the top and bottom layers.

I asked a related question here. There is good information in the answers.

The larger problem can be the impedance mismatch presented by the vias in the differential traces. There are methods to design controlled-impedance vias. This is a useful article from EDN which describes one method. I suspect most people use a 3D field solver instead of doing it "by hand" :)