How to trace down why LTSpice simulation is slow?
Imposing a timestep does not make it faster, and if you need speed and accuracy, I'm afraid that's not very possible.

There are some TVSs in series, quite a lot of them, which can be replaced by one TVS with n=X (= the number of series elements). If we're at it, m=Y will set the number of parallel devices. Note that only m is valid for RLCs, n only for diodes. This can simply be added after the instance name. For example, two series and three parallel 4148s will look like 1N4148 n=2 m=3. They will not count towards the final node count because they're expanded internally, but they will count towards the computation, since LTspice still has to compute the presence of 6 diodes.

For the floating V5, if that is one offending element (which could be, since LTspice even specifies in its manual that current sources are recommended over their voltage counterparts and voltage sources should be tied to ground for best performance), the cure is simple: add Rser=1m. This will transform, also internally, the voltage surce into its Norton equivalent, thus improving convergence.

You can also combine series RL with L Rser=x, same for caps, same for parallel and/or series combinations. Same explanation as for the TVS.

As for settings, you're better off making trtol=3..7 instead of the others. There will be a (minor, -ish) speedup, depending on your hardware and schematic, while the precision doesn't have tham much of an impact as gmin, reltol and abstol have.

There is one more thing that puzzles me: in one of the comments, someone suggests using current sources instead of optocouplers, and you say you tried. This makes me think accuracy, or keeping to a quasi-real setup, is not that important to you, which means you could simplify theLC filter after V5 into it's simple LC lowpass (i.e. don't make it a symmetric filter), but the biggest simplification can be done to the whole bridge and its control circuitry: you can simply use some G (or E) sources driving the native switch SW. The SW may need some anti-parallel diodes. Speaking of which, you can also replace the diodes with the idealized version, having .model D D Vfwd=0.7 Vrev=1k Ron=0.1 Roff=10Meg epsilon=100m revepsilon=50m, or Vfwd=0.5 for Shottky. I see two anti-parallel diodes, those could be replaced by only one diode with Vfwd=Vrev. Zeners also with Vrev=X. Of course, all these imply using an idealized, or a behavioural approach to all your schematic and, while it's very plausible and used for quick tests, you should not forget that the downside is the unrealistic results, even when modeled with great care. You could get good results, but they shouldn't be relied on, as even a schematic made with "real" elements is only a SPICE simulation using models that, themselves, are approximation of real-life cases. Of course, ultimately, it falls on you to choose your way.