What is the purpose of having two type of output interfaces on this ADC?
What criteria is used to decide which one of the two to use?


Puh. Big question. Many?


What interfaces are available on the thing you want to connect the ADC to ("sink")
Cost and effort in terms of routing of N/2 differential pairs vs N single-ended signals
Ability  to control substrate thickness/impedance/losses (worse for single-ended outputs; differential signals can very effectively be routed on a outer layer)
EMI aspects that might favor either
Especially, coupling of CMOS switching noise to the analog input
power consumption in either mode
…



  Can both be used to read the ADC at the fastest data rate of 250MSPS?


The datasheet will tell you that. But yes, text and drawing on p. 70f seems to imply that, and nothing in the datasheet as far as I skimmed it contradicts.


  Which of these is more power efficient and why?


Probably the low-voltage LVDS. Because it's lower voltage.