Interfacing MAX7219 with Bus Pirate v3.6
So, actually, as it turns out, SPI communication integrity was, in a way, the issue.

Contrary to anecdotal reports, the MAX7219 isn't as friendly to 3V3 logic as many people say it is. Using 5V for the power rails, putting 15K pullup resistors on the /CS, CLK, and MOSI lines, and setting the Bus Pirate to open drain mode resolved the issue.