Communication between FPGA and OMAP 3530 using GPMC
The GPMC should be the way to go.  Basically, what you need to do is write an FPGA configuration that implements a port that acts like a GPMC compatible SRAM.  However, instead of accessing an SRAM bank, the port can access various registers and memories inside the FPGA.  If you use the correct pins for the data side of the port on the FPGA, then you can use the SelectMAP configuration method and you can write the configuration data to the FPGA in parallel very efficiently.  When writing the configuration data, no address pins are used, so you can use whatever pins are convenient.  You may need to have a little fun with the control signals and CCLK as many of these pins are not accesible from the FPGA design - as in, you may need to connect the CCLK pin and another IO pin to the CPMC clock pin.  It's possible that you will need some discrete logic as well to make everything work.  

I would not recomend using the EEPROM unless you need nonvolatile storage.  The number of write cycles is limited, so it could get worn out quickly.  

If communication is needed from the FPGA back to the OMAP, I would recommend adding and interrupt line from the FPGA and then reading the necessary data over the GPMC interface in an ISR.