Cortex M3 reset handler with vector table relocation
From my reading of ST's Reference Manual RM008 (which I think is the reference manual for your chip -- I'm looking at Rev. 20, dated Decemeber 2018), it appears that:


There are 3 kinds of reset (these are listed in Section 7.1 or 8.1, depending on your specific chip (Connectivity line or any other line)): (1) System Reset, (2) Power Reset, and (3) Backup Domain reset.  The sections in the manual talk about what constitutes a system reset and what constitutes a power reset.
For (1) System Reset the manual explicitly states "A system reset sets all registers to their reset values except the reset flags in the clock controller CSR register and the registers in the Backup domain".  This would include VTOR.
For (2) Power Reset: "A power reset sets all registers to their reset values except the Backup domain".  This would include VTOR.
For the section on Backup Domain resets, I didn't see any language about registers being reset.


I haven't used the STM32 Backup Domain functionality, but that might be a way that you can "reset" and not reset VTOR.

If you have a contact (e.g. FAE) at ST, I'd ask him/her that question.  And maybe if you get a definitive answer, you can come back and amend this answer (or post your own).