Visualising redundancy in a 1.5 bit pipeline ADC
This is hopefully an answer to the question here, but it is also a follow up to the comments in What is the meaning of handling error in 1.5 bit ADC?
Here is an example for a 3 bit ADC with 1.5bit stages. The output range is &quot;0&quot;..&quot;7&quot; (bits 2, 1 and 0 as &quot;000&quot; ... &quot;111&quot;).
To make the explanation easier, let's set thresholds at 1V,2V,..6V. Perhaps you know this is not ideal, and that the usual thresholds are (0.5...6.5)*Vrange, but the simplified thresholds make the example easier without losing the salient feature of a 1.5bit ADC.
Remember, this ADC is not about better quantization, but about allowing for tolerances for threshold and subtraction voltages. So we will allow ourselves to use a &quot;floor&quot; type ADC since it makes the example easier, although it is worse for quantization.
Take an input of Vi 4.1V.

An ADC with non-overlapping stages decides in stage 1 (MSB, bit nr 2) that Vi &gt;= 4V, and sets bit 2 to &quot;1&quot;. (If it's &lt;4V we set it to &quot;0&quot;, so it shows you we are flooring.)
Subtract 4 for the next stage, to get 0.1V &lt; 2V, so bit 1 is set to &quot;0&quot;.
Subtract 0 for the next stage, to get 0.1V &lt; 1V so bit 2 is set to &quot;0&quot; and the output is &quot;100&quot; or &quot;4&quot;.

A 1.5 bit stage is more cautious about stage input levels that are around the threshold.
This is an example of the principle, and so I am omitting amplifiers in each stage, which normalize voltages in stages within ranges like 0...1V. I think it will better illustrate what is going on, and you don't have to mentally re-scale to recognize the numbers.

4.1 is around threshold 4, so bit 2 is &quot;X&quot;, where &quot;around&quot; means 2 &lt;= V &lt; 6
Subtract 2 (not 4) because of previous &quot;X&quot; , to get 2.1. It's around threshold 2, with 1 &lt;= V &lt;3 so bit 1 is also &quot;X&quot;.
Subtract 1 (not 2) because of previous &quot;X&quot; , to get 1.1. The last bit is a 1-bit stage, and decides &lt;1 or &gt;=1. It's 1.1 &gt;= 1 so bit 3 is 1.

Now we have &quot;XX1&quot;. This means 2 &lt;= Vin &lt; 6, 1 &lt;= Vin-2 &lt; 3 and Vin-2-1 &gt;= 1.
Note that the &quot;XX1&quot; does not mean that the output will be &quot;??1&quot;. It is only a way to encode the decisions. We could also write &quot;XX+&quot; or &quot;XX&gt;&quot;.
So &quot;XX1&quot; is Vin=2..5, Vin=3..4, and Vin&gt;=4.
Conclusion: Vin=4 (quantized) and so output is &quot;100&quot;.
Another example, now with Vin=6.1

Vin&gt;=6, bit 2 = &quot;1&quot;, subtract 4
6.1-4 = 2.1, with 1 &lt;= 2.1 &lt; 3 , bit 1 = &quot;X&quot;, subtract 1
2.1-1 = 1.1 &gt;= 1, bit 0 = &quot;1&quot;.

Now we have &quot;1X1&quot;. This means V = 6..7, Vin = 5..6, Vin &gt;= 6.
Conclusion: Vin=6 (quantized) and so the output is &quot;101&quot;.