Noise at 2^n transitions
Placeholder's valid comments notwithstanding, the noise you are seeing is indicative of a timing skew problem among the digital bits coming out of the ADC. Instead of xxx10000 and xxx01111, you are occasionally getting xxx00000 and xxx11111.

I see the clock going into the ADC, but I don't see the next place in the datapath where the data is clocked again. Be sure that the timing delays (resistors, buffer, connectors, wiring, etc.) on the data lines still meet the setup and hold requirements for wherever that reclocking occurs. Pay attention to clock skew among the boards, too.