Why 555 timer IC has three 5k resistances and not any other values?
The original 555 with 5K resistors:


And here is a CMOS version with 40K resistors: 



The choice of resistors for R7, R8, R9 (bipolar version) would be influenced by two things-

1) The desire to minimize power consumption (as high value as possible without using up too much chip area)

2) The desire to minimize temperature variations due to beta changes of Darlington pairs Q3/Q4 and Q12/Q13. 

The second point does not apply to the CMOS version. 

It's easy to see that the Thevenin equivalent source resistance for either node is 
2/3 of the resistor value. 

We can easily divine what the production limits are on the currents drawn at those nodes from a 555 datasheet- the circuit is symmetrical (horizontally) and the currents will be the same as the trigger and threshold currents. The currents are quite different, probably because of the low beta of the lateral PNPs. 

Hans Camenzind says the comparator offset can be as large as 30mV, which implies a large offset voltage on top of the 7mV maximum due to the input bias current, but the input bias current is quite variable with temperature (maybe 3:1 over operating range). If we assume it changes from 0.7uA to 2uA, at 5V that would be a change in threshold of 0.25% or about 15ppm/K. Overall actual accuracy is about 24ppm/K, so the resistors are not overly dominant (the offset will change at something like proportional to absolute temperature). 

Back in the 70's, 10mA at 15V or 3mA at 5V was considered reasonably low power, so HC probably chose the resistors as being "reasonable" -- not too big and not too small, and this was all pre-computers so he would not have had the option of running an optimization routine to get odd value that minimized some arbitrary cost function. 



Here's the actual die photo (as taken by HC and published in IEEE Spectrum), with the resistors highlighted.