Basic Memory Sytem for ARM-based system
m is 1 less than the number of bits in the ROM address bus.

n is 1 less than the number of bits in the RAM address bus.

For example, a 32 KB RAM chip has a 15-bit address bus so m or n would be 14.

The diagram is trying to show which bits of the CPU address bus need to be connected to the address buses of the particular chips being used. This is derived from the size of the address and data bus on those memory chips.

So here, four 8-bit ROMs are being used to provide the CPU with what appears to it to be a 32-bit ROM. Each ROM provides part of the 32-bit dword read by the CPU. The CPU only needs to provide an address to dword precision i.e. which particular dword it wants. Therefore the ROM array needs part of CPU_A[31:2] but not all of it, the ROMs don't have all those higher address lines. If the ROMs have a 10-bit address bus, they need CPU_A[11:2].

Generically, if the ROMs have an m-bit address bus, they need CPU_A[(m+2-1):2]. To make the diagram labelling simpler, they've used: ROMs with an (m-1)-bit address bus need CPU_A[(m+2):2] or 'CPU address bits m+2 to bit 2'.

It's a similar thing for n on the RAM address bus.