With LPC1343 (ARM Cortex M3), how to control the the initial state of the MAT output from the timer?
Set / Reset bits 0 to 3 of EMR register (EM0 to EM3).
Example for clear the external MATCH1:

LPC_TIMER0-&gt;EMR &amp;= ~0x02;


Of course, depends on your compiler. Please, next time provide further details...
Note that if the match outputs are configured as PWM output, the function of the external match registers is determined by the PWM rules (Section 15.8.13 “Rules for single edge
controlled PWM outputs” on page 271).