If multiple SPI slaves exist with different SPI modes, is it sufficient to have separate CS lines for each?
If the slaves are well-behaved, then there should be no issues with mixing slaves with different SPI modes in the same system, so long as you don't mix them under the same chip select, and you make sure to properly configure the master to use the mode that corresponds to the devices being addressed.  

As you surmised, daisy-chaining SPI devices is not done particularly often.  Generally this requires devices that are specifically designed to support being daisy-chained, which is not always the case.  There are a couple of issues with daisy-chaining: first, the data register needs to be transparent - i.e. whatever gets shifted in eventually has to come out the other end unchanged, otherwise daisy-chaining is impossible.  The other issue is that you're essentially forced to address all of the devices in the chain, which can be inefficient or even cause problems if you really only want to interface with one link in the chain.  However, for devices that do support daisy chaining, it can be an excellent way to save on chip select lines.  

Obviously, you'll need to use level translation and possibly tristate buffers or bus switches to interface with devices that have differing voltage requirements or badly-behaving MISO pins as necessary.  

Multiple masters is certainly possible as well, but you'll have to do some sort of out-of-band arbitration to eliminate contention and it may also be necessary to use multiplexers or bus switches to control which master has control over the necessary signals.