Transistor gain vs circuit gain
The complete expression is:

G = hfe * Rc / (hie + (1+hfe)*Ze)    (1),

where Ze includes the effect of the added capacitor, that is

Ze = Re//Xce = Re / (1+jwReCe)       (2)

Now, in (1) with (1+hfe)*Ze >> hie, and simplifying hfe with 1+hfe, we have the said Rc/Ze expression. Let's assume that beta and hfe are the same thing.

Re stabilizes BJT biasing with emitter negative feedback, reducing at the same time the gain; the capacitor Ce in // to Re gives you back the gain at high frequency.

Ideally the gain may increase at will with increasing frequency and Ce reactance that is going to 0. However, when Ze becomes small, it is not true any longer that hie >> (1+hfe) * Ze, so that it is not true that the gain can increase at will above hfe.
Taking Ze to 0, the limit for the gain is hfe * Rc / hie = gm*Rc.

[Note: the gain in reality is negative for the 180° phase rotation of this configuration; its magnitude was considered above]