How many mV ripple in DC is okay for powering an ATTINY?
Entirely up to the designer to verify. 

According to Atmel's own official knowledgebase article on power supply noise for AVR devices:


  There is no specification for maximum allowable ripple. This will be application specific.


In fact from that same source, it goes on to say:


  For digital part of the device the noise is about 3% of supply voltage
  and will most likely not cause any harm. Anyway, in noisy environment
  it is recommended to enable the watchdog timer to avoid code freezing.
  
  From an analog perspective the noise can give poorer performance, like
  introducing jitter in PWM and affecting the accuracy of the ADC.


That is likely as close as you will get to a definitive answer. For reference, 3% of 5V is about 150mVpp. That should be acceptable for the digital circuitry. For the internal ADC circuitry, lower levels of ripple would provide more accurate results.



Furthermore, it goes on to recommend reading of the following two documents. While neither go into any specific values for what sort of ripple is acceptable, they may prove useful reading.


AVR Hardware Design Considerations
AVR EMC Considerations