Trying to build a PMOS LDO
I made some comments, earlier. I figure I may as well add a specific schematic. (So that it can be criticized, as appropriate.)



simulate this circuit &ndash; Schematic created using CircuitLab
On the left side, the TL431 provides a \$2.5\:\text{V}\$ reference voltage.
I don't know your \$6\:\text{V}\$ rail details (is it unregulated, or not; what's its output impedance; etc) or your load requirements (how much current compliance; what's the dynamic range needed; etc), so the above circuit is just to be taken as a rough idea -- a little more than just a behavioral circuit but not actually designed for anything particular, either.
The LM393A is an OC output so \$R_3\$ is needed to pull up the output. \$R_4\$ and \$R_5\$ make up the obvious voltage divider that is compared with the TL431 output voltage. \$C_4\$ is a small output capacitance.
I've added \$R_8\$ to manage the bulk base resistance (make it known as opposed to unknown) of the PNP BJT. (\$R_8\$ also helps with high frequency oscillation.) I also included \$R_7\$ and just gave it some value. What it should do is drop about \$150\:\text{mV}\$ at the highest &quot;normal&quot; load current. As I've no idea what that is, I just picked something. (If you want, just short/remove \$R_7\$.)
Oscillation is a problem with PNP LDOs (or PFET.) So I added \$C_2\$ and \$R_6\$
Don't use the above, blindly. But it gets across one possible topology.
You can replace the LM393A (which is a pretty simple comparator -- kind of like a simplified opamp) and replace it with a rail-to-rail output (well, it has to reach close to the top rail anyway) opamp like the LT1800, for example. (But you'd pay a LOT more for that.) Also, you could replace the PNP BJT with a PFET, so long as you make sure the threshold voltage can achieved by the opamp's output. If you use a PFET, there's no need at all for \$R_7\$ so just jumper that. \$R_8\$ will still serve a small purpose, so leave it. So you have some options. And using a PFET might be important where your output current compliance is large and you want to keep the part count small.
The topology itself is generally versatile.
P.S. I haven't attempted to do much analysis here. It's just tossed out, so to speak, without a lot of examination. In general, I think it is in the vague ballpark of a modest regulator. But details matter. So it may require changes depending upon more details, as they arrive. It's just a concept here.