CD4043 latch breadboard VS PCB
This is an odd way to do what you are trying with feedback to edge trigger to use a CD4000 series latch (old tech) then using an NPN to shunt the input NAND gate.
A better question might show the timing diagram you want to design or a truth table or a State Diagram. You just want a Power on Reset (POR) with a 2-OR input=0 Latch from 1 to 0. There are many ways to do this without a transistor shorting the output even though the old CD4000 series is only 300 Ohms to 1k output Z while 74HC is ~ 50 Ohms.

My guess is you overlooked that both latch and FF outputs are high when both inputs are On.
Or you changed the 3 input NAND logic family to 74HCxx and the NPN base R is too high and perhaps 470R might do the trick. Check Vce.

If inductive circuit delay of some xx ns made your breadboard work try adding an xxx pF cap to the transistor to suppress crosstalk.



Better Way. Although POR stays low is better than Power On Set.



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