How two or more consecutive zeros(off) or one (on) in digital circuits are recognized?
Perhaps the simplest to understand is a serial connection like RS232. It works as follows:

A bit rate is agreed. Typically this will be 9600 bits per second but can vary from 300 to 115000 or so.
A character length is agreed. Typically this is 7 or 8 bits.
The line default is agreed. This is typically 0 or off.
The transmission (TX) of a character is initiated with a start bit - typically a '1'. This signals to the receiver (RX) to start its internal timer.
The 7 or 8 bits of data are then transmitted serially at the set bit rate.
The transmission ends with a stop bit which compliments the start bit - so a '0'. This ensures that the next start bit can be detected.
The system relies on having clocks at each end that can stay reasonably will in sync for the duration of one character transmission. They will resync at the transmission of the next start bit.

         __ __ __ __ __ __ __ __ __             __ __ __
 _______|  |__|__|__|__|__|__|__|__|__,________|  |__|__|__
         1   Data ................   0   idle   1  data ...

Note that because the clocks can drift a little that the receiver on detecting the start bit will wait 1.5 bits and try to measure on the mid-point of each data bit. This way if the clocks drift relative to each other the reading should still be done within the bit period without error.
This system has the advantage of only needing one signal wire and return for a one-directional transmission.

Within a chip or on a circuit board the cost of cabling is not a factor so an internal clock signal can be used alongside the data signal. Now the devices are exactly synchronised and a simpler shift-register approach can be used to transmit the data.