What are "Levels of Delay" in the 74LS138 data sheet?
This refers to the number of gates that the signal passes through to affect the output.

The logic diagram below is useful here.



Looking at the path from SELECT A to Y0, the signal passes through 2 gates to affect the output; if I look at the path from SELECT A to Y5 the signal passes thrpough 3 gates.

So the first example has 2 levels of delay and the second has 3 levels of delay.