Unused gates on Flip Flops best practices
As a general rule of thumb, if you have unused digital inputs, these should always be terminated. In the case of CMOS this is to prevent noise or excess power usage (e.g. if the pin floats to mid-supply). For TTL inputs, leaving them floating is acceptable as TTL logic include pull-up resistors as part of the design.
The termination can be a direct connection to VCC, or GND, or can be done via a resistor to one or other supply rail.
Which rail you terminate to either depends on the function of the device (e.g. you might tie a reset signal to the supply rail that puts the unused gate into reset), or you may chose to simply tie it to whichever power rail is closest.

For your flip-flop, connecting CLR, PRE, and CLK to VCC will effectively disable the device. The J and K pins can be tied to either supply rail.
Alternatively you could connect one of PRE or CLR to VCC, and the other to GND. This would also reset the device. I would avoid connecting both PRE and CLR to GND as this may cause oscillation.