Data acquisition microcontroller approach
64 ksps is nothing for a Pi, should be good on Beagle too, but not in userspace.

Jitter might be troublesome even in kernel mode, at least on SPI where the SPI master is allowed it's own queue. On GPIO it should not be an issue as long as you do it carefully. Would be easier with parallel DACs and GPIO I believe, but then hobbyist boards usually don't have that many pins.

A viable approach seems to be writing the data acquisition in a kernel module and forwarding it via the IIO subsystem. IIO has features which allow forwarding a circular buffer of samples to userspace but I have not used them myself (only used read on request).

Another approach is SoCs which have both a Cortex-A and a microcontroller, like the Sitara present in Beagle Black or some SoCs in the i.MX series. Take a look at PRUDAQ - the only active component outside BBB is the ADC. The advantage of this approach is that the two processors share their RAM making transmission easier.