Quality Procedure for Integrated PCB
NASA used to require high-rel PCBs to have a test-frisket off to the side, with vias and traces at tight-spacings.

After the PCB was fabbed, the frisket was removed and SLICED OPEN thru the vias, and the vias' internal plating was examined for proper thickness. Also the connection between vias plating and the laminated foils were scoped for integrity.

For ultimate reliability, JPL required tiny "Z" wires soldered into each via. Only 2-layer PCBs were used, and only tiny amounts of solder were used for weight control. With such redundant methods, satellites last for 50+ years.