Convert CMOS-level signal to microphone-level (0..3V --> -1..+1V)?
I could just use a voltage divider and feed 0..+1V to the audio, but I understand that many audio input circuits use AC coupling and the recorded waveform can have unpredictable DC bias. This is undesirable, since the waveform encodes information in zero-cr ossings.


From the comments:


  If it helps, the waveform is similar to Manchester coding.


That's a fairly important detail. For one thing it means that the average DC value will be 1.5 V from the micro and that on your audio side the mean DC level will be zero. (This wouldn't be the case in the bitstream example I gave in the comments.) This in turn means that if you could give an adequate lead-in of a string of 1s or 0s that a simple decoupling capacitor would work because any initial DC offset would fade away after a few cycles.

I have never attempted anything like this but something along the following lines might work.







simulate this circuit &ndash; Schematic created using CircuitLab

Figure 1. On the first positive or negative pulse the output will be clamped at about +/- 1.5 to 1.7 V. Thereafter it should swing fairly symmetrically around 0 V.

The C1 value is the default in CircuitLab. I didn't do any calculations.



Figure 2. Simulation of C-R coupling and Zener clamping.

TTL


The TTL signal could be dormant low or dormant high. The simulation starts (1) with a high.


OUT_R


The right side of C2 starts at 0 V (2). 
On the first negative-going edge of the TTL signal OUT_R is 'kicked' to -3 V (3). This may overload your audio circuit.
As time progresses R1 removes the initial DC bias and, with the values chosen, the signal is centred around 0 V by time (4).


OUT_ZD


This also starts of at 0 V (5) due to the capacitor.
As in the OUT_R circuit the first negative-going edge of the TTL signal tries to drive the right side of C1 to -3 V. This time, however, D2 will breakdown in reverse mode and D1 will be forward biased. The combination of the 1 V Zener breakdown of D2 and the 0.7 V or so forward voltage of D1 will clamp OUT_ZD to about -1.5 to -1.7 V as shown at (6). At this stage their work is almost done.
Subsequent changes of polarity will change OUT_ZD by 3 V from a starting point of 1.5 V away from 0 V so the diodes will hardly have to do any further work (7).


The back to back Zeners just means that the pair work symmetrically on positive or negative pulses. Because Zener's work as a regular diode in forward mode we need to reduce the Zener voltage by the forward voltage drop. You're looking for ±1.5 V and Vf is about 0.6 to 0.7 V so I went for 1 V Zeners.