LDO in split supply behaving incorrectly when power supply sequence is "wrong"
When the Vout is below ground it cannot bias the regulator to start up as the NPN's to ground are reverse biased.

The LM85 bias network is improved and appears to prevent this issue.


What can you do?

Consider the minimum load current 5mA and the idle current 10 mA max and use a pull-up on Vout to Vin+ that forces Gnd to be &lt; Vout+ during V- startup. ( remember Gnd can be floating and just a 0V ref. at some point.) 

How?


A Zener from Vin to Vout greater than the expected drop which overloads V- until V+ starts? maybe  brute force method...
a CC regulator SMD 20mA chip from Vin to Vout? Not a good idea if the load is less than 20mA then it pulls the Vout higher since it is an emitter follower output.
Power management cct to ensure both are OK before enabled to IC.  ( too much trouble)
A resistor divider that draws > 10mA  from Vin to Vout and GND so the external voltage V- its pull-up ( more current ) from the V+ being off?   YES
a simple idea may work but depends on dynamic current flow as V- starts up
compare with a LM317 ? maybe


Idle current spec : Vin ≤ 8V   5(typ) 10 mA (max)  

Remember LDO's only source current and not sink.
But if the output is reverse biased relative to GND they cant source either because the Gnd is a controlled current sink.

Best bet


Power Schottky diode from Gnd to Vout with a R divider on Vout from Vin to gnd  to bias the output for 10mA just below the regulated output worst case, never above.