What are the exact conditions, in terms of graph structure, where KVL can be applied?
There is a misconception here that needs to be cleared up quickly.

When one does KVL 'round a loop one is summing the voltages across the circuit elements in the loop.



However, you've marked node voltages on your schematic which are, by definition, the voltage from that node to the ground (datum, common, zero reference...) node.

To make it clear, the voltage you've denoted V1 is the sum of the voltages across R1 and R3.  This is a consequence of KVL.

So no, you cannot meaningfully sum the node voltages and set them to zero.  That would be a misapplication of KVL.



Here are some examples to consider:

By KVL, the voltage across R1 is (V1 - V2).

By KVL, the voltage across R2 is V2 (V3 = 0).

By KVL, the voltage V1 is the sum of the above voltages:  V1 = (V1 - V2) + V2



Here's yet another way to look at it.

The voltage V1 is measured by placing the red lead of the voltmeter at node 1 and the black lead at the ground node.

The voltage across R1 is measured by placing the red lead at node 1 and the black lead at node 2.

The voltage across R2 is measured by placing the red lead at node 2 and the black lead at node 3 (the ground node).

By, KVL, the measured voltage across R1 plus the measured voltage across R2 must equal the measured voltage across V1.