STM32F103 - NVIC Confusion
The function NVIC_SetPriority(IRQn, priority) writes the priority to that field of the NVIC_IPRx register corresponding to the interrupt specified by the IRQn argument.  It basically assigns the priority to the interrupt, as its name suggests.  The priority is separated into group priority (upper bits) and sub-priority (lower bits). 

The function NVIC_SetPriorityGrouping(priority_grouping) writes the value of its argument to the PRIGROUP field of the SCB_AIRCR register.  This tells the NVIC how many bits of priority are the group priority and the sub-priority.  

The descriptions of the SCB_AIRCR and NVIC_IPRx registers are in the Programming Manual.  

The Programming Manual describes the priority grouping:

Only the group priority determines preemption of interrupt exceptions. When the processor is executing an interrupt exception handler, another interrupt with the same group priority as the interrupt being handled does not preempt the handler,

If multiple pending interrupts have the same group priority, the subpriority field determines the order in which they are processed. If multiple pending interrupts have the same group priority and subpriority, the interrupt with the lowest IRQ number is processed first.

I believe the argument NVIC_SetPriorityGrouping() has to have a value between 3 and 7; so 0b100 to config for 1 sub-priority bit.  The rest looks okay. 

You don't need the __enable_irq() unless there was a prior__disable_irq().  __enable_irq() clears the PRIMASK bit; its reset value is 0.