Stm32F4 Discovery Board ADC
I am not sure exactly which chip you are using, but STM32F4 family has maximum ADC sampling rate 2.4 MS/s or 7.2 MS/s if you use 3 of ADCs in triple mode.

You are also missing that between main clock and ADC is one more prescaler which limit clock on APB2 bus. Maximum clock on APB2 is 90 MHz which has to be divided with 2 for maximum ADC clock of 45 MHz.

To actually achieve this sampling rate you need to consider data speed (7.2 MS/s* 12bit=86 Mb/s), which is way too fast for serial communications available on chip. What you could do is use DMA to gather samples on chip memory and later send then slowly to PC.