Why do I get a Top Level Design Entity undefined in my VHDL
Your error says: eightBitRegister, but your code says: eigthBitRegister.

( ht vs th )

So you are probably trying to instantiate an entity that does not exist as spelled.

The second error is just a type error you introduced (bit vs std_logic), but the entity has not been found yet either, the compiler is just now stopping at this new error, before it gets a chance to get to the other one.