Higher IF can cause clock jitters?
After a quick read over the article, it seems to me it is poorly written, I suspect by someone who might have outdated information. 

While I would say that the phase noise performance decreases with increasing frequency, it seems a bit phrase that as 'the main reason' for limiting IF frequency. 

The reason clocks tend to get worse with increasing frequency is because the phase noise is actually related to the Q-factor of the oscillator. A higher q-factor requires a lower amount of loss in the oscillator tank (both because this means we need less gain, which means the gain-block will add less noise, and inherently because the loss of an oscillator tank means it has noise, which in turn means phase noise).

Physics is kinda out to get us when we move to higher frequencies. Three factors make our life harder: 
First, the gain a transistor can deliver decreases with frequency. At some point, this becomes 0 dB (or the transistor really doesn't add to the signal power). Depending on if we talk about current or power gain, this point is called the \$f_t\$ or \$f_{max}\$ of that transistor. 

Second, metals become less good at conduction. Or at least so it would seem- you need to actually go to much, much higher frequencies than found in day-to-day applications to see this. What we do see, is the skin effect. At higher frequencies, skin-effect pushes current to the surface, which reduces the actual metal carrying the current (=higher resistance) and also makes us more sensitive to surface roughness.

Third: in general, dielectric become more lossy at higher frequencies, and this two gives us more loss. 

All this adds up to give us in the end, more phase noise. 

Oh, and next to that: If you just multiply the frequency of a signal, you also multiply the amount of phase noise. It could be they are also referring to this.