Cortex M4 memory management suggestions: best data/code placement
Ok, since you are unable to share more details. I'll give you some general points: 


the Scatter-gather functionality in the DMA module is going to
save your bacon; Take time to understand how it works and how to use
it.
If you are worried about memory accesses, just go ahead and place your ping and pong buffers in different memories. Scatter-gather will help facilitate this.
After the above, don't worry about bus contention until you get there. Realistically: if, while using separate memories, bus contention is STILL your bottle neck, then you've got the wrong chip. Pure and simple.
Invest in a Segger j-trace and implement streaming trace in your
debug board. This will help you when you need to troubleshoot timing
issues. Yes it's expensive.
Take time to experiment with your processing loop, size your ping and pong buffers based on processing loop time. You may also have to get creative with doing partial workloads to meet your deadlines.
I needed to rewrite some of the CMSIS DSP functions to be faster.
Don't be afraid to dig in to the CMSIS libraries, they are very readable AND they provide a good example of SIMD processing.
when I was benchmarking my code, i found that leaving my firmware .data section in flash didn't give me a super-significant performance hit over ram-located .data. That surprised me.
Use fixed-point data everywhere, convert to float only at the end and only if necessary.


Hope this helps.