How to measure phase difference of two signals of the same frequency in an FPGA?
Use one of the FPGA's PLL clock blocks to generate a slightly different frequency, perhaps 140 MHz or whatever you can do.  XOR this with each of the signals of interest (paying some theoretical heed to possible metastability issues, but satisfying yourself it will work enough of the time).  Compare the phases of the two lower frequency results.  

In effect, this is the same as how a hetrodyne radio receiver works - you mix the incoming signal with a local oscillator and generate a lower frequency result more convenient for detailed processing.  

Since you basically have a one-bit digital system, your result will be in discrete steps determined by the frequency difference - the closer your LO frequency is to the input frequency, the finer the result, but the less frequently you will produce an answer.  Phase and duty cycle stability of the PLL block at various ratios would be worth researching.  Averaging multiple measurements will presumably get you a better answer.