Metastable state when S = R = 1 in SR Latch?
The input condition where S=1 and R=1 for a NOR latch is an illegal input state, but not a metastable state, as you observed.

When both S and R are 1 it must be true that both outputs (Q and Qbar) are 0. This is clearly not a metastable state. However, if the inputs should transition directly and instantly from S=R=1 to S=R=0 (the HOLD state) then metastability could occur. That's one reason to call S=R=1 an illegal state. The other reason is that an input condition that causes both Q and Qbar to have the same value is logically invalid and is likely to cause problems in other logic that depends on valid values from those outputs.