How do I calculate period of synchronous counter?
The data launched by the third flip-flop has to be captured by the first flip-flop in the next clock cycle for correct functionality. The path is Q out-> NOR -> AND -> J in . Also it is the critical path here. So the maximum frequency of operation would have to satisfy:

$$T_{Delay-FF}+T_{Delay-Nor}+T_{Delay-Nand}+T_{Setup-FF} &lt; T_{clk}$$