Why is my gate driver simulations are taking very long?
I've had great success increasing LTSpice simulation speed using the convergence tips from ltwiki.org.  Also, try adding a small series resistance, say 0.1 to 0.5 ohms, to the voltage sources. 

If the simulation is only slow at the start, you can also try ramping the power supplies up from 0 to the final value using a PWL source instead of a hard turn on at t=0.  The ideal ramp time is circuit dependent, but 100uSec to 1ms is a reasonable range to try.