Dual JK Flip-Flop Toogle Feature
The TI data sheet for a CD4027B part shows this function table:



From this the immediate thing to notice is that the SET and RESET pins need to be connected to GND to keep them from having any action. 

You can also observe that by connecting both the J and K inputs to a high level will cause the flip-flop to toggle its outputs at each clock rising edge.

Lastly if you want it to count binary in the manner stated you will want to connect the CLK2 pin to the Q1_NOT pin instead of the Q1 pin.

Another thing you need to put suitably sized resistors in series with the LEDs to limit the current to a safe level....both to protect the LEDs and the outputs of the flip-flop.