Why do MCUs typically have so little buffering on the USARTSs?
Your AT91SAM7X256 has 13 DMA Controller channels and 64 KB of RAM. It is more efficient to make the RAM general purpose and use the DMAC to store transmitter and receiver data.

If RAM is instead put in little clumps for FIFOs etc, it can't be used for other purposes in non-UART applications. Having two things that do the same job - FIFOs and DMAC - is not a good use of transistor resources.

Your software typically would move the data between the FIFOs and the RAM anyway. Transmitting would be RAM->FIFO->TxUART but now it's RAM->TxUART. Similarly, receiving would be RxUART->FIFO->RAM but now it's RxUART->RAM. 

Using the DMAC, the transmit and receive buffer sizes can be decided by your software, dividing up the RAM as you see fit.