Why does this work for biasing an AC signal for A/D conversion
It's not quite like that, let me show you the proper circuit:







simulate this circuit &ndash; Schematic created using CircuitLab

C1 is a DC blocking capacitor - meaning at steady-state, the right-hand side does not know what's going on with the left side. When there is a difference in voltage, things start to happen. This allows us to pretend in DC analysis that the capacitor C1 is an open circuit, leaving the node between R1 and R2 a simple voltage divider of 2.5V. 

When there is a sudden change on the input signal on the left side of C1, the change is reflected on the right hand side, and the voltage divider no longer acts like that - rather the node voltage will change to reflect the change on the input. If the left side shows a -400mV drop below 0V, the node on the right will be 2.5v - 400mV until the capacitor charges anyway. 

The 2.5V "bias" on the right side allows single-supply circuitry like a microcontroller's ADC to read values which it normally cannot. You can deal with the bias in software, to read out +-2.5V from that sense input.