Jitter measurement in High speed serial link - Random jitter mean not 0
A non-zero mean implies your sync clock has a constant phase offset error. from some source. ( computation error? mixer error?)


Bit edge-shift  can be caused by many things:   


Pattern dependent bit shift, assymetry f/BW ratio
Non-linear phase shift or non-flat group delay in the passband of the channel
asymmetry in the data pattern
aliasing in the measurement system with data rate
path length echos from return loss.
logic skew in prop delay
non-sine or non-random noise in clock PS
etc.


Can you elaborate on the system parameters and  tests variables?

You can report back on which were relevant or which items you  can control by changing each variable and create budget of jitter for each source in order to improve BER or Bit rate.