Low Dropout Regulator Enable Delay
5 ICL's can mitigate the surge current.  Did you want to do power down sequencing too?   Another solution may be a ring Johnson counter with an enable input.  But LDO's are usually low current so a low ESR intermediate bulk cap is all usually needed with DC OK logic signal if critical.

The cons to RC controlled logic std logic are variations in slope RC tolerances , spacing  and logic input threshold variations unless sharing same chip.