Some questions about a comparator circuit used as a buffer
1-) But I don't want to cause a delay more than 10ms between the input and the trigger. How can I quantify it? I heard that a large hysteresis can cause delays. Is the best way to check from simulation?


That should not be an issue. The device itself has a response time aroung 1uS. Hysteresis wont be a problem if you do not have any filtering capacitance in there. Your only possible cause of delays would be too high a capacitance at C1 or a slow fall/rise time at the base of  the transistor if your resisters are too large.


  2-) I cannot find the max current that the comparator can source in data-sheet. That's why I used a transistor at the output. Can one help me if he can find/see that?


That device, like most comparators, is open-collector output. As such it does not source ANY current. This is important to remember since you need to calculate your hysteresis using R3, R4  AND R5 when the output is high.


  3- Is there anything fundamentally wrong with this circuit.


Fundamentally, I don't see anything glaring. It may be serious overkill though that could easily be accommodated with a couple of transistors. With this circuit I might consider decoupling the top of the reference voltage divider using another 100R/1uF filter as you did for the comparator rail just to keep that a little quieter. I might attach the top of R5 there too.

Simpler Transistor Circuit.







simulate this circuit &ndash; Schematic created using CircuitLab

D1 just raises the threshold voltage a bit.