Initial or undefined value of flip flop
There are generally two approaches simulators can use for something like this:

1) Assign, or assist on the assignment of an initial state

2) Simulate with 3 (or more) state logic, one of which is "undefined" - and have the undefined input propagate through all dependent logic producing undefined outputs.  This is a quite common approach - build a state machine in Verilog, put in a statement to have the simulator print the state variable, and see that it displays "x" until everything that factors into that value is defined.  (In the case of your Q and /Q, both would be undefined)