TDO unable to capture MSB of Shifted data in JTAG
If I count correctly, your test bench is only spending 31 cycles in shift-dr. This is probably the cause for the missing bit.
On last Shift-* cycle, TMS=1, but current state is still Shift-*. Next state is Exit1-*. Overall, in order to shift N bits, JTAG chain must spend N cycles in Shift-*, among which N-1 cycles with TMS=0 and last one with TMS=1.
Here, you seem to spend N-2 cycles with TMS=0 and 1 with TMS=1.