Output of a D flipflop upon power up?
It depends on the design of the DFF. It can also depend on how long it has been since power was previously removed, and the state of the DFF at that time. 

Some DFF design have some asymmetry in them that makes it power up preferentially in a particular state. 

'Perfectly' symmetric circuits could theoretically power up in an intermediate state, but that would generally not last longer than the typical settling time of the DFF -- because any thermal (or other) noise would basically be amplified by the latch inherent in a DFF and quickly resolve to one or the other state.

Near the equilibrium point, the output voltage will typically diverge exponentially from that value on its way to either rail.