How to construct CMOS equivalent of an XNOR gate using AND, OR, NOT gates?
You're correct; that is not the right thing to do. The key is to take advantage of the ability to implement AND and OR via wiring. For example, here's a pull-down network that ORs together the results of two AND operations:







simulate this circuit &ndash; Schematic created using CircuitLab

Note that the OR doesn't require any extra transistors at all. ANDing together two ORs is similar. Using this method, you can implement ~(A~B + ~AB) using twelve transistors, including the inverters. There are more efficient ways that use transmission gates or dynamic logic, but I don't think you can go below twelve in traditional CMOS logic.