common emitter amplifier output distortion
When constructing a low-gain amplifier like this, you need to pay attention to the voltage swing at both the emitter and collector of the transistor.

Let's say that you want to maintain a minimum voltage of 500 mV across the transistor in order to keep it from saturating. This means that the remaining 8.5V of your power supply will be distributed as 4.64V across the collector resistor and 3.86V across the emitter resistor.

This means that the collector can swing at most from 9V - 4.64V = +4.36V (minimum, near saturation) to 9V (maximum, near cutoff). Therefore, you want to set your Q point to close to the middle of this range (about 6.68V) in order to maximize the available signal swing.

This corresponds to an emitter voltage of 1.93V at the Q point, so you should design a bias network that has a Thevenin equivalent voltage of about 2.58V (VE + 650 mV).