What is the significance of the OR gate in this Full Adder circuit?
Your schematic (I changed the labeling of the gates -- not necessarily better but perhaps slightly less disorganized) is for the case where there is no carry-in to the least significant bit's sum (bit 0.) So bit 0 just uses a half-adder. The carry out of bit 0 (from its AND gate), plus the fact that there are two more bits to add (\$A_1\$ and \$B_1\$), requires the use of a full-adder to produce the sum and its carry for bit 1. So the circuit you gave is what you'd get if you used a half-adder block for bit 0 and a full-adder block for bit 1. It's no more or less complicated than that:







simulate this circuit &ndash; Schematic created using CircuitLab

Without a carry-in into bit 0 (which isn't supported in your circuit), you already know that the sum of two 2-bit words can be as large as 6, or in binary: 110. (It can't be 7 without a carry-in of 1 to bit 0, which isn't supported in your schematic.)

Simple logic. If there is \$\textit{(a "1" carry-out from bit 0 and exactly one of }A_1\textit{ or }B_1\textit{ is a "1")}\$ OR \$\textit{(if both of }A_1\textit{ and }B_1\textit{ are "1" [which then doesn't care about the carry-out of bit 0])}\$ then \$Q_2=1\$. That's all that the OR1 gate is doing. At least two of the three inputs to the full-adder must be set to "1" in order for \$Q_2=1\$. Those three inputs to the full-adder stage are: carry-out from bit 0, \$A_1\$, and \$B_1\$:


AND1A handles \$\textit{(a "1" carry-out from bit 0 and exactly one of }A_1\textit{ or }B_1\textit{ is a "1")}\$
AND1 handles \$\textit{(if both of }A_1\textit{ and }B_1\textit{ are "1" [which then doesn't care about the carry-out of bit 0])}\$
OR1 handles the OR part of combining the above two cases.


The reason that \$\textit{...exactly one of }A_1\textit{ or }B_1\textit{ is a "1"}\$ is used instead of \$\textit{...at least one of }A_1\textit{ or }B_1\textit{ is a "1"}\$ in the first statement above is because the \$A_1=1\textit{ and }B_1=1\$ case is already handled by AND1 which also feeds OR1. So there's no need to capture that case in the first statement.