What's the difference between the maximum and cut-off frequencies of a single transistor compared to those of a circuit?
A CPU's logic design is highly tuned to minimise the number of gates between registers (made of flip-flops); some CPUs have 12 or 14 or 16 gates on the longest path. That means a signal has to propagate through 2 FFs, 13 wires and 12 amplifiers (gates) before the next clock pulse.
(This paper suggests the optimal would be 6 to 8 gates before the FF delays started reducing performance : scanning it, it appears to be a hypothetical paper, and I haven't heard of any practical CPU with as few as 10 gate delays. I vaguely recall Andy Glew upset a lot of fast RISC CPU designers when his Pentium Pro at about 12 gates upset most expectations of what an x86 CPU could do)
So one shouldn't expect it to work at clock frequencies more than about 1/25 the speed you can get a single element to oscillate.
That would get you down from 150GHz to maybe 6 GHz right there; but it's clearly not the whole story.
Given millions of elements on a CPU, you can't afford to power them as much as you can a single transistor, both from power supply and interconnection issues, and from thermal (heat dissipation) issues. So they are tuned to somewhat less than the maximum power (and higher speed requires higher power)