Misbehaving logic gates
For CMOS logic parts like the 74HC family, the inputs are very high impedance, and don't assume any particular level when left unconnected.  They must always be connected either directly, or through a resistor, to Ground or Vcc, in order for the chip to reliably see them as Low or High.  ALL unused inputs MUST be connected to Vcc or Ground, even on the unused gates in the chip.

For bipolar TTL (plain 74xx, 74LS, 74ALS) the inputs source current, so will normally appear as high when not connected, and must be connected to Ground to be seen as a low.

As the comments mention, a bypass capacitor is desireable, but the lack of one wouldn't cause a problem with the simple test circuit you are using.