How to produce five outputs, one low, shifted on clock edge. 74HC logic
You can do it with a counter (74xx163) and a decoder (74xx138).  The decoder's 0 output goes nowhere, and the next 5 outputs (1 through 5) are the desired 5 output bits. 6 and 7 are unused.  The counter's 3 LSBs go to the decoder's select inputs.  When the counter reaches a count of 5 it gets reloaded with a starting count of 1. The load input comes from the decoder's 5 output. A reset of the counter has it output a 0 count and the decoder outputs a 0, which isn't one of the output bits. When counter reset is negated, the count from 1 to 5 resumes.