Having trouble properly driving a MOSFET
The models don't seem very convergent-friendly, due to the many behavioural expressions involving conditionals (if()), which are known to have discontinuities around the condition which cause the derivatives to go sky-high, and possibly cause &quot;timestep too small&quot; errors, or similar. There are ways to deal with them, sometimes they work, sometimes they don't, but none of them are here: using current sources with terminating resistors and capacitors to help smooth out the sharp transitions. Or, in the case of LTspice use the far superior A-devices. The SiC model also uses limit(), which is a hard-limit, also causing sharp &quot;knees&quot; that kick the solver. In LTspice there's a better alternative, uplim(dnlim(...)), which might be a little bit heavier (but not much) on the computation side, but it has a smooth limiting region, which helps convergence. You could go over both models and try to replace/change/adapt/etc the possible offending lines, but at this point I wish you good luck.
Your concern about the grounding in the datasheet is not needed, I think you can safely believe the guys from TI, but your PWM section is using a unipolar ramp for a bipolar sine, which will force the inputs of those unipolar comparators. Also, in the case of SPWM, it might be better (at least from an EMI perspective) to use a symmetric triangle instead of a ramp (where a PULSE() might be more convenient than a PWL()); though a ramp is fine, too.
Also, if I understood correctly, if your load requires 530 W, then those transistors are way too oversized (30 A transistors are like a Schwarzenegger for a toothpick breaking contest). Same thing for a 10 kΩ load for those beasts. That's why when you followed the suggestion in the comments about lowering the load to 100 Ω it made the simulation much nicer. Try making it 10 Ω, and it will be even nicer. What's more, it looks like you're after a 50 Hz inverter, which means that a 200 kHz switching frequency is also unneeded; 25-50 kHz should be enough (and simulate faster).
And to help with the models, try adding Rser=0.1 Cpar=1m to all the sources (except the PWM signals), add capacitors across the SiCs with a (fairly random) 1n Rser=100 (series RC snubber), change the diodes to be 1N5819 (or choose your own from the model database) and make the zero-valued resistors to be at least 0.1 or so. If this doesn't help try adding .opt gshunt=1g or .opt cshunt=1p (use this last one with care). There are other settings for aid in convergence issues, but, in my experience, too often a properly sized element in the schematic made all the difference. In this case, if you say that the PWM driver will be replaced by a µC, then why not replace the not-so-helpful model with something simpler that will help you get by while letting you focus on the power switching part (e.g. simple VCCS or VCVS as drivers).