Why does each device have two SMBus addresses?
This is why I really don't like 8 bit I2C addresses. The address phase of I2C transactions transfers 8 bits - 7 address bits and one read/write bit, indicating the type of operation to follow. If you consider only the 7 address bits to be the address bits, then every device has exactly one address in the range of 0-127. However, some devices and/or APIs consider all 8 bits to be address bits. If you do that, then every device has two adjacent addresses that differ in only the LSB, a read address and a write address. And maybe the API overrides the read/write bit when you ask it to perform an operation, maybe it doesn't. With 7 bit addresses, all of this is completely unambiguous.

My guess is that the scan was done over the 8 bit address space and is hence reporting all devices twice. Which address to use depends on how the API is implemented. Either you have to use the read address for reads and the write address for writes, or you can just pick one of the two for all operations.