hex inverter oscillator
This design might fail on some simulators if the internal ESD diodes are not included.

The gain margin frequency have not have enough gain at the limited slew rate where the frequency is unity gain to produce an output. If AC noise at Vdd/2 the 2nd  stage is less than the offset voltage from mismatched FETs , it may not oscillate and just stay at 2.5V

I could simulate failure without diodes and success with internal diodes here.



As for frequency,  guess what RC=T is when the ramp goes from diode drop outside rail to Vd/2. Hint f=1/2T  with some tolerance for thresholds +/-25%