Virtuous: Differential Input Single Ended Output Design Enhancement
The lower limit for the output swing is set by the NMOS transistors, i.e. the tail current source, the diff pair and the cascode. 

Things to check:


Saturation voltages of the NMOS transistors. Everything below, say, 120mV?
Biasing of the cascode, it should be as low as possible and as high as necessary. It should be in the order of 3*Vdsat + 1*VT.
Input common voltage. The output swing depends on the input common-mode mode voltage. For maximum swing, minimum input common mode voltage is required. The minimum would be around 2*Vds + 1*VT.


To bring the output to 750mV you need to apply feedback, so you should have a proper testbench.