Why does the race hazard theorem work?
As others have pointed out, mathematically the statements are exactly the same, and the additional term is "redundant".  It would also be "redundant" for me to copy their mathematical proofs here.

You can also easily verify the statements are equivalent by making a 8 row truth table for the three inputs combinations.

    A B C           A*B + A'*C                       A*B + A'*C + B*C
    0 0 0               0                                    0
    0 0 1               1                                    1
    0 1 0               0                                    0
    0 1 1               1  ** hazard b/w states              1
    1 0 0               0                                    0
    1 0 1               0                                    0
    1 1 0               1                                    1
    1 1 1               1  ** hazard b/w states              1


The purpose of the extra term is to prevent A from causing any toggling whenever both B and C are high.  

As an example, suppose there is a finite time delay between A and A' (reasonable).  Now also consider that both B and C are '1'.  As you can see in the waveforms below, there is a glitch at the output.  



Assuming the logic is static CMOS, the glitch is recoverable.  But, if it were some forms of dynamic logic it could propagate the error.

The addition of the redundant term is a solution to cover the glitch.