Noise generated in 2nd stage of active bandpass filter
[edited Sept 8] The problem is one of MULTIPLE return paths for charges. This is a standard problem for VDD/2 designs.
There are several feedback paths here:

The VDD

The VDD/2


However, you do not want ANY feedback paths.
With the additional requirement for 45+35=80dB gain == 10,000X, a 100 microvolt signal (too small to view on any modern scope, tho not 7A22 TEK plugins) is to produce 1 volt output. At the 100 microvolt level, such systems become unobservable except by using the system itself as the diagnostic tool.
A few years ago, I implemented Av = 118dB (600,000X) at 50Khz to 200KHz. There was no oscillation.
Key was === separate VDD/2 for each stage of gain.
Thus I suggest you add two more 10Kohm resistors.
Reading the datasheet for TLV2464, I note the PSRR drops to 45dB (300:1) above 10KHz.
That means YOU the designer have to filter out fast trash. Use 100uF capacitor, and 100 ohms (0.01 second timeconstant or 16Hz) to provide VDD to each of the 2 opamps. This requires 2 large capacitors and 2 resistors.
Bypassing of the VDD/2 dividers? Only the first contributes to system noise, and not all that badly. The TLV2464 has broadband noise floor of 11 nanoVolts/rthz, equivalent to 10,000 internal resistance. Thus 10K||10K on the Vin+ pin, and 8,000 ohms in the signal input path, are not the dominant source. And the &quot;radar&quot; module noise floor is not specified. So don't worry about it.
Another concern is the high_frequency energy arriving from the &quot;radar&quot; module, and also generated in the broadband noise, or in PowerSupply trash that is not filtered out (to a GROUND PLANE).
You have a low_pass_filter in each stage, but they FAIL, because the opamp still has to provide high_frequency energy to cancel the input high_frequency energy. This means the VDD rail is constantly being trashed, because the opamps need to absorb/cancel/null_out incoming high_frequency energy.
Cure? add a &quot;T&quot; filter to ground at the input to the first stage.
Split that resistor into two resistors, and add a cap to GROUND PLANE. For 30uS tau, with 4K||4K = 2K, use 15,000 pF (0.015uF) to ground from midpoint.
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[original answer]
You have a gain of 10,000x (45 + 35 = 80dB = 10,000X).
Thus 500 microVolts of wiggle from the Radar (whether legitimate signal, or just power supply trash) will --- 0.5mV * 10,000 = 5 volts --- swing rail-rail.
You should be using a VERY LOW RESISTANCE ground system. Probably a Ground Plane.
You should NOT BE SHARING this Ground system with any high_current circuit.
Without a bypass cap on VDD/2, those two 10Kohm resistors will set th noise floor of your amplifier

10K || 10K == 5Kohm == 10 nanoVoltsrms/rtHz noise density

with bandwidth of 10,000 Hz, the RTI referred_to_input noise (integrated over that bandwidth) becomes 10nanoVolts * sqrt(10,000) = 10nV * 100 = 1 microVolt

There are OTHER noise sources --- the opamps will be noisy, the VDD will be noisy

The TLV2464 is &quot;low power&quot; so probably lots of Random Noise (that's what low power circuits produce)

assume the RTI noise is 10X higher, at 10 microVolts RMS; after gain of 10,000x, you have 100 milliVOlts RMS nois and 600 milliVolts (6 sigma) output peak-peak

as a kid, I built various high_gain audio amplifiers; they motorboated, unless I had excellent VDD bypassing, including separate R+C filtering for the front_end; this was needed to prevent the VDD rail being a feedback path.


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[added 14:00 Sept 23]
Reviewing the revised schematic

the circuit will still be very noisy, because the VDD/2  sets the noise floor UNTIL bypassed to ground

add 10uF from shared_node at VDD/2

from the global +5v, install a 10 ohm resistor to top of the first 10Kohm resistor; this will be in series with all VDD curren flows

from bottom of the new 10 ohm resistor, install a shunting 100uF capacitor

momentarily ground the RADAR_IN node (dis_connect from your radar module, first); this Grounding will prevent any 60Hz electric fields entering the amplifier chain

I do not think the Buffering of VDD/2 is needed; the Vin+ pin will not require any current from VDD/2 voltage;

you should be seeing LOTS OF RANDOM NOISE, as I predicted in the initial maths

YOU SHOULD BE SEEING lots of random noise. Your gain is 200 * 200 or 40,000

your random input noise density, with all those noisy opamps (internally Boltzmann electron movement noise) and the 10Kohm VDD/2 biasing, is about 30 nanoVolts RMS per rootHertz; that becomes 1uVrms in 1,000Bandwidth, or 3 uVrms in 10,000Hz bandwidth

now amplify that 3uV by 80 dB (10,000X) and you have 30 millivolts RMS or about 200 milliVolts PeakPeak ---- you SHOULD be seeing lots of output noise.