Silk to Solder. Design rules error in altium
You seem a bit confused. The layers are as follows:
copper
soldermask
silkscreen

Copper traces, and, usually, copper pours are covered by default by soldermask. Usually vias are also covered by soldermask. It is OK to have silkscreen printing on the soldermask.

Pads, whether SMT or through hole, are typically not covered by soldermask, because if they were, you could not solder to them. For the same reason, pads should not be covered by silkscreen.

Fills, however, usually are covered by soldermask, even if the fill completely surrounds a pad. So you can have a giant rectangle of fill copper with a pad in the middle of it somewhere. Only the pad will have a soldermask opening.

You should design your component footprints so that silkscreen does not cover pads. Likewise, you should not place components so that the pad from one is in the silkscreen of another. If you do those two things, I don't think you will have any problem with silkscreen covering pads.

Also, you can probably check and edit the gerbers before you send them out to make sure the silk layers do not cover pads.