Protective measure against powering inductive loads
When the coil collapses, are there danger of the current going back
  through the mosfets?


Yes there is. It's a certainty that current will flow into the parasitic capacitance of the MOSFET and, although less certain, if dv/dt is fast enough, it can raise the gate voltage sufficiently (via internal capacitive coupling) and reactivate the MOSFET temporarily. This happens quite commonly.


  For the NMOS setup in blue line is there danger of it going back to
  the power rails? I do not want to stress my PMICs


Bearly anything at all will happen here. Because the MOSFET drain source capacitance is real (as previously mentioned) the flyback current passing through the zener is slightly egged into pushing a little current back into the supply due to that capacitance but, it is a minor, minor problem.


  For the PMOS is that ground safe to be connected directly to the logic
  grounds? I would like the setup to be able to have an alternate
  function where it can power digital ICs where having the same ground
  is important


Similarly to directly above there can be a small injection of charge but, providing the ground plane is good, it won't be noticed. As with either (2) and (3) keep the zener/diode close to the inductors.