OP-AMP Flip Flop start up predictability
Sure can. It's the 10k to V+. As the circuit powers up, assuming the set and reset lines are held at the same value, the - input to the op amp will reliably be held higher than the + input. During the early stages of the power-up cycle, while V+ and V- are low, the output transistors in the op amp output stage are not able to produce much current. As a result, the output is not able to override the pullup resistor before the output state is established, and the reset state is established.

And your paranoia is justified. If you cannot guarantee the condition of the set and reset inputs during power-up, you cannot guarantee that they will not override the pullup resistor. So a POR (power on reset) pulse or level is ALWAYS a good idea.