Paralleling LVPECL outputs?
One issue is that the PECL output is an open-emitter BJT, and it is biased by the pull-down resistor on the output. Traditionally this is 50 ohms to Vcc-2 V. Or if it's not convenient to make a sinking supply at Vcc-2, then something like 180 ohms to ground with some other means of getting 50 ohms AC termination. 

To make sure all your outputs are biased the same, you'd need to do something like







simulate this circuit &ndash; Schematic created using CircuitLab

Whether everything still stays synchronized with all those external components present is TBD.