How to find and overcome run-time RAM corruption in a Microcontrollers?
How can I still let the system run by overcoming or ignoring this corruption.


On a general Cortex M0: probably not at all. Whilst this becomes easier (not easy) if you have an MMU that can map memory around, your ARM microprocessor very likely doesn't have that. So you'd have to write your software and linker scripts in a way that specifically avoid these addresses, and compile that, and run that on the µC.


  How can I find ...


Typically, that's the job of memory-validation hardware mechanisms. In the world of PC/Server/Workstation/Cluster-style computation, you'd go for ECC memory and possibly even memory redundancy. In spaceborne applications, you'd possibly have memory controllers that have much more elaborate Forward Error Correction (FEC) on the RAM – the same kind of thinking that solid-state mass storage uses to avoid bit errors, or your digital TV receiver.

The problem here is: you don't have a memory controller that can do that on a Cortex M0. You could of course first check every RAM region against a checksum before accessing it often in software, but that'll be an enormous task, and also won't really help if the memory corruption happens during repeated reading or a write.

So, if a Cortex M0 has broken memory, it's broken and needs to be replaced.

Good thing is that this kind of chip definitely doesn't have that much RAM, so the bit error probability due to the Bernoulli distribution caused by "or"ing a lot of "is this bit broken?" probabilities isn't that high. Which all the more means you should replace the chip in the field if it has broken RAM – there's something wrong with the chip, and it's hard to predict what'll fail next.