Some general question on verification from scratch
Verification is a huge field. Just like in software there are many levels of verification e.g. code coverage, path coverage etc. It all depends on the application. Blinking LED: check the frequency in simulation; the control system that keeps your turbofan below its melting point: you better test the hell out of it. 

We can split verification into two main categories: functional and formal. Your tool chain usually comes with functional verification capabilities i.e. you put something at the input and you check the output. Say you are designing an adder. What you can do is create a test bench, put each possible combination at the input, and compare the output. This is what I needed to do recently for a Kogge-Stone adder I was designing for an FPGA. 

If you spend some money you can buy tools that can do code coverage, path coverage etc. You can actually do that with some open source tools too. If you spend a lot of money, you can get a formal verification tool, which proves that your design is equivalent to the specification. This can be really important in some fields. 

I would suggest to start looking at test benches, if you have not done verification before. This will give you a good introduction to functional verification.