How do they integrate logic into a DRAM process while manufacturing SDRAM?
... get a better VLSI book?

It's possible; it's just not optimal. Logic processes are designed for speed; they go to great lengths to avoid stored charge, adjusting doping, bias voltages etc to clear it away as fast as possible. 

Since stored charge is rather important to DRAM, the DRAM process is tuned in a different way! 

Thus while a fast logic process may be able to run faster than 2GHz, logic on a DRAM process is perfectly possible, but its speed may be restricted to the 0.5-0.8 GHz region.