Exclusive execution unit in pipeline stage for execution of memory access instructions
There's no reason you can't do that, but there's also no obvious reason you'd want to. Note that such a mechanism would be useless when dealing with memory reads, since the memory is read in order that the execution unit can do something with the retrieved data. Whether the data is read via the execution unit or some dedicated mechanism, the CPU will have to wait for the data before it can do anything else. 

It's true that you might save a bit of time by handing off write operations to your proposed mechanism, but that wouldn't help a lot and would require considerable added circuit complexity.

Note that the standard approach to dealing with limited external memory bandwidth is cache, and the cache manager is arguably (sort of) an example of what you are proposing.