Latched outputs on 8255A
'Latched' means the bits are put into a storage register (array of flip-flops) which holds its output constant even if the inputs change after being latched. 

The 8255's outputs are latched to hold the last data written to them. This is required because the data only stays on the bus for one cycle, so without latching the outputs would become invalid as soon as the write cycle finished.

The inputs are not latched because the CPU only has to read their current values, then store the data in a CPU register or memory if it needs to be referenced at a later time. If an input changes while the port is being read then the result may be indeterminate.