Data Strobe in DDR memory
The Q is just some ancient notation. Data signals are called DQ and data strobe is  DQS
Data strobe is the clock signal for the data lines. Each data byte has their own strobe
It is bidirectional signal. It is transmitted by the same component as the data signals. By the memory controller on write and the by the memory on read commands.
Control and address signals are unidirectional and clocked by the CLK signal. DQS runs the same speed as CLK but they are not synchronized.


Let's imagine time of flight for all signals is 1ns.

Situation with only one clk that is transmitted by the controller:

-During write there is no problem. Data signals can be clocked to the CLK signal and everything is fine. If traces are length matched you can use timing tolerances tighter than the time of flight.

-During read there is a problem. The controller must first transmit the clock to memory, where it arrives 1 ns later. Then the memory sends data bits to the controller and this takes another nanosecond. There is 2 ns skew, which limits how fast you can transmit.

When the same component that sends the data sends the clock, it is all synchronized. Data can be transmitted even faster than what is the time of flight