A capacitor as loop filter of a DLL
A PLL will measure phase and turn it into a frequency. The VCO in a PLL will perform an integrating action which adds a pole at s=0. This adds 90 degrees phase in the open loop gain. If only a capacitor is used for the loop filter, then this adds another 90 degrees phase and you may get an unstable system. A zero may need to be added to compensate for this.

\$\phi(t)=\phi(t_0)+\int_{t_0}^tf(u)du\Rightarrow\Phi(s)=\frac{F(s)}{s}\$

A DLL does not generate a frequency. There the delay element will generate a delay or phase shift derived from a fixed clock, so there is no integrating action. It just generates a delay/phase shift proportionally. So stability is still possible with only the pole from the loop filter.