Change in PLL settling time as a result of halving charge pump current/doubling loop filter capacitor
Q Is there a way of getting a rough estimate of how this will impact the settling time?

A Yes but Design handbooks or Application Notes help more than analyzers as non-linear mixer affects simple 2nd order control theory. I don't have any magic formula, but some others may have equations that fit a certain design.

For example I found advice such as using Cs/Cp ratio of 10:1 good for Bode plot phase margin control once you find the best gain range.


reducing phase margin of phase or increasing phase lag near unity loop-gain increases overshoot ( 0 margin = oscillator) Hence Cs/Cp ratio is useful for compensation to shift this operating point below 0 dB.
Lower capture time from increased bandwidth but more phase noise.
Lock time is also affected by SNR here gain of mixer is reduced with increasing noise.
VCO temperature sensitivity of slope affects loop gain , which can be corrected. 


Capture range defined by F offset that can be acquired under worst-case and/or  nominal conditions is affected by Loop gain sensitivity to temp.  Capture range must be much less than worst case VCO error under all conditions to work.

Total loop gain needs to be &lt;&lt; 1 after 180 phase shift becuase when 180' shift &amp; negative feedback (180deg) this becomes positive feedback and when close or &lt; 1 unity gain it rings with too much overshoot, so lower gain at 180deg phase shift in the phase mixer filter is one key design criteria for minimizing overshoot.


Design tradeoffs are lock-in time, over-shoot, phase noise, noise skirts, capture range, image rejection, aliasing jitter, harmonic spurious lock.

Dual gain-bandwidth filters are desirable for fast lock-in time with low overshoot and then slow mode for noise rejection.  

SNR affects gain of channel as phase error signal becomes swamped by noise and results in lower gain of mixer. 

VCO can change gain with temperature, but can be compensated or stabilized with dual gain approach. Capture then lock on slow mode.

Factors that affecting temperature stability of gain of loop are temperature sensitivity of VCO Hz/V per deg'C from parts such as varicap.