How do VFDs limit the starting current of the motor?
VFDs simulate variable mains frequency by using pulse-width modulation (PWM) generated sinewaves.

Figure 1. PWM-generated sinewave. Image source VFD PWM waveform.
The diagram shows the PWM to generate a full voltage waveform. To reduce current for soft start the pulses are made narrower so that their average value are lower. For example, by running the same pattern but with each pulse half as wide you would get a sine with half the amplitude.
There are many good explanations on YouTube and online articles.