Reverse Shift Register?
A parallel-in, serial-out shift register (PISO) can read several parallel inputs (usually 8) and serially output the data. Much like a SIPO shift register, a PISO has an internal storage register that always contains the states of the parallel inputs. When the "load" pin is pulsed, the contents of the storage register are transferred into the internal shift register. Then when the "clock" pin is pulsed, the data bits in the shift register are shifted one bit over toward the serial output. PISO shift registers can also be cascaded by connecting the serial input of one register to the previous register's serial output.