Working on an FPGA without an IDE
The state of FPGA EDA tools is awful, in my opinion.

That said, here's my tool-flow for each of the major vendors:


Design / initial work is done with the GUI they provide. No way around this, especially if you want to use IP Cores. This is on Windows. You can run the GUIs on Linux as well, but in the past, the Windows versions have gotten the most attention / support.
Compilation is done headlessly on remote Linux boxes.


The tool-flow for each is primarily Tcl-based, and if you look at what the GUI does, it's basically executing Tcl commands. Each vendor has a reference manual describing what you can do with Tcl. Altera additionally allows you to write vanilla GNU Makefiles to run Quartus headlessly.

I use scons to run Actel and Xilinx builds right now -- Python calls to Tcl scripts that execute the tools. I can't comment on Lattice, but I bet they have something similar.

Last "complaint"/note: version control can be tricky with the amount of extra crap the GUI tools spit out. My MO is to minimize the set of files to version control, and spawn the generated IP cores / project files dynamically each build, and add those to .gitignore.

Summary: You can drive Altera, Xilinx and Actel/Microsemi IDEs headless-ly with Tcl-based scripting.