How Can A Coded Firmware Control Hardware
(why are you talking in CamelCase? It gives me an uneasy feeling in my stomach. Tanks for removing it, and I changed my answers slightly in response to your clarifications.)


  1->Does the opcode represent the physical state of the buses where only the buses required to perform the following task are HIGH while Others are LOW? 


Such processor did exist (google VLIW), but in modern deisgns the opcode controls the various busses and other controls only very very very indirectly.

How thinks work in modern processors is VERY comples. Patterson and Hennessey have written a few very good books on this subject, but I think you will need to start with some more low-level books on digital circuits. 


  2-> How is the control unit able to control various components of a processors? 


I don't understand that question. It controls it electrically, via a wire, inputting a signal into for instance the address lines of a selector/multiplexor, or the enable input of a tri-state buffer. 

The text you added did not make the question any clearer.


  3->What is the realtion between Processor Bit and Available Opcode, 


I have no idea what a Processor Bit is, but you can look up the bit-wise encoding of instructions in the datasheet, refrence manual, or other documentation of a processor.

There is no general relation between the width of the data bus and the number of instructions. In most cases, the instruction width is a multiple of the data bus width, and a part of this instruction width is used to identify the instruction. But in a lot of cadses the distiction between instructions and addressing modes is blurry.


  4->What Does the Opcode No/HEX Signifies?


What is a "No/Hex"??

"HLT(Halt)-->72H" means that the Halt instruction is written as "HLT" in assembly language, and encoded as 0x72 in memory.