Stable state and don't care
You can't say that you have a stable state just because Q2=1 and Q1=0...you must also specify that values of the inputs. You need to assume that Q2 and Q1 have a particular value and then consider specific values of the inputs. If you propagate the assumed Q2 and Q1 as well as the specified input values and determine that the actual value of Q2 and Q1 is the same as your assumed value, then you have identified a stable state.

A=1 and B=0 is not a "don't care" input condition. You can say that you have a "don't care" input condition only if the final values of Q2 and Q1 do not depend on the previous values of Q2 and Q1. In other words, the output state is determined entirely by the inputs and you don't care about the previous output state. For the circuit you provided, all of the input conditions except A=1 and B=0 are don't care conditions.

For the A=1 and B=0 input case you have to make an assumption about the states of Q1 and Q2, then determine if that is a stable state. Do this for the situations where the latch is storing a logical 1 and for when it is storing a logical 0 (it's not clear how Q1 and Q2 relate to the stored state of your circuit). If you find that the stored state is always stable for a particular set of input values then you have found the HOLD input condition...the input condition that holds the previously stored value in the latch.