Mixed signal PCB layout for PSoC
You'll always have some noise on an ADC, especially SA (Successive Approximation) types on the microcontroller die. Sigma-delta perform better for Gaussian noise, as they integrate it. Don't expect 12 ENOB from a 12-bit ADC.

The controller's noise is a reason why most microcontrollers don't give you a higher resolution than 10 bit, and the AVR offers the possibility to stop the microcontroller during the ADC's acquisition, which should confirm that at least some of the noise comes from the controller.  

But the question is: do you care? 1.5 bit of noise on a 12-bit ADC still leaves you more than 10 bits, or better than 0.1 %. How accurate is your Hall sensor? Other components in the circuit?

edit
You seem to use the PSoC's internal oscillator, since I don't see any crystal on the schematic. It looks OK: you have the proper decoupling. Apart from the internal clock the only high speed part in the circuit seems to be the SPI, but you say that this will be silent during measurements. The rest of the board is DC or probably relatively low frequent like the Hall effect sensors. And it's a Damn Small™, which also helps: shorter traces will pick up less noise. Sure I could nitpick about the MCP1702, which I would rotate 90° CCW so that the output capacitor can be placed even closer to the pins, but that won't solve the problems.  

I only see one change in the layout which might improve your S/N ratio: 



In the datasheet split analog and digital ground planes are suggested for "Optimal Analog Performance" (page 10).

For the rest: it's a small board like I said, that means short traces and decoupling within a few mm. So I would like to have another look at the noise's source. Prime suspect is the PSoC's clock. The PSoC can run a very low supply voltage, and that would reduce its noise. Of course it would help much if VDDA has to be lowered as well, but I didn't read anywhere in the datasheet that VDDA shouldn't be higher than VDDD.  

Next, the ADC. On page 55 of the datasheet it says 66 dB SINAD, that's 11 bits, close to what you get now. The A1324 datasheet gives us 7 mVpp noise on a quiescent voltage of 2.5 V. That's also far less than the 72 dB S/N ratio which 12-bit could give you. You may improve this a little bit with extra filtering.  

You mention the better performance of the MCP3208, but that's an ADC away from the microcontroller, and that may explain how an SA ADC can do better than a sigma-delta with the same resolution.  

So, the options I see: lower the digital power supply voltage and split analog and digital grounds.