Two-stage opamp offset voltage constraint
This is only true of dc bias currents, not ac currents or transients.
We're assuming a "very high" load impedance, so the current flowing into the load is effectively 0.
We should really say that \$I_{d7} = -I_{d6}\$ because we want to use the passive current convention, which takes a pin current to be positive when it flows into the pin.


With these assumptions, \$I_{d7} = -I_{d6}\$ is just KCL written at the Vout node.