Why the DC voltage doesn't affect the high pass with the NMOS Transistor?
What happens if we now change V2's DC voltage to 2V rather than 3.3V?
When we decrease the voltage of the DC to 2.0V we go to the lower state of the user characteristics graph of the transistor where we have a smaller slop. . And we know that the slop depends 1/R and the resistance for 2V will be higher than the resistance for 3.3 Volts. 
And from the Ohm's law we can find out why it influences the high pass filter.