Why does yosys mark used sub-modules as unused?
The compiler decided to optimize away some code it did not like without triggering an error or warning. Basically, there were two always blocks operating on the same register.
always @(posedge clock) begin
  if (resetn) begin
    state &lt;= 0;
  end
end

always @(posedge clock) begin
  if (!resetn) begin
    case (state)
      0: begin
        if (change_to_state_1) begin
          state &lt;= 1;
          output &lt;= output_from_d;
        end
      end
      1: begin
        state &lt;= 0;
        output &lt;= output_from_c;
      end
    endcase
  end
end

Since it did not like state being assigned a value on both always blocks, it seems to have removed all assignments to state in the second always block; therefore, state could only be 0. All non-0 states became unreachable; thus, they were optimized away. Since all references to C were unreachable, it was marked as unused, and, thus, removed. D was used as a temporary output in state 0, so it was marked as used.
The solution is to make sure no two instances of always blocks that occur on the same condition modify the same variable. For example, in this case one can merge the always blocks using an if-else statement on resetn.