Why the one-hot state encoding has an advantage in decoding compared to binary state encoding?
The thing to remember about Verilog behavioural code is that what may seem like "we could simply do", doesn't actually represent how simple or complex the resulting hardware is.

Your case statement is describing the behaviour that you want, but the synthesis tools have to convert it in to logic gates. There is no simple case logic gate. Both infer chains of multiplexers for each signal controlled within.

In the one-hot example, the logic checking the state can simply use the one-hot bits for the multiplexing.

For the binary-encoded state, the logic has to include a load of decoder logic to convert the binary value to a one-hot value before it can do the multiplexing.



TL;DR; The difference basically comes down to where the decoding logic is placed. In one-hot, the logic is placed before the state machine registers which breaks up combinational paths (good). In binary, the logic is placed after the state machine registers forming longer combinational paths (bad).