Explanation for dual slope DVM voltage measurement
The capacitor is charged from zero volts initial condition to an unknown voltage of 

\$-t_1 \frac{V_{IN}}{RC} \$

(assuming Vin constant, otherwise it's the integral wrt time over that period). 

t1 ends when the counter rolls over to zero and toggles the flip-flop. So the count during the de-integration phase (t2) starts with the counter at 0 and ends when the voltage at the capacitor e0 crosses zero when the counter stops counting (some control logic is missing here for continuous conversions). 

The time it takes to get to 0 is proportional to Vin, and will be equal to the counter rollover time if Vin = -Vref, assuming C, R and the clock are stable. 

So if the reference is 1 volt and the counter is 3 BCD digits, the counter will hold the measured voltage in millivolts after the comparator gates the clock off. 

A full dual-slope converter typically has a bit more control logic for starting the conversion at 0 (eg. auto-zero) and to change the reference polarity if the input signal is negative rather than positive.