Address decoder design and memory tables (recommended books)
Now that you have put a little thinking time in, here's a suggestion to consider:







simulate this circuit &ndash; Schematic created using CircuitLab

That's (4) OR gates, (3) NOR gates (use one as the inverter), and (1) AND gate. Three 7400 series packages to achieve.

This is by no means the only way. (You could, for example, use three 7402 packages and only have to buy that one part, but the longest propagation delay would be longer.) Still, that's yet another way. (Unless I made a gross mistake I'm quite capable of making.)