Avoid in-amp common mode and ADC input protection
Putting a single element variable resistor into a wheatstone bridge inherently produces non-linearities and to reduce these you need to have the three other fixed resistors a lot higher in value than the 100 ohms of the PT100 at 0 degC.

This of course reduces yield i.e. the output voltage variation with resistance is significantly diminished. Another problem is keeping the excitation voltage stable. Given that you are using an ADC I would consider making a ratiometric measurement where Vcc both generates excitation and is used as the ADC reference voltage.

Another consideration is that the ADC input to your PIC will not be perfectly matched to produce digital zero at precisely 0 volts and digital full scale at precisely 5 volts. It may also not have great linearity (look up the INL figure of the PIC's ADC in the data sheet) - I have seen INL errors of over 10 LSBs in some PICs and, if it is a 10 bit ADC, this represents a 1% full-scale error.

Rounding up, I would use a 1k resistor to feed the PT100 from local Vcc and this will generate a voltage range of 454.5 mV at 0 degC to 525.6 mV at 45 degC. I would then use an op-amp to amplify this by 8 and this produces a voltage range of 3.636 volts to 4.205 volts at the ADC input. 

Sure, it only uses about 11% of the ADC range but that is still 116 LSBs and for a 45 degC range that is a resolution of 0.39 degrees.

If that appears too "klunky" then you might also consider that the PT100 accuracy may be worse. With some care you could re-scale the range by using a bias resistor fed into the inverting input of the op-amp: -



The above circuit (LH side for 117.47 ohms and RH side for 100.00 ohms) produces an output range from 455 mV to 4.561 volts i.e. less "klunky".

Non-linearities from the simple 1k/PT100 potential divider can be easily compensated by the PIC.