Understanding Flip Flops/Registers in Low Level
There are flip-flops and there are flip-flops.

The RTL (resistor-transistor logic) schematic you show is a simple bistable multivibrator that is either set or reset by pulses on the E1 and E2 inputs. For exmaple, pulsing E1 high will cause A1 to go low and A2 to go high.

"Elements of Computing Systems" is talking about a different kind of flip-flop: the master-slave edge-triggered flip-flop. Rather than being driven by pulses, this kind of flip-flop reacts to the rising edge of a (typically) square-wave clock signal. The output of the flip-flop immediately after such a clock edge matches the input right before that same clock edge. This is where the t and t-1 notation comes from.

In its easiest to understand form, the D-type master-slave flip-flop consists of eight NAND gates (or eight NOR gates in RTL) and two inverters. As you might guess, this gets cumbersome to draw as a schematic using resistors and transistors. It's much easier to draw the schematic for one gate, and then use a symbol to represent that logical function in higher-order structures.

However, in the days when computers were really built using discrete transistors, master-slave logic was relatively rare. Instead, multi-phase clocks were generated so that the simpler pulse-driven flip-flops could be used, keeping the overall circuit complexity down.