Does the 65C02S processor Reset Sequence require that its data pins be connected during reset?
My question is: do the data pins (D0-D7) need to supply the processor
  with an instruction during the reset sequence to ensure that the
  processor puts the address of the reset vector on the address bus  


You do not need to drive anything. The processor automatically reads the data from the specified vector location.    


  is the processor kaput?    


Is the processor working fine? is the application running? if yes, processor ist nicht kaput (Processor has not gone bad)  


Please check the sampling for a few more samples. is the logging of address data bus fine after or during normal code sequence?