counter that MSB toggles every 2 seconds
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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

----------------------------------------------------

entity counter is

generic (
  width: natural := 27;
  max_count: natural := 100_000_000     -- 50 MHz / 0.5 Hz
);
port (
  clock:  in std_logic;
  rst:    in std_logic;
  count:  in std_logic;
  Q:      out std_logic
);
end counter;

----------------------------------------------------

architecture behv of counter is           

  signal prescaler: std_logic_vector(width-1 downto 0);
  signal pre_Q : std_logic;

begin

    -- behavior describe the counter

  process (clock, count, clear)
  begin
    if clear = '1' then
      prescaler &lt;= (others =&gt; '0');
      pre_Q &lt;= '0';
    elsif (clock='1' and clock'event) then
      if count = '1' then
        if prescaler = max_count then
          -- This happens every 2 seconds; toggle the output flip-flop.
          prescaler &lt;= (others =&gt; '0');
          pre_Q &lt;= not pre_Q;
        else
          prescaler &lt;= prescaler + 1;
        end if;
      end if;
    end if;
  end process;    

    -- concurrent assignment statement
    Q &lt;= pre_Q;

end behv;