Delay calculation in CMOS devices
50&nbsp;% of&nbsp;VCC is where a&nbsp;typical CMOS input switches, so this corresponds to the time you would observe in an actual circuit.

Furthermore, output waveforms are not perfectly rectangular, and might have ringing:



So it is not really clear what you would mean with "100&nbsp;%".
(Similarly, fall and rise times are usually measured between 10&nbsp;% and 90&nbsp;%.)