Why use a multiplexer the select from GND and VCC instead of an Inverter?
The diagram is a literal representation of your code &mdash; if - else - end if in VHDL source code maps directly to a multiplexer in the hardware. No optimization has been performed.

If you were to synthesize this logic for an FPGA, both muxes would be implemented inside a single LUT (lookup table) that drives the input to the FF.