When do you release and re-aquire control over SDA around an i2c Ack?
Most of your problem is probably going to be due to the fact that you are setting these lines high instead of letting them float.  SDA and SCL go high because there is a resistor pulling them up to +V, not because they are driven high.  Many people don't realize that the clock line is also intended to be operated this way.

There's something else about the way you describe your logic that makes me think that while you see SCL transition to low as the event that latches the data, you seem to think that you return SCL to high afterwards.  I encourage you to think of the clock event more like this:


set up the data
raise the clock
wait an appropriate bit time
lower the clock


The way you are doing it, you can get into trouble in the following way:


you write SDA--let's say it's low.
you raise the clock, so SCL is now high
you release SDA because you want to read it.
SDA goes high if there's no ACK present


Surprise! You just created a STOP condition without realizing it.