Steps needed for low EMI PCB design
The first thing is to realize that EMI\EMC is an art not a science, the goal is to eliminate noise (one man's noise is another man's signal) and to pass regulatory if necessary. There isn't a checklist, its really dependent on the design.

Why is it an art? because each design is different and even the smallest differences (in parasitics or other factors) can make a big difference on whether the design works or passes regulatory. One method of doing things might work great for one design but not for another. It is usually easier (and less time consuming) to test then to model, but applying the rules will help understand what needs to be done to solve the problem.  

I'll go over the basics each could be a chapter, but things designers need to be aware of. If you don't recognize what they are then start doing some research on the topic. (This is not an all inclusive list, but I hope to hit most of the topics)

1) Parasitics. Every component has parasitic inductance, capacitance and resistance. Know what these are for each component and learn when the design needs to take them into account (Usually +50Mhz parasitics will come into play) 

2) Common mode noise, voltage running through a common pathway (ground, cables) can create noise on two loads.  

3) Return currents. The ground plane is not 0 ohms, it has parasitic resistance. Currents from devices return back to the source through the lowest impedance pathway  

4) Mutual inductance PCB traces, cables (any conductor with current) has magnetic fields, these will couple to adjacent conductors.  

5) Ground loops - don't create ground loops, there are many ways to do this.

6) Shielding, Shields stop electric fields (there is also magnetic shielding) Shielding can create its own problems if currents through shields are not accounted for (can cause ground loops and antennas)

7) Antennas, Everything functions like an antenna including traces, planes and cables. Find out when this will be a problem.

8) Split planes, for some designs it may be advantageous to split digital and analog planes, in others not.

9) Switching loads, whether it is a clocked\switching PCB trace, a DC to DC converter, a switching power supply or a PWM load. These will all generate copious amounts of noise on a wide range of frequencies. Impedance control will need to be implemented (remember that currents will take the lowest impedance pathway)