ALU Design in verilog HDL
As pointed out twice in my comments, you need to understand the squarer won't see the correct operand on the first clock edge after reset. This is because of the fact that you drive select_ALU_operands with the first clock edge. Turn on time delta expansion in your waveform viewer and you should see that select_ALU_operands gets the value of 0 after the first clock edge.

Either change your design to present a valid value of select_ALU_operands before the first clock edge, or add a "start" signal to your squarer and drive that "start" signal at the same time as your "select" signal. This would ensure your squarer doesn't start operating until its input is valid.

If this doesn't solve your problem, you need to post a minimal, working example of your squarer and an image of the waveform viewer during simulation.