Timer on PIC18 not getting close to desired interrupt period time
Stop and think about what it means to set timer 0 to FFh.  That means it will overflow and set the interrupt condition on the very next clock.  The clock is stopped for a couple of cycles when TMR0 is written, so this will occur 3 cycles (if I remember right) after the write.  How can you possibly expect the interrupt mechanism to repond that fast.  The return from interrupt (RETFIE) takes 2 cycles alone, and the entry into the interrupt routine at least another 2 cycles (it's essentially a call), then there is the code to save and restore context.  This is all overhead even if your application code does nothing.

Expecting a PIC 18 to interrupt every 3 cycles is rediculous, as even a cursory look at the datasheet should have made obvious.  Using a compiler on top of that only makes the minimum interrupt frequency that can actually be handled worse.

If you want to set up a periodic interrupt, start with timer 2, not timer 0.  That timer has a period register for exactly this purpose.

Even if you are stuck with timer 0 to create a periodic interrupt, you should be adding a value into TMR0, not setting it to a fixed value.  That way there is no accumulating error and the number of cycles from the timer 0 overflow to the instruction that writes it to a new value doesn't matter.