The method to get synchronous D-flip flop with three inputs,D,CLK and reset
Just take a CD4013, or whatever series you're working with, and pull the set pin low. 



From: TI Datasheet

Edit: Also from the datasheet: 


  A high level at the SET or RESET inputs sets or resets the outputs, regardless of the levels of the other inputs. When SET and RESET are inactive (low), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. The resistor and capacitor at the RESET pin are optional. If they are not used, the RESET and SET pin must be connected directly to ground to be inactive.