H-bridge tiny spike?
Looks like dV/dt. When for example the lower FET is being held off, but the upper FET is driven on, current will be driven from drain of lower FET through Cgd into Gate. If the gate circuit impedance is high enough, lower FET will be turned on by induced voltage across gate circuit impedance. The impedance will include Rg (like R6, R8, R9, R10) and driver resistance (for IR21xx parts is often ~ 10Ohms) and the rest of gate routing including back to the source. In your circuit it looks like there is a round about path from gate to source on the bottom FETs. Also, looking at the rise time of the gate voltage, there may be too much resistance. Are you sure Rg is only 4.7Ohms? If so, maybe that's too much.