What is meant by power well in IC terminology?
In the Intel terminology a power well refers to portion of the chip that is powered from a particular voltage rail. This voltage rail could be supplied from externally applied voltage levels on particular pins or it could be an internally generated voltage rail that is derived from another power rail. 

When multiple voltage rails are used on a particular chip reverse biased semiconductor diffusion junctions are used to isolate sections of the chip from other sections. The term "well" is used to describe the area within the boundaries of these isolation junctions. Safe operation of the chip generally requires that the most positive externally applied voltage rail be applied first followed by the next most positive and on down to the lowest. The reverse order is required for safe power down sequencing. Observing this proper ordering assures that the isolation junctions remain reversed biased at all times any applied voltage is over about 0.5V.