Decoupling capacitors on I2C interface + ESD protection
Err NO.

Spec is 400pF.

You should have 100nF between VDD and GND wires at each end of your I2C cable. This ensures that both these wires act as AC ground.

You should put VDD and VSS between SDA and SCL and not put SCL next to SDA or make them the same twisted pair.

I commonly put 47ohm in series with SDA and SCL. This does not affect the normal levels, but does limit current in some faults, and damp down high frequency ringing.

It is a good idea to use the reset pin on the mux to get the all-off state, especially if it goes off-board. If you have a bus fault, or noise induced bus deadlock on the active MUX output, then the mux can no longer be controlled, so you have no way to isolate that segment.

Series R depends on current, but also on presence of SMBUS devices (ttl levels) and/or isolator/buffers , both of which need much lower Vlo levels than the I2C spec of 30%. In particular bidirectional isolator/buffers use the voltage at one side to decide which direction the signal is going. You need to get to 0.5V for these. Ibus@3mA, this would be 83ohms each end of the bus before the chips output Vlo is considered. This where my 47ohm series value is arrived at. 

Note you can use up some of your 400pF in low pass filter caps on the chip side of the series R to reduce RF interference. (or in the C of zener diodes)