Teensy 3.2 SPI default MOSI no output
IIRC, on the Teensy 3.x the primary and alternate pins can only be switched as a group, not individually (i.e. no mix and match).  If you want to use the primary clock you must use the primary data pins.  The same goes for the alternates.

Edit: The above may only be true when using certain SPI libraries (such as the Teensy-specific ones whose names end in _t3).  As @crypton found, the alternate pins can (at the hardware level) be freely mixed and matched (refer to his/her/their answer for details).  Leaving this answer as-is for posterity.


After having taken another look at the MK20DX256VLH7 datasheet I see nothing that would indicate that this is a hardware limitation1.  However, I have run into similar issues in the past with this board so I suspect any issues lie in the SPI library, not the silicon.
1 Nothing in the datasheet mentions such a limitation and §10.2.4 note 2 (p. 207) implies that (alternate) pins can be freely assigned.