Negative Edge Trigger and Asynchronous Clear not working in ModelSim
As mentioned by user8352 in the comments: your problem is that you need to induce an extra delta cycle when you have updated valuebeforetribuffer (pro-tip: VHDL is case-insensitive). The quick and dirty solution is to add valuebeforetribuffer to your sensitivity list. At that point you're gravitating towards a bigger and bigger mess of a code, though.

Cleaner is:

p_main: process(clk, clear_n, enable_out)
  variable r_value_before_tri_buffer : unsigned(size-1 downto 0);
begin

  if clear_n = '0' then
    r_value_before_tri_buffer := (others=&gt;'0');
  elsif falling_edge(clk) then
    if c_p = '1' then
      r_value_before_tri_buffer := r_value_before_tri_buffer +1;
    end if;
  end if;

  if enable_out then
    q_out &lt;= std_logic_vector(r_value_before_tri_buffer);
  else
    q_out &lt;= (others=&gt;'Z');
  end if;

end process;


Other remarks:


I use numeric_std instead of the mess that is std_logic_unsigned
size downto 0 declares a vector of size+1
no need to have c_p in your sensitivity list if you only use it at clock flanks, also cuts down on your simulation time