EFM8BB1 - C2 Debugging Interface correctly connected?
You schematic seems to be correct. As you have said C2CK is shared with the RSTb pin and C2D is with P2.0 GPIO.

You have also added a pull-up resistor to the reset line, which is also correct and necessary.

If you look at the following picture you can see the same configuration. Apart from that in this case the debug pins are used later as GPIO and reset line driven by external host. But if you do not intend to do that, then the isolation resitors are not required.



I took this from Silicon Labs' application note, AN124:  Pin Sharing Techniques for the C2 Interface.

The value of R3 seems to be fine as well.


  The C2CK pull-up resistor R3 should be a maximum of 10 kΩ, and a value of 1 kΩ is strongly recommended.


Another application note which can be useful is AN127: Flash Programming via the C2 Interface.