PCIe high speed signal TX and RX routing with via
If you designed your PCB with a high-end tool like Mentor Graphics Xpedition, you can do a signal integrity analysis of the signals you're concerned about right within the tool set. This would be the best way IMO, as it would include all the stackup, trace, and via information.

You may be able to export your board stackup, layout, and routing information into a modeling/simulation tool like Hyperlynx.  Done right, the model would include all the trace/via information to give you a high-fidelity simulation.

You could use a 3rd party simulation tool and build up your signal trace/via structure by hand.  Key to getting this to work is to make sure the model you have for the via is accurate.

Finally, you could try to analyze your via as a stand-alone structure in a field solver like HFSS or CST Microwave.  This would give you the s-parameters for the via, which you could heuristically look at and make an assessment as to whether or not the via(s) are going to cause you any headache.  You also also chain together the s-parameter model of the via along with the trace in a tool like ADS and look at the results.  Again, the key here is to make sure the model of the via accurately represents what you're going to have on your PCB.

EDIT1 - Added one more idea

This falls into the "rule-of-thumb" category.  You start off with the rise/fall time of your PCIe TX and RX signals.  You then turn that time into a distance - the spacial extent of the edge. The formula for doing this is about 6 inches/ns (the prop time of the signal in FR4 board material) × rise time [ns].  So a signal with a rise/fall time of 1 ns has a spacial extent of ~6 inches.

The next step is to compare the spacial extent of your signal's rise/fall time to the length of the via (or any other impedance discontinuity).  If the via/discontinuity length is 0.1 inches, then its affects on your 1 ns rise/fall time signal is negligible.  If you keep the via length the same (0.1 in), and decrease your rise/fall time to 100 ps, then the length of the via is 16.7% of your rise/fall time, and starts to impact your signal integrity.

Note that using this rule-of-thumb alone does not tell you how bad (or good) your SI is.  But it can be used to assess whether to have to go to the more sophisticated/costly/time-consuming methods I mentioned earlier.