Is flash chip capacity really limited to the powers of 2?
The amount of silicon required to address less than 2n but more than 2n-1 pages/rows/columns/cells/etc is the same as the amount of silicon to address exactly 2n.  So the silicon usage efficiency is best at 2n.

Further, if you intend to put several of them together in a parallel access scheme, you will end up with gaps if each chip doesn't address 2n. 

There's little advantage to supporting sizes between 2n and 2n-1.

If you need to create a device with memory in the range 2n and 2n-1 then you will generally find that buying the 2n part is more cost effective than buying the 2n-1 part and a smaller part.  Manufacturers have the same issue when producing silicon dies.  Yes, they could make one, but it wouldn't increase their bottom line.