Is there a way to permanently assign 0 to one of an array of registers in verilog?
The following will work for both synthesis and simulation, and should work for both ASIC and FPGA designs as it doesnt need an initial block.
wire imNothing = 0;
always @ * begin
    theReg &lt;= imNothing;
end

This is basically equivalent to connecting theReg to the wire imNothing which is permanetly attached to 0.

Having said that, this doesn't stop you overwriting the value.
In the case of your comment, using an array for which some indexes you wish to always be zero, then the above would only work if you avoid writing to the register.
You basically have to manually add the checks as part of your code. For example if you are writing to a memory, you could do:
memory[addr] &lt;= (addr == ingoreAddr) ? 0 : writeData;