LTSpice simulate log amplifier
The circuit only works for positive inputs. Add an offset to your input to keep it above zero. Loops in XY plots can be formed by capacitance, but at 5kHz, it should be negligible, I can't explain the loops. Try slower input frequencies, if it was stray capacitance, the loops will change. Finally, the circuit inverts, so the output is negative.

Works in CircuitLab. If CircuitLab can plot XY directly, I don't know how, I have only been using it a few weeks. I exported to Excel and plotted it. 







simulate this circuit &ndash; Schematic created using CircuitLab



Edit: Based on comments from Kevin White, I re-ran at 5 kHz and a loop appeared. This confirms that stray capacitance can affect the results. Simulate slow and it works good.