How to drive pin to open drain/collector?
The transistors going to an output pin are referred to as the pin driver stage. So the term driven here means that the driver must do the thing described, in this case go high-impedance ('tri-state' for a logic gate output driver).
Your datasheet text states that this pin must be driven by an open-drain or open-collector output. These refer to the use of a FET output transistor or a BJT respectively in the driver. You have correctly deduced that this is a single output transistor that can drive a (logic) low connection to ground or a connection to 'nothing at all'. The latter is the high-impedance connection where the driver transistor is off and presents only a very high impedance to ground as the transistor will still let through a tiny 'leakage' current.
The '1.8 V' part means that the driver must be capable of withstanding 1.8 V across its transistor's drain or collector when the driver is high-impedance.
(Please expand your question to explain your situation, and what you have, for an answer on 'how can I achieve this'.)