DDR3 trace length: need a confirmation
It depends on how much margin you have.  At 1333, your bits are ideally 750ps wide.  In reality due to noise, reflections, edge rates, etc. you will have some smaller interval of valid data.  As long as the delay difference between your traces is not a significant portion of your data valid time, you should not have a problem.  Since your traces are so short, the PCB would have to be pretty poorly routed to get a significant delay difference .