Empty Netlist Vivado Design Suite
It's possible that all of your logic is being optimized away.  If your lop level module doesn't have any outputs or the outputs it does have don't change state, then all of the logic will be removed by the optimizer as it has no effect on the function.  The solution is to route out outputs.  For example, if you have an CPU core, try routing out the data bus.  Or even just part of it - say, the lowest 8 bits.  If there is an issue with the number of pins, simply XORing all of the outputs together and routing the result to a single pin is generally enough to prevent the optimizer from deleting everything.