How to create a 64 bit Carry Look ahead adder?
c_in is a 1-bit input, but is also defined as a 64-bit (too wide) interconnect. Lets rename the interconnect to carry and make it 5 bits wide; one bit for each of the add_16bit's c_in plus the final carry out.

You need to use range section. [i] only indexes one bit. To get 16-bits use [16*i+15 : 16*i] or use bit slicing (+:) [i +: 16]. Bit slicing  is explained on StackOverflow: Indexing vectors and arrays with +: and What is +: and -:?. The big difference is bit slicing can be used in procedural blocks and generate loops. The expanded form can only be used when i is a genvar or parameter. 

wire [4:0] carry;
genvar i;
for (i = 0;i&lt;64;i=i+16) begin : FA
  add_16bit FINALBITBLOCK(
    .sum    (sum[i +: 16]),
    .c_out  (carry[(i&gt;&gt;4)+1]),
    .a      (a[i +: 16]),
    .b      (b[i +: 16]),
    .c_in   (carry[i&gt;&gt;4])
  );
end
assign carry[0] = c_in;
assign c_out = carry[4];