GPIO Boundary Address confusion
Only the manufacturer would know the specific reason to that. But basically, if there is memory space to spare, it does not make much difference how the memory is allocated to peripherals.
But without further knowledge about manufacturer intentions, if you have 512MB of memory addresses allocated for peripherals, it would make sense to divide the area into large enough blocks to ease the memory address decoding.
For example in this case, the whole address range at 0x5000XXXX could be simply forwarded on to the GPIO bus, and then 6 upper bits of XXXX can access a single kilobyte to select which GPIO peripheral is to be accessed, and then the specific GPIO peripheral can use any amount from the low 10 bits to access up to 1 kilobyte of registers. It's just that some other peripherals may need more registers than a few, as GPIO peripherals are quite simple. For example, the USB peripheral has one 2KB range as it has the FIFO memory.