Avoid using HOLD and WP on SST25VF080B SPI Flash IC
The trailing "#" on the names of WP# and HOLD# is an indicator that they are active-low signals -- their functions are activated when they are driven low. They are both inactive when driven high, and this is borne out in their descriptions:


  As long as HOLD# signal is low, the memory remains in the Hold condition. To resume communication with the device, HOLD# must be driven active high…


and


  When WP# is high, the lock-down function of the BPL bit is disabled.


Pull both signals high with 1KΩ (or any similar value you have available) resistors. 10KΩ is a bit more than I'd feel comfortable with.

You could also tie the signals directly to VCC, but using pullup resistors makes it possible to pull the signals low later if needed.