Better way to divide voltage for input to an ADC DAQ?
Yes, an op-amp unity-gain buffer is a reasonable approach in the ADC does not have a high-impedance input. 

The minimum value of the sum of the two resistors is determined by how much current you can draw from the source without unduly affecting the accuracy. The power dissipation might also come into play if the resistors are low value. 

The maximum value of the two resistors paralleled is determined partly by how much error you can tolerate due to op-amp bias current and/or leakage. Also practical considerations (resistors of lower value tend to be more stable, at least down to 1M or 100K). For example, metal foil resistors are not available much above 100K. 

For relatively low accuracy applications, a few M ohms is fine, and the bias current error will depend on the op-amp you select. 

If you follow their app note on the op-amp part (looks like there is an error in the plain divider calculation) they suggest an OPA344 - bias current should be less than 1nA at reasonable temperatures, which implies (for &lt; 0.5LSB error on a 12-bit converter):

\$R1||R2 &lt; \frac{5.0}{2^{-9} \cdot 2^{13}} \approx \$ 30K 

Your 105K || 3.3M ~= 100K would have a bit more error at high temperatures, but still should be acceptable for most purposes.