I2S on dsPIC gets interrupt on both left and right channels, how to distinguish them?
Posting my comment as an answer, not because I crave the points or glory but just so it can be flagged as answered.
&quot;I don't know anything about this processor, sorry. Can you have it give you an interrupt on the falling wclk (for Right) and a different interrupt on the rising wclk (for Left)? If can't do that directly may have to route the wclk signal to an interrupt-capable pin.&quot;
Glad it worked out!