Choosing PLL Loop Filter Bandwidth and Phase Margin for Frequency Ramp Generation
A PLL uses integration to eliminate steady state phase error in a stable input.   Whereas with a ramp f input, there is a gain-dependant fixed phase-error ( as well as other variables)

Not having done FMCW RADAR before, may I refer to an excellent article.

It defines all the variables that affect BW , settling time and fixed phase error which is an indicator of Spectral Density noise BW that contributes (error and ) has both 1st and 2nd order sensitivity.

https://www.researchgate.net/profile/Frank_Herzel/publication/235919813_Phase_noise_modeling_for_integrated_PLLs_in_FMCW_radar/links/09e415142eb153c696000000/Phase-noise-modeling-for-integrated-PLLs-in-FMCW-radar.pdf

If the link does not work , search.. 

Phase Noise Modeling for Integrated PLLs in
FMCW Radar

Frank Herzel, Arzu Ergintav, and Yaoming Sun