What happened to Depletion region when biasing is Off after applying reverse biasing?
Depletion region exists without external connections or as well with external 0V bias. It's a balance state caused by different electron energy state structures in different materials and thermal motion (=diffusion).

Reverse bias widens the depletion region. We can easily think that nothing happens if we simply remove the connection to external voltage supply, the depletion region stays widened because no charge is inserted nor taken off. But nothing is fully ideal. There are minority carriers and some leakage current. The situation  returns to 0V balance - not in a second in every case, but finally it happens.

I have met junction FETs where the gate charge stays at least several minutes. That means the depletion region is several minutes substantially wider than in 0V state. In diodes the depletion region isn't practically observable, but in junction FETs it is. Simply connect a resistance meter between drain and source. Then apply a voltage between the gate and source, minus to the gate if the FET is N-channel type. Disconnect the gate, the resistance between drain and source can be high for several minutes until leakage currents discharge the gate.