cmos impedance calculations
For logic devices, frequency does not really play a part in impedance calculations; such effects happen at frequencies where the device would not longer be able to generate a proper (square wave) logic signal at the output. Impedance calculations are really DC resistance calculations.
Your output impedance calculations are wrong because the specified VOL and VOH values have an extremely small output current (&lt; 1 µA) as test condition. Use the IOL/IOH entries, and the VO test conditions in those lines.
To compute the input impedance, you also have to take values from the same line, i.e., VIN is either 0 V or 15 V.
The output impedance matters because it specifies how large of a load you can connect directly to the output. Also, a stronger output takes less time to (dis)charge a capacitance, which means that it can more quickly switch between voltage levels.