CRC implementation for ethernet
Your misunderstanding happens right at the beginning. The polynomial given as 0x7 (when given in normal notation) is at least a 4 bit CRC, the calculator you reference calculates an 8 bit CRC.

In the normal notation, the leading bit of the polynomial is 1 and omitted. So for an 8 bit CRC (if we want to check the calculator) the actual polynomial is not just 111 but 9 bit long: 10000011 1 because the leading 9th bit is omitted in that notation.

If I do the calculation with that:

11011010 00000000
10000011 1
-----------------
01011001 10000000
 1000001 11
-----------------
00011000 01000000
   10000 0111
-----------------
00001000 00110000
    1000 00111
-----------------
00000000 00001000


Voilá the result from the calculator pops out 0x08.

When dealing with CRCs they are always talking about polynomial division and not normal division with remainder.

I suggest you read up on the mathematics behind that and as you are interested in a VHDL implementation I guess that the computations are also quite useful.

The step a) corresponds to an init value in the calculator of all FF in case someone wonders. With that step added the result looks like this:

00100101 00000000
  100000 111
-----------------
00000101 11100000
     100 000111
-----------------
00000001 11111100
       1 00000111
-----------------
00000000 11111011


So the result is 0xFB. The calculator linked in the OP doesn't provide that value (not a standard polynomial it seems). This calculator allows to define a CRC yourself.
And if I use the CRC-8 polynomial and an initial value of 0xFF, the result is the following:



So the same as my hand calculation.