Normally closed mosfet circuit
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You can indeed use a PMOS keeping in mind the ratings (regarding VDS and  IDS). It should be oriented like you drew it: the body diode is reversed biased.
To turn on the PMOS, you need a lower voltage than Vcc on the gate of M2. This is achieved by adding resistor R1 (and R2) and a N-channel mosfet M1 which pulls the gate of M2 to the right VGS voltage when M1 is turned on by the uP.
R3 ensures M1 is turned off by default and therefore M2 is also turned off by default, unless the microprocessor turns the Control signal high.

In case of Vcc being lower than 15V, you can leave out R2. In case of Vcc higher than that, you should take care the VGS of M2 doesn't exceed -20 V (which applies for most mosfets, check the datasheet of your selected PMOS). R1 and R2 should make a voltage divider such that M2 is decently turned on (which is typically quite a bit higher than  VGS(th)!) So, in that case recalculate the values of R1 and R2 in that case.

EDIT
I initially understood the mosfet M2 should be turned off when the Control signal was logic low. It has to be the otherway around.
By default / when the Control Signal is 0V, M3 is not conducting and therefore the current through R4 turns on Q1. Q1 one pulls the gate of M2 low and therefore turns on M2.
When a logic high signal is applied as Control Signal, mosfet M3 shorts the base of Q1 to ground. Q1 stops conduction and M2 turns off.  







simulate this circuit &ndash; Schematic created using CircuitLab