No. of comparators in Parallel ADC
That ground is actually an error in the schematic. It should be a connection to VCC (logical 1).

The intent is that, when the SaH input is very close to analog ground, all of the comparators will output a logical 0. To activate the appropriate condition in the priority encoder (that is, the first row in the truth table), the D0 input needs to be 1. Otherwise, all inputs would be 0, which is an unspecified state.

Keep in mind that the priority encoder is a digital component, not an analog one. In this context, ground and VCC are primarily logical values, not reference voltages.