Are there errors in the CD4013B datasheet by TI?
This is the original logic diagram as drawn by Harris, from revision D (2005) of the TI datasheet:



There is indeed a wrong inverter.



A transmission gate is a closed switch when the positive control input is 1, and the negative, 0.

The RESET input goes both to the master section and, if CL is high, to the /Q output. When CL is low, a high RESET value makes the leftmost NAND gate output 1, which goes through the topmost transmission gate to /Q.