case statement without always
You can't. A case statement should always be in an always or initial block.

You have two choices if you don't want to use ternary conditionals. The first is use an always block which doesn't have edge sensitivity as shown below. This does not infer registers (that's not what declare the signal of reg type means), it infers a multiplexer with constant assignment - as there is no clock, so there is no register, the * simply means any input change.

reg WORD_OUT;

always @ * begin
    case (SELECT_BIT_IN)
    ...
    WORD_OUT = WORD_IN0;
    ...
    endcase
end


Alternatively specifically infer a ROM or multiplexer depending on what your input signals are (possibly instantiate a module of one). If the inputs are constants (like parameters), then your case simply infers a ROM. If the inputs are nets, then your code infers a multiplexer.