Signal distribution, buffers, rise times and EMC
How slow can the edges be before data becomes unrecognizable? That's probably a good place to start thinking. With a rise time of 1ns and 15pF, the output driving resistance is going to be about 20 ohm. However, you have put 33R in series with the drivers so that should have a marked effect on your rise times - it'll probably increase it to something like 2.6ns and if your clock is 12.3MHz (period of 81ns) a 2.6ns rise and fall time represents 6.4% of the period. You could probably increase rise/fall times to about 20% without much trouble.

This would mean a rise/fall times of about 8ns - this could probably be achieved with 150 ohms in the driver output but, would the receiving DSP chip receive sufficient logic levels?

It's not hard to change these things but will changing them make things worse or better for the adjacent audio board - impossible to say precisely - you're going to just have to try it is my recommendation.