Issues in schematic of Microchip LAN8720 & waveshare LAN8720?
The LAN8720A RXD0, RXD1, and CRS_DV pins configure various modes of the PHY on reset. Respectively, these pins are MODE[0], MODE[1], and MODE[2].

Since your Microchip schematic shows RXD0, RXD1, and CRS_DV pulled up, this will configure the LAN8720 for MODE[2:0]=111, as noted in the schematic. This configured the PHY for full auto-negotiation. When left floating, these pins are pulled up internally. 

The nINT pin is also used as a configuration pin, nINTSEL. When nINTSEL/nINT is pulled low, it will become a 50 MHz RMII REF_CLK output, REFCLKO. The LAN8720 chip receives its clock from a 25 MHz crystal oscillator, and generates the 50 MHz clock needed for RMII. When nINTSEL/nINT is floating or pulled high internally, the pin is configured as nINT. The LAN8720 does not generate a 50 MHz RMII clock, but instead must receive a 50 MHz clock from an external source.

The Waveshare board schematic does not show configuration resistors on MODE[2:0] (CRS_DV, RXD1, and RXD0, respectively) or nINTSEL (nINT). If you do not apply the configuration pulling resistors on your board, then the internal pull-ups on the LAN8720 apply and the Waveshare board will default as follows:


MODE[2:0]=111 Full auto-negotiation
nINTSEL=1 nINT acts as an interrupt, the LAN8720 will not output 50 MHz RMII clock.


Therefore, the Waveshare board should configure into the same mode as the LAN8720 reference schematic. However, the section of the LAN8720 datasheet regarding Configuration Straps recommends adding external pull-up resistors to augment the internal resistor when the pin will be connected to a load. This is to ensure that the pin reaches the required voltage level prior to latching, as the internal pull-up resistor is very weak (high resistance).

Note that these default configuration settings can be changed through the Serial Management Interface (SMI).