protecting ADC inputs
So let's take three real diodes, say the ubiquitous 1N4148 (or its also common SMT MELF version).
Now let's assume the ADC can tolerate 1K input resistance without unduly increasing error. Also let's assume the maximum input voltage is 25V. Doing a simulation:

It does limit the voltage typically to about 2.21V
Now let's see how it behaves with temperature at extremes -55/25/125°C
At -55°C it limits it to 2.58V with 25V in and 1.76V at 125°C.

On top of temperature variations there will be some variation from unit-to-unit.
Now let's look at accuracy. Suppose we have a 12-bit ADC and we want the clamp to add no more than 1/2 LSB inaccuracy typically at +125°C.
Well that's not going to work. Even if we limit the full-scale voltage of the ADC to 500mV there is still 22mV of error or about 4.5% error.
Typically, at 25°C if the full scale voltage of the ADC is 1V we will add 0.4% of error.
at 500mV about 250uV of error or about 2 bits worth on our 12-bit ADC.
So, it sort of works, but not very well, very consistently or very well over component variations and temperature. Low voltage zeners are horrible as well.
One simple approach in non-critical situations is to use a rail-to-rail op-amp buffer powered from the same rails as the ADC, and add series resistor allowing the op-amp protection networks to handle overvoltages (op-amps are usually more tolerant of series resistance than ADCs) . You can't expect good performance very close to the rails but other than that it works. One solution to the &quot;close to the rails&quot; issue is to supply the op-amp from slightly wider frails than the ADC, for example 5.25V and -0.25V rather than +5 and 0V.
An somewhat expensive but very effective solution is to use an op-amp or PGA that has the limiting function built-in.