Does RAM always use a big Mux to ‘read’ from its addresses?
A multiplexer can be implemented in several ways. You are assuming that the multiplexer is assembled from AND/OR gates (or NAND or NOR) but that is not how the output multiplexer for a memory is made.

These kinds of multiplexers use high-impedance (tristate) drivers onto a common bus. The control logic selects which inputs should be routed to the outputs and enables their drivers. The drivers for all other inputs are placed in a high-impedance state. This kind of design is done at the transistor level, not by wiring up AND and OR gates.

A similar scheme that you could investigate is called "wired-OR" logic.