Delaying a TTL signal
The Analog Devices / Linear Technology LT6993-1 (see circuit below) is a positive edge triggered pulse generator that has a resistor-programmable clock frequency and a resistor programmable divider value and polarity, with delays up to 33 seconds with ~3% accuracy.

An internal A/D converter converts the DIV input voltage into an 8 bit divider selector and a 1 bit polarity selector. The clock frequency and the divider value determine the output pulse width.  Large divider settings allow reasonably sized resistors to generate long delays.

The circuit below (from the data sheet) shows how to use two of the chips to generate a delayed pulse in response to the rising edge of an input pulse.  The resistor values would need to be adjusted to match your required delays.  Suggested DIV resistor values are shown in the table below the circuit.