Digital PLL behaviour when signals start off at the same frequency but out of phase
There will be an error voltage due to the phase error and, if the control loop uses an integrator then the frequency of the VCO will slightly increase to catch up to the correct phase of the reference signal.

Once it reaches the correct phase the phase error will be zero but the integrator (working from the error signal) will drive the VCO past the perfect phase point and what happens next is totally down to what other error processing mechanisms you have in place for instance: -


The overshoot of phase is small and gradually, after a few cycles of oscillating around the desired set-point, the error become pretty close to zero.
The "system" continues to oscillate with the average error being zero
The system becomes unstable


Without knowledge of the other components I cannot say what will happen but, the intention, I suspect would be to settle down to a zero error (indistinguishable from noise).