Emitter follower and input impedance
The high-pass filter will introduce a zero at \$f=0\$ and a pole at \$f=f_c\$ (the corner frequency of the high-pass filter). A pole and a zero will compensate each other, leading to a flat frequency response inside the frequency band.

The corner frequency \$f_c\$ is determined by \$C_{in}\$, and the parallel resistance of \$R_1\$ and \$R_2\$ (and for a small part the resistance seen at the base of the BJT). It can be found by analyzing the AC-equivalent circuit.


  
  It affects the input impedance. The input impedance now changes with frequency, and it's hard to maintain a constant low input impedance over such a wide range of frequencies
  


"Inside the frequency band" means for \$f &gt; f_c\$, in which case the signal frequency is so high that the capacitor will act like a short-circuit in the AC-equivalent circuit. The input impedance is therefore constant in the bandpass region, and equal to the parallel resistance of \$R'\$, \$R_1\$, \$R_2\$ and the base resistance of the BJT (usually very large because it is bootstrapped).


  
  It acts as an HPF filter and therefore adds another pole. In other words, if I want to have 20 dB/dec roll-off I must remove the HPF filtering of the buffer output (which in turn completely changes the design of the circuit).
  


As explained, the zero at \$f=0\$ will introduce an increase of 20dB/dec, and then the pole at \$f=f_c\$ will decrease it again with 20dB/dec, so the net effect is 0dB/dec.


  
  Low input impedance: ∼60 Ω (over a wide range of frequencies 80 Hz−80 MHz)
  High output impedance: ∼50 kΩ (over a wide range of frequencies 80 Hz−80 MHz)
  


I doubt that the required specifications want you to design for a small input impedance and a large output impedance though. Typically, a common-collector/emitter follower/buffer circuit tries to achieve the opposite: high input impedance and low output impedance.