24-bit two's complement division in AVR assembly
In the mode that you tried you are just dividing the byte value in each of the three registers by two. To get this to work for multiple bytes like r6:r5:r4 you need to code this in a way that propagates the low bit from the first shift into the next byte and similar for the next byte. The proper instruction sequence to perform this would be:

ASR R6
ROR R5
ROR R4


Read the description of the ROR instruction to understand how the CY bit is used to propagate bits from register to register during the above sequence.