Help with LTspice inverter simulation
Note the pulse supplies V2 and V3 are putting 5v into the base-emitter junctions of Q2 and Q4 with an unlimited current.  No real transistor would be able to survive that.
It is the base-emitter current of a transistor, which defines the emitter-collector current.  If you put 10mA from emitter to base, and the NPN has a gain of 100, then 1A should flow from emitter to collector.
To fix this design for simulation, resistors need to be used at each base, perhaps 100Ω.  Then, understanding that the base-emitter current of a NPN transistor defines the emitter-collector current, you must power the top two NPN bases from each side of R1, not ground.
An alternative may be to use PNP transistors in place of NPN for the top two.  Since PNP &quot;work with opposite voltages&quot;, pulling their bases towards ground &quot;turns them on.&quot;  I'll leave it as an experiment to see how these work for now.