Voltage notch behavior
Adjacent means two pulses that occur, temporal-wise, next to each other. Here is an example of cross-conducting for a half-bridge, a simple case for the sake of exemplification:



V1 and V2 should be complementary and for that V2 needs to be delayed by half the period (500 ms) compared to V1. The values within the small rectangles show the delay of each source, and for V2 you can see that the delay is 550 ms, thus 50 ms more than needed. In rest, the pulse width and rising/falling times are the same, which means that the pulses will look temporally aligned as seen in the upper plot (V(a) and V(b)) -- they overlap.

During that portion, both switches will conduct, resulting in a shorting of the power supply (here simplistically modeled with two capacitors). As a result, the waveform across the load will look as if would have a dead-time (lowerplot, V(x)), but the current through the switches will show the atrocities (lower plot, I(S1)): that big spike on top of the normal load.

For your case, the 3-phase voltage source should have at the very least some series resistance, such that when the cross-conducting current spike occurs, the increased voltage drop would be reflected back to the source, resulting in those "notches" you mentioned. What values you need, that's up to you to think for whatever case you have.

Note that the values I used are quite mild, 100 Ohms for the ON-resistance compared to 1 kOhm for load, and there's no dead-time, so that you can see the effect of cross-conducting while being able to compare it to the normal load, but in reality this error can result in indian circuits (something to do with the smoke).