Help me understand this high voltage amplifier circuit for driving a piezo actuator
Not too complicated.  Quite neat in fact:

Firstly:  Q5 is an inverting amplifier stage implemented in PNP;   

Then Q6,  is another inverting amplifier stage, but implemented in NPN;   these
two together,  give a high gain from the signal already amplified in the LF411.

But MJE340 / 350s are 300-volt-capable transistors,  so form a "final
amplification" stage - able to cope with +/- 300V rails - for the overall amplifier which is formed, by this stage cascaded after the LF411.    (But the LF411 can only cope with plus or minus 12v levels, hence it's supply rails).  

Q4 + Q3,  is a classic current mirror:  the base-junction-threshold voltages match,  so the current defined by Q4 and R3 as a collector resistor, means that Q3's base junction is just nicely biassed to deliver the same current in Q3 as Q4 has (= 2x Vcc / 1000000 A)  -  two microamps per volt on the high voltage rail pair (Vcc / -Vcc).

The second stage of transistor amplification,  Q6, thus sees the high impedance collector circuit of Q3 as a constant-current souce and R4 / R5 deliver a high-voltage (but-defined-low-current) -swing,  at the junction of R4 and R5;   

-- that node then drives Q1 and Q2 which are linked as a pair of opposed emitter-followers -- so Q1 conducts for upward swings and Q2 for downward;


net result, an amplifier with up to 600v output swing,  but at managed current (programmed by R3 mostly),  so that you can control the heat.   


High voltage stages like this can easily overheat unless you plan dissipation carefully - heatsinking likely to be needed.    Some detailed attention required to the thermal design.  

Quite an elegant design.  The discrete stage is modelled on the design practices analogue chips often use inside.  

PS:  R9 / R8 are the overall negative feedback defining the gain: which is set at 20 by their ratio.  

PPS:  Remember when trying to comprehend a circuit like this that the overall design is fundamentally defined,  by the negative feedback loop: the fact that the output is fed back to input through a divider guarantees, that the internal stages will align themselves controlled by that fact.  So when trying to make sense of each individual stage,  try not to think of it as "pushing or pulling a certain current" - rather recognise which are the amplifying and which the buffering stages, and see them as a cooperative set of functions delivering the desired result. (Here, there are two separate needs: (1) amplification, and (2) coping with the high-voltage swing.  So the output stage is designed to cope with (2),  and the transistor ampifier and current mirror - as a "final" stage to the operational amplifier,  deliver (1).