What is the standard way to represent fixed point numbers in VHDL?
If You'd like to implement fixed point arithmetics in synthesizable VHDL you have two ways:


Do It Yourself. It's rather hard method, but it may depend on quantity and complexity of equations You want to implement. Generally every "variable" should have two parts (integral and fractional) made of std_logic_vectors. Of course You have to implement basic (addition, subtraction etc.) mathematical operations.
Just download and use package fixed_pkg, it implements signed and unsigned fixed point types and all basic math - more here.


But first of all - do You really need fixed (or floating) point types? Most math could be done on std_logic_vector, just like we do in microcontrollers using int types.

EDIT:

Unfortunately, link to the libraries inside pdf guide from above link is dead. Someone delete the files. But it shouldn't be a problem - currently all ieee_proposed libraries are moved to standard VHDL2008, so just change the used standard in the properties of Your project.