How can I convert multiple Karnaugh maps into a logic gate circuit?
Do I combine all of the expressions (as in W+X+Y+Z or WXYZ)


No. What the equations show you are how to derive outputs for four separate pins. If you wanted to combine the four pins you should have done it earlier when coming up with the Karnaugh map (the Karnaugh map would then only have one output instead of four).

First step, treat the four as four separate circuits:

A ─┬───────────────┐
   │               │
B ──┬─[NOT]────────[AND]┐
   ││              │    │
C ────[NOT]──┬─────┘    [OR]── W
   ││        └[OR]─┐    │
D ────────────┘    │    │
   │└──────────────[AND]┘
   └──[NOT]────────┘

 .... implementation of other circuits left as homework

A ──[NOT]────────┐
                 │
B ──[NOT]──┐     [OR]─┐
           [AND]─┘    │
C ──[NOT]──┘          [AND]── Z
                      │
D ────────────────────┘


Second step, join A to A, B to B etc.. This is obvious because obviously A is the same as A etc.

A ─┬────┬───────────────┐
   │    │               │
B ──┬────┬─[NOT]────────[AND]┐
   ││   ││              │    │
C ───┬─────[NOT]──┬─────┘    [OR]── W
   │││  ││        └[OR]─┐    │
D ────┬────────────┘    │    │
   ││││ │└──────────────[AND]┘
   ││││ └──[NOT]────────┘
   ││││
   └───────[NOT]────────┐
    │││                 │
    └──────[NOT]──┐     [OR]─┐
     ││           [AND]─┘    │
     └─────[NOT]──┘          [AND]─ Z
      │                      │
      └──────────────────────┘

 .... implementation of other circuits left as homework


The circuit should be working at this point but if you're paying attention you may notice that some parts of the W and Z circuits are sharing the same logic. For example, we're using NOT on B and C twice. The next (optional) step is to refactor the circuit and remove redundant/repeated subcircuits and components:

A ───┬──────────────────┐
     │                  │
B ────┬─[NOT]──┬────────[AND]┐
     ││        │        │    │
C ──────[NOT]───┬──┬────┘    [OR]── W
     ││        ││  │         │
     ││        ││  [OR]─┐    │
D ─┬───────────────┘    │    │
   │ ││        ││       │    │
   │ │└─────────────────[AND]┘
   │ │         ││       │
   │ └──[NOT]─┬─────────┘
   │          │││
   │          └─────────┐
   │           │└─┐     [OR]─┐
   │           │  [AND]─┘    │
   │           └──┘          [AND]─ Z
   └─────────────────────────┘

 .... implementation of other circuits left as homework