Calculating latency for ADC chips
In all likelihood, the ADC will: -


Sample the signal
Convert the signal
Feed out the digital representation of the signal
Repeat


This means the latency is approximately the time between consecutive samples. More sophisticated ADCs could be (or can be) sampling the input signal whilst feeding out the digital value of the previous sample but, given that sampling is usually quite short I'd say you can use the inter-sampling time as the latency.