How to design a circuit that works on both negedge and posedge
There are a couple of ways to approach this.

One way is to selectively invert the clock before you use it in your logic:







simulate this circuit &ndash; Schematic created using CircuitLab

With this approach, if Clock edge select is 0, then the polarity of the external and internal clock is the same, and the logic operates on the rising edge of the external clock. On the other hand, if clock edge select is 1, the internal clock is inverted with respect to the external clock, and the logic operates on the falling edge of the external clock, which corresponds to the rising edge of the internal clock.

The other way is to simply implement both blocks and then select the correct output(s):







simulate this circuit

This uses more resources, but has the advantage that U1 and U2 can implement slightly different logic, if necessary. Both blocks are active all the time, but you simply discard the outputs from the "wrong" one.