How does this analog Op-Amp multiplier-divider work?
This circuit performs the calculations by using logarithms. This circuit is made more complex and difficult to interpret by sharing components to perform the equation.

It relies upon the exponential relationship of the current in a diode vs the voltage across it.

A1, A2 and the transistor Q2 generate a voltage at the output of A1 that is the log of the input voltage E1 (its actually a negative voltage with the magnitude being the log). A2 and Q1 create a voltage that is the log of E2 that is subtracted from the log of E1. This creates log (E1/E2).

A3 and Q3 form the log of E3.  It is added to the previous result to create log (E1*E3)/E2.

Q4 and A4 then perform the antilog of the A3 result to create the final answer (E1*E3)/E2.

Logarithmic amplifiers tend to be unstable with temperature, difficult to stabilize to avoid oscillation. Capacitors C1, C2 and C5 are there to stabilize the circuit.  Because the effective feedback through the transistors varies with the signal level the capacitors have to be chosen to stabilize the circuit for large input levels but then the capacitors are much larger than necessary at low input levels - resulting in long settling times.

Here is an application note that describes them in more detail Logarithmic Amplifiers.

Modern transistors are not optimized for use in such circuits and those that were are out of production, in particular a very low base resistance is needed for accuracy.

I have used log amplifiers to amplify currents from photodetectors where the signal could range from picoamps to milliamps which they can do in a single range.  Well designed circuits can work over 7 or 8 orders of magnitude. There are a few monolithic implementations for such purposes (for example AD8304)