How do I convert a Karnaugh map into a Logic gate circuit?
After an update to your question you came up with 



Here's the same equation you wrote but with "Y=" added to it for clarity:
 \$Y = \bar{A}\bar{D}+\bar{A}B+\bar{A}C+\bar{B}C\bar{D}\$

The equation is correct. 


  How do I convert a Karnaugh map into a Logic gate circuit?


Now, look at what the equation actually say, it says that \$Y\$ is equal to \$\bar{A}\$ AND \$\bar{D}\$ OR \$\bar{A}\$ AND \$B\$ OR \$\bar{A}\$ AND \$C\$ OR \$\bar{B}\$ AND \$C\$ AND \$\bar{D}\$

So let's just make that logic circuit three times in three different ways. 


Link to simulation.


Top left is the naive solution that implements the function blindly
Top right is when you move the logical NOT gates backwards and join them
Bottom is when you factorize \$\bar{A}\bar{D}+\bar{A}B+\bar{A}C\$ into \$\bar{A}(\bar{D}+B+C)\$


All 3 of them give the same output as the karnaugh map. All 3 of them are viable. If you have many NAND or NOR gates laying around then you can apply De Morgan's law and then you have a solution that uses NAND and NOR heavily and you can use up some NAND and NOR gates. 

The correct logic circuit for you boils down to what you are allowed to use or some other requirements/constraints on your project. Keep in mind that NAND and NOR gates usually requires fewer transistors to implement and are therefor usually the gates you want to use.