How to make NMOS resistance emulate a normal resistor?
Thanks to BeB00, Fredled and Bimpelrekkie's suggestions, I was able to figure out the issue.
The issue arose from a fact that I had embedded in my brain- drain in NMOS should be connected to a Vdd (high potential) and source in NMOS should be connected to ground (zero potential). Following this fact I forced the NMOS with an additional V1 (as in 3rd diagram).
The drain is not connected to higher potential because as such there is no drain/source because the terminals are symmetrical. Rather, the terminal that eventually is connected to the higher potential (not necessarily a forced battery) is called as drain and the terminal that stays at lower potential (not necessarily 0V) is called as source (for NMOS). However, care must be taken before considering interchanging of the terminals.
The second mistake I did was connecting the source to ground. The source had to be connected to the node of R6 and R5 and to the negative terminal of a battery. Now, you might think why negative terminal of battery, why not ground? Because, if you connect to ground your R6 resistor has ground on both ends making it obsolete (a resistor with same potential on both ends is similar to it not being there). It is then not the same as the circuit on the right.
Now, what does the negative terminal represent then? You can refer to difference between negative terminal and ground to understand the difference. Negative terminal doesn't have to be at 0 V unless ground. Only the difference between positive and negative terminal has to be the required volts you chose. Hence, that would make the R6 at some potential other than 0, thus not making it obsolete.
Correct schematic:

Resistance(Vds/Id) vs Vgs:

Same current in R3 and R5 at Vgs=3.5V:

Hope this is useful for others!