Why were bipolar junction transistors (BJTs) better than metal oxide semiconductor field effect transistors (MOSFETs) in the past?
Bipolar transistors had a head start of about ten years over MOSFETs so they were adopted first. They were, and remain today, somewhat less expensive than MOS to manufacture, at least for discretes, because they require fewer process layers. Although eclipsed by MOS for logic some time ago, bipolar devices and techniques are still widely used in power, mixed-signal and analog designs, and are still lower cost than MOS for 'jellybean' switching applications.
Bipolar held a speed advantage over MOS for a long time. Starting in the 1960s, through the 1970s and into mid-80s it was the go-to choice for high-performance computing systems. The CRAY-1 (1977) and CRAY-2 (1985) for example were built using ECL (bipolar) logic. A little lower on the food chain, the DEC VAX-11/780 and 11/750 used custom Schottky ASICs for their main compute units.
Meanwhile, MOS LSIs came to dominate where low power and high density were more important, such as small computers, consumer electronics and memories.
RAM Drives MOS Development
Since 1970 onward, MOS has been the leading choice for RAM, even through it was slower in the beginning than bipolar. The nature of RAM, a regular structure accessed by large multiplexers and decoders, lends itself to MOS' ability to make low-power latches and pass transistor structures, as well as DRAM charge storage cells. Intel was founded on these ideas, using MOS for its first two chips: the 1103 DRAM and the 4004 microprocessor (c. 1971).
It’s not an understatement to say that RAM and DRAM drove MOS development. RAM and DRAM fabs provided economies of scale that were soon leveraged across the industry for almost all IC development. This is still very much the case today.
Mead and Conway Revolution Democratizes IC Design with MOS
Lynn Conway and Carver Mead recognized this relationship to VLSI design and MOS RAM process technology, and so created a structured design approach based on MOS (c. 1979-1980). This seminal work opened up IC design to a much broader set of engineers, and launched an entire design automation industry that didn’t exist before.
Before Conway and Mead, ICs were largely designed by hand, a slow and error-prone process that tended to limit IC complexity and required highly specialized skills. Mead and Conway's structured approach allowed more designers to create larger and higher-performance designs, with less effort and greater chance of success with first silicon.
More about Mead and Conway
Seminal paper
And their book
Driven by the Mead and Conway Revolution, investment shifted towards NMOS and later CMOS process and tools development. The fabless semiconductor company business model became even more viable than before. Dozens of spin-offs and start-ups sprang up in the early 80's, and they overwhelmingly chose MOS. The early fabless companies used excess fab capacity at established players like Intel, H/P and IBM. Later, independent fabs like TSMC and Chartered (now GlobalFoundries) came online in response to fabless-company demand.
With this accelerated investment in MOS (especially NMOS) processes, speed and efficiency improved, ultimately overcoming bipolar logic performance about 1985 or so. Later, in the 1990s CMOS became dominant despite its higher cost, owing to its even lower power, higher speed and greater flexibility than NMOS. (PMOS was also used, but wasn't widely adopted.)
CMOS remains the dominant IC technology today. Most of the world's fab capacity is devoted to making CMOS. Nonetheless, bipolar is hardly obsolete. It's just different. Bipolar persists in analog, mixed-signal, RF and high-power applications for which MOS isn’t a good fit or costs more. The total market for bipolar devices is still huge, and growing.
In the end, MOS and bipolar complement each other, and when used together can solve problems that each alone can't.
Which is Better?
Contemporary CMOS technology is undeniably better for logic and memories than bipolar. Its rail-to-rail swing, high input impedance and near-zero static power consumption are impossible to achieve with bipolar logic. That's clear enough.
A big advantage of the bipolar transistor over MOS is that it works as a current amplifier (and a fairly linear one at that), so it doesn’t require a large voltage swing to drive. It has good small signal gain fidelity. This in turn makes it better for amplifying weak signals that require high gain, a benefit exploited for RF amplifiers for example. A MOSFET biased near its threshold (that is, linear mode) can do that too, but not as well: MOSFET near-threshold characteristic isn't as linear as bipolar.
On the other hand, MOSFETs (and their earlier cousin, JFETs) work well as impedance buffers, showing up often in RF and instrumentation signal chains (FET probes for example.) JFET- and MOSFET-input op-amps achieve near-infinite input impedance. A famous one is the JFET-input TL074.
For power devices, bipolar physically scales up at lower cost than MOS. Huge power drivers (like SCRs and other thyristors) are still use bipolar structures and processes. Even here, insulated-gate structures are making inroads in power devices, such as the insulated-gate bipolar transistor, or IGBT, which although more costly than a bipolar SCR or TRIAC is easier to drive and can therefore reduce overall system cost.
Bipolar devices are also considered more ‘rugged’ than MOS, meaning they are less likely to be damaged by over stress. This idea largely arises from MOS high gate impedance, which while normally a benefit, makes MOS more vulnerable to electrostatic discharge (ESD) and overvoltage from excessive drive. Bipolar devices are far less vulnerable to ESD damage given their relatively low impedance input, but can also be destroyed by excessive base-emitter current. Stated another way, it takes more power on the input to destroy a BJT than it does a MOSFET.
In response, many discrete MOS devices adopt built-in gate protection (itself composed of bipolar devices) so ESD damage isn't as much of an issue for them. Nevertheless, all MOSFETs - even protected-gate ones - can still be fried by gate overdrive if it exceeds the datasheet spec and overwhelms the protection.
Another MOS vulnerability (in particular, CMOS) is called latch-up. Latch-up can can occur if too much current is injected into the substrate, triggering the parasitic NPN/PNP pair into a self-reinforcing SCR loop. Bipolar ICs don't suffer this issue, as they have no parasitic structures. More about latch-up here.
Back to power transistors. One purported MOS advantage over bipolar is that it doesn't suffer from 'thermal runaway'. That's not really true: both MOS and bipolar can fail in thermal runaway if their dissipation limits are exceeded (especially trench MOS devices, owing to Spirito Effect.)
Nevertheless, MOS has some advantages in power handling. MOS devices are easy to connect in parallel, permitting power handling to scale up using an array of less-expensive devices, so it's easier to solve the thermal problem than it is for one huge bipolar transistor. They also have a lower 'on' drain-source voltage drop (in theory, zero) than bipolar collector-emitter (at least one Vce(sat), 0.25 ~ 1V or so). This further reduces thermal issues for MOS.
Here's an Allegro Micro comparison of MOS and bipolar power transistors
Whither Bipolar?
The larger trend is for remaining bipolar-dominant areas to be replaced by emerging process technologies like SiC, GaN for power and GaAs for RF, some using junction and others using insulated-gate, to further improve performance and system cost.
For ordinary digital and mixed-signal work there’s no advantage to using bipolar, except where the bipolar's small signal performance is useful or the equivalent MOS device is more expensive. In ICs it's always possible to build a bipolar on a MOS process where its advantages are needed (BiCMOS op-amps for example.)
One way or another, bipolar will be with us for a long time to come.