Crossing a single-cycle spike signal from a fast clock domain to a slower one
Convert that pulse to a level change (invert the output of a flip flop whenever a pulse is generated), pass that across with a couple of flip flops for synchronization, and convert the level change back to a pulse with a flip flop and XOR gate. This is called pulse synchronization with a toggle synchronizer, and it is a very common technique.  See: http://www.edn.com/electronics-blogs/day-in-the-life-of-a-chip-designer/4435339/Synchronizer-techniques-for-multi-clock-domain-SoCs .