Startup sequence of Microcontroller
The normal sequence (at least in all System-On-Chips I have worked on) is:


Power. Without power nothing works so that has to come first.
Clock but with reset active. 
That is because the reset has to be released synchronous to the clock otherwise you will have reset-clock violations on all your registers.  
Reset release Thus the reset is released (made inactive) last. 


A lot of that is hidden in a start-up module which has all asynchronous reset registers. From there you can then generate the reset (synchronous or asynchronous) for the rest of the circuit e.g. an ARM processor core. 



I use "reset active" to avoid having to distinguish between active low or active high reset. "Active" means the that device is held in reset. In more technical documentation you will often read about 'asserted' (the signal is active) or 'de-asserted' (this signal is inactive).

As to "reset-clock violations" This is the same type of timing violation as set-up and hold time for data. The reset-release and active clock edge are not allowed to change nearly simultaneous. It is an often forgotten requirement but you can find it in the datasheet of registers (e.g. a 74xx74).