CRC hardware implementation
The first example does in fact have the input xored with the output. It's just that the input has a pipeline register which will in essence delay the output by one clock cycle. It doesn't change the polynomial or affect the calculation, and could be removed.

The key difference is the number of registers between the xor gates. It is this that sets the polynomial.

In the second case you have three between the first xor gate and the second, giving you \$x^3\$. Then you have four registers between the second xor gate and the output, giving you \$x^3 \times x^4 = x^7\$. Thus you get the polynomial of \$x^7 + x^3 + 1\$.

In the first case you have two between the first xor gate and the second, giving you \$x^2\$. Then you have 1 register between the second xor gate and the output, giving you \$x^2 \times x^1 = x^3\$. Thus you get a polynomial of \$x^3 + x^2 + 1\$.