FPGA IP core vs. AFU
I interpret the question a little differently than the other answer.

An IP core is a general purpose processing unit.

An acceleration function unit is generally a term given to a block of IP that can not do general purpose processing. The most common example of this would be a graphics processing core. In that case, you can't send it generic code like you would with a general processing unit. It can only do certain things really well.

In either of these cases, an AFU or an IP Core can be either in asic form or in FPGA IP blocks. A general direction the industry appears to be going currently is to have hardware IP cores and AFUs as soft ip in an on-board fpga.