Why is there a PLL in CPU?
There are several reasons for this.  A phase locked loop, or PLL, is a circuit that is used to generate a stable frequency that has a specific mathematical relationship to some reference frequency.  Specifically, it is a circuit that is used to control some sort of electrically tunable oscillator (usually a voltage controlled oscillator, or VCO) so that its output is locked into a specific relationship with a reference frequency that is supplied by some sort of stable reference (usually a crystal, crystal oscillator, or silicon MEMS oscillator).

A PLL works by dividing down the output of the VCO and the reference input with frequency dividers, then comparing the frequency and phase of these divided outputs and adjusting the VCO control voltage until the frequency and phase align.

It is possible for a PLL to generate a much higher frequency than the reference frequency - for example, a 100 MHz reference can be multiplied up to several GHz.  If the PLL is integrated on the same chip where the high frequency output is used, this can save power and reduce EMI by lowering the frequency that is sent through the circuit board traces.  It also makes the board layout simpler.

Since the relationship is determined with simple frequency dividers and it is quite simple to build programmable dividers, it is very easy to change the output frequency of a PLL by simply changing the divider settings.  This can enable power savings using a technique called dynamic frequency scaling, where the frequency is adjusted based on the required processor performance to reduce power consumption.  It also enables software-based configuration of the frequency, which makes the design of the system much more flexible as software can decide what settings to use at boot time based on detected hardware (for example, looking at CPU socket pin strapping or reading out SPD EEPROM contents on RAM modules during boot).

In a modern CPU, there are going to be multiple PLLs present for providing the clocks for various components.  Modern CPUs have a high level of integration and so components that used to be located on separate chips are increasingly integrated onto one die - there is a lot more than a single processing core and a front side bus on a modern CPU.  The processing cores themselves will run on one or more clocks that are supplied by one or more PLLs so the core clocks can be adjusted easily, and possibly can be adjusted independently.  The PCI express interface will also require PLLs, likely multiple PLLs to support operation at different link rates.  Serial ATA connections likewise operate at a different speed and hence will have their own PLLs.  Same goes for QPI, hyper transport, USB 3, HDMI, display port, etc.  The memory interface likely requires a different PLL to generate the specific clock frequency that the installed memory requires.  All of these PLLs would use the same (relatively) low frequency reference oscillator on the motherboard.