Identification of hardware interrupts in microprocessor 8085
When you enable an interrupt on one of the 8085's RST5.5, RST6.5 or RST7.5 pins you will get behavior as follows:

RST5.5 is a maskable interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 2Ch (hexadecimal) address.

RST6.5 is a maskable interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 34h (hexadecimal) address.

RST7.5 is a maskable interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 3Ch (hexadecimal) address.

So you sort out which one caused the interrupt based on where the code execution flow branches.