How do MCUs and RAM wire up for programmatic access?
DRAM modules need a memory controller in order to both trigger refreshes and arbitrate access. That controller comes at a cost in wafer real estate, power consumption, and pin count.

SRAM modules do exist, but lose out to DRAM on both capacity (SRAM cells need 6 transistors versus DRAM's one transistor and one capacitor) and economy (lower demand = higher cost). But they're much easier to interface with, and almost every MCU family has at least one device with a simple external memory bus.