How to properly check/evaluate Multiplexer design implementation?
This sounds like you are trying to map a series of 8 16-bit signals to a 16-bit bus. The way to do it is to use an 8-bit MUX on each data bit i.e. 16 8-bit MUXs.

Think of each of the 16 MUXs as mapping one bit. So the MUX mapping bit 3 will take as inputs: bit 3 from signal 1, bit 3 from signal 2, bit 3 from signal 3 etc.

All the MUXs have their select lines connected together. So if you select the third signal, the bit 0 MUX will output bit 0 of the third signal, the bit 1 MUX will output bit 1 of the third signal etc.