simple counter in VHDL
The main problem is that StateMachine always has the value of counterDecr. Since it never changes, the combin process is never triggered.

The combin process should have all of the signals on the RHS (right-hand side) of any of its assignments &mdash; and no others &mdash; in its sensitivity list. It doesn't make sense to have it triggered by some other signal.

But a bigger problem is that a combinatorial process cannot have assignments in which signals on the LHS also appear on the RHS. Statements like counter &lt;= counter - 1; and test &lt;= not test; don't make any sense &mdash; they would never settle on a final value.



EDIT: I can't tell what your intentions are from your code, but if I needed an up/down counter, I would write something like this:

architecture Behavioral of myCounter is
  signal counter: std_logic_vector (3 downto 0);
begin
  process (clk) begin
    if rising_edge(clk) then
      if reset = '1' then
        counter &lt;= (others =&gt; '0');
      elsif clkEnable = '1' then
        if updown = '1' then
          counter &lt;= counter + 1;
        else
          counter &lt;= counter - 1;
        end if;
      end if;
    end if;
  end process;
end Behavioral;


Note that the only "state" is the counter itself. If I wanted to have a state machine that controlled the counting mode of the counter, that would be a separate module.

I don't subscribe to the "two process" method for state machines; it's merely more verbose and prone to error, as you have found.



EDIT: In response to your latest comment, I would do a divide-by-ten something like this:

architecture Behavioral of myCounter is
  signal counter: std_logic_vector (3 downto 0);
begin
  process (clk) begin
    if rising_edge(clk) then
      if reset = '1' then
        counter &lt;= (others =&gt; '0');
        output_pulse &lt;= '0';
      elsif clkEnable = '1' then
        if counter = "1001" then
          counter &lt;= (others =&gt; '0');
          output_pulse &lt;= '1';
        else
          counter &lt;= counter + 1;
          output_pulse &lt;= '0';
        end if;
      end if;
    end if;
  end process;
end Behavioral;