VIA in a pad VS Breakout VIA
Vias are often put in pads. There are basically two scenarios.

Bottom terminated components

For this purpose, I'm referred to leaded and leadless packages with exposed bottom ground pads, but could also include larger transistor packages such as DPAK. These packages are usually used on parts that need a low impedance ground connection, either for thermal or electrical reasons. They usually have 4-6 standard vias arranged in a pattern. Care must be used as they can wick solder off the pad during reflow. Other than that, there are few reasons not to do this.   

High Density Interconnect

Your example is an example of high density interconnect. Packages such as BGA, LGA, and WLCS are some packages that often require high density interconnect, but PCB space constraints can also serve as justification.

While it is possible to put a normal unfilled via in a pad, this is almost always a had idea for the average surface mount pad. The smaller the pad, the closer the drill hole:pad ratio becomes, and the more solder will be pulled off the pad, into the via. 

The alternative is a process called via in pad plated over (VIPPO). Generally, in fabrication the vias are treated like normal vias, where they are drilled and electroplated, the board then has the vias filled and undergoes an additional electroplating process to form a surface mount pad on the outer layers.

There are a few reasons not to do this. 


Cost, as usual. If you need one VIPPO, all of your vias need to be VIPPO. The cost of this process is rougly the cost of going from 4 to 6 layers. Not a huge penalty, but if the product is cost sensitive, this is often a killer. 
The resulting surface mount pad from plating over is not perfectly flat. This can be a big problem for BGA and LGA packages. The board house should have tolerances on this, and it should be compared against he flatness requirements in the part datasheets.