Why is NMI commonly pulled high on many ARM SoC schematics?
The Non-Maskable Interrupt (NMI) being low (=active) means that the CPU takes an exception immediately. If you don't need that functionality, you tie it high so that doesn't happen.
The CPU will likely wake up fine if the NMI is active, but takes an NMI exception while it is still processing the wakeup (which also shows up as an exception), so the NMI handler runs before the wakeup has properly reinitialized the system.
The other interrupts are disabled (&quot;masked&quot;) until the wakeup code enables them, but the NMI cannot be masked.
Unless there is a silicon error, you can probably write an NMI function that works, but it would need a lot of extra care, so external hardware that needs the CPU to wake up and handle an NMI immediately needs to sequence that correctly.
That is an unusual use case though, most people use NMIs only for hardware errors that are detected while the CPU is running.