What does an internal or external loop filter do for this clock IC?
Page 44 of 85 shows a 3 caps thus 3 different 1st order LPF’s filter chosen at different breakpoints . So that it starts as a 1st order LPF with R2C2 and then Xc2 drops below R2 at some frequency just below mixer f . This is essential for phase margin and jitter in the defined BW of 2x LPF BW, as 2nd order systems must never become 3rd order if loop gain >1 and the mixer converting frequency to phase error is already an integrator=k/s .

The other cap C1 is 1/10th  to 1/5th smaller typically to roll off when the loop gain &lt;1.  R3C3 is usually well past 1/f of mixer to reduce jitter further but not induce much phase margin due to phase shift at unity gain.

So it starts as a 1st order filter then flattens out near 0 order then the next LPF’s take effect when the gain is near or past unity gain.  The loop gain is affected by the choices of f, the product of MHz/V on the VCO and N divide ratio for multiplying the mixer f to VCO output and phase detector gain in V/cycle

These choices tradeoff jitter, capture to lock time, clock SNR and noise BW