cutoff state of transistor
If you're familiar with double-subscript notation, you have your answer at hand.

For example, the base-emitter voltage \$v_{BE} \$ is positive when the base is more positive than the emitter, i.e., for \$v_{BE}\$, the \$ +\$ sign is at the base node.

Likewise, the emitter-base voltage \$v_{EB} \$ is positive when the emitter is more positive than the base, i.e., for \$v_{EB}\$, the \$ +\$ sign is at the emitter node.

With that in mind, for NPN transistors, the equations are written in terms of \$v_{BE}, v_{CB}, v_{CE}\$.  By KVL, \$v_{BE} + v_{CB} = v_{CE}\$ so, if you know any two, you know the third.

Now, remembering the structure of NPN transistor, it is the case that the base-emitter junction is forward biased when \$v_{BE}\$ is positive and the base-collector junction is reverse biased when \$v_{CB}\$ is positive.

The cutoff region is formally defined as the condition that both junctions are reverse biased: \$v_{BE}&lt; 0, v_{CB}&gt;0\$

For PNP transistors, simply reverse the order of the subscripts and everything follows through.