Misbehaving CD4021BE Shift-in
After much further googling, I found an 'answer' of sorts. An Issue on the Arduino implementation of shiftIn() with a workaround:


  There is a workaround:
  If you turn the clock on before turning the control flag down, you avoid the extra positive clock transition.
   digitalWrite(shiftClock, HIGH);
   digitalWrite(shiftControl, LOW);
  I'm not sure if this is a bug or a missing feature. The problem is that the first bit is already on the Q8 output when first positive clock transition happens in shiftIn. I think this is what is described in the datasheet as "In the HCC/HCF4021B, the CLOCK input of theinternal stage is ”forced” whenasynchronous parallel entry is made".


I added a CLK high between the LATCH pulse and it now works:

void loop() {
  digitalWrite(LATCH, HIGH);
  digitalWrite(CLK, HIGH);   // Set clock high to catch first bit.
  digitalWrite(LATCH, LOW);

  data = shiftIn(DATA, CLK, MSBFIRST);
  ...
}


Just when I feel like I've actually started to get the hang of things I start hitting weird bugs in the libraries!