Interface Mobile SDRAM (1.8V) with 3.3V SDRAM controller
SDRAM can be a bit difficult to work with, and unless you have the tools, ability, and time to  debug things then it is not a good idea to use what probably won't work.  And by "tools", I mean an o-scope + probes that goes up to at least 350 MHz (1 GHz is preferred) and maybe a logic analyzer.  "Ability" means that you know the SDRAM protocol inside and out.  And "time" means at least several weeks to figure things out.   You might also have difficulty probing the BGA pins, too.

You cannot "overpower" an SDRAM, since that'll break it.  You need to convert the 3.3v signals to 1.8v, and vice versa, and you need to do it cleanly.  Basically, you need buffers that will do the translation (and match the signaling specification as well).  To make matters worse, some of these buffers must be bidirectional and they eat into your timing budget.  If your clock rate is slow enough you might get away with this.  Designing something like this requires at least an "intermediate engineer".  A newbe engineer just isn't going to cut it, given all the complex timing, termination, and control that needs to be done for the buffers.

Given that, the correct 3.3v SDRAM might not be looking all that expensive after all!  :)  There is something to be said about using the right parts in the right places.