Basic electronics: input currents of multi-port sub-circuits
It's a rather common model issue. Output comes from a controlled voltage or current generator which is referenced to global "0" ground node.

Global means it doesn't have to be explicitly "taken out" of the model, "0"s are just connected each other any hierarchy level they are.

Here's an excerpt from TI model file where (5) is the external output node


  EGND   99      0   POLY(2) (3,0) (4,0) 0 .5 .5
  ...
  RO1   8    5   63
  RO2   7    99  62
  ...
  VLIM  7    8   DC 0  


This can be turn into the following schematics







simulate this circuit &ndash; Schematic created using CircuitLab

Now, neglecting VLIM which is just a current probe to have I(VLIM) somewherelse, it is quite clear that a part (most actually)  of the output current sources/sinks from/to (0) global ground node.

That's why KCL seem to fail in your simulation. If you whish to take model's ground current into account you can just add a pin and rename all internal "0" nodes to this new connection.

All the above is a good lesson teaching "models are just models" they are all incomplete to some aspect. Awareness is key point in effectively using them