String manipulation in synthesisable Verilog
If you are manipulating strings that is going to be faster to do on a microprocessor than in hardware. However, for FIX you aren't really dealing with strings so much as you are dealing with numbers. Sure the fields are ASCII but you need to convert a lot of them from ASCII to numbers to make any sense of them (e.g. volumes).

I'm not sure that there are any Verilog libraries that will help you with string manipulations but basically, a Verilog compiler can understand ASCII and convert it to its bit representation, e.g. see this answer to Assign ASCII character to wire in Verilog.