Simple methods for synthesizing circuits
There is no simple method for synthesising circuits. Get experience is the most and least helpful advice I can think of at the moment. Ideally, that experience comes from attempting, failing, understanding why you've failed, rinse and repeat, but that can leave you stuck at zero. The next is to look at existing implementations (peek at the answers for simple cases) and try to understand what's gone on.

I'll see if I can give you not only a peek at the answers, but also some guidance as to how I would think with this question.

a) A sequential ... ... (time iteration), use shift registers

That means not parallel inputs, but something that works on part of the word at a time. Do you know what shift registers are, and what they do? If not, start with those.

A shift register is an implicitly addressable R/W memory. Every shift clock cycle, a word gets written at one end, and another word is available for reading at the other. The length of the register is a parameter, as is the width of the word, though often the word is assumed to be one bit wide.

b) an adder

Do you know how to add multiple digits with pencil and paper? That's sequential, with a carry from the least significant to the next significant at each step. So for instance the sum 456+789 in decimal using pencil and paper would be add 6 and 9, get 15, write down the 5, carry the 1, add 5 and 8 and the carried 1, get 14, write down the 4 ... eventually producing 1245. That's sequential addition, starting at the least significant word, propagating the carry between adds. Note that in this particular human-centric case, we are using a base 10 adder, that generates the carry above 9, a different size to any of the binary adders you will use in the syntyhesis.

c) using a full adder

A full adder accepts a carry in, and produces a carry out, essential for doing this a digit at a time, or iteratively

d) Using a 1 bit full adder

We only get to add one bit at a time, so set the shift register word (width) to be one bit, and make it at least 8 words deep. The shift registers present the lowest significance word to the adder, and the answer shift register accepts the LS word from the adder each clock cycle, just like the pencil and paper addition.

What do we do with the carry between digits? We need to record the output, so it's available as an input for the next bit. Which needs a 1 bit memory, like a flip flop (or a 1 bit wide 1 bit deep shift register!)

e) or using a 2 bit full adder

We can use a 2 bit word in our adder, so need 2 bit wide 4 word deep shift registers. How many bits do we need to store the carry out/in?

f) or using a 4 bit full adder

Make the shift registers 4 bits wide and at least 2 words deep.

bonus marks)

This has addressed only the addition, assuming both input shift registers already contain the numbers to be added. Any practical implementation will need to include some mechanism for loading the numbers into there. It could be the shift registers are loaded in parallel. ICs for that exist, like HC165, and of course you can write VHDL that does that. However, if the adder is being implemented serially, it is quite possible that you would want to continue the area saving of serial over parallel by storing and moving all data around serially. Just a thought.