Has anyone made a ~1pf cap on a PCB?
Yes, people (including myself) do sometimes use PWB traces to create capacitance or resistance.  Often the high tolerances create enough problems that its not worth the space/cost saved by not using a discrete component.
The particular capacitor you propose would likely have over 50% tolerance.

The tolerance on a trace width might be +/- 2 mils.  So (40%) for a 5 mil trace.
The thickness tolerance of the PCB might 10%.
There is tolerance in the dielectric constant in FR4.

A better geometry would be something a 50 mil x 50 mil square.  The copper feature tolerance would have much less of an impact and so the tolerance would likely be much closer to 20% in that case (rather than 50%).  Additionally a square would have much lower inductance.
There are PCB materials specifically sold for the purpose of creating &quot;embedded capacitance&quot; or &quot;embedded resistance&quot;.
https://www.3m.com/3M/en_US/company-us/all-3m-products/~/All-3M-Products/Electronics/Data-Center/Electronics-Materials/Interconnect-Solutions/Embedded-Capacitance-Material/?N=5002385+8709318+8709343+8710652+8711017+8734573+8743710+3294857497&amp;rt=r3
Embedded capacitance material typically has a higher dielectric constant than regular FR4, so you get more capacitance per square inch.  One typical application is to put the embedded capacitance material between the power and ground planes, so that the plane capacitance increases.  This can reduce the plane impedance enough that you can just put decoupling capacitors regionally rather than next to every IC.  This can potentially save a lot of capacitors.