Open Drain vs Open Collector
That's right, open collector is BJT, open drain (C)MOS. In logic circuits where currents are low the saturation voltage of the BJT may be a bit higher than the voltage drop due to \$R_{DS(ON)}\$ for the FET, but it still will be much lower than the maximum voltage for a logic low. 

Exception: you can't use a TTL open collector output as a level shifter to interface with very low voltage CMOS. This inverter can operate on a Vcc as low as 0.8 V, and the datasheet gives a maximum low level of 0.25 Vcc, that's 0.2 V. An open collector will have a voltage drop higher than that.
(This device even specifies a maximum low level input voltage of 0 V, which is simply impossible.)

note
Apart from wired-ORing (think I2C) open drain/collector is often used to control something operating at a different voltage than the logic, often a higher voltage. With some low-voltage logic families this no longer possible, since the FETs will not tolerate the high voltage and for that reason some families will have clamping diodes built-in to protect the output FETs.