Access NEON coprocessor from programmable logic in Zynq
The answer to this is: "sort of, but it's a lot of work".

The PS and PL on the zynq are interconnected using a number of AXI4 interfaces, with varying speed and coherency capabilities. These interfaces can be used as a mechanism to implement a register interface, or transfer data between the PS and PL. There is no inherently native way to pass-off processing to the PS purely because of the opposite natures of the PS and PL, but it would be possible to design a mechanism in between to covert the PL tasks into those the PS would be able to perform. This is where the "lot of work" comes in.

It would be necessary to split the work up in a logical way such that the processing performed is mostly suitable for the architecture (PS or PL) and that they are mostly kept separate from eachother. For example, the PL may pass some data off to the PS for processing, while it continues on the next round of data. 

This is an issue of design rather than anything else. It's necessary to use the supplied interfaces between PS and PL to optimise the use of both sets of resources in the optimal way for your application.