How does NAND reading work?
From wikipedia:

NAND flash also uses floating-gate transistors, but they are connected in a way that resembles a NAND gate: several transistors are connected in series, and the bit line is pulled low only if all the word lines are pulled high (above the transistors' \$V_T\$). These groups are then connected via some additional transistors to a NOR-style bit line array in the same way that single transistors are linked in NOR flash.
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To read data, first the desired group is selected (in the same way that a single transistor is selected from a NOR array). Next, most of the word lines are pulled up above the \$V_T\$ of a programmed bit, while one of them is pulled up to just over the \$V_T\$ of an erased bit. The series group will conduct (and pull the bit line low) if the selected bit has not been programmed.

In other words \$V_{on}\$ on the gate forces a transistor to conduct. While \$V_T\$ only makes the transistor conduct if the bit has been programmed. That way you can read each transistor's programmed state independently by pulling everything but the transistor you want to read to \$V_{on}\$ and the transistor you want to read to \$V_T\$.