power consumption with MIPI CSI-2 vs parallel interface
It's just the data bus used. The data processing on either side is the same, irrespective of the bus. I'd expect that to dominate power consumption.

While driving many LVDS lines certainly costs energy, I doubt that the difference to a single-ended interface of the same voltage difference is significant. On the contrary: on a single-ended line, you'd typically need a stronger driver, hence more power. But that's just a rule of thumb.

Now, it's clear that this is very much chip-specific. So, if the manufacturer or its datasheet don't tell you, build both and measure.

Or go with the MIPI interface. It's been designed for low-power applications.