SR Latch: Why reverse S and R in NAND and NOR if it reverses the outputs too?
Choice of what represents SET or RST in either circuit is really somewhat arbitrary and and up to the designer to choose. 

It is a relatively good idea to use the strategy that you suggested and have the SET input be the one that makes the Q  output go to a '1'. I can see no reason why you would do it differently unless that was some design choice in a particular circuit to do so. 

In the end I would not spend too much time trying to figure out the original motivation as long as you understand how both latches work.

On a final note you may want to consider drawing the dual NAND gate SR Latch with the DeMorgan equivalent gate symbols in that it makes it a lot easier to visualize the logic operation.