Understanding instruction branching
So, "bubbles" or stalls due to dependencies are inserted after the instruction decode of the instruction with the dependency (the BEQ). It seems you are comfortable with this. However, as a result, the rest of the pipeline (containing the second LW) in it is stalled as well. 

Consider it like this: it's not possible to stall an instruction and not stall the instructions following it. That would require two instructions to be in the same pipeline stage at the same time: if LW was not also stalled, then the EX of the BEQ and the EX of the LW would occur on the same clock cycle: not possible!