Sampling 133MHz bus with OWLS Logic Analyser
This is one of those situations in which you're going to want to set up your logic analyzer for synchronous sampling (external clock) rather than asynchronous sampling (internal clock). Connect the LA's external clock input to the SDRAM clock signal.

This way, each sample on the LA will contain one word of data from the SDRAM's data bus.

Yes, it's true that if you wanted to look at a clock waveform at 133 MHz, you'd need to have a sample rate of at least 266 Msps, but that's not what you're interested in here. Keep in mind that the data lines only switch high or low at the 133 MHz rate, so the fastest square wave you'll see is actually 67 MHz.