Transistor delay switch equal to a SPDT Relay
simulate this circuit &ndash; Schematic created using CircuitLab

Figure 1. SPDT CMOS time delay.

This circuit may do the trick.

The circuit is shown in its steady state.


R1, C1 form a 2s time delay on power-up. During this time delay NOT1 out will be high turning on SW1 and shorting out the TX and RX lines. SW2 will be open.
When C1 reaches 2/3 supply NOT1 out will swich low, turning off SW1 and removing the short. Simultaneously NOT2 out will go high connecting SW2.


The 40106 is a Schmitt trigger to give clean switch-over.