STM32 - Sampling ADC value at known regular time intervals
Prepend an external sample&amp;hold circuit to the ADC input. Create some hardware-based pacer (oscillator-&gt;counter) whose edge will disengage the S&amp;H from its signal source and trigger an interrupt in the MCU. The ISR latency in the MCU can then be somewhat relaxed, as the sampling point in time will be hardwired from the HW-based pacer... Remember to re-engage the S&amp;H by the MCU program, after an AD conversion has happend.
EDIT: the comment by @brhans is likely more to the point and more HW-specific than my general response.
I mean: modern-day ADC's (certainly those doing successive approximation) typically have an S&amp;H stage integrated, otherwise they wouldn't be much use (would require external components) = if there's an on-chip periodic timer/counter in the MCU that can trigger the on-chip AD conversion, it likely also disengages the S&amp;H as the very first step in the AD conversion process. If that's the case, indeed all you need to do is wait for the &quot;conversion completed&quot; interrupt.
Just in case you wanted a timestamp of the &quot;S&amp;H disengaged&quot; event, you would possibly need the timer (pacer) to give you a timestamp of the event... if at all possible. Or you could just increment the timestamp based on your knowledge of some initial time and the number of samples taken/elapsed. Not sure how precise a timestamp you can take intially, but the relative temporal precision of the isochronous / evenly spaced sampling points can be pretty good. The question then is, if your &quot;system wall clock&quot; runs along the same reference as the pacer clock = if they can deviate / wander against each other etc. The devil's in the details :-)