how does this op amp circuit 0-10V converter work?
Assuming that V3 can be 0 V or 3.3 V:
when V3 = 0 V, NMOS T4 is off and NMOS T1 will be on
when V3 = 3.3 V, NMOS T4 is on and NMOS T1 will be off
So with V3 either R3||R2 (|| means they're in parallel) are connected to ground or R8 is connected to ground.
As drawn, R3||R2 don't do anything useful as the voltage at the top connection is 5 V due to voltage source V4.
What would make more sense is that R3||R2 connects not to the left of R1 but to the right of R1. Then R1 and R3||R2 are a voltage divider that can be switched on/off with T4
In the same way R6 and R8 are a voltage divider that can be switched on/off with T1.
For large input signals, it might be useful to lower the signal going into the opamp, so voltage divider R1 and R3||R2 would need to be on (T4 is on). Then the voltage divider at the opamp's output can be switched off (T1 is off)
For small input signals it can be the other way round: input voltage divider is off but output voltage divider is on.

I tried to simulate it in Tina-TI BUT I didn't get anything in the
output.

What input signal did you apply? In the schematic you show there are only DC signals so there's &quot;nothing to see&quot;. There will only be DC voltages. To use a circuit simulator correctly: THINK what you think those DC voltage should be, then verify that in the simulator. If there's a difference, don't think: &quot;oh, I must be mistaken&quot;, instead keep digging until you find a real cause.