Complementary Transmission Gate Circuit
Keep in mind that the input to a CMOS gate represents a significant capacitance that stores charge. You can think of it as a capacitor connected to ground.

When TG1 is on (and TG2 is off), node Y charges to the same voltage as X. When TG1 turns off, node Y simply keeps this same voltage, since the charge has nowhere to go, except for leakage paths that might cause the voltage to droop slightly.

The two inverters drive the voltage on the bottom end of TG2 to nominally the same value as node Y (and node X). So, when TG2 turns on, there is no appreciable change in the voltage at node Y, other than that any "droop" gets eliminated &mdash; assuming that the voltage didn't droop so far as to cause the voltage at node Z to change.