The flash of STM32F10x cannot run at 24MHZ without latency stably?
The description of the Flash access control register (FLASH_ACR) (Page 59 of the manual here) states:

Bits 2:0 LATENCY: Latency
  These bits represent the ratio of the SYSCLK (system clock)
     period to the Flash access time.
  000 Zero wait state, if 0 &lt; SYSCLK≤ 24 MHz
  001 One wait state, if 24 MHz &lt; SYSCLK ≤ 48 MHz
  010 Two wait states, if 48 MHz &lt; SYSCLK ≤ 72 MHz


So it looks like the flash is referenced to SYSCLK which you have at 48MHz.