Altera Cyclone V - Linux & FPGA interrupt handling
The HPS bridge is designed to take FPGA interrupts and feed them in to the general interrupt controller (GIC) within the ARM processor. As far as the processor is concerned, interrupts from the FPGA are no different from interrupts from any other source. Just like the I2C or UART peripherals, FPGA interrupts invoke the same response in the GIC.

The Linux kernel has already been customised for the specific processor and interrupt controller. The kernel already knows how to react to an interrupt - it simply executes whatever interrupt handler (ISR) that has been set up by the kernel to handle a specific interrupt. In the event of an interrupt source that doesn't have a handler set up, it will likely have a default handler that silently disposes of the interrupt (likely by just ignoring it).

So how do you handle it? The same way any other interrupt is handled - a driver. You have to provide some code, driver software, that registers an interrupt handler for the specific interrupt source. For example there are already drivers provided for the I2C and UART peripherals, these will have interrupt handlers. 

There are many useful documents on the internet for driver handling, a quick Google search found this which seems quite good. From there we can see that interrupts all have a number, the handlers for which can be seen by running the command cat /proc/interrupts. In your case you won't see anything for interrupt number 73 (the first FPGA interrupt) as there is no driver set up to handle it.

TL;DR; You need to write a Linux driver. There is nothing special that needs to be done to account for the fact that the interrupt comes from the FPGA, that is already taken care of in hardware by the HPS bridge.