ST10F269Z2T3 abnormal Input Logic Levels
The table says this: -



Rephrasing what the table says: -


A definite low is registered when the input is as high as 0.2\$V_{dd}\$-0.1 = 0.9 V
A definite high is registered when the input is as low as 0.2\$V_{dd}\$+0.9 = 1.9 V



  While testing i discovered though, that the Controller detects a low
  from 1.38V downwards and a high from 1.53V upwards


Yes, that doesn't sound unreasonable but, signals that feed these inputs should have high levels above 1.9 volts and low levels below 0.9 volts to guarantee successful operation. What happens between 0.9 volts and 1.9 volts has no guarantees.

Consider the standard range of TTL levels: -



On the left is the valid range for TTL input levels and these encompass the valid range of TTL output levels (on the right). There is a non-greyed-out area between about 0.7 volts and 2 volts (input) and, if a signal is at that level then the input will interpret it as either a logic 1 or a logic 0. This is the keep-out area that is needed to guarantee that gates will work properly.