Compensating the forward voltage drop of a diode signal rectifier
The \$R_1\$, \$R_3\$ and \$D_1\$ circuit basically creates a 0.6V bias on the other side of the capacitor, so that a positive swing in the signal does not have to overcome a 0.6V hurdle.  \$D_1\$ and \$R_3\$ form a shunt voltage regulator. The 0.6V voltage is conveyed to \$D_2\$ which is on the verge of conducting, as a result. So only a small positive upswing from the input is required to bring it to conduction.  Because the input is capacitively coupled, it is pure AC. Its swings are additively superimposed on top of the bias voltage that exists on the other side of the capacitor. The 5V source is just from somewhere in the rest of the circuit. There is nothing special about it.

Perhaps you can get a different perspective by redrawing the circuit so that voltage falls from top to bottom. In this view, we highlight how the input is biased to 0.6V, but the output is 0.6V below that, down across the voltage drop of D1. So for instance suppose that the input creates a positive swing of 0.1V. This becomes 0.7V at the top of D2 (the whole point of the bias). At the bottom of D2, that swing is 0.1V again. D2 lets through enough current so that R2 has 0.1V across it.

A negative swing of 0.1V turns to 0.5V. But this cannot create a -0.1V output at the bottom of D2; that is nonsense because it is outside of our supply range. 0.5V is not enough to forward bias D2, and so the output is at 0V, pulled to ground by R2, which has almost no current flowing across it to create any voltage.

The purpose of R1 is to act as a flexible linkage to separate the reference 0.6 voltage, which is quite stiff, from the point where the signal is injected, which must on the contrary be free to swing about 0.6V. R1 also protects the diode from the input current swings. If we replace R1 by a wire, it won't work because the signal will try to move the voltage at the top of D1, whose cathode is pinned to ground. The input's positive swings will dump current through D1, abusing it. That creates a poor input impedance, resulting in an inability to generate the right voltage on or under D2.

On the other hand, if R1 is made large, the compensation diminishes, because the reference voltage is able to exert less control over the bias.







simulate this circuit &ndash; Schematic created using CircuitLab

To make it nicer for simulation, let us make the capacitor way bigger: 10 uF. Then we can use a nice, low frequency like 1000 Hz, which will not pass very well through a 100 pF capacitor into a less than 1K impedance.  Also, let's hook up a signal source with a 3V amplitude. If you run the time domain simulation, you will see that the output waveform is quite precisely chopped in half.