Transistor Based Wien Bridge Oscillator
J1 &amp; Q1 provide voltage gain which is buffered by the circuit contianing Q2 &amp; Q3. R7 provides feedback to regulate the voltage gain -- gain is approx (R6+R7)/(R6 + R13+JFET+...).

The circuit in the red box regulates the output amplitude. D3 and C6 (peak) rectify it, and as the amplitude increases, C5 gets charged more and more negative. This pulls the gate of the JFET more negative, and it turns off, thus (because it is in the denominator of the gain equation) decreasing the gain. The gain stabilizes at some (hard to determine) point.

C4 &amp; R17 (especially) provide some specific feedback to make the JFET 'resistor' more linear with drain voltage -- e.g. see this Vishay linearize JFEThttp://www.vishay.com/docs/70598/70598.pdf. This keeps overall distortion low(er).

Not sure what you have for R18 !