Shift register explanation (parallel in - serial out)
I don't understand what this SHIFT/LOAD is.


Each register has a 2-to-1 multiplexer in front of what is effectively its D input. This multiplexer determines whether the input is


the output of the previous register (thus implementing the SHIFT function)
the parallel input (thus implementing the parallel LOAD function)


(For the first register this would be the same thing, so to save pins &amp; logic area this register has only one input.)