VHDL configuration: Selecting architecture
I don't have a Xilinx ISE license running anywhere but do have a recent ghdl and gtkwave.  After insuring analysis of notgate before not_gate and because ghdl doesn't have an interactive shell for simulation I added a testbench providing stimulus:

library ieee;
use ieee.std_logic_1164.all;

entity test is
end entity;

architecture foo of test is
    component not_gate is
        port ( 
            ni:     in  std_logic;
            no:     out std_logic
        );
    end component;
    signal ni, no:     std_logic;
begin

DUT: not_gate
    port map (ni, no);

STIM:
    process 
    begin
        wait for 5 ns;
        ni &lt;= '0';
        wait for 10 ns;
        ni &lt;= '1';
        wait for 10 ns;
        wait;
    end process;

end architecture;

configuration config2 of test is
    for foo
        for DUT: not_gate
            use configuration work.config1;
        end for;
    end for;
end config2;


I saved your notgate, not_gate and config1 design units and appended the above test bench test all to notgate.vhd.  And:

ghdl -a notgate.vhdl 

ghdl -e config2 

ghdl -r config2 --wave=config2.ghw

gave:



This tells us two things.  1) Your configuration works and 2) there are alternative tools where configuration works properly.  

It tells us a third thing too, that you might need to do without configuration in the particular synthesis environment, but you can separate learning VHDL from a particular synthesis environment.

This was done with a gcc-4.8.2 version of ghdl (ghdl-0.31dev) running on OS X 10.9.1 and using gtkwave 3.3.53 (the OS X app version).