How does this circuit works for detection of Logic low, Logic High and Hi-Impedance state?
From the datasheet:


  When a charge cycle starts, the CHRG- pin  is  pulled  to ground by an internal N-channel MOSFET which is capable of driving an LED. When the charge current drops below the end-of-charge (IDET) threshold for at least 4ms, and the battery voltage is close to the float voltage, the N-channel MOSFET turns off and a weak 30&micro;A current source to ground is connected to the CHRG- pin. This weak pull-down remains until the charge cycle ends. After charging ends, the pin will become high impedance.


It isn't high/low/hi-Z, it's strong pulldown, weak pulldown and hi-Z. So,


When the strong pulldown is enabled, Q1 and Q2 are turned on, but Q3 is cut off. Only D2 lights up
When the 30 &micro;A pulldown is enabled, there's about 1.46 V across the BE junction of Q1 plus R1. Q1 is still on, but Q2 is cut off. Q3 turns on as well. Only D1 lights up.
when the CHRG- output is high-impedance, Q1  and Q2 are cut off. Q3 is on, but both D1 and D2 are off.