Is this BRAM being fully utilized if I use a different data width?
Correct, the remaining bits are unused.

This is something you just have to accept in FPGAs, you are never going to use all of the resources. It's the price you pay for configurability.

On the plus side, if at a later date you decide to add something like parity information or just make the data bus a little wider, you can do that essentially for free as there is space to add 8 more bits of width using the same memory.