No port matched and or doesnt connect to anything
After diving deeper in the RTL, I noticed some data lines were unconnected even though they were used in the code. So I can't explain what happened there, but I divided the code into 3 separate processes. And now they show up as connected, and even the SRAM module is being initialized.
I do want to find out why the synthesis ignored that code, but that's unrelated to the question. So I'll open a topic for that some other day, if I can't figure it out.