Is there anything inherently wrong whith this fpga project?
If you got a board which had a VGA connector (or rigged one up, with some resistors) you might find it simpler to start by driving an LCD with that interface, and then work up to a bare one.  

Block memory inside an FPGA tends to be easier to work with than SDRAM, and is dual port which simplifies access, but of course it's more limited.  Still, it could be worthwhile to start that way and then add the SDRAM complexity.  A higher gate count FPGA would typically have more block ram, too.  

Of course you can start by drawing some bars on the screen just using a state machine or counter without any frame buffer at all.

An oscilloscope would be a huge help.

Many LCDs actually aren't that picky about frequency, so while you can use the clock generators to get it just right, you may not need to.

An issue not to overlook is the practical task of securely cabling the LCD to the FPGA board - with 24 bit color there's a bit of work there unless you really luck out and you can just plug one into the other.