Static power of Xilinx FPGA
Any transistors in the FPGA that have power applied to them will consume static power, due to leakage through the transistor. Wires do not consume static power.

If you have a small design I guess that certain blocks would be power gated, which will reduce static power, but for anything that's used it will consume static power, which will increase linearly with the amount of 'stuff' used, mostly regardless of what it's used for.