Compiling a simple 2-input multiplexer with GHDL fails
The problem is in the if statement.

Unlike C, in VHDL you there is no shortcut that would evaluate any non-zero value to true and the rest to false. VHDL is much stricter here.

Here is the fixed code:

entity mul2 is
port ( a, b, sel : in bit;
       z : out bit );
end entity mul2;

architecture behav of mul2 is
begin

multiplex : process is
begin
    if sel = '1' then  --- see, if you do a proper compare it works
        z &lt;= a;
    else
        z &lt;= b;
    end if;
end process multiplex;

end architecture behav;