Cross-coupled logic gates and timing
It simply relies on the phenomenon called propagation delay. Consider the following circuit. When simulated, you'd find that it doesn't stabilize in either low or high state. It simply oscillates. If you were to probe such circuit in reality with a scope, you'd find that it's output has a somewhat fixed frequency - derived from the system's propagation delay.







simulate this circuit &ndash; Schematic created using CircuitLab

Getting a combinational circuit (like a gate) and feeding it with it's output often makes it sequential, that is history dependant, so to speak. What you have encountered is just a real world application of this very phenomenon - memory in this case.



It's noble from you to investigate these things from the inside, but in practice we often look away from the internals and behaviorally describe a flip flop based on what it does as a black box.