How can this negative voltage spikes be explained?
The negative spike is not due to inductance: when it happens, C1 is simply charged to a negative voltage, after which the current source charges it with positive current, and the voltage increases.

I'll bet on the current source transistor being a PMOS (or a PNP) which has drain-gate (or collector-base) capacitance.

Switching this transistor ON is done by bringing the gate/base down a few volts.

This leaks some charge through the drain-gate capacitance.

Since C1 has a very low value, a few pF drain-gate capacitance on the PMOS or PNP will be enough to change its voltage.

This circuit does not measure C1: it measure the sum of the capacitances of C1, the current source, the comparator input capacitance, Q1's collector capacitance, etc. Can't be helped!...

For the same reason, turning Q1 on leaks some charge through its Cbc, which explains the positive spike at the end of charge.