VHDL Compile Error saying "Type of VARIABLE is incompatible with
Welcome to how very strongly typed VHDL is. Unlike Verilog, you can't just use numbers together and have it work. Specifically, the VHDL types UNSIGNED and INTEGER are not compatible with the operations you have specified. Check out this set of lecture slides on VHDL arithmetic and look up the operations provided by NUMERIC_STD.

A fix may be to only use the UNSIGNED type and wrap constants in calls to TO_UNSIGNED(constant, width), ensuring matching types.