How can I properly control the CS and R/W inputs of the DAC7821 Digital to Analog Converter?
A better way to look at the two pins is that CS is the clock, and R/W is a mode select. Or vice versa - either way will work. In your case you can get away with what you're doing because t1 and t2 are zero. This is not necessarily true of all devices which use this approach. It's actually a terminology borrowed from static RAM operation. Within this larger group, 2 general approaches can be used - CS controlled and R/W controlled. You can use the CS to select one of a number of devices by decoding bus addresses, and when that has settled apply a write pulse on the R/W line. Or you can set the write line low and provide a CS pulse. It can be done either way, as long as the two lines are both low for some overlapping time, and the input data is stable when the first transition to high occurs.

Or, of course, you can tie them together as you've done. In your case, you should be aware that, although you probably can't see it, when you change the D/A input data you may well get spurious outputs. It depends on exactly how you're supplying the data. Let's say you provide new data, but the bits don't change at exactly the same time. This is actually a well-known phenomenon called skew. If a clock edge comes along at just the wrong time it will grab some new bits and some old bits, and the result will be (from your point of view) wrong. Of course, with a 1 MHz clock this erroneous output will only last 1 microsecond, so you probably won't notice it - but it's there. 

Even if you do ensure that all the data bits change at exactly the same time (which, traditionally, is what registers are used for) you're not out of the woods. Note t4 and t5. They are not zero, and they are not the same. Let's say you use a register to true up the transition of old data to new, but the data all changes 3 nsec before the rising edge of your clock. Depending on how you look at it, you've violated either your setup or hold time, and in either case the output you get may well be bad.