What is a two-hot decoder?
I'd expect the decoder to give you five outputs, two of which are on. A possible table:

I1 I2 I3 I4   O1 O2 O3 O4 O5
 0  0  0  0    1  1  0  0  0
 0  0  0  1    1  0  1  0  0
 0  0  1  0    0  1  1  0  0
 0  0  1  1    1  0  0  1  0
 0  1  0  0    0  1  0  1  0
 0  1  0  1    0  0  1  1  0
 0  1  1  0    1  0  0  0  1
 0  1  1  1    0  1  0  0  1
 1  0  0  0    0  0  1  0  1
 1  0  0  1    0  0  0  1  1


As you see, there are a few undefined states, because there are only \$\binom{2}{5} = 10\$ combinations with exactly two outputs active.

Another possible implementation could be:

I1 I2 I3 I4   O1 O2 O3 O4 O5
 0  0  0  1    0  0  0  1  1
 0  0  1  0    0  0  1  0  1
 0  0  1  1    0  0  1  1  0
 0  1  0  0    0  1  0  0  1
 0  1  0  1    0  1  0  1  0
 0  1  1  0    0  1  1  0  0
 1  0  0  0    1  0  0  0  1
 1  0  0  1    1  0  0  1  0
 1  0  1  0    1  0  1  0  0
 1  1  0  0    1  1  0  0  0


Here, the outputs 1-4 are taken directly from the inputs, and the fifth output is active exactly when only one of the others is.

There is usually little incentive for building a 4-to-5 two-hot decoder, because you only save one bit, so this is reserved for very special corner cases where you are short one I/O pin somewhere and cannot multiplex others either.