Extracting a sub array from an array of switches with Verilog?
You are looking for the slice operator.  You can read up on verilog in lots of places to get more details.   Here's a decent one.

Here's just an idea of some of the things you can do.  Read the tutorial at the link for more info.  

module part2 (SW, LEDR, LEDG, SINGLE_BIT_OUT, ANOTHER_ARRAY_OUT, REGISTERED_OUT);

  input [17:0] SW;    
  output [17:0] LEDR;
  output SINGLE_BIT_OUT;           // This is one bit.
  output [2:0] ANOTHER_ARRAY_OUT;  // This is 3 bits.
  output reg [3:0] REGISTERED_OUT; // A 4 bit registered output.

  assign LEDR = SW; 
  assign SINGLE_BIT_OUT = SW[17];       // Continuous 1 bit assignment.
  assign ANOTHER_ARRAY_OUT = SW[11:9];  // Continuous 3 bit assignment.

  // Or you can use an always block to do more fancy stuff
  always @(SW) begin
      if (SW[2:0] == 2'b000)
         REGISTERED_OUT = 4'b0010;  // Just put a constant to it in this case.
      else
         REGISTERED_OUT = {1'b0, SW[2:0]};  // Or you can build assignments with slices like this.
  end

endmodule