xilinx create schematic of top modul with lower level moduls
Xilinx ISE 14.7: Design tab -> Synthesize - XST (expand node) -> View RTL Schematic.

Alternative: menu Tools -> Schematic Viewer -> RTL...

RTL Schematic (Register Transfer Logic) is the generic, hierarchical schematic in terms of combinational logic and flip-flops.  The other choice is Technology Schematic, which shows how the logic maps to device-specific low-level elements such as slices and IOB.