Connecting unused logic gates
Like others have already said (I'll just be a little more elaborate), unused CMOS input pins must never be unconnected, because they tend to float towards the dangerous region which is in the middle between VDD and GND. The input pin invariably is connected to another complementary MOS pair's gates, and the process parameters are often optimized for performance so that both the high side and the low side will start conducting a little earlier than in the exact middle point. So in this "middle gray area", both the high side and the low side FETs will conduct some electricity, which results in current consumption, or in some cases, even oscillation if there's a positive feedback path to be found somewhere. 

The easiest case and electrically the most stable case is to connect all unused CMOS inputs to ground. But in microcontrollers this can be a little dangerous, because software may make use pins as inputs or outputs. A software update might then make an output from a pin which has previously been unused. In this case, the safest option is to use separate pull-down resistors for each pin. If that is too costly due to the number of resistors and PCB space needed, you can also connect a group of adjacent pins together and pull them low with a single pull-down resistor. In that case, the extra current consumption caused by the surprise software change is usually not that big a problem.

In your specific case of using a hex inverter, there is yet another possibility, which is often used. You can connect the unused inverter inputs and outputs together with some inverter, which is used in the system: connect several inverters in parallel. This is often done to increase the drive capability and thus speed of the inverter, especially when driving large MOSFET gate loads.