Connecting potentiometer to an FPGA simply
From your original equation we can elimate the division like this:
$$
  \begin{align}
  Setpoint_{RPM}&amp;=ADC_{POT}\cdot\frac{Range_{RPM}}{2^N-1}\tag{1}\\\\
  Setpoint_{RPM}&amp;=ADC_{POT}\cdot K\tag{2}
  \end{align}
$$
where K is a constant that can be pre-calculated to get rid of the division:
$$ \frac{100}{255}=0.3921568627450980392156862745098\tag{3} $$
For fixed-point binary (aka Q-notation), we multiply the top and bottom by \$2^Q\$:
$$
  \begin{align}
  Setpoint_{RPM}=\frac{2^Q\left(ADC_{POT}\cdot K\right)}{2^Q}\tag{4}\\\\
  Setpoint_{RPM}=\frac{2^Q\cdot ADC_{POT}\cdot K}{2^Q}\tag{5}
  \end{align}
$$
In binary, \$2^Q\$ is simply a shift by Q bits: left for multiply; right for divide.
Since,
$$ 2^Q\cdot K\tag{6} $$
is also a constant, we can pre-calculate that as well.
Let’s choose 16 for Q which means 16 binary places after the binary point:
$$ 2^Q\cdot K=2^{16}\cdot\frac{100}{255}=25700\tag{7} $$
rounded to the nearest integer.
So now we have:
$$ Setpoint_{RPM}=\frac{ADC_{POT}\cdot25700}{2^Q}\tag{8} $$
There is a snag, however. When shifting right by Q bits, all the binary places after the binary point get chopped off which introduces a rounding error, but there’s a simple fix by adding one half in the Q domain before performing the shift right:
$$ Setpoint_{RPM}=\frac{ADC_{POT}\cdot25700+\frac{2^Q}{2}}{2^Q}\tag{9} $$
And now for the VHDL, which in essence is:
setpoint_rpm &lt;= (adc_pot * Q_K + Q_HALF) srl Q;

And here's a fuller example:
function &quot;srl&quot;(constant a, q: in natural) return natural is
    variable u: unsigned(30 downto 0);
begin
    u := to_unsigned(a, u'length);
    return to_integer(u(30 downto q));
end function;

constant RANGE_RPM: natural := 100;
constant ADC_BITS: natural := 8;
constant Q: natural := 16;
constant Q_RANGE_RPM: natural := 2**Q * RANGE_RPM;
constant Q_K: natural := natural(real(2**Q) * (real(RANGE_RPM) / real(2**ADC_BITS - 1)));
constant Q_HALF: natural := natural(real(2**Q * 0.5));

signal adc_pot: natural := 128;
signal setpoint_rpm: natural;

...

setpoint_rpm &lt;= (adc_pot * Q_K + Q_HALF) srl Q;