Is it possible to power down all the PLLs and VCO of a MAX 10 Device?
Does it mean that without instantiations of a PLL in the design we can assume that all the VCO are powered down


Correct. Or at least, it's powered down to the point of being "completely disabled".


  or do we also need to connect to GND the VCCA pins?


No. As you've noted, these pins must always be connected to power. Grounding them is likely to damage or destroy the FPGA.