What is this circuit called?
It's an edge detector.
'out' pulses logic high when the switch is opened or closed. The pulse period is determined by C1, R2 and R3.
R1 pulls the upper XOR gate input logic low when the switch is open. D1 blocks the C1 voltage from reaching R1 at that time.
For a practical circuit, the resistor values are very high. The input leakage values of the logic gates are usually microamps so a 10M pull-down may well not reach the logic low voltage. That leakage current will affect the timing constants derived from R2//R3 and C1 when on a switch press and of R3 and C1 on a switch release.
Similarly, the reverse leakage current of D1 may become be enough to produce a significant voltage drop across R1.
As a rough and unsubstantiated guide, I would expect these resistor values to be all less than 100K in a real design. That may make C1 impractically large but that depends on the (undefined) application requirements. However, you can use a small C1 value to generate a short 'out' pulse that triggers a better monostable producing a longer final pulse.