Question on output of an FPGA
You are correct in your understanding. The [0/1] represents a 1-bit ROM (or Lookup Table). Each of these 1-bit ROMs are programmed by a bit-stream when the device is turned on in order to configure the behaviour of the logic.

In this case all four 1-bit ROMs can be programmed to allow all possible outputs based on the two inputs to be configured.

For example if you set the value in the four ROMs to [0 0 0 1], you would form an AND gate. Set to [0 1 1 1] you form an OR gate. You can make any of the sixteen possible outputs.

In terms of solving the question, I presume you are given more information as to the value in the ROMs.