What's the cheapest way to make a dithered-input ADC?
You don't need to use a noise source, you can generate a square wave and filter it to be a triangle wave. Make the amplitude just a little more than 1 LSB and make the frequency significantly above your highest to be digitized but not so high that you lose time resolution with your base sample rate: -



The triangle wave causes the ADC's D0 bit to be 1 for about 20% of the time when Vin is zero. If Vin increased from 0 volts to say 0.25 LSB, D0 would be 1 for a longer period of time. This is a form of dithering and is probably more easily translated to a practical solution because you can use a spare IO generating a square wave and RC filter to a approximate a low amplitude triangle wave.

There are many variations of what I've decribed above and my suggestion is just an example. For instance, here's an article that gives a little more detail: -



It shows an analogue signal of amplitude 116.357 dithered with a triangle wave producing a count of 117 for 35.7% of the time and 116 for 64.3% of the time. So if you have good time resolution in your sampling you can trade this against poor amplitude resolution.

It's the same idea for sigma delta ADCs - you counter poor amplitude resolution by having great time resolving ability. It also goes right back to early ADCs that used a digital ramp and a comparator: -



In effect, the digital ramp generator is the dither signal and the comparator is resolving whether the net signal of dither plus Vin is above a certain threhold or not.