Digital Circuits (GATE)
It depends entirely on what logic family the gate comes from.

If it's a TTL gate, the output will be high, because any input above about 0.8 V is considered high.

If it's an HC family CMOS gate, in principle there's no guarantee what the output will be. To be a valid high input, the voltage must be at least \$0.7 \times V_{dd}\$. Realistically, 3.3 V will always be effectively high, and the output will be high, but specifications like propagation delays will not be guaranteed.

If it's an ECL gate, 3.3 V is too low to be a valid logic high and the output will be low (low being a voltage between \$V_{cc}-1.95\$ and \$V_{cc}-1.63\$ for the MECL 10H family).

Of course there are many other logic families, so you should be sure you know which one you are using when trying to answer this kind of question.