Implement \$AB \overline{C}+\overline{BC}\$ using only a maximum of three 3-input NAND gates only
If the two inputs of a NAND gate are 'A' &amp; 'B' and the output is y. Then;
\begin{equation}
y=(AB)^{'}
\end{equation}
Now any gate can be replaced by NAND or NOR gate.
  

In row 1, you can see that a NOT gate can be expressed by a NAND gate.  

For row 2; The output of the two-input AND gate can be written as: 
\begin{equation}
y=AB = ((AB)^{'})^{'}
\end{equation} 
This means an AND gate can be constructed by a NAND gate + NOT GATE (which can also be made by NAND gate).  

For row 3; The output of the two-input OR gate can be written as: 
\begin{equation}
y=A+B = ((A+B)^{'})^{'} = (A^{'}B^{'})^{'}\space{};\space{}\space{} Using De Morgan Law
\end{equation} 
This means an OR gate can be constructed by Two NOT gate(which are made by NAND gate) + NAND GATE.  

I won't solve your problem. Just shown you how to approach.