How to choose between little endian or big endian for the processor settings?
Incidentally, I know of an argument that historically favored little-endian format: in a number of CPUs, most notably the 6502, code could run faster using little-endian format than would have been possible with big-endian.  Consider, for example, an instruction:


$1234:  LDA ($8A),Y ; Load byte from Y register plus the value stored in $008B-$008A
Assume $008B-$008A hold $5432, and Y holds $10


The execution sequence is:


$1234 read $B1 - Fetch opcode
$1235 read $8A - Fetch operand
$008A read $32 - Fetch LSB of target while adding $01 to $8A
$008B read $54 - Fetch MSB of target while adding $32 to $10
$5442 read $XX - Fetch byte from target


The MSB and LSB of any address to be read or written must be either based on a computation done in the last cycle with values already in the CPU, or else must be the last fetched value verbatum.  The third cycle can read the first byte of the target address (i.e. $8A) without delay; if the processor wanted to read the second byte first, it would have to waste a cycle computing the address.  The fourth cycle can compute the LSB of the target address while fetching the MSB; if there's no carry out of the LSB, the LSB (computed) and MSB (fetched from memory) will be ready simultaneously.  If the 6502 were big-endian, it would be necessary to waste a cycle on every indexed access (instead of only losing a cycle when indexing crosses a 256-byte boundary).

I'm unaware of any processing advantage to big-endian format beyond the fact that it was arbitrarily chosen as the "standard" network byte order.