Measuring power consumption of VHDL code
Normaly there are some spreadsheets supplied by your FPGA maker to estimate the power compsuption based on clock speed and resource usage.
I never managed to get them to work thought :)

i suggest you get your VHDL code synthetised , and then make it run in a dev board (same FPGA model &amp; speedgrade), then measure the consumption of your "code".

this will give you an estimate, remember , always apply a tolerance factor to your results.