The precise reason why DRAM is slower to write than to read?
Yep, it's still the case. The principle behind DRAM is that of a capacitor (simply, 1 small transistor and one large one), while that behind SRAM is a latch, made from a few (more) transistors. DRAM has more capacitance. If you assume they have equal* input impedance, then it's straightforward to see that the DRAM RC-delay is slower than that of SRAM.
DRAM is cheap, though, so we still love it. SRAM is awesome, so we love it, too.
DRAM:
(source: emrl.de)
SRAM:
*(They likely won't -- it's really matched to its reading circuitry, but who cares.)