Why does the Collector-Base Junction need a lower magnitude voltage to be forward biased compared to the the Emitter-Base Junction?
When transistor is in active state the Base-Collector junction needs to be zero or reverse biased. When \$V_{BE}=0.7V\$ and \$V_{CE}=0.3V\$ you get \$V_{BE}-V_{CE}=V_{BC}=0.4V&lt;0.7V\$.

It's not important for Base-Collector junction to be forward biased hence your confusion.\$V_{CE}\$ can be as low as \$0.2V\$ (\$V_{BC}=0.5V\$), and transistor would still be in forward active region. You just need to make sure Base-Collector voltage doesn't go over \$0.6-0.7V\$. That would mean you have entered saturation region, or in other words both of your PN juntions are forward biased.