Asynchronous counter for DAC input
In an asynchronous counter the carry ripples through, and the outputs will not change at exactly the same time.. the time increases as the significance of the bits increases. 

So, if you go from 01....1 to 10...0, the outputs might go 01....10, 01...100, ... 00...0, 10...0. 

If you have a synchronous counter, the outputs will change at (almost) exactly the same time (a short time after the active clock edge). There might be a small amount of skew, because not everything in the paths will be identical. 

If you add a latch to an asynchronous counter, the output will change as with the synchronous counter, but one clock later. 

Even with inputs changing perfectly, it's not unusual to see some fairly large glitches at the output of a DAC, especially at transitions like 011..0 to 10...0. Sometimes a low pass filter cleans it up enough, other times an analog S&amp;H or blanking might be necessary to tame the glitch energy. 

Edit: Taking @gwideman's suggestion to look at the 4040 datasheet, you can see the ripple times: 



So, at 5V supply, it would typically take 180ns for the LS bit to change, and between zero and 1.3usec additionally for rest of the the outputs to settle down (depending on which ones change). 

If you were to use a triplet of 74HC161s (4-bit synchronous counters), there is not a specific guarantee of how synchronous the outputs are, but you might guess they'd be within 10% of the propagation delay (WAG) if similarly loaded. 



So, perhaps within a few ns typically. BTW, a 74HC4040 would be quite a bit better than a CD4040 so it's not totally a fair comparison.