How to remove the below error when doing FPGA implementation of program that use RAM using Xilinx block generator?
Xilinx's Spartan-3E only support RAMB16, RAMB16WE being a primitive of a later architecture (Spartan-3A, and maybe others).

You most likely generated your IP with the wrong project options. Make sure you generate the IP for a Spartan-3E, not a Spartan-3A or any other architecture.