Using NAND gates to construct OR/AND gates
Its just and application of Demorgan's theorem.of Demorgans theorem.
The whole problem can be solved using repeated application of three equations.


NOT(A) = NAND(A,A,A)
AND(A, B, C) = NOT(  NAND(A,B,C) )

AND(A, B, C) = NAND(  NAND(A,B,C), NAND(A,B,C) , NAND(A,B,C)  )
OR(A,B,C) = NOT( NAND(NOT(A), NOT(B), NOT(C)  )


So...

B' = NAND(B,B,B)
C' = NAND(C,C,C)
D' = NAND(D,D,D)
X = NAND(B',C',D')
B'C'D' = NAND(X,X,X)

Y = NAND(A,C,D)
ACD = NAND(Y,Y,Y)

E' = NAND(E,E,E)
Z  = NAND(C,D,E')
CDE' = NAND(Z,Z,Z)

T = NAND(B'C'D', B'C'D', B'C'D')
U = NAND(ACD, ACD, ACD)
V = NAND(CDE', CDE', CDE')
W = NAND(T,U,V)
B'C'D' + ACD + CDE' = NAND(W,W,W)

Without any optimization it would be 15 3-input NAND gates.