74HC595 Shift Register Latch Pin
Although I don't think a can give a full answer to the whole question, just my 2c. I ran into the same issue last weekend, namely sn74hc595n not doing anything if connecting clocks together. 

First of all, leaving an input floating is not good. All datasheets say no input must be floating.

As to why your (and mine) 74hc595 did not work with the clocks connected together (even though the datasheet seems to imply it's fine), my current theory is that by connecting the clocks together we're potentially violating the timing requirement regarding SRCLK↑ before RCLK↑: according to the datasheet, it's required that if SRCLK rising edge precedes a RCLK rising edge, SRCLK should not come within 19ns (at 4.5V VCC) of RCLK. By raising both clock signals at the same time, they'll be within 19ns from each other, which breaks the requirement. Granted, if this is true then the datasheet is wrong in implying the clocks can be connected together (or maybe it means something different...). I've found other datasheets (like this toshiba 74hc595) which do not say the clocks can be connected together. So at this point, I'm doubting the accuracy of the TI datasheet. I haven't been able to confirm or rule out this.