Logic levels on tri-state buffer,
The 74VHCT126AFTTR buffer will be powered by a 5V power supply line that is shared with the devices. With this voltage supply, will this buffer a 3.3V logic level SPI signal to a 3.3V logic level on the buffer's output?


The HCT family has CMOS outputs but TTL-compatible inputs. 

That means it has a lower voltage input threshold. Any input above ~1 V will be interpreted as high, which means you can drive it with 3 V logic, even if it's powered by 5 V.

But its output is a 5 V CMOS signal, with (per the Panasonic datasheet) a minimum voltage of 4.5 V when high. So if you are using this to drive a load powered by 3.3 V, you'll need to be sure the load's inputs are 5-V tolerant.


  When the VCC line on the buffer is set to ground will this affect the input lines of the buffer significantly?


According to the datasheet,


  
    Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without regard to the supply voltage...Note: Output in off-state
  


so you should be okay, provided you hold the G pin low on the '126.