How does a NOT gate bypass the output?
Use the schematic tool to draw your circuits. 



The output voltage level is taken as shown in the above image. As you can see, when the base of the transistor is low (0V), the NPN device is not conducting and is high-Z (en open circuit). At this point, Rc acts like a pull-up resistor and for a logic low input, the output is logic high. 

When the transistor is turned on by an appropriate input voltage at the base, the transistor conducts heavily and essentially shorts to ground. I am not sure on the exact values to expect, but I want to say that  Vce(sat) is approximately 0.2V or so which is clearly a logic low. 

Also, to answer your other questions, current does flow through the LED (which is a diode like you suggest), however such current is on the order of micro amps or smaller. As suggested in the comments below, voltage seen at the collector of the transistor (VceSat) is far less than the cut-in voltage of the LED. 

Consider this plot of the forward and reverse characteristics of a diode.



Despite the forward voltage being a bit higher with an LED, the concept still applies. Significant current conduction is required for the LED to emit light. However, such conduction only occurs when sufficient biasing of the device is realized. Given the design you presented in your post, approximately 200mV will be seen across the LED, which is about a tenth of the necessary voltage to force an LED to conduct current (Vf varies by color and other factors).