PIC32MZ DA Separate DDR grounding
Current flows in complete paths or loops. For best EMI performance, you want to design the VDD regions and GND regions, to control the size and shape of the current loops.

Using ferrite beads is the method to separate noisy regions from quiet regions, or from other even more noisy regions. By localizing trash generating circuits where dI/dT is large (amps/nanosecond as inside an MCU), using beads and adequate charge reservoirs (bypass capacitors), the circulating paths are kept almost totally local and the radiated and conducted emissions are minimal. To achieve this, at least use separate VDD regions. To best minimize the circulating paths, separate GND regions also are used, which brings up the challenge of how to route high speed signals and accommodate the need for the accompanying high speed return/GND currents and magnetic-field cancellation. 

At that point, slits in planes become the tool, where planes are not totally severed.

After examining the MicronTechnology Application Note PDF, from "DDR3 noise" search, with over 20 capacitors used to achieve low VDD inductance in the face of moderate DD3 currents, I conclude DDR3 is sensitive to VDD upsets and ringing. This is consistent with "create a local battery" for the high speed currents, and use separate VDD regions and use GND slits to control the paths used by high speed currents.