Combined ADC level shift/offset and scaling
A few other answers have misread the maximum as 4.2V, for 8.8V if you divide by five that will give an input range of 0 - 1.76V to the ADC. For a 12-bit ADC (assuming it's unipolar) you will have a total of 4096 discrete readings possible. For the 1.8V maximum or a reading of 4095 at the ADC that will be 440uV per reading multiplied by five = 2.2mV per reading.

Most ADCs tend to have an error roughly equivalent to the least significant bit being useless which is how I came up with the rough figure of 5mV effective resolution in the comment. However as Andy mentioned this can be improved via dithering. In this case I'd probably take the sum of four samples and divide by two to gain an effective bit of resolution.

The Atmel application note AVR121: Enhancing ADC resolution by oversampling has an easy to understand introduction to dithering. A few other things worth keeping in mind are:


Make sure you don't use too high a value for the resistor divider (see the input impedance for your ADC) or otherwise use a voltage follower. Sometimes you can get away with exceeding the usual recommended impedance by selecting the ADC channel early and giving the sample and hold cap plenty of time to charge before taking the reading. That is often a useful technique in low-power systems.
Make sure that the input from the battery to the ADC is well filtered and decoupled. That is usually as simple as adding a capacitor or two after the resistor divider to form a low-pass RC filter.
If your system has components that have short but high current peak demands (such as a GSM modem) you might find it useful to implement a median filter to ignore the dips caused by that and any potential spikes caused by switching power supplies and the like.