Swapping positive and negative traces of an LVDS oscillator
Yes. You can swap polarity of the LVDS outputs from your clock oscillator module when connecting them to your FPGA.

So your connections would be:

  OSC_P  --&gt;  FPGA_CLK_N
  OSC_N  --&gt;  FPGA_CLK_P


The LVDS driver circuits for _P and _N are identical. So are the LVDS input receiver circuits for _P and _N so both signals see the same load and termination.

The FPGA's internal single-ended form of the clock will then be in 180 degrees out of phase to the external LVDS form of the clock.

You don't need to AC couple them to do this.