Can someone break down how this receiver works?
Blue stage: tuned RF amplifier;
Orange stage: General purpose amplifier;
Green stage: Relay driver;

Pink line: high current drive route on relay turned on.

On first stage

DC point is given by resistors, taking capacitors as open circuits and taking inductors as short circuits. On output dc bias is 6.1V and collector voltage dc point is 5.5V. Ic = 410uA aprox.



Green marked network formed by C2, R3 and C6 is a low-pass filter for negative feedback. It stabilizes the gain loop and stretchs the natural bandwith of the transistor.

$---+--R3--+---$
    |      |
    C2     C6
    |      |


C4 is the antenna input AC coupling.
L4 and C3 build a "tank circuit" or "resonant circuit": the heart of the tuned amplifier, It gives the typical [frequency response] of this amplifier. However, the final tuning frequency is given by the whole analysis of the stage because C5, C7, L1, and the low pass feedback filter affect AC performance too.

C5 is a bandwidth limiter and it acts on upper bound.

This stage is like a deformed common emitter modified to amplify only the right frequency (not the right RANGE of frquencies as on wide band amplifier).

On second stage

It acts as an general purpose amplifier or coupling impedance enhancer.
It is a common emitter stage with R:220k and C:1nF network acting as negative feedback and biasing base voltage level.

On third stage

this is the high current sink driver. diodes network outside of the green boundary, is a no-ticking enhancer for the high frequency of the input signal. the input signal is oscillating, but relay cannot oscilate as fast as input signal. Diodes provide compensation on negative ringing, spiking currents.

Yellow boundary

relay load. It is a heavy inductive load for the transistor, therefore diodes network help it on good counter spikes routing.

Curious things

-All 100nF caps are to AC coupling one stage with next stage. Its value is high because it only want to skip DC bias, not set freq cutoff.

-output of first stage is not in colector pin, which place would give better voltage gain (maybe in that point have a great impact on output impedance?). I think that output between R1, R2 and C1 produces poor sensitivity.

-tank circuit is not annotated with exact values for 27MHz therefore you need calculate or experimentate.

-F1 means ferrite core.