Trying to understand FPGA input pin impedance
Based on the comments it seems you were trying to drive a 1.2V IO bank from a 3.3V input.

In many devices, CMOS inputs are protected using clamp diodes to reduce the risk of damage by ESD strikes. These diodes are shown in the picture below - connecting from the input to VCC, and from GND to the input.



For a 1.2V IO bank, the VCC will be 1.2V. If you connect the input directly to a 3.3V supply, you will forward bias this protection diode causing a very large current flow, most likely frying the diode protection in the process.

In your case the current flow was enough to brown out the supply.



There are ways of adding some protection for such occurances. However the best solution is to always ensure your input voltages match the IO bank specifications for your circuit.

One is to add a series resistor between the IO pin and your input circuit, this would help limit the current flow through the diode - the device datasheet should give a maximum current flow through the protection diodes.

The second is to swap your button around such that the pull-up resistor goes to the supply rail (limits current to a low level), and the button goes to ground. However even in this case you ought to check the datasheet to make sure that the diodes are rated for the resulting over-voltage on the input pins.