ADC conversion timing
The initial 2 clocks are to sample the input signal onto a capacitor.

Then there is a programmable time (The programmed sample clocks) where the sample is transferred to the capacitors that form the A/D.

Lastly the successive approximation algorithm then takes one clock per bit as you say.



The division by the clock frequency is to convert the result to time (in us if you use the frequency in MHz) rather than a number of clocks.

The following application note has the details: AN2428