Why is there a double inverting buffer instead of a single non-inverting buffer in this "equivalent logic" diagram?
There is no reason to do this, other than the picture was drawn by some technical writer from a gate design documentation provided by a designer. The reason is that there is no such thing as non-inverting buffer, a pair of basic CMOS transistors forms an inverting circuit, so an non-inverting function must be made out of two inverting gates in sequence.