What happens when you nand the same input?
The second NAND becomes an inverter, a NOT gate. So this combination of the two gates models an AND gate.

That is,


first NAND = not (A and B)
second NAND = not first NAND


So the output from second NAND is


second NAND = not (not (A and B)).


What does this reduce to? Work it out, you can figure the truth table from there.

The same trick works with NOR gates as well. For example, the Apollo Guidance Computer was built entirely out of 3-input NOR gates, using this trick and a few others. More here: https://www.ibiblio.org/apollo/