Two's Complement Multiplication Overflow
My notation:  n x n → m

Two operands with length "n" bits and product with length "m" bits.

1. Multiplication result depends on operands being signed /unsigned

Ex. 4x4 → 8:

Fh x Fh = E1h, unsigned integer:   15 x 15

Fh x Fh = 01h, signed integer:    -1 x -1   

Note: The 4 LSbs are the same for signed and unsigned multiplication. 

2. Signed product Fh x 8h (-1 x -8) depends on target size

4 x 4 → 8: 08h (or 8), OK

4 x 4 → 4: 8h (or -8), INCORRECT (overflow). 

Generalization: Negating (or getting the two's complement) a byte containing -128, a word containing -32768, or a double word containing -2147483648, cause no changing in the operand, but the NEG instruction will set the overflow flag (ex. for x86 architecture).