Designing a synchronous frequency divider to 13
Since you've already failed the exam, I feel a little bit better about helping you with homework.

You can multiply and divide clocks by any number you want.  It just happens to be super easy to divide by powers of 2 and so that's what they taught you first.


To divide by a different integer, count so many cycles and reset.
To multiply, use a PLL* with a divider in the feedback.
To multiply or divide by non-integers, use a combination of integer multiplication and division.


*PLL=Phase Locked Loop.  It's basically a variable clock that is constantly adjusted to match a different clock.  Mess with it before matching, and you can make it an exact variation of the reference.