Opamp + NPN and MOSFET in the feedback network, how to prevent oscillations
Core question: how to stabilize this feedback loop and prevent any oscillations?

Quick reminder of the theory: "generally" a feedback loop is stable if there is enough margin for the frequency where the closed loop gain is 1 (there are special cases where this simple rule is not valid).

In practice, most Opamps are internally compensated and will have a minimum closed loop gain which is typically 0.1.  Generally this is in the datasheet, but it it not mentionned for your MCP601.  However it is a low bandwidth OPA so it is quite likely compensated.

The two OPAs are mounted as followers.

You are introducing issues that you antipated with the transistor and the mosfet: both add open loop gain.  An input voltage swing at the input of the NPN is amplified at its output.  The same is true for the N-Channel Mosfet.

By increasing the open loop gain, the internal compensation of the OPA is likely no longer sufficient.
Your reflex is to add a capacitor somewhere to add compensation.  That is not the easy way to go.

My suggestion is to replace the transistor and the MOSFET with a PNP device and a P-Channel device.
Use the Emitter of the PNP as the output instead of the Collector.  For the MOSFET, use the Source as the output instead of the Drain.

The PNP output (Emitter) will follow the input (Base) and therefore not introduce any voltage amplification.
Similarly, the MOSFET Gate and Source voltage almost follow each other and introduce no (significant) gain.

As a result the stability of the loop is not impacted, and you do not need to add any extra compensation.

You'll need to rework the current limiting circuit a bit, but that should be quite achievable and possibly even simplify the circuit.

I found the main reason that the schematic was not ok: the feedback was incorrect.
In the below amended schematic the digital output to enable/disable the limiter should be 3.3V to disable and high impédance (or input) when enabled.  When it is 3.3V, it pulls the gate high so that the MOSFET will not conduct.
The circuit can be simulated.  The voltage sources simulate changing set points for the operator setting and limiter setting.  The On/Off voltage generator does nothing here, I did not find a component to have a tristate output.

I think the schematic can be better, but I followed the one from the question in order to demonstrate the solution with regards to stability.







simulate this circuit &ndash; Schematic created using CircuitLab

Bonus:

The next schematic is not fully ok, but suggests how the MOSFET could be a switch between the input voltage and the limiter voltage.
The MOSFET selection must be improved or an analog multiplexer could be used.
The limiter voltage is an ideal source here, but it should be buffered in an actual implementation.







simulate this circuit