VHDL: difference between using "+" or writing our own adder
Both have their uses: The second gives potentially better hardware in a real-life scenario, the first can be given to students as coursework for a course named "history of hardware" or something equivalent.

For the second example, the synthesis tool will implement an addition in whichever way works best for the set boundary conditions. This might be a full adder, this might be an XOR-gate, it might be a DSP block, or anything in between.

If you have to ask, you won't beat the synthesis tool, so write the second.