Timing differences with a 27 MHz data clock
Leon is right, it probably doesn't matter for 27MHz signals on traces that are only a few cm long. 

However, you can mitigate skew by making the trace lengths equal.  If you've got the time to ask a question about it, and you have the board space, why wouldn't you want to do this?  There's very little reason to build skew into your circuit.  Make little 45o wiggles in the traces to make the distances the same and avoid building in reflections.  This makes equalizing the trace length easy if your PCB program doesn't do it for you.   Or, you can use rounded traces, but keeping the trace lengths equal gets more difficult.   

Here's a PCB which uses LVDS.  There's an NI board connected to this one through a 2m, 100-pin ribbon cable, and the other side of the LVDS transcievers connects to a parallel bus, so there are many sources of skew.  Why not eliminate the PCB as a source of skew?

Note: On this PCB, the paired traces are supposed to be coupled together.  In a non-differential bus, running pairs like this will give you really bad cross-talk.