How to estimate the peak current of DDR3L DRAM and design a power supply
If you take another look at your image of the peaks, and specifically at the time scales listed there, you will see that the peak profiles happen in the range of something like 2.5 to 15ns.

Which makes sense, as DDR3 works at extreme speeds, at least when compared to power frequencies.

You are not going to be designing any supply system that will actively regulate in the domain of nano seconds. Nor will you get the peak currents all the way from your supply into the chips across a PCB trace.

Which is why you have decoupling capacitors that get picked for working with the frequencies those peaks have, at currents about twice the average. Because, no it doesn't give numbers, but I presume you can also see that the highest peak is about twice the average.

You then design your supply to be compatible with the average current as you would design any other power supply for which you know power consumption.