Gate biasing of common source MOSFET amplifier
It's called negative feedback and the biasing attempts to keep the gate at "just the right amount of voltage" - should the drain voltage droop a bit low, the DC voltage applied to the gate reduces and, this in turn, turns the fet off slightly and, in turn, this makes the drain voltage rise a bit. Thus there is a measure of stability! It's proper negative feedback.

R6 (the pot) in the source connection is only 100 ohm max and this will alter things a little bit but it's not a showstopper at one end of its travel or at the other. Overall, AC gain will be a tad limited when R6 is at 100 ohms but it won't affect things too much.

So, in short, feeding the gate half the supply doesn't necessarily keep the FET biased as well as the "negative feedback" method AND, a source resistor of 0 to 100 ohms isn't going to change things that much. Think about how much voltage the gate needs (with respect to source) to adequately "turn on" the FET - if it is (say) 2V then the drain has to be at 4V (due to R3 and R4) - if it needs 3V then the drain has to be at 6V. Because we can't be as sure about a FET (compared to a BJT) this is a sensible way of biasing it. Having said that I've seen plenty of BJT circuits that use EXACTLY the same method for biasing the base i.e. collector feedback.

On a slightly off-question point - opamps work precisely this way.