SMPS typical drain current when MOSFET goes to saturation
If the gate threshold of the MOSFET is 2-4V , will the 12-15V pulse
  train from the UC3844 drive the MPSFET into saturation ( Id > 20A) ?


It will drive the MOSFET into the linear region where it acts like a low resistance on switch. 20 amps can only be drawn if the transformer primary current rises to that value and this seems very unlikely looking at the schematic because the core will very likely saturate. Vgs(th) must be significantly exceeded to operate the MOSFET correctly in this application.


  Q2. R4 and G6 don't seem to reduce the input gate voltage, then what
  are their functions?


R4 is to prevent high surge current into the mainly capacitive impedance of the MOSFET gate-source region. It's a form of slew rate control that can be effectively used for reduction in EMI. R6 prevents the MOSFET gate floating and turning on the MOSFET should the driver IC (UC3844) go into a brown out situation.


  Q3. What is the expected Id (in mA, I feel it shouldn't be more than
  50omA else the 2W Rs will burse) ?


I expect it'll be less than 1 amp but it all depends on the value (ambiguously marked as 0.17) and the switching frequency and the primary transformer inductance.


  Q4. The primary impedance of the pulse transformer reads 1M ohms on
  DDM. Can't find any reference on internet so far. IS it way too high?


Sounds like it is broken. You should be able to measure a few ohms between the terminals of N1.