What would make me choose Verilog or VHDL over schematic design on CPLDs or FPGAs?
Schematic design is only useful when you're only tying together a few off-the-shelf modules (counters, adders, memory, etc). But implementing an actual algorithm (say, a cryptography hashing algorithm) is nearly impossible to do without an HDL (like VHDL or Verilog), since there's no way to describe a system at a behavioral level with schematic symbols.

Most projects are done in behavioral-style HDL because they're too complex to be synthesized  by hand and drawn using logic primitives schematically.

CPLDs are generally used for glue logic and less used for processing, and generally logic is easy to implement schematically, so I think you're right when you suggest that FPGA-based designs benefit more from using an HDL.