Why does a MOSFET's drain current decrease when increasing the transistor's width and length, however the overall W/L ratio stays the same?
Your SPICE model might calculate an effective channel length by subtracting a small amount from the specified (drawn) value, to account for diffusion of the source and drain implants under the gate. Since this is a fixed distance it has a much larger effect when the drawn length is small, increasing the effective W/L when L is small. Of course, without analyzing the actual model we can't be sure.