Large drift (temperature could be a culprit) in this circuit. Anyone can help?
I see several problems related to drift.

First of all you have a 10 K trim pot. They have a temperature drift of 200 ppm C. Find out best setting of trim pot and replace most of its value with fixed resistors, 1% or .1%. Get trim pot down to 1 K or 100 ohms if possible, and use Bourns 3396 series 25 turn trim pots.

Second issue is resistor pairs that form a differential circuit, but the resistors counter part should be next to it, else temperature drift is made worse. OP1 and OP2 should be in the same package.

Third. Use low drift resistors, metal film 1% or .1% tolerance if possible. Check with Caddock (Digikey / Mouser) for ultra stable resistors of .025% tolerance if their effect on stability is that important.

Fourth. Dump that POS LM324 and get a real stable op-amp. The LM324 is decades old technology. It also has a poor SNR value. Consider a TL074 series jfet op-amp that will not load down feedback resistors. Look into the OPA series of ultra-stable op-amps as well, though the cost will go up.

NOTE: They are not visible in this schematic, but are your power supplies very stable? Is your ADC Vref ultra stable? At 12 bits tiny drifts and errors begin to show. If your having bit-locking distortion in the ADC inject pink noise equal to 1/2 LSB of the ADC Vref.