Choosing the diode for protecting an ADCs inputs
The practical ESD protection design. We know that for 40 yrs, all CMOS has a latchup effect. That is when the input exceeds either rail by 0.4~0.5V enough to trigger a high impedance SCR substrate and latch the power supply thru RdsOn in the substrate Vdd to Vss.  

The solution has always been to use cascade bulk resistors around 10k and Schottky diodes after each of 2 series current limiting resistors to meet the 3kV minimum specs for the HBM. 

There are models for human fingers and carts, but not the capacitance of cables with 30pF/ft.   So the discharge of a floating cable connection can be far more SERIOUS than a finger.

Thus to add this type of additional protection I assert all you need is to cascade another 10k series R and diode pair or TVS diodes if you prefer.

Proof of concept 

I included a logical ideal switch with 0pF and 0 Ohms to allow you to see the difference in signal voltages and component voltages (differential) and current.  When you point at the plot the corresponding test point lights up in aqua colour.

If you don't understand, please ask a good question.

We used to blow up SCSI ports in production final test with long cables until I implemented ESD safe practices in '85 due to this problem.

I used 10kV 10% with an RC coupling impedance and CMOS input circuit with 200kHz rep rate just for convenience to display it.

Slow down the interactive simulation with the slider to suit your preference.