Most efficient way to select between 10 large buses?
I think the issue is not that you're selecting between 10 busses, but rather that your select signal has to fanout to several hundred multiplexors (~4 * 164 bits).

Driving a large fanout of several hundred pins will either create a huge capacitive load (if you have dumb synthesizer), or a large buffer tree (if you have better synthesizer). Using a buffer tree is better, but I can give better advice if you paste the timing report that's giving you trouble. 

If there's no way to meet timing in a single cycle, you could latch bcdIn into several parallel registers, and use these parallel registers to drive different bits of the output (i.e. latch bcdIn into 4 identical parallel flip flops, and drive muxout[40:0] from the first flop, drive muxout[82:41] from the second, etc). This will reduce any one signal's fanout during a clock cycle, it is somewhat inefficient though.

Ultimately your fanout doesn't seem unreasonable to me, and I'm surprised that you'd have trouble meeting it on any kind of process technology, but perhaps it was just not optimized well by the synthesizer.