why ADLs are used for chip design but not for board design?
I've never heard the ADL term before, but assuming ADL is a broader term for HDL (Hardware Description Lanaguage) I'll give it a go. Boards are a collection of interconnected circuits, and a schematic describes these circuits in the abstract. 

Schematics, however, don't specify a number of important details that deal with the physics and mechanics of how those circuits work in the real world, and that's what the task of Layout addresses. That is to say "electrically connected" doesn't suffice for many circuits / nets. It would be very difficult to categorically express relationships like "capacitor C1 needs to be placed close to pin 13 of IC4" or "route these signals as a 100-ohm differential pair with respect to the board stack up" for example, in a sufficiently precise but not overly rigid syntax, let alone how to express relax-ability and priority of those expressed constraints.

Perhaps schematic entry could be supplanted by HDL someday, but good, tried and true workflows exist already with modern EDA/CAD tools for board design, so the gains would have to be substantial and demonstrable for there to be a paradigm shift. 

Probably the reason HDLs are the way things are done in FPGAs, for example, is because the domain is sufficiently constrained that most anything you'd want to do is expressible in a formal language. It would be cumbersome to have to draw all your logic circuits when RTL is a more 'natural' way to express it (but schematic entry used to be part of FPGA design too, and honestly I still think you should draw logic out anyway before converting it to HDL, but I digress). With analog elements involved, though, your ability to adequately constrain the problem space is a big problem. I hate to say it, but there's a lot of "art" involved in board level integration. Just my two cents.