Can I2S tdm interface send more channels with less sampling frequency?
It has the bandwidth do do so, but you may have to modify the protocol or add hardware to distinguish the channels.  You say that your SoC and DSP can support 8 channels, so that implies that there's some mechanism in addition to I2S, which typically supports only two channels with the frame sync distinguishing between the two.  If it's specified at up to 8 channels, then that might be a designed-in limitation, or if it's specified for 8 channels at 48KHz, it may be extensible to 24 at the lowest rate.

Perhaps the simplest solution if only 8 are supported natively is to use 2 GPIOs to extend the native 8-channel addressing scheme.