Simulation of a chopper type E (four quadrants) in pspice
Convergence problems are usually a symptom of a current or voltage changing too quickly in your circuit.

A common cause of this is failure to appropriately model the parasitics. 

You can relax the simulator accuracies and decrease the time-step in an attempt to help it cope with the rate-of-change. This may work but I wouldn't necessarily advise it as a solution because you will likely be unhappy with the unrealistic results you get back (the reason the simulator was choking in the first place!)

I would implement some appropriate parasitic resistances for your power-supply, inductor and gate drives and see where that gets you.  

Your high-side gate drives have an inappropriate ground reference too.


  Do you have a bibliography that can help me, it seems that Im incorrectly feeding the mosfet


I'd recommend reading IXYS white-paper IXAN0010. It is not specific to IXYS parts and will have some helpful information for you on gate-drive techniques.

I'd also recommend looking at the datasheet for any 'half-bridge gate driver'. For example; the TI LM5113. Full-bridge gate drivers are also available, but there are less of them on the market.
Generally once bus voltages start getting above 75V you will need to start looking at isolated gate-drive topologies, below this point there are excellent chipsets available to the designer that take the pain out of half/full bridge gate driving.