Why am I getting my result as a string of Zs in Quartus?
Without posting your HDL code, it's difficult to determine what exactly is the problem. However, something outputting Zs in simulation likely indicates that the output hasn't been assigned. For instance, when simulating this module: 

module simple(input a,b, output o);
    wire o_internal;
    assign o_internal = a^b;
endmodule // simple


o has the value Z. So you probably want to go over your ALU and make sure that you are actually assigning to your output signal.