Implementation of Distributed Arithmetic Architecture
(Via Reddit)
[–]bunky_bunk
[+1] 3 points 28 minutes ago
you do not treat bit 0 of the accumulator as the least significant bit. instead you keep a certain number of bits that would be shifted out and discarded. here the 4 bits before the underscore correspond to your equation, but all 6 bits give the result 18 in the end.
t=0: 0110_00 (6) [24]
t=1: 0011_00 + 0100_00 = 0111_00 (6/2 + 4 = 7) [12 + 16 = 28]
t=2: 0011_10 + 0001_00 = 0100_10 (7/2 + 1 = 4) [14 + 4 = 18]

source: https://old.reddit.com/r/FPGA/comments/jz5v2h/implementation_of_distributed_arithmetic/gda0had/