logic gate's open drain output pulled to voltage higher than supply voltage
I would not exceed the datasheet values. When the output is off, then the full voltage from the pullup will be present on the pin.  If this exceeds the \$Vds\$ voltage of the output transistor, the transistor will fail.
The chip manufacturer might use a higher voltage process on the die in some fabs and a lower voltage process in other fabs.  Rather than make two datasheets they are going to spec the lower voltage one, which works for 99% of the users out there.

Also, there might be ESD protection diodes on the pin, which would be forced into conduction if the voltage on the pin exceeded Vcc.

If you need higher voltage, you can have the chip drive an external FET that is rated for the voltage that you need.


  When doing this, will the 1mA current sourcing from 12V to 3.3V cause
  problem for the 3.3V supply, a linear regulator?


No it won't hurt the regulator.  Assuming that the output transistor didn't fail, the voltage would be dropped across the 10k resistor.  It would pose no difference to the regulator than if you pulled the pin up to 3.3v with a 3.3k resistor (1mA).