Analog CMOS layout finger size
Go  for convenient sizes, that you can interdigitate to get thermal matching and implant matching.
Also keep the surrounding structures (wells, active, metal) identical for FETs you need to match.
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How to pick the actual finger width (say W/L = 100/0.5)?
Determine how you want/need to pack the circuit into available space.
If no space constraint, you should still use multiple stripes because sharing drains will reduce the parasitic capacitance, and give you a free Bandwidth boost.