Modelling and simulating multiple-collector/emitter BJTs
I'm a hobbyist. So keep in mind my own limitations as I write here. And it may have helped me (or others) if you'd provided a specific schematic to discuss. (Update: thanks for adding a schematic!)

Some broad thoughts:


The multiple emitters are buried inside of a single BJT structure's base and collector regions, without creating any separating metalization. If you took two BJTs and tied them together in some fashion, all you can do is connect two bases together through the metalization and wiring (same for the collectors), and this is not the same thing as being able to bury emitters directly inside a single structure (just as you can't make a BJT out of wiring two diodes together.) You can't exactly "get there from here," so to speak. More on this, later.
The areas can be designed to be different, leading to different parameter values (\$I_{SE}\$, for example) for each. You'd need to study the circuit to see if that feature was being used. If so, you'd need to fashion different BJT models for your simulation and you'd need to understand the schematic pretty well to make reasoned judgments here. Of course, even then it's not exactly the same thing.


In logic circuits, you can usually "get by" with a pair of BJTs, connecting the bases together and the collectors together -- given modest care. With analog, I'd be very wary and worry a lot about the design details, though.

So while I don't think you can directly simulate them with precision from DC to daylight without very specific design information out of which you might be able to design a well-considered subcircuit, you usually can read the schematic and work out a way to provide approximate simulation. (Given the caveat that the more effort you can apply to studying the schematic's design, the better the resulting simulation will be.)



Sidebar: During turn-on, emitter crowding is a significant problem and its effect is magnified by the RC time constant created by the base resistance and the junction's capacitance; with the edges turning on faster than the center of the emitter. Given that the ratio of the perimeter to the area varies with the exact details of the design, this crowding issue also varies too with design details. To reduce the problem, the width of the emitter must be narrow. Sometimes, specialized BJT designs will include multiple emitters in the design in order to maintain DC current drive capabilities while at the same time reducing the AC/transient crowding.



I believe when facing logic circuits you can usually finesse these issues and set up a reasonably well-working arrangement with simple, discrete BJTs (and, possibly in some cases, with some well-placed, added resistors.) You may want to adjust some of the BJT parameters, such as \$I_{SE}\$ and/or \$I_S\$. But without any detailed information to go on, it would all just be guess-work. So I probably wouldn't bother too much there.