Organization of large memory using memory blocks
From the outside, each memory chip is organized as 1M words of 1 bit each, which means that it takes 20 address bits to specify a word.

Internally, the memory is physically organized as a square matrix of 1024 rows and 1024 columns, with one bit in each position in the matrix.

There are at least two reasons that the physical organization is important to the question:


The memory chip only has 10 address pins. The full 20-bit address is fed into the chip in two stages, the 10-bit row address first, and then the 10-bit column address.
When a refresh operation occurs, an entire row is refreshed all at once.