What is MECL 10h or 100 K ECL logic levels and how do I use them?
Majenko has linked to the Wikipedia article, but in a nutshell (thanks to The Photon for corrections):


ECL is typically used as differential logic, meaning that a logic value is sent over two complementary lines. One line is the "positive" polarity, the other is inverted. 
ECL is designed to run much faster than TTL, and can draw more power. Edge rates and propagation delays are around 1 ns, so high-frequency considerations are necessary. You have to pay attention to termination as well.
ECL operates with supplies at -5V and 0V, in contrast to TTL. ECL also specifies an additional supply for \$V_{TT}\$, the termination voltage supply, though you can sometimes get away without this.
You can run most ECL parts in PECL ("positive ECL") mode, using 0V and +5V supplies, and positive \$V_{TT}\$.
ECL has a specific requirements for power supplies and logic thresholds. The various 10x families are slightly different. The 100 parts are apparently just temperature compensated.


ECL is high-performance stuff, so if you do anything serious with it, I really recommend reading the documentation. In particular, OnSemi app notes TND309 and AN1406. There's a lot of details, especially regarding termination.

For this project, though, I can give some rough guidelines.



Here's an excerpt from a board I made. The '57 is a mux, connected in PECL mode. You can see how there's no \$V_{TT}\$ anywhere. The Q+/Q- pair is connected to ground through 200 ohm resistors on the driving side. The D pairs on the receive end are terminated with 100 ohm resistors. 

So you could run the U and D pairs into two MC100ELT25's, with appropriate resistors. Another option is the SN65LVDS34D, which has integrated termination resistors, but it's a slower part. If you put all the chips right next to each other, you won't need to worry about transmission-line effects.