how to design a circuit that gives high output between input transition and next rising edge of CLK
You could consider starting down the route of an edge detector using an EXOR gate: -

That gives you a kick in the right direction by producing a pulsed output each time IN changes state. If you need to extend the pulse, use a monostable or, if it should extend only as far as the next positive going CLOCK edge then use a D type flip flop to latch the pulse and clear it on the rising clock edge.
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