PIC's MSSP SPI = oddity, but bit-banging works?
I found the problem. It was indeed the clock being high between bytes. Well not exactly; it was that the ADXL was mis-interpreting the 2nd byte due to the clock being high at the start of the second byte. Which is rather ambiguous, as the ADXL datasheet clearly shows in the timing diagram that the clock is low prior to transmission, and low afterwards. In that configuration, it wouldn't work. In the opposite clock configuration, defying the datasheet, it works.

The solution was to invert the clock edge in software:


Tried this before but it did nothing... probably a case of trying to do too many things too quickly. 

The resultant MOSI and MISO (250kHz FOSC, 62.5Khz SPI rate, 1.8v) is:



The PIC is able to read the correct reply, 0xAD. Still some noise on MISO before the ADXL drives the line, but when it does, it is very crisp and clear.

Debugging SPI would have been impossible without a DSO.