What process detects whether two I2C master devices send conflicting messages?
I2C (Inter-IC Communications) has a data line 'SDA' and a clock line 'SCL'.  Both of these are pulled high by a resistor and low by a device.

In most systems you only have a single master so the master sends a command and waits for a reply it knows what reply it is looking for so you should not get any data clashes.

In a multi-master system however two devices can talk at the same time and it is the responsibility of each to make sure they do not clash.

To achieve this every device constantly monitors 'SCL' and 'SDA'. Only masters pull the 'SCL' line low.

If a device is transmitting and it sees either line it is controlling as low when it is not pulling it low it knows there is a data clash and bows out to let the other device complete its message.  Once complete it can transmit its message again.

I have never designed a multi master system so I am not sure how well this works in practice but given each message from a master starts by referencing an I2C address I would expect the data clash to be spotted early and dealt with gracefully.

For a more detailed explanation see the I2C Specification from NXP