What is the main difference between RST (0-7) and RST (5.5-7.5) in microprocessor 8085?
There are four kinds of interrupts on the 8085.  The first three have dedicated interrupt pins: 5.5, 6.5, and 7.5.   So when an interrupt comes in, the processor can immediately go to the proper interrupt handler, by internally generating a RST x.5 instruction where x=5,6 or 7 as appropriate.

Then there is a shared interrupt pin, INTR.  In order for external devices to share this one pin, but at the same time have separate interrupt handlers for each one, there is mechanism whereby the external device places a RST instruction on the bus, along with an interrupt # 0-7.  Then it can vector to the appropriate routine.

So that is the main  difference between the two: for RST 5.5 through 7.5, the processor generates the RST instruction, and for interrupts 0-7 the external hardware does.