Why has a LUT6 based SRL only 32 entries but not 64?
I believe this is due to the fact that the LUTs on the Spartan 6 are internally constructed as a 5 input, 2 output LUT followed by a bypassable mux.

Now, why you can't make a 2 bit wide, 32 bit long shift register in a single LUT is a good question. Seems like that should be possible, and then it should be possible to loop the output of one side back around to the other side to get a 64 bit shift register in a single LUT. You'd have to ask Xilinx why they don't support that.