Verilog: Conditionally setting single bits to high-Z in vector
Two things you can do. Verilog has a structure generate-for loop construct in contrast to a procedural-for loop. 

for(genvar pin;pin&lt;N;pin++) begin : pins
  assign gpio_pins[pin] = (pin_direction[pin] == 1'b1) ? write_data[pin] : 1'bZ;
end


Another thing you can do is

assign gpio_pins = write_data;


and make an assignment write_data[index] = 1'bz; when you want to read gpio_pins[index]