Logic gates not working as expected
Connect the 2A pin to VCC or GND.
When you leave a CMOS input open, not only will you get a much higher power consumption, but the corresponding output might oscillate in an uncontrolled way, which can affect the other logic in the device.
The datasheet of the inverter says:

All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

Also see [FAQ] How does a slow or floating input affect a CMOS device?