An current source with UC3842
I think I used these about 20 years ago, so take due care using any advice :-). 

That is essentially a voltage controlled circuit as C2 plus R8+R4 give you a time constant of around 50 mS whereas the UC3842 is probably running at the 10 kHZ frequency. Even at 1 kHz a cycle is 1 mS or 50 x shorter that the Vfb time constant.

The UC3842 uses cycle by cycle current limiting for end of cycle control - here from Q1-s via R3 to Isense. It is common to see a small capacitor at Isense which combines with R3 to filter out (you hope) leading edge current transients at turn on which otherwise may false trip current feedback. (Ask me how i know :-). ) 

A point to watch which may or may not apply here is that with cycle by cycle current controlled feedback you may get instability at > 50% duty cycle and to compensate for this a portion of the oscillator ramp from a resistive divider is summed with current feedback into the Isense input.

It MAY help transient stability to place a small capacitor (10's to 100s of pF) across (R8+R4). This is common in voltage feedback primary loop control - I'm not certain of what happens here with the dual loop.

Vcc has an interesting  startup profile where it will not start until some Vhigh value but will then run down to some lpower Vlow. This is to facilitate bootup powering via a a high resistance bleed in offline supplies -  a cap is charged via a high value R which cannot provide enough I to run the IC. The cap charges until Vhigh_start is reached and the IC must start yup and provide an alternative Vcc source (usually from its own converting action) before Vcap falls too low.