Low impedance complementary negative level shifter for a BBD
Let me post one answer which I figured out. This is reasonable, but not perfect yet:



simulate this circuit &ndash; Schematic created using CircuitLab
So this is really just a reasonably trivial implementation with a comparator, and using the TSX3704 quad, the cost is about 35 cents + 4 resistors per clock (the thresholds for the comparators can be shared... actually I can save one further resistor by sharing the voltage divider string for the two voltages shown, so 3.5 resistors per clock). Further, I have a choice of the SOIC-14 package which is huge but wave solderable, or something smaller if I fail to keep everything one sided.
So how do I fare against my own criteria:

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Reasonably good, less than 200mV from the rails, and if I'm reading Figures 8. and 10. in the datasheet correctly, essentially zero once the gates have been charged. Indeed, using an even cheaper TS3704 might also be possible, although it's datasheet doesn't show the corresponding plots.
The slight difference between the trip points takes care of this
Not bad, less than 40 cents total per clock.
I get to choose between this and bonus goal 1

Bonus goals:

I get to choose a compromise between this and 7.
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I'm still interested in other solutions, I wonder if there's still some room to improve on the parts count/cost and especially the size of the very big SOIC-14. Maybe at the expense of the transition time which is now over spec by about a factor of 50.