Low voltage DC to High Voltage DC Circuit Explanation
This circuit has too much problems, don't try to build it unless you want to spare couple of weeks and burn a bunch of parts.

How it works:

555 is connected as astable square wave generator. For proper operation its duty cycle should be exactly 50%, but with given component values it wont happen. It will be something like 66% / 33%. The problem here is that one of the power transistors will work 66% of the time, and the other the rest 33%. This will cause unballanced operation of the HF transformer which limits its power capabilities to a much lower value.

U1A and U4D (it should be U1D) form an invertor so non-inverted pulses are passed to Q2 and inverted to Q1. Also this stage should provide some "dead-time" - time when both MOSFETs are off. This is not done here. The problem is that the second MOSFET turns on before the first is fully turned off. This causes very large current to flow trough both transistors during switching. The overwall efficiency will be much lower and MOSFETs will overheat.

Q3 with its surrounding parts and for a gate driver for Q1, which is probably the only thing that will work fine in this schematic. Same for Q4 - driver for Q2.

U3C, U2B - the are not connected as window comparators, they are separated parts to pull down two separate drive signals when output voltage divided by R12/R13 is higher than reference voltage of the potentiometer. This is a lesson how a feedback should not be made. Device operation will be very poor. A proper SMPS feedback uses an Error Amplifier (OpAmp) often with limited gain (both DC and AC) and its output signal is compared to a sawtooth waveform produced by an oscillator or by switching current. This approach gives a more stable operation because each period the duty cycle is chahged just a little. In the proposed circuit feedback comparators will skip pulses and also it can jump into situation where every second pulse is missed, causing the supply to work as a single transistor forward converter, not a push-pull. This would overheat or even saturate transformer and overheat (one of) the transistors.

I doubt that this circuit was ever built or if so its operation was far from optimal.

Directly to your questions:


C2 is needed to provide a good low impedance path for the inverter (transformer stage). It is OK there, maybe its value should be raised depending ot output power.
It is not a window comparator. See above. It will work very poor, it will make the inverter to skip pulses and create awful audible noise and to overheat.
The ouptut of 555 is low power and if it is passed directly to MOSFET it will not drive them with good waveforms. Also for one of the transistors waveform should be inverterd.


This topology is called "push-pull". You can browse the net to get more detailed explanations on how it works.