Building "AND" and "OR" gates from tri-state drivers & inverters
My attempt at doing so would be to create an "and" gate and an "or" gate, because "and", "or", and "not" are logically complete, if I'm correct.


NAND alone is logically complete. Configurations of one or more NAND gates can be used to create any other gate.

So, let's create a NAND gate.

A B O
0 0 1
0 1 1
1 0 1
1 1 0


If we look at the above, whenever B is 0, O is 1, and whenever B is 1, O is A'.