Altium PCB net question
It looks like you're violating a clearance error from the pads to the thermal pad.  Also, your vias look like they are too big.  You'll want to keep them small enough so that solder doesn't flow through the board when it is reflowed.  10 mil ID would be the biggest I would go for an in-pad via that isn't filled.

You can get around your routing constraint by changing your routing mode.  While running interactive route, I believe Shift-R cycles through the different modes.  Also, if you start the route from the pad instead of the incoming trace, it will probably hop into the "Ignore Obstacles" mode until you route out of the pad, then go back to whatever mode it was in.

You'll need to look at your board level clearance rules under Design / Rules...

Once there, you can find clearance rules under Electrical / Clearance.  You can find which rule you're violating by following uint128_t's advice above.

Good luck!