Designing Schmitt trigger oscillator using CMOS NAND gate
What you made in your schematic is this (left):



simulate this circuit &ndash; Schematic created using CircuitLab
What you wanted is on the right.
Note how in the circuit on the right the voltage across the capacitor C2 goes directly into the input of the Schmitt trigger.
Now what happens is that the NAND1 is detecting the charging of the capacitor. That means the voltage across the capacitor will only vary a little bit as the 0 / 1 detection window of a NAND is small, just like an inverter. Slightly above Vdd/2 = 1, slightly below Vdd /2 = 0.
You actually want these levels to be higher and lower so that the C0 charges / discharges to about 1/3 Vdd and 2/3 Vcc and that's what a Schmitt trigger can do.
But that Schmitt trigger is after the NAND, which outputs 0 or 1. Therefore your Schmitt trigger isn't doing anything useful!
So move the Schmitt trigger like I suggested and try again.
If you want to build a real Schmitt trigger NAND gate, use this schematic:

Found here.