Difference between an inverter and a buffer with active low input
There is no difference. Many times the choice of where to draw the bubble is made as to where the signal level is active low. As such the symbols that you show can be implemented with the same circuit or chip. 

In similar manner experienced engineers will also choose to draw other logic gates on the schematic according to the actual usage as to where the low true and high true signals are located. Thus it is possible to use gates on the left below as the logic equivalent on the right. The part data sheets most often shows the left symbol but, depending upon the logic being represented in the schematic, the right side symbol will be more intuitive.