Signal line current estimation and impedance matching
for your first question, I think considering the capacitance of this gate you mention will let you shape how the current pulse will look, if you are not adding a resistor, I would use the trace resistance and simulate the gate capacitance charging. This will look close to the actual gate current of the device in the transient region.

for your second question, depends on what you want to do... without knowing the whole goal of the board it is hard to give design pointers, I mean it is common also to try and lower inductance when you can, but some power converters want to add inductance on purpose in some cases(few, but they exist) 

I don't think there is a hard rule that applies to all boards that can ignore the goal of it.