Do we ever use the pin capacitance of a digital circuit component (e.g ASIC, FPGA) in doing timing or data integrity analysis
Usually, the timing analysis of complex systems is divided into separate on-chip and off-chip domains in order to simplify the process of verification. Basically, a set of specifications is written that represent the "timing contract" at the pins of the chip(s) on the board. An internal verification is done to insure that each chip meets its specifications. A separate, external, PCB-level verification is done to insure that the timing relationships among the signals running between chips is also correct.

The pin capacitance is just one element that goes into the electrical modeling of the PCB traces for that external verification step.