Serie, parallel and other configurations (relative to small signal) of capacitors in amplifiers - poles and zeros
I'd rather avoid having too many rules to remember:

in all the cases you mention what you have to do is ask yourself : "How can I get no output at all?" The answer will be your zeros location.

Take R1, C1, not to have any output they should be an open circuit, or equivalently their parallel admitance has to be zero:

$$Y(s_\text{z})=\frac{1}{R_1}+s_\text{z} C_1=0 \quad\Rightarrow \quad s_\text{z}=-\frac{1}{R_1C_1}$$

which is a finite zero in LHP as expected

If apply the same at R3 C2 you'll find that you need a short circuit to have no output and hence \$\omega\rightarrow\infty\$

As far as poles are concerned just apply "seen resistance rule" if they are separated or do the math in other cases.

E.g. as far as R1 and C1 are concerned, if you hold true ideal operational and hence virtual ground at its inverting input, you have C1 shorted (voltage generator on left node, virtual ground at right one), so
$$\omega_\text{p}=\lim_{R\rightarrow 0}\,\frac{1}{RC_1}=\infty$$