What are input/output buffers for pads?
Have a look at the "typical I/O port" of a mid-range PIC Microcontroller. Yes, this uC is akin to the abacus when compared to something like an FPGA, but the electronic principles are identical.



The I/O pin is the physical pin of the IC and connects to the outside world. Everything else is an approximation of standard electronic components modelling what goes in inside.

Let's start with a general purpose output:

The two identical symbols marked P and N are FETs of some form or another. In simple terms, they connect the I/O pin directly to Vdd (HIGH) or Vss (LOW) like a switch - but never both at the same time - when the pin is an output. The symbols to their left are logic gates, as you probably recognise, and to their left again are D-type flip-flops. When you programmatically change an output pin to 1 or 0, a 1 or 0 appears on Data bus, and shortly after WR PORT will go from high to low, triggering the correct output via the flip flops and logic gate. Most uCs handle the WR PORT switching automatically. WR TRIS, in the case of a PIC, determines whether the pin is an input or an output therefore if you try to set an input-pin to a value, the command never makes it to the logic gates because the TRIS Latch flip-flop is locked in the 'off' position.

Going beyond General Purpose, you will always end up with the FET ('P' and 'N') devices as they are what physically provide the high and low signals. They might be controlled directly by a PWM controller, or a UART/SPI/I2C peripheral and you may have no direct access to them in software, but the FETs act as the buffer between inside and outside.

A general purpose input is much easier to describe in its simplest case. The triangle labelled TTL or Schmitt Trigger acts as the buffer; again it isolates the inside and the outside. As the footnote in the diagram mentions, "protection diodes" are included (but not shown) to save the uC being damaged from signals exceeding the range of Vss and Vdd. The output of this initial buffer is fed into another flip flop, such that when the pin is polled, RD PORT triggers the value at the I/O pin to be written onto Data bus.

Going beyond General Purpose, the TTL buffer may be replaced with an analogue buffer for the input to an ADC, or again it might feed to an non-directly acessible UART/SPI/I2C peripheral.

So, to answer your questions...

(1) What are buffers? See above! Ultimately, a buffer replicates it's input on it's output, therefore isolating the sensitive 'inside' from the nasty 'outside'.

(2) What is the effect of enabling/disabling? Usually you can set a pin as an input or an output. If you don't choose yourself, the uC will set it to one or the other by default.

(3) and the rest of (2). It's good practice to set unused pins as outputs, outputting LOW. This stops (a) potentailly wasting power if set to output HIGH, and (b) 'floating' voltages when set to input, which could have odd effects on nearby pins and associated peripherals.

(4) Depending on the hardware, you may have to manually set a pin to input or output even if it can only function as an output (or input). For example, three pins maybe dedicated to and SPI module. I can't guarentee that the pins are hard-wired as the correct type of pins without reading the datasheet for the uC. In the case of PICs it's rare to get a peripheral pin (ADC, I2C, PWM, etc.) that cannot also function as a GPIO. You have to programatticaly set the pin direction before you can use the peripheral properly.