Why does SPI flash has HOLD# pin, as opposed to stopping the clock?
The HOLD# signal for use in an SPI bus with multiple slaves.  Stopping CLK will stop the whole bus, while asserting HOLD# will only stop transactions to that specific SPI slave.  HOLD# is slave specific like CS# is.

Imagine you have a flash on the SPI bus, but also a SPI sensor that you need to read at a specific time.  Now while you are in a transaction with the SPI flash, the time comes to read the sensor.  You could just finish the transaction with the SPI flash, but then you compromise the timing of the sensor reading.  If you stop the clock, you cannot read the sensor either.  But if you assert HOLD# to the flash, you can now start a second SPI transaction to the sensor.  Once you are done with the sensor, you deassert HOLD#, and you continue with your SPI flash transaction.