Simulating NMOS as capacitor example
The following is the equivalent circuit model of a FET. Disconsidering the parasitic inductances, if the drain and source ends are short citcuited the equivalent gate capacitance is given by:

$$C_{G}=C_{GS}+C_{GD}$$



source

The gate capacitance can be calculated by connecting a gate resistance much bigger than \$R_G\$ and sweeping the AC gate voltage according to the following e.g.:


Sweep AC gate voltage
Find the frequency at which the amplitude drops by 3dB
Workout the gate capacitance


In this case, the gate capacitance is given by:

$$C_{G(CALC)}=\dfrac{1}{2\pi\cdot23.4963kHz\cdot1k\Omega}\approx 6.77nF$$

It can be double checked by inspecting the model details:

$$C_{G(MODEL)}=5.2nF + 1.6nF=6.8nF$$