Simulation issues with a simple 3-phase rectifier circuit
If your only reason for choosing the netlist format is for scripting capabilities, then you're not confined to the usage of one simulator, in particular. In this case, I would recommend LTspice, though I'm sure other simulators have their way of using batch processing.
For this you'll need to invoke LTspice from the command line with the switch -b:
/path/to/XVIIx64.exe -b /path/to/schematic.cir

Or XVIIx86.exe for the 32 bit version. The extension for the schematic doesn't matter as long as the contents is in netlist format, though the usual extensions are .cir and .net. The latter is used by LTspice as a temporary netlist in the same directory as the .asc file (word of caution).
As for your schematic, in particular, in LTspice it would look like this (in the graphical mode) and give these results when simulating:

I'm not saying it's without problems, every simulator is an attempt at modelling the real world through various means, and LTspice is no exception. In this case, the three capacitors (C2, C3, C4, with their Rser) are series RC snubbers to help with damping, the same way Rpar does it for the inductors (as JonRB mentions in the comments). Another tweak I'm using is particular to LTspice (that I know of), the Vp parameter for the diode .model (the separate, 4th line). It adds damping to the reverse recovery part, making it look more real instead of an abrupt response. C1 is there to ensure some proper DC and AC path to ground from the load side. I'm also using uic to avoid possible ill-conditioned initial conditions with .ic. In rest, no forced abstol, no need for gshunt/cshunt, etc. The netlist looks like this now:
* title
D1 dn a dsei6006a
D2 dn b dsei6006a
D3 dn c dsei6006a
D4 a up dsei6006a
D5 b up dsei6006a
D6 c up dsei6006a
Cload up dn 2.7m Rser=48m
V1 N001 0 sin 0 310 500
V2 N002 0 sin 0 310 500 0 0 -120
V3 N003 0 sin 0 310 500 0 0 120
L1 N001 a 26u Rser=4m Rpar=1meg
C1 dn 0 1n rser=1 rpar=1meg
L2 N002 b 26u Rser=4m Rpar=1meg
L3 N003 c 26u Rser=4m Rpar=1meg
Rload up dn 1.25
C2 a b 10n rser=100
C3 b c 10n rser=100
C4 a c 10n rser=100
.MODEL DSEI6006A D( IS=148.21E-6 N=1.8882 RS=3.0622E-3
+ IKF=811.78E-9 CJO=1.0000E-12 M=.3333 VJ=.75 ISR=406.73E-9
+ NR=4.9950 BV=600.05 IBV=1.2932E-3 TT=26.602E-9
+ Vp=0.3
+ Vpk=600 Iave=60A Vpk=600.0V Iave=60.0A)
.tran 6m uic
.end


In response to the comments below, in particular:

Btw, as a SPICE novice, to me these additions seem like black magic. Can you suggest further reading on how to come up with those kind of fixes?

There is no black magic. You have to remember that simulators are, at their core, emulators -- they emulate a real world through numerical computations. Among other things, this involves a matrix solver, with elements from the schematic as entries. Each simulator has its way of dealing with such solvers, but all of them suffer from numerical limitations: differences in the magnitudes of the values for elements, or calculated currents, voltages, or time derivatives (timesteps) that get shorter in order to adapt to sudden changes. As such, it falls on the user to help the simulators get the best out of them.
Here, you have a rectifying bridge with series RL on the AC side, a bare-bones rectifier, and a parallel RC as load. Since you have diodes, you have nonlinear elements, and diodes rectify by abruptly (in theory) conducting and blocking the current. That can cause a discontinuity, and models in SPICE world are not always close to the real world. The inductance will react to this sudden change and cause oscillations.
These two causes can be mitigated to a certain degree. For the RL, add a damping shunt resistor. Given the working currents, it should be 10k...100k or more to avoid too much disipated power; start with 1meg, tinker as you go. The diodes can be helped with series RC snubbers. In old TVs you could find these placed straight across the diodes, floating above the PCB. Their purpose is the same: tame the sudden change caused by the switched current. That would imply 6 snubbers. Here, I've chosen a shortcut, only three of them placed at the input, mainly because the load capacitor has a series resistance, which limits charging currents, so the snubbers will take care of the inductive spikes.
In addition, all the signals need to be referenced to a global node, 0, or ground. The load's only connection to the ground is through the reverse resistance of the diodes, which is dynamic. Since the circuit is first solved for an operating point (unless special settings are applied, such as uic), this might be problematic, so ensure there is a conducting DC path to ground. That's what the Rpar of C1 is for. It also uses an AC path through its capacitance, to short out parasitic oscillations. Its Rser is there to limit the current. BTW, the simulation runs fine without uic, but the operating point will make the output start from a different voltage than what you might expect.
Those extra parameters that ngspice didn't recognize are specific to LTspice, and they do not contribute to the simulation, i.e. with or without them, same thing.
The parameter Vp, though, matters, and can matter quite a bit. The last part of the reverse recovery for a diode is not modelled that well in SPICE, it's quite abrupt and can give inaccurate results, particularly in switching applications. Vp adds soft-switching, which can improve the outcome. It can also worsen it, if not used thoughtfully.
As for the reading part, here is a page on LTwiki that's worth reading.