VHDL: Getting a part of the actual input in a variable
Your are passing 64 bits as input (63 downto 0). You can select/work with any number of bits by using the signal name and changing the downto parameters:

temp1 &lt;= input(7 downto 0); -- This maps 8 LSBs of input to temp1

temp2 &lt;= input(15 downto 8);

temp3 &lt;= input(63 donwto 56); --This maps 8 MSBs of input to temp3