What are the LE (latch enable) and the CLK (serial Clock) pins on the TQM8M9077?
To quote the datasheet: 


  The TQM8M9077 has a CMOS SPI input compatible serial interface. This
  serial control interface converts the serial data input stream to
  parallel output word. The input is 3-wire (CLK, LE and SERIN) SPI
  input compatible. At power up, the serial control interface resets the
  DSA to the minimum gain state. The 6-bit SERIN word is loaded into the
  register on rising edge of the CLK, MSB first. When LE is high, CLK is
  disabled.


Therefore CLK is the SPI clock input and LE is the SPI chip select (active low).