How to build an ultra-low power time counter?
There are several issues here... 


The oscillator circuit on a BJT doesn't quite spit out +3.3v logic levels.  Fortunately, you want to use a lower voltage to get lower power consumption.  +1.8v logic levels would be compatible with that oscillator-- but then you'd need +1.8 and +3.3v power rails (and probably loose all benefits in your voltage conversion inefficiency.
Dynamic power consumption (the power used when things switch) is mostly from charging and discharging the parasitic caps on the various signal lines.  The way to reduce that is to use shorter, thinner wires.  And by shorter &amp; thinner I mean don't use wires and instead use a chip.  Building this from a collection of chips and transistors instead of one chip that does everything will drive your power consumption up.
You said no microcontroller, but honestly that's the best way to do this.  TI has an ultra low power MSP430 that would run at 32.768 KHz at less than 1.5 uW.  As you've already seen, this type of performance is really hard to beat.  After a microcontroller, my next choice would be a Xilinx Coolrunner-II CPLD-- but I doubt that meets your requirements either.


To summarize, an MCU will give you the lowest total power consumption.  Otherwise your best choice is to use standard logic parts and suffer with something in the several hundred micro-watt range.  Making something out of discrete transistors isn't going to be better.