Ringing problem Bootstrap for high side mosfet driver
The circuit is functional.  I think you mean &quot;ringing&quot; instead of &quot;damping&quot; which is occurring on your traces.
When you pull down (power the low side FET Q3), capacitor C3 is charged through D3 to 11+ volts (12V minus the diode drop).  C13 becomes the voltage source for the drive for Q2, and when Q3 is released and Q2 is turned on, C13 rides on the rising output voltage, maintaining a voltage high enough above HV+48 to keep the FET turned on.
Your ringing problems are caused by the inductance in this circuit.  You need short, wide traces to keep inductance low; what you have is a classic example of too much stray inductance.  When Q3 is turned on, GNDA has a low impedance, but when it is released, the stray inductance and the component capacitance form a resonant circuit.
You have cut a a section of the schematic that fortunately shows all of the very traces that must be kept short and wide.  Don't neglect the path from HV+48V and back to ground from your power source.  Silicon Labs makes an evaluation board for this part; you can get the data sheet to see an example of how a good layout is accomplished.
Good luck!