Simulating FPGA design without having the actual hardware
The standard Xilinx ISE Webpack (the free version that you can download from xilinx.com) includes a simulator called iSim.  It's not a great simulator, but is fully functional and the price is right.

Although I haven't used the Altera tools, it would surprise me if a simulator was not included.

But...  You need to know what a simulator can and cannot do.  For starters, it cannot simulate an FPGA running at full speed.  In fact, they are quite slow.  Depending on the complexity of the FPGA being simulated, it would not surprise me to see it take 1 minute to simulate 1 ms of "simulated time".  If you want to simulate an hour of "simulated time", it would require 1000 hour of real time.  

Also, a simulated FPGA cannot communicate directly with things like your USB port.  The simulated FPGA does communicate with a "testbench".  The testbench is a chunk of VHDL or Verilog code that feeds the inputs of the FPGA (or parts of the FPGA) and verifies the output of your FPGA.  You can do some fairly complex things in a testbench, like use floating point numbers, read and write files, and run logic that is impossible to synthesize.