If I am writing a processor in VHDL, how can I get an assembler to ease testing?
Puh, writing an assembler would actually imply writing a parser, and then writing some kind of Abstract syntax Tree-to-instructions converter.

I think this would, if you want to do it most simple, be done by defining a grammar (ie a set of instructions and registers and immediate value formats and how to combine them) and then generating a parser for that. You can go the Bison/Yacc/flex way about that, but I hear good things about ANTLR, so I'd give that a try.

In the medium run, you'd probably want to implement a clang or GCC backend. That would have the "nice" side effect that you could then compile e.g. C to your instruction set.