Measuring battery voltage and impedance
update Since @Marla raised a good point. Let me simplify this for you.

ADC Analog input impedance 100MOhm.   

EDIT AUG 1: Only basic EE101 math skills are needed to compute resolution which must be &lt;&lt; accuracy of system based on layout, noise, coding errors etc.

Since Vref ~ 1.1V and  50mV accuracy is desired this = 0.05/1.1*100%= 4.5%

Design Spec

Choose 1% accuracy parts and hope to achieve 2% accuracy or use a trimpot with 5% parts and trim to 0.5% error or better which is 10% of your spec.
5% parts are &lt; $0.50 (1 pc)

So use 5% parts with a trimpot to reduce 10% tolerance max stackup error and trim to &lt;0.5% error.  ( or use an analog switch with 0.5% parts and lower value... your choice )  


Power Dissipation Specs for Divider ( incl. optional VBat selector switch)  = TBD








simulate this circuit &ndash; Schematic created using CircuitLab

Plan C

A clever choice of Pch FET Vgs(th)~2V you can get it to act as a &lt;&lt;1 Kohm switch ON and >100K OFF,  using uC logic levels to replace the Analog switch since the circuit impedance is so high using uC logic levels for a 2~4=Vgs threshold and 5V with Vol=0V for ON and 5V-3.3V for OFF.  I'll let you optimize this.

extraneous into

You can measure the 4.5V battery voltage with any analog current meter rated for 50uA by choosing the appropriate series R for full scale and some diodes in series to indicate low voltage as 0% State of Charge near 2.5V  . If you have a DMM or an old analog meter with a 50uA scale, try a 3V white LED in series which may drop somewhere around 2.5V or less at 50uA in series to drop 4.5 down to 2V then 2V/50uA= 40KOhm for a series R for a crude example. ( I could improve the accuracy, but this is just to demonstrate a 50uA 0 to 100% SOC monitor for a battery.)

However, you are using the ATMega chip which draws anywhere up to 7mA on 5V at the high clock frequency of 16MHz.  Do you see any problems here? 

Of course, sleep mode and low duty cycle helps bring that down.  Your regulator may not have a low idle current as well. Do you know what it is?

This may help understand the ATMega power consumption.  The trick to reducing power is reduce the clock rate and increase the interval between measurements  

However, keep in mind all batteries have memory, in spite of what you may have heard. It was just that NiCd cells had a permanent memory that required activation to restore.

So after a heavy load they may resume to almost the same previous voltage due to two equivalent RC circuits in parallel inside every battery cell.  C*ESR=T for each.

So if you draw 100 mA and the voltage drops momentarily that is due to the short term capacitance I*ESR and bigger C inside also has a bigger ESR so it has a longer time constant to recover the previous voltage after a burst of current to a load.