inverting address decoder with low after high
Your 74HCT541 has an output transition time of 5 nanoseconds, typical, when driving a capacitive load. While switching, the capacitive load behaves like a short.

That means the 74HCT541 is okay with getting its outputs shorted for 5ns. The overlap between two outputs of your decoder being enabled will be on the order of 2ns, if it happens at all.

Just connect it without any circuitry to avoid short overlaps like this, it'll be fine.

EDIT: If you use a 74LS137 instead of a 74HCT137, the chip will actually pull its outputs high before pulling another one low. You can see that from tPLH being smaller than tPHL. So just select a decoder where that's the case.