What is the point of 2 inverters in series?
Those are just extra logic cells to buffer the inputs from the loading of so many internal gates. Two inverters in a row give you the same logic truth you put in, just with extra buffering. Very common with older CMOS series. They have very little drive current per inverter cell, much less than 1 mA, so series and parallel combinations were common with the CD4000 series.

A 'U' at the end of the part number meant it was unbuffered, so it had little drive current. Those with a 'B' suffix had buffered outputs, which often were just 2 inverters in series. Look up the CD4013B FF to see more examples of buffer gates.