IC layouts - Transistors (Body)
I do not have enough reputation so I cannot ask this in the comment section.
Do you have the technology documentation for the design you are working on?
You should check it there regarding all the layout requirement you need to fulfill.

Now I try to answer.
For standard CMOS process, you must have Body Bias. Body of PMOS (NMOS) should be connected to the highest (lowest) voltage available.

your first picture is just showing the cross section of the device. it is not complete and most of the time it is not, because the intention is just to show the cross sectional view of the device. It does not define the process. Again, to be sure, you should read the documentation of the technology you are using.