What decides that an IC will be able to sink or source current?
It is the circuit on the IC / chip.

This is a simplified example of what a typical output circuit of any CMOS IC looks like:



A is some logic signal coming from the internals of the IC.

Q is connected to the output pin of the IC.

This is an inverter and it consists of a PMOS (top transistor with the small circle) and an NMOS transistor.

When designing this circuit I can choose the geometry (size, W/L) of both transistors and this geometry dictates how much "resistance" the transistor will have when it is switched on.

Suppose I make the NMOS (bottom) very large and strong but the PMOS very small.

Then the NMOS can draw a lot of current meaning Iol will be large

Then the PMOS cannot supply much current meaning Ioh will be small.

For an "open drain" output, I can simply leave the PMOS out (or the NMOS but that is quite unusual).