Do all SDRAM applications require high-speed routing?
First of all, biggest misconception: it's not only the signal frequency that determines the routing type but the edges too. You can get in trouble even with a megahertz or so if it is steep enough.
That being said there are many different objectives in high speed routing: you may do it for controlling impedance, differential transmission or simply to match delays.
Assuming SDR SDRAM, you only need to worry about delays. DDR SDRAM has special signal levels, need Vrefs and IIRC the clock is differential too. SDR SDRAM has simple LVCMOS signaling so it's more manageable.
Remember that the clock for SDRAM is something essential, it has a maximum frequency but often even a minimum frequency. I don't know if you could run, for example, a PC100 chip at a couple of MHz and hope it will work correctly.
The single most important rule for SDRAM is that the traces for the signal group should be exactly of the same length (tolerance is on the datasheet). At these frequencies the bits have a finite and measurable length on the copper (due to signal speed). The SDRAM samples the lines on the clock edges: if some bit is earlier or later (setup and hold times apply) it will not work correctly.
To ensure this a tecnique called serpentine routing or length compensation is applied: you simply add some zigzag line to lengthen it and match the other one. Luckily modern EDA tools do it semi-automatically.
I recommend to check the application notes of both your SDRAM chip and your controller (the STM32), they most probably contain the detailed rules and useful examples.