Why MOS transconductance is not zero even when drain current is constant?
The simulation you perform is not very meaningful.

The gate-source voltage usually determines the drain-current. In saturation the behavior is similar to that of a voltage controlled current source. However, you force a constant current through the transistor regardless of the applied gate-source voltage. I suggest that you have a a look at the resulting drain voltage. It would also be interesting to see how you calculate or obtain the value for the transconductance.

When done right, the simulation indeed will give a transconductance that is not zero. The transconductance is the linearized behavior for a certain operating point. It just tells you how much the drain current will change when the gate-source voltage changes.

Forcing a current through the transistor will change the operating point but it will not make the transconductance zero. In this particular case the operating point is set by a gate-source voltage and a fixed drain current which is problematic as the drain current is a function of the gate source voltage.

Update: The added plot shows the voltage at the drain of transistor. In the subthreshold region it almost reaches 40V (!), for a standard 180nm transistor this is way too high, the transistor can't withstand such a high voltage. Therefore the model is no longer valid.

Nevertheless the transconductance only gives you information about the transistor for a certain operating point, not about the actual circuit. To make things clearer think about a simpler case. A constant gate-source voltage of 1V is applied to the transistor. For sure the simulator will calculate a certain gm, which tells you how much the current would change in case the gate-source voltage changed even though this is not possible since the voltage is fixed. The same applies to a fixed drain current.