What happens if a branch prediction overwrites a value?
It's very possible that the instruction will be executed, since your question refers specifically to MIPS in the tags. It lies in what is called a branch delay slot, and it is executed without regard to the result of the immediately-preceding branch. This could be considered a primitive branch predictor with side effects, where the prediction is to not branch, and the side effect is for the pipeline to not be fully flushed and all actions "undone". Compilers will generally be aware of this for a given architecture and reorder instructions (or insert a nop) appropriately.

On the other side of the coin, there are processors that actually have hazards of overwriting necessary registers when a branch is mispredicted. This can be handled using a form of register renaming, in which one of two things happen:


Values written get written to a different set of registers with speculative data; that set of registers is then used if the branch prediction was correct (Future File)
Old values are written to a history buffer to be restored if the branch prediction happened to mis-predict the path to be taken.


Of course, register renaming of registers to either speculative or history buffers can be combined with more advanced register renaming techniques that eliminate the risk of value overwrites and enhance performance in some other way by removing serialization of instructions using a register, one after another.