What is the relation between DAC peripheral bus and conversion/settling time
i think i now understand the reason as to why the designers provided a programmable peripheral clock to the DAC module. 

It is usable for cases wherein we wish to use the DMA module to provide data to the DAC module. The peripheral clock is fed to a counter (writable via DACCNTVAL register) which generates a hardware interrupt (INT_DMA_REQ) which can be used by the DMA module to source data.

So, providing a peripheral clock with programmable prescalar along with a programmable counter helps to achieve all sorts of update rate.