Basic TIE HIGH and TIE LOW circuits in Digital VLSI Design
I needed to flesh out the details of this circuit before I answered this question!

As you are aware, the N Channel MOSFET is configured as a "diode connected" transistor because the gate and drain are shorted together. Because of this, the MOSFET is in constant saturation mode and acts like a variable resistor.

For an more thorough discussion of this, see this answer here on EE SE.

Now, since a P channel MOSFET is turned on when then gate is held low, and the N channel MOSFET is acting as a pull-down resistor at the gate, the P-MOSFET is also kept in active mode, and allows current to flow from the source voltage through the drain to the output.