How to draw a timing diagram
Think of the timing diagram as looking at the face of an oscilloscope. There are horizontal lines representing the voltage levels and signals, then there are vertical lines representing time.  In this case the best time interval would be 5nS (per each vertical line) since this is the shortest delay time shown and 10nS is divisible by 5nS.  To show all 3 inputs and the outputs you would want a 4 channel scope, which could be shown by using 4 horizontal lines.

As in the other responses, to show all possible states you need to show all possible levels of all the inputs, in this case logic levels have 2 states and you have 3 inputs.  So the combination of 2 states by 3 inputs gives 2^3 or 8 state changes.  The total time is 10nS + 5nS so the horizontal time needs to be at least 8 x 15, 120nS. 

The 4 horizontal lines can be labeled A, B, C, and F.  Again as above, start with all the horizontal lines at 0v (low).  In this case the F output is also low at the start because that is the logic of the circuit.  

Next moving from left to right show only the A line rising to logic high, leaving B and C low, now you calculate the output F, but before showing the change in output F you must add up the delays, in this case it is 15nS.  So 3 vertical lines passed the initial change in A the F line will change to high.

Continue the lines as A, B, and C change from 000, 100, 010, 110, 001, 101, 011, 111, and back to 000.  Just remember that the change in F is always delayed by the total delays of the gates that the changing signal passes through, (so the total vertical lines will really need to have 3 extra at the very end to show the final delay in output F).