Is this H bridge circuit viable
There is one major problem with your H-Bridge and two possible issues depending on the mode of operation

Lack of bulk capacitance

There doesn't appear to be any large value capacitors near the H-bridge. Now maybe J2 is right up close to relatively large capacitor, likewise the H-Bridge may only operate as a dumb fwd and rev control with no PWM.

if however you plan to send any form of modulation then the lack of bulk capacitance will start to have an affect on operation. ringing close to the H-Bridge, potentially overvoltage, poor transient response.

Gatedrive type

The complete circuit uses a BJT to pull the gates of a LEG to 0V and a 10k to pull it high. 

This means the BJT can pull the GATES low (Ntype going OFF, Ptype going ON) very fast but the 10k is needed to pull the gates HIGH (Ntype going ON, Ptype going OFF)

If you plan to PWM the gates &amp; if the the inverter was of any real power you would want to switch the FET's fast enough to minimise switching losses but slow enough to mitigate any ringing &amp; shoot-through mitigated via deadtime.

The alternative, especially when you are using a complementary pair you aim to have slow TURN-ON and fast TURN-OFF for each switch. With the presented drive topology when when INPUT_A or INPUT_B transitions LOW to HIGH you might be ok as the Ntype turns off FAST and the Ptype turns on "fast".  However... for a HIGH to LOW transition on INPUT_A or INPUT_B the NTYPE will turn ON slowly and hte PTYPE will turn OFF slowly ... depending on the gate capacitance and the gate threshold w.r.t. the DCLink voltage you could experience a soft shoot-through for this transition

Again this might not be an issue if you do not plan to PWM at any reasonable frequency.

The main problem however...

H-Bridge Topology.

You are right H-Bridges &amp; inductive loads need a freewheel path and you have that with the four FET via the intrisic diode. You however have added 4 additional diodes and they will fail the moment you attempt a H-bridge state transition.

The classic H-BRidge.



There are five LEGAL states in a H-bridge there are then two ILLEGAL &amp; four that do nothing.

The LEGAL states are:


All switches OFF - any current would freewheel by the supply &amp; decay
1 &amp; 2 ON - positive current can build up in the load
3 &amp; 4 ON - negative current can build up in the load
1 &amp; 3 ON - zero volt loop that minimises load current decay OR shorts winding.
2 &amp; 4 ON - zero volt loop that minimises load current decay OR shorts windings.




Due to your gatedrive Topology State1 is only reachable when the power is off. With no INPUT_A,B the gatedrive force the bridge to State5 (bottom FET's ON)

Now consider your topology. 



Now consider transitioning from State2 --> State5 because of loss of control or trying to use the zero volt state: Because the upper FET's are open the current wants to commutate via the lower diodes BUT the additional diodes are now blocking the freewheel path. The inductor only cares about satifying \$V = L\frac{\Delta i}{\Delta t}\$ &amp; with this topology you are attempting to instantaneously STOP the current flow and thus the voltage will increase to maintain the current flow until those additional diodes avalanche &amp; be destroyed.