There is a way to write into FIFO on both clock edges?
My first inclination would be to sync two FIFOs, each working on a different clock edge, and add additional circuitry to ensure they stay in sync.  A second approach would be to XOR the clock signal with a delayed version of itself, essentially generating a pulse on each clock edge.  However, if you don't have a faster clock available, it's going to be an asynchronous delay, so you have to make sure you satisfy your setup and hold times across all conditions.