I2C pull-up resistors calculation & where to place them
The pull-ups are generally located near the master device.

This app note goes into some of the calculations. Essentially, the size of the pull-up will be defined by the total bus capacitance and the pull-down capabilities of the devices on the bus:

\$ R_p \ge \dfrac{V_{dd}-V_{OL}}{I_{OL}}\$

and

\$ R_p \le \dfrac{300ns}{0.847298 \times C_{bus}}\$

where \$V_{OL}\$ is the logic low voltage needed, \$I_{OL}\$ is the sinking current, and \$C_{bus}\$ is the bus capacitance.

Of course, once your sample is built, the best thing to do is scope the waveforms and make whatever adjustments are needed.