Small signal analysis of 2nmos
First, solve for DC operation point. 

\$I_{D1} = \frac{K_{n1}}{2}(V_{GS} - V_t)^2 = 0.4\textrm{mA}\$

And for the second NMOS

\$I_{D2} = 1\textrm{mA}\$ and \$V_{GS2} = \sqrt{\frac{I_{D2}}{\frac{K_{n2} }{2}}}+V_T = 1V\$

And now the transconductance

\$g_{m1} = K_{n1}(V_{GS1} - V_T) = 4\textrm{mS}\$

\$g_{m2} = K_{n2}(V_{GS2} - V_T) = 4\textrm{mS}\$

And finally, the voltage gain of a first stage is:

\$ Av1 = - g_{m1} \cdot R||ro1 \$ 

Where \$ro1 \approx \frac{1}{\lambda I_{D1}} \approx  25\textrm{K} \Omega\$

Therefore the first stage voltage gain is \$Av1 = -9.09\:V/V\$

And the voltage gain for a source follower is 

\$Av2 = \frac{g_{m2} \cdot ro2}{1 + g_{m2} \cdot ro2} = 0.9756 \: V/V\$

So the total gain is \$ -9.09 \cdot 0.9754 = - 8.87 \: V/V \$