U and the end of vector in iSIM
You have this situation because you have an error in your assignment

Y_32b &lt;= std_logic_vector(resize(signed(X_16b), 32-1));


You expanded x_16b upto 32-1 (31 bit) and one bit stays undefined so you received U in the bit of the bus. You have to expand X_16b upto 32 bits, try it as follow:

Y_32b &lt;= std_logic_vector(resize(signed(X_16b), 32));


And it should work correctly.