DIP package: meaning, dimensions and nomenclature
DIP and DIL are synonomous.

The width of a standard DIP depends on the pin count. Low pin count DIPs are 0.3 inch row spacing. High pin count DIPs are traditionally 0.6 inch spacing. I think 22 pin and below were traditionally 0.3 inch while 24 pin and above were traditionally 0.6 inch but i'm not 100% sure on the exact cutoff.

A P or C prefix usually reffers to the packaging material. P for plastic C for ceramic.

A S prefix usually reffers to "skinny". This term is used for 0.3 inch wide packages in pin counts that would traditionally be 0.6 inch wide. Typically this is seen with 24 and 28 pin packages.

There was also something called "shrink DIP" which had a smaller pin spacing within the rows but i've never actually seen one.

Surface mount DIPs did exist but were/are rare. Most surface mount chips are SOIC or smaller.

You do occasionally see other variants (in my current project i'm using some optoisolators that come in a 0.4 inch wide DIP). If in doubt check the diagram in the datasheet.