Circuit to first turn on an FPGA, with an enable pin from FPGA so it can shut itself off
This might work – see circuit below.
On power up, both sides of C jump to the rail (VP) and the regulator turns on.
C starts charging through R and at some point the shutdown voltage (dotted line in the expertly drawn Fig. 1 below) will be reached and the regulator will turn off.
To prevent that, we need to make the RC time constant large enough that the FPGA has time to get configured (on the order of 100mS if booting directly from Flash), and that the output pin is initially configured to drive its ouput pin high immediately.
Fig. 2 shows the FPGA configuration happening at t1 and driving the output pin high.
Of course, the FPGA output voltage minus the D1 diode drop must be higher than the shutdown voltage for this to work.
When the FPGA decides to power itself down (at t2) it drops the output low and the shutdown pin voltage decays to zero, shutting down the regulator.
The diode D1 is there to protect the FPGA, only really necessary if VP is a higher voltage than the FPGA pin can tolerate.
The diode D2 is there to quickly discharge C when power is truly turned off, so that circuit works if power turned back on quickly.