How to optimise Boolean functions in very many variables?
For implementation of a complex boolean function it is normally done either by putting in an FPGA in which case the FPGA software will do the minimization (not necessarily into gates but more likely into LUTs) or you can directly put the table into a memory (FLASH, RAM whatever appropriate).

For the memory implementation the binary input signals form the address inputs into the memory.

In modern logic you will rarely find a large number of gates used in an implementation of a logic function, a table look up approach is commonly used (FPGA or discrete).