When to monitor UxSTAbits.TRMT and UxSTAbits.UTXBF
In block diagram at page 15, it is shown that the Transmit FIFO buffer is followed by Transmit Shift Register. 



UxSTAbits.UTXBF bit indicates if the FIFO is full. If the FIFO is not full, you can write to UxTXREG register.

UxSTAbits.TMRT indicates if the last transmission has completed (FIFO and shift register are both empty). You should not turn off the UART or put MCU into sleep while the transmission is not completed. If you are not planning to do those, you can safely ignore the state of this bit.