Intel IA-32 Protected Mode HW-Tasks: IRET return from interrupts within a nested HW-Task ( EFLAGS.NT=1 )
Have a look at the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3:


  6.12.1.2 Flag Usage By Exception- or Interrupt-Handler Procedure
  
  When accessing an exception or interrupt handler through either an
  interrupt gate or a trap gate, the processor clears the TF flag in the
  EFLAGS register after it saves the contents of the EFLAGS register on
  the stack. (On calls to exception and interrupt handlers, the
  processor also clears the VM, RF, and NT flags in the EFLAGS register,
  after they are saved on the stack.) Clearing the TF flag prevents
  instruction tracing from affecting interrupt response. A subsequent
  IRET instruction restores the TF (and VM, RF, and NT) flags to the
  values in the saved contents of the EFLAGS register on the stack.


An exception entry will save an exception stack frame (including current EFLAGS), and then tweak the (new) EFLAGS to ensure correct and safe execution of the exception handler.