PCB practices: Grounding, and interaction b/w switching and control loops
You want the ESR of C1 to be much lower than the V1 so the loop is small. You also want it lower than Q1 rON to be reduce input ripple.
Top one is hard to analyze as the ground plane helps Q1 but then gap becomes a slotted ground radiator antenna.


I think neither is better as the external transformer is going to be excessively noisy and ferrite CM chokes will be mandatory to reduce radiation of Vout cables acting as noisy antenna.  

I suggest you perform a bench test using a generator to drive Q1 C1 with Rs &amp; transformer &amp;  output fully loaded (D,C,R). YOu don't need a PCB to test this EMI problem and see if you can measure the sense current and output accurately without noise and verify EMI egress with a shorted loop scope probe for near field noise. Designing a PCB without this awareness will be pointless.