microprocessor 6502 addressing scheme
The 6502 jump instruction is three bytes long:

JMP   ADRL  ADRH


It is not possible to load both bytes of the PC at the same time, since the 6502 is an 8-bit CPU and can fetch only one byte at a time.

Therefore, it is executed in three cycles, one for each byte. After the instruction has been decoded, the CPU knows it is a JMP instruction. The low byte of the destination address (ADRL) is fetched and then held over until the beginning of cycle 3, so that the original PC value (updated) can be used to fetch the high byte of the address (ADRH) in cycle 3. 

At the beginning of cycle 3, a new memory fetch is started with the original PC to obtain the high byte of the new address.  At the same time, the held value comprising ADRL is used to update the low byte of the PC. 

At the end of cycle 3, the fetched value (ADRH) is used to update the high address of the PC.  This completes the jump instruction, since the next instruction will be fetched from the new PC location.