PIO communication in PCIE
PCIe maps resources in an endpoint using a Base Address Register, or BAR, that defines the offset of the resource and its size. The BAR values are accessed through PCIe config space, while the mapped resource is through memory space. 

Setting up the BAR and associating it with a virtual address is dealt with by the kernel driver. To use a resource, you open it like a file, then get its virtual address from mmap(). The driver hands you the address, which you then use to read and write your device.

A handy way to get familiar with this is to try out Bill Farrow’s pcimem package. This shows the basic process for PIO. On github here: https://github.com/billfarrow/pcimem

The bar_hit signal just means that the address matched.

If you have a choice, consider using Artix instead of Spartan. Artix has a hard PCIe macro which makes the job easier.