Data Transmission Using RJ45 Cable in Stratix IV dev board
To discuss with the Ethernet port of your laptop and the development board, you need to use some components mounted on the board.

What you want to do is an ethernet communication. If you are aware of OSI layers, you need to understand the layer 1 and layer 2 for a basic communication between two equipments.

At layer 1 (electrical layer), we will use a PHY which will receive data from the layer 2 (MAC) and convert it into electrical signal on two pairs (10/100Mbps) or four pairs (1Gbps). You will also have a transformer on the path, but on your board it is integrated inside the RJ45 connector.

You have a Marvell 88E1111 PHY on your board which is connected through SGMII to the FPGA. So you need to implement a MAC IP in your FPGA to discuss with the PHY.
( Information here : http://www.altera.com/literature/manual/rm_sivgx_fpga_dev_board.pdf - page 41)

If you take this IP : http://www.altera.com/products/ip/iup/ethernet/m-alt-ethernet-mac.html

You can see on the diagram, that you have the MAC function, which we want. We also have a PCS and PMA functions which are PHY layer functions but are used for the SGMII signal. So you need all these functions.

I'm not a FPGA engineer so I can't provide you a complete how-to, but the best I can say is to read the 802.3 standard about Ethernet, it is free. http://standards.ieee.org/about/get/802/802.3.html
Section one : General specs and 10 Mbps
Section two : 100 Mbps
Section three : 1 Gbps