ZPUino soft processor
A processor such as the AVR is implemented using digital logic so it's also possible to load a similar design into an FPGA that behaves the same way. They are often referred to as soft processors and no doubt the original design for the soft processor would have been done using a traditional HDL. Once someone has 'done the hard work' you can load up the design into the FPGA and write software using C or any other language you would normally use for that processor that has been created within the FPGA.

It's probably not a bad way to initially get up and running with the board but if you stick with just treating it as a 'FPGA AVR' you really won't get any benefit, an actual AVR would be cheaper and more efficient under most circumstances.

Where soft processors are most useful is when combined with HDLs such as Verilog or VHDL to perform additional functions that an AVR alone might not be so good at. An example might be capturing a video frame that arrives at 50MHz and buffering it, and then using the CPU core to take the image and transfer it over a GSM module taking care of all the protocol intricacies that are handled more easily with traditional C code.

Note that I'm just using the AVR as an example you're probably familiar with, the ZPUino may well have a different instruction set but either way when you create a processor within an FPGA it's possible to target a compiler at it and use traditional programming languages.