How to split an 8 bit BCD number into two separate 4 bit BCD numbers using logic gates or VHDL?
In VHDL, you can directly slice the array. Let's assume allparts is the 8 bit BCD array you want to slice, and first_part and second_part are the 4 bit BCD signals you need.
allparts, first_parts and second_parts is of type std_logic_vector.
firstpart &lt;= allparts(7 downto 4);
secondpart &lt;= allparts(3 downto 0);

...or if firstpart and secondpart are simply alternate ways to refer to part of the allparts signal, you may want to use an alias:
alias firstpart is allparts(7 downto 4);
alias secondpart is allparts(3 downto 0);

Credits: Charles Steinkuehler
https://stackoverflow.com/a/10376420/12311164