Will this UVLO work?
Yes your circuit can work but could be improved.


  If you apply power then your (power loss detect) will be higher than
  the Vcc rail for 1 second? I don't imagine this to end up well.


If your potential divider impedances are high enough, the current that could be pushed into an IO pin will be low. The data sheet will hopefully advise you that, in the event of Vcc still rising on the CPU, you should be OK. However, if you use a schottky diode from the R1/R2 node to the CPU's Vcc rail AND put an extra resistor in series with the input pin you should be fine: -



Also, if your input pin can be configured to "use" hysteresis (like a Schmitt trigger) then that would be better because, you will have more defined logic levels and most (if not all) UVLO circuits I have seen have hysteresis to prevent a series of glitchy "detections" as the supply is falling through the area where the input gate is most sensitive to non-digital levels.