reduce sensitivity of digital input
(1) You could move the threshold point nearer to the +ve rail so that a 5k input to positive resistance is not seen as a high level. An easy way to do this would be to use a comparator to set the trigger level.   

The comparator MUST be able to accommodate Vin = +ve rail in its specification. 
So eg 5k up and 10k down = 3V x 5/(5+10) = 2V in with a 3V system.
You can make the system ratiometric so that both the comparator reference divider and the  switch are both fed from the battery voltage so that as the battery voltage falls the ratio between trigger point and measured input is the same.

Standby current worst case above at 3V is 3V/(5k+10k)= 0.2 mA.
That is better than 0.5 mA but still too high.
The pull down could be altered to say 47K so that when switch leakage is 5K the in voltage is 47k/(5k+ 47k) = 90% of supply. Setting the threshold at say 95% of supply allows correct switching. Switch on resistance then needs to be &lt; 2.47k which should be easily met. 

(2) The microcontroller could poll the switch at a rate fast enough to ensure switch presses are not missed - say 100 mS period or less. A pull down could be applied only just before reading. Between polls the pin can be allowed to be pulled high by the switch with perhaps an external 100k pullup as well.

Or a capacitor could be added to the pin and used to measure R_switch by setting the pint to output, driving the port pin low, setting it to input and measuring how long it takes to rise again.