PLL multiplier input output phase
The phase error (the tracking error) depends upon at least 2 things

1) the order of the control loop that performs the phase tracking

2) static and dynamic errors caused by DC and timing errors in ALL the circuits that touch the edges (the phase information) of both the Input and the Internal clocks.

I once assisted a teammate in implementing a QuadratureGenerator; the 90-degreesness was very bad; we were told "It has a sweet spot". 

OK. So I did some back of the napkin math, and realized the loop-gain was 1.7, meaning the ability-to-control really did not exist. Additionally, the input signal was &lt;&lt; 1nansecond edge, and the phase-adjustment required a slicer to select a time-of-zero-crossing, pretty much impossible on a fast edge. To function, the circuit skewed its operating point into saturation, to greatly slow the edge and allow the slicer to be effective.

Learned quite a bit about phasenoise, from that circuit.