How to send a packet every n clock cycles in verilog?
You are very close. The error is the 'next_count' is only updated in the combinatorial always @(*) block and 'count' is only update in the register/clocked part always@(posedge clk_i....

Thus remove  next_count          &lt;= 3'b111;

I can't see the rest of your code so start with that.

You did not say how many cycle you have to wait: 7 or 8? 
I'll be honest. Most of the time I write code which gets me 99% of the way. If the data is stored after 7 or 8 cycles are details which are so easily solved that I often run the simulation first and then make a +1 or -1 correction. 



Post edit after new code:
I can't debug your state machine for you, but I can make some remarks. 
You set reg_write_en and some lines lower later clear it again. 

I assume this is supposed to really work in hardware not just in simulation.
If so your code produces lots of latches. You will not be notified of those until you synthesis the code. For example these:

read_resp_tx_qpe_dest      
read_resp_tx_mod_dest  
read_resp_tx_c_routing 
reg_read_en
reg_write_en


In your combinatorial section always @(*) you have to assign a value to every variable in every state. If not you get latches. One way to do that is what you do with next_state and next_count: set a default value at the top. But then it is also good practice to document that it is a default value which will be changed later. 

// Defaults:
next_state  = state;
next_count  = count;
reg_write_en = 1'b0; 
reg_read_en = 1'b0;


The first two have to stay the same if not touched.
The other two are examples of variables which are only set in one or two states and are zero everywhere else.
As for your 'read_resp_tx...' variables: I don't know what else is done with them so you have to decide how to handle them. 

As to splitting your code in a register an combinatorial section: That is up to you. Whatever you are comfortable with. I tend to do it a lot unless it is a trivial state machine. I have seen code from a very big IP company which provides millions of CPU cores all over the world and they use it everywhere. I suspect it is obligatory in their coding style guide.