Probing with oscilloscope causes current drop
You must use a 10:1 scope probe which is typ. 9 pf //10M which should never bother a good clock design. But in your case it may slow down the clock from load capacitance. Some Ring Osc uses string of inverters in a loop each with &lt;1pF so putting a 9pF probe on the output adds latency from current limit. dV/dt=Ic/C







simulate this circuit &ndash; Schematic created using CircuitLab