logic gates. What makes it what it is?
The levels of abstraction are gate -&gt; transistor -&gt; silicon.
A NOT gate at the transistor level might looks like this:


If you think of a logic TRUE or HI input voltage as pushing button, and a logic FALSE or LO input voltage as releasing the button then the NMOS can be conceptualized as an normally-open pushbutton and the PMOS as a normally-closed pushbutton. If the two transistors have their inputs/gates (or base if BJT transistors are used) that is the same as mechanically ganging the pushbuttons together so that pushing a button pushes multiple buttons simultaneously.


Or you can think of the NMOS as a normally open relay and a PMOS as a normally closed relay, with a powered coil has a logic TRUE/HI voltage input and an unpowered coil as a logic FALSE/LO voltage input.
You can use this concept to easily see how the logic circuit is behave if you are not very familiar with transistors.

Once you wrap your mind around it a bit, the easier way you can think of it is that an NMOS blocks current when the gate is a LO voltage and conducts current when the gate is a HI voltage. A PMOS is opposite where the PMOS conducts current when the gate is LO voltage and blocks current when the gate is a HI voltage.
NOTE: This is a vast simplification and ignores a lot of requirements to get a MOSFETs to behave this way in a real circuit, so if you actually try to build a circuit using these rules alone without knowing these quirks, the circuit will almost certainly not work. One quirk, for example, can be seen in how the PMOS is only ever used on the top-side with the source-terminal connected to +V, and the NMOS is only ever used on the low-side with the source-terminal connected to GND. Whereas, relays or pushbuttons behave the same no matter where they are positioned in a  circuit.

A NOR gate at the transistor level might look like this:



simulate this circuit &ndash; Schematic created using CircuitLab
A NAND gate at the transistor level might looks like this:



simulate this circuit
From here, you can turn the NAND/NOR gate into an AND/OR gate by chaining a NOT gate to the end of it.
And each MOSFET that makes up the gate circuitry in physical silicon might look like this (there are different ways to physically arrange things for different optimizations):


Taken from: https://encyclopedia2.thefreedictionary.com/MOSFET
Under an electron microscope they might look like this from above:

Taken from: https://davidabergel.wordpress.com/2017/02/22/transistor/
But the cross section under an electron microscope might look like this:

Taken from: https://venturebeat.com/2012/09/23/samsung-making-apple-a6/