Xilinx Design ISE Tools - See used Block RAMs
After running the step Synthesis the tab Design Summary includes a table with the device utilization. Within this table there should be a line starting with "Number of Block RAM / FIFO" giving the amount of Block RAMs used and avaible. Note these are estimated values.

If there is no such line, then your lookup table has not been synthesized to block RAM. Open the Synthesis Report from the left tree in the Design Summary tab. Search for XST:3218 meaning that your lookup table was to small and has been implemented as LUT-RAM.

After running Implement Design the table is updated to the real values and now includes a line starting with "Number of RAMB18/..." or "Number of RAMB36" (depends on the selected FPGA).