Passing inout port through hierarchy in Vivado
I thought that I had used Bi-directional port inside a hierarchy but to be 100% sure I tried a simple example. 

That example passed synthesis in Vivado without any problems. However it maybe that it passes because the code is so trivial. Who knows what idiosyncrasies the Vivado synthesis tool has. This was what worked for me:

module bidir_top  (
   input         clk,
   output         I,
   input          set_in,
   inout          pad 
);

bidir bidir_0 (
   .clk     (clk),
   .I       (I),     //&lt;
   .set_in  (set_in),//&lt;
   .pad     (pad)    //X
); // bidir

endmodule // bidir_top  

module bidir (
  input  clk,
  output I,
  input  set_in,
  inout  pad
  );
reg [1:0] cnt;
  always @(posedge clk)
     cnt &lt;= cnt + 2'b01;  

  assign pad = set_in ? 1'bz : cnt[1];
  assign  I  = pad;

endmodule  // bidir 


You can try to make the tri-state expression as basic as possible as shown above. Maybe that works.

Alternative is to make a tri-state or read/write signal and pass all three signals (In,Out,Tri) to the top and there you have to make your I/O pads.