LTSpice simulation stalls after 100ms transient with 'Heightened Def Con'
Many thanks towards all the people who contributed their comments, thank you @winny, @Arsenal, and @a concerned citizen!

The simulation runs and does not stall anymore after making these changes:


added .option cshunt=1e-15 reltol=0.003 abstol=1e-10 gmin=1e-10, see LTwiki
making XOR, d-flip-flop, and delays sightly heterogeneous


Before I had only made changes to reltol and abstol which did not suffice.