Counter for 20 GHz clock
15 years ago I designed a two parameter digitizer (energy and time) to measure time of flight.  For this system I used a constant current source into a cap held in reset by a JFET.  On receiving the trigger (NIM fast logic, level shifting kept in the analog (as opposed to saturated switching) regime, the JFET opened, and I was able to achieve 50ps resolution by digitizing the linear ramp, and interpolating from a 62.5MSPS ADC in an FPGA .
The circuit was quite simple, and matched simulations perfectly.