How can I generate random numbers in verilog using clock speed?
One easy way to do this is to write Verilog code that implements a counter that increments from 1 to 13 in repetitive manner. Drive that counter using the 50MHz clock. Enable the counter to count during the interval that the trigger switch is pressed. (That interval will be variable based upon the user). After the switch release the counter will become disabled and will freeze at one of the 1 to 13 counts. Use that as your random number.