Logisism Help - Building D Flip-Flop
So I created it like the above picture in Logisism, I'm wondering how I can add Clear functionality where if CLEAR is equal to 1 then it resets it.


The subcircuit to the right, consisting of the two cross-linked NAND gates, is an R/S flip-flop. You can expose the R and S inputs by adding a third input to each of those gates.


  It just has D input and Q, NOT_Q outputs. How do I make CLOCK an input?


The input at the top of the left side, marked with a triangle, is the clock input.