Are activated open-collector and open-drain circuits wasting energy?
What puzzles me is that it seems inefficient. In order to switch the output off, I need to effectively short the circuit in order to pull it to ground. Is my interpretation correct? If not, why not?




Figure 1. The opto-isolator's output is shown with RL, the load.

What you are missing is that RL is the load. When the output is pulled low there is voltage across RL and power is consumed. When the output is high there is no voltage across the load so no power is consumed.

This arrangement works fine for certain designs but, as you suspect, it would waste power if, for example, it was only driving a CMOS input. In that case a push-pull arrangement would be much more efficient.







simulate this circuit &ndash; Schematic created using CircuitLab

Figure 2. Simplified representation of open-collector/drain output and push-pull outputs.


Figure 2a has no internal means of pulling the output high so the pull-up resistor, R1 is required. Current draw is determined mostly by the value of R1.
Figure 2b can pull high or pull low. In the steady state the current draw is determined by the input impedance of the next stage. This is potentially much more efficient.