How to reduce loading of JTAG lines by USB UART bridge using shared signals
Unless you have general signal-integrity board design issues and are trying to use quite fast clocks, your issue doesn't seem to be &quot;noise&quot; but rather loading and driver conflict.
What you need to do is to get the USB-UART chip to tristate all signals.  How you would do that is typical device-unique, but many can be commanded to do this from a host, or may have a reset pin accomplishing such purpose.
If you cannot do that, you'll need to put in series resistors of several kilhohms and hope that this allows the JTAG adapter to out-drive the thus weakened states of the USB-UART outputs.
Another solution might be to find something that could function as either the USB-UART or the JTAG adapter, under software command from the host.  Depending on the signal assignments, something like an FT2232H could perhaps do it.  Something more flexible like an FX2 or FX3 almost certainly.  And an implementation in a generic USB-enabled MCU could obviously be customized to accomplish both roles.