When is using latches better than flip-flops in an FPGA that supports both?
Your question is basically, "when do you know you need latches?"  Which, as you implied, is a subjective question. Expect more opinion than fact as answers.  That being said, here is my opinion:

I, like you, often find better ways to use flip-flops thus avoiding latches. The resulting logic is often more elegant and robust.  But there are times where I don't have enough control over the logic to avoid latches. For example, I might be interfacing to a processor bus that requires latches to meet the desired specifications. Since I can't redesign the CPU or the bus, I'm stuck with the latch.

In the past 13+ years, that is the only time I have needed latches.