Integrator Design for Small Input Signal
About -15% error when the input is 1mVRMS sine wave


The 15% error could mean a DC error or an AC gain error. Start with a DC analysis. The input offset current for the Maxim chip is about 0.5 nA and this will produce an offset voltage error of 0.5 nA x 100k approximately. This is an error of 50 uV at the input. 

You have DC gain of 22M/124k = 177 therefore, the offset voltage produced by the input offset current results in a dc output from the op-amp of about 9 mV.

Is this the 15% you refer to?

As for AC gain, you have a 22 nF capacitor in parallel with the 22 Mohm resistor and these could produce an error in gain of 10% at some frequencies. The 3dB point is 0.32 Hz so any AC signal having a frequency upwards of this could subject to the gain error you may be referring to.

Ditto the 4u7 and 23k7 input impedance. Are you using 10% capacitors by any chance?

So, you have DC error and AC gain errors to consider.


  Does anyone have ideas about how to design an integrator for small
  input signal with high accuracy?


Given a decent enough spec, yes, plenty!