T and D flip flop - > pin
Traditionally a clock is edge triggered.
A level-driven &quot;causer of change&quot; would tend to be an &quot;asynchronous load&quot; (if it accepts arbitrary data) or a &quot;set&quot; or &quot;reset&quot;/&quot;clear&quot; if it is both the cause of change and the resulting state.
To understand the details of your particular part, please refer to its data sheet.  That's really where you should start with something like this anyway.  If there's a specific aspect of the data sheet which is unclear, then asking about that makes a much better question.