Multiplexer for multiple parallel flash?
Asynchronous Enable/Standby 
  
  When the device is not performing an
  operation, the CE# pin is typically driven HIGH and the device enters
  standby mode. The memory will enter standby if CE# goes HIGH while
  data is being transferred and the device is not busy. This helps
  reduce power con- sumption.
  
  The CE# “Don’t Care” operation enables the
  NAND Flash to reside on the same asyn- chronous memory bus as other
  Flash or SRAM devices. Other devices on the memory bus can then be
  accessed while the NAND Flash is busy with internal operations. This
  capability is important for designs that require multiple NAND Flash
  devices on the same bus. 
  
  A HIGH CLE signal indicates that a command
  cycle is taking place. A HIGH ALE signal signifies that an ADDRESS
  INPUT cycle is occurring.


m69a_2gb_nand.pdf – Rev. H 09/10 EN, page 18