Is it possible to implement SOP with 4 terms by only 3 NAND gates?
It makes sense, because if you look at the function, there are pairs of terms in which C appears both negated and not; so it has no influence on the output; and, if you look at the truth table, the same applies.

$$
{\lnot C} + {C} = 1
$$
and
$$
AB \cdot (C+ \lnot C)=AB \cdot 1 = AB
$$

So you can just discard C.