How to design a buffer amplifier for STM32 ADC
are there any issues with what i've done?


Maybe: -


The op-amp input offset voltage can be as high as 3 mV so this will tend to add a small error to your potentiometer output but, it's probably OK.
Input currents are quite small for this device so any volt drop across R101 will likely be negligible.
The common mode input range IS going to be a problem - when powered from 5 volts, the maximum input voltage is 4 volts typically and your pot could produce 5 volts. I think this sounds like a showstopper.
The high level voltage output is typically 4.65 with 1 mA load (and your load is going to be more like 6 or 7 mA so this is a showstopper.


So you have a couple of showstoppers but if you use very high values of resistors and form a potential divider on your potentiometer output you might be able to live with the lack of linearity due to loading the pot. Then use your amplifier circuit without the output pot-divider of R102 and R103.