Optimizing regulator power circuit for low noise?
Pretty much all LDOs are very quiet, the ferrite bead (inductor with huge AC losses) is not there to suppress noise from the LDO itself but to filter out any VHF noise that comes from the main power supply, ferrite beads work best for attenuating noise from 10MHz-1GHz (they work at higher and lower frequencies, but that's the most common range). 

Page 8, Figure 19 of the datasheet has the LDO's noise attenuation characteristics, at 1MHz the ripple rejection ratio is around 40dB for a 500mA load, 40dB is a 100x reduction in the amplitude of the voltage ripple. 40dB at 1MHz is quite good for an LDO, if you've got 10mVpp coming in (which is reasonably noisy), then you'll have only 100uVpp of noise on the output (on page three it says "Output noise 10Hz-100kHz: 45uVrms, so it's got a pretty clean output to begin with, and a line regulation of 40uV per 1V of input change looks pretty good to me).

The ADC most likely adds at least another 20-40dB of PSRR (power supply rejection ratio) at 1MHz so already you're looking at ~1-10uV worth of noise which is 5-50 times smaller than the LSB of a 16bit ADC operating at 3.3V. Now the ADC and the LDO's PSRR's will degrade at higher frequencies, but so does the input attenuation of your ADC (they have internal bandwidth limits so noise much more than 10x your sample frequency is unlikely to be an issue unless it's really big in amplitude)

Now in reality, things like coupling and parasitic inductances cause far more noise problems, so I'd say that that LDO is most likely just fine for your application.

Now, as for your other questions:
Yes, you can swap out the polarised cap for a non-polarised one, but as they're usually more expensive and have higher ESR, I'm not sure what the advantage would be.

There is no reason why you couldn't change up to 100uF or 1000uF for the input capacitor, it's just a bulk filter cap, it's value isn't too important. The datasheet only refers to how much output capacitance you need, this is because some (but not many) LDOs can become unstable if there either isn't enough or there's too much output capacitance, its internal control loop gets all confused. They're just saying that it'll still work with as little as 1uF of output capacitance so you could use just one really tiny ceramic capacitor as your output filter cap - it's mainly a space and money saving thing.

Have a look at Figure 2 on Page 1 of the datasheet "Typical Application Circuit", that is the best place to start as it tells you what the minimum recommended setup is, there's just a 1uF input cap and a 1uF output cap and that's it.