Clarification on interrupt triggered DMA transfer in an STM32
In the STM32L4, there is both a DMA and a DMA multiplexer.

In a simpler chip like the STM32F3, there is just a basic DMA with direct lines to every DMA-capable peripheral. But I guess in the STM32L4, there are many more peripherals and it is unlikely a lot of them will be used with the DMA in any single application. Combined with the impracticality of running direct DMA lines to every peripheral, they chose to add a DMA mux in between the peripherals and the DMA so that amongst the numerous DMA-capable peripherals available, only the select few that are required at any one time could be routed to the DMA thus keeping the lines to the DMA small.

Each output of the DMA mux (you can think of it as parallel single-output muxes that have common inputs, but each output goes to a different line into the DMA) has a register that enables the output as well as selects which input (i.e. peripheral) to connect to.

From there you would have configure your DMA to behave appropriately for that peripheral while referencing that mux output (rather directly referencing the peripheral as you would in a basic DMA where the peripheral has a line directly to the DMA).


  As I understand it, there is actually only 1 general USART2 interrupt line that goes to the DMA, so how does the DMA actually know that the interrupt is the one that signals that it's ready to have another byte put into the transmit data register?


Not every interrupt from a DMA-capable peripheral will trigger a DMA transfer. That wouldn't make sense in use. Each peripheral is designed so only specific interrupts will trigger a DMA transfer. 

For example, for a USART, it only makes sense to trigger a DMA transfer when a byte is received or when a byte has finished transmitting so those are the only interrupts that trigger a DMA transfer and each one has a separate enable bit (the UART RX and TX each have a different DMA trigger line).

Which specific interrupts for a peripheral will trigger the DMA will be in in the peripheral specific section of the reference manual.