Is a 4/3 clock divider possible?
Digital counters can divide a clock frequency by any integer.  Digital logic can't directly multiply frequencies by integer values.

However, you can use a digital counter in the feedback loop around a PLL (phase locked loop).  The overall effect is to multiply the clock frequency by the divide value of the counter.

Such PLLs are common in higher end microcontrollers.  Take a look at the clock chain of any dsPIC33EP series, for example.  There are various dividers and a PLL block that multiplies the clock frequency.  Between the PLL and dividers, you can hit quite a range of clock frequencies from a single crystal.

In your case, you only need to divide by 4 and multiply by 3.  This can be accomplished by a divider and a PLL.  Generally you want dividers to divide by a even number so make the result more square.  You may actually want to multiply by 6 (which requires a divide by 6 internally), then divide by 8.  Dividing by a power of 2 is particularly easy.