Voltage controlled phase shifter?
If you just want adjustable delay (phase shift varies as a function of frequency), then use a ring buffer of digital samples.  With 20 kHz being the upper frequency limit, you need to sample at least at 40 kHz.  However, 100 kHz would be better and leave more room for the external analog filters to work.

The lowest frequency of interest is 10 Hz, which has a 100 ms period.  Since you ask about "phase shift", we can infer that 100 ms is therefore the upper limit on delay.  At 100 kHz sample rate and up to 100 ms delay, you need a buffer that can hold 10 kSamples.  That much RAM is easy to find in many microcontrollers with plenty of room to spare.  You might use 16 kWords of 16 bits each, for example.

The rest is rather simple firmware.  Samples are written into the circular buffer at a fixed 100 kHz rate.  You also pick a sample out of the buffer at the same rate, but the offset from the input position to the output position varies on the fly according to the delay time you are trying to achieve.

100 kHz sample rate means 10 &micro;S per sample.  That gives you 700 instruction cycles per sample for a dsPIC running at 70 MIPs, for example.  That's way more than needed for this.  If you want the delay to be controlled by a voltage, then you'd run the voltage into a A/D input.  That can also be sampled at 100 kHz and still not get close to the 700 cycles/sample budget.