Which cache type is better for bus watching?
Obviously on a multiprocessor system a write-back cache is impossible to use. The write-back cache only updates the data in the cache and not in the memory. The update on the memory is done only when the data on the cache is to be evicted. Let's say that two processors have the same memory address mirrored on their respective caches. Each one of them decides to change the cache contents. Here starts the problem, there are two different data for the same memory addresses. Hence it is impossible to use write-back caches for multi-processor system unless additional mechanisms are added to ensure cache coherency between the different processors of the multiprocessor system.