Low power voltage step down for datalogging
I have had this problem once before . What I did was use 10 K resistors on the bottom of the dividers .This was to keep the source impedance seen by the ADC at always less than 10K. This is normal but do check your ADC just to be sure .I used 100n caps to ground and no buffers .Your caps may be different due to sampling and noise issues.Then I switched the resistive dividers with the smallest cheapest p channel fets that could be googled at the time .The RDS on was extremely small compared to the resistors in the divider so there were no concerns about accuracy.This worked well because the duty cycle of data aquisition was very low.