Parallel bus trace width and spacing
I think that's excessively big.  I normally use 8 mil width and space unless there is a good reason not to, and I don't see one here.

8 mils is something just about any board house in the world can do, usually with a little extra margin so that nothing is being pushed to the limit.  If you know the board house and that they can do finer line/space, then that's fine.  Just realize that you may not be able to dump it on any board house, at least not for the lowest price.  6 mil width/space is still well within the capabilities of many processes.  At 4 mil width/space you need to know the board house and that they can do it reliably, not just say they can do it.