CMOS circuit that will output an analog voltage proportional to the duration of a pulse at the input (pulse-width detection)
Based on the transistor sizes i presume this is IC level stuff. If so start with a voltage source / resistor as a reference current. Then use 2 (or more) transistors as a current mirror. Use that mirrored current to charge your sampling capacitor with a fixed current and your get a linear slope.

Your input voltage would then be operating a transistor that would short out that integrating capacitance to keep its voltage near 0. And once the input rises lets the integrator run up.

You might throw some more transistors at the problem say to disable the current mirror when the input is low. But this would be the majority of it.