Is SPI clock always active?
SPI is not some rigorously defined standard, but more of a de-facto thing.
Normally the SPI clock is only active when the master wants to send/receive data. In general a SPI transaction looks like.

The master asserts chip select
The master clocks through the desired number of data bits. Normally data is clocked out on one edge and clocked in on the other edge avoiding the need for highly precise timing between clock and data. Exactly which edges are used depends on the SPI &quot;mode&quot;
The master deassets chip select to end the transaction.

If you are designing a slave you should be aware that it's common for one master to drive multiple slaves with separate chip selects. So your slave must ignore any clock transitions that happen while it's chip select is not asserted. This of course in-turn means that a master could run the clock continuously (as long as it took care to observe the required timings between clock transitions and chip-select transitions).