Delays of logical flip-flops
The hold time is the time the input must be stable after the clock edge for the data to be sampled correctly by the clock edge. In many cases it is zero, but let's say it is 2 nsec. If your contamination time is 1nsec, it means that after 1nsec the output of the previous FF (input of the next one) started to chage => hold time of the second FF was violated