What is the purpose of this transistor in this circuit?
Q1 simply turns on and discharges C during the negative half cycle, to reset the delay for the next positive half cycle.
Spehro makes a good point; it is not immediately clear if the risetime on C is fast enough to limit the reverse Vbe on Q1 to less than the 5V typically permitted : you might want to check this in simulation, to prevent reverse breakdown of this transistor.