OpAmp with high output current and capacitive load
Here is one approach







simulate this circuit &ndash; Schematic created using CircuitLab

The massive capacitance [I used at least 10uF] on emitter of the output buffer causes phase shifts and BODE plot rolloff and likely instability; including R6 (to isolate) opamp (-)pin from the emitter, and including C2 (needed to provide a look-ahead on the phase shift) provides a control-loop "zero".

In my original implementation, we used bipolar-input-device opamps with the inevitable input bias currents; by making R5 = R6, the nominal voltage drops are cancelled and the temperature-dependent deltaIbias/deltaTemperature error is reduced, to zero if the two input transistors of the opamp's diffpair are indeed matched.

R3 and C1 provide high frequency filtering of incoming power trash; the control-loop performs well at low frequencies. I knew the end-user-system was a high-sample-rate video imager and the focal-plane diodes have ZERO ability to reject power-supply-noise; system raw power were Switching Regulators at high-chopping frequency for efficiency, and I selected R1 and C1 to provide 20 to 40 dB additionally filtering at the SwitchReg chopping frequency.

Result of including R3/C1? There were no herringbone beatnotes on the display video screen, even with system gain turned up (via SPI) to the 8X max value.
To delight of the program manager, we did achieve the 17 nanoVolts/rtHz noise floor. The pixels were quiet.