Data flip flop - I don't understand its purpose
Flip-flops (edge-triggered D type) serve  several purposes in computer architectures:

as sequential state registers (e.g., program counter)
as cycle-delay elements (pipelines) that break up combinatorial paths
as fast storage elements (registers) for holding data

The cycle-delay use is important. It allows the clock speed to be increased because long delays are broken up into shorter ones and processed in a series of stages. The downside is, the overall latency is increased, and the impact of a program branch becomes greater if the pipeline has to be flushed.
When flip-flops are used for fast storage, they generally will have a clock enable to control when they are updated with data. So the data hangs around for longer, as long as the CPU needs it.
An array of these fast storage registers is called a register file, which can be thought of as a small type of RAM to supply operands and store results at CPU clock speed. Typical register files have multiple read and write ports, allowing single-cycle fetch of multiple operands at once.
Static RAMs, such as those used in caches and buffer memories, don't use edge-triggered flip-flops. Instead, they use latches, which require fewer transistors per cell to make than the flip-flop. RAM cells are about 6 transistors per cell, vs. 18 or more for a D flip-flop. This saves area and power, but costs a bit in speed.
Dynamic RAMs, used for main storage, use a capacitor to store data, and are about 1 transistor per cell. This makes them much more dense and much lower cost/bit than SRAM. The tradeoff is access time (latency) and somewhat lower throughput than SRAM. They also require periodic refreshing to restore the charge that leaks off.
So here's your hierarchy of CPU storage, in a nutshell:

local state machines (D flip flops)
pipelines (D flip-flops)
registers / register files (D flip-flops with enables)
SRAM (latches)
DRAM (capacitors)