Why would this power mosfet be made in a surface mount package?
In this case you want the track wider than or equal to length w/l&gt;=1.
This also reduces inductance to &lt;= 0.5nH/mm
e.g.  pin 1 to 3 = 0.4x0.4mm to 2.6mm wide track minimum
With 2 oz finished tracks, each would add 0.00027 Ohms to the wider track to reach connector or load.
The Source on pins 1,2,3 might be expected to go to ground plane microvias.
Furthermore, you won't expect to find these high current ultra low RdsOn packages  with thruhole packages due to the associated high effective series inductance and ringing that would result with longer lead lengths.
This is because the output Coss always increases with lower RdsOn and with risetimes &lt;&lt;1 us range results in degraded performance. It is also due to the the fact that inductance does not change with size, only geometric ratios.