Peak current requirement for switching logic
I do not follow how you get C dv/dt = 3mA. But here is a more accepted way of calculating the power requirement. The energy to charge 80pF to 5V is
$$ E_c = \frac{1}{2}CV^2 = 1 \cdot 10^{-9} J $$
Power is:
$$ P_c = E_c \cdot F(SwitchingFrequency) $$
Therefore the power requirement is proportional to frequency. Examples:
  F = 10MHz,  Pc = 10mW,  I_average = 2mA, times 24 = 48mA
  F = 1MHz,  Pc = 1mW,  I_average = 0.2mA, times 24 = 4.8mA  

At 80pF of load capacitance per line, this is going to be dominant factor for the power dissipation. With a little margin, it is probably good enough to cover other losses.

Therefore, whether a separate regulator is needed will depend on the switching frequency.

Also, regardless of the regulator decision, local decoupling capacitors are required to smooth out the peak switching current. Here I would go with the estimate that at least hundreds of times of the load capacitance is required: 80pF x 24 x 300 = 0.576uF. A typical decoupling scheme would be 0.1uF per IC plus a 2.2uF or larger ceramic capacitor in the same vicinity.