Transistor circuit driving me insane
I don't recognize your Prof's textbook reference for  \$U_{Cdisr}\$ which has been translated for something like \$V_A\$ the early voltage or \$V_{CE}\$max.

In North America and Asia, we normally use Vbe instead of Ube. etc.

Normally you can ignore \$I_{CEO}=10uA\$  This equiv. leakage current with "base open cct."  has an equivalent resistance is called \$ r_o\$ that changes with Vce and is defined by the Early Voltage.

The "Early Voltage", \$V_A\$ is an asymptote that defines the leakage current slope for any opposite voltage/current of normal biased BJTs not in saturation.

Below for an NPN would be reversed about I axis for a PNP.


Not shown above is the Iceo with Ib=0 which would appear as an asymptote close to the Ic=0 or 10uA at Vce max. ≡  Uce max = \$U_{Cdisr}\$ ?? which is negative for PNP and positive on graph above for NPN.

In any case the equivalent CE leakage will be something like 
 \$Vce=(-50V/10uA = 5MΩ\$ or more. So this may start to  become significant when Rc + Re are more than 10% of this value.

So ignoring this leakage, we get;

Let's call the junction between split supplies as GND which by def'n is 0V @ 0Ω

The collector current is only controlled by Vbe and Emitter current includes base current. 
Also we know  Ie = Ic+Ib as long as CE is not saturated and in linear mode.

The important part to know is that the collector is a current source and it is the base voltage and emitter current that controls everything. As long as the collector is not saturated, KVL rules are simple. When saturated β rapidly reduces to β/10 or 10 as used in most datasheets (Ic/Ib=10)

Using KVL  \$ E_B = 0V (gnd) + I_B*R_B + U_{BE} +  I_E * Re  = 30V\$


At this current range  \$U_{BE}\$ will be something just under 0.7V which may be computed exactly from the EB model .
We know \$I_E= (β+1)I_B\$ thus you can solve for everything for any value of Rc and Uc.
You will note that none of this dependent on \$R_C ~or ~ E_C\$ as long as Vce is not saturated and proper polarity.


That means as long as our original assumption is satisfied.


\$R_E+R_C&lt;&lt; r_o ~or~ &lt; 0.1 r_o   ~= r_o~approx= -50V/10uA=5MΩ \$








simulate this circuit &ndash; Schematic created using CircuitLab


  Now I'm asking to impose the base current as zero and Rc=452Ω


Answer

ignore β * Ib and use only Iceo