OTA LTSpice model help
Since you are using the ota, then maybe you are not looking for a real-life case, instead, you want a behavioural model. If so, the simplest voltage dependent resistor is the behavioural resistor:

R1 nodeA nodeB R=f( V(control) )


where V(control) is the controlling voltage and f(x) is an optional function of your choice. Being a behavioural element, it has advantages and disadvantages.

Another approach, a bit more involved, but without the behavioural resistor, is using this:



The circuit on the left is the "engine": Iref generates a unity current over S1 (a VCSW), generating a voltage. This is then compared with a reference voltage, Vref, who represents the desired time varying resistance. The difference goes through an error amplifier and a loop filter (Gfb and Cfb), generating a controlling voltage for the switch. This voltage can control any other switch in the schematic (like S2) that needs a varying resistance as supplied by Vref.

It's not perfect, either: the bandwidth is limited by the time constant of Cfb and its series resistance (1 \$\Omega\$, thus only Cfb's value matters -- Rpar is there just for a DC path to ground), the on/off values of the switche's resistances are the lower/upper limits of its variance, and, not lastly, the number of elements/nodes. OTOH, it's blazingly fast, despite this last shortcoming.

As for the OTA, here are three ways to use it, based on various parameter settings:



A1 uses iout, which means symmetric, tanh() limited output (black trace), A2 uses different isrc and isink for asymmetric, tanh() limited output (blue trace), and A3 uses the linear flag, which means that any voltage going beyond the limits will have the gain halved (red trace). All are compared to the normal V(a)*V(b) (gren trace).