What are the benefits of this type of JFET biasing
The idea of the circuit is that the Vds of the JFET is kept constant at about 12 V (more accurately: 12 V - Vbe_q2 = 11.3 V). Keeping the Vds constant eliminates any influence Vds has on the voltage-to-current transfer (Id / Vgs) of the JFET.

If you do not have 12 V at the cathode of the zener D1 then the circuit is not biased correctly. Then most of the current flowing through R2 goes into the base of Q2 and then to Q1.

Solution: lower the value of R2. D1 is a 1 W zener diode so it can handle 1 W /12 V = 83 mA. Let's say we use 20 mA through R2: 20 V - 12 V = 8 V, 8 V / 20 mA = 400 ohms. Hmm, that's a lot less than the 4.7 kohm you have.

What JFETs you can use depends on the JFET's properties. Look in the datasheet what the Id will be when Vgs = 0 as that is how the JFET is biased here.

I expect that you will also have to lower the value of R1 if you use a JFET with a Vgs=0 current of more than 8V / 2.4 kohm = 3 mA. Lowering R1 will also reduce the voltage gain though.

As an input for a low distortion phono amplifier, I have my doubts about this circuit. To really have low distortion you cannot beat feedback. A good solution could be a JFET based differential pair to provide a limited amount of gain. Then an opamp or opamp like circuit and overall feedback. That will hands down beat this circuit distortion wise.