Check if an analog voltage is 0
simulate this circuit &ndash; Schematic created using CircuitLab

Figure 1. Window comparitor with open-collector outputs ORed.

Choose an open-collector output comparitor. 

How it works:


R1 and R2 form a positive reference voltage as close to zero as you wish.
R3 and R4 form a negative reference voltage as close to zero as you wish.
R5 is a pull-up resistor. Either comparitor can pull it low.
If \$V_{IN} &gt; V_{+CMP1}\$ CMP1 will pull R5 low.
If \$V_{IN} &lt; V_{-CMP2}\$ CMP2 will pull R5 low.


Using two comparitors in the one package may give you better matching between the two comparitors. (I haven't thought this through but you want to avoid the situation where, for reasons of offsets on the inputs, the CMP2 threshold is higher than that of CMP1. This will only be a problem very close to zero.) 



Figure 2. Devices such as the LT1011 bring the output transistor emitter out to a separate pin so that the chip can pull down to a voltage other than V- (GND, for example). This may simplify interface to digital circuitry.