Calculating how many times TIMER1 will overflow
As per page 140 of the datasheet the flag that must be cleared is called \$\mathtt{TOV1}\$ and is the LSB of the register \$\mathtt{TIFR1}\$. That bit should be cleared automatically but that feature might be disabled to use nested interrupts, which seems the case to me. I would have expected an higher value for running, but that's an int and might well be 8 bit wide, so it's overflowing like crazy (that's even signed!).

Try adding this line as the first thing in your overflow ISR:

TIFR1 &amp;= 0x01;


Maybe something like:

TIFR1 &amp;= 1 &lt;&lt; TOV1;


will work too, but who knows? You should dive into headers. Try the first solution, that should work.