Ratio between register and primary memory access?
I think it's a little less than that, but the ratio has been getting higher over time, at least from the 70s onwards.

1 cycle per nanosecond = 1GHz. 4GHz is right on the high end and is four times as fast. However a latency of 50ns is a bit high as an estimate, this article on latency is quoting numbers around 10ns in 2009. If I use that number I get a ratio of 80 times as fast; I suspect real world numbers will be 50-100 depending on configuration.

This is why having lots of cache on-die with the processor makes such a big difference.