Dealing with JFET parameter spread in voltage controlled resistor configuration
5V signal => forget it. Acting resistor is possible when the signal amplitude is say 1% of the pinch off voltage. 5V causes serious distortion.

To stay in truth, there's one trick to reduce the distortion (=feed the signal to the gate, too) but is it effective enough - do some simulations. You can found the trick from here: https://www.vishay.com/docs/70598/70598.pdf

Unfortunately you must still calibrate the R vs Control voltage for the used fet individual.

Another way: There are light dependent resistors which have only few pF self-capacitance. Check, if you can use one. Let a led illuminate the LDR and adjust LED's current. 40Hz control signal can be acceptably slow.

You can have easily linear resistance vs control voltage, if you put 2 leds in series, one illuminates LDR1 and the other illuminates LDR2. Then you have an opamp control circuit which forces the led current to cause the wanted resistance. Only have quite equal LDRs and leds.