What actually is a shadow register?
I'm guessing you've encountered this in terms of PIC programming. PICs originally had I/O ports handled in a very direct manner - you could read what values they had externally, or write what values you output, both on the same address. The downside of this was that the value you were trying to output might not match the state on the pin - something else could be driving it more strongly, or it might just not have finished the change yet. This meant that a separate variable was needed to track what state you intended, rather than got, if you wanted to update only parts of a port. As I recall that separate variable is what is usually referred to as a shadow register, since you always used it to store a copy of the (invisible) output register. More recent PICs avoid this by adding the "latch" addresses, where the output register can be read. This is common in other microcontrollers as well, such as the port vs pin addresses on AVR. 

There's a similar term in PC architecture for shadow memory; in that case, it usually means a section of RAM used to store a copy of a slower ROM, and mapped to the same address. Again it stores a copy of some other storage, which is hidden because the copy replaces it in the address space. 

Edit: Seeing it's a TMS320, the shadow register provides a double buffer; this technique is used to ensure updates happen at a proper time. Compare the use of frame buffer swaps in graphics. The Data Manual shows shadow and active versions of several registers. Consider for instance a register indicating the end of a pulse; if you were to alter it to a shorter pulse, doing so when the pulse has not yet finished might cause one pulse never to finish at all (since it never was equal to the end value in that cycle). But if you write to the shadow register, the hardware can copy it into the active register at a point known to be safe - for instance, exactly when the timer wraps around. This isn't described in the Data Manual, which covers particular parameters for a given chip; knowing TI, there is likely a separate manual describing the function of each block; this one has a mention of Shadow Mode in section 2.2.