Why Data Recovery Block needs to operate at 16 times the baud rate
The receive clock is not synchronized to the transmit clock, nor are the clocks necessarily exactly correct to their nominal frequency (and they could be 'off' in opposite directions).  

It could work with fewer samples if the clocks were exact and the data noise-free, but more is better (with diminishing returns) and allows more tolerance of clock errors etc, so 16 is a good number.  

Here (for the 6402 UART) you can see that the area A represents the uncertainty in the location of the incoming start bit edge, as much as +/- 1/32 of the receive clock. The center of the start bit is assumed to be 7.5 clock cycles after the start bit is detected. Subsequent incoming bits are timed from this.