Will there be a problem if I stay almost in the border in trace spacing when dealing with line voltages?
There are various standards.  Some companies I have worked for have claimed to go thru them and determined that 5mm spacing for "line voltage" was going to cover all the cases.  That is deliberately a superset, so of course there will be individual standards less tight than that.

If your design can tolerate 5mm space, then do it and you're done.  If not, you have to spend some time figuring out which standards apply, and then check them carefully to see what the minimum required spacing is for your particular type of device and target usage.  For example, home and industrial often have different limits.

There are several reasons spacing requirements might be larger than you would think.  The different levels of importance placed on these has something to do with different specifications.

Line voltage spikes.  You say your line voltage is 220V, but that is nominal.  At least 10% should be expected, which brings it to 242V RMS.  The peaks of that are +-342, and that's with everything working normally.  In reality power lines can have fairly large spikes on occasion.  How large depends on what you believe and what probability you want to protect against.

Rectification.  From above we have to expect +-342V on a good day.  However, some line circuits may couple things such that one peak or the other is held at ground, so the worst case the high voltage may be double the ground-referenced line peak, or 684V in your case.  Whether this is considered, allowed, or made a separate catagory varies.

Dirt.  A perfectly clean PC board has quite high resistance and therefore would support very little leakage accross even a small gap.  However, dirt is a fact of life, and accumulated dirt will significantly lower the insulation resistance, especially with high humidity.  You may think that 10 M&Omega;/square is pretty good, but if two such traces are running next to each other for 10x their spacing, then you've got 10 squares in parallel and you're down to 1 M&Omega;.  Again, how this is considered in a spec varies.  How dirty is dirty?  What are the consequences of a few 100 &micro;A leakage?  The answers differ, and thereby so do the specs.