System Generator: How to make a channel selector?
Capturing the right signals simply requires an enabled flipflop.

"Float"ing is more tricky though:

There's no way of doing high-impedance internal signals in modern FPGAs, so if your outputs are connected to internal logic, you can't do that.

And although the physical pins can be made to tristate, as far as I can tell there's no way of accessing that from pure system generator.  

To do it requires use of some FPGA tools outside of system generator:


In your system generator model, you have to create three pins: an input, an output and an enable.  
Then wrap the system generator model in an HDL block which takes those three pins and wires them up to a suitable IOBUF block, which will connect to the real pin.