STM32F7 Spurious I2C interrupt
The problem is an early "return from interrupt".

Because there is a write buffer, any "clear interrupt" flag instructions take one or two extra clock cycles (could be more if peripherial is on a slow clock IIRC). If you execute an interrupt return during this time, the Cortex-M7 core will tail-chain back into the handler - as its interrupt flag is still active.

Workaround: Do a dummy read from any peripherial register. This will cause the previous write to complete first and disable the interrupt pending request on the NVIC.