Is it possible to lower an ADCs input range?
There is one way to increase your resolution without analog changes, assuming that you (1) can afford an increased sampling rate, and (2) can afford the extra computational load. Do a search for "dithering" or "stochastic resonance" as the physicist call it.

Assuming a noisy input signal (mostly a given, but I have added analog noise in some of my applications), doubling your sampling rate and using an appropriate digital filter to decimate back down to your desired sampling frequency, you gain one bit of resolution. Quadruple your sampling rate, and you get two bits.

That gain assumes a proper filter, but something as simple to implement as an average or a first-order IIR would get you more than half the way there.

This is partially the way that Sigma-Delta ADCs operate and give you those 24-bit converters at a low cost.