Full-wave rectification for clock signal from wall power
The circuit will work correctly to produce a 60Hz signal from the mains supply.

During the half cycle where the supply terminal used as the reference is positive, the output will follow the input waveform until it reaches the reverse voltage specification of the Zener diode (e.g. 5V for a 5V Zener) at which point the output will be clipped to this voltage until the supply terminal decreases below the zener threshold.

During the half cycle where the supply terminal is negative, diode in the bridge rectifier forming the ground reference will be reverse biased and you will end up with 0V at the output.

Basically while you are using a full-bridge rectifier for your supply rail, you are actually only using a half bridge rectifier for the clock reference signal. Below is a simulation of the circuit with irrelevant parts of the bridge rectifier removed (parts which are not in the current path for the reference signal).





While this circuit will indeed produce a 60Hz clock signal (or 50Hz in some parts of the world), the edges will have a very slow rise time (depending on the supply voltage) which may cause some phantom clock edges, especially if there is any noise on the power supply rails.

Ideally the signal would then be fed into a Schmitt trigger which will square up the signal edges while also removing phantom clocks caused by noise using a hysteresis loop.



As to why your circuit is running at twice the frequency, it is impossible to do anything but speculate as the rest of the design has not been disclosed.