Clock signal frequency
That's unrelated:
There's no reason the left end of your IC needs to switch synchronously to the right end. Full stop – if you build an IC, that's inherently a distributed system, and skew is part of what you design for; if you need to combine two signals that travel a different distance, you compensate by adding a fractional delay to the &quot;earlier&quot; one, and add pipelining. That has no effect on clock rate; hence, no statement can be made about clock rate from travel distance.
Also:
Clock frequencies of digital logic ICs like CPUs are usually not limited by internal travel distances, but by the speed at which you can charge gate capacitances and at which transistors switch.