STM32 DMA short data burst buffer speed limitation
Most efficient way is to transfer contents of IDR register of GPIOx with DMA to memory buffer at every trigger event. Here it is assumed that you have arranged the pins as an array of the same GPIOx with a known sequence and offset.

For the trigger event, just make a 50% duty cycle pwm mode timer as the clock source for the ADC and make it trigger for the DMA.

Make the trigger edge of DMA opposite of trigging edge of the DAC.