Building a DIY Oscillocope
Digital triggering after the ADC is cheap, but a well designed analog trigger can be better for raw performance and to avoid diluting your ADC bandwidth by sampling a channel you only intend to use as a trigger but not actually capture for display.

Of course digital triggering can have better support for patterns and rules, since it's just FPGA code.

Best solution? Support both.  In theory you can even honor the output of the analog trigger, or not, based on more analytical digital rules.

Any useful digital scope will of course support pre-trigerring by recording to a circular buffer until a set time after the trigger condition is met, then unwrapping for display. This can be done regardless if the trigger decision is an input to the digital system from an analog trigger circuit, or the output of a digital comparator or rule engine, or even the latter taking the former as one of its inputs.