ATmega128 Extended I/O
That AVR instruction set can support a maximum of 64 I/O locations. Why is that? Does the AVR instruction set take in 6 bits for an I/O location?


Most AVR instructions put their arguments as part of the machine code word. IN, OUT, SBI, and CBI have no more than 6 bits available for arguments.


  To accommodate the extended I/O in ATMega128 (160 extra ones), these 160 locations have been mapped to the internal SRAM right after the 64 existing ones. So in effect out of the 4KB SRAM that ATMega128 provides, 160 is taken up by these extended I/O locations.


Incorrect. All 4kiB is available, 160 addresses further up.


  What happens if the ATMega103 compatibility fuse set (programmed by default)? Do I have access to these 160 locations then?


No. You lose the 160 extended registers (and the SRAM moves back to fill them) plus the last 96 bytes of SRAM.


  How exactly do I access these extended locations?


With normal memory access instructions.


  The datasheet asks to use LD/LDS/LDD and ST/STS/STD. Any examples to this as I've never used assembly before.


LDS R1, $61
ORI R1, $08
STS R1, $61
LDS R1, $62
ANDI R1, $F7
STS R1, $62



  I am kind of confused how this wold integrate into my C code worflow? Let's say I need to access DDRF and PORTF. Would I need to know their address(in SRAM) in advance or is there some macro in avr-gcc?


AVR Libc handles all that for you.

DDRF |= _BV(PF3);
PORTF &amp;= ~_BV(PF3);