Delaying rising edge of input signal - 3.3v logic
Without knowing the details of what the driving signal is and what the load is I offer the following:







simulate this circuit &ndash; Schematic created using CircuitLab

Figure 1. A simple RC time delay with fast discharge.

How it works:


When IN goes high C1 charges up exponentially via R1. This sets your time delay which can be calculated from \$ \tau = RC \$ (seconds) approximately. For 500 ms you could try 1 &mu;F and 470 k&Omega;.
When IN goes low C1 is rapidly discharged by D1 and OUT goes low.