BJT pre-biased arrays slower than discrete?
Thanks to @Zulu in the comments above for suggesting MOSFETs as an alternative. That turns out to have been the magic bullet. Because the gates don't sink any current, the gate bias can be zero, which makes it much faster.

However, for the secondary side, the board lacks any emitter-to-base (actually now source to gate) bias resistor, so those boards can't take a MOSFET for the secondary. However, on the secondary side, I can use a BJT array with a lower base resistor to speed that up too. I was unable to use a lower base bias on the primary side because then the pull-up had to be too low.

This hybrid approach yields rise and fall times of almost exactly 1 µs on the prototype on the bench, which is just fine (plenty of margin for component variance).

I'm ordering new boards, however, that will have the footprint for the source-to-gate bias resistor. Testing a four MOSFET design with discrete components yielded rise and fall times of closer to 500 ns.

Of particular note is that the SOT-23 and TSSOP-6 footprints for these components turned out to be compatible - swapping out a P-channel MOSFET for a PNP BJT doesn't require any pin movements. Yay!