Problem in understanding how LM565 increases the VCO frequency
Before going deep into the circuit, maybe a basic understanding of how a PLL works might be helpful.
The PLL consists basically of 3 blocks:
 1. Phase detector
 2. Filter
 3. VCO

How it works:
Upon applying a frequency to its input, the phase difference between this signal and the free-running frequency will be measured (phase error). The phase error is then filtered and used to readjust the VCO in order to reduce the error via a negative feedback. 
The PLL is limited when it comes to the "maximum phase error" it can measure. Putting it simply, if the input frequency is way larger or smaller than the free-running frequency, it will not be able to calculate the phase error. This limitation is usually stated as capture range, which basically means for what frequency range the PLL's free-running frequency can lock to (reduce error to ~ zero). Once the PLL is locked, there is another frequency range (usually larger) which determines the frequencies for which the PLL will remain locked (aka Hold-in range).


Source

According to the datasheet:



It means, that for a free-running frequency = 2kHz, the PLL should be able to remain locked to frequencies :

$$f_{upper}= f_{free} + \frac{8\cdot 2kHz}{10V} = 2kHz + 1.6kHz = 3.6kHz$$

P.S.: I might have overseen it, but I could not find any information about the capture range.