LF356 integrator simulation using LTspice
I have seen similar issues in the past with LTspice and from my experience it comes down to the dc operating point. 

Let's take a look. This is your circuit:



Look at the dc operating point of the output (~13V) (red box in the picture), essentially saturating and not in the linear region anymore. Even though, your input source has 0 Vdc, you still amplify some dc signal—that is the offset voltage. 

For the LF356 this is spec'd at 10mV and this is being amplified by the huge dc gain of the circuit. This messes up the dc operating point and you no longer have meaningful results.

To have meaningful results, you want the dc operating point of both the input and output to be about the same—after all, the bode plot never shows an exact 0 Hz frequency. So if you have 0 Vdc at the input plus the ac signal, you should have 0 Vdc at the output plus the ac signal times whatever gain you have.

I think in the model, they use a value of 3mV for the offset voltage. Go in there and change it to, say, 100uV—you'll see what the effect of the offset voltage is, a real limitation. They call it EOS in the model file. For example, I set EOS= 40uV (which is what the model for the OPA627 uses) and look at the response:



Why did you get good results for the other opamp (OPA627) on the first try? Its offset voltage is listed at 100uV max on the datasheet (they use about 40uV in the LTSpice model) and it does not saturate your output in simulation:



Since the offset voltage is so low compared  to the LF356, you see that even though the circuit still amplifies the offset voltage, it doesn't get to the point of saturating the output and you get results as expected in the linear region. The opamp is still providing a gain of 500mV/40uV = 12,500V/V to the dc offset, but since the offset is small, it causes no problem in simulation.

You could ideally resolve the issue by adding a large resistor to the feedback impedance formed by \$R_F\$ and \$C\$. The problem, however, is that you already have a large resistor there (100k), that forces you to pick a value much greater so that at high frequencies the orginal feedback impedance still dominates. Also, the greater the value of this parallel resistor, the greater the dc gain to the offset and risk of saturation. I tried a few values, and the highest I could go was 40Meg (just on the brink of saturation):





It shows improved behavior but still really close to saturation (~11.7Vdc at the output).

Now, this is a method a use sometimes, because it forces the dc operating point to be the same at the input and output (this is similar to find the loop gain for stability analysis). Look at the location of the ac source now:



That arrangement makes both the input and output be at the same dc level and keeps the opamp in the linear region. I am 'injecting' a voltage and measure the gain around the loop. You can look at this answer(towards the end of it) or this video, it explains a bit more why this works. 

And this is finally the ac response for this setup:



Hope this helps.