How point-contact transistor work?
Disclaimer: I do not pretend this to by an answer. Rather, a bit elaborated comment.
As I read, what they were looking into was a way to circumvent surface-states characteristic detrimental effects due to energy-dependent charge storage close to the interface (aka near-interface traps, NIT). The presence of permitted states within the Germanium band gap was a clear obstacle (well, in those days it wasn't clear at all) to the Gate establishing overall FET operation. Therefore, the idea was to bypass the use of Gate and Oxide structure and rather directly inject metal probes to the Ge surface and see what happens: what they got was a crude bipolar-like device operation where these needle took the role of E-C contacts.
Source:

Shuji Hasegawa, François Grey, Electronic transport at semiconductor
surfaces––from point-contact transistor to micro-four-point probes,
Surface Science, Volume 500, Issues 1–3, 2002, Pages 84-104, ISSN
0039-6028, https://doi.org/10.1016/S0039-6028(01)01533-3


[...] it seems obvious that each transistor could show different behavior (mentioned negative resistance, unstable gain etc.)

Definitely so, as they were pioneers in that field. They couldn't get nowhere near what modern device processes are able to deliver: nowadays we know how quality oxide can be grown on top (e.g. SiO2) of Silicon, what crystallographic surfaces fit best such process, POA treatments and so on. Without that, a large defect density is definitely to be expected, leading to significant device variability -- however, I don't know about these &quot;negative resistance&quot; effects.

I understand that point-contact transistor is now very obsolete device

Not actually, as such idea is still used in some novel electron devices under research; the context though is completely different, of course.