I2C PCA9600 logic side offset + ringing
The Output low voltage on the output side is typical 0.6Volt in the configuration that you use. So that is normal. Where the slave pulls the clock low you see almost 0Volt this is normal behavior. The pull-up resistors are not causing this offset.

According to the data sheet the clamping diodes need to be placed on both sides to reduce the transients a close s possible to the chip inputs.

The ringing that you see can be affected by a lot of things. Compared to a similar setup in the fat adhere you're pull-up resistors are quite high. Also the capacitors on the lines are not displayed in you're drawing. Also the capacitance of your probes can affect the ringing. The datasheet is very complete about acceptable ringing on the lines.