ADC specs: fpbw - infinite resistor noise?
It is not the full power bandwidth spec you are looking for but is related to the settling time of the sample and hold.

Page 244 of the ATmega328 data sheet (assuming you have a 328) shows that the input of the ADC can be represented by the source resistance together with internal sampling switch resistance (1..100K) and the 14pF sampling cap.  This will give a single pole filter that will limit the bandwidth and avoid all frequencies up to infinity contributing to the total noise.