Series resistance on crystal
I'm assuming you mean placing the series resistor as shown below: -


Could you explain to my why 220 ohms is a good value? I've found
suggestions of for instance 33 ohms elsewhere (also by the book of
Ott. ) Where should it be located exactly and why?

There will be resistance in the internal output from OSC_OUT and that may be enough to initiate oscillations. But, if you don't have a series resistor, there is no guarantee that there will be enough phase shift around the loop to cause the circuit to oscillate at all let alone oscillate at the right frequency.
This type of pierce oscillator needs a 3rd order filtering effect to take place and the resistor (the added one) and C26 in your original diagram add an extra phase shift of 10 to 20 degrees; enough to start oscillation.
Using a bigger resistor is usually not a problem and is often done to reduce the power dissipated inside the crystal so, you choose the series resistor based on the crystal you are using and the supply voltage of the inverting gate inside the oscillator part of your chip.
If you want a full tear-down on the components of a crystal oscillator, this web-page may be of interest to you. It takes you through the reasons why the crystal oscillates and explains why it may not oscillate at exactly the right frequency you expected it to such as in this diagram: -

Varying the loading capacitors shows how the crystal oscillation frequency may be retuned: -

And, if you change the drive resistance (the added series resistance) you also get slightly different oscillation frequencies: -

The web page also shows the effect of the gate and it's propagation delays.

what's the difference between the left and right output of the
crystal?

A crystal is symmetrical and either terminal (left and right) can be swapped. Regards the chip itself OSC_IN is an input and OSC_OUT is an output.
You also need to check whether you need a 1 MΩ resistor between OSC_IN and OSC_OUT - some chips have it built internally but many don't. It is used to bias the chip's inverting gate into the linear portion of its signal range. It's basically like applying a feedback resistor across an op-amp i.e. it's negative feedback that sets the DC conditions correctly.