How does this direct digital synthesis accumulator work?
Frequency modulation basically means that the frequency of the carrier is changed depending on the magnitude of the message (the audio signal).  If the magnitude is positive, the frequency is increased.  If the magnitude is negative, the frequency is decreased.  Hence 'frequency modulation' because the frequency is being changed instead of the amplitude (AM) or the phase (PM).  

In this case, a DDS is being used to generate the carrier wave.  Direct digital synthesis basically involves outputting samples of a waveform from a lookup table at a specific rate.  The rate is determined by a counter, called the phase accumulator.  At every clock cycle, the counter is incremented by a little bit - the 'phase' accumulated by the carrier wave over the clock period.  Generally DDS counters have a number of fractional bits so that the counter can accumulate a more accurate phase step on each clock period.  It looks like this one does not have any fractional bits, probably because of the modulation and relatively high output frequency.  After that, the output of the counter is fed to the lookup table, selecting a sample.  A constant phase step will produce a constant frequency.  However, adjusting the phase step by adding the message data will vary the frequency in lockstep with the message, forming an FM modulated signal.  

This line looks like it is adding the audio message data to the phase step, but with some extra work to rescale it properly and deal with the sign bit.  

Edit: Never mind, it does have 24 fractional bits.  The lowest 24 bits of the accumulator are not used in the table lookup.