Reducing the range of a D flip-flop frequency detector
The circuit is a simple edge detector. The output has a variable pulse density that's based on the ratio between the input frequency and the reference frequency.

For frequencies up to Fclk/2, every input edge (rising or falling) produces an output pulse. Above this frequency, some edges are missed, reducing the number of output pulses.

I assume that the triangle plot represents the average value of the output signal for various input frequencies. Obviously, this graph has a periodicity that's related to Fclk, and the slope of the graph varies as well.

If you want a steeper slope over a particular range, you just need to reduce Fclk until the graph has the slope you need over the required range. You'll be undersampling the input clock, but that's OK in this kind of application.