How to explain the difference in modeling small signals for BJT and JFET devices?
The form of the small-signal models for the BJT/FET are essentially the same.  This is because of the way small-signal models are constructed.

In both cases, there is an equation that relates the collector/drain current to base-emitter/gate-source voltage and the collector-emitter/drain-source voltage.

To derive the small-signal model, the collector/drain current equations are Taylor expanded about the operating point and only the first order (linear) terms are kept (thus the small-signal approximation).

The term involving the base-emitter/gate-source voltage is modelled as a voltage controlled current source.  The term involving the collector-emitter/drain-source voltage is modelled as a resistor.

In the case of the BJT, we do something similar with the base current equation and model the linear term there with a resistor.  Since the (DC) gate current is zero, there is no equivalent resistor in the model.

Of course, this simple picture ignores the inter-element capacitance and other departures from the basic governing equations.

A nice derivation of the BJT small-signal model is here.  The FET version is here.