Raspberry 3.3 V to 5 V level conversion at 5MHz
Have a look at the CD4050 datasheet. 

It says there that the output transition time from high to low and from low to high with a 5V supply voltage (you didn't specify, but I'll go ahead and assume that) is typically 60ns each (max 110/120ns). That means that for a full period of a signal, a total delay of typically 120ns, and up to 230ns will accumulate.

Now, a period of a 5 MHz signal is \$\frac1{5\text{ MHz}}=\frac1{5\text{ M}\frac1{\text s}}=\frac15\text{ µs}=200\text{ ns}\$. So, if we can assume typical transition duration, you're barely ok, but you'd normally design for worst-case, so this wouldn't work. You chose a insufficiently fast device.

Another note: read datasheets. The high-level input threshold voltage of the CD4050 is 2.75V, whereas the transition from logical low to logical high on the Raspberry pi would happen somewhere around \$\frac{3.3\text{ V}}2=1.65\text{ V}\$. So with just a little voltage lost between the Pi's output and your CD4050's input, the CD4050 wouldn't even "see" a high on the input. Uh-oh. I can't really read your miniature signal plots, but this might already be the case here. Also, it means that your timing constraints get even worse – notice how the slope of the rising edge of your input signal isn't overly steep? The point where that voltage crosses 2.75V is the earliest point at which you can start to count the low-to-high output transition delay explained above – if at (that point + delay) your falling edge already occurs, your output will never see "high". Again, wrong choice of device to do 3.3V to 5V conversion.

There's a lot of dedicated so-called level translator devices out there, I don't understand why people insist on using logic gates for this. Of course it works, but most of the time, that's by luck, because the input signal reaches sufficiently above the half the output voltage swing. Also, time-proven technology in honours and all, but the CD4050 was designed in the early 70s, I think – I don't know where you've got the recommendation to use that from, but taking advice on digital signal handling from things based in the 70s might not be the best approach. There simply has been way too much movement in semiconductor technology.

Looking at your signal, I'd also assume there's more than sensible signal degradation due to badly layouted PCB traces or unsuitable wires – 5 MHz is not that much, but it's still the beginning of where you need to consider high-frequency design rules. You can't just use a piece of flying wire to connect devices talking at 5 MHz and hope it'll work reliably.