Best board-to-board low latency protocol/interface
Aurora looks like a reasonable choice; basically it looks like the thing you'd build if you were trying to build a generic interface from high-speed SERDES. It has flow control. It even has channel bonding, which seems to have some support in Xilinx hardware. That should give you your required speed from theoretically a single link pair in each direction at the 3Gpbs max.

This link gives some latency numbers, for a loopback link. Board to board latency will obviously depend on wire delay.

It shouldn't require a more complex stackup than the FPGA itself (usually minimum 4?). I would suggest using the PCIe connectors even if you don't use the protocol; alternatively SATA connectors might provide a good short cable option.

They don't actually specify the PHY at all, but this app note gives an example of how to connect two eval boards. They're just wired up with mini coax leads using SMA connectors, so I guess the required impedance is the usual 50 ohm?