Bypass source capacitor JFET
The gain increases because the capacitor provides small-signal ground (it becomes a short). That is, for the small signal analysis purposes, the capacitor shorts the source resistance to ground making the equivalent resistance at the source zero and the source resistance impacts the final gain. 

The formula that you have in pink is the one for a common-source amplifier.

Consider the model of an ideal voltage amplifier as below:







simulate this circuit &ndash; Schematic created using CircuitLab

I went ahead and added the drain and load resistances. And as you probably know, constant potentials (such as Vdd become small signal ground).

Now, what is \$R_{out}\$? It is just the resistance looking into the output of your voltage amplifier, which in this case is the drain. If this was a MOSFET, the resistance looking into the drain when there is a source resistance is 

$$ R_{\text{into drain}}=R_{out}=r_o+R_s+\text{gm}r_oR_s $$

You can readily find this in the literature out there. In the voltage amplifier model, \$A\$ is the unloaded voltage gain of a common source, which you can also find online:

$$ A_v=-\text{gm}r_o$$

Now, find an expression for \$\dfrac{v_{out}}{v_{in}}\$, which would be the loaded gain. You have a simple voltage divider:

$$v_{out}=\dfrac{(R_D||R_L)Av_{in}}{(R_D||R_L)+R_{out}} $$

You could now transfer the \$v_{in}\$ on the right hand side, to the left and arrive at:

$$ \dfrac{v_{out}}{v_{in}}=\dfrac{(R_D||R_L)(-\text{gm}r_o)}{(R_D||R_L)+R_{out}}$$

Here is the thing, where \$R_s\$ comes into play. If you didn't have the source capacitor, then \$ R_{out}=r_o+R_s+\text{gm}r_oR_s\$ and your loaded gain equation becomes:

$$ \dfrac{v_{out}}{v_{in}}=-\text{gm}r_o\dfrac{(R_D||R_L)}{(R_D||R_L)+r_o+R_s+\text{gm}r_oR_s}$$

With the capacitor, the equivalent resistance at the source for the small signal model becomes zero since the capacitor shorts \$R_s\$ to ground. Then 

\$ R_{out}=r_o+0+\text{gm}r_o(0)=r_o\$ 

and the loaded gain equation becomes:

$$ \dfrac{v_{out}}{v_{in}}=-\text{gm}r_o\dfrac{(R_D||R_L)}{(R_D||R_L)+r_o}$$

This makes the denominator smaller, and therefore theoretical gain increases in comparison with the gain when \$R_s\$ is present.

The equation you have in pink is the same one I have. This could be re-written as 

$$ \dfrac{v_{out}}{v_{in}}=-\text{gm}\big(r_o||R_D||R_L\big)$$

They are probably treating the drain the resistance as the total load for the small signal model (\$R_{D,total}=R_D||R_L)\$ for the equations in pink or they simply didn't consider an \$R_L\$. 

Hope this helps.