AND gate made out of transistors letting current pass despite only one input high
B at 3V, A at 0V.  Q2 is off, the BE junction of Q1 is forward-biased and drops between 0.6V and 0.7V.  I'll use 0.7V.  The BC junction of Q1 is reverse-biased, so we ignore any current there.  There's 2.3V left, dropped across 2.2k\$\Omega\$ + 4.7k\$\Omega\$.  That works out to \$i = \frac{3\mathrm{V} - 0.7\mathrm{V}}{2.2\mathrm{k}\Omega + 4.7\mathrm{k}\Omega} \simeq 333\mu\mathrm{A}\$.  So the output voltage is \$v_{out} = (4.7\mathrm{k}\Omega)(333\mu\mathrm{A}) \simeq 1.57\mathrm{V}\$.  That's well within the margin of error for the BE junction voltage (cool your circuit down enough and it'll read 1.57V!)

With both A and B high we can assume that the BE drop of Q2 is 0.7 (ish) volts.  Q1 is saturated, so assume a CE drop of 0.2V there.  That gets \$V_{out} = 3\mathrm{V} - 0.7\mathrm{V} - 0.2\mathrm{V} \simeq 2.1\mathrm{V}\$.  That's still within the ballpark of your 2.3V -- I probably overestimated both the CE drop of Q1 and the BE drop of Q2.

What to do?  

To correct the second problem ("only" 2.3V), remember that you're working with bipolar transistors, which just aren't rail-rail devices.  Just accept the number and move on.  If you must hit 3V, use logic-level FETs.  

To correct the first problem, go back and look at the voltage divider formed by the base resistor and emitter resistor.  Consider that transistors have lots of current gain -- if you go to a 10k\$\Omega\$ base resistor then the emitter resistor will see 1/3 of the 2.3V in my first paragraph -- so your output low would be something like 0.8V.  If that's not low enough, go to greater than 10k\$\Omega\$ on the base -- I'm betting that up to 47k\$\Omega\$ would work.

As a general note, any functioning logic family is going to be built on NAND and NOR gates, because they will regenerate the original signal at each stage.  Google resistor-transistor logic and diode-transistor logic if you want to build some old-time bipolar logic circuits.







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