Does dual-bank read-while-write work properly in STM32L071?
Reading-While-Write has some limitation in case of Multiple programming operation. See RM0377 § 3.3.4 Writing/erasing the NVM - Program half-page in Flash program memory page 82:


  When a half-page operation starts, the memory interface waits for 16 addresses/data, aborting (with a hard fault) all read accesses that are not a fetch (refer to Fetch and prefetch). A fetch stops the half-page operation. The memory content remains unchanged, the FWWERR error is set in the FLASH_SR register.


This means that no fetch operation are allowed in the flash while feeding the memory interface with the 16 words (whatever the code is running in bank 1 and the half page programming is performed in bank 2) . Once the 16 words have been sent to the memory interface, you can resume execution from flash, i.e. during the physical writing of the data inside the flash bank (assuming your code is running in the other bank).  

In a nutshell, you need to execute from SRAM the feeding of the memory interface with the 16 words and make sure the interrupts will not cause fetch in flash memory (either mask all interrupts or relocate interrupt handlers and interrupts vector in SRAM).

Note: there is no such limitation in case of Single programming operation.