What is standard about standard cells in layout designing?
Standard cells usually refer to blocks of logic that are arranged into a library of elements. This is the library you buy from a fabrication facility (FAB) when you order their cervices for chip fabrication. These "cells" are coming fully validated and characterized by the vendor for each particular fabrication node, with all timing and power consumption etc. 

These cells are called "standard" as opposite to full-custom design of logic blocks from basic layout primitives. Some people used to do this in the past to take potential speed advantage of various odd techniques such as self-clocking (domino) logic, or if some special analog functions are needed. In these "non-standard" cases the chip design house takes responsibility to validate (qualify) their design, as opposite to take standard well characterized cells from FAB vendor.