Help with designing a peak detector
Issue 1, you need a pull-down to ground on the gate of Q1. Mosfets have a high gate capacitance, than needs to be drained. This is a problem with your switch design that will not appear if the switch is replaced with the pin from the micro.

Issue 2, is also caused by mosfet capacitance. (You should also change Q2 to a p-channel.) Also it is not uncommon to add a low pass filter in the output stage of peak detectors to limit spurious switching signals. However, the spikes you see may be more the simulator than reality. Real clock signals do not have infinite rise times. 

It's also not a good idea to short the output of the first op-amp like that. Add a small resistance after the diode and before the holding capacitor line.