Why a lower voltage is better for modern fast CPU and other similar chips?
In traditional CMOS circuits the power consumption, to first order, followed this expression:

\$ P \propto f_{CLOCK} \times C_{LOAD} \times V^2_{SUPPLY} \$

where the load capacitance was the effective capacitance of the internal wiring and transistor gate oxide. Notice that power consumption is proportional to the square of the supply voltage, so lowering the supply voltage is a powerful way to decrease power consumption. Unfortunately, just lowering the supply voltage tends to make the circuits run slower so other changes, such as scaling the transistors, are necessary to keep achieving higher clock frequencies.

As transistor scaling approached deep submicron feature sizes, say below about 250 nm, transistors stopped behaving like "traditional" CMOS and started to be more leaky. That added a term to the power equation that is proportional only to supply voltage (not voltage squared) and limited the benefit of lowering the supply voltage in order to decrease power consumption.