Is there any more subtle convention for GPIO pin labelling between overlines, asterisks, and/or inverter symbols?
No, it’s just people using different low-true conventions based on what they’re used to. I’ll show examples below.
Overbars in schematics are problematic these days as they aren’t normal ASCII characters that one can deal with using a text editor. With the popularity of text-based hardware description languages like Verilog and VHDL, this becomes a major issue.
Noting this, a few text-based approaches have emerged to indicate low-true signals:

backslash after each letter (e.g., R\A\S\) - used in OrCAD, which translates this to overbar. While this works, it’s a royal pain to use. Regardless, you’d rightly also add a bubble to such a pin to indicate low-true.
asterisk at the end (e.g., DTACK*) - 68000 and NuBus. Also gets a bubble.
pound sign at the end (e.g., RESET#) - Intel. Yep, bubble again.
‘n’ preceding (nRESET) - ARM. Bubble, too.
‘n’ at the end (RESETn) - AXI / AMBA, also from ARM. Bubble here as well.

There are some others, but the trailing-n convention seems to be the most used now. This applies even for names that indicate both polarities, for example:

RD/WRn or RD_WRn, for high = read and low = write.

Diff pairs use a few conventions:

DP/DM: USB2
HSOp/HSOn: PCIe
A+/A-: SATA

There was an attempt some time ago to introduce a standard symbology for this and other issues in schematics: IEEE-STD-315. It wasn’t widely adopted, and in retrospect, seems downright silly when working with large ICs and hardware description languages. More about that standard here: https://resources.pcb.cadence.com/blog/2020-working-with-standardized-ieee-315-1975-e-cad-symbols.
Instead, pin attributes on CAD symbols and hardware description languages made this graphic standard largely irrelevant.