Altera HDL design techniques
So, as I understood from the answers given and documentation, low level elements, like multiplexors combinatorial gates, are interpreted efficiently by all brands' synthesizers and have the same/similar HDL pattern.

Now, higher level implementations, like DSP functions (multiplayers and what not), can be implemented through the use of device specific templates (or in the case of Altera, through megafunctions) that can be found in the IDE design software itself. Also, each device will have dedicated hardware, like PLLs for clock generation or even DSP cores, whose functionality can be accessed also through the use of specific templates (which are infered to that specific hardware by the compliler) or special functions, like Altera's megafunctions.