Does a Guard Ring around a PLL loop filter make sense?
Don't do it. The 1M resistor will have a significantly reduced impedance @ 1.5Ghz. Even if that were not the case, the floating pours can become really good antennas @ 1.5 Ghz. Think about what a patch antenna is: a trace to a copper pour. The resistor is trying to prevent this, but it can still resonate with adjacent signals. 

I have worked with frequencies that are similar to yours. Here is what a typical design process is:


Layout the board
Do signal integrity on the fast signals
Get the S-parameter models of your decoupling capacitors
For each IC compute the impedance to ground from the power pins using FEM
Add capacitors in the simulator in order to get your target impedance
Add the capacitors to the layout, go to 4 and repeat until step 5 is satisfied
Use FEM to compute the resonant modes of the planes
Add capacitors to suppress them
Add capacitors to the layout, go to 7


As you can see, doing the signal and power integrity at such frequencies is not a trivial task. You can end up with 1000's of capacitors. You will probably be okay, if you follow the layout recommendations of the manufacturers. Just remember, a floating plane is an antenna, if it happens to resonate at a frequency that is present on your board. 

Decoupling at Ghz frequencies is not easy at all. Here is a typical impedance curve:

Note how the capacitors become inductive. That is why you need to combine high values with low value capacitors. But it is not as easy as that, because the different valued capacitors can start resonating with each other. Always make sure you use the recommended capacitor part numbers from the manufacturers in the specified package sizes, if you are not able or willing to carry the level of analysis I have outlined.