Reverse engineering the manufacturer's programming sequence of an FPGA
It is certainly possible to program (using and HDL) and do useful tasks on FPGAs without using any third party IP blocks - if that is what you meant. However you do still have to use the vendors synthesis tools. 

Synchronous state machines etc written in appropriately structured VHDL easily synthesize onto the LUTs and flip flops and multiplexers in an FPGA cell and you can have these designs connect with the IO pins using a constraints file (which will be in a proprietary format).

The synthesis tools  will recognise certain idioms in VHDL and map onto other resources on the chip automatically e.g. using global clock signals where appropriate and even mapping a pipelined arithmetical construct onto a DSP where appropriate.

On the other hand there are some resources on the chip for which you have to use vendor supplied macros for the synthesis tools to be able to map onto hardware. One example is if using a PLL to generate clocks of different phases.