what will happen when providing two pull up resistors in same line
You'll have a pull-up of 4k7 || 10k = 3k2.
The open drain pin will have to handle a maximum current of V / R = 3.3 / 3k2 = 1 mA.

In open drain pin's device datasheet it was mentioned that open drain pin as input will handle max of 10 uA.

This sounds as though you are mis-reading it. It doesn't &quot;handle&quot; a current but may source or draw up to 10 μA. That means that the pull-up resistor would have to source 10 μA into the input to keep it high. That's not an issue.

In that case will that 1 mA damage the open drain pin?

The open drain pin is on your &quot;Output IC&quot;. Check the datsheet. It can probably sink 50 mA.

... actually there will be current division right (or) will all current entirely flows towards the open-drain pin ?

When the line is high the pull-up will supply 10 μA to the input.
When the line is low the pull-up will supply 1 mA to the open-drain transistor.
For almost all practical purposes you can ignore the input current for CMOS devices because it is so low for steady-state conditions. At high frequencies the situation changes because you have to charge and discharge the input capacitance.