Why would a 74HC595 return all logic highs on all its outputs at start up?
Without looking at the detailed internal structure of the flip flops in the 74HC595 I can conclude that there is something in the structure of each flip flop that gives it a bias to powering up in the logic 1 out condition. This could be such things as relative fet sizes or capacitance values within the flip flop. You should not rely on this. This is what the MR is for. Wire up the MR to a reset line or a capacitor to ground with a pull up resistor if a known power up condition is important to you.