Physical address vs virtual address
It is difficult to tell what you are asking, and this isn't the place for a book on virtual memory.  It seems you are asking how the address translation from virtual to physical addresses works.  I'll try to explain it briefly.

There are many ways this can be done, with some tradeoffs between what is handled automatically by the hardware and at what level things get too complex so that the software has to get envolved.  Basically, for a block of virtual addresses that already has its data in real memory (paged in), there is a hardware translation mechanism.  The low address bits map directly, so only the upper bits need to be translated.  For example, if pages are 1 k in size, then the low 10 bits of any virtual and the corresponding physical address are the same.  The upper bits identify the page, but there can still be many of them.  For example, on a 32 bit address machine with 1 k sized pages, there are 22 page-address bits, or 4 M pages.

You could make a table with 4 M entries, but this needs to be in special fast memory since it gets used every address reference.  That would be very expensive, so usually a much smaller list of recently used pages is kept in a special high speed memory.  That memory needs to be associative (content addressed).  Put another way, every page reference all entries in this high speed memory are checked in parallel to see which one, if any, contains the mapping info for that particular page.  The one that does supplies the upper bits of the real address, which is then combined with the low bits to form the address where that word currently resides in real memory.  This special high speed associative memory is often called the translation lookaside buffer, or TLB.

If none of the TLB entries match the page address, then things get more complicated.  I'm not going to go into all that because there is much written about it out there.  If you want to know more, ask specific questions.