Reusing heatsink vias for ground plane connection
Is this a bad practice? Is it possible to cause any problems? If so,
  what is the proper way to do?


Not necessarily, but be aware of two things:


The inductive pathway to ground is increased with traces slightly, this does have an effect with high frequency and increasing the ESL of the caps slightly. If you want to find out what the effect is, find the ESL of the cap then find the inductance of the trace with a PCB trace inductance calculator. Generally it's a good idea to place the bypass capacitors vias to ground close to the capacitors.
The thermal pathway for the QFN is increased. The more traces you sink to the QFN's heatsink, the more heat it dissipates and the harder it is to solder the QFN part on and off. This is also minimal, but something to be aware of.



  On the first image, top of the PCB, I have also connected some of the
  IC ground traces to the pad. Is this, also, a bad practice?


No, I think it's a good practice as all the grounds of the QFN part have a common mode and are at the same potential, which I think is good (maybe there are reasons this is bad).


  One thought of mine was to create an identical pad on the bottom of
  the PCB, using the same vias to ground as well, for the caps to
  connect. What do you think of that?


This would also be ok, because paralleling vias also decreases inductance, you can think of each via as an small inductor at high frequencies. Parlalling inductors decreases overall inductance.