Does the output of JK Flip Flop toggle continously?
A flip-flop can only change state when there is a zero-to-one transition in the incoming clock. If J=1 and K=1, Q output will toggle at half the frequency of the CLK.

It may help you (or confuse you) to know that internally a flip-flop can be formed by cascading two level-sensitive latches, the first of which is low-level latching and the second one is high-level latching. When the same clock is fed to both latch enables, the first latch will settle its state when the clock signal (its latch enable) is low. The second latch will settle its state when the clock signal (its latch enable) is high. Note that the input of the second latch is the output of the first latch. The end result is an edge-sensitive device.