Verilog - arithmetic comparison with part of register
Both the options can help you to compare the part of the register. The main thing which you should keep in mind is that wire are elements in Verilog that are used to connect input and output ports of a module instantiation together with some other element in your design, so it is better to use

wire [3:0] options_lowerpartof;
assign options_partof = options[3:0];

only when the only task to be done is the comparison. Here the 'wire' keyword helps to connect two different modules together (this is a concept of modular programming in Verilog).