Issues with using higher capacitance than required
22uF vs 10uF makes no difference. If you plan on doing step loads like 1A and want low ripple, then choose a Low ESR Cap.


  A minimum Cap value is often to meet the noise level  in the specs. But it also affects step load ripple voltage.


The effect of this load Cap is a little hard to explain, but basically Cout lowers Zout with rising f while the regulator does the opposite due to internal loop gain BW limits. 

We know the output impedance of an emitter follower depends on hFe and bias current. It also reduces with rising frequency due to Gain-bandwidth product, so Zout rises with f even with negative feedback, while C lowers Z(f) for rising f. 


  Zout is the determining factor for output ripple with a step load R.  as an effective voltage divider.  The capacitor helps reduce noise, ripple and output impedance load regulation and in this design they specify no maximum. In other types using ultra low LDO's with MOSFET's , they often specify a maximum and minimum for instability reasons.


So the simple answer is 10uF is recommended to flatten the Zout and reduce step ripple error.  The static DC error for load regulation is 1mV drop from 5 to 800mA which translated into a 1/800 Ohm output impedance which probably rises to several Ohms at 100kHz, while the Cap does the opposite thus flattening the Zout response and improving step load ripple.