I2C Multimaster Operation
About the question about PE2-PE0 being a waste of pins. Maybe not because the master who lost the arbitration may need to retry the transmission. To understand better the use of these pins, you should go deeper in the device datasheet (as opposed to the App Note.) 



Hopefully this will help you to understand point 5 and 6

I am assuming you are familiar with the open collector/open drain configuration. As you know, communication is made over only two lines namely SDA and SCL.

Now, lets focus on the data line (SDA.) SDA can be in two states:


Pulled up: No transistor is driving the line down. The voltage on the line is Vcc/Vdd (+).
Driven down: One (or more) transistors are pulling the line down. The voltage on the line is Vee/Vss.


Now, let's say two masters want to take the bus exactly at the same time. They will take the bus if no start has been sent before. So they will send the data but keep monitoring the data line. At any time, there are four possibilities:


None of the masters pull the line down (is not a problem as there is no conflict.)
Both masters pull the line down (there is no conflict either.)
Master A is driving the line down but Master B is not. Master A does not detect conflict so it keeps transmitting. Master B senses that the line is high but as Master B is not driving the line down, it detects the conflict and stops transmitting.
Master B is driving the line down but Master A is not. In this case A detects the conflict and stops transmitting.