Setting DDRx register before PORTx register or after AVR cores?
Say that you need a pin to transition between being high impedance (high-Z) and being driven high, or using the internal pull-up resistor and being driven low. Such a transition requires changing a bit in two different registers, yet you can't actually modify both registers at the same time. Most of the time you can get away without paying attention to the order, but there are exceptions. 



During the brief period of time between writing to PORTx and DDRx (or vice versa), the I/O port will be in an unwanted intermediate state. In some cases this intermediate state can cause a glitch or even damage components.  



As an example, when writing a "bit banged" software implementation of I2C (which doesn't allow driving the pin high at any time as another chip may be driving the same line low), one must first clear the relevant DDRx bit and then set the PORTx bit to avoid the "output high" state when transmitting a 1 after a 0.