How to build large multiplexers using SystemVerilog?
module generic_mux #(parameter WIDTH = 1, 
                     parameter NUMBER = 2, 
                     localparam SELECT_W = $clog2(NUMBER)) 
 (input logic [SELECT_W-1:0] sel, 
  input logic [WIDTH-1:0] mux_in [NUMBER-1:0],                   
  output logic [WIDTH-1:0] out);
  
  assign out = mux_in[sel];
    
endmodule    

I used part select to select the input and route it to the output. The select line width is logarithm to the base 2 of the number of inputs. The select line width should be declared as localparam so that it won't be overridden.