Why does two-BJT transistor-based capacitance multiplier show bad performance
To start with, op amp U1 does nothing. Its output is coupled to the input via R3, which is useless because V4 overrides it. So the circuit devolves into this:-



simulate this circuit &ndash; Schematic created using CircuitLab
U2 maintains its output voltage equal to the voltage at the top of R5 without drawing significant current at its input. This 'bootstraps' the bottom of R5, reducing the voltage across it so C3 charges slower. Since R2 is connected to R5 it also gets the same voltage, causing C2 to also charge slower.
Now consider what happens when you replace U2 with Q1. This has 3 undesirable characteristics that the op amp doesn't:-

The Base requires significant current to produce the required Emitter current.

It has an offset voltage of ~0.6V between Base and Emitter.

The gain is less than 1.


These flaws make it a poor substitute for the op amp. The Base current causes the capacitor to charge faster. The offset voltage and reduced gain cause the 'bootstrap' to be less effective, so the voltage at the bottom of R5 and R2 is lower causing the capacitors to charge faster.