Is an unlocked PLL an open-loop clock? And is a locked PLL a closed-loop clock?
An "unlocked" PLL could be open or closed loop.

Consider if the capture range does not exceed the initial mixer error frequency then the feedback is too small to correct the VCO and lock it even though, the loop may be "closed"

Capture range is usually much less than the holding or tracking Locked range for a type I phase detector mixer.  

This capture/ Locked range ratio depends on the loop phase margin,  which depends on the loop filter phase lead /lag compensation which is a fancy description for a filter that looks like &lt; R1+R2C1> in the feedback path .