verilog code with two falling edges
Each input requires its own process. Create two "toggle" FFs, and then XOR their outputs together. Toggle the "set" FF when the output is zero, and toggle the "reset" FF when the output is one.

module dual_edge_ff (
  input set,
  input reset,
  output q
);
  reg set_ff;
  reg reset_ff;
  assign q = set_ff ^ reset_ff;

  always @(negedge set) if (!q) set_ff &lt;= !set_ff;
  always @(negedge reset) if (q) reset_ff &lt;= !reset_ff;
endmodule


If you're building this with discrete logic, you just need a 74xx73 (dual negative edge triggered JK FF) and a 74xx86 (quad XOR gate, use one section as an inverter).