Dali - Handling multiple responses
The control device is not expected to be able to differentiate between these two cases, an invalid frame is just an invalid frame whether it was due to collision, a bad control gear or an intermittent short circuit between the bus wires.

The control device sees an invalid frame/collision and proceeds from there as described in the linked question/answer and as per the standards. You should not have to worry about the possibility of badly written control gear firmware since any DALI-2 certified or DALI-1 registered control gear will have been through rigorous testing involving thousands of query/response cycles, during which any one badly timed response frame would cause a failure of the test.

So if you can prove that you are seeing invalid frames as responses when only one gear is on the bus, you should contact the manufacturer with a full report illustrating the conditions. If the manufacturer claims DALI-2 certification then you can check this against the DiiA Product Database, including the specific GTIN and hardware &amp; firmware version numbers. If they claim DALI-1 registration, you could ask for the test report.

Before you go that far, double check that your control device is sending correctly formatted and timed frames, that your bus power supply meets the requirements of IEC62386-101, that the cabling is within the spec limits etc. It is best to eliminate all aspects of your own design first by using well-known or certified third party equipment for the bus power supply and the control device. Otherwise it might be that your control device is slightly out of spec, which is why the control gear does not respond to those queries - but there is no reason why a single control gear with a single short address should ever send an invalid response frame. (The exception is for the type of hardware unit which takes multiple short addresses, which has to reply with an invalid frame in certain cases eg broadcast queries, to mimic the same effect as the usual case of multiple gear on the bus).

Do not relax your timing thresholds - they have to meet the values in IEC62386-101 for either Single master application controller or Multi-master application controller, and again there are DALI-2 tests for this which you should be aiming to meet. For example, a high half-bit has a minimum time of 333.3us at the receiver for single masters.