what is the EEPROM (28C64) output behavior between address change?
Here is how a read cycle is sequenced (extract from the datasheet you linked):



You see that, when the address changes, the DATA I/O lines are hatched. This means the output is unspecified. It could be anything, until tAA has elapsed. This timing is your EEPROM access time, and, depending on the part number, ranges from 150ns to 250ns. So, what you see is consistent with the spec.

Basically, the output are guaranteed to be correct only after this access time has elapsed. In the meantime, the address decoding may still be settling within the chip, and output may be inconsistent in this period. And, yes, results may be different for each chip.