(PLL) Why is it essential for VCO to continue oscillating when input is zero?
Why is it essential for VCO to continue oscillating when input is zero?

I disagree with the statement that it is essential to keep the VCO oscillating for any input signal.

You could look at that statement in a broader sense: Is it needed to have the VCO oscillating for all possible input signals ?

A PLL is a feedback loop in which part of the signal is a frequency. What happens if that frequency becomes zero, i.e. DC ?

In my opinion this depends on the implementation of the frequency detector in the PLL. As long as that frequency detector considers DC to be a lower frequency than the reference frequency and therefore tries to set the chargepump such that the VCO will be steered to a higher frequency. Then the loop will eventually lock.

More dangerous is if the VCO stops because of a too high input signal (tuning voltage) because then the sign of the loop suddenly reverses (a slightly higher tuning voltage makes the VCO frequency go to DC). This will lock-up the loop as negative feedback (good) has changed to positive feedback (unwanted).

Note that this also might happen if the VCO produces such a high frequency that the frequency divider stops working !

To make the PLL lock quickly it is indeed more desirable to have the VCO oscillating for the full input signal range as it takes more time to start up a VCO than it takes to change its frequency. So desirable but not essential ! And depending on the phase-frequency detector of course.