Tuned common emitter amplifier design
The bode plot looks also very ugly... why?

The bode plot looks ugly because of you not telling LTSpice to use more frequency events (points) when doing the AC analysis. It'll be smoother when you use loads more points but it'll take longer to draw (a minor issue for this circuit).

I get an 18Vpp waveform at 100kHz (0.4Vpp input sinewave at 100kHz).
How can that be higher than 15Vcc?

You can get more voltage out p-p that the DC rail because the inductor acts like a short at DC and therefore Q1's collector naturally sits at +15 volts. When you apply a signal, due to the inductor, the AC collector voltage swings above and below the 15 volt DC power rail hence, the maximum p-p voltage will be nearly twice 15 volts. It is degraded slightly by the emitter voltage (1 volt) so the &quot;real&quot; maximum will be about 28 volts p-p before things start to get ugly in the time domain.