How do I generate a high frequency sine wave using a PLL? 900 to 950 MHz
One approach would be to use a simple single-chip transmitter designed for the 902-928 MHz ISM band. Here is a typical circuit: 



This chip uses a PLL and internal divider to lock to a reference crystal. Power output is +23dBm (200mW) and it does not require a uC to set it up. 

There are a number of app notes and a somewhat pricey eval board available from the supplier.  

In answer to your question about a minimum comparison frequency for a PLL, there is no minimum, but the loop filter frequency and the lock-in time will increase proportionally to the inverse of the comparison frequency (all other things being equal), so if you compare at 100Hz vs. 10MHz it will take 100,000 times as long to lock in and stabilize.