Build a 2-way universal logic processor using NAND logic gates
11 NANDs

Define the gate MUX (cost 4) as

MUX(P, Q, R) = (P NAND Q) NAND (NOT P NAND R)


with truth table

P Q R    (P NAND Q)   (NOT P NAND R)    MUX
0 0 0        1               1           0
0 0 1        1               0           1
0 1 0        1               1           0
0 1 1        1               0           1
1 0 0        1               1           0
1 0 1        1               1           0
1 1 0        0               1           1
1 1 1        0               1           1


Then this is the familiar ternary operator MUX(P, Q, R) = P ? Q : R

We simply have

2ULP = MUX(A, MUX(B, L_ab, L_a), MUX(B, L_b, L_))


for a cost 12, but there's a trivial one-gate saving by reusing the NOT B from the two inner MUXes.